gcc/lra-int.h

   1 /* Local Register Allocator (LRA) intercommunication header file.
   2    Copyright (C) 2010-2013 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #include "lra.h"
  22 #include "bitmap.h"
  23 #include "recog.h"
  24 #include "insn-attr.h"
  25 #include "insn-codes.h"
  26 #include "insn-config.h"
  27 #include "regs.h"
  28
  29 #define lra_assert(c) gcc_checking_assert (c)
  30
  31 /* The parameter used to prevent infinite reloading for an insn.  Each
  32    insn operands might require a reload and, if it is a memory, its
  33    base and index registers might require a reload too.  */
  34 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
  35
  36 /* Return the hard register which given pseudo REGNO assigned to.
  37    Negative value means that the register got memory or we don't know
  38    allocation yet.  */
  39 static inline int
  40 lra_get_regno_hard_regno (int regno)
  41 {
  42   resize_reg_info ();
  43   return reg_renumber[regno];
  44 }
  45
  46 typedef struct lra_live_range *lra_live_range_t;
  47
  48 /* The structure describes program points where a given pseudo lives.
  49    The live ranges can be used to find conflicts with other pseudos.
  50    If the live ranges of two pseudos are intersected, the pseudos are
  51    in conflict.  */
  52 struct lra_live_range
  53 {
  54   /* Pseudo regno whose live range is described by given
  55      structure.  */
  56   int regno;
  57   /* Program point range.  */
  58   int start, finish;
  59   /* Next structure describing program points where the pseudo
  60      lives.  */
  61   lra_live_range_t next;
  62   /* Pointer to structures with the same start.  */
  63   lra_live_range_t start_next;
  64 };
  65
  66 typedef struct lra_copy *lra_copy_t;
  67
  68 /* Copy between pseudos which affects assigning hard registers.  */
  69 struct lra_copy
  70 {
  71   /* True if regno1 is the destination of the copy.  */
  72   bool regno1_dest_p;
  73   /* Execution frequency of the copy.  */
  74   int freq;
  75   /* Pseudos connected by the copy.  REGNO1 < REGNO2.  */
  76   int regno1, regno2;
  77   /* Next copy with correspondingly REGNO1 and REGNO2.  */
  78   lra_copy_t regno1_next, regno2_next;
  79 };
  80
  81 /* Common info about a register (pseudo or hard register).  */
  82 struct lra_reg
  83 {
  84   /* Bitmap of UIDs of insns (including debug insns) referring the
  85      reg.  */
  86   bitmap_head insn_bitmap;
  87   /* The following fields are defined only for pseudos.  */
  88   /* Hard registers with which the pseudo conflicts.  */
  89   HARD_REG_SET conflict_hard_regs;
  90   /* We assign hard registers to reload pseudos which can occur in few
  91      places.  So two hard register preferences are enough for them.
  92      The following fields define the preferred hard registers.  If
  93      there are no such hard registers the first field value is
  94      negative.  If there is only one preferred hard register, the 2nd
  95      field is negative.  */
  96   int preferred_hard_regno1, preferred_hard_regno2;
  97   /* Profits to use the corresponding preferred hard registers.  If
  98      the both hard registers defined, the first hard register has not
  99      less profit than the second one.  */
 100   int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
 101 #ifdef STACK_REGS
 102   /* True if the pseudo should not be assigned to a stack register.  */
 103   bool no_stack_p;
 104 #endif
 105 #ifdef ENABLE_CHECKING
 106   /* True if the pseudo crosses a call.  It is setup in lra-lives.c
 107      and used to check that the pseudo crossing a call did not get a
 108      call used hard register.  */
 109   bool call_p;
 110 #endif
 111   /* Number of references and execution frequencies of the register in
 112      *non-debug* insns.  */
 113   int nrefs, freq;
 114   int last_reload;
 115   /* Regno used to undo the inheritance.  It can be non-zero only
 116      between couple of inheritance and undo inheritance passes.  */
 117   int restore_regno;
 118   /* Value holding by register.  If the pseudos have the same value
 119      they do not conflict.  */
 120   int val;
 121   /* Offset from relative eliminate register to pesudo reg.  */
 122   int offset;
 123   /* These members are set up in lra-lives.c and updated in
 124      lra-coalesce.c.  */
 125   /* The biggest size mode in which each pseudo reg is referred in
 126      whole function (possibly via subreg).  */
 127   enum machine_mode biggest_mode;
 128   /* Live ranges of the pseudo.  */
 129   lra_live_range_t live_ranges;
 130   /* This member is set up in lra-lives.c for subsequent
 131      assignments.  */
 132   lra_copy_t copies;
 133 };
 134
 135 /* References to the common info about each register.  */
 136 extern struct lra_reg *lra_reg_info;
 137
 138 /* Static info about each insn operand (common for all insns with the
 139    same ICODE).  Warning: if the structure definition is changed, the
 140    initializer for debug_operand_data in lra.c should be changed
 141    too.  */
 142 struct lra_operand_data
 143 {
 144   /* The machine description constraint string of the operand.  */
 145   const char *constraint;
 146   /* It is taken only from machine description (which is different
 147      from recog_data.operand_mode) and can be of VOIDmode.  */
 148   ENUM_BITFIELD(machine_mode) mode : 16;
 149   /* The type of the operand (in/out/inout).  */
 150   ENUM_BITFIELD (op_type) type : 8;
 151   /* Through if accessed through STRICT_LOW.  */
 152   unsigned int strict_low : 1;
 153   /* True if the operand is an operator.  */
 154   unsigned int is_operator : 1;
 155   /* True if there is an early clobber alternative for this operand.
 156      This field is set up every time when corresponding
 157      operand_alternative in lra_static_insn_data is set up.  */
 158   unsigned int early_clobber : 1;
 159   /* True if the operand is an address.  */
 160   unsigned int is_address : 1;
 161 };
 162
 163 /* Info about register occurrence in an insn.  */
 164 struct lra_insn_reg
 165 {
 166   /* The biggest mode through which the insn refers to the register
 167      occurrence (remember the register can be accessed through a
 168      subreg in the insn).  */
 169   ENUM_BITFIELD(machine_mode) biggest_mode : 16;
 170   /* The type of the corresponding operand which is the register.  */
 171   ENUM_BITFIELD (op_type) type : 8;
 172   /* True if the reg is accessed through a subreg and the subreg is
 173      just a part of the register.  */
 174   unsigned int subreg_p : 1;
 175   /* True if there is an early clobber alternative for this
 176      operand.  */
 177   unsigned int early_clobber : 1;
 178   /* The corresponding regno of the register.  */
 179   int regno;
 180   /* Next reg info of the same insn.  */
 181   struct lra_insn_reg *next;
 182 };
 183
 184 /* Static part (common info for insns with the same ICODE) of LRA
 185    internal insn info. It exists in at most one exemplar for each
 186    non-negative ICODE. There is only one exception. Each asm insn has
 187    own structure.  Warning: if the structure definition is changed,
 188    the initializer for debug_insn_static_data in lra.c should be
 189    changed too.  */
 190 struct lra_static_insn_data
 191 {
 192   /* Static info about each insn operand.  */
 193   struct lra_operand_data *operand;
 194   /* Each duplication refers to the number of the corresponding
 195      operand which is duplicated.  */
 196   int *dup_num;
 197   /* The number of an operand marked as commutative, -1 otherwise.  */
 198   int commutative;
 199   /* Number of operands, duplications, and alternatives of the
 200      insn.  */
 201   char n_operands;
 202   char n_dups;
 203   char n_alternatives;
 204   /* Insns in machine description (or clobbers in asm) may contain
 205      explicit hard regs which are not operands.  The following list
 206      describes such hard registers.  */
 207   struct lra_insn_reg *hard_regs;
 208   /* Array [n_alternatives][n_operand] of static constraint info for
 209      given operand in given alternative.  This info can be changed if
 210      the target reg info is changed.  */
 211   struct operand_alternative *operand_alternative;
 212 };
 213
 214 /* LRA internal info about an insn (LRA internal insn
 215    representation).  */
 216 struct lra_insn_recog_data
 217 {
 218   /* The insn code.  */
 219   int icode;
 220   /* The insn itself.  */
 221   rtx insn;
 222   /* Common data for insns with the same ICODE.  Asm insns (their
 223      ICODE is negative) do not share such structures.  */
 224   struct lra_static_insn_data *insn_static_data;
 225   /* Two arrays of size correspondingly equal to the operand and the
 226      duplication numbers: */
 227   rtx **operand_loc; /* The operand locations, NULL if no operands.  */
 228   rtx **dup_loc; /* The dup locations, NULL if no dups.  */
 229   /* Number of hard registers implicitly used in given call insn.  The
 230      value can be NULL or points to array of the hard register numbers
 231      ending with a negative value.  */
 232   int *arg_hard_regs;
 233   /* Alternative enabled for the insn.  NULL for debug insns.  */
 234   bool *alternative_enabled_p;
 235   /* The alternative should be used for the insn, -1 if invalid, or we
 236      should try to use any alternative, or the insn is a debug
 237      insn.  */
 238   int used_insn_alternative;
 239   /* The following member value is always NULL for a debug insn.  */
 240   struct lra_insn_reg *regs;
 241 };
 242
 243 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
 244
 245 /* Whether the clobber is used temporary in LRA.  */
 246 #define LRA_TEMP_CLOBBER_P(x) \
 247   (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
 248
 249 /* Cost factor for each additional reload and maximal cost reject for
 250    insn reloads.  One might ask about such strange numbers.  Their
 251    values occurred historically from former reload pass.  */
 252 #define LRA_LOSER_COST_FACTOR 6
 253 #define LRA_MAX_REJECT 600
 254
 255 /* Maximum allowed number of constraint pass iterations after the last
 256    spill pass.  It is for preventing LRA cycling in a bug case.  */
 257 #define LRA_MAX_CONSTRAINT_ITERATION_NUMBER 30
 258
 259 /* The maximal number of inheritance/split passes in LRA.  It should
 260    be more 1 in order to perform caller saves transformations and much
 261    less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
 262    as permitted constraint passes in some complicated cases.  The
 263    first inheritance/split pass has a biggest impact on generated code
 264    quality.  Each subsequent affects generated code in less degree.
 265    For example, the 3rd pass does not change generated SPEC2000 code
 266    at all on x86-64.  */
 267 #define LRA_MAX_INHERITANCE_PASSES 2
 268
 269 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
 270     || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_CONSTRAINT_ITERATION_NUMBER - 8
 271 #error wrong LRA_MAX_INHERITANCE_PASSES value
 272 #endif
 273
 274 /* lra.c: */
 275
 276 extern FILE *lra_dump_file;
 277
 278 extern bool lra_reg_spill_p;
 279
 280 extern HARD_REG_SET lra_no_alloc_regs;
 281
 282 extern int lra_insn_recog_data_len;
 283 extern lra_insn_recog_data_t *lra_insn_recog_data;
 284
 285 extern int lra_curr_reload_num;
 286
 287 extern void lra_push_insn (rtx);
 288 extern void lra_push_insn_by_uid (unsigned int);
 289 extern void lra_push_insn_and_update_insn_regno_info (rtx);
 290 extern rtx lra_pop_insn (void);
 291 extern unsigned int lra_insn_stack_length (void);
 292
 293 extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
 294                                                  enum reg_class, const char *);
 295 extern void lra_set_regno_unique_value (int);
 296 extern void lra_invalidate_insn_data (rtx);
 297 extern void lra_set_insn_deleted (rtx);
 298 extern void lra_delete_dead_insn (rtx);
 299 extern void lra_emit_add (rtx, rtx, rtx);
 300 extern void lra_emit_move (rtx, rtx);
 301 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 302
 303 extern void lra_process_new_insns (rtx, rtx, rtx, const char *);
 304
 305 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx);
 306 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx);
 307 extern void lra_set_used_insn_alternative (rtx, int);
 308 extern void lra_set_used_insn_alternative_by_uid (int, int);
 309
 310 extern void lra_invalidate_insn_regno_info (rtx);
 311 extern void lra_update_insn_regno_info (rtx);
 312 extern struct lra_insn_reg *lra_get_insn_regs (int);
 313
 314 extern void lra_free_copies (void);
 315 extern void lra_create_copy (int, int, int);
 316 extern lra_copy_t lra_get_copy (int);
 317 extern bool lra_former_scratch_p (int);
 318 extern bool lra_former_scratch_operand_p (rtx, int);
 319
 320 extern int lra_new_regno_start;
 321 extern int lra_constraint_new_regno_start;
 322 extern bitmap_head lra_inheritance_pseudos;
 323 extern bitmap_head lra_split_regs;
 324 extern bitmap_head lra_subreg_reload_pseudos;
 325 extern bitmap_head lra_optional_reload_pseudos;
 326 extern int lra_constraint_new_insn_uid_start;
 327
 328 /* lra-constraints.c: */
 329
 330 extern int lra_constraint_offset (int, enum machine_mode);
 331
 332 extern int lra_constraint_iter;
 333 extern int lra_constraint_iter_after_spill;
 334 extern bool lra_risky_transformations_p;
 335 extern int lra_inheritance_iter;
 336 extern int lra_undo_inheritance_iter;
 337 extern bool lra_constraints (bool);
 338 extern void lra_constraints_init (void);
 339 extern void lra_constraints_finish (void);
 340 extern void lra_inheritance (void);
 341 extern bool lra_undo_inheritance (void);
 342
 343 /* lra-lives.c: */
 344
 345 extern int lra_live_max_point;
 346 extern int *lra_point_freq;
 347
 348 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
 349
 350 extern int lra_live_range_iter;
 351 extern void lra_create_live_ranges (bool);
 352 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
 353 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
 354                                                lra_live_range_t);
 355 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
 356                                            lra_live_range_t);
 357 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
 358 extern void debug (lra_live_range &ref);
 359 extern void debug (lra_live_range *ptr);
 360 extern void lra_debug_live_range_list (lra_live_range_t);
 361 extern void lra_debug_pseudo_live_ranges (int);
 362 extern void lra_debug_live_ranges (void);
 363 extern void lra_clear_live_ranges (void);
 364 extern void lra_live_ranges_init (void);
 365 extern void lra_live_ranges_finish (void);
 366 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
 367
 368 /* lra-assigns.c: */
 369
 370 extern void lra_setup_reg_renumber (int, int, bool);
 371 extern bool lra_assign (void);
 372
 373
 374 /* lra-coalesce.c: */
 375
 376 extern int lra_coalesce_iter;
 377 extern bool lra_coalesce (void);
 378
 379 /* lra-spills.c:  */
 380
 381 extern bool lra_need_for_spills_p (void);
 382 extern void lra_spill (void);
 383 extern void lra_final_code_change (void);
 384
 385
 386 /* lra-elimination.c: */
 387
 388 extern void lra_debug_elim_table (void);
 389 extern int lra_get_elimination_hard_regno (int);
 390 extern rtx lra_eliminate_regs_1 (rtx, enum machine_mode, bool, bool, bool);
 391 extern void lra_eliminate (bool);
 392
 393 extern void lra_eliminate_reg_if_possible (rtx *);
 394
 395 \f
 396
 397 /* Update insn operands which are duplication of NOP operand.  The
 398    insn is represented by its LRA internal representation ID.  */
 399 static inline void
 400 lra_update_dup (lra_insn_recog_data_t id, int nop)
 401 {
 402   int i;
 403   struct lra_static_insn_data *static_id = id->insn_static_data;
 404
 405   for (i = 0; i < static_id->n_dups; i++)
 406     if (static_id->dup_num[i] == nop)
 407       *id->dup_loc[i] = *id->operand_loc[nop];
 408 }
 409
 410 /* Process operator duplications in insn with ID.  We do it after the
 411    operands processing.  Generally speaking, we could do this probably
 412    simultaneously with operands processing because a common practice
 413    is to enumerate the operators after their operands.  */
 414 static inline void
 415 lra_update_operator_dups (lra_insn_recog_data_t id)
 416 {
 417   int i;
 418   struct lra_static_insn_data *static_id = id->insn_static_data;
 419
 420   for (i = 0; i < static_id->n_dups; i++)
 421     {
 422       int ndup = static_id->dup_num[i];
 423
 424       if (static_id->operand[ndup].is_operator)
 425         *id->dup_loc[i] = *id->operand_loc[ndup];
 426     }
 427 }
 428
 429 /* Return info about INSN.  Set up the info if it is not done yet.  */
 430 static inline lra_insn_recog_data_t
 431 lra_get_insn_recog_data (rtx insn)
 432 {
 433   lra_insn_recog_data_t data;
 434   unsigned int uid = INSN_UID (insn);
 435
 436   if (lra_insn_recog_data_len > (int) uid
 437       && (data = lra_insn_recog_data[uid]) != NULL)
 438     {
 439       /* Check that we did not change insn without updating the insn
 440          info.  */
 441       lra_assert (data->insn == insn
 442                   && (INSN_CODE (insn) < 0
 443                       || data->icode == INSN_CODE (insn)));
 444       return data;
 445     }
 446   return lra_set_insn_recog_data (insn);
 447 }
 448
 449 /* Update offset from pseudos with VAL by INCR.  */
 450 static inline void
 451 lra_update_reg_val_offset (int val, int incr)
 452 {
 453   int i;
 454
 455   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
 456     {
 457       if (lra_reg_info[i].val == val)
 458         lra_reg_info[i].offset += incr;
 459     }
 460 }
 461
 462 /* Return true if register content is equal to VAL with OFFSET.  */
 463 static inline bool
 464 lra_reg_val_equal_p (int regno, int val, int offset)
 465 {
 466   if (lra_reg_info[regno].val == val
 467       && lra_reg_info[regno].offset == offset)
 468     return true;
 469
 470   return false;
 471 }
 472
 473 /* Assign value of register FROM to TO.  */
 474 static inline void
 475 lra_assign_reg_val (int from, int to)
 476 {
 477   lra_reg_info[to].val = lra_reg_info[from].val;
 478   lra_reg_info[to].offset = lra_reg_info[from].offset;
 479 }
 480 \f
 481
 482 struct target_lra_int
 483 {
 484   /* Map INSN_UID -> the operand alternative data (NULL if unknown).
 485      We assume that this data is valid until register info is changed
 486      because classes in the data can be changed.  */
 487   struct operand_alternative *x_op_alt_data[LAST_INSN_CODE];
 488 };
 489
 490 extern struct target_lra_int default_target_lra_int;
 491 #if SWITCHABLE_TARGET
 492 extern struct target_lra_int *this_target_lra_int;
 493 #else
 494 #define this_target_lra_int (&default_target_lra_int)
 495 #endif
 496
 497 #define op_alt_data (this_target_lra_int->x_op_alt_data)