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1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
68 stack.
70 * Methodology:
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 * asm_operands:
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
80 stack-like regs:
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
88 output operand.
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
95 up".
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
100 3. It is possible that if an input dies in an insn, reload might
101 use the input reg for an output reload. Consider this example:
103 asm ("foo" : "=t" (a) : "f" (b));
105 This asm says that input B is not popped by the asm, and that
106 the asm pushes a result onto the reg-stack, i.e., the stack is one
107 deeper after the asm than it was before. But, it is possible that
108 reload will think that it can use the same reg for both the input and
109 the output, if input B dies in this insn.
111 If any input operand uses the "f" constraint, all output reg
112 constraints must use the "&" earlyclobber.
114 The asm above would be written as
116 asm ("foo" : "=&t" (a) : "f" (b));
118 4. Some operands need to be in particular places on the stack. All
119 output operands fall in this category - there is no other way to
120 know which regs the outputs appear in unless the user indicates
121 this in the constraints.
123 Output operands must specifically indicate which reg an output
124 appears in after an asm. "=f" is not allowed: the operand
125 constraints must select a class with a single reg.
127 5. Output operands may not be "inserted" between existing stack regs.
128 Since no 387 opcode uses a read/write operand, all output operands
129 are dead before the asm_operands, and are pushed by the asm_operands.
130 It makes no sense to push anywhere but the top of the reg-stack.
132 Output operands must start at the top of the reg-stack: output
133 operands may not "skip" a reg.
135 6. Some asm statements may need extra stack space for internal
136 calculations. This can be guaranteed by clobbering stack registers
137 unrelated to the inputs and outputs.
139 Here are a couple of reasonable asms to want to write. This asm
140 takes one input, which is internally popped, and produces two outputs.
142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
145 and replaces them with one output. The user must code the "st(1)"
146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
152 #include "config.h"
153 #include "system.h"
154 #include "coretypes.h"
155 #include "tm.h"
156 #include "alias.h"
157 #include "symtab.h"
158 #include "tree.h"
159 #include "varasm.h"
160 #include "rtl-error.h"
161 #include "tm_p.h"
162 #include "hard-reg-set.h"
163 #include "function.h"
164 #include "insn-config.h"
165 #include "regs.h"
166 #include "flags.h"
167 #include "recog.h"
168 #include "predict.h"
169 #include "dominance.h"
170 #include "cfg.h"
171 #include "cfgrtl.h"
172 #include "cfganal.h"
173 #include "cfgbuild.h"
174 #include "cfgcleanup.h"
175 #include "basic-block.h"
176 #include "reload.h"
177 #include "tree-pass.h"
178 #include "target.h"
179 #include "df.h"
180 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
181 #include "rtl-iter.h"
183 #ifdef STACK_REGS
185 /* We use this array to cache info about insns, because otherwise we
186 spend too much time in stack_regs_mentioned_p.
188 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
189 the insn uses stack registers, two indicates the insn does not use
190 stack registers. */
191 static vec<char> stack_regs_mentioned_data;
193 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
195 int regstack_completed = 0;
197 /* This is the basic stack record. TOP is an index into REG[] such
198 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
200 If TOP is -2, REG[] is not yet initialized. Stack initialization
201 consists of placing each live reg in array `reg' and setting `top'
202 appropriately.
204 REG_SET indicates which registers are live. */
206 typedef struct stack_def
208 int top; /* index to top stack element */
209 HARD_REG_SET reg_set; /* set of live registers */
210 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
211 } *stack_ptr;
213 /* This is used to carry information about basic blocks. It is
214 attached to the AUX field of the standard CFG block. */
216 typedef struct block_info_def
218 struct stack_def stack_in; /* Input stack configuration. */
219 struct stack_def stack_out; /* Output stack configuration. */
220 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
221 int done; /* True if block already converted. */
222 int predecessors; /* Number of predecessors that need
223 to be visited. */
224 } *block_info;
226 #define BLOCK_INFO(B) ((block_info) (B)->aux)
228 /* Passed to change_stack to indicate where to emit insns. */
229 enum emit_where
231 EMIT_AFTER,
232 EMIT_BEFORE
235 /* The block we're currently working on. */
236 static basic_block current_block;
238 /* In the current_block, whether we're processing the first register
239 stack or call instruction, i.e. the regstack is currently the
240 same as BLOCK_INFO(current_block)->stack_in. */
241 static bool starting_stack_p;
243 /* This is the register file for all register after conversion. */
244 static rtx
245 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
247 #define FP_MODE_REG(regno,mode) \
248 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
250 /* Used to initialize uninitialized registers. */
251 static rtx not_a_num;
253 /* Forward declarations */
255 static int stack_regs_mentioned_p (const_rtx pat);
256 static void pop_stack (stack_ptr, int);
257 static rtx *get_true_reg (rtx *);
259 static int check_asm_stack_operands (rtx_insn *);
260 static void get_asm_operands_in_out (rtx, int *, int *);
261 static rtx stack_result (tree);
262 static void replace_reg (rtx *, int);
263 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
264 static int get_hard_regnum (stack_ptr, rtx);
265 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
266 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
267 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
268 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
269 static int swap_rtx_condition_1 (rtx);
270 static int swap_rtx_condition (rtx_insn *);
271 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx);
272 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
273 static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
274 static bool subst_stack_regs (rtx_insn *, stack_ptr);
275 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
276 static void print_stack (FILE *, stack_ptr);
277 static rtx_insn *next_flags_user (rtx_insn *);
279 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
281 static int
282 stack_regs_mentioned_p (const_rtx pat)
284 const char *fmt;
285 int i;
287 if (STACK_REG_P (pat))
288 return 1;
290 fmt = GET_RTX_FORMAT (GET_CODE (pat));
291 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
293 if (fmt[i] == 'E')
295 int j;
297 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
298 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
299 return 1;
301 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
302 return 1;
305 return 0;
308 /* Return nonzero if INSN mentions stacked registers, else return zero. */
311 stack_regs_mentioned (const_rtx insn)
313 unsigned int uid, max;
314 int test;
316 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
317 return 0;
319 uid = INSN_UID (insn);
320 max = stack_regs_mentioned_data.length ();
321 if (uid >= max)
323 /* Allocate some extra size to avoid too many reallocs, but
324 do not grow too quickly. */
325 max = uid + uid / 20 + 1;
326 stack_regs_mentioned_data.safe_grow_cleared (max);
329 test = stack_regs_mentioned_data[uid];
330 if (test == 0)
332 /* This insn has yet to be examined. Do so now. */
333 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
334 stack_regs_mentioned_data[uid] = test;
337 return test == 1;
340 static rtx ix86_flags_rtx;
342 static rtx_insn *
343 next_flags_user (rtx_insn *insn)
345 /* Search forward looking for the first use of this value.
346 Stop at block boundaries. */
348 while (insn != BB_END (current_block))
350 insn = NEXT_INSN (insn);
352 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
353 return insn;
355 if (CALL_P (insn))
356 return NULL;
358 return NULL;
361 /* Reorganize the stack into ascending numbers, before this insn. */
363 static void
364 straighten_stack (rtx_insn *insn, stack_ptr regstack)
366 struct stack_def temp_stack;
367 int top;
369 /* If there is only a single register on the stack, then the stack is
370 already in increasing order and no reorganization is needed.
372 Similarly if the stack is empty. */
373 if (regstack->top <= 0)
374 return;
376 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
378 for (top = temp_stack.top = regstack->top; top >= 0; top--)
379 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
381 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
384 /* Pop a register from the stack. */
386 static void
387 pop_stack (stack_ptr regstack, int regno)
389 int top = regstack->top;
391 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
392 regstack->top--;
393 /* If regno was not at the top of stack then adjust stack. */
394 if (regstack->reg [top] != regno)
396 int i;
397 for (i = regstack->top; i >= 0; i--)
398 if (regstack->reg [i] == regno)
400 int j;
401 for (j = i; j < top; j++)
402 regstack->reg [j] = regstack->reg [j + 1];
403 break;
408 /* Return a pointer to the REG expression within PAT. If PAT is not a
409 REG, possible enclosed by a conversion rtx, return the inner part of
410 PAT that stopped the search. */
412 static rtx *
413 get_true_reg (rtx *pat)
415 for (;;)
416 switch (GET_CODE (*pat))
418 case SUBREG:
419 /* Eliminate FP subregister accesses in favor of the
420 actual FP register in use. */
422 rtx subreg;
423 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
425 int regno_off = subreg_regno_offset (REGNO (subreg),
426 GET_MODE (subreg),
427 SUBREG_BYTE (*pat),
428 GET_MODE (*pat));
429 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
430 GET_MODE (subreg));
431 return pat;
434 case FLOAT:
435 case FIX:
436 case FLOAT_EXTEND:
437 pat = & XEXP (*pat, 0);
438 break;
440 case UNSPEC:
441 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
442 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC)
443 pat = & XVECEXP (*pat, 0, 0);
444 return pat;
446 case FLOAT_TRUNCATE:
447 if (!flag_unsafe_math_optimizations)
448 return pat;
449 pat = & XEXP (*pat, 0);
450 break;
452 default:
453 return pat;
457 /* Set if we find any malformed asms in a block. */
458 static bool any_malformed_asm;
460 /* There are many rules that an asm statement for stack-like regs must
461 follow. Those rules are explained at the top of this file: the rule
462 numbers below refer to that explanation. */
464 static int
465 check_asm_stack_operands (rtx_insn *insn)
467 int i;
468 int n_clobbers;
469 int malformed_asm = 0;
470 rtx body = PATTERN (insn);
472 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
473 char implicitly_dies[FIRST_PSEUDO_REGISTER];
475 rtx *clobber_reg = 0;
476 int n_inputs, n_outputs;
478 /* Find out what the constraints require. If no constraint
479 alternative matches, this asm is malformed. */
480 extract_constrain_insn (insn);
482 preprocess_constraints (insn);
484 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
486 if (which_alternative < 0)
488 malformed_asm = 1;
489 /* Avoid further trouble with this insn. */
490 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
491 return 0;
493 const operand_alternative *op_alt = which_op_alt ();
495 /* Strip SUBREGs here to make the following code simpler. */
496 for (i = 0; i < recog_data.n_operands; i++)
497 if (GET_CODE (recog_data.operand[i]) == SUBREG
498 && REG_P (SUBREG_REG (recog_data.operand[i])))
499 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
501 /* Set up CLOBBER_REG. */
503 n_clobbers = 0;
505 if (GET_CODE (body) == PARALLEL)
507 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
509 for (i = 0; i < XVECLEN (body, 0); i++)
510 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
512 rtx clobber = XVECEXP (body, 0, i);
513 rtx reg = XEXP (clobber, 0);
515 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
516 reg = SUBREG_REG (reg);
518 if (STACK_REG_P (reg))
520 clobber_reg[n_clobbers] = reg;
521 n_clobbers++;
526 /* Enforce rule #4: Output operands must specifically indicate which
527 reg an output appears in after an asm. "=f" is not allowed: the
528 operand constraints must select a class with a single reg.
530 Also enforce rule #5: Output operands must start at the top of
531 the reg-stack: output operands may not "skip" a reg. */
533 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
534 for (i = 0; i < n_outputs; i++)
535 if (STACK_REG_P (recog_data.operand[i]))
537 if (reg_class_size[(int) op_alt[i].cl] != 1)
539 error_for_asm (insn, "output constraint %d must specify a single register", i);
540 malformed_asm = 1;
542 else
544 int j;
546 for (j = 0; j < n_clobbers; j++)
547 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
549 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
550 i, reg_names [REGNO (clobber_reg[j])]);
551 malformed_asm = 1;
552 break;
554 if (j == n_clobbers)
555 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
560 /* Search for first non-popped reg. */
561 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
562 if (! reg_used_as_output[i])
563 break;
565 /* If there are any other popped regs, that's an error. */
566 for (; i < LAST_STACK_REG + 1; i++)
567 if (reg_used_as_output[i])
568 break;
570 if (i != LAST_STACK_REG + 1)
572 error_for_asm (insn, "output regs must be grouped at top of stack");
573 malformed_asm = 1;
576 /* Enforce rule #2: All implicitly popped input regs must be closer
577 to the top of the reg-stack than any input that is not implicitly
578 popped. */
580 memset (implicitly_dies, 0, sizeof (implicitly_dies));
581 for (i = n_outputs; i < n_outputs + n_inputs; i++)
582 if (STACK_REG_P (recog_data.operand[i]))
584 /* An input reg is implicitly popped if it is tied to an
585 output, or if there is a CLOBBER for it. */
586 int j;
588 for (j = 0; j < n_clobbers; j++)
589 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
590 break;
592 if (j < n_clobbers || op_alt[i].matches >= 0)
593 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
596 /* Search for first non-popped reg. */
597 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
598 if (! implicitly_dies[i])
599 break;
601 /* If there are any other popped regs, that's an error. */
602 for (; i < LAST_STACK_REG + 1; i++)
603 if (implicitly_dies[i])
604 break;
606 if (i != LAST_STACK_REG + 1)
608 error_for_asm (insn,
609 "implicitly popped regs must be grouped at top of stack");
610 malformed_asm = 1;
613 /* Enforce rule #3: If any input operand uses the "f" constraint, all
614 output constraints must use the "&" earlyclobber.
616 ??? Detect this more deterministically by having constrain_asm_operands
617 record any earlyclobber. */
619 for (i = n_outputs; i < n_outputs + n_inputs; i++)
620 if (op_alt[i].matches == -1)
622 int j;
624 for (j = 0; j < n_outputs; j++)
625 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
627 error_for_asm (insn,
628 "output operand %d must use %<&%> constraint", j);
629 malformed_asm = 1;
633 if (malformed_asm)
635 /* Avoid further trouble with this insn. */
636 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
637 any_malformed_asm = true;
638 return 0;
641 return 1;
644 /* Calculate the number of inputs and outputs in BODY, an
645 asm_operands. N_OPERANDS is the total number of operands, and
646 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
647 placed. */
649 static void
650 get_asm_operands_in_out (rtx body, int *pout, int *pin)
652 rtx asmop = extract_asm_operands (body);
654 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
655 *pout = (recog_data.n_operands
656 - ASM_OPERANDS_INPUT_LENGTH (asmop)
657 - ASM_OPERANDS_LABEL_LENGTH (asmop));
660 /* If current function returns its result in an fp stack register,
661 return the REG. Otherwise, return 0. */
663 static rtx
664 stack_result (tree decl)
666 rtx result;
668 /* If the value is supposed to be returned in memory, then clearly
669 it is not returned in a stack register. */
670 if (aggregate_value_p (DECL_RESULT (decl), decl))
671 return 0;
673 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
674 if (result != 0)
675 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
676 decl, true);
678 return result != 0 && STACK_REG_P (result) ? result : 0;
683 * This section deals with stack register substitution, and forms the second
684 * pass over the RTL.
687 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
688 the desired hard REGNO. */
690 static void
691 replace_reg (rtx *reg, int regno)
693 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
694 gcc_assert (STACK_REG_P (*reg));
696 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
697 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
699 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
702 /* Remove a note of type NOTE, which must be found, for register
703 number REGNO from INSN. Remove only one such note. */
705 static void
706 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
708 rtx *note_link, this_rtx;
710 note_link = &REG_NOTES (insn);
711 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
712 if (REG_NOTE_KIND (this_rtx) == note
713 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
715 *note_link = XEXP (this_rtx, 1);
716 return;
718 else
719 note_link = &XEXP (this_rtx, 1);
721 gcc_unreachable ();
724 /* Find the hard register number of virtual register REG in REGSTACK.
725 The hard register number is relative to the top of the stack. -1 is
726 returned if the register is not found. */
728 static int
729 get_hard_regnum (stack_ptr regstack, rtx reg)
731 int i;
733 gcc_assert (STACK_REG_P (reg));
735 for (i = regstack->top; i >= 0; i--)
736 if (regstack->reg[i] == REGNO (reg))
737 break;
739 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
742 /* Emit an insn to pop virtual register REG before or after INSN.
743 REGSTACK is the stack state after INSN and is updated to reflect this
744 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
745 is represented as a SET whose destination is the register to be popped
746 and source is the top of stack. A death note for the top of stack
747 cases the movdf pattern to pop. */
749 static rtx_insn *
750 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
752 rtx_insn *pop_insn;
753 rtx pop_rtx;
754 int hard_regno;
756 /* For complex types take care to pop both halves. These may survive in
757 CLOBBER and USE expressions. */
758 if (COMPLEX_MODE_P (GET_MODE (reg)))
760 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
761 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
763 pop_insn = NULL;
764 if (get_hard_regnum (regstack, reg1) >= 0)
765 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
766 if (get_hard_regnum (regstack, reg2) >= 0)
767 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
768 gcc_assert (pop_insn);
769 return pop_insn;
772 hard_regno = get_hard_regnum (regstack, reg);
774 gcc_assert (hard_regno >= FIRST_STACK_REG);
776 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode),
777 FP_MODE_REG (FIRST_STACK_REG, DFmode));
779 if (where == EMIT_AFTER)
780 pop_insn = emit_insn_after (pop_rtx, insn);
781 else
782 pop_insn = emit_insn_before (pop_rtx, insn);
784 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
786 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
787 = regstack->reg[regstack->top];
788 regstack->top -= 1;
789 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
791 return pop_insn;
794 /* Emit an insn before or after INSN to swap virtual register REG with
795 the top of stack. REGSTACK is the stack state before the swap, and
796 is updated to reflect the swap. A swap insn is represented as a
797 PARALLEL of two patterns: each pattern moves one reg to the other.
799 If REG is already at the top of the stack, no insn is emitted. */
801 static void
802 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
804 int hard_regno;
805 rtx swap_rtx;
806 int other_reg; /* swap regno temps */
807 rtx_insn *i1; /* the stack-reg insn prior to INSN */
808 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
810 hard_regno = get_hard_regnum (regstack, reg);
812 if (hard_regno == FIRST_STACK_REG)
813 return;
814 if (hard_regno == -1)
816 /* Something failed if the register wasn't on the stack. If we had
817 malformed asms, we zapped the instruction itself, but that didn't
818 produce the same pattern of register sets as before. To prevent
819 further failure, adjust REGSTACK to include REG at TOP. */
820 gcc_assert (any_malformed_asm);
821 regstack->reg[++regstack->top] = REGNO (reg);
822 return;
824 gcc_assert (hard_regno >= FIRST_STACK_REG);
826 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
827 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]);
829 /* Find the previous insn involving stack regs, but don't pass a
830 block boundary. */
831 i1 = NULL;
832 if (current_block && insn != BB_HEAD (current_block))
834 rtx_insn *tmp = PREV_INSN (insn);
835 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
836 while (tmp != limit)
838 if (LABEL_P (tmp)
839 || CALL_P (tmp)
840 || NOTE_INSN_BASIC_BLOCK_P (tmp)
841 || (NONJUMP_INSN_P (tmp)
842 && stack_regs_mentioned (tmp)))
844 i1 = tmp;
845 break;
847 tmp = PREV_INSN (tmp);
851 if (i1 != NULL_RTX
852 && (i1set = single_set (i1)) != NULL_RTX)
854 rtx i1src = *get_true_reg (&SET_SRC (i1set));
855 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
857 /* If the previous register stack push was from the reg we are to
858 swap with, omit the swap. */
860 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
861 && REG_P (i1src)
862 && REGNO (i1src) == (unsigned) hard_regno - 1
863 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
864 return;
866 /* If the previous insn wrote to the reg we are to swap with,
867 omit the swap. */
869 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
870 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
871 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
872 return;
875 /* Avoid emitting the swap if this is the first register stack insn
876 of the current_block. Instead update the current_block's stack_in
877 and let compensate edges take care of this for us. */
878 if (current_block && starting_stack_p)
880 BLOCK_INFO (current_block)->stack_in = *regstack;
881 starting_stack_p = false;
882 return;
885 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
886 FP_MODE_REG (FIRST_STACK_REG, XFmode));
888 if (i1)
889 emit_insn_after (swap_rtx, i1);
890 else if (current_block)
891 emit_insn_before (swap_rtx, BB_HEAD (current_block));
892 else
893 emit_insn_before (swap_rtx, insn);
896 /* Emit an insns before INSN to swap virtual register SRC1 with
897 the top of stack and virtual register SRC2 with second stack
898 slot. REGSTACK is the stack state before the swaps, and
899 is updated to reflect the swaps. A swap insn is represented as a
900 PARALLEL of two patterns: each pattern moves one reg to the other.
902 If SRC1 and/or SRC2 are already at the right place, no swap insn
903 is emitted. */
905 static void
906 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
908 struct stack_def temp_stack;
909 int regno, j, k;
911 temp_stack = *regstack;
913 /* Place operand 1 at the top of stack. */
914 regno = get_hard_regnum (&temp_stack, src1);
915 gcc_assert (regno >= 0);
916 if (regno != FIRST_STACK_REG)
918 k = temp_stack.top - (regno - FIRST_STACK_REG);
919 j = temp_stack.top;
921 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
924 /* Place operand 2 next on the stack. */
925 regno = get_hard_regnum (&temp_stack, src2);
926 gcc_assert (regno >= 0);
927 if (regno != FIRST_STACK_REG + 1)
929 k = temp_stack.top - (regno - FIRST_STACK_REG);
930 j = temp_stack.top - 1;
932 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
935 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
938 /* Handle a move to or from a stack register in PAT, which is in INSN.
939 REGSTACK is the current stack. Return whether a control flow insn
940 was deleted in the process. */
942 static bool
943 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
945 rtx *psrc = get_true_reg (&SET_SRC (pat));
946 rtx *pdest = get_true_reg (&SET_DEST (pat));
947 rtx src, dest;
948 rtx note;
949 bool control_flow_insn_deleted = false;
951 src = *psrc; dest = *pdest;
953 if (STACK_REG_P (src) && STACK_REG_P (dest))
955 /* Write from one stack reg to another. If SRC dies here, then
956 just change the register mapping and delete the insn. */
958 note = find_regno_note (insn, REG_DEAD, REGNO (src));
959 if (note)
961 int i;
963 /* If this is a no-op move, there must not be a REG_DEAD note. */
964 gcc_assert (REGNO (src) != REGNO (dest));
966 for (i = regstack->top; i >= 0; i--)
967 if (regstack->reg[i] == REGNO (src))
968 break;
970 /* The destination must be dead, or life analysis is borked. */
971 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
973 /* If the source is not live, this is yet another case of
974 uninitialized variables. Load up a NaN instead. */
975 if (i < 0)
976 return move_nan_for_stack_reg (insn, regstack, dest);
978 /* It is possible that the dest is unused after this insn.
979 If so, just pop the src. */
981 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
982 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
983 else
985 regstack->reg[i] = REGNO (dest);
986 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
987 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
990 control_flow_insn_deleted |= control_flow_insn_p (insn);
991 delete_insn (insn);
992 return control_flow_insn_deleted;
995 /* The source reg does not die. */
997 /* If this appears to be a no-op move, delete it, or else it
998 will confuse the machine description output patterns. But if
999 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1000 for REG_UNUSED will not work for deleted insns. */
1002 if (REGNO (src) == REGNO (dest))
1004 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1005 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1007 control_flow_insn_deleted |= control_flow_insn_p (insn);
1008 delete_insn (insn);
1009 return control_flow_insn_deleted;
1012 /* The destination ought to be dead. */
1013 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1015 replace_reg (psrc, get_hard_regnum (regstack, src));
1017 regstack->reg[++regstack->top] = REGNO (dest);
1018 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1019 replace_reg (pdest, FIRST_STACK_REG);
1021 else if (STACK_REG_P (src))
1023 /* Save from a stack reg to MEM, or possibly integer reg. Since
1024 only top of stack may be saved, emit an exchange first if
1025 needs be. */
1027 emit_swap_insn (insn, regstack, src);
1029 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1030 if (note)
1032 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1033 regstack->top--;
1034 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1036 else if ((GET_MODE (src) == XFmode)
1037 && regstack->top < REG_STACK_SIZE - 1)
1039 /* A 387 cannot write an XFmode value to a MEM without
1040 clobbering the source reg. The output code can handle
1041 this by reading back the value from the MEM.
1042 But it is more efficient to use a temp register if one is
1043 available. Push the source value here if the register
1044 stack is not full, and then write the value to memory via
1045 a pop. */
1046 rtx push_rtx;
1047 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1049 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1050 emit_insn_before (push_rtx, insn);
1051 add_reg_note (insn, REG_DEAD, top_stack_reg);
1054 replace_reg (psrc, FIRST_STACK_REG);
1056 else
1058 rtx pat = PATTERN (insn);
1060 gcc_assert (STACK_REG_P (dest));
1062 /* Load from MEM, or possibly integer REG or constant, into the
1063 stack regs. The actual target is always the top of the
1064 stack. The stack mapping is changed to reflect that DEST is
1065 now at top of stack. */
1067 /* The destination ought to be dead. However, there is a
1068 special case with i387 UNSPEC_TAN, where destination is live
1069 (an argument to fptan) but inherent load of 1.0 is modelled
1070 as a load from a constant. */
1071 if (GET_CODE (pat) == PARALLEL
1072 && XVECLEN (pat, 0) == 2
1073 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1074 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1075 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1076 emit_swap_insn (insn, regstack, dest);
1077 else
1078 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1080 gcc_assert (regstack->top < REG_STACK_SIZE);
1082 regstack->reg[++regstack->top] = REGNO (dest);
1083 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1084 replace_reg (pdest, FIRST_STACK_REG);
1087 return control_flow_insn_deleted;
1090 /* A helper function which replaces INSN with a pattern that loads up
1091 a NaN into DEST, then invokes move_for_stack_reg. */
1093 static bool
1094 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
1096 rtx pat;
1098 dest = FP_MODE_REG (REGNO (dest), SFmode);
1099 pat = gen_rtx_SET (dest, not_a_num);
1100 PATTERN (insn) = pat;
1101 INSN_CODE (insn) = -1;
1103 return move_for_stack_reg (insn, regstack, pat);
1106 /* Swap the condition on a branch, if there is one. Return true if we
1107 found a condition to swap. False if the condition was not used as
1108 such. */
1110 static int
1111 swap_rtx_condition_1 (rtx pat)
1113 const char *fmt;
1114 int i, r = 0;
1116 if (COMPARISON_P (pat))
1118 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1119 r = 1;
1121 else
1123 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1124 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1126 if (fmt[i] == 'E')
1128 int j;
1130 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1131 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1133 else if (fmt[i] == 'e')
1134 r |= swap_rtx_condition_1 (XEXP (pat, i));
1138 return r;
1141 static int
1142 swap_rtx_condition (rtx_insn *insn)
1144 rtx pat = PATTERN (insn);
1146 /* We're looking for a single set to cc0 or an HImode temporary. */
1148 if (GET_CODE (pat) == SET
1149 && REG_P (SET_DEST (pat))
1150 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1152 insn = next_flags_user (insn);
1153 if (insn == NULL_RTX)
1154 return 0;
1155 pat = PATTERN (insn);
1158 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1159 with the cc value right now. We may be able to search for one
1160 though. */
1162 if (GET_CODE (pat) == SET
1163 && GET_CODE (SET_SRC (pat)) == UNSPEC
1164 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1166 rtx dest = SET_DEST (pat);
1168 /* Search forward looking for the first use of this value.
1169 Stop at block boundaries. */
1170 while (insn != BB_END (current_block))
1172 insn = NEXT_INSN (insn);
1173 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1174 break;
1175 if (CALL_P (insn))
1176 return 0;
1179 /* We haven't found it. */
1180 if (insn == BB_END (current_block))
1181 return 0;
1183 /* So we've found the insn using this value. If it is anything
1184 other than sahf or the value does not die (meaning we'd have
1185 to search further), then we must give up. */
1186 pat = PATTERN (insn);
1187 if (GET_CODE (pat) != SET
1188 || GET_CODE (SET_SRC (pat)) != UNSPEC
1189 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1190 || ! dead_or_set_p (insn, dest))
1191 return 0;
1193 /* Now we are prepared to handle this as a normal cc0 setter. */
1194 insn = next_flags_user (insn);
1195 if (insn == NULL_RTX)
1196 return 0;
1197 pat = PATTERN (insn);
1200 if (swap_rtx_condition_1 (pat))
1202 int fail = 0;
1203 INSN_CODE (insn) = -1;
1204 if (recog_memoized (insn) == -1)
1205 fail = 1;
1206 /* In case the flags don't die here, recurse to try fix
1207 following user too. */
1208 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1210 insn = next_flags_user (insn);
1211 if (!insn || !swap_rtx_condition (insn))
1212 fail = 1;
1214 if (fail)
1216 swap_rtx_condition_1 (pat);
1217 return 0;
1219 return 1;
1221 return 0;
1224 /* Handle a comparison. Special care needs to be taken to avoid
1225 causing comparisons that a 387 cannot do correctly, such as EQ.
1227 Also, a pop insn may need to be emitted. The 387 does have an
1228 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1229 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1230 set up. */
1232 static void
1233 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src)
1235 rtx *src1, *src2;
1236 rtx src1_note, src2_note;
1238 src1 = get_true_reg (&XEXP (pat_src, 0));
1239 src2 = get_true_reg (&XEXP (pat_src, 1));
1241 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1242 registers that die in this insn - move those to stack top first. */
1243 if ((! STACK_REG_P (*src1)
1244 || (STACK_REG_P (*src2)
1245 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1246 && swap_rtx_condition (insn))
1248 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1));
1250 src1 = get_true_reg (&XEXP (pat_src, 0));
1251 src2 = get_true_reg (&XEXP (pat_src, 1));
1253 INSN_CODE (insn) = -1;
1256 /* We will fix any death note later. */
1258 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1260 if (STACK_REG_P (*src2))
1261 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1262 else
1263 src2_note = NULL_RTX;
1265 emit_swap_insn (insn, regstack, *src1);
1267 replace_reg (src1, FIRST_STACK_REG);
1269 if (STACK_REG_P (*src2))
1270 replace_reg (src2, get_hard_regnum (regstack, *src2));
1272 if (src1_note)
1274 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1275 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1278 /* If the second operand dies, handle that. But if the operands are
1279 the same stack register, don't bother, because only one death is
1280 needed, and it was just handled. */
1282 if (src2_note
1283 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1284 && REGNO (*src1) == REGNO (*src2)))
1286 /* As a special case, two regs may die in this insn if src2 is
1287 next to top of stack and the top of stack also dies. Since
1288 we have already popped src1, "next to top of stack" is really
1289 at top (FIRST_STACK_REG) now. */
1291 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1292 && src1_note)
1294 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1295 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1297 else
1299 /* The 386 can only represent death of the first operand in
1300 the case handled above. In all other cases, emit a separate
1301 pop and remove the death note from here. */
1302 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1303 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1304 EMIT_AFTER);
1309 /* Substitute hardware stack regs in debug insn INSN, using stack
1310 layout REGSTACK. If we can't find a hardware stack reg for any of
1311 the REGs in it, reset the debug insn. */
1313 static void
1314 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
1316 subrtx_ptr_iterator::array_type array;
1317 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST)
1319 rtx *loc = *iter;
1320 rtx x = *loc;
1321 if (STACK_REG_P (x))
1323 int hard_regno = get_hard_regnum (regstack, x);
1325 /* If we can't find an active register, reset this debug insn. */
1326 if (hard_regno == -1)
1328 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1329 return;
1332 gcc_assert (hard_regno >= FIRST_STACK_REG);
1333 replace_reg (loc, hard_regno);
1334 iter.skip_subrtxes ();
1339 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1340 is the current register layout. Return whether a control flow insn
1341 was deleted in the process. */
1343 static bool
1344 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
1346 rtx *dest, *src;
1347 bool control_flow_insn_deleted = false;
1349 switch (GET_CODE (pat))
1351 case USE:
1352 /* Deaths in USE insns can happen in non optimizing compilation.
1353 Handle them by popping the dying register. */
1354 src = get_true_reg (&XEXP (pat, 0));
1355 if (STACK_REG_P (*src)
1356 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1358 /* USEs are ignored for liveness information so USEs of dead
1359 register might happen. */
1360 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1361 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1362 return control_flow_insn_deleted;
1364 /* Uninitialized USE might happen for functions returning uninitialized
1365 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1366 so it is safe to ignore the use here. This is consistent with behavior
1367 of dataflow analyzer that ignores USE too. (This also imply that
1368 forcibly initializing the register to NaN here would lead to ICE later,
1369 since the REG_DEAD notes are not issued.) */
1370 break;
1372 case VAR_LOCATION:
1373 gcc_unreachable ();
1375 case CLOBBER:
1377 rtx note;
1379 dest = get_true_reg (&XEXP (pat, 0));
1380 if (STACK_REG_P (*dest))
1382 note = find_reg_note (insn, REG_DEAD, *dest);
1384 if (pat != PATTERN (insn))
1386 /* The fix_truncdi_1 pattern wants to be able to
1387 allocate its own scratch register. It does this by
1388 clobbering an fp reg so that it is assured of an
1389 empty reg-stack register. If the register is live,
1390 kill it now. Remove the DEAD/UNUSED note so we
1391 don't try to kill it later too.
1393 In reality the UNUSED note can be absent in some
1394 complicated cases when the register is reused for
1395 partially set variable. */
1397 if (note)
1398 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1399 else
1400 note = find_reg_note (insn, REG_UNUSED, *dest);
1401 if (note)
1402 remove_note (insn, note);
1403 replace_reg (dest, FIRST_STACK_REG + 1);
1405 else
1407 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1408 indicates an uninitialized value. Because reload removed
1409 all other clobbers, this must be due to a function
1410 returning without a value. Load up a NaN. */
1412 if (!note)
1414 rtx t = *dest;
1415 if (COMPLEX_MODE_P (GET_MODE (t)))
1417 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1418 if (get_hard_regnum (regstack, u) == -1)
1420 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1421 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1422 control_flow_insn_deleted
1423 |= move_nan_for_stack_reg (insn2, regstack, u);
1426 if (get_hard_regnum (regstack, t) == -1)
1427 control_flow_insn_deleted
1428 |= move_nan_for_stack_reg (insn, regstack, t);
1432 break;
1435 case SET:
1437 rtx *src1 = (rtx *) 0, *src2;
1438 rtx src1_note, src2_note;
1439 rtx pat_src;
1441 dest = get_true_reg (&SET_DEST (pat));
1442 src = get_true_reg (&SET_SRC (pat));
1443 pat_src = SET_SRC (pat);
1445 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1446 if (STACK_REG_P (*src)
1447 || (STACK_REG_P (*dest)
1448 && (REG_P (*src) || MEM_P (*src)
1449 || CONST_DOUBLE_P (*src))))
1451 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1452 break;
1455 switch (GET_CODE (pat_src))
1457 case COMPARE:
1458 compare_for_stack_reg (insn, regstack, pat_src);
1459 break;
1461 case CALL:
1463 int count;
1464 for (count = REG_NREGS (*dest); --count >= 0;)
1466 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1467 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1470 replace_reg (dest, FIRST_STACK_REG);
1471 break;
1473 case REG:
1474 /* This is a `tstM2' case. */
1475 gcc_assert (*dest == cc0_rtx);
1476 src1 = src;
1478 /* Fall through. */
1480 case FLOAT_TRUNCATE:
1481 case SQRT:
1482 case ABS:
1483 case NEG:
1484 /* These insns only operate on the top of the stack. DEST might
1485 be cc0_rtx if we're processing a tstM pattern. Also, it's
1486 possible that the tstM case results in a REG_DEAD note on the
1487 source. */
1489 if (src1 == 0)
1490 src1 = get_true_reg (&XEXP (pat_src, 0));
1492 emit_swap_insn (insn, regstack, *src1);
1494 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1496 if (STACK_REG_P (*dest))
1497 replace_reg (dest, FIRST_STACK_REG);
1499 if (src1_note)
1501 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1502 regstack->top--;
1503 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1506 replace_reg (src1, FIRST_STACK_REG);
1507 break;
1509 case MINUS:
1510 case DIV:
1511 /* On i386, reversed forms of subM3 and divM3 exist for
1512 MODE_FLOAT, so the same code that works for addM3 and mulM3
1513 can be used. */
1514 case MULT:
1515 case PLUS:
1516 /* These insns can accept the top of stack as a destination
1517 from a stack reg or mem, or can use the top of stack as a
1518 source and some other stack register (possibly top of stack)
1519 as a destination. */
1521 src1 = get_true_reg (&XEXP (pat_src, 0));
1522 src2 = get_true_reg (&XEXP (pat_src, 1));
1524 /* We will fix any death note later. */
1526 if (STACK_REG_P (*src1))
1527 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1528 else
1529 src1_note = NULL_RTX;
1530 if (STACK_REG_P (*src2))
1531 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1532 else
1533 src2_note = NULL_RTX;
1535 /* If either operand is not a stack register, then the dest
1536 must be top of stack. */
1538 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1539 emit_swap_insn (insn, regstack, *dest);
1540 else
1542 /* Both operands are REG. If neither operand is already
1543 at the top of stack, choose to make the one that is the
1544 dest the new top of stack. */
1546 int src1_hard_regnum, src2_hard_regnum;
1548 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1549 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1551 /* If the source is not live, this is yet another case of
1552 uninitialized variables. Load up a NaN instead. */
1553 if (src1_hard_regnum == -1)
1555 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1556 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1557 control_flow_insn_deleted
1558 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1560 if (src2_hard_regnum == -1)
1562 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1563 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1564 control_flow_insn_deleted
1565 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1568 if (src1_hard_regnum != FIRST_STACK_REG
1569 && src2_hard_regnum != FIRST_STACK_REG)
1570 emit_swap_insn (insn, regstack, *dest);
1573 if (STACK_REG_P (*src1))
1574 replace_reg (src1, get_hard_regnum (regstack, *src1));
1575 if (STACK_REG_P (*src2))
1576 replace_reg (src2, get_hard_regnum (regstack, *src2));
1578 if (src1_note)
1580 rtx src1_reg = XEXP (src1_note, 0);
1582 /* If the register that dies is at the top of stack, then
1583 the destination is somewhere else - merely substitute it.
1584 But if the reg that dies is not at top of stack, then
1585 move the top of stack to the dead reg, as though we had
1586 done the insn and then a store-with-pop. */
1588 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1590 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1591 replace_reg (dest, get_hard_regnum (regstack, *dest));
1593 else
1595 int regno = get_hard_regnum (regstack, src1_reg);
1597 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1598 replace_reg (dest, regno);
1600 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1601 = regstack->reg[regstack->top];
1604 CLEAR_HARD_REG_BIT (regstack->reg_set,
1605 REGNO (XEXP (src1_note, 0)));
1606 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1607 regstack->top--;
1609 else if (src2_note)
1611 rtx src2_reg = XEXP (src2_note, 0);
1612 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1614 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1615 replace_reg (dest, get_hard_regnum (regstack, *dest));
1617 else
1619 int regno = get_hard_regnum (regstack, src2_reg);
1621 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1622 replace_reg (dest, regno);
1624 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1625 = regstack->reg[regstack->top];
1628 CLEAR_HARD_REG_BIT (regstack->reg_set,
1629 REGNO (XEXP (src2_note, 0)));
1630 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1631 regstack->top--;
1633 else
1635 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1636 replace_reg (dest, get_hard_regnum (regstack, *dest));
1639 /* Keep operand 1 matching with destination. */
1640 if (COMMUTATIVE_ARITH_P (pat_src)
1641 && REG_P (*src1) && REG_P (*src2)
1642 && REGNO (*src1) != REGNO (*dest))
1644 int tmp = REGNO (*src1);
1645 replace_reg (src1, REGNO (*src2));
1646 replace_reg (src2, tmp);
1648 break;
1650 case UNSPEC:
1651 switch (XINT (pat_src, 1))
1653 case UNSPEC_FIST:
1654 case UNSPEC_FIST_ATOMIC:
1656 case UNSPEC_FIST_FLOOR:
1657 case UNSPEC_FIST_CEIL:
1659 /* These insns only operate on the top of the stack. */
1661 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1662 emit_swap_insn (insn, regstack, *src1);
1664 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1666 if (STACK_REG_P (*dest))
1667 replace_reg (dest, FIRST_STACK_REG);
1669 if (src1_note)
1671 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1672 regstack->top--;
1673 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1676 replace_reg (src1, FIRST_STACK_REG);
1677 break;
1679 case UNSPEC_FXAM:
1681 /* This insn only operate on the top of the stack. */
1683 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1684 emit_swap_insn (insn, regstack, *src1);
1686 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1688 replace_reg (src1, FIRST_STACK_REG);
1690 if (src1_note)
1692 remove_regno_note (insn, REG_DEAD,
1693 REGNO (XEXP (src1_note, 0)));
1694 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1695 EMIT_AFTER);
1698 break;
1700 case UNSPEC_SIN:
1701 case UNSPEC_COS:
1702 case UNSPEC_FRNDINT:
1703 case UNSPEC_F2XM1:
1705 case UNSPEC_FRNDINT_FLOOR:
1706 case UNSPEC_FRNDINT_CEIL:
1707 case UNSPEC_FRNDINT_TRUNC:
1708 case UNSPEC_FRNDINT_MASK_PM:
1710 /* Above insns operate on the top of the stack. */
1712 case UNSPEC_SINCOS_COS:
1713 case UNSPEC_XTRACT_FRACT:
1715 /* Above insns operate on the top two stack slots,
1716 first part of one input, double output insn. */
1718 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1720 emit_swap_insn (insn, regstack, *src1);
1722 /* Input should never die, it is replaced with output. */
1723 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1724 gcc_assert (!src1_note);
1726 if (STACK_REG_P (*dest))
1727 replace_reg (dest, FIRST_STACK_REG);
1729 replace_reg (src1, FIRST_STACK_REG);
1730 break;
1732 case UNSPEC_SINCOS_SIN:
1733 case UNSPEC_XTRACT_EXP:
1735 /* These insns operate on the top two stack slots,
1736 second part of one input, double output insn. */
1738 regstack->top++;
1739 /* FALLTHRU */
1741 case UNSPEC_TAN:
1743 /* For UNSPEC_TAN, regstack->top is already increased
1744 by inherent load of constant 1.0. */
1746 /* Output value is generated in the second stack slot.
1747 Move current value from second slot to the top. */
1748 regstack->reg[regstack->top]
1749 = regstack->reg[regstack->top - 1];
1751 gcc_assert (STACK_REG_P (*dest));
1753 regstack->reg[regstack->top - 1] = REGNO (*dest);
1754 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1755 replace_reg (dest, FIRST_STACK_REG + 1);
1757 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1759 replace_reg (src1, FIRST_STACK_REG);
1760 break;
1762 case UNSPEC_FPATAN:
1763 case UNSPEC_FYL2X:
1764 case UNSPEC_FYL2XP1:
1765 /* These insns operate on the top two stack slots. */
1767 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1768 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1770 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1771 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1773 swap_to_top (insn, regstack, *src1, *src2);
1775 replace_reg (src1, FIRST_STACK_REG);
1776 replace_reg (src2, FIRST_STACK_REG + 1);
1778 if (src1_note)
1779 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1780 if (src2_note)
1781 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1783 /* Pop both input operands from the stack. */
1784 CLEAR_HARD_REG_BIT (regstack->reg_set,
1785 regstack->reg[regstack->top]);
1786 CLEAR_HARD_REG_BIT (regstack->reg_set,
1787 regstack->reg[regstack->top - 1]);
1788 regstack->top -= 2;
1790 /* Push the result back onto the stack. */
1791 regstack->reg[++regstack->top] = REGNO (*dest);
1792 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1793 replace_reg (dest, FIRST_STACK_REG);
1794 break;
1796 case UNSPEC_FSCALE_FRACT:
1797 case UNSPEC_FPREM_F:
1798 case UNSPEC_FPREM1_F:
1799 /* These insns operate on the top two stack slots,
1800 first part of double input, double output insn. */
1802 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1803 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1805 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1806 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1808 /* Inputs should never die, they are
1809 replaced with outputs. */
1810 gcc_assert (!src1_note);
1811 gcc_assert (!src2_note);
1813 swap_to_top (insn, regstack, *src1, *src2);
1815 /* Push the result back onto stack. Empty stack slot
1816 will be filled in second part of insn. */
1817 if (STACK_REG_P (*dest))
1819 regstack->reg[regstack->top] = REGNO (*dest);
1820 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1821 replace_reg (dest, FIRST_STACK_REG);
1824 replace_reg (src1, FIRST_STACK_REG);
1825 replace_reg (src2, FIRST_STACK_REG + 1);
1826 break;
1828 case UNSPEC_FSCALE_EXP:
1829 case UNSPEC_FPREM_U:
1830 case UNSPEC_FPREM1_U:
1831 /* These insns operate on the top two stack slots,
1832 second part of double input, double output insn. */
1834 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1835 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1837 /* Push the result back onto stack. Fill empty slot from
1838 first part of insn and fix top of stack pointer. */
1839 if (STACK_REG_P (*dest))
1841 regstack->reg[regstack->top - 1] = REGNO (*dest);
1842 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1843 replace_reg (dest, FIRST_STACK_REG + 1);
1846 replace_reg (src1, FIRST_STACK_REG);
1847 replace_reg (src2, FIRST_STACK_REG + 1);
1848 break;
1850 case UNSPEC_C2_FLAG:
1851 /* This insn operates on the top two stack slots,
1852 third part of C2 setting double input insn. */
1854 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1855 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1857 replace_reg (src1, FIRST_STACK_REG);
1858 replace_reg (src2, FIRST_STACK_REG + 1);
1859 break;
1861 case UNSPEC_SAHF:
1862 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1863 The combination matches the PPRO fcomi instruction. */
1865 pat_src = XVECEXP (pat_src, 0, 0);
1866 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1867 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1868 /* Fall through. */
1870 case UNSPEC_FNSTSW:
1871 /* Combined fcomp+fnstsw generated for doing well with
1872 CSE. When optimizing this would have been broken
1873 up before now. */
1875 pat_src = XVECEXP (pat_src, 0, 0);
1876 gcc_assert (GET_CODE (pat_src) == COMPARE);
1878 compare_for_stack_reg (insn, regstack, pat_src);
1879 break;
1881 default:
1882 gcc_unreachable ();
1884 break;
1886 case IF_THEN_ELSE:
1887 /* This insn requires the top of stack to be the destination. */
1889 src1 = get_true_reg (&XEXP (pat_src, 1));
1890 src2 = get_true_reg (&XEXP (pat_src, 2));
1892 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1893 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1895 /* If the comparison operator is an FP comparison operator,
1896 it is handled correctly by compare_for_stack_reg () who
1897 will move the destination to the top of stack. But if the
1898 comparison operator is not an FP comparison operator, we
1899 have to handle it here. */
1900 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1901 && REGNO (*dest) != regstack->reg[regstack->top])
1903 /* In case one of operands is the top of stack and the operands
1904 dies, it is safe to make it the destination operand by
1905 reversing the direction of cmove and avoid fxch. */
1906 if ((REGNO (*src1) == regstack->reg[regstack->top]
1907 && src1_note)
1908 || (REGNO (*src2) == regstack->reg[regstack->top]
1909 && src2_note))
1911 int idx1 = (get_hard_regnum (regstack, *src1)
1912 - FIRST_STACK_REG);
1913 int idx2 = (get_hard_regnum (regstack, *src2)
1914 - FIRST_STACK_REG);
1916 /* Make reg-stack believe that the operands are already
1917 swapped on the stack */
1918 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1919 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1921 /* Reverse condition to compensate the operand swap.
1922 i386 do have comparison always reversible. */
1923 PUT_CODE (XEXP (pat_src, 0),
1924 reversed_comparison_code (XEXP (pat_src, 0), insn));
1926 else
1927 emit_swap_insn (insn, regstack, *dest);
1931 rtx src_note [3];
1932 int i;
1934 src_note[0] = 0;
1935 src_note[1] = src1_note;
1936 src_note[2] = src2_note;
1938 if (STACK_REG_P (*src1))
1939 replace_reg (src1, get_hard_regnum (regstack, *src1));
1940 if (STACK_REG_P (*src2))
1941 replace_reg (src2, get_hard_regnum (regstack, *src2));
1943 for (i = 1; i <= 2; i++)
1944 if (src_note [i])
1946 int regno = REGNO (XEXP (src_note[i], 0));
1948 /* If the register that dies is not at the top of
1949 stack, then move the top of stack to the dead reg.
1950 Top of stack should never die, as it is the
1951 destination. */
1952 gcc_assert (regno != regstack->reg[regstack->top]);
1953 remove_regno_note (insn, REG_DEAD, regno);
1954 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1955 EMIT_AFTER);
1959 /* Make dest the top of stack. Add dest to regstack if
1960 not present. */
1961 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1962 regstack->reg[++regstack->top] = REGNO (*dest);
1963 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1964 replace_reg (dest, FIRST_STACK_REG);
1965 break;
1967 default:
1968 gcc_unreachable ();
1970 break;
1973 default:
1974 break;
1977 return control_flow_insn_deleted;
1980 /* Substitute hard regnums for any stack regs in INSN, which has
1981 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1982 before the insn, and is updated with changes made here.
1984 There are several requirements and assumptions about the use of
1985 stack-like regs in asm statements. These rules are enforced by
1986 record_asm_stack_regs; see comments there for details. Any
1987 asm_operands left in the RTL at this point may be assume to meet the
1988 requirements, since record_asm_stack_regs removes any problem asm. */
1990 static void
1991 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
1993 rtx body = PATTERN (insn);
1995 rtx *note_reg; /* Array of note contents */
1996 rtx **note_loc; /* Address of REG field of each note */
1997 enum reg_note *note_kind; /* The type of each note */
1999 rtx *clobber_reg = 0;
2000 rtx **clobber_loc = 0;
2002 struct stack_def temp_stack;
2003 int n_notes;
2004 int n_clobbers;
2005 rtx note;
2006 int i;
2007 int n_inputs, n_outputs;
2009 if (! check_asm_stack_operands (insn))
2010 return;
2012 /* Find out what the constraints required. If no constraint
2013 alternative matches, that is a compiler bug: we should have caught
2014 such an insn in check_asm_stack_operands. */
2015 extract_constrain_insn (insn);
2017 preprocess_constraints (insn);
2018 const operand_alternative *op_alt = which_op_alt ();
2020 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2022 /* Strip SUBREGs here to make the following code simpler. */
2023 for (i = 0; i < recog_data.n_operands; i++)
2024 if (GET_CODE (recog_data.operand[i]) == SUBREG
2025 && REG_P (SUBREG_REG (recog_data.operand[i])))
2027 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2028 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2031 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2033 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2034 i++;
2036 note_reg = XALLOCAVEC (rtx, i);
2037 note_loc = XALLOCAVEC (rtx *, i);
2038 note_kind = XALLOCAVEC (enum reg_note, i);
2040 n_notes = 0;
2041 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2043 if (GET_CODE (note) != EXPR_LIST)
2044 continue;
2045 rtx reg = XEXP (note, 0);
2046 rtx *loc = & XEXP (note, 0);
2048 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2050 loc = & SUBREG_REG (reg);
2051 reg = SUBREG_REG (reg);
2054 if (STACK_REG_P (reg)
2055 && (REG_NOTE_KIND (note) == REG_DEAD
2056 || REG_NOTE_KIND (note) == REG_UNUSED))
2058 note_reg[n_notes] = reg;
2059 note_loc[n_notes] = loc;
2060 note_kind[n_notes] = REG_NOTE_KIND (note);
2061 n_notes++;
2065 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2067 n_clobbers = 0;
2069 if (GET_CODE (body) == PARALLEL)
2071 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2072 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2074 for (i = 0; i < XVECLEN (body, 0); i++)
2075 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2077 rtx clobber = XVECEXP (body, 0, i);
2078 rtx reg = XEXP (clobber, 0);
2079 rtx *loc = & XEXP (clobber, 0);
2081 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2083 loc = & SUBREG_REG (reg);
2084 reg = SUBREG_REG (reg);
2087 if (STACK_REG_P (reg))
2089 clobber_reg[n_clobbers] = reg;
2090 clobber_loc[n_clobbers] = loc;
2091 n_clobbers++;
2096 temp_stack = *regstack;
2098 /* Put the input regs into the desired place in TEMP_STACK. */
2100 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2101 if (STACK_REG_P (recog_data.operand[i])
2102 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS)
2103 && op_alt[i].cl != FLOAT_REGS)
2105 /* If an operand needs to be in a particular reg in
2106 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2107 these constraints are for single register classes, and
2108 reload guaranteed that operand[i] is already in that class,
2109 we can just use REGNO (recog_data.operand[i]) to know which
2110 actual reg this operand needs to be in. */
2112 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2114 gcc_assert (regno >= 0);
2116 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2118 /* recog_data.operand[i] is not in the right place. Find
2119 it and swap it with whatever is already in I's place.
2120 K is where recog_data.operand[i] is now. J is where it
2121 should be. */
2122 int j, k;
2124 k = temp_stack.top - (regno - FIRST_STACK_REG);
2125 j = (temp_stack.top
2126 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2128 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
2132 /* Emit insns before INSN to make sure the reg-stack is in the right
2133 order. */
2135 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2137 /* Make the needed input register substitutions. Do death notes and
2138 clobbers too, because these are for inputs, not outputs. */
2140 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2141 if (STACK_REG_P (recog_data.operand[i]))
2143 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2145 gcc_assert (regnum >= 0);
2147 replace_reg (recog_data.operand_loc[i], regnum);
2150 for (i = 0; i < n_notes; i++)
2151 if (note_kind[i] == REG_DEAD)
2153 int regnum = get_hard_regnum (regstack, note_reg[i]);
2155 gcc_assert (regnum >= 0);
2157 replace_reg (note_loc[i], regnum);
2160 for (i = 0; i < n_clobbers; i++)
2162 /* It's OK for a CLOBBER to reference a reg that is not live.
2163 Don't try to replace it in that case. */
2164 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2166 if (regnum >= 0)
2168 /* Sigh - clobbers always have QImode. But replace_reg knows
2169 that these regs can't be MODE_INT and will assert. Just put
2170 the right reg there without calling replace_reg. */
2172 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2176 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2178 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2179 if (STACK_REG_P (recog_data.operand[i]))
2181 /* An input reg is implicitly popped if it is tied to an
2182 output, or if there is a CLOBBER for it. */
2183 int j;
2185 for (j = 0; j < n_clobbers; j++)
2186 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2187 break;
2189 if (j < n_clobbers || op_alt[i].matches >= 0)
2191 /* recog_data.operand[i] might not be at the top of stack.
2192 But that's OK, because all we need to do is pop the
2193 right number of regs off of the top of the reg-stack.
2194 record_asm_stack_regs guaranteed that all implicitly
2195 popped regs were grouped at the top of the reg-stack. */
2197 CLEAR_HARD_REG_BIT (regstack->reg_set,
2198 regstack->reg[regstack->top]);
2199 regstack->top--;
2203 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2204 Note that there isn't any need to substitute register numbers.
2205 ??? Explain why this is true. */
2207 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2209 /* See if there is an output for this hard reg. */
2210 int j;
2212 for (j = 0; j < n_outputs; j++)
2213 if (STACK_REG_P (recog_data.operand[j])
2214 && REGNO (recog_data.operand[j]) == (unsigned) i)
2216 regstack->reg[++regstack->top] = i;
2217 SET_HARD_REG_BIT (regstack->reg_set, i);
2218 break;
2222 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2223 input that the asm didn't implicitly pop. If the asm didn't
2224 implicitly pop an input reg, that reg will still be live.
2226 Note that we can't use find_regno_note here: the register numbers
2227 in the death notes have already been substituted. */
2229 for (i = 0; i < n_outputs; i++)
2230 if (STACK_REG_P (recog_data.operand[i]))
2232 int j;
2234 for (j = 0; j < n_notes; j++)
2235 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2236 && note_kind[j] == REG_UNUSED)
2238 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2239 EMIT_AFTER);
2240 break;
2244 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2245 if (STACK_REG_P (recog_data.operand[i]))
2247 int j;
2249 for (j = 0; j < n_notes; j++)
2250 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2251 && note_kind[j] == REG_DEAD
2252 && TEST_HARD_REG_BIT (regstack->reg_set,
2253 REGNO (recog_data.operand[i])))
2255 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2256 EMIT_AFTER);
2257 break;
2262 /* Substitute stack hard reg numbers for stack virtual registers in
2263 INSN. Non-stack register numbers are not changed. REGSTACK is the
2264 current stack content. Insns may be emitted as needed to arrange the
2265 stack for the 387 based on the contents of the insn. Return whether
2266 a control flow insn was deleted in the process. */
2268 static bool
2269 subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
2271 rtx *note_link, note;
2272 bool control_flow_insn_deleted = false;
2273 int i;
2275 if (CALL_P (insn))
2277 int top = regstack->top;
2279 /* If there are any floating point parameters to be passed in
2280 registers for this call, make sure they are in the right
2281 order. */
2283 if (top >= 0)
2285 straighten_stack (insn, regstack);
2287 /* Now mark the arguments as dead after the call. */
2289 while (regstack->top >= 0)
2291 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2292 regstack->top--;
2297 /* Do the actual substitution if any stack regs are mentioned.
2298 Since we only record whether entire insn mentions stack regs, and
2299 subst_stack_regs_pat only works for patterns that contain stack regs,
2300 we must check each pattern in a parallel here. A call_value_pop could
2301 fail otherwise. */
2303 if (stack_regs_mentioned (insn))
2305 int n_operands = asm_noperands (PATTERN (insn));
2306 if (n_operands >= 0)
2308 /* This insn is an `asm' with operands. Decode the operands,
2309 decide how many are inputs, and do register substitution.
2310 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2312 subst_asm_stack_regs (insn, regstack);
2313 return control_flow_insn_deleted;
2316 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2317 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2319 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2321 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2322 XVECEXP (PATTERN (insn), 0, i)
2323 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2324 control_flow_insn_deleted
2325 |= subst_stack_regs_pat (insn, regstack,
2326 XVECEXP (PATTERN (insn), 0, i));
2329 else
2330 control_flow_insn_deleted
2331 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2334 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2335 REG_UNUSED will already have been dealt with, so just return. */
2337 if (NOTE_P (insn) || insn->deleted ())
2338 return control_flow_insn_deleted;
2340 /* If this a noreturn call, we can't insert pop insns after it.
2341 Instead, reset the stack state to empty. */
2342 if (CALL_P (insn)
2343 && find_reg_note (insn, REG_NORETURN, NULL))
2345 regstack->top = -1;
2346 CLEAR_HARD_REG_SET (regstack->reg_set);
2347 return control_flow_insn_deleted;
2350 /* If there is a REG_UNUSED note on a stack register on this insn,
2351 the indicated reg must be popped. The REG_UNUSED note is removed,
2352 since the form of the newly emitted pop insn references the reg,
2353 making it no longer `unset'. */
2355 note_link = &REG_NOTES (insn);
2356 for (note = *note_link; note; note = XEXP (note, 1))
2357 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2359 *note_link = XEXP (note, 1);
2360 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2362 else
2363 note_link = &XEXP (note, 1);
2365 return control_flow_insn_deleted;
2368 /* Change the organization of the stack so that it fits a new basic
2369 block. Some registers might have to be popped, but there can never be
2370 a register live in the new block that is not now live.
2372 Insert any needed insns before or after INSN, as indicated by
2373 WHERE. OLD is the original stack layout, and NEW is the desired
2374 form. OLD is updated to reflect the code emitted, i.e., it will be
2375 the same as NEW upon return.
2377 This function will not preserve block_end[]. But that information
2378 is no longer needed once this has executed. */
2380 static void
2381 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
2382 enum emit_where where)
2384 int reg;
2385 int update_end = 0;
2386 int i;
2388 /* Stack adjustments for the first insn in a block update the
2389 current_block's stack_in instead of inserting insns directly.
2390 compensate_edges will add the necessary code later. */
2391 if (current_block
2392 && starting_stack_p
2393 && where == EMIT_BEFORE)
2395 BLOCK_INFO (current_block)->stack_in = *new_stack;
2396 starting_stack_p = false;
2397 *old = *new_stack;
2398 return;
2401 /* We will be inserting new insns "backwards". If we are to insert
2402 after INSN, find the next insn, and insert before it. */
2404 if (where == EMIT_AFTER)
2406 if (current_block && BB_END (current_block) == insn)
2407 update_end = 1;
2408 insn = NEXT_INSN (insn);
2411 /* Initialize partially dead variables. */
2412 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2413 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2414 && !TEST_HARD_REG_BIT (old->reg_set, i))
2416 old->reg[++old->top] = i;
2417 SET_HARD_REG_BIT (old->reg_set, i);
2418 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num),
2419 insn);
2422 /* Pop any registers that are not needed in the new block. */
2424 /* If the destination block's stack already has a specified layout
2425 and contains two or more registers, use a more intelligent algorithm
2426 to pop registers that minimizes the number number of fxchs below. */
2427 if (new_stack->top > 0)
2429 bool slots[REG_STACK_SIZE];
2430 int pops[REG_STACK_SIZE];
2431 int next, dest, topsrc;
2433 /* First pass to determine the free slots. */
2434 for (reg = 0; reg <= new_stack->top; reg++)
2435 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2437 /* Second pass to allocate preferred slots. */
2438 topsrc = -1;
2439 for (reg = old->top; reg > new_stack->top; reg--)
2440 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2442 dest = -1;
2443 for (next = 0; next <= new_stack->top; next++)
2444 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2446 /* If this is a preference for the new top of stack, record
2447 the fact by remembering it's old->reg in topsrc. */
2448 if (next == new_stack->top)
2449 topsrc = reg;
2450 slots[next] = true;
2451 dest = next;
2452 break;
2454 pops[reg] = dest;
2456 else
2457 pops[reg] = reg;
2459 /* Intentionally, avoid placing the top of stack in it's correct
2460 location, if we still need to permute the stack below and we
2461 can usefully place it somewhere else. This is the case if any
2462 slot is still unallocated, in which case we should place the
2463 top of stack there. */
2464 if (topsrc != -1)
2465 for (reg = 0; reg < new_stack->top; reg++)
2466 if (!slots[reg])
2468 pops[topsrc] = reg;
2469 slots[new_stack->top] = false;
2470 slots[reg] = true;
2471 break;
2474 /* Third pass allocates remaining slots and emits pop insns. */
2475 next = new_stack->top;
2476 for (reg = old->top; reg > new_stack->top; reg--)
2478 dest = pops[reg];
2479 if (dest == -1)
2481 /* Find next free slot. */
2482 while (slots[next])
2483 next--;
2484 dest = next--;
2486 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2487 EMIT_BEFORE);
2490 else
2492 /* The following loop attempts to maximize the number of times we
2493 pop the top of the stack, as this permits the use of the faster
2494 ffreep instruction on platforms that support it. */
2495 int live, next;
2497 live = 0;
2498 for (reg = 0; reg <= old->top; reg++)
2499 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2500 live++;
2502 next = live;
2503 while (old->top >= live)
2504 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2506 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2507 next--;
2508 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2509 EMIT_BEFORE);
2511 else
2512 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2513 EMIT_BEFORE);
2516 if (new_stack->top == -2)
2518 /* If the new block has never been processed, then it can inherit
2519 the old stack order. */
2521 new_stack->top = old->top;
2522 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2524 else
2526 /* This block has been entered before, and we must match the
2527 previously selected stack order. */
2529 /* By now, the only difference should be the order of the stack,
2530 not their depth or liveliness. */
2532 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2533 gcc_assert (old->top == new_stack->top);
2535 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2536 swaps until the stack is correct.
2538 The worst case number of swaps emitted is N + 2, where N is the
2539 depth of the stack. In some cases, the reg at the top of
2540 stack may be correct, but swapped anyway in order to fix
2541 other regs. But since we never swap any other reg away from
2542 its correct slot, this algorithm will converge. */
2544 if (new_stack->top != -1)
2547 /* Swap the reg at top of stack into the position it is
2548 supposed to be in, until the correct top of stack appears. */
2550 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2552 for (reg = new_stack->top; reg >= 0; reg--)
2553 if (new_stack->reg[reg] == old->reg[old->top])
2554 break;
2556 gcc_assert (reg != -1);
2558 emit_swap_insn (insn, old,
2559 FP_MODE_REG (old->reg[reg], DFmode));
2562 /* See if any regs remain incorrect. If so, bring an
2563 incorrect reg to the top of stack, and let the while loop
2564 above fix it. */
2566 for (reg = new_stack->top; reg >= 0; reg--)
2567 if (new_stack->reg[reg] != old->reg[reg])
2569 emit_swap_insn (insn, old,
2570 FP_MODE_REG (old->reg[reg], DFmode));
2571 break;
2573 } while (reg >= 0);
2575 /* At this point there must be no differences. */
2577 for (reg = old->top; reg >= 0; reg--)
2578 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2581 if (update_end)
2582 BB_END (current_block) = PREV_INSN (insn);
2585 /* Print stack configuration. */
2587 static void
2588 print_stack (FILE *file, stack_ptr s)
2590 if (! file)
2591 return;
2593 if (s->top == -2)
2594 fprintf (file, "uninitialized\n");
2595 else if (s->top == -1)
2596 fprintf (file, "empty\n");
2597 else
2599 int i;
2600 fputs ("[ ", file);
2601 for (i = 0; i <= s->top; ++i)
2602 fprintf (file, "%d ", s->reg[i]);
2603 fputs ("]\n", file);
2607 /* This function was doing life analysis. We now let the regular live
2608 code do it's job, so we only need to check some extra invariants
2609 that reg-stack expects. Primary among these being that all registers
2610 are initialized before use.
2612 The function returns true when code was emitted to CFG edges and
2613 commit_edge_insertions needs to be called. */
2615 static int
2616 convert_regs_entry (void)
2618 int inserted = 0;
2619 edge e;
2620 edge_iterator ei;
2622 /* Load something into each stack register live at function entry.
2623 Such live registers can be caused by uninitialized variables or
2624 functions not returning values on all paths. In order to keep
2625 the push/pop code happy, and to not scrog the register stack, we
2626 must put something in these registers. Use a QNaN.
2628 Note that we are inserting converted code here. This code is
2629 never seen by the convert_regs pass. */
2631 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2633 basic_block block = e->dest;
2634 block_info bi = BLOCK_INFO (block);
2635 int reg, top = -1;
2637 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2638 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2640 rtx init;
2642 bi->stack_in.reg[++top] = reg;
2644 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode),
2645 not_a_num);
2646 insert_insn_on_edge (init, e);
2647 inserted = 1;
2650 bi->stack_in.top = top;
2653 return inserted;
2656 /* Construct the desired stack for function exit. This will either
2657 be `empty', or the function return value at top-of-stack. */
2659 static void
2660 convert_regs_exit (void)
2662 int value_reg_low, value_reg_high;
2663 stack_ptr output_stack;
2664 rtx retvalue;
2666 retvalue = stack_result (current_function_decl);
2667 value_reg_low = value_reg_high = -1;
2668 if (retvalue)
2670 value_reg_low = REGNO (retvalue);
2671 value_reg_high = END_REGNO (retvalue) - 1;
2674 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2675 if (value_reg_low == -1)
2676 output_stack->top = -1;
2677 else
2679 int reg;
2681 output_stack->top = value_reg_high - value_reg_low;
2682 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2684 output_stack->reg[value_reg_high - reg] = reg;
2685 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2690 /* Copy the stack info from the end of edge E's source block to the
2691 start of E's destination block. */
2693 static void
2694 propagate_stack (edge e)
2696 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2697 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2698 int reg;
2700 /* Preserve the order of the original stack, but check whether
2701 any pops are needed. */
2702 dest_stack->top = -1;
2703 for (reg = 0; reg <= src_stack->top; ++reg)
2704 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2705 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2707 /* Push in any partially dead values. */
2708 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2709 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2710 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2711 dest_stack->reg[++dest_stack->top] = reg;
2715 /* Adjust the stack of edge E's source block on exit to match the stack
2716 of it's target block upon input. The stack layouts of both blocks
2717 should have been defined by now. */
2719 static bool
2720 compensate_edge (edge e)
2722 basic_block source = e->src, target = e->dest;
2723 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2724 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2725 struct stack_def regstack;
2726 int reg;
2728 if (dump_file)
2729 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2731 gcc_assert (target_stack->top != -2);
2733 /* Check whether stacks are identical. */
2734 if (target_stack->top == source_stack->top)
2736 for (reg = target_stack->top; reg >= 0; --reg)
2737 if (target_stack->reg[reg] != source_stack->reg[reg])
2738 break;
2740 if (reg == -1)
2742 if (dump_file)
2743 fprintf (dump_file, "no changes needed\n");
2744 return false;
2748 if (dump_file)
2750 fprintf (dump_file, "correcting stack to ");
2751 print_stack (dump_file, target_stack);
2754 /* Abnormal calls may appear to have values live in st(0), but the
2755 abnormal return path will not have actually loaded the values. */
2756 if (e->flags & EDGE_ABNORMAL_CALL)
2758 /* Assert that the lifetimes are as we expect -- one value
2759 live at st(0) on the end of the source block, and no
2760 values live at the beginning of the destination block.
2761 For complex return values, we may have st(1) live as well. */
2762 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2763 gcc_assert (target_stack->top == -1);
2764 return false;
2767 /* Handle non-call EH edges specially. The normal return path have
2768 values in registers. These will be popped en masse by the unwind
2769 library. */
2770 if (e->flags & EDGE_EH)
2772 gcc_assert (target_stack->top == -1);
2773 return false;
2776 /* We don't support abnormal edges. Global takes care to
2777 avoid any live register across them, so we should never
2778 have to insert instructions on such edges. */
2779 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2781 /* Make a copy of source_stack as change_stack is destructive. */
2782 regstack = *source_stack;
2784 /* It is better to output directly to the end of the block
2785 instead of to the edge, because emit_swap can do minimal
2786 insn scheduling. We can do this when there is only one
2787 edge out, and it is not abnormal. */
2788 if (EDGE_COUNT (source->succs) == 1)
2790 current_block = source;
2791 change_stack (BB_END (source), &regstack, target_stack,
2792 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2794 else
2796 rtx_insn *seq;
2797 rtx_note *after;
2799 current_block = NULL;
2800 start_sequence ();
2802 /* ??? change_stack needs some point to emit insns after. */
2803 after = emit_note (NOTE_INSN_DELETED);
2805 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2807 seq = get_insns ();
2808 end_sequence ();
2810 insert_insn_on_edge (seq, e);
2811 return true;
2813 return false;
2816 /* Traverse all non-entry edges in the CFG, and emit the necessary
2817 edge compensation code to change the stack from stack_out of the
2818 source block to the stack_in of the destination block. */
2820 static bool
2821 compensate_edges (void)
2823 bool inserted = false;
2824 basic_block bb;
2826 starting_stack_p = false;
2828 FOR_EACH_BB_FN (bb, cfun)
2829 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2831 edge e;
2832 edge_iterator ei;
2834 FOR_EACH_EDGE (e, ei, bb->succs)
2835 inserted |= compensate_edge (e);
2837 return inserted;
2840 /* Select the better of two edges E1 and E2 to use to determine the
2841 stack layout for their shared destination basic block. This is
2842 typically the more frequently executed. The edge E1 may be NULL
2843 (in which case E2 is returned), but E2 is always non-NULL. */
2845 static edge
2846 better_edge (edge e1, edge e2)
2848 if (!e1)
2849 return e2;
2851 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2852 return e1;
2853 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2854 return e2;
2856 if (e1->count > e2->count)
2857 return e1;
2858 if (e1->count < e2->count)
2859 return e2;
2861 /* Prefer critical edges to minimize inserting compensation code on
2862 critical edges. */
2864 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2865 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2867 /* Avoid non-deterministic behavior. */
2868 return (e1->src->index < e2->src->index) ? e1 : e2;
2871 /* Convert stack register references in one block. Return true if the CFG
2872 has been modified in the process. */
2874 static bool
2875 convert_regs_1 (basic_block block)
2877 struct stack_def regstack;
2878 block_info bi = BLOCK_INFO (block);
2879 int reg;
2880 rtx_insn *insn, *next;
2881 bool control_flow_insn_deleted = false;
2882 bool cfg_altered = false;
2883 int debug_insns_with_starting_stack = 0;
2885 any_malformed_asm = false;
2887 /* Choose an initial stack layout, if one hasn't already been chosen. */
2888 if (bi->stack_in.top == -2)
2890 edge e, beste = NULL;
2891 edge_iterator ei;
2893 /* Select the best incoming edge (typically the most frequent) to
2894 use as a template for this basic block. */
2895 FOR_EACH_EDGE (e, ei, block->preds)
2896 if (BLOCK_INFO (e->src)->done)
2897 beste = better_edge (beste, e);
2899 if (beste)
2900 propagate_stack (beste);
2901 else
2903 /* No predecessors. Create an arbitrary input stack. */
2904 bi->stack_in.top = -1;
2905 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2906 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2907 bi->stack_in.reg[++bi->stack_in.top] = reg;
2911 if (dump_file)
2913 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2914 print_stack (dump_file, &bi->stack_in);
2917 /* Process all insns in this block. Keep track of NEXT so that we
2918 don't process insns emitted while substituting in INSN. */
2919 current_block = block;
2920 next = BB_HEAD (block);
2921 regstack = bi->stack_in;
2922 starting_stack_p = true;
2926 insn = next;
2927 next = NEXT_INSN (insn);
2929 /* Ensure we have not missed a block boundary. */
2930 gcc_assert (next);
2931 if (insn == BB_END (block))
2932 next = NULL;
2934 /* Don't bother processing unless there is a stack reg
2935 mentioned or if it's a CALL_INSN. */
2936 if (DEBUG_INSN_P (insn))
2938 if (starting_stack_p)
2939 debug_insns_with_starting_stack++;
2940 else
2942 subst_all_stack_regs_in_debug_insn (insn, &regstack);
2944 /* Nothing must ever die at a debug insn. If something
2945 is referenced in it that becomes dead, it should have
2946 died before and the reference in the debug insn
2947 should have been removed so as to avoid changing code
2948 generation. */
2949 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2952 else if (stack_regs_mentioned (insn)
2953 || CALL_P (insn))
2955 if (dump_file)
2957 fprintf (dump_file, " insn %d input stack: ",
2958 INSN_UID (insn));
2959 print_stack (dump_file, &regstack);
2961 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2962 starting_stack_p = false;
2965 while (next);
2967 if (debug_insns_with_starting_stack)
2969 /* Since it's the first non-debug instruction that determines
2970 the stack requirements of the current basic block, we refrain
2971 from updating debug insns before it in the loop above, and
2972 fix them up here. */
2973 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2974 insn = NEXT_INSN (insn))
2976 if (!DEBUG_INSN_P (insn))
2977 continue;
2979 debug_insns_with_starting_stack--;
2980 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
2984 if (dump_file)
2986 fprintf (dump_file, "Expected live registers [");
2987 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2988 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2989 fprintf (dump_file, " %d", reg);
2990 fprintf (dump_file, " ]\nOutput stack: ");
2991 print_stack (dump_file, &regstack);
2994 insn = BB_END (block);
2995 if (JUMP_P (insn))
2996 insn = PREV_INSN (insn);
2998 /* If the function is declared to return a value, but it returns one
2999 in only some cases, some registers might come live here. Emit
3000 necessary moves for them. */
3002 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3004 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3005 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3007 rtx set;
3009 if (dump_file)
3010 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3012 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num);
3013 insn = emit_insn_after (set, insn);
3014 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3018 /* Amongst the insns possibly deleted during the substitution process above,
3019 might have been the only trapping insn in the block. We purge the now
3020 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3021 called at the end of convert_regs. The order in which we process the
3022 blocks ensures that we never delete an already processed edge.
3024 Note that, at this point, the CFG may have been damaged by the emission
3025 of instructions after an abnormal call, which moves the basic block end
3026 (and is the reason why we call fixup_abnormal_edges later). So we must
3027 be sure that the trapping insn has been deleted before trying to purge
3028 dead edges, otherwise we risk purging valid edges.
3030 ??? We are normally supposed not to delete trapping insns, so we pretend
3031 that the insns deleted above don't actually trap. It would have been
3032 better to detect this earlier and avoid creating the EH edge in the first
3033 place, still, but we don't have enough information at that time. */
3035 if (control_flow_insn_deleted)
3036 cfg_altered |= purge_dead_edges (block);
3038 /* Something failed if the stack lives don't match. If we had malformed
3039 asms, we zapped the instruction itself, but that didn't produce the
3040 same pattern of register kills as before. */
3042 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3043 || any_malformed_asm);
3044 bi->stack_out = regstack;
3045 bi->done = true;
3047 return cfg_altered;
3050 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3051 CFG has been modified in the process. */
3053 static bool
3054 convert_regs_2 (basic_block block)
3056 basic_block *stack, *sp;
3057 bool cfg_altered = false;
3059 /* We process the blocks in a top-down manner, in a way such that one block
3060 is only processed after all its predecessors. The number of predecessors
3061 of every block has already been computed. */
3063 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3064 sp = stack;
3066 *sp++ = block;
3070 edge e;
3071 edge_iterator ei;
3073 block = *--sp;
3075 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3076 some dead EH outgoing edge after the deletion of the trapping
3077 insn inside the block. Since the number of predecessors of
3078 BLOCK's successors was computed based on the initial edge set,
3079 we check the necessity to process some of these successors
3080 before such an edge deletion may happen. However, there is
3081 a pitfall: if BLOCK is the only predecessor of a successor and
3082 the edge between them happens to be deleted, the successor
3083 becomes unreachable and should not be processed. The problem
3084 is that there is no way to preventively detect this case so we
3085 stack the successor in all cases and hand over the task of
3086 fixing up the discrepancy to convert_regs_1. */
3088 FOR_EACH_EDGE (e, ei, block->succs)
3089 if (! (e->flags & EDGE_DFS_BACK))
3091 BLOCK_INFO (e->dest)->predecessors--;
3092 if (!BLOCK_INFO (e->dest)->predecessors)
3093 *sp++ = e->dest;
3096 cfg_altered |= convert_regs_1 (block);
3098 while (sp != stack);
3100 free (stack);
3102 return cfg_altered;
3105 /* Traverse all basic blocks in a function, converting the register
3106 references in each insn from the "flat" register file that gcc uses,
3107 to the stack-like registers the 387 uses. */
3109 static void
3110 convert_regs (void)
3112 bool cfg_altered = false;
3113 int inserted;
3114 basic_block b;
3115 edge e;
3116 edge_iterator ei;
3118 /* Initialize uninitialized registers on function entry. */
3119 inserted = convert_regs_entry ();
3121 /* Construct the desired stack for function exit. */
3122 convert_regs_exit ();
3123 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3125 /* ??? Future: process inner loops first, and give them arbitrary
3126 initial stacks which emit_swap_insn can modify. This ought to
3127 prevent double fxch that often appears at the head of a loop. */
3129 /* Process all blocks reachable from all entry points. */
3130 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3131 cfg_altered |= convert_regs_2 (e->dest);
3133 /* ??? Process all unreachable blocks. Though there's no excuse
3134 for keeping these even when not optimizing. */
3135 FOR_EACH_BB_FN (b, cfun)
3137 block_info bi = BLOCK_INFO (b);
3139 if (! bi->done)
3140 cfg_altered |= convert_regs_2 (b);
3143 /* We must fix up abnormal edges before inserting compensation code
3144 because both mechanisms insert insns on edges. */
3145 inserted |= fixup_abnormal_edges ();
3147 inserted |= compensate_edges ();
3149 clear_aux_for_blocks ();
3151 if (inserted)
3152 commit_edge_insertions ();
3154 if (cfg_altered)
3155 cleanup_cfg (0);
3157 if (dump_file)
3158 fputc ('\n', dump_file);
3161 /* Convert register usage from "flat" register file usage to a "stack
3162 register file. FILE is the dump file, if used.
3164 Construct a CFG and run life analysis. Then convert each insn one
3165 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3166 code duplication created when the converter inserts pop insns on
3167 the edges. */
3169 static bool
3170 reg_to_stack (void)
3172 basic_block bb;
3173 int i;
3174 int max_uid;
3176 /* Clean up previous run. */
3177 stack_regs_mentioned_data.release ();
3179 /* See if there is something to do. Flow analysis is quite
3180 expensive so we might save some compilation time. */
3181 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3182 if (df_regs_ever_live_p (i))
3183 break;
3184 if (i > LAST_STACK_REG)
3185 return false;
3187 df_note_add_problem ();
3188 df_analyze ();
3190 mark_dfs_back_edges ();
3192 /* Set up block info for each basic block. */
3193 alloc_aux_for_blocks (sizeof (struct block_info_def));
3194 FOR_EACH_BB_FN (bb, cfun)
3196 block_info bi = BLOCK_INFO (bb);
3197 edge_iterator ei;
3198 edge e;
3199 int reg;
3201 FOR_EACH_EDGE (e, ei, bb->preds)
3202 if (!(e->flags & EDGE_DFS_BACK)
3203 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3204 bi->predecessors++;
3206 /* Set current register status at last instruction `uninitialized'. */
3207 bi->stack_in.top = -2;
3209 /* Copy live_at_end and live_at_start into temporaries. */
3210 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3212 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3213 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3214 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3215 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3219 /* Create the replacement registers up front. */
3220 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3222 machine_mode mode;
3223 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3224 mode != VOIDmode;
3225 mode = GET_MODE_WIDER_MODE (mode))
3226 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3227 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3228 mode != VOIDmode;
3229 mode = GET_MODE_WIDER_MODE (mode))
3230 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3233 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3235 /* A QNaN for initializing uninitialized variables.
3237 ??? We can't load from constant memory in PIC mode, because
3238 we're inserting these instructions before the prologue and
3239 the PIC register hasn't been set up. In that case, fall back
3240 on zero, which we can get from `fldz'. */
3242 if ((flag_pic && !TARGET_64BIT)
3243 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3244 not_a_num = CONST0_RTX (SFmode);
3245 else
3247 REAL_VALUE_TYPE r;
3249 real_nan (&r, "", 1, SFmode);
3250 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3251 not_a_num = force_const_mem (SFmode, not_a_num);
3254 /* Allocate a cache for stack_regs_mentioned. */
3255 max_uid = get_max_uid ();
3256 stack_regs_mentioned_data.create (max_uid + 1);
3257 memset (stack_regs_mentioned_data.address (),
3258 0, sizeof (char) * (max_uid + 1));
3260 convert_regs ();
3262 free_aux_for_blocks ();
3263 return true;
3265 #endif /* STACK_REGS */
3267 namespace {
3269 const pass_data pass_data_stack_regs =
3271 RTL_PASS, /* type */
3272 "*stack_regs", /* name */
3273 OPTGROUP_NONE, /* optinfo_flags */
3274 TV_REG_STACK, /* tv_id */
3275 0, /* properties_required */
3276 0, /* properties_provided */
3277 0, /* properties_destroyed */
3278 0, /* todo_flags_start */
3279 0, /* todo_flags_finish */
3282 class pass_stack_regs : public rtl_opt_pass
3284 public:
3285 pass_stack_regs (gcc::context *ctxt)
3286 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3289 /* opt_pass methods: */
3290 virtual bool gate (function *)
3292 #ifdef STACK_REGS
3293 return true;
3294 #else
3295 return false;
3296 #endif
3299 }; // class pass_stack_regs
3301 } // anon namespace
3303 rtl_opt_pass *
3304 make_pass_stack_regs (gcc::context *ctxt)
3306 return new pass_stack_regs (ctxt);
3309 /* Convert register usage from flat register file usage to a stack
3310 register file. */
3311 static unsigned int
3312 rest_of_handle_stack_regs (void)
3314 #ifdef STACK_REGS
3315 reg_to_stack ();
3316 regstack_completed = 1;
3317 #endif
3318 return 0;
3321 namespace {
3323 const pass_data pass_data_stack_regs_run =
3325 RTL_PASS, /* type */
3326 "stack", /* name */
3327 OPTGROUP_NONE, /* optinfo_flags */
3328 TV_REG_STACK, /* tv_id */
3329 0, /* properties_required */
3330 0, /* properties_provided */
3331 0, /* properties_destroyed */
3332 0, /* todo_flags_start */
3333 TODO_df_finish, /* todo_flags_finish */
3336 class pass_stack_regs_run : public rtl_opt_pass
3338 public:
3339 pass_stack_regs_run (gcc::context *ctxt)
3340 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3343 /* opt_pass methods: */
3344 virtual unsigned int execute (function *)
3346 return rest_of_handle_stack_regs ();
3349 }; // class pass_stack_regs_run
3351 } // anon namespace
3353 rtl_opt_pass *
3354 make_pass_stack_regs_run (gcc::context *ctxt)
3356 return new pass_stack_regs_run (ctxt);