| blob | 8d9028654c938647727755b0705c751a61e44851 |
1 /* Statement Analysis and Transformation for Vectorization
2 Copyright (C) 2003-2023 Free Software Foundation, Inc.
3 Contributed by Dorit Naishlos <dorit@il.ibm.com>
4 and Ira Rosen <irar@il.ibm.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
61 /* For lang_hooks.types.type_for_mode. */
64 /* Return the vectorized type for the given statement. */
66 tree
68 {
70 }
72 /* Return TRUE iff the given statement is in an inner loop relative to
73 the loop being vectorized. */
74 bool
76 {
88 }
90 /* Record the cost of a statement, either by directly informing the
91 target model or by saving it in a vector for later processing.
92 Return a preliminary estimate of the statement's cost. */
94 static unsigned
100 {
108 stmt_info_for_cost si
114 }
116 unsigned
121 {
124 }
126 unsigned
131 {
134 }
136 unsigned
140 {
145 }
147 /* Return a variable of type ELEM_TYPE[NELEMS]. */
149 static tree
151 {
154 }
156 /* ARRAY is an array of vectors created by create_vector_array.
157 Return an SSA_NAME for the vector in index N. The reference
158 is part of the vectorization of STMT_INFO and the vector is associated
159 with scalar destination SCALAR_DEST. */
161 static tree
165 {
182 }
184 /* ARRAY is an array of vectors created by create_vector_array.
185 Emit code to store SSA_NAME VECT in index N of the array.
186 The store is part of the vectorization of STMT_INFO. */
188 static void
192 {
193 tree array_ref;
202 }
204 /* PTR is a pointer to an array of type TYPE. Return a representation
205 of *PTR. The memory reference replaces those in FIRST_DR
206 (and its group). */
208 static tree
210 {
211 tree mem_ref;
214 /* Arrays have the same alignment as their type. */
217 }
219 /* Add a clobber of variable VAR to the vectorization of STMT_INFO.
220 Emit the clobber before *GSI. */
222 static void
225 {
229 }
231 /* Utility functions used by vect_mark_stmts_to_be_vectorized. */
233 /* Function vect_mark_relevant.
235 Mark STMT_INFO as "relevant for vectorization" and add it to WORKLIST. */
237 static void
240 {
249 /* If this stmt is an original stmt in a pattern, we might need to mark its
250 related pattern stmt instead of the original stmt. However, such stmts
251 may have their own uses that are not in any pattern, in such cases the
252 stmt itself should be marked. */
254 {
255 /* This is the last stmt in a sequence that was detected as a
256 pattern that can potentially be vectorized. Don't mark the stmt
257 as relevant/live because it's not going to be vectorized.
258 Instead mark the pattern-stmt that replaces it. */
262 "last stmt in pattern. don't mark"
272 {
275 "vec_stmt_relevant_p: forcing live pattern stmt "
278 }
284 }
292 {
297 }
300 }
303 /* Function is_simple_and_all_uses_invariant
305 Return true if STMT_INFO is simple and all uses of it are invariant. */
307 bool
309 loop_vec_info loop_vinfo)
310 {
311 tree op;
312 ssa_op_iter iter;
319 {
323 {
328 }
332 }
334 }
336 /* Function vect_stmt_relevant_p.
338 Return true if STMT_INFO, in the loop that is represented by LOOP_VINFO,
339 is "relevant for vectorization".
341 A stmt is considered "relevant for vectorization" if:
342 - it has uses outside the loop.
343 - it has vdefs (it alters memory).
344 - control stmts in the loop (except for the exit condition).
346 CHECKME: what other side effects would the vectorizer allow? */
348 static bool
351 {
353 ssa_op_iter op_iter;
354 imm_use_iterator imm_iter;
355 use_operand_p use_p;
356 def_operand_p def_p;
361 /* cond stmt other than loop exit cond. */
366 /* changing memory. */
370 {
375 }
377 /* uses outside the loop. */
379 {
381 {
384 {
392 /* We expect all such uses to be in the loop exit phis
393 (because of loop closed form) */
398 }
399 }
400 }
404 {
409 }
412 }
415 /* Function exist_non_indexing_operands_for_use_p
417 USE is one of the uses attached to STMT_INFO. Check if USE is
418 used in STMT_INFO for anything other than indexing an array. */
420 static bool
422 {
423 tree operand;
425 /* USE corresponds to some operand in STMT. If there is no data
426 reference in STMT, then any operand that corresponds to USE
427 is not indexing an array. */
431 /* STMT has a data_ref. FORNOW this means that its of one of
432 the following forms:
433 -1- ARRAY_REF = var
434 -2- var = ARRAY_REF
435 (This should have been verified in analyze_data_refs).
437 'var' in the second case corresponds to a def, not a use,
438 so USE cannot correspond to any operands that are not used
439 for array indexing.
441 Therefore, all we need to check is if STMT falls into the
442 first case, and whether var corresponds to USE. */
446 {
449 {
462 }
464 }
476 }
479 /*
480 Function process_use.
482 Inputs:
483 - a USE in STMT_VINFO in a loop represented by LOOP_VINFO
484 - RELEVANT - enum value to be set in the STMT_VINFO of the stmt
485 that defined USE. This is done by calling mark_relevant and passing it
486 the WORKLIST (to add DEF_STMT to the WORKLIST in case it is relevant).
487 - FORCE is true if exist_non_indexing_operands_for_use_p check shouldn't
488 be performed.
490 Outputs:
491 Generally, LIVE_P and RELEVANT are used to define the liveness and
492 relevance info of the DEF_STMT of this USE:
493 STMT_VINFO_LIVE_P (DEF_stmt_vinfo) <-- live_p
494 STMT_VINFO_RELEVANT (DEF_stmt_vinfo) <-- relevant
495 Exceptions:
496 - case 1: If USE is used only for address computations (e.g. array indexing),
497 which does not need to be directly vectorized, then the liveness/relevance
498 of the respective DEF_STMT is left unchanged.
499 - case 2: If STMT_VINFO is a reduction phi and DEF_STMT is a reduction stmt,
500 we skip DEF_STMT cause it had already been processed.
501 - case 3: If DEF_STMT and STMT_VINFO are in different nests, then
502 "relevant" will be modified accordingly.
504 Return true if everything is as expected. Return false otherwise. */
506 static opt_result
510 {
511 stmt_vec_info dstmt_vinfo;
514 /* case 1: we are only interested in uses that need to be vectorized. Uses
515 that are used for address computation are not considered relevant. */
521 "not vectorized:"
530 /* case 2: A reduction phi (STMT) defined by a reduction stmt (DSTMT_VINFO).
531 We have to force the stmt live since the epilogue loop needs it to
532 continue computing the reduction. */
538 {
544 }
546 /* case 3a: outer-loop stmt defining an inner-loop stmt:
547 outer-loop-header-bb:
548 d = dstmt_vinfo
549 inner-loop:
550 stmt # use (d)
551 outer-loop-tail-bb:
552 ... */
554 {
560 {
581 }
582 }
584 /* case 3b: inner-loop stmt defining an outer-loop stmt:
585 outer-loop-header-bb:
586 ...
587 inner-loop:
588 d = dstmt_vinfo
589 outer-loop-tail-bb (or outer-loop-exit-bb in double reduction):
590 stmt # use (d) */
592 {
598 {
616 }
617 }
618 /* We are also not interested in uses on loop PHI backedges that are
619 inductions. Otherwise we'll needlessly vectorize the IV increment
620 and cause hybrid SLP for SLP inductions. Unless the PHI is live
621 of course. */
628 {
633 }
638 }
641 /* Function vect_mark_stmts_to_be_vectorized.
643 Not all stmts in the loop need to be vectorized. For example:
645 for i...
646 for j...
647 1. T0 = i + j
648 2. T1 = a[T0]
650 3. j = j + 1
652 Stmt 1 and 3 do not need to be vectorized, because loop control and
653 addressing of vectorized data-refs are handled differently.
655 This pass detects such stmts. */
657 opt_result
659 {
663 gimple_stmt_iterator si;
665 basic_block bb;
673 /* 1. Init worklist. */
675 {
678 {
686 }
688 {
698 }
699 }
701 /* 2. Process_worklist */
703 {
704 use_operand_p use_p;
705 ssa_op_iter iter;
712 /* Examine the USEs of STMT. For each USE, mark the stmt that defines it
713 (DEF_STMT) as relevant/irrelevant according to the relevance property
714 of STMT. */
717 /* Generally, the relevance property of STMT (in STMT_VINFO_RELEVANT) is
718 propagated as is to the DEF_STMTs of its USEs.
720 One exception is when STMT has been identified as defining a reduction
721 variable; in this case we set the relevance to vect_used_by_reduction.
722 This is because we distinguish between two kinds of relevant stmts -
723 those that are used by a reduction computation, and those that are
724 (also) used by a regular computation. This allows us later on to
725 identify stmts that are used solely by a reduction, and therefore the
726 order of the results that they produce does not have to be kept. */
729 {
758 }
761 {
762 /* Pattern statements are not inserted into the code, so
763 FOR_EACH_PHI_OR_STMT_USE optimizes their operands out, and we
764 have to scan the RHS or function arguments instead. */
766 {
772 {
773 opt_result res
783 }
785 {
788 {
789 opt_result res
794 }
795 }
796 }
798 {
800 {
802 opt_result res
807 }
808 }
809 }
810 else
812 {
814 opt_result res
819 }
822 {
823 gather_scatter_info gs_info;
826 opt_result res
830 {
834 }
835 }
839 }
841 /* Function vect_model_simple_cost.
843 Models cost for simple operations, i.e. those that only emit ncopies of a
844 single op. Right now, this does not account for multiple insns that could
845 be generated for the single vector op. We will handle that shortly. */
847 static void
852 slp_tree node,
855 {
860 /* ??? Somehow we need to fix this at the callers. */
865 /* Cost the "broadcast" of a scalar operand in to a vector operand.
866 Use scalar_to_vec to cost the broadcast, as elsewhere in the vector
867 cost model. */
873 /* Pass the inside-of-loop statements to the target-specific cost model. */
879 "vect_model_simple_cost: inside_cost = %d, "
881 }
884 /* Model cost for type demotion and promotion operations. PWR is
885 normally zero for single-step promotions and demotions. It will be
886 one if two-step promotion/demotion is required, and so on. NCOPIES
887 is the number of vector results (and thus number of instructions)
888 for the narrowest end of the operation chain. Each additional
889 step doubles the number of instructions required. If WIDEN_ARITH
890 is true the stmt is doing widening arithmetic. */
892 static void
898 {
903 {
905 widen_arith
909 }
911 /* FORNOW: Assuming maximum 2 args per stmts. */
919 "vect_model_promotion_demotion_cost: inside_cost = %d, "
921 }
923 /* Returns true if the current function returns DECL. */
925 static bool
927 {
928 edge_iterator ei;
929 edge e;
931 {
937 /* We often end up with an aggregate copy to the result decl,
938 handle that case as well. First skip intermediate clobbers
939 though. */
941 do
942 {
944 }
950 }
952 }
954 /* Calculate cost of DR's memory access. */
955 void
957 dr_alignment_support alignment_support_scheme,
961 {
963 {
965 {
968 vect_body);
974 }
977 {
978 /* Here, we assign an additional cost for the unaligned store. */
984 "vect_model_store_cost: unaligned supported by "
987 }
990 {
997 }
1001 }
1002 }
1004 /* Calculate cost of DR's memory access. */
1005 void
1007 dr_alignment_support alignment_support_scheme,
1014 {
1016 {
1018 {
1027 }
1029 {
1030 /* Here, we assign an additional cost for the unaligned load. */
1037 "vect_model_load_cost: unaligned supported by "
1041 }
1043 {
1049 /* FIXME: If the misalignment remains fixed across the iterations of
1050 the containing loop, the following cost should be added to the
1051 prologue costs. */
1061 }
1063 {
1066 "vect_model_load_cost: unaligned software "
1069 /* Unaligned software pipeline has a load of an address, an initial
1070 load, and possibly a mask operation to "prime" the loop. However,
1071 if this is an access in a group of loads, which provide grouped
1072 access, then the above cost should only be considered for one
1073 access in the group. Inside the loop, there is a load op
1074 and a realignment op. */
1077 {
1085 }
1094 "vect_model_load_cost: explicit realign optimized"
1098 }
1101 {
1108 }
1112 }
1113 }
1115 /* Insert the new stmt NEW_STMT at *GSI or at the appropriate place in
1116 the loop preheader for the vectorized stmt STMT_VINFO. */
1118 static void
1121 {
1124 else
1130 }
1132 /* Function vect_init_vector.
1134 Insert a new stmt (INIT_STMT) that initializes a new variable of type
1135 TYPE with the value VAL. If TYPE is a vector type and VAL does not have
1136 vector type a vector with all elements equal to VAL is created first.
1137 Place the initialization at GSI if it is not NULL. Otherwise, place the
1138 initialization at the loop preheader.
1139 Return the DEF of INIT_STMT.
1140 It will be used in the vectorization of STMT_INFO. */
1142 tree
1145 {
1147 tree new_temp;
1149 /* We abuse this function to push sth to a SSA name with initial 'val'. */
1151 {
1154 {
1155 /* Scalar boolean value should be transformed into
1156 all zeros or all ones value before building a vector. */
1158 {
1164 else
1165 {
1171 }
1172 }
1173 else
1174 {
1179 else
1180 /* ??? Condition vectorization expects us to do
1181 promotion of invariant/external defs. */
1185 {
1189 }
1190 }
1191 }
1193 }
1199 }
1202 /* Function vect_get_vec_defs_for_operand.
1204 OP is an operand in STMT_VINFO. This function returns a vector of
1205 NCOPIES defs that will be used in the vectorized stmts for STMT_VINFO.
1207 In the case that OP is an SSA_NAME which is defined in the loop, then
1208 STMT_VINFO_VEC_STMTS of the defining stmt holds the relevant defs.
1210 In case OP is an invariant or constant, a new stmt that creates a vector def
1211 needs to be introduced. VECTYPE may be used to specify a required type for
1212 vector invariant. */
1214 void
1218 {
1228 stmt_vec_info def_stmt_info;
1237 {
1239 tree vector_type;
1246 else
1253 }
1254 else
1255 {
1261 }
1262 }
1265 /* Get vectorized definitions for OP0 and OP1. */
1267 void
1274 {
1276 {
1285 }
1286 else
1287 {
1300 }
1301 }
1303 void
1310 {
1316 }
1318 /* Helper function called by vect_finish_replace_stmt and
1319 vect_finish_stmt_generation. Set the location of the new
1320 statement and create and return a stmt_vec_info for it. */
1322 static void
1325 {
1330 {
1333 /* While EH edges will generally prevent vectorization, stmt might
1334 e.g. be in a must-not-throw region. Ensure newly created stmts
1335 that could throw are part of the same region. */
1339 }
1340 else
1342 }
1344 /* Replace the scalar statement STMT_INFO with a new vector statement VEC_STMT,
1345 which sets the same scalar result as STMT_INFO did. Create and return a
1346 stmt_vec_info for VEC_STMT. */
1348 void
1351 {
1359 }
1361 /* Add VEC_STMT to the vectorized implementation of STMT_INFO and insert it
1362 before *GSI. Create and return a stmt_vec_info for VEC_STMT. */
1364 void
1368 {
1373 {
1377 {
1381 /* If we have an SSA vuse and insert a store, update virtual
1382 SSA form to avoid triggering the renamer. Do so only
1383 if we can easily see all uses - which is what almost always
1384 happens with the way vectorized stmts are inserted. */
1393 {
1397 }
1398 }
1399 }
1402 }
1404 /* We want to vectorize a call to combined function CFN with function
1405 decl FNDECL, using VECTYPE_OUT as the type of the output and VECTYPE_IN
1406 as the types of all inputs. Check whether this is possible using
1407 an internal function, returning its code if so or IFN_LAST if not. */
1409 static internal_fn
1412 {
1413 internal_fn ifn;
1416 else
1419 {
1422 {
1426 OPTIMIZE_FOR_SPEED))
1428 }
1429 }
1431 }
1435 gimple_stmt_iterator *);
1437 /* Check whether a load or store statement in the loop described by
1438 LOOP_VINFO is possible in a loop using partial vectors. This is
1439 testing whether the vectorizer pass has the appropriate support,
1440 as well as whether the target does.
1442 VLS_TYPE says whether the statement is a load or store and VECTYPE
1443 is the type of the vector being loaded or stored. SLP_NODE is the SLP
1444 node that contains the statement, or null if none. MEMORY_ACCESS_TYPE
1445 says how the load or store is going to be implemented and GROUP_SIZE
1446 is the number of load or store statements in the containing group.
1447 If the access is a gather load or scatter store, GS_INFO describes
1448 its arguments. If the load or store is conditional, SCALAR_MASK is the
1449 condition under which it occurs.
1451 Clear LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P if a loop using partial
1452 vectors is not supported, otherwise record the required rgroup control
1453 types. */
1455 static void
1457 slp_tree slp_node,
1458 vec_load_store_type vls_type,
1460 vect_memory_access_type
1461 memory_access_type,
1463 tree scalar_mask)
1464 {
1465 /* Invariant loads need no special support. */
1472 else
1480 {
1481 internal_fn ifn
1488 scalar_mask);
1489 else
1490 {
1493 "can't operate on partial vectors because"
1494 " the target doesn't have an appropriate"
1497 }
1499 }
1502 {
1503 internal_fn ifn = (is_load
1504 ? IFN_MASK_GATHER_LOAD
1506 internal_fn len_ifn = (is_load
1507 ? IFN_MASK_LEN_GATHER_LOAD
1519 scalar_mask);
1520 else
1521 {
1524 "can't operate on partial vectors because"
1525 " the target doesn't have an appropriate"
1528 }
1530 }
1534 {
1535 /* Element X of the data must come from iteration i * VF + X of the
1536 scalar loop. We need more work to support other mappings. */
1539 "can't operate on partial vectors because an"
1543 }
1546 {
1549 "can't operate on partial vectors when emulating"
1553 }
1555 /* We might load more scalars than we need for permuting SLP loads.
1556 We checked in get_group_load_store_type that the extra elements
1557 don't leak into a new vector. */
1559 {
1564 };
1568 machine_mode mask_mode;
1569 machine_mode vmode;
1572 {
1577 }
1580 {
1584 }
1587 {
1590 "can't operate on partial vectors because the"
1591 " target doesn't have the appropriate partial"
1594 }
1595 }
1597 /* Return the mask input to a masked load or store. VEC_MASK is the vectorized
1598 form of the scalar mask condition and LOOP_MASK, if nonnull, is the mask
1599 that needs to be applied to all loads and stores in a vectorized loop.
1600 Return VEC_MASK if LOOP_MASK is null or if VEC_MASK is already masked,
1601 otherwise return VEC_MASK & LOOP_MASK.
1603 MASK_TYPE is the type of both masks. If new statements are needed,
1604 insert them before GSI. */
1606 static tree
1609 {
1625 }
1627 /* Determine whether we can use a gather load or scatter store to vectorize
1628 strided load or store STMT_INFO by truncating the current offset to a
1629 smaller width. We need to be able to construct an offset vector:
1631 { 0, X, X*2, X*3, ... }
1633 without loss of precision, where X is STMT_INFO's DR_STEP.
1635 Return true if this is possible, describing the gather load or scatter
1636 store in GS_INFO. MASKED_P is true if the load or store is conditional. */
1638 static bool
1642 {
1647 {
1648 /* ??? Perhaps we could use range information here? */
1653 }
1655 /* Get the number of bits in an element. */
1660 /* Set COUNT to the upper limit on the number of elements - 1.
1661 Start with the maximum vectorization factor. */
1664 /* Try lowering COUNT to the number of scalar latch iterations. */
1666 widest_int max_iters;
1671 /* Try scales of 1 and the element size. */
1675 {
1677 widest_int factor;
1681 /* Determine the minimum precision of (COUNT - 1) * STEP / SCALE. */
1688 /* Find the narrowest viable offset type. */
1693 /* See whether the target supports the operation with an offset
1694 no narrower than OFFSET_TYPE. */
1703 /* Logically the sum of DR_BASE_ADDRESS, DR_INIT and DR_OFFSET,
1704 but we don't need to store that here. */
1712 }
1716 "truncating gather/scatter offset to %d bits"
1720 }
1722 /* Return true if we can use gather/scatter internal functions to
1723 vectorize STMT_INFO, which is a grouped or strided load or store.
1724 MASKED_P is true if load or store is conditional. When returning
1725 true, fill in GS_INFO with the information required to perform the
1726 operation. */
1728 static bool
1732 {
1747 "using gather/scatter for strided/grouped access,"
1751 }
1753 /* STMT_INFO is a non-strided load or store, meaning that it accesses
1754 elements with a known constant step. Return -1 if that step
1755 is negative, 0 if it is zero, and 1 if it is greater than zero. */
1757 static int
1759 {
1762 size_zero_node);
1763 }
1765 /* If the target supports a permute mask that reverses the elements in
1766 a vector of type VECTYPE, return that mask, otherwise return null. */
1768 static tree
1770 {
1773 /* The encoding has a single stepped pattern. */
1780 indices))
1783 }
1785 /* A subroutine of get_load_store_type, with a subset of the same
1786 arguments. Handle the case where STMT_INFO is a load or store that
1787 accesses consecutive elements with a negative step. Sets *POFFSET
1788 to the offset to be applied to the DR for the first access. */
1790 static vect_memory_access_type
1793 vec_load_store_type vls_type,
1795 {
1797 dr_alignment_support alignment_support_scheme;
1800 {
1805 }
1807 /* For backward running DRs the first access in vectype actually is
1808 N-1 elements before the address of the DR. */
1813 alignment_support_scheme
1817 {
1823 }
1826 {
1829 "negative step with invariant source;"
1832 }
1835 {
1841 }
1844 }
1846 /* STMT_INFO is either a masked or unconditional store. Return the value
1847 being stored. */
1849 tree
1851 {
1853 {
1856 }
1858 {
1863 }
1865 }
1867 /* Function VECTOR_VECTOR_COMPOSITION_TYPE
1869 This function returns a vector type which can be composed with NETLS pieces,
1870 whose type is recorded in PTYPE. VTYPE should be a vector type, and has the
1871 same vector size as the return vector. It checks target whether supports
1872 pieces-size vector mode for construction firstly, if target fails to, check
1873 pieces-size scalar mode for construction further. It returns NULL_TREE if
1874 fails to find the available composition.
1876 For example, for (vtype=V16QI, nelts=4), we can probably get:
1877 - V16QI with PTYPE V4QI.
1878 - V4SI with PTYPE SI.
1879 - NULL_TREE. */
1881 static tree
1883 {
1891 /* When we are asked to compose the vector from its components let
1892 that happen directly. */
1894 {
1897 }
1902 {
1903 /* First check if vec_init optab supports construction from
1904 vector pieces directly. */
1907 machine_mode rmode;
1911 {
1914 }
1916 /* Otherwise check if exists an integer type of the same piece size and
1917 if vec_init optab supports construction from it directly. */
1922 {
1925 }
1926 }
1929 }
1931 /* A subroutine of get_load_store_type, with a subset of the same
1932 arguments. Handle the case where STMT_INFO is part of a grouped load
1933 or store.
1935 For stores, the statements in the group are all consecutive
1936 and there is no gap at the end. For loads, the statements in the
1937 group might not be consecutive; there can be gaps between statements
1938 as well as at the end. */
1940 static bool
1950 {
1953 stmt_vec_info first_stmt_info;
1957 {
1961 }
1962 else
1963 {
1967 }
1973 /* True if the vectorized statements would access beyond the last
1974 statement in the group. */
1977 /* True if we can cope with such overrun by peeling for gaps, so that
1978 there is at least one final scalar iteration after the vector loop. */
1981 && loop_vinfo
1984 /* There can only be a gap at the end of the group if the stride is
1985 known at compile time. */
1988 /* Stores can't yet have gaps. */
1992 {
1993 /* For SLP vectorization we directly vectorize a subchain
1994 without permutation. */
1996 first_dr_info
1999 {
2000 /* Try to use consecutive accesses of DR_GROUP_SIZE elements,
2001 separated by the stride, until we have a complete vector.
2002 Fall back to scalar accesses if that isn't possible. */
2005 else
2007 }
2008 else
2009 {
2012 {
2014 "Grouped store with gaps requires"
2017 }
2018 /* An overrun is fine if the trailing elements are smaller
2019 than the alignment boundary B. Every vector access will
2020 be a multiple of B and so we are guaranteed to access a
2021 non-gap element in the same B-sized block. */
2024 vectype)
2028 /* If the gap splits the vector in half and the target
2029 can do half-vector operations avoid the epilogue peeling
2030 by simply loading half of the vector only. Usually
2031 the construction with an upper zero half will be elided. */
2032 dr_alignment_support alss;
2034 tree half_vtype;
2036 && !masked_p
2039 == dr_aligned
2048 {
2053 }
2056 {
2058 /* ??? The VMAT_CONTIGUOUS_REVERSE code generation is
2059 only correct for single element "interleaving" SLP. */
2062 else
2063 {
2064 /* Try to use consecutive accesses of DR_GROUP_SIZE elements,
2065 separated by the stride, until we have a complete vector.
2066 Fall back to scalar accesses if that isn't possible. */
2069 else
2071 }
2072 }
2074 {
2077 /* Invariant accesses perform only component accesses, alignment
2078 is irrelevant for them. */
2080 }
2081 else
2084 /* When we have a contiguous access across loop iterations
2085 but the access in the loop doesn't cover the full vector
2086 we can end up with no gap recorded but still excess
2087 elements accessed, see PR103116. Make sure we peel for
2088 gaps if necessary and sufficient and give up if not.
2090 If there is a combination of the access not covering the full
2091 vector and a gap recorded then we may need to peel twice. */
2096 nunits))
2097 {
2102 /* Peeling for gaps assumes that a single scalar iteration
2103 is enough to make sure the last vector iteration doesn't
2104 access excess elements.
2105 ??? Enhancements include peeling multiple iterations
2106 or using masked loads with a static mask. */
2108 {
2111 "peeling for gaps insufficient for "
2114 }
2116 }
2117 }
2118 }
2119 else
2120 {
2121 /* We can always handle this case using elementwise accesses,
2122 but see if something more efficient is available. */
2125 /* If there is a gap at the end of the group then these optimizations
2126 would access excess elements in the last iteration. */
2128 /* An overrun is fine if the trailing elements are smaller than the
2129 alignment boundary B. Every vector access will be a multiple of B
2130 and so we are guaranteed to access a non-gap element in the
2131 same B-sized block. */
2133 && !masked_p
2141 {
2142 /* First cope with the degenerate case of a single-element
2143 vector. */
2145 ;
2147 else
2148 {
2149 /* Otherwise try using LOAD/STORE_LANES. */
2150 *lanes_ifn
2154 masked_p);
2156 {
2159 }
2161 /* If that fails, try using permuting loads. */
2164 single_element_p,
2165 group_size)
2167 {
2170 }
2171 }
2172 }
2174 /* As a last resort, trying using a gather load or scatter store.
2176 ??? Although the code can handle all group sizes correctly,
2177 it probably isn't a win to use separate strided accesses based
2178 on nearby locations. Or, even if it's a win over scalar code,
2179 it might not be a win over vectorizing at a lower VF, if that
2180 allows us to use contiguous accesses. */
2182 && single_element_p
2183 && loop_vinfo
2187 }
2191 {
2194 }
2195 else
2196 {
2198 *alignment_support_scheme
2201 }
2204 {
2205 /* STMT is the leader of the group. Check the operands of all the
2206 stmts of the group. */
2209 {
2213 {
2218 }
2220 }
2221 }
2224 {
2228 "Data access with gaps requires scalar "
2231 }
2234 }
2236 /* Analyze load or store statement STMT_INFO of type VLS_TYPE. Return true
2237 if there is a memory access type that the vectorized form can use,
2238 storing it in *MEMORY_ACCESS_TYPE if so. If we decide to use gathers
2239 or scatters, fill in GS_INFO accordingly. In addition
2240 *ALIGNMENT_SUPPORT_SCHEME is filled out and false is returned if
2241 the target does not support the alignment scheme. *MISALIGNMENT
2242 is set according to the alignment of the access (including
2243 DR_MISALIGNMENT_UNKNOWN when it is unknown).
2245 SLP says whether we're performing SLP rather than loop vectorization.
2246 MASKED_P is true if the statement is conditional on a vectorized mask.
2247 VECTYPE is the vector type that the vectorized statements will use.
2248 NCOPIES is the number of vector statements that will be needed. */
2250 static bool
2261 {
2267 {
2271 /* When using internal functions, we rely on pattern recognition
2272 to convert the type of the offset to the type that the target
2273 requires, with the result being a call to an internal function.
2274 If that failed for some reason (e.g. because another pattern
2275 took priority), just handle cases in which the offset already
2276 has the right type. */
2281 {
2287 }
2291 {
2297 }
2299 {
2305 {
2308 "unsupported vector types for emulated "
2311 }
2312 }
2313 /* Gather-scatter accesses perform only component accesses, alignment
2314 is irrelevant for them. */
2316 }
2318 {
2320 masked_p,
2322 alignment_support_scheme,
2325 }
2327 {
2333 else
2335 /* Alignment is irrelevant here. */
2337 }
2338 else
2339 {
2342 {
2345 /* Invariant accesses perform only component accesses, alignment
2346 is irrelevant for them. */
2348 }
2349 else
2350 {
2354 else
2358 *alignment_support_scheme
2362 }
2363 }
2368 {
2371 "Not using elementwise accesses due to variable "
2374 }
2377 {
2382 }
2384 /* FIXME: At the moment the cost model seems to underestimate the
2385 cost of using elementwise accesses. This check preserves the
2386 traditional behavior until that can be fixed. */
2395 {
2400 }
2402 }
2404 /* Return true if boolean argument at MASK_INDEX is suitable for vectorizing
2405 conditional operation STMT_INFO. When returning true, store the mask
2406 in *MASK, the type of its definition in *MASK_DT_OUT, the type of the
2407 vectorized mask in *MASK_VECTYPE_OUT and the SLP node corresponding
2408 to the mask in *MASK_NODE if MASK_NODE is not NULL. */
2410 static bool
2415 {
2417 tree mask_vectype;
2418 slp_tree mask_node_1;
2421 {
2426 }
2429 {
2434 }
2436 /* If the caller is not prepared for adjusting an external/constant
2437 SLP mask vector type fail. */
2439 && !mask_node
2441 {
2446 }
2453 {
2458 }
2462 {
2465 "vector mask type %T"
2470 }
2477 }
2479 /* Return true if stored value RHS is suitable for vectorizing store
2480 statement STMT_INFO. When returning true, store the type of the
2481 definition in *RHS_DT_OUT, the type of the vectorized store value in
2482 *RHS_VECTYPE_OUT and the type of the store in *VLS_TYPE_OUT. */
2484 static bool
2489 {
2490 /* In the case this is a store from a constant make sure
2491 native_encode_expr can handle it. */
2493 {
2498 }
2502 {
2508 }
2511 tree rhs_vectype;
2512 slp_tree slp_op;
2515 {
2520 }
2524 {
2529 }
2535 else
2538 }
2540 /* Build an all-ones vector mask of type MASKTYPE while vectorizing STMT_INFO.
2541 Note that we support masks with floating-point type, in which case the
2542 floats are interpreted as a bitmask. */
2544 static tree
2547 {
2552 {
2556 }
2558 {
2559 REAL_VALUE_TYPE r;
2567 }
2569 }
2571 /* Build an all-zero merge value of type VECTYPE while vectorizing
2572 STMT_INFO as a gather load. */
2574 static tree
2577 {
2578 tree merge;
2582 {
2583 REAL_VALUE_TYPE r;
2589 }
2590 else
2594 }
2596 /* Build a gather load call while vectorizing STMT_INFO. Insert new
2597 instructions before GSI and add them to VEC_STMT. GS_INFO describes
2598 the gather load operation. If the load is conditional, MASK is the
2599 vectorized condition, otherwise MASK is null. PTR is the base
2600 pointer and OFFSET is the vectorized offset. */
2607 {
2616 tree var;
2618 && (!mask
2624 {
2632 }
2637 {
2639 {
2644 else
2648 gassign *new_stmt
2653 {
2660 }
2663 }
2664 else
2665 {
2668 }
2669 }
2670 else
2671 {
2674 }
2681 {
2689 }
2692 }
2694 /* Build a scatter store call while vectorizing STMT_INFO. Insert new
2695 instructions before GSI and add them to VEC_STMT. GS_INFO describes
2696 the scatter store operation. If the store is conditional, MASK is the
2697 unvectorized condition, otherwise MASK is null. */
2699 static void
2704 {
2710 poly_uint64 scatter_off_nunits
2713 /* FIXME: Keep the previous costing way in vect_model_store_cost by
2714 costing N scalar stores, but it should be tweaked to use target
2715 specific costs on related scatter store calls. */
2717 {
2731 "vect_model_store_cost: inside_cost = %d, "
2735 }
2741 {
2744 /* Currently gathers and scatters are only supported for
2745 fixed-length vectors. */
2754 }
2756 {
2759 /* Currently gathers and scatters are only supported for
2760 fixed-length vectors. */
2773 }
2774 else
2790 {
2791 gimple_seq seq;
2797 }
2801 {
2804 }
2812 {
2817 }
2830 {
2832 {
2836 else
2841 }
2843 {
2847 else
2852 }
2853 else
2854 {
2859 }
2862 {
2870 }
2873 {
2881 }
2884 {
2885 tree utype;
2888 {
2889 tree var
2891 gassign *new_stmt
2895 mask_op);
2898 }
2902 else
2906 gassign *new_stmt
2911 {
2917 }
2918 }
2920 gcall *new_stmt
2925 }
2927 }
2929 /* Prepare the base and offset in GS_INFO for vectorization.
2930 Set *DATAREF_PTR to the loop-invariant base address and *VEC_OFFSET
2931 to the vectorized offset argument for the first copy of STMT_INFO.
2932 STMT_INFO is the statement described by GS_INFO and LOOP is the
2933 containing loop. */
2935 static void
2940 {
2944 {
2945 basic_block new_bb;
2949 }
2952 else
2953 {
2954 unsigned ncopies
2959 }
2960 }
2962 /* Prepare to implement a grouped or strided load or store using
2963 the gather load or scatter store operation described by GS_INFO.
2964 STMT_INFO is the load or store statement.
2966 Set *DATAREF_BUMP to the amount that should be added to the base
2967 address after each copy of the vectorized statement. Set *VEC_OFFSET
2968 to an invariant offset vector in which element I has the value
2969 I * DR_STEP / SCALE. */
2971 static void
2973 loop_vec_info loop_vinfo,
2978 {
2983 {
2984 /* _31 = .SELECT_VL (ivtmp_29, POLY_INT_CST [4, 4]);
2985 ivtmp_8 = _31 * 16 (step in bytes);
2986 .MASK_LEN_SCATTER_STORE (vectp_a.9_7, ... );
2987 vectp_a.9_26 = vectp_a.9_7 + ivtmp_8; */
2988 tree loop_len
2990 tree tmp
2993 loop_len);
2995 GSI_SAME_STMT);
2996 }
2997 else
2998 {
2999 tree bump
3004 }
3006 /* The offset given in GS_INFO can have pointer type, so use the element
3007 type of the vector instead. */
3010 /* Calculate X = DR_STEP / SCALE and convert it to the appropriate type. */
3015 /* Create {0, X, X*2, X*3, ...}. */
3019 }
3021 /* Prepare the pointer IVs which needs to be updated by a variable amount.
3022 Such variable amount is the outcome of .SELECT_VL. In this case, we can
3023 allow each iteration process the flexible number of elements as long as
3024 the number <= vf elments.
3026 Return data reference according to SELECT_VL.
3027 If new statements are needed, insert them before GSI. */
3029 static tree
3033 vect_memory_access_type memory_access_type)
3034 {
3038 /* gather/scatter never reach here. */
3041 /* When we support SELECT_VL pattern, we dynamic adjust
3042 the memory address by .SELECT_VL result.
3044 The result of .SELECT_VL is the number of elements to
3045 be processed of each iteration. So the memory address
3046 adjustment operation should be:
3048 addr = addr + .SELECT_VL (ARG..) * step;
3049 */
3050 tree loop_len
3053 /* Since the outcome of .SELECT_VL is element size, we should adjust
3054 it into bytesize so that it can be used in address pointer variable
3055 amount IVs adjustment. */
3062 }
3064 /* Return the amount that should be added to a vector pointer to move
3065 to the next or previous copy of AGGR_TYPE. DR_INFO is the data reference
3066 being vectorized and MEMORY_ACCESS_TYPE describes the type of
3067 vectorization. */
3069 static tree
3072 vect_memory_access_type memory_access_type,
3074 {
3082 memory_access_type);
3089 }
3091 /* Check and perform vectorization of BUILT_IN_BSWAP{16,32,64,128}. */
3093 static bool
3099 {
3109 /* Multiple types in SLP are handled by creating the appropriate number of
3110 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
3111 case of SLP. */
3114 else
3128 /* The encoding uses one stepped pattern for each byte in the word. */
3140 {
3143 {
3148 }
3155 slp_node
3159 }
3163 /* Transform. */
3167 /* Arguments are ready. create the new vector stmt. */
3169 tree vop;
3171 {
3187 else
3189 }
3196 }
3198 /* Return true if vector types VECTYPE_IN and VECTYPE_OUT have
3199 integer elements and if we can narrow VECTYPE_IN to VECTYPE_OUT
3200 in a single step. On success, store the binary pack code in
3201 *CONVERT_CODE. */
3203 static bool
3206 {
3211 code_helper code;
3221 }
3223 /* Function vectorizable_call.
3225 Check if STMT_INFO performs a function call that can be vectorized.
3226 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
3227 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
3228 Return true if STMT_INFO is vectorizable in this way. */
3230 static bool
3235 {
3237 tree vec_dest;
3238 tree scalar_dest;
3239 tree op;
3242 poly_uint64 nunits_in;
3243 poly_uint64 nunits_out;
3249 vect_unknown_def_type };
3257 tree lhs;
3266 /* Is STMT_INFO a vectorizable call? */
3274 /* Handled by vectorizable_load and vectorizable_store. */
3285 /* Process function arguments. */
3290 /* Bail out if the function has more than four arguments, we do not have
3291 interesting builtin functions to vectorize with more than two arguments
3292 except for fma. No arguments is also not good. */
3296 /* Ignore the arguments of IFN_GOMP_SIMD_LANE, they are magic. */
3299 {
3302 }
3309 {
3311 {
3316 }
3320 {
3325 }
3327 /* We can only handle calls with arguments of the same type. */
3330 {
3335 }
3343 {
3348 }
3349 }
3350 /* If all arguments are external or constant defs, infer the vector type
3351 from the scalar type. */
3357 {
3363 }
3364 /* FORNOW: we don't yet support mixtures of vector sizes for calls,
3365 just mixtures of nunits. E.g. DI->SI versions of __builtin_ctz*
3366 are traditionally vectorized as two VnDI->VnDI IFN_CTZs followed
3367 by a pack of the two vectors into an SI vector. We would need
3368 separate code to handle direct VnDI->VnSI IFN_CTZs. */
3370 {
3376 }
3380 {
3385 }
3388 {
3393 }
3395 /* FORNOW */
3404 else
3407 /* We only handle functions that do not read or clobber memory. */
3409 {
3414 }
3416 /* For now, we only vectorize functions if a target specific builtin
3417 is available. TODO -- in some cases, it might be profitable to
3418 insert the calls for pieces of the vector, in order to be able
3419 to vectorize other operations in the loop. */
3424 /* First try using an internal function. */
3432 vectype_in);
3434 /* If that fails, try asking for a target-specific built-in function. */
3436 {
3443 }
3446 {
3448 && !slp_node
3449 && loop_vinfo
3454 {
3455 /* We can handle IFN_GOMP_SIMD_LANE by returning a
3456 { 0, 1, 2, ... vf - 1 } vector. */
3458 }
3466 else
3467 {
3472 }
3473 }
3479 else
3482 /* Sanity check: make sure that at least one copy of the vectorized stmt
3483 needs to be generated. */
3493 {
3499 {
3504 }
3516 {
3520 OPTIMIZE_FOR_SPEED))
3523 OPTIMIZE_FOR_SPEED)))
3524 {
3527 "can't use a fully-masked loop because no"
3530 }
3531 else
3532 {
3533 unsigned int nvectors
3534 = (slp_node
3542 OPTIMIZE_FOR_SPEED))
3545 else
3547 scalar_mask);
3548 }
3549 }
3551 }
3553 /* Transform. */
3558 /* Handle def. */
3566 {
3568 {
3570 /* COND_* -> COND_LEN_* takes 2 extra arguments:LEN,BIAS. */
3572 }
3575 }
3577 {
3580 }
3583 {
3588 {
3589 /* Build argument list for the vectorized call. */
3591 {
3597 /* Arguments are ready. Create the new vector stmt. */
3599 {
3602 {
3604 /* Always true for SLP. */
3609 }
3612 {
3615 }
3620 {
3621 /* We don't define any narrowing conditional functions
3622 at present. */
3625 gcall *call
3631 {
3634 }
3640 }
3641 else
3642 {
3644 {
3646 /* Always true for SLP. */
3648 tree len
3651 signed char biasval
3656 }
3658 {
3660 /* Always true for SLP. */
3668 }
3673 else
3680 }
3682 }
3684 }
3691 {
3694 {
3699 }
3701 }
3706 {
3709 signed char biasval
3714 }
3716 {
3722 }
3726 {
3728 tree new_var
3735 }
3737 {
3738 /* We don't define any narrowing conditional functions at
3739 present. */
3747 {
3750 }
3753 half_res);
3755 }
3756 else
3757 {
3761 else
3768 }
3773 }
3775 {
3778 }
3779 }
3781 {
3783 /* We don't define any narrowing conditional functions at present. */
3786 {
3787 /* Build argument list for the vectorized call. */
3790 else
3794 {
3800 /* Arguments are ready. Create the new vector stmt. */
3802 {
3806 {
3810 }
3814 else
3821 }
3823 }
3826 {
3829 {
3833 }
3839 }
3847 }
3853 {
3856 }
3857 }
3858 else
3859 /* No current target implements this case. */
3864 /* The call in STMT might prevent it from being removed in dce.
3865 We however cannot remove it here, due to the way the ssa name
3866 it defines is mapped to the new definition. So just replace
3867 rhs of the statement with something harmless. */
3875 gassign *new_stmt
3880 }
3883 struct simd_call_arg_info
3884 {
3885 tree vectype;
3886 tree op;
3887 HOST_WIDE_INT linear_step;
3891 };
3893 /* Helper function of vectorizable_simd_clone_call. If OP, an SSA_NAME,
3894 is linear within simd lane (but not within whole loop), note it in
3895 *ARGINFO. */
3897 static void
3900 {
3912 {
3913 tree t;
3917 {
3932 CASE_CONVERT:
3944 }
3950 {
3957 }
3958 }
3959 }
3961 /* Function vectorizable_simd_clone_call.
3963 Check if STMT_INFO performs a function call that can be vectorized
3964 by calling a simd clone of the function.
3965 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
3966 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
3967 Return true if STMT_INFO is vectorizable in this way. */
3969 static bool
3973 stmt_vector_for_cost *)
3974 {
3975 tree vec_dest;
3976 tree scalar_dest;
3979 tree vectype;
3980 poly_uint64 nunits;
3993 /* Is STMT a vectorizable call? */
4001 {
4007 }
4033 /* Process function arguments. */
4036 /* Bail out if the function has zero arguments. */
4047 {
4048 simd_call_arg_info thisarginfo;
4049 affine_iv iv;
4063 {
4068 }
4072 {
4077 slp_node);
4078 }
4079 else
4082 /* For linear arguments, the analyze phase should have saved
4083 the base and step in {STMT_VINFO,SLP_TREE}_SIMD_CLONE_INFO. */
4086 {
4090 thisarginfo.simd_lane_linear
4092 /* If loop has been peeled for alignment, we need to adjust it. */
4096 {
4102 thisarginfo.op
4106 }
4107 }
4111 && loop_vinfo
4116 {
4119 }
4124 /* Addresses of array elements indexed by GOMP_SIMD_LANE are
4125 linear too. */
4128 && !vec_stmt
4131 && loop_vinfo
4136 }
4144 else
4147 {
4164 {
4166 {
4197 /* FORNOW */
4201 /* While we can create a traditional data vector from
4202 an incoming integer mode mask we have no good way to
4203 force generate an integer mode mask from a traditional
4204 boolean vector input. */
4212 }
4216 {
4219 }
4223 }
4229 {
4231 SIMD_CLONE_ARG_TYPE_MASK);
4232 /* Penalize using a masked SIMD clone in a non-masked loop, that is
4233 not in a branch, as we'd have to construct an all-true mask. */
4236 }
4238 {
4241 }
4242 }
4251 num_mask_args++;
4254 {
4258 {
4262 slp_node);
4267 }
4271 {
4276 }
4279 {
4282 {
4285 {
4286 /* FORNOW we only have partial support for vector-type masks
4287 that can't hold all of simdlen. */
4290 vect_location,
4291 "in-branch vector clones are not yet"
4294 }
4295 }
4297 {
4300 num_mask_args),
4302 {
4303 /* FORNOW we only have partial support for integer-type masks
4304 that represent the same number of lanes as the
4305 vectorized mask inputs. */
4308 vect_location,
4309 "in-branch vector clones are not yet "
4312 }
4313 }
4314 else
4315 {
4318 vect_location,
4319 "in-branch vector clones not supported"
4322 }
4323 }
4324 }
4330 else
4333 /* If the function isn't const, only allow it in simd loops where user
4334 has asserted that at least nunits consecutive iterations can be
4335 performed using SIMD instructions. */
4340 /* Sanity check: make sure that at least one copy of the vectorized stmt
4341 needs to be generated. */
4345 {
4349 {
4354 }
4355 /* When the original call is pure or const but the SIMD ABI dictates
4356 an aggregate return we will have to use a virtual definition and
4357 in a loop eventually even need to add a virtual PHI. That's
4358 not straight-forward so allow to fix this up via renaming. */
4363 /* ??? For SLP code-gen we end up inserting after the last
4364 vector argument def rather than at the original call position
4365 so automagic virtual operand updating doesn't work. */
4370 {
4372 {
4377 {
4388 }
4398 }
4399 }
4402 {
4406 "can't use a fully-masked loop because a"
4409 }
4413 /* vect_model_simple_cost (vinfo, stmt_info, ncopies,
4414 dt, slp_node, cost_vec); */
4416 }
4418 /* Transform. */
4423 /* Handle def. */
4429 {
4433 {
4436 }
4437 }
4443 {
4446 }
4447 else
4450 {
4451 poly_uint64 callee_nelements;
4452 poly_uint64 caller_nelements;
4453 /* Build argument list for the vectorized call. */
4456 else
4460 {
4462 tree atype;
4465 {
4472 {
4474 {
4482 {
4489 }
4490 else
4491 {
4495 }
4497 vec_oprnd0
4501 gassign *new_stmt
4503 vec_oprnd0);
4507 }
4508 else
4509 {
4517 else
4520 {
4522 {
4526 op,
4530 }
4531 else
4537 vec_oprnd0);
4538 }
4541 atype))
4542 {
4544 vec_oprnd0);
4545 gassign *new_stmt
4547 vec_oprnd0);
4551 }
4552 else
4554 else
4555 {
4557 gassign *new_stmt
4559 vec_oprnd0);
4563 }
4564 }
4565 }
4569 {
4578 {
4580 {
4581 /* The mask type has fewer elements than simdlen. */
4583 /* FORNOW */
4585 }
4587 {
4588 /* The SIMD clone function has the same number of
4589 elements as the current function. */
4591 {
4595 op,
4598 }
4602 {
4603 vec_loop_masks *loop_masks
4605 tree loop_mask
4609 vec_oprnd0
4613 gsi);
4615 loop_mask });
4617 }
4618 vec_oprnd0
4622 gassign *new_stmt
4624 vec_oprnd0);
4628 }
4629 else
4630 {
4631 /* The mask type has more elements than simdlen. */
4633 /* FORNOW */
4635 }
4636 }
4637 }
4639 {
4641 /* Guess the number of lanes represented by atype. */
4642 poly_uint64 atype_subparts
4644 num_mask_args);
4647 {
4649 {
4653 op,
4656 }
4659 {
4660 /* The mask argument has fewer elements than the
4661 input vector. */
4662 /* FORNOW */
4664 }
4667 {
4668 /* The vector mask argument matches the input
4669 in the number of lanes, but not necessarily
4670 in the mode. */
4675 vec_oprnd0);
4676 gassign *new_stmt
4678 vec_oprnd0);
4682 {
4683 new_stmt
4685 NOP_EXPR,
4686 gimple_assign_lhs
4690 }
4692 }
4693 else
4694 {
4695 /* The mask argument has more elements than the
4696 input vector. */
4697 /* FORNOW */
4699 }
4700 }
4701 }
4702 else
4711 {
4712 gimple_seq stmts;
4717 {
4718 basic_block new_bb;
4722 }
4724 {
4727 }
4732 enum tree_code code
4737 poly_widest_int cst
4742 gassign *new_stmt
4747 UNKNOWN_LOCATION);
4750 }
4751 else
4752 {
4753 enum tree_code code
4758 poly_widest_int cst
4763 gassign *new_stmt
4768 }
4778 }
4779 }
4784 {
4787 tree mask;
4789 SIMD_CLONE_ARG_TYPE_MASK);
4795 {
4797 {
4801 }
4802 else
4806 {
4809 {
4810 /* This means we are dealing with integer mask modes.
4811 First convert to an integer type with the same size as
4812 the current vector type. */
4813 unsigned HOST_WIDE_INT intermediate_size
4815 tree mid_int_type =
4818 new_stmt
4820 mask);
4822 /* Then zero-extend to the mask mode. */
4825 }
4826 else
4830 mask);
4834 }
4836 }
4837 }
4841 {
4848 else
4851 }
4856 {
4858 {
4866 {
4867 tree t;
4869 {
4873 }
4874 else
4885 else
4887 }
4892 }
4894 {
4903 {
4908 {
4912 tem);
4917 }
4919 }
4920 else
4925 new_stmt
4934 else
4937 }
4939 {
4946 }
4948 {
4950 new_stmt
4953 }
4954 }
4960 else
4962 }
4965 {
4968 }
4971 /* Mark the clone as no longer being a candidate for GC. */
4974 /* The call in STMT might prevent it from being removed in dce.
4975 We however cannot remove it here, due to the way the ssa name
4976 it defines is mapped to the new definition. So just replace
4977 rhs of the statement with something harmless. */
4984 {
4988 }
4989 else
4995 }
4998 /* Function vect_gen_widened_results_half
5000 Create a vector stmt whose code, type, number of arguments, and result
5001 variable are CODE, OP_TYPE, and VEC_DEST, and its arguments are
5002 VEC_OPRND0 and VEC_OPRND1. The new vector stmt is to be inserted at GSI.
5003 In the case that CODE is a CALL_EXPR, this means that a call to DECL
5004 needs to be created (DECL is a function-decl of a target-builtin).
5005 STMT_INFO is the original scalar stmt that we are vectorizing. */
5011 stmt_vec_info stmt_info)
5012 {
5014 tree new_temp;
5016 /* Generate half of the widened result: */
5025 }
5028 /* Create vectorized demotion statements for vector operands from VEC_OPRNDS.
5029 For multi-step conversions store the resulting vectors and call the function
5030 recursively. When NARROW_SRC_P is true, there's still a conversion after
5031 narrowing, don't store the vectors in the SLP_NODE or in vector info of
5032 the scalar statement(or in STMT_VINFO_RELATED_STMT chain). */
5034 static void
5037 stmt_vec_info stmt_info,
5042 {
5049 {
5050 /* Create demotion operation. */
5058 /* Store the resulting vector for next recursive call,
5059 or return the resulting vector_tmp for NARROW FLOAT_EXPR. */
5061 else
5062 {
5063 /* This is the last step of the conversion sequence. Store the
5064 vectors in SLP_NODE or in vector info of the scalar statement
5065 (or in STMT_VINFO_RELATED_STMT chain). */
5068 else
5070 }
5071 }
5073 /* For multi-step demotion operations we first generate demotion operations
5074 from the source type to the intermediate types, and then combine the
5075 results (stored in VEC_OPRNDS) in demotion operation to the destination
5076 type. */
5078 {
5079 /* At each level of recursion we have half of the operands we had at the
5080 previous level. */
5086 narrow_src_p);
5087 }
5090 }
5093 /* Create vectorized promotion statements for vector operands from VEC_OPRNDS0
5094 and VEC_OPRNDS1, for a binary operation associated with scalar statement
5095 STMT_INFO. For multi-step conversions store the resulting vectors and
5096 call the function recursively. */
5098 static void
5104 code_helper ch1,
5106 {
5114 {
5117 else
5120 /* Generate the two halves of promotion operation. */
5123 stmt_info);
5126 stmt_info);
5128 {
5131 }
5132 else
5133 {
5136 }
5138 /* Store the results for the next step. */
5141 }
5145 }
5147 /* Create vectorized promotion stmts for widening stmts using only half the
5148 potential vector size for input. */
5149 static void
5155 code_helper code1,
5157 {
5167 {
5173 /* Widen the first vector input. */
5179 {
5180 /* Widen the second vector input. */
5184 /* Perform the operation. With both vector inputs widened. */
5186 }
5187 else
5188 {
5189 /* Perform the operation. With the single vector input widened. */
5191 }
5197 /* Store the results for the next step. */
5199 }
5203 }
5206 /* Check if STMT_INFO performs a conversion operation that can be vectorized.
5207 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
5208 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
5209 Return true if STMT_INFO is vectorizable in this way. */
5211 static bool
5216 {
5218 tree scalar_dest;
5224 tree new_temp;
5227 poly_uint64 nunits_in;
5228 poly_uint64 nunits_out;
5232 /* For conversions between floating point and integer, there're 2 NARROW
5233 cases. NARROW_SRC is for FLOAT_EXPR, means
5234 integer --DEMOTION--> integer --FLOAT_EXPR--> floating point.
5235 This is safe when the range of the source integer can fit into the lower
5236 precision. NARROW_DST is for FIX_TRUNC_EXPR, means
5237 floating point --FIX_TRUNC_EXPR--> integer --DEMOTION--> INTEGER.
5238 For other conversions, when there's narrowing, NARROW_DST is used as
5239 default. */
5243 tree vop0;
5251 /* Is STMT a vectorizable conversion? */
5272 {
5275 }
5277 {
5280 }
5281 else
5294 /* Check types of lhs and rhs. */
5299 /* Check the operands of the operation. */
5303 {
5308 }
5323 {
5326 "type conversion to/from bit-precision unsupported."
5329 }
5332 {
5339 tree vectype1_in;
5342 {
5347 }
5348 /* For WIDEN_MULT_EXPR, if OP0 is a constant, use the type of
5349 OP1. */
5352 }
5354 /* If op0 is an external or constant def, infer the vector type
5355 from the scalar type. */
5361 {
5367 }
5371 {
5374 "can't convert between boolean and non "
5378 }
5385 else
5389 else
5390 {
5393 }
5395 /* Multiple types in SLP are handled by creating the appropriate number of
5396 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
5397 case of SLP. */
5402 else
5405 /* Sanity check: make sure that at least one copy of the vectorized stmt
5406 needs to be generated. */
5412 opt_scalar_mode rhs_mode_iter;
5414 /* Supportable by target? */
5416 {
5425 {
5428 }
5430 /* For conversions between float and integer types try whether
5431 we can use intermediate signed integer types to support the
5432 conversion. */
5436 {
5440 scalar_mode intermediate_mode;
5442 {
5445 }
5446 else
5447 {
5452 }
5455 opt_scalar_mode mode_iter;
5457 {
5463 scalar_mode cvt_mode;
5468 cvt_type = build_nonstandard_integer_type
5471 /* Check if the intermediate type can hold OP0's range.
5472 When converting from float to integer this is not necessary
5473 because values that do not fit the (smaller) target type are
5474 unspecified anyway. */
5476 {
5487 }
5490 /* This should only happened for SLP as long as loop vectorizer
5491 only supports same-sized vector. */
5495 vectype_out,
5498 cvt_type,
5504 }
5507 {
5508 multi_step_cvt++;
5514 }
5515 }
5516 /* FALLTHRU */
5517 unsupported:
5525 {
5534 }
5539 {
5540 /* Binary widening operation can only be supported directly by the
5541 architecture. */
5544 }
5552 {
5557 cvt_type
5564 {
5571 }
5578 else
5582 cvt_type,
5586 {
5589 }
5590 }
5597 else
5598 {
5599 multi_step_cvt++;
5602 }
5616 {
5617 cvt_type
5625 else
5631 }
5632 /* If op0 can be represented with low precision integer,
5633 truncate it to cvt_type and the do FLOAT_EXPR. */
5635 {
5640 cvt_type
5658 {
5662 }
5663 }
5669 }
5672 {
5676 {
5681 }
5684 {
5689 }
5691 {
5693 /* The final packing step produces one vector result per copy. */
5694 unsigned int nvectors
5698 widen_arith);
5699 }
5700 else
5701 {
5703 /* The initial unpacking step produces two vector results
5704 per copy. MULTI_STEP_CVT is 0 for a single conversion,
5705 so >> MULTI_STEP_CVT divides by 2^(number of steps - 1). */
5706 unsigned int nvectors
5707 = (slp_node
5712 widen_arith);
5713 }
5716 }
5718 /* Transform. */
5724 {
5729 }
5731 /* In case of multi-step conversion, we first generate conversion operations
5732 to the intermediate types, and then from that types to the final one.
5733 We create vector destinations for the intermediate type (TYPES) received
5734 from supportable_*_operation, and store them in the correct order
5735 for future use in vect_create_vectorized_*_stmts (). */
5737 bool widen_or_narrow_float_p
5740 widen_or_narrow_float_p
5745 {
5748 {
5750 intermediate_type);
5752 }
5753 }
5757 widen_or_narrow_float_p
5762 {
5764 ;
5766 {
5770 }
5771 }
5774 {
5778 /* vec_dest is intermediate type operand when multi_step_cvt. */
5780 {
5783 }
5786 {
5787 /* Arguments are ready, create the new vector stmt. */
5790 {
5797 }
5805 else
5807 }
5811 /* In case the vectorization factor (VF) is bigger than the number
5812 of elements that we can fit in a vectype (nunits), we have to
5813 generate more than one vector stmt - i.e - we need to "unroll"
5814 the vector stmt by a factor VF/nunits. */
5820 {
5825 }
5826 /* Arguments are ready. Create the new vector stmts. */
5828 {
5832 {
5835 }
5839 op_type);
5840 else
5845 }
5848 {
5851 {
5855 }
5856 else
5861 else
5863 }
5868 /* In case the vectorization factor (VF) is bigger than the number
5869 of elements that we can fit in a vectype (nunits), we have to
5870 generate more than one vector stmt - i.e - we need to "unroll"
5871 the vector stmt by a factor VF/nunits. */
5874 /* Arguments are ready. Create the new vector stmts. */
5877 {
5882 }
5885 multi_step_cvt,
5889 /* After demoting op0 to cvt_type, convert it to dest. */
5891 {
5893 {
5894 /* Arguments are ready, create the new vector stmt. */
5896 gimple *new_stmt
5902 /* This is the last step of the conversion sequence. Store the
5903 vectors in SLP_NODE or in vector info of the scalar statement
5904 (or in STMT_VINFO_RELATED_STMT chain). */
5907 else
5909 }
5910 }
5912 }
5921 }
5923 /* Return true if we can assume from the scalar form of STMT_INFO that
5924 neither the scalar nor the vector forms will generate code. STMT_INFO
5925 is known not to involve a data reference. */
5927 bool
5929 {
5945 }
5947 /* Function vectorizable_assignment.
5949 Check if STMT_INFO performs an assignment (copy) that can be vectorized.
5950 If VEC_STMT is also passed, vectorize the STMT_INFO: create a vectorized
5951 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
5952 Return true if STMT_INFO is vectorizable in this way. */
5954 static bool
5959 {
5960 tree vec_dest;
5961 tree scalar_dest;
5962 tree op;
5964 tree new_temp;
5970 tree vop;
5973 tree vectype_in;
5982 /* Is vectorizable assignment? */
6003 /* Multiple types in SLP are handled by creating the appropriate number of
6004 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
6005 case of SLP. */
6008 else
6013 slp_tree slp_op;
6016 {
6021 }
6025 /* We can handle NOP_EXPR conversions that do not change the number
6026 of elements or the vector size. */
6029 && (!vectype_in
6036 {
6039 "can't convert between boolean and non "
6043 }
6045 /* We do not handle bit-precision changes. */
6052 /* But a conversion that does not change the bit-pattern is ok. */
6058 {
6061 "type conversion to/from bit-precision "
6064 }
6067 {
6070 {
6075 }
6080 cost_vec);
6082 }
6084 /* Transform. */
6088 /* Handle def. */
6091 /* Handle use. */
6094 /* Arguments are ready. create the new vector stmt. */
6096 {
6106 else
6108 }
6114 }
6117 /* Return TRUE if CODE (a shift operation) is supported for SCALAR_TYPE
6118 either as shift by a scalar or by a vector. */
6120 bool
6122 {
6124 machine_mode vec_mode;
6125 optab optab;
6127 tree vectype;
6136 {
6142 }
6150 }
6153 /* Function vectorizable_shift.
6155 Check if STMT_INFO performs a shift operation that can be vectorized.
6156 If VEC_STMT is also passed, vectorize the STMT_INFO: create a vectorized
6157 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
6158 Return true if STMT_INFO is vectorizable in this way. */
6160 static bool
6165 {
6166 tree vec_dest;
6167 tree scalar_dest;
6170 tree vectype;
6173 machine_mode vec_mode;
6174 tree new_temp;
6175 optab optab;
6177 machine_mode optab_op2_mode;
6180 poly_uint64 nunits_in;
6181 poly_uint64 nunits_out;
6182 tree vectype_out;
6183 tree op1_vectype;
6202 /* Is STMT a vectorizable binary/unary operation? */
6219 {
6224 }
6226 slp_tree slp_op0;
6229 {
6234 }
6235 /* If op0 is an external or constant def, infer the vector type
6236 from the scalar type. */
6242 {
6247 }
6254 stmt_vec_info op1_def_stmt_info;
6255 slp_tree slp_op1;
6258 {
6263 }
6265 /* Multiple types in SLP are handled by creating the appropriate number of
6266 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
6267 case of SLP. */
6270 else
6275 /* Determine whether the shift amount is a vector, or scalar. If the
6276 shift/rotate amount is a vector, use the vector/vector shift optabs. */
6286 {
6287 /* In SLP, need to check whether the shift count is the same,
6288 in loops if it is a constant or invariant, it is always
6289 a scalar shift. */
6291 {
6293 stmt_vec_info slpstmt_info;
6296 {
6300 }
6302 /* For internal SLP defs we have to make sure we see scalar stmts
6303 for all vector elements.
6304 ??? For different vectors we could resort to a different
6305 scalar shift operand but code-generation below simply always
6306 takes the first. */
6311 }
6313 /* If the shift amount is computed by a pattern stmt we cannot
6314 use the scalar amount directly thus give up and use a vector
6315 shift. */
6318 }
6319 else
6320 {
6325 }
6327 /* Vector shifted by vector. */
6330 {
6338 slp_op1);
6339 incompatible_op1_vectype_p
6345 && (!slp_node
6348 {
6351 "unusable type for last operand in"
6354 }
6355 }
6356 /* See if the machine has a vector shifted by scalar insn and if not
6357 then see if it has a vector shifted by vector insn. */
6358 else
6359 {
6363 {
6367 }
6368 else
6369 {
6374 {
6384 slp_op1);
6386 /* Unlike the other binary operators, shifts/rotates have
6387 the rhs being int, instead of the same type as the lhs,
6388 so make sure the scalar is the right type if we are
6389 dealing with vectors of long long/long/short/char. */
6390 incompatible_op1_vectype_p
6391 = (!op1_vectype
6396 {
6399 "unusable type for last operand in"
6402 }
6403 }
6404 }
6405 }
6407 /* Supportable by target? */
6409 {
6414 }
6418 {
6423 }
6424 /* vector lowering cannot optimize vector shifts using word arithmetic. */
6429 {
6433 && (!incompatible_op1_vectype_p
6435 && !vect_maybe_update_slp_op_vectype
6438 {
6443 }
6444 /* Now adjust the constant shift amount in place. */
6446 && incompatible_op1_vectype_p
6448 {
6451 {
6457 }
6458 }
6464 }
6466 /* Transform. */
6473 {
6479 }
6481 /* Handle def. */
6485 {
6486 /* Vector shl and shr insn patterns can be defined with scalar
6487 operand 2 (shift operand). In this case, use constant or loop
6488 invariant op1 directly, without extending it to vector mode
6489 first. */
6492 {
6499 /* Store vec_oprnd1 for every vector stmt to be created.
6500 We check during the analysis that all the shift arguments
6501 are the same.
6502 TODO: Allow different constants for different vector
6503 stmts generated for an SLP instance. */
6507 }
6508 }
6510 {
6512 {
6513 /* If the argument was the same in all lanes create
6514 the correctly typed vector shift amount directly. */
6523 }
6525 /* The constant shift amount has been adjusted in place. */
6526 ;
6527 else
6529 }
6531 /* vec_oprnd1 is available if operand 1 should be of a scalar-type
6532 (a special case for certain kind of vector shifts); otherwise,
6533 operand 1 should be of a vector type (the usual case). */
6538 /* Arguments are ready. Create the new vector stmt. */
6540 {
6541 /* For internal defs where we need to use a scalar shift arg
6542 extract the first lane. */
6544 {
6547 gassign *new_stmt
6550 vop1,
6552 bitsize_zero_node));
6555 }
6556 else
6564 else
6566 }
6575 }
6577 /* Function vectorizable_operation.
6579 Check if STMT_INFO performs a binary, unary or ternary operation that can
6580 be vectorized.
6581 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
6582 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
6583 Return true if STMT_INFO is vectorizable in this way. */
6585 static bool
6590 {
6591 tree vec_dest;
6592 tree scalar_dest;
6594 tree vectype;
6597 machine_mode vec_mode;
6598 tree new_temp;
6600 optab optab;
6605 poly_uint64 nunits_in;
6606 poly_uint64 nunits_out;
6607 tree vectype_out;
6623 /* Is STMT a vectorizable binary/unary operation? */
6628 /* Loads and stores are handled in vectorizable_{load,store}. */
6634 /* Shifts are handled in vectorizable_shift. */
6641 /* Comparisons are handled in vectorizable_comparison. */
6645 /* Conditions are handled in vectorizable_condition. */
6649 /* For pointer addition and subtraction, we should use the normal
6650 plus and minus for the vector operation. */
6656 /* Support only unary or binary operations. */
6659 {
6663 op_type);
6665 }
6670 /* Most operations cannot handle bit-precision types without extra
6671 truncations. */
6675 /* Exception are bitwise binary operations. */
6679 {
6684 }
6686 slp_tree slp_op0;
6689 {
6694 }
6697 /* If op0 is an external or constant def, infer the vector type
6698 from the scalar type. */
6700 {
6701 /* For boolean type we cannot determine vectype by
6702 invariant value (don't know whether it is a vector
6703 of booleans or vector of integers). We use output
6704 vectype because operations on boolean don't change
6705 type. */
6707 {
6709 {
6714 }
6716 }
6717 else
6719 slp_node);
6720 }
6724 {
6731 }
6741 {
6744 {
6749 }
6755 }
6757 {
6760 {
6765 }
6771 }
6773 /* Multiple types in SLP are handled by creating the appropriate number of
6774 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
6775 case of SLP. */
6777 {
6780 }
6781 else
6782 {
6785 }
6789 /* Reject attempts to combine mask types with nonmask types, e.g. if
6790 we have an AND between a (nonmask) boolean loaded from memory and
6791 a (mask) boolean result of a comparison.
6793 TODO: We could easily fix these cases up using pattern statements. */
6797 {
6802 }
6804 /* Supportable by target? */
6809 else
6810 {
6813 {
6818 }
6821 }
6825 {
6829 /* When vec_mode is not a vector mode and we verified ops we
6830 do not have to lower like AND are natively supported let
6831 those through even when the mode isn't word_mode. For
6832 ops we have to lower the lowering code assumes we are
6833 dealing with word_mode. */
6837 /* Check only during analysis. */
6839 {
6843 }
6848 }
6856 /* If operating on inactive elements could generate spurious traps,
6857 we need to restrict the operation to active lanes. Note that this
6858 specifically doesn't apply to unhoisted invariants, since they
6859 operate on the same value for every lane.
6861 Similarly, if this operation is part of a reduction, a fully-masked
6862 loop should only change the active lanes of the reduction chain,
6863 keeping the inactive lanes as-is. */
6868 {
6872 {
6875 OPTIMIZE_FOR_SPEED))
6880 OPTIMIZE_FOR_SPEED))
6883 else
6884 {
6887 "can't use a fully-masked loop because no"
6890 }
6891 }
6893 /* Put types on constant and invariant SLP children. */
6898 {
6903 }
6910 {
6911 /* The above vect_model_simple_cost call handles constants
6912 in the prologue and (mis-)costs one of the stmts as
6913 vector stmt. See below for the actual lowering that will
6914 be applied. */
6915 unsigned n
6918 {
6929 /* Bit operations do not have extra cost and are accounted
6930 as vector stmt by vect_model_simple_cost. */
6933 }
6935 {
6936 /* We also need to materialize two large constants. */
6941 }
6942 }
6944 }
6946 /* Transform. */
6955 /* POINTER_DIFF_EXPR has pointer arguments which are vectorized as
6956 vectors with unsigned elements, but the result is signed. So, we
6957 need to compute the MINUS_EXPR into vectype temporary and
6958 VIEW_CONVERT_EXPR it into the final vectype_out result. */
6961 {
6964 }
6965 /* Handle def. */
6966 else
6969 /* In case the vectorization factor (VF) is bigger than the number
6970 of elements that we can fit in a vectype (nunits), we have to generate
6971 more than one vector stmt - i.e - we need to "unroll" the
6972 vector stmt by a factor VF/nunits. In doing so, we record a pointer
6973 from one copy of the vector stmt to the next, in the field
6974 STMT_VINFO_RELATED_STMT. This is necessary in order to allow following
6975 stages to find the correct vector defs to be used when vectorizing
6976 stmts that use the defs of the current stmt. The example below
6977 illustrates the vectorization process when VF=16 and nunits=4 (i.e.,
6978 we need to create 4 vectorized stmts):
6980 before vectorization:
6981 RELATED_STMT VEC_STMT
6982 S1: x = memref - -
6983 S2: z = x + 1 - -
6985 step 1: vectorize stmt S1 (done in vectorizable_load. See more details
6986 there):
6987 RELATED_STMT VEC_STMT
6988 VS1_0: vx0 = memref0 VS1_1 -
6989 VS1_1: vx1 = memref1 VS1_2 -
6990 VS1_2: vx2 = memref2 VS1_3 -
6991 VS1_3: vx3 = memref3 - -
6992 S1: x = load - VS1_0
6993 S2: z = x + 1 - -
6995 step2: vectorize stmt S2 (done here):
6996 To vectorize stmt S2 we first need to find the relevant vector
6997 def for the first operand 'x'. This is, as usual, obtained from
6998 the vector stmt recorded in the STMT_VINFO_VEC_STMT of the stmt
6999 that defines 'x' (S1). This way we find the stmt VS1_0, and the
7000 relevant vector def 'vx0'. Having found 'vx0' we can generate
7001 the vector stmt VS2_0, and as usual, record it in the
7002 STMT_VINFO_VEC_STMT of stmt S2.
7003 When creating the second copy (VS2_1), we obtain the relevant vector
7004 def from the vector stmt recorded in the STMT_VINFO_RELATED_STMT of
7005 stmt VS1_0. This way we find the stmt VS1_1 and the relevant
7006 vector def 'vx1'. Using 'vx1' we create stmt VS2_1 and record a
7007 pointer to it in the STMT_VINFO_RELATED_STMT of the vector stmt VS2_0.
7008 Similarly when creating stmts VS2_2 and VS2_3. This is the resulting
7009 chain of stmts and pointers:
7010 RELATED_STMT VEC_STMT
7011 VS1_0: vx0 = memref0 VS1_1 -
7012 VS1_1: vx1 = memref1 VS1_2 -
7013 VS1_2: vx2 = memref2 VS1_3 -
7014 VS1_3: vx3 = memref3 - -
7015 S1: x = load - VS1_0
7016 VS2_0: vz0 = vx0 + v1 VS2_1 -
7017 VS2_1: vz1 = vx1 + v1 VS2_2 -
7018 VS2_2: vz2 = vx2 + v1 VS2_3 -
7019 VS2_3: vz3 = vx3 + v1 - -
7020 S2: z = x + 1 - VS2_0 */
7024 /* Arguments are ready. Create the new vector stmt. */
7026 {
7033 {
7034 /* Lower the operation. This follows vector lowering. */
7037 tree word_type
7041 tree high_bits
7050 {
7068 else
7073 {
7079 }
7088 }
7089 else
7090 {
7107 }
7109 signs);
7119 }
7121 {
7122 tree mask;
7126 else
7127 /* Dummy mask. */
7137 {
7138 /* Perform the operation on active elements only and take
7139 inactive elements from the reduction chain input. */
7142 }
7143 else
7144 {
7148 }
7150 {
7153 signed char biasval
7158 }
7159 gcall *call
7162 vops);
7168 }
7169 else
7170 {
7172 /* When combining two masks check if either of them is elsewhere
7173 combined with a loop mask, if that's the case we can mark that the
7174 new combined mask doesn't need to be combined with a loop mask. */
7178 {
7180 ncopies}))
7181 {
7187 }
7190 ncopies }))
7191 {
7197 }
7198 }
7207 /* Enter the combined value into the vector cond hash so we don't
7208 AND it with a loop mask again. */
7211 }
7214 {
7217 new_temp);
7222 }
7226 else
7228 }
7238 }
7240 /* A helper function to ensure data reference DR_INFO's base alignment. */
7242 static void
7244 {
7245 /* Alignment is only analyzed for the first element of a DR group,
7246 use that to look at base alignment we need to enforce. */
7253 {
7256 // We should only be able to increase the alignment of a base object if
7257 // we know what its new alignment should be at compile time.
7264 {
7267 }
7269 }
7270 }
7273 /* Function get_group_alias_ptr_type.
7275 Return the alias type for the group starting at FIRST_STMT_INFO. */
7277 static tree
7279 {
7285 {
7289 {
7294 }
7296 }
7298 }
7301 /* Function scan_operand_equal_p.
7303 Helper function for check_scan_store. Compare two references
7304 with .GOMP_SIMD_LANE bases. */
7306 static bool
7308 {
7313 {
7314 machine_mode mode;
7324 {
7330 {
7335 }
7336 }
7337 }
7344 {
7348 {
7351 {
7354 {
7360 {
7363 }
7364 }
7366 {
7369 }
7372 {
7376 }
7385 }
7389 }
7390 }
7392 }
7396 /* Normal permutation. */
7397 scan_store_kind_perm,
7399 /* Whole vector left shift permutation with zero init. */
7400 scan_store_kind_lshift_zero,
7402 /* Whole vector left shift permutation and VEC_COND_EXPR. */
7403 scan_store_kind_lshift_cond
7404 };
7406 /* Function check_scan_store.
7408 Verify if we can perform the needed permutations or whole vector shifts.
7409 Return -1 on failure, otherwise exact log2 of vectype's nunits.
7410 USE_WHOLE_VECTOR is a vector of enum scan_store_kind which operation
7411 to do at each step. */
7413 static int
7416 {
7428 {
7434 {
7437 }
7438 else
7439 {
7444 }
7447 {
7452 {
7456 /* Whole vector shifts shift in zeros, so if init is all zero
7457 constant, there is no need to do anything further. */
7461 {
7466 }
7467 }
7469 }
7471 {
7476 }
7477 }
7480 }
7483 /* Function check_scan_store.
7485 Check magic stores for #pragma omp scan {in,ex}clusive reductions. */
7487 static bool
7490 vect_memory_access_type memory_access_type)
7491 {
7494 tree ref_type;
7498 || mask
7510 {
7515 }
7517 /* We need to pattern match code built by OpenMP lowering and simplified
7518 by following optimizations into something we can handle.
7519 #pragma omp simd reduction(inscan,+:r)
7520 for (...)
7521 {
7522 r += something ();
7523 #pragma omp scan inclusive (r)
7524 use (r);
7525 }
7526 shall have body with:
7527 // Initialization for input phase, store the reduction initializer:
7528 _20 = .GOMP_SIMD_LANE (simduid.3_14(D), 0);
7529 _21 = .GOMP_SIMD_LANE (simduid.3_14(D), 1);
7530 D.2042[_21] = 0;
7531 // Actual input phase:
7532 ...
7533 r.0_5 = D.2042[_20];
7534 _6 = _4 + r.0_5;
7535 D.2042[_20] = _6;
7536 // Initialization for scan phase:
7537 _25 = .GOMP_SIMD_LANE (simduid.3_14(D), 2);
7538 _26 = D.2043[_25];
7539 _27 = D.2042[_25];
7540 _28 = _26 + _27;
7541 D.2043[_25] = _28;
7542 D.2042[_25] = _28;
7543 // Actual scan phase:
7544 ...
7545 r.1_8 = D.2042[_20];
7546 ...
7547 The "omp simd array" variable D.2042 holds the privatized copy used
7548 inside of the loop and D.2043 is another one that holds copies of
7549 the current original list item. The separate GOMP_SIMD_LANE ifn
7550 kinds are there in order to allow optimizing the initializer store
7551 and combiner sequence, e.g. if it is originally some C++ish user
7552 defined reduction, but allow the vectorizer to pattern recognize it
7553 and turn into the appropriate vectorized scan.
7555 For exclusive scan, this is slightly different:
7556 #pragma omp simd reduction(inscan,+:r)
7557 for (...)
7558 {
7559 use (r);
7560 #pragma omp scan exclusive (r)
7561 r += something ();
7562 }
7563 shall have body with:
7564 // Initialization for input phase, store the reduction initializer:
7565 _20 = .GOMP_SIMD_LANE (simduid.3_14(D), 0);
7566 _21 = .GOMP_SIMD_LANE (simduid.3_14(D), 1);
7567 D.2042[_21] = 0;
7568 // Actual input phase:
7569 ...
7570 r.0_5 = D.2042[_20];
7571 _6 = _4 + r.0_5;
7572 D.2042[_20] = _6;
7573 // Initialization for scan phase:
7574 _25 = .GOMP_SIMD_LANE (simduid.3_14(D), 3);
7575 _26 = D.2043[_25];
7576 D.2044[_25] = _26;
7577 _27 = D.2042[_25];
7578 _28 = _26 + _27;
7579 D.2043[_25] = _28;
7580 // Actual scan phase:
7581 ...
7582 r.1_8 = D.2044[_20];
7583 ... */
7586 {
7587 /* Match the D.2042[_21] = 0; store above. Just require that
7588 it is a constant or external definition store. */
7590 {
7591 fail_init:
7596 }
7606 /* These stores can be vectorized normally. */
7608 }
7611 {
7612 fail:
7617 }
7626 bool inscan_var_store
7630 {
7632 {
7633 use_operand_p use_p;
7634 imm_use_iterator iter;
7636 {
7643 || other_store_stmt
7647 }
7653 }
7654 }
7656 {
7657 use_operand_p use_p;
7658 imm_use_iterator iter;
7660 {
7667 }
7668 }
7669 else
7679 /* For pointer addition, we should use the normal plus for the vector
7680 operation. */
7682 {
7690 }
7718 {
7724 tree lrhs;
7727 else
7729 use_operand_p use_p;
7730 imm_use_iterator iter;
7732 {
7739 }
7740 }
7748 stmt_vec_info other_store_stmt_info
7761 {
7765 }
7776 {
7787 }
7806 {
7811 }
7819 /* The IL is as expected, now check if we can actually vectorize it.
7820 Inclusive scan:
7821 _26 = D.2043[_25];
7822 _27 = D.2042[_25];
7823 _28 = _26 + _27;
7824 D.2043[_25] = _28;
7825 D.2042[_25] = _28;
7826 should be vectorized as (where _40 is the vectorized rhs
7827 from the D.2042[_21] = 0; store):
7828 _30 = MEM <vector(8) int> [(int *)&D.2043];
7829 _31 = MEM <vector(8) int> [(int *)&D.2042];
7830 _32 = VEC_PERM_EXPR <_40, _31, { 0, 8, 9, 10, 11, 12, 13, 14 }>;
7831 _33 = _31 + _32;
7832 // _33 = { _31[0], _31[0]+_31[1], _31[1]+_31[2], ..., _31[6]+_31[7] };
7833 _34 = VEC_PERM_EXPR <_40, _33, { 0, 1, 8, 9, 10, 11, 12, 13 }>;
7834 _35 = _33 + _34;
7835 // _35 = { _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7836 // _31[1]+.._31[4], ... _31[4]+.._31[7] };
7837 _36 = VEC_PERM_EXPR <_40, _35, { 0, 1, 2, 3, 8, 9, 10, 11 }>;
7838 _37 = _35 + _36;
7839 // _37 = { _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7840 // _31[0]+.._31[4], ... _31[0]+.._31[7] };
7841 _38 = _30 + _37;
7842 _39 = VEC_PERM_EXPR <_38, _38, { 7, 7, 7, 7, 7, 7, 7, 7 }>;
7843 MEM <vector(8) int> [(int *)&D.2043] = _39;
7844 MEM <vector(8) int> [(int *)&D.2042] = _38;
7845 Exclusive scan:
7846 _26 = D.2043[_25];
7847 D.2044[_25] = _26;
7848 _27 = D.2042[_25];
7849 _28 = _26 + _27;
7850 D.2043[_25] = _28;
7851 should be vectorized as (where _40 is the vectorized rhs
7852 from the D.2042[_21] = 0; store):
7853 _30 = MEM <vector(8) int> [(int *)&D.2043];
7854 _31 = MEM <vector(8) int> [(int *)&D.2042];
7855 _32 = VEC_PERM_EXPR <_40, _31, { 0, 8, 9, 10, 11, 12, 13, 14 }>;
7856 _33 = VEC_PERM_EXPR <_40, _32, { 0, 8, 9, 10, 11, 12, 13, 14 }>;
7857 _34 = _32 + _33;
7858 // _34 = { 0, _31[0], _31[0]+_31[1], _31[1]+_31[2], _31[2]+_31[3],
7859 // _31[3]+_31[4], ... _31[5]+.._31[6] };
7860 _35 = VEC_PERM_EXPR <_40, _34, { 0, 1, 8, 9, 10, 11, 12, 13 }>;
7861 _36 = _34 + _35;
7862 // _36 = { 0, _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7863 // _31[1]+.._31[4], ... _31[3]+.._31[6] };
7864 _37 = VEC_PERM_EXPR <_40, _36, { 0, 1, 2, 3, 8, 9, 10, 11 }>;
7865 _38 = _36 + _37;
7866 // _38 = { 0, _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7867 // _31[0]+.._31[4], ... _31[0]+.._31[6] };
7868 _39 = _30 + _38;
7869 _50 = _31 + _39;
7870 _51 = VEC_PERM_EXPR <_50, _50, { 7, 7, 7, 7, 7, 7, 7, 7 }>;
7871 MEM <vector(8) int> [(int *)&D.2044] = _39;
7872 MEM <vector(8) int> [(int *)&D.2042] = _51; */
7883 }
7886 /* Function vectorizable_scan_store.
7888 Helper of vectorizable_score, arguments like on vectorizable_store.
7889 Handle only the transformation, checking is done in check_scan_store. */
7891 static bool
7895 {
7910 bool inscan_var_store
7914 {
7915 use_operand_p use_p;
7916 imm_use_iterator iter;
7918 {
7924 }
7925 }
7946 {
7950 }
7965 {
7972 else
7973 {
7978 }
7982 {
7989 }
7990 else
7992 }
8013 {
8024 {
8028 dataref_offset);
8034 }
8038 {
8041 (zero_vec
8051 {
8052 /* Whole vector shift shifted in zero bits, but if *init
8053 is not initializer_zerop, we need to replace those elements
8054 with elements from vec_oprnd1. */
8067 }
8069 /* For exclusive scan, perform the perms[i] permutation once
8070 more. */
8074 {
8078 }
8086 }
8094 /* For exclusive scan, new_temp computed above is the exclusive scan
8095 prefix sum. Turn it into inclusive prefix sum for the broadcast
8096 of the last element into orig. */
8098 {
8103 }
8112 {
8115 dataref_offset);
8120 }
8121 }
8125 {
8131 dataref_offset);
8136 }
8138 }
8141 /* Function vectorizable_store.
8143 Check if STMT_INFO defines a non scalar data-ref (array/pointer/structure)
8144 that can be vectorized.
8145 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
8146 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
8147 Return true if STMT_INFO is vectorizable in this way. */
8149 static bool
8154 {
8155 tree data_ref;
8156 tree op;
8158 tree elem_type;
8161 machine_mode vec_mode;
8162 tree dummy;
8170 stmt_vec_info first_stmt_info;
8176 tree aggr_type;
8177 gather_scatter_info gs_info;
8178 poly_uint64 vf;
8179 vec_load_store_type vls_type;
8180 tree ref_type;
8189 /* Is vectorizable store? */
8193 {
8206 }
8207 else
8208 {
8224 }
8228 /* Cannot have hybrid store SLP -- that would mean storing to the
8229 same location twice. */
8236 {
8239 }
8240 else
8243 /* Multiple types in SLP are handled by creating the appropriate number of
8244 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
8245 case of SLP. */
8248 else
8253 /* FORNOW. This restriction should be relaxed. */
8255 {
8260 }
8272 vect_memory_access_type memory_access_type;
8275 poly_int64 poffset;
8276 internal_fn lanes_ifn;
8284 {
8286 {
8291 }
8295 {
8300 }
8304 {
8309 }
8310 }
8311 else
8312 {
8313 /* FORNOW. In some cases can vectorize even if data-type not supported
8314 (e.g. - array initialization with 0). */
8317 }
8324 {
8328 }
8329 else
8330 {
8334 }
8337 {
8339 memory_access_type))
8341 }
8345 {
8353 mask);
8357 vectype))
8358 {
8363 }
8374 /* As function vect_transform_stmt shows, for interleaving stores
8375 the whole chain is vectorized when the last store in the chain
8376 is reached, the other stores in the group are skipped. So we
8377 want to only cost the last one here, but it's not trivial to
8378 get the last, as it's equivalent to use the first one for
8379 costing, use the first one instead. */
8381 && !slp
8384 }
8387 /* Transform. */
8392 {
8396 }
8398 {
8402 {
8413 "vect_model_store_cost: inside_cost = %d, "
8418 }
8420 }
8423 {
8424 /* FORNOW */
8428 {
8430 /* VEC_NUM is the number of vect stmts to be created for this
8431 group. */
8438 }
8439 else
8440 /* VEC_NUM is the number of vect stmts to be created for this
8441 group. */
8445 }
8446 else
8451 ncopies);
8453 /* Check if we need to update prologue cost for invariant,
8454 and update it accordingly if so. If it's not for
8455 interleaving store, we can just check vls_type; but if
8456 it's for interleaving store, need to check the def_type
8457 of the stored value since the current vls_type is just
8458 for first_stmt_info. */
8460 {
8465 {
8471 }
8476 };
8480 {
8482 gimple_stmt_iterator incr_gsi;
8485 tree offvar;
8486 tree ivstep;
8487 tree running_off;
8490 tree dr_offset;
8492 /* Checked by get_load_store_type. */
8499 stride_base
8500 = fold_build_pointer_plus
8507 /* For a store with loop-invariant (but other than power-of-2)
8508 stride (i.e. not a grouped access) like so:
8510 for (i = 0; i < n; i += stride)
8511 array[i] = ...;
8513 we generate a new induction variable and new stores from
8514 the components of the (vectorized) rhs:
8516 for (j = 0; ; j += VF*stride)
8517 vectemp = ...;
8518 tmp1 = vectemp[0];
8519 array[j] = tmp1;
8520 tmp2 = vectemp[1];
8521 array[j + stride] = tmp2;
8522 ...
8523 */
8530 {
8533 {
8539 /* First check if vec_extract optab doesn't support extraction
8540 of vector elts directly. */
8542 machine_mode vmode;
8549 {
8550 /* Try to avoid emitting an extract of vector elements
8551 by performing the extracts using an integer type of the
8552 same size, extracting from a vector of those and then
8553 re-interpreting it as the original vector type if
8554 supported. */
8555 unsigned lsize
8558 /* If we can't construct such a vector fall back to
8559 element extracts from the original vector type and
8560 element size stores. */
8568 {
8573 }
8574 /* Else fall back to vector extraction anyway.
8575 Fewer stores are more important than avoiding spilling
8576 of the vector we extract from. Compared to the
8577 construction case in vectorizable_load no store-forwarding
8578 issue exists here for reasonable archs. */
8579 }
8580 }
8583 {
8585 dr_alignment_support dr_align
8587 mis_align);
8590 {
8597 }
8598 }
8601 }
8604 {
8618 }
8624 {
8627 {
8629 {
8631 tree pos
8638 }
8639 }
8645 else
8648 unsigned HOST_WIDE_INT
8651 {
8653 {
8655 /* Pun the vector to extract from if necessary. */
8657 {
8659 tree cvt
8664 }
8665 }
8667 {
8669 {
8670 /* Only need vector extracting when there are more
8671 than one stores. */
8673 inside_cost
8676 /* Take a single lane vector type store as scalar
8677 store to avoid ICE like 110776. */
8681 alignment_support_scheme,
8683 cost_vec);
8684 else
8685 inside_cost
8689 }
8693 /* Extract the i'th component. */
8701 GSI_SAME_STMT);
8709 /* And store it to *running_off. */
8716 {
8724 }
8727 {
8731 }
8732 }
8733 }
8738 }
8742 "vect_model_store_cost: inside_cost = %d, "
8747 }
8750 vec_loop_masks *loop_masks
8754 vec_loop_lens *loop_lens
8759 /* Shouldn't go with length-based approach if fully masked. */
8762 /* Targets with store-lane instructions must not require explicit
8763 realignment. vect_supportable_dr_alignment always returns either
8764 dr_aligned or dr_unaligned_supported for masked operations. */
8766 && !mask
8775 tree bump;
8778 {
8781 }
8783 {
8788 }
8789 else
8790 {
8793 else
8797 }
8802 /* In case the vectorization factor (VF) is bigger than the number
8803 of elements that we can fit in a vectype (nunits), we have to generate
8804 more than one vector stmt - i.e - we need to "unroll" the
8805 vector stmt by a factor VF/nunits. */
8807 /* In case of interleaving (non-unit grouped access):
8809 S1: &base + 2 = x2
8810 S2: &base = x0
8811 S3: &base + 1 = x1
8812 S4: &base + 3 = x3
8814 We create vectorized stores starting from base address (the access of the
8815 first stmt in the chain (S2 in the above example), when the last store stmt
8816 of the chain (S4) is reached:
8818 VS1: &base = vx2
8819 VS2: &base + vec_size*1 = vx0
8820 VS3: &base + vec_size*2 = vx1
8821 VS4: &base + vec_size*3 = vx3
8823 Then permutation statements are generated:
8825 VS5: vx5 = VEC_PERM_EXPR < vx0, vx3, {0, 8, 1, 9, 2, 10, 3, 11} >
8826 VS6: vx6 = VEC_PERM_EXPR < vx0, vx3, {4, 12, 5, 13, 6, 14, 7, 15} >
8827 ...
8829 And they are put in STMT_VINFO_VEC_STMT of the corresponding scalar stmts
8830 (the order of the data-refs in the output of vect_permute_store_chain
8831 corresponds to the order of scalar stmts in the interleaving chain - see
8832 the documentation of vect_permute_store_chain()).
8834 In case of both multiple types and interleaving, above vector stores and
8835 permutation stmts are created for every copy. The result vector stmts are
8836 put in STMT_VINFO_VEC_STMT for the first copy and in the corresponding
8837 STMT_VINFO_RELATED_STMT for the next copies.
8838 */
8848 {
8852 {
8855 {
8856 /* For interleaved stores we collect vectorized defs for all
8857 the stores in the group in DR_CHAIN. DR_CHAIN is then used
8858 as an input to vect_permute_store_chain(). */
8861 {
8862 /* Since gaps are not supported for interleaved stores,
8863 DR_GROUP_SIZE is the exact number of stmts in the
8864 chain. Therefore, NEXT_STMT_INFO can't be NULL_TREE. */
8868 else
8869 {
8875 }
8877 }
8880 {
8882 {
8885 mask_vectype);
8887 }
8889 /* We should have catched mismatched types earlier. */
8892 dataref_ptr
8896 }
8897 }
8899 {
8901 /* DR_CHAIN is then used as an input to
8902 vect_permute_store_chain(). */
8904 {
8907 }
8912 }
8915 {
8921 }
8923 /* Get an array into which we can store the individual vectors. */
8926 /* Invalidate the current contents of VEC_ARRAY. This should
8927 become an RTL clobber too, which prevents the vector registers
8928 from being upward-exposed. */
8931 /* Store the individual vectors into the array. */
8933 {
8936 i);
8937 }
8950 {
8954 else
8956 signed char biasval
8960 {
8963 }
8964 }
8968 {
8969 /* Emit:
8970 MASK_LEN_STORE_LANES (DATAREF_PTR, ALIAS_PTR, VEC_MASK,
8971 LEN, BIAS, VEC_ARRAY). */
8977 vec_array);
8978 }
8980 {
8981 /* Emit:
8982 MASK_STORE_LANES (DATAREF_PTR, ALIAS_PTR, VEC_MASK,
8983 VEC_ARRAY). */
8989 }
8990 else
8991 {
8992 /* Emit:
8993 MEM_REF[...all elements...] = STORE_LANES (VEC_ARRAY). */
8997 }
9002 /* Record that VEC_ARRAY is now dead. */
9007 }
9011 "vect_model_store_cost: inside_cost = %d, "
9016 }
9019 {
9024 {
9027 {
9032 {
9033 /* Since the store is not grouped, DR_GROUP_SIZE is 1, and
9034 DR_CHAIN is of size 1. */
9042 {
9045 mask_vectype);
9047 }
9049 /* We should have catched mismatched types earlier. */
9056 else
9057 dataref_ptr
9061 bump);
9062 }
9063 }
9065 {
9074 }
9082 {
9089 }
9092 {
9094 {
9096 inside_cost
9100 }
9107 {
9111 else
9114 signed char biasval
9118 {
9121 }
9122 }
9131 call
9135 else
9142 }
9143 else
9144 {
9145 /* Emulated scatter. */
9148 {
9150 /* For emulated scatter N offset vector element extracts
9151 (we assume the scalar scaling and ptr + offset add is
9152 consumed by the load). */
9153 inside_cost
9156 /* N scalar stores plus extracting the elements. */
9157 inside_cost
9160 inside_cost
9164 }
9167 unsigned HOST_WIDE_INT const_offset_nunits
9173 unsigned HOST_WIDE_INT elt_size
9175 /* We support offset vectors with more elements
9176 than the data vector for now. */
9177 unsigned HOST_WIDE_INT factor
9186 {
9187 /* Compute the offsetted pointer. */
9190 tree idx
9195 tree ptr
9199 /* Extract the element to be stored. */
9200 tree elt
9206 tree ref
9210 }
9211 }
9215 }
9219 "vect_model_store_cost: inside_cost = %d, "
9224 }
9235 {
9238 {
9240 {
9241 /* Get vectorized arguments for SLP_NODE. */
9247 }
9248 else
9249 {
9250 /* For interleaved stores we collect vectorized defs for all the
9251 stores in the group in DR_CHAIN. DR_CHAIN is then used as an
9252 input to vect_permute_store_chain().
9254 If the store is not grouped, DR_GROUP_SIZE is 1, and DR_CHAIN
9255 is of size 1. */
9258 {
9259 /* Since gaps are not supported for interleaved stores,
9260 DR_GROUP_SIZE is the exact number of stmts in the chain.
9261 Therefore, NEXT_STMT_INFO can't be NULL_TREE. In case
9262 that there is no interleaving, DR_GROUP_SIZE is 1,
9263 and only one iteration of the loop will be executed. */
9267 else
9268 {
9274 }
9276 }
9278 {
9281 mask_vectype);
9283 }
9284 }
9286 /* We should have catched mismatched types earlier. */
9290 bool simd_lane_access_p
9293 && simd_lane_access_p
9294 && !loop_masks
9301 {
9304 }
9306 dataref_ptr
9311 }
9313 {
9315 /* DR_CHAIN is then used as an input to vect_permute_store_chain().
9316 If the store is not grouped, DR_GROUP_SIZE is 1, and DR_CHAIN is
9317 of size 1. */
9319 {
9322 }
9327 else
9330 }
9334 {
9335 /* Permute. */
9338 {
9345 "vect_model_store_cost: "
9347 group_size);
9348 }
9349 else
9352 }
9356 {
9358 {
9362 /* For grouped stores vectorized defs are interleaved in
9363 vect_permute_store_chain(). */
9365 }
9368 {
9372 else
9373 {
9379 /* Generate the permute statement. */
9380 gimple *perm_stmt
9384 gsi);
9388 }
9389 }
9392 {
9398 {
9402 }
9405 }
9421 /* Bump the vector pointer. */
9431 {
9434 }
9435 else
9440 misalign);
9443 /* Compute IFN when LOOP_LENS or final_mask valid. */
9448 {
9449 opt_machine_mode new_ovmode
9452 unsigned factor
9457 }
9459 {
9464 }
9467 {
9469 {
9470 /* Pass VF value to 'len' argument of
9471 MASK_LEN_STORE if LOOP_LENS is invalid. */
9473 }
9475 {
9476 /* Pass all ones value to 'mask' argument of
9477 MASK_LEN_STORE if final_mask is invalid. */
9480 }
9481 }
9483 {
9484 signed char biasval
9488 }
9490 /* Arguments are ready. Create the new vector stmt. */
9492 {
9495 /* Need conversion if it's wrapped with VnQI. */
9497 {
9498 tree new_vtype
9500 new_vmode);
9503 gassign *new_stmt
9507 }
9513 else
9520 }
9522 {
9524 gcall *call
9530 }
9531 else
9532 {
9533 data_ref
9535 dataref_offset ? dataref_offset
9538 ;
9539 else
9546 }
9554 }
9556 {
9560 }
9561 }
9564 {
9565 /* When vectorizing a store into the function result assign
9566 a penalty if the function returns in a multi-register location.
9567 In this case we assume we'll end up with having to spill the
9568 vector result and do piecewise loads as a conservative estimate. */
9574 {
9576 /* ??? Handle PARALLEL in some way. */
9578 {
9580 /* Assume that a single reg-reg move is possible and cheap,
9581 do not account for vector to gp register move cost. */
9583 {
9584 /* Spill. */
9585 prologue_cost
9588 /* Loads. */
9589 prologue_cost
9592 }
9593 }
9594 }
9597 "vect_model_store_cost: inside_cost = %d, "
9600 }
9603 }
9605 /* Given a vector type VECTYPE, turns permutation SEL into the equivalent
9606 VECTOR_CST mask. No checks are made that the target platform supports the
9607 mask, so callers may wish to test can_vec_perm_const_p separately, or use
9608 vect_gen_perm_mask_checked. */
9610 tree
9612 {
9613 tree mask_type;
9620 }
9622 /* Checked version of vect_gen_perm_mask_any. Asserts can_vec_perm_const_p,
9623 i.e. that the target supports the pattern _for arbitrary input vectors_. */
9625 tree
9627 {
9631 }
9633 /* Given a vector variable X and Y, that was generated for the scalar
9634 STMT_INFO, generate instructions to permute the vector elements of X and Y
9635 using permutation mask MASK_VEC, insert them at *GSI and return the
9636 permuted vector variable. */
9638 static tree
9642 {
9650 else
9654 /* Generate the permute statement. */
9659 }
9661 /* Hoist the definitions of all SSA uses on STMT_INFO out of the loop LOOP,
9662 inserting them on the loops preheader edge. Returns true if we
9663 were successful in doing so (and thus STMT_INFO can be moved then),
9664 otherwise returns false. HOIST_P indicates if we want to hoist the
9665 definitions of all SSA uses, it would be false when we are costing. */
9667 static bool
9669 {
9670 ssa_op_iter i;
9671 tree op;
9675 {
9679 {
9680 /* Make sure we don't need to recurse. While we could do
9681 so in simple cases when there are more complex use webs
9682 we don't have an easy way to preserve stmt order to fulfil
9683 dependencies within them. */
9684 tree op2;
9685 ssa_op_iter i2;
9689 {
9694 }
9696 }
9697 }
9706 {
9710 {
9714 }
9715 }
9718 }
9720 /* vectorizable_load.
9722 Check if STMT_INFO reads a non scalar data-ref (array/pointer/structure)
9723 that can be vectorized.
9724 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
9725 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
9726 Return true if STMT_INFO is vectorizable in this way. */
9728 static bool
9733 {
9734 tree scalar_dest;
9741 tree elem_type;
9742 /* Avoid false positive uninitialized warning, see PR110652. */
9744 machine_mode mode;
9745 tree dummy;
9752 poly_uint64 group_gap_adj;
9758 stmt_vec_info first_stmt_info;
9766 poly_uint64 vf;
9767 tree aggr_type;
9768 gather_scatter_info gs_info;
9769 tree ref_type;
9785 {
9800 }
9801 else
9802 {
9822 }
9828 {
9832 }
9833 else
9836 /* Multiple types in SLP are handled by creating the appropriate number of
9837 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
9838 case of SLP. */
9841 else
9846 /* FORNOW. This restriction should be relaxed. */
9848 {
9853 }
9855 /* Invalidate assumptions made by dependence analysis when vectorization
9856 on the unrolled body effectively re-orders stmts. */
9861 {
9864 "cannot perform implicit CSE when unrolling "
9867 }
9872 /* FORNOW. In some cases can vectorize even if data-type not supported
9873 (e.g. - data copies). */
9875 {
9880 }
9882 /* Check if the load is a part of an interleaving chain. */
9884 {
9886 /* FORNOW */
9893 /* Refuse non-SLP vectorization of SLP-only groups. */
9895 {
9900 }
9902 /* Invalidate assumptions made by dependence analysis when vectorization
9903 on the unrolled body effectively re-orders stmts. */
9908 {
9911 "cannot perform implicit CSE when performing "
9914 }
9915 }
9916 else
9920 {
9924 {
9925 /* In BB vectorization we may not actually use a loaded vector
9926 accessing elements in excess of DR_GROUP_SIZE. */
9937 {
9940 "BB vectorization with gaps at the end of "
9943 }
9944 }
9950 {
9953 vect_location,
9956 }
9957 }
9959 vect_memory_access_type memory_access_type;
9962 poly_int64 poffset;
9963 internal_fn lanes_ifn;
9971 {
9973 {
9979 }
9982 {
9987 }
9991 {
9996 }
9997 }
10002 {
10004 && mask
10006 mask_vectype))
10007 {
10012 }
10022 mask);
10035 }
10045 /* Transform. */
10051 {
10053 /* If we have versioned for aliasing or the loop doesn't
10054 have any data dependencies that would preclude this,
10055 then we are sure this is a loop invariant load and
10056 thus we can insert it on the preheader edge.
10057 TODO: hoist_defs_of_uses should ideally be computed
10058 once at analysis time, remembered and used in the
10059 transform time. */
10061 && !nested_in_vect_loop
10064 {
10065 enum vect_cost_model_location cost_loc
10070 cost_loc);
10075 "vect_model_load_cost: inside_cost = %d, "
10079 }
10081 {
10091 tree vuse;
10094 else
10099 }
10100 /* These copies are all equivalent. */
10104 else
10105 {
10110 }
10115 else
10116 {
10120 }
10122 }
10126 {
10127 gimple_stmt_iterator incr_gsi;
10129 tree offvar;
10130 tree ivstep;
10131 tree running_off;
10134 /* Checked by get_load_store_type. */
10137 tree dr_offset;
10144 {
10147 }
10148 else
10149 {
10152 }
10155 {
10158 }
10159 else
10160 {
10162 cst_offset
10165 first_stmt_info));
10168 }
10171 {
10179 /* For a load with loop-invariant (but other than power-of-2)
10180 stride (i.e. not a grouped access) like so:
10182 for (i = 0; i < n; i += stride)
10183 ... = array[i];
10185 we generate a new induction variable and new accesses to
10186 form a new vector (or vectors, depending on ncopies):
10188 for (j = 0; ; j += VF*stride)
10189 tmp1 = array[j];
10190 tmp2 = array[j + stride];
10191 ...
10192 vectemp = {tmp1, tmp2, ...}
10193 */
10207 }
10217 {
10219 {
10220 /* First check if vec_init optab supports construction from vector
10221 elts directly. Otherwise avoid emitting a constructor of
10222 vector elements by performing the loads using an integer type
10223 of the same size, constructing a vector of those and then
10224 re-interpreting it as the original vector type. This avoids a
10225 huge runtime penalty due to the general inability to perform
10226 store forwarding from smaller stores to a larger load. */
10227 tree ptype;
10228 tree vtype
10233 {
10238 }
10239 }
10240 else
10241 {
10245 }
10247 }
10248 /* Load vector(1) scalar_type if it's 1 element-wise vectype. */
10253 {
10254 /* For SLP permutation support we need to load the whole group,
10255 not only the number of vector stmts the permutation result
10256 fits in. */
10258 {
10259 /* We don't yet generate SLP_TREE_LOAD_PERMUTATIONs for
10260 variable VF. */
10264 }
10265 else
10267 }
10269 unsigned HOST_WIDE_INT
10273 {
10278 {
10280 {
10281 /* For VMAT_ELEMENTWISE, just cost it as scalar_load to
10282 avoid ICE, see PR110776. */
10289 else
10293 }
10307 {
10308 n_groups++;
10309 /* When doing SLP make sure to not load elements from
10310 the next vector iteration, those will not be accessed
10311 so just use the last element again. See PR107451. */
10313 {
10315 gimple *incr
10320 }
10322 }
10323 }
10326 {
10330 else
10331 {
10337 {
10338 new_stmt
10340 VIEW_CONVERT_EXPR,
10344 gsi);
10345 }
10346 }
10347 }
10350 {
10352 {
10355 else
10357 }
10358 else
10359 {
10363 }
10364 }
10365 }
10367 {
10370 {
10376 }
10377 else
10380 }
10384 "vect_model_load_cost: inside_cost = %u, "
10386 inside_cost);
10389 }
10397 {
10399 {
10402 }
10403 else
10404 {
10407 }
10408 /* For SLP vectorization we directly vectorize a subchain
10409 without permutation. */
10412 /* For BB vectorization always use the first stmt to base
10413 the data ref pointer on. */
10415 first_stmt_info_for_drptr
10418 /* Check if the chain of loads is already vectorized. */
10420 /* For SLP we would need to copy over SLP_TREE_VEC_DEFS.
10421 ??? But we can only do so if there is exactly one
10422 as we have no way to get at the rest. Leave the CSE
10423 opportunity alone.
10424 ??? With the group load eventually participating
10425 in multiple different permutations (having multiple
10426 slp nodes which refer to the same group) the CSE
10427 is even wrong code. See PR56270. */
10429 {
10432 }
10436 /* VEC_NUM is the number of vect stmts to be created for this group. */
10438 {
10440 /* If an SLP permutation is from N elements to N elements,
10441 and if one vector holds a whole number of N, we can load
10442 the inputs to the permutation in the same way as an
10443 unpermuted sequence. In other cases we need to load the
10444 whole group, not only the number of vector stmts the
10445 permutation result fits in. */
10450 {
10451 /* We don't yet generate such SLP_TREE_LOAD_PERMUTATIONs for
10452 variable VF; see vect_transform_slp_perm_load. */
10457 }
10458 else
10459 {
10461 group_gap_adj
10463 }
10464 }
10465 else
10469 }
10470 else
10471 {
10479 }
10482 vec_loop_masks *loop_masks
10486 vec_loop_lens *loop_lens
10491 /* Shouldn't go with length-based approach if fully masked. */
10494 /* Targets with store-lane instructions must not require explicit
10495 realignment. vect_supportable_dr_alignment always returns either
10496 dr_aligned or dr_unaligned_supported for masked operations. */
10498 && !mask
10503 /* In case the vectorization factor (VF) is bigger than the number
10504 of elements that we can fit in a vectype (nunits), we have to generate
10505 more than one vector stmt - i.e - we need to "unroll" the
10506 vector stmt by a factor VF/nunits. In doing so, we record a pointer
10507 from one copy of the vector stmt to the next, in the field
10508 STMT_VINFO_RELATED_STMT. This is necessary in order to allow following
10509 stages to find the correct vector defs to be used when vectorizing
10510 stmts that use the defs of the current stmt. The example below
10511 illustrates the vectorization process when VF=16 and nunits=4 (i.e., we
10512 need to create 4 vectorized stmts):
10514 before vectorization:
10515 RELATED_STMT VEC_STMT
10516 S1: x = memref - -
10517 S2: z = x + 1 - -
10519 step 1: vectorize stmt S1:
10520 We first create the vector stmt VS1_0, and, as usual, record a
10521 pointer to it in the STMT_VINFO_VEC_STMT of the scalar stmt S1.
10522 Next, we create the vector stmt VS1_1, and record a pointer to
10523 it in the STMT_VINFO_RELATED_STMT of the vector stmt VS1_0.
10524 Similarly, for VS1_2 and VS1_3. This is the resulting chain of
10525 stmts and pointers:
10526 RELATED_STMT VEC_STMT
10527 VS1_0: vx0 = memref0 VS1_1 -
10528 VS1_1: vx1 = memref1 VS1_2 -
10529 VS1_2: vx2 = memref2 VS1_3 -
10530 VS1_3: vx3 = memref3 - -
10531 S1: x = load - VS1_0
10532 S2: z = x + 1 - -
10533 */
10535 /* In case of interleaving (non-unit grouped access):
10537 S1: x2 = &base + 2
10538 S2: x0 = &base
10539 S3: x1 = &base + 1
10540 S4: x3 = &base + 3
10542 Vectorized loads are created in the order of memory accesses
10543 starting from the access of the first stmt of the chain:
10545 VS1: vx0 = &base
10546 VS2: vx1 = &base + vec_size*1
10547 VS3: vx3 = &base + vec_size*2
10548 VS4: vx4 = &base + vec_size*3
10550 Then permutation statements are generated:
10552 VS5: vx5 = VEC_PERM_EXPR < vx0, vx1, { 0, 2, ..., i*2 } >
10553 VS6: vx6 = VEC_PERM_EXPR < vx0, vx1, { 1, 3, ..., i*2+1 } >
10554 ...
10556 And they are put in STMT_VINFO_VEC_STMT of the corresponding scalar stmts
10557 (the order of the data-refs in the output of vect_permute_load_chain
10558 corresponds to the order of scalar stmts in the interleaving chain - see
10559 the documentation of vect_permute_load_chain()).
10560 The generation of permutation stmts and recording them in
10561 STMT_VINFO_VEC_STMT is done in vect_transform_grouped_load().
10563 In case of both multiple types and interleaving, the vector loads and
10564 permutation stmts above are created for every copy. The result vector
10565 stmts are put in STMT_VINFO_VEC_STMT for the first copy and in the
10566 corresponding STMT_VINFO_RELATED_STMT for the next copies. */
10568 /* If the data reference is aligned (dr_aligned) or potentially unaligned
10569 on a target that supports unaligned accesses (dr_unaligned_supported)
10570 we generate the following code:
10571 p = initial_addr;
10572 indx = 0;
10573 loop {
10574 p = p + indx * vectype_size;
10575 vec_dest = *(p);
10576 indx = indx + 1;
10577 }
10579 Otherwise, the data reference is potentially unaligned on a target that
10580 does not support unaligned accesses (dr_explicit_realign_optimized) -
10581 then generate the following code, in which the data in each iteration is
10582 obtained by two vector loads, one from the previous iteration, and one
10583 from the current iteration:
10584 p1 = initial_addr;
10585 msq_init = *(floor(p1))
10586 p2 = initial_addr + VS - 1;
10587 realignment_token = call target_builtin;
10588 indx = 0;
10589 loop {
10590 p2 = p2 + indx * vectype_size
10591 lsq = *(floor(p2))
10592 vec_dest = realign_load (msq, lsq, realignment_token)
10593 indx = indx + 1;
10594 msq = lsq;
10595 } */
10597 /* If the misalignment remains the same throughout the execution of the
10598 loop, we can create the init_addr and permutation mask at the loop
10599 preheader. Otherwise, it needs to be created inside the loop.
10600 This can only occur when vectorizing memory accesses in the inner-loop
10601 nested within an outer-loop that is being vectorized. */
10606 {
10609 }
10611 bool diff_first_stmt_info
10618 {
10619 /* If we have different first_stmt_info, we can't set up realignment
10620 here, since we can't guarantee first_stmt_info DR has been
10621 initialized yet, use first_stmt_info_for_drptr DR by bumping the
10622 distance from first_stmt_info DR instead as below. */
10624 {
10631 {
10634 size_one_node);
10636 }
10637 }
10638 }
10639 else
10643 offset = (offset
10647 tree bump;
10650 {
10653 }
10655 {
10660 }
10661 else
10662 {
10665 else
10669 }
10674 {
10678 else
10681 }
10685 {
10692 {
10694 {
10695 /* An IFN_LOAD_LANES will load all its vector results,
10696 regardless of which ones we actually need. Account
10697 for the cost of unused results. */
10699 {
10702 do
10703 {
10706 }
10709 {
10712 "vect_model_load_cost: %d "
10714 gaps);
10716 alignment_support_scheme,
10720 }
10721 }
10726 }
10728 /* 1. Create the vector or array pointer update chain. */
10730 dataref_ptr
10734 else
10735 {
10739 }
10756 {
10760 else
10762 signed char biasval
10766 {
10769 }
10770 }
10774 {
10775 /* Emit:
10776 VEC_ARRAY = MASK_LEN_LOAD_LANES (DATAREF_PTR, ALIAS_PTR,
10777 VEC_MASK, LEN, BIAS). */
10783 }
10785 {
10786 /* Emit:
10787 VEC_ARRAY = MASK_LOAD_LANES (DATAREF_PTR, ALIAS_PTR,
10788 VEC_MASK). */
10793 final_mask);
10794 }
10795 else
10796 {
10797 /* Emit:
10798 VEC_ARRAY = LOAD_LANES (MEM_REF[...all elements...]). */
10801 }
10807 /* Extract each vector into an SSA_NAME. */
10809 {
10813 }
10815 /* Record the mapping between SSA_NAMEs and statements. */
10818 /* Record that VEC_ARRAY is now dead. */
10824 }
10828 "vect_model_load_cost: inside_cost = %u, "
10833 }
10836 {
10843 {
10844 /* 1. Create the vector or array pointer update chain. */
10846 {
10851 else
10852 dataref_ptr
10856 }
10858 {
10863 }
10870 {
10875 {
10877 final_mask
10888 }
10890 /* 2. Create the vector-load in the loop. */
10893 {
10895 {
10897 inside_cost
10901 }
10908 {
10910 final_len
10914 else
10915 final_len
10918 signed char biasval
10922 {
10925 }
10926 }
10930 call
10939 else
10946 }
10948 {
10949 /* The builtin decls path for gather is legacy, x86 only. */
10952 {
10954 inside_cost
10958 }
10959 poly_uint64 offset_nunits
10962 {
10963 new_stmt = vect_build_one_gather_load_call
10966 final_mask);
10968 }
10970 {
10971 /* We have a offset vector with half the number of
10972 lanes but the builtins will produce full vectype
10973 data with just the lower lanes filled. */
10974 new_stmt = vect_build_one_gather_load_call
10977 final_mask);
10983 /* now put upper half of final_mask in final_mask low. */
10985 && !SCALAR_INT_MODE_P
10987 {
10994 tree perm_mask = vect_gen_perm_mask_checked
10997 VEC_PERM_EXPR,
10998 final_mask,
10999 final_mask,
11000 perm_mask);
11005 }
11007 {
11009 VEC_UNPACK_HI_EXPR,
11010 final_mask);
11011 final_mask = make_ssa_name
11016 }
11018 new_stmt = vect_build_one_gather_load_call
11020 dataref_ptr,
11022 final_mask);
11028 /* compose low + high. */
11035 tree perm_mask
11038 VEC_PERM_EXPR,
11041 }
11043 {
11044 /* We have a offset vector with double the number of
11045 lanes. Select the low/high part accordingly. */
11048 {
11055 tree perm_mask = vect_gen_perm_mask_checked
11058 VEC_PERM_EXPR,
11059 vec_offset,
11060 vec_offset,
11061 perm_mask);
11066 }
11067 new_stmt = vect_build_one_gather_load_call
11071 }
11072 else
11074 }
11075 else
11076 {
11077 /* Emulated gather-scatter. */
11081 {
11082 /* For emulated gathers N offset vector element
11083 offset add is consumed by the load). */
11087 /* N scalar loads plus gathering them into a
11088 vector. */
11089 inside_cost
11092 inside_cost
11096 }
11097 unsigned HOST_WIDE_INT const_offset_nunits
11103 /* We support offset vectors with more elements
11104 than the data vector for now. */
11105 unsigned HOST_WIDE_INT factor
11114 {
11117 tree idx
11122 scale);
11134 }
11139 }
11142 /* DATA_REF is null if we've already built the statement. */
11144 {
11147 }
11152 /* Store vector loads in the corresponding SLP_NODE. */
11155 }
11159 }
11166 "vect_model_load_cost: inside_cost = %u, "
11170 }
11175 {
11176 /* 1. Create the vector or array pointer update chain. */
11178 {
11179 bool simd_lane_access_p
11190 {
11193 }
11195 {
11196 dataref_ptr
11200 bump);
11201 /* Adjust the pointer by the difference to first_stmt. */
11202 data_reference_p ptrdr
11204 tree diff
11212 {
11216 alignment_support_scheme,
11219 }
11220 }
11221 else
11222 dataref_ptr
11224 at_loop,
11229 }
11231 {
11235 bump);
11236 else
11241 }
11248 {
11253 {
11265 }
11267 /* 2. Create the vector-load in the loop. */
11269 {
11272 {
11282 {
11283 align
11286 }
11287 else
11292 misalign);
11295 /* Compute IFN when LOOP_LENS or final_mask valid. */
11300 {
11301 opt_machine_mode new_ovmode
11304 unsigned factor
11309 }
11311 {
11316 }
11319 {
11321 {
11322 /* Pass VF value to 'len' argument of
11323 MASK_LEN_LOAD if LOOP_LENS is invalid. */
11325 }
11327 {
11328 /* Pass all ones value to 'mask' argument of
11329 MASK_LEN_LOAD if final_mask is invalid. */
11332 }
11333 }
11335 {
11336 signed char biasval
11340 }
11343 {
11350 bias);
11351 else
11359 /* Need conversion if it's wrapped with VnQI. */
11361 {
11364 tree var
11368 gsi);
11372 }
11373 }
11375 {
11379 final_mask);
11383 }
11384 else
11385 {
11389 unsigned int vect_align
11391 unsigned int scalar_dr_size
11393 /* If there's no peeling for gaps but we have a gap
11394 with slp loads then load the lower half of the
11395 vector only. See get_group_load_store_type for
11396 when we apply this optimization. */
11398 && loop_vinfo
11403 {
11404 tree half_vtype;
11405 new_vtype
11410 }
11411 tree offset
11416 {
11417 unsigned HOST_WIDE_INT gap_offset
11421 }
11422 data_ref
11425 ;
11426 else
11431 {
11437 gsi);
11442 {
11446 }
11447 else
11448 {
11452 }
11457 else
11458 {
11465 vec_dest,
11467 }
11468 }
11469 }
11471 }
11473 {
11483 dr_explicit_realign,
11488 else
11490 // For explicit realign the target alignment should be
11491 // known at compile time.
11492 unsigned HOST_WIDE_INT align
11499 data_ref
11513 bump);
11519 else
11523 data_ref
11526 }
11528 {
11533 else
11535 // We should only be doing this if we know the target
11536 // alignment at compile time.
11537 unsigned HOST_WIDE_INT align
11547 }
11550 }
11552 /* One common place to cost the above vect load for different
11553 alignment support schemes. */
11555 {
11556 /* For VMAT_CONTIGUOUS_PERMUTE if it's grouped load, we
11557 only need to take care of the first stmt, whose
11558 stmt_info is first_stmt_info, vec_num iterating on it
11559 will cover the cost for the remaining, it's consistent
11560 with transforming. For the prologue cost for realign,
11561 we only need to count it once for the whole group. */
11572 }
11573 else
11574 {
11576 /* DATA_REF is null if we've already built the statement. */
11578 {
11581 }
11585 }
11587 /* 3. Handle explicit realignment if necessary/supported.
11588 Create in loop:
11589 vec_dest = realign_load (msq, lsq, realignment_token) */
11593 {
11605 {
11609 UNKNOWN_LOCATION);
11611 }
11612 }
11615 {
11619 else
11620 {
11625 }
11626 }
11628 /* Collect vector loads and later create their permutation in
11629 vect_transform_grouped_load (). */
11633 /* Store vector loads in the corresponding SLP_NODE. */
11637 /* With SLP permutation we load the gaps as well, without
11638 we need to skip the gaps after we manage to fully load
11639 all elements. group_gap_adj is DR_GROUP_SIZE here. */
11643 && !slp_perm
11645 {
11646 poly_wide_int bump_val
11655 }
11656 }
11657 /* Bump the vector pointer to account for a gap or for excess
11658 elements loaded for a permuted SLP load. */
11662 {
11663 poly_wide_int bump_val
11670 }
11676 {
11678 /* For SLP we know we've seen all possible uses of dr_chain so
11679 direct vect_transform_slp_perm_load to DCE the unused parts.
11680 ??? This is a hack to prevent compile-time issues as seen
11681 in PR101120 and friends. */
11683 {
11688 }
11689 else
11690 {
11695 }
11696 }
11697 else
11698 {
11700 {
11702 /* We assume that the cost of a single load-lanes instruction
11703 is equivalent to the cost of DR_GROUP_SIZE separate loads.
11704 If a grouped access is instead being provided by a
11705 load-and-permute operation, include the cost of the
11706 permutes. */
11708 {
11709 /* Uses an even and odd extract operations or shuffle
11710 operations for each needed permute. */
11718 "vect_model_load_cost:"
11720 group_size);
11721 }
11723 {
11727 }
11728 }
11731 }
11733 }
11738 {
11744 "vect_model_load_cost: inside_cost = %u, "
11747 }
11750 }
11752 /* Function vect_is_simple_cond.
11754 Input:
11755 LOOP - the loop that is being vectorized.
11756 COND - Condition that is checked for simple use.
11758 Output:
11759 *COMP_VECTYPE - the vector type for the comparison.
11760 *DTS - The def types for the arguments of the comparison
11762 Returns whether a COND can be vectorized. Checks whether
11763 condition operands are supportable using vec_is_simple_use. */
11765 static bool
11769 {
11772 slp_tree slp_op;
11774 /* Mask case. */
11777 {
11780 || !*comp_vectype
11784 }
11793 {
11797 }
11801 else
11805 {
11809 }
11813 else
11822 /* Invariant comparison. */
11824 {
11828 else
11829 {
11830 /* If we can widen the comparison to match vectype do so. */
11832 && !slp_node
11835 scalar_type = build_nonstandard_integer_type
11838 slp_node);
11839 }
11840 }
11843 }
11845 /* vectorizable_condition.
11847 Check if STMT_INFO is conditional modify expression that can be vectorized.
11848 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
11849 stmt using VEC_COND_EXPR to replace it, put it in VEC_STMT, and insert it
11850 at GSI.
11852 When STMT_INFO is vectorized as a nested cycle, for_reduction is true.
11854 Return true if STMT_INFO is vectorizable in this way. */
11856 static bool
11861 {
11869 tree vec_compare;
11870 tree new_temp;
11885 tree vec_cmp_type;
11891 /* Is vectorizable conditional operation? */
11903 bool for_reduction
11906 {
11914 }
11915 else
11916 {
11919 }
11925 {
11928 }
11929 else
11930 {
11933 }
11969 {
11972 }
11974 /* For conditional reductions, the "then" value needs to be the candidate
11975 value calculated by this iteration while the "else" value needs to be
11976 the result carried over from previous iterations. If the COND_EXPR
11977 is the other way around, we need to swap it. */
11980 {
11983 else
11984 {
11989 else
11990 {
11992 /* Make sure we don't accidentally use the old condition. */
11994 }
11995 }
11997 }
12000 {
12001 /* Boolean values may have another representation in vectors
12002 and therefore we prefer bit operations over comparison for
12003 them (which also works for scalar masks). We store opcodes
12004 to use in bitop1 and bitop2. Statement is vectorized as
12005 BITOP2 (rhs1 BITOP1 rhs2) or rhs1 BITOP2 (BITOP1 rhs2)
12006 depending on bitop1 and bitop2 arity. */
12008 {
12036 }
12038 }
12043 {
12048 }
12051 {
12053 {
12055 optab optab;
12062 {
12064 optab_default);
12067 }
12068 }
12072 /* Count one reduction-like operation per vector. */
12075 && (masked
12077 cond_code)
12079 ERROR_MARK))))
12083 && (!vect_maybe_update_slp_op_vectype
12086 && !vect_maybe_update_slp_op_vectype
12090 {
12095 }
12099 {
12101 {
12107 else
12111 }
12112 /* Extra inactive lanes should be safe for vect_nested_cycle. */
12114 {
12117 "conditional reduction prevents the use"
12120 }
12121 }
12127 }
12129 /* Transform. */
12131 /* Handle def. */
12138 /* See whether another part of the vectorized code applies a loop
12139 mask to the condition, or to its inverse. */
12144 {
12147 }
12149 {
12152 else
12153 {
12157 else
12158 {
12163 {
12167 }
12168 else
12169 {
12170 /* Try the inverse of the current mask. We check if the
12171 inverse mask is live and if so we generate a negate of
12172 the current mask such that we still honor NaNs. */
12176 {
12181 }
12182 }
12183 }
12184 }
12185 }
12187 /* Handle cond expr. */
12192 reduction_type != EXTRACT_LAST_REDUCTION
12194 else
12199 reduction_type != EXTRACT_LAST_REDUCTION
12202 /* Arguments are ready. Create the new vector stmt. */
12204 {
12214 else
12215 {
12218 {
12223 }
12224 else
12225 {
12230 vec_cond_rhs);
12231 else
12232 new_stmt
12234 vec_cond_rhs);
12240 {
12241 /* Instead of doing ~x ? y : z do x ? z : y. */
12244 }
12245 else
12246 {
12249 new_stmt
12251 else
12252 new_stmt
12257 }
12258 }
12259 }
12261 /* If we decided to apply a loop mask to the result of the vector
12262 comparison, AND the comparison with the mask now. Later passes
12263 should then be able to reuse the AND results between mulitple
12264 vector statements.
12266 For example:
12267 for (int i = 0; i < 100; ++i)
12268 x[i] = y[i] ? z[i] : 10;
12270 results in following optimized GIMPLE:
12272 mask__35.8_43 = vect__4.7_41 != { 0, ... };
12273 vec_mask_and_46 = loop_mask_40 & mask__35.8_43;
12274 _19 = &MEM[base: z_12(D), index: ivtmp_56, step: 4, offset: 0B];
12275 vect_iftmp.11_47 = .MASK_LOAD (_19, 4B, vec_mask_and_46);
12276 vect_iftmp.12_52 = VEC_COND_EXPR <vec_mask_and_46,
12277 vect_iftmp.11_47, { 10, ... }>;
12279 instead of using a masked and unmasked forms of
12280 vec != { 0, ... } (masked in the MASK_LOAD,
12281 unmasked in the VEC_COND_EXPR). */
12283 /* Force vec_compare to be an SSA_NAME rather than a comparison,
12284 in cases where that's necessary. */
12288 {
12290 {
12293 vec_compare);
12296 }
12299 {
12302 BIT_NOT_EXPR,
12303 vec_compare);
12306 }
12310 {
12312 {
12315 signed char biasval
12318 }
12319 else
12320 {
12323 }
12324 }
12326 {
12327 tree loop_mask
12331 gassign *g
12333 loop_mask);
12336 }
12337 }
12341 {
12345 new_stmt = gimple_build_call_internal
12348 else
12349 new_stmt = gimple_build_call_internal
12351 vec_then_clause);
12356 else
12357 {
12358 /* In this case we're moving the definition to later in the
12359 block. That doesn't matter because the only uses of the
12360 lhs are in phi statements. */
12364 }
12365 }
12366 else
12367 {
12372 }
12375 else
12377 }
12388 }
12390 /* Helper of vectorizable_comparison.
12392 Check if STMT_INFO is comparison expression CODE that can be vectorized.
12393 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
12394 comparison, put it in VEC_STMT, and insert it at GSI.
12396 Return true if STMT_INFO is vectorizable in this way. */
12398 static bool
12403 {
12407 tree new_temp;
12411 poly_uint64 nunits;
12418 tree mask_type;
12419 tree mask;
12432 else
12456 /* Invariant comparison. */
12458 {
12461 else
12463 slp_node);
12466 }
12470 /* Can't compare mask and non-mask types. */
12475 /* Boolean values may have another representation in vectors
12476 and therefore we prefer bit operations over comparison for
12477 them (which also works for scalar masks). We store opcodes
12478 to use in bitop1 and bitop2. Statement is vectorized as
12479 BITOP2 (rhs1 BITOP1 rhs2) or
12480 rhs1 BITOP2 (BITOP1 rhs2)
12481 depending on bitop1 and bitop2 arity. */
12484 {
12486 {
12489 }
12491 {
12494 }
12496 {
12500 }
12502 {
12506 }
12507 else
12508 {
12512 }
12513 }
12516 {
12518 {
12521 }
12522 else
12523 {
12525 optab optab;
12532 {
12536 }
12537 }
12539 /* Put types on constant and invariant SLP children. */
12543 {
12548 }
12554 }
12556 /* Transform. */
12558 /* Handle def. */
12568 /* Arguments are ready. Create the new vector stmt. */
12570 {
12576 {
12580 }
12581 else
12582 {
12585 else
12587 vec_rhs2);
12590 {
12594 else
12596 new_temp);
12598 }
12599 }
12602 else
12604 }
12613 }
12615 /* vectorizable_comparison.
12617 Check if STMT_INFO is comparison expression that can be vectorized.
12618 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
12619 comparison, put it in VEC_STMT, and insert it at GSI.
12621 Return true if STMT_INFO is vectorizable in this way. */
12623 static bool
12628 {
12651 }
12653 /* If SLP_NODE is nonnull, return true if vectorizable_live_operation
12654 can handle all live statements in the node. Otherwise return true
12655 if STMT_INFO is not live or if vectorizable_live_operation can handle it.
12656 VEC_STMT_P is as for vectorizable_live_operation. */
12658 static bool
12663 {
12665 {
12666 stmt_vec_info slp_stmt_info;
12669 {
12675 }
12676 }
12684 }
12686 /* Make sure the statement is vectorizable. */
12688 opt_result
12693 {
12697 gimple_seq pattern_def_seq;
12705 "not vectorized:"
12712 {
12713 gimple_stmt_iterator si;
12716 {
12717 stmt_vec_info pattern_def_stmt_info
12721 {
12722 /* Analyze def stmt of STMT if it's a pattern stmt. */
12728 opt_result res
12731 cost_vec);
12734 }
12735 }
12736 }
12738 /* Skip stmts that do not need to be vectorized. In loops this is expected
12739 to include:
12740 - the COND_EXPR which is the loop exit condition
12741 - any LABEL_EXPRs in the loop
12742 - computations that are used only for array indexing or loop control.
12743 In basic blocks we only analyze statements that are a part of some SLP
12744 instance, therefore, all the statements are relevant.
12746 Pattern statement needs to be analyzed instead of the original statement
12747 if the original statement is not relevant. Otherwise, we analyze both
12748 statements. In basic blocks we are called from some SLP instance
12749 traversal, don't analyze pattern stmts instead, the pattern stmts
12750 already will be part of SLP instance. */
12755 {
12757 && pattern_stmt_info
12760 {
12761 /* Analyze PATTERN_STMT instead of the original stmt. */
12767 }
12768 else
12769 {
12774 }
12775 }
12778 && pattern_stmt_info
12781 {
12782 /* Analyze PATTERN_STMT too. */
12788 opt_result res
12793 }
12796 {
12820 }
12827 {
12832 }
12835 {
12840 }
12846 /* Prefer vectorizable_call over vectorizable_simd_clone_call so
12847 -mveclibabi= takes preference over library functions with
12848 the simd attribute. */
12851 cost_vec)
12868 cost_vec)
12873 else
12874 {
12880 cost_vec)
12886 cost_vec)
12894 cost_vec)
12896 }
12903 "not vectorized:"
12907 /* Stmts that are (also) "live" (i.e. - that are used out of the loop)
12908 need extra handling, except for vectorizable reductions. */
12916 "not vectorized:"
12921 }
12924 /* Function vect_transform_stmt.
12926 Create a vectorized stmt to replace STMT_INFO, and insert it at GSI. */
12928 bool
12932 {
12944 {
12956 NULL);
12968 NULL);
12980 NULL);
12986 && !slp_node
12989 /* In case of interleaving, the whole chain is vectorized when the
12990 last store in the chain is reached. Store stmts before the last
12991 one are skipped, and there vec_stmt_info shouldn't be freed
12992 meanwhile. */
12993 ;
12994 else
12995 {
13000 }
13056 {
13061 }
13063 }
13069 {
13070 /* Handle stmts whose DEF is used outside the loop-nest that is
13071 being vectorized. */
13075 }
13081 }
13084 /* Remove a group of stores (for SLP or interleaving), free their
13085 stmt_vec_info. */
13087 void
13089 {
13093 {
13096 /* Free the attached stmt_vec_info and remove the stmt. */
13099 }
13100 }
13102 /* If NUNITS is nonzero, return a vector type that contains NUNITS
13103 elements of type SCALAR_TYPE, or null if the target doesn't support
13104 such a type.
13106 If NUNITS is zero, return a vector type that contains elements of
13107 type SCALAR_TYPE, choosing whichever vector size the target prefers.
13109 If PREVAILING_MODE is VOIDmode, we have not yet chosen a vector mode
13110 for this vectorization region and want to "autodetect" the best choice.
13111 Otherwise, PREVAILING_MODE is a previously-chosen vector TYPE_MODE
13112 and we want the new type to be interoperable with it. PREVAILING_MODE
13113 in this case can be a scalar integer mode or a vector mode; when it
13114 is a vector mode, the function acts like a tree-level version of
13115 related_vector_mode. */
13117 tree
13120 {
13122 scalar_mode inner_mode;
13123 machine_mode simd_mode;
13124 tree vectype;
13135 /* Interoperability between modes requires one to be a constant multiple
13136 of the other, so that the number of vectors required for each operation
13137 is a compile-time constant. */
13145 /* For vector types of elements whose mode precision doesn't
13146 match their types precision we use a element type of mode
13147 precision. The vectorization routines will have to make sure
13148 they support the proper result truncation/extension.
13149 We also make sure to build vector types with INTEGER_TYPE
13150 component type only. */
13157 /* We shouldn't end up building VECTOR_TYPEs of non-scalar components.
13158 When the component mode passes the above test simply use a type
13159 corresponding to that mode. The theory is that any use that
13160 would cause problems with this will disable vectorization anyway. */
13165 /* We can't build a vector type of elements with alignment bigger than
13166 their size. */
13171 /* If we felt back to using the mode fail if there was
13172 no scalar type for it. */
13176 /* If no prevailing mode was supplied, use the mode the target prefers.
13177 Otherwise lookup a vector mode based on the prevailing mode. */
13179 {
13183 {
13184 /* Traditional behavior is not to take the integer mode
13185 literally, but simply to use it as a way of determining
13186 the vector size. It is up to mode_for_vector to decide
13187 what the TYPE_MODE should be.
13189 Note that nunits == 1 is allowed in order to support single
13190 element vector types. */
13194 }
13195 }
13199 {
13200 /* Fall back to using mode_for_vector, mostly in the hope of being
13201 able to use an integer mode. */
13208 }
13212 /* In cases where the mode was chosen by mode_for_vector, check that
13213 the target actually supports the chosen mode, or that it at least
13214 allows the vector mode to be replaced by a like-sized integer. */
13219 /* Re-attach the address-space qualifier if we canonicalized the scalar
13220 type. */
13222 return build_qualified_type
13226 }
13228 /* Function get_vectype_for_scalar_type.
13230 Returns the vector type corresponding to SCALAR_TYPE as supported
13231 by the target. If GROUP_SIZE is nonzero and we're performing BB
13232 vectorization, make sure that the number of elements in the vector
13233 is no bigger than GROUP_SIZE. */
13235 tree
13238 {
13239 /* For BB vectorization, we should always have a group size once we've
13240 constructed the SLP tree; the only valid uses of zero GROUP_SIZEs
13241 are tentative requests during things like early data reference
13242 analysis and pattern recognition. */
13245 else
13249 scalar_type);
13253 /* Register the natural choice of vector type, before the group size
13254 has been applied. */
13258 /* If the natural choice of vector type doesn't satisfy GROUP_SIZE,
13259 try again with an explicit number of elements. */
13261 && group_size
13263 {
13264 /* Start with the biggest number of units that fits within
13265 GROUP_SIZE and halve it until we find a valid vector type.
13266 Usually either the first attempt will succeed or all will
13267 fail (in the latter case because GROUP_SIZE is too small
13268 for the target), but it's possible that a target could have
13269 a hole between supported vector types.
13271 If GROUP_SIZE is not a power of 2, this has the effect of
13272 trying the largest power of 2 that fits within the group,
13273 even though the group is not a multiple of that vector size.
13274 The BB vectorizer will then try to carve up the group into
13275 smaller pieces. */
13277 do
13278 {
13282 }
13284 }
13287 }
13289 /* Return the vector type corresponding to SCALAR_TYPE as supported
13290 by the target. NODE, if nonnull, is the SLP tree node that will
13291 use the returned vector type. */
13293 tree
13295 {
13300 }
13302 /* Function get_mask_type_for_scalar_type.
13304 Returns the mask type corresponding to a result of comparison
13305 of vectors of specified SCALAR_TYPE as supported by target.
13306 If GROUP_SIZE is nonzero and we're performing BB vectorization,
13307 make sure that the number of elements in the vector is no bigger
13308 than GROUP_SIZE. */
13310 tree
13313 {
13320 }
13322 /* Function get_same_sized_vectype
13324 Returns a vector type corresponding to SCALAR_TYPE of size
13325 VECTOR_TYPE if supported by the target. */
13327 tree
13329 {
13333 poly_uint64 nunits;
13340 }
13342 /* Return true if replacing LOOP_VINFO->vector_mode with VECTOR_MODE
13343 would not change the chosen vector modes. */
13345 bool
13347 {
13354 }
13356 /* Function vect_is_simple_use.
13358 Input:
13359 VINFO - the vect info of the loop or basic block that is being vectorized.
13360 OPERAND - operand in the loop or bb.
13361 Output:
13362 DEF_STMT_INFO_OUT (optional) - information about the defining stmt in
13363 case OPERAND is an SSA_NAME that is defined in the vectorizable region
13364 DEF_STMT_OUT (optional) - the defining stmt in case OPERAND is an SSA_NAME;
13365 the definition could be anywhere in the function
13366 DT - the type of definition
13368 Returns whether a stmt with OPERAND can be vectorized.
13369 For loops, supportable operands are constants, loop invariants, and operands
13370 that are defined by the current iteration of the loop. Unsupportable
13371 operands are those that are defined by a previous iteration of the loop (as
13372 is the case in reduction/induction computations).
13373 For basic blocks, supportable operands are constants and bb invariants.
13374 For now, operands defined outside the basic block are not supported. */
13376 bool
13379 {
13387 {
13393 else
13395 }
13405 else
13406 {
13411 else
13412 {
13418 }
13421 }
13424 {
13427 {
13458 }
13459 }
13462 {
13467 }
13470 }
13472 /* Function vect_is_simple_use.
13474 Same as vect_is_simple_use but also determines the vector operand
13475 type of OPERAND and stores it to *VECTYPE. If the definition of
13476 OPERAND is vect_uninitialized_def, vect_constant_def or
13477 vect_external_def *VECTYPE will be set to NULL_TREE and the caller
13478 is responsible to compute the best suited vector type for the
13479 scalar operand. */
13481 bool
13485 {
13486 stmt_vec_info def_stmt_info;
13496 /* Now get a vector type if the def is internal, otherwise supply
13497 NULL_TREE and leave it up to the caller to figure out a proper
13498 type for the use stmt. */
13505 {
13511 }
13516 else
13520 }
13522 /* Function vect_is_simple_use.
13524 Same as vect_is_simple_use but determines the operand by operand
13525 position OPERAND from either STMT or SLP_NODE, filling in *OP
13526 and *SLP_DEF (when SLP_NODE is not NULL). */
13528 bool
13533 {
13535 {
13540 {
13543 }
13544 else
13545 {
13551 }
13552 }
13553 else
13554 {
13557 {
13560 {
13563 else
13565 }
13568 else
13570 }
13573 else
13576 }
13577 }
13579 /* If OP is not NULL and is external or constant update its vector
13580 type with VECTYPE. Returns true if successful or false if not,
13581 for example when conflicting vector types are present. */
13583 bool
13585 {
13590 /* For external defs refuse to produce VECTOR_BOOLEAN_TYPE_P, those
13591 should be handled by patters. Allow vect_constant_def for now. */
13597 }
13599 /* Function supportable_widening_operation
13601 Check whether an operation represented by the code CODE is a
13602 widening operation that is supported by the target platform in
13603 vector form (i.e., when operating on arguments of type VECTYPE_IN
13604 producing a result of type VECTYPE_OUT).
13606 Widening operations we currently support are NOP (CONVERT), FLOAT,
13607 FIX_TRUNC and WIDEN_MULT. This function checks if these operations
13608 are supported by the target platform either directly (via vector
13609 tree-codes), or via target builtins.
13611 Output:
13612 - CODE1 and CODE2 are codes of vector operations to be used when
13613 vectorizing the operation, if available.
13614 - MULTI_STEP_CVT determines the number of required intermediate steps in
13615 case of multi-step conversion (like char->short->int - in that case
13616 MULTI_STEP_CVT will be 1).
13617 - INTERM_TYPES contains the intermediate type required to perform the
13618 widening operation (short in the above example). */
13620 bool
13622 code_helper code,
13623 stmt_vec_info stmt_info,
13629 {
13632 machine_mode vec_mode;
13648 {
13650 /* Don't set c1 and c2 if code is not a tree_code. */
13654 /* The result of a vectorized widening operation usually requires
13655 two vectors (because the widened results do not fit into one vector).
13656 The generated vector results would normally be expected to be
13657 generated in the same order as in the original scalar computation,
13658 i.e. if 8 results are generated in each vector iteration, they are
13659 to be organized as follows:
13660 vect1: [res1,res2,res3,res4],
13661 vect2: [res5,res6,res7,res8].
13663 However, in the special case that the result of the widening
13664 operation is used in a reduction computation only, the order doesn't
13665 matter (because when vectorizing a reduction we change the order of
13666 the computation). Some targets can take advantage of this and
13667 generate more efficient code. For example, targets like Altivec,
13668 that support widen_mult using a sequence of {mult_even,mult_odd}
13669 generate the following vectors:
13670 vect1: [res1,res3,res5,res7],
13671 vect2: [res2,res4,res6,res8].
13673 When vectorizing outer-loops, we execute the inner-loop sequentially
13674 (each vectorized inner-loop iteration contributes to VF outer-loop
13675 iterations in parallel). We therefore don't allow to change the
13676 order of the computation in the inner-loop during outer-loop
13677 vectorization. */
13678 /* TODO: Another case in which order doesn't *really* matter is when we
13679 widen and then contract again, e.g. (short)((int)x * y >> 8).
13680 Normally, pack_trunc performs an even/odd permute, whereas the
13681 repack from an even/odd expansion would be an interleave, which
13682 would be significantly simpler for e.g. AVX2. */
13683 /* In any case, in order to avoid duplicating the code below, recurse
13684 on VEC_WIDEN_MULT_EVEN_EXPR. If it succeeds, all the return values
13685 are properly set up for the caller. If we fail, we'll continue with
13686 a VEC_WIDEN_MULT_LO/HI_EXPR check. */
13694 interm_types))
13695 {
13696 /* Elements in a vector with vect_used_by_reduction property cannot
13697 be reordered if the use chain with this property does not have the
13698 same operation. One such an example is s += a * b, where elements
13699 in a and b cannot be reordered. Here we check if the vector defined
13700 by STMT is only directly used in the reduction statement. */
13706 }
13722 /* Support the recursion induced just above. */
13732 CASE_CONVERT:
13749 }
13755 {
13756 /* The signedness is determined from output operand. */
13759 }
13765 {
13766 /* If the input and result modes are the same, a different optab
13767 is needed where we pass in the number of units in vectype. */
13770 }
13774 {
13775 /* If this is an internal fn then we must check whether the target
13776 supports either a low-high split or an even-odd split. */
13786 /* If we don't support low-high, then check for even-odd. */
13789 || !optab2
13791 {
13797 }
13798 }
13800 {
13802 {
13803 /* The signedness is determined from output operand. */
13806 }
13812 {
13813 /* If the input and result modes are the same, a different optab
13814 is needed where we pass in the number of units in vectype. */
13817 }
13818 else
13819 {
13822 }
13825 }
13837 {
13840 /* For scalar masks we may have different boolean
13841 vector types having the same QImode. Thus we
13842 add additional check for elements number. */
13846 }
13848 /* Check if it's a multi-step conversion that can be done using intermediate
13849 types. */
13857 /* We assume here that there will not be more than MAX_INTERM_CVT_STEPS
13858 intermediate steps in promotion sequence. We try
13859 MAX_INTERM_CVT_STEPS to get to NARROW_VECTYPE, and fail if we do
13860 not. */
13863 {
13866 intermediate_type
13869 {
13870 tree intermediate_element_type
13873 intermediate_type
13875 intermediate_mode);
13876 }
13877 else
13878 intermediate_type
13886 {
13887 /* If the input and result modes are the same, a different optab
13888 is needed where we pass in the number of units in vectype. */
13891 }
13892 else
13893 {
13896 }
13914 {
13920 }
13924 }
13928 }
13931 /* Function supportable_narrowing_operation
13933 Check whether an operation represented by the code CODE is a
13934 narrowing operation that is supported by the target platform in
13935 vector form (i.e., when operating on arguments of type VECTYPE_IN
13936 and producing a result of type VECTYPE_OUT).
13938 Narrowing operations we currently support are NOP (CONVERT), FIX_TRUNC
13939 and FLOAT. This function checks if these operations are supported by
13940 the target platform directly via vector tree-codes.
13942 Output:
13943 - CODE1 is the code of a vector operation to be used when
13944 vectorizing the operation, if available.
13945 - MULTI_STEP_CVT determines the number of required intermediate steps in
13946 case of multi-step conversion (like int->short->char - in that case
13947 MULTI_STEP_CVT will be 1).
13948 - INTERM_TYPES contains the intermediate type required to perform the
13949 narrowing operation (short in the above example). */
13951 bool
13956 {
13957 machine_mode vec_mode;
13974 {
13975 CASE_CONVERT:
13983 else
13989 /* The signedness is determined from output operand. */
14000 }
14012 {
14015 /* For scalar masks we may have different boolean
14016 vector types having the same QImode. Thus we
14017 add additional check for elements number. */
14021 }
14026 /* Check if it's a multi-step conversion that can be done using intermediate
14027 types. */
14032 else
14035 /* For multi-step FIX_TRUNC_EXPR prefer signed floating to integer
14036 conversion over unsigned, as unsigned FIX_TRUNC_EXPR is often more
14037 costly than signed. */
14039 {
14042 intermediate_type
14044 interm_optab
14050 {
14054 }
14055 }
14057 /* We assume here that there will not be more than MAX_INTERM_CVT_STEPS
14058 intermediate steps in promotion sequence. We try
14059 MAX_INTERM_CVT_STEPS to get to NARROW_VECTYPE, and fail if we do not. */
14062 {
14065 intermediate_type
14067 else
14068 intermediate_type
14076 else
14077 interm_optab
14079 optab_default);
14091 {
14097 }
14102 }
14106 }
14108 /* Generate and return a vector mask of MASK_TYPE such that
14109 mask[I] is true iff J + START_INDEX < END_INDEX for all J <= I.
14110 Add the statements to SEQ. */
14112 tree
14115 {
14119 OPTIMIZE_FOR_SPEED));
14123 tree tmp;
14126 else
14131 }
14133 /* Generate a vector mask of type MASK_TYPE for which index I is false iff
14134 J + START_INDEX < END_INDEX for all J <= I. Add the statements to SEQ. */
14136 tree
14138 tree end_index)
14139 {
14142 }
14144 /* Try to compute the vector types required to vectorize STMT_INFO,
14145 returning true on success and false if vectorization isn't possible.
14146 If GROUP_SIZE is nonzero and we're performing BB vectorization,
14147 take sure that the number of elements in the vectors is no bigger
14148 than GROUP_SIZE.
14150 On success:
14152 - Set *STMT_VECTYPE_OUT to:
14153 - NULL_TREE if the statement doesn't need to be vectorized;
14154 - the equivalent of STMT_VINFO_VECTYPE otherwise.
14156 - Set *NUNITS_VECTYPE_OUT to the vector type that contains the maximum
14157 number of units needed to vectorize STMT_INFO, or NULL_TREE if the
14158 statement does not help to determine the overall number of units. */
14160 opt_result
14165 {
14168 /* For BB vectorization, we should always have a group size once we've
14169 constructed the SLP tree; the only valid uses of zero GROUP_SIZEs
14170 are tentative requests during things like early data reference
14171 analysis and pattern recognition. */
14174 else
14181 /* MASK_STORE has no lhs, but is ok. */
14183 {
14185 {
14186 /* Ignore calls with no lhs. These must be calls to
14187 #pragma omp simd functions, and what vectorization factor
14188 it really needs can't be determined until
14189 vectorizable_simd_clone_call. */
14194 }
14198 }
14200 tree vectype;
14203 {
14208 }
14210 {
14219 }
14220 else
14221 {
14226 else
14230 {
14233 "get vectype for scalar type (group size %d):"
14235 else
14238 }
14242 "not vectorized:"
14244 scalar_type);
14248 }
14253 stmt);
14257 /* Don't try to compute scalar types if the stmt produces a boolean
14258 vector; use the existing vector type instead. */
14261 {
14262 /* The number of units is set according to the smallest scalar
14263 type (or the largest vector size, but we only support one
14264 vector size per vectorization). */
14268 {
14272 scalar_type);
14274 group_size);
14278 scalar_type);
14281 nunits_vectype);
14282 }
14283 }
14288 "Not vectorized: Incompatible number "
14293 {
14297 }
14301 }
14303 /* Generate and return statement sequence that sets vector length LEN that is:
14305 min_of_start_and_end = min (START_INDEX, END_INDEX);
14306 left_len = END_INDEX - min_of_start_and_end;
14307 rhs = min (left_len, LEN_LIMIT);
14308 LEN = rhs;
14310 Note: the cost of the code generated by this function is modeled
14311 by vect_estimate_min_profitable_iters, so changes here may need
14312 corresponding changes there. */
14314 gimple_seq
14316 {
14328 }