gcc/lra-int.h

   1 /* Local Register Allocator (LRA) intercommunication header file.
   2    Copyright (C) 2010-2020 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_LRA_INT_H
  22 #define GCC_LRA_INT_H
  23
  24 #define lra_assert(c) gcc_checking_assert (c)
  25
  26 /* The parameter used to prevent infinite reloading for an insn.  Each
  27    insn operands might require a reload and, if it is a memory, its
  28    base and index registers might require a reload too.  */
  29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
  30
  31 typedef struct lra_live_range *lra_live_range_t;
  32
  33 /* The structure describes program points where a given pseudo lives.
  34    The live ranges can be used to find conflicts with other pseudos.
  35    If the live ranges of two pseudos are intersected, the pseudos are
  36    in conflict.  */
  37 struct lra_live_range
  38 {
  39   /* Pseudo regno whose live range is described by given
  40      structure.  */
  41   int regno;
  42   /* Program point range.  */
  43   int start, finish;
  44   /* Next structure describing program points where the pseudo
  45      lives.  */
  46   lra_live_range_t next;
  47   /* Pointer to structures with the same start.  */
  48   lra_live_range_t start_next;
  49 };
  50
  51 typedef struct lra_copy *lra_copy_t;
  52
  53 /* Copy between pseudos which affects assigning hard registers.  */
  54 struct lra_copy
  55 {
  56   /* True if regno1 is the destination of the copy.  */
  57   bool regno1_dest_p;
  58   /* Execution frequency of the copy.  */
  59   int freq;
  60   /* Pseudos connected by the copy.  REGNO1 < REGNO2.  */
  61   int regno1, regno2;
  62   /* Next copy with correspondingly REGNO1 and REGNO2.  */
  63   lra_copy_t regno1_next, regno2_next;
  64 };
  65
  66 /* Common info about a register (pseudo or hard register).  */
  67 class lra_reg
  68 {
  69 public:
  70   /* Bitmap of UIDs of insns (including debug insns) referring the
  71      reg.  */
  72   bitmap_head insn_bitmap;
  73   /* The following fields are defined only for pseudos.  */
  74   /* Hard registers with which the pseudo conflicts.  */
  75   HARD_REG_SET conflict_hard_regs;
  76   /* We assign hard registers to reload pseudos which can occur in few
  77      places.  So two hard register preferences are enough for them.
  78      The following fields define the preferred hard registers.  If
  79      there are no such hard registers the first field value is
  80      negative.  If there is only one preferred hard register, the 2nd
  81      field is negative.  */
  82   int preferred_hard_regno1, preferred_hard_regno2;
  83   /* Profits to use the corresponding preferred hard registers.  If
  84      the both hard registers defined, the first hard register has not
  85      less profit than the second one.  */
  86   int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
  87 #ifdef STACK_REGS
  88   /* True if the pseudo should not be assigned to a stack register.  */
  89   bool no_stack_p;
  90 #endif
  91   /* Number of references and execution frequencies of the register in
  92      *non-debug* insns.  */
  93   int nrefs, freq;
  94   int last_reload;
  95   /* rtx used to undo the inheritance.  It can be non-null only
  96      between subsequent inheritance and undo inheritance passes.  */
  97   rtx restore_rtx;
  98   /* Value holding by register.  If the pseudos have the same value
  99      they do not conflict.  */
 100   int val;
 101   /* Offset from relative eliminate register to pesudo reg.  */
 102   poly_int64 offset;
 103   /* These members are set up in lra-lives.c and updated in
 104      lra-coalesce.c.  */
 105   /* The biggest size mode in which each pseudo reg is referred in
 106      whole function (possibly via subreg).  */
 107   machine_mode biggest_mode;
 108   /* Live ranges of the pseudo.  */
 109   lra_live_range_t live_ranges;
 110   /* This member is set up in lra-lives.c for subsequent
 111      assignments.  */
 112   lra_copy_t copies;
 113 };
 114
 115 /* References to the common info about each register.  */
 116 extern class lra_reg *lra_reg_info;
 117
 118 extern HARD_REG_SET hard_regs_spilled_into;
 119
 120 /* Static info about each insn operand (common for all insns with the
 121    same ICODE).  Warning: if the structure definition is changed, the
 122    initializer for debug_operand_data in lra.c should be changed
 123    too.  */
 124 struct lra_operand_data
 125 {
 126   /* The machine description constraint string of the operand.  */
 127   const char *constraint;
 128   /* Alternatives for which early_clobber can be true.  */
 129   alternative_mask early_clobber_alts;
 130   /* It is taken only from machine description (which is different
 131      from recog_data.operand_mode) and can be of VOIDmode.  */
 132   ENUM_BITFIELD(machine_mode) mode : 16;
 133   /* The type of the operand (in/out/inout).  */
 134   ENUM_BITFIELD (op_type) type : 8;
 135   /* Through if accessed through STRICT_LOW.  */
 136   unsigned int strict_low : 1;
 137   /* True if the operand is an operator.  */
 138   unsigned int is_operator : 1;
 139   /* True if the operand is an address.  */
 140   unsigned int is_address : 1;
 141 };
 142
 143 /* Info about register occurrence in an insn.  */
 144 struct lra_insn_reg
 145 {
 146   /* Alternatives for which early_clobber can be true.  */
 147   alternative_mask early_clobber_alts;
 148   /* The biggest mode through which the insn refers to the register
 149      occurrence (remember the register can be accessed through a
 150      subreg in the insn).  */
 151   ENUM_BITFIELD(machine_mode) biggest_mode : 16;
 152   /* The type of the corresponding operand which is the register.  */
 153   ENUM_BITFIELD (op_type) type : 8;
 154   /* True if the reg is accessed through a subreg and the subreg is
 155      just a part of the register.  */
 156   unsigned int subreg_p : 1;
 157   /* The corresponding regno of the register.  */
 158   int regno;
 159   /* Next reg info of the same insn.  */
 160   struct lra_insn_reg *next;
 161 };
 162
 163 /* Static part (common info for insns with the same ICODE) of LRA
 164    internal insn info. It exists in at most one exemplar for each
 165    non-negative ICODE. There is only one exception. Each asm insn has
 166    own structure.  Warning: if the structure definition is changed,
 167    the initializer for debug_insn_static_data in lra.c should be
 168    changed too.  */
 169 struct lra_static_insn_data
 170 {
 171   /* Static info about each insn operand.  */
 172   struct lra_operand_data *operand;
 173   /* Each duplication refers to the number of the corresponding
 174      operand which is duplicated.  */
 175   int *dup_num;
 176   /* The number of an operand marked as commutative, -1 otherwise.  */
 177   int commutative;
 178   /* Number of operands, duplications, and alternatives of the
 179      insn.  */
 180   char n_operands;
 181   char n_dups;
 182   char n_alternatives;
 183   /* Insns in machine description (or clobbers in asm) may contain
 184      explicit hard regs which are not operands.  The following list
 185      describes such hard registers.  */
 186   struct lra_insn_reg *hard_regs;
 187   /* Array [n_alternatives][n_operand] of static constraint info for
 188      given operand in given alternative.  This info can be changed if
 189      the target reg info is changed.  */
 190   const struct operand_alternative *operand_alternative;
 191 };
 192
 193 /* Negative insn alternative numbers used for special cases.  */
 194 #define LRA_UNKNOWN_ALT -1
 195 #define LRA_NON_CLOBBERED_ALT -2
 196
 197 /* LRA internal info about an insn (LRA internal insn
 198    representation).  */
 199 class lra_insn_recog_data
 200 {
 201 public:
 202   /* The insn code.  */
 203   int icode;
 204   /* The alternative should be used for the insn, LRA_UNKNOWN_ALT if
 205      unknown, or we should assume any alternative, or the insn is a
 206      debug insn.  LRA_NON_CLOBBERED_ALT means ignoring any earlier
 207      clobbers for the insn.  */
 208   int used_insn_alternative;
 209   /* SP offset before the insn relative to one at the func start.  */
 210   poly_int64 sp_offset;
 211   /* The insn itself.  */
 212   rtx_insn *insn;
 213   /* Common data for insns with the same ICODE.  Asm insns (their
 214      ICODE is negative) do not share such structures.  */
 215   struct lra_static_insn_data *insn_static_data;
 216   /* Two arrays of size correspondingly equal to the operand and the
 217      duplication numbers: */
 218   rtx **operand_loc; /* The operand locations, NULL if no operands.  */
 219   rtx **dup_loc; /* The dup locations, NULL if no dups.  */
 220   /* Number of hard registers implicitly used/clobbered in given call
 221      insn.  The value can be NULL or points to array of the hard
 222      register numbers ending with a negative value.  To differ
 223      clobbered and used hard regs, clobbered hard regs are incremented
 224      by FIRST_PSEUDO_REGISTER.  */
 225   int *arg_hard_regs;
 226   /* Cached value of get_preferred_alternatives.  */
 227   alternative_mask preferred_alternatives;
 228   /* The following member value is always NULL for a debug insn.  */
 229   struct lra_insn_reg *regs;
 230 };
 231
 232 typedef class lra_insn_recog_data *lra_insn_recog_data_t;
 233
 234 /* Whether the clobber is used temporary in LRA.  */
 235 #define LRA_TEMP_CLOBBER_P(x) \
 236   (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
 237
 238 /* Cost factor for each additional reload and maximal cost reject for
 239    insn reloads.  One might ask about such strange numbers.  Their
 240    values occurred historically from former reload pass.  */
 241 #define LRA_LOSER_COST_FACTOR 6
 242 #define LRA_MAX_REJECT 600
 243
 244 /* Maximum allowed number of assignment pass iterations after the
 245    latest spill pass when any former reload pseudo was spilled.  It is
 246    for preventing LRA cycling in a bug case.  */
 247 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
 248
 249 /* The maximal number of inheritance/split passes in LRA.  It should
 250    be more 1 in order to perform caller saves transformations and much
 251    less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
 252    as permitted constraint passes in some complicated cases.  The
 253    first inheritance/split pass has a biggest impact on generated code
 254    quality.  Each subsequent affects generated code in less degree.
 255    For example, the 3rd pass does not change generated SPEC2000 code
 256    at all on x86-64.  */
 257 #define LRA_MAX_INHERITANCE_PASSES 2
 258
 259 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
 260     || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 261 #error wrong LRA_MAX_INHERITANCE_PASSES value
 262 #endif
 263
 264 /* Analogous macro to the above one but for rematerialization.  */
 265 #define LRA_MAX_REMATERIALIZATION_PASSES 2
 266
 267 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
 268     || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 269 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
 270 #endif
 271
 272 /* lra.c: */
 273
 274 extern FILE *lra_dump_file;
 275
 276 extern bool lra_asm_error_p;
 277 extern bool lra_reg_spill_p;
 278
 279 extern HARD_REG_SET lra_no_alloc_regs;
 280
 281 extern int lra_insn_recog_data_len;
 282 extern lra_insn_recog_data_t *lra_insn_recog_data;
 283
 284 extern int lra_curr_reload_num;
 285
 286 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
 287 extern hashval_t lra_rtx_hash (rtx x);
 288 extern void lra_push_insn (rtx_insn *);
 289 extern void lra_push_insn_by_uid (unsigned int);
 290 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
 291 extern rtx_insn *lra_pop_insn (void);
 292 extern unsigned int lra_insn_stack_length (void);
 293
 294 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
 295                                                  enum reg_class, const char *);
 296 extern void lra_set_regno_unique_value (int);
 297 extern void lra_invalidate_insn_data (rtx_insn *);
 298 extern void lra_set_insn_deleted (rtx_insn *);
 299 extern void lra_delete_dead_insn (rtx_insn *);
 300 extern void lra_emit_add (rtx, rtx, rtx);
 301 extern void lra_emit_move (rtx, rtx);
 302 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 303
 304 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
 305                                    const char *);
 306
 307 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool, bool);
 308 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
 309
 310 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
 311 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
 312 extern void lra_set_used_insn_alternative (rtx_insn *, int);
 313 extern void lra_set_used_insn_alternative_by_uid (int, int);
 314
 315 extern void lra_invalidate_insn_regno_info (rtx_insn *);
 316 extern void lra_update_insn_regno_info (rtx_insn *);
 317 extern struct lra_insn_reg *lra_get_insn_regs (int);
 318
 319 extern void lra_free_copies (void);
 320 extern void lra_create_copy (int, int, int);
 321 extern lra_copy_t lra_get_copy (int);
 322
 323 extern int lra_new_regno_start;
 324 extern int lra_constraint_new_regno_start;
 325 extern int lra_bad_spill_regno_start;
 326 extern bitmap_head lra_inheritance_pseudos;
 327 extern bitmap_head lra_split_regs;
 328 extern bitmap_head lra_subreg_reload_pseudos;
 329 extern bitmap_head lra_optional_reload_pseudos;
 330
 331 /* lra-constraints.c: */
 332
 333 extern void lra_init_equiv (void);
 334 extern int lra_constraint_offset (int, machine_mode);
 335
 336 extern int lra_constraint_iter;
 337 extern bool check_and_force_assignment_correctness_p;
 338 extern int lra_inheritance_iter;
 339 extern int lra_undo_inheritance_iter;
 340 extern bool lra_constrain_insn (rtx_insn *);
 341 extern bool lra_constraints (bool);
 342 extern void lra_constraints_init (void);
 343 extern void lra_constraints_finish (void);
 344 extern bool spill_hard_reg_in_range (int, enum reg_class, rtx_insn *, rtx_insn *);
 345 extern void lra_inheritance (void);
 346 extern bool lra_undo_inheritance (void);
 347
 348 /* lra-lives.c: */
 349
 350 extern int lra_live_max_point;
 351 extern int *lra_point_freq;
 352
 353 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
 354
 355 extern int lra_live_range_iter;
 356 extern void lra_create_live_ranges (bool, bool);
 357 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
 358 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
 359                                                lra_live_range_t);
 360 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
 361                                            lra_live_range_t);
 362 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
 363 extern void debug (lra_live_range &ref);
 364 extern void debug (lra_live_range *ptr);
 365 extern void lra_debug_live_range_list (lra_live_range_t);
 366 extern void lra_debug_pseudo_live_ranges (int);
 367 extern void lra_debug_live_ranges (void);
 368 extern void lra_clear_live_ranges (void);
 369 extern void lra_live_ranges_init (void);
 370 extern void lra_live_ranges_finish (void);
 371 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
 372
 373 /* lra-assigns.c: */
 374
 375 extern int lra_assignment_iter;
 376 extern int lra_assignment_iter_after_spill;
 377 extern void lra_setup_reg_renumber (int, int, bool);
 378 extern bool lra_assign (bool &);
 379 extern bool lra_split_hard_reg_for (void);
 380
 381 /* lra-coalesce.c: */
 382
 383 extern int lra_coalesce_iter;
 384 extern bool lra_coalesce (void);
 385
 386 /* lra-spills.c:  */
 387
 388 extern bool lra_need_for_scratch_reg_p (void);
 389 extern bool lra_need_for_spills_p (void);
 390 extern void lra_spill (void);
 391 extern void lra_final_code_change (void);
 392
 393 /* lra-remat.c:  */
 394
 395 extern int lra_rematerialization_iter;
 396 extern bool lra_remat (void);
 397
 398 /* lra-elimination.c: */
 399
 400 extern void lra_debug_elim_table (void);
 401 extern int lra_get_elimination_hard_regno (int);
 402 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
 403                                  bool, bool, poly_int64, bool);
 404 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, poly_int64);
 405 extern void lra_eliminate (bool, bool);
 406
 407 extern void lra_eliminate_reg_if_possible (rtx *);
 408
 409 \f
 410
 411 /* Return the hard register which given pseudo REGNO assigned to.
 412    Negative value means that the register got memory or we don't know
 413    allocation yet.  */
 414 static inline int
 415 lra_get_regno_hard_regno (int regno)
 416 {
 417   resize_reg_info ();
 418   return reg_renumber[regno];
 419 }
 420
 421 /* Change class of pseudo REGNO to NEW_CLASS.  Print info about it
 422    using TITLE.  Output a new line if NL_P.  */
 423 static void inline
 424 lra_change_class (int regno, enum reg_class new_class,
 425                   const char *title, bool nl_p)
 426 {
 427   lra_assert (regno >= FIRST_PSEUDO_REGISTER);
 428   if (lra_dump_file != NULL)
 429     fprintf (lra_dump_file, "%s class %s for r%d",
 430              title, reg_class_names[new_class], regno);
 431   setup_reg_classes (regno, new_class, NO_REGS, new_class);
 432   if (lra_dump_file != NULL && nl_p)
 433     fprintf (lra_dump_file, "\n");
 434 }
 435
 436 /* Update insn operands which are duplication of NOP operand.  The
 437    insn is represented by its LRA internal representation ID.  */
 438 static inline void
 439 lra_update_dup (lra_insn_recog_data_t id, int nop)
 440 {
 441   int i;
 442   struct lra_static_insn_data *static_id = id->insn_static_data;
 443
 444   for (i = 0; i < static_id->n_dups; i++)
 445     if (static_id->dup_num[i] == nop)
 446       *id->dup_loc[i] = *id->operand_loc[nop];
 447 }
 448
 449 /* Process operator duplications in insn with ID.  We do it after the
 450    operands processing.  Generally speaking, we could do this probably
 451    simultaneously with operands processing because a common practice
 452    is to enumerate the operators after their operands.  */
 453 static inline void
 454 lra_update_operator_dups (lra_insn_recog_data_t id)
 455 {
 456   int i;
 457   struct lra_static_insn_data *static_id = id->insn_static_data;
 458
 459   for (i = 0; i < static_id->n_dups; i++)
 460     {
 461       int ndup = static_id->dup_num[i];
 462
 463       if (static_id->operand[ndup].is_operator)
 464         *id->dup_loc[i] = *id->operand_loc[ndup];
 465     }
 466 }
 467
 468 /* Return info about INSN.  Set up the info if it is not done yet.  */
 469 static inline lra_insn_recog_data_t
 470 lra_get_insn_recog_data (rtx_insn *insn)
 471 {
 472   lra_insn_recog_data_t data;
 473   unsigned int uid = INSN_UID (insn);
 474
 475   if (lra_insn_recog_data_len > (int) uid
 476       && (data = lra_insn_recog_data[uid]) != NULL)
 477     {
 478       /* Check that we did not change insn without updating the insn
 479          info.  */
 480       lra_assert (data->insn == insn
 481                   && (INSN_CODE (insn) < 0
 482                       || data->icode == INSN_CODE (insn)));
 483       return data;
 484     }
 485   return lra_set_insn_recog_data (insn);
 486 }
 487
 488 /* Update offset from pseudos with VAL by INCR.  */
 489 static inline void
 490 lra_update_reg_val_offset (int val, poly_int64 incr)
 491 {
 492   int i;
 493
 494   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
 495     {
 496       if (lra_reg_info[i].val == val)
 497         lra_reg_info[i].offset += incr;
 498     }
 499 }
 500
 501 /* Return true if register content is equal to VAL with OFFSET.  */
 502 static inline bool
 503 lra_reg_val_equal_p (int regno, int val, poly_int64 offset)
 504 {
 505   if (lra_reg_info[regno].val == val
 506       && known_eq (lra_reg_info[regno].offset, offset))
 507     return true;
 508
 509   return false;
 510 }
 511
 512 /* Assign value of register FROM to TO.  */
 513 static inline void
 514 lra_assign_reg_val (int from, int to)
 515 {
 516   lra_reg_info[to].val = lra_reg_info[from].val;
 517   lra_reg_info[to].offset = lra_reg_info[from].offset;
 518 }
 519
 520 #endif /* GCC_LRA_INT_H */