1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
36 #include "cfgcleanup.h"
47 #include "insn-codes.h"
49 #include "diagnostic-core.h"
53 #include "tree-pass.h"
55 #include "shrink-wrap.h"
65 #ifndef MAX_CONDITIONAL_EXECUTE
66 #define MAX_CONDITIONAL_EXECUTE \
67 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
71 #ifndef HAVE_cbranchcc4
72 #define HAVE_cbranchcc4 0
75 #define IFCVT_MULTIPLE_DUMPS 1
77 #define NULL_BLOCK ((basic_block) NULL)
79 /* True if after combine pass. */
80 static bool ifcvt_after_combine
;
82 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
83 static int num_possible_if_blocks
;
85 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
87 static int num_updated_if_blocks
;
89 /* # of changes made. */
90 static int num_true_changes
;
92 /* Whether conditional execution changes were made. */
93 static int cond_exec_changed_p
;
95 /* Forward references. */
96 static int count_bb_insns (const_basic_block
);
97 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
98 static rtx_insn
*first_active_insn (basic_block
);
99 static rtx_insn
*last_active_insn (basic_block
, int);
100 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
101 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
102 static basic_block
block_fallthru (basic_block
);
103 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
105 static rtx
cond_exec_get_condition (rtx_insn
*);
106 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
107 static int noce_operand_ok (const_rtx
);
108 static void merge_if_block (ce_if_block
*);
109 static int find_cond_trap (basic_block
, edge
, edge
);
110 static basic_block
find_if_header (basic_block
, int);
111 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
112 static int noce_find_if_block (basic_block
, edge
, edge
, int);
113 static int cond_exec_find_if_block (ce_if_block
*);
114 static int find_if_case_1 (basic_block
, edge
, edge
);
115 static int find_if_case_2 (basic_block
, edge
, edge
);
116 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
118 static void noce_emit_move_insn (rtx
, rtx
);
119 static rtx_insn
*block_has_only_trap (basic_block
);
121 /* Count the number of non-jump active insns in BB. */
124 count_bb_insns (const_basic_block bb
)
127 rtx_insn
*insn
= BB_HEAD (bb
);
131 if (active_insn_p (insn
) && !JUMP_P (insn
))
134 if (insn
== BB_END (bb
))
136 insn
= NEXT_INSN (insn
);
142 /* Determine whether the total insn_rtx_cost on non-jump insns in
143 basic block BB is less than MAX_COST. This function returns
144 false if the cost of any instruction could not be estimated.
146 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
147 as those insns are being speculated. MAX_COST is scaled with SCALE
148 plus a small fudge factor. */
151 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
154 rtx_insn
*insn
= BB_HEAD (bb
);
155 bool speed
= optimize_bb_for_speed_p (bb
);
157 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
158 applied to insn_rtx_cost when optimizing for size. Only do
159 this after combine because if-conversion might interfere with
160 passes before combine.
162 Use optimize_function_for_speed_p instead of the pre-defined
163 variable speed to make sure it is set to same value for all
164 basic blocks in one if-conversion transformation. */
165 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
166 scale
= REG_BR_PROB_BASE
;
167 /* Our branch probability/scaling factors are just estimates and don't
168 account for cases where we can get speculation for free and other
169 secondary benefits. So we fudge the scale factor to make speculating
170 appear a little more profitable when optimizing for performance. */
172 scale
+= REG_BR_PROB_BASE
/ 8;
179 if (NONJUMP_INSN_P (insn
))
181 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
185 /* If this instruction is the load or set of a "stack" register,
186 such as a floating point register on x87, then the cost of
187 speculatively executing this insn may need to include
188 the additional cost of popping its result off of the
189 register stack. Unfortunately, correctly recognizing and
190 accounting for this additional overhead is tricky, so for
191 now we simply prohibit such speculative execution. */
194 rtx set
= single_set (insn
);
195 if (set
&& STACK_REG_P (SET_DEST (set
)))
201 if (count
>= max_cost
)
204 else if (CALL_P (insn
))
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
215 /* Return the first non-jump active insn in the basic block. */
218 first_active_insn (basic_block bb
)
220 rtx_insn
*insn
= BB_HEAD (bb
);
224 if (insn
== BB_END (bb
))
226 insn
= NEXT_INSN (insn
);
229 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
231 if (insn
== BB_END (bb
))
233 insn
= NEXT_INSN (insn
);
242 /* Return the last non-jump active (non-jump) insn in the basic block. */
245 last_active_insn (basic_block bb
, int skip_use_p
)
247 rtx_insn
*insn
= BB_END (bb
);
248 rtx_insn
*head
= BB_HEAD (bb
);
252 || DEBUG_INSN_P (insn
)
254 && NONJUMP_INSN_P (insn
)
255 && GET_CODE (PATTERN (insn
)) == USE
))
259 insn
= PREV_INSN (insn
);
268 /* Return the active insn before INSN inside basic block CURR_BB. */
271 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
273 if (!insn
|| insn
== BB_HEAD (curr_bb
))
276 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
278 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
281 /* No other active insn all the way to the start of the basic block. */
282 if (insn
== BB_HEAD (curr_bb
))
289 /* Return the active insn after INSN inside basic block CURR_BB. */
292 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
294 if (!insn
|| insn
== BB_END (curr_bb
))
297 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
299 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
302 /* No other active insn all the way to the end of the basic block. */
303 if (insn
== BB_END (curr_bb
))
310 /* Return the basic block reached by falling though the basic block BB. */
313 block_fallthru (basic_block bb
)
315 edge e
= find_fallthru_edge (bb
->succs
);
317 return (e
) ? e
->dest
: NULL_BLOCK
;
320 /* Return true if RTXs A and B can be safely interchanged. */
323 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
325 if (!rtx_equal_p (a
, b
))
328 if (GET_CODE (a
) != MEM
)
331 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
332 reference is not. Interchanging a dead type-unsafe memory reference with
333 a live type-safe one creates a live type-unsafe memory reference, in other
334 words, it makes the program illegal.
335 We check here conservatively whether the two memory references have equal
336 memory attributes. */
338 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
342 /* Go through a bunch of insns, converting them to conditional
343 execution format if possible. Return TRUE if all of the non-note
344 insns were processed. */
347 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
348 /* if block information */rtx_insn
*start
,
349 /* first insn to look at */rtx end
,
350 /* last insn to look at */rtx test
,
351 /* conditional execution test */int prob_val
,
352 /* probability of branch taken. */int mod_ok
)
354 int must_be_last
= FALSE
;
362 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
364 /* dwarf2out can't cope with conditional prologues. */
365 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
368 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
371 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
373 /* dwarf2out can't cope with conditional unwind info. */
374 if (RTX_FRAME_RELATED_P (insn
))
377 /* Remove USE insns that get in the way. */
378 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
380 /* ??? Ug. Actually unlinking the thing is problematic,
381 given what we'd have to coordinate with our callers. */
382 SET_INSN_DELETED (insn
);
386 /* Last insn wasn't last? */
390 if (modified_in_p (test
, insn
))
397 /* Now build the conditional form of the instruction. */
398 pattern
= PATTERN (insn
);
399 xtest
= copy_rtx (test
);
401 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
403 if (GET_CODE (pattern
) == COND_EXEC
)
405 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
408 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
409 COND_EXEC_TEST (pattern
));
410 pattern
= COND_EXEC_CODE (pattern
);
413 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
415 /* If the machine needs to modify the insn being conditionally executed,
416 say for example to force a constant integer operand into a temp
417 register, do so here. */
418 #ifdef IFCVT_MODIFY_INSN
419 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
424 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
426 if (CALL_P (insn
) && prob_val
>= 0)
427 validate_change (insn
, ®_NOTES (insn
),
428 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
429 prob_val
, REG_NOTES (insn
)), 1);
439 /* Return the condition for a jump. Do not do any special processing. */
442 cond_exec_get_condition (rtx_insn
*jump
)
446 if (any_condjump_p (jump
))
447 test_if
= SET_SRC (pc_set (jump
));
450 cond
= XEXP (test_if
, 0);
452 /* If this branches to JUMP_LABEL when the condition is false,
453 reverse the condition. */
454 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
455 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
457 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
461 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
468 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
469 to conditional execution. Return TRUE if we were successful at
470 converting the block. */
473 cond_exec_process_if_block (ce_if_block
* ce_info
,
474 /* if block information */int do_multiple_p
)
476 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
477 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
478 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
479 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
480 rtx_insn
*then_start
; /* first insn in THEN block */
481 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
482 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
483 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
484 int max
; /* max # of insns to convert. */
485 int then_mod_ok
; /* whether conditional mods are ok in THEN */
486 rtx true_expr
; /* test for else block insns */
487 rtx false_expr
; /* test for then block insns */
488 int true_prob_val
; /* probability of else block */
489 int false_prob_val
; /* probability of then block */
490 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
491 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
492 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
493 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
494 int then_n_insns
, else_n_insns
, n_insns
;
495 enum rtx_code false_code
;
498 /* If test is comprised of && or || elements, and we've failed at handling
499 all of them together, just use the last test if it is the special case of
500 && elements without an ELSE block. */
501 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
503 if (else_bb
|| ! ce_info
->and_and_p
)
506 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
507 ce_info
->num_multiple_test_blocks
= 0;
508 ce_info
->num_and_and_blocks
= 0;
509 ce_info
->num_or_or_blocks
= 0;
512 /* Find the conditional jump to the ELSE or JOIN part, and isolate
514 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
518 /* If the conditional jump is more than just a conditional jump,
519 then we can not do conditional execution conversion on this block. */
520 if (! onlyjump_p (BB_END (test_bb
)))
523 /* Collect the bounds of where we're to search, skipping any labels, jumps
524 and notes at the beginning and end of the block. Then count the total
525 number of insns and see if it is small enough to convert. */
526 then_start
= first_active_insn (then_bb
);
527 then_end
= last_active_insn (then_bb
, TRUE
);
528 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
529 n_insns
= then_n_insns
;
530 max
= MAX_CONDITIONAL_EXECUTE
;
537 else_start
= first_active_insn (else_bb
);
538 else_end
= last_active_insn (else_bb
, TRUE
);
539 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
540 n_insns
+= else_n_insns
;
542 /* Look for matching sequences at the head and tail of the two blocks,
543 and limit the range of insns to be converted if possible. */
544 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
545 &then_first_tail
, &else_first_tail
,
547 if (then_first_tail
== BB_HEAD (then_bb
))
548 then_start
= then_end
= NULL
;
549 if (else_first_tail
== BB_HEAD (else_bb
))
550 else_start
= else_end
= NULL
;
555 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
557 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
558 n_insns
-= 2 * n_matching
;
563 && then_n_insns
> n_matching
564 && else_n_insns
> n_matching
)
566 int longest_match
= MIN (then_n_insns
- n_matching
,
567 else_n_insns
- n_matching
);
569 = flow_find_head_matching_sequence (then_bb
, else_bb
,
578 /* We won't pass the insns in the head sequence to
579 cond_exec_process_insns, so we need to test them here
580 to make sure that they don't clobber the condition. */
581 for (insn
= BB_HEAD (then_bb
);
582 insn
!= NEXT_INSN (then_last_head
);
583 insn
= NEXT_INSN (insn
))
584 if (!LABEL_P (insn
) && !NOTE_P (insn
)
585 && !DEBUG_INSN_P (insn
)
586 && modified_in_p (test_expr
, insn
))
590 if (then_last_head
== then_end
)
591 then_start
= then_end
= NULL
;
592 if (else_last_head
== else_end
)
593 else_start
= else_end
= NULL
;
598 then_start
= find_active_insn_after (then_bb
, then_last_head
);
600 else_start
= find_active_insn_after (else_bb
, else_last_head
);
601 n_insns
-= 2 * n_matching
;
609 /* Map test_expr/test_jump into the appropriate MD tests to use on
610 the conditionally executed code. */
612 true_expr
= test_expr
;
614 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
615 if (false_code
!= UNKNOWN
)
616 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
617 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
619 false_expr
= NULL_RTX
;
621 #ifdef IFCVT_MODIFY_TESTS
622 /* If the machine description needs to modify the tests, such as setting a
623 conditional execution register from a comparison, it can do so here. */
624 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
626 /* See if the conversion failed. */
627 if (!true_expr
|| !false_expr
)
631 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
634 true_prob_val
= XINT (note
, 0);
635 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
643 /* If we have && or || tests, do them here. These tests are in the adjacent
644 blocks after the first block containing the test. */
645 if (ce_info
->num_multiple_test_blocks
> 0)
647 basic_block bb
= test_bb
;
648 basic_block last_test_bb
= ce_info
->last_test_bb
;
655 rtx_insn
*start
, *end
;
657 enum rtx_code f_code
;
659 bb
= block_fallthru (bb
);
660 start
= first_active_insn (bb
);
661 end
= last_active_insn (bb
, TRUE
);
663 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
664 false_prob_val
, FALSE
))
667 /* If the conditional jump is more than just a conditional jump, then
668 we can not do conditional execution conversion on this block. */
669 if (! onlyjump_p (BB_END (bb
)))
672 /* Find the conditional jump and isolate the test. */
673 t
= cond_exec_get_condition (BB_END (bb
));
677 f_code
= reversed_comparison_code (t
, BB_END (bb
));
678 if (f_code
== UNKNOWN
)
681 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
682 if (ce_info
->and_and_p
)
684 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
685 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
689 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
690 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
693 /* If the machine description needs to modify the tests, such as
694 setting a conditional execution register from a comparison, it can
696 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
697 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
699 /* See if the conversion failed. */
707 while (bb
!= last_test_bb
);
710 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
711 on then THEN block. */
712 then_mod_ok
= (else_bb
== NULL_BLOCK
);
714 /* Go through the THEN and ELSE blocks converting the insns if possible
715 to conditional execution. */
719 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
720 false_expr
, false_prob_val
,
724 if (else_bb
&& else_end
725 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
726 true_expr
, true_prob_val
, TRUE
))
729 /* If we cannot apply the changes, fail. Do not go through the normal fail
730 processing, since apply_change_group will call cancel_changes. */
731 if (! apply_change_group ())
733 #ifdef IFCVT_MODIFY_CANCEL
734 /* Cancel any machine dependent changes. */
735 IFCVT_MODIFY_CANCEL (ce_info
);
740 #ifdef IFCVT_MODIFY_FINAL
741 /* Do any machine dependent final modifications. */
742 IFCVT_MODIFY_FINAL (ce_info
);
745 /* Conversion succeeded. */
747 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
748 n_insns
, (n_insns
== 1) ? " was" : "s were");
750 /* Merge the blocks! If we had matching sequences, make sure to delete one
751 copy at the appropriate location first: delete the copy in the THEN branch
752 for a tail sequence so that the remaining one is executed last for both
753 branches, and delete the copy in the ELSE branch for a head sequence so
754 that the remaining one is executed first for both branches. */
757 rtx_insn
*from
= then_first_tail
;
759 from
= find_active_insn_after (then_bb
, from
);
760 delete_insn_chain (from
, BB_END (then_bb
), false);
763 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
765 merge_if_block (ce_info
);
766 cond_exec_changed_p
= TRUE
;
770 #ifdef IFCVT_MODIFY_CANCEL
771 /* Cancel any machine dependent changes. */
772 IFCVT_MODIFY_CANCEL (ce_info
);
779 /* Used by noce_process_if_block to communicate with its subroutines.
781 The subroutines know that A and B may be evaluated freely. They
782 know that X is a register. They should insert new instructions
783 before cond_earliest. */
787 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
788 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
790 /* The jump that ends TEST_BB. */
793 /* The jump condition. */
796 /* New insns should be inserted before this one. */
797 rtx_insn
*cond_earliest
;
799 /* Insns in the THEN and ELSE block. There is always just this
800 one insns in those blocks. The insns are single_set insns.
801 If there was no ELSE block, INSN_B is the last insn before
802 COND_EARLIEST, or NULL_RTX. In the former case, the insn
803 operands are still valid, as if INSN_B was moved down below
805 rtx_insn
*insn_a
, *insn_b
;
807 /* The SET_SRC of INSN_A and INSN_B. */
810 /* The SET_DEST of INSN_A. */
813 /* True if this if block is not canonical. In the canonical form of
814 if blocks, the THEN_BB is the block reached via the fallthru edge
815 from TEST_BB. For the noce transformations, we allow the symmetric
817 bool then_else_reversed
;
819 /* Estimated cost of the particular branch instruction. */
823 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
824 static int noce_try_move (struct noce_if_info
*);
825 static int noce_try_store_flag (struct noce_if_info
*);
826 static int noce_try_addcc (struct noce_if_info
*);
827 static int noce_try_store_flag_constants (struct noce_if_info
*);
828 static int noce_try_store_flag_mask (struct noce_if_info
*);
829 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
831 static int noce_try_cmove (struct noce_if_info
*);
832 static int noce_try_cmove_arith (struct noce_if_info
*);
833 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
834 static int noce_try_minmax (struct noce_if_info
*);
835 static int noce_try_abs (struct noce_if_info
*);
836 static int noce_try_sign_mask (struct noce_if_info
*);
838 /* Helper function for noce_try_store_flag*. */
841 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
844 rtx cond
= if_info
->cond
;
848 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
849 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
851 /* If earliest == jump, or when the condition is complex, try to
852 build the store_flag insn directly. */
856 rtx set
= pc_set (if_info
->jump
);
857 cond
= XEXP (SET_SRC (set
), 0);
858 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
859 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
860 reversep
= !reversep
;
861 if (if_info
->then_else_reversed
)
862 reversep
= !reversep
;
866 code
= reversed_comparison_code (cond
, if_info
->jump
);
868 code
= GET_CODE (cond
);
870 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
871 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
873 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
875 rtx set
= gen_rtx_SET (x
, src
);
878 rtx_insn
*insn
= emit_insn (set
);
880 if (recog_memoized (insn
) >= 0)
882 rtx_insn
*seq
= get_insns ();
886 if_info
->cond_earliest
= if_info
->jump
;
894 /* Don't even try if the comparison operands or the mode of X are weird. */
895 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
898 return emit_store_flag (x
, code
, XEXP (cond
, 0),
899 XEXP (cond
, 1), VOIDmode
,
900 (code
== LTU
|| code
== LEU
901 || code
== GEU
|| code
== GTU
), normalize
);
904 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
905 X is the destination/target and Y is the value to copy. */
908 noce_emit_move_insn (rtx x
, rtx y
)
910 machine_mode outmode
;
914 if (GET_CODE (x
) != STRICT_LOW_PART
)
916 rtx_insn
*seq
, *insn
;
921 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
922 otherwise construct a suitable SET pattern ourselves. */
923 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
924 ? emit_move_insn (x
, y
)
925 : emit_insn (gen_rtx_SET (x
, y
));
929 if (recog_memoized (insn
) <= 0)
931 if (GET_CODE (x
) == ZERO_EXTRACT
)
933 rtx op
= XEXP (x
, 0);
934 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
935 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
937 /* store_bit_field expects START to be relative to
938 BYTES_BIG_ENDIAN and adjusts this value for machines with
939 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
940 invoke store_bit_field again it is necessary to have the START
941 value from the first call. */
942 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
945 start
= BITS_PER_UNIT
- start
- size
;
948 gcc_assert (REG_P (op
));
949 start
= BITS_PER_WORD
- start
- size
;
953 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
954 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
958 switch (GET_RTX_CLASS (GET_CODE (y
)))
961 ot
= code_to_optab (GET_CODE (y
));
965 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
966 if (target
!= NULL_RTX
)
969 emit_move_insn (x
, target
);
978 ot
= code_to_optab (GET_CODE (y
));
982 target
= expand_binop (GET_MODE (y
), ot
,
983 XEXP (y
, 0), XEXP (y
, 1),
985 if (target
!= NULL_RTX
)
988 emit_move_insn (x
, target
);
1004 outer
= XEXP (x
, 0);
1005 inner
= XEXP (outer
, 0);
1006 outmode
= GET_MODE (outer
);
1007 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1008 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1012 /* Return the CC reg if it is used in COND. */
1015 cc_in_cond (rtx cond
)
1017 if (HAVE_cbranchcc4
&& cond
1018 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1019 return XEXP (cond
, 0);
1024 /* Return sequence of instructions generated by if conversion. This
1025 function calls end_sequence() to end the current stream, ensures
1026 that the instructions are unshared, recognizable non-jump insns.
1027 On failure, this function returns a NULL_RTX. */
1030 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1033 rtx_insn
*seq
= get_insns ();
1034 rtx cc
= cc_in_cond (if_info
->cond
);
1036 set_used_flags (if_info
->x
);
1037 set_used_flags (if_info
->cond
);
1038 set_used_flags (if_info
->a
);
1039 set_used_flags (if_info
->b
);
1040 unshare_all_rtl_in_chain (seq
);
1043 /* Make sure that all of the instructions emitted are recognizable,
1044 and that we haven't introduced a new jump instruction.
1045 As an exercise for the reader, build a general mechanism that
1046 allows proper placement of required clobbers. */
1047 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1049 || recog_memoized (insn
) == -1
1050 /* Make sure new generated code does not clobber CC. */
1051 || (cc
&& set_of (cc
, insn
)))
1057 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1058 "if (a == b) x = a; else x = b" into "x = b". */
1061 noce_try_move (struct noce_if_info
*if_info
)
1063 rtx cond
= if_info
->cond
;
1064 enum rtx_code code
= GET_CODE (cond
);
1068 if (code
!= NE
&& code
!= EQ
)
1071 /* This optimization isn't valid if either A or B could be a NaN
1072 or a signed zero. */
1073 if (HONOR_NANS (if_info
->x
)
1074 || HONOR_SIGNED_ZEROS (if_info
->x
))
1077 /* Check whether the operands of the comparison are A and in
1079 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1080 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1081 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1082 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1084 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1087 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1089 /* Avoid generating the move if the source is the destination. */
1090 if (! rtx_equal_p (if_info
->x
, y
))
1093 noce_emit_move_insn (if_info
->x
, y
);
1094 seq
= end_ifcvt_sequence (if_info
);
1098 emit_insn_before_setloc (seq
, if_info
->jump
,
1099 INSN_LOCATION (if_info
->insn_a
));
1106 /* Convert "if (test) x = 1; else x = 0".
1108 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1109 tried in noce_try_store_flag_constants after noce_try_cmove has had
1110 a go at the conversion. */
1113 noce_try_store_flag (struct noce_if_info
*if_info
)
1119 if (CONST_INT_P (if_info
->b
)
1120 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1121 && if_info
->a
== const0_rtx
)
1123 else if (if_info
->b
== const0_rtx
1124 && CONST_INT_P (if_info
->a
)
1125 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1126 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1134 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1137 if (target
!= if_info
->x
)
1138 noce_emit_move_insn (if_info
->x
, target
);
1140 seq
= end_ifcvt_sequence (if_info
);
1144 emit_insn_before_setloc (seq
, if_info
->jump
,
1145 INSN_LOCATION (if_info
->insn_a
));
1155 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1158 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1163 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1168 if (CONST_INT_P (if_info
->a
)
1169 && CONST_INT_P (if_info
->b
))
1171 mode
= GET_MODE (if_info
->x
);
1172 ifalse
= INTVAL (if_info
->a
);
1173 itrue
= INTVAL (if_info
->b
);
1174 bool subtract_flag_p
= false;
1176 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1177 /* Make sure we can represent the difference between the two values. */
1179 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1182 diff
= trunc_int_for_mode (diff
, mode
);
1184 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1188 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1191 /* We could collapse these cases but it is easier to follow the
1192 diff/STORE_FLAG_VALUE combinations when they are listed
1196 => 4 + (test != 0). */
1197 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1200 => can_reverse | 4 + (test == 0)
1201 !can_reverse | 3 - (test != 0). */
1202 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1204 reversep
= can_reverse
;
1205 subtract_flag_p
= !can_reverse
;
1208 => can_reverse | 3 + (test == 0)
1209 !can_reverse | 4 - (test != 0). */
1210 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1212 reversep
= can_reverse
;
1213 subtract_flag_p
= !can_reverse
;
1216 => 4 + (test != 0). */
1217 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1222 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1223 && (STORE_FLAG_VALUE
== 1
1224 || if_info
->branch_cost
>= 2))
1226 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1227 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1232 else if (itrue
== -1
1233 && (STORE_FLAG_VALUE
== -1
1234 || if_info
->branch_cost
>= 2))
1236 else if (ifalse
== -1 && can_reverse
1237 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1242 else if ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1243 || if_info
->branch_cost
>= 3)
1250 std::swap (itrue
, ifalse
);
1251 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1255 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1262 /* if (test) x = 3; else x = 4;
1263 => x = 3 + (test == 0); */
1264 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1266 /* Always use ifalse here. It should have been swapped with itrue
1267 when appropriate when reversep is true. */
1268 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1269 gen_int_mode (ifalse
, mode
), target
,
1270 if_info
->x
, 0, OPTAB_WIDEN
);
1273 /* if (test) x = 8; else x = 0;
1274 => x = (test != 0) << 3; */
1275 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1277 target
= expand_simple_binop (mode
, ASHIFT
,
1278 target
, GEN_INT (tmp
), if_info
->x
, 0,
1282 /* if (test) x = -1; else x = b;
1283 => x = -(test != 0) | b; */
1284 else if (itrue
== -1)
1286 target
= expand_simple_binop (mode
, IOR
,
1287 target
, gen_int_mode (ifalse
, mode
),
1288 if_info
->x
, 0, OPTAB_WIDEN
);
1291 /* if (test) x = a; else x = b;
1292 => x = (-(test != 0) & (b - a)) + a; */
1295 target
= expand_simple_binop (mode
, AND
,
1296 target
, gen_int_mode (diff
, mode
),
1297 if_info
->x
, 0, OPTAB_WIDEN
);
1299 target
= expand_simple_binop (mode
, PLUS
,
1300 target
, gen_int_mode (ifalse
, mode
),
1301 if_info
->x
, 0, OPTAB_WIDEN
);
1310 if (target
!= if_info
->x
)
1311 noce_emit_move_insn (if_info
->x
, target
);
1313 seq
= end_ifcvt_sequence (if_info
);
1317 emit_insn_before_setloc (seq
, if_info
->jump
,
1318 INSN_LOCATION (if_info
->insn_a
));
1325 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1326 similarly for "foo--". */
1329 noce_try_addcc (struct noce_if_info
*if_info
)
1333 int subtract
, normalize
;
1335 if (GET_CODE (if_info
->a
) == PLUS
1336 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1337 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1340 rtx cond
= if_info
->cond
;
1341 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1343 /* First try to use addcc pattern. */
1344 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1345 && general_operand (XEXP (cond
, 1), VOIDmode
))
1348 target
= emit_conditional_add (if_info
->x
, code
,
1353 XEXP (if_info
->a
, 1),
1354 GET_MODE (if_info
->x
),
1355 (code
== LTU
|| code
== GEU
1356 || code
== LEU
|| code
== GTU
));
1359 if (target
!= if_info
->x
)
1360 noce_emit_move_insn (if_info
->x
, target
);
1362 seq
= end_ifcvt_sequence (if_info
);
1366 emit_insn_before_setloc (seq
, if_info
->jump
,
1367 INSN_LOCATION (if_info
->insn_a
));
1373 /* If that fails, construct conditional increment or decrement using
1375 if (if_info
->branch_cost
>= 2
1376 && (XEXP (if_info
->a
, 1) == const1_rtx
1377 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1380 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1381 subtract
= 0, normalize
= 0;
1382 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1383 subtract
= 1, normalize
= 0;
1385 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1388 target
= noce_emit_store_flag (if_info
,
1389 gen_reg_rtx (GET_MODE (if_info
->x
)),
1393 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1394 subtract
? MINUS
: PLUS
,
1395 if_info
->b
, target
, if_info
->x
,
1399 if (target
!= if_info
->x
)
1400 noce_emit_move_insn (if_info
->x
, target
);
1402 seq
= end_ifcvt_sequence (if_info
);
1406 emit_insn_before_setloc (seq
, if_info
->jump
,
1407 INSN_LOCATION (if_info
->insn_a
));
1417 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1420 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1427 if ((if_info
->branch_cost
>= 2
1428 || STORE_FLAG_VALUE
== -1)
1429 && ((if_info
->a
== const0_rtx
1430 && rtx_equal_p (if_info
->b
, if_info
->x
))
1431 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1434 && if_info
->b
== const0_rtx
1435 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1438 target
= noce_emit_store_flag (if_info
,
1439 gen_reg_rtx (GET_MODE (if_info
->x
)),
1442 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1444 target
, if_info
->x
, 0,
1449 int old_cost
, new_cost
, insn_cost
;
1452 if (target
!= if_info
->x
)
1453 noce_emit_move_insn (if_info
->x
, target
);
1455 seq
= end_ifcvt_sequence (if_info
);
1459 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1460 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1461 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1462 new_cost
= seq_cost (seq
, speed_p
);
1464 if (new_cost
> old_cost
)
1467 emit_insn_before_setloc (seq
, if_info
->jump
,
1468 INSN_LOCATION (if_info
->insn_a
));
1478 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1481 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1482 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1484 rtx target ATTRIBUTE_UNUSED
;
1485 int unsignedp ATTRIBUTE_UNUSED
;
1487 /* If earliest == jump, try to build the cmove insn directly.
1488 This is helpful when combine has created some complex condition
1489 (like for alpha's cmovlbs) that we can't hope to regenerate
1490 through the normal interface. */
1492 if (if_info
->cond_earliest
== if_info
->jump
)
1494 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1495 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1496 cond
, vtrue
, vfalse
);
1497 rtx set
= gen_rtx_SET (x
, if_then_else
);
1500 rtx_insn
*insn
= emit_insn (set
);
1502 if (recog_memoized (insn
) >= 0)
1504 rtx_insn
*seq
= get_insns ();
1514 /* Don't even try if the comparison operands are weird
1515 except that the target supports cbranchcc4. */
1516 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1517 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1519 if (!(HAVE_cbranchcc4
)
1520 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1521 || cmp_b
!= const0_rtx
)
1525 unsignedp
= (code
== LTU
|| code
== GEU
1526 || code
== LEU
|| code
== GTU
);
1528 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1529 vtrue
, vfalse
, GET_MODE (x
),
1534 /* We might be faced with a situation like:
1537 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1538 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1540 We can't do a conditional move in mode M, but it's possible that we
1541 could do a conditional move in mode N instead and take a subreg of
1544 If we can't create new pseudos, though, don't bother. */
1545 if (reload_completed
)
1548 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1550 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1551 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1552 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1553 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1554 rtx promoted_target
;
1556 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1557 || byte_vtrue
!= byte_vfalse
1558 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1559 != SUBREG_PROMOTED_VAR_P (vfalse
))
1560 || (SUBREG_PROMOTED_GET (vtrue
)
1561 != SUBREG_PROMOTED_GET (vfalse
)))
1564 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1566 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1567 VOIDmode
, reg_vtrue
, reg_vfalse
,
1568 GET_MODE (reg_vtrue
), unsignedp
);
1569 /* Nope, couldn't do it in that mode either. */
1573 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1574 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1575 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1576 emit_move_insn (x
, target
);
1583 /* Try only simple constants and registers here. More complex cases
1584 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1585 has had a go at it. */
1588 noce_try_cmove (struct noce_if_info
*if_info
)
1594 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1595 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1599 code
= GET_CODE (if_info
->cond
);
1600 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1601 XEXP (if_info
->cond
, 0),
1602 XEXP (if_info
->cond
, 1),
1603 if_info
->a
, if_info
->b
);
1607 if (target
!= if_info
->x
)
1608 noce_emit_move_insn (if_info
->x
, target
);
1610 seq
= end_ifcvt_sequence (if_info
);
1614 emit_insn_before_setloc (seq
, if_info
->jump
,
1615 INSN_LOCATION (if_info
->insn_a
));
1628 /* Try more complex cases involving conditional_move. */
1631 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1637 rtx_insn
*insn_a
, *insn_b
;
1642 rtx_insn
*ifcvt_seq
;
1644 /* A conditional move from two memory sources is equivalent to a
1645 conditional on their addresses followed by a load. Don't do this
1646 early because it'll screw alias analysis. Note that we've
1647 already checked for no side effects. */
1648 /* ??? FIXME: Magic number 5. */
1649 if (cse_not_expected
1650 && MEM_P (a
) && MEM_P (b
)
1651 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1652 && if_info
->branch_cost
>= 5)
1654 machine_mode address_mode
= get_address_mode (a
);
1658 x
= gen_reg_rtx (address_mode
);
1662 /* ??? We could handle this if we knew that a load from A or B could
1663 not trap or fault. This is also true if we've already loaded
1664 from the address along the path from ENTRY. */
1665 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1668 /* if (test) x = a + b; else x = c - d;
1675 code
= GET_CODE (if_info
->cond
);
1676 insn_a
= if_info
->insn_a
;
1677 insn_b
= if_info
->insn_b
;
1679 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1680 if insn_rtx_cost can't be estimated. */
1684 = insn_rtx_cost (PATTERN (insn_a
),
1685 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a
)));
1686 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1695 += insn_rtx_cost (PATTERN (insn_b
),
1696 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b
)));
1697 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1701 /* Possibly rearrange operands to make things come out more natural. */
1702 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1705 if (rtx_equal_p (b
, x
))
1707 else if (general_operand (b
, GET_MODE (b
)))
1712 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
1714 std::swap (insn_a
, insn_b
);
1723 /* If either operand is complex, load it into a register first.
1724 The best way to do this is to copy the original insn. In this
1725 way we preserve any clobbers etc that the insn may have had.
1726 This is of course not possible in the IS_MEM case. */
1727 if (! general_operand (a
, GET_MODE (a
)))
1733 rtx reg
= gen_reg_rtx (GET_MODE (a
));
1734 insn
= emit_insn (gen_rtx_SET (reg
, a
));
1737 goto end_seq_and_fail
;
1740 a
= gen_reg_rtx (GET_MODE (a
));
1741 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
1742 rtx set
= single_set (copy_of_a
);
1744 insn
= emit_insn (PATTERN (copy_of_a
));
1746 if (recog_memoized (insn
) < 0)
1747 goto end_seq_and_fail
;
1749 if (! general_operand (b
, GET_MODE (b
)))
1757 rtx reg
= gen_reg_rtx (GET_MODE (b
));
1758 pat
= gen_rtx_SET (reg
, b
);
1761 goto end_seq_and_fail
;
1764 b
= gen_reg_rtx (GET_MODE (b
));
1765 rtx_insn
*copy_of_insn_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
1766 rtx set
= single_set (copy_of_insn_b
);
1768 pat
= PATTERN (copy_of_insn_b
);
1771 /* If insn to set up A clobbers any registers B depends on, try to
1772 swap insn that sets up A with the one that sets up B. If even
1773 that doesn't help, punt. */
1774 last
= get_last_insn ();
1775 if (last
&& modified_in_p (orig_b
, last
))
1777 new_insn
= emit_insn_before (pat
, get_insns ());
1778 if (modified_in_p (orig_a
, new_insn
))
1779 goto end_seq_and_fail
;
1782 new_insn
= emit_insn (pat
);
1784 if (recog_memoized (new_insn
) < 0)
1785 goto end_seq_and_fail
;
1788 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
1789 XEXP (if_info
->cond
, 1), a
, b
);
1792 goto end_seq_and_fail
;
1794 /* If we're handling a memory for above, emit the load now. */
1797 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
1799 /* Copy over flags as appropriate. */
1800 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
1801 MEM_VOLATILE_P (mem
) = 1;
1802 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
1803 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
1805 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
1807 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
1808 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
1810 noce_emit_move_insn (if_info
->x
, mem
);
1812 else if (target
!= x
)
1813 noce_emit_move_insn (x
, target
);
1815 ifcvt_seq
= end_ifcvt_sequence (if_info
);
1819 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
1820 INSN_LOCATION (if_info
->insn_a
));
1828 /* For most cases, the simplified condition we found is the best
1829 choice, but this is not the case for the min/max/abs transforms.
1830 For these we wish to know that it is A or B in the condition. */
1833 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
1834 rtx_insn
**earliest
)
1840 /* If target is already mentioned in the known condition, return it. */
1841 if (reg_mentioned_p (target
, if_info
->cond
))
1843 *earliest
= if_info
->cond_earliest
;
1844 return if_info
->cond
;
1847 set
= pc_set (if_info
->jump
);
1848 cond
= XEXP (SET_SRC (set
), 0);
1850 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
1851 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
1852 if (if_info
->then_else_reversed
)
1855 /* If we're looking for a constant, try to make the conditional
1856 have that constant in it. There are two reasons why it may
1857 not have the constant we want:
1859 1. GCC may have needed to put the constant in a register, because
1860 the target can't compare directly against that constant. For
1861 this case, we look for a SET immediately before the comparison
1862 that puts a constant in that register.
1864 2. GCC may have canonicalized the conditional, for example
1865 replacing "if x < 4" with "if x <= 3". We can undo that (or
1866 make equivalent types of changes) to get the constants we need
1867 if they're off by one in the right direction. */
1869 if (CONST_INT_P (target
))
1871 enum rtx_code code
= GET_CODE (if_info
->cond
);
1872 rtx op_a
= XEXP (if_info
->cond
, 0);
1873 rtx op_b
= XEXP (if_info
->cond
, 1);
1874 rtx_insn
*prev_insn
;
1876 /* First, look to see if we put a constant in a register. */
1877 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
1879 && BLOCK_FOR_INSN (prev_insn
)
1880 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
1881 && INSN_P (prev_insn
)
1882 && GET_CODE (PATTERN (prev_insn
)) == SET
)
1884 rtx src
= find_reg_equal_equiv_note (prev_insn
);
1886 src
= SET_SRC (PATTERN (prev_insn
));
1887 if (CONST_INT_P (src
))
1889 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
1891 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
1894 if (CONST_INT_P (op_a
))
1896 std::swap (op_a
, op_b
);
1897 code
= swap_condition (code
);
1902 /* Now, look to see if we can get the right constant by
1903 adjusting the conditional. */
1904 if (CONST_INT_P (op_b
))
1906 HOST_WIDE_INT desired_val
= INTVAL (target
);
1907 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
1912 if (actual_val
== desired_val
+ 1)
1915 op_b
= GEN_INT (desired_val
);
1919 if (actual_val
== desired_val
- 1)
1922 op_b
= GEN_INT (desired_val
);
1926 if (actual_val
== desired_val
- 1)
1929 op_b
= GEN_INT (desired_val
);
1933 if (actual_val
== desired_val
+ 1)
1936 op_b
= GEN_INT (desired_val
);
1944 /* If we made any changes, generate a new conditional that is
1945 equivalent to what we started with, but has the right
1947 if (code
!= GET_CODE (if_info
->cond
)
1948 || op_a
!= XEXP (if_info
->cond
, 0)
1949 || op_b
!= XEXP (if_info
->cond
, 1))
1951 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
1952 *earliest
= if_info
->cond_earliest
;
1957 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
1958 earliest
, target
, HAVE_cbranchcc4
, true);
1959 if (! cond
|| ! reg_mentioned_p (target
, cond
))
1962 /* We almost certainly searched back to a different place.
1963 Need to re-verify correct lifetimes. */
1965 /* X may not be mentioned in the range (cond_earliest, jump]. */
1966 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
1967 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
1970 /* A and B may not be modified in the range [cond_earliest, jump). */
1971 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
1973 && (modified_in_p (if_info
->a
, insn
)
1974 || modified_in_p (if_info
->b
, insn
)))
1980 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
1983 noce_try_minmax (struct noce_if_info
*if_info
)
1986 rtx_insn
*earliest
, *seq
;
1987 enum rtx_code code
, op
;
1990 /* ??? Reject modes with NaNs or signed zeros since we don't know how
1991 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
1992 to get the target to tell us... */
1993 if (HONOR_SIGNED_ZEROS (if_info
->x
)
1994 || HONOR_NANS (if_info
->x
))
1997 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2001 /* Verify the condition is of the form we expect, and canonicalize
2002 the comparison code. */
2003 code
= GET_CODE (cond
);
2004 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2006 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2009 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2011 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2013 code
= swap_condition (code
);
2018 /* Determine what sort of operation this is. Note that the code is for
2019 a taken branch, so the code->operation mapping appears backwards. */
2052 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2053 if_info
->a
, if_info
->b
,
2054 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2060 if (target
!= if_info
->x
)
2061 noce_emit_move_insn (if_info
->x
, target
);
2063 seq
= end_ifcvt_sequence (if_info
);
2067 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2068 if_info
->cond
= cond
;
2069 if_info
->cond_earliest
= earliest
;
2074 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2075 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2079 noce_try_abs (struct noce_if_info
*if_info
)
2081 rtx cond
, target
, a
, b
, c
;
2082 rtx_insn
*earliest
, *seq
;
2084 bool one_cmpl
= false;
2086 /* Reject modes with signed zeros. */
2087 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2090 /* Recognize A and B as constituting an ABS or NABS. The canonical
2091 form is a branch around the negation, taken when the object is the
2092 first operand of a comparison against 0 that evaluates to true. */
2095 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2097 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2102 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2107 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2116 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2120 /* Verify the condition is of the form we expect. */
2121 if (rtx_equal_p (XEXP (cond
, 0), b
))
2123 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2131 /* Verify that C is zero. Search one step backward for a
2132 REG_EQUAL note or a simple source if necessary. */
2136 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2138 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2139 && (set
= single_set (insn
))
2140 && rtx_equal_p (SET_DEST (set
), c
))
2142 rtx note
= find_reg_equal_equiv_note (insn
);
2152 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2153 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2154 c
= get_pool_constant (XEXP (c
, 0));
2156 /* Work around funny ideas get_condition has wrt canonicalization.
2157 Note that these rtx constants are known to be CONST_INT, and
2158 therefore imply integer comparisons. */
2159 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2161 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2163 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2166 /* Determine what sort of operation this is. */
2167 switch (GET_CODE (cond
))
2186 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2189 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2191 /* ??? It's a quandary whether cmove would be better here, especially
2192 for integers. Perhaps combine will clean things up. */
2193 if (target
&& negate
)
2196 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2199 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2209 if (target
!= if_info
->x
)
2210 noce_emit_move_insn (if_info
->x
, target
);
2212 seq
= end_ifcvt_sequence (if_info
);
2216 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2217 if_info
->cond
= cond
;
2218 if_info
->cond_earliest
= earliest
;
2223 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2226 noce_try_sign_mask (struct noce_if_info
*if_info
)
2232 bool t_unconditional
;
2234 cond
= if_info
->cond
;
2235 code
= GET_CODE (cond
);
2240 if (if_info
->a
== const0_rtx
)
2242 if ((code
== LT
&& c
== const0_rtx
)
2243 || (code
== LE
&& c
== constm1_rtx
))
2246 else if (if_info
->b
== const0_rtx
)
2248 if ((code
== GE
&& c
== const0_rtx
)
2249 || (code
== GT
&& c
== constm1_rtx
))
2253 if (! t
|| side_effects_p (t
))
2256 /* We currently don't handle different modes. */
2257 mode
= GET_MODE (t
);
2258 if (GET_MODE (m
) != mode
)
2261 /* This is only profitable if T is unconditionally executed/evaluated in the
2262 original insn sequence or T is cheap. The former happens if B is the
2263 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2264 INSN_B which can happen for e.g. conditional stores to memory. For the
2265 cost computation use the block TEST_BB where the evaluation will end up
2266 after the transformation. */
2269 && (if_info
->insn_b
== NULL_RTX
2270 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2271 if (!(t_unconditional
2272 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2273 < COSTS_N_INSNS (2))))
2277 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2278 "(signed) m >> 31" directly. This benefits targets with specialized
2279 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2280 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2281 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2290 noce_emit_move_insn (if_info
->x
, t
);
2292 seq
= end_ifcvt_sequence (if_info
);
2296 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2301 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2305 noce_try_bitop (struct noce_if_info
*if_info
)
2307 rtx cond
, x
, a
, result
;
2314 cond
= if_info
->cond
;
2315 code
= GET_CODE (cond
);
2317 /* Check for no else condition. */
2318 if (! rtx_equal_p (x
, if_info
->b
))
2321 /* Check for a suitable condition. */
2322 if (code
!= NE
&& code
!= EQ
)
2324 if (XEXP (cond
, 1) != const0_rtx
)
2326 cond
= XEXP (cond
, 0);
2328 /* ??? We could also handle AND here. */
2329 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2331 if (XEXP (cond
, 1) != const1_rtx
2332 || !CONST_INT_P (XEXP (cond
, 2))
2333 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2335 bitnum
= INTVAL (XEXP (cond
, 2));
2336 mode
= GET_MODE (x
);
2337 if (BITS_BIG_ENDIAN
)
2338 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2339 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2346 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2348 /* Check for "if (X & C) x = x op C". */
2349 if (! rtx_equal_p (x
, XEXP (a
, 0))
2350 || !CONST_INT_P (XEXP (a
, 1))
2351 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2352 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2355 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2356 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2357 if (GET_CODE (a
) == IOR
)
2358 result
= (code
== NE
) ? a
: NULL_RTX
;
2359 else if (code
== NE
)
2361 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2362 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2363 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2367 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2368 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2369 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2372 else if (GET_CODE (a
) == AND
)
2374 /* Check for "if (X & C) x &= ~C". */
2375 if (! rtx_equal_p (x
, XEXP (a
, 0))
2376 || !CONST_INT_P (XEXP (a
, 1))
2377 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2378 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2381 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2382 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2383 result
= (code
== EQ
) ? a
: NULL_RTX
;
2391 noce_emit_move_insn (x
, result
);
2392 seq
= end_ifcvt_sequence (if_info
);
2396 emit_insn_before_setloc (seq
, if_info
->jump
,
2397 INSN_LOCATION (if_info
->insn_a
));
2403 /* Similar to get_condition, only the resulting condition must be
2404 valid at JUMP, instead of at EARLIEST.
2406 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2407 THEN block of the caller, and we have to reverse the condition. */
2410 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2415 if (! any_condjump_p (jump
))
2418 set
= pc_set (jump
);
2420 /* If this branches to JUMP_LABEL when the condition is false,
2421 reverse the condition. */
2422 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2423 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2425 /* We may have to reverse because the caller's if block is not canonical,
2426 i.e. the THEN block isn't the fallthrough block for the TEST block
2427 (see find_if_header). */
2428 if (then_else_reversed
)
2431 /* If the condition variable is a register and is MODE_INT, accept it. */
2433 cond
= XEXP (SET_SRC (set
), 0);
2434 tmp
= XEXP (cond
, 0);
2435 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2436 && (GET_MODE (tmp
) != BImode
2437 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2442 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2443 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2447 /* Otherwise, fall back on canonicalize_condition to do the dirty
2448 work of manipulating MODE_CC values and COMPARE rtx codes. */
2449 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2450 NULL_RTX
, HAVE_cbranchcc4
, true);
2452 /* We don't handle side-effects in the condition, like handling
2453 REG_INC notes and making sure no duplicate conditions are emitted. */
2454 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2460 /* Return true if OP is ok for if-then-else processing. */
2463 noce_operand_ok (const_rtx op
)
2465 if (side_effects_p (op
))
2468 /* We special-case memories, so handle any of them with
2469 no address side effects. */
2471 return ! side_effects_p (XEXP (op
, 0));
2473 return ! may_trap_p (op
);
2476 /* Return true if a write into MEM may trap or fault. */
2479 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2483 if (MEM_READONLY_P (mem
))
2486 if (may_trap_or_fault_p (mem
))
2489 addr
= XEXP (mem
, 0);
2491 /* Call target hook to avoid the effects of -fpic etc.... */
2492 addr
= targetm
.delegitimize_address (addr
);
2495 switch (GET_CODE (addr
))
2503 addr
= XEXP (addr
, 0);
2507 addr
= XEXP (addr
, 1);
2510 if (CONST_INT_P (XEXP (addr
, 1)))
2511 addr
= XEXP (addr
, 0);
2518 if (SYMBOL_REF_DECL (addr
)
2519 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2529 /* Return whether we can use store speculation for MEM. TOP_BB is the
2530 basic block above the conditional block where we are considering
2531 doing the speculative store. We look for whether MEM is set
2532 unconditionally later in the function. */
2535 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2537 basic_block dominator
;
2539 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2541 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2545 FOR_BB_INSNS (dominator
, insn
)
2547 /* If we see something that might be a memory barrier, we
2548 have to stop looking. Even if the MEM is set later in
2549 the function, we still don't want to set it
2550 unconditionally before the barrier. */
2552 && (volatile_insn_p (PATTERN (insn
))
2553 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2556 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2558 if (modified_in_p (XEXP (mem
, 0), insn
))
2567 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2568 it without using conditional execution. Return TRUE if we were successful
2569 at converting the block. */
2572 noce_process_if_block (struct noce_if_info
*if_info
)
2574 basic_block test_bb
= if_info
->test_bb
; /* test block */
2575 basic_block then_bb
= if_info
->then_bb
; /* THEN */
2576 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
2577 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
2578 rtx_insn
*jump
= if_info
->jump
;
2579 rtx cond
= if_info
->cond
;
2580 rtx_insn
*insn_a
, *insn_b
;
2582 rtx orig_x
, x
, a
, b
;
2585 /* We're looking for patterns of the form
2587 (1) if (...) x = a; else x = b;
2588 (2) x = b; if (...) x = a;
2589 (3) if (...) x = a; // as if with an initial x = x.
2591 The later patterns require jumps to be more expensive.
2593 ??? For future expansion, look for multiple X in such patterns. */
2595 /* Look for one of the potential sets. */
2596 insn_a
= first_active_insn (then_bb
);
2598 || insn_a
!= last_active_insn (then_bb
, FALSE
)
2599 || (set_a
= single_set (insn_a
)) == NULL_RTX
)
2602 x
= SET_DEST (set_a
);
2603 a
= SET_SRC (set_a
);
2605 /* Look for the other potential set. Make sure we've got equivalent
2607 /* ??? This is overconservative. Storing to two different mems is
2608 as easy as conditionally computing the address. Storing to a
2609 single mem merely requires a scratch memory to use as one of the
2610 destination addresses; often the memory immediately below the
2611 stack pointer is available for this. */
2615 insn_b
= first_active_insn (else_bb
);
2617 || insn_b
!= last_active_insn (else_bb
, FALSE
)
2618 || (set_b
= single_set (insn_b
)) == NULL_RTX
2619 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
)))
2624 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2625 /* We're going to be moving the evaluation of B down from above
2626 COND_EARLIEST to JUMP. Make sure the relevant data is still
2629 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
2630 || !NONJUMP_INSN_P (insn_b
)
2631 || (set_b
= single_set (insn_b
)) == NULL_RTX
2632 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
2633 || ! noce_operand_ok (SET_SRC (set_b
))
2634 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
2635 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
2636 /* Avoid extending the lifetime of hard registers on small
2637 register class machines. */
2638 || (REG_P (SET_SRC (set_b
))
2639 && HARD_REGISTER_P (SET_SRC (set_b
))
2640 && targetm
.small_register_classes_for_mode_p
2641 (GET_MODE (SET_SRC (set_b
))))
2642 /* Likewise with X. In particular this can happen when
2643 noce_get_condition looks farther back in the instruction
2644 stream than one might expect. */
2645 || reg_overlap_mentioned_p (x
, cond
)
2646 || reg_overlap_mentioned_p (x
, a
)
2647 || modified_between_p (x
, insn_b
, jump
))
2654 /* If x has side effects then only the if-then-else form is safe to
2655 convert. But even in that case we would need to restore any notes
2656 (such as REG_INC) at then end. That can be tricky if
2657 noce_emit_move_insn expands to more than one insn, so disable the
2658 optimization entirely for now if there are side effects. */
2659 if (side_effects_p (x
))
2662 b
= (set_b
? SET_SRC (set_b
) : x
);
2664 /* Only operate on register destinations, and even then avoid extending
2665 the lifetime of hard registers on small register class machines. */
2668 || (HARD_REGISTER_P (x
)
2669 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
2671 if (GET_MODE (x
) == BLKmode
)
2674 if (GET_CODE (x
) == ZERO_EXTRACT
2675 && (!CONST_INT_P (XEXP (x
, 1))
2676 || !CONST_INT_P (XEXP (x
, 2))))
2679 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
2680 ? XEXP (x
, 0) : x
));
2683 /* Don't operate on sources that may trap or are volatile. */
2684 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
2688 /* Set up the info block for our subroutines. */
2689 if_info
->insn_a
= insn_a
;
2690 if_info
->insn_b
= insn_b
;
2695 /* Skip it if the instruction to be moved might clobber CC. */
2696 cc
= cc_in_cond (cond
);
2698 && (set_of (cc
, insn_a
)
2699 || (insn_b
&& set_of (cc
, insn_b
))))
2702 /* Try optimizations in some approximation of a useful order. */
2703 /* ??? Should first look to see if X is live incoming at all. If it
2704 isn't, we don't need anything but an unconditional set. */
2706 /* Look and see if A and B are really the same. Avoid creating silly
2707 cmove constructs that no one will fix up later. */
2708 if (rtx_interchangeable_p (a
, b
))
2710 /* If we have an INSN_B, we don't have to create any new rtl. Just
2711 move the instruction that we already have. If we don't have an
2712 INSN_B, that means that A == X, and we've got a noop move. In
2713 that case don't do anything and let the code below delete INSN_A. */
2714 if (insn_b
&& else_bb
)
2718 if (else_bb
&& insn_b
== BB_END (else_bb
))
2719 BB_END (else_bb
) = PREV_INSN (insn_b
);
2720 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
2722 /* If there was a REG_EQUAL note, delete it since it may have been
2723 true due to this insn being after a jump. */
2724 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
2725 remove_note (insn_b
, note
);
2729 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2730 x must be executed twice. */
2731 else if (insn_b
&& side_effects_p (orig_x
))
2738 if (!set_b
&& MEM_P (orig_x
))
2740 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2741 for optimizations if writing to x may trap or fault,
2742 i.e. it's a memory other than a static var or a stack slot,
2743 is misaligned on strict aligned machines or is read-only. If
2744 x is a read-only memory, then the program is valid only if we
2745 avoid the store into it. If there are stores on both the
2746 THEN and ELSE arms, then we can go ahead with the conversion;
2747 either the program is broken, or the condition is always
2748 false such that the other memory is selected. */
2749 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
2752 /* Avoid store speculation: given "if (...) x = a" where x is a
2753 MEM, we only want to do the store if x is always set
2754 somewhere in the function. This avoids cases like
2755 if (pthread_mutex_trylock(mutex))
2757 where we only want global_variable to be changed if the mutex
2758 is held. FIXME: This should ideally be expressed directly in
2760 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
2764 if (noce_try_move (if_info
))
2766 if (noce_try_store_flag (if_info
))
2768 if (noce_try_bitop (if_info
))
2770 if (noce_try_minmax (if_info
))
2772 if (noce_try_abs (if_info
))
2774 if (!targetm
.have_conditional_execution ()
2775 && noce_try_store_flag_constants (if_info
))
2777 if (HAVE_conditional_move
2778 && noce_try_cmove (if_info
))
2780 if (! targetm
.have_conditional_execution ())
2782 if (noce_try_addcc (if_info
))
2784 if (noce_try_store_flag_mask (if_info
))
2786 if (HAVE_conditional_move
2787 && noce_try_cmove_arith (if_info
))
2789 if (noce_try_sign_mask (if_info
))
2793 if (!else_bb
&& set_b
)
2805 /* If we used a temporary, fix it up now. */
2811 noce_emit_move_insn (orig_x
, x
);
2813 set_used_flags (orig_x
);
2814 unshare_all_rtl_in_chain (seq
);
2817 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
2820 /* The original THEN and ELSE blocks may now be removed. The test block
2821 must now jump to the join block. If the test block and the join block
2822 can be merged, do so. */
2825 delete_basic_block (else_bb
);
2829 remove_edge (find_edge (test_bb
, join_bb
));
2831 remove_edge (find_edge (then_bb
, join_bb
));
2832 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
2833 delete_basic_block (then_bb
);
2836 if (can_merge_blocks_p (test_bb
, join_bb
))
2838 merge_blocks (test_bb
, join_bb
);
2842 num_updated_if_blocks
++;
2846 /* Check whether a block is suitable for conditional move conversion.
2847 Every insn must be a simple set of a register to a constant or a
2848 register. For each assignment, store the value in the pointer map
2849 VALS, keyed indexed by register pointer, then store the register
2850 pointer in REGS. COND is the condition we will test. */
2853 check_cond_move_block (basic_block bb
,
2854 hash_map
<rtx
, rtx
> *vals
,
2859 rtx cc
= cc_in_cond (cond
);
2861 /* We can only handle simple jumps at the end of the basic block.
2862 It is almost impossible to update the CFG otherwise. */
2864 if (JUMP_P (insn
) && !onlyjump_p (insn
))
2867 FOR_BB_INSNS (bb
, insn
)
2871 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2873 set
= single_set (insn
);
2877 dest
= SET_DEST (set
);
2878 src
= SET_SRC (set
);
2880 || (HARD_REGISTER_P (dest
)
2881 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
2884 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
2887 if (side_effects_p (src
) || side_effects_p (dest
))
2890 if (may_trap_p (src
) || may_trap_p (dest
))
2893 /* Don't try to handle this if the source register was
2894 modified earlier in the block. */
2897 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
2898 && vals
->get (SUBREG_REG (src
))))
2901 /* Don't try to handle this if the destination register was
2902 modified earlier in the block. */
2903 if (vals
->get (dest
))
2906 /* Don't try to handle this if the condition uses the
2907 destination register. */
2908 if (reg_overlap_mentioned_p (dest
, cond
))
2911 /* Don't try to handle this if the source register is modified
2912 later in the block. */
2913 if (!CONSTANT_P (src
)
2914 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
2917 /* Skip it if the instruction to be moved might clobber CC. */
2918 if (cc
&& set_of (cc
, insn
))
2921 vals
->put (dest
, src
);
2923 regs
->safe_push (dest
);
2929 /* Given a basic block BB suitable for conditional move conversion,
2930 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
2931 the register values depending on COND, emit the insns in the block as
2932 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2933 processed. The caller has started a sequence for the conversion.
2934 Return true if successful, false if something goes wrong. */
2937 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
2938 basic_block bb
, rtx cond
,
2939 hash_map
<rtx
, rtx
> *then_vals
,
2940 hash_map
<rtx
, rtx
> *else_vals
,
2945 rtx cond_arg0
, cond_arg1
;
2947 code
= GET_CODE (cond
);
2948 cond_arg0
= XEXP (cond
, 0);
2949 cond_arg1
= XEXP (cond
, 1);
2951 FOR_BB_INSNS (bb
, insn
)
2953 rtx set
, target
, dest
, t
, e
;
2955 /* ??? Maybe emit conditional debug insn? */
2956 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2958 set
= single_set (insn
);
2959 gcc_assert (set
&& REG_P (SET_DEST (set
)));
2961 dest
= SET_DEST (set
);
2963 rtx
*then_slot
= then_vals
->get (dest
);
2964 rtx
*else_slot
= else_vals
->get (dest
);
2965 t
= then_slot
? *then_slot
: NULL_RTX
;
2966 e
= else_slot
? *else_slot
: NULL_RTX
;
2970 /* If this register was set in the then block, we already
2971 handled this case there. */
2984 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
2990 noce_emit_move_insn (dest
, target
);
2996 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2997 it using only conditional moves. Return TRUE if we were successful at
2998 converting the block. */
3001 cond_move_process_if_block (struct noce_if_info
*if_info
)
3003 basic_block test_bb
= if_info
->test_bb
;
3004 basic_block then_bb
= if_info
->then_bb
;
3005 basic_block else_bb
= if_info
->else_bb
;
3006 basic_block join_bb
= if_info
->join_bb
;
3007 rtx_insn
*jump
= if_info
->jump
;
3008 rtx cond
= if_info
->cond
;
3009 rtx_insn
*seq
, *loc_insn
;
3012 vec
<rtx
> then_regs
= vNULL
;
3013 vec
<rtx
> else_regs
= vNULL
;
3015 int success_p
= FALSE
;
3017 /* Build a mapping for each block to the value used for each
3019 hash_map
<rtx
, rtx
> then_vals
;
3020 hash_map
<rtx
, rtx
> else_vals
;
3022 /* Make sure the blocks are suitable. */
3023 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3025 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3028 /* Make sure the blocks can be used together. If the same register
3029 is set in both blocks, and is not set to a constant in both
3030 cases, then both blocks must set it to the same register. We
3031 have already verified that if it is set to a register, that the
3032 source register does not change after the assignment. Also count
3033 the number of registers set in only one of the blocks. */
3035 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3037 rtx
*then_slot
= then_vals
.get (reg
);
3038 rtx
*else_slot
= else_vals
.get (reg
);
3040 gcc_checking_assert (then_slot
);
3045 rtx then_val
= *then_slot
;
3046 rtx else_val
= *else_slot
;
3047 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3048 && !rtx_equal_p (then_val
, else_val
))
3053 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3054 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3056 gcc_checking_assert (else_vals
.get (reg
));
3057 if (!then_vals
.get (reg
))
3061 /* Make sure it is reasonable to convert this block. What matters
3062 is the number of assignments currently made in only one of the
3063 branches, since if we convert we are going to always execute
3065 if (c
> MAX_CONDITIONAL_EXECUTE
)
3068 /* Try to emit the conditional moves. First do the then block,
3069 then do anything left in the else blocks. */
3071 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3072 &then_vals
, &else_vals
, false)
3074 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3075 &then_vals
, &else_vals
, true)))
3080 seq
= end_ifcvt_sequence (if_info
);
3084 loc_insn
= first_active_insn (then_bb
);
3087 loc_insn
= first_active_insn (else_bb
);
3088 gcc_assert (loc_insn
);
3090 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3094 delete_basic_block (else_bb
);
3098 remove_edge (find_edge (test_bb
, join_bb
));
3100 remove_edge (find_edge (then_bb
, join_bb
));
3101 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3102 delete_basic_block (then_bb
);
3105 if (can_merge_blocks_p (test_bb
, join_bb
))
3107 merge_blocks (test_bb
, join_bb
);
3111 num_updated_if_blocks
++;
3116 then_regs
.release ();
3117 else_regs
.release ();
3122 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3123 IF-THEN-ELSE-JOIN block.
3125 If so, we'll try to convert the insns to not require the branch,
3126 using only transformations that do not require conditional execution.
3128 Return TRUE if we were successful at converting the block. */
3131 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3134 basic_block then_bb
, else_bb
, join_bb
;
3135 bool then_else_reversed
= false;
3138 rtx_insn
*cond_earliest
;
3139 struct noce_if_info if_info
;
3141 /* We only ever should get here before reload. */
3142 gcc_assert (!reload_completed
);
3144 /* Recognize an IF-THEN-ELSE-JOIN block. */
3145 if (single_pred_p (then_edge
->dest
)
3146 && single_succ_p (then_edge
->dest
)
3147 && single_pred_p (else_edge
->dest
)
3148 && single_succ_p (else_edge
->dest
)
3149 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3151 then_bb
= then_edge
->dest
;
3152 else_bb
= else_edge
->dest
;
3153 join_bb
= single_succ (then_bb
);
3155 /* Recognize an IF-THEN-JOIN block. */
3156 else if (single_pred_p (then_edge
->dest
)
3157 && single_succ_p (then_edge
->dest
)
3158 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3160 then_bb
= then_edge
->dest
;
3161 else_bb
= NULL_BLOCK
;
3162 join_bb
= else_edge
->dest
;
3164 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3165 of basic blocks in cfglayout mode does not matter, so the fallthrough
3166 edge can go to any basic block (and not just to bb->next_bb, like in
3168 else if (single_pred_p (else_edge
->dest
)
3169 && single_succ_p (else_edge
->dest
)
3170 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3172 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3173 To make this work, we have to invert the THEN and ELSE blocks
3174 and reverse the jump condition. */
3175 then_bb
= else_edge
->dest
;
3176 else_bb
= NULL_BLOCK
;
3177 join_bb
= single_succ (then_bb
);
3178 then_else_reversed
= true;
3181 /* Not a form we can handle. */
3184 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3185 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3188 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3191 num_possible_if_blocks
++;
3196 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3197 (else_bb
) ? "-ELSE" : "",
3198 pass
, test_bb
->index
, then_bb
->index
);
3201 fprintf (dump_file
, ", else %d", else_bb
->index
);
3203 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3206 /* If the conditional jump is more than just a conditional
3207 jump, then we can not do if-conversion on this block. */
3208 jump
= BB_END (test_bb
);
3209 if (! onlyjump_p (jump
))
3212 /* If this is not a standard conditional jump, we can't parse it. */
3213 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3217 /* We must be comparing objects whose modes imply the size. */
3218 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3221 /* Initialize an IF_INFO struct to pass around. */
3222 memset (&if_info
, 0, sizeof if_info
);
3223 if_info
.test_bb
= test_bb
;
3224 if_info
.then_bb
= then_bb
;
3225 if_info
.else_bb
= else_bb
;
3226 if_info
.join_bb
= join_bb
;
3227 if_info
.cond
= cond
;
3228 if_info
.cond_earliest
= cond_earliest
;
3229 if_info
.jump
= jump
;
3230 if_info
.then_else_reversed
= then_else_reversed
;
3231 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3232 predictable_edge_p (then_edge
));
3234 /* Do the real work. */
3236 if (noce_process_if_block (&if_info
))
3239 if (HAVE_conditional_move
3240 && cond_move_process_if_block (&if_info
))
3247 /* Merge the blocks and mark for local life update. */
3250 merge_if_block (struct ce_if_block
* ce_info
)
3252 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3253 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3254 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3255 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3256 basic_block combo_bb
;
3258 /* All block merging is done into the lower block numbers. */
3261 df_set_bb_dirty (test_bb
);
3263 /* Merge any basic blocks to handle && and || subtests. Each of
3264 the blocks are on the fallthru path from the predecessor block. */
3265 if (ce_info
->num_multiple_test_blocks
> 0)
3267 basic_block bb
= test_bb
;
3268 basic_block last_test_bb
= ce_info
->last_test_bb
;
3269 basic_block fallthru
= block_fallthru (bb
);
3274 fallthru
= block_fallthru (bb
);
3275 merge_blocks (combo_bb
, bb
);
3278 while (bb
!= last_test_bb
);
3281 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3282 label, but it might if there were || tests. That label's count should be
3283 zero, and it normally should be removed. */
3287 /* If THEN_BB has no successors, then there's a BARRIER after it.
3288 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3289 is no longer needed, and in fact it is incorrect to leave it in
3291 if (EDGE_COUNT (then_bb
->succs
) == 0
3292 && EDGE_COUNT (combo_bb
->succs
) > 1)
3294 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3295 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3296 end
= NEXT_INSN (end
);
3298 if (end
&& BARRIER_P (end
))
3301 merge_blocks (combo_bb
, then_bb
);
3305 /* The ELSE block, if it existed, had a label. That label count
3306 will almost always be zero, but odd things can happen when labels
3307 get their addresses taken. */
3310 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3311 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3312 is no longer needed, and in fact it is incorrect to leave it in
3314 if (EDGE_COUNT (else_bb
->succs
) == 0
3315 && EDGE_COUNT (combo_bb
->succs
) > 1)
3317 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3318 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3319 end
= NEXT_INSN (end
);
3321 if (end
&& BARRIER_P (end
))
3324 merge_blocks (combo_bb
, else_bb
);
3328 /* If there was no join block reported, that means it was not adjacent
3329 to the others, and so we cannot merge them. */
3333 rtx_insn
*last
= BB_END (combo_bb
);
3335 /* The outgoing edge for the current COMBO block should already
3336 be correct. Verify this. */
3337 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3338 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3339 || (NONJUMP_INSN_P (last
)
3340 && GET_CODE (PATTERN (last
)) == TRAP_IF
3341 && (TRAP_CONDITION (PATTERN (last
))
3342 == const_true_rtx
)));
3345 /* There should still be something at the end of the THEN or ELSE
3346 blocks taking us to our final destination. */
3347 gcc_assert (JUMP_P (last
)
3348 || (EDGE_SUCC (combo_bb
, 0)->dest
3349 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3351 && SIBLING_CALL_P (last
))
3352 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3353 && can_throw_internal (last
)));
3356 /* The JOIN block may have had quite a number of other predecessors too.
3357 Since we've already merged the TEST, THEN and ELSE blocks, we should
3358 have only one remaining edge from our if-then-else diamond. If there
3359 is more than one remaining edge, it must come from elsewhere. There
3360 may be zero incoming edges if the THEN block didn't actually join
3361 back up (as with a call to a non-return function). */
3362 else if (EDGE_COUNT (join_bb
->preds
) < 2
3363 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3365 /* We can merge the JOIN cleanly and update the dataflow try
3366 again on this pass.*/
3367 merge_blocks (combo_bb
, join_bb
);
3372 /* We cannot merge the JOIN. */
3374 /* The outgoing edge for the current COMBO block should already
3375 be correct. Verify this. */
3376 gcc_assert (single_succ_p (combo_bb
)
3377 && single_succ (combo_bb
) == join_bb
);
3379 /* Remove the jump and cruft from the end of the COMBO block. */
3380 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3381 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3384 num_updated_if_blocks
++;
3387 /* Find a block ending in a simple IF condition and try to transform it
3388 in some way. When converting a multi-block condition, put the new code
3389 in the first such block and delete the rest. Return a pointer to this
3390 first block if some transformation was done. Return NULL otherwise. */
3393 find_if_header (basic_block test_bb
, int pass
)
3395 ce_if_block ce_info
;
3399 /* The kind of block we're looking for has exactly two successors. */
3400 if (EDGE_COUNT (test_bb
->succs
) != 2)
3403 then_edge
= EDGE_SUCC (test_bb
, 0);
3404 else_edge
= EDGE_SUCC (test_bb
, 1);
3406 if (df_get_bb_dirty (then_edge
->dest
))
3408 if (df_get_bb_dirty (else_edge
->dest
))
3411 /* Neither edge should be abnormal. */
3412 if ((then_edge
->flags
& EDGE_COMPLEX
)
3413 || (else_edge
->flags
& EDGE_COMPLEX
))
3416 /* Nor exit the loop. */
3417 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3418 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3421 /* The THEN edge is canonically the one that falls through. */
3422 if (then_edge
->flags
& EDGE_FALLTHRU
)
3424 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3425 std::swap (then_edge
, else_edge
);
3427 /* Otherwise this must be a multiway branch of some sort. */
3430 memset (&ce_info
, 0, sizeof (ce_info
));
3431 ce_info
.test_bb
= test_bb
;
3432 ce_info
.then_bb
= then_edge
->dest
;
3433 ce_info
.else_bb
= else_edge
->dest
;
3434 ce_info
.pass
= pass
;
3436 #ifdef IFCVT_MACHDEP_INIT
3437 IFCVT_MACHDEP_INIT (&ce_info
);
3440 if (!reload_completed
3441 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3444 if (reload_completed
3445 && targetm
.have_conditional_execution ()
3446 && cond_exec_find_if_block (&ce_info
))
3449 if (targetm
.have_trap ()
3450 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3451 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3454 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3455 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3457 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3459 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3467 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3468 /* Set this so we continue looking. */
3469 cond_exec_changed_p
= TRUE
;
3470 return ce_info
.test_bb
;
3473 /* Return true if a block has two edges, one of which falls through to the next
3474 block, and the other jumps to a specific block, so that we can tell if the
3475 block is part of an && test or an || test. Returns either -1 or the number
3476 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3479 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3482 int fallthru_p
= FALSE
;
3489 if (!cur_bb
|| !target_bb
)
3492 /* If no edges, obviously it doesn't jump or fallthru. */
3493 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3496 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3498 if (cur_edge
->flags
& EDGE_COMPLEX
)
3499 /* Anything complex isn't what we want. */
3502 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3505 else if (cur_edge
->dest
== target_bb
)
3512 if ((jump_p
& fallthru_p
) == 0)
3515 /* Don't allow calls in the block, since this is used to group && and ||
3516 together for conditional execution support. ??? we should support
3517 conditional execution support across calls for IA-64 some day, but
3518 for now it makes the code simpler. */
3519 end
= BB_END (cur_bb
);
3520 insn
= BB_HEAD (cur_bb
);
3522 while (insn
!= NULL_RTX
)
3529 && !DEBUG_INSN_P (insn
)
3530 && GET_CODE (PATTERN (insn
)) != USE
3531 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3537 insn
= NEXT_INSN (insn
);
3543 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3544 block. If so, we'll try to convert the insns to not require the branch.
3545 Return TRUE if we were successful at converting the block. */
3548 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
3550 basic_block test_bb
= ce_info
->test_bb
;
3551 basic_block then_bb
= ce_info
->then_bb
;
3552 basic_block else_bb
= ce_info
->else_bb
;
3553 basic_block join_bb
= NULL_BLOCK
;
3558 ce_info
->last_test_bb
= test_bb
;
3560 /* We only ever should get here after reload,
3561 and if we have conditional execution. */
3562 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
3564 /* Discover if any fall through predecessors of the current test basic block
3565 were && tests (which jump to the else block) or || tests (which jump to
3567 if (single_pred_p (test_bb
)
3568 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
3570 basic_block bb
= single_pred (test_bb
);
3571 basic_block target_bb
;
3572 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
3575 /* Determine if the preceding block is an && or || block. */
3576 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
3578 ce_info
->and_and_p
= TRUE
;
3579 target_bb
= else_bb
;
3581 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
3583 ce_info
->and_and_p
= FALSE
;
3584 target_bb
= then_bb
;
3587 target_bb
= NULL_BLOCK
;
3589 if (target_bb
&& n_insns
<= max_insns
)
3591 int total_insns
= 0;
3594 ce_info
->last_test_bb
= test_bb
;
3596 /* Found at least one && or || block, look for more. */
3599 ce_info
->test_bb
= test_bb
= bb
;
3600 total_insns
+= n_insns
;
3603 if (!single_pred_p (bb
))
3606 bb
= single_pred (bb
);
3607 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
3609 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
3611 ce_info
->num_multiple_test_blocks
= blocks
;
3612 ce_info
->num_multiple_test_insns
= total_insns
;
3614 if (ce_info
->and_and_p
)
3615 ce_info
->num_and_and_blocks
= blocks
;
3617 ce_info
->num_or_or_blocks
= blocks
;
3621 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3622 other than any || blocks which jump to the THEN block. */
3623 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
3626 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3627 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
3629 if (cur_edge
->flags
& EDGE_COMPLEX
)
3633 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
3635 if (cur_edge
->flags
& EDGE_COMPLEX
)
3639 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3640 if (EDGE_COUNT (then_bb
->succs
) > 0
3641 && (!single_succ_p (then_bb
)
3642 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3643 || (epilogue_completed
3644 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
3647 /* If the THEN block has no successors, conditional execution can still
3648 make a conditional call. Don't do this unless the ELSE block has
3649 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3650 Check for the last insn of the THEN block being an indirect jump, which
3651 is listed as not having any successors, but confuses the rest of the CE
3652 code processing. ??? we should fix this in the future. */
3653 if (EDGE_COUNT (then_bb
->succs
) == 0)
3655 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3657 rtx_insn
*last_insn
= BB_END (then_bb
);
3660 && NOTE_P (last_insn
)
3661 && last_insn
!= BB_HEAD (then_bb
))
3662 last_insn
= PREV_INSN (last_insn
);
3665 && JUMP_P (last_insn
)
3666 && ! simplejump_p (last_insn
))
3670 else_bb
= NULL_BLOCK
;
3676 /* If the THEN block's successor is the other edge out of the TEST block,
3677 then we have an IF-THEN combo without an ELSE. */
3678 else if (single_succ (then_bb
) == else_bb
)
3681 else_bb
= NULL_BLOCK
;
3684 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3685 has exactly one predecessor and one successor, and the outgoing edge
3686 is not complex, then we have an IF-THEN-ELSE combo. */
3687 else if (single_succ_p (else_bb
)
3688 && single_succ (then_bb
) == single_succ (else_bb
)
3689 && single_pred_p (else_bb
)
3690 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3691 && !(epilogue_completed
3692 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
3693 join_bb
= single_succ (else_bb
);
3695 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3699 num_possible_if_blocks
++;
3704 "\nIF-THEN%s block found, pass %d, start block %d "
3705 "[insn %d], then %d [%d]",
3706 (else_bb
) ? "-ELSE" : "",
3709 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
3711 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
3714 fprintf (dump_file
, ", else %d [%d]",
3716 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
3718 fprintf (dump_file
, ", join %d [%d]",
3720 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
3722 if (ce_info
->num_multiple_test_blocks
> 0)
3723 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
3724 ce_info
->num_multiple_test_blocks
,
3725 (ce_info
->and_and_p
) ? "&&" : "||",
3726 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
3727 ce_info
->last_test_bb
->index
,
3728 ((BB_HEAD (ce_info
->last_test_bb
))
3729 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
3732 fputc ('\n', dump_file
);
3735 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3736 first condition for free, since we've already asserted that there's a
3737 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3738 we checked the FALLTHRU flag, those are already adjacent to the last IF
3740 /* ??? As an enhancement, move the ELSE block. Have to deal with
3741 BLOCK notes, if by no other means than backing out the merge if they
3742 exist. Sticky enough I don't want to think about it now. */
3744 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
3746 if ((next
= next
->next_bb
) != join_bb
3747 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3755 /* Do the real work. */
3757 ce_info
->else_bb
= else_bb
;
3758 ce_info
->join_bb
= join_bb
;
3760 /* If we have && and || tests, try to first handle combining the && and ||
3761 tests into the conditional code, and if that fails, go back and handle
3762 it without the && and ||, which at present handles the && case if there
3763 was no ELSE block. */
3764 if (cond_exec_process_if_block (ce_info
, TRUE
))
3767 if (ce_info
->num_multiple_test_blocks
)
3771 if (cond_exec_process_if_block (ce_info
, FALSE
))
3778 /* Convert a branch over a trap, or a branch
3779 to a trap, into a conditional trap. */
3782 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
3784 basic_block then_bb
= then_edge
->dest
;
3785 basic_block else_bb
= else_edge
->dest
;
3786 basic_block other_bb
, trap_bb
;
3787 rtx_insn
*trap
, *jump
;
3789 rtx_insn
*cond_earliest
;
3792 /* Locate the block with the trap instruction. */
3793 /* ??? While we look for no successors, we really ought to allow
3794 EH successors. Need to fix merge_if_block for that to work. */
3795 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
3796 trap_bb
= then_bb
, other_bb
= else_bb
;
3797 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
3798 trap_bb
= else_bb
, other_bb
= then_bb
;
3804 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
3805 test_bb
->index
, trap_bb
->index
);
3808 /* If this is not a standard conditional jump, we can't parse it. */
3809 jump
= BB_END (test_bb
);
3810 cond
= noce_get_condition (jump
, &cond_earliest
, false);
3814 /* If the conditional jump is more than just a conditional jump, then
3815 we can not do if-conversion on this block. */
3816 if (! onlyjump_p (jump
))
3819 /* We must be comparing objects whose modes imply the size. */
3820 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3823 /* Reverse the comparison code, if necessary. */
3824 code
= GET_CODE (cond
);
3825 if (then_bb
== trap_bb
)
3827 code
= reversed_comparison_code (cond
, jump
);
3828 if (code
== UNKNOWN
)
3832 /* Attempt to generate the conditional trap. */
3833 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
3834 copy_rtx (XEXP (cond
, 1)),
3835 TRAP_CODE (PATTERN (trap
)));
3839 /* Emit the new insns before cond_earliest. */
3840 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
3842 /* Delete the trap block if possible. */
3843 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
3844 df_set_bb_dirty (test_bb
);
3845 df_set_bb_dirty (then_bb
);
3846 df_set_bb_dirty (else_bb
);
3848 if (EDGE_COUNT (trap_bb
->preds
) == 0)
3850 delete_basic_block (trap_bb
);
3854 /* Wire together the blocks again. */
3855 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
3856 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
3857 else if (trap_bb
== then_bb
)
3859 rtx lab
= JUMP_LABEL (jump
);
3860 rtx_insn
*seq
= targetm
.gen_jump (lab
);
3861 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
3862 LABEL_NUSES (lab
) += 1;
3863 JUMP_LABEL (newjump
) = lab
;
3864 emit_barrier_after (newjump
);
3868 if (can_merge_blocks_p (test_bb
, other_bb
))
3870 merge_blocks (test_bb
, other_bb
);
3874 num_updated_if_blocks
++;
3878 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3882 block_has_only_trap (basic_block bb
)
3886 /* We're not the exit block. */
3887 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
3890 /* The block must have no successors. */
3891 if (EDGE_COUNT (bb
->succs
) > 0)
3894 /* The only instruction in the THEN block must be the trap. */
3895 trap
= first_active_insn (bb
);
3896 if (! (trap
== BB_END (bb
)
3897 && GET_CODE (PATTERN (trap
)) == TRAP_IF
3898 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
3904 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3905 transformable, but not necessarily the other. There need be no
3908 Return TRUE if we were successful at converting the block.
3910 Cases we'd like to look at:
3913 if (test) goto over; // x not live
3921 if (! test) goto label;
3924 if (test) goto E; // x not live
3938 (3) // This one's really only interesting for targets that can do
3939 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3940 // it results in multiple branches on a cache line, which often
3941 // does not sit well with predictors.
3943 if (test1) goto E; // predicted not taken
3959 (A) Don't do (2) if the branch is predicted against the block we're
3960 eliminating. Do it anyway if we can eliminate a branch; this requires
3961 that the sole successor of the eliminated block postdominate the other
3964 (B) With CE, on (3) we can steal from both sides of the if, creating
3973 Again, this is most useful if J postdominates.
3975 (C) CE substitutes for helpful life information.
3977 (D) These heuristics need a lot of work. */
3979 /* Tests for case 1 above. */
3982 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
3984 basic_block then_bb
= then_edge
->dest
;
3985 basic_block else_bb
= else_edge
->dest
;
3987 int then_bb_index
, then_prob
;
3988 rtx else_target
= NULL_RTX
;
3990 /* If we are partitioning hot/cold basic blocks, we don't want to
3991 mess up unconditional or indirect jumps that cross between hot
3994 Basic block partitioning may result in some jumps that appear to
3995 be optimizable (or blocks that appear to be mergeable), but which really
3996 must be left untouched (they are required to make it safely across
3997 partition boundaries). See the comments at the top of
3998 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4000 if ((BB_END (then_bb
)
4001 && JUMP_P (BB_END (then_bb
))
4002 && CROSSING_JUMP_P (BB_END (then_bb
)))
4003 || (BB_END (test_bb
)
4004 && JUMP_P (BB_END (test_bb
))
4005 && CROSSING_JUMP_P (BB_END (test_bb
)))
4006 || (BB_END (else_bb
)
4007 && JUMP_P (BB_END (else_bb
))
4008 && CROSSING_JUMP_P (BB_END (else_bb
))))
4011 /* THEN has one successor. */
4012 if (!single_succ_p (then_bb
))
4015 /* THEN does not fall through, but is not strange either. */
4016 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4019 /* THEN has one predecessor. */
4020 if (!single_pred_p (then_bb
))
4023 /* THEN must do something. */
4024 if (forwarder_block_p (then_bb
))
4027 num_possible_if_blocks
++;
4030 "\nIF-CASE-1 found, start %d, then %d\n",
4031 test_bb
->index
, then_bb
->index
);
4033 if (then_edge
->probability
)
4034 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4036 then_prob
= REG_BR_PROB_BASE
/ 2;
4038 /* We're speculating from the THEN path, we want to make sure the cost
4039 of speculation is within reason. */
4040 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4041 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4042 predictable_edge_p (then_edge
)))))
4045 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4047 rtx_insn
*jump
= BB_END (else_edge
->src
);
4048 gcc_assert (JUMP_P (jump
));
4049 else_target
= JUMP_LABEL (jump
);
4052 /* Registers set are dead, or are predicable. */
4053 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4054 single_succ_edge (then_bb
), 1))
4057 /* Conversion went ok, including moving the insns and fixing up the
4058 jump. Adjust the CFG to match. */
4060 /* We can avoid creating a new basic block if then_bb is immediately
4061 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4062 through to else_bb. */
4064 if (then_bb
->next_bb
== else_bb
4065 && then_bb
->prev_bb
== test_bb
4066 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4068 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4071 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4072 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4073 else_bb
, else_target
);
4075 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4078 df_set_bb_dirty (test_bb
);
4079 df_set_bb_dirty (else_bb
);
4081 then_bb_index
= then_bb
->index
;
4082 delete_basic_block (then_bb
);
4084 /* Make rest of code believe that the newly created block is the THEN_BB
4085 block we removed. */
4088 df_bb_replace (then_bb_index
, new_bb
);
4089 /* This should have been done above via force_nonfallthru_and_redirect
4090 (possibly called from redirect_edge_and_branch_force). */
4091 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4095 num_updated_if_blocks
++;
4100 /* Test for case 2 above. */
4103 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4105 basic_block then_bb
= then_edge
->dest
;
4106 basic_block else_bb
= else_edge
->dest
;
4108 int then_prob
, else_prob
;
4110 /* We do not want to speculate (empty) loop latches. */
4112 && else_bb
->loop_father
->latch
== else_bb
)
4115 /* If we are partitioning hot/cold basic blocks, we don't want to
4116 mess up unconditional or indirect jumps that cross between hot
4119 Basic block partitioning may result in some jumps that appear to
4120 be optimizable (or blocks that appear to be mergeable), but which really
4121 must be left untouched (they are required to make it safely across
4122 partition boundaries). See the comments at the top of
4123 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4125 if ((BB_END (then_bb
)
4126 && JUMP_P (BB_END (then_bb
))
4127 && CROSSING_JUMP_P (BB_END (then_bb
)))
4128 || (BB_END (test_bb
)
4129 && JUMP_P (BB_END (test_bb
))
4130 && CROSSING_JUMP_P (BB_END (test_bb
)))
4131 || (BB_END (else_bb
)
4132 && JUMP_P (BB_END (else_bb
))
4133 && CROSSING_JUMP_P (BB_END (else_bb
))))
4136 /* ELSE has one successor. */
4137 if (!single_succ_p (else_bb
))
4140 else_succ
= single_succ_edge (else_bb
);
4142 /* ELSE outgoing edge is not complex. */
4143 if (else_succ
->flags
& EDGE_COMPLEX
)
4146 /* ELSE has one predecessor. */
4147 if (!single_pred_p (else_bb
))
4150 /* THEN is not EXIT. */
4151 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4154 if (else_edge
->probability
)
4156 else_prob
= else_edge
->probability
;
4157 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4161 else_prob
= REG_BR_PROB_BASE
/ 2;
4162 then_prob
= REG_BR_PROB_BASE
/ 2;
4165 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4166 if (else_prob
> then_prob
)
4168 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4169 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4175 num_possible_if_blocks
++;
4178 "\nIF-CASE-2 found, start %d, else %d\n",
4179 test_bb
->index
, else_bb
->index
);
4181 /* We're speculating from the ELSE path, we want to make sure the cost
4182 of speculation is within reason. */
4183 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4184 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4185 predictable_edge_p (else_edge
)))))
4188 /* Registers set are dead, or are predicable. */
4189 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4192 /* Conversion went ok, including moving the insns and fixing up the
4193 jump. Adjust the CFG to match. */
4195 df_set_bb_dirty (test_bb
);
4196 df_set_bb_dirty (then_bb
);
4197 delete_basic_block (else_bb
);
4200 num_updated_if_blocks
++;
4202 /* ??? We may now fallthru from one of THEN's successors into a join
4203 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4208 /* Used by the code above to perform the actual rtl transformations.
4209 Return TRUE if successful.
4211 TEST_BB is the block containing the conditional branch. MERGE_BB
4212 is the block containing the code to manipulate. DEST_EDGE is an
4213 edge representing a jump to the join block; after the conversion,
4214 TEST_BB should be branching to its destination.
4215 REVERSEP is true if the sense of the branch should be reversed. */
4218 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4219 basic_block other_bb
, edge dest_edge
, int reversep
)
4221 basic_block new_dest
= dest_edge
->dest
;
4222 rtx_insn
*head
, *end
, *jump
;
4223 rtx_insn
*earliest
= NULL
;
4225 bitmap merge_set
= NULL
;
4226 /* Number of pending changes. */
4227 int n_validated_changes
= 0;
4228 rtx new_dest_label
= NULL_RTX
;
4230 jump
= BB_END (test_bb
);
4232 /* Find the extent of the real code in the merge block. */
4233 head
= BB_HEAD (merge_bb
);
4234 end
= BB_END (merge_bb
);
4236 while (DEBUG_INSN_P (end
) && end
!= head
)
4237 end
= PREV_INSN (end
);
4239 /* If merge_bb ends with a tablejump, predicating/moving insn's
4240 into test_bb and then deleting merge_bb will result in the jumptable
4241 that follows merge_bb being removed along with merge_bb and then we
4242 get an unresolved reference to the jumptable. */
4243 if (tablejump_p (end
, NULL
, NULL
))
4247 head
= NEXT_INSN (head
);
4248 while (DEBUG_INSN_P (head
) && head
!= end
)
4249 head
= NEXT_INSN (head
);
4257 head
= NEXT_INSN (head
);
4258 while (DEBUG_INSN_P (head
) && head
!= end
)
4259 head
= NEXT_INSN (head
);
4264 if (!onlyjump_p (end
))
4271 end
= PREV_INSN (end
);
4272 while (DEBUG_INSN_P (end
) && end
!= head
)
4273 end
= PREV_INSN (end
);
4276 /* Don't move frame-related insn across the conditional branch. This
4277 can lead to one of the paths of the branch having wrong unwind info. */
4278 if (epilogue_completed
)
4280 rtx_insn
*insn
= head
;
4283 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4287 insn
= NEXT_INSN (insn
);
4291 /* Disable handling dead code by conditional execution if the machine needs
4292 to do anything funny with the tests, etc. */
4293 #ifndef IFCVT_MODIFY_TESTS
4294 if (targetm
.have_conditional_execution ())
4296 /* In the conditional execution case, we have things easy. We know
4297 the condition is reversible. We don't have to check life info
4298 because we're going to conditionally execute the code anyway.
4299 All that's left is making sure the insns involved can actually
4304 cond
= cond_exec_get_condition (jump
);
4308 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4309 int prob_val
= (note
? XINT (note
, 0) : -1);
4313 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4316 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4319 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4322 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4323 && verify_changes (0))
4324 n_validated_changes
= num_validated_changes ();
4332 /* If we allocated new pseudos (e.g. in the conditional move
4333 expander called from noce_emit_cmove), we must resize the
4335 if (max_regno
< max_reg_num ())
4336 max_regno
= max_reg_num ();
4338 /* Try the NCE path if the CE path did not result in any changes. */
4339 if (n_validated_changes
== 0)
4346 /* In the non-conditional execution case, we have to verify that there
4347 are no trapping operations, no calls, no references to memory, and
4348 that any registers modified are dead at the branch site. */
4350 if (!any_condjump_p (jump
))
4353 /* Find the extent of the conditional. */
4354 cond
= noce_get_condition (jump
, &earliest
, false);
4358 live
= BITMAP_ALLOC (®_obstack
);
4359 simulate_backwards_to_point (merge_bb
, live
, end
);
4360 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4362 df_get_live_in (other_bb
), NULL
);
4367 /* Collect the set of registers set in MERGE_BB. */
4368 merge_set
= BITMAP_ALLOC (®_obstack
);
4370 FOR_BB_INSNS (merge_bb
, insn
)
4371 if (NONDEBUG_INSN_P (insn
))
4372 df_simulate_find_defs (insn
, merge_set
);
4374 /* If shrink-wrapping, disable this optimization when test_bb is
4375 the first basic block and merge_bb exits. The idea is to not
4376 move code setting up a return register as that may clobber a
4377 register used to pass function parameters, which then must be
4378 saved in caller-saved regs. A caller-saved reg requires the
4379 prologue, killing a shrink-wrap opportunity. */
4380 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4381 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4382 && single_succ_p (new_dest
)
4383 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4384 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4389 return_regs
= BITMAP_ALLOC (®_obstack
);
4391 /* Start off with the intersection of regs used to pass
4392 params and regs used to return values. */
4393 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4394 if (FUNCTION_ARG_REGNO_P (i
)
4395 && targetm
.calls
.function_value_regno_p (i
))
4396 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4398 bitmap_and_into (return_regs
,
4399 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4400 bitmap_and_into (return_regs
,
4401 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4402 if (!bitmap_empty_p (return_regs
))
4404 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4405 if (NONDEBUG_INSN_P (insn
))
4409 /* If this insn sets any reg in return_regs, add all
4410 reg uses to the set of regs we're interested in. */
4411 FOR_EACH_INSN_DEF (def
, insn
)
4412 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4414 df_simulate_uses (insn
, return_regs
);
4418 if (bitmap_intersect_p (merge_set
, return_regs
))
4420 BITMAP_FREE (return_regs
);
4421 BITMAP_FREE (merge_set
);
4425 BITMAP_FREE (return_regs
);
4430 /* We don't want to use normal invert_jump or redirect_jump because
4431 we don't want to delete_insn called. Also, we want to do our own
4432 change group management. */
4434 old_dest
= JUMP_LABEL (jump
);
4435 if (other_bb
!= new_dest
)
4437 if (!any_condjump_p (jump
))
4440 if (JUMP_P (BB_END (dest_edge
->src
)))
4441 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4442 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4443 new_dest_label
= ret_rtx
;
4445 new_dest_label
= block_label (new_dest
);
4447 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
4449 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
4450 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
4454 if (verify_changes (n_validated_changes
))
4455 confirm_change_group ();
4459 if (other_bb
!= new_dest
)
4461 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
4464 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4467 std::swap (BRANCH_EDGE (test_bb
)->count
,
4468 FALLTHRU_EDGE (test_bb
)->count
);
4469 std::swap (BRANCH_EDGE (test_bb
)->probability
,
4470 FALLTHRU_EDGE (test_bb
)->probability
);
4471 update_br_prob_note (test_bb
);
4475 /* Move the insns out of MERGE_BB to before the branch. */
4480 if (end
== BB_END (merge_bb
))
4481 BB_END (merge_bb
) = PREV_INSN (head
);
4483 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4484 notes being moved might become invalid. */
4490 if (! INSN_P (insn
))
4492 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4495 remove_note (insn
, note
);
4496 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4498 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4499 notes referring to the registers being set might become invalid. */
4505 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4506 remove_reg_equal_equiv_notes_for_regno (i
);
4508 BITMAP_FREE (merge_set
);
4511 reorder_insns (head
, end
, PREV_INSN (earliest
));
4514 /* Remove the jump and edge if we can. */
4515 if (other_bb
== new_dest
)
4518 remove_edge (BRANCH_EDGE (test_bb
));
4519 /* ??? Can't merge blocks here, as then_bb is still in use.
4520 At minimum, the merge will get done just before bb-reorder. */
4529 BITMAP_FREE (merge_set
);
4534 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4535 we are after combine pass. */
4538 if_convert (bool after_combine
)
4545 df_live_add_problem ();
4546 df_live_set_all_dirty ();
4549 /* Record whether we are after combine pass. */
4550 ifcvt_after_combine
= after_combine
;
4551 num_possible_if_blocks
= 0;
4552 num_updated_if_blocks
= 0;
4553 num_true_changes
= 0;
4555 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
4556 mark_loop_exit_edges ();
4557 loop_optimizer_finalize ();
4558 free_dominance_info (CDI_DOMINATORS
);
4560 /* Compute postdominators. */
4561 calculate_dominance_info (CDI_POST_DOMINATORS
);
4563 df_set_flags (DF_LR_RUN_DCE
);
4565 /* Go through each of the basic blocks looking for things to convert. If we
4566 have conditional execution, we make multiple passes to allow us to handle
4567 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4572 /* Only need to do dce on the first pass. */
4573 df_clear_flags (DF_LR_RUN_DCE
);
4574 cond_exec_changed_p
= FALSE
;
4577 #ifdef IFCVT_MULTIPLE_DUMPS
4578 if (dump_file
&& pass
> 1)
4579 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
4582 FOR_EACH_BB_FN (bb
, cfun
)
4585 while (!df_get_bb_dirty (bb
)
4586 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
4590 #ifdef IFCVT_MULTIPLE_DUMPS
4591 if (dump_file
&& cond_exec_changed_p
)
4592 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
4595 while (cond_exec_changed_p
);
4597 #ifdef IFCVT_MULTIPLE_DUMPS
4599 fprintf (dump_file
, "\n\n========== no more changes\n");
4602 free_dominance_info (CDI_POST_DOMINATORS
);
4607 clear_aux_for_blocks ();
4609 /* If we allocated new pseudos, we must resize the array for sched1. */
4610 if (max_regno
< max_reg_num ())
4611 max_regno
= max_reg_num ();
4613 /* Write the final stats. */
4614 if (dump_file
&& num_possible_if_blocks
> 0)
4617 "\n%d possible IF blocks searched.\n",
4618 num_possible_if_blocks
);
4620 "%d IF blocks converted.\n",
4621 num_updated_if_blocks
);
4623 "%d true changes made.\n\n\n",
4628 df_remove_problem (df_live
);
4630 #ifdef ENABLE_CHECKING
4631 verify_flow_info ();
4635 /* If-conversion and CFG cleanup. */
4637 rest_of_handle_if_conversion (void)
4639 if (flag_if_conversion
)
4643 dump_reg_info (dump_file
);
4644 dump_flow_info (dump_file
, dump_flags
);
4646 cleanup_cfg (CLEANUP_EXPENSIVE
);
4656 const pass_data pass_data_rtl_ifcvt
=
4658 RTL_PASS
, /* type */
4660 OPTGROUP_NONE
, /* optinfo_flags */
4661 TV_IFCVT
, /* tv_id */
4662 0, /* properties_required */
4663 0, /* properties_provided */
4664 0, /* properties_destroyed */
4665 0, /* todo_flags_start */
4666 TODO_df_finish
, /* todo_flags_finish */
4669 class pass_rtl_ifcvt
: public rtl_opt_pass
4672 pass_rtl_ifcvt (gcc::context
*ctxt
)
4673 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
4676 /* opt_pass methods: */
4677 virtual bool gate (function
*)
4679 return (optimize
> 0) && dbg_cnt (if_conversion
);
4682 virtual unsigned int execute (function
*)
4684 return rest_of_handle_if_conversion ();
4687 }; // class pass_rtl_ifcvt
4692 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
4694 return new pass_rtl_ifcvt (ctxt
);
4698 /* Rerun if-conversion, as combine may have simplified things enough
4699 to now meet sequence length restrictions. */
4703 const pass_data pass_data_if_after_combine
=
4705 RTL_PASS
, /* type */
4707 OPTGROUP_NONE
, /* optinfo_flags */
4708 TV_IFCVT
, /* tv_id */
4709 0, /* properties_required */
4710 0, /* properties_provided */
4711 0, /* properties_destroyed */
4712 0, /* todo_flags_start */
4713 TODO_df_finish
, /* todo_flags_finish */
4716 class pass_if_after_combine
: public rtl_opt_pass
4719 pass_if_after_combine (gcc::context
*ctxt
)
4720 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
4723 /* opt_pass methods: */
4724 virtual bool gate (function
*)
4726 return optimize
> 0 && flag_if_conversion
4727 && dbg_cnt (if_after_combine
);
4730 virtual unsigned int execute (function
*)
4736 }; // class pass_if_after_combine
4741 make_pass_if_after_combine (gcc::context
*ctxt
)
4743 return new pass_if_after_combine (ctxt
);
4749 const pass_data pass_data_if_after_reload
=
4751 RTL_PASS
, /* type */
4753 OPTGROUP_NONE
, /* optinfo_flags */
4754 TV_IFCVT2
, /* tv_id */
4755 0, /* properties_required */
4756 0, /* properties_provided */
4757 0, /* properties_destroyed */
4758 0, /* todo_flags_start */
4759 TODO_df_finish
, /* todo_flags_finish */
4762 class pass_if_after_reload
: public rtl_opt_pass
4765 pass_if_after_reload (gcc::context
*ctxt
)
4766 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
4769 /* opt_pass methods: */
4770 virtual bool gate (function
*)
4772 return optimize
> 0 && flag_if_conversion2
4773 && dbg_cnt (if_after_reload
);
4776 virtual unsigned int execute (function
*)
4782 }; // class pass_if_after_reload
4787 make_pass_if_after_reload (gcc::context
*ctxt
)
4789 return new pass_if_after_reload (ctxt
);