1 /****************************************************************************
3 * GNAT COMPILER COMPONENTS *
5 * S I G T R A M P - T A R G E T *
7 * Asm Implementation Include File *
9 * Copyright (C) 2011-2015, Free Software Foundation, Inc. *
11 * GNAT is free software; you can redistribute it and/or modify it under *
12 * terms of the GNU General Public License as published by the Free Soft- *
13 * ware Foundation; either version 3, or (at your option) any later ver- *
14 * sion. GNAT is distributed in the hope that it will be useful, but WITH- *
15 * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY *
16 * or FITNESS FOR A PARTICULAR PURPOSE. *
18 * As a special exception under Section 7 of GPL version 3, you are granted *
19 * additional permissions described in the GCC Runtime Library Exception, *
20 * version 3.1, as published by the Free Software Foundation. *
22 * In particular, you can freely distribute your programs built with the *
23 * GNAT Pro compiler, including any required library run-time units, using *
24 * any licensing terms of your choosing. See the AdaCore Software License *
27 * GNAT was originally developed by the GNAT team at New York University. *
28 * Extensive contributions were provided by Ada Core Technologies Inc. *
30 ****************************************************************************/
32 /***************************************************************
33 * VxWorks target specific part of the __gnat_sigtramp service *
34 ***************************************************************/
36 /* Note: This target specific part is kept in a separate file to avoid
37 duplication of its code for the vxworks and vxworks-vxsim asm
38 implementation files. */
40 /* ---------------------------
41 -- And now the asm stubs --
42 ---------------------------
44 They all have a common structure with blocks of asm sequences queued one
45 after the others. Typically:
55 asm code to establish frame, setup the cfa reg value,
56 call the real signal handler, ...
61 /*--------------------------------
62 -- Misc constants and helpers --
63 -------------------------------- */
65 /* asm string construction helpers. */
67 #define STR(TEXT) #TEXT
68 /* stringify expanded TEXT, surrounding it with double quotes. */
71 /* stringify E, which will resolve as text but may contain macros
72 still to be expanded. */
74 /* asm (TEXT) outputs <tab>TEXT. These facilitate the output of
80 #define TCR(S) TAB(CR(S))
82 /* REGNO constants, dwarf column numbers for registers of interest. */
90 #define REGNO_GR(N) (N)
92 #define REGNO_PC 67 /* ARG_POINTER_REGNUM */
94 #define FUNCTION "@function"
96 #elif defined (__ARMEL__)
98 #define REGNO_G_REG_OFFSET(N) (N)
100 #define REGNO_PC_OFFSET 15 /* PC_REGNUM */
102 #define FUNCTION "%function"
106 /* These are the cfi colunm numbers */
116 #define REGNO_EFLAGS 9
117 #define REGNO_SET_PC 8 /* aka %eip */
119 #define FUNCTION "@function"
121 /* Mapping of CFI Column, Gcc Regno, Signal context offset for 32bit
137 There is no unique numbering for the x86 architecture. It's parameterized
138 by DWARF_FRAME_REGNUM, which is DBX_REGISTER_NUMBER except for Windows, and
139 the latter depends on the platform.
144 #endif /* REGNO constants */
147 /*------------------------------
148 -- Stub construction blocks --
149 ------------------------------ */
153 Only non-volatile registers are suitable for a CFA base. These are the
154 only ones we can expect to be able retrieve from the unwinding context
155 while walking up the chain, saved by at least the bottom-most exception
156 propagation services. We set a non-volatile register to the value we
157 need in the stub body that follows. */
159 #if defined (__PPC__)
161 /* Use r15 for PPC. Note that r14 is inappropriate here, even though it
162 is non-volatile according to the ABI, because GCC uses it as an extra
163 SCRATCH on SPE targets. */
167 #elif defined (__ARMEL__)
169 /* Use r8 for ARM. Any of r4-r8 should work. */
179 #endif /* CFA setup block */
181 #define CFI_DEF_CFA \
182 CR(".cfi_def_cfa " S(CFA_REG) ", 0")
184 /* Register location blocks
185 ------------------------
186 Rules to find registers of interest from the CFA. This should comprise
187 all the non-volatile registers relevant to the interrupted context.
189 Note that we include r1 in this set, unlike the libgcc unwinding
190 fallbacks. This is useful for fallbacks to allow the use of r1 in CFI
191 expressions and the absence of rule for r1 gets compensated by using the
192 target CFA instead. We don't need the expression facility here and
193 setup a fake CFA to allow very simple offset expressions, so having a
194 rule for r1 is the proper thing to do. We for sure have observed
195 crashes in some cases without it. */
197 #if defined (__PPC__)
199 #define COMMON_CFI(REG) \
200 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
202 #define CFI_COMMON_REGS \
203 CR("# CFI for common registers\n") \
204 TCR(COMMON_CFI(GR(0))) \
205 TCR(COMMON_CFI(GR(1))) \
206 TCR(COMMON_CFI(GR(2))) \
207 TCR(COMMON_CFI(GR(3))) \
208 TCR(COMMON_CFI(GR(4))) \
209 TCR(COMMON_CFI(GR(5))) \
210 TCR(COMMON_CFI(GR(6))) \
211 TCR(COMMON_CFI(GR(7))) \
212 TCR(COMMON_CFI(GR(8))) \
213 TCR(COMMON_CFI(GR(9))) \
214 TCR(COMMON_CFI(GR(10))) \
215 TCR(COMMON_CFI(GR(11))) \
216 TCR(COMMON_CFI(GR(12))) \
217 TCR(COMMON_CFI(GR(13))) \
218 TCR(COMMON_CFI(GR(14))) \
219 TCR(COMMON_CFI(GR(15))) \
220 TCR(COMMON_CFI(GR(16))) \
221 TCR(COMMON_CFI(GR(17))) \
222 TCR(COMMON_CFI(GR(18))) \
223 TCR(COMMON_CFI(GR(19))) \
224 TCR(COMMON_CFI(GR(20))) \
225 TCR(COMMON_CFI(GR(21))) \
226 TCR(COMMON_CFI(GR(22))) \
227 TCR(COMMON_CFI(GR(23))) \
228 TCR(COMMON_CFI(GR(24))) \
229 TCR(COMMON_CFI(GR(25))) \
230 TCR(COMMON_CFI(GR(26))) \
231 TCR(COMMON_CFI(GR(27))) \
232 TCR(COMMON_CFI(GR(28))) \
233 TCR(COMMON_CFI(GR(29))) \
234 TCR(COMMON_CFI(GR(30))) \
235 TCR(COMMON_CFI(GR(31))) \
236 TCR(COMMON_CFI(LR)) \
237 TCR(COMMON_CFI(CR)) \
238 TCR(COMMON_CFI(CTR)) \
239 TCR(COMMON_CFI(XER)) \
240 TCR(COMMON_CFI(PC)) \
241 TCR(".cfi_return_column " S(REGNO_PC))
243 /* Trampoline body block
244 --------------------- */
246 #define SIGTRAMP_BODY \
248 TCR("# Allocate frame and save the non-volatile") \
249 TCR("# registers we're going to modify") \
250 TCR("stwu %r1,-16(%r1)") \
252 TCR("stw %r0,20(%r1)") \
253 TCR("stw %r" S(CFA_REG) ",8(%r1)") \
255 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
256 TCR("mr %r" S(CFA_REG) ", %r7") \
258 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
259 TCR("# arguments are the same as those we received in r3, r4 and r5") \
263 TCR("# Restore our callee-saved items, release our frame and return") \
264 TCR("lwz %r" S(CFA_REG) ",8(%r1)") \
265 TCR("lwz %r0,20(%r1)") \
268 TCR("addi %r1,%r1,16") \
271 #elif defined (__ARMEL__)
273 #define COMMON_CFI(REG) \
274 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
276 #define CFI_COMMON_REGS \
277 CR("# CFI for common registers\n") \
278 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
279 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
280 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
281 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
282 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
283 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
284 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
285 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
286 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
287 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
288 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
289 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
290 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
291 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
292 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
293 TCR(COMMON_CFI(PC_OFFSET)) \
294 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
296 /* Trampoline body block
297 --------------------- */
299 #define SIGTRAMP_BODY \
301 TCR("# Allocate frame and save the non-volatile") \
302 TCR("# registers we're going to modify") \
304 TCR("stmfd sp!, {r"S(CFA_REG)", fp, ip, lr, pc}") \
305 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
306 TCR("ldr r"S(CFA_REG)", [ip]") \
308 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
309 TCR("# arguments are the same as those we received in r0, r1 and r2") \
310 TCR("sub fp, ip, #4") \
312 TCR("# Restore our callee-saved items, release our frame and return") \
313 TCR("ldmfd sp, {r"S(CFA_REG)", fp, sp, pc}")
317 #if CPU == SIMNT || CPU == SIMPENTIUM || CPU == SIMLINUX
318 #define COMMON_CFI(REG) \
319 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
321 #define COMMON_CFI(REG) \
322 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
325 #define PC_CFI(REG) \
326 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
328 #define CFI_COMMON_REGS \
329 CR("# CFI for common registers\n") \
330 TCR(COMMON_CFI(EDI)) \
331 TCR(COMMON_CFI(ESI)) \
332 TCR(COMMON_CFI(EBP)) \
333 TCR(COMMON_CFI(ESP)) \
334 TCR(COMMON_CFI(EBX)) \
335 TCR(COMMON_CFI(EDX)) \
336 TCR(COMMON_CFI(ECX)) \
337 TCR(COMMON_CFI(EAX)) \
338 TCR(COMMON_CFI(EFLAGS)) \
339 TCR(PC_CFI(SET_PC)) \
340 TCR(".cfi_return_column " S(REGNO_SET_PC))
342 /* Trampoline body block
343 --------------------- */
345 #define SIGTRAMP_BODY \
347 TCR("# Allocate frame and save the non-volatile") \
348 TCR("# registers we're going to modify") \
350 TCR("movl %esp, %ebp") \
352 TCR("subl $24, %esp") \
353 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
354 TCR("movl 24(%ebp), %edi") \
355 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
356 TCR("# arguments are the same as those we received") \
357 TCR("movl 16(%ebp), %eax") \
358 TCR("movl %eax, 8(%esp)") \
359 TCR("movl 12(%ebp), %eax") \
360 TCR("movl %eax, 4(%esp)") \
361 TCR("movl 8(%ebp), %eax") \
362 TCR("movl %eax, (%esp)") \
363 TCR("call *20(%ebp)") \
364 TCR("# Restore our callee-saved items, release our frame and return") \
371 #endif /* CFI_COMMON_REGS and SIGTRAMP_BODY */
373 /* Symbol definition block
374 ----------------------- */
376 #define SIGTRAMP_START(SYM) \
377 CR("# " S(SYM) " cfi trampoline") \
378 TCR(".type " S(SYM) ", "FUNCTION) \
381 TCR(".cfi_startproc") \
382 TCR(".cfi_signal_frame")
384 /* Symbol termination block
385 ------------------------ */
387 #define SIGTRAMP_END(SYM) \
389 TCR(".size " S(SYM) ", .-" S(SYM))
391 /*----------------------------
392 -- And now, the real code --
393 ---------------------------- */
395 /* Text section start. The compiler isn't aware of that switch. */