1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
28 #include "gensupport.h"
30 static struct obstack obstack
;
31 struct obstack
*rtl_obstack
= &obstack
;
33 #define obstack_chunk_alloc xmalloc
34 #define obstack_chunk_free free
37 static int max_dup_opno
;
38 static int max_scratch_opno
;
39 static int register_constraints
;
40 static int insn_code_number
;
41 static int insn_index_number
;
43 /* Data structure for recording the patterns of insns that have CLOBBERs.
44 We use this to output a function that adds these CLOBBERs to a
45 previously-allocated PARALLEL expression. */
49 struct clobber_ent
*insns
;
52 struct clobber_pat
*next
;
55 /* Records one insn that uses the clobber list. */
59 int code_number
; /* Counts only insns. */
60 struct clobber_ent
*next
;
63 static void max_operand_1
PARAMS ((rtx
));
64 static int max_operand_vec
PARAMS ((rtx
, int));
65 static void print_code
PARAMS ((RTX_CODE
));
66 static void gen_exp
PARAMS ((rtx
, enum rtx_code
));
67 static void gen_insn
PARAMS ((rtx
));
68 static void gen_expand
PARAMS ((rtx
));
69 static void gen_split
PARAMS ((rtx
));
70 static void output_add_clobbers
PARAMS ((void));
71 static void gen_rtx_scratch
PARAMS ((rtx
, enum rtx_code
));
72 static void output_peephole2_scratches
PARAMS ((rtx
));
79 register RTX_CODE code
;
82 register const char *fmt
;
89 if (code
== MATCH_OPERAND
&& XSTR (x
, 2) != 0 && *XSTR (x
, 2) != '\0')
90 register_constraints
= 1;
91 if (code
== MATCH_SCRATCH
&& XSTR (x
, 1) != 0 && *XSTR (x
, 1) != '\0')
92 register_constraints
= 1;
93 if (code
== MATCH_OPERAND
|| code
== MATCH_OPERATOR
94 || code
== MATCH_PARALLEL
)
95 max_opno
= MAX (max_opno
, XINT (x
, 0));
96 if (code
== MATCH_DUP
|| code
== MATCH_OP_DUP
|| code
== MATCH_PAR_DUP
)
97 max_dup_opno
= MAX (max_dup_opno
, XINT (x
, 0));
98 if (code
== MATCH_SCRATCH
)
99 max_scratch_opno
= MAX (max_scratch_opno
, XINT (x
, 0));
101 fmt
= GET_RTX_FORMAT (code
);
102 len
= GET_RTX_LENGTH (code
);
103 for (i
= 0; i
< len
; i
++)
105 if (fmt
[i
] == 'e' || fmt
[i
] == 'u')
106 max_operand_1 (XEXP (x
, i
));
107 else if (fmt
[i
] == 'E')
110 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
111 max_operand_1 (XVECEXP (x
, i
, j
));
117 max_operand_vec (insn
, arg
)
121 register int len
= XVECLEN (insn
, arg
);
126 max_scratch_opno
= -1;
128 for (i
= 0; i
< len
; i
++)
129 max_operand_1 (XVECEXP (insn
, arg
, i
));
138 register const char *p1
;
139 for (p1
= GET_RTX_NAME (code
); *p1
; p1
++)
140 putchar (TOUPPER(*p1
));
144 gen_rtx_scratch (x
, subroutine_type
)
146 enum rtx_code subroutine_type
;
148 if (subroutine_type
== DEFINE_PEEPHOLE2
)
150 printf ("operand%d", XINT (x
, 0));
154 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x
)));
158 /* Print a C expression to construct an RTX just like X,
159 substituting any operand references appearing within. */
162 gen_exp (x
, subroutine_type
)
164 enum rtx_code subroutine_type
;
166 register RTX_CODE code
;
169 register const char *fmt
;
183 printf ("operand%d", XINT (x
, 0));
187 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x
, 0));
188 if (GET_MODE (x
) == VOIDmode
)
189 printf ("GET_MODE (operand%d)", XINT (x
, 0));
191 printf ("%smode", GET_MODE_NAME (GET_MODE (x
)));
192 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
195 gen_exp (XVECEXP (x
, 1, i
), subroutine_type
);
201 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x
, 0));
202 printf (", %smode", GET_MODE_NAME (GET_MODE (x
)));
203 for (i
= 0; i
< XVECLEN (x
, 2); i
++)
206 gen_exp (XVECEXP (x
, 2, i
), subroutine_type
);
213 printf ("operand%d", XINT (x
, 0));
217 gen_rtx_scratch (x
, subroutine_type
);
221 fatal ("ADDRESS expression code used in named instruction pattern");
233 printf ("const0_rtx");
234 else if (INTVAL (x
) == 1)
235 printf ("const1_rtx");
236 else if (INTVAL (x
) == -1)
237 printf ("constm1_rtx");
238 else if (INTVAL (x
) == STORE_FLAG_VALUE
)
239 printf ("const_true_rtx");
242 printf ("GEN_INT (");
243 printf (HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
249 /* These shouldn't be written in MD files. Instead, the appropriate
250 routines in varasm.c should be called. */
259 printf (" (%smode", GET_MODE_NAME (GET_MODE (x
)));
261 fmt
= GET_RTX_FORMAT (code
);
262 len
= GET_RTX_LENGTH (code
);
263 for (i
= 0; i
< len
; i
++)
268 if (fmt
[i
] == 'e' || fmt
[i
] == 'u')
269 gen_exp (XEXP (x
, i
), subroutine_type
);
270 else if (fmt
[i
] == 'i')
271 printf ("%u", XINT (x
, i
));
272 else if (fmt
[i
] == 's')
273 printf ("\"%s\"", XSTR (x
, i
));
274 else if (fmt
[i
] == 'E')
277 printf ("gen_rtvec (%d", XVECLEN (x
, i
));
278 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
281 gen_exp (XVECEXP (x
, i
, j
), subroutine_type
);
291 /* Generate the `gen_...' function for a DEFINE_INSN. */
300 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
301 registers or MATCH_SCRATCHes. If so, store away the information for
306 for (i
= XVECLEN (insn
, 1) - 1; i
> 0; i
--)
307 if (GET_CODE (XVECEXP (insn
, 1, i
)) != CLOBBER
308 || (GET_CODE (XEXP (XVECEXP (insn
, 1, i
), 0)) != REG
309 && GET_CODE (XEXP (XVECEXP (insn
, 1, i
), 0)) != MATCH_SCRATCH
))
312 if (i
!= XVECLEN (insn
, 1) - 1)
314 register struct clobber_pat
*p
;
315 register struct clobber_ent
*link
316 = (struct clobber_ent
*) xmalloc (sizeof (struct clobber_ent
));
319 link
->code_number
= insn_code_number
;
321 /* See if any previous CLOBBER_LIST entry is the same as this
324 for (p
= clobber_list
; p
; p
= p
->next
)
326 if (p
->first_clobber
!= i
+ 1
327 || XVECLEN (p
->pattern
, 1) != XVECLEN (insn
, 1))
330 for (j
= i
+ 1; j
< XVECLEN (insn
, 1); j
++)
332 rtx old
= XEXP (XVECEXP (p
->pattern
, 1, j
), 0);
333 rtx
new = XEXP (XVECEXP (insn
, 1, j
), 0);
335 /* OLD and NEW are the same if both are to be a SCRATCH
337 or if both are registers of the same mode and number. */
338 if (! (GET_MODE (old
) == GET_MODE (new)
339 && ((GET_CODE (old
) == MATCH_SCRATCH
340 && GET_CODE (new) == MATCH_SCRATCH
)
341 || (GET_CODE (old
) == REG
&& GET_CODE (new) == REG
342 && REGNO (old
) == REGNO (new)))))
346 if (j
== XVECLEN (insn
, 1))
352 p
= (struct clobber_pat
*) xmalloc (sizeof (struct clobber_pat
));
356 p
->first_clobber
= i
+ 1;
357 p
->next
= clobber_list
;
361 link
->next
= p
->insns
;
366 /* Don't mention instructions whose names are the null string
367 or begin with '*'. They are in the machine description just
369 if (XSTR (insn
, 0)[0] == 0 || XSTR (insn
, 0)[0] == '*')
372 /* Find out how many operands this function has,
373 and also whether any of them have register constraints. */
374 register_constraints
= 0;
375 operands
= max_operand_vec (insn
, 1);
376 if (max_dup_opno
>= operands
)
377 fatal ("match_dup operand number has no match_operand");
379 /* Output the function name and argument declarations. */
380 printf ("rtx\ngen_%s (", XSTR (insn
, 0));
381 for (i
= 0; i
< operands
; i
++)
383 printf (", operand%d", i
);
385 printf ("operand%d", i
);
387 for (i
= 0; i
< operands
; i
++)
388 printf (" rtx operand%d;\n", i
);
391 /* Output code to construct and return the rtl for the instruction body */
393 if (XVECLEN (insn
, 1) == 1)
396 gen_exp (XVECEXP (insn
, 1, 0), DEFINE_INSN
);
401 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
404 for (i
= 0; i
< XVECLEN (insn
, 1); i
++)
407 gen_exp (XVECEXP (insn
, 1, i
), DEFINE_INSN
);
409 printf ("));\n}\n\n");
413 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
422 if (strlen (XSTR (expand
, 0)) == 0)
423 fatal ("define_expand lacks a name");
424 if (XVEC (expand
, 1) == 0)
425 fatal ("define_expand for %s lacks a pattern", XSTR (expand
, 0));
427 /* Find out how many operands this function has,
428 and also whether any of them have register constraints. */
429 register_constraints
= 0;
431 operands
= max_operand_vec (expand
, 1);
433 /* Output the function name and argument declarations. */
434 printf ("rtx\ngen_%s (", XSTR (expand
, 0));
435 for (i
= 0; i
< operands
; i
++)
437 printf (", operand%d", i
);
439 printf ("operand%d", i
);
441 for (i
= 0; i
< operands
; i
++)
442 printf (" rtx operand%d;\n", i
);
445 /* If we don't have any C code to write, only one insn is being written,
446 and no MATCH_DUPs are present, we can just return the desired insn
447 like we do for a DEFINE_INSN. This saves memory. */
448 if ((XSTR (expand
, 3) == 0 || *XSTR (expand
, 3) == '\0')
449 && operands
> max_dup_opno
450 && XVECLEN (expand
, 1) == 1)
453 gen_exp (XVECEXP (expand
, 1, 0), DEFINE_EXPAND
);
458 /* For each operand referred to only with MATCH_DUPs,
459 make a local variable. */
460 for (i
= operands
; i
<= max_dup_opno
; i
++)
461 printf (" rtx operand%d;\n", i
);
462 for (; i
<= max_scratch_opno
; i
++)
463 printf (" rtx operand%d;\n", i
);
464 printf (" rtx _val = 0;\n");
465 printf (" start_sequence ();\n");
467 /* The fourth operand of DEFINE_EXPAND is some code to be executed
468 before the actual construction.
469 This code expects to refer to `operands'
470 just as the output-code in a DEFINE_INSN does,
471 but here `operands' is an automatic array.
472 So copy the operand values there before executing it. */
473 if (XSTR (expand
, 3) && *XSTR (expand
, 3))
476 if (operands
> 0 || max_dup_opno
>= 0 || max_scratch_opno
>= 0)
477 printf (" rtx operands[%d];\n",
478 MAX (operands
, MAX (max_scratch_opno
, max_dup_opno
) + 1));
479 /* Output code to copy the arguments into `operands'. */
480 for (i
= 0; i
< operands
; i
++)
481 printf (" operands[%d] = operand%d;\n", i
, i
);
483 /* Output the special code to be executed before the sequence
485 printf ("%s\n", XSTR (expand
, 3));
487 /* Output code to copy the arguments back out of `operands'
488 (unless we aren't going to use them at all). */
489 if (XVEC (expand
, 1) != 0)
491 for (i
= 0; i
< operands
; i
++)
492 printf (" operand%d = operands[%d];\n", i
, i
);
493 for (; i
<= max_dup_opno
; i
++)
494 printf (" operand%d = operands[%d];\n", i
, i
);
495 for (; i
<= max_scratch_opno
; i
++)
496 printf (" operand%d = operands[%d];\n", i
, i
);
501 /* Output code to construct the rtl for the instruction bodies.
502 Use emit_insn to add them to the sequence being accumulated.
503 But don't do this if the user's code has set `no_more' nonzero. */
505 for (i
= 0; i
< XVECLEN (expand
, 1); i
++)
507 rtx next
= XVECEXP (expand
, 1, i
);
508 if ((GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
)
509 || (GET_CODE (next
) == PARALLEL
510 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
511 && GET_CODE (SET_DEST (XVECEXP (next
, 0, 0))) == PC
)
512 || GET_CODE (next
) == RETURN
)
513 printf (" emit_jump_insn (");
514 else if ((GET_CODE (next
) == SET
&& GET_CODE (SET_SRC (next
)) == CALL
)
515 || GET_CODE (next
) == CALL
516 || (GET_CODE (next
) == PARALLEL
517 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
518 && GET_CODE (SET_SRC (XVECEXP (next
, 0, 0))) == CALL
)
519 || (GET_CODE (next
) == PARALLEL
520 && GET_CODE (XVECEXP (next
, 0, 0)) == CALL
))
521 printf (" emit_call_insn (");
522 else if (GET_CODE (next
) == CODE_LABEL
)
523 printf (" emit_label (");
524 else if (GET_CODE (next
) == MATCH_OPERAND
525 || GET_CODE (next
) == MATCH_DUP
526 || GET_CODE (next
) == MATCH_OPERATOR
527 || GET_CODE (next
) == MATCH_OP_DUP
528 || GET_CODE (next
) == MATCH_PARALLEL
529 || GET_CODE (next
) == MATCH_PAR_DUP
530 || GET_CODE (next
) == PARALLEL
)
533 printf (" emit_insn (");
534 gen_exp (next
, DEFINE_EXPAND
);
536 if (GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
537 && GET_CODE (SET_SRC (next
)) == LABEL_REF
)
538 printf (" emit_barrier ();");
541 /* Call `gen_sequence' to make a SEQUENCE out of all the
542 insns emitted within this gen_... function. */
544 printf (" _val = gen_sequence ();\n");
545 printf (" end_sequence ();\n");
546 printf (" return _val;\n}\n\n");
549 /* Like gen_expand, but generates a SEQUENCE. */
557 const char *name
= "split";
559 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
562 if (XVEC (split
, 0) == 0)
563 fatal ("define_%s (definition %d) lacks a pattern", name
,
565 else if (XVEC (split
, 2) == 0)
566 fatal ("define_%s (definition %d) lacks a replacement pattern", name
,
569 /* Find out how many operands this function has. */
571 max_operand_vec (split
, 2);
572 operands
= MAX (max_opno
, MAX (max_dup_opno
, max_scratch_opno
)) + 1;
574 /* Output the prototype, function name and argument declarations. */
575 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
577 printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
578 name
, insn_code_number
);
579 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n\
580 rtx curr_insn ATTRIBUTE_UNUSED;\n\
582 name
, insn_code_number
);
586 printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number
);
587 printf ("rtx\ngen_%s_%d (operands)\n rtx *operands;\n", name
,
592 /* Declare all local variables. */
593 for (i
= 0; i
< operands
; i
++)
594 printf (" rtx operand%d;\n", i
);
595 printf (" rtx _val = 0;\n");
597 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
598 output_peephole2_scratches (split
);
600 printf (" start_sequence ();\n");
602 /* The fourth operand of DEFINE_SPLIT is some code to be executed
603 before the actual construction. */
606 printf ("%s\n", XSTR (split
, 3));
608 /* Output code to copy the arguments back out of `operands' */
609 for (i
= 0; i
< operands
; i
++)
610 printf (" operand%d = operands[%d];\n", i
, i
);
612 /* Output code to construct the rtl for the instruction bodies.
613 Use emit_insn to add them to the sequence being accumulated.
614 But don't do this if the user's code has set `no_more' nonzero. */
616 for (i
= 0; i
< XVECLEN (split
, 2); i
++)
618 rtx next
= XVECEXP (split
, 2, i
);
619 if ((GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
)
620 || (GET_CODE (next
) == PARALLEL
621 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
622 && GET_CODE (SET_DEST (XVECEXP (next
, 0, 0))) == PC
)
623 || GET_CODE (next
) == RETURN
)
624 printf (" emit_jump_insn (");
625 else if ((GET_CODE (next
) == SET
&& GET_CODE (SET_SRC (next
)) == CALL
)
626 || GET_CODE (next
) == CALL
627 || (GET_CODE (next
) == PARALLEL
628 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
629 && GET_CODE (SET_SRC (XVECEXP (next
, 0, 0))) == CALL
)
630 || (GET_CODE (next
) == PARALLEL
631 && GET_CODE (XVECEXP (next
, 0, 0)) == CALL
))
632 printf (" emit_call_insn (");
633 else if (GET_CODE (next
) == CODE_LABEL
)
634 printf (" emit_label (");
635 else if (GET_CODE (next
) == MATCH_OPERAND
636 || GET_CODE (next
) == MATCH_OPERATOR
637 || GET_CODE (next
) == MATCH_PARALLEL
638 || GET_CODE (next
) == MATCH_OP_DUP
639 || GET_CODE (next
) == MATCH_DUP
640 || GET_CODE (next
) == PARALLEL
)
643 printf (" emit_insn (");
644 gen_exp (next
, GET_CODE (split
));
646 if (GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
647 && GET_CODE (SET_SRC (next
)) == LABEL_REF
)
648 printf (" emit_barrier ();");
651 /* Call `gen_sequence' to make a SEQUENCE out of all the
652 insns emitted within this gen_... function. */
654 printf (" _val = gen_sequence ();\n");
655 printf (" end_sequence ();\n");
656 printf (" return _val;\n}\n\n");
659 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
660 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
661 the end of the vector. */
664 output_add_clobbers ()
666 struct clobber_pat
*clobber
;
667 struct clobber_ent
*ent
;
670 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
671 printf (" rtx pattern;\n int insn_code_number;\n");
673 printf (" switch (insn_code_number)\n");
676 for (clobber
= clobber_list
; clobber
; clobber
= clobber
->next
)
678 for (ent
= clobber
->insns
; ent
; ent
= ent
->next
)
679 printf (" case %d:\n", ent
->code_number
);
681 for (i
= clobber
->first_clobber
; i
< XVECLEN (clobber
->pattern
, 1); i
++)
683 printf (" XVECEXP (pattern, 0, %d) = ", i
);
684 gen_exp (XVECEXP (clobber
->pattern
, 1, i
),
685 GET_CODE (clobber
->pattern
));
689 printf (" break;\n\n");
692 printf (" default:\n");
693 printf (" abort ();\n");
698 /* Generate code to invoke find_free_register () as needed for the
699 scratch registers used by the peephole2 pattern in SPLIT. */
702 output_peephole2_scratches (split
)
708 printf (" rtx first_insn ATTRIBUTE_UNUSED;\n");
709 printf (" rtx last_insn ATTRIBUTE_UNUSED;\n");
710 printf (" HARD_REG_SET _regs_allocated;\n");
712 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
714 for (i
= 0; i
< XVECLEN (split
, 0); i
++)
716 rtx elt
= XVECEXP (split
, 0, i
);
717 if (GET_CODE (elt
) == MATCH_SCRATCH
)
719 int last_insn_nr
= insn_nr
;
720 int cur_insn_nr
= insn_nr
;
722 for (j
= i
+ 1; j
< XVECLEN (split
, 0); j
++)
723 if (GET_CODE (XVECEXP (split
, 0, j
)) == MATCH_DUP
)
725 if (XINT (XVECEXP (split
, 0, j
), 0) == XINT (elt
, 0))
726 last_insn_nr
= cur_insn_nr
;
728 else if (GET_CODE (XVECEXP (split
, 0, j
)) != MATCH_SCRATCH
)
730 printf (" first_insn = recog_next_insn (curr_insn, %d);\n", insn_nr
);
731 if (last_insn_nr
> insn_nr
)
732 printf (" last_insn = recog_next_insn (curr_insn, %d);\n",
735 printf (" last_insn = 0;\n");
736 printf (" if ((operands[%d] = find_free_register (first_insn, last_insn, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
740 GET_MODE_NAME (GET_MODE (elt
)));
743 else if (GET_CODE (elt
) != MATCH_DUP
)
752 register PTR val
= (PTR
) malloc (size
);
755 fatal ("virtual memory exhausted");
767 ptr
= (PTR
) realloc (old
, size
);
769 ptr
= (PTR
) malloc (size
);
771 fatal ("virtual memory exhausted");
775 extern int main
PARAMS ((int, char **));
784 progname
= "genemit";
785 obstack_init (rtl_obstack
);
788 fatal ("No input file name.");
790 if (init_md_reader (argv
[1]) != SUCCESS_EXIT_CODE
)
791 return (FATAL_EXIT_CODE
);
793 /* Assign sequential codes to all entries in the machine description
794 in parallel with the tables in insn-output.c. */
796 insn_code_number
= 0;
797 insn_index_number
= 0;
799 printf ("/* Generated automatically by the program `genemit'\n\
800 from the machine description file `md'. */\n\n");
802 printf ("#include \"config.h\"\n");
803 printf ("#include \"system.h\"\n");
804 printf ("#include \"rtl.h\"\n");
805 printf ("#include \"tm_p.h\"\n");
806 printf ("#include \"function.h\"\n");
807 printf ("#include \"expr.h\"\n");
808 printf ("#include \"real.h\"\n");
809 printf ("#include \"flags.h\"\n");
810 printf ("#include \"output.h\"\n");
811 printf ("#include \"insn-config.h\"\n");
812 printf ("#include \"insn-flags.h\"\n");
813 printf ("#include \"insn-codes.h\"\n");
814 printf ("#include \"recog.h\"\n");
815 printf ("#include \"hard-reg-set.h\"\n");
816 printf ("#include \"resource.h\"\n");
817 printf ("#include \"reload.h\"\n\n");
818 printf ("#define FAIL return (end_sequence (), _val)\n");
819 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
821 /* Read the machine description. */
827 desc
= read_md_rtx (&line_no
, &insn_code_number
);
831 switch (GET_CODE (desc
))
845 case DEFINE_PEEPHOLE2
:
855 /* Write out the routine to add CLOBBERs to a pattern. */
856 output_add_clobbers ();
859 return (ferror (stdout
) != 0 ? FATAL_EXIT_CODE
: SUCCESS_EXIT_CODE
);
862 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
865 int code ATTRIBUTE_UNUSED
;