IA MCU psABI support: GCC changes
[official-gcc.git] / gcc / config / i386 / i386-c.c
blob304ce551d201e09bd5f474825568e61588ddd254
1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "alias.h"
25 #include "symtab.h"
26 #include "options.h"
27 #include "tree.h"
28 #include "tm_p.h"
29 #include "flags.h"
30 #include "c-family/c-common.h"
31 #include "target.h"
32 #include "cpplib.h"
33 #include "c-family/c-pragma.h"
35 static bool ix86_pragma_target_parse (tree, tree);
36 static void ix86_target_macros_internal
37 (HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
38 void (*def_or_undef) (cpp_reader *, const char *));
41 /* Internal function to either define or undef the appropriate system
42 macros. */
43 static void
44 ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
45 enum processor_type arch,
46 enum processor_type tune,
47 enum fpmath_unit fpmath,
48 void (*def_or_undef) (cpp_reader *,
49 const char *))
51 /* For some of the k6/pentium varients there weren't separate ISA bits to
52 identify which tune/arch flag was passed, so figure it out here. */
53 size_t arch_len = strlen (ix86_arch_string);
54 size_t tune_len = strlen (ix86_tune_string);
55 int last_arch_char = ix86_arch_string[arch_len - 1];
56 int last_tune_char = ix86_tune_string[tune_len - 1];
58 /* Built-ins based on -march=. */
59 switch (arch)
61 case PROCESSOR_I386:
62 break;
63 case PROCESSOR_I486:
64 def_or_undef (parse_in, "__i486");
65 def_or_undef (parse_in, "__i486__");
66 break;
67 case PROCESSOR_PENTIUM:
68 def_or_undef (parse_in, "__i586");
69 def_or_undef (parse_in, "__i586__");
70 def_or_undef (parse_in, "__pentium");
71 def_or_undef (parse_in, "__pentium__");
72 if (isa_flag & OPTION_MASK_ISA_MMX)
73 def_or_undef (parse_in, "__pentium_mmx__");
74 break;
75 case PROCESSOR_PENTIUMPRO:
76 def_or_undef (parse_in, "__i686");
77 def_or_undef (parse_in, "__i686__");
78 def_or_undef (parse_in, "__pentiumpro");
79 def_or_undef (parse_in, "__pentiumpro__");
80 break;
81 case PROCESSOR_GEODE:
82 def_or_undef (parse_in, "__geode");
83 def_or_undef (parse_in, "__geode__");
84 break;
85 case PROCESSOR_K6:
86 def_or_undef (parse_in, "__k6");
87 def_or_undef (parse_in, "__k6__");
88 if (last_arch_char == '2')
89 def_or_undef (parse_in, "__k6_2__");
90 else if (last_arch_char == '3')
91 def_or_undef (parse_in, "__k6_3__");
92 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
93 def_or_undef (parse_in, "__k6_3__");
94 break;
95 case PROCESSOR_ATHLON:
96 def_or_undef (parse_in, "__athlon");
97 def_or_undef (parse_in, "__athlon__");
98 if (isa_flag & OPTION_MASK_ISA_SSE)
99 def_or_undef (parse_in, "__athlon_sse__");
100 break;
101 case PROCESSOR_K8:
102 def_or_undef (parse_in, "__k8");
103 def_or_undef (parse_in, "__k8__");
104 break;
105 case PROCESSOR_AMDFAM10:
106 def_or_undef (parse_in, "__amdfam10");
107 def_or_undef (parse_in, "__amdfam10__");
108 break;
109 case PROCESSOR_BDVER1:
110 def_or_undef (parse_in, "__bdver1");
111 def_or_undef (parse_in, "__bdver1__");
112 break;
113 case PROCESSOR_BDVER2:
114 def_or_undef (parse_in, "__bdver2");
115 def_or_undef (parse_in, "__bdver2__");
116 break;
117 case PROCESSOR_BDVER3:
118 def_or_undef (parse_in, "__bdver3");
119 def_or_undef (parse_in, "__bdver3__");
120 break;
121 case PROCESSOR_BDVER4:
122 def_or_undef (parse_in, "__bdver4");
123 def_or_undef (parse_in, "__bdver4__");
124 break;
125 case PROCESSOR_BTVER1:
126 def_or_undef (parse_in, "__btver1");
127 def_or_undef (parse_in, "__btver1__");
128 break;
129 case PROCESSOR_BTVER2:
130 def_or_undef (parse_in, "__btver2");
131 def_or_undef (parse_in, "__btver2__");
132 break;
133 case PROCESSOR_PENTIUM4:
134 def_or_undef (parse_in, "__pentium4");
135 def_or_undef (parse_in, "__pentium4__");
136 break;
137 case PROCESSOR_NOCONA:
138 def_or_undef (parse_in, "__nocona");
139 def_or_undef (parse_in, "__nocona__");
140 break;
141 case PROCESSOR_CORE2:
142 def_or_undef (parse_in, "__core2");
143 def_or_undef (parse_in, "__core2__");
144 break;
145 case PROCESSOR_NEHALEM:
146 def_or_undef (parse_in, "__corei7");
147 def_or_undef (parse_in, "__corei7__");
148 def_or_undef (parse_in, "__nehalem");
149 def_or_undef (parse_in, "__nehalem__");
150 break;
151 case PROCESSOR_SANDYBRIDGE:
152 def_or_undef (parse_in, "__corei7_avx");
153 def_or_undef (parse_in, "__corei7_avx__");
154 def_or_undef (parse_in, "__sandybridge");
155 def_or_undef (parse_in, "__sandybridge__");
156 break;
157 case PROCESSOR_HASWELL:
158 def_or_undef (parse_in, "__core_avx2");
159 def_or_undef (parse_in, "__core_avx2__");
160 def_or_undef (parse_in, "__haswell");
161 def_or_undef (parse_in, "__haswell__");
162 break;
163 case PROCESSOR_BONNELL:
164 def_or_undef (parse_in, "__atom");
165 def_or_undef (parse_in, "__atom__");
166 def_or_undef (parse_in, "__bonnell");
167 def_or_undef (parse_in, "__bonnell__");
168 break;
169 case PROCESSOR_SILVERMONT:
170 def_or_undef (parse_in, "__slm");
171 def_or_undef (parse_in, "__slm__");
172 def_or_undef (parse_in, "__silvermont");
173 def_or_undef (parse_in, "__silvermont__");
174 break;
175 case PROCESSOR_KNL:
176 def_or_undef (parse_in, "__knl");
177 def_or_undef (parse_in, "__knl__");
178 break;
179 /* use PROCESSOR_max to not set/unset the arch macro. */
180 case PROCESSOR_max:
181 break;
182 case PROCESSOR_INTEL:
183 case PROCESSOR_GENERIC:
184 gcc_unreachable ();
187 /* Built-ins based on -mtune=. */
188 switch (tune)
190 case PROCESSOR_I386:
191 def_or_undef (parse_in, "__tune_i386__");
192 break;
193 case PROCESSOR_I486:
194 def_or_undef (parse_in, "__tune_i486__");
195 break;
196 case PROCESSOR_PENTIUM:
197 def_or_undef (parse_in, "__tune_i586__");
198 def_or_undef (parse_in, "__tune_pentium__");
199 if (last_tune_char == 'x')
200 def_or_undef (parse_in, "__tune_pentium_mmx__");
201 break;
202 case PROCESSOR_PENTIUMPRO:
203 def_or_undef (parse_in, "__tune_i686__");
204 def_or_undef (parse_in, "__tune_pentiumpro__");
205 switch (last_tune_char)
207 case '3':
208 def_or_undef (parse_in, "__tune_pentium3__");
209 /* FALLTHRU */
210 case '2':
211 def_or_undef (parse_in, "__tune_pentium2__");
212 break;
214 break;
215 case PROCESSOR_GEODE:
216 def_or_undef (parse_in, "__tune_geode__");
217 break;
218 case PROCESSOR_K6:
219 def_or_undef (parse_in, "__tune_k6__");
220 if (last_tune_char == '2')
221 def_or_undef (parse_in, "__tune_k6_2__");
222 else if (last_tune_char == '3')
223 def_or_undef (parse_in, "__tune_k6_3__");
224 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
225 def_or_undef (parse_in, "__tune_k6_3__");
226 break;
227 case PROCESSOR_ATHLON:
228 def_or_undef (parse_in, "__tune_athlon__");
229 if (isa_flag & OPTION_MASK_ISA_SSE)
230 def_or_undef (parse_in, "__tune_athlon_sse__");
231 break;
232 case PROCESSOR_K8:
233 def_or_undef (parse_in, "__tune_k8__");
234 break;
235 case PROCESSOR_AMDFAM10:
236 def_or_undef (parse_in, "__tune_amdfam10__");
237 break;
238 case PROCESSOR_BDVER1:
239 def_or_undef (parse_in, "__tune_bdver1__");
240 break;
241 case PROCESSOR_BDVER2:
242 def_or_undef (parse_in, "__tune_bdver2__");
243 break;
244 case PROCESSOR_BDVER3:
245 def_or_undef (parse_in, "__tune_bdver3__");
246 break;
247 case PROCESSOR_BDVER4:
248 def_or_undef (parse_in, "__tune_bdver4__");
249 break;
250 case PROCESSOR_BTVER1:
251 def_or_undef (parse_in, "__tune_btver1__");
252 break;
253 case PROCESSOR_BTVER2:
254 def_or_undef (parse_in, "__tune_btver2__");
255 break;
256 case PROCESSOR_PENTIUM4:
257 def_or_undef (parse_in, "__tune_pentium4__");
258 break;
259 case PROCESSOR_NOCONA:
260 def_or_undef (parse_in, "__tune_nocona__");
261 break;
262 case PROCESSOR_CORE2:
263 def_or_undef (parse_in, "__tune_core2__");
264 break;
265 case PROCESSOR_NEHALEM:
266 def_or_undef (parse_in, "__tune_corei7__");
267 def_or_undef (parse_in, "__tune_nehalem__");
268 break;
269 case PROCESSOR_SANDYBRIDGE:
270 def_or_undef (parse_in, "__tune_corei7_avx__");
271 def_or_undef (parse_in, "__tune_sandybridge__");
272 break;
273 case PROCESSOR_HASWELL:
274 def_or_undef (parse_in, "__tune_core_avx2__");
275 def_or_undef (parse_in, "__tune_haswell__");
276 break;
277 case PROCESSOR_BONNELL:
278 def_or_undef (parse_in, "__tune_atom__");
279 def_or_undef (parse_in, "__tune_bonnell__");
280 break;
281 case PROCESSOR_SILVERMONT:
282 def_or_undef (parse_in, "__tune_slm__");
283 def_or_undef (parse_in, "__tune_silvermont__");
284 break;
285 case PROCESSOR_KNL:
286 def_or_undef (parse_in, "__tune_knl__");
287 break;
288 case PROCESSOR_INTEL:
289 case PROCESSOR_GENERIC:
290 break;
291 /* use PROCESSOR_max to not set/unset the tune macro. */
292 case PROCESSOR_max:
293 break;
296 switch (ix86_cmodel)
298 case CM_SMALL:
299 case CM_SMALL_PIC:
300 def_or_undef (parse_in, "__code_model_small__");
301 break;
302 case CM_MEDIUM:
303 case CM_MEDIUM_PIC:
304 def_or_undef (parse_in, "__code_model_medium__");
305 break;
306 case CM_LARGE:
307 case CM_LARGE_PIC:
308 def_or_undef (parse_in, "__code_model_large__");
309 break;
310 case CM_32:
311 def_or_undef (parse_in, "__code_model_32__");
312 break;
313 case CM_KERNEL:
314 def_or_undef (parse_in, "__code_model_kernel__");
315 break;
316 default:
320 if (isa_flag & OPTION_MASK_ISA_MMX)
321 def_or_undef (parse_in, "__MMX__");
322 if (isa_flag & OPTION_MASK_ISA_3DNOW)
323 def_or_undef (parse_in, "__3dNOW__");
324 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
325 def_or_undef (parse_in, "__3dNOW_A__");
326 if (isa_flag & OPTION_MASK_ISA_SSE)
327 def_or_undef (parse_in, "__SSE__");
328 if (isa_flag & OPTION_MASK_ISA_SSE2)
329 def_or_undef (parse_in, "__SSE2__");
330 if (isa_flag & OPTION_MASK_ISA_SSE3)
331 def_or_undef (parse_in, "__SSE3__");
332 if (isa_flag & OPTION_MASK_ISA_SSSE3)
333 def_or_undef (parse_in, "__SSSE3__");
334 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
335 def_or_undef (parse_in, "__SSE4_1__");
336 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
337 def_or_undef (parse_in, "__SSE4_2__");
338 if (isa_flag & OPTION_MASK_ISA_AES)
339 def_or_undef (parse_in, "__AES__");
340 if (isa_flag & OPTION_MASK_ISA_SHA)
341 def_or_undef (parse_in, "__SHA__");
342 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
343 def_or_undef (parse_in, "__PCLMUL__");
344 if (isa_flag & OPTION_MASK_ISA_AVX)
345 def_or_undef (parse_in, "__AVX__");
346 if (isa_flag & OPTION_MASK_ISA_AVX2)
347 def_or_undef (parse_in, "__AVX2__");
348 if (isa_flag & OPTION_MASK_ISA_AVX512F)
349 def_or_undef (parse_in, "__AVX512F__");
350 if (isa_flag & OPTION_MASK_ISA_AVX512ER)
351 def_or_undef (parse_in, "__AVX512ER__");
352 if (isa_flag & OPTION_MASK_ISA_AVX512CD)
353 def_or_undef (parse_in, "__AVX512CD__");
354 if (isa_flag & OPTION_MASK_ISA_AVX512PF)
355 def_or_undef (parse_in, "__AVX512PF__");
356 if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
357 def_or_undef (parse_in, "__AVX512DQ__");
358 if (isa_flag & OPTION_MASK_ISA_AVX512BW)
359 def_or_undef (parse_in, "__AVX512BW__");
360 if (isa_flag & OPTION_MASK_ISA_AVX512VL)
361 def_or_undef (parse_in, "__AVX512VL__");
362 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
363 def_or_undef (parse_in, "__AVX512VBMI__");
364 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
365 def_or_undef (parse_in, "__AVX512IFMA__");
366 if (isa_flag & OPTION_MASK_ISA_FMA)
367 def_or_undef (parse_in, "__FMA__");
368 if (isa_flag & OPTION_MASK_ISA_RTM)
369 def_or_undef (parse_in, "__RTM__");
370 if (isa_flag & OPTION_MASK_ISA_SSE4A)
371 def_or_undef (parse_in, "__SSE4A__");
372 if (isa_flag & OPTION_MASK_ISA_FMA4)
373 def_or_undef (parse_in, "__FMA4__");
374 if (isa_flag & OPTION_MASK_ISA_XOP)
375 def_or_undef (parse_in, "__XOP__");
376 if (isa_flag & OPTION_MASK_ISA_LWP)
377 def_or_undef (parse_in, "__LWP__");
378 if (isa_flag & OPTION_MASK_ISA_ABM)
379 def_or_undef (parse_in, "__ABM__");
380 if (isa_flag & OPTION_MASK_ISA_BMI)
381 def_or_undef (parse_in, "__BMI__");
382 if (isa_flag & OPTION_MASK_ISA_BMI2)
383 def_or_undef (parse_in, "__BMI2__");
384 if (isa_flag & OPTION_MASK_ISA_LZCNT)
385 def_or_undef (parse_in, "__LZCNT__");
386 if (isa_flag & OPTION_MASK_ISA_TBM)
387 def_or_undef (parse_in, "__TBM__");
388 if (isa_flag & OPTION_MASK_ISA_POPCNT)
389 def_or_undef (parse_in, "__POPCNT__");
390 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
391 def_or_undef (parse_in, "__FSGSBASE__");
392 if (isa_flag & OPTION_MASK_ISA_RDRND)
393 def_or_undef (parse_in, "__RDRND__");
394 if (isa_flag & OPTION_MASK_ISA_F16C)
395 def_or_undef (parse_in, "__F16C__");
396 if (isa_flag & OPTION_MASK_ISA_RDSEED)
397 def_or_undef (parse_in, "__RDSEED__");
398 if (isa_flag & OPTION_MASK_ISA_PRFCHW)
399 def_or_undef (parse_in, "__PRFCHW__");
400 if (isa_flag & OPTION_MASK_ISA_ADX)
401 def_or_undef (parse_in, "__ADX__");
402 if (isa_flag & OPTION_MASK_ISA_FXSR)
403 def_or_undef (parse_in, "__FXSR__");
404 if (isa_flag & OPTION_MASK_ISA_XSAVE)
405 def_or_undef (parse_in, "__XSAVE__");
406 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
407 def_or_undef (parse_in, "__XSAVEOPT__");
408 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1)
409 def_or_undef (parse_in, "__PREFETCHWT1__");
410 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
411 def_or_undef (parse_in, "__SSE_MATH__");
412 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
413 def_or_undef (parse_in, "__SSE2_MATH__");
414 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
415 def_or_undef (parse_in, "__CLFLUSHOPT__");
416 if (isa_flag & OPTION_MASK_ISA_XSAVEC)
417 def_or_undef (parse_in, "__XSAVEC__");
418 if (isa_flag & OPTION_MASK_ISA_XSAVES)
419 def_or_undef (parse_in, "__XSAVES__");
420 if (isa_flag & OPTION_MASK_ISA_MPX)
421 def_or_undef (parse_in, "__MPX__");
422 if (isa_flag & OPTION_MASK_ISA_PCOMMIT)
423 def_or_undef (parse_in, "__PCOMMIT__");
424 if (isa_flag & OPTION_MASK_ISA_CLWB)
425 def_or_undef (parse_in, "__CLWB__");
426 if (isa_flag & OPTION_MASK_ISA_MWAITX)
427 def_or_undef (parse_in, "__MWAITX__");
428 if (TARGET_IAMCU)
430 def_or_undef (parse_in, "__iamcu");
431 def_or_undef (parse_in, "__iamcu__");
436 /* Hook to validate the current #pragma GCC target and set the state, and
437 update the macros based on what was changed. If ARGS is NULL, then
438 POP_TARGET is used to reset the options. */
440 static bool
441 ix86_pragma_target_parse (tree args, tree pop_target)
443 tree prev_tree = build_target_option_node (&global_options);
444 tree cur_tree;
445 struct cl_target_option *prev_opt;
446 struct cl_target_option *cur_opt;
447 HOST_WIDE_INT prev_isa;
448 HOST_WIDE_INT cur_isa;
449 HOST_WIDE_INT diff_isa;
450 enum processor_type prev_arch;
451 enum processor_type prev_tune;
452 enum processor_type cur_arch;
453 enum processor_type cur_tune;
455 if (! args)
457 cur_tree = (pop_target ? pop_target : target_option_default_node);
458 cl_target_option_restore (&global_options,
459 TREE_TARGET_OPTION (cur_tree));
461 else
463 cur_tree = ix86_valid_target_attribute_tree (args, &global_options,
464 &global_options_set);
465 if (!cur_tree || cur_tree == error_mark_node)
467 cl_target_option_restore (&global_options,
468 TREE_TARGET_OPTION (prev_tree));
469 return false;
473 target_option_current_node = cur_tree;
474 ix86_reset_previous_fndecl ();
476 /* Figure out the previous/current isa, arch, tune and the differences. */
477 prev_opt = TREE_TARGET_OPTION (prev_tree);
478 cur_opt = TREE_TARGET_OPTION (cur_tree);
479 prev_isa = prev_opt->x_ix86_isa_flags;
480 cur_isa = cur_opt->x_ix86_isa_flags;
481 diff_isa = (prev_isa ^ cur_isa);
482 prev_arch = (enum processor_type) prev_opt->arch;
483 prev_tune = (enum processor_type) prev_opt->tune;
484 cur_arch = (enum processor_type) cur_opt->arch;
485 cur_tune = (enum processor_type) cur_opt->tune;
487 /* If the same processor is used for both previous and current options, don't
488 change the macros. */
489 if (cur_arch == prev_arch)
490 cur_arch = prev_arch = PROCESSOR_max;
492 if (cur_tune == prev_tune)
493 cur_tune = prev_tune = PROCESSOR_max;
495 /* Undef all of the macros for that are no longer current. */
496 ix86_target_macros_internal (prev_isa & diff_isa,
497 prev_arch,
498 prev_tune,
499 (enum fpmath_unit) prev_opt->x_ix86_fpmath,
500 cpp_undef);
502 /* For the definitions, ensure all newly defined macros are considered
503 as used for -Wunused-macros. There is no point warning about the
504 compiler predefined macros. */
505 cpp_options *cpp_opts = cpp_get_options (parse_in);
506 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
507 cpp_opts->warn_unused_macros = 0;
509 /* Define all of the macros for new options that were just turned on. */
510 ix86_target_macros_internal (cur_isa & diff_isa,
511 cur_arch,
512 cur_tune,
513 (enum fpmath_unit) cur_opt->x_ix86_fpmath,
514 cpp_define);
516 cpp_opts->warn_unused_macros = saved_warn_unused_macros;
518 return true;
521 /* Function to tell the preprocessor about the defines for the current target. */
523 void
524 ix86_target_macros (void)
526 /* 32/64-bit won't change with target specific options, so do the assert and
527 builtin_define_std calls here. */
528 if (TARGET_64BIT)
530 cpp_assert (parse_in, "cpu=x86_64");
531 cpp_assert (parse_in, "machine=x86_64");
532 cpp_define (parse_in, "__amd64");
533 cpp_define (parse_in, "__amd64__");
534 cpp_define (parse_in, "__x86_64");
535 cpp_define (parse_in, "__x86_64__");
536 if (TARGET_X32)
538 cpp_define (parse_in, "_ILP32");
539 cpp_define (parse_in, "__ILP32__");
542 else
544 cpp_assert (parse_in, "cpu=i386");
545 cpp_assert (parse_in, "machine=i386");
546 builtin_define_std ("i386");
549 if (!TARGET_80387)
550 cpp_define (parse_in, "_SOFT_FLOAT");
552 if (TARGET_LONG_DOUBLE_64)
553 cpp_define (parse_in, "__LONG_DOUBLE_64__");
555 if (TARGET_LONG_DOUBLE_128)
556 cpp_define (parse_in, "__LONG_DOUBLE_128__");
558 if (TARGET_128BIT_LONG_DOUBLE)
559 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16");
560 else
561 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12");
563 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
565 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
566 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
568 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
570 ix86_target_macros_internal (ix86_isa_flags,
571 ix86_arch,
572 ix86_tune,
573 ix86_fpmath,
574 cpp_define);
578 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
579 option here rather than in i386.c since it will pull in various preprocessor
580 functions, and those are not present in languages like fortran without a
581 preprocessor. */
583 void
584 ix86_register_pragmas (void)
586 /* Update pragma hook to allow parsing #pragma GCC target. */
587 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
589 #ifdef REGISTER_SUBTARGET_PRAGMAS
590 REGISTER_SUBTARGET_PRAGMAS ();
591 #endif