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* gimplify.c (nonlocal_vlas): Delete.
[official-gcc.git] / gcc / config / s390 / s390.h
blobde71fd927e21c7d06485cdd9ab9a86a64b02b531
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999-2018 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 #ifndef _S390_H
24 #define _S390_H
25
26 /* Optional architectural facilities supported by the processor. */
27
28 enum processor_flags
29 {
30 PF_IEEE_FLOAT = 1,
31 PF_ZARCH = 2,
32 PF_LONG_DISPLACEMENT = 4,
33 PF_EXTIMM = 8,
34 PF_DFP = 16,
35 PF_Z10 = 32,
36 PF_Z196 = 64,
37 PF_ZEC12 = 128,
38 PF_TX = 256,
39 PF_Z13 = 512,
40 PF_VX = 1024,
41 PF_ARCH12 = 2048,
42 PF_VXE = 4096
43 };
44
45 /* This is necessary to avoid a warning about comparing different enum
46 types. */
47 #define s390_tune_attr ((enum attr_cpu)(s390_tune > PROCESSOR_2964_Z13 ? PROCESSOR_2964_Z13 : s390_tune ))
48
49 /* These flags indicate that the generated code should run on a cpu
50 providing the respective hardware facility regardless of the
51 current cpu mode (ESA or z/Architecture). */
52
53 #define TARGET_CPU_IEEE_FLOAT \
54 (s390_arch_flags & PF_IEEE_FLOAT)
55 #define TARGET_CPU_IEEE_FLOAT_P(opts) \
56 (opts->x_s390_arch_flags & PF_IEEE_FLOAT)
57 #define TARGET_CPU_ZARCH \
58 (s390_arch_flags & PF_ZARCH)
59 #define TARGET_CPU_ZARCH_P(opts) \
60 (opts->x_s390_arch_flags & PF_ZARCH)
61 #define TARGET_CPU_LONG_DISPLACEMENT \
62 (s390_arch_flags & PF_LONG_DISPLACEMENT)
63 #define TARGET_CPU_LONG_DISPLACEMENT_P(opts) \
64 (opts->x_s390_arch_flags & PF_LONG_DISPLACEMENT)
65 #define TARGET_CPU_EXTIMM \
66 (s390_arch_flags & PF_EXTIMM)
67 #define TARGET_CPU_EXTIMM_P(opts) \
68 (opts->x_s390_arch_flags & PF_EXTIMM)
69 #define TARGET_CPU_DFP \
70 (s390_arch_flags & PF_DFP)
71 #define TARGET_CPU_DFP_P(opts) \
72 (opts->x_s390_arch_flags & PF_DFP)
73 #define TARGET_CPU_Z10 \
74 (s390_arch_flags & PF_Z10)
75 #define TARGET_CPU_Z10_P(opts) \
76 (opts->x_s390_arch_flags & PF_Z10)
77 #define TARGET_CPU_Z196 \
78 (s390_arch_flags & PF_Z196)
79 #define TARGET_CPU_Z196_P(opts) \
80 (opts->x_s390_arch_flags & PF_Z196)
81 #define TARGET_CPU_ZEC12 \
82 (s390_arch_flags & PF_ZEC12)
83 #define TARGET_CPU_ZEC12_P(opts) \
84 (opts->x_s390_arch_flags & PF_ZEC12)
85 #define TARGET_CPU_HTM \
86 (s390_arch_flags & PF_TX)
87 #define TARGET_CPU_HTM_P(opts) \
88 (opts->x_s390_arch_flags & PF_TX)
89 #define TARGET_CPU_Z13 \
90 (s390_arch_flags & PF_Z13)
91 #define TARGET_CPU_Z13_P(opts) \
92 (opts->x_s390_arch_flags & PF_Z13)
93 #define TARGET_CPU_VX \
94 (s390_arch_flags & PF_VX)
95 #define TARGET_CPU_VX_P(opts) \
96 (opts->x_s390_arch_flags & PF_VX)
97 #define TARGET_CPU_ARCH12 \
98 (s390_arch_flags & PF_ARCH12)
99 #define TARGET_CPU_ARCH12_P(opts) \
100 (opts->x_s390_arch_flags & PF_ARCH12)
101 #define TARGET_CPU_VXE \
102 (s390_arch_flags & PF_VXE)
103 #define TARGET_CPU_VXE_P(opts) \
104 (opts->x_s390_arch_flags & PF_VXE)
105
106 #define TARGET_HARD_FLOAT_P(opts) (!TARGET_SOFT_FLOAT_P(opts))
107
108 /* These flags indicate that the generated code should run on a cpu
109 providing the respective hardware facility when run in
110 z/Architecture mode. */
111
112 #define TARGET_LONG_DISPLACEMENT \
113 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
114 #define TARGET_LONG_DISPLACEMENT_P(opts) \
115 (TARGET_ZARCH_P (opts->x_target_flags) \
116 && TARGET_CPU_LONG_DISPLACEMENT_P (opts))
117 #define TARGET_EXTIMM \
118 (TARGET_ZARCH && TARGET_CPU_EXTIMM)
119 #define TARGET_EXTIMM_P(opts) \
120 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_EXTIMM_P (opts))
121 #define TARGET_DFP \
122 (TARGET_ZARCH && TARGET_CPU_DFP && TARGET_HARD_FLOAT)
123 #define TARGET_DFP_P(opts) \
124 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_DFP_P (opts) \
125 && TARGET_HARD_FLOAT_P (opts->x_target_flags))
126 #define TARGET_Z10 \
127 (TARGET_ZARCH && TARGET_CPU_Z10)
128 #define TARGET_Z10_P(opts) \
129 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z10_P (opts))
130 #define TARGET_Z196 \
131 (TARGET_ZARCH && TARGET_CPU_Z196)
132 #define TARGET_Z196_P(opts) \
133 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z196_P (opts))
134 #define TARGET_ZEC12 \
135 (TARGET_ZARCH && TARGET_CPU_ZEC12)
136 #define TARGET_ZEC12_P(opts) \
137 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ZEC12_P (opts))
138 #define TARGET_HTM (TARGET_OPT_HTM)
139 #define TARGET_HTM_P(opts) (TARGET_OPT_HTM_P (opts->x_target_flags))
140 #define TARGET_Z13 \
141 (TARGET_ZARCH && TARGET_CPU_Z13)
142 #define TARGET_Z13_P(opts) \
143 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z13_P (opts))
144 #define TARGET_VX \
145 (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT)
146 #define TARGET_VX_P(opts) \
147 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \
148 && TARGET_OPT_VX_P (opts->x_target_flags) \
149 && TARGET_HARD_FLOAT_P (opts->x_target_flags))
150 #define TARGET_ARCH12 (TARGET_ZARCH && TARGET_CPU_ARCH12)
151 #define TARGET_ARCH12_P(opts) \
152 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH12_P (opts))
153 #define TARGET_VXE \
154 (TARGET_VX && TARGET_CPU_VXE)
155 #define TARGET_VXE_P(opts) \
156 (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
157
158 #ifdef HAVE_AS_MACHINE_MACHINEMODE
159 #define S390_USE_TARGET_ATTRIBUTE 1
160 #else
161 #define S390_USE_TARGET_ATTRIBUTE 0
162 #endif
163
164 #ifdef HAVE_AS_ARCHITECTURE_MODIFIERS
165 #define S390_USE_ARCHITECTURE_MODIFIERS 1
166 #else
167 #define S390_USE_ARCHITECTURE_MODIFIERS 0
168 #endif
169
170 #if S390_USE_TARGET_ATTRIBUTE
171 /* For switching between functions with different target attributes. */
172 #define SWITCHABLE_TARGET 1
173 #endif
174
175 #define TARGET_SUPPORTS_WIDE_INT 1
176
177 /* Use the ABI introduced with IBM z13:
178 - pass vector arguments <= 16 bytes in VRs
179 - align *all* vector types to 8 bytes */
180 #define TARGET_VX_ABI TARGET_VX
181
182 #define TARGET_AVOID_CMP_AND_BRANCH (s390_tune == PROCESSOR_2817_Z196)
183
184 /* Run-time target specification. */
185
186 /* Defaults for option flags defined only on some subtargets. */
187 #ifndef TARGET_TPF_PROFILING
188 #define TARGET_TPF_PROFILING 0
189 #endif
190
191 /* This will be overridden by OS headers. */
192 #define TARGET_TPF 0
193
194 /* Target CPU builtins. */
195 #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile)
196
197 #ifdef DEFAULT_TARGET_64BIT
198 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \
199 | MASK_OPT_HTM | MASK_OPT_VX)
200 #else
201 #define TARGET_DEFAULT 0
202 #endif
203
204 /* Support for configure-time defaults. */
205 #define OPTION_DEFAULT_SPECS \
206 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
207 { "arch", "%{!march=*:-march=%(VALUE)}" }, \
208 { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
209
210 #ifdef __s390__
211 extern const char *s390_host_detect_local_cpu (int argc, const char **argv);
212 # define EXTRA_SPEC_FUNCTIONS \
213 { "local_cpu_detect", s390_host_detect_local_cpu },
214
215 #define MARCH_MTUNE_NATIVE_SPECS \
216 "%{mtune=native:%<mtune=native %:local_cpu_detect(tune)} " \
217 "%{march=native:%<march=native" \
218 " %:local_cpu_detect(arch %{mesa|mzarch:mesa_mzarch})}"
219 #else
220 # define MARCH_MTUNE_NATIVE_SPECS ""
221 #endif
222
223 #ifdef DEFAULT_TARGET_64BIT
224 #define S390_TARGET_BITS_STRING "64"
225 #else
226 #define S390_TARGET_BITS_STRING "31"
227 #endif
228
229 /* Defaulting rules. */
230 #define DRIVER_SELF_SPECS \
231 MARCH_MTUNE_NATIVE_SPECS, \
232 "%{!m31:%{!m64:-m" S390_TARGET_BITS_STRING "}}", \
233 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
234 "%{!march=*:-march=z900}"
235
236 /* Constants needed to control the TEST DATA CLASS (TDC) instruction. */
237 #define S390_TDC_POSITIVE_ZERO (1 << 11)
238 #define S390_TDC_NEGATIVE_ZERO (1 << 10)
239 #define S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER (1 << 9)
240 #define S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER (1 << 8)
241 #define S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER (1 << 7)
242 #define S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER (1 << 6)
243 #define S390_TDC_POSITIVE_INFINITY (1 << 5)
244 #define S390_TDC_NEGATIVE_INFINITY (1 << 4)
245 #define S390_TDC_POSITIVE_QUIET_NAN (1 << 3)
246 #define S390_TDC_NEGATIVE_QUIET_NAN (1 << 2)
247 #define S390_TDC_POSITIVE_SIGNALING_NAN (1 << 1)
248 #define S390_TDC_NEGATIVE_SIGNALING_NAN (1 << 0)
249
250 /* The following values are different for DFP. */
251 #define S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER (1 << 9)
252 #define S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER (1 << 8)
253 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER (1 << 7)
254 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER (1 << 6)
255
256 /* For signbit, the BFP-DFP-difference makes no difference. */
257 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
258 | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \
259 | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\
260 | S390_TDC_NEGATIVE_INFINITY \
261 | S390_TDC_NEGATIVE_QUIET_NAN \
262 | S390_TDC_NEGATIVE_SIGNALING_NAN )
263
264 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
265 | S390_TDC_NEGATIVE_INFINITY )
266
267 /* Target machine storage layout. */
268
269 /* Everything is big-endian. */
270 #define BITS_BIG_ENDIAN 1
271 #define BYTES_BIG_ENDIAN 1
272 #define WORDS_BIG_ENDIAN 1
273
274 #define STACK_SIZE_MODE (Pmode)
275
276 #ifndef IN_LIBGCC2
277
278 /* Width of a word, in units (bytes). */
279 #define UNITS_PER_WORD (TARGET_ZARCH ? 8 : 4)
280
281 /* Width of a pointer. To be used instead of UNITS_PER_WORD in
282 ABI-relevant contexts. This always matches
283 GET_MODE_SIZE (Pmode). */
284 #define UNITS_PER_LONG (TARGET_64BIT ? 8 : 4)
285 #define MIN_UNITS_PER_WORD 4
286 #define MAX_BITS_PER_WORD 64
287 #else
288
289 /* In libgcc, UNITS_PER_WORD has ABI-relevant effects, e.g. whether
290 the library should export TImode functions or not. Thus, we have
291 to redefine UNITS_PER_WORD depending on __s390x__ for libgcc. */
292 #ifdef __s390x__
293 #define UNITS_PER_WORD 8
294 #else
295 #define UNITS_PER_WORD 4
296 #endif
297 #endif
298
299 /* Width of a pointer, in bits. */
300 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
301
302 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
303 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
304
305 /* Boundary (in *bits*) on which stack pointer should be aligned. */
306 #define STACK_BOUNDARY 64
307
308 /* Allocation boundary (in *bits*) for the code of a function. */
309 #define FUNCTION_BOUNDARY 64
310
311 /* There is no point aligning anything to a rounder boundary than this. */
312 #define BIGGEST_ALIGNMENT 64
313
314 /* Alignment of field after `int : 0' in a structure. */
315 #define EMPTY_FIELD_BOUNDARY 32
316
317 /* Alignment on even addresses for LARL instruction. */
318 #define DATA_ABI_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
319
320 /* Alignment is not required by the hardware. */
321 #define STRICT_ALIGNMENT 0
322
323 /* Mode of stack savearea.
324 FUNCTION is VOIDmode because calling convention maintains SP.
325 BLOCK needs Pmode for SP.
326 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
327 #define STACK_SAVEAREA_MODE(LEVEL) \
328 ((LEVEL) == SAVE_FUNCTION ? VOIDmode \
329 : (LEVEL) == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
330
331
332 /* Type layout. */
333
334 /* Sizes in bits of the source language data types. */
335 #define SHORT_TYPE_SIZE 16
336 #define INT_TYPE_SIZE 32
337 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
338 #define LONG_LONG_TYPE_SIZE 64
339 #define FLOAT_TYPE_SIZE 32
340 #define DOUBLE_TYPE_SIZE 64
341 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
342
343 /* Work around target_flags dependency in ada/targtyps.c. */
344 #define WIDEST_HARDWARE_FP_SIZE 64
345
346 /* We use "unsigned char" as default. */
347 #define DEFAULT_SIGNED_CHAR 0
348
349
350 /* Register usage. */
351
352 /* We have 16 general purpose registers (registers 0-15),
353 and 16 floating point registers (registers 16-31).
354 (On non-IEEE machines, we have only 4 fp registers.)
355
356 Amongst the general purpose registers, some are used
357 for specific purposes:
358 GPR 11: Hard frame pointer (if needed)
359 GPR 12: Global offset table pointer (if needed)
360 GPR 13: Literal pool base register
361 GPR 14: Return address register
362 GPR 15: Stack pointer
363
364 Registers 32-35 are 'fake' hard registers that do not
365 correspond to actual hardware:
366 Reg 32: Argument pointer
367 Reg 33: Condition code
368 Reg 34: Frame pointer
369 Reg 35: Return address pointer
370
371 Registers 36 and 37 are mapped to access registers
372 0 and 1, used to implement thread-local storage.
373
374 Reg 38-53: Vector registers v16-v31 */
375
376 #define FIRST_PSEUDO_REGISTER 54
377
378 /* Standard register usage. */
379 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
380 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
381 #define FP_REGNO_P(N) ((N) >= 16 && (N) < 32)
382 #define CC_REGNO_P(N) ((N) == 33)
383 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
384 #define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
385 #define VECTOR_NOFP_REGNO_P(N) ((N) >= 38 && (N) <= 53)
386 #define VECTOR_REGNO_P(N) (FP_REGNO_P (N) || VECTOR_NOFP_REGNO_P (N))
387
388 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
389 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
390 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
391 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
392 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
393 #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
394 #define VECTOR_NOFP_REG_P(X) (REG_P (X) && VECTOR_NOFP_REGNO_P (REGNO (X)))
395 #define VECTOR_REG_P(X) (REG_P (X) && VECTOR_REGNO_P (REGNO (X)))
396
397 /* Set up fixed registers and calling convention:
398
399 GPRs 0-5 are always call-clobbered,
400 GPRs 6-15 are always call-saved.
401 GPR 12 is fixed if used as GOT pointer.
402 GPR 13 is always fixed (as literal pool pointer).
403 GPR 14 is always fixed on S/390 machines (as return address).
404 GPR 15 is always fixed (as stack pointer).
405 The 'fake' hard registers are call-clobbered and fixed.
406 The access registers are call-saved and fixed.
407
408 On 31-bit, FPRs 18-19 are call-clobbered;
409 on 64-bit, FPRs 24-31 are call-clobbered.
410 The remaining FPRs are call-saved.
411
412 All non-FP vector registers are call-clobbered v16-v31. */
413
414 #define FIXED_REGISTERS \
415 { 0, 0, 0, 0, \
416 0, 0, 0, 0, \
417 0, 0, 0, 0, \
418 0, 1, 1, 1, \
419 0, 0, 0, 0, \
420 0, 0, 0, 0, \
421 0, 0, 0, 0, \
422 0, 0, 0, 0, \
423 1, 1, 1, 1, \
424 1, 1, \
425 0, 0, 0, 0, \
426 0, 0, 0, 0, \
427 0, 0, 0, 0, \
428 0, 0, 0, 0 }
429
430 #define CALL_USED_REGISTERS \
431 { 1, 1, 1, 1, \
432 1, 1, 0, 0, \
433 0, 0, 0, 0, \
434 0, 1, 1, 1, \
435 1, 1, 1, 1, \
436 1, 1, 1, 1, \
437 1, 1, 1, 1, \
438 1, 1, 1, 1, \
439 1, 1, 1, 1, \
440 1, 1, \
441 1, 1, 1, 1, \
442 1, 1, 1, 1, \
443 1, 1, 1, 1, \
444 1, 1, 1, 1 }
445
446 #define CALL_REALLY_USED_REGISTERS \
447 { 1, 1, 1, 1, /* r0 - r15 */ \
448 1, 1, 0, 0, \
449 0, 0, 0, 0, \
450 0, 0, 0, 0, \
451 1, 1, 1, 1, /* f0 (16) - f15 (31) */ \
452 1, 1, 1, 1, \
453 1, 1, 1, 1, \
454 1, 1, 1, 1, \
455 1, 1, 1, 1, /* arg, cc, fp, ret addr */ \
456 0, 0, /* a0 (36), a1 (37) */ \
457 1, 1, 1, 1, /* v16 (38) - v23 (45) */ \
458 1, 1, 1, 1, \
459 1, 1, 1, 1, /* v24 (46) - v31 (53) */ \
460 1, 1, 1, 1 }
461
462 /* Preferred register allocation order. */
463 #define REG_ALLOC_ORDER \
464 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
465 16, 17, 18, 19, 20, 21, 22, 23, \
466 24, 25, 26, 27, 28, 29, 30, 31, \
467 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, \
468 15, 32, 33, 34, 35, 36, 37 }
469
470
471 #define HARD_REGNO_RENAME_OK(FROM, TO) \
472 s390_hard_regno_rename_ok ((FROM), (TO))
473
474 /* Maximum number of registers to represent a value of mode MODE
475 in a register of class CLASS. */
476 #define CLASS_MAX_NREGS(CLASS, MODE) \
477 s390_class_max_nregs ((CLASS), (MODE))
478
479 /* We can reverse a CC mode safely if we know whether it comes from a
480 floating point compare or not. With the vector modes it is encoded
481 as part of the mode.
482 FIXME: It might make sense to do this for other cc modes as well. */
483 #define REVERSIBLE_CC_MODE(MODE) \
484 ((MODE) == CCVIALLmode || (MODE) == CCVIANYmode \
485 || (MODE) == CCVFALLmode || (MODE) == CCVFANYmode)
486
487 /* Given a condition code and a mode, return the inverse condition. */
488 #define REVERSE_CONDITION(CODE, MODE) s390_reverse_condition (MODE, CODE)
489
490
491 /* Register classes. */
492
493 /* We use the following register classes:
494 GENERAL_REGS All general purpose registers
495 ADDR_REGS All general purpose registers except %r0
496 (These registers can be used in address generation)
497 FP_REGS All floating point registers
498 CC_REGS The condition code register
499 ACCESS_REGS The access registers
500
501 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
502 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
503 GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
504 ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
505
506 NO_REGS No registers
507 ALL_REGS All registers
508
509 Note that the 'fake' frame pointer and argument pointer registers
510 are included amongst the address registers here. */
511
512 enum reg_class
513 {
514 NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
515 ADDR_CC_REGS, GENERAL_CC_REGS,
516 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
517 VEC_REGS, ADDR_VEC_REGS, GENERAL_VEC_REGS,
518 ALL_REGS, LIM_REG_CLASSES
519 };
520 #define N_REG_CLASSES (int) LIM_REG_CLASSES
521
522 #define REG_CLASS_NAMES \
523 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
524 "ADDR_CC_REGS", "GENERAL_CC_REGS", \
525 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", \
526 "VEC_REGS", "ADDR_VEC_REGS", "GENERAL_VEC_REGS", \
527 "ALL_REGS" }
528
529 /* Class -> register mapping. */
530 #define REG_CLASS_CONTENTS \
531 { \
532 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
533 { 0x00000000, 0x00000002 }, /* CC_REGS */ \
534 { 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
535 { 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
536 { 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
537 { 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
538 { 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
539 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
540 { 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
541 { 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
542 { 0xffff0000, 0x003fffc0 }, /* VEC_REGS */ \
543 { 0xfffffffe, 0x003fffcd }, /* ADDR_VEC_REGS */ \
544 { 0xffffffff, 0x003fffcd }, /* GENERAL_VEC_REGS */ \
545 { 0xffffffff, 0x003fffff }, /* ALL_REGS */ \
546 }
547
548 /* In some case register allocation order is not enough for IRA to
549 generate a good code. The following macro (if defined) increases
550 cost of REGNO for a pseudo approximately by pseudo usage frequency
551 multiplied by the macro value.
552
553 We avoid usage of BASE_REGNUM by nonzero macro value because the
554 reload can decide not to use the hard register because some
555 constant was forced to be in memory. */
556 #define IRA_HARD_REGNO_ADD_COST_MULTIPLIER(regno) \
557 ((regno) != BASE_REGNUM ? 0.0 : 0.5)
558
559 /* Register -> class mapping. */
560 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
561 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
562
563 /* ADDR_REGS can be used as base or index register. */
564 #define INDEX_REG_CLASS ADDR_REGS
565 #define BASE_REG_CLASS ADDR_REGS
566
567 /* Check whether REGNO is a hard register of the suitable class
568 or a pseudo register currently allocated to one such. */
569 #define REGNO_OK_FOR_INDEX_P(REGNO) \
570 (((REGNO) < FIRST_PSEUDO_REGISTER \
571 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
572 || ADDR_REGNO_P (reg_renumber[REGNO]))
573 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
574
575
576 /* Stack layout and calling conventions. */
577
578 /* Our stack grows from higher to lower addresses. However, local variables
579 are accessed by positive offsets, and function arguments are stored at
580 increasing addresses. */
581 #define STACK_GROWS_DOWNWARD 1
582 #define FRAME_GROWS_DOWNWARD 1
583 /* #undef ARGS_GROW_DOWNWARD */
584
585 /* The basic stack layout looks like this: the stack pointer points
586 to the register save area for called functions. Above that area
587 is the location to place outgoing arguments. Above those follow
588 dynamic allocations (alloca), and finally the local variables. */
589
590 /* Offset from stack-pointer to first location of outgoing args. */
591 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
592
593 /* Offset from the stack pointer register to an item dynamically
594 allocated on the stack, e.g., by `alloca'. */
595 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
596 (STACK_POINTER_OFFSET + crtl->outgoing_args_size)
597
598 /* Offset of first parameter from the argument pointer register value.
599 We have a fake argument pointer register that points directly to
600 the argument area. */
601 #define FIRST_PARM_OFFSET(FNDECL) 0
602
603 /* Defining this macro makes __builtin_frame_address(0) and
604 __builtin_return_address(0) work with -fomit-frame-pointer. */
605 #define INITIAL_FRAME_ADDRESS_RTX \
606 (plus_constant (Pmode, arg_pointer_rtx, -STACK_POINTER_OFFSET))
607
608 /* The return address of the current frame is retrieved
609 from the initial value of register RETURN_REGNUM.
610 For frames farther back, we use the stack slot where
611 the corresponding RETURN_REGNUM register was saved. */
612 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
613 (TARGET_PACKED_STACK ? \
614 plus_constant (Pmode, (FRAME), \
615 STACK_POINTER_OFFSET - UNITS_PER_LONG) : (FRAME))
616
617 /* For -mpacked-stack this adds 160 - 8 (96 - 4) to the output of
618 builtin_frame_address. Otherwise arg pointer -
619 STACK_POINTER_OFFSET would be returned for
620 __builtin_frame_address(0) what might result in an address pointing
621 somewhere into the middle of the local variables since the packed
622 stack layout generally does not need all the bytes in the register
623 save area. */
624 #define FRAME_ADDR_RTX(FRAME) \
625 DYNAMIC_CHAIN_ADDRESS ((FRAME))
626
627 #define RETURN_ADDR_RTX(COUNT, FRAME) \
628 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
629
630 /* In 31-bit mode, we need to mask off the high bit of return addresses. */
631 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
632
633
634 /* Exception handling. */
635
636 /* Describe calling conventions for DWARF-2 exception handling. */
637 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
638 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
639 #define DWARF_FRAME_RETURN_COLUMN 14
640
641 /* Describe how we implement __builtin_eh_return. */
642 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
643 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
644
645 /* Select a format to encode pointers in exception handling data. */
646 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
647 (flag_pic \
648 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
649 : DW_EH_PE_absptr)
650
651 /* Register save slot alignment. */
652 #define DWARF_CIE_DATA_ALIGNMENT (-UNITS_PER_LONG)
653
654 /* Let the assembler generate debug line info. */
655 #define DWARF2_ASM_LINE_DEBUG_INFO 1
656
657 /* Define the dwarf register mapping.
658 v16-v31 -> 68-83
659 rX -> X otherwise */
660 #define DBX_REGISTER_NUMBER(regno) \
661 (((regno) >= 38 && (regno) <= 53) ? (regno) + 30 : (regno))
662
663 /* Frame registers. */
664
665 #define STACK_POINTER_REGNUM 15
666 #define FRAME_POINTER_REGNUM 34
667 #define HARD_FRAME_POINTER_REGNUM 11
668 #define ARG_POINTER_REGNUM 32
669 #define RETURN_ADDRESS_POINTER_REGNUM 35
670
671 /* The static chain must be call-clobbered, but not used for
672 function argument passing. As register 1 is clobbered by
673 the trampoline code, we only have one option. */
674 #define STATIC_CHAIN_REGNUM 0
675
676 /* Number of hardware registers that go into the DWARF-2 unwind info.
677 To avoid ABI incompatibility, this number must not change even as
678 'fake' hard registers are added or removed. */
679 #define DWARF_FRAME_REGISTERS 34
680
681
682 /* Frame pointer and argument pointer elimination. */
683
684 #define ELIMINABLE_REGS \
685 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
686 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
687 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
688 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
689 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
690 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
691 { BASE_REGNUM, BASE_REGNUM }}
692
693 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
694 (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
695
696
697 /* Stack arguments. */
698
699 /* We need current_function_outgoing_args to be valid. */
700 #define ACCUMULATE_OUTGOING_ARGS 1
701
702
703 /* Register arguments. */
704
705 typedef struct s390_arg_structure
706 {
707 int gprs; /* gpr so far */
708 int fprs; /* fpr so far */
709 int vrs; /* vr so far */
710 }
711 CUMULATIVE_ARGS;
712
713 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
714 ((CUM).gprs=0, (CUM).fprs=0, (CUM).vrs=0)
715
716 #define FIRST_VEC_ARG_REGNO 46
717 #define LAST_VEC_ARG_REGNO 53
718
719 /* Arguments can be placed in general registers 2 to 6, or in floating
720 point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64
721 bit. */
722 #define FUNCTION_ARG_REGNO_P(N) \
723 (((N) >=2 && (N) < 7) || (N) == 16 || (N) == 17 \
724 || (TARGET_64BIT && ((N) == 18 || (N) == 19)) \
725 || (TARGET_VX && ((N) >= FIRST_VEC_ARG_REGNO && (N) <= LAST_VEC_ARG_REGNO)))
726
727
728 /* Only gpr 2, fpr 0, and v24 are ever used as return registers. */
729 #define FUNCTION_VALUE_REGNO_P(N) \
730 ((N) == 2 || (N) == 16 \
731 || (TARGET_VX && (N) == FIRST_VEC_ARG_REGNO))
732
733
734 /* Function entry and exit. */
735
736 /* When returning from a function, the stack pointer does not matter. */
737 #define EXIT_IGNORE_STACK 1
738
739
740 /* Profiling. */
741
742 #define FUNCTION_PROFILER(FILE, LABELNO) \
743 s390_function_profiler ((FILE), ((LABELNO)))
744
745 #define PROFILE_BEFORE_PROLOGUE 1
746
747
748 /* Trampolines for nested functions. */
749
750 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
751 #define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
752
753 /* Addressing modes, and classification of registers for them. */
754
755 /* Recognize any constant value that is a valid address. */
756 #define CONSTANT_ADDRESS_P(X) 0
757
758 /* Maximum number of registers that can appear in a valid memory address. */
759 #define MAX_REGS_PER_ADDRESS 2
760
761 /* This definition replaces the formerly used 'm' constraint with a
762 different constraint letter in order to avoid changing semantics of
763 the 'm' constraint when accepting new address formats in
764 TARGET_LEGITIMATE_ADDRESS_P. The constraint letter defined here
765 must not be used in insn definitions or inline assemblies. */
766 #define TARGET_MEM_CONSTRAINT 'e'
767
768 /* Try a machine-dependent way of reloading an illegitimate address
769 operand. If we find one, push the reload and jump to WIN. This
770 macro is used in only one place: `find_reloads_address' in reload.c. */
771 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
772 do { \
773 rtx new_rtx = legitimize_reload_address ((AD), (MODE), \
774 (OPNUM), (int)(TYPE)); \
775 if (new_rtx) \
776 { \
777 (AD) = new_rtx; \
778 goto WIN; \
779 } \
780 } while (0)
781
782 /* Helper macro for s390.c and s390.md to check for symbolic constants. */
783 #define SYMBOLIC_CONST(X) \
784 (GET_CODE (X) == SYMBOL_REF \
785 || GET_CODE (X) == LABEL_REF \
786 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
787
788 #define TLS_SYMBOLIC_CONST(X) \
789 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
790 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
791
792
793 /* Condition codes. */
794
795 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
796 return the mode to be used for the comparison. */
797 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
798
799 /* Relative costs of operations. */
800
801 /* A C expression for the cost of a branch instruction. A value of 1
802 is the default; other values are interpreted relative to that. */
803 #define BRANCH_COST(speed_p, predictable_p) s390_branch_cost
804
805 /* Nonzero if access to memory by bytes is slow and undesirable. */
806 #define SLOW_BYTE_ACCESS 1
807
808 /* An integer expression for the size in bits of the largest integer machine
809 mode that should actually be used. We allow pairs of registers. */
810 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
811
812 /* The maximum number of bytes that a single instruction can move quickly
813 between memory and registers or between two memory locations. */
814 #define MOVE_MAX (TARGET_ZARCH ? 16 : 8)
815 #define MOVE_MAX_PIECES (TARGET_ZARCH ? 8 : 4)
816 #define MAX_MOVE_MAX 16
817
818 /* Don't perform CSE on function addresses. */
819 #define NO_FUNCTION_CSE 1
820
821 /* This value is used in tree-sra to decide whether it might benefical
822 to split a struct move into several word-size moves. For S/390
823 only small values make sense here since struct moves are relatively
824 cheap thanks to mvc so the small default value chosen for archs
825 with memmove patterns should be ok. But this value is multiplied
826 in tree-sra with UNITS_PER_WORD to make a decision so we adjust it
827 here to compensate for that factor since mvc costs exactly the same
828 on 31 and 64 bit. */
829 #define MOVE_RATIO(speed) (TARGET_64BIT? 2 : 4)
830
831
832 /* Sections. */
833
834 /* Output before read-only data. */
835 #define TEXT_SECTION_ASM_OP ".text"
836
837 /* Output before writable (initialized) data. */
838 #define DATA_SECTION_ASM_OP ".data"
839
840 /* Output before writable (uninitialized) data. */
841 #define BSS_SECTION_ASM_OP ".bss"
842
843 /* S/390 constant pool breaks the devices in crtstuff.c to control section
844 in where code resides. We have to write it as asm code. */
845 #ifndef __s390x__
846 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
847 asm (SECTION_OP "\n\
848 bras\t%r2,1f\n\
849 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
850 1: l\t%r3,0(%r2)\n\
851 bas\t%r14,0(%r3,%r2)\n\
852 .previous");
853 #endif
854
855
856 /* Position independent code. */
857
858 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
859
860 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
861
862 #ifndef TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE
863 #define TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE 1
864 #endif
865
866
867 /* Assembler file format. */
868
869 /* Character to start a comment. */
870 #define ASM_COMMENT_START "#"
871
872 /* Declare an uninitialized external linkage data object. */
873 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
874 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
875
876 /* Globalizing directive for a label. */
877 #define GLOBAL_ASM_OP ".globl "
878
879 /* Advance the location counter to a multiple of 2**LOG bytes. */
880 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
881 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
882
883 /* Advance the location counter by SIZE bytes. */
884 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
885 fprintf ((FILE), "\t.set\t.,.+" HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
886
887 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
888 #define LOCAL_LABEL_PREFIX "."
889
890 #define LABEL_ALIGN(LABEL) \
891 s390_label_align ((LABEL))
892
893 /* How to refer to registers in assembler output. This sequence is
894 indexed by compiler's hard-register-number (see above). */
895 #define REGISTER_NAMES \
896 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
897 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
898 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
899 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
900 "%ap", "%cc", "%fp", "%rp", "%a0", "%a1", \
901 "%v16", "%v18", "%v20", "%v22", "%v17", "%v19", "%v21", "%v23", \
902 "%v24", "%v26", "%v28", "%v30", "%v25", "%v27", "%v29", "%v31" \
903 }
904
905 #define ADDITIONAL_REGISTER_NAMES \
906 { { "v0", 16 }, { "v2", 17 }, { "v4", 18 }, { "v6", 19 }, \
907 { "v1", 20 }, { "v3", 21 }, { "v5", 22 }, { "v7", 23 }, \
908 { "v8", 24 }, { "v10", 25 }, { "v12", 26 }, { "v14", 27 }, \
909 { "v9", 28 }, { "v11", 29 }, { "v13", 30 }, { "v15", 31 } };
910
911 /* Print operand X (an rtx) in assembler syntax to file FILE. */
912 #define PRINT_OPERAND(FILE, X, CODE) print_operand ((FILE), (X), (CODE))
913 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address ((FILE), (ADDR))
914
915 /* Output an element of a case-vector that is absolute. */
916 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
917 do { \
918 char buf[32]; \
919 fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \
920 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
921 assemble_name ((FILE), buf); \
922 fputc ('\n', (FILE)); \
923 } while (0)
924
925 /* Output an element of a case-vector that is relative. */
926 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
927 do { \
928 char buf[32]; \
929 fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \
930 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
931 assemble_name ((FILE), buf); \
932 fputc ('-', (FILE)); \
933 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
934 assemble_name ((FILE), buf); \
935 fputc ('\n', (FILE)); \
936 } while (0)
937
938 /* Mark the return register as used by the epilogue so that we can
939 use it in unadorned (return) and (simple_return) instructions. */
940 #define EPILOGUE_USES(REGNO) ((REGNO) == RETURN_REGNUM)
941
942 #undef ASM_OUTPUT_FUNCTION_LABEL
943 #define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \
944 s390_asm_output_function_label ((FILE), (NAME), (DECL))
945
946 #if S390_USE_TARGET_ATTRIBUTE
947 /* Hook to output .machine and .machinemode at start of function. */
948 #undef ASM_OUTPUT_FUNCTION_PREFIX
949 #define ASM_OUTPUT_FUNCTION_PREFIX s390_asm_output_function_prefix
950
951 /* Hook to output .machine and .machinemode at end of function. */
952 #undef ASM_DECLARE_FUNCTION_SIZE
953 #define ASM_DECLARE_FUNCTION_SIZE s390_asm_declare_function_size
954 #endif
955
956 /* Miscellaneous parameters. */
957
958 /* Specify the machine mode that this machine uses for the index in the
959 tablejump instruction. */
960 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
961
962 /* Specify the machine mode that pointers have.
963 After generation of rtl, the compiler makes no further distinction
964 between pointers and any other objects of this machine mode. */
965 #define Pmode (TARGET_64BIT ? DImode : SImode)
966
967 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
968 #define POINTERS_EXTEND_UNSIGNED -1
969
970 /* A function address in a call instruction is a byte address (for
971 indexing purposes) so give the MEM rtx a byte's mode. */
972 #define FUNCTION_MODE QImode
973
974 /* Specify the value which is used when clz operand is zero. */
975 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
976
977 /* Machine-specific symbol_ref flags. */
978 #define SYMBOL_FLAG_ALIGN_SHIFT SYMBOL_FLAG_MACH_DEP_SHIFT
979 #define SYMBOL_FLAG_ALIGN_MASK \
980 ((SYMBOL_FLAG_MACH_DEP << 0) | (SYMBOL_FLAG_MACH_DEP << 1))
981
982 #define SYMBOL_FLAG_SET_ALIGN(X, A) \
983 (SYMBOL_REF_FLAGS (X) = (SYMBOL_REF_FLAGS (X) & ~SYMBOL_FLAG_ALIGN_MASK) \
984 | (A << SYMBOL_FLAG_ALIGN_SHIFT))
985
986 #define SYMBOL_FLAG_GET_ALIGN(X) \
987 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN_MASK) >> SYMBOL_FLAG_ALIGN_SHIFT)
988
989 /* Helpers to access symbol_ref flags. They are used in
990 check_symref_alignment() and larl_operand to detect if the
991 available alignment matches the required one. We do not use
992 a positive check like _ALIGN2 because in that case we would have
993 to annotate every symbol_ref. However, we only want to touch
994 the symbol_refs that can be misaligned and assume that the others
995 are correctly aligned. Hence, if a symbol_ref does not have
996 a _NOTALIGN flag it is supposed to be correctly aligned. */
997 #define SYMBOL_FLAG_SET_NOTALIGN2(X) SYMBOL_FLAG_SET_ALIGN((X), 1)
998 #define SYMBOL_FLAG_SET_NOTALIGN4(X) SYMBOL_FLAG_SET_ALIGN((X), 2)
999 #define SYMBOL_FLAG_SET_NOTALIGN8(X) SYMBOL_FLAG_SET_ALIGN((X), 3)
1000
1001 #define SYMBOL_FLAG_NOTALIGN2_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 1)
1002 #define SYMBOL_FLAG_NOTALIGN4_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 2 \
1003 || SYMBOL_FLAG_GET_ALIGN(X) == 1)
1004 #define SYMBOL_FLAG_NOTALIGN8_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 3 \
1005 || SYMBOL_FLAG_GET_ALIGN(X) == 2 \
1006 || SYMBOL_FLAG_GET_ALIGN(X) == 1)
1007
1008 /* Check whether integer displacement is in range for a short displacement. */
1009 #define SHORT_DISP_IN_RANGE(d) ((d) >= 0 && (d) <= 4095)
1010
1011 /* Check whether integer displacement is in range. */
1012 #define DISP_IN_RANGE(d) \
1013 (TARGET_LONG_DISPLACEMENT \
1014 ? ((d) >= -524288 && (d) <= 524287) \
1015 : SHORT_DISP_IN_RANGE(d))
1016
1017 /* Reads can reuse write prefetches, used by tree-ssa-prefetch-loops.c. */
1018 #define READ_CAN_USE_WRITE_PREFETCH 1
1019
1020 extern const int processor_flags_table[];
1021
1022 /* The truth element value for vector comparisons. Our instructions
1023 always generate -1 in that case. */
1024 #define VECTOR_STORE_FLAG_VALUE(MODE) CONSTM1_RTX (GET_MODE_INNER (MODE))
1025
1026 /* Target pragma. */
1027
1028 /* resolve_overloaded_builtin can not be defined the normal way since
1029 it is defined in code which technically belongs to the
1030 front-end. */
1031 #define REGISTER_TARGET_PRAGMAS() \
1032 do { \
1033 s390_register_target_pragmas (); \
1034 } while (0)
1035
1036 #ifndef USED_FOR_TARGET
1037 /* The following structure is embedded in the machine
1038 specific part of struct function. */
1039
1040 struct GTY (()) s390_frame_layout
1041 {
1042 /* Offset within stack frame. */
1043 HOST_WIDE_INT gprs_offset;
1044 HOST_WIDE_INT f0_offset;
1045 HOST_WIDE_INT f4_offset;
1046 HOST_WIDE_INT f8_offset;
1047 HOST_WIDE_INT backchain_offset;
1048
1049 /* Number of first and last gpr where slots in the register
1050 save area are reserved for. */
1051 int first_save_gpr_slot;
1052 int last_save_gpr_slot;
1053
1054 /* Location (FP register number) where GPRs (r0-r15) should
1055 be saved to.
1056 0 - does not need to be saved at all
1057 -1 - stack slot */
1058 #define SAVE_SLOT_NONE 0
1059 #define SAVE_SLOT_STACK -1
1060 signed char gpr_save_slots[16];
1061
1062 /* Number of first and last gpr to be saved, restored. */
1063 int first_save_gpr;
1064 int first_restore_gpr;
1065 int last_save_gpr;
1066 int last_restore_gpr;
1067
1068 /* Bits standing for floating point registers. Set, if the
1069 respective register has to be saved. Starting with reg 16 (f0)
1070 at the rightmost bit.
1071 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1072 fpr 15 13 11 9 14 12 10 8 7 5 3 1 6 4 2 0
1073 reg 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 */
1074 unsigned int fpr_bitmap;
1075
1076 /* Number of floating point registers f8-f15 which must be saved. */
1077 int high_fprs;
1078
1079 /* Set if return address needs to be saved.
1080 This flag is set by s390_return_addr_rtx if it could not use
1081 the initial value of r14 and therefore depends on r14 saved
1082 to the stack. */
1083 bool save_return_addr_p;
1084
1085 /* Size of stack frame. */
1086 HOST_WIDE_INT frame_size;
1087 };
1088
1089
1090 /* Define the structure for the machine field in struct function. */
1091
1092 struct GTY(()) machine_function
1093 {
1094 struct s390_frame_layout frame_layout;
1095
1096 /* Literal pool base register. */
1097 rtx base_reg;
1098
1099 /* True if we may need to perform branch splitting. */
1100 bool split_branches_pending_p;
1101
1102 bool has_landing_pad_p;
1103
1104 /* True if the current function may contain a tbegin clobbering
1105 FPRs. */
1106 bool tbegin_p;
1107
1108 /* For -fsplit-stack support: A stack local which holds a pointer to
1109 the stack arguments for a function with a variable number of
1110 arguments. This is set at the start of the function and is used
1111 to initialize the overflow_arg_area field of the va_list
1112 structure. */
1113 rtx split_stack_varargs_pointer;
1114
1115 enum indirect_branch indirect_branch_jump;
1116 enum indirect_branch indirect_branch_call;
1117
1118 enum indirect_branch function_return_mem;
1119 enum indirect_branch function_return_reg;
1120 };
1121 #endif
1122
1123 #define TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION \
1124 (cfun->machine->function_return_reg != indirect_branch_keep \
1125 || cfun->machine->function_return_mem != indirect_branch_keep)
1126
1127 #define TARGET_INDIRECT_BRANCH_NOBP_RET \
1128 ((cfun->machine->function_return_reg != indirect_branch_keep \
1129 && !s390_return_addr_from_memory ()) \
1130 || (cfun->machine->function_return_mem != indirect_branch_keep \
1131 && s390_return_addr_from_memory ()))
1132
1133 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP \
1134 (cfun->machine->indirect_branch_jump != indirect_branch_keep)
1135
1136 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK \
1137 (cfun->machine->indirect_branch_jump == indirect_branch_thunk \
1138 || cfun->machine->indirect_branch_jump == indirect_branch_thunk_extern)
1139
1140 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK \
1141 (cfun->machine->indirect_branch_jump == indirect_branch_thunk_inline)
1142
1143 #define TARGET_INDIRECT_BRANCH_NOBP_CALL \
1144 (cfun->machine->indirect_branch_call != indirect_branch_keep)
1145
1146 #ifndef TARGET_DEFAULT_INDIRECT_BRANCH_TABLE
1147 #define TARGET_DEFAULT_INDIRECT_BRANCH_TABLE 0
1148 #endif
1149
1150 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EXRL "__s390_indirect_jump_r%d"
1151 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EX "__s390_indirect_jump_r%duse_r%d"
1152
1153 #define TARGET_INDIRECT_BRANCH_TABLE s390_indirect_branch_table
1154
1155
1156 #endif /* S390_H */
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