1 /* Subroutines used for code generation on Xilinx MicroBlaze.
2 Copyright (C) 2009-2018 Free Software Foundation, Inc.
4 Contributed by Michael Eager <eager@eagercon.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #define IN_TARGET_CODE 1
26 #include "coretypes.h"
31 #include "stringpool.h"
41 #include "diagnostic-core.h"
43 #include "stor-layout.h"
52 #include "insn-addr.h"
55 /* This file should be included last. */
56 #include "target-def.h"
58 #define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
60 /* Classifies an address.
67 A natural register or a register + const_int offset address.
68 The register satisfies microblaze_valid_base_register_p and the
69 offset is a const_arith_operand.
73 A natural register offset by the index contained in an index register. The base
74 register satisfies microblaze_valid_base_register_p and the index register
75 satisfies microblaze_valid_index_register_p
79 A signed 16/32-bit constant address.
83 A constant symbolic address or a (register + symbol). */
85 enum microblaze_address_type
95 ADDRESS_SYMBOLIC_TXT_REL
103 enum microblaze_symbol_type
109 /* TLS Address Type. */
118 /* Classification of a MicroBlaze address. */
119 struct microblaze_address_info
121 enum microblaze_address_type type
;
122 rtx regA
; /* Contains valid values on ADDRESS_REG, ADDRESS_REG_INDEX,
124 rtx regB
; /* Contains valid values on ADDRESS_REG_INDEX. */
125 rtx offset
; /* Contains valid values on ADDRESS_CONST_INT and ADDRESS_REG. */
126 rtx symbol
; /* Contains valid values on ADDRESS_SYMBOLIC. */
127 enum microblaze_symbol_type symbol_type
;
128 enum tls_reloc tls_type
;
131 /* Structure to be filled in by compute_frame_size with register
132 save masks, and offsets for the current function. */
134 struct GTY(()) microblaze_frame_info
{
135 long total_size
; /* # bytes that the entire frame takes up. */
136 long var_size
; /* # bytes that variables take up. */
137 long args_size
; /* # bytes that outgoing arguments take up. */
138 int link_debug_size
; /* # bytes for the link reg and back pointer. */
139 int gp_reg_size
; /* # bytes needed to store gp regs. */
140 long gp_offset
; /* offset from new sp to store gp registers. */
141 long mask
; /* mask of saved gp registers. */
142 int initialized
; /* != 0 if frame size already calculated. */
143 int num_gp
; /* number of gp registers saved. */
144 long insns_len
; /* length of insns. */
145 int alloc_stack
; /* Flag to indicate if the current function
146 must not create stack space. (As an optimization). */
149 /* Global variables for machine-dependent things. */
151 /* Toggle which pipleline interface to use. */
152 static GTY(()) int microblaze_sched_use_dfa
= 0;
154 /* Threshold for data being put into the small data/bss area, instead
155 of the normal data area (references to the small data/bss area take
156 1 instruction, and use the global pointer, references to the normal
157 data area takes 2 instructions). */
158 int microblaze_section_threshold
= -1;
160 /* Prevent scheduling potentially exception causing instructions in
161 delay slots. -mcpu=v3.00.a or v4.00.a turns this on. */
162 int microblaze_no_unsafe_delay
;
164 /* Set to one if the targeted core has the CLZ insn. */
165 int microblaze_has_clz
= 0;
167 /* Which CPU pipeline do we use. We haven't really standardized on a CPU
168 version having only a particular type of pipeline. There can still be
169 options on the CPU to scale pipeline features up or down. :(
170 Bad Presentation (??), so we let the MD file rely on the value of
171 this variable instead Making PIPE_5 the default. It should be backward
172 optimal with PIPE_3 MicroBlazes. */
173 enum pipeline_type microblaze_pipe
= MICROBLAZE_PIPE_5
;
175 /* High and low marks for floating point values which we will accept
176 as legitimate constants for TARGET_LEGITIMATE_CONSTANT_P. These are
177 initialized in override_options. */
178 REAL_VALUE_TYPE dfhigh
, dflow
, sfhigh
, sflow
;
180 /* Array giving truth value on whether or not a given hard register
181 can support a given mode. */
182 static char microblaze_hard_regno_mode_ok_p
[(int)MAX_MACHINE_MODE
]
183 [FIRST_PSEUDO_REGISTER
];
185 /* Current frame information calculated by compute_frame_size. */
186 struct microblaze_frame_info current_frame_info
;
188 /* Zero structure to initialize current_frame_info. */
189 struct microblaze_frame_info zero_frame_info
;
191 /* List of all MICROBLAZE punctuation characters used by print_operand. */
192 char microblaze_print_operand_punct
[256];
194 /* Map GCC register number to debugger register number. */
195 int microblaze_dbx_regno
[FIRST_PSEUDO_REGISTER
];
197 /* Map hard register number to register class. */
198 enum reg_class microblaze_regno_to_class
[] =
200 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
201 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
202 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
203 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
204 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
205 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
206 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
207 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
208 ST_REGS
, GR_REGS
, GR_REGS
, GR_REGS
211 /* MicroBlaze specific machine attributes.
212 interrupt_handler - Interrupt handler attribute to add interrupt prologue
213 and epilogue and use appropriate interrupt return.
214 save_volatiles - Similar to interrupt handler, but use normal return. */
215 int interrupt_handler
;
220 const struct attribute_spec microblaze_attribute_table
[] = {
221 /* name min_len, max_len, decl_req, type_req, fn_type_req,
222 affects_type_identity, handler, exclude */
223 {"interrupt_handler", 0, 0, true, false, false, false, NULL
, NULL
},
224 {"break_handler", 0, 0, true, false, false, false, NULL
, NULL
},
225 {"fast_interrupt", 0, 0, true, false, false, false, NULL
, NULL
},
226 {"save_volatiles", 0, 0, true, false, false, false, NULL
, NULL
},
227 { NULL
, 0, 0, false, false, false, false, NULL
, NULL
}
230 static int microblaze_interrupt_function_p (tree
);
232 static void microblaze_elf_asm_constructor (rtx
, int) ATTRIBUTE_UNUSED
;
233 static void microblaze_elf_asm_destructor (rtx
, int) ATTRIBUTE_UNUSED
;
235 section
*sdata2_section
;
238 #undef TARGET_HAVE_TLS
239 #define TARGET_HAVE_TLS true
242 /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */
244 microblaze_const_double_ok (rtx op
, machine_mode mode
)
248 if (GET_CODE (op
) != CONST_DOUBLE
)
251 if (GET_MODE (op
) == VOIDmode
)
254 if (mode
!= SFmode
&& mode
!= DFmode
)
257 if (op
== CONST0_RTX (mode
))
260 d
= *CONST_DOUBLE_REAL_VALUE (op
);
262 if (REAL_VALUE_ISNAN (d
))
265 if (REAL_VALUE_NEGATIVE (d
))
266 d
= real_value_negate (&d
);
270 if (real_less (&d
, &dfhigh
) && real_less (&dflow
, &d
))
275 if (real_less (&d
, &sfhigh
) && real_less (&sflow
, &d
))
282 /* Return truth value if a memory operand fits in a single instruction
283 (ie, register + small offset) or (register + register). */
286 simple_memory_operand (rtx op
, machine_mode mode ATTRIBUTE_UNUSED
)
288 rtx addr
, plus0
, plus1
;
290 /* Eliminate non-memory operations. */
291 if (GET_CODE (op
) != MEM
)
294 /* dword operations really put out 2 instructions, so eliminate them. */
295 /* ??? This isn't strictly correct. It is OK to accept multiword modes
296 here, since the length attributes are being set correctly, but only
297 if the address is offsettable. */
298 if (GET_MODE_SIZE (GET_MODE (op
)) > UNITS_PER_WORD
)
302 /* Decode the address now. */
304 switch (GET_CODE (addr
))
311 plus0
= XEXP (addr
, 0);
312 plus1
= XEXP (addr
, 1);
314 if (GET_CODE (plus0
) != REG
)
317 if (GET_CODE (plus0
) == REG
&& GET_CODE (plus1
) == CONST_INT
318 && SMALL_INT (plus1
))
322 else if (GET_CODE (plus1
) == REG
&& GET_CODE (plus0
) == CONST_INT
)
326 else if (GET_CODE (plus0
) == REG
&& GET_CODE (plus1
) == REG
)
343 /* Return nonzero for a memory address that can be used to load or store
347 double_memory_operand (rtx op
, machine_mode mode
)
351 if (GET_CODE (op
) != MEM
|| !memory_operand (op
, mode
))
353 /* During reload, we accept a pseudo register if it has an
354 appropriate memory address. If we don't do this, we will
355 wind up reloading into a register, and then reloading that
356 register from memory, when we could just reload directly from
358 if (reload_in_progress
359 && GET_CODE (op
) == REG
360 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
361 && reg_renumber
[REGNO (op
)] < 0
362 && reg_equiv_mem (REGNO (op
)) != 0
363 && double_memory_operand (reg_equiv_mem (REGNO (op
)), mode
))
368 /* Make sure that 4 added to the address is a valid memory address.
369 This essentially just checks for overflow in an added constant. */
373 if (CONSTANT_ADDRESS_P (addr
))
376 return memory_address_p ((GET_MODE_CLASS (mode
) == MODE_INT
377 ? E_SImode
: E_SFmode
),
378 plus_constant (Pmode
, addr
, 4));
381 /* Implement REG_OK_FOR_BASE_P -and- REG_OK_FOR_INDEX_P. */
383 microblaze_regno_ok_for_base_p (int regno
, int strict
)
385 if (regno
>= FIRST_PSEUDO_REGISTER
)
389 regno
= reg_renumber
[regno
];
392 /* These fake registers will be eliminated to either the stack or
393 hard frame pointer, both of which are usually valid base registers.
394 Reload deals with the cases where the eliminated form isn't valid. */
395 if (regno
== ARG_POINTER_REGNUM
|| regno
== FRAME_POINTER_REGNUM
)
398 return GP_REG_P (regno
);
401 /* Return true if X is a valid base register for the given mode.
402 Allow only hard registers if STRICT. */
405 microblaze_valid_base_register_p (rtx x
,
406 machine_mode mode ATTRIBUTE_UNUSED
,
409 if (!strict
&& GET_CODE (x
) == SUBREG
)
412 return (GET_CODE (x
) == REG
413 && microblaze_regno_ok_for_base_p (REGNO (x
), strict
));
416 /* Build the SYMBOL_REF for __tls_get_addr. */
418 static GTY(()) rtx tls_get_addr_libfunc
;
421 get_tls_get_addr (void)
423 if (!tls_get_addr_libfunc
)
424 tls_get_addr_libfunc
= init_one_libfunc ("__tls_get_addr");
425 return tls_get_addr_libfunc
;
428 /* Return TRUE if X is a thread-local symbol. */
430 microblaze_tls_symbol_p (rtx x
)
432 if (!TARGET_HAVE_TLS
)
435 if (GET_CODE (x
) != SYMBOL_REF
)
438 return SYMBOL_REF_TLS_MODEL (x
) != 0;
441 /* Return TRUE if X contains any TLS symbol references. */
444 microblaze_tls_referenced_p (rtx x
)
446 if (!TARGET_HAVE_TLS
)
448 subrtx_iterator::array_type array
;
449 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
452 if (GET_CODE (x
) == SYMBOL_REF
&& SYMBOL_REF_TLS_MODEL (x
) != 0)
454 /* Don't recurse into UNSPEC_TLS looking for TLS symbols; these are
455 TLS offsets, not real symbol references. */
456 if (GET_CODE (x
) == UNSPEC
&& XINT (x
, 1) == UNSPEC_TLS
)
457 iter
.skip_subrtxes ();
463 microblaze_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED
, rtx x
)
465 return microblaze_tls_referenced_p(x
);
468 /* Return TRUE if X references a SYMBOL_REF. */
470 symbol_mentioned_p (rtx x
)
475 if (GET_CODE (x
) == SYMBOL_REF
)
478 /* UNSPEC entries for a symbol include the SYMBOL_REF, but they
479 are constant offsets, not symbols. */
480 if (GET_CODE (x
) == UNSPEC
)
483 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
485 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
491 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
492 if (symbol_mentioned_p (XVECEXP (x
, i
, j
)))
495 else if (fmt
[i
] == 'e' && symbol_mentioned_p (XEXP (x
, i
)))
502 /* Return TRUE if X references a LABEL_REF. */
504 label_mentioned_p (rtx x
)
509 if (GET_CODE (x
) == LABEL_REF
)
512 /* UNSPEC entries for a symbol include a LABEL_REF for the referencing
513 instruction, but they are constant offsets, not symbols. */
514 if (GET_CODE (x
) == UNSPEC
)
517 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
518 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
524 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
525 if (label_mentioned_p (XVECEXP (x
, i
, j
)))
528 else if (fmt
[i
] == 'e' && label_mentioned_p (XEXP (x
, i
)))
536 tls_mentioned_p (rtx x
)
538 switch (GET_CODE (x
))
541 return tls_mentioned_p (XEXP (x
, 0));
544 if (XINT (x
, 1) == UNSPEC_TLS
)
554 load_tls_operand (rtx x
, rtx reg
)
559 reg
= gen_reg_rtx (Pmode
);
561 tmp
= gen_rtx_CONST (Pmode
, x
);
563 emit_insn (gen_rtx_SET (reg
,
564 gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, tmp
)));
570 microblaze_call_tls_get_addr (rtx x
, rtx reg
, rtx
*valuep
, int reloc
)
575 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
579 tls_entry
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (2, x
, GEN_INT (reloc
)),
582 reg
= load_tls_operand (tls_entry
, reg
);
584 *valuep
= emit_library_call_value (get_tls_get_addr (), NULL_RTX
,
585 LCT_PURE
, /* LCT_CONST? */
588 insns
= get_insns ();
595 microblaze_legitimize_tls_address(rtx x
, rtx reg
)
597 rtx dest
, ret
, eqv
, addend
;
599 enum tls_model model
;
600 model
= SYMBOL_REF_TLS_MODEL (x
);
604 case TLS_MODEL_LOCAL_DYNAMIC
:
605 case TLS_MODEL_GLOBAL_DYNAMIC
:
606 case TLS_MODEL_INITIAL_EXEC
:
607 insns
= microblaze_call_tls_get_addr (x
, reg
, &ret
, TLS_GD
);
608 dest
= gen_reg_rtx (Pmode
);
609 emit_libcall_block (insns
, dest
, ret
, x
);
612 case TLS_MODEL_LOCAL_EXEC
:
613 insns
= microblaze_call_tls_get_addr (x
, reg
, &ret
, TLS_LDM
);
615 /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
616 share the LDM result with other LD model accesses. */
617 eqv
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, const1_rtx
), UNSPEC_TLS
);
618 dest
= gen_reg_rtx (Pmode
);
619 emit_libcall_block (insns
, dest
, ret
, eqv
);
621 /* Load the addend. */
622 addend
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (2, x
, GEN_INT (TLS_DTPREL
)),
624 addend
= force_reg (SImode
, gen_rtx_CONST (SImode
, addend
));
625 dest
= gen_rtx_PLUS (Pmode
, dest
, addend
);
635 microblaze_classify_unspec (struct microblaze_address_info
*info
, rtx x
)
637 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
638 info
->symbol
= XVECEXP (x
, 0, 0);
640 if (XINT (x
, 1) == UNSPEC_GOTOFF
)
642 info
->regA
= gen_rtx_REG (SImode
, PIC_OFFSET_TABLE_REGNUM
);
643 info
->type
= ADDRESS_GOTOFF
;
645 else if (XINT (x
, 1) == UNSPEC_PLT
)
647 info
->type
= ADDRESS_PLT
;
649 else if (XINT (x
, 1) == UNSPEC_TLS
)
651 info
->type
= ADDRESS_TLS
;
652 info
->tls_type
= tls_reloc (INTVAL (XVECEXP (x
, 0, 1)));
654 else if (XINT (x
, 1) == UNSPEC_TEXT
)
656 info
->type
= ADDRESS_SYMBOLIC_TXT_REL
;
666 /* Return true if X is a valid index register for the given mode.
667 Allow only hard registers if STRICT. */
670 microblaze_valid_index_register_p (rtx x
,
671 machine_mode mode ATTRIBUTE_UNUSED
,
674 if (!strict
&& GET_CODE (x
) == SUBREG
)
677 return (GET_CODE (x
) == REG
678 /* A base register is good enough to be an index register on MicroBlaze. */
679 && microblaze_regno_ok_for_base_p (REGNO (x
), strict
));
682 /* Get the base register for accessing a value from the memory or
683 Symbol ref. Used for MicroBlaze Small Data Area Pointer Optimization. */
690 if (!flag_pic
|| microblaze_tls_symbol_p(x
))
691 base_reg
= MB_ABI_BASE_REGNUM
;
693 base_reg
= MB_ABI_PIC_ADDR_REGNUM
;
696 && GET_CODE (x
) == SYMBOL_REF
697 && SYMBOL_REF_SMALL_P (x
) && (decl
= SYMBOL_REF_DECL (x
)) != NULL
)
699 if (TREE_READONLY (decl
))
700 base_reg
= MB_ABI_GPRO_REGNUM
;
702 base_reg
= MB_ABI_GPRW_REGNUM
;
708 /* Return true if X is a valid address for machine mode MODE. If it is,
709 fill in INFO appropriately.
710 STRICT > 0 if we should only accept hard base registers.
711 STRICT = 2 if the operand address is being printed thus
712 function has been called by print_operand_address.
714 type regA regB offset symbol
716 ADDRESS_INVALID NULL NULL NULL NULL
718 ADDRESS_REG %0 NULL const_0 / NULL
720 ADDRESS_REG_INDEX %0 %1 NULL NULL
722 ADDRESS_SYMBOLIC r0 / NULL NULL symbol
725 ADDRESS_CONST_INT r0 NULL const NULL
727 For modes spanning multiple registers (DFmode in 32-bit GPRs,
728 DImode, TImode), indexed addressing cannot be used because
729 adjacent memory cells are accessed by adding word-sized offsets
730 during assembly output. */
733 microblaze_classify_address (struct microblaze_address_info
*info
, rtx x
,
734 machine_mode mode
, int strict
)
740 info
->type
= ADDRESS_INVALID
;
745 info
->symbol_type
= SYMBOL_TYPE_INVALID
;
748 switch (GET_CODE (x
))
753 info
->type
= ADDRESS_REG
;
755 info
->offset
= const0_rtx
;
756 return microblaze_valid_base_register_p (info
->regA
, mode
, strict
);
760 xplus0
= XEXP (x
, 0);
761 xplus1
= XEXP (x
, 1);
763 if (microblaze_valid_base_register_p (xplus0
, mode
, strict
))
765 info
->type
= ADDRESS_REG
;
768 if (GET_CODE (xplus1
) == CONST_INT
)
770 info
->offset
= xplus1
;
773 else if (GET_CODE (xplus1
) == UNSPEC
)
775 /* Need offsettable address. */
776 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
779 return microblaze_classify_unspec (info
, xplus1
);
781 else if ((GET_CODE (xplus1
) == SYMBOL_REF
||
782 GET_CODE (xplus1
) == LABEL_REF
))
784 if (flag_pic
== 2 || microblaze_tls_symbol_p(xplus1
))
786 info
->type
= ADDRESS_SYMBOLIC
;
787 info
->symbol
= xplus1
;
788 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
791 else if (GET_CODE (xplus1
) == CONST
)
793 rtx xconst0
= XEXP(xplus1
, 0);
796 if (GET_CODE (xconst0
) == UNSPEC
)
798 /* Need offsettable address. */
799 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
801 return microblaze_classify_unspec(info
, xconst0
);
804 /* for (plus x const_int) just look at x. */
805 if (GET_CODE (xconst0
) == PLUS
806 && GET_CODE (XEXP (xconst0
, 1)) == CONST_INT
807 && (SMALL_INT (XEXP (xconst0
, 1))
808 || GET_CODE (XEXP (xconst0
, 0)) == UNSPEC
))
810 /* Hold CONST_INT Value in offset in case of
811 UNSPEC + CONST_INT. */
812 offset
= XEXP (xconst0
, 1);
814 /* This is ok as info->symbol is set to xplus1 the full
815 const-expression below. */
816 xconst0
= XEXP (xconst0
, 0);
819 if (GET_CODE (xconst0
) == SYMBOL_REF
820 || GET_CODE (xconst0
) == LABEL_REF
)
822 if (flag_pic
== 2 || microblaze_tls_symbol_p(xconst0
))
825 info
->type
= ADDRESS_SYMBOLIC
;
826 info
->symbol
= xplus1
;
827 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
831 if (GET_CODE (xconst0
) == UNSPEC
&& TARGET_PIC_DATA_TEXT_REL
)
833 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
836 info
->offset
= offset
;
837 return microblaze_classify_unspec (info
, xconst0
);
840 /* Not base + symbol || base + UNSPEC. */
844 else if (GET_CODE (xplus1
) == REG
845 && microblaze_valid_index_register_p (xplus1
, mode
,
847 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
))
849 /* Restrict larger than word-width modes from using an index register. */
850 info
->type
= ADDRESS_REG_INDEX
;
859 info
->regA
= gen_raw_REG (mode
, 0);
860 info
->type
= ADDRESS_CONST_INT
;
868 info
->type
= ADDRESS_SYMBOLIC
;
869 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
871 info
->regA
= gen_raw_REG (mode
, get_base_reg (x
));
873 if (GET_CODE (x
) == CONST
)
875 if (GET_CODE (XEXP (x
, 0)) == UNSPEC
)
877 info
->regA
= gen_raw_REG (mode
,
878 get_base_reg (XVECEXP (XEXP (x
,0), 0, 0)));
879 return microblaze_classify_unspec (info
, XEXP (x
, 0));
881 return !(flag_pic
&& pic_address_needs_scratch (x
));
884 /* Avoid error in print_operand_address in case UNSPEC
885 is removed from SYMBOL or LABEL REFS during optimization. */
886 if ((GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == LABEL_REF
)
887 && flag_pic
&& TARGET_PIC_DATA_TEXT_REL
&& strict
== 2)
889 info
->type
= ADDRESS_SYMBOLIC_TXT_REL
;
895 else if (microblaze_tls_symbol_p(x
))
903 if (reload_in_progress
)
904 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
905 return microblaze_classify_unspec (info
, x
);
915 /* This function is used to implement GO_IF_LEGITIMATE_ADDRESS. It
916 returns a nonzero value if X is a legitimate address for a memory
917 operand of the indicated MODE. STRICT is nonzero if this function
918 is called during reload. */
921 microblaze_legitimate_address_p (machine_mode mode
, rtx x
, bool strict
)
923 struct microblaze_address_info addr
;
925 return microblaze_classify_address (&addr
, x
, mode
, strict
);
929 microblaze_constant_address_p (rtx x
)
931 return ((GET_CODE (x
) == LABEL_REF
) || (GET_CODE (x
) == SYMBOL_REF
)
932 || GET_CODE (x
) == CONST_INT
933 || (GET_CODE (x
) == CONST
934 && ! (flag_pic
&& pic_address_needs_scratch (x
))));
938 microblaze_valid_pic_const (rtx x
)
940 switch (GET_CODE (x
))
952 microblaze_legitimate_pic_operand (rtx x
)
954 if (flag_pic
== 2 && (symbol_mentioned_p (x
) || label_mentioned_p (x
))
955 && !(TARGET_PIC_DATA_TEXT_REL
&& call_insn_operand (x
,VOIDmode
)))
958 if (microblaze_tls_referenced_p(x
))
964 /* Try machine-dependent ways of modifying an illegitimate address
965 to be legitimate. If we find one, return the new, valid address.
966 This is used from only one place: `memory_address' in explow.c.
968 OLDX is the address as it was before break_out_memory_refs was
969 called. In some cases it is useful to look at this to decide what
972 It is always safe for this function to do nothing. It exists to
973 recognize opportunities to optimize the output.
975 For the MicroBlaze, transform:
977 memory(X + <large int>)
981 Y = <large int> & ~0x7fff;
983 memory (Z + (<large int> & 0x7fff));
985 This is for CSE to find several similar references, and only use one Z.
987 When PIC, convert addresses of the form memory (symbol+large int) to
988 memory (reg+large int). */
991 microblaze_legitimize_address (rtx x
, rtx oldx ATTRIBUTE_UNUSED
,
992 machine_mode mode ATTRIBUTE_UNUSED
)
994 register rtx xinsn
= x
, result
;
996 if (GET_CODE (xinsn
) == CONST
997 && flag_pic
&& pic_address_needs_scratch (xinsn
))
999 rtx ptr_reg
= gen_reg_rtx (Pmode
);
1000 rtx constant
= XEXP (XEXP (xinsn
, 0), 1);
1002 emit_move_insn (ptr_reg
, XEXP (XEXP (xinsn
, 0), 0));
1004 result
= gen_rtx_PLUS (Pmode
, ptr_reg
, constant
);
1005 if (SMALL_INT (constant
))
1007 /* Otherwise we fall through so the code below will fix the
1012 if (GET_CODE (xinsn
) == PLUS
)
1014 register rtx xplus0
= XEXP (xinsn
, 0);
1015 register rtx xplus1
= XEXP (xinsn
, 1);
1016 register enum rtx_code code0
= GET_CODE (xplus0
);
1017 register enum rtx_code code1
= GET_CODE (xplus1
);
1019 if (code0
!= REG
&& code1
== REG
)
1021 xplus0
= XEXP (xinsn
, 1);
1022 xplus1
= XEXP (xinsn
, 0);
1023 code0
= GET_CODE (xplus0
);
1024 code1
= GET_CODE (xplus1
);
1027 if (code0
== REG
&& REG_OK_FOR_BASE_P (xplus0
)
1028 && code1
== CONST_INT
&& !SMALL_INT (xplus1
))
1030 rtx int_reg
= gen_reg_rtx (Pmode
);
1031 rtx ptr_reg
= gen_reg_rtx (Pmode
);
1033 emit_move_insn (int_reg
, GEN_INT (INTVAL (xplus1
) & ~0x7fff));
1035 emit_insn (gen_rtx_SET (ptr_reg
,
1036 gen_rtx_PLUS (Pmode
, xplus0
, int_reg
)));
1038 result
= gen_rtx_PLUS (Pmode
, ptr_reg
,
1039 GEN_INT (INTVAL (xplus1
) & 0x7fff));
1043 if (code0
== REG
&& REG_OK_FOR_BASE_P (xplus0
))
1045 if (reload_in_progress
)
1046 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
1049 xplus1
= XEXP (xplus1
, 0);
1050 code1
= GET_CODE (xplus1
);
1052 if (code1
== SYMBOL_REF
)
1054 if (microblaze_tls_symbol_p(xplus1
))
1057 reg
= gen_reg_rtx (Pmode
);
1059 tls_ref
= microblaze_legitimize_tls_address (xplus1
,
1061 emit_move_insn (reg
, tls_ref
);
1063 result
= gen_rtx_PLUS (Pmode
, xplus0
, reg
);
1067 else if (flag_pic
== 2)
1069 if (!TARGET_PIC_DATA_TEXT_REL
)
1072 reg
= gen_reg_rtx (Pmode
);
1074 pic_ref
= gen_rtx_UNSPEC (Pmode
,
1075 gen_rtvec (1, xplus1
),
1077 pic_ref
= gen_rtx_CONST (Pmode
, pic_ref
);
1078 pic_ref
= gen_rtx_PLUS (Pmode
,
1079 pic_offset_table_rtx
, pic_ref
);
1080 pic_ref
= gen_const_mem (Pmode
, pic_ref
);
1081 emit_move_insn (reg
, pic_ref
);
1082 result
= gen_rtx_PLUS (Pmode
, xplus0
, reg
);
1088 reg
= gen_reg_rtx (Pmode
);
1089 pic_ref
= gen_rtx_UNSPEC (Pmode
,
1090 gen_rtvec (1, xplus1
),
1092 pic_ref
= gen_rtx_CONST (Pmode
, pic_ref
);
1093 emit_insn (gen_addsi3 (reg
,
1094 pic_offset_table_rtx
, xplus0
));
1095 result
= gen_rtx_PLUS (Pmode
, reg
, pic_ref
);
1103 if (GET_CODE (xinsn
) == SYMBOL_REF
)
1106 if (microblaze_tls_symbol_p(xinsn
))
1108 reg
= microblaze_legitimize_tls_address (xinsn
, NULL_RTX
);
1110 else if (flag_pic
== 2)
1112 if (reload_in_progress
)
1113 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
1115 if (!TARGET_PIC_DATA_TEXT_REL
)
1119 pic_ref
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, xinsn
), UNSPEC_GOTOFF
);
1120 pic_ref
= gen_rtx_CONST (Pmode
, pic_ref
);
1121 pic_ref
= gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, pic_ref
);
1122 pic_ref
= gen_const_mem (Pmode
, pic_ref
);
1129 pic_ref
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, xinsn
), UNSPEC_TEXT
);
1130 pic_ref
= gen_rtx_CONST (Pmode
, pic_ref
);
1131 pic_ref
= gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, pic_ref
);
1143 #define MAX_MOVE_REGS 8
1144 #define MAX_MOVE_BYTES (MAX_MOVE_REGS * UNITS_PER_WORD)
1146 /* Emit straight-line code to move LENGTH bytes from SRC to DEST.
1147 Assume that the areas do not overlap. */
1150 microblaze_block_move_straight (rtx dest
, rtx src
, HOST_WIDE_INT length
)
1152 HOST_WIDE_INT offset
, delta
;
1153 unsigned HOST_WIDE_INT bits
;
1158 bits
= BITS_PER_WORD
;
1159 mode
= int_mode_for_size (bits
, 0).require ();
1160 delta
= bits
/ BITS_PER_UNIT
;
1162 /* Allocate a buffer for the temporary registers. */
1163 regs
= XALLOCAVEC (rtx
, length
/ delta
);
1165 /* Load as many BITS-sized chunks as possible. Use a normal load if
1166 the source has enough alignment, otherwise use left/right pairs. */
1167 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
1169 regs
[i
] = gen_reg_rtx (mode
);
1170 emit_move_insn (regs
[i
], adjust_address (src
, mode
, offset
));
1173 /* Copy the chunks to the destination. */
1174 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
1175 emit_move_insn (adjust_address (dest
, mode
, offset
), regs
[i
]);
1177 /* Mop up any left-over bytes. */
1178 if (offset
< length
)
1180 src
= adjust_address (src
, BLKmode
, offset
);
1181 dest
= adjust_address (dest
, BLKmode
, offset
);
1182 move_by_pieces (dest
, src
, length
- offset
,
1183 MIN (MEM_ALIGN (src
), MEM_ALIGN (dest
)), 0);
1187 /* Helper function for doing a loop-based block operation on memory
1188 reference MEM. Each iteration of the loop will operate on LENGTH
1191 Create a new base register for use within the loop and point it to
1192 the start of MEM. Create a new memory reference that uses this
1193 register. Store them in *LOOP_REG and *LOOP_MEM respectively. */
1196 microblaze_adjust_block_mem (rtx mem
, HOST_WIDE_INT length
,
1197 rtx
* loop_reg
, rtx
* loop_mem
)
1199 *loop_reg
= copy_addr_to_reg (XEXP (mem
, 0));
1201 /* Although the new mem does not refer to a known location,
1202 it does keep up to LENGTH bytes of alignment. */
1203 *loop_mem
= change_address (mem
, BLKmode
, *loop_reg
);
1204 set_mem_align (*loop_mem
,
1205 MIN ((HOST_WIDE_INT
) MEM_ALIGN (mem
),
1206 length
* BITS_PER_UNIT
));
1210 /* Move LENGTH bytes from SRC to DEST using a loop that moves MAX_MOVE_BYTES
1211 per iteration. LENGTH must be at least MAX_MOVE_BYTES. Assume that the
1212 memory regions do not overlap. */
1215 microblaze_block_move_loop (rtx dest
, rtx src
, HOST_WIDE_INT length
)
1217 rtx_code_label
*label
;
1218 rtx src_reg
, dest_reg
, final_src
;
1219 HOST_WIDE_INT leftover
;
1221 leftover
= length
% MAX_MOVE_BYTES
;
1224 /* Create registers and memory references for use within the loop. */
1225 microblaze_adjust_block_mem (src
, MAX_MOVE_BYTES
, &src_reg
, &src
);
1226 microblaze_adjust_block_mem (dest
, MAX_MOVE_BYTES
, &dest_reg
, &dest
);
1228 /* Calculate the value that SRC_REG should have after the last iteration
1230 final_src
= expand_simple_binop (Pmode
, PLUS
, src_reg
, GEN_INT (length
),
1233 /* Emit the start of the loop. */
1234 label
= gen_label_rtx ();
1237 /* Emit the loop body. */
1238 microblaze_block_move_straight (dest
, src
, MAX_MOVE_BYTES
);
1240 /* Move on to the next block. */
1241 emit_move_insn (src_reg
, plus_constant (Pmode
, src_reg
, MAX_MOVE_BYTES
));
1242 emit_move_insn (dest_reg
, plus_constant (Pmode
, dest_reg
, MAX_MOVE_BYTES
));
1244 /* Emit the test & branch. */
1245 emit_insn (gen_cbranchsi4 (gen_rtx_NE (SImode
, src_reg
, final_src
),
1246 src_reg
, final_src
, label
));
1248 /* Mop up any left-over bytes. */
1250 microblaze_block_move_straight (dest
, src
, leftover
);
1253 /* Expand a movmemsi instruction. */
1256 microblaze_expand_block_move (rtx dest
, rtx src
, rtx length
, rtx align_rtx
)
1259 if (GET_CODE (length
) == CONST_INT
)
1261 HOST_WIDE_INT bytes
= INTVAL (length
);
1262 int align
= INTVAL (align_rtx
);
1264 if (align
> UNITS_PER_WORD
)
1266 align
= UNITS_PER_WORD
; /* We can't do any better. */
1268 else if (align
< UNITS_PER_WORD
)
1270 if (INTVAL (length
) <= MAX_MOVE_BYTES
)
1272 move_by_pieces (dest
, src
, bytes
, align
, 0);
1279 if (INTVAL (length
) <= 2 * MAX_MOVE_BYTES
)
1281 microblaze_block_move_straight (dest
, src
, INTVAL (length
));
1286 microblaze_block_move_loop (dest
, src
, INTVAL (length
));
1294 microblaze_rtx_costs (rtx x
, machine_mode mode
, int outer_code ATTRIBUTE_UNUSED
,
1295 int opno ATTRIBUTE_UNUSED
, int *total
,
1296 bool speed ATTRIBUTE_UNUSED
)
1298 int code
= GET_CODE (x
);
1304 int num_words
= (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
) ? 2 : 1;
1305 if (simple_memory_operand (x
, mode
))
1306 *total
= COSTS_N_INSNS (2 * num_words
);
1308 *total
= COSTS_N_INSNS (2 * (2 * num_words
));
1316 *total
= COSTS_N_INSNS (2);
1319 *total
= COSTS_N_INSNS (1);
1328 *total
= COSTS_N_INSNS (2);
1331 *total
= COSTS_N_INSNS (1);
1339 if (TARGET_BARREL_SHIFT
)
1341 if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v5.00.a")
1343 *total
= COSTS_N_INSNS (1);
1345 *total
= COSTS_N_INSNS (2);
1347 else if (!TARGET_SOFT_MUL
)
1348 *total
= COSTS_N_INSNS (1);
1349 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1351 /* Add 1 to make shift slightly more expensive than add. */
1352 *total
= COSTS_N_INSNS (INTVAL (XEXP (x
, 1))) + 1;
1353 /* Reduce shift costs for special circumstances. */
1354 if (optimize_size
&& INTVAL (XEXP (x
, 1)) > 5)
1356 if (!optimize_size
&& INTVAL (XEXP (x
, 1)) > 17)
1360 /* Double the worst cost of shifts when there is no barrel shifter and
1361 the shift amount is in a reg. */
1362 *total
= COSTS_N_INSNS (32 * 4);
1368 if (mode
== SFmode
|| mode
== DFmode
)
1370 if (TARGET_HARD_FLOAT
)
1371 *total
= COSTS_N_INSNS (6);
1374 else if (mode
== DImode
)
1376 *total
= COSTS_N_INSNS (4);
1381 *total
= COSTS_N_INSNS (1);
1390 *total
= COSTS_N_INSNS (4);
1398 if (TARGET_HARD_FLOAT
)
1399 *total
= COSTS_N_INSNS (6);
1401 else if (!TARGET_SOFT_MUL
)
1403 if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v5.00.a")
1405 *total
= COSTS_N_INSNS (1);
1407 *total
= COSTS_N_INSNS (3);
1410 *total
= COSTS_N_INSNS (10);
1418 if (TARGET_HARD_FLOAT
)
1419 *total
= COSTS_N_INSNS (23);
1425 *total
= COSTS_N_INSNS (1);
1430 *total
= COSTS_N_INSNS (1);
1438 /* Return the number of instructions needed to load or store a value
1439 of mode MODE at X. Return 0 if X isn't valid for MODE. */
1442 microblaze_address_insns (rtx x
, machine_mode mode
)
1444 struct microblaze_address_info addr
;
1446 if (microblaze_classify_address (&addr
, x
, mode
, false))
1451 if (SMALL_INT (addr
.offset
))
1455 case ADDRESS_CONST_INT
:
1460 case ADDRESS_REG_INDEX
:
1462 case ADDRESS_SYMBOLIC
:
1463 case ADDRESS_SYMBOLIC_TXT_REL
:
1464 case ADDRESS_GOTOFF
:
1467 switch (addr
.tls_type
)
1485 /* Provide the costs of an addressing mode that contains ADDR.
1486 If ADDR is not a valid address, its cost is irrelevant. */
1488 microblaze_address_cost (rtx addr
, machine_mode mode ATTRIBUTE_UNUSED
,
1489 addr_space_t as ATTRIBUTE_UNUSED
,
1490 bool speed ATTRIBUTE_UNUSED
)
1492 return COSTS_N_INSNS (microblaze_address_insns (addr
, GET_MODE (addr
)));
1495 /* Return nonzero if X is an address which needs a temporary register when
1496 reloaded while generating PIC code. */
1499 pic_address_needs_scratch (rtx x
)
1501 if (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
,0)) == PLUS
)
1505 p0
= XEXP (XEXP (x
, 0), 0);
1506 p1
= XEXP (XEXP (x
, 0), 1);
1508 if ((GET_CODE (p0
) == SYMBOL_REF
|| GET_CODE (p0
) == LABEL_REF
)
1509 && (GET_CODE (p1
) == CONST_INT
)
1510 && (flag_pic
== 2 || microblaze_tls_symbol_p (p0
) || !SMALL_INT (p1
)))
1516 /* Argument support functions. */
1517 /* Initialize CUMULATIVE_ARGS for a function. */
1520 init_cumulative_args (CUMULATIVE_ARGS
* cum
, tree fntype
,
1521 rtx libname ATTRIBUTE_UNUSED
)
1523 static CUMULATIVE_ARGS zero_cum
;
1524 tree param
, next_param
;
1528 /* Determine if this function has variable arguments. This is
1529 indicated by the last argument being 'void_type_mode' if there
1530 are no variable arguments. The standard MicroBlaze calling sequence
1531 passes all arguments in the general purpose registers in this case. */
1533 for (param
= fntype
? TYPE_ARG_TYPES (fntype
) : 0;
1534 param
!= 0; param
= next_param
)
1536 next_param
= TREE_CHAIN (param
);
1537 if (next_param
== 0 && TREE_VALUE (param
) != void_type_node
)
1538 cum
->gp_reg_found
= 1;
1542 /* Advance the argument to the next argument position. */
1545 microblaze_function_arg_advance (cumulative_args_t cum_v
,
1547 const_tree type
, bool named ATTRIBUTE_UNUSED
)
1549 CUMULATIVE_ARGS
*cum
= get_cumulative_args (cum_v
);
1558 gcc_assert (GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
1559 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
);
1561 cum
->gp_reg_found
= 1;
1562 cum
->arg_words
+= ((GET_MODE_SIZE (mode
) + UNITS_PER_WORD
- 1)
1567 cum
->gp_reg_found
= 1;
1568 cum
->arg_words
+= ((int_size_in_bytes (type
) + UNITS_PER_WORD
- 1)
1574 if (!cum
->gp_reg_found
&& cum
->arg_number
<= 2)
1575 cum
->fp_code
+= 1 << ((cum
->arg_number
- 1) * 2);
1579 cum
->arg_words
+= 2;
1580 if (!cum
->gp_reg_found
&& cum
->arg_number
<= 2)
1581 cum
->fp_code
+= 2 << ((cum
->arg_number
- 1) * 2);
1585 cum
->gp_reg_found
= 1;
1586 cum
->arg_words
+= 2;
1593 cum
->gp_reg_found
= 1;
1599 /* Return an RTL expression containing the register for the given mode,
1600 or 0 if the argument is to be passed on the stack. */
1603 microblaze_function_arg (cumulative_args_t cum_v
, machine_mode mode
,
1604 const_tree type ATTRIBUTE_UNUSED
,
1605 bool named ATTRIBUTE_UNUSED
)
1607 CUMULATIVE_ARGS
*cum
= get_cumulative_args (cum_v
);
1611 int *arg_words
= &cum
->arg_words
;
1613 cum
->last_arg_fp
= 0;
1624 regbase
= GP_ARG_FIRST
;
1627 gcc_assert (GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
1628 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
);
1631 regbase
= GP_ARG_FIRST
;
1635 if (*arg_words
>= MAX_ARGS_IN_REGISTERS
)
1639 gcc_assert (regbase
!= -1);
1641 ret
= gen_rtx_REG (mode
, regbase
+ *arg_words
);
1644 if (mode
== VOIDmode
)
1646 if (cum
->num_adjusts
> 0)
1647 ret
= gen_rtx_PARALLEL ((machine_mode
) cum
->fp_code
,
1648 gen_rtvec_v (cum
->num_adjusts
, cum
->adjust
));
1654 /* Return number of bytes of argument to put in registers. */
1656 function_arg_partial_bytes (cumulative_args_t cum_v
, machine_mode mode
,
1657 tree type
, bool named ATTRIBUTE_UNUSED
)
1659 CUMULATIVE_ARGS
*cum
= get_cumulative_args (cum_v
);
1661 if ((mode
== BLKmode
1662 || GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
1663 || GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
1664 && cum
->arg_words
< MAX_ARGS_IN_REGISTERS
)
1667 if (mode
== BLKmode
)
1668 words
= ((int_size_in_bytes (type
) + UNITS_PER_WORD
- 1)
1671 words
= (GET_MODE_SIZE (mode
) + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
1673 if (words
+ cum
->arg_words
<= MAX_ARGS_IN_REGISTERS
)
1674 return 0; /* structure fits in registers */
1676 return (MAX_ARGS_IN_REGISTERS
- cum
->arg_words
) * UNITS_PER_WORD
;
1679 else if (mode
== DImode
&& cum
->arg_words
== MAX_ARGS_IN_REGISTERS
- 1)
1680 return UNITS_PER_WORD
;
1685 /* Convert a version number of the form "vX.YY.Z" to an integer encoding
1686 for easier range comparison. */
1688 microblaze_version_to_int (const char *version
)
1691 const char *tmpl
= "vXX.YY.Z";
1700 { /* Looking for major */
1707 if (!(*p
>= '0' && *p
<= '9'))
1709 iver
+= (int) (*p
- '0');
1714 { /* Looking for minor */
1715 if (!(*p
>= '0' && *p
<= '9'))
1717 iver
+= (int) (*p
- '0');
1721 { /* Looking for compat */
1722 if (!(*p
>= 'a' && *p
<= 'z'))
1725 iver
+= (int) (*p
- 'a');
1745 microblaze_option_override (void)
1747 register int i
, start
;
1749 register machine_mode mode
;
1752 microblaze_section_threshold
= (global_options_set
.x_g_switch_value
1754 : MICROBLAZE_DEFAULT_GVALUE
);
1758 /* Make sure it's 2, we only support one kind of PIC. */
1760 if (!TARGET_SUPPORTS_PIC
)
1762 error ("-fPIC/-fpic not supported for this target");
1763 /* Clear it to avoid further errors. */
1768 /* Check the MicroBlaze CPU version for any special action to be done. */
1769 if (microblaze_select_cpu
== NULL
)
1770 microblaze_select_cpu
= MICROBLAZE_DEFAULT_CPU
;
1771 ver
= microblaze_version_to_int (microblaze_select_cpu
);
1774 error ("%qs is an invalid argument to -mcpu=", microblaze_select_cpu
);
1777 ver
= MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v3.00.a");
1780 /* No hardware exceptions in earlier versions. So no worries. */
1782 microblaze_select_flags
&= ~(MICROBLAZE_MASK_NO_UNSAFE_DELAY
);
1784 microblaze_no_unsafe_delay
= 0;
1785 microblaze_pipe
= MICROBLAZE_PIPE_3
;
1788 || (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v4.00.b")
1792 microblaze_select_flags
|= (MICROBLAZE_MASK_NO_UNSAFE_DELAY
);
1794 microblaze_no_unsafe_delay
= 1;
1795 microblaze_pipe
= MICROBLAZE_PIPE_3
;
1799 /* We agree to use 5 pipe-stage model even on area optimized 3
1800 pipe-stage variants. */
1802 microblaze_select_flags
&= ~(MICROBLAZE_MASK_NO_UNSAFE_DELAY
);
1804 microblaze_no_unsafe_delay
= 0;
1805 microblaze_pipe
= MICROBLAZE_PIPE_5
;
1806 if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v5.00.a") == 0
1807 || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
,
1809 || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
,
1812 /* Pattern compares are to be turned on by default only when
1813 compiling for MB v5.00.'z'. */
1814 target_flags
|= MASK_PATTERN_COMPARE
;
1818 ver
= MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v6.00.a");
1821 if (TARGET_MULTIPLY_HIGH
)
1823 "-mxl-multiply-high can be used only with -mcpu=v6.00.a or greater");
1826 ver
= MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v8.10.a");
1827 microblaze_has_clz
= 1;
1830 /* MicroBlaze prior to 8.10.a didn't have clz. */
1831 microblaze_has_clz
= 0;
1834 /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */
1835 ver
= MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v8.30.a");
1838 if (TARGET_REORDER
== 1)
1839 warning (0, "-mxl-reorder can be used only with -mcpu=v8.30.a or greater");
1842 else if ((ver
== 0) && !TARGET_PATTERN_COMPARE
)
1844 if (TARGET_REORDER
== 1)
1845 warning (0, "-mxl-reorder requires -mxl-pattern-compare for -mcpu=v8.30.a");
1849 if (TARGET_MULTIPLY_HIGH
&& TARGET_SOFT_MUL
)
1850 error ("-mxl-multiply-high requires -mno-xl-soft-mul");
1852 /* Always use DFA scheduler. */
1853 microblaze_sched_use_dfa
= 1;
1856 microblaze_abicalls
= MICROBLAZE_ABICALLS_NO
;
1859 /* Initialize the high, low values for legit floating point constants. */
1860 real_maxval (&dfhigh
, 0, DFmode
);
1861 real_maxval (&dflow
, 1, DFmode
);
1862 real_maxval (&sfhigh
, 0, SFmode
);
1863 real_maxval (&sflow
, 1, SFmode
);
1865 microblaze_print_operand_punct
['?'] = 1;
1866 microblaze_print_operand_punct
['#'] = 1;
1867 microblaze_print_operand_punct
['&'] = 1;
1868 microblaze_print_operand_punct
['!'] = 1;
1869 microblaze_print_operand_punct
['*'] = 1;
1870 microblaze_print_operand_punct
['@'] = 1;
1871 microblaze_print_operand_punct
['.'] = 1;
1872 microblaze_print_operand_punct
['('] = 1;
1873 microblaze_print_operand_punct
[')'] = 1;
1874 microblaze_print_operand_punct
['['] = 1;
1875 microblaze_print_operand_punct
[']'] = 1;
1876 microblaze_print_operand_punct
['<'] = 1;
1877 microblaze_print_operand_punct
['>'] = 1;
1878 microblaze_print_operand_punct
['{'] = 1;
1879 microblaze_print_operand_punct
['}'] = 1;
1880 microblaze_print_operand_punct
['^'] = 1;
1881 microblaze_print_operand_punct
['$'] = 1;
1882 microblaze_print_operand_punct
['+'] = 1;
1884 /* Set up array to map GCC register number to debug register number.
1885 Ignore the special purpose register numbers. */
1887 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1888 microblaze_dbx_regno
[i
] = -1;
1890 start
= GP_DBX_FIRST
- GP_REG_FIRST
;
1891 for (i
= GP_REG_FIRST
; i
<= GP_REG_LAST
; i
++)
1892 microblaze_dbx_regno
[i
] = i
+ start
;
1894 /* Set up array giving whether a given register can hold a given mode. */
1896 for (mode
= VOIDmode
;
1897 mode
!= MAX_MACHINE_MODE
; mode
= (machine_mode
) ((int) mode
+ 1))
1899 register int size
= GET_MODE_SIZE (mode
);
1901 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1907 ok
= (ST_REG_P (regno
) || GP_REG_P (regno
));
1909 else if (GP_REG_P (regno
))
1910 ok
= ((regno
& 1) == 0 || size
<= UNITS_PER_WORD
);
1914 microblaze_hard_regno_mode_ok_p
[(int) mode
][regno
] = ok
;
1919 /* Implement TARGET_HARD_REGNO_MODE_OK. In 32 bit mode, require that
1920 DImode and DFmode be in even registers. For DImode, this makes some
1921 of the insns easier to write, since you don't have to worry about a
1922 DImode value in registers 3 & 4, producing a result in 4 & 5.
1924 To make the code simpler, the hook now just references an
1925 array built in override_options. */
1928 microblaze_hard_regno_mode_ok (unsigned int regno
, machine_mode mode
)
1930 return microblaze_hard_regno_mode_ok_p
[mode
][regno
];
1933 /* Implement TARGET_MODES_TIEABLE_P. */
1936 microblaze_modes_tieable_p (machine_mode mode1
, machine_mode mode2
)
1938 return ((GET_MODE_CLASS (mode1
) == MODE_FLOAT
1939 || GET_MODE_CLASS (mode1
) == MODE_COMPLEX_FLOAT
)
1940 == (GET_MODE_CLASS (mode2
) == MODE_FLOAT
1941 || GET_MODE_CLASS (mode2
) == MODE_COMPLEX_FLOAT
));
1944 /* Return true if FUNC is an interrupt function as specified
1945 by the "interrupt_handler" attribute. */
1948 microblaze_interrupt_function_p (tree func
)
1952 if (TREE_CODE (func
) != FUNCTION_DECL
)
1955 a
= lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func
));
1956 return a
!= NULL_TREE
;
1960 microblaze_fast_interrupt_function_p (tree func
)
1964 if (TREE_CODE (func
) != FUNCTION_DECL
)
1967 a
= lookup_attribute ("fast_interrupt", DECL_ATTRIBUTES (func
));
1968 return a
!= NULL_TREE
;
1971 microblaze_break_function_p (tree func
)
1976 if (TREE_CODE (func
) != FUNCTION_DECL
)
1979 a
= lookup_attribute ("break_handler", DECL_ATTRIBUTES (func
));
1980 return a
!= NULL_TREE
;
1982 /* Return true if FUNC is an interrupt function which uses
1983 normal return, indicated by the "save_volatiles" attribute. */
1986 microblaze_save_volatiles (tree func
)
1990 if (TREE_CODE (func
) != FUNCTION_DECL
)
1993 a
= lookup_attribute ("save_volatiles", DECL_ATTRIBUTES (func
));
1994 return a
!= NULL_TREE
;
1997 /* Return whether function is tagged with 'interrupt_handler'
1998 or 'fast_interrupt' attribute. Return true if function
1999 should use return from interrupt rather than normal
2002 microblaze_is_interrupt_variant (void)
2004 return (interrupt_handler
|| fast_interrupt
);
2007 microblaze_is_break_handler (void)
2009 return break_handler
;
2012 /* Determine of register must be saved/restored in call. */
2014 microblaze_must_save_register (int regno
)
2016 if (pic_offset_table_rtx
&&
2017 (regno
== MB_ABI_PIC_ADDR_REGNUM
) && df_regs_ever_live_p (regno
))
2020 if (df_regs_ever_live_p (regno
) && !call_used_regs
[regno
])
2023 if (frame_pointer_needed
&& (regno
== HARD_FRAME_POINTER_REGNUM
))
2026 if (crtl
->calls_eh_return
2027 && regno
== MB_ABI_SUB_RETURN_ADDR_REGNUM
)
2032 if (regno
== MB_ABI_SUB_RETURN_ADDR_REGNUM
)
2034 if ((microblaze_is_interrupt_variant () || save_volatiles
) &&
2035 (regno
>= 3 && regno
<= 12))
2039 if (microblaze_is_interrupt_variant ())
2041 if (df_regs_ever_live_p (regno
)
2042 || regno
== MB_ABI_MSR_SAVE_REG
2043 || (interrupt_handler
2044 && (regno
== MB_ABI_ASM_TEMP_REGNUM
2045 || regno
== MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM
)))
2051 if (df_regs_ever_live_p (regno
)
2052 || regno
== MB_ABI_ASM_TEMP_REGNUM
2053 || regno
== MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM
)
2057 if (crtl
->calls_eh_return
2058 && (regno
== EH_RETURN_DATA_REGNO (0)
2059 || regno
== EH_RETURN_DATA_REGNO (1)))
2065 /* Return the bytes needed to compute the frame pointer from the current
2068 MicroBlaze stack frames look like:
2072 Before call After call
2073 +-----------------------+ +-----------------------+
2075 mem. | local variables, | | local variables, |
2076 | callee saved and | | callee saved and |
2078 +-----------------------+ +-----------------------+
2079 | arguments for called | | arguments for called |
2080 | subroutines | | subroutines |
2081 | (optional) | | (optional) |
2082 +-----------------------+ +-----------------------+
2083 | Link register | | Link register |
2085 +-----------------------+ +-----------------------+
2087 | local variables, |
2088 | callee saved and |
2090 +-----------------------+
2091 | MSR (optional if, |
2092 | interrupt handler) |
2093 +-----------------------+
2095 | alloca allocations |
2097 +-----------------------+
2099 | arguments for called |
2103 +-----------------------+
2106 memory +-----------------------+
2110 static HOST_WIDE_INT
2111 compute_frame_size (HOST_WIDE_INT size
)
2114 HOST_WIDE_INT total_size
; /* # bytes that the entire frame takes up. */
2115 HOST_WIDE_INT var_size
; /* # bytes that local variables take up. */
2116 HOST_WIDE_INT args_size
; /* # bytes that outgoing arguments take up. */
2117 int link_debug_size
; /* # bytes for link register. */
2118 HOST_WIDE_INT gp_reg_size
; /* # bytes needed to store calle-saved gp regs. */
2119 long mask
; /* mask of saved gp registers. */
2122 microblaze_interrupt_function_p (current_function_decl
);
2124 microblaze_break_function_p (current_function_decl
);
2127 microblaze_fast_interrupt_function_p (current_function_decl
);
2128 save_volatiles
= microblaze_save_volatiles (current_function_decl
);
2130 interrupt_handler
= break_handler
;
2135 args_size
= crtl
->outgoing_args_size
;
2137 if ((args_size
== 0) && cfun
->calls_alloca
)
2138 args_size
= NUM_OF_ARGS
* UNITS_PER_WORD
;
2140 total_size
= var_size
+ args_size
;
2142 if (flag_pic
== 2 && !TARGET_PIC_DATA_TEXT_REL
)
2143 /* force setting GOT. */
2144 df_set_regs_ever_live (MB_ABI_PIC_ADDR_REGNUM
, true);
2146 /* Calculate space needed for gp registers. */
2147 for (regno
= GP_REG_FIRST
; regno
<= GP_REG_LAST
; regno
++)
2149 if (microblaze_must_save_register (regno
))
2152 if (regno
!= MB_ABI_SUB_RETURN_ADDR_REGNUM
)
2153 /* Don't account for link register. It is accounted specially below. */
2154 gp_reg_size
+= GET_MODE_SIZE (SImode
);
2156 mask
|= (1L << (regno
- GP_REG_FIRST
));
2160 total_size
+= gp_reg_size
;
2162 /* Add 4 bytes for MSR. */
2163 if (microblaze_is_interrupt_variant ())
2166 /* No space to be allocated for link register in leaf functions with no other
2167 stack requirements. */
2168 if (total_size
== 0 && crtl
->is_leaf
)
2169 link_debug_size
= 0;
2171 link_debug_size
= UNITS_PER_WORD
;
2173 total_size
+= link_debug_size
;
2175 /* Save other computed information. */
2176 current_frame_info
.total_size
= total_size
;
2177 current_frame_info
.var_size
= var_size
;
2178 current_frame_info
.args_size
= args_size
;
2179 current_frame_info
.gp_reg_size
= gp_reg_size
;
2180 current_frame_info
.mask
= mask
;
2181 current_frame_info
.initialized
= reload_completed
;
2182 current_frame_info
.num_gp
= gp_reg_size
/ UNITS_PER_WORD
;
2183 current_frame_info
.link_debug_size
= link_debug_size
;
2186 /* Offset from which to callee-save GP regs. */
2187 current_frame_info
.gp_offset
= (total_size
- gp_reg_size
);
2189 current_frame_info
.gp_offset
= 0;
2191 /* Ok, we're done. */
2195 /* Make sure that we're not trying to eliminate to the wrong hard frame
2199 microblaze_can_eliminate (const int from
, const int to
)
2201 return ((from
== RETURN_ADDRESS_POINTER_REGNUM
&& !leaf_function_p())
2202 || (to
== MB_ABI_SUB_RETURN_ADDR_REGNUM
&& leaf_function_p())
2203 || (from
!= RETURN_ADDRESS_POINTER_REGNUM
2204 && (to
== HARD_FRAME_POINTER_REGNUM
2205 || (to
== STACK_POINTER_REGNUM
&& !frame_pointer_needed
))));
2208 /* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame
2209 pointer or argument pointer or the return address pointer. TO is either
2210 the stack pointer or hard frame pointer. */
2213 microblaze_initial_elimination_offset (int from
, int to
)
2215 HOST_WIDE_INT offset
;
2219 case FRAME_POINTER_REGNUM
:
2222 case ARG_POINTER_REGNUM
:
2223 if (to
== STACK_POINTER_REGNUM
|| to
== HARD_FRAME_POINTER_REGNUM
)
2224 offset
= compute_frame_size (get_frame_size ());
2228 case RETURN_ADDRESS_POINTER_REGNUM
:
2232 offset
= current_frame_info
.gp_offset
+
2233 ((UNITS_PER_WORD
- (POINTER_SIZE
/ BITS_PER_UNIT
)));
2241 /* Print operands using format code.
2243 The MicroBlaze specific codes are:
2245 'X' X is CONST_INT, prints 32 bits in hexadecimal format = "0x%08x",
2246 'x' X is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x",
2247 'F' op is CONST_DOUBLE, print 32 bits in hex,
2248 'd' output integer constant in decimal,
2249 'z' if the operand is 0, use $0 instead of normal operand.
2250 'D' print second register of double-word register operand.
2251 'L' print low-order register of double-word register operand.
2252 'M' print high-order register of double-word register operand.
2253 'C' print part of opcode for a branch condition.
2254 'N' print part of opcode for a branch condition, inverted.
2255 'S' X is CODE_LABEL, print with prefix of "LS" (for embedded switch).
2256 'B' print 'z' for EQ, 'n' for NE
2257 'b' print 'n' for EQ, 'z' for NE
2258 'T' print 'f' for EQ, 't' for NE
2259 't' print 't' for EQ, 'f' for NE
2260 'm' Print 1<<operand.
2261 'i' Print 'i' if MEM operand has immediate value
2262 'y' Print 'y' if MEM operand is single register
2263 'o' Print operand address+4
2264 '?' Print 'd' if we use a branch with delay slot instead of normal branch.
2265 'h' Print high word of const_double (int or float) value as hex
2266 'j' Print low word of const_double (int or float) value as hex
2267 's' Print -1 if operand is negative, 0 if positive (sign extend)
2268 '@' Print the name of the temporary register (rMB_ABI_ASM_TEMP_REGNUM).
2269 '#' Print nop if the delay slot of a branch is not filled.
2273 print_operand (FILE * file
, rtx op
, int letter
)
2275 register enum rtx_code code
;
2277 if (PRINT_OPERAND_PUNCT_VALID_P (letter
))
2282 /* Conditionally add a 'd' to indicate filled delay slot. */
2283 if (final_sequence
!= NULL
)
2288 /* Conditionally add a nop in unfilled delay slot. */
2289 if (final_sequence
== NULL
)
2290 fputs ("nop\t\t# Unfilled delay slot\n", file
);
2294 fputs (reg_names
[GP_REG_FIRST
+ MB_ABI_ASM_TEMP_REGNUM
], file
);
2298 output_operand_lossage ("unknown punctuation '%c'", letter
);
2307 output_operand_lossage ("null pointer");
2311 code
= GET_CODE (op
);
2313 if (code
== SIGN_EXTEND
)
2314 op
= XEXP (op
, 0), code
= GET_CODE (op
);
2342 fatal_insn ("PRINT_OPERAND, invalid insn for %%C", op
);
2345 else if (letter
== 'N')
2371 fatal_insn ("PRINT_OPERAND, invalid insn for %%N", op
);
2374 else if (letter
== 'S')
2378 ASM_GENERATE_INTERNAL_LABEL (buffer
, "LS", CODE_LABEL_NUMBER (op
));
2379 assemble_name (file
, buffer
);
2382 /* Print 'i' for memory operands which have immediate values. */
2383 else if (letter
== 'i')
2387 struct microblaze_address_info info
;
2389 if (!microblaze_classify_address
2390 (&info
, XEXP (op
, 0), GET_MODE (op
), 1))
2391 fatal_insn ("insn contains an invalid address !", op
);
2396 case ADDRESS_CONST_INT
:
2397 case ADDRESS_SYMBOLIC
:
2398 case ADDRESS_SYMBOLIC_TXT_REL
:
2399 case ADDRESS_GOTOFF
:
2403 case ADDRESS_REG_INDEX
:
2405 case ADDRESS_INVALID
:
2407 fatal_insn ("invalid address", op
);
2412 else if (code
== REG
|| code
== SUBREG
)
2414 register int regnum
;
2417 regnum
= REGNO (op
);
2419 regnum
= true_regnum (op
);
2421 if ((letter
== 'M' && !WORDS_BIG_ENDIAN
)
2422 || (letter
== 'L' && WORDS_BIG_ENDIAN
) || letter
== 'D')
2425 fprintf (file
, "%s", reg_names
[regnum
]);
2428 else if (code
== MEM
)
2431 rtx op4
= adjust_address (op
, GET_MODE (op
), 4);
2432 output_address (GET_MODE (op
), XEXP (op4
, 0));
2434 else if (letter
== 'y')
2436 rtx mem_reg
= XEXP (op
, 0);
2437 if (GET_CODE (mem_reg
) == REG
)
2439 register int regnum
= REGNO (mem_reg
);
2440 fprintf (file
, "%s", reg_names
[regnum
]);
2444 output_address (GET_MODE (op
), XEXP (op
, 0));
2446 else if (letter
== 'h' || letter
== 'j')
2449 if (code
== CONST_DOUBLE
)
2451 if (GET_MODE (op
) == DFmode
)
2452 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op
), val
);
2455 val
[0] = CONST_DOUBLE_HIGH (op
);
2456 val
[1] = CONST_DOUBLE_LOW (op
);
2459 else if (code
== CONST_INT
)
2461 val
[0] = (INTVAL (op
) & 0xffffffff00000000LL
) >> 32;
2462 val
[1] = INTVAL (op
) & 0x00000000ffffffffLL
;
2463 if (val
[0] == 0 && val
[1] < 0)
2467 fprintf (file
, "0x%8.8lx", (letter
== 'h') ? val
[0] : val
[1]);
2469 else if (code
== CONST_DOUBLE
)
2473 unsigned long value_long
;
2474 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op
),
2476 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, value_long
);
2481 real_to_decimal (s
, CONST_DOUBLE_REAL_VALUE (op
), sizeof (s
), 0, 1);
2486 else if (code
== UNSPEC
)
2488 print_operand_address (file
, op
);
2491 else if (letter
== 'x' && GET_CODE (op
) == CONST_INT
)
2492 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, 0xffff & INTVAL (op
));
2494 else if (letter
== 'X' && GET_CODE (op
) == CONST_INT
)
2495 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, INTVAL (op
));
2497 else if (letter
== 'd' && GET_CODE (op
) == CONST_INT
)
2498 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (INTVAL (op
)));
2500 else if (letter
== 'z' && GET_CODE (op
) == CONST_INT
&& INTVAL (op
) == 0)
2501 fputs (reg_names
[GP_REG_FIRST
], file
);
2503 else if (letter
== 's' && GET_CODE (op
) == CONST_INT
)
2504 if (INTVAL (op
) < 0)
2509 else if (letter
== 'd' || letter
== 'x' || letter
== 'X' || letter
== 's')
2510 output_operand_lossage ("letter %c was found & insn was not CONST_INT", letter
);
2512 else if (letter
== 'B')
2513 fputs (code
== EQ
? "z" : "n", file
);
2514 else if (letter
== 'b')
2515 fputs (code
== EQ
? "n" : "z", file
);
2516 else if (letter
== 'T')
2517 fputs (code
== EQ
? "f" : "t", file
);
2518 else if (letter
== 't')
2519 fputs (code
== EQ
? "t" : "f", file
);
2521 else if (code
== CONST
2522 && ((GET_CODE (XEXP (op
, 0)) == REG
)
2523 || (GET_CODE (XEXP (op
, 0)) == UNSPEC
)))
2525 print_operand (file
, XEXP (op
, 0), letter
);
2527 else if (code
== CONST
2528 && (GET_CODE (XEXP (op
, 0)) == PLUS
)
2529 && (GET_CODE (XEXP (XEXP (op
, 0), 0)) == REG
)
2530 && (GET_CODE (XEXP (XEXP (op
, 0), 1)) == CONST
))
2532 print_operand_address (file
, XEXP (op
, 0));
2534 else if (letter
== 'm')
2535 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (1L << INTVAL (op
)));
2537 output_addr_const (file
, op
);
2540 /* A C compound statement to output to stdio stream STREAM the
2541 assembler syntax for an instruction operand that is a memory
2542 reference whose address is ADDR. ADDR is an RTL expression.
2544 Possible address classifications and output formats are,
2546 ADDRESS_REG "%0, r0"
2548 ADDRESS_REG with non-zero "%0, <addr_const>"
2551 ADDRESS_REG_INDEX "rA, RB"
2552 (if rA is r0, rA and rB are swapped)
2554 ADDRESS_CONST_INT "r0, <addr_const>"
2556 ADDRESS_SYMBOLIC "rBase, <addr_const>"
2557 (rBase is a base register suitable for the
2562 print_operand_address (FILE * file
, rtx addr
)
2564 struct microblaze_address_info info
;
2565 enum microblaze_address_type type
;
2566 if (!microblaze_classify_address (&info
, addr
, GET_MODE (addr
), 2))
2567 fatal_insn ("insn contains an invalid address !", addr
);
2573 fprintf (file
, "%s,", reg_names
[REGNO (info
.regA
)]);
2574 output_addr_const (file
, info
.offset
);
2576 case ADDRESS_REG_INDEX
:
2577 if (REGNO (info
.regA
) == 0)
2578 /* Make rB == r0 instead of rA == r0. This helps reduce read port
2580 fprintf (file
, "%s,%s", reg_names
[REGNO (info
.regB
)],
2581 reg_names
[REGNO (info
.regA
)]);
2582 else if (REGNO (info
.regB
) != 0)
2583 /* This is a silly swap to help Dhrystone. */
2584 fprintf (file
, "%s,%s", reg_names
[REGNO (info
.regB
)],
2585 reg_names
[REGNO (info
.regA
)]);
2587 case ADDRESS_CONST_INT
:
2588 fprintf (file
, "%s,", reg_names
[REGNO (info
.regA
)]);
2589 output_addr_const (file
, info
.offset
);
2591 case ADDRESS_SYMBOLIC
:
2592 case ADDRESS_SYMBOLIC_TXT_REL
:
2593 case ADDRESS_GOTOFF
:
2597 fprintf (file
, "%s,", reg_names
[REGNO (info
.regA
)]);
2598 output_addr_const (file
, info
.symbol
);
2599 if (type
== ADDRESS_GOTOFF
)
2601 fputs ("@GOT", file
);
2603 else if (type
== ADDRESS_PLT
)
2605 fputs ("@PLT", file
);
2607 else if (type
== ADDRESS_SYMBOLIC_TXT_REL
)
2609 if (info
.offset
!= NULL
&& CONST_INT_P (info
.offset
)
2610 && INTVAL (info
.offset
) > 0)
2612 fprintf (file
, "+");
2613 output_addr_const (file
, info
.offset
);
2615 fputs ("@TXTREL", file
);
2617 else if (type
== ADDRESS_TLS
)
2619 switch (info
.tls_type
)
2622 fputs ("@TLSGD", file
);
2625 fputs ("@TLSLDM", file
);
2628 fputs ("@TLSDTPREL", file
);
2636 case ADDRESS_INVALID
:
2637 fatal_insn ("invalid address", addr
);
2642 /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol
2643 is used, so that we don't emit an .extern for it in
2644 microblaze_asm_file_end. */
2647 microblaze_declare_object (FILE * stream
, const char *name
,
2648 const char *section
, const char *fmt
, int size
)
2651 fputs (section
, stream
);
2652 assemble_name (stream
, name
);
2653 fprintf (stream
, fmt
, size
);
2656 /* Common code to emit the insns (or to write the instructions to a file)
2657 to save/restore registers.
2659 Other parts of the code assume that MICROBLAZE_TEMP1_REGNUM (aka large_reg)
2660 is not modified within save_restore_insns. */
2662 #define BITSET_P(VALUE,BIT) (((VALUE) & (1L << (BIT))) != 0)
2664 /* Save or restore instructions based on whether this is the prologue or
2665 epilogue. prologue is 1 for the prologue. */
2667 save_restore_insns (int prologue
)
2669 rtx base_reg_rtx
, reg_rtx
, mem_rtx
, /* msr_rtx, */ isr_reg_rtx
=
2671 rtx isr_msr_rtx
= 0, insn
;
2672 long mask
= current_frame_info
.mask
;
2673 HOST_WIDE_INT gp_offset
;
2676 if (frame_pointer_needed
2677 && !BITSET_P (mask
, HARD_FRAME_POINTER_REGNUM
- GP_REG_FIRST
))
2683 /* Save registers starting from high to low. The debuggers prefer at least
2684 the return register be stored at func+4, and also it allows us not to
2685 need a nop in the epilog if at least one register is reloaded in
2686 addition to return address. */
2688 /* Pick which pointer to use as a base register. For small frames, just
2689 use the stack pointer. Otherwise, use a temporary register. Save 2
2690 cycles if the save area is near the end of a large frame, by reusing
2691 the constant created in the prologue/epilogue to adjust the stack
2694 gp_offset
= current_frame_info
.gp_offset
;
2696 gcc_assert (gp_offset
> 0);
2698 base_reg_rtx
= stack_pointer_rtx
;
2700 /* For interrupt_handlers, need to save/restore the MSR. */
2701 if (microblaze_is_interrupt_variant ())
2703 isr_mem_rtx
= gen_rtx_MEM (SImode
,
2704 gen_rtx_PLUS (Pmode
, base_reg_rtx
,
2705 GEN_INT (current_frame_info
.
2709 /* Do not optimize in flow analysis. */
2710 MEM_VOLATILE_P (isr_mem_rtx
) = 1;
2711 isr_reg_rtx
= gen_rtx_REG (SImode
, MB_ABI_MSR_SAVE_REG
);
2712 isr_msr_rtx
= gen_rtx_REG (SImode
, ST_REG
);
2715 if (microblaze_is_interrupt_variant () && !prologue
)
2717 emit_move_insn (isr_reg_rtx
, isr_mem_rtx
);
2718 emit_move_insn (isr_msr_rtx
, isr_reg_rtx
);
2719 /* Do not optimize in flow analysis. */
2720 emit_insn (gen_rtx_USE (SImode
, isr_reg_rtx
));
2721 emit_insn (gen_rtx_USE (SImode
, isr_msr_rtx
));
2724 for (regno
= GP_REG_FIRST
; regno
<= GP_REG_LAST
; regno
++)
2726 if (BITSET_P (mask
, regno
- GP_REG_FIRST
))
2728 if (regno
== MB_ABI_SUB_RETURN_ADDR_REGNUM
)
2729 /* Don't handle here. Already handled as the first register. */
2732 reg_rtx
= gen_rtx_REG (SImode
, regno
);
2733 insn
= gen_rtx_PLUS (Pmode
, base_reg_rtx
, GEN_INT (gp_offset
));
2734 mem_rtx
= gen_rtx_MEM (SImode
, insn
);
2735 if (microblaze_is_interrupt_variant () || save_volatiles
)
2736 /* Do not optimize in flow analysis. */
2737 MEM_VOLATILE_P (mem_rtx
) = 1;
2741 insn
= emit_move_insn (mem_rtx
, reg_rtx
);
2742 RTX_FRAME_RELATED_P (insn
) = 1;
2746 insn
= emit_move_insn (reg_rtx
, mem_rtx
);
2749 gp_offset
+= GET_MODE_SIZE (SImode
);
2753 if (microblaze_is_interrupt_variant () && prologue
)
2755 emit_move_insn (isr_reg_rtx
, isr_msr_rtx
);
2756 emit_move_insn (isr_mem_rtx
, isr_reg_rtx
);
2758 /* Do not optimize in flow analysis. */
2759 emit_insn (gen_rtx_USE (SImode
, isr_reg_rtx
));
2760 emit_insn (gen_rtx_USE (SImode
, isr_msr_rtx
));
2763 /* Done saving and restoring */
2767 /* Set up the stack and frame (if desired) for the function. */
2769 microblaze_function_prologue (FILE * file
)
2772 long fsiz
= current_frame_info
.total_size
;
2774 /* Get the function name the same way that toplev.c does before calling
2775 assemble_start_function. This is needed so that the name used here
2776 exactly matches the name used in ASM_DECLARE_FUNCTION_NAME. */
2777 fnname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
2778 if (!flag_inhibit_size_directive
)
2780 fputs ("\t.ent\t", file
);
2781 if (interrupt_handler
&& strcmp (INTERRUPT_HANDLER_NAME
, fnname
))
2782 fputs ("_interrupt_handler", file
);
2783 else if (break_handler
&& strcmp (BREAK_HANDLER_NAME
, fnname
))
2784 fputs ("_break_handler", file
);
2785 else if (fast_interrupt
&& strcmp (FAST_INTERRUPT_NAME
, fnname
))
2786 fputs ("_fast_interrupt", file
);
2788 assemble_name (file
, fnname
);
2790 if (!microblaze_is_interrupt_variant ())
2791 ASM_OUTPUT_TYPE_DIRECTIVE (file
, fnname
, "function");
2794 assemble_name (file
, fnname
);
2795 fputs (":\n", file
);
2797 if (interrupt_handler
&& strcmp (INTERRUPT_HANDLER_NAME
, fnname
))
2798 fputs ("_interrupt_handler:\n", file
);
2799 if (break_handler
&& strcmp (BREAK_HANDLER_NAME
, fnname
))
2800 fputs ("_break_handler:\n", file
);
2801 if (!flag_inhibit_size_directive
)
2803 /* .frame FRAMEREG, FRAMESIZE, RETREG. */
2805 "\t.frame\t%s,%ld,%s\t\t# vars= %ld, regs= %d, args= %d\n",
2806 (reg_names
[(frame_pointer_needed
)
2807 ? HARD_FRAME_POINTER_REGNUM
:
2808 STACK_POINTER_REGNUM
]), fsiz
,
2809 reg_names
[MB_ABI_SUB_RETURN_ADDR_REGNUM
+ GP_REG_FIRST
],
2810 current_frame_info
.var_size
, current_frame_info
.num_gp
,
2811 (int) crtl
->outgoing_args_size
);
2812 fprintf (file
, "\t.mask\t0x%08lx\n", current_frame_info
.mask
);
2816 /* Output extra assembler code at the end of a prologue. */
2818 microblaze_function_end_prologue (FILE * file
)
2820 if (TARGET_STACK_CHECK
)
2822 fprintf (file
, "\t# Stack Check Stub -- Start.\n\t");
2823 fprintf (file
, "ori\tr18,r0,_stack_end\n\t");
2824 fprintf (file
, "cmpu\tr18,r1,r18\n\t");
2825 fprintf (file
, "bgei\tr18,_stack_overflow_exit\n\t");
2826 fprintf (file
, "# Stack Check Stub -- End.\n");
2831 microblaze_elf_asm_cdtor (rtx symbol
, int priority
, bool is_ctor
)
2835 if (priority
!= DEFAULT_INIT_PRIORITY
)
2838 sprintf (buf
, "%s.%.5u",
2839 is_ctor
? ".ctors" : ".dtors",
2840 MAX_INIT_PRIORITY
- priority
);
2841 s
= get_section (buf
, SECTION_WRITE
, NULL_TREE
);
2848 switch_to_section (s
);
2849 assemble_align (POINTER_SIZE
);
2850 fputs ("\t.word\t", asm_out_file
);
2851 output_addr_const (asm_out_file
, symbol
);
2852 fputs ("\n", asm_out_file
);
2855 /* Add a function to the list of static constructors. */
2858 microblaze_elf_asm_constructor (rtx symbol
, int priority
)
2860 microblaze_elf_asm_cdtor (symbol
, priority
, /*is_ctor=*/true);
2863 /* Add a function to the list of static destructors. */
2866 microblaze_elf_asm_destructor (rtx symbol
, int priority
)
2868 microblaze_elf_asm_cdtor (symbol
, priority
, /*is_ctor=*/false);
2871 /* Expand the prologue into a bunch of separate insns. */
2874 microblaze_expand_prologue (void)
2878 const char *arg_name
= 0;
2879 tree fndecl
= current_function_decl
;
2880 tree fntype
= TREE_TYPE (fndecl
);
2881 tree fnargs
= DECL_ARGUMENTS (fndecl
);
2886 CUMULATIVE_ARGS args_so_far_v
;
2887 cumulative_args_t args_so_far
;
2888 rtx mem_rtx
, reg_rtx
;
2890 /* If struct value address is treated as the first argument, make it so. */
2891 if (aggregate_value_p (DECL_RESULT (fndecl
), fntype
)
2892 && !cfun
->returns_pcc_struct
)
2894 tree type
= build_pointer_type (fntype
);
2895 tree function_result_decl
= build_decl (BUILTINS_LOCATION
, PARM_DECL
,
2898 DECL_ARG_TYPE (function_result_decl
) = type
;
2899 TREE_CHAIN (function_result_decl
) = fnargs
;
2900 fnargs
= function_result_decl
;
2903 /* Determine the last argument, and get its name. */
2905 INIT_CUMULATIVE_ARGS (args_so_far_v
, fntype
, NULL_RTX
, 0, 0);
2906 args_so_far
= pack_cumulative_args (&args_so_far_v
);
2907 regno
= GP_ARG_FIRST
;
2909 for (cur_arg
= fnargs
; cur_arg
!= 0; cur_arg
= next_arg
)
2911 tree passed_type
= DECL_ARG_TYPE (cur_arg
);
2912 machine_mode passed_mode
= TYPE_MODE (passed_type
);
2915 if (TREE_ADDRESSABLE (passed_type
))
2917 passed_type
= build_pointer_type (passed_type
);
2918 passed_mode
= Pmode
;
2921 entry_parm
= targetm
.calls
.function_arg (args_so_far
, passed_mode
,
2928 /* passed in a register, so will get homed automatically. */
2929 if (GET_MODE (entry_parm
) == BLKmode
)
2930 words
= (int_size_in_bytes (passed_type
) + 3) / 4;
2932 words
= (GET_MODE_SIZE (GET_MODE (entry_parm
)) + 3) / 4;
2934 regno
= REGNO (entry_parm
) + words
- 1;
2938 regno
= GP_ARG_LAST
+ 1;
2942 targetm
.calls
.function_arg_advance (args_so_far
, passed_mode
,
2945 next_arg
= TREE_CHAIN (cur_arg
);
2948 if (DECL_NAME (cur_arg
))
2949 arg_name
= IDENTIFIER_POINTER (DECL_NAME (cur_arg
));
2955 /* Split parallel insn into a sequence of insns. */
2957 next_arg_reg
= targetm
.calls
.function_arg (args_so_far
, VOIDmode
,
2958 void_type_node
, true);
2959 if (next_arg_reg
!= 0 && GET_CODE (next_arg_reg
) == PARALLEL
)
2961 rtvec adjust
= XVEC (next_arg_reg
, 0);
2962 int num
= GET_NUM_ELEM (adjust
);
2964 for (i
= 0; i
< num
; i
++)
2966 rtx pattern
= RTVEC_ELT (adjust
, i
);
2967 emit_insn (pattern
);
2971 fsiz
= compute_frame_size (get_frame_size ());
2973 if (flag_stack_usage_info
)
2974 current_function_static_stack_size
= fsiz
;
2976 /* If this function is a varargs function, store any registers that
2977 would normally hold arguments ($5 - $10) on the stack. */
2978 if (((TYPE_ARG_TYPES (fntype
) != 0
2979 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
2982 && ((arg_name
[0] == '_'
2983 && strcmp (arg_name
, "__builtin_va_alist") == 0)
2984 || (arg_name
[0] == 'v'
2985 && strcmp (arg_name
, "va_alist") == 0)))))
2987 int offset
= (regno
- GP_ARG_FIRST
+ 1) * UNITS_PER_WORD
;
2988 rtx ptr
= stack_pointer_rtx
;
2990 /* If we are doing svr4-abi, sp has already been decremented by fsiz. */
2991 for (; regno
<= GP_ARG_LAST
; regno
++)
2994 ptr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
, GEN_INT (offset
));
2995 emit_move_insn (gen_rtx_MEM (SImode
, ptr
),
2996 gen_rtx_REG (SImode
, regno
));
2998 offset
+= GET_MODE_SIZE (SImode
);
3004 rtx fsiz_rtx
= GEN_INT (fsiz
);
3006 rtx_insn
*insn
= NULL
;
3007 insn
= emit_insn (gen_subsi3 (stack_pointer_rtx
, stack_pointer_rtx
,
3010 RTX_FRAME_RELATED_P (insn
) = 1;
3012 /* Handle SUB_RETURN_ADDR_REGNUM specially at first. */
3013 if (!crtl
->is_leaf
|| interrupt_handler
)
3015 mem_rtx
= gen_rtx_MEM (SImode
,
3016 gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
3019 if (interrupt_handler
)
3020 /* Do not optimize in flow analysis. */
3021 MEM_VOLATILE_P (mem_rtx
) = 1;
3023 reg_rtx
= gen_rtx_REG (SImode
, MB_ABI_SUB_RETURN_ADDR_REGNUM
);
3024 insn
= emit_move_insn (mem_rtx
, reg_rtx
);
3025 RTX_FRAME_RELATED_P (insn
) = 1;
3028 /* _save_ registers for prologue. */
3029 save_restore_insns (1);
3031 if (frame_pointer_needed
)
3035 insn
= emit_insn (gen_movsi (hard_frame_pointer_rtx
,
3036 stack_pointer_rtx
));
3039 RTX_FRAME_RELATED_P (insn
) = 1;
3043 if ((flag_pic
== 2 || TLS_NEEDS_GOT
)
3044 && df_regs_ever_live_p (MB_ABI_PIC_ADDR_REGNUM
))
3046 if ((flag_pic
== 2 && !TARGET_PIC_DATA_TEXT_REL
) || TLS_NEEDS_GOT
)
3048 SET_REGNO (pic_offset_table_rtx
, MB_ABI_PIC_ADDR_REGNUM
);
3050 emit_insn (gen_set_got (pic_offset_table_rtx
));
3054 SET_REGNO (pic_offset_table_rtx
, MB_ABI_PIC_ADDR_REGNUM
);
3055 /* setting start of text. */
3056 emit_insn (gen_set_text (pic_offset_table_rtx
));
3060 /* If we are profiling, make sure no instructions are scheduled before
3061 the call to mcount. */
3064 emit_insn (gen_blockage ());
3067 /* Do necessary cleanup after a function to restore stack, frame, and regs. */
3069 #define RA_MASK ((long) 0x80000000) /* 1 << 31 */
3070 #define PIC_OFFSET_TABLE_MASK (1 << (PIC_OFFSET_TABLE_REGNUM - GP_REG_FIRST))
3073 microblaze_function_epilogue (FILE *file
)
3077 /* Get the function name the same way that toplev.c does before calling
3078 assemble_start_function. This is needed so that the name used here
3079 exactly matches the name used in ASM_DECLARE_FUNCTION_NAME. */
3080 fnname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3082 if (!flag_inhibit_size_directive
)
3084 fputs ("\t.end\t", file
);
3085 if (interrupt_handler
&& !break_handler
)
3086 fputs ("_interrupt_handler", file
);
3087 else if (break_handler
)
3088 fputs ("_break_handler", file
);
3090 assemble_name (file
, fnname
);
3094 /* Reset state info for each function. */
3095 current_frame_info
= zero_frame_info
;
3097 /* Restore the output file if optimizing the GP (optimizing the GP causes
3098 the text to be diverted to a tempfile, so that data decls come before
3099 references to the data). */
3102 /* Expand the epilogue into a bunch of separate insns. */
3105 microblaze_expand_epilogue (void)
3107 HOST_WIDE_INT fsiz
= current_frame_info
.total_size
;
3108 rtx fsiz_rtx
= GEN_INT (fsiz
);
3112 /* In case of interrupt handlers use addki instead of addi for changing the
3113 stack pointer value. */
3115 if (microblaze_can_use_return_insn ())
3117 emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode
,
3119 MB_ABI_SUB_RETURN_ADDR_REGNUM
)));
3125 /* Restore SUB_RETURN_ADDR_REGNUM at first. This is to prevent the
3126 sequence of load-followed by a use (in rtsd) in every prologue. Saves
3127 a load-use stall cycle :) This is also important to handle alloca.
3128 (See comments for if (frame_pointer_needed) below. */
3130 if (!crtl
->is_leaf
|| interrupt_handler
)
3133 gen_rtx_MEM (SImode
,
3134 gen_rtx_PLUS (Pmode
, stack_pointer_rtx
, const0_rtx
));
3135 if (interrupt_handler
)
3136 /* Do not optimize in flow analysis. */
3137 MEM_VOLATILE_P (mem_rtx
) = 1;
3138 reg_rtx
= gen_rtx_REG (SImode
, MB_ABI_SUB_RETURN_ADDR_REGNUM
);
3139 emit_move_insn (reg_rtx
, mem_rtx
);
3142 /* It is important that this is done after we restore the return address
3143 register (above). When alloca is used, we want to restore the
3144 sub-routine return address only from the current stack top and not
3145 from the frame pointer (which we restore below). (frame_pointer + 0)
3146 might have been over-written since alloca allocates memory on the
3148 if (frame_pointer_needed
)
3149 emit_insn (gen_movsi (stack_pointer_rtx
, hard_frame_pointer_rtx
));
3151 /* _restore_ registers for epilogue. */
3152 save_restore_insns (0);
3153 emit_insn (gen_blockage ());
3154 emit_insn (gen_addsi3 (stack_pointer_rtx
, stack_pointer_rtx
, fsiz_rtx
));
3157 if (crtl
->calls_eh_return
)
3158 emit_insn (gen_addsi3 (stack_pointer_rtx
,
3160 gen_raw_REG (SImode
,
3161 MB_EH_STACKADJ_REGNUM
)));
3163 emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode
, GP_REG_FIRST
+
3164 MB_ABI_SUB_RETURN_ADDR_REGNUM
)));
3168 /* Return nonzero if this function is known to have a null epilogue.
3169 This allows the optimizer to omit jumps to jumps if no stack
3173 microblaze_can_use_return_insn (void)
3175 if (!reload_completed
)
3178 if (df_regs_ever_live_p (MB_ABI_SUB_RETURN_ADDR_REGNUM
) || profile_flag
)
3181 if (current_frame_info
.initialized
)
3182 return current_frame_info
.total_size
== 0;
3184 return compute_frame_size (get_frame_size ()) == 0;
3187 /* Implement TARGET_SECONDARY_RELOAD. */
3190 microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED
, rtx x ATTRIBUTE_UNUSED
,
3191 reg_class_t rclass
, machine_mode mode ATTRIBUTE_UNUSED
,
3192 secondary_reload_info
*sri ATTRIBUTE_UNUSED
)
3194 if (rclass
== ST_REGS
)
3201 microblaze_globalize_label (FILE * stream
, const char *name
)
3203 fputs ("\t.globl\t", stream
);
3204 if (microblaze_is_interrupt_variant ())
3206 if (interrupt_handler
&& strcmp (name
, INTERRUPT_HANDLER_NAME
))
3207 fputs (INTERRUPT_HANDLER_NAME
, stream
);
3208 else if (break_handler
&& strcmp (name
, BREAK_HANDLER_NAME
))
3209 fputs (BREAK_HANDLER_NAME
, stream
);
3210 else if (fast_interrupt
&& strcmp (name
, FAST_INTERRUPT_NAME
))
3211 fputs (FAST_INTERRUPT_NAME
, stream
);
3212 fputs ("\n\t.globl\t", stream
);
3214 assemble_name (stream
, name
);
3215 fputs ("\n", stream
);
3218 /* Returns true if decl should be placed into a "small data" section. */
3220 microblaze_elf_in_small_data_p (const_tree decl
)
3224 if (!TARGET_XLGPOPT
)
3227 /* We want to merge strings, so we never consider them small data. */
3228 if (TREE_CODE (decl
) == STRING_CST
)
3231 /* Functions are never in the small data area. */
3232 if (TREE_CODE (decl
) == FUNCTION_DECL
)
3235 if (TREE_CODE (decl
) == VAR_DECL
&& DECL_SECTION_NAME (decl
))
3237 const char *section
= DECL_SECTION_NAME (decl
);
3238 if (strcmp (section
, ".sdata") == 0
3239 || strcmp (section
, ".sdata2") == 0
3240 || strcmp (section
, ".sbss") == 0
3241 || strcmp (section
, ".sbss2") == 0)
3245 size
= int_size_in_bytes (TREE_TYPE (decl
));
3247 return (size
> 0 && size
<= microblaze_section_threshold
);
3250 /* We need to disable address diff vectors in
3251 case of pic data text relative mode. */
3254 microblaze_gen_pic_addr_dif_vec (void)
3256 return (flag_pic
&& !TARGET_PIC_DATA_TEXT_REL
);
3260 microblaze_select_section (tree decl
, int reloc
, unsigned HOST_WIDE_INT align
)
3262 switch (categorize_decl_for_section (decl
, reloc
))
3264 case SECCAT_RODATA_MERGE_STR
:
3265 case SECCAT_RODATA_MERGE_STR_INIT
:
3266 /* MB binutils have various issues with mergeable string sections and
3267 relaxation/relocation. Currently, turning mergeable sections
3268 into regular readonly sections. */
3270 return readonly_data_section
;
3272 return default_elf_select_section (decl
, reloc
, align
);
3277 Encode info about sections into the RTL based on a symbol's declaration.
3278 The default definition of this hook, default_encode_section_info in
3279 `varasm.c', sets a number of commonly-useful bits in SYMBOL_REF_FLAGS. */
3282 microblaze_encode_section_info (tree decl
, rtx rtl
, int first
)
3284 default_encode_section_info (decl
, rtl
, first
);
3288 expand_pic_symbol_ref (machine_mode mode ATTRIBUTE_UNUSED
, rtx op
)
3291 bool isFunc
= (GET_CODE (op
) == SYMBOL_REF
3292 && (SYMBOL_REF_FLAGS (op
) & SYMBOL_FLAG_FUNCTION
));
3293 result
= (!TARGET_PIC_DATA_TEXT_REL
)
3294 ? gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, op
), UNSPEC_GOTOFF
)
3295 : gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, op
), UNSPEC_TEXT
);
3296 result
= gen_rtx_CONST (Pmode
, result
);
3297 result
= (TARGET_PIC_DATA_TEXT_REL
&& isFunc
)
3298 ? gen_rtx_PLUS (Pmode
, gen_raw_REG (Pmode
,
3299 get_base_reg (op
)), result
)
3300 : gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, result
);
3301 result
= (!TARGET_PIC_DATA_TEXT_REL
)
3302 ? gen_const_mem (Pmode
, result
) : result
;
3308 microblaze_asm_output_mi_thunk (FILE *file
, tree thunk_fndecl ATTRIBUTE_UNUSED
,
3309 HOST_WIDE_INT delta
, HOST_WIDE_INT vcall_offset
,
3312 rtx this_rtx
, funexp
;
3315 reload_completed
= 1;
3316 epilogue_completed
= 1;
3318 /* Mark the end of the (empty) prologue. */
3319 emit_note (NOTE_INSN_PROLOGUE_END
);
3321 /* Find the "this" pointer. If the function returns a structure,
3322 the structure return pointer is in MB_ABI_FIRST_ARG_REGNUM. */
3323 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function
)), function
))
3324 this_rtx
= gen_rtx_REG (Pmode
, (MB_ABI_FIRST_ARG_REGNUM
+ 1));
3326 this_rtx
= gen_rtx_REG (Pmode
, MB_ABI_FIRST_ARG_REGNUM
);
3328 /* Apply the constant offset, if required. */
3330 emit_insn (gen_addsi3 (this_rtx
, this_rtx
, GEN_INT (delta
)));
3332 /* Apply the offset from the vtable, if required. */
3335 rtx vcall_offset_rtx
= GEN_INT (vcall_offset
);
3336 rtx temp1
= gen_rtx_REG (Pmode
, MB_ABI_TEMP1_REGNUM
);
3338 emit_move_insn (temp1
, gen_rtx_MEM (Pmode
, this_rtx
));
3340 rtx loc
= gen_rtx_PLUS (Pmode
, temp1
, vcall_offset_rtx
);
3341 emit_move_insn (temp1
, gen_rtx_MEM (Pmode
, loc
));
3343 emit_insn (gen_addsi3 (this_rtx
, this_rtx
, temp1
));
3346 /* Generate a tail call to the target function. */
3347 if (!TREE_USED (function
))
3349 assemble_external (function
);
3350 TREE_USED (function
) = 1;
3353 funexp
= XEXP (DECL_RTL (function
), 0);
3354 rtx temp2
= gen_rtx_REG (Pmode
, MB_ABI_TEMP2_REGNUM
);
3357 emit_move_insn (temp2
, expand_pic_symbol_ref (Pmode
, funexp
));
3359 emit_move_insn (temp2
, funexp
);
3361 emit_insn (gen_indirect_jump (temp2
));
3363 /* Run just enough of rest_of_compilation. This sequence was
3364 "borrowed" from rs6000.c. */
3365 insn
= get_insns ();
3366 shorten_branches (insn
);
3367 final_start_function (insn
, file
, 1);
3368 final (insn
, file
, 1);
3369 final_end_function ();
3371 reload_completed
= 0;
3372 epilogue_completed
= 0;
3376 microblaze_expand_move (machine_mode mode
, rtx operands
[])
3383 if (!register_operand (op0
, SImode
)
3384 && !register_operand (op1
, SImode
)
3385 && (GET_CODE (op1
) != CONST_INT
|| INTVAL (op1
) != 0))
3387 rtx temp
= force_reg (SImode
, op1
);
3388 emit_move_insn (op0
, temp
);
3391 /* If operands[1] is a constant address invalid for pic, then we need to
3392 handle it just like LEGITIMIZE_ADDRESS does. */
3393 if (GET_CODE (op1
) == SYMBOL_REF
|| GET_CODE (op1
) == LABEL_REF
)
3396 if (microblaze_tls_symbol_p(op1
))
3398 result
= microblaze_legitimize_tls_address (op1
, NULL_RTX
);
3399 emit_move_insn (op0
, result
);
3404 if (reload_in_progress
)
3405 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
3406 result
= expand_pic_symbol_ref (mode
, op1
);
3408 if (TARGET_PIC_DATA_TEXT_REL
&& GET_CODE (op0
) == REG
3409 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3410 result
= force_reg (SImode
, result
);
3412 emit_move_insn (op0
, result
);
3416 if (GET_CODE (op1
) == PLUS
&& GET_CODE (XEXP (op1
,1)) == CONST
)
3418 rtx p0
, p1
, result
, temp
;
3420 p0
= XEXP (XEXP (op1
,1), 0);
3422 if (GET_CODE (p0
) == PLUS
)
3428 if (GET_CODE (p0
) == UNSPEC
&& GET_CODE (p1
) == CONST_INT
3429 && flag_pic
&& TARGET_PIC_DATA_TEXT_REL
)
3431 result
= gen_rtx_CONST (Pmode
, p0
);
3432 result
= gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, result
);
3433 temp
= force_reg (SImode
, result
);
3434 emit_move_insn (op0
, gen_rtx_PLUS (SImode
, temp
, p1
));
3438 /* Handle Case of (const (plus symbol const_int)). */
3439 if (GET_CODE (op1
) == CONST
&& GET_CODE (XEXP (op1
,0)) == PLUS
)
3443 p0
= XEXP (XEXP (op1
, 0), 0);
3444 p1
= XEXP (XEXP (op1
, 0), 1);
3446 if ((GET_CODE (p1
) == CONST_INT
)
3447 && ((GET_CODE (p0
) == UNSPEC
)
3448 || ((GET_CODE (p0
) == SYMBOL_REF
|| GET_CODE (p0
) == LABEL_REF
)
3449 && (flag_pic
== 2 || microblaze_tls_symbol_p (p0
)
3450 || !SMALL_INT (p1
)))))
3452 rtx temp
= force_reg (SImode
, p0
);
3455 if (flag_pic
&& reload_in_progress
)
3456 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
3457 emit_move_insn (op0
, gen_rtx_PLUS (SImode
, temp
, temp2
));
3464 /* Expand shift operations. */
3466 microblaze_expand_shift (rtx operands
[])
3468 gcc_assert ((GET_CODE (operands
[2]) == CONST_INT
)
3469 || (GET_CODE (operands
[2]) == REG
)
3470 || (GET_CODE (operands
[2]) == SUBREG
));
3472 /* Shift by one -- generate pattern. */
3473 if ((GET_CODE (operands
[2]) == CONST_INT
) && (INTVAL (operands
[2]) == 1))
3476 /* Have barrel shifter and shift > 1: use it. */
3477 if (TARGET_BARREL_SHIFT
)
3480 gcc_assert ((GET_CODE (operands
[0]) == REG
)
3481 || (GET_CODE (operands
[0]) == SUBREG
)
3482 || (GET_CODE (operands
[1]) == REG
)
3483 || (GET_CODE (operands
[1]) == SUBREG
));
3485 /* Shift by zero -- copy regs if necessary. */
3486 if (operands
[2] == const0_rtx
3487 && !rtx_equal_p (operands
[0], operands
[1]))
3489 emit_insn (gen_movsi (operands
[0], operands
[1]));
3496 /* Return an RTX indicating where the return address to the
3497 calling function can be found. */
3499 microblaze_return_addr (int count
, rtx frame ATTRIBUTE_UNUSED
)
3504 return get_hard_reg_initial_val (Pmode
,
3505 MB_ABI_SUB_RETURN_ADDR_REGNUM
);
3509 microblaze_eh_return (rtx op0
)
3511 emit_insn (gen_movsi (gen_rtx_MEM (Pmode
, stack_pointer_rtx
), op0
));
3514 /* Queue an .ident string in the queue of top-level asm statements.
3515 If the string size is below the threshold, put it into .sdata2.
3516 If the front-end is done, we must be being called from toplev.c.
3517 In that case, do nothing. */
3519 microblaze_asm_output_ident (const char *string
)
3521 const char *section_asm_op
;
3525 if (symtab
->state
!= PARSING
)
3528 size
= strlen (string
) + 1;
3529 if (size
<= microblaze_section_threshold
)
3530 section_asm_op
= SDATA2_SECTION_ASM_OP
;
3532 section_asm_op
= READONLY_DATA_SECTION_ASM_OP
;
3534 buf
= ACONCAT (("\t.pushsection", section_asm_op
,
3535 "\n\t.ascii \"", string
, "\\0\"\n",
3536 "\t.popsection\n", NULL
));
3537 symtab
->finalize_toplevel_asm (build_string (strlen (buf
), buf
));
3541 microblaze_elf_asm_init_sections (void)
3544 = get_unnamed_section (SECTION_WRITE
, output_section_asm_op
,
3545 SDATA2_SECTION_ASM_OP
);
3548 /* Generate assembler code for constant parts of a trampoline. */
3551 microblaze_asm_trampoline_template (FILE *f
)
3553 fprintf (f
, "\tmfs r18, rpc\n");
3554 fprintf (f
, "\tlwi r3, r18, 16\n");
3555 fprintf (f
, "\tlwi r18, r18, 20\n");
3556 fprintf (f
, "\tbra r18\n");
3557 /* fprintf (f, "\t.word\t0x00000000\t\t# <function address>\n"); */
3558 /* fprintf (f, "\t.word\t0x00000000\t\t# <static chain value>\n"); */
3561 /* Implement TARGET_TRAMPOLINE_INIT. */
3564 microblaze_trampoline_init (rtx m_tramp
, tree fndecl
, rtx chain_value
)
3566 rtx fnaddr
= XEXP (DECL_RTL (fndecl
), 0);
3569 emit_block_move (m_tramp
, assemble_trampoline_template (),
3570 GEN_INT (6*UNITS_PER_WORD
), BLOCK_OP_NORMAL
);
3572 mem
= adjust_address (m_tramp
, SImode
, 16);
3573 emit_move_insn (mem
, chain_value
);
3574 mem
= adjust_address (m_tramp
, SImode
, 20);
3575 emit_move_insn (mem
, fnaddr
);
3578 /* Generate conditional branch -- first, generate test condition,
3579 second, generate correct branch instruction. */
3582 microblaze_expand_conditional_branch (machine_mode mode
, rtx operands
[])
3584 enum rtx_code code
= GET_CODE (operands
[0]);
3585 rtx cmp_op0
= operands
[1];
3586 rtx cmp_op1
= operands
[2];
3587 rtx label1
= operands
[3];
3588 rtx comp_reg
= gen_reg_rtx (SImode
);
3591 gcc_assert ((GET_CODE (cmp_op0
) == REG
) || (GET_CODE (cmp_op0
) == SUBREG
));
3593 /* If comparing against zero, just test source reg. */
3594 if (cmp_op1
== const0_rtx
)
3597 condition
= gen_rtx_fmt_ee (signed_condition (code
), SImode
, comp_reg
, const0_rtx
);
3598 emit_jump_insn (gen_condjump (condition
, label1
));
3601 else if (code
== EQ
|| code
== NE
)
3603 /* Use xor for equal/not-equal comparison. */
3604 emit_insn (gen_xorsi3 (comp_reg
, cmp_op0
, cmp_op1
));
3605 condition
= gen_rtx_fmt_ee (signed_condition (code
), SImode
, comp_reg
, const0_rtx
);
3606 emit_jump_insn (gen_condjump (condition
, label1
));
3610 /* Generate compare and branch in single instruction. */
3611 cmp_op1
= force_reg (mode
, cmp_op1
);
3612 condition
= gen_rtx_fmt_ee (code
, mode
, cmp_op0
, cmp_op1
);
3613 emit_jump_insn (gen_branch_compare(condition
, cmp_op0
, cmp_op1
, label1
));
3618 microblaze_expand_conditional_branch_reg (machine_mode mode
, rtx operands
[])
3620 enum rtx_code code
= GET_CODE (operands
[0]);
3621 rtx cmp_op0
= operands
[1];
3622 rtx cmp_op1
= operands
[2];
3623 rtx label1
= operands
[3];
3624 rtx comp_reg
= gen_reg_rtx (SImode
);
3627 gcc_assert ((GET_CODE (cmp_op0
) == REG
)
3628 || (GET_CODE (cmp_op0
) == SUBREG
));
3630 /* If comparing against zero, just test source reg. */
3631 if (cmp_op1
== const0_rtx
)
3634 condition
= gen_rtx_fmt_ee (signed_condition (code
),
3635 SImode
, comp_reg
, const0_rtx
);
3636 emit_jump_insn (gen_condjump (condition
, label1
));
3638 else if (code
== EQ
)
3640 emit_insn (gen_seq_internal_pat (comp_reg
,
3642 condition
= gen_rtx_EQ (SImode
, comp_reg
, const0_rtx
);
3643 emit_jump_insn (gen_condjump (condition
, label1
));
3645 else if (code
== NE
)
3647 emit_insn (gen_sne_internal_pat (comp_reg
, cmp_op0
,
3649 condition
= gen_rtx_NE (SImode
, comp_reg
, const0_rtx
);
3650 emit_jump_insn (gen_condjump (condition
, label1
));
3654 /* Generate compare and branch in single instruction. */
3655 cmp_op1
= force_reg (mode
, cmp_op1
);
3656 condition
= gen_rtx_fmt_ee (code
, mode
, cmp_op0
, cmp_op1
);
3657 emit_jump_insn (gen_branch_compare (condition
, cmp_op0
,
3663 microblaze_expand_conditional_branch_sf (rtx operands
[])
3666 rtx cmp_op0
= XEXP (operands
[0], 0);
3667 rtx cmp_op1
= XEXP (operands
[0], 1);
3668 rtx comp_reg
= gen_reg_rtx (SImode
);
3670 emit_insn (gen_cstoresf4 (comp_reg
, operands
[0], cmp_op0
, cmp_op1
));
3671 condition
= gen_rtx_NE (SImode
, comp_reg
, const0_rtx
);
3672 emit_jump_insn (gen_condjump (condition
, operands
[3]));
3675 /* Implement TARGET_FRAME_POINTER_REQUIRED. */
3678 microblaze_frame_pointer_required (void)
3680 /* If the function contains dynamic stack allocations, we need to
3681 use the frame pointer to access the static parts of the frame. */
3682 if (cfun
->calls_alloca
)
3688 microblaze_expand_divide (rtx operands
[])
3690 /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */
3692 rtx regt1
= gen_reg_rtx (SImode
);
3693 rtx reg18
= gen_rtx_REG (SImode
, R_TMP
);
3694 rtx regqi
= gen_reg_rtx (QImode
);
3695 rtx_code_label
*div_label
= gen_label_rtx ();
3696 rtx_code_label
*div_end_label
= gen_label_rtx ();
3697 rtx div_table_rtx
= gen_rtx_SYMBOL_REF (QImode
,"_divsi3_table");
3700 rtx_insn
*jump
, *cjump
, *insn
;
3702 insn
= emit_insn (gen_iorsi3 (regt1
, operands
[1], operands
[2]));
3703 cjump
= emit_jump_insn_after (gen_cbranchsi4 (
3704 gen_rtx_GTU (SImode
, regt1
, GEN_INT (15)),
3705 regt1
, GEN_INT (15), div_label
), insn
);
3706 LABEL_NUSES (div_label
) = 1;
3707 JUMP_LABEL (cjump
) = div_label
;
3708 emit_insn (gen_rtx_CLOBBER (SImode
, reg18
));
3710 emit_insn (gen_ashlsi3_bshift (regt1
, operands
[1], GEN_INT(4)));
3711 emit_insn (gen_addsi3 (regt1
, regt1
, operands
[2]));
3712 mem_rtx
= gen_rtx_MEM (QImode
,
3713 gen_rtx_PLUS (Pmode
, regt1
, div_table_rtx
));
3715 insn
= emit_insn (gen_movqi (regqi
, mem_rtx
));
3716 insn
= emit_insn (gen_movsi (operands
[0], gen_rtx_SUBREG (SImode
, regqi
, 0)));
3717 jump
= emit_jump_insn_after (gen_jump (div_end_label
), insn
);
3718 JUMP_LABEL (jump
) = div_end_label
;
3719 LABEL_NUSES (div_end_label
) = 1;
3722 emit_label (div_label
);
3723 ret
= emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode
, "__divsi3"),
3724 operands
[0], LCT_NORMAL
,
3725 GET_MODE (operands
[0]),
3726 operands
[1], GET_MODE (operands
[1]),
3727 operands
[2], GET_MODE (operands
[2]));
3728 if (ret
!= operands
[0])
3729 emit_move_insn (operands
[0], ret
);
3731 emit_label (div_end_label
);
3732 emit_insn (gen_blockage ());
3735 /* Implement TARGET_FUNCTION_VALUE. */
3737 microblaze_function_value (const_tree valtype
,
3738 const_tree func ATTRIBUTE_UNUSED
,
3739 bool outgoing ATTRIBUTE_UNUSED
)
3741 return LIBCALL_VALUE (TYPE_MODE (valtype
));
3744 /* Implement TARGET_SCHED_ADJUST_COST. */
3746 microblaze_adjust_cost (rtx_insn
*, int dep_type
, rtx_insn
*, int cost
,
3749 if (dep_type
== REG_DEP_OUTPUT
|| dep_type
== 0)
3754 /* Implement TARGET_LEGITIMATE_CONSTANT_P.
3756 At present, GAS doesn't understand li.[sd], so don't allow it
3757 to be generated at present. */
3759 microblaze_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED
, rtx x
)
3762 if (microblaze_cannot_force_const_mem(mode
, x
))
3765 if (GET_CODE (x
) == CONST_DOUBLE
)
3767 return microblaze_const_double_ok (x
, GET_MODE (x
));
3770 /* Handle Case of (const (plus unspec const_int)). */
3771 if (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
,0)) == PLUS
)
3775 p0
= XEXP (XEXP (x
, 0), 0);
3776 p1
= XEXP (XEXP (x
, 0), 1);
3778 if (GET_CODE(p1
) == CONST_INT
)
3780 /* Const offset from UNSPEC is not supported. */
3781 if ((GET_CODE (p0
) == UNSPEC
))
3784 if ((GET_CODE (p0
) == SYMBOL_REF
|| GET_CODE (p0
) == LABEL_REF
)
3785 && (microblaze_tls_symbol_p (p0
) || !SMALL_INT (p1
)))
3794 get_branch_target (rtx branch
)
3796 if (CALL_P (branch
))
3800 call
= XVECEXP (PATTERN (branch
), 0, 0);
3801 if (GET_CODE (call
) == SET
)
3802 call
= SET_SRC (call
);
3803 if (GET_CODE (call
) != CALL
)
3805 return XEXP (XEXP (call
, 0), 0);
3811 /* Heuristics to identify where to insert at the
3812 fall through path of the caller function. If there
3813 is a call after the caller branch delay slot then
3814 we dont generate the instruction prefetch instruction.
3816 Scan up to 32 instructions after the call and checks
3817 for the JUMP and call instruction . If there is a call
3818 or JUMP instruction in the range of 32 instruction "wic"
3819 instruction wont be generated. Otherwise insert the "wic"
3820 instruction in the fall through of the call instruction
3821 four instruction after the call. before_4 is used for
3822 the position to insert "wic" instructions. before_16 is
3823 used to check for call and JUMP instruction for first
3827 insert_wic_for_ilb_runout (rtx_insn
*first
)
3830 rtx_insn
*before_4
= 0;
3831 rtx_insn
*before_16
= 0;
3832 int addr_offset
= 0;
3834 int wic_addr0
= 128 * 4;
3836 int first_addr
= INSN_ADDRESSES (INSN_UID (first
));
3838 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3841 addr_offset
= INSN_ADDRESSES (INSN_UID (insn
)) - first_addr
;
3842 length
= get_attr_length (insn
);
3843 if (before_4
== 0 && addr_offset
+ length
>= 4 * 4)
3848 if (before_16
== 0 && addr_offset
+ length
>= 14 * 4)
3850 if (CALL_P (insn
) || tablejump_p (insn
, 0, 0))
3852 if (addr_offset
+ length
>= 32 * 4)
3854 gcc_assert (before_4
&& before_16
);
3855 if (wic_addr0
> 4 * 4)
3858 emit_insn_before (gen_iprefetch
3859 (gen_int_mode (addr_offset
, SImode
)),
3861 recog_memoized (insn
);
3862 INSN_LOCATION (insn
) = INSN_LOCATION (before_4
);
3863 INSN_ADDRESSES_NEW (insn
, INSN_ADDRESSES (INSN_UID (before_4
)));
3870 /* Insert instruction prefetch instruction at the fall
3871 through path of the function call. */
3878 basic_block bb
, prev
= 0;
3879 rtx branch_target
= 0;
3881 shorten_branches (get_insns ());
3883 for (i
= 0; i
< n_basic_blocks_for_fn (cfun
) - 1; i
++)
3887 bool simple_loop
= false;
3889 bb
= BASIC_BLOCK_FOR_FN (cfun
, i
);
3894 if ((prev
!= 0) && (prev
!= bb
))
3899 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
3907 for (insn
= BB_END (bb
); insn
; insn
= PREV_INSN (insn
))
3909 if (INSN_P (insn
) && !simple_loop
3912 if ((branch_target
= get_branch_target (insn
)))
3913 insert_wic_for_ilb_runout (
3914 next_active_insn (next_active_insn (insn
)));
3916 if (insn
== BB_HEAD (bb
))
3922 /* The reorg function defined through the macro
3923 TARGET_MACHINE_DEPENDENT_REORG. */
3926 microblaze_machine_dependent_reorg (void)
3928 if (TARGET_PREFETCH
)
3930 compute_bb_for_insn ();
3931 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
3932 shorten_branches (get_insns ());
3934 loop_optimizer_finalize ();
3935 free_bb_for_insn ();
3940 /* Implement TARGET_CONSTANT_ALIGNMENT. */
3942 static HOST_WIDE_INT
3943 microblaze_constant_alignment (const_tree exp
, HOST_WIDE_INT align
)
3945 if (TREE_CODE (exp
) == STRING_CST
|| TREE_CODE (exp
) == CONSTRUCTOR
)
3946 return MAX (align
, BITS_PER_WORD
);
3950 /* Implement TARGET_STARTING_FRAME_OFFSET. */
3952 static HOST_WIDE_INT
3953 microblaze_starting_frame_offset (void)
3955 return (crtl
->outgoing_args_size
+ FIRST_PARM_OFFSET(FNDECL
));
3958 #undef TARGET_ENCODE_SECTION_INFO
3959 #define TARGET_ENCODE_SECTION_INFO microblaze_encode_section_info
3961 #undef TARGET_ASM_GLOBALIZE_LABEL
3962 #define TARGET_ASM_GLOBALIZE_LABEL microblaze_globalize_label
3964 #undef TARGET_ASM_FUNCTION_PROLOGUE
3965 #define TARGET_ASM_FUNCTION_PROLOGUE microblaze_function_prologue
3967 #undef TARGET_ASM_FUNCTION_EPILOGUE
3968 #define TARGET_ASM_FUNCTION_EPILOGUE microblaze_function_epilogue
3970 #undef TARGET_RTX_COSTS
3971 #define TARGET_RTX_COSTS microblaze_rtx_costs
3973 #undef TARGET_CANNOT_FORCE_CONST_MEM
3974 #define TARGET_CANNOT_FORCE_CONST_MEM microblaze_cannot_force_const_mem
3976 #undef TARGET_ADDRESS_COST
3977 #define TARGET_ADDRESS_COST microblaze_address_cost
3979 #undef TARGET_ATTRIBUTE_TABLE
3980 #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table
3982 #undef TARGET_IN_SMALL_DATA_P
3983 #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p
3985 #undef TARGET_ASM_SELECT_SECTION
3986 #define TARGET_ASM_SELECT_SECTION microblaze_select_section
3988 #undef TARGET_HAVE_SRODATA_SECTION
3989 #define TARGET_HAVE_SRODATA_SECTION true
3991 #undef TARGET_ASM_FUNCTION_END_PROLOGUE
3992 #define TARGET_ASM_FUNCTION_END_PROLOGUE \
3993 microblaze_function_end_prologue
3995 #undef TARGET_ARG_PARTIAL_BYTES
3996 #define TARGET_ARG_PARTIAL_BYTES function_arg_partial_bytes
3998 #undef TARGET_FUNCTION_ARG
3999 #define TARGET_FUNCTION_ARG microblaze_function_arg
4001 #undef TARGET_FUNCTION_ARG_ADVANCE
4002 #define TARGET_FUNCTION_ARG_ADVANCE microblaze_function_arg_advance
4004 #undef TARGET_CAN_ELIMINATE
4005 #define TARGET_CAN_ELIMINATE microblaze_can_eliminate
4007 #undef TARGET_LEGITIMIZE_ADDRESS
4008 #define TARGET_LEGITIMIZE_ADDRESS microblaze_legitimize_address
4010 #undef TARGET_LEGITIMATE_ADDRESS_P
4011 #define TARGET_LEGITIMATE_ADDRESS_P microblaze_legitimate_address_p
4014 #define TARGET_LRA_P hook_bool_void_false
4016 #undef TARGET_FRAME_POINTER_REQUIRED
4017 #define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required
4019 #undef TARGET_ASM_TRAMPOLINE_TEMPLATE
4020 #define TARGET_ASM_TRAMPOLINE_TEMPLATE microblaze_asm_trampoline_template
4022 #undef TARGET_TRAMPOLINE_INIT
4023 #define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init
4025 #undef TARGET_PROMOTE_FUNCTION_MODE
4026 #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
4028 #undef TARGET_FUNCTION_VALUE
4029 #define TARGET_FUNCTION_VALUE microblaze_function_value
4031 #undef TARGET_SECONDARY_RELOAD
4032 #define TARGET_SECONDARY_RELOAD microblaze_secondary_reload
4034 #undef TARGET_ASM_OUTPUT_MI_THUNK
4035 #define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk
4037 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
4038 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true
4040 #undef TARGET_SCHED_ADJUST_COST
4041 #define TARGET_SCHED_ADJUST_COST microblaze_adjust_cost
4043 #undef TARGET_ASM_INIT_SECTIONS
4044 #define TARGET_ASM_INIT_SECTIONS microblaze_elf_asm_init_sections
4046 #undef TARGET_OPTION_OVERRIDE
4047 #define TARGET_OPTION_OVERRIDE microblaze_option_override
4049 #undef TARGET_LEGITIMATE_CONSTANT_P
4050 #define TARGET_LEGITIMATE_CONSTANT_P microblaze_legitimate_constant_p
4052 #undef TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC
4053 #define TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC microblaze_gen_pic_addr_dif_vec
4055 #undef TARGET_MACHINE_DEPENDENT_REORG
4056 #define TARGET_MACHINE_DEPENDENT_REORG microblaze_machine_dependent_reorg
4058 #undef TARGET_HARD_REGNO_MODE_OK
4059 #define TARGET_HARD_REGNO_MODE_OK microblaze_hard_regno_mode_ok
4061 #undef TARGET_MODES_TIEABLE_P
4062 #define TARGET_MODES_TIEABLE_P microblaze_modes_tieable_p
4064 #undef TARGET_CONSTANT_ALIGNMENT
4065 #define TARGET_CONSTANT_ALIGNMENT microblaze_constant_alignment
4067 #undef TARGET_STARTING_FRAME_OFFSET
4068 #define TARGET_STARTING_FRAME_OFFSET microblaze_starting_frame_offset
4070 struct gcc_target targetm
= TARGET_INITIALIZER
;
4072 #include "gt-microblaze.h"