gcc/config/or1k/or1k.h

   1 /* Target Definitions for OpenRISC.
   2    Copyright (C) 2018-2021 Free Software Foundation, Inc.
   3    Contributed by Stafford Horne.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_OR1K_H
  22 #define GCC_OR1K_H
  23
  24 #include "config/or1k/or1k-opts.h"
  25
  26 /* Names to predefine in the preprocessor for this target machine.  */
  27 #define TARGET_CPU_CPP_BUILTINS()               \
  28   do                                            \
  29     {                                           \
  30       builtin_define ("__OR1K__");              \
  31       builtin_define ("__OR1K_DELAY__");        \
  32       builtin_define ("__or1k__");              \
  33       if (TARGET_CMOV)                          \
  34         builtin_define ("__or1k_cmov__");       \
  35       if (TARGET_HARD_FLOAT)                    \
  36         builtin_define ("__or1k_hard_float__"); \
  37       builtin_assert ("cpu=or1k");              \
  38       builtin_assert ("machine=or1k");          \
  39     }                                           \
  40   while (0)
  41
  42 #define TARGET_CMODEL_SMALL \
  43   (or1k_code_model == CMODEL_SMALL)
  44 #define TARGET_CMODEL_LARGE \
  45   (or1k_code_model == CMODEL_LARGE)
  46
  47 /* Storage layout.  */
  48
  49 #define DEFAULT_SIGNED_CHAR 1
  50 #define BITS_BIG_ENDIAN 0
  51 #define BYTES_BIG_ENDIAN 1
  52 #define WORDS_BIG_ENDIAN 1
  53 #define BITS_PER_WORD 32
  54 #define UNITS_PER_WORD 4
  55 #define POINTER_SIZE 32
  56 #define BIGGEST_ALIGNMENT 32
  57 #define STRICT_ALIGNMENT 1
  58 #define FUNCTION_BOUNDARY 32
  59 #define PARM_BOUNDARY 32
  60 #define STACK_BOUNDARY 32
  61 #define PREFERRED_STACK_BOUNDARY 32
  62 #define MAX_FIXED_MODE_SIZE 64
  63
  64 /* Layout of source language data types.  */
  65
  66 #define INT_TYPE_SIZE 32
  67 #define SHORT_TYPE_SIZE 16
  68 #define LONG_TYPE_SIZE 32
  69 #define LONG_LONG_TYPE_SIZE 64
  70 #define FLOAT_TYPE_SIZE 32
  71 #define DOUBLE_TYPE_SIZE 64
  72 #define LONG_DOUBLE_TYPE_SIZE 64
  73 #define WCHAR_TYPE_SIZE 32
  74
  75 #undef SIZE_TYPE
  76 #define SIZE_TYPE "unsigned int"
  77
  78 #undef PTRDIFF_TYPE
  79 #define PTRDIFF_TYPE "int"
  80
  81 #undef WCHAR_TYPE
  82 #define WCHAR_TYPE "unsigned int"
  83
  84 /* Describing Relative Costs of Operations.  */
  85 #define MOVE_MAX 4
  86 #define SLOW_BYTE_ACCESS 1
  87
  88 /* Register usage, class and contents.  */
  89
  90 /* In OpenRISC there are 32 general purpose registers with the following
  91    designations:
  92
  93    r0    always 0
  94    r1    stack pointer
  95    r2    frame pointer (optional)
  96    r3    arg 0
  97    r4    arg 1
  98    r5    arg 2
  99    r6    arg 3
 100    r7    arg 4
 101    r8    arg 5
 102    r9    function call return link address
 103    r10   thread local storage
 104    r11   function return value & static chain
 105    r12   function return value high (upper 64-bit)
 106    r13   temporary (used in prologue and epilogue)
 107    r14   callee saved
 108    r15   temporary
 109    r16   callee saved & pic base register
 110    r17   temporary
 111    r18   callee saved
 112    r19   temporary
 113    r20   callee saved
 114    r21   temporary
 115    r22   callee saved
 116    r23   temporary
 117    r24   callee saved
 118    r25   temporary
 119    r26   callee saved
 120    r27   temporary
 121    r28   callee saved
 122    r29   temporary
 123    r30   callee saved
 124    r31   temporary
 125
 126    r32   soft argument pointer
 127    r33   soft frame pointer
 128    r34   SR[F] (bit) register
 129
 130    This ABI has no adjacent call-saved register, which means that
 131    DImode/DFmode pseudos cannot be call-saved and will always be
 132    spilled across calls.  To solve this without changing the ABI,
 133    remap the compiler internal register numbers to place the even
 134    call-saved registers r16-r30 in 24-31, and the odd call-clobbered
 135    registers r17-r31 in 16-23.  */
 136
 137 #define FIRST_PSEUDO_REGISTER  35
 138
 139 #define HW_TO_GCC_REGNO(X)              \
 140   ((X) < 16 || (X) > 31 ? (X)           \
 141    : (X) & 1 ? ((X) - 16) / 2 + 16      \
 142    : ((X) - 16) / 2 + 24)
 143
 144 #define GCC_TO_HW_REGNO(X)              \
 145   ((X) < 16 || (X) > 31 ? (X)           \
 146    : (X) < 24 ? ((X) - 16) * 2 + 17     \
 147    : ((X) - 24) * 2 + 16)
 148
 149 #define DBX_REGISTER_NUMBER(X)  GCC_TO_HW_REGNO(X)
 150
 151 #define REGISTER_NAMES { \
 152   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",   \
 153   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",  \
 154   "r17",  "r19",  "r21",  "r23",  "r25",  "r27",  "r29",  "r31",  \
 155   "r16",  "r18",  "r20",  "r22",  "r24",  "r26",  "r28",  "r30",  \
 156   "?ap",  "?fp",  "?sr_f" }
 157
 158 #define FIXED_REGISTERS         \
 159 { 1, 1, 0, 0, 0, 0, 0, 0,       \
 160   0, 0, 1, 0, 0, 0, 0, 0,       \
 161   0, 0, 0, 0, 0, 0, 0, 0,       \
 162   0, 0, 0, 0, 0, 0, 0, 0,       \
 163   1, 1, 1 }
 164
 165 /* Caller saved/temporary registers + args + fixed */
 166 #define CALL_USED_REGISTERS     \
 167 { 1, 1, 0, 1, 1, 1, 1, 1,       \
 168   1, 1, 1, 1, 1, 1, 0, 1,       \
 169   1, 1, 1, 1, 1, 1, 1, 1,       \
 170   0, 0, 0, 0, 0, 0, 0, 0,       \
 171   1, 1, 1 }
 172
 173 /* List the order in which to allocate registers.  Each register must
 174    be listed once, even those in FIXED_REGISTERS.
 175
 176    ??? Note that placing REAL_PIC_OFFSET_TABLE_REGNUM (r16 = 24) first
 177    happens to make it most likely selected *as* the pic register when
 178    compiling without optimization, simply because the pic pseudo happens
 179    to be allocated with the lowest pseudo regno.  */
 180
 181 #define REG_ALLOC_ORDER { \
 182   16, 17, 18, 19, 20, 21, 22, 23,       /* r17-r31 (odd), non-saved */  \
 183   13, 15,                               /* non-saved */                 \
 184   12, 11,                               /* non-saved return values */   \
 185   8, 7, 6, 5, 4, 3,                     /* non-saved argument regs */   \
 186   24,                                   /* r16, saved, pic reg */       \
 187   25, 26, 27, 28, 29, 30, 31,           /* r18-r31 (even), saved */     \
 188   14,                                   /* r14, saved */                \
 189   2,                                    /* saved hard frame pointer */  \
 190   9,                                    /* saved return address */      \
 191   0,                                    /* fixed zero reg */            \
 192   1,                                    /* fixed stack pointer */       \
 193   10,                                   /* fixed thread pointer */      \
 194   32, 33, 34,                           /* fixed ap, fp, sr[f], */      \
 195 }
 196
 197 enum reg_class
 198 {
 199   NO_REGS,
 200   SIBCALL_REGS,
 201   DOUBLE_REGS,
 202   GOT_REGS,
 203   GENERAL_REGS,
 204   FLAG_REGS,
 205   ALL_REGS,
 206   LIM_REG_CLASSES
 207 };
 208
 209 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 210
 211 #define REG_CLASS_NAMES {       \
 212   "NO_REGS",                    \
 213   "SIBCALL_REGS",               \
 214   "DOUBLE_REGS",                \
 215   "GOT_REGS",                   \
 216   "GENERAL_REGS",               \
 217   "FLAG_REGS",                  \
 218   "ALL_REGS" }
 219
 220 /* The SIBCALL_REGS must be call-clobbered, and not used as a temporary
 221    in the epilogue.  This excludes R9 (LR), R11 (STATIC_CHAIN), and
 222    R13 (PE_TMP_REGNUM).  */
 223 #define SIBCALL_REGS_MASK  0x00ff95f8u
 224
 225 #define REG_CLASS_CONTENTS      \
 226 { { 0x00000000, 0x00000000 },   \
 227   { SIBCALL_REGS_MASK,   0 },   \
 228   { 0x7f7ffffe, 0x00000000 },   \
 229   { 0xfffffdff, 0x00000000 },   \
 230   { 0xffffffff, 0x00000003 },   \
 231   { 0x00000000, 0x00000004 },   \
 232   { 0xffffffff, 0x00000007 }    \
 233 }
 234
 235 /* A C expression whose value is a register class containing hard
 236    register REGNO.  In general there is more that one such class;
 237    choose a class which is "minimal", meaning that no smaller class
 238    also contains the register.  */
 239 #define REGNO_REG_CLASS(REGNO) \
 240   ((REGNO) >= SR_F_REGNUM ? FLAG_REGS \
 241    : (REGNO) < 32 && ((SIBCALL_REGS_MASK >> (REGNO)) & 1) ? SIBCALL_REGS \
 242    : GENERAL_REGS)
 243
 244 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)               \
 245 do {                                                    \
 246   if (GET_MODE_CLASS (MODE) == MODE_INT                 \
 247       && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)         \
 248     (MODE) = word_mode;                                 \
 249 } while (0)
 250
 251 /* A macro whose definition is the name of the class to which a valid
 252    base register must belong.  A base register is one used in an
 253    address which is the register value plus a displacement.  */
 254 #define BASE_REG_CLASS GENERAL_REGS
 255
 256 #define INDEX_REG_CLASS NO_REGS
 257
 258 /* Assembly definitions.  */
 259
 260 #define ASM_APP_ON ""
 261 #define ASM_APP_OFF ""
 262
 263 #define ASM_COMMENT_START "# "
 264
 265 #define GLOBAL_ASM_OP "\t.global\t"
 266 #define TEXT_SECTION_ASM_OP "\t.section\t.text"
 267 #define DATA_SECTION_ASM_OP "\t.section\t.data"
 268 #define BSS_SECTION_ASM_OP "\t.section\t.bss"
 269 #define SBSS_SECTION_ASM_OP "\t.section\t.sbss"
 270
 271 /* This is how to output an assembler line
 272    that says to advance the location counter
 273    to a multiple of 2**LOG bytes.  */
 274 #define ASM_OUTPUT_ALIGN(FILE,LOG)                      \
 275   do                                                    \
 276     {                                                   \
 277       if ((LOG) != 0)                                   \
 278         fprintf (FILE, "\t.align %d\n", 1 << (LOG));    \
 279     }                                                   \
 280   while (0)
 281
 282 /* This is used in crtstuff to create call stubs in the
 283    _init() and _fini() functions.  Defining this here saves
 284    a few bytes created by the dummy call_xxx() functions.  */
 285 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)      \
 286   asm (SECTION_OP "\n"                                  \
 287 "       l.jal " #FUNC "\n"                              \
 288 "        l.nop\n"                                       \
 289 "       .previous");
 290
 291
 292 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) (code == '#')
 293
 294 /* Calling convention definitions.  */
 295 #define CUMULATIVE_ARGS int
 296 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 297   do { (CUM) = 0; } while (0)
 298
 299
 300 /* Trampolines, for nested functions */
 301 #define TRAMPOLINE_SIZE      20
 302 #define TRAMPOLINE_ALIGNMENT 32
 303
 304 /* Pointer mode */
 305 #define Pmode SImode
 306 #define FUNCTION_MODE SImode
 307 #define STACK_POINTER_REGNUM SP_REGNUM
 308 #define FRAME_POINTER_REGNUM SFP_REGNUM
 309 #define HARD_FRAME_POINTER_REGNUM HFP_REGNUM
 310 #define STATIC_CHAIN_REGNUM RV_REGNUM
 311
 312 /* The register number of the arg pointer register, which is used to
 313    access the function's argument list.  */
 314 #define ARG_POINTER_REGNUM AP_REGNUM
 315
 316 /* Position Independent Code.  See or1k_init_pic_reg.  */
 317 #define REAL_PIC_OFFSET_TABLE_REGNUM  HW_TO_GCC_REGNO (16)
 318
 319 /* ??? Follow i386 in working around gimple costing estimation, which
 320    happens without properly initializing the pic_offset_table pseudo.  */
 321 #define PIC_OFFSET_TABLE_REGNUM \
 322   (pic_offset_table_rtx ? INVALID_REGNUM : REAL_PIC_OFFSET_TABLE_REGNUM)
 323
 324 /* A C expression that is nonzero if REGNO is the number of a hard
 325    register in which function arguments are sometimes passed.  */
 326 #define FUNCTION_ARG_REGNO_P(r) (r >= 3 && r <= 8)
 327
 328 #define MAX_REGS_PER_ADDRESS 1
 329
 330 /* The ELIMINABLE_REGS macro specifies a table of register pairs used to
 331    eliminate unneeded registers that point into the stack frame. Note,
 332    the only elimination attempted by the compiler is to replace references
 333    to the frame pointer with references to the stack pointer.  */
 334
 335 #define ELIMINABLE_REGS                                 \
 336 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },        \
 337  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },   \
 338  { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM },        \
 339  { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM }}
 340
 341 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 342   do {                                                  \
 343     (OFFSET) = or1k_initial_elimination_offset ((FROM), (TO)); \
 344   } while (0)
 345
 346 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
 347 #define REGNO_OK_FOR_BASE_P(REGNO)  ((REGNO) <= SFP_REGNUM)
 348
 349 /* If defined, the maximum amount of space required for outgoing
 350    arguments will be computed and placed into the variable
 351    'crtl->outgoing_args_size'.  No space will be pushed
 352    onto the stack for each call; instead, the function prologue
 353    should increase the stack frame size by this amount.  */
 354 #define ACCUMULATE_OUTGOING_ARGS 1
 355
 356 /* Stack layout and stack pointer usage.  */
 357
 358 /* This plus ARG_POINTER_REGNUM points to the first word of incoming args.  */
 359 #define FIRST_PARM_OFFSET(FNDECL) (0)
 360
 361 /* This plus STACK_POINTER_REGNUM points to the first work of outgoing args.  */
 362 #define STACK_POINTER_OFFSET (0)
 363
 364 /* Define this macro if pushing a word onto the stack moves the stack
 365    pointer to a smaller address.  */
 366 #define STACK_GROWS_DOWNWARD 1
 367
 368 #define FRAME_GROWS_DOWNWARD 1
 369
 370 /* An alias for a machine mode name.  This is the machine mode that
 371    elements of a jump-table should have.  */
 372 #define CASE_VECTOR_MODE SImode
 373
 374 #define STORE_FLAG_VALUE 1
 375
 376 /* Indicates how loads of narrow mode values are loaded into words.  */
 377 #define LOAD_EXTEND_OP(MODE) (ZERO_EXTEND)
 378
 379 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 380    the stack pointer does not matter.  */
 381 #define EXIT_IGNORE_STACK 1
 382
 383 /* Macros related to the access of the stack frame chain.  */
 384 #define INITIAL_FRAME_ADDRESS_RTX  or1k_initial_frame_addr ()
 385 #define DYNAMIC_CHAIN_ADDRESS      or1k_dynamic_chain_addr
 386 #define RETURN_ADDR_RTX            or1k_return_addr
 387
 388 /* Always pass the SYMBOL_REF for direct calls to the expanders.  */
 389 #define NO_FUNCTION_CSE 1
 390
 391 #define NO_PROFILE_COUNTERS 1
 392
 393 /* Emit rtl for profiling.  Output assembler code to call "_mcount" for
 394    profiling a function entry.  */
 395 #define PROFILE_HOOK(LABEL)  or1k_profile_hook()
 396
 397 /* All the work is done in PROFILE_HOOK, but this is still required.  */
 398 #define FUNCTION_PROFILER(STREAM, LABELNO) do { } while (0)
 399
 400 /* Dwarf 2 Support */
 401 #define DWARF2_DEBUGGING_INFO 1
 402 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM)
 403 #define DWARF_FRAME_RETURN_COLUMN LR_REGNUM
 404
 405 /* Describe how we implement __builtin_eh_return.  */
 406 #define EH_RETURN_REGNUM HW_TO_GCC_REGNO (23)
 407 /* Use r25, r27, r29 and r31 (clobber regs) for exception data.
 408    Recall that these are remapped consecutively.  */
 409 #define EH_RETURN_DATA_REGNO(N) \
 410     ((N) < 4 ? HW_TO_GCC_REGNO (25) + (N) : INVALID_REGNUM)
 411 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_RETURN_REGNUM)
 412
 413 /* Select a format to encode pointers in exception handling data.  */
 414 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
 415   (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
 416
 417 #endif /* GCC_OR1K_H */