1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
32 #include "cfgcleanup.h"
34 #include "insn-config.h"
45 #include "diagnostic-core.h"
50 #include "rtlhooks-def.h"
51 #include "tree-pass.h"
55 #ifndef LOAD_EXTEND_OP
56 #define LOAD_EXTEND_OP(M) UNKNOWN
59 /* The basic idea of common subexpression elimination is to go
60 through the code, keeping a record of expressions that would
61 have the same value at the current scan point, and replacing
62 expressions encountered with the cheapest equivalent expression.
64 It is too complicated to keep track of the different possibilities
65 when control paths merge in this code; so, at each label, we forget all
66 that is known and start fresh. This can be described as processing each
67 extended basic block separately. We have a separate pass to perform
70 Note CSE can turn a conditional or computed jump into a nop or
71 an unconditional jump. When this occurs we arrange to run the jump
72 optimizer after CSE to delete the unreachable code.
74 We use two data structures to record the equivalent expressions:
75 a hash table for most expressions, and a vector of "quantity
76 numbers" to record equivalent (pseudo) registers.
78 The use of the special data structure for registers is desirable
79 because it is faster. It is possible because registers references
80 contain a fairly small number, the register number, taken from
81 a contiguously allocated series, and two register references are
82 identical if they have the same number. General expressions
83 do not have any such thing, so the only way to retrieve the
84 information recorded on an expression other than a register
85 is to keep it in a hash table.
87 Registers and "quantity numbers":
89 At the start of each basic block, all of the (hardware and pseudo)
90 registers used in the function are given distinct quantity
91 numbers to indicate their contents. During scan, when the code
92 copies one register into another, we copy the quantity number.
93 When a register is loaded in any other way, we allocate a new
94 quantity number to describe the value generated by this operation.
95 `REG_QTY (N)' records what quantity register N is currently thought
98 All real quantity numbers are greater than or equal to zero.
99 If register N has not been assigned a quantity, `REG_QTY (N)' will
100 equal -N - 1, which is always negative.
102 Quantity numbers below zero do not exist and none of the `qty_table'
103 entries should be referenced with a negative index.
105 We also maintain a bidirectional chain of registers for each
106 quantity number. The `qty_table` members `first_reg' and `last_reg',
107 and `reg_eqv_table' members `next' and `prev' hold these chains.
109 The first register in a chain is the one whose lifespan is least local.
110 Among equals, it is the one that was seen first.
111 We replace any equivalent register with that one.
113 If two registers have the same quantity number, it must be true that
114 REG expressions with qty_table `mode' must be in the hash table for both
115 registers and must be in the same class.
117 The converse is not true. Since hard registers may be referenced in
118 any mode, two REG expressions might be equivalent in the hash table
119 but not have the same quantity number if the quantity number of one
120 of the registers is not the same mode as those expressions.
122 Constants and quantity numbers
124 When a quantity has a known constant value, that value is stored
125 in the appropriate qty_table `const_rtx'. This is in addition to
126 putting the constant in the hash table as is usual for non-regs.
128 Whether a reg or a constant is preferred is determined by the configuration
129 macro CONST_COSTS and will often depend on the constant value. In any
130 event, expressions containing constants can be simplified, by fold_rtx.
132 When a quantity has a known nearly constant value (such as an address
133 of a stack slot), that value is stored in the appropriate qty_table
136 Integer constants don't have a machine mode. However, cse
137 determines the intended machine mode from the destination
138 of the instruction that moves the constant. The machine mode
139 is recorded in the hash table along with the actual RTL
140 constant expression so that different modes are kept separate.
144 To record known equivalences among expressions in general
145 we use a hash table called `table'. It has a fixed number of buckets
146 that contain chains of `struct table_elt' elements for expressions.
147 These chains connect the elements whose expressions have the same
150 Other chains through the same elements connect the elements which
151 currently have equivalent values.
153 Register references in an expression are canonicalized before hashing
154 the expression. This is done using `reg_qty' and qty_table `first_reg'.
155 The hash code of a register reference is computed using the quantity
156 number, not the register number.
158 When the value of an expression changes, it is necessary to remove from the
159 hash table not just that expression but all expressions whose values
160 could be different as a result.
162 1. If the value changing is in memory, except in special cases
163 ANYTHING referring to memory could be changed. That is because
164 nobody knows where a pointer does not point.
165 The function `invalidate_memory' removes what is necessary.
167 The special cases are when the address is constant or is
168 a constant plus a fixed register such as the frame pointer
169 or a static chain pointer. When such addresses are stored in,
170 we can tell exactly which other such addresses must be invalidated
171 due to overlap. `invalidate' does this.
172 All expressions that refer to non-constant
173 memory addresses are also invalidated. `invalidate_memory' does this.
175 2. If the value changing is a register, all expressions
176 containing references to that register, and only those,
179 Because searching the entire hash table for expressions that contain
180 a register is very slow, we try to figure out when it isn't necessary.
181 Precisely, this is necessary only when expressions have been
182 entered in the hash table using this register, and then the value has
183 changed, and then another expression wants to be added to refer to
184 the register's new value. This sequence of circumstances is rare
185 within any one basic block.
187 `REG_TICK' and `REG_IN_TABLE', accessors for members of
188 cse_reg_info, are used to detect this case. REG_TICK (i) is
189 incremented whenever a value is stored in register i.
190 REG_IN_TABLE (i) holds -1 if no references to register i have been
191 entered in the table; otherwise, it contains the value REG_TICK (i)
192 had when the references were entered. If we want to enter a
193 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
194 remove old references. Until we want to enter a new entry, the
195 mere fact that the two vectors don't match makes the entries be
196 ignored if anyone tries to match them.
198 Registers themselves are entered in the hash table as well as in
199 the equivalent-register chains. However, `REG_TICK' and
200 `REG_IN_TABLE' do not apply to expressions which are simple
201 register references. These expressions are removed from the table
202 immediately when they become invalid, and this can be done even if
203 we do not immediately search for all the expressions that refer to
206 A CLOBBER rtx in an instruction invalidates its operand for further
207 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
208 invalidates everything that resides in memory.
212 Constant expressions that differ only by an additive integer
213 are called related. When a constant expression is put in
214 the table, the related expression with no constant term
215 is also entered. These are made to point at each other
216 so that it is possible to find out if there exists any
217 register equivalent to an expression related to a given expression. */
219 /* Length of qty_table vector. We know in advance we will not need
220 a quantity number this big. */
224 /* Next quantity number to be allocated.
225 This is 1 + the largest number needed so far. */
229 /* Per-qty information tracking.
231 `first_reg' and `last_reg' track the head and tail of the
232 chain of registers which currently contain this quantity.
234 `mode' contains the machine mode of this quantity.
236 `const_rtx' holds the rtx of the constant value of this
237 quantity, if known. A summations of the frame/arg pointer
238 and a constant can also be entered here. When this holds
239 a known value, `const_insn' is the insn which stored the
242 `comparison_{code,const,qty}' are used to track when a
243 comparison between a quantity and some constant or register has
244 been passed. In such a case, we know the results of the comparison
245 in case we see it again. These members record a comparison that
246 is known to be true. `comparison_code' holds the rtx code of such
247 a comparison, else it is set to UNKNOWN and the other two
248 comparison members are undefined. `comparison_const' holds
249 the constant being compared against, or zero if the comparison
250 is not against a constant. `comparison_qty' holds the quantity
251 being compared against when the result is known. If the comparison
252 is not with a register, `comparison_qty' is -1. */
254 struct qty_table_elem
257 rtx_insn
*const_insn
;
258 rtx comparison_const
;
260 unsigned int first_reg
, last_reg
;
261 /* The sizes of these fields should match the sizes of the
262 code and mode fields of struct rtx_def (see rtl.h). */
263 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
264 ENUM_BITFIELD(machine_mode
) mode
: 8;
267 /* The table of all qtys, indexed by qty number. */
268 static struct qty_table_elem
*qty_table
;
270 /* For machines that have a CC0, we do not record its value in the hash
271 table since its use is guaranteed to be the insn immediately following
272 its definition and any other insn is presumed to invalidate it.
274 Instead, we store below the current and last value assigned to CC0.
275 If it should happen to be a constant, it is stored in preference
276 to the actual assigned value. In case it is a constant, we store
277 the mode in which the constant should be interpreted. */
279 static rtx this_insn_cc0
, prev_insn_cc0
;
280 static machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
282 /* Insn being scanned. */
284 static rtx_insn
*this_insn
;
285 static bool optimize_this_for_speed_p
;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem
*reg_eqv_table
;
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp
;
309 /* The quantity number of the register's current contents. */
312 /* The number of times the register has been altered in the current
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked
;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info
*cse_reg_info_table
;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size
;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized
;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp
;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table
;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered
;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered
;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref
;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
367 static int do_not_record
;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory
;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
422 struct table_elt
*next_same_hash
;
423 struct table_elt
*prev_same_hash
;
424 struct table_elt
*next_same_value
;
425 struct table_elt
*prev_same_value
;
426 struct table_elt
*first_same_value
;
427 struct table_elt
*related_value
;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode
) mode
: 8;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P (N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X, MODE) \
479 (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
480 #define COST_IN(X, MODE, OUTER, OPNO) \
481 (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
483 /* Get the number of times this register has been updated in this
486 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
488 /* Get the point at which REG was recorded in the table. */
490 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
492 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
495 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
497 /* Get the quantity number for REG. */
499 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
501 /* Determine if the quantity number for register X represents a valid index
502 into the qty_table. */
504 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
506 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
508 #define CHEAPER(X, Y) \
509 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
511 static struct table_elt
*table
[HASH_SIZE
];
513 /* Chain of `struct table_elt's made so far for this function
514 but currently removed from the table. */
516 static struct table_elt
*free_element_chain
;
518 /* Set to the cost of a constant pool reference if one was found for a
519 symbolic constant. If this was found, it means we should try to
520 convert constants into constant pool entries if they don't fit in
523 static int constant_pool_entries_cost
;
524 static int constant_pool_entries_regcost
;
526 /* Trace a patch through the CFG. */
530 /* The basic block for this path entry. */
534 /* This data describes a block that will be processed by
535 cse_extended_basic_block. */
537 struct cse_basic_block_data
539 /* Total number of SETs in block. */
541 /* Size of current branch path, if any. */
543 /* Current path, indicating which basic_blocks will be processed. */
544 struct branch_path
*path
;
548 /* Pointers to the live in/live out bitmaps for the boundaries of the
550 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
552 /* A simple bitmap to track which basic blocks have been visited
553 already as part of an already processed extended basic block. */
554 static sbitmap cse_visited_basic_blocks
;
556 static bool fixed_base_plus_p (rtx x
);
557 static int notreg_cost (rtx
, machine_mode
, enum rtx_code
, int);
558 static int preferable (int, int, int, int);
559 static void new_basic_block (void);
560 static void make_new_qty (unsigned int, machine_mode
);
561 static void make_regs_eqv (unsigned int, unsigned int);
562 static void delete_reg_equiv (unsigned int);
563 static int mention_regs (rtx
);
564 static int insert_regs (rtx
, struct table_elt
*, int);
565 static void remove_from_table (struct table_elt
*, unsigned);
566 static void remove_pseudo_from_table (rtx
, unsigned);
567 static struct table_elt
*lookup (rtx
, unsigned, machine_mode
);
568 static struct table_elt
*lookup_for_remove (rtx
, unsigned, machine_mode
);
569 static rtx
lookup_as_function (rtx
, enum rtx_code
);
570 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
571 machine_mode
, int, int);
572 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
574 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
575 static void invalidate (rtx
, machine_mode
);
576 static void remove_invalid_refs (unsigned int);
577 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
579 static void rehash_using_reg (rtx
);
580 static void invalidate_memory (void);
581 static void invalidate_for_call (void);
582 static rtx
use_related_value (rtx
, struct table_elt
*);
584 static inline unsigned canon_hash (rtx
, machine_mode
);
585 static inline unsigned safe_hash (rtx
, machine_mode
);
586 static inline unsigned hash_rtx_string (const char *);
588 static rtx
canon_reg (rtx
, rtx_insn
*);
589 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
592 static rtx
fold_rtx (rtx
, rtx_insn
*);
593 static rtx
equiv_constant (rtx
);
594 static void record_jump_equiv (rtx_insn
*, bool);
595 static void record_jump_cond (enum rtx_code
, machine_mode
, rtx
, rtx
,
597 static void cse_insn (rtx_insn
*);
598 static void cse_prescan_path (struct cse_basic_block_data
*);
599 static void invalidate_from_clobbers (rtx_insn
*);
600 static void invalidate_from_sets_and_clobbers (rtx_insn
*);
601 static rtx
cse_process_notes (rtx
, rtx
, bool *);
602 static void cse_extended_basic_block (struct cse_basic_block_data
*);
603 extern void dump_class (struct table_elt
*);
604 static void get_cse_reg_info_1 (unsigned int regno
);
605 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
607 static void flush_hash_table (void);
608 static bool insn_live_p (rtx_insn
*, int *);
609 static bool set_live_p (rtx
, rtx_insn
*, int *);
610 static void cse_change_cc_mode_insn (rtx_insn
*, rtx
);
611 static void cse_change_cc_mode_insns (rtx_insn
*, rtx_insn
*, rtx
);
612 static machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
616 #undef RTL_HOOKS_GEN_LOWPART
617 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
619 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
621 /* Nonzero if X has the form (PLUS frame-pointer integer). */
624 fixed_base_plus_p (rtx x
)
626 switch (GET_CODE (x
))
629 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
631 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
636 if (!CONST_INT_P (XEXP (x
, 1)))
638 return fixed_base_plus_p (XEXP (x
, 0));
645 /* Dump the expressions in the equivalence class indicated by CLASSP.
646 This function is used only for debugging. */
648 dump_class (struct table_elt
*classp
)
650 struct table_elt
*elt
;
652 fprintf (stderr
, "Equivalence chain for ");
653 print_rtl (stderr
, classp
->exp
);
654 fprintf (stderr
, ": \n");
656 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
658 print_rtl (stderr
, elt
->exp
);
659 fprintf (stderr
, "\n");
663 /* Return an estimate of the cost of the registers used in an rtx.
664 This is mostly the number of different REG expressions in the rtx;
665 however for some exceptions like fixed registers we use a cost of
666 0. If any other hard register reference occurs, return MAX_COST. */
669 approx_reg_cost (const_rtx x
)
672 subrtx_iterator::array_type array
;
673 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
678 unsigned int regno
= REGNO (x
);
679 if (!CHEAP_REGNO (regno
))
681 if (regno
< FIRST_PSEUDO_REGISTER
)
683 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
695 /* Return a negative value if an rtx A, whose costs are given by COST_A
696 and REGCOST_A, is more desirable than an rtx B.
697 Return a positive value if A is less desirable, or 0 if the two are
700 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
702 /* First, get rid of cases involving expressions that are entirely
704 if (cost_a
!= cost_b
)
706 if (cost_a
== MAX_COST
)
708 if (cost_b
== MAX_COST
)
712 /* Avoid extending lifetimes of hardregs. */
713 if (regcost_a
!= regcost_b
)
715 if (regcost_a
== MAX_COST
)
717 if (regcost_b
== MAX_COST
)
721 /* Normal operation costs take precedence. */
722 if (cost_a
!= cost_b
)
723 return cost_a
- cost_b
;
724 /* Only if these are identical consider effects on register pressure. */
725 if (regcost_a
!= regcost_b
)
726 return regcost_a
- regcost_b
;
730 /* Internal function, to compute cost when X is not a register; called
731 from COST macro to keep it simple. */
734 notreg_cost (rtx x
, machine_mode mode
, enum rtx_code outer
, int opno
)
736 return ((GET_CODE (x
) == SUBREG
737 && REG_P (SUBREG_REG (x
))
738 && GET_MODE_CLASS (mode
) == MODE_INT
739 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
740 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
741 && subreg_lowpart_p (x
)
742 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (SUBREG_REG (x
))))
744 : rtx_cost (x
, mode
, outer
, opno
, optimize_this_for_speed_p
) * 2);
748 /* Initialize CSE_REG_INFO_TABLE. */
751 init_cse_reg_info (unsigned int nregs
)
753 /* Do we need to grow the table? */
754 if (nregs
> cse_reg_info_table_size
)
756 unsigned int new_size
;
758 if (cse_reg_info_table_size
< 2048)
760 /* Compute a new size that is a power of 2 and no smaller
761 than the large of NREGS and 64. */
762 new_size
= (cse_reg_info_table_size
763 ? cse_reg_info_table_size
: 64);
765 while (new_size
< nregs
)
770 /* If we need a big table, allocate just enough to hold
775 /* Reallocate the table with NEW_SIZE entries. */
776 free (cse_reg_info_table
);
777 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
778 cse_reg_info_table_size
= new_size
;
779 cse_reg_info_table_first_uninitialized
= 0;
782 /* Do we have all of the first NREGS entries initialized? */
783 if (cse_reg_info_table_first_uninitialized
< nregs
)
785 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
788 /* Put the old timestamp on newly allocated entries so that they
789 will all be considered out of date. We do not touch those
790 entries beyond the first NREGS entries to be nice to the
792 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
793 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
795 cse_reg_info_table_first_uninitialized
= nregs
;
799 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
802 get_cse_reg_info_1 (unsigned int regno
)
804 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
805 entry will be considered to have been initialized. */
806 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
808 /* Initialize the rest of the entry. */
809 cse_reg_info_table
[regno
].reg_tick
= 1;
810 cse_reg_info_table
[regno
].reg_in_table
= -1;
811 cse_reg_info_table
[regno
].subreg_ticked
= -1;
812 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
815 /* Find a cse_reg_info entry for REGNO. */
817 static inline struct cse_reg_info
*
818 get_cse_reg_info (unsigned int regno
)
820 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
822 /* If this entry has not been initialized, go ahead and initialize
824 if (p
->timestamp
!= cse_reg_info_timestamp
)
825 get_cse_reg_info_1 (regno
);
830 /* Clear the hash table and initialize each register with its own quantity,
831 for a new basic block. */
834 new_basic_block (void)
840 /* Invalidate cse_reg_info_table. */
841 cse_reg_info_timestamp
++;
843 /* Clear out hash table state for this pass. */
844 CLEAR_HARD_REG_SET (hard_regs_in_table
);
846 /* The per-quantity values used to be initialized here, but it is
847 much faster to initialize each as it is made in `make_new_qty'. */
849 for (i
= 0; i
< HASH_SIZE
; i
++)
851 struct table_elt
*first
;
856 struct table_elt
*last
= first
;
860 while (last
->next_same_hash
!= NULL
)
861 last
= last
->next_same_hash
;
863 /* Now relink this hash entire chain into
864 the free element list. */
866 last
->next_same_hash
= free_element_chain
;
867 free_element_chain
= first
;
874 /* Say that register REG contains a quantity in mode MODE not in any
875 register before and initialize that quantity. */
878 make_new_qty (unsigned int reg
, machine_mode mode
)
881 struct qty_table_elem
*ent
;
882 struct reg_eqv_elem
*eqv
;
884 gcc_assert (next_qty
< max_qty
);
886 q
= REG_QTY (reg
) = next_qty
++;
888 ent
->first_reg
= reg
;
891 ent
->const_rtx
= ent
->const_insn
= NULL
;
892 ent
->comparison_code
= UNKNOWN
;
894 eqv
= ®_eqv_table
[reg
];
895 eqv
->next
= eqv
->prev
= -1;
898 /* Make reg NEW equivalent to reg OLD.
899 OLD is not changing; NEW is. */
902 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
904 unsigned int lastr
, firstr
;
905 int q
= REG_QTY (old_reg
);
906 struct qty_table_elem
*ent
;
910 /* Nothing should become eqv until it has a "non-invalid" qty number. */
911 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
913 REG_QTY (new_reg
) = q
;
914 firstr
= ent
->first_reg
;
915 lastr
= ent
->last_reg
;
917 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
918 hard regs. Among pseudos, if NEW will live longer than any other reg
919 of the same qty, and that is beyond the current basic block,
920 make it the new canonical replacement for this qty. */
921 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
922 /* Certain fixed registers might be of the class NO_REGS. This means
923 that not only can they not be allocated by the compiler, but
924 they cannot be used in substitutions or canonicalizations
926 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
927 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
928 || (new_reg
>= FIRST_PSEUDO_REGISTER
929 && (firstr
< FIRST_PSEUDO_REGISTER
930 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
931 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
932 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
933 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
935 reg_eqv_table
[firstr
].prev
= new_reg
;
936 reg_eqv_table
[new_reg
].next
= firstr
;
937 reg_eqv_table
[new_reg
].prev
= -1;
938 ent
->first_reg
= new_reg
;
942 /* If NEW is a hard reg (known to be non-fixed), insert at end.
943 Otherwise, insert before any non-fixed hard regs that are at the
944 end. Registers of class NO_REGS cannot be used as an
945 equivalent for anything. */
946 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
947 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
948 && new_reg
>= FIRST_PSEUDO_REGISTER
)
949 lastr
= reg_eqv_table
[lastr
].prev
;
950 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
951 if (reg_eqv_table
[lastr
].next
>= 0)
952 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
954 qty_table
[q
].last_reg
= new_reg
;
955 reg_eqv_table
[lastr
].next
= new_reg
;
956 reg_eqv_table
[new_reg
].prev
= lastr
;
960 /* Remove REG from its equivalence class. */
963 delete_reg_equiv (unsigned int reg
)
965 struct qty_table_elem
*ent
;
966 int q
= REG_QTY (reg
);
969 /* If invalid, do nothing. */
970 if (! REGNO_QTY_VALID_P (reg
))
975 p
= reg_eqv_table
[reg
].prev
;
976 n
= reg_eqv_table
[reg
].next
;
979 reg_eqv_table
[n
].prev
= p
;
983 reg_eqv_table
[p
].next
= n
;
987 REG_QTY (reg
) = -reg
- 1;
990 /* Remove any invalid expressions from the hash table
991 that refer to any of the registers contained in expression X.
993 Make sure that newly inserted references to those registers
994 as subexpressions will be considered valid.
996 mention_regs is not called when a register itself
997 is being stored in the table.
999 Return 1 if we have done something that may have changed the hash code
1003 mention_regs (rtx x
)
1013 code
= GET_CODE (x
);
1016 unsigned int regno
= REGNO (x
);
1017 unsigned int endregno
= END_REGNO (x
);
1020 for (i
= regno
; i
< endregno
; i
++)
1022 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1023 remove_invalid_refs (i
);
1025 REG_IN_TABLE (i
) = REG_TICK (i
);
1026 SUBREG_TICKED (i
) = -1;
1032 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1033 pseudo if they don't use overlapping words. We handle only pseudos
1034 here for simplicity. */
1035 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1036 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1038 unsigned int i
= REGNO (SUBREG_REG (x
));
1040 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1042 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1043 the last store to this register really stored into this
1044 subreg, then remove the memory of this subreg.
1045 Otherwise, remove any memory of the entire register and
1046 all its subregs from the table. */
1047 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1048 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1049 remove_invalid_refs (i
);
1051 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1054 REG_IN_TABLE (i
) = REG_TICK (i
);
1055 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1059 /* If X is a comparison or a COMPARE and either operand is a register
1060 that does not have a quantity, give it one. This is so that a later
1061 call to record_jump_equiv won't cause X to be assigned a different
1062 hash code and not found in the table after that call.
1064 It is not necessary to do this here, since rehash_using_reg can
1065 fix up the table later, but doing this here eliminates the need to
1066 call that expensive function in the most common case where the only
1067 use of the register is in the comparison. */
1069 if (code
== COMPARE
|| COMPARISON_P (x
))
1071 if (REG_P (XEXP (x
, 0))
1072 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1073 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1075 rehash_using_reg (XEXP (x
, 0));
1079 if (REG_P (XEXP (x
, 1))
1080 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1081 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1083 rehash_using_reg (XEXP (x
, 1));
1088 fmt
= GET_RTX_FORMAT (code
);
1089 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1091 changed
|= mention_regs (XEXP (x
, i
));
1092 else if (fmt
[i
] == 'E')
1093 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1094 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1099 /* Update the register quantities for inserting X into the hash table
1100 with a value equivalent to CLASSP.
1101 (If the class does not contain a REG, it is irrelevant.)
1102 If MODIFIED is nonzero, X is a destination; it is being modified.
1103 Note that delete_reg_equiv should be called on a register
1104 before insert_regs is done on that register with MODIFIED != 0.
1106 Nonzero value means that elements of reg_qty have changed
1107 so X's hash code may be different. */
1110 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1114 unsigned int regno
= REGNO (x
);
1117 /* If REGNO is in the equivalence table already but is of the
1118 wrong mode for that equivalence, don't do anything here. */
1120 qty_valid
= REGNO_QTY_VALID_P (regno
);
1123 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1125 if (ent
->mode
!= GET_MODE (x
))
1129 if (modified
|| ! qty_valid
)
1132 for (classp
= classp
->first_same_value
;
1134 classp
= classp
->next_same_value
)
1135 if (REG_P (classp
->exp
)
1136 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1138 unsigned c_regno
= REGNO (classp
->exp
);
1140 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1142 /* Suppose that 5 is hard reg and 100 and 101 are
1145 (set (reg:si 100) (reg:si 5))
1146 (set (reg:si 5) (reg:si 100))
1147 (set (reg:di 101) (reg:di 5))
1149 We would now set REG_QTY (101) = REG_QTY (5), but the
1150 entry for 5 is in SImode. When we use this later in
1151 copy propagation, we get the register in wrong mode. */
1152 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1155 make_regs_eqv (regno
, c_regno
);
1159 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1160 than REG_IN_TABLE to find out if there was only a single preceding
1161 invalidation - for the SUBREG - or another one, which would be
1162 for the full register. However, if we find here that REG_TICK
1163 indicates that the register is invalid, it means that it has
1164 been invalidated in a separate operation. The SUBREG might be used
1165 now (then this is a recursive call), or we might use the full REG
1166 now and a SUBREG of it later. So bump up REG_TICK so that
1167 mention_regs will do the right thing. */
1169 && REG_IN_TABLE (regno
) >= 0
1170 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1172 make_new_qty (regno
, GET_MODE (x
));
1179 /* If X is a SUBREG, we will likely be inserting the inner register in the
1180 table. If that register doesn't have an assigned quantity number at
1181 this point but does later, the insertion that we will be doing now will
1182 not be accessible because its hash code will have changed. So assign
1183 a quantity number now. */
1185 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1186 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1188 insert_regs (SUBREG_REG (x
), NULL
, 0);
1193 return mention_regs (x
);
1197 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1198 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1199 CST is equal to an anchor. */
1202 compute_const_anchors (rtx cst
,
1203 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1204 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1206 HOST_WIDE_INT n
= INTVAL (cst
);
1208 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1209 if (*lower_base
== n
)
1213 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1214 *upper_offs
= n
- *upper_base
;
1215 *lower_offs
= n
- *lower_base
;
1219 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1222 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1225 struct table_elt
*elt
;
1230 anchor_exp
= GEN_INT (anchor
);
1231 hash
= HASH (anchor_exp
, mode
);
1232 elt
= lookup (anchor_exp
, hash
, mode
);
1234 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1236 exp
= plus_constant (mode
, reg
, offs
);
1237 /* REG has just been inserted and the hash codes recomputed. */
1239 hash
= HASH (exp
, mode
);
1241 /* Use the cost of the register rather than the whole expression. When
1242 looking up constant anchors we will further offset the corresponding
1243 expression therefore it does not make sense to prefer REGs over
1244 reg-immediate additions. Prefer instead the oldest expression. Also
1245 don't prefer pseudos over hard regs so that we derive constants in
1246 argument registers from other argument registers rather than from the
1247 original pseudo that was used to synthesize the constant. */
1248 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
, mode
), 1);
1251 /* The constant CST is equivalent to the register REG. Create
1252 equivalences between the two anchors of CST and the corresponding
1253 register-offset expressions using REG. */
1256 insert_const_anchors (rtx reg
, rtx cst
, machine_mode mode
)
1258 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1260 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1261 &upper_base
, &upper_offs
))
1264 /* Ignore anchors of value 0. Constants accessible from zero are
1266 if (lower_base
!= 0)
1267 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1269 if (upper_base
!= 0)
1270 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1273 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1274 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1275 valid expression. Return the cheapest and oldest of such expressions. In
1276 *OLD, return how old the resulting expression is compared to the other
1277 equivalent expressions. */
1280 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1283 struct table_elt
*elt
;
1285 struct table_elt
*match_elt
;
1288 /* Find the cheapest and *oldest* expression to maximize the chance of
1289 reusing the same pseudo. */
1293 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1295 elt
= elt
->next_same_value
, idx
++)
1297 if (match_elt
&& CHEAPER (match_elt
, elt
))
1300 if (REG_P (elt
->exp
)
1301 || (GET_CODE (elt
->exp
) == PLUS
1302 && REG_P (XEXP (elt
->exp
, 0))
1303 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1307 /* Ignore expressions that are no longer valid. */
1308 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1311 x
= plus_constant (GET_MODE (elt
->exp
), elt
->exp
, offs
);
1313 || (GET_CODE (x
) == PLUS
1314 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1315 -targetm
.const_anchor
,
1316 targetm
.const_anchor
- 1)))
1328 /* Try to express the constant SRC_CONST using a register+offset expression
1329 derived from a constant anchor. Return it if successful or NULL_RTX,
1333 try_const_anchors (rtx src_const
, machine_mode mode
)
1335 struct table_elt
*lower_elt
, *upper_elt
;
1336 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1337 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1338 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1339 unsigned lower_old
, upper_old
;
1341 /* CONST_INT is used for CC modes, but we should leave those alone. */
1342 if (GET_MODE_CLASS (mode
) == MODE_CC
)
1345 gcc_assert (SCALAR_INT_MODE_P (mode
));
1346 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1347 &upper_base
, &upper_offs
))
1350 lower_anchor_rtx
= GEN_INT (lower_base
);
1351 upper_anchor_rtx
= GEN_INT (upper_base
);
1352 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1353 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1356 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1358 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1365 /* Return the older expression. */
1366 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1369 /* Look in or update the hash table. */
1371 /* Remove table element ELT from use in the table.
1372 HASH is its hash code, made using the HASH macro.
1373 It's an argument because often that is known in advance
1374 and we save much time not recomputing it. */
1377 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1382 /* Mark this element as removed. See cse_insn. */
1383 elt
->first_same_value
= 0;
1385 /* Remove the table element from its equivalence class. */
1388 struct table_elt
*prev
= elt
->prev_same_value
;
1389 struct table_elt
*next
= elt
->next_same_value
;
1392 next
->prev_same_value
= prev
;
1395 prev
->next_same_value
= next
;
1398 struct table_elt
*newfirst
= next
;
1401 next
->first_same_value
= newfirst
;
1402 next
= next
->next_same_value
;
1407 /* Remove the table element from its hash bucket. */
1410 struct table_elt
*prev
= elt
->prev_same_hash
;
1411 struct table_elt
*next
= elt
->next_same_hash
;
1414 next
->prev_same_hash
= prev
;
1417 prev
->next_same_hash
= next
;
1418 else if (table
[hash
] == elt
)
1422 /* This entry is not in the proper hash bucket. This can happen
1423 when two classes were merged by `merge_equiv_classes'. Search
1424 for the hash bucket that it heads. This happens only very
1425 rarely, so the cost is acceptable. */
1426 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1427 if (table
[hash
] == elt
)
1432 /* Remove the table element from its related-value circular chain. */
1434 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1436 struct table_elt
*p
= elt
->related_value
;
1438 while (p
->related_value
!= elt
)
1439 p
= p
->related_value
;
1440 p
->related_value
= elt
->related_value
;
1441 if (p
->related_value
== p
)
1442 p
->related_value
= 0;
1445 /* Now add it to the free element chain. */
1446 elt
->next_same_hash
= free_element_chain
;
1447 free_element_chain
= elt
;
1450 /* Same as above, but X is a pseudo-register. */
1453 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1455 struct table_elt
*elt
;
1457 /* Because a pseudo-register can be referenced in more than one
1458 mode, we might have to remove more than one table entry. */
1459 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1460 remove_from_table (elt
, hash
);
1463 /* Look up X in the hash table and return its table element,
1464 or 0 if X is not in the table.
1466 MODE is the machine-mode of X, or if X is an integer constant
1467 with VOIDmode then MODE is the mode with which X will be used.
1469 Here we are satisfied to find an expression whose tree structure
1472 static struct table_elt
*
1473 lookup (rtx x
, unsigned int hash
, machine_mode mode
)
1475 struct table_elt
*p
;
1477 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1478 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1479 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1485 /* Like `lookup' but don't care whether the table element uses invalid regs.
1486 Also ignore discrepancies in the machine mode of a register. */
1488 static struct table_elt
*
1489 lookup_for_remove (rtx x
, unsigned int hash
, machine_mode mode
)
1491 struct table_elt
*p
;
1495 unsigned int regno
= REGNO (x
);
1497 /* Don't check the machine mode when comparing registers;
1498 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1499 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1501 && REGNO (p
->exp
) == regno
)
1506 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1508 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1515 /* Look for an expression equivalent to X and with code CODE.
1516 If one is found, return that expression. */
1519 lookup_as_function (rtx x
, enum rtx_code code
)
1522 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1527 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1528 if (GET_CODE (p
->exp
) == code
1529 /* Make sure this is a valid entry in the table. */
1530 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1536 /* Insert X in the hash table, assuming HASH is its hash code and
1537 CLASSP is an element of the class it should go in (or 0 if a new
1538 class should be made). COST is the code of X and reg_cost is the
1539 cost of registers in X. It is inserted at the proper position to
1540 keep the class in the order cheapest first.
1542 MODE is the machine-mode of X, or if X is an integer constant
1543 with VOIDmode then MODE is the mode with which X will be used.
1545 For elements of equal cheapness, the most recent one
1546 goes in front, except that the first element in the list
1547 remains first unless a cheaper element is added. The order of
1548 pseudo-registers does not matter, as canon_reg will be called to
1549 find the cheapest when a register is retrieved from the table.
1551 The in_memory field in the hash table element is set to 0.
1552 The caller must set it nonzero if appropriate.
1554 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1555 and if insert_regs returns a nonzero value
1556 you must then recompute its hash code before calling here.
1558 If necessary, update table showing constant values of quantities. */
1560 static struct table_elt
*
1561 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1562 machine_mode mode
, int cost
, int reg_cost
)
1564 struct table_elt
*elt
;
1566 /* If X is a register and we haven't made a quantity for it,
1567 something is wrong. */
1568 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1570 /* If X is a hard register, show it is being put in the table. */
1571 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1572 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1574 /* Put an element for X into the right hash bucket. */
1576 elt
= free_element_chain
;
1578 free_element_chain
= elt
->next_same_hash
;
1580 elt
= XNEW (struct table_elt
);
1583 elt
->canon_exp
= NULL_RTX
;
1585 elt
->regcost
= reg_cost
;
1586 elt
->next_same_value
= 0;
1587 elt
->prev_same_value
= 0;
1588 elt
->next_same_hash
= table
[hash
];
1589 elt
->prev_same_hash
= 0;
1590 elt
->related_value
= 0;
1593 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1596 table
[hash
]->prev_same_hash
= elt
;
1599 /* Put it into the proper value-class. */
1602 classp
= classp
->first_same_value
;
1603 if (CHEAPER (elt
, classp
))
1604 /* Insert at the head of the class. */
1606 struct table_elt
*p
;
1607 elt
->next_same_value
= classp
;
1608 classp
->prev_same_value
= elt
;
1609 elt
->first_same_value
= elt
;
1611 for (p
= classp
; p
; p
= p
->next_same_value
)
1612 p
->first_same_value
= elt
;
1616 /* Insert not at head of the class. */
1617 /* Put it after the last element cheaper than X. */
1618 struct table_elt
*p
, *next
;
1621 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1625 /* Put it after P and before NEXT. */
1626 elt
->next_same_value
= next
;
1628 next
->prev_same_value
= elt
;
1630 elt
->prev_same_value
= p
;
1631 p
->next_same_value
= elt
;
1632 elt
->first_same_value
= classp
;
1636 elt
->first_same_value
= elt
;
1638 /* If this is a constant being set equivalent to a register or a register
1639 being set equivalent to a constant, note the constant equivalence.
1641 If this is a constant, it cannot be equivalent to a different constant,
1642 and a constant is the only thing that can be cheaper than a register. So
1643 we know the register is the head of the class (before the constant was
1646 If this is a register that is not already known equivalent to a
1647 constant, we must check the entire class.
1649 If this is a register that is already known equivalent to an insn,
1650 update the qtys `const_insn' to show that `this_insn' is the latest
1651 insn making that quantity equivalent to the constant. */
1653 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1656 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1657 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1659 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1660 exp_ent
->const_insn
= this_insn
;
1665 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1668 struct table_elt
*p
;
1670 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1672 if (p
->is_const
&& !REG_P (p
->exp
))
1674 int x_q
= REG_QTY (REGNO (x
));
1675 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1678 = gen_lowpart (GET_MODE (x
), p
->exp
);
1679 x_ent
->const_insn
= this_insn
;
1686 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1687 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1688 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1690 /* If this is a constant with symbolic value,
1691 and it has a term with an explicit integer value,
1692 link it up with related expressions. */
1693 if (GET_CODE (x
) == CONST
)
1695 rtx subexp
= get_related_value (x
);
1697 struct table_elt
*subelt
, *subelt_prev
;
1701 /* Get the integer-free subexpression in the hash table. */
1702 subhash
= SAFE_HASH (subexp
, mode
);
1703 subelt
= lookup (subexp
, subhash
, mode
);
1705 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1706 /* Initialize SUBELT's circular chain if it has none. */
1707 if (subelt
->related_value
== 0)
1708 subelt
->related_value
= subelt
;
1709 /* Find the element in the circular chain that precedes SUBELT. */
1710 subelt_prev
= subelt
;
1711 while (subelt_prev
->related_value
!= subelt
)
1712 subelt_prev
= subelt_prev
->related_value
;
1713 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1714 This way the element that follows SUBELT is the oldest one. */
1715 elt
->related_value
= subelt_prev
->related_value
;
1716 subelt_prev
->related_value
= elt
;
1723 /* Wrap insert_with_costs by passing the default costs. */
1725 static struct table_elt
*
1726 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1729 return insert_with_costs (x
, classp
, hash
, mode
,
1730 COST (x
, mode
), approx_reg_cost (x
));
1734 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1735 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1736 the two classes equivalent.
1738 CLASS1 will be the surviving class; CLASS2 should not be used after this
1741 Any invalid entries in CLASS2 will not be copied. */
1744 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1746 struct table_elt
*elt
, *next
, *new_elt
;
1748 /* Ensure we start with the head of the classes. */
1749 class1
= class1
->first_same_value
;
1750 class2
= class2
->first_same_value
;
1752 /* If they were already equal, forget it. */
1753 if (class1
== class2
)
1756 for (elt
= class2
; elt
; elt
= next
)
1760 machine_mode mode
= elt
->mode
;
1762 next
= elt
->next_same_value
;
1764 /* Remove old entry, make a new one in CLASS1's class.
1765 Don't do this for invalid entries as we cannot find their
1766 hash code (it also isn't necessary). */
1767 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1769 bool need_rehash
= false;
1771 hash_arg_in_memory
= 0;
1772 hash
= HASH (exp
, mode
);
1776 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1777 delete_reg_equiv (REGNO (exp
));
1780 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1781 remove_pseudo_from_table (exp
, hash
);
1783 remove_from_table (elt
, hash
);
1785 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1787 rehash_using_reg (exp
);
1788 hash
= HASH (exp
, mode
);
1790 new_elt
= insert (exp
, class1
, hash
, mode
);
1791 new_elt
->in_memory
= hash_arg_in_memory
;
1792 if (GET_CODE (exp
) == ASM_OPERANDS
&& elt
->cost
== MAX_COST
)
1793 new_elt
->cost
= MAX_COST
;
1798 /* Flush the entire hash table. */
1801 flush_hash_table (void)
1804 struct table_elt
*p
;
1806 for (i
= 0; i
< HASH_SIZE
; i
++)
1807 for (p
= table
[i
]; p
; p
= table
[i
])
1809 /* Note that invalidate can remove elements
1810 after P in the current hash chain. */
1812 invalidate (p
->exp
, VOIDmode
);
1814 remove_from_table (p
, i
);
1818 /* Check whether an anti dependence exists between X and EXP. MODE and
1819 ADDR are as for canon_anti_dependence. */
1822 check_dependence (const_rtx x
, rtx exp
, machine_mode mode
, rtx addr
)
1824 subrtx_iterator::array_type array
;
1825 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
1827 const_rtx x
= *iter
;
1828 if (MEM_P (x
) && canon_anti_dependence (x
, true, exp
, mode
, addr
))
1834 /* Remove from the hash table, or mark as invalid, all expressions whose
1835 values could be altered by storing in X. X is a register, a subreg, or
1836 a memory reference with nonvarying address (because, when a memory
1837 reference with a varying address is stored in, all memory references are
1838 removed by invalidate_memory so specific invalidation is superfluous).
1839 FULL_MODE, if not VOIDmode, indicates that this much should be
1840 invalidated instead of just the amount indicated by the mode of X. This
1841 is only used for bitfield stores into memory.
1843 A nonvarying address may be just a register or just a symbol reference,
1844 or it may be either of those plus a numeric offset. */
1847 invalidate (rtx x
, machine_mode full_mode
)
1850 struct table_elt
*p
;
1853 switch (GET_CODE (x
))
1857 /* If X is a register, dependencies on its contents are recorded
1858 through the qty number mechanism. Just change the qty number of
1859 the register, mark it as invalid for expressions that refer to it,
1860 and remove it itself. */
1861 unsigned int regno
= REGNO (x
);
1862 unsigned int hash
= HASH (x
, GET_MODE (x
));
1864 /* Remove REGNO from any quantity list it might be on and indicate
1865 that its value might have changed. If it is a pseudo, remove its
1866 entry from the hash table.
1868 For a hard register, we do the first two actions above for any
1869 additional hard registers corresponding to X. Then, if any of these
1870 registers are in the table, we must remove any REG entries that
1871 overlap these registers. */
1873 delete_reg_equiv (regno
);
1875 SUBREG_TICKED (regno
) = -1;
1877 if (regno
>= FIRST_PSEUDO_REGISTER
)
1878 remove_pseudo_from_table (x
, hash
);
1881 HOST_WIDE_INT in_table
1882 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1883 unsigned int endregno
= END_REGNO (x
);
1884 unsigned int tregno
, tendregno
, rn
;
1885 struct table_elt
*p
, *next
;
1887 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1889 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1891 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1892 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1893 delete_reg_equiv (rn
);
1895 SUBREG_TICKED (rn
) = -1;
1899 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1900 for (p
= table
[hash
]; p
; p
= next
)
1902 next
= p
->next_same_hash
;
1905 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1908 tregno
= REGNO (p
->exp
);
1909 tendregno
= END_REGNO (p
->exp
);
1910 if (tendregno
> regno
&& tregno
< endregno
)
1911 remove_from_table (p
, hash
);
1918 invalidate (SUBREG_REG (x
), VOIDmode
);
1922 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1923 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1927 /* This is part of a disjoint return value; extract the location in
1928 question ignoring the offset. */
1929 invalidate (XEXP (x
, 0), VOIDmode
);
1933 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1934 /* Calculate the canonical version of X here so that
1935 true_dependence doesn't generate new RTL for X on each call. */
1938 /* Remove all hash table elements that refer to overlapping pieces of
1940 if (full_mode
== VOIDmode
)
1941 full_mode
= GET_MODE (x
);
1943 for (i
= 0; i
< HASH_SIZE
; i
++)
1945 struct table_elt
*next
;
1947 for (p
= table
[i
]; p
; p
= next
)
1949 next
= p
->next_same_hash
;
1952 /* Just canonicalize the expression once;
1953 otherwise each time we call invalidate
1954 true_dependence will canonicalize the
1955 expression again. */
1957 p
->canon_exp
= canon_rtx (p
->exp
);
1958 if (check_dependence (p
->canon_exp
, x
, full_mode
, addr
))
1959 remove_from_table (p
, i
);
1970 /* Invalidate DEST. Used when DEST is not going to be added
1971 into the hash table for some reason, e.g. do_not_record
1975 invalidate_dest (rtx dest
)
1978 || GET_CODE (dest
) == SUBREG
1980 invalidate (dest
, VOIDmode
);
1981 else if (GET_CODE (dest
) == STRICT_LOW_PART
1982 || GET_CODE (dest
) == ZERO_EXTRACT
)
1983 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
1986 /* Remove all expressions that refer to register REGNO,
1987 since they are already invalid, and we are about to
1988 mark that register valid again and don't want the old
1989 expressions to reappear as valid. */
1992 remove_invalid_refs (unsigned int regno
)
1995 struct table_elt
*p
, *next
;
1997 for (i
= 0; i
< HASH_SIZE
; i
++)
1998 for (p
= table
[i
]; p
; p
= next
)
2000 next
= p
->next_same_hash
;
2001 if (!REG_P (p
->exp
) && refers_to_regno_p (regno
, p
->exp
))
2002 remove_from_table (p
, i
);
2006 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2009 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
2013 struct table_elt
*p
, *next
;
2014 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
2016 for (i
= 0; i
< HASH_SIZE
; i
++)
2017 for (p
= table
[i
]; p
; p
= next
)
2020 next
= p
->next_same_hash
;
2023 && (GET_CODE (exp
) != SUBREG
2024 || !REG_P (SUBREG_REG (exp
))
2025 || REGNO (SUBREG_REG (exp
)) != regno
2026 || (((SUBREG_BYTE (exp
)
2027 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
2028 && SUBREG_BYTE (exp
) <= end
))
2029 && refers_to_regno_p (regno
, p
->exp
))
2030 remove_from_table (p
, i
);
2034 /* Recompute the hash codes of any valid entries in the hash table that
2035 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2037 This is called when we make a jump equivalence. */
2040 rehash_using_reg (rtx x
)
2043 struct table_elt
*p
, *next
;
2046 if (GET_CODE (x
) == SUBREG
)
2049 /* If X is not a register or if the register is known not to be in any
2050 valid entries in the table, we have no work to do. */
2053 || REG_IN_TABLE (REGNO (x
)) < 0
2054 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2057 /* Scan all hash chains looking for valid entries that mention X.
2058 If we find one and it is in the wrong hash chain, move it. */
2060 for (i
= 0; i
< HASH_SIZE
; i
++)
2061 for (p
= table
[i
]; p
; p
= next
)
2063 next
= p
->next_same_hash
;
2064 if (reg_mentioned_p (x
, p
->exp
)
2065 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2066 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2068 if (p
->next_same_hash
)
2069 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2071 if (p
->prev_same_hash
)
2072 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2074 table
[i
] = p
->next_same_hash
;
2076 p
->next_same_hash
= table
[hash
];
2077 p
->prev_same_hash
= 0;
2079 table
[hash
]->prev_same_hash
= p
;
2085 /* Remove from the hash table any expression that is a call-clobbered
2086 register. Also update their TICK values. */
2089 invalidate_for_call (void)
2091 unsigned int regno
, endregno
;
2094 struct table_elt
*p
, *next
;
2096 hard_reg_set_iterator hrsi
;
2098 /* Go through all the hard registers. For each that is clobbered in
2099 a CALL_INSN, remove the register from quantity chains and update
2100 reg_tick if defined. Also see if any of these registers is currently
2102 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call
, 0, regno
, hrsi
)
2104 delete_reg_equiv (regno
);
2105 if (REG_TICK (regno
) >= 0)
2108 SUBREG_TICKED (regno
) = -1;
2110 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2113 /* In the case where we have no call-clobbered hard registers in the
2114 table, we are done. Otherwise, scan the table and remove any
2115 entry that overlaps a call-clobbered register. */
2118 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2119 for (p
= table
[hash
]; p
; p
= next
)
2121 next
= p
->next_same_hash
;
2124 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2127 regno
= REGNO (p
->exp
);
2128 endregno
= END_REGNO (p
->exp
);
2130 for (i
= regno
; i
< endregno
; i
++)
2131 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2133 remove_from_table (p
, hash
);
2139 /* Given an expression X of type CONST,
2140 and ELT which is its table entry (or 0 if it
2141 is not in the hash table),
2142 return an alternate expression for X as a register plus integer.
2143 If none can be found, return 0. */
2146 use_related_value (rtx x
, struct table_elt
*elt
)
2148 struct table_elt
*relt
= 0;
2149 struct table_elt
*p
, *q
;
2150 HOST_WIDE_INT offset
;
2152 /* First, is there anything related known?
2153 If we have a table element, we can tell from that.
2154 Otherwise, must look it up. */
2156 if (elt
!= 0 && elt
->related_value
!= 0)
2158 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2160 rtx subexp
= get_related_value (x
);
2162 relt
= lookup (subexp
,
2163 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2170 /* Search all related table entries for one that has an
2171 equivalent register. */
2176 /* This loop is strange in that it is executed in two different cases.
2177 The first is when X is already in the table. Then it is searching
2178 the RELATED_VALUE list of X's class (RELT). The second case is when
2179 X is not in the table. Then RELT points to a class for the related
2182 Ensure that, whatever case we are in, that we ignore classes that have
2183 the same value as X. */
2185 if (rtx_equal_p (x
, p
->exp
))
2188 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2195 p
= p
->related_value
;
2197 /* We went all the way around, so there is nothing to be found.
2198 Alternatively, perhaps RELT was in the table for some other reason
2199 and it has no related values recorded. */
2200 if (p
== relt
|| p
== 0)
2207 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2208 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2209 return plus_constant (q
->mode
, q
->exp
, offset
);
2213 /* Hash a string. Just add its bytes up. */
2214 static inline unsigned
2215 hash_rtx_string (const char *ps
)
2218 const unsigned char *p
= (const unsigned char *) ps
;
2227 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2228 When the callback returns true, we continue with the new rtx. */
2231 hash_rtx_cb (const_rtx x
, machine_mode mode
,
2232 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2233 bool have_reg_qty
, hash_rtx_callback_function cb
)
2239 machine_mode newmode
;
2242 /* Used to turn recursion into iteration. We can't rely on GCC's
2243 tail-recursion elimination since we need to keep accumulating values
2249 /* Invoke the callback first. */
2251 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2253 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2254 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2258 code
= GET_CODE (x
);
2263 unsigned int regno
= REGNO (x
);
2265 if (do_not_record_p
&& !reload_completed
)
2267 /* On some machines, we can't record any non-fixed hard register,
2268 because extending its life will cause reload problems. We
2269 consider ap, fp, sp, gp to be fixed for this purpose.
2271 We also consider CCmode registers to be fixed for this purpose;
2272 failure to do so leads to failure to simplify 0<100 type of
2275 On all machines, we can't record any global registers.
2276 Nor should we record any register that is in a small
2277 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2280 if (regno
>= FIRST_PSEUDO_REGISTER
)
2282 else if (x
== frame_pointer_rtx
2283 || x
== hard_frame_pointer_rtx
2284 || x
== arg_pointer_rtx
2285 || x
== stack_pointer_rtx
2286 || x
== pic_offset_table_rtx
)
2288 else if (global_regs
[regno
])
2290 else if (fixed_regs
[regno
])
2292 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2294 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2296 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2303 *do_not_record_p
= 1;
2308 hash
+= ((unsigned int) REG
<< 7);
2309 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2313 /* We handle SUBREG of a REG specially because the underlying
2314 reg changes its hash value with every value change; we don't
2315 want to have to forget unrelated subregs when one subreg changes. */
2318 if (REG_P (SUBREG_REG (x
)))
2320 hash
+= (((unsigned int) SUBREG
<< 7)
2321 + REGNO (SUBREG_REG (x
))
2322 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2329 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2330 + (unsigned int) INTVAL (x
));
2333 case CONST_WIDE_INT
:
2334 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (x
); i
++)
2335 hash
+= CONST_WIDE_INT_ELT (x
, i
);
2339 /* This is like the general case, except that it only counts
2340 the integers representing the constant. */
2341 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2342 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (x
) == VOIDmode
)
2343 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2344 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2346 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2350 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2351 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2359 units
= CONST_VECTOR_NUNITS (x
);
2361 for (i
= 0; i
< units
; ++i
)
2363 elt
= CONST_VECTOR_ELT (x
, i
);
2364 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2365 do_not_record_p
, hash_arg_in_memory_p
,
2372 /* Assume there is only one rtx object for any given label. */
2374 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2375 differences and differences between each stage's debugging dumps. */
2376 hash
+= (((unsigned int) LABEL_REF
<< 7)
2377 + CODE_LABEL_NUMBER (LABEL_REF_LABEL (x
)));
2382 /* Don't hash on the symbol's address to avoid bootstrap differences.
2383 Different hash values may cause expressions to be recorded in
2384 different orders and thus different registers to be used in the
2385 final assembler. This also avoids differences in the dump files
2386 between various stages. */
2388 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2391 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2393 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2398 /* We don't record if marked volatile or if BLKmode since we don't
2399 know the size of the move. */
2400 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2402 *do_not_record_p
= 1;
2405 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2406 *hash_arg_in_memory_p
= 1;
2408 /* Now that we have already found this special case,
2409 might as well speed it up as much as possible. */
2410 hash
+= (unsigned) MEM
;
2415 /* A USE that mentions non-volatile memory needs special
2416 handling since the MEM may be BLKmode which normally
2417 prevents an entry from being made. Pure calls are
2418 marked by a USE which mentions BLKmode memory.
2419 See calls.c:emit_call_1. */
2420 if (MEM_P (XEXP (x
, 0))
2421 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2423 hash
+= (unsigned) USE
;
2426 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2427 *hash_arg_in_memory_p
= 1;
2429 /* Now that we have already found this special case,
2430 might as well speed it up as much as possible. */
2431 hash
+= (unsigned) MEM
;
2446 case UNSPEC_VOLATILE
:
2447 if (do_not_record_p
) {
2448 *do_not_record_p
= 1;
2456 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2458 *do_not_record_p
= 1;
2463 /* We don't want to take the filename and line into account. */
2464 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2465 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2466 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2467 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2469 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2471 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2473 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2474 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2475 do_not_record_p
, hash_arg_in_memory_p
,
2478 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2481 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2482 x
= ASM_OPERANDS_INPUT (x
, 0);
2483 mode
= GET_MODE (x
);
2495 i
= GET_RTX_LENGTH (code
) - 1;
2496 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2497 fmt
= GET_RTX_FORMAT (code
);
2503 /* If we are about to do the last recursive call
2504 needed at this level, change it into iteration.
2505 This function is called enough to be worth it. */
2512 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2513 hash_arg_in_memory_p
,
2518 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2519 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2520 hash_arg_in_memory_p
,
2525 hash
+= hash_rtx_string (XSTR (x
, i
));
2529 hash
+= (unsigned int) XINT (x
, i
);
2544 /* Hash an rtx. We are careful to make sure the value is never negative.
2545 Equivalent registers hash identically.
2546 MODE is used in hashing for CONST_INTs only;
2547 otherwise the mode of X is used.
2549 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2551 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2552 a MEM rtx which does not have the MEM_READONLY_P flag set.
2554 Note that cse_insn knows that the hash code of a MEM expression
2555 is just (int) MEM plus the hash code of the address. */
2558 hash_rtx (const_rtx x
, machine_mode mode
, int *do_not_record_p
,
2559 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2561 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2562 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2565 /* Hash an rtx X for cse via hash_rtx.
2566 Stores 1 in do_not_record if any subexpression is volatile.
2567 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2568 does not have the MEM_READONLY_P flag set. */
2570 static inline unsigned
2571 canon_hash (rtx x
, machine_mode mode
)
2573 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2576 /* Like canon_hash but with no side effects, i.e. do_not_record
2577 and hash_arg_in_memory are not changed. */
2579 static inline unsigned
2580 safe_hash (rtx x
, machine_mode mode
)
2582 int dummy_do_not_record
;
2583 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2586 /* Return 1 iff X and Y would canonicalize into the same thing,
2587 without actually constructing the canonicalization of either one.
2588 If VALIDATE is nonzero,
2589 we assume X is an expression being processed from the rtl
2590 and Y was found in the hash table. We check register refs
2591 in Y for being marked as valid.
2593 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2596 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2602 /* Note: it is incorrect to assume an expression is equivalent to itself
2603 if VALIDATE is nonzero. */
2604 if (x
== y
&& !validate
)
2607 if (x
== 0 || y
== 0)
2610 code
= GET_CODE (x
);
2611 if (code
!= GET_CODE (y
))
2614 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2615 if (GET_MODE (x
) != GET_MODE (y
))
2618 /* MEMs referring to different address space are not equivalent. */
2619 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2630 return LABEL_REF_LABEL (x
) == LABEL_REF_LABEL (y
);
2633 return XSTR (x
, 0) == XSTR (y
, 0);
2637 return REGNO (x
) == REGNO (y
);
2640 unsigned int regno
= REGNO (y
);
2642 unsigned int endregno
= END_REGNO (y
);
2644 /* If the quantities are not the same, the expressions are not
2645 equivalent. If there are and we are not to validate, they
2646 are equivalent. Otherwise, ensure all regs are up-to-date. */
2648 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2654 for (i
= regno
; i
< endregno
; i
++)
2655 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2664 /* A volatile mem should not be considered equivalent to any
2666 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2669 /* Can't merge two expressions in different alias sets, since we
2670 can decide that the expression is transparent in a block when
2671 it isn't, due to it being set with the different alias set.
2673 Also, can't merge two expressions with different MEM_ATTRS.
2674 They could e.g. be two different entities allocated into the
2675 same space on the stack (see e.g. PR25130). In that case, the
2676 MEM addresses can be the same, even though the two MEMs are
2677 absolutely not equivalent.
2679 But because really all MEM attributes should be the same for
2680 equivalent MEMs, we just use the invariant that MEMs that have
2681 the same attributes share the same mem_attrs data structure. */
2682 if (!mem_attrs_eq_p (MEM_ATTRS (x
), MEM_ATTRS (y
)))
2685 /* If we are handling exceptions, we cannot consider two expressions
2686 with different trapping status as equivalent, because simple_mem
2687 might accept one and reject the other. */
2688 if (cfun
->can_throw_non_call_exceptions
2689 && (MEM_NOTRAP_P (x
) != MEM_NOTRAP_P (y
)))
2694 /* For commutative operations, check both orders. */
2702 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2704 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2705 validate
, for_gcse
))
2706 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2708 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2709 validate
, for_gcse
)));
2712 /* We don't use the generic code below because we want to
2713 disregard filename and line numbers. */
2715 /* A volatile asm isn't equivalent to any other. */
2716 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2719 if (GET_MODE (x
) != GET_MODE (y
)
2720 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2721 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2722 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2723 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2724 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2727 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2729 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2730 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2731 ASM_OPERANDS_INPUT (y
, i
),
2733 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2734 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2744 /* Compare the elements. If any pair of corresponding elements
2745 fail to match, return 0 for the whole thing. */
2747 fmt
= GET_RTX_FORMAT (code
);
2748 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2753 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2754 validate
, for_gcse
))
2759 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2761 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2762 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2763 validate
, for_gcse
))
2768 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2773 if (XINT (x
, i
) != XINT (y
, i
))
2778 if (XWINT (x
, i
) != XWINT (y
, i
))
2794 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2795 the result if necessary. INSN is as for canon_reg. */
2798 validate_canon_reg (rtx
*xloc
, rtx_insn
*insn
)
2802 rtx new_rtx
= canon_reg (*xloc
, insn
);
2804 /* If replacing pseudo with hard reg or vice versa, ensure the
2805 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2806 gcc_assert (insn
&& new_rtx
);
2807 validate_change (insn
, xloc
, new_rtx
, 1);
2811 /* Canonicalize an expression:
2812 replace each register reference inside it
2813 with the "oldest" equivalent register.
2815 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2816 after we make our substitution. The calls are made with IN_GROUP nonzero
2817 so apply_change_group must be called upon the outermost return from this
2818 function (unless INSN is zero). The result of apply_change_group can
2819 generally be discarded since the changes we are making are optional. */
2822 canon_reg (rtx x
, rtx_insn
*insn
)
2831 code
= GET_CODE (x
);
2848 struct qty_table_elem
*ent
;
2850 /* Never replace a hard reg, because hard regs can appear
2851 in more than one machine mode, and we must preserve the mode
2852 of each occurrence. Also, some hard regs appear in
2853 MEMs that are shared and mustn't be altered. Don't try to
2854 replace any reg that maps to a reg of class NO_REGS. */
2855 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2856 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2859 q
= REG_QTY (REGNO (x
));
2860 ent
= &qty_table
[q
];
2861 first
= ent
->first_reg
;
2862 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2863 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2864 : gen_rtx_REG (ent
->mode
, first
));
2871 fmt
= GET_RTX_FORMAT (code
);
2872 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2877 validate_canon_reg (&XEXP (x
, i
), insn
);
2878 else if (fmt
[i
] == 'E')
2879 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2880 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2886 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2887 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2888 what values are being compared.
2890 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2891 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2892 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2893 compared to produce cc0.
2895 The return value is the comparison operator and is either the code of
2896 A or the code corresponding to the inverse of the comparison. */
2898 static enum rtx_code
2899 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2900 machine_mode
*pmode1
, machine_mode
*pmode2
)
2903 hash_set
<rtx
> *visited
= NULL
;
2904 /* Set nonzero when we find something of interest. */
2907 arg1
= *parg1
, arg2
= *parg2
;
2909 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2911 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2913 int reverse_code
= 0;
2914 struct table_elt
*p
= 0;
2916 /* Remember state from previous iteration. */
2920 visited
= new hash_set
<rtx
>;
2925 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2926 On machines with CC0, this is the only case that can occur, since
2927 fold_rtx will return the COMPARE or item being compared with zero
2930 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2933 /* If ARG1 is a comparison operator and CODE is testing for
2934 STORE_FLAG_VALUE, get the inner arguments. */
2936 else if (COMPARISON_P (arg1
))
2938 #ifdef FLOAT_STORE_FLAG_VALUE
2939 REAL_VALUE_TYPE fsfv
;
2943 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2944 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2945 #ifdef FLOAT_STORE_FLAG_VALUE
2946 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2947 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2948 REAL_VALUE_NEGATIVE (fsfv
)))
2953 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2954 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2955 #ifdef FLOAT_STORE_FLAG_VALUE
2956 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2957 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2958 REAL_VALUE_NEGATIVE (fsfv
)))
2961 x
= arg1
, reverse_code
= 1;
2964 /* ??? We could also check for
2966 (ne (and (eq (...) (const_int 1))) (const_int 0))
2968 and related forms, but let's wait until we see them occurring. */
2971 /* Look up ARG1 in the hash table and see if it has an equivalence
2972 that lets us see what is being compared. */
2973 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2976 p
= p
->first_same_value
;
2978 /* If what we compare is already known to be constant, that is as
2980 We need to break the loop in this case, because otherwise we
2981 can have an infinite loop when looking at a reg that is known
2982 to be a constant which is the same as a comparison of a reg
2983 against zero which appears later in the insn stream, which in
2984 turn is constant and the same as the comparison of the first reg
2990 for (; p
; p
= p
->next_same_value
)
2992 machine_mode inner_mode
= GET_MODE (p
->exp
);
2993 #ifdef FLOAT_STORE_FLAG_VALUE
2994 REAL_VALUE_TYPE fsfv
;
2997 /* If the entry isn't valid, skip it. */
2998 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3001 /* If it's a comparison we've used before, skip it. */
3002 if (visited
&& visited
->contains (p
->exp
))
3005 if (GET_CODE (p
->exp
) == COMPARE
3006 /* Another possibility is that this machine has a compare insn
3007 that includes the comparison code. In that case, ARG1 would
3008 be equivalent to a comparison operation that would set ARG1 to
3009 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3010 ORIG_CODE is the actual comparison being done; if it is an EQ,
3011 we must reverse ORIG_CODE. On machine with a negative value
3012 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3015 && val_signbit_known_set_p (inner_mode
,
3017 #ifdef FLOAT_STORE_FLAG_VALUE
3019 && SCALAR_FLOAT_MODE_P (inner_mode
)
3020 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3021 REAL_VALUE_NEGATIVE (fsfv
)))
3024 && COMPARISON_P (p
->exp
)))
3029 else if ((code
== EQ
3031 && val_signbit_known_set_p (inner_mode
,
3033 #ifdef FLOAT_STORE_FLAG_VALUE
3035 && SCALAR_FLOAT_MODE_P (inner_mode
)
3036 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3037 REAL_VALUE_NEGATIVE (fsfv
)))
3040 && COMPARISON_P (p
->exp
))
3047 /* If this non-trapping address, e.g. fp + constant, the
3048 equivalent is a better operand since it may let us predict
3049 the value of the comparison. */
3050 else if (!rtx_addr_can_trap_p (p
->exp
))
3057 /* If we didn't find a useful equivalence for ARG1, we are done.
3058 Otherwise, set up for the next iteration. */
3062 /* If we need to reverse the comparison, make sure that that is
3063 possible -- we can't necessarily infer the value of GE from LT
3064 with floating-point operands. */
3067 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3068 if (reversed
== UNKNOWN
)
3073 else if (COMPARISON_P (x
))
3074 code
= GET_CODE (x
);
3075 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3078 /* Return our results. Return the modes from before fold_rtx
3079 because fold_rtx might produce const_int, and then it's too late. */
3080 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3081 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3088 /* If X is a nontrivial arithmetic operation on an argument for which
3089 a constant value can be determined, return the result of operating
3090 on that value, as a constant. Otherwise, return X, possibly with
3091 one or more operands changed to a forward-propagated constant.
3093 If X is a register whose contents are known, we do NOT return
3094 those contents here; equiv_constant is called to perform that task.
3095 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3097 INSN is the insn that we may be modifying. If it is 0, make a copy
3098 of X before modifying it. */
3101 fold_rtx (rtx x
, rtx_insn
*insn
)
3110 /* Operands of X. */
3111 /* Workaround -Wmaybe-uninitialized false positive during
3112 profiledbootstrap by initializing them. */
3113 rtx folded_arg0
= NULL_RTX
;
3114 rtx folded_arg1
= NULL_RTX
;
3116 /* Constant equivalents of first three operands of X;
3117 0 when no such equivalent is known. */
3122 /* The mode of the first operand of X. We need this for sign and zero
3124 machine_mode mode_arg0
;
3129 /* Try to perform some initial simplifications on X. */
3130 code
= GET_CODE (x
);
3135 /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3136 than it would in other contexts. Basically its mode does not
3137 signify the size of the object read. That information is carried
3138 by size operand. If we happen to have a MEM of the appropriate
3139 mode in our tables with a constant value we could simplify the
3140 extraction incorrectly if we allowed substitution of that value
3144 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3154 /* No use simplifying an EXPR_LIST
3155 since they are used only for lists of args
3156 in a function call's REG_EQUAL note. */
3161 return prev_insn_cc0
;
3166 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3167 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3168 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3173 if (NO_FUNCTION_CSE
&& CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3177 /* Anything else goes through the loop below. */
3182 mode
= GET_MODE (x
);
3186 mode_arg0
= VOIDmode
;
3188 /* Try folding our operands.
3189 Then see which ones have constant values known. */
3191 fmt
= GET_RTX_FORMAT (code
);
3192 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3195 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3196 machine_mode mode_arg
= GET_MODE (folded_arg
);
3198 switch (GET_CODE (folded_arg
))
3203 const_arg
= equiv_constant (folded_arg
);
3210 const_arg
= folded_arg
;
3214 /* The cc0-user and cc0-setter may be in different blocks if
3215 the cc0-setter potentially traps. In that case PREV_INSN_CC0
3216 will have been cleared as we exited the block with the
3219 While we could potentially track cc0 in this case, it just
3220 doesn't seem to be worth it given that cc0 targets are not
3221 terribly common or important these days and trapping math
3222 is rarely used. The combination of those two conditions
3223 necessary to trip this situation is exceedingly rare in the
3227 const_arg
= NULL_RTX
;
3231 folded_arg
= prev_insn_cc0
;
3232 mode_arg
= prev_insn_cc0_mode
;
3233 const_arg
= equiv_constant (folded_arg
);
3238 folded_arg
= fold_rtx (folded_arg
, insn
);
3239 const_arg
= equiv_constant (folded_arg
);
3243 /* For the first three operands, see if the operand
3244 is constant or equivalent to a constant. */
3248 folded_arg0
= folded_arg
;
3249 const_arg0
= const_arg
;
3250 mode_arg0
= mode_arg
;
3253 folded_arg1
= folded_arg
;
3254 const_arg1
= const_arg
;
3257 const_arg2
= const_arg
;
3261 /* Pick the least expensive of the argument and an equivalent constant
3264 && const_arg
!= folded_arg
3265 && (COST_IN (const_arg
, mode_arg
, code
, i
)
3266 <= COST_IN (folded_arg
, mode_arg
, code
, i
))
3268 /* It's not safe to substitute the operand of a conversion
3269 operator with a constant, as the conversion's identity
3270 depends upon the mode of its operand. This optimization
3271 is handled by the call to simplify_unary_operation. */
3272 && (GET_RTX_CLASS (code
) != RTX_UNARY
3273 || GET_MODE (const_arg
) == mode_arg0
3274 || (code
!= ZERO_EXTEND
3275 && code
!= SIGN_EXTEND
3277 && code
!= FLOAT_TRUNCATE
3278 && code
!= FLOAT_EXTEND
3281 && code
!= UNSIGNED_FLOAT
3282 && code
!= UNSIGNED_FIX
)))
3283 folded_arg
= const_arg
;
3285 if (folded_arg
== XEXP (x
, i
))
3288 if (insn
== NULL_RTX
&& !changed
)
3291 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3296 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3297 consistent with the order in X. */
3298 if (canonicalize_change_group (insn
, x
))
3301 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3302 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3305 apply_change_group ();
3308 /* If X is an arithmetic operation, see if we can simplify it. */
3310 switch (GET_RTX_CLASS (code
))
3314 /* We can't simplify extension ops unless we know the
3316 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3317 && mode_arg0
== VOIDmode
)
3320 new_rtx
= simplify_unary_operation (code
, mode
,
3321 const_arg0
? const_arg0
: folded_arg0
,
3327 case RTX_COMM_COMPARE
:
3328 /* See what items are actually being compared and set FOLDED_ARG[01]
3329 to those values and CODE to the actual comparison code. If any are
3330 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3331 do anything if both operands are already known to be constant. */
3333 /* ??? Vector mode comparisons are not supported yet. */
3334 if (VECTOR_MODE_P (mode
))
3337 if (const_arg0
== 0 || const_arg1
== 0)
3339 struct table_elt
*p0
, *p1
;
3340 rtx true_rtx
, false_rtx
;
3341 machine_mode mode_arg1
;
3343 if (SCALAR_FLOAT_MODE_P (mode
))
3345 #ifdef FLOAT_STORE_FLAG_VALUE
3346 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3347 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3349 true_rtx
= NULL_RTX
;
3351 false_rtx
= CONST0_RTX (mode
);
3355 true_rtx
= const_true_rtx
;
3356 false_rtx
= const0_rtx
;
3359 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3360 &mode_arg0
, &mode_arg1
);
3362 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3363 what kinds of things are being compared, so we can't do
3364 anything with this comparison. */
3366 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3369 const_arg0
= equiv_constant (folded_arg0
);
3370 const_arg1
= equiv_constant (folded_arg1
);
3372 /* If we do not now have two constants being compared, see
3373 if we can nevertheless deduce some things about the
3375 if (const_arg0
== 0 || const_arg1
== 0)
3377 if (const_arg1
!= NULL
)
3379 rtx cheapest_simplification
;
3382 struct table_elt
*p
;
3384 /* See if we can find an equivalent of folded_arg0
3385 that gets us a cheaper expression, possibly a
3386 constant through simplifications. */
3387 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3392 cheapest_simplification
= x
;
3393 cheapest_cost
= COST (x
, mode
);
3395 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3399 /* If the entry isn't valid, skip it. */
3400 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3403 /* Try to simplify using this equivalence. */
3405 = simplify_relational_operation (code
, mode
,
3410 if (simp_result
== NULL
)
3413 cost
= COST (simp_result
, mode
);
3414 if (cost
< cheapest_cost
)
3416 cheapest_cost
= cost
;
3417 cheapest_simplification
= simp_result
;
3421 /* If we have a cheaper expression now, use that
3422 and try folding it further, from the top. */
3423 if (cheapest_simplification
!= x
)
3424 return fold_rtx (copy_rtx (cheapest_simplification
),
3429 /* See if the two operands are the same. */
3431 if ((REG_P (folded_arg0
)
3432 && REG_P (folded_arg1
)
3433 && (REG_QTY (REGNO (folded_arg0
))
3434 == REG_QTY (REGNO (folded_arg1
))))
3435 || ((p0
= lookup (folded_arg0
,
3436 SAFE_HASH (folded_arg0
, mode_arg0
),
3438 && (p1
= lookup (folded_arg1
,
3439 SAFE_HASH (folded_arg1
, mode_arg0
),
3441 && p0
->first_same_value
== p1
->first_same_value
))
3442 folded_arg1
= folded_arg0
;
3444 /* If FOLDED_ARG0 is a register, see if the comparison we are
3445 doing now is either the same as we did before or the reverse
3446 (we only check the reverse if not floating-point). */
3447 else if (REG_P (folded_arg0
))
3449 int qty
= REG_QTY (REGNO (folded_arg0
));
3451 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3453 struct qty_table_elem
*ent
= &qty_table
[qty
];
3455 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3456 || (! FLOAT_MODE_P (mode_arg0
)
3457 && comparison_dominates_p (ent
->comparison_code
,
3458 reverse_condition (code
))))
3459 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3461 && rtx_equal_p (ent
->comparison_const
,
3463 || (REG_P (folded_arg1
)
3464 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3466 if (comparison_dominates_p (ent
->comparison_code
, code
))
3481 /* If we are comparing against zero, see if the first operand is
3482 equivalent to an IOR with a constant. If so, we may be able to
3483 determine the result of this comparison. */
3484 if (const_arg1
== const0_rtx
&& !const_arg0
)
3486 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3490 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3491 && CONST_INT_P (inner_const
)
3492 && INTVAL (inner_const
) != 0)
3493 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3497 rtx op0
= const_arg0
? const_arg0
: copy_rtx (folded_arg0
);
3498 rtx op1
= const_arg1
? const_arg1
: copy_rtx (folded_arg1
);
3499 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
,
3505 case RTX_COMM_ARITH
:
3509 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3510 with that LABEL_REF as its second operand. If so, the result is
3511 the first operand of that MINUS. This handles switches with an
3512 ADDR_DIFF_VEC table. */
3513 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3516 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3517 : lookup_as_function (folded_arg0
, MINUS
);
3519 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3520 && LABEL_REF_LABEL (XEXP (y
, 1)) == LABEL_REF_LABEL (const_arg1
))
3523 /* Now try for a CONST of a MINUS like the above. */
3524 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3525 : lookup_as_function (folded_arg0
, CONST
))) != 0
3526 && GET_CODE (XEXP (y
, 0)) == MINUS
3527 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3528 && LABEL_REF_LABEL (XEXP (XEXP (y
, 0), 1)) == LABEL_REF_LABEL (const_arg1
))
3529 return XEXP (XEXP (y
, 0), 0);
3532 /* Likewise if the operands are in the other order. */
3533 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3536 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3537 : lookup_as_function (folded_arg1
, MINUS
);
3539 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3540 && LABEL_REF_LABEL (XEXP (y
, 1)) == LABEL_REF_LABEL (const_arg0
))
3543 /* Now try for a CONST of a MINUS like the above. */
3544 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3545 : lookup_as_function (folded_arg1
, CONST
))) != 0
3546 && GET_CODE (XEXP (y
, 0)) == MINUS
3547 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3548 && LABEL_REF_LABEL (XEXP (XEXP (y
, 0), 1)) == LABEL_REF_LABEL (const_arg0
))
3549 return XEXP (XEXP (y
, 0), 0);
3552 /* If second operand is a register equivalent to a negative
3553 CONST_INT, see if we can find a register equivalent to the
3554 positive constant. Make a MINUS if so. Don't do this for
3555 a non-negative constant since we might then alternate between
3556 choosing positive and negative constants. Having the positive
3557 constant previously-used is the more common case. Be sure
3558 the resulting constant is non-negative; if const_arg1 were
3559 the smallest negative number this would overflow: depending
3560 on the mode, this would either just be the same value (and
3561 hence not save anything) or be incorrect. */
3562 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3563 && INTVAL (const_arg1
) < 0
3564 /* This used to test
3566 -INTVAL (const_arg1) >= 0
3568 But The Sun V5.0 compilers mis-compiled that test. So
3569 instead we test for the problematic value in a more direct
3570 manner and hope the Sun compilers get it correct. */
3571 && INTVAL (const_arg1
) !=
3572 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
3573 && REG_P (folded_arg1
))
3575 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3577 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3580 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3582 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3583 canon_reg (p
->exp
, NULL
));
3588 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3589 If so, produce (PLUS Z C2-C). */
3590 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
))
3592 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3593 if (y
&& CONST_INT_P (XEXP (y
, 1)))
3594 return fold_rtx (plus_constant (mode
, copy_rtx (y
),
3595 -INTVAL (const_arg1
)),
3602 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3603 case IOR
: case AND
: case XOR
:
3605 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3606 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3607 is known to be of similar form, we may be able to replace the
3608 operation with a combined operation. This may eliminate the
3609 intermediate operation if every use is simplified in this way.
3610 Note that the similar optimization done by combine.c only works
3611 if the intermediate operation's result has only one reference. */
3613 if (REG_P (folded_arg0
)
3614 && const_arg1
&& CONST_INT_P (const_arg1
))
3617 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3618 rtx y
, inner_const
, new_const
;
3619 rtx canon_const_arg1
= const_arg1
;
3620 enum rtx_code associate_code
;
3623 && (INTVAL (const_arg1
) >= GET_MODE_PRECISION (mode
)
3624 || INTVAL (const_arg1
) < 0))
3626 if (SHIFT_COUNT_TRUNCATED
)
3627 canon_const_arg1
= GEN_INT (INTVAL (const_arg1
)
3628 & (GET_MODE_BITSIZE (mode
)
3634 y
= lookup_as_function (folded_arg0
, code
);
3638 /* If we have compiled a statement like
3639 "if (x == (x & mask1))", and now are looking at
3640 "x & mask2", we will have a case where the first operand
3641 of Y is the same as our first operand. Unless we detect
3642 this case, an infinite loop will result. */
3643 if (XEXP (y
, 0) == folded_arg0
)
3646 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3647 if (!inner_const
|| !CONST_INT_P (inner_const
))
3650 /* Don't associate these operations if they are a PLUS with the
3651 same constant and it is a power of two. These might be doable
3652 with a pre- or post-increment. Similarly for two subtracts of
3653 identical powers of two with post decrement. */
3655 if (code
== PLUS
&& const_arg1
== inner_const
3656 && ((HAVE_PRE_INCREMENT
3657 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3658 || (HAVE_POST_INCREMENT
3659 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3660 || (HAVE_PRE_DECREMENT
3661 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
3662 || (HAVE_POST_DECREMENT
3663 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
3666 /* ??? Vector mode shifts by scalar
3667 shift operand are not supported yet. */
3668 if (is_shift
&& VECTOR_MODE_P (mode
))
3672 && (INTVAL (inner_const
) >= GET_MODE_PRECISION (mode
)
3673 || INTVAL (inner_const
) < 0))
3675 if (SHIFT_COUNT_TRUNCATED
)
3676 inner_const
= GEN_INT (INTVAL (inner_const
)
3677 & (GET_MODE_BITSIZE (mode
) - 1));
3682 /* Compute the code used to compose the constants. For example,
3683 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3685 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3687 new_const
= simplify_binary_operation (associate_code
, mode
,
3694 /* If we are associating shift operations, don't let this
3695 produce a shift of the size of the object or larger.
3696 This could occur when we follow a sign-extend by a right
3697 shift on a machine that does a sign-extend as a pair
3701 && CONST_INT_P (new_const
)
3702 && INTVAL (new_const
) >= GET_MODE_PRECISION (mode
))
3704 /* As an exception, we can turn an ASHIFTRT of this
3705 form into a shift of the number of bits - 1. */
3706 if (code
== ASHIFTRT
)
3707 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
3708 else if (!side_effects_p (XEXP (y
, 0)))
3709 return CONST0_RTX (mode
);
3714 y
= copy_rtx (XEXP (y
, 0));
3716 /* If Y contains our first operand (the most common way this
3717 can happen is if Y is a MEM), we would do into an infinite
3718 loop if we tried to fold it. So don't in that case. */
3720 if (! reg_mentioned_p (folded_arg0
, y
))
3721 y
= fold_rtx (y
, insn
);
3723 return simplify_gen_binary (code
, mode
, y
, new_const
);
3727 case DIV
: case UDIV
:
3728 /* ??? The associative optimization performed immediately above is
3729 also possible for DIV and UDIV using associate_code of MULT.
3730 However, we would need extra code to verify that the
3731 multiplication does not overflow, that is, there is no overflow
3732 in the calculation of new_const. */
3739 new_rtx
= simplify_binary_operation (code
, mode
,
3740 const_arg0
? const_arg0
: folded_arg0
,
3741 const_arg1
? const_arg1
: folded_arg1
);
3745 /* (lo_sum (high X) X) is simply X. */
3746 if (code
== LO_SUM
&& const_arg0
!= 0
3747 && GET_CODE (const_arg0
) == HIGH
3748 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3753 case RTX_BITFIELD_OPS
:
3754 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3755 const_arg0
? const_arg0
: folded_arg0
,
3756 const_arg1
? const_arg1
: folded_arg1
,
3757 const_arg2
? const_arg2
: XEXP (x
, 2));
3764 return new_rtx
? new_rtx
: x
;
3767 /* Return a constant value currently equivalent to X.
3768 Return 0 if we don't know one. */
3771 equiv_constant (rtx x
)
3774 && REGNO_QTY_VALID_P (REGNO (x
)))
3776 int x_q
= REG_QTY (REGNO (x
));
3777 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3779 if (x_ent
->const_rtx
)
3780 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3783 if (x
== 0 || CONSTANT_P (x
))
3786 if (GET_CODE (x
) == SUBREG
)
3788 machine_mode mode
= GET_MODE (x
);
3789 machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3792 /* See if we previously assigned a constant value to this SUBREG. */
3793 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3794 || (new_rtx
= lookup_as_function (x
, CONST_WIDE_INT
)) != 0
3795 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3796 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3799 /* If we didn't and if doing so makes sense, see if we previously
3800 assigned a constant value to the enclosing word mode SUBREG. */
3801 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
)
3802 && GET_MODE_SIZE (word_mode
) < GET_MODE_SIZE (imode
))
3804 int byte
= SUBREG_BYTE (x
) - subreg_lowpart_offset (mode
, word_mode
);
3805 if (byte
>= 0 && (byte
% UNITS_PER_WORD
) == 0)
3807 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3808 new_rtx
= lookup_as_function (y
, CONST_INT
);
3810 return gen_lowpart (mode
, new_rtx
);
3814 /* Otherwise see if we already have a constant for the inner REG,
3815 and if that is enough to calculate an equivalent constant for
3816 the subreg. Note that the upper bits of paradoxical subregs
3817 are undefined, so they cannot be said to equal anything. */
3818 if (REG_P (SUBREG_REG (x
))
3819 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (imode
)
3820 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3821 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3826 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3827 the hash table in case its value was seen before. */
3831 struct table_elt
*elt
;
3833 x
= avoid_constant_pool_reference (x
);
3837 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3841 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3842 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3849 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3852 In certain cases, this can cause us to add an equivalence. For example,
3853 if we are following the taken case of
3855 we can add the fact that `i' and '2' are now equivalent.
3857 In any case, we can record that this comparison was passed. If the same
3858 comparison is seen later, we will know its value. */
3861 record_jump_equiv (rtx_insn
*insn
, bool taken
)
3863 int cond_known_true
;
3866 machine_mode mode
, mode0
, mode1
;
3867 int reversed_nonequality
= 0;
3870 /* Ensure this is the right kind of insn. */
3871 gcc_assert (any_condjump_p (insn
));
3873 set
= pc_set (insn
);
3875 /* See if this jump condition is known true or false. */
3877 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3879 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3881 /* Get the type of comparison being done and the operands being compared.
3882 If we had to reverse a non-equality condition, record that fact so we
3883 know that it isn't valid for floating-point. */
3884 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3885 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3886 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3888 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3889 if (! cond_known_true
)
3891 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3893 /* Don't remember if we can't find the inverse. */
3894 if (code
== UNKNOWN
)
3898 /* The mode is the mode of the non-constant. */
3900 if (mode1
!= VOIDmode
)
3903 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3906 /* Yet another form of subreg creation. In this case, we want something in
3907 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3910 record_jump_cond_subreg (machine_mode mode
, rtx op
)
3912 machine_mode op_mode
= GET_MODE (op
);
3913 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3915 return lowpart_subreg (mode
, op
, op_mode
);
3918 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3919 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3920 Make any useful entries we can with that information. Called from
3921 above function and called recursively. */
3924 record_jump_cond (enum rtx_code code
, machine_mode mode
, rtx op0
,
3925 rtx op1
, int reversed_nonequality
)
3927 unsigned op0_hash
, op1_hash
;
3928 int op0_in_memory
, op1_in_memory
;
3929 struct table_elt
*op0_elt
, *op1_elt
;
3931 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3932 we know that they are also equal in the smaller mode (this is also
3933 true for all smaller modes whether or not there is a SUBREG, but
3934 is not worth testing for with no SUBREG). */
3936 /* Note that GET_MODE (op0) may not equal MODE. */
3937 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3939 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3940 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3942 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3943 reversed_nonequality
);
3946 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3948 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3949 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3951 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3952 reversed_nonequality
);
3955 /* Similarly, if this is an NE comparison, and either is a SUBREG
3956 making a smaller mode, we know the whole thing is also NE. */
3958 /* Note that GET_MODE (op0) may not equal MODE;
3959 if we test MODE instead, we can get an infinite recursion
3960 alternating between two modes each wider than MODE. */
3962 if (code
== NE
&& GET_CODE (op0
) == SUBREG
3963 && subreg_lowpart_p (op0
)
3964 && (GET_MODE_SIZE (GET_MODE (op0
))
3965 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3967 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3968 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3970 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3971 reversed_nonequality
);
3974 if (code
== NE
&& GET_CODE (op1
) == SUBREG
3975 && subreg_lowpart_p (op1
)
3976 && (GET_MODE_SIZE (GET_MODE (op1
))
3977 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3979 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3980 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3982 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3983 reversed_nonequality
);
3986 /* Hash both operands. */
3989 hash_arg_in_memory
= 0;
3990 op0_hash
= HASH (op0
, mode
);
3991 op0_in_memory
= hash_arg_in_memory
;
3997 hash_arg_in_memory
= 0;
3998 op1_hash
= HASH (op1
, mode
);
3999 op1_in_memory
= hash_arg_in_memory
;
4004 /* Look up both operands. */
4005 op0_elt
= lookup (op0
, op0_hash
, mode
);
4006 op1_elt
= lookup (op1
, op1_hash
, mode
);
4008 /* If both operands are already equivalent or if they are not in the
4009 table but are identical, do nothing. */
4010 if ((op0_elt
!= 0 && op1_elt
!= 0
4011 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4012 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4015 /* If we aren't setting two things equal all we can do is save this
4016 comparison. Similarly if this is floating-point. In the latter
4017 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4018 If we record the equality, we might inadvertently delete code
4019 whose intent was to change -0 to +0. */
4021 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4023 struct qty_table_elem
*ent
;
4026 /* If we reversed a floating-point comparison, if OP0 is not a
4027 register, or if OP1 is neither a register or constant, we can't
4031 op1
= equiv_constant (op1
);
4033 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4034 || !REG_P (op0
) || op1
== 0)
4037 /* Put OP0 in the hash table if it isn't already. This gives it a
4038 new quantity number. */
4041 if (insert_regs (op0
, NULL
, 0))
4043 rehash_using_reg (op0
);
4044 op0_hash
= HASH (op0
, mode
);
4046 /* If OP0 is contained in OP1, this changes its hash code
4047 as well. Faster to rehash than to check, except
4048 for the simple case of a constant. */
4049 if (! CONSTANT_P (op1
))
4050 op1_hash
= HASH (op1
,mode
);
4053 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4054 op0_elt
->in_memory
= op0_in_memory
;
4057 qty
= REG_QTY (REGNO (op0
));
4058 ent
= &qty_table
[qty
];
4060 ent
->comparison_code
= code
;
4063 /* Look it up again--in case op0 and op1 are the same. */
4064 op1_elt
= lookup (op1
, op1_hash
, mode
);
4066 /* Put OP1 in the hash table so it gets a new quantity number. */
4069 if (insert_regs (op1
, NULL
, 0))
4071 rehash_using_reg (op1
);
4072 op1_hash
= HASH (op1
, mode
);
4075 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4076 op1_elt
->in_memory
= op1_in_memory
;
4079 ent
->comparison_const
= NULL_RTX
;
4080 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4084 ent
->comparison_const
= op1
;
4085 ent
->comparison_qty
= -1;
4091 /* If either side is still missing an equivalence, make it now,
4092 then merge the equivalences. */
4096 if (insert_regs (op0
, NULL
, 0))
4098 rehash_using_reg (op0
);
4099 op0_hash
= HASH (op0
, mode
);
4102 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4103 op0_elt
->in_memory
= op0_in_memory
;
4108 if (insert_regs (op1
, NULL
, 0))
4110 rehash_using_reg (op1
);
4111 op1_hash
= HASH (op1
, mode
);
4114 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4115 op1_elt
->in_memory
= op1_in_memory
;
4118 merge_equiv_classes (op0_elt
, op1_elt
);
4121 /* CSE processing for one instruction.
4123 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4124 but the few that "leak through" are cleaned up by cse_insn, and complex
4125 addressing modes are often formed here.
4127 The main function is cse_insn, and between here and that function
4128 a couple of helper functions is defined to keep the size of cse_insn
4129 within reasonable proportions.
4131 Data is shared between the main and helper functions via STRUCT SET,
4132 that contains all data related for every set in the instruction that
4135 Note that cse_main processes all sets in the instruction. Most
4136 passes in GCC only process simple SET insns or single_set insns, but
4137 CSE processes insns with multiple sets as well. */
4139 /* Data on one SET contained in the instruction. */
4143 /* The SET rtx itself. */
4145 /* The SET_SRC of the rtx (the original value, if it is changing). */
4147 /* The hash-table element for the SET_SRC of the SET. */
4148 struct table_elt
*src_elt
;
4149 /* Hash value for the SET_SRC. */
4151 /* Hash value for the SET_DEST. */
4153 /* The SET_DEST, with SUBREG, etc., stripped. */
4155 /* Nonzero if the SET_SRC is in memory. */
4157 /* Nonzero if the SET_SRC contains something
4158 whose value cannot be predicted and understood. */
4160 /* Original machine mode, in case it becomes a CONST_INT.
4161 The size of this field should match the size of the mode
4162 field of struct rtx_def (see rtl.h). */
4163 ENUM_BITFIELD(machine_mode
) mode
: 8;
4164 /* A constant equivalent for SET_SRC, if any. */
4166 /* Hash value of constant equivalent for SET_SRC. */
4167 unsigned src_const_hash
;
4168 /* Table entry for constant equivalent for SET_SRC, if any. */
4169 struct table_elt
*src_const_elt
;
4170 /* Table entry for the destination address. */
4171 struct table_elt
*dest_addr_elt
;
4174 /* Special handling for (set REG0 REG1) where REG0 is the
4175 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4176 be used in the sequel, so (if easily done) change this insn to
4177 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4178 that computed their value. Then REG1 will become a dead store
4179 and won't cloud the situation for later optimizations.
4181 Do not make this change if REG1 is a hard register, because it will
4182 then be used in the sequel and we may be changing a two-operand insn
4183 into a three-operand insn.
4185 This is the last transformation that cse_insn will try to do. */
4188 try_back_substitute_reg (rtx set
, rtx_insn
*insn
)
4190 rtx dest
= SET_DEST (set
);
4191 rtx src
= SET_SRC (set
);
4194 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4195 && REGNO_QTY_VALID_P (REGNO (src
)))
4197 int src_q
= REG_QTY (REGNO (src
));
4198 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4200 if (src_ent
->first_reg
== REGNO (dest
))
4202 /* Scan for the previous nonnote insn, but stop at a basic
4204 rtx_insn
*prev
= insn
;
4205 rtx_insn
*bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4208 prev
= PREV_INSN (prev
);
4210 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4212 /* Do not swap the registers around if the previous instruction
4213 attaches a REG_EQUIV note to REG1.
4215 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4216 from the pseudo that originally shadowed an incoming argument
4217 to another register. Some uses of REG_EQUIV might rely on it
4218 being attached to REG1 rather than REG2.
4220 This section previously turned the REG_EQUIV into a REG_EQUAL
4221 note. We cannot do that because REG_EQUIV may provide an
4222 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4223 if (NONJUMP_INSN_P (prev
)
4224 && GET_CODE (PATTERN (prev
)) == SET
4225 && SET_DEST (PATTERN (prev
)) == src
4226 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4230 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4231 validate_change (insn
, &SET_DEST (set
), src
, 1);
4232 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4233 apply_change_group ();
4235 /* If INSN has a REG_EQUAL note, and this note mentions
4236 REG0, then we must delete it, because the value in
4237 REG0 has changed. If the note's value is REG1, we must
4238 also delete it because that is now this insn's dest. */
4239 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4241 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4242 || rtx_equal_p (src
, XEXP (note
, 0))))
4243 remove_note (insn
, note
);
4249 /* Record all the SETs in this instruction into SETS_PTR,
4250 and return the number of recorded sets. */
4252 find_sets_in_insn (rtx_insn
*insn
, struct set
**psets
)
4254 struct set
*sets
= *psets
;
4256 rtx x
= PATTERN (insn
);
4258 if (GET_CODE (x
) == SET
)
4260 /* Ignore SETs that are unconditional jumps.
4261 They never need cse processing, so this does not hurt.
4262 The reason is not efficiency but rather
4263 so that we can test at the end for instructions
4264 that have been simplified to unconditional jumps
4265 and not be misled by unchanged instructions
4266 that were unconditional jumps to begin with. */
4267 if (SET_DEST (x
) == pc_rtx
4268 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4270 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4271 The hard function value register is used only once, to copy to
4272 someplace else, so it isn't worth cse'ing. */
4273 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4276 sets
[n_sets
++].rtl
= x
;
4278 else if (GET_CODE (x
) == PARALLEL
)
4280 int i
, lim
= XVECLEN (x
, 0);
4282 /* Go over the expressions of the PARALLEL in forward order, to
4283 put them in the same order in the SETS array. */
4284 for (i
= 0; i
< lim
; i
++)
4286 rtx y
= XVECEXP (x
, 0, i
);
4287 if (GET_CODE (y
) == SET
)
4289 /* As above, we ignore unconditional jumps and call-insns and
4290 ignore the result of apply_change_group. */
4291 if (SET_DEST (y
) == pc_rtx
4292 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4294 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4297 sets
[n_sets
++].rtl
= y
;
4305 /* Where possible, substitute every register reference in the N_SETS
4306 number of SETS in INSN with the the canonical register.
4308 Register canonicalization propagatest the earliest register (i.e.
4309 one that is set before INSN) with the same value. This is a very
4310 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4311 to RTL. For instance, a CONST for an address is usually expanded
4312 multiple times to loads into different registers, thus creating many
4313 subexpressions of the form:
4315 (set (reg1) (some_const))
4316 (set (mem (... reg1 ...) (thing)))
4317 (set (reg2) (some_const))
4318 (set (mem (... reg2 ...) (thing)))
4320 After canonicalizing, the code takes the following form:
4322 (set (reg1) (some_const))
4323 (set (mem (... reg1 ...) (thing)))
4324 (set (reg2) (some_const))
4325 (set (mem (... reg1 ...) (thing)))
4327 The set to reg2 is now trivially dead, and the memory reference (or
4328 address, or whatever) may be a candidate for further CSEing.
4330 In this function, the result of apply_change_group can be ignored;
4334 canonicalize_insn (rtx_insn
*insn
, struct set
**psets
, int n_sets
)
4336 struct set
*sets
= *psets
;
4338 rtx x
= PATTERN (insn
);
4343 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4344 if (GET_CODE (XEXP (tem
, 0)) != SET
)
4345 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4348 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4350 canon_reg (SET_SRC (x
), insn
);
4351 apply_change_group ();
4352 fold_rtx (SET_SRC (x
), insn
);
4354 else if (GET_CODE (x
) == CLOBBER
)
4356 /* If we clobber memory, canon the address.
4357 This does nothing when a register is clobbered
4358 because we have already invalidated the reg. */
4359 if (MEM_P (XEXP (x
, 0)))
4360 canon_reg (XEXP (x
, 0), insn
);
4362 else if (GET_CODE (x
) == USE
4363 && ! (REG_P (XEXP (x
, 0))
4364 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4365 /* Canonicalize a USE of a pseudo register or memory location. */
4366 canon_reg (x
, insn
);
4367 else if (GET_CODE (x
) == ASM_OPERANDS
)
4369 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4371 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4372 if (!(REG_P (input
) && REGNO (input
) < FIRST_PSEUDO_REGISTER
))
4374 input
= canon_reg (input
, insn
);
4375 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4379 else if (GET_CODE (x
) == CALL
)
4381 canon_reg (x
, insn
);
4382 apply_change_group ();
4385 else if (DEBUG_INSN_P (insn
))
4386 canon_reg (PATTERN (insn
), insn
);
4387 else if (GET_CODE (x
) == PARALLEL
)
4389 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4391 rtx y
= XVECEXP (x
, 0, i
);
4392 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4394 canon_reg (SET_SRC (y
), insn
);
4395 apply_change_group ();
4396 fold_rtx (SET_SRC (y
), insn
);
4398 else if (GET_CODE (y
) == CLOBBER
)
4400 if (MEM_P (XEXP (y
, 0)))
4401 canon_reg (XEXP (y
, 0), insn
);
4403 else if (GET_CODE (y
) == USE
4404 && ! (REG_P (XEXP (y
, 0))
4405 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4406 canon_reg (y
, insn
);
4407 else if (GET_CODE (y
) == CALL
)
4409 canon_reg (y
, insn
);
4410 apply_change_group ();
4416 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4417 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4419 /* We potentially will process this insn many times. Therefore,
4420 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4423 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4424 because cse_insn handles those specially. */
4425 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4426 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4427 remove_note (insn
, tem
);
4430 canon_reg (XEXP (tem
, 0), insn
);
4431 apply_change_group ();
4432 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4433 df_notes_rescan (insn
);
4437 /* Canonicalize sources and addresses of destinations.
4438 We do this in a separate pass to avoid problems when a MATCH_DUP is
4439 present in the insn pattern. In that case, we want to ensure that
4440 we don't break the duplicate nature of the pattern. So we will replace
4441 both operands at the same time. Otherwise, we would fail to find an
4442 equivalent substitution in the loop calling validate_change below.
4444 We used to suppress canonicalization of DEST if it appears in SRC,
4445 but we don't do this any more. */
4447 for (i
= 0; i
< n_sets
; i
++)
4449 rtx dest
= SET_DEST (sets
[i
].rtl
);
4450 rtx src
= SET_SRC (sets
[i
].rtl
);
4451 rtx new_rtx
= canon_reg (src
, insn
);
4453 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4455 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4457 validate_change (insn
, &XEXP (dest
, 1),
4458 canon_reg (XEXP (dest
, 1), insn
), 1);
4459 validate_change (insn
, &XEXP (dest
, 2),
4460 canon_reg (XEXP (dest
, 2), insn
), 1);
4463 while (GET_CODE (dest
) == SUBREG
4464 || GET_CODE (dest
) == ZERO_EXTRACT
4465 || GET_CODE (dest
) == STRICT_LOW_PART
)
4466 dest
= XEXP (dest
, 0);
4469 canon_reg (dest
, insn
);
4472 /* Now that we have done all the replacements, we can apply the change
4473 group and see if they all work. Note that this will cause some
4474 canonicalizations that would have worked individually not to be applied
4475 because some other canonicalization didn't work, but this should not
4478 The result of apply_change_group can be ignored; see canon_reg. */
4480 apply_change_group ();
4483 /* Main function of CSE.
4484 First simplify sources and addresses of all assignments
4485 in the instruction, using previously-computed equivalents values.
4486 Then install the new sources and destinations in the table
4487 of available values. */
4490 cse_insn (rtx_insn
*insn
)
4492 rtx x
= PATTERN (insn
);
4498 struct table_elt
*src_eqv_elt
= 0;
4499 int src_eqv_volatile
= 0;
4500 int src_eqv_in_memory
= 0;
4501 unsigned src_eqv_hash
= 0;
4503 struct set
*sets
= (struct set
*) 0;
4505 if (GET_CODE (x
) == SET
)
4506 sets
= XALLOCA (struct set
);
4507 else if (GET_CODE (x
) == PARALLEL
)
4508 sets
= XALLOCAVEC (struct set
, XVECLEN (x
, 0));
4511 /* Records what this insn does to set CC0. */
4513 this_insn_cc0_mode
= VOIDmode
;
4515 /* Find all regs explicitly clobbered in this insn,
4516 to ensure they are not replaced with any other regs
4517 elsewhere in this insn. */
4518 invalidate_from_sets_and_clobbers (insn
);
4520 /* Record all the SETs in this instruction. */
4521 n_sets
= find_sets_in_insn (insn
, &sets
);
4523 /* Substitute the canonical register where possible. */
4524 canonicalize_insn (insn
, &sets
, n_sets
);
4526 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4527 if different, or if the DEST is a STRICT_LOW_PART. The latter condition
4528 is necessary because SRC_EQV is handled specially for this case, and if
4529 it isn't set, then there will be no equivalence for the destination. */
4530 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4531 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4532 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4533 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4534 src_eqv
= copy_rtx (XEXP (tem
, 0));
4536 /* Set sets[i].src_elt to the class each source belongs to.
4537 Detect assignments from or to volatile things
4538 and set set[i] to zero so they will be ignored
4539 in the rest of this function.
4541 Nothing in this loop changes the hash table or the register chains. */
4543 for (i
= 0; i
< n_sets
; i
++)
4545 bool repeat
= false;
4548 struct table_elt
*elt
= 0, *p
;
4552 rtx src_related
= 0;
4553 bool src_related_is_const_anchor
= false;
4554 struct table_elt
*src_const_elt
= 0;
4555 int src_cost
= MAX_COST
;
4556 int src_eqv_cost
= MAX_COST
;
4557 int src_folded_cost
= MAX_COST
;
4558 int src_related_cost
= MAX_COST
;
4559 int src_elt_cost
= MAX_COST
;
4560 int src_regcost
= MAX_COST
;
4561 int src_eqv_regcost
= MAX_COST
;
4562 int src_folded_regcost
= MAX_COST
;
4563 int src_related_regcost
= MAX_COST
;
4564 int src_elt_regcost
= MAX_COST
;
4565 /* Set nonzero if we need to call force_const_mem on with the
4566 contents of src_folded before using it. */
4567 int src_folded_force_flag
= 0;
4569 dest
= SET_DEST (sets
[i
].rtl
);
4570 src
= SET_SRC (sets
[i
].rtl
);
4572 /* If SRC is a constant that has no machine mode,
4573 hash it with the destination's machine mode.
4574 This way we can keep different modes separate. */
4576 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4577 sets
[i
].mode
= mode
;
4581 machine_mode eqvmode
= mode
;
4582 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4583 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4585 hash_arg_in_memory
= 0;
4586 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4588 /* Find the equivalence class for the equivalent expression. */
4591 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4593 src_eqv_volatile
= do_not_record
;
4594 src_eqv_in_memory
= hash_arg_in_memory
;
4597 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4598 value of the INNER register, not the destination. So it is not
4599 a valid substitution for the source. But save it for later. */
4600 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4603 src_eqv_here
= src_eqv
;
4605 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4606 simplified result, which may not necessarily be valid. */
4607 src_folded
= fold_rtx (src
, insn
);
4610 /* ??? This caused bad code to be generated for the m68k port with -O2.
4611 Suppose src is (CONST_INT -1), and that after truncation src_folded
4612 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4613 At the end we will add src and src_const to the same equivalence
4614 class. We now have 3 and -1 on the same equivalence class. This
4615 causes later instructions to be mis-optimized. */
4616 /* If storing a constant in a bitfield, pre-truncate the constant
4617 so we will be able to record it later. */
4618 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4620 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4622 if (CONST_INT_P (src
)
4623 && CONST_INT_P (width
)
4624 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4625 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4627 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4628 << INTVAL (width
)) - 1));
4632 /* Compute SRC's hash code, and also notice if it
4633 should not be recorded at all. In that case,
4634 prevent any further processing of this assignment. */
4636 hash_arg_in_memory
= 0;
4639 sets
[i
].src_hash
= HASH (src
, mode
);
4640 sets
[i
].src_volatile
= do_not_record
;
4641 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4643 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4644 a pseudo, do not record SRC. Using SRC as a replacement for
4645 anything else will be incorrect in that situation. Note that
4646 this usually occurs only for stack slots, in which case all the
4647 RTL would be referring to SRC, so we don't lose any optimization
4648 opportunities by not having SRC in the hash table. */
4651 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4653 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4654 sets
[i
].src_volatile
= 1;
4656 else if (GET_CODE (src
) == ASM_OPERANDS
4657 && GET_CODE (x
) == PARALLEL
)
4659 /* Do not record result of a non-volatile inline asm with
4660 more than one result. */
4662 sets
[i
].src_volatile
= 1;
4664 int j
, lim
= XVECLEN (x
, 0);
4665 for (j
= 0; j
< lim
; j
++)
4667 rtx y
= XVECEXP (x
, 0, j
);
4668 /* And do not record result of a non-volatile inline asm
4669 with "memory" clobber. */
4670 if (GET_CODE (y
) == CLOBBER
&& MEM_P (XEXP (y
, 0)))
4672 sets
[i
].src_volatile
= 1;
4679 /* It is no longer clear why we used to do this, but it doesn't
4680 appear to still be needed. So let's try without it since this
4681 code hurts cse'ing widened ops. */
4682 /* If source is a paradoxical subreg (such as QI treated as an SI),
4683 treat it as volatile. It may do the work of an SI in one context
4684 where the extra bits are not being used, but cannot replace an SI
4686 if (paradoxical_subreg_p (src
))
4687 sets
[i
].src_volatile
= 1;
4690 /* Locate all possible equivalent forms for SRC. Try to replace
4691 SRC in the insn with each cheaper equivalent.
4693 We have the following types of equivalents: SRC itself, a folded
4694 version, a value given in a REG_EQUAL note, or a value related
4697 Each of these equivalents may be part of an additional class
4698 of equivalents (if more than one is in the table, they must be in
4699 the same class; we check for this).
4701 If the source is volatile, we don't do any table lookups.
4703 We note any constant equivalent for possible later use in a
4706 if (!sets
[i
].src_volatile
)
4707 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4709 sets
[i
].src_elt
= elt
;
4711 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4713 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4715 /* The REG_EQUAL is indicating that two formerly distinct
4716 classes are now equivalent. So merge them. */
4717 merge_equiv_classes (elt
, src_eqv_elt
);
4718 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4719 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4725 else if (src_eqv_elt
)
4728 /* Try to find a constant somewhere and record it in `src_const'.
4729 Record its table element, if any, in `src_const_elt'. Look in
4730 any known equivalences first. (If the constant is not in the
4731 table, also set `sets[i].src_const_hash'). */
4733 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4737 src_const_elt
= elt
;
4742 && (CONSTANT_P (src_folded
)
4743 /* Consider (minus (label_ref L1) (label_ref L2)) as
4744 "constant" here so we will record it. This allows us
4745 to fold switch statements when an ADDR_DIFF_VEC is used. */
4746 || (GET_CODE (src_folded
) == MINUS
4747 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4748 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4749 src_const
= src_folded
, src_const_elt
= elt
;
4750 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4751 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4753 /* If we don't know if the constant is in the table, get its
4754 hash code and look it up. */
4755 if (src_const
&& src_const_elt
== 0)
4757 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4758 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4761 sets
[i
].src_const
= src_const
;
4762 sets
[i
].src_const_elt
= src_const_elt
;
4764 /* If the constant and our source are both in the table, mark them as
4765 equivalent. Otherwise, if a constant is in the table but the source
4766 isn't, set ELT to it. */
4767 if (src_const_elt
&& elt
4768 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4769 merge_equiv_classes (elt
, src_const_elt
);
4770 else if (src_const_elt
&& elt
== 0)
4771 elt
= src_const_elt
;
4773 /* See if there is a register linearly related to a constant
4774 equivalent of SRC. */
4776 && (GET_CODE (src_const
) == CONST
4777 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4779 src_related
= use_related_value (src_const
, src_const_elt
);
4782 struct table_elt
*src_related_elt
4783 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4784 if (src_related_elt
&& elt
)
4786 if (elt
->first_same_value
4787 != src_related_elt
->first_same_value
)
4788 /* This can occur when we previously saw a CONST
4789 involving a SYMBOL_REF and then see the SYMBOL_REF
4790 twice. Merge the involved classes. */
4791 merge_equiv_classes (elt
, src_related_elt
);
4794 src_related_elt
= 0;
4796 else if (src_related_elt
&& elt
== 0)
4797 elt
= src_related_elt
;
4801 /* See if we have a CONST_INT that is already in a register in a
4804 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4805 && GET_MODE_CLASS (mode
) == MODE_INT
4806 && GET_MODE_PRECISION (mode
) < BITS_PER_WORD
)
4808 machine_mode wider_mode
;
4810 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
4811 wider_mode
!= VOIDmode
4812 && GET_MODE_PRECISION (wider_mode
) <= BITS_PER_WORD
4813 && src_related
== 0;
4814 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4816 struct table_elt
*const_elt
4817 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4822 for (const_elt
= const_elt
->first_same_value
;
4823 const_elt
; const_elt
= const_elt
->next_same_value
)
4824 if (REG_P (const_elt
->exp
))
4826 src_related
= gen_lowpart (mode
, const_elt
->exp
);
4832 /* Another possibility is that we have an AND with a constant in
4833 a mode narrower than a word. If so, it might have been generated
4834 as part of an "if" which would narrow the AND. If we already
4835 have done the AND in a wider mode, we can use a SUBREG of that
4838 if (flag_expensive_optimizations
&& ! src_related
4839 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4840 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4843 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4845 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4846 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4847 tmode
= GET_MODE_WIDER_MODE (tmode
))
4849 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4850 struct table_elt
*larger_elt
;
4854 PUT_MODE (new_and
, tmode
);
4855 XEXP (new_and
, 0) = inner
;
4856 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4857 if (larger_elt
== 0)
4860 for (larger_elt
= larger_elt
->first_same_value
;
4861 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4862 if (REG_P (larger_elt
->exp
))
4865 = gen_lowpart (mode
, larger_elt
->exp
);
4875 /* See if a MEM has already been loaded with a widening operation;
4876 if it has, we can use a subreg of that. Many CISC machines
4877 also have such operations, but this is only likely to be
4878 beneficial on these machines. */
4880 if (flag_expensive_optimizations
&& src_related
== 0
4881 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4882 && GET_MODE_CLASS (mode
) == MODE_INT
4883 && MEM_P (src
) && ! do_not_record
4884 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
4886 struct rtx_def memory_extend_buf
;
4887 rtx memory_extend_rtx
= &memory_extend_buf
;
4890 /* Set what we are trying to extend and the operation it might
4891 have been extended with. */
4892 memset (memory_extend_rtx
, 0, sizeof (*memory_extend_rtx
));
4893 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
4894 XEXP (memory_extend_rtx
, 0) = src
;
4896 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4897 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4898 tmode
= GET_MODE_WIDER_MODE (tmode
))
4900 struct table_elt
*larger_elt
;
4902 PUT_MODE (memory_extend_rtx
, tmode
);
4903 larger_elt
= lookup (memory_extend_rtx
,
4904 HASH (memory_extend_rtx
, tmode
), tmode
);
4905 if (larger_elt
== 0)
4908 for (larger_elt
= larger_elt
->first_same_value
;
4909 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4910 if (REG_P (larger_elt
->exp
))
4912 src_related
= gen_lowpart (mode
, larger_elt
->exp
);
4921 /* Try to express the constant using a register+offset expression
4922 derived from a constant anchor. */
4924 if (targetm
.const_anchor
4927 && GET_CODE (src_const
) == CONST_INT
)
4929 src_related
= try_const_anchors (src_const
, mode
);
4930 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
4934 if (src
== src_folded
)
4937 /* At this point, ELT, if nonzero, points to a class of expressions
4938 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4939 and SRC_RELATED, if nonzero, each contain additional equivalent
4940 expressions. Prune these latter expressions by deleting expressions
4941 already in the equivalence class.
4943 Check for an equivalent identical to the destination. If found,
4944 this is the preferred equivalent since it will likely lead to
4945 elimination of the insn. Indicate this by placing it in
4949 elt
= elt
->first_same_value
;
4950 for (p
= elt
; p
; p
= p
->next_same_value
)
4952 enum rtx_code code
= GET_CODE (p
->exp
);
4954 /* If the expression is not valid, ignore it. Then we do not
4955 have to check for validity below. In most cases, we can use
4956 `rtx_equal_p', since canonicalization has already been done. */
4957 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4960 /* Also skip paradoxical subregs, unless that's what we're
4962 if (paradoxical_subreg_p (p
->exp
)
4964 && GET_CODE (src
) == SUBREG
4965 && GET_MODE (src
) == GET_MODE (p
->exp
)
4966 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4967 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
4970 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
4972 else if (src_folded
&& GET_CODE (src_folded
) == code
4973 && rtx_equal_p (src_folded
, p
->exp
))
4975 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
4976 && rtx_equal_p (src_eqv_here
, p
->exp
))
4978 else if (src_related
&& GET_CODE (src_related
) == code
4979 && rtx_equal_p (src_related
, p
->exp
))
4982 /* This is the same as the destination of the insns, we want
4983 to prefer it. Copy it to src_related. The code below will
4984 then give it a negative cost. */
4985 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
4989 /* Find the cheapest valid equivalent, trying all the available
4990 possibilities. Prefer items not in the hash table to ones
4991 that are when they are equal cost. Note that we can never
4992 worsen an insn as the current contents will also succeed.
4993 If we find an equivalent identical to the destination, use it as best,
4994 since this insn will probably be eliminated in that case. */
4997 if (rtx_equal_p (src
, dest
))
4998 src_cost
= src_regcost
= -1;
5001 src_cost
= COST (src
, mode
);
5002 src_regcost
= approx_reg_cost (src
);
5008 if (rtx_equal_p (src_eqv_here
, dest
))
5009 src_eqv_cost
= src_eqv_regcost
= -1;
5012 src_eqv_cost
= COST (src_eqv_here
, mode
);
5013 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5019 if (rtx_equal_p (src_folded
, dest
))
5020 src_folded_cost
= src_folded_regcost
= -1;
5023 src_folded_cost
= COST (src_folded
, mode
);
5024 src_folded_regcost
= approx_reg_cost (src_folded
);
5030 if (rtx_equal_p (src_related
, dest
))
5031 src_related_cost
= src_related_regcost
= -1;
5034 src_related_cost
= COST (src_related
, mode
);
5035 src_related_regcost
= approx_reg_cost (src_related
);
5037 /* If a const-anchor is used to synthesize a constant that
5038 normally requires multiple instructions then slightly prefer
5039 it over the original sequence. These instructions are likely
5040 to become redundant now. We can't compare against the cost
5041 of src_eqv_here because, on MIPS for example, multi-insn
5042 constants have zero cost; they are assumed to be hoisted from
5044 if (src_related_is_const_anchor
5045 && src_related_cost
== src_cost
5051 /* If this was an indirect jump insn, a known label will really be
5052 cheaper even though it looks more expensive. */
5053 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5054 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5056 /* Terminate loop when replacement made. This must terminate since
5057 the current contents will be tested and will always be valid. */
5062 /* Skip invalid entries. */
5063 while (elt
&& !REG_P (elt
->exp
)
5064 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5065 elt
= elt
->next_same_value
;
5067 /* A paradoxical subreg would be bad here: it'll be the right
5068 size, but later may be adjusted so that the upper bits aren't
5069 what we want. So reject it. */
5071 && paradoxical_subreg_p (elt
->exp
)
5072 /* It is okay, though, if the rtx we're trying to match
5073 will ignore any of the bits we can't predict. */
5075 && GET_CODE (src
) == SUBREG
5076 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5077 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5078 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5080 elt
= elt
->next_same_value
;
5086 src_elt_cost
= elt
->cost
;
5087 src_elt_regcost
= elt
->regcost
;
5090 /* Find cheapest and skip it for the next time. For items
5091 of equal cost, use this order:
5092 src_folded, src, src_eqv, src_related and hash table entry. */
5094 && preferable (src_folded_cost
, src_folded_regcost
,
5095 src_cost
, src_regcost
) <= 0
5096 && preferable (src_folded_cost
, src_folded_regcost
,
5097 src_eqv_cost
, src_eqv_regcost
) <= 0
5098 && preferable (src_folded_cost
, src_folded_regcost
,
5099 src_related_cost
, src_related_regcost
) <= 0
5100 && preferable (src_folded_cost
, src_folded_regcost
,
5101 src_elt_cost
, src_elt_regcost
) <= 0)
5103 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5104 if (src_folded_force_flag
)
5106 rtx forced
= force_const_mem (mode
, trial
);
5112 && preferable (src_cost
, src_regcost
,
5113 src_eqv_cost
, src_eqv_regcost
) <= 0
5114 && preferable (src_cost
, src_regcost
,
5115 src_related_cost
, src_related_regcost
) <= 0
5116 && preferable (src_cost
, src_regcost
,
5117 src_elt_cost
, src_elt_regcost
) <= 0)
5118 trial
= src
, src_cost
= MAX_COST
;
5119 else if (src_eqv_here
5120 && preferable (src_eqv_cost
, src_eqv_regcost
,
5121 src_related_cost
, src_related_regcost
) <= 0
5122 && preferable (src_eqv_cost
, src_eqv_regcost
,
5123 src_elt_cost
, src_elt_regcost
) <= 0)
5124 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5125 else if (src_related
5126 && preferable (src_related_cost
, src_related_regcost
,
5127 src_elt_cost
, src_elt_regcost
) <= 0)
5128 trial
= src_related
, src_related_cost
= MAX_COST
;
5132 elt
= elt
->next_same_value
;
5133 src_elt_cost
= MAX_COST
;
5136 /* Avoid creation of overlapping memory moves. */
5137 if (MEM_P (trial
) && MEM_P (SET_DEST (sets
[i
].rtl
)))
5141 /* BLKmode moves are not handled by cse anyway. */
5142 if (GET_MODE (trial
) == BLKmode
)
5145 src
= canon_rtx (trial
);
5146 dest
= canon_rtx (SET_DEST (sets
[i
].rtl
));
5148 if (!MEM_P (src
) || !MEM_P (dest
)
5149 || !nonoverlapping_memrefs_p (src
, dest
, false))
5154 (set (reg:M N) (const_int A))
5155 (set (reg:M2 O) (const_int B))
5156 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5158 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5159 && CONST_INT_P (trial
)
5160 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5161 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5162 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5163 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
)))
5164 >= INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1)))
5165 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5166 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5167 <= HOST_BITS_PER_WIDE_INT
))
5169 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5170 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5171 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5172 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5173 struct table_elt
*dest_elt
5174 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5175 rtx dest_cst
= NULL
;
5178 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5179 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5186 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5189 if (BITS_BIG_ENDIAN
)
5190 shift
= GET_MODE_PRECISION (GET_MODE (dest_reg
))
5191 - INTVAL (pos
) - INTVAL (width
);
5193 shift
= INTVAL (pos
);
5194 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5195 mask
= ~(HOST_WIDE_INT
) 0;
5197 mask
= ((HOST_WIDE_INT
) 1 << INTVAL (width
)) - 1;
5198 val
&= ~(mask
<< shift
);
5199 val
|= (INTVAL (trial
) & mask
) << shift
;
5200 val
= trunc_int_for_mode (val
, GET_MODE (dest_reg
));
5201 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5203 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5205 if (apply_change_group ())
5207 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5210 remove_note (insn
, note
);
5211 df_notes_rescan (insn
);
5215 src_eqv_volatile
= 0;
5216 src_eqv_in_memory
= 0;
5224 /* We don't normally have an insn matching (set (pc) (pc)), so
5225 check for this separately here. We will delete such an
5228 For other cases such as a table jump or conditional jump
5229 where we know the ultimate target, go ahead and replace the
5230 operand. While that may not make a valid insn, we will
5231 reemit the jump below (and also insert any necessary
5233 if (n_sets
== 1 && dest
== pc_rtx
5235 || (GET_CODE (trial
) == LABEL_REF
5236 && ! condjump_p (insn
))))
5238 /* Don't substitute non-local labels, this confuses CFG. */
5239 if (GET_CODE (trial
) == LABEL_REF
5240 && LABEL_REF_NONLOCAL_P (trial
))
5243 SET_SRC (sets
[i
].rtl
) = trial
;
5244 cse_jumps_altered
= true;
5248 /* Reject certain invalid forms of CONST that we create. */
5249 else if (CONSTANT_P (trial
)
5250 && GET_CODE (trial
) == CONST
5251 /* Reject cases that will cause decode_rtx_const to
5252 die. On the alpha when simplifying a switch, we
5253 get (const (truncate (minus (label_ref)
5255 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5256 /* Likewise on IA-64, except without the
5258 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5259 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5260 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5261 /* Do nothing for this case. */
5264 /* Look for a substitution that makes a valid insn. */
5265 else if (validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5268 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5270 /* The result of apply_change_group can be ignored; see
5273 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5274 apply_change_group ();
5279 /* If we previously found constant pool entries for
5280 constants and this is a constant, try making a
5281 pool entry. Put it in src_folded unless we already have done
5282 this since that is where it likely came from. */
5284 else if (constant_pool_entries_cost
5285 && CONSTANT_P (trial
)
5287 || (!MEM_P (src_folded
)
5288 && ! src_folded_force_flag
))
5289 && GET_MODE_CLASS (mode
) != MODE_CC
5290 && mode
!= VOIDmode
)
5292 src_folded_force_flag
= 1;
5294 src_folded_cost
= constant_pool_entries_cost
;
5295 src_folded_regcost
= constant_pool_entries_regcost
;
5299 /* If we changed the insn too much, handle this set from scratch. */
5306 src
= SET_SRC (sets
[i
].rtl
);
5308 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5309 However, there is an important exception: If both are registers
5310 that are not the head of their equivalence class, replace SET_SRC
5311 with the head of the class. If we do not do this, we will have
5312 both registers live over a portion of the basic block. This way,
5313 their lifetimes will likely abut instead of overlapping. */
5315 && REGNO_QTY_VALID_P (REGNO (dest
)))
5317 int dest_q
= REG_QTY (REGNO (dest
));
5318 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5320 if (dest_ent
->mode
== GET_MODE (dest
)
5321 && dest_ent
->first_reg
!= REGNO (dest
)
5322 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5323 /* Don't do this if the original insn had a hard reg as
5324 SET_SRC or SET_DEST. */
5325 && (!REG_P (sets
[i
].src
)
5326 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5327 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5328 /* We can't call canon_reg here because it won't do anything if
5329 SRC is a hard register. */
5331 int src_q
= REG_QTY (REGNO (src
));
5332 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5333 int first
= src_ent
->first_reg
;
5335 = (first
>= FIRST_PSEUDO_REGISTER
5336 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5338 /* We must use validate-change even for this, because this
5339 might be a special no-op instruction, suitable only to
5341 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5344 /* If we had a constant that is cheaper than what we are now
5345 setting SRC to, use that constant. We ignored it when we
5346 thought we could make this into a no-op. */
5347 if (src_const
&& COST (src_const
, mode
) < COST (src
, mode
)
5348 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5355 /* If we made a change, recompute SRC values. */
5356 if (src
!= sets
[i
].src
)
5359 hash_arg_in_memory
= 0;
5361 sets
[i
].src_hash
= HASH (src
, mode
);
5362 sets
[i
].src_volatile
= do_not_record
;
5363 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5364 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5367 /* If this is a single SET, we are setting a register, and we have an
5368 equivalent constant, we want to add a REG_EQUAL note if the constant
5369 is different from the source. We don't want to do it for a constant
5370 pseudo since verifying that this pseudo hasn't been eliminated is a
5371 pain; moreover such a note won't help anything.
5373 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5374 which can be created for a reference to a compile time computable
5375 entry in a jump table. */
5379 && !REG_P (src_const
)
5380 && !(GET_CODE (src_const
) == SUBREG
5381 && REG_P (SUBREG_REG (src_const
)))
5382 && !(GET_CODE (src_const
) == CONST
5383 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5384 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5385 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
)
5386 && !rtx_equal_p (src
, src_const
))
5388 /* Make sure that the rtx is not shared. */
5389 src_const
= copy_rtx (src_const
);
5391 /* Record the actual constant value in a REG_EQUAL note,
5392 making a new one if one does not already exist. */
5393 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5394 df_notes_rescan (insn
);
5397 /* Now deal with the destination. */
5400 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5401 while (GET_CODE (dest
) == SUBREG
5402 || GET_CODE (dest
) == ZERO_EXTRACT
5403 || GET_CODE (dest
) == STRICT_LOW_PART
)
5404 dest
= XEXP (dest
, 0);
5406 sets
[i
].inner_dest
= dest
;
5410 #ifdef PUSH_ROUNDING
5411 /* Stack pushes invalidate the stack pointer. */
5412 rtx addr
= XEXP (dest
, 0);
5413 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5414 && XEXP (addr
, 0) == stack_pointer_rtx
)
5415 invalidate (stack_pointer_rtx
, VOIDmode
);
5417 dest
= fold_rtx (dest
, insn
);
5420 /* Compute the hash code of the destination now,
5421 before the effects of this instruction are recorded,
5422 since the register values used in the address computation
5423 are those before this instruction. */
5424 sets
[i
].dest_hash
= HASH (dest
, mode
);
5426 /* Don't enter a bit-field in the hash table
5427 because the value in it after the store
5428 may not equal what was stored, due to truncation. */
5430 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5432 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5434 if (src_const
!= 0 && CONST_INT_P (src_const
)
5435 && CONST_INT_P (width
)
5436 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5437 && ! (INTVAL (src_const
)
5438 & (HOST_WIDE_INT_M1U
<< INTVAL (width
))))
5439 /* Exception: if the value is constant,
5440 and it won't be truncated, record it. */
5444 /* This is chosen so that the destination will be invalidated
5445 but no new value will be recorded.
5446 We must invalidate because sometimes constant
5447 values can be recorded for bitfields. */
5448 sets
[i
].src_elt
= 0;
5449 sets
[i
].src_volatile
= 1;
5455 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5457 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5459 /* One less use of the label this insn used to jump to. */
5460 delete_insn_and_edges (insn
);
5461 cse_jumps_altered
= true;
5462 /* No more processing for this set. */
5466 /* If this SET is now setting PC to a label, we know it used to
5467 be a conditional or computed branch. */
5468 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5469 && !LABEL_REF_NONLOCAL_P (src
))
5471 /* We reemit the jump in as many cases as possible just in
5472 case the form of an unconditional jump is significantly
5473 different than a computed jump or conditional jump.
5475 If this insn has multiple sets, then reemitting the
5476 jump is nontrivial. So instead we just force rerecognition
5477 and hope for the best. */
5480 rtx_jump_insn
*new_rtx
;
5483 rtx_insn
*seq
= targetm
.gen_jump (XEXP (src
, 0));
5484 new_rtx
= emit_jump_insn_before (seq
, insn
);
5485 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5486 LABEL_NUSES (XEXP (src
, 0))++;
5488 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5489 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5492 XEXP (note
, 1) = NULL_RTX
;
5493 REG_NOTES (new_rtx
) = note
;
5496 delete_insn_and_edges (insn
);
5500 INSN_CODE (insn
) = -1;
5502 /* Do not bother deleting any unreachable code, let jump do it. */
5503 cse_jumps_altered
= true;
5507 /* If destination is volatile, invalidate it and then do no further
5508 processing for this assignment. */
5510 else if (do_not_record
)
5512 invalidate_dest (dest
);
5516 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5519 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5522 invalidate_dest (SET_DEST (sets
[i
].rtl
));
5527 /* If setting CC0, record what it was set to, or a constant, if it
5528 is equivalent to a constant. If it is being set to a floating-point
5529 value, make a COMPARE with the appropriate constant of 0. If we
5530 don't do this, later code can interpret this as a test against
5531 const0_rtx, which can cause problems if we try to put it into an
5532 insn as a floating-point operand. */
5533 if (dest
== cc0_rtx
)
5535 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5536 this_insn_cc0_mode
= mode
;
5537 if (FLOAT_MODE_P (mode
))
5538 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5543 /* Now enter all non-volatile source expressions in the hash table
5544 if they are not already present.
5545 Record their equivalence classes in src_elt.
5546 This way we can insert the corresponding destinations into
5547 the same classes even if the actual sources are no longer in them
5548 (having been invalidated). */
5550 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5551 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5553 struct table_elt
*elt
;
5554 struct table_elt
*classp
= sets
[0].src_elt
;
5555 rtx dest
= SET_DEST (sets
[0].rtl
);
5556 machine_mode eqvmode
= GET_MODE (dest
);
5558 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5560 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5563 if (insert_regs (src_eqv
, classp
, 0))
5565 rehash_using_reg (src_eqv
);
5566 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5568 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5569 elt
->in_memory
= src_eqv_in_memory
;
5572 /* Check to see if src_eqv_elt is the same as a set source which
5573 does not yet have an elt, and if so set the elt of the set source
5575 for (i
= 0; i
< n_sets
; i
++)
5576 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5577 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5578 sets
[i
].src_elt
= src_eqv_elt
;
5581 for (i
= 0; i
< n_sets
; i
++)
5582 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5583 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5585 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5587 /* REG_EQUAL in setting a STRICT_LOW_PART
5588 gives an equivalent for the entire destination register,
5589 not just for the subreg being stored in now.
5590 This is a more interesting equivalence, so we arrange later
5591 to treat the entire reg as the destination. */
5592 sets
[i
].src_elt
= src_eqv_elt
;
5593 sets
[i
].src_hash
= src_eqv_hash
;
5597 /* Insert source and constant equivalent into hash table, if not
5599 struct table_elt
*classp
= src_eqv_elt
;
5600 rtx src
= sets
[i
].src
;
5601 rtx dest
= SET_DEST (sets
[i
].rtl
);
5603 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5605 /* It's possible that we have a source value known to be
5606 constant but don't have a REG_EQUAL note on the insn.
5607 Lack of a note will mean src_eqv_elt will be NULL. This
5608 can happen where we've generated a SUBREG to access a
5609 CONST_INT that is already in a register in a wider mode.
5610 Ensure that the source expression is put in the proper
5613 classp
= sets
[i
].src_const_elt
;
5615 if (sets
[i
].src_elt
== 0)
5617 struct table_elt
*elt
;
5619 /* Note that these insert_regs calls cannot remove
5620 any of the src_elt's, because they would have failed to
5621 match if not still valid. */
5622 if (insert_regs (src
, classp
, 0))
5624 rehash_using_reg (src
);
5625 sets
[i
].src_hash
= HASH (src
, mode
);
5627 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5628 elt
->in_memory
= sets
[i
].src_in_memory
;
5629 /* If inline asm has any clobbers, ensure we only reuse
5630 existing inline asms and never try to put the ASM_OPERANDS
5631 into an insn that isn't inline asm. */
5632 if (GET_CODE (src
) == ASM_OPERANDS
5633 && GET_CODE (x
) == PARALLEL
)
5634 elt
->cost
= MAX_COST
;
5635 sets
[i
].src_elt
= classp
= elt
;
5637 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5638 && src
!= sets
[i
].src_const
5639 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5640 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5641 sets
[i
].src_const_hash
, mode
);
5644 else if (sets
[i
].src_elt
== 0)
5645 /* If we did not insert the source into the hash table (e.g., it was
5646 volatile), note the equivalence class for the REG_EQUAL value, if any,
5647 so that the destination goes into that class. */
5648 sets
[i
].src_elt
= src_eqv_elt
;
5650 /* Record destination addresses in the hash table. This allows us to
5651 check if they are invalidated by other sets. */
5652 for (i
= 0; i
< n_sets
; i
++)
5656 rtx x
= sets
[i
].inner_dest
;
5657 struct table_elt
*elt
;
5664 mode
= GET_MODE (x
);
5665 hash
= HASH (x
, mode
);
5666 elt
= lookup (x
, hash
, mode
);
5669 if (insert_regs (x
, NULL
, 0))
5671 rtx dest
= SET_DEST (sets
[i
].rtl
);
5673 rehash_using_reg (x
);
5674 hash
= HASH (x
, mode
);
5675 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5677 elt
= insert (x
, NULL
, hash
, mode
);
5680 sets
[i
].dest_addr_elt
= elt
;
5683 sets
[i
].dest_addr_elt
= NULL
;
5687 invalidate_from_clobbers (insn
);
5689 /* Some registers are invalidated by subroutine calls. Memory is
5690 invalidated by non-constant calls. */
5694 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5695 invalidate_memory ();
5696 invalidate_for_call ();
5699 /* Now invalidate everything set by this instruction.
5700 If a SUBREG or other funny destination is being set,
5701 sets[i].rtl is still nonzero, so here we invalidate the reg
5702 a part of which is being set. */
5704 for (i
= 0; i
< n_sets
; i
++)
5707 /* We can't use the inner dest, because the mode associated with
5708 a ZERO_EXTRACT is significant. */
5709 rtx dest
= SET_DEST (sets
[i
].rtl
);
5711 /* Needed for registers to remove the register from its
5712 previous quantity's chain.
5713 Needed for memory if this is a nonvarying address, unless
5714 we have just done an invalidate_memory that covers even those. */
5715 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5716 invalidate (dest
, VOIDmode
);
5717 else if (MEM_P (dest
))
5718 invalidate (dest
, VOIDmode
);
5719 else if (GET_CODE (dest
) == STRICT_LOW_PART
5720 || GET_CODE (dest
) == ZERO_EXTRACT
)
5721 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5724 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5725 the regs restored by the longjmp come from a later time
5727 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5729 flush_hash_table ();
5733 /* Make sure registers mentioned in destinations
5734 are safe for use in an expression to be inserted.
5735 This removes from the hash table
5736 any invalid entry that refers to one of these registers.
5738 We don't care about the return value from mention_regs because
5739 we are going to hash the SET_DEST values unconditionally. */
5741 for (i
= 0; i
< n_sets
; i
++)
5745 rtx x
= SET_DEST (sets
[i
].rtl
);
5751 /* We used to rely on all references to a register becoming
5752 inaccessible when a register changes to a new quantity,
5753 since that changes the hash code. However, that is not
5754 safe, since after HASH_SIZE new quantities we get a
5755 hash 'collision' of a register with its own invalid
5756 entries. And since SUBREGs have been changed not to
5757 change their hash code with the hash code of the register,
5758 it wouldn't work any longer at all. So we have to check
5759 for any invalid references lying around now.
5760 This code is similar to the REG case in mention_regs,
5761 but it knows that reg_tick has been incremented, and
5762 it leaves reg_in_table as -1 . */
5763 unsigned int regno
= REGNO (x
);
5764 unsigned int endregno
= END_REGNO (x
);
5767 for (i
= regno
; i
< endregno
; i
++)
5769 if (REG_IN_TABLE (i
) >= 0)
5771 remove_invalid_refs (i
);
5772 REG_IN_TABLE (i
) = -1;
5779 /* We may have just removed some of the src_elt's from the hash table.
5780 So replace each one with the current head of the same class.
5781 Also check if destination addresses have been removed. */
5783 for (i
= 0; i
< n_sets
; i
++)
5786 if (sets
[i
].dest_addr_elt
5787 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5789 /* The elt was removed, which means this destination is not
5790 valid after this instruction. */
5791 sets
[i
].rtl
= NULL_RTX
;
5793 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5794 /* If elt was removed, find current head of same class,
5795 or 0 if nothing remains of that class. */
5797 struct table_elt
*elt
= sets
[i
].src_elt
;
5799 while (elt
&& elt
->prev_same_value
)
5800 elt
= elt
->prev_same_value
;
5802 while (elt
&& elt
->first_same_value
== 0)
5803 elt
= elt
->next_same_value
;
5804 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5808 /* Now insert the destinations into their equivalence classes. */
5810 for (i
= 0; i
< n_sets
; i
++)
5813 rtx dest
= SET_DEST (sets
[i
].rtl
);
5814 struct table_elt
*elt
;
5816 /* Don't record value if we are not supposed to risk allocating
5817 floating-point values in registers that might be wider than
5819 if ((flag_float_store
5821 && FLOAT_MODE_P (GET_MODE (dest
)))
5822 /* Don't record BLKmode values, because we don't know the
5823 size of it, and can't be sure that other BLKmode values
5824 have the same or smaller size. */
5825 || GET_MODE (dest
) == BLKmode
5826 /* If we didn't put a REG_EQUAL value or a source into the hash
5827 table, there is no point is recording DEST. */
5828 || sets
[i
].src_elt
== 0
5829 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5830 or SIGN_EXTEND, don't record DEST since it can cause
5831 some tracking to be wrong.
5833 ??? Think about this more later. */
5834 || (paradoxical_subreg_p (dest
)
5835 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5836 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5839 /* STRICT_LOW_PART isn't part of the value BEING set,
5840 and neither is the SUBREG inside it.
5841 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5842 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5843 dest
= SUBREG_REG (XEXP (dest
, 0));
5845 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5846 /* Registers must also be inserted into chains for quantities. */
5847 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5849 /* If `insert_regs' changes something, the hash code must be
5851 rehash_using_reg (dest
);
5852 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5855 elt
= insert (dest
, sets
[i
].src_elt
,
5856 sets
[i
].dest_hash
, GET_MODE (dest
));
5858 /* If this is a constant, insert the constant anchors with the
5859 equivalent register-offset expressions using register DEST. */
5860 if (targetm
.const_anchor
5862 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5863 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5864 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5866 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5867 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5869 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5870 narrower than M2, and both M1 and M2 are the same number of words,
5871 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5872 make that equivalence as well.
5874 However, BAR may have equivalences for which gen_lowpart
5875 will produce a simpler value than gen_lowpart applied to
5876 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5877 BAR's equivalences. If we don't get a simplified form, make
5878 the SUBREG. It will not be used in an equivalence, but will
5879 cause two similar assignments to be detected.
5881 Note the loop below will find SUBREG_REG (DEST) since we have
5882 already entered SRC and DEST of the SET in the table. */
5884 if (GET_CODE (dest
) == SUBREG
5885 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5887 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
5888 && (GET_MODE_SIZE (GET_MODE (dest
))
5889 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5890 && sets
[i
].src_elt
!= 0)
5892 machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
5893 struct table_elt
*elt
, *classp
= 0;
5895 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
5896 elt
= elt
->next_same_value
)
5900 struct table_elt
*src_elt
;
5903 /* Ignore invalid entries. */
5904 if (!REG_P (elt
->exp
)
5905 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5908 /* We may have already been playing subreg games. If the
5909 mode is already correct for the destination, use it. */
5910 if (GET_MODE (elt
->exp
) == new_mode
)
5914 /* Calculate big endian correction for the SUBREG_BYTE.
5915 We have already checked that M1 (GET_MODE (dest))
5916 is not narrower than M2 (new_mode). */
5917 if (BYTES_BIG_ENDIAN
)
5918 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
5919 - GET_MODE_SIZE (new_mode
));
5921 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
5922 GET_MODE (dest
), byte
);
5925 /* The call to simplify_gen_subreg fails if the value
5926 is VOIDmode, yet we can't do any simplification, e.g.
5927 for EXPR_LISTs denoting function call results.
5928 It is invalid to construct a SUBREG with a VOIDmode
5929 SUBREG_REG, hence a zero new_src means we can't do
5930 this substitution. */
5934 src_hash
= HASH (new_src
, new_mode
);
5935 src_elt
= lookup (new_src
, src_hash
, new_mode
);
5937 /* Put the new source in the hash table is if isn't
5941 if (insert_regs (new_src
, classp
, 0))
5943 rehash_using_reg (new_src
);
5944 src_hash
= HASH (new_src
, new_mode
);
5946 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
5947 src_elt
->in_memory
= elt
->in_memory
;
5948 if (GET_CODE (new_src
) == ASM_OPERANDS
5949 && elt
->cost
== MAX_COST
)
5950 src_elt
->cost
= MAX_COST
;
5952 else if (classp
&& classp
!= src_elt
->first_same_value
)
5953 /* Show that two things that we've seen before are
5954 actually the same. */
5955 merge_equiv_classes (src_elt
, classp
);
5957 classp
= src_elt
->first_same_value
;
5958 /* Ignore invalid entries. */
5960 && !REG_P (classp
->exp
)
5961 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
5962 classp
= classp
->next_same_value
;
5967 /* Special handling for (set REG0 REG1) where REG0 is the
5968 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5969 be used in the sequel, so (if easily done) change this insn to
5970 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5971 that computed their value. Then REG1 will become a dead store
5972 and won't cloud the situation for later optimizations.
5974 Do not make this change if REG1 is a hard register, because it will
5975 then be used in the sequel and we may be changing a two-operand insn
5976 into a three-operand insn.
5978 Also do not do this if we are operating on a copy of INSN. */
5980 if (n_sets
== 1 && sets
[0].rtl
)
5981 try_back_substitute_reg (sets
[0].rtl
, insn
);
5986 /* Remove from the hash table all expressions that reference memory. */
5989 invalidate_memory (void)
5992 struct table_elt
*p
, *next
;
5994 for (i
= 0; i
< HASH_SIZE
; i
++)
5995 for (p
= table
[i
]; p
; p
= next
)
5997 next
= p
->next_same_hash
;
5999 remove_from_table (p
, i
);
6003 /* Perform invalidation on the basis of everything about INSN,
6004 except for invalidating the actual places that are SET in it.
6005 This includes the places CLOBBERed, and anything that might
6006 alias with something that is SET or CLOBBERed. */
6009 invalidate_from_clobbers (rtx_insn
*insn
)
6011 rtx x
= PATTERN (insn
);
6013 if (GET_CODE (x
) == CLOBBER
)
6015 rtx ref
= XEXP (x
, 0);
6018 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6020 invalidate (ref
, VOIDmode
);
6021 else if (GET_CODE (ref
) == STRICT_LOW_PART
6022 || GET_CODE (ref
) == ZERO_EXTRACT
)
6023 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6026 else if (GET_CODE (x
) == PARALLEL
)
6029 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6031 rtx y
= XVECEXP (x
, 0, i
);
6032 if (GET_CODE (y
) == CLOBBER
)
6034 rtx ref
= XEXP (y
, 0);
6035 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6037 invalidate (ref
, VOIDmode
);
6038 else if (GET_CODE (ref
) == STRICT_LOW_PART
6039 || GET_CODE (ref
) == ZERO_EXTRACT
)
6040 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6046 /* Perform invalidation on the basis of everything about INSN.
6047 This includes the places CLOBBERed, and anything that might
6048 alias with something that is SET or CLOBBERed. */
6051 invalidate_from_sets_and_clobbers (rtx_insn
*insn
)
6054 rtx x
= PATTERN (insn
);
6058 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6059 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6060 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6063 /* Ensure we invalidate the destination register of a CALL insn.
6064 This is necessary for machines where this register is a fixed_reg,
6065 because no other code would invalidate it. */
6066 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6067 invalidate (SET_DEST (x
), VOIDmode
);
6069 else if (GET_CODE (x
) == PARALLEL
)
6073 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6075 rtx y
= XVECEXP (x
, 0, i
);
6076 if (GET_CODE (y
) == CLOBBER
)
6078 rtx clobbered
= XEXP (y
, 0);
6080 if (REG_P (clobbered
)
6081 || GET_CODE (clobbered
) == SUBREG
)
6082 invalidate (clobbered
, VOIDmode
);
6083 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6084 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6085 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6087 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6088 invalidate (SET_DEST (y
), VOIDmode
);
6093 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6094 and replace any registers in them with either an equivalent constant
6095 or the canonical form of the register. If we are inside an address,
6096 only do this if the address remains valid.
6098 OBJECT is 0 except when within a MEM in which case it is the MEM.
6100 Return the replacement for X. */
6103 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
6105 enum rtx_code code
= GET_CODE (x
);
6106 const char *fmt
= GET_RTX_FORMAT (code
);
6121 validate_change (x
, &XEXP (x
, 0),
6122 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6126 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6127 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6133 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6140 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6141 /* We don't substitute VOIDmode constants into these rtx,
6142 since they would impede folding. */
6143 if (GET_MODE (new_rtx
) != VOIDmode
)
6144 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6148 case UNSIGNED_FLOAT
:
6150 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6151 /* We don't substitute negative VOIDmode constants into these rtx,
6152 since they would impede folding. */
6153 if (GET_MODE (new_rtx
) != VOIDmode
6154 || (CONST_INT_P (new_rtx
) && INTVAL (new_rtx
) >= 0)
6155 || (CONST_DOUBLE_P (new_rtx
) && CONST_DOUBLE_HIGH (new_rtx
) >= 0))
6156 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6161 i
= REG_QTY (REGNO (x
));
6163 /* Return a constant or a constant register. */
6164 if (REGNO_QTY_VALID_P (REGNO (x
)))
6166 struct qty_table_elem
*ent
= &qty_table
[i
];
6168 if (ent
->const_rtx
!= NULL_RTX
6169 && (CONSTANT_P (ent
->const_rtx
)
6170 || REG_P (ent
->const_rtx
)))
6172 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6174 return copy_rtx (new_rtx
);
6178 /* Otherwise, canonicalize this register. */
6179 return canon_reg (x
, NULL
);
6185 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6187 validate_change (object
, &XEXP (x
, i
),
6188 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6194 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6196 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6203 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6205 DATA is a pointer to a struct cse_basic_block_data, that is used to
6207 It is filled with a queue of basic blocks, starting with FIRST_BB
6208 and following a trace through the CFG.
6210 If all paths starting at FIRST_BB have been followed, or no new path
6211 starting at FIRST_BB can be constructed, this function returns FALSE.
6212 Otherwise, DATA->path is filled and the function returns TRUE indicating
6213 that a path to follow was found.
6215 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6216 block in the path will be FIRST_BB. */
6219 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6226 bitmap_set_bit (cse_visited_basic_blocks
, first_bb
->index
);
6228 /* See if there is a previous path. */
6229 path_size
= data
->path_size
;
6231 /* There is a previous path. Make sure it started with FIRST_BB. */
6233 gcc_assert (data
->path
[0].bb
== first_bb
);
6235 /* There was only one basic block in the last path. Clear the path and
6236 return, so that paths starting at another basic block can be tried. */
6243 /* If the path was empty from the beginning, construct a new path. */
6245 data
->path
[path_size
++].bb
= first_bb
;
6248 /* Otherwise, path_size must be equal to or greater than 2, because
6249 a previous path exists that is at least two basic blocks long.
6251 Update the previous branch path, if any. If the last branch was
6252 previously along the branch edge, take the fallthrough edge now. */
6253 while (path_size
>= 2)
6255 basic_block last_bb_in_path
, previous_bb_in_path
;
6259 last_bb_in_path
= data
->path
[path_size
].bb
;
6260 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6262 /* If we previously followed a path along the branch edge, try
6263 the fallthru edge now. */
6264 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6265 && any_condjump_p (BB_END (previous_bb_in_path
))
6266 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6267 && e
== BRANCH_EDGE (previous_bb_in_path
))
6269 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6270 if (bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6271 && single_pred_p (bb
)
6272 /* We used to assert here that we would only see blocks
6273 that we have not visited yet. But we may end up
6274 visiting basic blocks twice if the CFG has changed
6275 in this run of cse_main, because when the CFG changes
6276 the topological sort of the CFG also changes. A basic
6277 blocks that previously had more than two predecessors
6278 may now have a single predecessor, and become part of
6279 a path that starts at another basic block.
6281 We still want to visit each basic block only once, so
6282 halt the path here if we have already visited BB. */
6283 && !bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
))
6285 bitmap_set_bit (cse_visited_basic_blocks
, bb
->index
);
6286 data
->path
[path_size
++].bb
= bb
;
6291 data
->path
[path_size
].bb
= NULL
;
6294 /* If only one block remains in the path, bail. */
6302 /* Extend the path if possible. */
6305 bb
= data
->path
[path_size
- 1].bb
;
6306 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
6308 if (single_succ_p (bb
))
6309 e
= single_succ_edge (bb
);
6310 else if (EDGE_COUNT (bb
->succs
) == 2
6311 && any_condjump_p (BB_END (bb
)))
6313 /* First try to follow the branch. If that doesn't lead
6314 to a useful path, follow the fallthru edge. */
6315 e
= BRANCH_EDGE (bb
);
6316 if (!single_pred_p (e
->dest
))
6317 e
= FALLTHRU_EDGE (bb
);
6323 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6324 && e
->dest
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6325 && single_pred_p (e
->dest
)
6326 /* Avoid visiting basic blocks twice. The large comment
6327 above explains why this can happen. */
6328 && !bitmap_bit_p (cse_visited_basic_blocks
, e
->dest
->index
))
6330 basic_block bb2
= e
->dest
;
6331 bitmap_set_bit (cse_visited_basic_blocks
, bb2
->index
);
6332 data
->path
[path_size
++].bb
= bb2
;
6341 data
->path_size
= path_size
;
6342 return path_size
!= 0;
6345 /* Dump the path in DATA to file F. NSETS is the number of sets
6349 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6353 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6354 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6355 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6356 fputc ('\n', dump_file
);
6361 /* Return true if BB has exception handling successor edges. */
6364 have_eh_succ_edges (basic_block bb
)
6369 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6370 if (e
->flags
& EDGE_EH
)
6377 /* Scan to the end of the path described by DATA. Return an estimate of
6378 the total number of SETs of all insns in the path. */
6381 cse_prescan_path (struct cse_basic_block_data
*data
)
6384 int path_size
= data
->path_size
;
6387 /* Scan to end of each basic block in the path. */
6388 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6393 bb
= data
->path
[path_entry
].bb
;
6395 FOR_BB_INSNS (bb
, insn
)
6400 /* A PARALLEL can have lots of SETs in it,
6401 especially if it is really an ASM_OPERANDS. */
6402 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6403 nsets
+= XVECLEN (PATTERN (insn
), 0);
6409 data
->nsets
= nsets
;
6412 /* Return true if the pattern of INSN uses a LABEL_REF for which
6413 there isn't a REG_LABEL_OPERAND note. */
6416 check_for_label_ref (rtx_insn
*insn
)
6418 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6419 note for it, we must rerun jump since it needs to place the note. If
6420 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6421 don't do this since no REG_LABEL_OPERAND will be added. */
6422 subrtx_iterator::array_type array
;
6423 FOR_EACH_SUBRTX (iter
, array
, PATTERN (insn
), ALL
)
6425 const_rtx x
= *iter
;
6426 if (GET_CODE (x
) == LABEL_REF
6427 && !LABEL_REF_NONLOCAL_P (x
)
6429 || !label_is_jump_target_p (LABEL_REF_LABEL (x
), insn
))
6430 && LABEL_P (LABEL_REF_LABEL (x
))
6431 && INSN_UID (LABEL_REF_LABEL (x
)) != 0
6432 && !find_reg_note (insn
, REG_LABEL_OPERAND
, LABEL_REF_LABEL (x
)))
6438 /* Process a single extended basic block described by EBB_DATA. */
6441 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6443 int path_size
= ebb_data
->path_size
;
6447 /* Allocate the space needed by qty_table. */
6448 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6451 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6452 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6453 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6458 bb
= ebb_data
->path
[path_entry
].bb
;
6460 /* Invalidate recorded information for eh regs if there is an EH
6461 edge pointing to that bb. */
6462 if (bb_has_eh_pred (bb
))
6466 FOR_EACH_ARTIFICIAL_DEF (def
, bb
->index
)
6467 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6468 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6471 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6472 FOR_BB_INSNS (bb
, insn
)
6474 /* If we have processed 1,000 insns, flush the hash table to
6475 avoid extreme quadratic behavior. We must not include NOTEs
6476 in the count since there may be more of them when generating
6477 debugging information. If we clear the table at different
6478 times, code generated with -g -O might be different than code
6479 generated with -O but not -g.
6481 FIXME: This is a real kludge and needs to be done some other
6483 if (NONDEBUG_INSN_P (insn
)
6484 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6486 flush_hash_table ();
6492 /* Process notes first so we have all notes in canonical forms
6493 when looking for duplicate operations. */
6494 if (REG_NOTES (insn
))
6496 bool changed
= false;
6497 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6498 NULL_RTX
, &changed
);
6500 df_notes_rescan (insn
);
6505 /* If we haven't already found an insn where we added a LABEL_REF,
6507 if (INSN_P (insn
) && !recorded_label_ref
6508 && check_for_label_ref (insn
))
6509 recorded_label_ref
= true;
6511 if (HAVE_cc0
&& NONDEBUG_INSN_P (insn
))
6513 /* If the previous insn sets CC0 and this insn no
6514 longer references CC0, delete the previous insn.
6515 Here we use fact that nothing expects CC0 to be
6516 valid over an insn, which is true until the final
6518 rtx_insn
*prev_insn
;
6521 prev_insn
= prev_nonnote_nondebug_insn (insn
);
6522 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6523 && (tem
= single_set (prev_insn
)) != NULL_RTX
6524 && SET_DEST (tem
) == cc0_rtx
6525 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6526 delete_insn (prev_insn
);
6528 /* If this insn is not the last insn in the basic
6529 block, it will be PREV_INSN(insn) in the next
6530 iteration. If we recorded any CC0-related
6531 information for this insn, remember it. */
6532 if (insn
!= BB_END (bb
))
6534 prev_insn_cc0
= this_insn_cc0
;
6535 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6541 /* With non-call exceptions, we are not always able to update
6542 the CFG properly inside cse_insn. So clean up possibly
6543 redundant EH edges here. */
6544 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6545 cse_cfg_altered
|= purge_dead_edges (bb
);
6547 /* If we changed a conditional jump, we may have terminated
6548 the path we are following. Check that by verifying that
6549 the edge we would take still exists. If the edge does
6550 not exist anymore, purge the remainder of the path.
6551 Note that this will cause us to return to the caller. */
6552 if (path_entry
< path_size
- 1)
6554 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6555 if (!find_edge (bb
, next_bb
))
6561 /* If we truncate the path, we must also reset the
6562 visited bit on the remaining blocks in the path,
6563 or we will never visit them at all. */
6564 bitmap_clear_bit (cse_visited_basic_blocks
,
6565 ebb_data
->path
[path_size
].bb
->index
);
6566 ebb_data
->path
[path_size
].bb
= NULL
;
6568 while (path_size
- 1 != path_entry
);
6569 ebb_data
->path_size
= path_size
;
6573 /* If this is a conditional jump insn, record any known
6574 equivalences due to the condition being tested. */
6576 if (path_entry
< path_size
- 1
6578 && single_set (insn
)
6579 && any_condjump_p (insn
))
6581 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6582 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6583 record_jump_equiv (insn
, taken
);
6586 /* Clear the CC0-tracking related insns, they can't provide
6587 useful information across basic block boundaries. */
6591 gcc_assert (next_qty
<= max_qty
);
6597 /* Perform cse on the instructions of a function.
6598 F is the first instruction.
6599 NREGS is one plus the highest pseudo-reg number used in the instruction.
6601 Return 2 if jump optimizations should be redone due to simplifications
6602 in conditional jump instructions.
6603 Return 1 if the CFG should be cleaned up because it has been modified.
6604 Return 0 otherwise. */
6607 cse_main (rtx_insn
*f ATTRIBUTE_UNUSED
, int nregs
)
6609 struct cse_basic_block_data ebb_data
;
6611 int *rc_order
= XNEWVEC (int, last_basic_block_for_fn (cfun
));
6614 df_set_flags (DF_LR_RUN_DCE
);
6615 df_note_add_problem ();
6617 df_set_flags (DF_DEFER_INSN_RESCAN
);
6619 reg_scan (get_insns (), max_reg_num ());
6620 init_cse_reg_info (nregs
);
6622 ebb_data
.path
= XNEWVEC (struct branch_path
,
6623 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6625 cse_cfg_altered
= false;
6626 cse_jumps_altered
= false;
6627 recorded_label_ref
= false;
6628 constant_pool_entries_cost
= 0;
6629 constant_pool_entries_regcost
= 0;
6630 ebb_data
.path_size
= 0;
6632 rtl_hooks
= cse_rtl_hooks
;
6635 init_alias_analysis ();
6637 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6639 /* Set up the table of already visited basic blocks. */
6640 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block_for_fn (cfun
));
6641 bitmap_clear (cse_visited_basic_blocks
);
6643 /* Loop over basic blocks in reverse completion order (RPO),
6644 excluding the ENTRY and EXIT blocks. */
6645 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6647 while (i
< n_blocks
)
6649 /* Find the first block in the RPO queue that we have not yet
6650 processed before. */
6653 bb
= BASIC_BLOCK_FOR_FN (cfun
, rc_order
[i
++]);
6655 while (bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
)
6658 /* Find all paths starting with BB, and process them. */
6659 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6661 /* Pre-scan the path. */
6662 cse_prescan_path (&ebb_data
);
6664 /* If this basic block has no sets, skip it. */
6665 if (ebb_data
.nsets
== 0)
6668 /* Get a reasonable estimate for the maximum number of qty's
6669 needed for this path. For this, we take the number of sets
6670 and multiply that by MAX_RECOG_OPERANDS. */
6671 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6673 /* Dump the path we're about to process. */
6675 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6677 cse_extended_basic_block (&ebb_data
);
6682 end_alias_analysis ();
6683 free (reg_eqv_table
);
6684 free (ebb_data
.path
);
6685 sbitmap_free (cse_visited_basic_blocks
);
6687 rtl_hooks
= general_rtl_hooks
;
6689 if (cse_jumps_altered
|| recorded_label_ref
)
6691 else if (cse_cfg_altered
)
6697 /* Count the number of times registers are used (not set) in X.
6698 COUNTS is an array in which we accumulate the count, INCR is how much
6699 we count each register usage.
6701 Don't count a usage of DEST, which is the SET_DEST of a SET which
6702 contains X in its SET_SRC. This is because such a SET does not
6703 modify the liveness of DEST.
6704 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6705 We must then count uses of a SET_DEST regardless, because the insn can't be
6709 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6719 switch (code
= GET_CODE (x
))
6723 counts
[REGNO (x
)] += incr
;
6735 /* If we are clobbering a MEM, mark any registers inside the address
6737 if (MEM_P (XEXP (x
, 0)))
6738 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6742 /* Unless we are setting a REG, count everything in SET_DEST. */
6743 if (!REG_P (SET_DEST (x
)))
6744 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6745 count_reg_usage (SET_SRC (x
), counts
,
6746 dest
? dest
: SET_DEST (x
),
6756 /* We expect dest to be NULL_RTX here. If the insn may throw,
6757 or if it cannot be deleted due to side-effects, mark this fact
6758 by setting DEST to pc_rtx. */
6759 if ((!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (x
))
6760 || side_effects_p (PATTERN (x
)))
6762 if (code
== CALL_INSN
)
6763 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6764 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6766 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6769 note
= find_reg_equal_equiv_note (x
);
6772 rtx eqv
= XEXP (note
, 0);
6774 if (GET_CODE (eqv
) == EXPR_LIST
)
6775 /* This REG_EQUAL note describes the result of a function call.
6776 Process all the arguments. */
6779 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6780 eqv
= XEXP (eqv
, 1);
6782 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6784 count_reg_usage (eqv
, counts
, dest
, incr
);
6789 if (REG_NOTE_KIND (x
) == REG_EQUAL
6790 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6791 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6792 involving registers in the address. */
6793 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6794 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6796 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6800 /* Iterate over just the inputs, not the constraints as well. */
6801 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6802 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6813 fmt
= GET_RTX_FORMAT (code
);
6814 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6817 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6818 else if (fmt
[i
] == 'E')
6819 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6820 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6824 /* Return true if X is a dead register. */
6827 is_dead_reg (const_rtx x
, int *counts
)
6830 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6831 && counts
[REGNO (x
)] == 0);
6834 /* Return true if set is live. */
6836 set_live_p (rtx set
, rtx_insn
*insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6841 if (set_noop_p (set
))
6844 else if (GET_CODE (SET_DEST (set
)) == CC0
6845 && !side_effects_p (SET_SRC (set
))
6846 && ((tem
= next_nonnote_nondebug_insn (insn
)) == NULL_RTX
6848 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6850 else if (!is_dead_reg (SET_DEST (set
), counts
)
6851 || side_effects_p (SET_SRC (set
)))
6856 /* Return true if insn is live. */
6859 insn_live_p (rtx_insn
*insn
, int *counts
)
6862 if (!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (insn
))
6864 else if (GET_CODE (PATTERN (insn
)) == SET
)
6865 return set_live_p (PATTERN (insn
), insn
, counts
);
6866 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6868 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6870 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6872 if (GET_CODE (elt
) == SET
)
6874 if (set_live_p (elt
, insn
, counts
))
6877 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6882 else if (DEBUG_INSN_P (insn
))
6886 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
6889 else if (!DEBUG_INSN_P (next
))
6891 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
6900 /* Count the number of stores into pseudo. Callback for note_stores. */
6903 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
6905 int *counts
= (int *) data
;
6906 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
6907 counts
[REGNO (x
)]++;
6910 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6911 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
6912 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
6913 Set *SEEN_REPL to true if we see a dead register that does have
6917 is_dead_debug_insn (const_rtx pat
, int *counts
, rtx
*replacements
,
6920 subrtx_iterator::array_type array
;
6921 FOR_EACH_SUBRTX (iter
, array
, pat
, NONCONST
)
6923 const_rtx x
= *iter
;
6924 if (is_dead_reg (x
, counts
))
6926 if (replacements
&& replacements
[REGNO (x
)] != NULL_RTX
)
6935 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6936 Callback for simplify_replace_fn_rtx. */
6939 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
6941 rtx
*replacements
= (rtx
*) data
;
6944 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6945 && replacements
[REGNO (x
)] != NULL_RTX
)
6947 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
6948 return replacements
[REGNO (x
)];
6949 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
6950 GET_MODE (replacements
[REGNO (x
)]));
6955 /* Scan all the insns and delete any that are dead; i.e., they store a register
6956 that is never used or they copy a register to itself.
6958 This is used to remove insns made obviously dead by cse, loop or other
6959 optimizations. It improves the heuristics in loop since it won't try to
6960 move dead invariants out of loops or make givs for dead quantities. The
6961 remaining passes of the compilation are also sped up. */
6964 delete_trivially_dead_insns (rtx_insn
*insns
, int nreg
)
6967 rtx_insn
*insn
, *prev
;
6968 rtx
*replacements
= NULL
;
6971 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
6972 /* First count the number of times each register is used. */
6973 if (MAY_HAVE_DEBUG_INSNS
)
6975 counts
= XCNEWVEC (int, nreg
* 3);
6976 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6977 if (DEBUG_INSN_P (insn
))
6978 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
6980 else if (INSN_P (insn
))
6982 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6983 note_stores (PATTERN (insn
), count_stores
, counts
+ nreg
* 2);
6985 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6986 First one counts how many times each pseudo is used outside
6987 of debug insns, second counts how many times each pseudo is
6988 used in debug insns and third counts how many times a pseudo
6993 counts
= XCNEWVEC (int, nreg
);
6994 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6996 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6997 /* If no debug insns can be present, COUNTS is just an array
6998 which counts how many times each pseudo is used. */
7000 /* Pseudo PIC register should be considered as used due to possible
7001 new usages generated. */
7002 if (!reload_completed
7003 && pic_offset_table_rtx
7004 && REGNO (pic_offset_table_rtx
) >= FIRST_PSEUDO_REGISTER
)
7005 counts
[REGNO (pic_offset_table_rtx
)]++;
7006 /* Go from the last insn to the first and delete insns that only set unused
7007 registers or copy a register to itself. As we delete an insn, remove
7008 usage counts for registers it uses.
7010 The first jump optimization pass may leave a real insn as the last
7011 insn in the function. We must not skip that insn or we may end
7012 up deleting code that is not really dead.
7014 If some otherwise unused register is only used in DEBUG_INSNs,
7015 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7016 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7017 has been created for the unused register, replace it with
7018 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7019 for (insn
= get_last_insn (); insn
; insn
= prev
)
7023 prev
= PREV_INSN (insn
);
7027 live_insn
= insn_live_p (insn
, counts
);
7029 /* If this is a dead insn, delete it and show registers in it aren't
7032 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
7034 if (DEBUG_INSN_P (insn
))
7035 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7040 if (MAY_HAVE_DEBUG_INSNS
7041 && (set
= single_set (insn
)) != NULL_RTX
7042 && is_dead_reg (SET_DEST (set
), counts
)
7043 /* Used at least once in some DEBUG_INSN. */
7044 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
7045 /* And set exactly once. */
7046 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
7047 && !side_effects_p (SET_SRC (set
))
7048 && asm_noperands (PATTERN (insn
)) < 0)
7050 rtx dval
, bind_var_loc
;
7053 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7054 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
7056 /* Emit a debug bind insn before the insn in which
7059 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
7060 DEBUG_EXPR_TREE_DECL (dval
),
7062 VAR_INIT_STATUS_INITIALIZED
);
7063 count_reg_usage (bind_var_loc
, counts
+ nreg
, NULL_RTX
, 1);
7065 bind
= emit_debug_insn_before (bind_var_loc
, insn
);
7066 df_insn_rescan (bind
);
7068 if (replacements
== NULL
)
7069 replacements
= XCNEWVEC (rtx
, nreg
);
7070 replacements
[REGNO (SET_DEST (set
))] = dval
;
7073 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7076 delete_insn_and_edges (insn
);
7080 if (MAY_HAVE_DEBUG_INSNS
)
7082 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7083 if (DEBUG_INSN_P (insn
))
7085 /* If this debug insn references a dead register that wasn't replaced
7086 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7087 bool seen_repl
= false;
7088 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn
),
7089 counts
, replacements
, &seen_repl
))
7091 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7092 df_insn_rescan (insn
);
7096 INSN_VAR_LOCATION_LOC (insn
)
7097 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7098 NULL_RTX
, replace_dead_reg
,
7100 df_insn_rescan (insn
);
7103 free (replacements
);
7106 if (dump_file
&& ndead
)
7107 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7111 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7115 /* If LOC contains references to NEWREG in a different mode, change them
7116 to use NEWREG instead. */
7119 cse_change_cc_mode (subrtx_ptr_iterator::array_type
&array
,
7120 rtx
*loc
, rtx_insn
*insn
, rtx newreg
)
7122 FOR_EACH_SUBRTX_PTR (iter
, array
, loc
, NONCONST
)
7128 && REGNO (x
) == REGNO (newreg
)
7129 && GET_MODE (x
) != GET_MODE (newreg
))
7131 validate_change (insn
, loc
, newreg
, 1);
7132 iter
.skip_subrtxes ();
7137 /* Change the mode of any reference to the register REGNO (NEWREG) to
7138 GET_MODE (NEWREG) in INSN. */
7141 cse_change_cc_mode_insn (rtx_insn
*insn
, rtx newreg
)
7148 subrtx_ptr_iterator::array_type array
;
7149 cse_change_cc_mode (array
, &PATTERN (insn
), insn
, newreg
);
7150 cse_change_cc_mode (array
, ®_NOTES (insn
), insn
, newreg
);
7152 /* If the following assertion was triggered, there is most probably
7153 something wrong with the cc_modes_compatible back end function.
7154 CC modes only can be considered compatible if the insn - with the mode
7155 replaced by any of the compatible modes - can still be recognized. */
7156 success
= apply_change_group ();
7157 gcc_assert (success
);
7160 /* Change the mode of any reference to the register REGNO (NEWREG) to
7161 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7162 any instruction which modifies NEWREG. */
7165 cse_change_cc_mode_insns (rtx_insn
*start
, rtx_insn
*end
, rtx newreg
)
7169 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7171 if (! INSN_P (insn
))
7174 if (reg_set_p (newreg
, insn
))
7177 cse_change_cc_mode_insn (insn
, newreg
);
7181 /* BB is a basic block which finishes with CC_REG as a condition code
7182 register which is set to CC_SRC. Look through the successors of BB
7183 to find blocks which have a single predecessor (i.e., this one),
7184 and look through those blocks for an assignment to CC_REG which is
7185 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7186 permitted to change the mode of CC_SRC to a compatible mode. This
7187 returns VOIDmode if no equivalent assignments were found.
7188 Otherwise it returns the mode which CC_SRC should wind up with.
7189 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7190 but is passed unmodified down to recursive calls in order to prevent
7193 The main complexity in this function is handling the mode issues.
7194 We may have more than one duplicate which we can eliminate, and we
7195 try to find a mode which will work for multiple duplicates. */
7198 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7199 bool can_change_mode
)
7203 unsigned int insn_count
;
7206 machine_mode modes
[2];
7207 rtx_insn
*last_insns
[2];
7212 /* We expect to have two successors. Look at both before picking
7213 the final mode for the comparison. If we have more successors
7214 (i.e., some sort of table jump, although that seems unlikely),
7215 then we require all beyond the first two to use the same
7218 found_equiv
= false;
7219 mode
= GET_MODE (cc_src
);
7221 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7226 if (e
->flags
& EDGE_COMPLEX
)
7229 if (EDGE_COUNT (e
->dest
->preds
) != 1
7230 || e
->dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
)
7231 /* Avoid endless recursion on unreachable blocks. */
7232 || e
->dest
== orig_bb
)
7235 end
= NEXT_INSN (BB_END (e
->dest
));
7236 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7240 if (! INSN_P (insn
))
7243 /* If CC_SRC is modified, we have to stop looking for
7244 something which uses it. */
7245 if (modified_in_p (cc_src
, insn
))
7248 /* Check whether INSN sets CC_REG to CC_SRC. */
7249 set
= single_set (insn
);
7251 && REG_P (SET_DEST (set
))
7252 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7255 machine_mode set_mode
;
7256 machine_mode comp_mode
;
7259 set_mode
= GET_MODE (SET_SRC (set
));
7260 comp_mode
= set_mode
;
7261 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7263 else if (GET_CODE (cc_src
) == COMPARE
7264 && GET_CODE (SET_SRC (set
)) == COMPARE
7266 && rtx_equal_p (XEXP (cc_src
, 0),
7267 XEXP (SET_SRC (set
), 0))
7268 && rtx_equal_p (XEXP (cc_src
, 1),
7269 XEXP (SET_SRC (set
), 1)))
7272 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7273 if (comp_mode
!= VOIDmode
7274 && (can_change_mode
|| comp_mode
== mode
))
7281 if (insn_count
< ARRAY_SIZE (insns
))
7283 insns
[insn_count
] = insn
;
7284 modes
[insn_count
] = set_mode
;
7285 last_insns
[insn_count
] = end
;
7288 if (mode
!= comp_mode
)
7290 gcc_assert (can_change_mode
);
7293 /* The modified insn will be re-recognized later. */
7294 PUT_MODE (cc_src
, mode
);
7299 if (set_mode
!= mode
)
7301 /* We found a matching expression in the
7302 wrong mode, but we don't have room to
7303 store it in the array. Punt. This case
7307 /* INSN sets CC_REG to a value equal to CC_SRC
7308 with the right mode. We can simply delete
7313 /* We found an instruction to delete. Keep looking,
7314 in the hopes of finding a three-way jump. */
7318 /* We found an instruction which sets the condition
7319 code, so don't look any farther. */
7323 /* If INSN sets CC_REG in some other way, don't look any
7325 if (reg_set_p (cc_reg
, insn
))
7329 /* If we fell off the bottom of the block, we can keep looking
7330 through successors. We pass CAN_CHANGE_MODE as false because
7331 we aren't prepared to handle compatibility between the
7332 further blocks and this block. */
7335 machine_mode submode
;
7337 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7338 if (submode
!= VOIDmode
)
7340 gcc_assert (submode
== mode
);
7342 can_change_mode
= false;
7350 /* Now INSN_COUNT is the number of instructions we found which set
7351 CC_REG to a value equivalent to CC_SRC. The instructions are in
7352 INSNS. The modes used by those instructions are in MODES. */
7355 for (i
= 0; i
< insn_count
; ++i
)
7357 if (modes
[i
] != mode
)
7359 /* We need to change the mode of CC_REG in INSNS[i] and
7360 subsequent instructions. */
7363 if (GET_MODE (cc_reg
) == mode
)
7366 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7368 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7372 delete_insn_and_edges (insns
[i
]);
7378 /* If we have a fixed condition code register (or two), walk through
7379 the instructions and try to eliminate duplicate assignments. */
7382 cse_condition_code_reg (void)
7384 unsigned int cc_regno_1
;
7385 unsigned int cc_regno_2
;
7390 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7393 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7394 if (cc_regno_2
!= INVALID_REGNUM
)
7395 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7397 cc_reg_2
= NULL_RTX
;
7399 FOR_EACH_BB_FN (bb
, cfun
)
7401 rtx_insn
*last_insn
;
7404 rtx_insn
*cc_src_insn
;
7407 machine_mode orig_mode
;
7409 /* Look for blocks which end with a conditional jump based on a
7410 condition code register. Then look for the instruction which
7411 sets the condition code register. Then look through the
7412 successor blocks for instructions which set the condition
7413 code register to the same value. There are other possible
7414 uses of the condition code register, but these are by far the
7415 most common and the ones which we are most likely to be able
7418 last_insn
= BB_END (bb
);
7419 if (!JUMP_P (last_insn
))
7422 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7424 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7431 for (insn
= PREV_INSN (last_insn
);
7432 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7433 insn
= PREV_INSN (insn
))
7437 if (! INSN_P (insn
))
7439 set
= single_set (insn
);
7441 && REG_P (SET_DEST (set
))
7442 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7445 cc_src
= SET_SRC (set
);
7448 else if (reg_set_p (cc_reg
, insn
))
7455 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7458 /* Now CC_REG is a condition code register used for a
7459 conditional jump at the end of the block, and CC_SRC, in
7460 CC_SRC_INSN, is the value to which that condition code
7461 register is set, and CC_SRC is still meaningful at the end of
7464 orig_mode
= GET_MODE (cc_src
);
7465 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7466 if (mode
!= VOIDmode
)
7468 gcc_assert (mode
== GET_MODE (cc_src
));
7469 if (mode
!= orig_mode
)
7471 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7473 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7475 /* Do the same in the following insns that use the
7476 current value of CC_REG within BB. */
7477 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7478 NEXT_INSN (last_insn
),
7486 /* Perform common subexpression elimination. Nonzero value from
7487 `cse_main' means that jumps were simplified and some code may now
7488 be unreachable, so do jump optimization again. */
7490 rest_of_handle_cse (void)
7495 dump_flow_info (dump_file
, dump_flags
);
7497 tem
= cse_main (get_insns (), max_reg_num ());
7499 /* If we are not running more CSE passes, then we are no longer
7500 expecting CSE to be run. But always rerun it in a cheap mode. */
7501 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7505 timevar_push (TV_JUMP
);
7506 rebuild_jump_labels (get_insns ());
7507 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7508 timevar_pop (TV_JUMP
);
7510 else if (tem
== 1 || optimize
> 1)
7518 const pass_data pass_data_cse
=
7520 RTL_PASS
, /* type */
7522 OPTGROUP_NONE
, /* optinfo_flags */
7524 0, /* properties_required */
7525 0, /* properties_provided */
7526 0, /* properties_destroyed */
7527 0, /* todo_flags_start */
7528 TODO_df_finish
, /* todo_flags_finish */
7531 class pass_cse
: public rtl_opt_pass
7534 pass_cse (gcc::context
*ctxt
)
7535 : rtl_opt_pass (pass_data_cse
, ctxt
)
7538 /* opt_pass methods: */
7539 virtual bool gate (function
*) { return optimize
> 0; }
7540 virtual unsigned int execute (function
*) { return rest_of_handle_cse (); }
7542 }; // class pass_cse
7547 make_pass_cse (gcc::context
*ctxt
)
7549 return new pass_cse (ctxt
);
7553 /* Run second CSE pass after loop optimizations. */
7555 rest_of_handle_cse2 (void)
7560 dump_flow_info (dump_file
, dump_flags
);
7562 tem
= cse_main (get_insns (), max_reg_num ());
7564 /* Run a pass to eliminate duplicated assignments to condition code
7565 registers. We have to run this after bypass_jumps, because it
7566 makes it harder for that pass to determine whether a jump can be
7568 cse_condition_code_reg ();
7570 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7574 timevar_push (TV_JUMP
);
7575 rebuild_jump_labels (get_insns ());
7576 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7577 timevar_pop (TV_JUMP
);
7582 cse_not_expected
= 1;
7589 const pass_data pass_data_cse2
=
7591 RTL_PASS
, /* type */
7593 OPTGROUP_NONE
, /* optinfo_flags */
7594 TV_CSE2
, /* tv_id */
7595 0, /* properties_required */
7596 0, /* properties_provided */
7597 0, /* properties_destroyed */
7598 0, /* todo_flags_start */
7599 TODO_df_finish
, /* todo_flags_finish */
7602 class pass_cse2
: public rtl_opt_pass
7605 pass_cse2 (gcc::context
*ctxt
)
7606 : rtl_opt_pass (pass_data_cse2
, ctxt
)
7609 /* opt_pass methods: */
7610 virtual bool gate (function
*)
7612 return optimize
> 0 && flag_rerun_cse_after_loop
;
7615 virtual unsigned int execute (function
*) { return rest_of_handle_cse2 (); }
7617 }; // class pass_cse2
7622 make_pass_cse2 (gcc::context
*ctxt
)
7624 return new pass_cse2 (ctxt
);
7627 /* Run second CSE pass after loop optimizations. */
7629 rest_of_handle_cse_after_global_opts (void)
7634 /* We only want to do local CSE, so don't follow jumps. */
7635 save_cfj
= flag_cse_follow_jumps
;
7636 flag_cse_follow_jumps
= 0;
7638 rebuild_jump_labels (get_insns ());
7639 tem
= cse_main (get_insns (), max_reg_num ());
7640 purge_all_dead_edges ();
7641 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7643 cse_not_expected
= !flag_rerun_cse_after_loop
;
7645 /* If cse altered any jumps, rerun jump opts to clean things up. */
7648 timevar_push (TV_JUMP
);
7649 rebuild_jump_labels (get_insns ());
7650 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7651 timevar_pop (TV_JUMP
);
7656 flag_cse_follow_jumps
= save_cfj
;
7662 const pass_data pass_data_cse_after_global_opts
=
7664 RTL_PASS
, /* type */
7665 "cse_local", /* name */
7666 OPTGROUP_NONE
, /* optinfo_flags */
7668 0, /* properties_required */
7669 0, /* properties_provided */
7670 0, /* properties_destroyed */
7671 0, /* todo_flags_start */
7672 TODO_df_finish
, /* todo_flags_finish */
7675 class pass_cse_after_global_opts
: public rtl_opt_pass
7678 pass_cse_after_global_opts (gcc::context
*ctxt
)
7679 : rtl_opt_pass (pass_data_cse_after_global_opts
, ctxt
)
7682 /* opt_pass methods: */
7683 virtual bool gate (function
*)
7685 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7688 virtual unsigned int execute (function
*)
7690 return rest_of_handle_cse_after_global_opts ();
7693 }; // class pass_cse_after_global_opts
7698 make_pass_cse_after_global_opts (gcc::context
*ctxt
)
7700 return new pass_cse_after_global_opts (ctxt
);