1 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
5 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
7 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
9 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
11 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
12 in the "Advanced SIMD type" attribute.
13 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
14 attribute to each Advanced SIMD type, using the mangled type
15 as the attribute's single argument.
17 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
20 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
21 -mgeneral-regs-only is not used.
23 2020-06-30 Yang Yang <yangyang305@huawei.com>
25 PR tree-optimization/95855
26 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
27 checks to recognize a missed if-conversion opportunity when
28 judging whether to duplicate a block.
30 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
32 * doc/extend.texi: Change references to "future architecture" to
33 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
34 references to "future" (because the future is now).
36 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
38 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
40 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
42 * simplify-rtx.c (simplify_distributive_operation): New function
43 to un-distribute a binary operation of two binary operations.
44 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
45 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
47 (test_scalar_int_ops): New function for unit self-testing
48 scalar integer transformations in simplify-rtx.c.
49 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
50 (simplify_rtx_c_tests): Call test_scalar_ops.
52 2020-06-29 Richard Biener <rguenther@suse.de>
54 PR tree-optimization/95916
55 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
56 the case of not vectorized externals.
58 2020-06-29 Richard Biener <rguenther@suse.de>
60 * tree-vectorizer.h: Do not include <utility>.
62 2020-06-29 Martin Liska <mliska@suse.cz>
64 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
65 instead of gimple_stmt_iterator::bb.
66 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
67 * tree-vectorizer.h: Likewise.
69 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
71 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
72 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
73 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
74 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
75 (gcn_dwarf_register_number): New function.
76 (gcn_dwarf_register_span): New function.
77 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
79 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
81 PR tree-optimization/95854
82 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
83 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
84 unsigned HOST_WIDE_INT.
86 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
88 * config/sparc/sparc.c (epilogue_renumber): Remove register.
89 (sparc_print_operand_address): Likewise.
90 (sparc_type_code): Likewise.
91 (set_extends): Likewise.
93 2020-06-29 Martin Liska <mliska@suse.cz>
95 PR tree-optimization/92860
96 * optc-save-gen.awk: Add exceptions for arc target.
98 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
100 * doc/sourcebuild.texi: Describe globbing of the
101 dump file scanning commands "suffix" argument.
103 2020-06-28 Martin Sebor <msebor@redhat.com>
106 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
108 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
110 * tree.c (get_nonnull_args): Consider the this pointer implicitly
112 * var-tracking.c (deps_vec): New type.
113 (var_loc_dep_vec): New function.
114 (VAR_LOC_DEP_VEC): Use it.
116 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
118 * internal-fn.c (direct_mask_load_optab_supported_p): Use
119 convert_optab_supported_p instead of direct_optab_supported_p.
120 (direct_mask_store_optab_supported_p): Likewise.
122 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
124 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
125 simplify_using_ranges class.
126 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
127 field. Adjust all methods to use new field.
128 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
129 simplify_using_ranges class.
130 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
131 field. Adjust all methods to use new field.
132 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
133 (vrp_prop::vrp_finalize): New vrp_folder argument.
134 (execute_vrp): Pass folder to vrp_finalize. Use
135 simplify_using_ranges class.
136 Remove cleanup_edges_and_switches call.
137 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
138 value_range_equiv uses to value_range.
139 (simplify_using_ranges::op_with_boolean_value_range_p): Use
140 simplify_using_ranges class.
141 (check_for_binary_op_overflow): Make static.
142 (vr_values::extract_range_basic): Pass this to
143 check_for_binary_op_overflow.
144 (compare_range_with_value): Change value_range_equiv uses to
146 (vr_values::vr_values): Initialize simplifier field.
147 Remove uses of to_remove_edges and to_update_switch_stmts.
148 (vr_values::~vr_values): Remove uses of to_remove_edges and
149 to_update_switch_stmts.
150 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
152 (vr_values::compare_name_with_value): Same.
153 (vr_values::compare_names): Same.
154 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
155 (vr_values::vrp_evaluate_conditional): Same.
156 (vr_values::vrp_visit_cond_stmt): Same.
157 (find_case_label_ranges): Change value_range_equiv uses to
159 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
160 (vr_values::simplify_truth_ops_using_ranges): Move to
161 simplify_using_ranges class.
162 (vr_values::simplify_div_or_mod_using_ranges): Same.
163 (vr_values::simplify_min_or_max_using_ranges): Same.
164 (vr_values::simplify_abs_using_ranges): Same.
165 (vr_values::simplify_bit_ops_using_ranges): Same.
166 (test_for_singularity): Change value_range_equiv uses to
168 (range_fits_type_p): Same.
169 (vr_values::simplify_cond_using_ranges_1): Same.
170 (vr_values::simplify_cond_using_ranges_2): Make extern.
171 (vr_values::fold_cond): Move to simplify_using_ranges class.
172 (vr_values::simplify_switch_using_ranges): Same.
173 (vr_values::cleanup_edges_and_switches): Same.
174 (vr_values::simplify_float_conversion_using_ranges): Same.
175 (vr_values::simplify_internal_call_using_ranges): Same.
176 (vr_values::two_valued_val_range_p): Same.
177 (vr_values::simplify_stmt_using_ranges): Move to...
178 (simplify_using_ranges::simplify): ...here.
179 * vr-values.h (class vr_values): Move all the simplification of
180 statements using ranges methods and code from here...
181 (class simplify_using_ranges): ...to here.
182 (simplify_cond_using_ranges_2): New extern prototype.
184 2020-06-27 Jakub Jelinek <jakub@redhat.com>
186 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
187 member, move outer member.
188 (struct omp_for_data): Add first_nonrect and last_nonrect members.
189 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
190 last_nonrect and non_rect_referenced members.
191 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
193 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
194 non-rectangular loops.
195 (extract_omp_for_update_vars): Likewise.
196 (expand_omp_for_generic, expand_omp_for_static_nochunk,
197 expand_omp_for_static_chunk, expand_omp_simd,
198 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
199 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
200 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
203 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
206 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
208 * config/i386/i386.c (ix86_frame_pointer_required): Update
211 2020-06-26 Yichao Yu <yyc1992@gmail.com>
213 * multiple_target.c (redirect_to_specific_clone): Fix tests
214 to check individual attribute rather than an attribute list.
216 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
218 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
219 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
222 2020-06-26 Marek Polacek <polacek@redhat.com>
224 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
225 * doc/standards.texi (C Language): Correct the default dialect.
226 (C++ Language): Update the default for C++ to gnu++17.
228 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
230 * tree-ssa-reassoc.c (dump_range_entry): New function.
231 (debug_range_entry): New debug function.
232 (update_range_test): Invoke dump_range_entry for dumping.
233 (optimize_range_tests_to_bit_test): Merge the entry test in the
234 bit test when possible and lower the profitability threshold.
236 2020-06-26 Richard Biener <rguenther@suse.de>
238 PR tree-optimization/95897
239 * tree-vectorizer.h (vectorizable_induction): Remove
240 unused gimple_stmt_iterator * parameter.
241 * tree-vect-loop.c (vectorizable_induction): Likewise.
242 (vect_analyze_loop_operations): Adjust.
243 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
244 (vect_transform_stmt): Likewise.
245 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
246 for fold-left reductions, clarify existing reduction case.
248 2020-06-25 Nick Clifton <nickc@redhat.com>
250 * config/m32r/m32r.md (movsicc): Disable pattern.
252 2020-06-25 Richard Biener <rguenther@suse.de>
254 PR tree-optimization/95839
255 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
256 check on the number of datarefs.
258 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
260 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
261 the insn_data n_operands value to unsigned.
263 2020-06-25 Richard Biener <rguenther@suse.de>
265 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
266 vector defs to determine insertion place.
268 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
271 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
272 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
273 (PTA_TIGERLAKE): Add PTA_CLWB.
275 2020-06-25 Richard Biener <rguenther@suse.de>
277 PR tree-optimization/95866
278 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
279 vectorized shift operands. For scalar shifts use lane zero
280 of a vectorized shift operand.
282 2020-06-25 Martin Liska <mliska@suse.cz>
284 PR tree-optimization/95745
286 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
287 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
289 * tree-vect-generic.c (expand_vector_condition): Remove dead
290 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
292 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
295 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
296 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
297 (convert_4f32_8f16): New define_expand
298 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
300 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
301 overloaded builtin entry.
302 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
303 (vsx_xvcvsphp): New define_insn.
305 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
306 Segher Boessenkool <segher@kernel.crashing.org>
308 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
310 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
312 * simplify-rtx.c (simplify_unary_operation_1): Simplify
313 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
315 2020-06-24 Richard Biener <rguenther@suse.de>
317 PR tree-optimization/95866
318 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
319 (vect_build_slp_tree_2): Properly reset matches[0],
320 ignore uniform constants.
322 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
325 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
326 (cpu_indicator_init): Likewise.
327 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
329 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
332 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
333 detection with AVX512BF16.
335 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
338 * common/config/i386/i386-isas.h: New file. Extracted from
339 gcc/config/i386/i386-builtins.c.
340 (_isa_names_table): Add option.
341 (ISA_NAMES_TABLE_START): New.
342 (ISA_NAMES_TABLE_END): Likewise.
343 (ISA_NAMES_TABLE_ENTRY): Likewise.
344 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
345 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
346 from enum processor_features.
347 * config/i386/driver-i386.c: Include
348 "common/config/i386/cpuinfo.h" and
349 "common/config/i386/i386-isas.h".
350 (has_feature): New macro.
351 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
352 features. Use has_feature to detect processor features. Call
353 Call get_intel_cpu to get the newer Intel CPU name. Use
354 isa_names_table to generate command-line options.
355 * config/i386/i386-builtins.c: Include
356 "common/config/i386/i386-isas.h".
357 (_arch_names_table): Removed.
358 (isa_names_table): Likewise.
360 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
363 * common/config/i386/cpuinfo.h: New file.
364 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
365 (__processor_model2): New.
366 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
367 (has_cpu_feature): New function.
368 (set_cpu_feature): Likewise.
369 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
370 CHECK___builtin_cpu_is. Return AMD CPU name.
371 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
372 Use CHECK___builtin_cpu_is. Return Intel CPU name.
373 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
374 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
375 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
376 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
377 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
378 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
379 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
380 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
381 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
382 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
383 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
384 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
385 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
386 FEATURE_XSAVEOPT and FEATURE_XSAVES
387 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
388 Also update cpu_model2.
389 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
390 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
391 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
392 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
393 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
394 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
395 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
396 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
397 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
398 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
399 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
400 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
401 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
402 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
403 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
404 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
405 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
406 (SIZE_OF_CPU_FEATURES): New.
407 * config/i386/i386-builtins.c (processor_features): Removed.
408 (isa_names_table): Replace F_XXX with FEATURE_XXX.
409 (fold_builtin_cpu): Change __cpu_features2 to an array.
411 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
414 * common/config/i386/i386-common.c (processor_alias_table): Add
415 processor model and priority to each entry.
416 (pta_size): Updated with -6.
417 (num_arch_names): New.
418 * common/config/i386/i386-cpuinfo.h: New file.
419 * config/i386/i386-builtins.c (feature_priority): Removed.
420 (processor_model): Likewise.
421 (_arch_names_table): Likewise.
422 (arch_names_table): Likewise.
423 (_isa_names_table): Replace P_ZERO with P_NONE.
424 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
425 processor_alias_table.
426 (fold_builtin_cpu): Replace arch_names_table with
427 processor_alias_table.
428 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
429 (pta): Add model and priority.
430 (num_arch_names): New.
432 2020-06-24 Richard Biener <rguenther@suse.de>
434 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
436 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
437 Simplify for new position of vectorized SLP loads.
438 (vect_slp_analyze_node_dependences): Adjust for it.
439 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
440 for the first stmts dataref.
441 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
442 (vect_schedule_slp_instance): Emit loads before the
444 * tree-vect-stmts.c (vectorizable_load): Do what the comment
445 says and use vect_find_first_scalar_stmt_in_slp.
447 2020-06-24 Richard Biener <rguenther@suse.de>
449 PR tree-optimization/95856
450 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
453 2020-06-24 Jakub Jelinek <jakub@redhat.com>
456 * fold-const.c (fold_cond_expr_with_comparison): Optimize
457 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
459 2020-06-24 Jakub Jelinek <jakub@redhat.com>
461 * omp-low.c (lower_omp_for): Fix two pastos.
463 2020-06-24 Martin Liska <mliska@suse.cz>
465 * optc-save-gen.awk: Compare string options in cl_optimization_compare
468 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
470 * config.gcc: Identify power10 as a 64-bit processor and as valid
471 for --with-cpu and --with-tune.
473 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
475 * Makefile.in (LANG_MAKEFRAGS): Same.
476 (tmake_file): Use -include.
479 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
481 * REVISION: Delete file meant for a private branch.
483 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
486 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
487 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
489 2020-06-23 Alexandre Oliva <oliva@adacore.com>
491 * collect-utils.h (dumppfx): New.
492 * collect-utils.c (dumppfx): Likewise.
493 * lto-wrapper.c (run_gcc): Set global dumppfx.
494 (compile_offload_image): Pass a -dumpbase on to mkoffload.
495 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
496 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
498 (compile_native): Pass -dumpbase et al to compiler.
499 * config/gcn/mkoffload.c (gcn_dumpbase): New.
500 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
501 save_temps. Pass -dumpbase et al to offload target compiler.
502 (compile_native): Pass -dumpbase et al to compiler.
504 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
506 * REVISION: New file.
508 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
510 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
511 Update comment for ISA 3.1.
512 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
513 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
514 on AIX, and -mpower10 elsewhere.
515 * config/rs6000/future.md: Delete.
516 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
518 * config/rs6000/power10.md: New file.
519 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
521 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
522 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
523 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
524 Use BU_P10_* instead of BU_FUTURE_*.
525 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
526 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
527 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
528 FUTURE_BUILTIN_VEC_XXEVAL.
529 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
530 Update compiler messages.
531 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
532 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
533 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
535 * config/rs6000/rs6000-string.c: Ditto.
536 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
537 instead of "future", reorder it to right after "power9".
538 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
539 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
540 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
541 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
542 not ISA_FUTURE_MASKS_SERVER.
543 (rs6000_opt_masks): Use "power10" instead of "future".
544 (rs6000_builtin_mask_names): Ditto.
545 (rs6000_disable_incompatible_switches): Ditto.
546 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
547 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
548 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
549 not RS6000_BTM_FUTURE.
550 * config/rs6000/rs6000.md: Use "power10", not "future". Use
551 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
553 * config/rs6000/rs6000.opt (mfuture): Delete.
555 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
556 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
558 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
560 * coretypes.h (first_type): Delete.
561 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
563 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
565 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
566 (arm_mve_hw): Likewise.
568 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
571 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
574 2020-06-22 Richard Biener <rguenther@suse.de>
576 PR tree-optimization/95770
577 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
580 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
582 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
583 (gcn_return_in_memory): Return vectors in memory.
585 2020-06-22 Jakub Jelinek <jakub@redhat.com>
587 * omp-general.c (omp_extract_for_data): For triangular loops with
588 all loop invariant expressions constant where the innermost loop is
589 executed at least once compute number of iterations at compile time.
591 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
593 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
594 (DRIVER_SELF_SPECS): New.
596 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
598 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
599 (RISCV_FTYPE_ATYPES0): New.
600 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
601 * config/riscv/riscv-ftypes.def: Remove VOID argument.
603 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
605 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
606 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
609 (ASM_CPU_SPEC): Remove vsx and altivec options.
610 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
613 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
614 (TARGET_DEFAULT): Only define if not BIARCH.
615 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
618 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
621 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
622 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
624 (CPLUSPLUS_CPP_SPEC): Same.
627 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
628 * config/rs6000/defaultaix64.h: New file.
629 * config/rs6000/t-aix64: New file.
631 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
633 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
634 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
635 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
637 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
638 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
639 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
640 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
641 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
642 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
643 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
644 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
645 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
646 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
647 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
648 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
649 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
650 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
651 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
652 Allow zero constants.
653 (print_operand) <case 'A'>: New output modifier.
654 (rs6000_split_multireg_move): Add support for inserting accumulator
655 priming and depriming instructions. Add support for splitting an
656 assemble accumulator pattern.
657 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
658 rs6000_gimple_fold_mma_builtin): New functions.
659 (RS6000_BUILTIN_M): New macro.
660 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
661 (bdesc_mma): Add new MMA built-in support.
662 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
663 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
665 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
666 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
667 and rs6000_gimple_fold_mma_builtin.
668 (rs6000_expand_builtin): Call mma_expand_builtin.
669 Use RS6000_BTC_OPND_MASK.
670 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
671 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
672 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
673 VSX_BUILTIN_XVCVBF16SP.
674 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
675 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
676 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
677 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
678 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
679 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
680 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
681 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
682 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
683 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
684 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
685 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
686 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
687 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
688 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
689 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
690 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
691 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
692 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
693 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
694 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
695 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
696 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
697 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
698 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
699 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
700 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
701 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
702 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
703 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
704 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
705 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
706 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
707 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
708 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
709 MMA_AVVI4I4I4): New define_int_iterator.
710 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
711 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
712 avvi4i4i4): New define_int_attr.
713 (*movpxi): Add zero constant alternative.
714 (mma_assemble_pair, mma_assemble_acc): New define_expand.
715 (*mma_assemble_acc): New define_insn_and_split.
716 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
717 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
718 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
719 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
720 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
721 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
722 (UNSPEC_VSX_XVCVSPBF16): Likewise.
723 (XVCVBF16): New define_int_iterator.
724 (xvcvbf16): New define_int_attr.
725 (vsx_<xvcvbf16>): New define_insn.
726 * doc/extend.texi: Document the mma built-ins.
728 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
729 Michael Meissner <meissner@linux.ibm.com>
731 * config/rs6000/mma.md: New file.
732 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
734 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
735 for __vector_pair and __vector_quad types.
736 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
738 (POWERPC_MASKS): Likewise.
739 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
740 (POI, PXI): New partial integer modes.
741 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
742 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
743 (rs6000_hard_regno_mode_ok_uncached): Likewise.
744 Add support for POImode being allowed in VSX registers and PXImode
745 being allowed in FP registers.
746 (rs6000_modes_tieable_p): Adjust comment.
747 Add support for POImode and PXImode.
748 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
749 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
750 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
751 Set up appropriate addr_masks for vector pair and vector quad addresses.
752 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
753 vector quad registers. Setup reload handlers for POImode and PXImode.
754 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
755 (rs6000_option_override_internal): Error if -mmma is specified
756 without -mcpu=future.
757 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
758 (quad_address_p): Change size test to less than 16 bytes.
759 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
760 and vector quad instructions.
761 (avoiding_indexed_address_p): Likewise.
762 (rs6000_emit_move): Disallow POImode and PXImode moves involving
764 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
765 and FP registers for PXImode.
766 (rs6000_split_multireg_move): Support splitting POImode and PXImode
768 (rs6000_mangle_type): Adjust comment. Add support for mangling
769 __vector_pair and __vector_quad types.
770 (rs6000_opt_masks): Add entry for mma.
771 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
772 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
773 (address_to_insn_form): Likewise.
774 (reg_to_non_prefixed): Likewise.
775 (rs6000_invalid_conversion): New function.
776 * config/rs6000/rs6000.h (MASK_MMA): Define.
777 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
778 (VECTOR_ALIGNMENT_P): New helper macro.
779 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
780 (RS6000_BTM_MMA): Define.
781 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
782 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
783 RS6000_BTI_vector_quad.
784 (vector_pair_type_node): New.
785 (vector_quad_type_node): New.
786 * config/rs6000/rs6000.md: Include mma.md.
787 (define_mode_iterator RELOAD): Add POI and PXI.
788 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
789 * config/rs6000/rs6000.opt (-mmma): New.
790 * doc/invoke.texi: Document -mmma.
792 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
794 PR tree-optimization/95638
795 * tree-loop-distribution.c (pg_edge_callback_data): New field.
796 (loop_distribution::break_alias_scc_partitions): Record and restore
797 postorder information. Fix memory leak.
799 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
801 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
802 (output_file_start): Use const 'char *'.
804 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
806 PR tree-optimization/94880
807 * match.pd (A | B) - B -> (A & ~B): New simplification.
809 2020-06-19 Richard Biener <rguenther@suse.de>
811 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
812 for lane permutations.
814 2020-06-19 Richard Biener <rguenther@suse.de>
816 PR tree-optimization/95761
817 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
818 vectorized stmts for finding the last one.
820 2020-06-18 Felix Yang <felix.yang@huawei.com>
822 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
823 vect_relevant_for_alignment_p to filter out data references in
824 the loop whose alignment is irrelevant when trying loop peeling
827 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
829 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
830 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
831 mode iterator for the first operand of ZERO_EXTRACT RTX.
832 Change ext_register_operand predicate to register_operand.
833 Rename from *cmpqi_ext_1.
834 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
835 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
836 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
837 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
838 (*extv<mode>): Use SWI24 mode iterator for the first operand
839 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
841 (*extzv<mode>): Use SWI248 mode iterator for the first operand
842 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
844 (*extzvqi): Use SWI248 mode iterator instead of SImode for
845 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
846 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
848 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
849 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
850 mode iterator for the first operand of ZERO_EXTRACT RTX.
851 Change ext_register_operand predicate to register_operand.
852 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
853 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
855 (*insvqi_1): Use SWI248 mode iterator instead of SImode
856 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
857 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
858 predicate to register_operand.
861 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
862 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
863 mode iterator for the first operand of ZERO_EXTRACT RTX.
864 Change ext_register_operand predicate to register_operand.
865 (addqi_ext_1): New expander.
866 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
867 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
868 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
869 to register_operand. Rename from *addqi_ext_1.
870 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
871 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
873 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
874 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
875 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
876 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
877 to register_operand. Rename from *testqi_ext_1.
878 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
879 (andqi_ext_1): New expander.
880 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
881 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
882 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
883 to register_operand. Rename from andqi_ext_1.
884 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
885 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
886 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
887 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
888 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
889 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
890 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
891 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
892 to register_operand. Rename from *xorqi_ext_1_cc.
893 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
894 in mode, matching its first operand.
895 (promote_duplicated_reg): Update for renamed insv<mode>_1.
896 * config/i386/predicates.md (ext_register_operand): Remove predicate.
898 2020-06-18 Martin Sebor <msebor@redhat.com>
902 * builtins.c (compute_objsize): Remove call to
903 compute_builtin_object_size and instead compute conservative sizes
906 2020-06-18 Martin Liska <mliska@suse.cz>
908 * coretypes.h (struct iterator_range): New type.
909 * tree-vect-patterns.c (vect_determine_precisions): Use
910 range-based iterator.
911 (vect_pattern_recog): Likewise.
912 * tree-vect-slp.c (_bb_vec_info): Likewise.
913 (_bb_vec_info::~_bb_vec_info): Likewise.
914 (vect_slp_check_for_constructors): Likewise.
915 * tree-vectorizer.h:Add new iterators
916 and functions that use it.
918 2020-06-18 Martin Liska <mliska@suse.cz>
920 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
921 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
922 of a VEC_COND_EXPR cannot be tcc_comparison and so that
923 a SSA_NAME needs to be created before we use it for the first
924 argument of the VEC_COND_EXPR.
925 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
927 2020-06-18 Richard Biener <rguenther@suse.de>
930 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
931 to the target if necessary.
932 (expand_vect_cond_mask_optab_fn): Likewise.
934 2020-06-18 Martin Liska <mliska@suse.cz>
936 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
937 vcond as we check for NULL pointer.
939 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
941 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
942 silence empty-body warning with gcc_fallthrough.
944 2020-06-18 Jakub Jelinek <jakub@redhat.com>
946 PR tree-optimization/95699
947 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
948 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
949 declarations to the statements that set them where possible.
951 2020-06-18 Jakub Jelinek <jakub@redhat.com>
954 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
955 scalar mode halfvectype other than vector boolean for
958 2020-06-18 Richard Biener <rguenther@suse.de>
960 * varasm.c (assemble_variable): Make sure to not
961 defer output when outputting addressed constants.
962 (output_constant_def_contents): Likewise.
963 (add_constant_to_table): Take and pass on whether to
965 (output_addressed_constants): Likewise.
966 (output_constant_def): Pass on whether to defer output
967 to add_constant_to_table.
968 (tree_output_constant_def): Defer output of constants.
970 2020-06-18 Richard Biener <rguenther@suse.de>
972 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
973 (_slp_tree::lane_permutation): New member.
974 (_slp_tree::code): Likewise.
975 (SLP_TREE_TWO_OPERATORS): Remove.
976 (SLP_TREE_LANE_PERMUTATION): New.
977 (SLP_TREE_CODE): Likewise.
978 (vect_stmt_dominates_stmt_p): Declare.
979 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
980 * tree-vect-stmts.c (vect_model_simple_cost): Remove
981 SLP_TREE_TWO_OPERATORS handling.
982 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
983 (_slp_tree::~_slp_tree): Likewise.
984 (vect_two_operations_perm_ok_p): Remove.
985 (vect_build_slp_tree_1): Remove verification of two-operator
987 (vect_build_slp_tree_2): When we have two different operators
988 build two computation SLP nodes and a blend.
989 (vect_print_slp_tree): Print the lane permutation if it exists.
990 (slp_copy_subtree): Copy it.
991 (vect_slp_rearrange_stmts): Re-arrange it.
992 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
993 VEC_PERM_EXPR explicitely.
994 (vect_schedule_slp_instance): Likewise. Remove old
995 SLP_TREE_TWO_OPERATORS code.
996 (vectorizable_slp_permutation): New function.
998 2020-06-18 Martin Liska <mliska@suse.cz>
1000 * tree-vect-generic.c (expand_vector_condition): Check
1001 for gassign before inspecting RHS.
1003 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
1005 * gimplify.c (omp_notice_threadprivate_variable)
1006 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
1007 diagnostic. Adjust all users.
1009 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
1011 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
1012 NULL_TREE' check earlier.
1014 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
1016 * doc/extend.texi (attribute access): Fix a typo.
1018 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
1019 Kaipeng Zhou <zhoukaipeng3@huawei.com>
1021 PR tree-optimization/95199
1022 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
1023 strided load/store operations and remove redundant code.
1025 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
1027 * coretypes.h (first_type): New alias template.
1028 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
1029 Remove spurious “...” and split the function type out into a typedef.
1031 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
1033 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
1036 2020-06-17 Richard Biener <rguenther@suse.de>
1038 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
1039 in *vectype parameter.
1040 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
1041 vect_build_slp_tree_1 computed.
1042 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
1043 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
1044 (vect_schedule_slp_instance): Likewise.
1045 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
1046 from SLP_TREE_VECTYPE.
1048 2020-06-17 Richard Biener <rguenther@suse.de>
1050 PR tree-optimization/95717
1051 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
1052 Move BB SSA updating before exit/latch PHI current def copying.
1054 2020-06-17 Martin Liska <mliska@suse.cz>
1056 * Makefile.in: Add new file.
1057 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
1058 not meet this condition.
1059 (do_store_flag): Likewise.
1060 * gimplify.c (gimplify_expr): Gimplify first argument of
1061 VEC_COND_EXPR to be a SSA name.
1062 * internal-fn.c (vec_cond_mask_direct): New.
1063 (vec_cond_direct): Likewise.
1064 (vec_condu_direct): Likewise.
1065 (vec_condeq_direct): Likewise.
1066 (expand_vect_cond_optab_fn): New.
1067 (expand_vec_cond_optab_fn): Likewise.
1068 (expand_vec_condu_optab_fn): Likewise.
1069 (expand_vec_condeq_optab_fn): Likewise.
1070 (expand_vect_cond_mask_optab_fn): Likewise.
1071 (expand_vec_cond_mask_optab_fn): Likewise.
1072 (direct_vec_cond_mask_optab_supported_p): Likewise.
1073 (direct_vec_cond_optab_supported_p): Likewise.
1074 (direct_vec_condu_optab_supported_p): Likewise.
1075 (direct_vec_condeq_optab_supported_p): Likewise.
1076 * internal-fn.def (VCOND): New OPTAB.
1078 (VCONDEQ): Likewise.
1079 (VCOND_MASK): Likewise.
1080 * optabs.c (get_rtx_code): Make it global.
1081 (expand_vec_cond_mask_expr): Removed.
1082 (expand_vec_cond_expr): Removed.
1083 * optabs.h (expand_vec_cond_expr): Likewise.
1084 (vector_compare_rtx): Make it global.
1085 * passes.def: Add new pass_gimple_isel pass.
1086 * tree-cfg.c (verify_gimple_assign_ternary): Add check
1087 for VEC_COND_EXPR about first argument.
1088 * tree-pass.h (make_pass_gimple_isel): New.
1089 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
1090 propagation of the first argument of a VEC_COND_EXPR.
1091 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
1092 first argument of a VEC_COND_EXPR.
1093 (optimize_vec_cond_expr): Likewise.
1094 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
1095 for a first argument of created VEC_COND_EXPR.
1096 (expand_vector_condition): Fix coding style.
1097 * tree-vect-stmts.c (vectorizable_condition): Gimplify
1099 * gimple-isel.cc: New file.
1101 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
1103 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
1104 (BSS_SECTION_ASM_OP): Use ".bss".
1105 (ASM_SPEC): Remove "-mattr=-code-object-v3".
1106 (LINK_SPEC): Add "--export-dynamic".
1107 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
1108 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
1109 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
1110 (load_image): Remove obsolete relocation handling.
1111 Add ".kd" suffix to the symbol names.
1112 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
1113 (gcn_option_override): Update gcn_isa test.
1114 (gcn_kernel_arg_types): Update all the assembler directives.
1115 Remove the obsolete options.
1116 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
1117 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
1119 (output_file_start): Rework assembler file header.
1120 (gcn_hsa_declare_function_name): Rework kernel metadata.
1121 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
1122 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
1123 (PROCESSOR_VEGA10): New enum value.
1124 (PROCESSOR_VEGA20): New enum value.
1126 2020-06-17 Martin Liska <mliska@suse.cz>
1128 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
1130 * gcov-tool.c (print_version): Likewise.
1131 * gcov.c (print_version): Likewise.
1133 2020-06-17 liuhongt <hongtao.liu@intel.com>
1136 * config/i386/i386-expand.c
1137 (ix86_expand_vec_shift_qihi_constant): New function.
1138 * config/i386/i386-protos.h
1139 (ix86_expand_vec_shift_qihi_constant): Declare.
1140 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
1141 V*QImode by constant.
1143 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
1145 PR tree-optimization/95649
1146 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
1147 value is a constant.
1149 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1151 * config.in: Regenerate.
1152 * config/s390/s390.c (print_operand): Emit vector alignment hints
1153 for target z13, if AS accepts them. For other targets the logic
1155 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
1157 * configure: Regenerate.
1158 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
1160 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1162 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
1164 (__arm_vaddq_m_n_s32): Likewise.
1165 (__arm_vaddq_m_n_s16): Likewise.
1166 (__arm_vaddq_m_n_u8): Likewise.
1167 (__arm_vaddq_m_n_u32): Likewise.
1168 (__arm_vaddq_m_n_u16): Likewise.
1169 (__arm_vaddq_m): Modify polymorphic variant.
1171 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1173 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
1174 and constraint of all the operands.
1175 (mve_sqrshrl_sat<supf>_di): Likewise.
1176 (mve_uqrshl_si): Likewise.
1177 (mve_sqrshr_si): Likewise.
1178 (mve_uqshll_di): Likewise.
1179 (mve_urshrl_di): Likewise.
1180 (mve_uqshl_si): Likewise.
1181 (mve_urshr_si): Likewise.
1182 (mve_sqshl_si): Likewise.
1183 (mve_srshr_si): Likewise.
1184 (mve_srshrl_di): Likewise.
1185 (mve_sqshll_di): Likewise.
1186 * config/arm/predicates.md (arm_low_register_operand): Define.
1188 2020-06-16 Jakub Jelinek <jakub@redhat.com>
1190 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
1191 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
1192 or dist_schedule clause on non-rectangular loops. Handle
1193 gimplification of non-rectangular lb/b expressions. When changing
1194 iteration variable, adjust also non-rectangular lb/b expressions
1196 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
1198 (struct omp_for_data): Add non_rect member.
1199 * omp-general.c (omp_extract_for_data): Handle non-rectangular
1200 loops. Fill in non_rect, m1, m2 and outer.
1201 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
1202 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
1203 non-rectangular loop cases and assert for cases that can't be
1205 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
1206 (dump_omp_loop_non_rect_expr): New function.
1207 (dump_generic_node): Handle non-rectangular OpenMP loops.
1208 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
1209 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
1212 2020-06-16 Richard Biener <rguenther@suse.de>
1215 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
1217 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
1220 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
1221 assertion and turn it into a early exit check.
1223 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
1225 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
1226 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
1227 true and all elements are zero, then always clear. Return GS_ERROR
1228 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
1229 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
1230 the type is aggregate non-addressable, ask gimplify_init_constructor
1231 whether it can generate a single access to the target.
1233 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
1235 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
1236 access on the LHS is replaced with a scalar access, propagate the
1237 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
1239 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
1241 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
1242 TARGET_THREADPTR reference.
1243 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
1244 targetm.have_tls instead of TARGET_HAVE_TLS.
1245 (xtensa_option_override): Set targetm.have_tls to false in
1246 configurations without THREADPTR.
1248 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
1250 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
1252 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
1253 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
1254 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
1255 xtensa_windowed_abi if needed.
1256 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
1258 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
1259 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
1261 (mabi=call0, mabi=windowed): New options.
1262 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
1264 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
1266 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
1267 (TARGET_CAN_ELIMINATE): New macro.
1268 * config/xtensa/xtensa.h
1269 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
1270 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
1271 (HARD_FRAME_POINTER_REGNUM): Define using
1272 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
1273 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
1274 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
1275 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
1277 2020-06-15 Felix Yang <felix.yang@huawei.com>
1279 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
1280 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
1282 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
1284 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
1285 LOOP_VINFO_DATAREFS when possible.
1286 (update_epilogue_loop_vinfo): Likewise.
1288 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
1290 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
1292 (riscv_gpr_save_operation_p): Change type to unsigned for i and
1295 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
1298 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
1300 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
1301 * config/i386/sse.md (mul<mode>3): Drop mask_name since
1302 there's no real simd int8 multiplication instruction with
1303 mask. Also optimize it under TARGET_AVX512BW.
1304 (mulv8qi3): New expander.
1306 2020-06-12 Marco Elver <elver@google.com>
1308 * gimplify.c (gimplify_function_tree): Optimize and do not emit
1309 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
1310 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
1311 * tsan.c (instrument_memory_accesses): Make
1312 fentry_exit_instrument bool depend on new param.
1314 2020-06-12 Felix Yang <felix.yang@huawei.com>
1316 PR tree-optimization/95570
1317 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
1318 (vect_verify_datarefs_alignment): Call it to filter out data references
1319 in the loop whose alignment is irrelevant.
1320 (vect_get_peeling_costs_all_drs): Likewise.
1321 (vect_peeling_supportable): Likewise.
1322 (vect_enhance_data_refs_alignment): Likewise.
1324 2020-06-12 Richard Biener <rguenther@suse.de>
1326 PR tree-optimization/95633
1327 * tree-vect-stmts.c (vectorizable_condition): Properly
1328 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
1330 2020-06-12 Martin Liška <mliska@suse.cz>
1332 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
1333 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
1335 * lto-wrapper.c (merge_and_complain): Wrap option names.
1337 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
1339 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
1340 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
1341 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
1342 (vect_set_loop_condition_masked): Renamed to ...
1343 (vect_set_loop_condition_partial_vectors): ... this. Rename
1344 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
1345 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
1346 (vect_set_loop_condition_unmasked): Renamed to ...
1347 (vect_set_loop_condition_normal): ... this.
1348 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
1349 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
1350 to vect_set_loop_condition_partial_vectors.
1351 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
1352 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
1353 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
1355 (vect_analyze_loop_costing): ... this.
1356 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
1358 (vect_min_prec_for_max_niters): New, factored out from ...
1359 (vect_verify_full_masking): ... this. Rename
1360 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
1361 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
1362 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
1363 (vectorizable_reduction): Update some dumpings with partial
1364 vectors instead of fully-masked.
1365 (vectorizable_live_operation): Likewise.
1366 (vect_iv_limit_for_full_masking): Renamed to ...
1367 (vect_iv_limit_for_partial_vectors): ... this.
1368 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
1369 (check_load_store_for_partial_vectors): ... this. Update some
1370 dumpings with partial vectors instead of fully-masked.
1371 (vectorizable_store): Rename check_load_store_masking to
1372 check_load_store_for_partial_vectors.
1373 (vectorizable_load): Likewise.
1374 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
1375 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
1376 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
1377 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
1378 (vect_iv_limit_for_full_masking): Renamed to ...
1379 (vect_iv_limit_for_partial_vectors): this.
1380 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
1381 Rename iv_type to rgroup_iv_type.
1383 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
1385 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
1386 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
1387 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
1388 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
1389 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
1390 (insn_gen_fn::operator()): Replace overloaded definitions with
1391 a parameter-pack version.
1393 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
1396 * config/i386/i386-features.c (rest_of_insert_endbranch):
1398 (rest_of_insert_endbr_and_patchable_area): Change return type
1399 to void. Add need_endbr and patchable_area_size arguments.
1400 Don't call timevar_push nor timevar_pop. Replace
1401 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
1402 UNSPECV_PATCHABLE_AREA for patchable area.
1403 (pass_data_insert_endbranch): Renamed to ...
1404 (pass_data_insert_endbr_and_patchable_area): This. Change
1405 pass name to endbr_and_patchable_area.
1406 (pass_insert_endbranch): Renamed to ...
1407 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
1408 and patchable_area_size;.
1409 (pass_insert_endbr_and_patchable_area::gate): Set and check
1410 need_endbr and patchable_area_size.
1411 (pass_insert_endbr_and_patchable_area::execute): Call
1412 timevar_push and timevar_pop. Pass need_endbr and
1413 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
1414 (make_pass_insert_endbranch): Renamed to ...
1415 (make_pass_insert_endbr_and_patchable_area): This.
1416 * config/i386/i386-passes.def: Replace pass_insert_endbranch
1417 with pass_insert_endbr_and_patchable_area.
1418 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
1419 (make_pass_insert_endbranch): Renamed to ...
1420 (make_pass_insert_endbr_and_patchable_area): This.
1421 * config/i386/i386.c (ix86_asm_output_function_label): Set
1422 function_label_emitted to true.
1423 (ix86_print_patchable_function_entry): New function.
1424 (ix86_output_patchable_area): Likewise.
1425 (x86_function_profiler): Replace endbr_queued_at_entrance with
1426 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
1427 Call ix86_output_patchable_area to generate patchable area if
1429 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
1430 * config/i386/i386.h (queued_insn_type): New.
1431 (machine_function): Add function_label_emitted. Replace
1432 endbr_queued_at_entrance with insn_queued_at_entrance.
1433 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
1434 (patchable_area): New.
1436 2020-06-11 Martin Liska <mliska@suse.cz>
1438 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
1441 2020-06-11 Martin Liska <mliska@suse.cz>
1444 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
1447 2020-06-11 Martin Liska <mliska@suse.cz>
1448 Jakub Jelinek <jakub@redhat.com>
1451 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
1452 by using Pmode instead of ptr_mode.
1454 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
1456 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
1457 (vect_set_loop_control): ... this.
1458 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
1459 (vect_set_loop_masks_directly): Renamed to ...
1460 (vect_set_loop_controls_directly): ... this. Also rename some
1461 variables with ctrl instead of mask. Rename vect_set_loop_mask to
1462 vect_set_loop_control.
1463 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
1464 Also rename some variables with ctrl instead of mask.
1465 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
1466 (release_vec_loop_controls): ... this. Rename rgroup_masks related
1468 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
1469 release_vec_loop_controls.
1470 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
1471 (vect_get_max_nscalars_per_iter): Likewise.
1472 (vect_estimate_min_profitable_iters): Likewise.
1473 (vect_record_loop_mask): Likewise.
1474 (vect_get_loop_mask): Likewise.
1475 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
1476 (struct rgroup_controls): ... this. Also rename mask_type
1477 to type and rename masks to controls.
1479 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
1481 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
1482 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
1483 (vect_gen_vector_loop_niters): Likewise.
1484 (vect_do_peeling): Likewise.
1485 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
1486 fully_masked_p to using_partial_vectors_p.
1487 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
1488 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
1489 (determine_peel_for_niter): Likewise.
1490 (vect_estimate_min_profitable_iters): Likewise.
1491 (vect_transform_loop): Likewise.
1492 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
1493 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
1495 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
1497 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
1498 can_fully_mask_p to can_use_partial_vectors_p.
1499 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
1500 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
1501 to saved_can_use_partial_vectors_p.
1502 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
1503 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
1504 (vectorizable_live_operation): Likewise.
1505 * tree-vect-stmts.c (permute_vec_elements): Likewise.
1506 (check_load_store_masking): Likewise.
1507 (vectorizable_operation): Likewise.
1508 (vectorizable_store): Likewise.
1509 (vectorizable_load): Likewise.
1510 (vectorizable_condition): Likewise.
1511 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
1512 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
1513 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
1515 2020-06-11 Martin Liska <mliska@suse.cz>
1517 * optc-save-gen.awk: Quote error string.
1519 2020-06-11 Alexandre Oliva <oliva@adacore.com>
1521 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
1523 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
1525 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
1526 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
1528 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
1529 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
1531 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
1533 * config/riscv/predicates.md (gpr_save_operation): New.
1534 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
1535 (riscv_gpr_save_operation_p): Ditto.
1536 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
1537 Ignore USEs for gpr_save patter.
1538 * config/riscv/riscv.c (gpr_save_reg_order): New.
1539 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
1540 (riscv_gen_gpr_save_insn): New.
1541 (riscv_gpr_save_operation_p): Ditto.
1542 * config/riscv/riscv.md (S3_REGNUM): New.
1549 (S10_REGNUM): Ditto.
1550 (S11_REGNUM): Ditto.
1551 (gpr_save): Model USEs correctly.
1553 2020-06-10 Martin Sebor <msebor@redhat.com>
1557 * builtins.c (inform_access): New function.
1558 (check_access): Call it. Add argument.
1559 (addr_decl_size): Remove.
1560 (get_range): New function.
1561 (compute_objsize): New overload. Only use compute_builtin_object_size
1562 with raw memory function.
1563 (check_memop_access): Pass new argument to compute_objsize and
1565 (expand_builtin_memchr, expand_builtin_strcat): Same.
1566 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
1567 (expand_builtin_stpncpy, check_strncat_sizes): Same.
1568 (expand_builtin_strncat, expand_builtin_strncpy): Same.
1569 (expand_builtin_memcmp): Same.
1570 * builtins.h (check_nul_terminated_array): Declare extern.
1571 (check_access): Add argument.
1572 (struct access_ref, struct access_data): New structs.
1573 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
1574 (builtin_access::overlap): Call it.
1575 * tree-object-size.c (decl_init_size): Declare extern.
1576 (addr_object_size): Correct offset computation.
1577 * tree-object-size.h (decl_init_size): Declare.
1578 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
1579 to maybe_warn_overflow when assigning to an SSA_NAME.
1581 2020-06-10 Richard Biener <rguenther@suse.de>
1583 * tree-vect-loop.c (vect_determine_vectorization_factor):
1585 (_loop_vec_info::_loop_vec_info): Likewise.
1586 (vect_update_vf_for_slp): Likewise.
1587 (vect_analyze_loop_operations): Likewise.
1588 (update_epilogue_loop_vinfo): Likewise.
1589 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
1590 (vect_pattern_recog): Likewise.
1591 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
1592 (_bb_vec_info::_bb_vec_info): Likewise.
1593 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
1596 2020-06-10 Richard Biener <rguenther@suse.de>
1598 PR tree-optimization/95576
1599 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
1601 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
1604 * config/aarch64/aarch64-sve-builtins.h
1605 (sve_switcher::m_old_maximum_field_alignment): New member.
1606 * config/aarch64/aarch64-sve-builtins.cc
1607 (sve_switcher::sve_switcher): Save maximum_field_alignment in
1608 m_old_maximum_field_alignment and clear maximum_field_alignment.
1609 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
1611 2020-06-10 Richard Biener <rguenther@suse.de>
1613 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
1615 (_stmt_vec_info::vec_stmts): Likewise.
1616 (vec_info::stmt_vec_info_ro): New flag.
1617 (vect_finish_replace_stmt): Adjust declaration.
1618 (vect_finish_stmt_generation): Likewise.
1619 (vectorizable_induction): Likewise.
1620 (vect_transform_reduction): Likewise.
1621 (vectorizable_lc_phi): Likewise.
1622 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
1623 allocate stmt infos for increments.
1624 (vect_record_grouped_load_vectors): Adjust.
1625 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
1626 (vectorize_fold_left_reduction): Likewise.
1627 (vect_transform_reduction): Likewise.
1628 (vect_transform_cycle_phi): Likewise.
1629 (vectorizable_lc_phi): Likewise.
1630 (vectorizable_induction): Likewise.
1631 (vectorizable_live_operation): Likewise.
1632 (vect_transform_loop): Likewise.
1633 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
1634 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
1635 (vect_get_slp_defs): Likewise.
1636 (vect_transform_slp_perm_load): Likewise.
1637 (vect_schedule_slp_instance): Likewise.
1638 (vectorize_slp_instance_root_stmt): Likewise.
1639 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
1640 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
1641 (vect_finish_replace_stmt): Do not return anything.
1642 (vect_finish_stmt_generation): Likewise.
1643 (vect_build_gather_load_calls): Adjust.
1644 (vectorizable_bswap): Likewise.
1645 (vectorizable_call): Likewise.
1646 (vectorizable_simd_clone_call): Likewise.
1647 (vect_create_vectorized_demotion_stmts): Likewise.
1648 (vectorizable_conversion): Likewise.
1649 (vectorizable_assignment): Likewise.
1650 (vectorizable_shift): Likewise.
1651 (vectorizable_operation): Likewise.
1652 (vectorizable_scan_store): Likewise.
1653 (vectorizable_store): Likewise.
1654 (vectorizable_load): Likewise.
1655 (vectorizable_condition): Likewise.
1656 (vectorizable_comparison): Likewise.
1657 (vect_transform_stmt): Likewise.
1658 * tree-vectorizer.c (vec_info::vec_info): Initialize
1660 (vec_info::replace_stmt): Copy over stmt UID rather than
1661 unsetting/setting a stmt info allocating a new UID.
1662 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
1664 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
1666 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
1668 * gimple-ssa-evrp.c (class evrp_folder): New.
1669 (class evrp_dom_walker): Remove.
1670 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
1671 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
1672 * tree-ssa-copy.c (copy_folder::get_value): Same.
1673 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
1674 Pass stmt to get_value.
1675 (substitute_and_fold_engine::replace_phi_args_in): Same.
1676 (substitute_and_fold_dom_walker::after_dom_children): Call
1678 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
1679 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
1680 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
1681 call virtual functions for folding, pre_folding, and post folding.
1682 Call get_value with PHI. Tweak dump.
1683 * tree-ssa-propagate.h (class substitute_and_fold_engine):
1684 New argument to get_value.
1685 New virtual function pre_fold_bb.
1686 New virtual function post_fold_bb.
1687 New virtual function pre_fold_stmt.
1688 New virtual function post_new_stmt.
1689 New function propagate_into_phi_args.
1690 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
1691 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
1693 (vr_values::fold_cond): New.
1694 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
1695 * vr-values.h (class vr_values): Add
1696 simplify_cond_using_ranges_when_edge_is_known.
1698 2020-06-10 Martin Liska <mliska@suse.cz>
1701 * asan.c (asan_emit_stack_protection): Emit
1702 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
1705 2020-06-10 Tamar Christina <tamar.christina@arm.com>
1707 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
1709 2020-06-10 Richard Biener <rguenther@suse.de>
1711 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
1712 (vect_record_grouped_load_vectors): Likewise.
1713 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
1714 (vectorize_fold_left_reduction): Likewise.
1715 (vect_transform_reduction): Likewise.
1716 (vect_transform_cycle_phi): Likewise.
1717 (vectorizable_lc_phi): Likewise.
1718 (vectorizable_induction): Likewise.
1719 (vectorizable_live_operation): Likewise.
1720 (vect_transform_loop): Likewise.
1721 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
1723 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
1724 (vect_get_vec_def_for_operand): Likewise.
1725 (vect_get_vec_def_for_stmt_copy): Likewise.
1726 (vect_get_vec_defs_for_stmt_copy): Likewise.
1727 (vect_get_vec_defs_for_operand): New function.
1728 (vect_get_vec_defs): Likewise.
1729 (vect_build_gather_load_calls): Adjust.
1730 (vect_get_gather_scatter_ops): Likewise.
1731 (vectorizable_bswap): Likewise.
1732 (vectorizable_call): Likewise.
1733 (vectorizable_simd_clone_call): Likewise.
1734 (vect_get_loop_based_defs): Remove.
1735 (vect_create_vectorized_demotion_stmts): Adjust.
1736 (vectorizable_conversion): Likewise.
1737 (vectorizable_assignment): Likewise.
1738 (vectorizable_shift): Likewise.
1739 (vectorizable_operation): Likewise.
1740 (vectorizable_scan_store): Likewise.
1741 (vectorizable_store): Likewise.
1742 (vectorizable_load): Likewise.
1743 (vectorizable_condition): Likewise.
1744 (vectorizable_comparison): Likewise.
1745 (vect_transform_stmt): Adjust and remove no longer applicable
1747 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
1748 STMT_VINFO_VEC_STMTS.
1749 (vec_info::free_stmt_vec_info): Relase it.
1750 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
1751 (_stmt_vec_info::vec_stmts): Add.
1752 (STMT_VINFO_VEC_STMT): Remove.
1753 (STMT_VINFO_VEC_STMTS): New.
1754 (vect_get_vec_def_for_operand_1): Remove.
1755 (vect_get_vec_def_for_operand): Likewise.
1756 (vect_get_vec_defs_for_stmt_copy): Likewise.
1757 (vect_get_vec_def_for_stmt_copy): Likewise.
1758 (vect_get_vec_defs): New overloads.
1759 (vect_get_vec_defs_for_operand): New.
1760 (vect_get_slp_defs): Declare.
1762 2020-06-10 Qian Chao <qianchao9@huawei.com>
1764 PR tree-optimization/95569
1765 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
1767 2020-06-10 Martin Liska <mliska@suse.cz>
1769 PR tree-optimization/92860
1770 * optc-save-gen.awk: Generate new function cl_optimization_compare.
1771 * opth-gen.awk: Generate declaration of the function.
1773 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
1775 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
1776 'future' PowerPC platform.
1777 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
1778 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
1779 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
1781 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
1782 (rs6000_clone_map): Add 'future' system target_clones support.
1784 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
1786 * Makefile.in (ZSTD_INC): Define.
1787 (ZSTD_LIB): Include ZSTD_LDFLAGS.
1788 (CFLAGS-lto-compress.o): Add ZSTD_INC.
1789 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
1791 * configure: Rebuilt.
1793 2020-06-09 Jason Merrill <jason@redhat.com>
1796 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
1798 2020-06-09 Marco Elver <elver@google.com>
1800 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
1801 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
1802 builtin for volatile instrumentation of reads/writes.
1803 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
1804 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
1805 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
1806 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
1807 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
1808 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
1809 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
1810 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
1811 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
1812 * tsan.c (get_memory_access_decl): Argument if access is
1813 volatile. If param tsan-distinguish-volatile is non-zero, and
1814 access if volatile, return volatile instrumentation decl.
1815 (instrument_expr): Check if access is volatile.
1817 2020-06-09 Richard Biener <rguenther@suse.de>
1819 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
1821 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
1823 * omp-offload.c (add_decls_addresses_to_decl_constructor,
1824 omp_finish_file): With in_lto_p, stream out all offload-table
1825 items even if the symtab_node does not exist.
1827 2020-06-09 Richard Biener <rguenther@suse.de>
1829 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
1831 2020-06-09 Martin Liska <mliska@suse.cz>
1833 * gcov-dump.c (print_usage): Fix spacing for --raw option
1836 2020-06-09 Martin Liska <mliska@suse.cz>
1838 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
1839 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
1840 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
1841 Handle all sanitizer options.
1842 (can_inline_edge_p): Use renamed CIF_* enum value.
1844 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
1846 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
1848 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
1849 (@aarch64_bic<mode>): Enable unpacked BIC.
1850 (*bic<mode>3): Enable unpacked BIC.
1852 2020-06-09 Martin Liska <mliska@suse.cz>
1854 PR gcov-profile/95365
1855 * doc/gcov.texi: Compile and link one example in 2 steps.
1857 2020-06-09 Jakub Jelinek <jakub@redhat.com>
1859 PR tree-optimization/95527
1860 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
1862 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
1864 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
1865 'future' PowerPC platform.
1866 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
1867 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
1868 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
1870 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
1871 (rs6000_clone_map): Add 'future' system target_clones support.
1873 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
1877 * omp-offload.c (add_decls_addresses_to_decl_constructor,
1878 omp_finish_file): Skip removed items.
1879 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
1880 to this node for variables and functions.
1882 2020-06-08 Jason Merrill <jason@redhat.com>
1884 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
1885 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
1886 * configure: Regenerate.
1888 2020-06-08 Martin Sebor <msebor@redhat.com>
1890 * postreload.c (reload_cse_simplify_operands): Clear first array element
1891 before using it. Assert a precondition.
1893 2020-06-08 Jakub Jelinek <jakub@redhat.com>
1896 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
1897 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
1898 type is vector boolean.
1900 2020-06-08 Tamar Christina <tamar.christina@arm.com>
1902 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
1904 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
1906 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
1907 instead of VFP_REGS.
1909 2020-06-08 Martin Liska <mliska@suse.cz>
1911 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
1912 in all vcond* patterns.
1914 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
1916 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
1917 Define. No longer include <algorithm>.
1919 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
1921 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
1922 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
1923 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
1924 (parityhi2, parityqi2): New expanders.
1925 (parityhi2_cmp): Implement set parity flag with xorb insn.
1926 (parityqi2_cmp): Implement set parity flag with testb insn.
1927 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
1929 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
1932 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1933 Override flag_cunroll_grow_size.
1935 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
1937 * common.opt (flag_cunroll_grow_size): New flag.
1938 * toplev.c (process_options): Set flag_cunroll_grow_size.
1939 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
1940 Use flag_cunroll_grow_size.
1942 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
1945 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
1946 (ipa_odr_summary_write): Update streaming.
1947 (ipa_odr_read_section): Update streaming.
1949 2020-06-06 Alexandre Oliva <oliva@adacore.com>
1952 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
1954 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
1955 Julian Brown <julian@codesourcery.com>
1957 * gimplify.c (gimplify_adjust_omp_clauses): Remove
1958 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
1960 2020-06-05 Richard Biener <rguenther@suse.de>
1962 PR tree-optimization/95539
1963 * tree-vect-data-refs.c
1964 (vect_slp_analyze_and_verify_instance_alignment): Use
1965 SLP_TREE_REPRESENTATIVE for the data-ref check.
1966 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
1967 back to the first scalar stmt rather than the
1968 SLP_TREE_REPRESENTATIVE to match previous behavior.
1970 2020-06-05 Felix Yang <felix.yang@huawei.com>
1973 * expr.c (emit_move_insn): Check src and dest of the copy to see
1974 if one or both of them are subregs, try to remove the subregs when
1975 innermode and outermode are equal in size and the mode change involves
1976 an implicit round trip through memory.
1978 2020-06-05 Jakub Jelinek <jakub@redhat.com>
1981 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
1982 define_insn_and_split patterns.
1983 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
1984 define_insn patterns.
1986 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
1988 * alloc-pool.h (object_allocator::remove_raw): New.
1989 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
1990 (occurrence::occurrence): Add.
1991 (occurrence::~occurrence): Likewise.
1992 (occurrence::new): Likewise.
1993 (occurrence::delete): Likewise.
1995 (insert_bb): Use new occurence (...) instead of occ_new.
1996 (register_division_in): Likewise.
1997 (free_bb): Use delete occ instead of manually removing
2000 2020-06-05 Richard Biener <rguenther@suse.de>
2003 * cfgexpand.c (expand_debug_expr): Avoid calling
2004 set_mem_attributes_minus_bitpos when we were expanding
2006 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
2007 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
2008 special-cases we do not want MEM_EXPRs for. Assert
2009 we end up with reasonable MEM_EXPRs.
2011 2020-06-05 Lili Cui <lili.cui@intel.com>
2014 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
2016 2020-06-04 Martin Sebor <msebor@redhat.com>
2020 * attribs.c (init_attr_rdwr_indices): Move function here.
2021 * attribs.h (rdwr_access_hash, rdwr_map): Define.
2022 (attr_access): Add 'none'.
2023 (init_attr_rdwr_indices): Declared function.
2024 * builtins.c (warn_for_access)): New function.
2025 (check_access): Call it.
2026 * builtins.h (checK-access): Add an optional argument.
2027 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
2028 (init_attr_rdwr_indices): Declare extern.
2029 (append_attrname): Handle attr_access::none.
2030 (maybe_warn_rdwr_sizes): Same.
2031 (initialize_argument_information): Update comments.
2032 * doc/extend.texi (attribute access): Document 'none'.
2033 * tree-ssa-uninit.c (struct wlimits): New.
2034 (maybe_warn_operand): New function.
2035 (maybe_warn_pass_by_reference): Same.
2036 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
2037 Also call for function calls.
2038 (pass_late_warn_uninitialized::execute): Adjust comments.
2039 (execute_early_warn_uninitialized): Same.
2041 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
2044 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
2045 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
2046 reload if the original insn has it too.
2048 2020-06-04 Richard Biener <rguenther@suse.de>
2050 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
2051 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
2053 2020-06-04 Martin Jambor <mjambor@suse.cz>
2056 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
2057 exceptions check to...
2058 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
2060 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
2061 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
2064 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2067 * config/arm/predicates.md (mve_scatter_memory): Define to
2068 match (mem (reg)) for scatter store memory.
2069 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
2070 define_insn to define_expand.
2071 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
2072 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
2073 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
2074 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
2075 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
2076 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
2077 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
2078 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
2079 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
2080 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
2081 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
2082 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
2083 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
2084 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
2085 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
2086 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
2087 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
2088 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
2089 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
2090 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
2091 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
2093 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
2094 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
2095 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
2096 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
2097 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
2098 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
2099 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
2100 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
2101 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
2102 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
2103 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
2104 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
2105 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
2106 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
2107 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
2108 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
2109 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
2110 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
2111 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
2112 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
2114 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2116 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
2118 (__arm_vbicq_n_s16): Likewise.
2119 (__arm_vbicq_n_u32): Likewise.
2120 (__arm_vbicq_n_s32): Likewise.
2121 (__arm_vbicq): Modify polymorphic variant.
2123 2020-06-04 Richard Biener <rguenther@suse.de>
2125 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
2126 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
2127 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
2128 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
2129 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
2131 (vect_get_slp_defs): ... here.
2132 (vect_get_slp_vect_def): New function.
2134 2020-06-04 Richard Biener <rguenther@suse.de>
2136 * tree-vectorizer.h (_slp_tree::lanes): New.
2137 (SLP_TREE_LANES): Likewise.
2138 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
2139 (vectorizable_reduction): Likewise.
2140 (vect_transform_cycle_phi): Likewise.
2141 (vectorizable_induction): Likewise.
2142 (vectorizable_live_operation): Likewise.
2143 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
2144 (vect_create_new_slp_node): Likewise.
2145 (slp_copy_subtree): Copy it.
2146 (vect_optimize_slp): Use it.
2147 (vect_slp_analyze_node_operations_1): Likewise.
2148 (vect_slp_convert_to_external): Likewise.
2149 (vect_bb_vectorization_profitable_p): Likewise.
2150 * tree-vect-stmts.c (vectorizable_load): Likewise.
2151 (get_vectype_for_scalar_type): Likewise.
2153 2020-06-04 Richard Biener <rguenther@suse.de>
2155 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
2156 (vect_build_slp_tree_2): Simplify building all external op
2158 (vect_slp_analyze_node_operations): Remove push/pop of
2159 STMT_VINFO_DEF_TYPE.
2160 (vect_schedule_slp_instance): Likewise.
2161 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
2162 stmt_info, use the vect_is_simple_use overload combining
2163 SLP and stmt_info analysis.
2164 (vect_is_simple_cond): Likewise.
2165 (vectorizable_store): Adjust.
2166 (vectorizable_condition): Likewise.
2167 (vect_is_simple_use): Fully handle invariant SLP nodes
2168 here. Amend stmt_info operand extraction with COND_EXPR
2170 * tree-vect-loop.c (vectorizable_reduction): Deal with
2171 COND_EXPR representation ugliness.
2173 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
2176 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
2177 Refine from *vcvtps2ph_store<mask_name>.
2178 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
2179 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
2180 (*vcvtps2ph256<merge_mask_name>): New define_insn.
2181 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
2182 * config/i386/subst.md (merge_mask): New define_subst.
2183 (merge_mask_name): New define_subst_attr.
2184 (merge_mask_operand3): Ditto.
2186 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
2188 PR tree-optimization/89430
2190 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
2191 remove ssa_name_ver, store, offset fields.
2192 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
2193 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
2194 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
2197 2020-06-04 Andreas Schwab <schwab@suse.de>
2200 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
2202 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
2204 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
2205 (trunc<mode><pmov_dst_3_lower>2): Refine from
2206 trunc<mode><pmov_dst_3>2.
2208 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
2210 * match.pd (tanh/sinh -> 1/cosh): New simplification.
2212 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
2215 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
2216 is_lfs_stfs_insn and make it recognize lfs as well.
2217 (prefixed_store_p): Use is_lfs_stfs_insn().
2218 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
2220 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
2222 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
2224 (odr_enums): New static var.
2225 (struct odr_enum_val): New struct.
2226 (class odr_enum): New struct.
2227 (odr_enum_map): New hashtable.
2228 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
2229 (add_type_duplicate): Likewise.
2230 (free_odr_warning_data): Do not free TYPE_VALUES.
2231 (register_odr_enum): New function.
2232 (ipa_odr_summary_write): New function.
2233 (ipa_odr_read_section): New function.
2234 (ipa_odr_summary_read): New function.
2235 (class pass_ipa_odr): New pass.
2236 (make_pass_ipa_odr): New function.
2237 * ipa-utils.h (register_odr_enum): Declare.
2238 * lto-section-in.c: (lto_section_name): Add odr_types section.
2239 * lto-streamer.h (enum lto_section_type): Add odr_types section.
2240 * passes.def: Add odr_types pass.
2241 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
2243 (hash_tree): Likewise.
2244 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
2246 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
2248 * timevar.def (TV_IPA_ODR): New timervar.
2249 * tree-pass.h (make_pass_ipa_odr): Declare.
2250 * tree.c (free_lang_data_in_type): Regiser ODR types.
2252 2020-06-03 Romain Naour <romain.naour@gmail.com>
2254 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
2257 2020-06-03 Richard Biener <rguenther@suse.de>
2259 PR tree-optimization/95487
2260 * tree-vect-stmts.c (vectorizable_store): Use a truth type
2261 for the scatter mask.
2263 2020-06-03 Richard Biener <rguenther@suse.de>
2265 PR tree-optimization/95495
2266 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
2267 SLP_TREE_REPRESENTATIVE in the shift assertion.
2269 2020-06-03 Tom Tromey <tromey@adacore.com>
2271 * spellcheck.c (CASE_COST): New define.
2272 (BASE_COST): New define.
2273 (get_edit_distance): Recognize case changes.
2274 (get_edit_distance_cutoff): Update.
2275 (test_edit_distances): Update.
2276 (get_old_cutoff): Update.
2277 (test_find_closest_string): Add case sensitivity test.
2279 2020-06-03 Richard Biener <rguenther@suse.de>
2281 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
2282 the cost vector to unset the visited flag on stmts.
2284 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
2286 * gimplify.c (omp_notice_variable): Use new hook.
2287 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
2288 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
2289 (LANG_HOOKS_DECLS): Add it.
2290 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
2291 (lhd_omp_predetermined_mapping): New.
2292 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
2294 2020-06-03 Jan Hubicka <jh@suse.cz>
2296 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
2297 add LTO_first_tree_tag and LTO_first_gimple_tag.
2298 (lto_tag_is_tree_code_p): Update.
2299 (lto_tag_is_gimple_code_p): Update.
2300 (lto_gimple_code_to_tag): Update.
2301 (lto_tag_to_gimple_code): Update.
2302 (lto_tree_code_to_tag): Update.
2303 (lto_tag_to_tree_code): Update.
2305 2020-06-02 Felix Yang <felix.yang@huawei.com>
2308 * config/aarch64/aarch64.c (aarch64_short_vector_p):
2309 Leave later code to report an error if SVE is disabled.
2311 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2313 * config/aarch64/aarch64-cores.def (zeus): Define.
2314 * config/aarch64/aarch64-tune.md: Regenerate.
2315 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
2317 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
2320 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
2322 (is_stfs_insn): New helper function.
2324 2020-06-02 Jan Hubicka <jh@suse.cz>
2326 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
2328 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
2330 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
2332 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
2333 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
2334 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
2336 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
2339 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
2340 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
2342 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2344 * config/s390/s390.c (print_operand): Emit vector alignment
2347 2020-06-02 Martin Liska <mliska@suse.cz>
2349 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
2350 as they have variable number of counters.
2351 * gcov-dump.c (main): Add new option -r.
2352 (print_usage): Likewise.
2353 (tag_counters): All new raw format.
2354 * gcov-io.h (struct gcov_kvp): New.
2355 (GCOV_TOPN_VALUES): Remove.
2356 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
2357 (GCOV_TOPN_MEM_COUNTERS): New.
2358 (GCOV_TOPN_DISK_COUNTERS): Likewise.
2359 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
2360 * ipa-profile.c (ipa_profile_generate_summary): Use
2361 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
2362 (ipa_profile_write_edge_summary): Likewise.
2363 (ipa_profile_read_edge_summary): Likewise.
2364 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
2365 * profile.c (sort_hist_values): Sort variable number
2367 (compute_value_histograms): Special case for TOP N counters
2368 that have dynamic number of key-value pairs.
2369 * value-prof.c (dump_histogram_value): Dump variable number
2371 (stream_in_histogram_value): Stream in variable number
2372 of key-value pairs for TOP N counter.
2373 (get_nth_most_common_value): Deal with variable number
2375 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
2377 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
2379 * doc/gcov-dump.texi: Document new -r option.
2381 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
2384 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
2386 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
2388 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
2389 returns (const_int 0) for the destination, then emit nothing.
2391 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
2393 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
2394 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
2395 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
2396 LTO_const_decl_ref, LTO_imported_decl_ref,
2397 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
2398 LTO_namelist_decl_ref; add LTO_global_stream_ref.
2399 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
2400 (lto_input_scc): Update.
2401 (lto_input_tree_1): Update.
2402 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
2403 * lto-streamer.c (lto_tag_name): Update.
2405 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
2407 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
2408 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
2409 * lto-cgraph.c (lto_output_node): Likewise.
2410 (lto_output_varpool_node): Likewise.
2411 (output_offload_tables): Likewise.
2412 (input_node): Likewise.
2413 (input_varpool_node): Likewise.
2414 (input_offload_tables): Likewise.
2415 * lto-streamer-in.c (lto_input_tree_ref): Declare.
2416 (lto_input_var_decl_ref): Declare.
2417 (lto_input_fn_decl_ref): Declare.
2418 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
2419 (lto_output_var_decl_index): Rename to ..
2420 (lto_output_var_decl_ref): ... this.
2421 (lto_output_fn_decl_index): Rename to ...
2422 (lto_output_fn_decl_ref): ... this.
2423 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
2424 (DEFINE_DECL_STREAM_FUNCS): Remove.
2425 (lto_output_var_decl_index): Remove.
2426 (lto_output_fn_decl_index): Remove.
2427 (lto_output_var_decl_ref): Declare.
2428 (lto_output_fn_decl_ref): Declare.
2429 (lto_input_var_decl_ref): Declare.
2430 (lto_input_fn_decl_ref): Declare.
2432 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
2434 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
2435 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
2436 dump infomation if there is no adjusted parameter.
2437 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
2439 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
2441 * Makefile.in (gimple-array-bounds.o): New.
2442 * tree-vrp.c: Move array bounds code...
2443 * gimple-array-bounds.cc: ...here...
2444 * gimple-array-bounds.h: ...and here.
2446 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
2448 * Makefile.in (OBJS): Add value-range-equiv.o.
2449 * tree-vrp.c (*value_range_equiv*): Move to...
2450 * value-range-equiv.cc: ...here.
2451 * tree-vrp.h (class value_range_equiv): Move to...
2452 * value-range-equiv.h: ...here.
2453 * vr-values.h: Include value-range-equiv.h.
2455 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
2458 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
2459 lattice for simple pass-through by-ref argument.
2461 2020-05-31 Jeff Law <law@redhat.com>
2463 * lra.c (add_auto_inc_notes): Remove function.
2464 * reload1.c (add_auto_inc_notes): Similarly. Move into...
2465 * rtlanal.c (add_auto_inc_notes): New function.
2466 * rtl.h (add_auto_inc_notes): Add prototype.
2467 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
2470 2020-05-31 Jan Hubicka <jh@suse.cz>
2472 * lto-section-out.c (lto_output_decl_index): Remove.
2473 (lto_output_field_decl_index): Move to lto-streamer-out.c
2474 (lto_output_fn_decl_index): Move to lto-streamer-out.c
2475 (lto_output_namespace_decl_index): Remove.
2476 (lto_output_var_decl_index): Remove.
2477 (lto_output_type_decl_index): Remove.
2478 (lto_output_type_ref_index): Remove.
2479 * lto-streamer-out.c (output_type_ref): Remove.
2480 (lto_get_index): New function.
2481 (lto_output_tree_ref): Remove.
2482 (lto_indexable_tree_ref): New function.
2483 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
2484 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
2485 (stream_write_tree_ref): Update.
2486 (lto_output_tree): Update.
2487 * lto-streamer.h (lto_output_decl_index): Remove prototype.
2488 (lto_output_field_decl_index): Remove prototype.
2489 (lto_output_namespace_decl_index): Remove prototype.
2490 (lto_output_type_decl_index): Remove prototype.
2491 (lto_output_type_ref_index): Remove prototype.
2492 (lto_output_var_decl_index): Move.
2493 (lto_output_fn_decl_index): Move
2495 2020-05-31 Jakub Jelinek <jakub@redhat.com>
2498 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
2501 2020-05-31 Jeff Law <law@redhat.com>
2503 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
2505 2020-05-31 Jim Wilson <jimw@sifive.com>
2507 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
2509 2020-05-30 Jonathan Yong <10walls@gmail.com>
2511 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
2512 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
2513 import library, but also contains some functions that invoke
2514 others in KERNEL32.DLL.
2516 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
2518 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
2519 (altivec_vmrglw_direct): Ditto.
2520 (altivec_vperm_<mode>_direct): Ditto.
2521 (altivec_vperm_v8hiv16qi): Ditto.
2522 (*altivec_vperm_<mode>_uns_internal): Ditto.
2523 (*altivec_vpermr_<mode>_internal): Ditto.
2524 (vperm_v8hiv4si): Ditto.
2525 (vperm_v16qiv8hi): Ditto.
2527 2020-05-29 Jan Hubicka <jh@suse.cz>
2529 * lto-streamer-in.c (streamer_read_chain): Move here from
2531 (stream_read_tree_ref): New.
2532 (lto_input_tree_1): Simplify.
2533 * lto-streamer-out.c (stream_write_tree_ref): New.
2534 (lto_write_tree_1): Simplify.
2535 (lto_output_tree_1): Simplify.
2536 (DFS::DFS_write_tree): Simplify.
2537 (streamer_write_chain): Move here from tree-stremaer-out.c.
2538 * lto-streamer.h (lto_output_tree_ref): Update prototype.
2539 (stream_read_tree_ref): Declare
2540 (stream_write_tree_ref): Declare
2541 * tree-streamer-in.c (streamer_read_chain): Update to use
2542 stream_read_tree_ref.
2543 (lto_input_ts_common_tree_pointers): Likewise.
2544 (lto_input_ts_vector_tree_pointers): Likewise.
2545 (lto_input_ts_poly_tree_pointers): Likewise.
2546 (lto_input_ts_complex_tree_pointers): Likewise.
2547 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
2548 (lto_input_ts_decl_common_tree_pointers): Likewise.
2549 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
2550 (lto_input_ts_field_decl_tree_pointers): Likewise.
2551 (lto_input_ts_function_decl_tree_pointers): Likewise.
2552 (lto_input_ts_type_common_tree_pointers): Likewise.
2553 (lto_input_ts_type_non_common_tree_pointers): Likewise.
2554 (lto_input_ts_list_tree_pointers): Likewise.
2555 (lto_input_ts_vec_tree_pointers): Likewise.
2556 (lto_input_ts_exp_tree_pointers): Likewise.
2557 (lto_input_ts_block_tree_pointers): Likewise.
2558 (lto_input_ts_binfo_tree_pointers): Likewise.
2559 (lto_input_ts_constructor_tree_pointers): Likewise.
2560 (lto_input_ts_omp_clause_tree_pointers): Likewise.
2561 * tree-streamer-out.c (streamer_write_chain): Update to use
2562 stream_write_tree_ref.
2563 (write_ts_common_tree_pointers): Likewise.
2564 (write_ts_vector_tree_pointers): Likewise.
2565 (write_ts_poly_tree_pointers): Likewise.
2566 (write_ts_complex_tree_pointers): Likewise.
2567 (write_ts_decl_minimal_tree_pointers): Likewise.
2568 (write_ts_decl_common_tree_pointers): Likewise.
2569 (write_ts_decl_non_common_tree_pointers): Likewise.
2570 (write_ts_decl_with_vis_tree_pointers): Likewise.
2571 (write_ts_field_decl_tree_pointers): Likewise.
2572 (write_ts_function_decl_tree_pointers): Likewise.
2573 (write_ts_type_common_tree_pointers): Likewise.
2574 (write_ts_type_non_common_tree_pointers): Likewise.
2575 (write_ts_list_tree_pointers): Likewise.
2576 (write_ts_vec_tree_pointers): Likewise.
2577 (write_ts_exp_tree_pointers): Likewise.
2578 (write_ts_block_tree_pointers): Likewise.
2579 (write_ts_binfo_tree_pointers): Likewise.
2580 (write_ts_constructor_tree_pointers): Likewise.
2581 (write_ts_omp_clause_tree_pointers): Likewise.
2582 (streamer_write_tree_body): Likewise.
2583 (streamer_write_integer_cst): Likewise.
2584 * tree-streamer.h (streamer_read_chain):Declare.
2585 (streamer_write_chain):Declare.
2586 (streamer_write_tree_body): Update prototype.
2587 (streamer_write_integer_cst): Update prototype.
2589 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
2592 * configure: Regenerated.
2594 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
2596 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
2597 (add<mode>3_vcc_zext_dup_exec): Likewise.
2598 (add<mode>3_vcc_zext_dup2): Likewise.
2599 (add<mode>3_vcc_zext_dup2_exec): Likewise.
2601 2020-05-29 Richard Biener <rguenther@suse.de>
2603 PR tree-optimization/95272
2604 * tree-vectorizer.h (_slp_tree::representative): Add.
2605 (SLP_TREE_REPRESENTATIVE): Likewise.
2606 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
2608 (vectorizable_live_operation): Use the representative to
2609 attach the reduction info to.
2610 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
2611 SLP_TREE_REPRESENTATIVE.
2612 (vect_create_new_slp_node): Likewise.
2613 (slp_copy_subtree): Copy it.
2614 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
2615 (vect_slp_analyze_node_operations_1): Pass the representative
2616 to vect_analyze_stmt.
2617 (vect_schedule_slp_instance): Pass the representative to
2618 vect_transform_stmt.
2620 2020-05-29 Richard Biener <rguenther@suse.de>
2622 PR tree-optimization/95356
2623 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
2624 node hacking during analysis.
2626 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
2629 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
2631 2020-05-29 Richard Biener <rguenther@suse.de>
2633 PR tree-optimization/95403
2634 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
2637 2020-05-29 Jakub Jelinek <jakub@redhat.com>
2640 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
2641 declare variant cgraph node removal callback.
2643 2020-05-29 Jakub Jelinek <jakub@redhat.com>
2646 * expr.c (store_expr): If expr_size is constant and significantly
2647 larger than TREE_STRING_LENGTH, set temp to just the
2648 TREE_STRING_LENGTH portion of the STRING_CST.
2650 2020-05-29 Richard Biener <rguenther@suse.de>
2652 PR tree-optimization/95393
2653 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
2654 to build the min/max expression so we simplify cases like
2655 MAX(0, s) immediately.
2657 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
2659 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
2660 for unpacked EOR, ORR, AND.
2662 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
2664 * Makefile.in: don't look for libiberty in the "pic" subdirectory
2665 when building for Mingw. Add dependency on xgcc with the proper
2668 2020-05-28 Jeff Law <law@redhat.com>
2670 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
2672 2020-05-28 Jeff Law <law@redhat.com>
2674 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
2675 make a nonzero adjustment to the memory offset.
2676 (b<ior,xor>hi_msx): Turn into a splitter.
2678 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
2680 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
2681 Fix off-by-one error.
2683 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
2685 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
2686 wb_candidate1 and wb_candidate2.
2687 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
2688 wb_candidate1 and wb_candidate2 if we decided not to use them.
2690 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
2693 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
2694 we have at least some CFI operations when using a frame pointer.
2695 Only redefine the CFA if we have CFI operations.
2697 2020-05-28 Richard Biener <rguenther@suse.de>
2699 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
2700 case for !SLP_TREE_VECTYPE.
2701 (vect_slp_analyze_node_operations): Adjust.
2703 2020-05-28 Richard Biener <rguenther@suse.de>
2705 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
2706 (SLP_TREE_VEC_DEFS): Likewise.
2707 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
2708 (_slp_tree::~_slp_tree): Likewise.
2709 (vect_mask_constant_operand_p): Remove unused function.
2710 (vect_get_constant_vectors): Rename to...
2711 (vect_create_constant_vectors): ... this. Take the
2712 invariant node as argument and code generate it. Remove
2713 dead code, remove temporary asserts. Pass a NULL stmt_info
2714 to vect_init_vector.
2715 (vect_get_slp_defs): Simplify.
2716 (vect_schedule_slp_instance): Code-generate externals and
2717 invariants using vect_create_constant_vectors.
2719 2020-05-28 Richard Biener <rguenther@suse.de>
2721 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
2722 Conditionalize stmt_info use, assert the new stmt cannot throw
2724 (vect_finish_stmt_generation): Adjust assert.
2726 2020-05-28 Richard Biener <rguenther@suse.de>
2728 PR tree-optimization/95273
2729 PR tree-optimization/95356
2730 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
2731 what we set the vector type of the shift operand SLP node
2734 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
2736 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
2739 2020-05-28 Martin Liska <mliska@suse.cz>
2742 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
2743 rename ipcp-unit-growth to ipa-cp-unit-growth.
2745 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
2747 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
2748 from *avx512vl_<code>v2div2qi_store and refine memory size of
2750 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
2751 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
2752 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
2753 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
2754 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
2755 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
2756 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
2757 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
2758 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
2759 (*avx512vl_<code>v2div2si2_store_1): Ditto.
2760 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
2761 (*avx512f_<code>v8div16qi2_store_1): Ditto.
2762 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
2763 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
2764 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
2765 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
2766 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
2767 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
2768 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
2769 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
2770 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
2771 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
2772 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
2773 (*avx512vl_<code>v2div2si2_store_2): Ditto.
2774 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
2775 (*avx512f_<code>v8div16qi2_store_2): Ditto.
2776 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
2777 * config/i386/i386-builtin-types.def: Adjust builtin type.
2778 * config/i386/i386-expand.c: Ditto.
2779 * config/i386/i386-builtin.def: Adjust builtin.
2780 * config/i386/avx512fintrin.h: Ditto.
2781 * config/i386/avx512vlbwintrin.h: Ditto.
2782 * config/i386/avx512vlintrin.h: Ditto.
2784 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
2786 PR gcov-profile/95332
2787 * gcov-io.c (gcov_var::endian): Move field.
2788 (from_file): Add IN_GCOV_TOOL check.
2789 * gcov-io.h (gcov_magic): Ditto.
2791 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
2793 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
2795 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
2797 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
2799 * builtin-types.def (BT_UINT128): New primitive type.
2800 (BT_FN_UINT128_UINT128): New function type.
2801 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
2802 * doc/extend.texi (__builtin_bswap128): Document it.
2803 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
2804 (is_inexpensive_builtin): Likewise.
2805 * fold-const-call.c (fold_const_call_ss): Likewise.
2806 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
2807 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
2808 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
2809 (vectorizable_call): Likewise.
2810 * optabs.c (expand_unop): Always use the double word path for it.
2811 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
2812 * tree.h (uint128_type_node): New global type.
2813 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
2815 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2817 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
2818 (mmx_hsubv2sf3): Ditto.
2819 (mmx_haddsubv2sf3): New expander.
2820 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
2821 RTL template to model horizontal subtraction and addition.
2822 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
2825 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2828 * config/i386/sse.md
2829 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
2830 Remove %q operand modifier from insn template.
2831 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
2833 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2835 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
2836 Enable insn pattern for TARGET_MMX_WITH_SSE.
2837 (*mmx_movshdup): New insn pattern.
2838 (*mmx_movsldup): Ditto.
2839 (*mmx_movss): Ditto.
2840 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
2842 (expand_vec_perm_movs): Handle E_V2SFmode.
2843 (expand_vec_perm_even_odd): Ditto.
2844 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
2845 is already handled by standard shuffle patterns.
2847 2020-05-27 Richard Biener <rguenther@suse.de>
2849 PR tree-optimization/95295
2850 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
2851 merging stores from paths.
2853 2020-05-27 Richard Biener <rguenther@suse.de>
2855 PR tree-optimization/95356
2856 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
2857 type for the shift operand.
2859 2020-05-27 Richard Biener <rguenther@suse.de>
2861 PR tree-optimization/95335
2862 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
2863 lvisited for nodes made external.
2865 2020-05-27 Richard Biener <rguenther@suse.de>
2867 * dump-context.h (debug_dump_context): New class.
2868 (dump_context): Make it friend.
2869 * dumpfile.c (debug_dump_context::debug_dump_context):
2871 (debug_dump_context::~debug_dump_context): Likewise.
2872 * tree-vect-slp.c: Include dump-context.h.
2873 (vect_print_slp_tree): Dump a single SLP node.
2874 (debug): New overload for slp_tree.
2875 (vect_print_slp_graph): Rename from vect_print_slp_tree and
2877 (vect_analyze_slp_instance): Adjust.
2879 2020-05-27 Jakub Jelinek <jakub@redhat.com>
2882 * omp-general.c (omp_declare_variant_remove_hook): New function.
2883 (omp_resolve_declare_variant): Always return base if it is already
2884 declare_variant_alt magic decl itself. Register
2885 omp_declare_variant_remove_hook as cgraph node removal hook.
2887 2020-05-27 Jeff Law <law@redhat.com>
2889 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
2890 for the primary input operand.
2891 (tstsi_variable_bit_qi): Similarly.
2893 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
2895 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
2897 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
2900 * ipa-utils.h (odr_type_p): Also permit calls with
2901 only flag_generate_offload set.
2903 2020-05-26 Alexandre Oliva <oliva@adacore.com>
2905 * gcc.c (validate_switches): Add braced parameter. Adjust all
2906 callers. Expected and skip trailing brace only if braced.
2907 Return after handling one atom otherwise.
2908 (DUMPS_OPTIONS): New.
2909 (cpp_debug_options): Define in terms of it.
2911 2020-05-26 Richard Biener <rguenther@suse.de>
2913 PR tree-optimization/95327
2914 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
2915 when we are not using a scalar shift.
2917 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
2919 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
2920 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
2921 Handle E_V2SImode and E_V4HImode.
2922 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
2923 Assert that E_V2SImode is already handled.
2924 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
2925 is already handled by standard shuffle patterns.
2927 2020-05-26 Jan Hubicka <jh@suse.cz>
2929 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
2932 2020-05-26 Jakub Jelinek <jakub@redhat.com>
2935 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
2936 * omp-general.h (find_combined_omp_for): Declare.
2937 * omp-general.c: Include tree-iterator.h.
2938 (find_combined_omp_for): New function, moved from gimplify.c.
2940 2020-05-26 Alexandre Oliva <oliva@adacore.com>
2942 * common.opt (aux_base_name): Define.
2943 (dumpbase, dumpdir): Mark as Driver options.
2944 (-dumpbase, -dumpdir): Likewise.
2945 (dumpbase-ext, -dumpbase-ext): New.
2946 (auxbase, auxbase-strip): Drop.
2947 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
2949 (-o): Introduce the notion of primary output, mention it
2950 influences auxiliary and dump output names as well, add
2952 (-save-temps): Adjust, move examples into -dump*.
2953 (-save-temps=cwd, -save-temps=obj): Likewise.
2954 (-fdump-final-insns): Adjust.
2955 * dwarf2out.c (gen_producer_string): Drop auxbase and
2956 auxbase_strip; add dumpbase_ext.
2957 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
2958 (save_temps_prefix, save_temps_length): Drop.
2959 (save_temps_overrides_dumpdir): New.
2960 (dumpdir, dumpbase, dumpbase_ext): New.
2961 (dumpdir_length, dumpdir_trailing_dash_added): New.
2962 (outbase, outbase_length): New.
2963 (The Specs Language): Introduce %". Adjust %b and %B.
2964 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
2965 Precede object file with %w when it's the primary output.
2966 (cpp_debug_options): Do not pass on incoming -dumpdir,
2967 -dumpbase and -dumpbase-ext options; recompute them with
2969 (cc1_options): Drop auxbase with and without compare-debug;
2970 use cpp_debug_options instead of dumpbase. Mark asm output
2971 with %w when it's the primary output.
2972 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
2973 %:replace-exception. Add %:dumps.
2974 (driver_handle_option): Implement -save-temps=*/-dumpdir
2975 mutual overriding logic. Save dumpdir, dumpbase and
2976 dumpbase-ext options. Do not save output_file in
2978 (adds_single_suffix_p): New.
2979 (single_input_file_index): New.
2980 (process_command): Combine output dir, output base name, and
2981 dumpbase into dumpdir and outbase.
2982 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
2983 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
2984 and outbase instead of input_basename in %b, %B and in
2985 -save-temps aux files. Handle empty argument %".
2986 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
2987 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
2988 naming. Spec-quote the computed -fdump-final-insns file name.
2989 (debug_auxbase_opt): Drop.
2990 (compare_debug_self_opt_spec_function): Drop auxbase-strip
2992 (compare_debug_auxbase_opt_spec_function): Drop.
2993 (not_actual_file_p): New.
2994 (replace_extension_spec_func): Drop.
2995 (dumps_spec_func): New.
2996 (convert_white_space): Split-out parts into...
2997 (quote_string, whitespace_to_convert_p): ... these. New.
2998 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
2999 (driver::finalize): Release and reset new variables; drop
3001 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
3002 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
3003 empty string otherwise.
3004 (DUMPBASE_SUFFIX): Drop leading period.
3005 (debug_objcopy): Use concat.
3006 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
3007 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
3008 component. Simplify temp file names.
3009 * opts.c (finish_options): Drop aux base name handling.
3010 (common_handle_option): Drop auxbase-strip handling.
3011 * toplev.c (print_switch_values): Drop auxbase, add
3013 (process_options): Derive aux_base_name from dump_base_name
3015 (lang_dependent_init): Compute dump_base_ext along with
3016 dump_base_name. Disable stack usage and callgraph-info during
3017 lto generation and compare-debug recompilation.
3019 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
3020 Uroš Bizjak <ubizjak@gmail.com>
3024 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
3025 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
3026 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
3027 float<floatunssuffix>v2div2sf2.
3028 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
3029 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
3030 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
3031 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3032 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
3033 * config/i386/i386-builtin.def: Ditto.
3034 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
3035 subregs when both omode and imode are vector mode and
3036 have the same inner mode.
3038 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
3040 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
3041 Only turn MEM_REFs into bit-field stores for small bit-field regions.
3042 (imm_store_chain_info::output_merged_store): Be prepared for sources
3043 with non-integral type in the bit-field insertion case.
3044 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
3045 the largest size for the bit-field case.
3047 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
3049 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
3050 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
3051 (*vec_dupv4hi): Redefine as define_insn.
3052 Remove alternative with general register input.
3053 (*vec_dupv2si): Ditto.
3055 2020-05-25 Richard Biener <rguenther@suse.de>
3057 PR tree-optimization/95309
3058 * tree-vect-slp.c (vect_get_constant_vectors): Move number
3059 of vector computation ...
3060 (vect_slp_analyze_node_operations): ... to analysis phase.
3062 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
3064 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
3065 * lto-streamer.h (streamer_debugging): New constant
3066 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
3067 streamer_debugging check.
3068 (streamer_get_pickled_tree): Likewise.
3069 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
3071 2020-05-25 Richard Biener <rguenther@suse.de>
3073 PR tree-optimization/95308
3074 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
3075 test for TARGET_MEM_REFs.
3077 2020-05-25 Richard Biener <rguenther@suse.de>
3079 PR tree-optimization/95295
3080 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
3081 RHSes and drop to full sm_other if they are not equal.
3083 2020-05-25 Richard Biener <rguenther@suse.de>
3085 PR tree-optimization/95271
3086 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
3087 children vector type.
3088 (vectorizable_call): Pass down slp ops.
3090 2020-05-25 Richard Biener <rguenther@suse.de>
3092 PR tree-optimization/95297
3093 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
3094 skip updating operand 1 vector type.
3096 2020-05-25 Richard Biener <rguenther@suse.de>
3098 PR tree-optimization/95284
3099 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
3102 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
3105 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
3106 (trunc<mode><sf2dfmode_lower>2) New expander.
3107 (extend<sf2dfmode_lower><mode>2): Ditto.
3109 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
3111 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
3112 ubsan_{data,type},ASAN symbols linker-visible.
3114 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3116 * lto-streamer-out.c (DFS::DFS): Silence warning.
3118 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
3121 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
3122 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
3124 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3126 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
3129 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3131 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
3132 * lto-streamer-out.c (create_output_block): Fix whitespace
3133 (lto_write_tree_1): Add (debug) dump.
3134 (DFS::DFS): Add dump.
3135 (DFS::DFS_write_tree_body): Do not dump here.
3136 (lto_output_tree): Improve dumping; do not stream ref when not needed.
3137 (produce_asm_for_decls): Fix whitespace.
3138 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
3139 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
3141 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
3144 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
3145 (truncv32hiv32qi2): Ditto.
3146 (trunc<ssedoublemodelower><mode>2): Ditto.
3147 (trunc<mode><pmov_dst_3>2): Ditto.
3148 (trunc<mode><pmov_dst_mode_4>2): Ditto.
3149 (truncv2div2si2): Ditto.
3150 (truncv8div8qi2): Ditto.
3151 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
3152 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
3153 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
3154 *avx512vl_<code><mode>v<ssescalarnum>qi2.
3156 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
3159 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3162 2020-05-22 Richard Biener <rguenther@suse.de>
3164 PR tree-optimization/95268
3165 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
3168 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3170 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
3173 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3175 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
3176 (lto_input_scc): Optimize streaming of entry lengths.
3177 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
3178 (DFS::DFS): Optimize stremaing of entry lengths
3180 2020-05-22 Richard Biener <rguenther@suse.de>
3183 * doc/invoke.texi (flto): Document behavior of diagnostic
3186 2020-05-22 Richard Biener <rguenther@suse.de>
3188 * tree-vectorizer.h (vect_is_simple_use): New overload.
3189 (vect_maybe_update_slp_op_vectype): New.
3190 * tree-vect-stmts.c (vect_is_simple_use): New overload
3191 accessing operands of SLP vs. non-SLP operation transparently.
3192 (vect_maybe_update_slp_op_vectype): New function updating
3193 the possibly shared SLP operands vector type.
3194 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
3195 using the new vect_is_simple_use overload; update SLP invariant
3196 operand nodes vector type.
3197 (vectorizable_comparison): Likewise.
3198 (vectorizable_call): Likewise.
3199 (vectorizable_conversion): Likewise.
3200 (vectorizable_shift): Likewise.
3201 (vectorizable_store): Likewise.
3202 (vectorizable_condition): Likewise.
3203 (vectorizable_assignment): Likewise.
3204 * tree-vect-loop.c (vectorizable_reduction): Likewise.
3205 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
3206 present SLP_TREE_VECTYPE and check it matches previous
3209 2020-05-22 Richard Biener <rguenther@suse.de>
3211 PR tree-optimization/95248
3212 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
3214 2020-05-22 Richard Biener <rguenther@suse.de>
3216 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
3217 (_slp_tree::~_slp_tree): Likewise.
3218 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
3220 (_slp_tree::~_slp_tree): Implement.
3221 (vect_free_slp_tree): Simplify.
3222 (vect_create_new_slp_node): Likewise. Add nops parameter.
3223 (vect_build_slp_tree_2): Adjust.
3224 (vect_analyze_slp_instance): Likewise.
3226 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3228 * adjust-alignment.c: Include memmodel.h.
3230 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
3233 * config/i386/cpuid.h: Use hexadecimal in comments.
3235 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
3238 * config/i386/i386-builtins.c (processor_features): Move
3239 F_AVX512VP2INTERSECT after F_AVX512BF16.
3240 (isa_names_table): Likewise.
3242 2020-05-21 Martin Liska <mliska@suse.cz>
3244 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
3245 Handle OPT_moutline_atomics.
3246 * config/aarch64/aarch64.c: Add outline-atomics to
3248 * doc/extend.texi: Document the newly added target attribute.
3250 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
3254 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
3255 operands 1 and 2 commutative. Manually swap operands.
3256 (*mmx_nabsv2sf2): Ditto.
3259 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
3261 * config/i386/i386.md (*<code>tf2_1):
3262 Mark operands 1 and 2 commutative.
3263 (*nabstf2_1): Ditto.
3264 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
3265 commutative. Do not swap operands.
3266 (*nabs<mode>2): Ditto.
3268 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
3271 * config/i386/sse.md (<code>v8qiv8hi2): Use
3272 simplify_gen_subreg instead of simplify_subreg.
3273 (<code>v8qiv8si2): Ditto.
3274 (<code>v4qiv4si2): Ditto.
3275 (<code>v4hiv4si2): Ditto.
3276 (<code>v8qiv8di2): Ditto.
3277 (<code>v4qiv4di2): Ditto.
3278 (<code>v2qiv2di2): Ditto.
3279 (<code>v4hiv4di2): Ditto.
3280 (<code>v2hiv2di2): Ditto.
3281 (<code>v2siv2di2): Ditto.
3283 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
3286 * config/i386/i386.md (*pushsi2_rex64):
3287 Use "e" constraint instead of "i".
3289 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
3291 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
3292 (lto_input_tree_1): Strenghten sanity check.
3293 (lto_input_tree): Update call of lto_input_scc.
3294 * lto-streamer-out.c: Include ipa-utils.h
3295 (create_output_block): Initialize local_trees if merigng is going
3297 (destroy_output_block): Destroy local_trees.
3298 (DFS): Add max_local_entry.
3299 (local_tree_p): New function.
3300 (DFS::DFS): Initialize and maintain it.
3301 (DFS::DFS_write_tree): Decide on streaming format.
3302 (lto_output_tree): Stream inline singleton SCCs
3303 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
3304 (struct output_block): Add local_trees.
3305 (lto_input_scc): Update prototype.
3307 2020-05-20 Patrick Palka <ppalka@redhat.com>
3310 * hash-table.h (hash_table::find_with_hash): Move up the call to
3313 2020-05-20 Martin Liska <mliska@suse.cz>
3315 * lto-compress.c (lto_compression_zstd): Fill up
3316 num_compressed_il_bytes.
3317 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
3319 2020-05-20 Richard Biener <rguenther@suse.de>
3321 PR tree-optimization/95219
3322 * tree-vect-loop.c (vectorizable_induction): Reduce
3323 group_size before computing the number of required IVs.
3325 2020-05-20 Richard Biener <rguenther@suse.de>
3328 * tree-inline.c (remap_gimple_stmt): Revert adjusting
3329 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
3331 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3332 Andre Vieira <andre.simoesdiasvieira@arm.com>
3335 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
3337 (mve_vector_mem_operand): Likewise.
3338 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
3339 the load from memory to a core register is legitimate for give mode.
3340 (mve_vector_mem_operand): Define function.
3341 (arm_print_operand): Modify comment.
3342 (arm_mode_base_reg_class): Define.
3343 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
3344 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
3345 * config/arm/constraints.md (Ux): Likewise.
3347 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
3348 add support for missing Vector Store Register and Vector Load Register.
3349 Add a new alternative to support load from memory to PC (or label) in
3351 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
3352 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
3353 mve_memory_operand and also modify the MVE instructions to emit.
3354 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
3355 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
3356 mve_memory_operand and also modify the MVE instructions to emit.
3357 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
3358 mve_memory_operand and also modify the MVE instructions to emit.
3359 (mve_vldrhq_z_fv8hf): Likewise.
3360 (mve_vldrhq_z_<supf><mode>): Likewise.
3361 (mve_vldrwq_fv4sf): Likewise.
3362 (mve_vldrwq_<supf>v4si): Likewise.
3363 (mve_vldrwq_z_fv4sf): Likewise.
3364 (mve_vldrwq_z_<supf>v4si): Likewise.
3365 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
3366 (mve_vld1q_<supf><mode>): Likewise.
3367 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
3369 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
3370 mve_memory_operand and also modify the MVE instructions to emit.
3371 (mve_vstrhq_p_<supf><mode>): Likewise.
3372 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
3374 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
3375 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
3376 instructions to emit.
3377 (mve_vstrwq_p_<supf>v4si): Likewise.
3378 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
3379 * config/arm/predicates.md (mve_memory_operand): Define.
3381 2020-05-30 Richard Biener <rguenther@suse.de>
3384 * c-fold.c (c_fully_fold_internal): Enhance guard on
3387 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
3390 * Makefile.in (OBJS): Add adjust-alignment.o.
3391 * adjust-alignment.c (pass_data_adjust_alignment): New.
3392 (pass_adjust_alignment): New.
3393 (pass_adjust_alignment::execute): New.
3394 (make_pass_adjust_alignment): New.
3395 * tree-pass.h (make_pass_adjust_alignment): New.
3396 * passes.def: Add pass_adjust_alignment.
3398 2020-05-19 Alex Coplan <alex.coplan@arm.com>
3401 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
3402 identity permutation.
3404 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3406 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
3407 msp430_small, msp430_large and size24plus DejaGNU effective
3409 Improve grammar in descriptions for size20plus and size32plus effective
3412 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
3414 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
3415 callee saved registers only in xBPF.
3416 (bpf_expand_prologue): Save callee saved registers only in xBPF.
3417 (bpf_expand_epilogue): Likewise for restoring.
3418 * doc/invoke.texi (eBPF Options): Document this is activated by
3421 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
3423 * config/bpf/bpf.opt (mxbpf): New option.
3424 * doc/invoke.texi (Option Summary): Add -mxbpf.
3425 (eBPF Options): Document -mxbbpf.
3427 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
3430 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
3431 (<code>v32qiv32hi2): Ditto.
3432 (<code>v8qiv8hi2): Ditto.
3433 (<code>v16qiv16si2): Ditto.
3434 (<code>v8qiv8si2): Ditto.
3435 (<code>v4qiv4si2): Ditto.
3436 (<code>v16hiv16si2): Ditto.
3437 (<code>v8hiv8si2): Ditto.
3438 (<code>v4hiv4si2): Ditto.
3439 (<code>v8qiv8di2): Ditto.
3440 (<code>v4qiv4di2): Ditto.
3441 (<code>v2qiv2di2): Ditto.
3442 (<code>v8hiv8di2): Ditto.
3443 (<code>v4hiv4di2): Ditto.
3444 (<code>v2hiv2di2): Ditto.
3445 (<code>v8siv8di2): Ditto.
3446 (<code>v4siv4di2): Ditto.
3447 (<code>v2siv2di2): Ditto.
3449 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
3451 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
3452 (riscv_implied_info): New.
3453 (riscv_subset_list): Add handle_implied_ext.
3454 (riscv_subset_list::to_string): New parameter version_p to
3455 control output format.
3456 (riscv_subset_list::handle_implied_ext): New.
3457 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
3458 (riscv_arch_str): New parameter version_p to control output format.
3459 (riscv_expand_arch): New.
3460 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
3462 * config/riscv/riscv.h (riscv_expand_arch): New,
3463 (EXTRA_SPEC_FUNCTIONS): Define.
3464 (ASM_SPEC): Transform -march= via riscv_expand_arch.
3466 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
3468 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
3469 parse_multiletter_ext.
3470 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
3471 adjust parsing order for 's' and 'x'.
3473 2020-05-19 Richard Biener <rguenther@suse.de>
3475 * tree-vectorizer.h (_slp_tree::vectype): Add field.
3476 (SLP_TREE_VECTYPE): New.
3477 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
3479 (vect_create_new_slp_node): Likewise.
3480 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
3482 (vect_slp_analyze_node_operations): Walk nodes children for
3484 (vect_get_constant_vectors): Use local scope op variable.
3485 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
3486 (vect_model_simple_cost): Adjust.
3487 (vect_model_store_cost): Likewise.
3488 (vectorizable_store): Likewise.
3490 2020-05-18 Martin Sebor <msebor@redhat.com>
3493 * tree-object-size.c (decl_init_size): New function.
3494 (addr_object_size): Call it.
3495 * tree.h (last_field): Declare.
3496 (first_field): Add attribute nonnull.
3498 2020-05-18 Martin Sebor <msebor@redhat.com>
3501 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
3502 * tree.c (component_ref_size): Correct the handling or array members
3504 Drop a pointless test.
3505 Rename a local variable.
3507 2020-05-18 Jason Merrill <jason@redhat.com>
3509 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
3510 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
3512 2020-05-14 Jason Merrill <jason@redhat.com>
3514 * doc/install.texi (Prerequisites): Update boostrap compiler
3515 requirement to C++11/GCC 4.8.
3517 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3519 PR tree-optimization/94952
3520 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
3521 Initialize variables bitpos, bitregion_start, and bitregion_end in
3522 order to silence warnings about use of uninitialized variables.
3524 2020-05-18 Carl Love <cel@us.ibm.com>
3527 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
3528 first_match_index_<mode>.
3529 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
3530 additional test cases with zero vector elements.
3532 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
3535 * config/i386/i386-expand.c (ix86_expand_int_movcc):
3536 Avoid reversing a non-trapping comparison to a trapping one.
3538 2020-05-18 Alex Coplan <alex.coplan@arm.com>
3540 * config/arm/arm.c (output_move_double): Fix codegen when loading into
3541 a register pair with an odd base register.
3543 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
3545 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
3546 Do not emit FLAGS_REG clobber for TFmode.
3547 * config/i386/i386.md (*<code>tf2_1): Rewrite as
3548 define_insn_and_split. Mark operands 1 and 2 commutative.
3549 (*nabstf2_1): Ditto.
3550 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
3551 Do not swap memory operands. Simplify RTX generation.
3552 (neg abs SSE splitter): Ditto.
3553 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
3554 commutative. Do not swap operands. Simplify RTX generation.
3555 (*nabs<mode>2): Ditto.
3557 2020-05-18 Richard Biener <rguenther@suse.de>
3559 * tree-vect-slp.c (vect_slp_bb): Start after labels.
3560 (vect_get_constant_vectors): Really place init stmt after scalar defs.
3561 * tree-vect-stmts.c (vect_init_vector_1): Insert before
3564 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
3566 * config/i386/driver-i386.c (host_detect_local_cpu): Support
3567 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
3570 2020-05-18 Richard Biener <rguenther@suse.de>
3573 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
3574 when inlining into a non-call EH function.
3576 2020-05-18 Richard Biener <rguenther@suse.de>
3578 PR tree-optimization/95172
3579 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
3580 eventually need the conditional processing.
3581 (execute_sm_exit): When processing an orderd sequence
3582 avoid doing any conditional processing.
3583 (hoist_memory_references): Pass down whether all edges
3584 have ordered processing for a ref to execute_sm.
3586 2020-05-17 Jeff Law <law@redhat.com>
3588 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
3589 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
3590 into a single pattern using pc_or_label_operand.
3591 * config/h8300/combiner.md (bit branch patterns): Likewise.
3592 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
3594 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
3597 * config/i386/i386-features.c (has_non_address_hard_reg):
3599 (pseudo_reg_set): This. Return the SET expression. Ignore
3600 pseudo register push.
3601 (general_scalar_to_vector_candidate_p): Combine single_set and
3602 has_non_address_hard_reg calls to pseudo_reg_set.
3603 (timode_scalar_to_vector_candidate_p): Likewise.
3604 * config/i386/i386.md (*pushv1ti2): New pattern.
3606 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3609 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3611 * tree-vrp.c (operand_less_p): Move to...
3612 * vr-values.c (operand_less_p): ...here.
3613 * tree-vrp.h (operand_less_p): Remove.
3615 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3617 * tree-vrp.c (operand_less_p): Move to...
3618 * vr-values.c (operand_less_p): ...here.
3619 * tree-vrp.h (operand_less_p): Remove.
3621 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3623 * tree-vrp.c (class vrp_insert): Remove prototype for
3626 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3628 * tree-vrp.c (class live_names): New.
3629 (live_on_edge): Move into live_names.
3630 (build_assert_expr_for): Move into vrp_insert.
3631 (find_assert_locations_in_bb): Rename from
3632 find_assert_locations_1.
3633 (process_assert_insertions_for): Move into vrp_insert.
3634 (compare_assert_loc): Same.
3635 (remove_range_assertions): Same.
3636 (dump_asserts_for): Rename to vrp_insert::dump.
3637 (debug_asserts_for): Rename to vrp_insert::debug.
3638 (dump_all_asserts): Rename to vrp_insert::dump.
3639 (debug_all_asserts): Rename to vrp_insert::debug.
3641 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3643 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
3644 check_array_ref, check_mem_ref, and search_for_addr_array
3646 (class array_bounds_checker): ...here.
3647 (class check_array_bounds_dom_walker): Adjust to use
3648 array_bounds_checker.
3649 (check_all_array_refs): Move into array_bounds_checker and rename
3651 (class vrp_folder): Make fold_predicate_in private.
3653 2020-05-15 Jeff Law <law@redhat.com>
3655 * config/h8300/h8300.md (SFI iterator): New iterator for
3657 * config/h8300/peepholes.md (memory comparison): Use mode
3658 iterator to consolidate 3 patterns into one.
3659 (stack allocation and stack store): Handle SFmode. Handle
3662 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
3664 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
3665 RS6000_BTM_POWERPC64.
3667 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
3669 * config/i386/i386.md (SWI48DWI): New mode iterator.
3670 (*push<mode>2): Allow XMM registers.
3671 (*pushdi2_rex64): Ditto.
3672 (*pushsi2_rex64): Ditto.
3674 (push XMM reg splitter): New splitter
3676 (*pushdf) Change "x" operand constraint to "v".
3677 (*pushsf_rex64): Ditto.
3680 2020-05-15 Richard Biener <rguenther@suse.de>
3682 PR tree-optimization/92260
3683 * tree-vect-slp.c (vect_get_constant_vectors): Compute
3684 the number of vector stmts in a canonical way.
3686 2020-05-15 Martin Liska <mliska@suse.cz>
3688 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
3691 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
3693 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
3695 2020-05-15 Richard Biener <rguenther@suse.de>
3697 PR tree-optimization/95133
3698 * gimple-ssa-split-paths.c
3699 (find_block_to_duplicate_for_splitting_paths): Check for
3702 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
3704 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
3706 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
3708 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
3711 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
3712 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
3715 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
3718 * config/i386/i386.md (isa): Add sse3_noavx.
3719 (enabled): Handle sse3_noavx.
3721 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
3722 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
3723 alternatives. Match commutative vec_select selector operands.
3724 (*mmx_haddv2sf3_low): New insn pattern.
3726 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
3727 (*mmx_hsubv2sf3_low): New insn pattern.
3729 2020-05-15 Richard Biener <rguenther@suse.de>
3731 PR tree-optimization/33315
3732 * tree-ssa-sink.c: Include tree-eh.h.
3733 (sink_stats): Add commoned member.
3734 (sink_common_stores_to_bb): New function implementing store
3735 commoning by sinking to the successor.
3736 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
3737 (pass_sink_code::execute): Likewise. Record commoned stores
3740 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
3742 PR rtl-optimization/37451, part of PR target/61837
3743 * loop-doloop.c (doloop_simplify_count): New function. Simplify
3744 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
3745 (doloop_modify): Call doloop_simplify_count.
3747 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
3750 * doc/sourcebuild.texi: Document effective target lgccjit.
3752 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
3754 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
3755 define_expand, and rename the original to ...
3756 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
3757 (add<mode>3_zext_dup_exec): Likewise, with ...
3758 (add<mode>3_vcc_zext_dup_exec): ... this.
3759 (add<mode>3_zext_dup2): Likewise, with ...
3760 (add<mode>3_zext_dup_exec): ... this.
3761 (add<mode>3_zext_dup2_exec): Likewise, with ...
3762 (add<mode>3_zext_dup2): ... this.
3763 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
3764 addv64di3_zext* calls to use addv64di3_vcc_zext*.
3766 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3769 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
3770 (extendv2sfv2df2): Ditto.
3772 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
3774 * configure: Regenerated.
3776 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
3778 * config/arm/arm.c (reg_needs_saving_p): New function.
3779 (use_return_insn): Use reg_needs_saving_p.
3780 (arm_get_vfp_saved_size): Likewise.
3781 (arm_compute_frame_layout): Likewise.
3782 (arm_save_coproc_regs): Likewise.
3783 (thumb1_expand_epilogue): Likewise.
3784 (arm_expand_epilogue_apcs_frame): Likewise.
3785 (arm_expand_epilogue): Likewise.
3787 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
3789 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
3791 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3794 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
3796 (floatv2siv2df2): New expander.
3797 (floatunsv2siv2df2): New insn pattern.
3799 (fix_truncv2dfv2si2): New expander.
3800 (fixuns_truncv2dfv2si2): New insn pattern.
3802 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
3805 * config/aarch64/aarch64-sve-builtins.cc
3806 (handle_arm_sve_vector_bits_attribute): Create a copy of the
3807 original type's TYPE_MAIN_VARIANT, then reapply all the differences
3808 between the original type and its main variant.
3810 2020-05-14 Richard Biener <rguenther@suse.de>
3813 * real.c (real_to_decimal_for_mode): Make sure we handle
3814 a zero with nonzero exponent.
3816 2020-05-14 Jakub Jelinek <jakub@redhat.com>
3818 * Makefile.in (GTFILES): Add omp-general.c.
3819 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
3820 calls_declare_variant_alt members and initialize them in the
3822 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
3823 calls to declare_variant_alt nodes.
3824 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
3825 and calls_declare_variant_alt.
3826 (input_overwrite_node): Read them back.
3827 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
3829 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
3831 (tree_function_versioning): Copy calls_declare_variant_alt bit.
3832 * omp-offload.c (execute_omp_device_lower): Call
3833 omp_resolve_declare_variant on direct function calls.
3834 (pass_omp_device_lower::gate): Also enable for
3835 calls_declare_variant_alt functions.
3836 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
3837 (omp_context_selector_matches): Handle the case when
3838 cfun->curr_properties has PROP_gimple_any bit set.
3839 (struct omp_declare_variant_entry): New type.
3840 (struct omp_declare_variant_base_entry): New type.
3841 (struct omp_declare_variant_hasher): New type.
3842 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
3844 (omp_declare_variants): New variable.
3845 (struct omp_declare_variant_alt_hasher): New type.
3846 (omp_declare_variant_alt_hasher::hash,
3847 omp_declare_variant_alt_hasher::equal): New methods.
3848 (omp_declare_variant_alt): New variables.
3849 (omp_resolve_late_declare_variant): New function.
3850 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
3851 when called late. Create a magic declare_variant_alt fndecl and
3852 cgraph node and return that if decision needs to be deferred until
3853 after gimplification.
3854 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
3858 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
3859 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
3860 entry block if info->after_stmt is NULL, otherwise add after that stmt
3861 and update it after adding each stmt.
3862 (ipa_simd_modify_function_body): Initialize info.after_stmt.
3864 * function.h (struct function): Add has_omp_target bit.
3865 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
3867 (omp_discover_declare_target_tgt_fn_r): ... this.
3868 (omp_discover_declare_target_var_r): Call
3869 omp_discover_declare_target_tgt_fn_r instead of
3870 omp_discover_declare_target_fn_r.
3871 (omp_discover_implicit_declare_target): Also queue functions with
3872 has_omp_target bit set, for those walk with
3873 omp_discover_declare_target_fn_r, for declare target to functions
3874 walk with omp_discover_declare_target_tgt_fn_r.
3876 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3879 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
3880 Add SSE/AVX alternative. Change operand predicates from
3881 nonimmediate_operand to register_mmxmem_operand.
3882 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3883 (fix_truncv2sfv2si2): New expander.
3884 (fixuns_truncv2sfv2si2): New insn pattern.
3886 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
3887 Add SSE/AVX alternative. Change operand predicates from
3888 nonimmediate_operand to register_mmxmem_operand.
3889 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3890 (floatv2siv2sf2): New expander.
3891 (floatunsv2siv2sf2): New insn pattern.
3893 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
3895 (IX86_BUILTIN_PI2FD): Ditto.
3897 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3899 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
3901 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
3904 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3906 * config/s390/s390.c (allocate_stack_space): Add missing updates
3907 of last_probe_offset.
3909 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3911 * config/s390/s390.md ("allocate_stack"): Call
3912 anti_adjust_stack_and_probe_stack_clash when stack clash
3913 protection is enabled.
3914 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
3915 prototype. Remove static.
3916 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
3919 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
3921 * config/rs6000/altivec.h (vec_extractl): New #define.
3922 (vec_extracth): Likewise.
3923 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
3924 (UNSPEC_EXTRACTR): Likewise.
3925 (vextractl<mode>): New expansion.
3926 (vextractl<mode>_internal): New insn.
3927 (vextractr<mode>): New expansion.
3928 (vextractr<mode>_internal): New insn.
3929 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
3930 New built-in function.
3931 (__builtin_altivec_vextduhvlx): Likewise.
3932 (__builtin_altivec_vextduwvlx): Likewise.
3933 (__builtin_altivec_vextddvlx): Likewise.
3934 (__builtin_altivec_vextdubvhx): Likewise.
3935 (__builtin_altivec_vextduhvhx): Likewise.
3936 (__builtin_altivec_vextduwvhx): Likewise.
3937 (__builtin_altivec_vextddvhx): Likewise.
3938 (__builtin_vec_extractl): New overloaded built-in function.
3939 (__builtin_vec_extracth): Likewise.
3940 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3941 Define overloaded forms of __builtin_vec_extractl and
3942 __builtin_vec_extracth.
3943 (builtin_function_type): Add cases to mark arguments of new
3944 built-in functions as unsigned.
3945 (rs6000_common_init_builtins): Add
3946 opaque_ftype_opaque_opaque_opaque_opaque.
3947 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
3948 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3949 for a Future Architecture): Add description of vec_extractl and
3950 vec_extractr built-in functions.
3952 2020-05-13 Richard Biener <rguenther@suse.de>
3954 * target.def (add_stmt_cost): Add new vectype parameter.
3955 * targhooks.c (default_add_stmt_cost): Adjust.
3956 * targhooks.h (default_add_stmt_cost): Likewise.
3957 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
3959 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
3960 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
3961 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
3963 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
3964 (dump_stmt_cost): Add new vectype parameter.
3965 (add_stmt_cost): Likewise.
3966 (record_stmt_cost): Likewise.
3967 (record_stmt_cost): Add overload with old signature.
3968 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
3970 (vect_get_known_peeling_cost): Likewise.
3971 (vect_estimate_min_profitable_iters): Likewise.
3972 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
3973 * tree-vect-stmts.c (record_stmt_cost): Likewise.
3974 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
3975 and pass down correct vectype and NULL stmt_info.
3976 (vect_model_simple_cost): Adjust.
3977 (vect_model_store_cost): Likewise.
3979 2020-05-13 Richard Biener <rguenther@suse.de>
3981 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
3982 (_slp_instance::group_size): Likewise.
3983 * tree-vect-loop.c (vectorizable_reduction): The group size
3984 is the number of lanes in the node.
3985 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
3986 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
3987 verify it matches the instance trees number of lanes.
3988 (vect_slp_analyze_node_operations_1): Use the numer of lanes
3989 in the node as group size.
3990 (vect_bb_vectorization_profitable_p): Use the instance root
3991 number of lanes for the size of life.
3992 (vect_schedule_slp_instance): Use the number of lanes as
3994 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
3995 parameter. Use the number of lanes of the load for the group
3996 size in the gap adjustment code.
3997 (vect_analyze_stmt): Adjust.
3998 (vect_transform_stmt): Likewise.
4000 2020-05-13 Jakub Jelinek <jakub@redhat.com>
4003 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
4004 if the last insn is a note.
4006 PR tree-optimization/95060
4007 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
4008 if it is the single use of the FMA internal builtin.
4010 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
4012 PR tree-optimization/94969
4013 * tree-data-dependence.c (constant_access_functions): Rename to...
4014 (invariant_access_functions): ...this. Add parameter. Check for
4015 invariant access function, rather than constant.
4016 (build_classic_dist_vector): Call above function.
4017 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
4019 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
4022 * doc/extend.texi (x86Operandmodifiers): Document more x86
4024 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
4026 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
4028 * tree-vrp.c (class vrp_insert): New.
4029 (insert_range_assertions): Move to class vrp_insert.
4030 (dump_all_asserts): Same as above.
4031 (dump_asserts_for): Same as above.
4032 (live): Same as above.
4033 (need_assert_for): Same as above.
4034 (live_on_edge): Same as above.
4035 (finish_register_edge_assert_for): Same as above.
4036 (find_switch_asserts): Same as above.
4037 (find_assert_locations): Same as above.
4038 (find_assert_locations_1): Same as above.
4039 (find_conditional_asserts): Same as above.
4040 (process_assert_insertions): Same as above.
4041 (register_new_assert_for): Same as above.
4042 (vrp_prop): New variable fun.
4043 (vrp_initialize): New parameter.
4044 (identify_jump_threads): Same as above.
4045 (execute_vrp): Same as above.
4048 2020-05-12 Keith Packard <keith.packard@sifive.com>
4050 * config/riscv/riscv.c (riscv_unique_section): New.
4051 (TARGET_ASM_UNIQUE_SECTION): New.
4053 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
4055 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
4056 * config/riscv/riscv-passes.def: New file.
4057 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
4058 * config/riscv/riscv-shorten-memrefs.c: New file.
4059 * config/riscv/riscv.c (tree-pass.h): New include.
4060 (riscv_compressed_reg_p): New Function
4061 (riscv_compressed_lw_offset_p): Likewise.
4062 (riscv_compressed_lw_address_p): Likewise.
4063 (riscv_shorten_lw_offset): Likewise.
4064 (riscv_legitimize_address): Attempt to convert base + large_offset
4065 to compressible new_base + small_offset.
4066 (riscv_address_cost): Make anticipated compressed load/stores
4067 cheaper for code size than uncompressed load/stores.
4068 (riscv_register_priority): Move compressed register check to
4069 riscv_compressed_reg_p.
4070 * config/riscv/riscv.h (C_S_BITS): Define.
4071 (CSW_MAX_OFFSET): Define.
4072 * config/riscv/riscv.opt (mshorten-memefs): New option.
4073 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
4074 (PASSES_EXTRA): Add riscv-passes.def.
4075 * doc/invoke.texi: Document -mshorten-memrefs.
4077 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
4078 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
4079 * doc/tm.texi: Regenerate.
4080 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
4081 * sched-deps.c (attempt_change): Use old address if it is cheaper than
4083 * target.def (new_address_profitable_p): New hook.
4084 * targhooks.c (default_new_address_profitable_p): New function.
4085 * targhooks.h (default_new_address_profitable_p): Declare.
4087 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4090 * config/i386/mmx.md (copysignv2sf3): New expander.
4091 (xorsignv2sf3): Ditto.
4092 (signbitv2sf3): Ditto.
4094 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4097 * config/i386/mmx.md (fmav2sf4): New insn pattern.
4102 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
4104 * Makefile.in (CET_HOST_FLAGS): New.
4105 (COMPILER): Add $(CET_HOST_FLAGS).
4106 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
4107 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
4109 * aclocal.m4: Regenerated.
4110 * configure: Likewise.
4112 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4115 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
4116 (*mmx_<code>v2sf2): New insn_and_split pattern.
4117 (*mmx_nabsv2sf2): Ditto.
4118 (*mmx_andnotv2sf3): New insn pattern.
4119 (*mmx_<code>v2sf3): Ditto.
4120 * config/i386/i386.md (absneg_op): New code attribute.
4121 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
4122 (ix86_build_signbit_mask): Ditto.
4124 2020-05-12 Richard Biener <rguenther@suse.de>
4126 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
4129 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
4131 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
4132 Update prototype to include "local" argument.
4133 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
4134 "local" argument. Handle local common decls.
4135 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
4136 msp430_output_aligned_decl_common call with 0 for "local" argument.
4137 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
4139 2020-05-12 Richard Biener <rguenther@suse.de>
4141 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
4143 2020-05-12 Martin Liska <mliska@suse.cz>
4147 * sanopt.c (sanitize_rewrite_addressable_params):
4148 Clear DECL_NOT_GIMPLE_REG_P for argument.
4150 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4152 PR tree-optimization/94980
4153 * tree-vect-generic.c (expand_vector_comparison): Use
4154 vector_element_bits_tree to get the element size in bits,
4155 rather than using TYPE_SIZE.
4156 (expand_vector_condition, vector_element): Likewise.
4158 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4160 PR tree-optimization/94980
4161 * tree-vect-generic.c (build_replicated_const): Take the number
4162 of bits as a parameter, instead of the type of the elements.
4163 (do_plus_minus): Update accordingly, using vector_element_bits
4164 to calculate the correct number of bits.
4165 (do_negate): Likewise.
4167 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4169 PR tree-optimization/94980
4170 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
4171 * tree.c (vector_element_bits, vector_element_bits_tree): New.
4172 * match.pd: Use the new functions instead of determining the
4173 vector element size directly from TYPE_SIZE(_UNIT).
4174 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
4175 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
4176 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
4177 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
4178 (expand_vector_conversion): Likewise.
4179 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
4180 a divisor. Convert the dividend to bits to compensate.
4181 * tree-vect-loop.c (vectorizable_live_operation): Call
4182 vector_element_bits instead of open-coding it.
4184 2020-05-12 Jakub Jelinek <jakub@redhat.com>
4186 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
4187 * omp-offload.c: Include context.h.
4188 (omp_declare_target_fn_p, omp_declare_target_var_p,
4189 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
4190 omp_discover_implicit_declare_target): New functions.
4191 * cgraphunit.c (analyze_functions): Call
4192 omp_discover_implicit_declare_target.
4194 2020-05-12 Richard Biener <rguenther@suse.de>
4196 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
4197 literal constant &MEM[..] to a constant literal.
4199 2020-05-12 Richard Biener <rguenther@suse.de>
4201 PR tree-optimization/95045
4202 * dbgcnt.def (lim): Add debug-counter.
4203 * tree-ssa-loop-im.c: Include dbgcnt.h.
4204 (find_refs_for_sm): Use lim debug counter for store motion
4206 (do_store_motion): Rename form store_motion. Commit edge
4208 (store_motion_loop): ... here.
4209 (tree_ssa_lim): Adjust.
4211 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4213 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
4214 (vec_ctzm): Rename to vec_cnttzm.
4215 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
4216 Change fourth operand for vec_ternarylogic to require
4217 compatibility with unsigned SImode rather than unsigned QImode.
4218 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4219 Remove overloaded forms of vec_gnb that are no longer needed.
4220 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4221 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
4222 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
4223 vec_gnb; move vec_ternarylogic documentation into this section
4224 and replace const unsigned char with const unsigned int as its
4227 2020-05-11 Carl Love <cel@us.ibm.com>
4229 * config/rs6000/altivec.h (vec_genpcvm): New #define.
4230 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
4232 (XXGENPCVM_V8HI): Likewise.
4233 (XXGENPCVM_V4SI): Likewise.
4234 (XXGENPCVM_V2DI): Likewise.
4235 (XXGENPCVM): New overloaded built-in instantiation.
4236 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
4237 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
4238 (altivec_expand_builtin): Add special handling for
4239 FUTURE_BUILTIN_VEC_XXGENPCVM.
4240 (builtin_function_type): Add handling for
4241 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
4242 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
4243 (UNSPEC_XXGENPCV): New constant.
4244 (xxgenpcvm_<mode>_internal): New insn.
4245 (xxgenpcvm_<mode>): New expansion.
4246 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
4248 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4250 * config/rs6000/altivec.h (vec_strir): New #define.
4251 (vec_stril): Likewise.
4252 (vec_strir_p): Likewise.
4253 (vec_stril_p): Likewise.
4254 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
4255 (UNSPEC_VSTRIL): Likewise.
4256 (vstrir_<mode>): New expansion.
4257 (vstrir_code_<mode>): New insn.
4258 (vstrir_p_<mode>): New expansion.
4259 (vstrir_p_code_<mode>): New insn.
4260 (vstril_<mode>): New expansion.
4261 (vstril_code_<mode>): New insn.
4262 (vstril_p_<mode>): New expansion.
4263 (vstril_p_code_<mode>): New insn.
4264 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
4265 New built-in function.
4266 (__builtin_altivec_vstrihr): Likewise.
4267 (__builtin_altivec_vstribl): Likewise.
4268 (__builtin_altivec_vstrihl): Likewise.
4269 (__builtin_altivec_vstribr_p): Likewise.
4270 (__builtin_altivec_vstrihr_p): Likewise.
4271 (__builtin_altivec_vstribl_p): Likewise.
4272 (__builtin_altivec_vstrihl_p): Likewise.
4273 (__builtin_vec_strir): New overloaded built-in function.
4274 (__builtin_vec_stril): Likewise.
4275 (__builtin_vec_strir_p): Likewise.
4276 (__builtin_vec_stril_p): Likewise.
4277 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4278 Define overloaded forms of __builtin_vec_strir,
4279 __builtin_vec_stril, __builtin_vec_strir_p, and
4280 __builtin_vec_stril_p.
4281 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4282 for a Future Architecture): Add description of vec_stril,
4283 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
4285 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
4287 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
4288 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
4290 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
4291 * config/rs6000/rs6000-builtin.def: Add handling of new macro
4293 (BU_FUTURE_V_4): New macro. Use it.
4294 (BU_FUTURE_OVERLOAD_4): Likewise.
4295 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
4296 handling for quaternary built-in functions.
4297 (altivec_resolve_overloaded_builtin): Add special-case handling
4298 for __builtin_vec_xxeval.
4299 * config/rs6000/rs6000-call.c: Add handling of new macro
4300 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
4301 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
4302 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
4303 (altivec_overloaded_builtins): Add definitions for
4304 FUTURE_BUILTIN_VEC_XXEVAL.
4305 (bdesc_4arg): New array.
4306 (htm_expand_builtin): Add handling for quaternary built-in
4308 (rs6000_expand_quaternop_builtin): New function.
4309 (rs6000_expand_builtin): Add handling for quaternary built-in
4311 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
4312 for unsigned QImode and unsigned HImode.
4313 (builtin_quaternary_function_type): New function.
4314 (rs6000_common_init_builtins): Add handling of quaternary
4316 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
4318 (RS6000_BTC_PREDICATE): Change value of constant.
4319 (RS6000_BTC_ABS): Likewise.
4320 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
4321 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
4322 for a Future Architecture): Add description of vec_ternarylogic
4325 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4327 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
4329 (__builtin_pextd): Likewise.
4330 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
4331 (UNSPEC_PEXTD): Likewise.
4334 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
4335 a Future Architecture): Add descriptions of __builtin_pdepd and
4336 __builtin_pextd functions.
4338 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4340 * config/rs6000/altivec.h (vec_clrl): New #define.
4341 (vec_clrr): Likewise.
4342 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
4343 (UNSPEC_VCLRRB): Likewise.
4346 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
4348 (__builtin_altivec_vclrrb): Likewise.
4349 (__builtin_vec_clrl): New overloaded built-in function.
4350 (__builtin_vec_clrr): Likewise.
4351 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4352 Define overloaded forms of __builtin_vec_clrl and
4354 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4355 for a Future Architecture): Add descriptions of vec_clrl and
4358 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4360 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
4361 built-in function definition.
4362 (__builtin_cnttzdm): Likewise.
4363 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
4364 (UNSPEC_CNTTZDM): Likewise.
4365 (cntlzdm): New insn.
4366 (cnttzdm): Likewise.
4367 * doc/extend.texi (Basic PowerPC Built-in Functions available for
4368 a Future Architecture): Add descriptions of __builtin_cntlzdm and
4369 __builtin_cnttzdm functions.
4371 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
4374 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
4376 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4378 * config/rs6000/altivec.h (vec_cfuge): New #define.
4379 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
4380 (vcfuged): New insn.
4381 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
4382 New built-in function.
4383 * config/rs6000/rs6000-call.c (builtin_function_type): Add
4384 handling for FUTURE_BUILTIN_VCFUGED case.
4385 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4386 for a Future Architecture): Add description of vec_cfuge built-in
4389 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4391 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
4393 (BU_FUTURE_MISC_1): Likewise.
4394 (BU_FUTURE_MISC_2): Likewise.
4395 (BU_FUTURE_MISC_3): Likewise.
4396 (__builtin_cfuged): New built-in function definition.
4397 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
4399 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
4400 a Future Architecture): New subsubsection.
4402 2020-05-11 Richard Biener <rguenther@suse.de>
4404 PR tree-optimization/95049
4405 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
4406 between different constants.
4408 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
4410 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
4412 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4413 Bill Schmidt <wschmidt@linux.ibm.com>
4415 * config/rs6000/altivec.h (vec_gnb): New #define.
4416 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
4418 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
4420 (BU_FUTURE_OVERLOAD_2): Likewise.
4421 (BU_FUTURE_OVERLOAD_3): Likewise.
4422 (__builtin_altivec_gnb): New built-in function.
4423 (__buiiltin_vec_gnb): New overloaded built-in function.
4424 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4425 Define overloaded forms of __builtin_vec_gnb.
4426 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
4427 of __builtin_vec_gnb.
4428 (builtin_function_type): Mark return value and arguments unsigned
4429 for FUTURE_BUILTIN_VGNB.
4430 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4431 for a Future Architecture): Add description of vec_gnb built-in
4434 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4435 Bill Schmidt <wschmidt@linux.ibm.com>
4437 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
4439 (vec_pext): Likewise.
4440 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
4441 (UNSPEC_VPEXTD): Likewise.
4444 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
4446 (__builtin_altivec_vpextd): Likewise.
4447 * config/rs6000/rs6000-call.c (builtin_function_type): Add
4448 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
4450 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
4451 for a Future Architecture): Add description of vec_pdep and
4452 vec_pext built-in functions.
4454 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4455 Bill Schmidt <wschmidt@linux.ibm.com>
4457 * config/rs6000/altivec.h (vec_clzm): New macro.
4458 (vec_ctzm): Likewise.
4459 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
4460 (UNSPEC_VCTZDM): Likewise.
4463 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
4464 (BU_FUTURE_V_1): Likewise.
4465 (BU_FUTURE_V_2): Likewise.
4466 (BU_FUTURE_V_3): Likewise.
4467 (__builtin_altivec_vclzdm): New builtin definition.
4468 (__builtin_altivec_vctzdm): Likewise.
4469 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
4470 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
4472 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
4473 value and parameter types to be unsigned for VCLZDM and VCTZDM.
4474 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
4475 support for TARGET_FUTURE flag.
4476 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
4477 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
4478 for a Future Architecture): New subsubsection.
4480 2020-05-11 Richard Biener <rguenther@suse.de>
4482 PR tree-optimization/94988
4483 PR tree-optimization/95025
4484 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
4485 (sm_seq_push_down): Take extra parameter denoting where we
4487 (execute_sm_exit): Re-issue sm_other stores in the correct
4489 (sm_seq_valid_bb): When always executed, allow sm_other to
4490 prevail inbetween sm_ord and record their stored value.
4491 (hoist_memory_references): Adjust refs_not_supported propagation
4492 and prune sm_other from the end of the ordered sequences.
4494 2020-05-11 Felix Yang <felix.yang@huawei.com>
4497 * config/aarch64/aarch64.md (mov<mode>):
4498 Bitcasts to the equivalent integer mode using gen_lowpart
4499 instead of doing FAIL for scalar floating point move.
4501 2020-05-11 Alex Coplan <alex.coplan@arm.com>
4503 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
4504 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
4505 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
4506 (*csinv3_uxtw_insn2): New.
4507 (*csinv3_uxtw_insn3): New.
4508 * config/aarch64/iterators.md (neg_not_cs): New.
4510 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
4513 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
4514 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
4515 (*mmx_addv2sf3): Ditto.
4516 (*mmx_subv2sf3): Ditto.
4517 (*mmx_mulv2sf3): Ditto.
4518 (*mmx_<code>v2sf3): Ditto.
4519 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
4521 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
4524 * config/i386/i386.c (ix86_vector_mode_supported_p):
4525 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
4526 * config/i386/mmx.md (*mov<mode>_internal): Do not set
4527 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
4529 (mmx_addv2sf3): Change operand predicates from
4530 nonimmediate_operand to register_mmxmem_operand.
4531 (addv2sf3): New expander.
4532 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
4533 predicates from nonimmediate_operand to register_mmxmem_operand.
4534 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4536 (mmx_subv2sf3): Change operand predicate from
4537 nonimmediate_operand to register_mmxmem_operand.
4538 (mmx_subrv2sf3): Ditto.
4539 (subv2sf3): New expander.
4540 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
4541 predicates from nonimmediate_operand to register_mmxmem_operand.
4542 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4544 (mmx_mulv2sf3): Change operand predicates from
4545 nonimmediate_operand to register_mmxmem_operand.
4546 (mulv2sf3): New expander.
4547 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
4548 predicates from nonimmediate_operand to register_mmxmem_operand.
4549 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4551 (mmx_<code>v2sf3): Change operand predicates from
4552 nonimmediate_operand to register_mmxmem_operand.
4553 (<code>v2sf3): New expander.
4554 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
4555 predicates from nonimmediate_operand to register_mmxmem_operand.
4556 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4557 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
4559 2020-05-11 Martin Liska <mliska@suse.cz>
4562 * common.opt: Fix typo in option description.
4564 2020-05-11 Martin Liska <mliska@suse.cz>
4566 PR gcov-profile/94928
4567 * gcov-io.h: Add caveat about coverage format parsing and
4568 possible outdated documentation.
4570 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
4572 PR tree-optimization/83403
4573 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
4574 determine_value_range, Add fold conversion of MULT_EXPR, fix the
4577 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
4579 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
4580 __ILP32__ for 32-bit targets.
4582 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
4584 * tree.h (expr_align): Delete.
4585 * tree.c (expr_align): Likewise.
4587 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
4589 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
4590 from end_of_function_needs.
4592 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
4593 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
4595 * config/cris/t-elfmulti: Remove crisv32 multilib.
4596 * config/cris: Remove shared-library and CRIS v32 support.
4598 Move trivially from cc0 to reg:CC model, removing most optimizations.
4599 * config/cris/cris.md: Remove all side-effect patterns and their
4600 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
4601 to all but post-reload control-flow and movem insns. Remove
4602 constraints on all modified expanders. Remove obsoleted cc0-related
4604 (attr "cc"): Remove alternative "rev".
4605 (mode_iterator BWDD, DI_, SI_): New.
4606 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
4607 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
4608 ("mstep_shift", "mstep_mul"): Remove patterns.
4609 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
4610 * config/cris/cris.c: Change all non-condition-code,
4611 non-control-flow emitted insns to add a parallel with clobber of
4612 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
4613 emit_insn to use of emit_move_insn, gen_add2_insn or
4614 cris_emit_insn, as convenient.
4615 (cris_reg_overlap_mentioned_p)
4616 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
4617 (cris_movem_load_rest_p): Don't assume all elements in a
4619 (cris_store_multiple_op_p): Ditto.
4620 (cris_emit_insn): New function.
4621 * cris/cris-protos.h (cris_emit_insn): Declare.
4624 * config/cris/cris.md (zcond): New code_iterator.
4625 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
4627 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
4629 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
4631 * config/cris/cris.md ("movsi"): For memory destination
4632 post-reload, generate clobberless variant. Similarly for a
4633 zero-source post-reload.
4634 ("*mov_tomem<mode>_split"): New split.
4635 ("*mov_tomem<mode>"): New insn.
4636 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
4637 "Q>m" for less-than-SImode.
4638 ("*mov_fromzero<mode>_split"): New split.
4639 ("*mov_fromzero<mode>"): New insn.
4641 Prepare for cmpelim pass to eliminate redundant compare insns.
4642 * config/cris/cris-modes.def: New file.
4643 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
4644 (cris_notice_update_cc): Remove left-over declaration.
4645 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
4646 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
4647 * config/cris/cris.h (SELECT_CC_MODE): Define.
4648 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
4650 (cond): New code_iterator.
4651 (nzcond): Replacement for incorrect ncond. All callers changed.
4652 (nzvccond): Replacement for ocond. All callers changed.
4653 (rnzcond): Replacement for rcond. All callers changed.
4654 (xCC): New code_attr.
4655 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
4657 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
4658 CCmode with iteration over NZVCSET.
4659 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
4661 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
4662 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
4663 ("*btst<mode>"): Similarly, from "*btst".
4664 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
4665 iterating over cond instead of matching the comparison with
4666 ordered_comparison_operator.
4667 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
4668 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
4670 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
4671 NZVCUSE. Remove FIXME.
4672 ("*b<nzcond:code>_reversed<mode>"): Similarly from
4673 "*b<ncond:code>_reversed", over NZUSE.
4674 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
4675 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
4676 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
4677 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
4678 depending on CC_NZmode vs. CCmode. Remove FIXME.
4679 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
4680 "*b<rcond:code>_reversed", over NZUSE.
4681 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
4682 iterating over cond instead of matching the comparison with
4683 ordered_comparison_operator.
4684 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
4685 iterating over NZUSE.
4686 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
4687 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
4688 depending on CC_NZmode vs. CCmode.
4689 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
4690 NZVCUSE. Remove FIXME.
4691 ("cc"): Comment on new use.
4692 ("cc_enabled"): New attribute.
4693 ("enabled"): Make default fall back to cc_enabled.
4694 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
4695 default_subst_attrs.
4696 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
4697 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
4698 "*movsi_internal". Correct contents of, and rename attribute
4699 "cc" to "cc<cccc><ccnz><ccnzvc>".
4700 ("anz", "anzvc", "acc"): New define_subst_attrs.
4701 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
4702 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
4703 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
4704 "movqi". Correct contents of, and rename "cc" attribute to
4705 "cc<cccc><ccnz><ccnzvc>".
4706 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
4707 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
4708 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
4709 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
4710 Rename from "extend<mode>si2".
4711 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
4712 Similar, from "zero_extend<mode>si2".
4713 ("*adddi3<setnz>"): Rename from "*adddi3".
4714 ("*subdi3<setnz>"): Similarly from "*subdi3".
4715 ("*addsi3<setnz>"): Similarly from "*addsi3".
4716 ("*subsi3<setnz>"): Similarly from "*subsi3".
4717 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
4718 "cc" attribute to "cc<ccnz>".
4719 ("*addqi3<setnz>"): Similarly from "*addqi3".
4720 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
4721 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
4723 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
4724 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
4725 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
4726 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
4727 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
4728 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
4729 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
4730 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
4732 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
4734 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
4736 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
4738 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
4740 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
4742 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
4743 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
4744 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
4745 (znnCC, rznnCC): New code_attrs.
4746 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
4747 obseolete comment. Add belt-and-suspenders mode-test to condition.
4748 Add fixme regarding remaining matched-but-not-generated case.
4749 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
4750 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
4751 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
4752 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
4753 Handle output of CC_ZnNmode.
4754 ("*b<nzcond:code>_reversed<mode>"): Ditto.
4756 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
4757 NEG too. Correct comment.
4758 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
4761 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
4763 * ira-color.c (update_costs_from_allocno): Remove
4764 conflict_cost_update_p argument. Propagate costs only along
4765 threads. Always do conflict cost update. Add printing debugging
4767 (update_costs_from_copies): Add printing debugging info.
4768 (restore_costs_from_copies): Ditto.
4769 (assign_hard_reg): Improve debug info.
4770 (push_only_colorable): Ditto. Call update_costs_from_prefs.
4771 (color_allocnos): Remove update_costs_from_prefs.
4773 2020-05-08 Richard Biener <rguenther@suse.de>
4775 * tree-vectorizer.h (vec_info::slp_loads): New.
4776 (vect_optimize_slp): Declare.
4777 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
4778 nothing when there are no loads.
4779 (vect_gather_slp_loads): Gather loads into a vector.
4780 (vect_supported_load_permutation_p): Remove.
4781 (vect_analyze_slp_instance): Do not verify permutation
4783 (vect_analyze_slp): Optimize permutations of reductions
4784 after all SLP instances have been gathered and gather
4786 (vect_optimize_slp): New function split out from
4787 vect_supported_load_permutation_p. Elide some permutations.
4788 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
4789 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
4790 * tree-vect-stmts.c (vectorizable_load): Check whether
4791 the load can be permuted. When generating code assert we can.
4793 2020-05-08 Richard Biener <rguenther@suse.de>
4795 * tree-ssa-sccvn.c (rpo_avail): Change type to
4796 eliminate_dom_walker *.
4797 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
4798 use the DOM walker availability.
4799 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
4800 with vn_valueize as valueization callback.
4801 (vn_reference_maybe_forwprop_address): Likewise.
4802 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
4803 array_ref_low_bound.
4805 2020-05-08 Jakub Jelinek <jakub@redhat.com>
4807 PR tree-optimization/94786
4808 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
4812 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
4816 * tree.c (get_narrower): Reuse the op temporary instead of
4819 PR tree-optimization/94783
4820 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
4823 PR tree-optimization/94956
4824 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
4825 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
4827 PR tree-optimization/94913
4828 * match.pd (A - B + -1 >= A to B >= A): New simplification.
4829 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
4830 true for TYPE_UNSIGNED integral types.
4833 PR rtl-optimization/94516
4834 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
4836 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
4837 Call df_notes_rescan if that argument is not true and returning true.
4838 * combine.c (adjust_for_new_dest): Pass true as second argument to
4839 remove_reg_equal_equiv_notes.
4840 * postreload.c (reload_combine_recognize_pattern): Don't call
4843 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
4845 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
4847 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
4848 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
4849 (*neg_ne_<mode>): Likewise.
4851 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
4853 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
4855 (*setbcr_<un>signed_<GPR:mode>): Likewise.
4856 (cstore<mode>4): Use setbc[r] if available.
4857 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
4858 (eq<mode>3): Use setbc for TARGET_FUTURE.
4859 (*eq<mode>3): Avoid for TARGET_FUTURE.
4860 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
4861 else for non-Pmode, use gen_eq and gen_xor.
4862 (*ne<mode>3): Avoid for TARGET_FUTURE.
4863 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
4865 2020-05-07 Jeff Law <law@redhat.com>
4867 * config/h8300/h8300.md: Move expanders and patterns into
4868 files based on functionality.
4869 * config/h8300/addsub.md: New file.
4870 * config/h8300/bitfield.md: New file
4871 * config/h8300/combiner.md: New file
4872 * config/h8300/divmod.md: New file
4873 * config/h8300/extensions.md: New file
4874 * config/h8300/jumpcall.md: New file
4875 * config/h8300/logical.md: New file
4876 * config/h8300/movepush.md: New file
4877 * config/h8300/multiply.md: New file
4878 * config/h8300/other.md: New file
4879 * config/h8300/proepi.md: New file
4880 * config/h8300/shiftrotate.md: New file
4881 * config/h8300/testcompare.md: New file
4883 * config/h8300/h8300.md (adds/subs splitters): Merge into single
4885 (negation expanders and patterns): Simplify and combine using
4887 (one_cmpl expanders and patterns): Likewise.
4888 (tablejump, indirect_jump patterns ): Likewise.
4889 (shift and rotate expanders and patterns): Likewise.
4890 (absolute value expander and pattern): Drop expander, rename pattern
4892 (peephole2 patterns): Move into...
4893 * config/h8300/peepholes.md: New file.
4895 * config/h8300/constraints.md (L and N): Simplify now that we're not
4896 longer supporting the original H8/300 chip.
4897 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
4898 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
4899 (shift_alg_hi, shift_alg_si): Similarly.
4900 (h8300_option_overrides): Similarly. Default to H8/300H. If
4901 compiling for H8/S, then turn off H8/300H. Do not update the
4902 shift_alg tables for H8/300 port.
4903 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
4905 (push, split_adds_subs, h8300_rtx_costs): Likewise.
4906 (h8300_print_operand, compute_mov_length): Likewise.
4907 (output_plussi, compute_plussi_length): Likewise.
4908 (compute_plussi_cc, output_logical_op): Likewise.
4909 (compute_logical_op_length, compute_logical_op_cc): Likewise.
4910 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
4911 (output_a_shift, compute_a_shift_length): Likewise.
4912 (output_a_rotate, compute_a_rotate_length): Likewise.
4913 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
4914 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
4915 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
4916 (attr_cpu, TARGET_H8300): Remove.
4917 (TARGET_DEFAULT): Update.
4918 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
4919 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
4920 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
4921 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
4922 * config/h8300/h8300.md: Simplify patterns throughout.
4923 * config/h8300/t-h8300: Update multilib configuration.
4925 * config/h8300/h8300.h (LINK_SPEC): Remove.
4926 (USER_LABEL_PREFIX): Likewise.
4928 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
4929 (h8300_option_override): Remove remnants of COFF support.
4931 2020-05-07 Alan Modra <amodra@gmail.com>
4933 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
4934 set_rtx_cost with set_src_cost.
4935 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
4937 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
4939 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
4940 redundant half vector handlings for no peeling gaps.
4942 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
4944 * tree-ssa-operands.c (operands_scanner): New class.
4945 (operands_bitmap_obstack): Remove.
4946 (n_initialized): Remove.
4947 (build_uses): Move to operands_scanner class.
4948 (build_vuse): Same as above.
4949 (build_vdef): Same as above.
4950 (verify_ssa_operands): Same as above.
4951 (finalize_ssa_uses): Same as above.
4952 (cleanup_build_arrays): Same as above.
4953 (finalize_ssa_stmt_operands): Same as above.
4954 (start_ssa_stmt_operands): Same as above.
4955 (append_use): Same as above.
4956 (append_vdef): Same as above.
4957 (add_virtual_operand): Same as above.
4958 (add_stmt_operand): Same as above.
4959 (get_mem_ref_operands): Same as above.
4960 (get_tmr_operands): Same as above.
4961 (maybe_add_call_vops): Same as above.
4962 (get_asm_stmt_operands): Same as above.
4963 (get_expr_operands): Same as above.
4964 (parse_ssa_operands): Same as above.
4965 (finalize_ssa_defs): Same as above.
4966 (build_ssa_operands): Same as above, plus create a C-like wrapper.
4967 (update_stmt_operands): Create an instance of operands_scanner.
4969 2020-05-07 Richard Biener <rguenther@suse.de>
4972 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
4973 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
4974 (refered_from_nonlocal_var): Likewise.
4975 (ipa_pta_execute): Likewise.
4977 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
4979 * gcc/tree-ssa-struct-alias.c: Fix comments
4981 2020-05-07 Martin Liska <mliska@suse.cz>
4983 * doc/invoke.texi: Fix 2 optindex entries.
4985 2020-05-07 Richard Biener <rguenther@suse.de>
4988 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
4989 (tree_decl_common::not_gimple_reg_flag): ... to this.
4990 * tree.h (DECL_GIMPLE_REG_P): Rename ...
4991 (DECL_NOT_GIMPLE_REG_P): ... to this.
4992 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
4993 (create_tmp_reg): Simplify.
4994 (create_tmp_reg_fn): Likewise.
4995 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
4996 * gimplify.c (create_tmp_from_val): Simplify.
4997 (gimplify_bind_expr): Likewise.
4998 (gimplify_compound_literal_expr): Likewise.
4999 (gimplify_function_tree): Likewise.
5000 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
5001 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
5002 (asan_add_global): Copy it.
5003 * cgraphunit.c (cgraph_node::expand_thunk): Force args
5005 * function.c (gimplify_parameters): Copy
5006 DECL_NOT_GIMPLE_REG_P.
5007 * ipa-param-manipulation.c
5008 (ipa_param_body_adjustments::common_initialization): Simplify.
5009 (ipa_param_body_adjustments::reset_debug_stmts): Copy
5010 DECL_NOT_GIMPLE_REG_P.
5011 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
5012 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
5013 * tree-cfg.c (make_blocks_1): Simplify.
5014 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
5015 * tree-eh.c (lower_eh_constructs_2): Simplify.
5016 * tree-inline.c (declare_return_variable): Adjust and
5018 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
5019 (copy_result_decl_to_var): Likewise.
5020 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
5021 * tree-nested.c (create_tmp_var_for): Simplify.
5022 * tree-parloops.c (separate_decls_in_region_name): Copy
5023 DECL_NOT_GIMPLE_REG_P.
5024 * tree-sra.c (create_access_replacement): Adjust and
5025 generalize partial def support.
5026 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
5027 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
5028 * tree-ssa.c (maybe_optimize_var): Handle clearing of
5029 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
5031 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
5032 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
5033 DECL_NOT_GIMPLE_REG_P.
5034 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
5035 * cfgexpand.c (avoid_type_punning_on_regs): New.
5036 (discover_nonconstant_array_refs): Call
5037 avoid_type_punning_on_regs to avoid unsupported mode punning.
5039 2020-05-07 Alex Coplan <alex.coplan@arm.com>
5041 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
5044 2020-05-07 Richard Biener <rguenther@suse.de>
5046 PR tree-optimization/57359
5047 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
5048 (in_mem_ref::dep_loop): Repurpose.
5049 (LOOP_DEP_BIT): Remove.
5050 (enum dep_kind): New.
5051 (enum dep_state): Likewise.
5052 (record_loop_dependence): New function to populate the
5054 (query_loop_dependence): New function to query the dependence
5056 (memory_accesses::refs_in_loop): Rename to ...
5057 (memory_accesses::refs_loaded_in_loop): ... this and change to
5059 (outermost_indep_loop): Adjust.
5060 (mem_ref_alloc): Likewise.
5061 (gather_mem_refs_stmt): Likewise.
5062 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
5063 (struct sm_aux): New.
5064 (execute_sm): Split code generation on exits, record state
5066 (enum sm_kind): New.
5067 (execute_sm_exit): Exit code generation part.
5068 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
5069 dependence checking on stores reached from exits.
5070 (sm_seq_valid_bb): New function gathering SM stores on exits.
5071 (hoist_memory_references): Re-implement.
5072 (refs_independent_p): Add tbaa_p parameter and pass it down.
5073 (record_dep_loop): Remove.
5074 (ref_indep_loop_p_1): Fold into ...
5075 (ref_indep_loop_p): ... this and generalize for three kinds
5076 of dependence queries.
5077 (can_sm_ref_p): Adjust according to hoist_memory_references
5079 (store_motion_loop): Don't do anything if the set of SM
5080 candidates is empty.
5081 (tree_ssa_lim_initialize): Adjust.
5082 (tree_ssa_lim_finalize): Likewise.
5084 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
5085 Pierre-Marie de Rodat <derodat@adacore.com>
5087 * dwarf2out.c (add_data_member_location_attribute): Take into account
5088 the variant part offset in the computation of the data bit offset.
5089 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
5090 in the call to field_byte_offset.
5091 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
5092 confusing assertion.
5093 (analyze_variant_discr): Deal with boolean subtypes.
5095 2020-05-07 Martin Liska <mliska@suse.cz>
5097 * lto-wrapper.c: Split arguments of MAKE environment
5100 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
5102 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
5103 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
5104 fenv_var and new_fenv_var.
5106 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5109 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
5111 (avx512dq_vextract<shuffletype>64x2_1_maskm,
5112 avx512f_vextract<shuffletype>32x4_1_maskm,
5113 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
5114 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
5116 (*avx512dq_vextract<shuffletype>64x2_1,
5117 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
5118 define_insns. Even in the masked variant allow memory output but in
5119 that case use 0 rather than 0C constraint on the source of masked-out
5121 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
5123 (*avx512f_vextract<shuffletype>32x4_1,
5124 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
5125 Even in the masked variant allow memory output but in that case use
5126 0 rather than 0C constraint on the source of masked-out elts.
5127 (vec_extract_lo_<mode><mask_name>): Split into ...
5128 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
5129 define_insns. Even in the masked variant allow memory output but in
5130 that case use 0 rather than 0C constraint on the source of masked-out
5132 (vec_extract_hi_<mode><mask_name>): Split into ...
5133 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
5134 define_insns. Even in the masked variant allow memory output but in
5135 that case use 0 rather than 0C constraint on the source of masked-out
5138 2020-05-06 qing zhao <qing.zhao@oracle.com>
5141 * common.opt: Add -flarge-source-files.
5142 * doc/invoke.texi: Document it.
5143 * toplev.c (process_options): set line_table->default_range_bits
5144 to 0 when flag_large_source_files is true.
5146 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
5149 * config/i386/predicates.md (add_comparison_operator): New predicate.
5150 * config/i386/i386.md (compare->add splitter): New splitters.
5152 2020-05-06 Richard Biener <rguenther@suse.de>
5154 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
5155 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
5156 Remove slp_instance parameter, just iterate over all scalar stmts.
5157 (vect_slp_analyze_instance_dependence): Adjust and likewise.
5158 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
5160 (vect_schedule_slp): Just iterate over all scalar stmts.
5161 (vect_supported_load_permutation_p): Adjust.
5162 (vect_transform_slp_perm_load): Remove slp_instance parameter,
5163 instead use the number of lanes in the node as group size.
5164 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
5165 factor instead of slp_instance as parameter.
5166 (vectorizable_load): Adjust.
5168 2020-05-06 Andreas Schwab <schwab@suse.de>
5170 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
5171 (aarch64_get_extension_string_for_isa_flags): Don't declare.
5173 2020-05-06 Richard Biener <rguenther@suse.de>
5176 * cfgloopmanip.c (create_preheader): Require non-complex
5177 preheader edge for CP_SIMPLE_PREHEADERS.
5179 2020-05-06 Richard Biener <rguenther@suse.de>
5181 PR tree-optimization/94963
5182 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
5183 no-warning marking of the conditional store.
5184 (execute_sm): Instead mark the uninitialized state
5185 on loop entry to be not warned about.
5187 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
5189 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
5190 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
5191 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
5192 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
5194 * config/i386/i386-builtin.def: Add new builtins.
5195 * config/i386/i386-c.c (ix86_target_macros_internal): Define
5197 * config/i386/i386-options.c (ix86_target_string): Add
5199 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
5200 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
5202 * config/i386/i386.md (define_c_enum "unspec"): Add
5203 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
5204 (TSXLDTRK): New define_int_iterator.
5205 ("<tsxldtrk>"): New define_insn.
5206 * config/i386/i386.opt: Add -mtsxldtrk.
5207 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
5208 * config/i386/tsxldtrkintrin.h: New.
5209 * doc/invoke.texi: Document -mtsxldtrk.
5211 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5213 PR tree-optimization/94921
5214 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
5217 2020-05-06 Richard Biener <rguenther@suse.de>
5219 PR tree-optimization/94965
5220 * tree-vect-stmts.c (vectorizable_load): Fix typo.
5222 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5224 * doc/install.texi: Replace Sun with Solaris as appropriate.
5225 (Tools/packages necessary for building GCC, Perl version between
5226 5.6.1 and 5.6.24): Remove Solaris 8 reference.
5227 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
5229 (Specific, i?86-*-solaris2*): Update version references for
5230 Solaris 11.3 and later. Remove gas 2.26 caveat.
5231 (Specific, *-*-solaris2*): Update version references for
5232 Solaris 11.3 and later. Remove boehm-gc reference.
5233 Document GMP, MPFR caveats on Solaris 11.3.
5234 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
5235 (Specific, sparc64-*-solaris2*): Likewise.
5236 Document --build requirement.
5238 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5241 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
5242 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
5244 PR rtl-optimization/94873
5245 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
5246 note if SET_SRC (set) has side-effects.
5248 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
5249 Wei Xiao <wei3.xiao@intel.com>
5251 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
5252 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
5253 (ix86_handle_option): Handle -mserialize.
5254 * config.gcc (serializeintrin.h): New header file.
5255 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
5256 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
5258 * config/i386/i386-builtin.def: Add new builtin.
5259 * config/i386/i386-c.c (__SERIALIZE__): New macro.
5260 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
5262 * (ix86_valid_target_attribute_inner_p): Add target attribute
5264 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
5266 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
5267 (serialize): New define_insn.
5268 * config/i386/i386.opt (mserialize): New option
5269 * config/i386/immintrin.h: Include serailizeintrin.h.
5270 * config/i386/serializeintrin.h: New header file.
5271 * doc/invoke.texi: Add documents for -mserialize.
5273 2020-05-06 Richard Biener <rguenther@suse.de>
5275 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
5276 to/from pointer conversion checking.
5278 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
5280 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
5282 * config/rs6000/rs6000-c.c: Likewise.
5283 * config/rs6000/rs6000-call.c: Likewise.
5284 * config/rs6000/rs6000.c: Likewise.
5286 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
5288 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
5289 (RTEMS_ENDFILE_SPEC): Likewise.
5290 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
5291 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
5292 (LIB_SPECS): Support -nodefaultlibs option.
5293 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
5294 (RTEMS_ENDFILE_SPEC): Likewise.
5295 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
5296 (RTEMS_ENDFILE_SPEC): Likewise.
5297 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
5298 (RTEMS_ENDFILE_SPEC): Likewise.
5300 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5302 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
5303 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
5305 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5307 * config/pru/pru.h: Mark R3.w0 as caller saved.
5309 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5311 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
5312 and gen_doloop_begin_internal.
5313 (pru_reorg_loop): Use gen_pruloop with mode.
5314 * config/pru/pru.md: Use new @insn syntax.
5316 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5318 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
5320 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
5322 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
5323 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
5324 (addqi3_cconly_overflow): Ditto.
5325 (umulv<mode>4): Ditto.
5326 (<s>mul<mode>3_highpart): Ditto.
5327 (tls_global_dynamic_32): Ditto.
5328 (tls_local_dynamic_base_32): Ditto.
5335 (*adddi_4): Remove "m" constraint from scratch operand.
5336 (*add<mode>_4): Ditto.
5338 2020-05-05 Jakub Jelinek <jakub@redhat.com>
5340 PR rtl-optimization/94516
5341 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
5342 with sp = reg, add REG_EQUAL note with sp + const.
5343 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
5344 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
5345 postreload sp = sp + const to sp = reg optimization if needed and
5347 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
5348 reg = sp insn with sp + const REG_EQUAL note. Adjust
5349 try_apply_stack_adjustment caller, call
5350 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
5351 (combine_stack_adjustments): Allocate and free LIVE bitmap,
5352 adjust combine_stack_adjustments_for_block caller.
5354 2020-05-05 Martin Liska <mliska@suse.cz>
5356 PR gcov-profile/93623
5357 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
5360 2020-05-05 Martin Liska <mliska@suse.cz>
5362 * opt-functions.awk (opt_args_non_empty): New function.
5363 * opt-read.awk: Use the function for various option arguments.
5365 2020-05-05 Martin Liska <mliska@suse.cz>
5368 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
5369 report warning when the jobserver is not detected.
5371 2020-05-05 Martin Liska <mliska@suse.cz>
5373 PR gcov-profile/94636
5374 * gcov.c (main): Print total lines summary at the end.
5375 (generate_results): Expect file_name always being non-null.
5376 Print newline after intermediate file is printed in order to align with
5377 what we do for normal files.
5379 2020-05-05 Martin Liska <mliska@suse.cz>
5381 * dumpfile.c (dump_switch_p): Change return type
5382 and print option suggestion.
5383 * dumpfile.h: Change return type.
5384 * opts-global.c (handle_common_deferred_options):
5385 Move error into dump_switch_p function.
5387 2020-05-05 Martin Liska <mliska@suse.cz>
5390 * alloc-pool.h: Use const for some arguments.
5391 * bitmap.h: Likewise.
5392 * mem-stats.h: Likewise.
5393 * sese.h (get_entry_bb): Likewise.
5394 (get_exit_bb): Likewise.
5396 2020-05-05 Richard Biener <rguenther@suse.de>
5398 * tree-vect-slp.c (struct vdhs_data): New.
5399 (vect_detect_hybrid_slp): New walker.
5400 (vect_detect_hybrid_slp): Rewrite.
5402 2020-05-05 Richard Biener <rguenther@suse.de>
5405 * tree-ssa-structalias.c (ipa_pta_execute): Use
5406 varpool_node::externally_visible_p ().
5407 (refered_from_nonlocal_var): Likewise.
5409 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
5411 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
5412 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
5413 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
5415 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
5417 * gimplify.c (gimplify_init_constructor): Do not put the constructor
5418 into static memory if it is not complete.
5420 2020-05-05 Richard Biener <rguenther@suse.de>
5422 PR tree-optimization/94949
5423 * tree-ssa-loop-im.c (execute_sm): Check whether we use
5424 the multithreaded model or always compute the stored value
5425 before eliding a load.
5427 2020-05-05 Alex Coplan <alex.coplan@arm.com>
5429 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
5431 2020-05-05 Jakub Jelinek <jakub@redhat.com>
5433 PR tree-optimization/94800
5434 * match.pd (X + (X << C) to X * (1 + (1 << C)),
5435 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
5439 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
5441 PR tree-optimization/94914
5442 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
5445 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
5447 * config/i386/i386.md (*testqi_ext_3): Use
5448 int_nonimmediate_operand instead of manual mode checks.
5449 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
5450 Use int_nonimmediate_operand predicate. Rewrite
5451 define_insn_and_split pattern to a combine pass splitter.
5453 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5455 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
5456 * configure: Regenerate.
5458 2020-05-05 Jakub Jelinek <jakub@redhat.com>
5461 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
5462 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
5463 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
5464 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
5466 2020-05-04 Clement Chigot <clement.chigot@atos.net>
5467 David Edelsohn <dje.gcc@gmail.com>
5469 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
5470 for fmodl, frexpl, ldexpl and modfl builtins.
5472 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
5475 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
5476 chosen lhs is different from the gcall lhs.
5477 (expand_mask_load_optab_fn): Likewise.
5478 (expand_gather_load_optab_fn): Likewise.
5480 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
5483 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
5484 (EQ compare->LTU compare splitter): New splitter.
5485 (NE compare->NEG splitter): Ditto.
5487 2020-05-04 Marek Polacek <polacek@redhat.com>
5490 2020-04-30 Marek Polacek <polacek@redhat.com>
5493 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
5494 (check_aligned_type): Check if TYPE_USER_ALIGN match.
5496 2020-05-04 Richard Biener <rguenther@suse.de>
5498 PR tree-optimization/93891
5499 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
5500 the original reference tree for assessing access alignment.
5502 2020-05-04 Richard Biener <rguenther@suse.de>
5504 PR tree-optimization/39612
5505 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
5506 (set_ref_loaded_in_loop): New.
5507 (mark_ref_loaded): Likewise.
5508 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
5509 (execute_sm): Avoid issueing a load when it was not there.
5510 (execute_sm_if_changed): Avoid issueing warnings for the
5513 2020-05-04 Martin Jambor <mjambor@suse.cz>
5516 * tree-inline.c (tree_function_versioning): Leave any type conversion
5517 of replacements to setup_one_parameter and its friend
5518 force_value_to_type.
5520 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
5523 * config/i386/predicates.md (shr_comparison_operator): New predicate.
5524 * config/i386/i386.md (compare->shr splitter): New splitters.
5526 2020-05-04 Jakub Jelinek <jakub@redhat.com>
5528 PR tree-optimization/94718
5529 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
5531 PR tree-optimization/94718
5532 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
5533 replace two nop conversions on bit_{and,ior,xor} argument
5534 and result with just one conversion on the result or another argument.
5536 PR tree-optimization/94718
5537 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
5538 -> (X ^ Y) & C eqne 0 optimization to ...
5539 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
5541 * opts.c (get_option_html_page): Instead of hardcoding a list of
5542 options common between C/C++ and Fortran only use gfortran/
5543 documentation for warnings that have CL_Fortran set but not
5546 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
5548 * config/i386/i386-expand.c (ix86_expand_int_movcc):
5549 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
5550 (emit_memmov): Ditto.
5551 (emit_memset): Ditto.
5552 (ix86_expand_strlensi_unroll_1): Ditto.
5553 (release_scratch_register_on_entry): Ditto.
5554 (gen_frame_set): Ditto.
5555 (ix86_emit_restore_reg_using_pop): Ditto.
5556 (ix86_emit_outlined_ms2sysv_restore): Ditto.
5557 (ix86_expand_epilogue): Ditto.
5558 (ix86_expand_split_stack_prologue): Ditto.
5559 * config/i386/i386.md (push immediate splitter): Ditto.
5563 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
5565 PR translation/93861
5566 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
5569 2020-05-02 Jakub Jelinek <jakub@redhat.com>
5571 * config/tilegx/tilegx.md
5572 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
5573 rather than just <n>.
5575 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
5578 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
5579 and crtl->patch_area_entry.
5580 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
5581 * opts.c (common_handle_option): Limit
5582 function_entry_patch_area_size and function_entry_patch_area_start
5583 to USHRT_MAX. Fix a typo in error message.
5584 * varasm.c (assemble_start_function): Use crtl->patch_area_size
5585 and crtl->patch_area_entry.
5586 * doc/invoke.texi: Document the maximum value for
5587 -fpatchable-function-entry.
5589 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
5591 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
5592 Override SUBTARGET_SHADOW_OFFSET macro.
5594 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
5596 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
5597 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
5598 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
5599 * config/i386/freebsd.h: Likewise.
5600 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
5601 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
5603 2020-04-30 Alexandre Oliva <oliva@adacore.com>
5605 * doc/sourcebuild.texi (Effective-Target Keywords): Document
5606 the newly-introduced fileio effective target.
5608 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
5610 PR rtl-optimization/94740
5611 * cse.c (cse_process_notes_1): Replace with...
5612 (cse_process_note_1): ...this new function, acting as a
5613 simplify_replace_fn_rtx callback to process_note. Handle only
5614 REGs and MEMs directly. Validate the MEM if cse_process_note
5615 changes its address.
5616 (cse_process_notes): Replace with...
5617 (cse_process_note): ...this new function.
5618 (cse_extended_basic_block): Update accordingly, iterating over
5619 the register notes and passing individual notes to cse_process_note.
5621 2020-04-30 Carl Love <cel@us.ibm.com>
5623 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
5625 2020-04-30 Martin Jambor <mjambor@suse.cz>
5628 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
5629 saved by the inliner and thunks which had their call inlined.
5630 * ipa-inline-transform.c (save_inline_function_body): Fill in
5631 former_clone_of of new body holders.
5633 2020-04-30 Jakub Jelinek <jakub@redhat.com>
5635 * BASE-VER: Set to 11.0.0.
5637 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
5639 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
5641 2020-04-30 Marek Polacek <polacek@redhat.com>
5644 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
5645 (check_aligned_type): Check if TYPE_USER_ALIGN match.
5647 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5649 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
5650 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
5651 * doc/invoke.texi (moutline-atomics): Document as on by default.
5653 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
5656 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
5657 the check for NOTE_INSN_DELETED_LABEL.
5659 2020-04-30 Jakub Jelinek <jakub@redhat.com>
5661 * configure.ac (--with-documentation-root-url,
5662 --with-changes-root-url): Diagnose URL not ending with /,
5663 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
5664 * opts.h (get_changes_url): Remove.
5665 * opts.c (get_changes_url): Remove.
5666 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
5667 or -DCHANGES_ROOT_URL.
5668 * doc/install.texi (--with-documentation-root-url,
5669 --with-changes-root-url): Document.
5670 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
5671 get_changes_url and free, change url variable type to const char * and
5672 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
5673 * config/s390/s390.c (s390_function_arg_vector,
5674 s390_function_arg_float): Likewise.
5675 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
5677 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
5679 * config.in: Regenerate.
5680 * configure: Regenerate.
5682 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
5685 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
5687 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
5689 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
5690 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
5692 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
5694 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
5695 Change constraint for vlrl/vstrl to jb4.
5697 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5699 * var-tracking.c (vt_initialize): Move variables pre and post
5700 into inner block and initialize both in order to fix warning
5701 about uninitialized use. Remove unnecessary checks for
5702 frame_pointer_needed.
5704 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5706 * toplev.c (output_stack_usage_1): Ensure that first
5707 argument to fprintf is not null.
5709 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5711 * configure.ac (-with-changes-root-url): New configure option,
5712 defaulting to https://gcc.gnu.org/.
5713 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
5715 * pretty-print.c (get_end_url_string): New function.
5716 (pp_format): Handle %{ and %} for URLs.
5717 (pp_begin_url): Use pp_string instead of pp_printf.
5718 (pp_end_url): Use get_end_url_string.
5719 * opts.h (get_changes_url): Declare.
5720 * opts.c (get_changes_url): New function.
5721 * config/rs6000/rs6000-call.c: Include opts.h.
5722 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
5723 of just in GCC 10.1 in diagnostics and add URL.
5724 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
5725 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
5727 * config/s390/s390.c (s390_function_arg_vector,
5728 s390_function_arg_float): Likewise.
5729 * configure: Regenerated.
5732 * config/s390/s390.c (s390_function_arg_vector,
5733 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
5734 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
5735 passed to the function rather than the type of the single element.
5736 Rename cxx17_empty_base_seen variable to empty_base_seen, change
5737 type to int, and adjust diagnostics depending on if the field
5738 has [[no_unique_attribute]] or not.
5741 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
5742 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
5743 used in casts into parens.
5744 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
5745 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
5746 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
5747 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
5748 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
5749 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
5750 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
5751 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
5752 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
5753 _mm256_mask_cmp_epu8_mask): Likewise.
5754 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
5755 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
5756 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
5757 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
5760 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
5761 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
5762 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
5763 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
5764 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
5765 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
5766 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
5767 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
5768 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
5769 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
5770 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
5771 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
5772 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
5774 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
5775 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
5776 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
5777 as mask vector containing -1.0 or -1.0f elts, but instead vector
5778 with all bits set using _mm*_cmpeq_p? with zero operands.
5779 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
5780 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
5781 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
5782 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
5783 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
5784 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
5785 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
5786 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
5787 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
5788 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
5789 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
5790 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
5791 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
5792 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
5793 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
5794 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
5795 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
5797 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
5798 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
5799 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
5800 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
5801 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
5802 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
5803 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
5804 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
5805 _mm512_mask_prefetch_i64scatter_ps): Likewise.
5806 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
5807 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
5808 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
5809 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
5810 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
5811 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
5812 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
5813 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
5814 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
5815 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
5816 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
5817 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
5818 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
5819 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
5820 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
5821 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
5822 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
5823 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
5824 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
5825 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
5826 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
5827 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
5828 _mm_mask_i64scatter_epi64): Likewise.
5830 2020-04-29 Jeff Law <law@redhat.com>
5832 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
5833 division instructions are 4 bytes long.
5835 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5838 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
5839 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
5840 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
5841 take address of TARGET_EXPR of fenv_var with void_node initializer.
5844 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5846 PR tree-optimization/94774
5847 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
5850 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5852 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
5853 * calls.c (cxx17_empty_base_field_p): New function. Check
5854 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
5857 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
5860 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
5861 Allow -fcf-protection with -mindirect-branch=thunk-extern and
5862 -mfunction-return=thunk-extern.
5863 * doc/invoke.texi: Update notes for -fcf-protection=branch with
5864 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
5866 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5868 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
5870 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5872 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
5873 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
5874 fenv_var and new_fenv_var.
5876 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5878 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
5879 effective-target keyword.
5880 (arm_arch_v8a_hard_multilib): Likewise.
5881 (arm_arch_v8a_hard): Document new dg-add-options keyword.
5882 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
5883 code is deprecated and has not been updated to handle
5884 DECL_FIELD_ABI_IGNORED.
5885 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
5886 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
5887 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
5888 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
5889 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
5890 something actually is a HFA or HVA. Record whether we see a
5891 [[no_unique_address]] field that previous GCCs would not have
5892 ignored in this way.
5893 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
5894 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
5895 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
5896 diagnostic messages.
5897 (arm_needs_doubleword_align): Add a comment explaining why we
5898 consider even zero-sized fields.
5900 2020-04-29 Richard Biener <rguenther@suse.de>
5901 Li Zekun <lizekun1@huawei.com>
5904 * tree.c (component_ref_size): Guard against error_mark_node
5905 DECL_INITIAL as it happens with LTO.
5907 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5909 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
5910 comment explaining why we consider even zero-sized fields.
5911 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
5912 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
5913 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
5914 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
5915 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
5916 something actually is a HFA or HVA. Record whether we see a
5917 [[no_unique_address]] field that previous GCCs would not have
5918 ignored in this way.
5919 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
5920 whether diagnostics should be suppressed. Update the calls to
5921 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
5922 [[no_unique_address]] case.
5923 (aarch64_return_in_msb): Update call accordingly, never silencing
5925 (aarch64_function_value): Likewise.
5926 (aarch64_return_in_memory_1): Likewise.
5927 (aarch64_init_cumulative_args): Likewise.
5928 (aarch64_gimplify_va_arg_expr): Likewise.
5929 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
5930 use it to decide whether arch64_vfp_is_call_or_return_candidate
5932 (aarch64_pass_by_reference): Update calls accordingly.
5933 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
5934 to decide whether arch64_vfp_is_call_or_return_candidate should be
5937 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
5940 * config/aarch64/aarch64-builtins.c
5941 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
5942 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
5945 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
5947 * configure.ac <$enable_offload_targets>: Do parsing as done
5949 * configure: Regenerate.
5951 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
5952 * configure: Regenerate.
5955 * rtlanal.c (set_noop_p): Handle non-constant selectors.
5958 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
5960 (TARGET_EXCEPT_UNWIND_INFO): Define.
5962 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5965 * config/gcn/gcn.md (*mov<mode>_insn): Use
5966 'reg_overlap_mentioned_p' to check for overlap.
5969 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
5970 instead of cxx17_empty_base_field_p.
5973 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
5974 DECL_FIELD_ABI_IGNORED.
5975 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
5976 * calls.h (cxx17_empty_base_field_p): Change into a temporary
5977 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
5979 * calls.c (cxx17_empty_base_field_p): Remove.
5980 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
5981 DECL_FIELD_ABI_IGNORED.
5982 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
5983 * lto-streamer-out.c (hash_tree): Likewise.
5984 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
5985 cxx17_empty_base_seen to empty_base_seen, change type to int *,
5986 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
5987 cxx17_empty_base_field_p, if "no_unique_address" attribute is
5988 present, propagate that to the caller too.
5989 (rs6000_discover_homogeneous_aggregate): Adjust
5990 rs6000_aggregate_candidate caller, emit different diagnostics
5991 when c++17 empty base fields are present and when empty
5992 [[no_unique_address]] fields are present.
5993 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
5994 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
5997 2020-04-29 Richard Biener <rguenther@suse.de>
5999 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
6000 Just check whether the stmt stores.
6002 2020-04-28 Alexandre Oliva <oliva@adacore.com>
6005 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
6006 output operand in emulation. Don't overwrite pseudos.
6008 2020-04-28 Jeff Law <law@redhat.com>
6010 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
6011 multiply patterns are 4 bytes long.
6013 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6015 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
6016 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
6018 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
6019 Jakub Jelinek <jakub@redhat.com>
6022 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
6023 base class artificial fields.
6024 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
6025 decision is different after this fix.
6027 2020-04-28 David Malcolm <dmalcolm@redhat.com>
6033 * doc/invoke.texi (Static Analyzer Options): Remove
6034 -Wanalyzer-use-of-uninitialized-value.
6035 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
6037 2020-04-28 Jakub Jelinek <jakub@redhat.com>
6039 PR tree-optimization/94809
6040 * tree.c (build_call_expr_internal_loc_array): Call
6041 process_call_operands.
6043 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
6045 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
6046 * config/aarch64/aarch64-tune.md: Regenerate.
6047 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
6048 (thunderx3t110_regmove_cost): Likewise.
6049 (thunderx3t110_vector_cost): Likewise.
6050 (thunderx3t110_prefetch_tune): Likewise.
6051 (thunderx3t110_tunings): Likewise.
6052 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
6054 * config/aarch64/thunderx3t110.md: New file.
6055 * config/aarch64/aarch64.md: Include thunderx3t110.md.
6056 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
6058 2020-04-28 Jakub Jelinek <jakub@redhat.com>
6061 * config/s390/s390.c (s390_function_arg_vector,
6062 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
6064 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
6066 PR tree-optimization/94727
6067 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
6068 operands are invariant booleans, use the mask type associated with the
6069 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
6070 (vectorizable_condition): Pass vectype unconditionally to
6071 vect_is_simple_cond.
6073 2020-04-27 Jakub Jelinek <jakub@redhat.com>
6076 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
6077 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
6078 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
6080 2020-04-27 David Malcolm <dmalcolm@redhat.com>
6083 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
6084 default value, so that it can by supplied by get_option_html_page.
6085 * configure: Regenerate.
6086 * opts.c: Include "selftest.h".
6087 (get_option_html_page): New function.
6088 (get_option_url): Use it. Reformat to place comments next to the
6089 expressions they refer to.
6090 (selftest::test_get_option_html_page): New.
6091 (selftest::opts_c_tests): New.
6092 * selftest-run-tests.c (selftest::run_tests): Call
6093 selftest::opts_c_tests.
6094 * selftest.h (selftest::opts_c_tests): New decl.
6096 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
6098 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
6099 UINTVAL to CONST_INTs.
6101 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6103 * config/arm/constraints.md (e): Remove constraint.
6104 (Te): Define constraint.
6105 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
6106 operand 0 from "e" to "Te".
6107 (vaddvaq_<supf><mode>): Likewise.
6108 (vaddvq_p_<supf><mode>): Likewise.
6109 (vmladavq_<supf><mode>): Likewise.
6110 (vmladavxq_s<mode>): Likewise.
6111 (vmlsdavq_s<mode>): Likewise.
6112 (vmlsdavxq_s<mode>): Likewise.
6113 (vaddvaq_p_<supf><mode>): Likewise.
6114 (vmladavaq_<supf><mode>): Likewise.
6115 (vmladavq_p_<supf><mode>): Likewise.
6116 (vmladavxq_p_s<mode>): Likewise.
6117 (vmlsdavq_p_s<mode>): Likewise.
6118 (vmlsdavxq_p_s<mode>): Likewise.
6119 (vmlsdavaxq_s<mode>): Likewise.
6120 (vmlsdavaq_s<mode>): Likewise.
6121 (vmladavaxq_s<mode>): Likewise.
6122 (vmladavaq_p_<supf><mode>): Likewise.
6123 (vmladavaxq_p_s<mode>): Likewise.
6124 (vmlsdavaq_p_s<mode>): Likewise.
6125 (vmlsdavaxq_p_s<mode>): Likewise.
6127 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
6129 * config/arm/arm.c (output_move_neon): Only get the first operand if
6132 2020-04-27 Felix Yang <felix.yang@huawei.com>
6134 PR tree-optimization/94784
6135 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
6136 assert around so that it checks that the two vectors have equal
6137 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
6138 types is a useless_type_conversion_p.
6140 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6143 * dwarf2cfi.c (struct GTY): Add ra_mangled.
6144 (cfi_row_equal_p): Check ra_mangled.
6145 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
6146 this only handles the sparc logic now.
6147 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
6148 the aarch64 specific logic.
6149 (dwarf2out_frame_debug): Update to use the new subroutines.
6150 (change_cfi_row): Check ra_mangled.
6152 2020-04-27 Jakub Jelinek <jakub@redhat.com>
6155 * config/s390/s390.c (s390_function_arg_vector,
6156 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
6158 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
6160 * common/config/rs6000/rs6000-common.c
6161 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
6163 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
6166 2020-04-27 Martin Liska <mliska@suse.cz>
6169 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
6170 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
6172 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
6175 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
6177 (rs6000_emit_prologue_components):
6178 Check with frame_pointer_needed_indeed.
6179 (rs6000_emit_epilogue_components): Likewise.
6180 (rs6000_emit_prologue): Likewise.
6181 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
6183 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
6185 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
6186 stack frame when debugging and flag_compare_debug is enabled.
6188 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
6190 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
6191 enable PC-relative addressing for -mcpu=future.
6192 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
6193 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
6194 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
6195 suppress PC-relative addressing.
6196 (rs6000_option_override_internal): Split up error messages
6197 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
6200 2020-04-25 Jakub Jelinek <jakub@redhat.com>
6201 Richard Biener <rguenther@suse.de>
6203 PR tree-optimization/94734
6204 PR tree-optimization/89430
6205 * tree-ssa-phiopt.c: Include tree-eh.h.
6206 (cond_store_replacement): Return false if an automatic variable
6207 access could trap. If -fstore-data-races, don't return false
6208 just because an automatic variable is addressable.
6210 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
6212 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
6214 (add<mode>_sext_dup2_exec): Likewise.
6216 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
6219 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
6220 endian byteshift_val calculation.
6222 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
6224 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
6226 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
6228 * config/aarch64/arm_sve.h: Add a comment.
6230 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
6232 PR rtl-optimization/94708
6233 * combine.c (simplify_if_then_else): Add check for
6234 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
6236 2020-04-23 Martin Sebor <msebor@redhat.com>
6239 * common.opt (-Wno-frame-larger-than): New option.
6240 (-Wno-larger-than, -Wno-stack-usage): Same.
6242 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
6244 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
6246 (mov<mode>_exec): Likewise.
6247 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
6248 (<convop><mode><vndi>2_exec): Likewise.
6250 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
6252 PR tree-optimization/94717
6253 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
6254 of the stores doesn't have the same landing pad number as the first.
6255 (coalesce_immediate_stores): Do not try to coalesce the store using
6256 bswap if it doesn't have the same landing pad number as the first.
6258 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
6260 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
6261 Replace outdated link to ELFv2 ABI.
6263 2020-04-23 Jakub Jelinek <jakub@redhat.com>
6266 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
6270 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
6271 temporarily with non-final second operand and updating it later,
6272 push COMPOUND_EXPRs into a vector and process it in reverse,
6273 creating COMPOUND_EXPRs with the final operands.
6275 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
6278 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
6279 bti c and bti j handling.
6281 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
6282 Thomas Schwinge <thomas@codesourcery.com>
6286 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
6287 t_async and the wait arguments.
6289 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
6291 PR tree-optimization/94727
6292 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
6293 comparing invariant scalar booleans.
6295 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
6296 Jakub Jelinek <jakub@redhat.com>
6299 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
6300 empty base class artificial fields.
6301 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
6302 different after this fix.
6304 2020-04-23 Jakub Jelinek <jakub@redhat.com>
6307 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
6308 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
6309 if the same type has been diagnosed most recently already.
6311 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6313 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
6315 (__arm_vbicq_n_s16): Likewise.
6316 (__arm_vbicq_n_u32): Likewise.
6317 (__arm_vbicq_n_s32): Likewise.
6318 (__arm_vbicq): Likewise.
6319 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
6320 (__arm_vbicq_n_s32): Likewise.
6321 (__arm_vbicq_n_u16): Likewise.
6322 (__arm_vbicq_n_u32): Likewise.
6323 (__arm_vdupq_m_n_s8): Likewise.
6324 (__arm_vdupq_m_n_s16): Likewise.
6325 (__arm_vdupq_m_n_s32): Likewise.
6326 (__arm_vdupq_m_n_u8): Likewise.
6327 (__arm_vdupq_m_n_u16): Likewise.
6328 (__arm_vdupq_m_n_u32): Likewise.
6329 (__arm_vdupq_m_n_f16): Likewise.
6330 (__arm_vdupq_m_n_f32): Likewise.
6331 (__arm_vldrhq_gather_offset_s16): Likewise.
6332 (__arm_vldrhq_gather_offset_s32): Likewise.
6333 (__arm_vldrhq_gather_offset_u16): Likewise.
6334 (__arm_vldrhq_gather_offset_u32): Likewise.
6335 (__arm_vldrhq_gather_offset_f16): Likewise.
6336 (__arm_vldrhq_gather_offset_z_s16): Likewise.
6337 (__arm_vldrhq_gather_offset_z_s32): Likewise.
6338 (__arm_vldrhq_gather_offset_z_u16): Likewise.
6339 (__arm_vldrhq_gather_offset_z_u32): Likewise.
6340 (__arm_vldrhq_gather_offset_z_f16): Likewise.
6341 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
6342 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
6343 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
6344 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
6345 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
6346 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
6347 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
6348 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
6349 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
6350 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
6351 (__arm_vldrwq_gather_offset_s32): Likewise.
6352 (__arm_vldrwq_gather_offset_u32): Likewise.
6353 (__arm_vldrwq_gather_offset_f32): Likewise.
6354 (__arm_vldrwq_gather_offset_z_s32): Likewise.
6355 (__arm_vldrwq_gather_offset_z_u32): Likewise.
6356 (__arm_vldrwq_gather_offset_z_f32): Likewise.
6357 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
6358 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
6359 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
6360 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
6361 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
6362 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
6363 (__arm_vdwdupq_x_n_u8): Likewise.
6364 (__arm_vdwdupq_x_n_u16): Likewise.
6365 (__arm_vdwdupq_x_n_u32): Likewise.
6366 (__arm_viwdupq_x_n_u8): Likewise.
6367 (__arm_viwdupq_x_n_u16): Likewise.
6368 (__arm_viwdupq_x_n_u32): Likewise.
6369 (__arm_vidupq_x_n_u8): Likewise.
6370 (__arm_vddupq_x_n_u8): Likewise.
6371 (__arm_vidupq_x_n_u16): Likewise.
6372 (__arm_vddupq_x_n_u16): Likewise.
6373 (__arm_vidupq_x_n_u32): Likewise.
6374 (__arm_vddupq_x_n_u32): Likewise.
6375 (__arm_vldrdq_gather_offset_s64): Likewise.
6376 (__arm_vldrdq_gather_offset_u64): Likewise.
6377 (__arm_vldrdq_gather_offset_z_s64): Likewise.
6378 (__arm_vldrdq_gather_offset_z_u64): Likewise.
6379 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
6380 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
6381 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
6382 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
6383 (__arm_vidupq_m_n_u8): Likewise.
6384 (__arm_vidupq_m_n_u16): Likewise.
6385 (__arm_vidupq_m_n_u32): Likewise.
6386 (__arm_vddupq_m_n_u8): Likewise.
6387 (__arm_vddupq_m_n_u16): Likewise.
6388 (__arm_vddupq_m_n_u32): Likewise.
6389 (__arm_vidupq_n_u16): Likewise.
6390 (__arm_vidupq_n_u32): Likewise.
6391 (__arm_vidupq_n_u8): Likewise.
6392 (__arm_vddupq_n_u16): Likewise.
6393 (__arm_vddupq_n_u32): Likewise.
6394 (__arm_vddupq_n_u8): Likewise.
6396 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
6398 * doc/install.texi (D-Specific Options): Document
6399 --enable-libphobos-checking and --with-libphobos-druntime-only.
6401 2020-04-23 Jakub Jelinek <jakub@redhat.com>
6404 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
6405 cxx17_empty_base_seen argument. Pass it to recursive calls.
6406 Ignore cxx17_empty_base_field_p fields after setting
6407 *cxx17_empty_base_seen to true.
6408 (rs6000_discover_homogeneous_aggregate): Adjust
6409 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
6410 aggregates with C++17 empty base fields.
6413 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
6414 if last_decl is error_mark_node or has such a TREE_TYPE.
6417 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
6418 if last_decl is error_mark_node or has such a TREE_TYPE.
6420 2020-04-22 Felix Yang <felix.yang@huawei.com>
6423 * config/aarch64/aarch64.h (TARGET_SVE):
6424 Add && !TARGET_GENERAL_REGS_ONLY.
6425 (TARGET_SVE2): Add && TARGET_SVE.
6426 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
6427 TARGET_SVE2_SM4): Add && TARGET_SVE2.
6428 * config/aarch64/aarch64-sve-builtins.h
6429 (sve_switcher::m_old_general_regs_only): New member.
6430 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
6432 (reported_missing_registers_p): New variable.
6433 (check_required_extensions): Call check_required_registers before
6434 return if all required extenstions are present.
6435 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
6436 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
6437 global_options.x_target_flags.
6438 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
6439 global_options.x_target_flags if m_old_general_regs_only is true.
6441 2020-04-22 Zackery Spytz <zspytz@gmail.com>
6443 * doc/extend.exi: Add "free" to list of other builtin functions
6446 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
6449 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
6451 (store_quadpti): Ditto.
6452 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
6453 plq will be used and doesn't need it.
6454 (atomic_store<mode>): Ditto, for pstq.
6456 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
6458 * doc/invoke.texi: Update flags turned on by -O3.
6460 2020-04-22 Jakub Jelinek <jakub@redhat.com>
6463 * config/ia64/ia64.c (hfa_element_mode): Ignore
6464 cxx17_empty_base_field_p fields.
6467 * calls.h (cxx17_empty_base_field_p): Declare.
6468 * calls.c (cxx17_empty_base_field_p): Define.
6470 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
6472 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
6474 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6475 Andre Vieira <andre.simoesdiasvieira@arm.com>
6476 Mihail Ionescu <mihail.ionescu@arm.com>
6478 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
6479 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
6480 (ALL_QUIRKS): Add quirk_no_asmcpu.
6481 (cortex-m55): Define new cpu.
6482 * config/arm/arm-tables.opt: Regenerate.
6483 * config/arm/arm-tune.md: Likewise.
6484 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
6486 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
6488 PR tree-optimization/94700
6489 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
6490 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
6491 of similarly-structured but distinct vector types.
6493 2020-04-21 Martin Sebor <msebor@redhat.com>
6496 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
6497 the computation of the lower bound of the source access size.
6498 (builtin_access::generic_overlap): Remove a hack for setting ranges
6501 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
6503 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
6504 (ASM_WEAKEN_DECL): New define.
6505 (HAVE_GAS_WEAKREF): Undefine.
6507 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
6509 PR tree-optimization/94683
6510 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
6511 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
6512 but distinct vector types.
6514 2020-04-21 Jakub Jelinek <jakub@redhat.com>
6517 * stor-layout.c (place_field, finalize_record_size): Don't emit
6518 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
6519 * ubsan.c (ubsan_get_type_descriptor_type,
6520 ubsan_get_source_location_type, ubsan_create_data): Set
6522 * asan.c (asan_global_struct): Likewise.
6524 2020-04-21 Duan bo <duanbo3@huawei.com>
6527 * config/aarch64/aarch64.c: Add an error message for option conflict.
6528 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
6529 incompatible with -fpic, -fPIC and -mabi=ilp32.
6531 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
6534 * omp-low.c (new_omp_context): Remove assignments to
6535 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
6537 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
6539 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
6540 ("popcountv2di2_vx"): Use simplify_gen_subreg.
6542 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
6545 * config/s390/s390-builtin-types.def: Add 3 new function modes.
6546 * config/s390/s390-builtins.def: Add mode dependent low-level
6547 builtin and map the overloaded builtins to these.
6548 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
6549 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
6551 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
6553 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
6554 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
6555 estimated VF and is no worse at double the estimated VF.
6557 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
6560 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
6561 order of arguments to rtx_vector_builder.
6562 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
6563 When extending the trailing constants to a full vector, replace any
6564 variables with zeros.
6566 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
6569 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
6572 2020-04-20 Martin Liska <mliska@suse.cz>
6574 * symtab.c (symtab_node::dump_references): Add space after
6576 (symtab_node::dump_referring): Likewise.
6578 2020-04-18 Jeff Law <law@redhat.com>
6581 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
6584 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
6586 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
6587 attributes): Document d_runtime_has_std_library.
6589 2020-04-17 Jeff Law <law@redhat.com>
6591 PR rtl-optimization/90275
6592 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
6593 when the destination has a REG_UNUSED note.
6595 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
6598 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
6601 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
6603 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
6604 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
6605 cost of load and store insns if one loop iteration has enough scalar
6606 elements to use an Advanced SIMD LDP or STP.
6607 (aarch64_add_stmt_cost): Update call accordingly.
6609 2020-04-17 Jakub Jelinek <jakub@redhat.com>
6610 Jeff Law <law@redhat.com>
6613 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
6614 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
6615 or pos + len >= 32, or pos + len is equal to operands[2] precision
6616 and operands[2] is not a register operand. During splitting perform
6617 SImode AND if operands[0] doesn't have CCZmode and pos + len is
6618 equal to mode precision.
6620 2020-04-17 Richard Biener <rguenther@suse.de>
6623 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
6625 * dwarf2out.c (dw_val_equal_p): Fix pasto in
6626 dw_val_class_vms_delta comparison.
6627 * optabs.c (expand_binop_directly): Fix pasto in commutation
6629 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
6632 2020-04-17 Jakub Jelinek <jakub@redhat.com>
6634 PR rtl-optimization/94618
6635 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
6636 insn is the BB_END of its block, but also when it is only followed
6637 by DEBUG_INSNs in its block.
6639 PR tree-optimization/94621
6640 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
6641 Move id->adjust_array_error_bounds check first in the condition.
6643 2020-04-17 Martin Liska <mliska@suse.cz>
6644 Jonathan Yong <10walls@gmail.com>
6646 PR gcov-profile/94570
6647 * coverage.c (coverage_init): Use separator properly.
6649 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
6651 PR rtl-optimization/93974
6652 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
6653 (rs6000_cannot_substitute_mem_equiv_p): New function.
6655 2020-04-16 Martin Jambor <mjambor@suse.cz>
6658 * ipa-inline.h (ipa_saved_clone_sources): Declare.
6659 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
6660 (save_inline_function_body): Link the new body holder with the
6662 * cgraph.c: Include ipa-inline.h.
6663 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
6664 the statement in ipa_saved_clone_sources.
6665 * cgraphunit.c: Include ipa-inline.h.
6666 (expand_all_functions): Free ipa_saved_clone_sources.
6668 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
6671 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
6672 the VNx16BI lowpart of the recursively-generated constant.
6674 2020-04-16 Martin Liska <mliska@suse.cz>
6675 Jakub Jelinek <jakub@redhat.com>
6678 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
6679 DECL_IS_REPLACEABLE_OPERATOR during cloning.
6680 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
6681 (propagate_necessity): Check operator names.
6683 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
6685 PR rtl-optimization/94605
6686 * early-remat.c (early_remat::process_block): Handle insns that
6687 set multiple candidate registers.
6688 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
6690 PR gcov-profile/93401
6691 * common.opt (profile-prefix-path): New option.
6692 * coverae.c: Include diagnostics.h.
6693 (coverage_init): Strip profile prefix path.
6694 * doc/invoke.texi (-fprofile-prefix-path): Document.
6696 2020-04-16 Richard Biener <rguenther@suse.de>
6699 * expr.c (emit_move_multi_word): Do not generate code when
6700 the destination part is undefined_operand_subword_p.
6701 * lower-subreg.c (resolve_clobber): Look through a paradoxica
6704 2020-04-16 Martin Jambor <mjambor@suse.cz>
6706 PR tree-optimization/94598
6707 * tree-sra.c (verify_sra_access_forest): Fix verification of total
6708 scalarization accesses under access to one-element arrays.
6710 2020-04-16 Jakub Jelinek <jakub@redhat.com>
6713 * function.c (assign_parm_find_data_types): Add workaround for
6714 BROKEN_VALUE_INITIALIZATION compilers.
6716 2020-04-16 Richard Biener <rguenther@suse.de>
6718 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
6721 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
6724 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
6725 Require OPTION_MASK_ISA_SSE2.
6727 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
6730 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
6731 Don't construct a dump_context temporary to call static method.
6733 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
6735 * config/aarch64/falkor-tag-collision-avoidance.c
6736 (valid_src_p): Check for aarch64_address_info type before
6737 accessing base field.
6739 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
6741 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
6742 (V_sz_elem2): Remove unused mode attribute.
6744 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
6746 * config/arm/arm.md (arm_movdi): Disallow for MVE.
6748 2020-04-15 Richard Biener <rguenther@suse.de>
6751 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
6752 alias_sets_conflict_p for pointers.
6754 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
6757 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
6758 (extendhisi2_internal): Add %v1 before the load instructions.
6760 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
6763 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
6764 use PC-relative addressing for TLS references.
6766 2020-04-14 Martin Jambor <mjambor@suse.cz>
6769 * ipa-sra.c: Include internal-fn.h.
6770 (enum isra_scan_context): Update comment.
6771 (scan_function): Treat calls to internal_functions like loads or stores.
6773 2020-04-14 Yang Yang <yangyang305@huawei.com>
6775 PR tree-optimization/94574
6776 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
6777 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
6779 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
6782 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
6784 2020-04-13 Martin Sebor <msebor@redhat.com>
6786 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
6787 -Wformat-truncation. Move -Wzero-length-bounds last.
6788 (-Wrestrict): Document positive form of option enabled by -Wall.
6790 2020-04-13 Zachary Spytz <zspytz@gmail.com>
6792 * doc/extend.texi: Add realloc to list of built-in functions
6793 are recognized by the compiler.
6795 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
6798 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
6799 pointer in word_mode for eh_return epilogues.
6801 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6803 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
6804 memory references in %B, %C and %D operand selectors when the inner
6805 operand is a post increment address.
6807 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6809 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
6810 reference by 4 bytes, and %D memory reference by 6 bytes.
6812 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
6815 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
6816 condition for V4SI, V8HI and V16QI modes.
6818 2020-04-11 Jakub Jelinek <jakub@redhat.com>
6822 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
6825 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
6829 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
6830 "#pragma omp declare target" has also been applied.
6832 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6834 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
6835 when to emit the epilogue_helper insn.
6836 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
6839 2020-04-09 Jakub Jelinek <jakub@redhat.com>
6842 * cselib.h (cselib_record_sp_cfa_base_equiv,
6843 cselib_sp_derived_value_p): Declare.
6844 * cselib.c (cselib_record_sp_cfa_base_equiv,
6845 cselib_sp_derived_value_p): New functions.
6846 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
6847 cselib_sp_derived_value_p values.
6848 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
6849 start of extended basic blocks other than the first one
6850 for !frame_pointer_needed functions.
6852 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6854 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
6855 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
6856 (aarch64_sve2048_hw): Document.
6857 * config/aarch64/aarch64-protos.h
6858 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
6859 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
6860 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
6861 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
6863 (find_type_suffix_for_scalar_type): Use it instead of comparing
6865 (function_resolver::infer_vector_or_tuple_type): Likewise.
6866 (function_resolver::require_vector_type): Likewise.
6867 (handle_arm_sve_vector_bits_attribute): New function.
6868 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
6869 (aarch64_attribute_table): Add arm_sve_vector_bits.
6870 (aarch64_return_in_memory_1):
6871 (pure_scalable_type_info::piece::get_rtx): New function.
6872 (pure_scalable_type_info::num_zr): Likewise.
6873 (pure_scalable_type_info::num_pr): Likewise.
6874 (pure_scalable_type_info::get_rtx): Likewise.
6875 (pure_scalable_type_info::analyze): Likewise.
6876 (pure_scalable_type_info::analyze_registers): Likewise.
6877 (pure_scalable_type_info::analyze_array): Likewise.
6878 (pure_scalable_type_info::analyze_record): Likewise.
6879 (pure_scalable_type_info::add_piece): Likewise.
6880 (aarch64_some_values_include_pst_objects_p): Likewise.
6881 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
6882 to analyze whether the type is returned in SVE registers.
6883 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
6884 is passed in SVE registers.
6885 (aarch64_pass_by_reference_1): New function, extracted from...
6886 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
6887 to analyze whether the type is a pure scalable type and, if so,
6888 whether it should be passed by reference.
6889 (aarch64_return_in_msb): Return false for pure scalable types.
6890 (aarch64_function_value_1): Fold back into...
6891 (aarch64_function_value): ...this function. Use
6892 pure_scalable_type_info to analyze whether the type is a pure
6893 scalable type and, if so, which registers it should use. Handle
6894 types that include pure scalable types but are not themselves
6895 pure scalable types.
6896 (aarch64_return_in_memory_1): New function, split out from...
6897 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
6898 to analyze whether the type is a pure scalable type and, if so,
6899 whether it should be returned by reference.
6900 (aarch64_layout_arg): Remove orig_mode argument. Use
6901 pure_scalable_type_info to analyze whether the type is a pure
6902 scalable type and, if so, which registers it should use. Handle
6903 types that include pure scalable types but are not themselves
6904 pure scalable types.
6905 (aarch64_function_arg): Update call accordingly.
6906 (aarch64_function_arg_advance): Likewise.
6907 (aarch64_pad_reg_upward): On big-endian targets, return false for
6908 pure scalable types that are smaller than 16 bytes.
6909 (aarch64_member_type_forces_blk): New function.
6910 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
6911 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
6912 correspond to built-in SVE types. Do not rely on a vector mode
6913 if the type includes an pure scalable type. When returning true,
6914 assert that the mode is not an SVE mode.
6915 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
6916 built-in types here. When returning true, assert that the type
6917 does not have an SVE mode.
6918 (aarch64_can_change_mode_class): Don't allow anything to change
6919 between a predicate mode and a non-predicate mode. Also don't
6920 allow changes between SVE vector modes and other modes that
6921 might be bigger than 128 bits.
6922 (aarch64_invalid_binary_op): Reject binary operations that mix
6923 SVE and GNU vector types.
6924 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
6926 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6928 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
6929 "SVE sizeless type".
6930 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
6931 (sizeless_type_p): New functions.
6932 (register_builtin_types): Apply make_type_sizeless to the type.
6933 (register_tuple_type): Likewise.
6934 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
6936 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
6938 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
6941 2020-04-09 Martin Jambor <mjambor@suse.cz>
6942 Richard Biener <rguenther@suse.de>
6944 PR tree-optimization/94482
6945 * tree-sra.c (create_access_replacement): Dump new replacement with
6947 (sra_modify_expr): Fix handling of cases when the original EXPR writes
6948 to only part of the replacement.
6949 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
6950 the first operand of combinations into REAL/IMAGPART_EXPR and
6953 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6955 * doc/sourcebuild.texi (check-function-bodies): Treat the third
6956 parameter as a list of option regexps and require each regexp
6959 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
6962 * config/aarch64/falkor-tag-collision-avoidance.c
6963 (valid_src_p): Fix missing rtx type check.
6965 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
6966 Richard Biener <rguenther@suse.de>
6968 PR tree-optimization/93674
6969 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
6970 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
6971 or non-mode precision type, add candidate in unsigned type with the
6974 2020-04-08 Clement Chigot <clement.chigot@atos.net>
6976 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
6977 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
6978 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
6980 2020-04-08 Jakub Jelinek <jakub@redhat.com>
6983 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
6985 * reload1.c (eliminate_regs_1): Avoid creating
6986 (plus (reg) (const_int 0)) in DEBUG_INSNs.
6988 PR tree-optimization/94524
6989 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
6990 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
6991 op1 rather than op1 itself at the end. Punt for signed modulo by
6992 most negative constant.
6993 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
6994 modulo by most negative constant.
6996 2020-04-08 Richard Biener <rguenther@suse.de>
6998 PR rtl-optimization/93946
6999 * cse.c (cse_insn): Record the tabled expression in
7000 src_related. Verify a redundant store removal is valid.
7002 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
7005 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
7006 ENDBR at function entry if function will be called indirectly.
7008 2020-04-08 Jakub Jelinek <jakub@redhat.com>
7011 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
7014 2020-04-08 Martin Liska <mliska@suse.cz>
7017 * gimple.c (gimple_call_operator_delete_p): Rename to...
7018 (gimple_call_replaceable_operator_delete_p): ... this.
7019 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
7020 * gimple.h (gimple_call_operator_delete_p): Rename to ...
7021 (gimple_call_replaceable_operator_delete_p): ... this.
7022 * tree-core.h (tree_function_decl): Add replaceable_operator
7024 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
7025 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
7026 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
7027 (eliminate_unnecessary_stmts): Likewise.
7028 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
7029 Pack DECL_IS_REPLACEABLE_OPERATOR.
7030 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
7031 Unpack the field here.
7032 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
7033 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
7034 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
7035 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
7036 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
7037 replaceable operator flags.
7039 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
7040 Matthew Malcomson <matthew.malcomson@arm.com>
7042 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
7043 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
7044 (CX_TERNARY_QUALIFIERS): Likewise.
7045 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
7046 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
7047 (arm_init_acle_builtins): Initialize CDE builtins.
7048 (arm_expand_acle_builtin): Check CDE constant operands.
7049 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
7050 of CDE constant operand.
7051 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
7053 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
7054 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
7055 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
7056 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
7057 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
7058 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
7059 * config/arm/arm_cde_builtins.def: New file.
7060 * config/arm/iterators.md (V_reg): New attribute of SI.
7061 * config/arm/predicates.md (const_int_coproc_operand): New.
7062 (const_int_vcde1_operand, const_int_vcde2_operand): New.
7063 (const_int_vcde3_operand): New.
7064 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
7065 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
7066 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
7067 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
7069 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
7071 * config.gcc: Add arm_cde.h.
7072 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
7073 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
7074 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
7075 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
7076 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
7077 * config/arm/arm.h (TARGET_CDE): New macro.
7078 * config/arm/arm_cde.h: New file.
7079 * doc/invoke.texi: Document CDE options +cdecp[0-7].
7080 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
7082 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
7084 2020-04-08 Jakub Jelinek <jakub@redhat.com>
7086 PR rtl-optimization/94516
7087 * postreload.c: Include rtl-iter.h.
7088 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
7089 looking for all MEMs with RTX_AUTOINC operand.
7090 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
7092 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
7094 * omp-grid.c (grid_eliminate_combined_simd_part): Use
7095 OMP_CLAUSE_CODE to access the omp clause code.
7097 2020-04-07 Jeff Law <law@redhat.com>
7099 PR rtl-optimization/92264
7100 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
7101 the destination is the stack pointer.
7103 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7105 PR rtl-optimization/94291
7106 PR rtl-optimization/84169
7107 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
7108 must be a REG or SUBREG of REG; if it is not one of these, don't
7111 2020-04-07 Richard Biener <rguenther@suse.de>
7114 * gimplify.c (gimplify_addr_expr): Also consider generated
7117 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7119 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
7121 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7123 * config/arm/arm_mve.h: Cast some pointers to expected types.
7125 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7127 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
7128 same with '__arm_' prefix.
7130 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7132 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
7134 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7136 * config/arm/arm.c (arm_mve_immediate_check): Removed.
7137 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
7138 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
7139 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
7140 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
7141 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
7142 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
7144 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7146 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
7148 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7150 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
7151 * config/arm/mve/md: Fix v[id]wdup patterns.
7153 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7155 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
7156 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
7158 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7160 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
7161 and remove const_ptr enums.
7163 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7165 * config/arm/arm_mve.h (vsubq_n): Merge with...
7167 (vmulq_n): Merge with...
7169 (__ARM_mve_typeid): Simplify scalar and constant detection.
7171 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7174 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
7175 for inter-lane permutation for 64-byte modes.
7178 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
7179 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
7180 Assume it is a REG after that instead of testing it and doing FAIL
7181 otherwise. Formatting fix.
7183 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
7185 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
7187 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7190 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
7191 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
7193 2020-04-06 Jakub Jelinek <jakub@redhat.com>
7195 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
7196 + const0_rtx return the SP_DERIVED_VALUE_P.
7198 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
7200 PR rtl-optimization/92989
7201 * lra-lives.c (process_bb_lives): Do not treat eh_return data
7202 registers as being live at the beginning of the EH receiver.
7204 2020-04-05 Zachary Spytz <zspytz@gmail.com>
7206 * extend.texi: Add free to list of ISO C90 functions that
7207 are recognized by the compiler.
7209 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
7211 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
7214 * config/microblaze/microblaze.md (trap): Update output pattern.
7216 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
7217 Jakub Jelinek <jakub@redhat.com>
7220 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
7221 arrays, pointer-to-members, function types and qualifiers when
7222 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
7223 to emit type again on definition.
7225 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
7228 * ipa-fnsummary.c (vrp_will_run_p): New function.
7229 (fre_will_run_p): New function.
7230 (evaluate_properties_for_edge): Use it.
7231 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
7232 !optimize_debug to optimize_debug.
7234 2020-04-04 Jakub Jelinek <jakub@redhat.com>
7236 PR rtl-optimization/94468
7237 * cselib.c (references_value_p): Formatting fix.
7238 (cselib_useless_value_p): New function.
7239 (discard_useless_locs, discard_useless_values,
7240 cselib_invalidate_regno_val, cselib_invalidate_mem,
7241 cselib_record_set): Use it instead of
7242 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
7245 * tree-iterator.h (expr_single): Declare.
7246 * tree-iterator.c (expr_single): New function.
7247 * tree.h (protected_set_expr_location_if_unset): Declare.
7248 * tree.c (protected_set_expr_location): Use expr_single.
7249 (protected_set_expr_location_if_unset): New function.
7251 2020-04-03 Jeff Law <law@redhat.com>
7253 PR rtl-optimization/92264
7254 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
7255 reloading of auto-increment addressing modes.
7257 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
7260 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
7263 2020-04-03 Jeff Law <law@redhat.com>
7265 PR rtl-optimization/92264
7266 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
7267 post-increment addressing of source operands as well as residuals
7268 when computing any adjustments to the input pointer.
7270 2020-04-03 Jakub Jelinek <jakub@redhat.com>
7273 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
7274 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
7275 second half of first lane from first lane of second operand and
7276 first half of second lane from second lane of first operand.
7278 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
7280 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
7282 2020-04-03 Tamar Christina <tamar.christina@arm.com>
7285 * common/config/aarch64/aarch64-common.c
7286 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
7288 2020-04-03 Richard Biener <rguenther@suse.de>
7291 * tree.c (array_ref_low_bound): Deal with released SSA names
7294 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
7296 * config/gcn/gcn.c (print_operand): Handle unordered comparison
7298 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
7299 comparison operators.
7301 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
7303 PR tree-optimization/94443
7304 * tree-vect-loop.c (vectorizable_live_operation): Use
7305 gsi_insert_seq_before to replace gsi_insert_before.
7307 2020-04-03 Martin Liska <mliska@suse.cz>
7310 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
7311 Compare type attributes for gimple_call_fntypes.
7313 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
7315 * alias.c (get_alias_set): Fix comment typos.
7317 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
7320 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
7321 attribute checking used by TYPE.
7323 2020-04-02 Martin Jambor <mjambor@suse.cz>
7326 * ipa-sra.c (struct caller_issues): New fields candidate and
7327 call_from_outside_comdat.
7328 (check_for_caller_issues): Check for calls from outsied of
7329 candidate's same_comdat_group.
7330 (check_all_callers_for_issues): Set up issues.candidate, check result
7332 (mark_callers_calls_comdat_local): New function.
7333 (process_isra_node_results): Set calls_comdat_local of callers if
7336 2020-04-02 Richard Biener <rguenther@suse.de>
7339 * common.opt (ffinite-loops): Initialize to zero.
7340 * opts.c (default_options_table): Remove OPT_ffinite_loops
7342 * cfgloop.h (loop::finite_p): New member.
7343 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
7344 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
7346 * lto-streamer-in.c (input_cfg): Stream finite_p.
7347 * lto-streamer-out.c (output_cfg): Likewise.
7348 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
7349 from flag_finite_loops at CFG build time.
7350 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
7351 finite_p flag instead of flag_finite_loops.
7352 * doc/invoke.texi (ffinite-loops): Adjust documentation of
7355 2020-04-02 Richard Biener <rguenther@suse.de>
7358 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
7359 DW_TAG_imported_unit.
7361 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
7363 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
7364 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
7367 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
7369 PR tree-optimization/94401
7370 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
7371 access type when loading halves of vector to avoid peeling for gaps.
7373 2020-04-02 Jakub Jelinek <jakub@redhat.com>
7375 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
7376 between a string literal and MIPS_SYSVERSION_SPEC macro.
7378 2020-04-02 Martin Jambor <mjambor@suse.cz>
7380 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
7382 2020-04-02 Jakub Jelinek <jakub@redhat.com>
7384 PR rtl-optimization/92264
7385 * params.opt (-param=max-find-base-term-values=): Decrease default
7388 PR rtl-optimization/92264
7389 * rtl.h (struct rtx_def): Mention that call bit is used as
7390 SP_DERIVED_VALUE_P in cselib.c.
7391 * cselib.c (SP_DERIVED_VALUE_P): Define.
7392 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
7393 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
7394 val_rtx and sp based expression where offsets cancel each other.
7395 (preserve_constants_and_equivs): Formatting fix.
7396 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
7397 locs list for cfa_base_preserved_val if needed. Formatting fix.
7398 (autoinc_split): If the to be returned value is a REG, MEM or
7399 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
7400 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
7401 (rtx_equal_for_cselib_1): Call autoinc_split even if both
7402 expressions are PLUS in Pmode with CONST_INT second operands.
7403 Handle SP_DERIVED_VALUE_P cases.
7404 (cselib_hash_plus_const_int): New function.
7405 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
7406 second operand, as well as for PRE_DEC etc. that ought to be
7407 hashed the same way.
7408 (cselib_subst_to_values): Substitute PLUS with Pmode and
7409 CONST_INT operand if the first operand is a VALUE which has
7410 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
7411 SP_DERIVED_VALUE_P + adjusted offset.
7412 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
7413 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
7414 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
7415 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
7416 on the sp value before calling cselib_add_permanent_equiv on the
7418 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
7419 in the insn without REG_INC note.
7420 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
7421 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
7424 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
7425 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
7427 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7430 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
7431 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
7432 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
7433 intrinsic defintion by adding a new builtin call to writeback into base
7435 (__arm_vldrdq_gather_base_wb_u64): Likewise.
7436 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
7437 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
7438 (__arm_vldrwq_gather_base_wb_s32): Likewise.
7439 (__arm_vldrwq_gather_base_wb_u32): Likewise.
7440 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
7441 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
7442 (__arm_vldrwq_gather_base_wb_f32): Likewise.
7443 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
7444 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
7445 builtin's qualifier.
7446 (vldrdq_gather_base_wb_z_u): Likewise.
7447 (vldrwq_gather_base_wb_u): Likewise.
7448 (vldrdq_gather_base_wb_u): Likewise.
7449 (vldrwq_gather_base_wb_z_s): Likewise.
7450 (vldrwq_gather_base_wb_z_f): Likewise.
7451 (vldrdq_gather_base_wb_z_s): Likewise.
7452 (vldrwq_gather_base_wb_s): Likewise.
7453 (vldrwq_gather_base_wb_f): Likewise.
7454 (vldrdq_gather_base_wb_s): Likewise.
7455 (vldrwq_gather_base_nowb_z_u): Define builtin.
7456 (vldrdq_gather_base_nowb_z_u): Likewise.
7457 (vldrwq_gather_base_nowb_u): Likewise.
7458 (vldrdq_gather_base_nowb_u): Likewise.
7459 (vldrwq_gather_base_nowb_z_s): Likewise.
7460 (vldrwq_gather_base_nowb_z_f): Likewise.
7461 (vldrdq_gather_base_nowb_z_s): Likewise.
7462 (vldrwq_gather_base_nowb_s): Likewise.
7463 (vldrwq_gather_base_nowb_f): Likewise.
7464 (vldrdq_gather_base_nowb_s): Likewise.
7465 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
7467 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
7468 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
7469 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
7470 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
7471 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
7472 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
7473 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
7474 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
7475 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
7476 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
7477 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
7479 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
7481 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
7482 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
7483 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
7484 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
7485 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
7486 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
7487 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
7488 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
7489 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
7491 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
7492 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
7493 Remove constraints from expander.
7494 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
7495 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
7496 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
7497 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
7498 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
7499 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
7501 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
7503 PR rtl-optimization/94123
7504 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
7505 flag_split_wide_types_early.
7507 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
7509 * doc/extend.texi (Common Function Attributes): Fix typo.
7511 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
7514 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
7517 2020-04-01 Zackery Spytz <zspytz@gmail.com>
7519 * doc/extend.texi: Fix a typo in the documentation of the
7520 copy function attribute.
7522 2020-04-01 Jakub Jelinek <jakub@redhat.com>
7525 * tree-object-size.c (pass_object_sizes::execute): Don't call
7526 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
7527 call replace_call_with_value.
7529 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
7531 PR tree-optimization/94043
7532 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
7533 phi for vec_lhs and use it for lane extraction.
7535 2020-03-31 Felix Yang <felix.yang@huawei.com>
7537 PR tree-optimization/94398
7538 * tree-vect-stmts.c (vectorizable_store): Instead of calling
7539 vect_supportable_dr_alignment, set alignment_support_scheme to
7540 dr_unaligned_supported for gather-scatter accesses.
7541 (vectorizable_load): Likewise.
7543 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
7545 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
7547 (vnsi, VnSI, vndi, VnDI): New mode attributes.
7548 (mov<mode>): Use <VnDI> in place of V64DI.
7549 (mov<mode>_exec): Likewise.
7550 (mov<mode>_sgprbase): Likewise.
7551 (reload_out<mode>): Likewise.
7552 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
7553 (gather_load<mode>v64si): Rename to ...
7554 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
7555 and <VnDI> in place of V64DI.
7556 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
7557 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
7558 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
7559 (scatter_store<mode>v64si): Rename to ...
7560 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
7561 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
7562 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
7563 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
7564 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
7565 (ds_bpermute<mode>): Use <VnSI>.
7566 (addv64si3_vcc<exec_vcc>): Rename to ...
7567 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
7568 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
7569 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
7570 (addcv64si3<exec_vcc>): Rename to ...
7571 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
7572 (subv64si3_vcc<exec_vcc>): Rename to ...
7573 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
7574 (subcv64si3<exec_vcc>): Rename to ...
7575 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
7576 (addv64di3): Rename to ...
7577 (add<mode>3): ... this, and use V_DI.
7578 (addv64di3_exec): Rename to ...
7579 (add<mode>3_exec): ... this, and use V_DI.
7580 (subv64di3): Rename to ...
7581 (sub<mode>3): ... this, and use V_DI.
7582 (subv64di3_exec): Rename to ...
7583 (sub<mode>3_exec): ... this, and use V_DI.
7584 (addv64di3_zext): Rename to ...
7585 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
7586 (addv64di3_zext_exec): Rename to ...
7587 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
7588 (addv64di3_zext_dup): Rename to ...
7589 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
7590 (addv64di3_zext_dup_exec): Rename to ...
7591 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
7592 (addv64di3_zext_dup2): Rename to ...
7593 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
7594 (addv64di3_zext_dup2_exec): Rename to ...
7595 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
7596 (addv64di3_sext_dup2): Rename to ...
7597 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
7598 (addv64di3_sext_dup2_exec): Rename to ...
7599 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
7600 (<su>mulv64si3_highpart<exec>): Rename to ...
7601 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
7602 (mulv64di3): Rename to ...
7603 (mul<mode>3): ... this, and use V_DI and <VnSI>.
7604 (mulv64di3_exec): Rename to ...
7605 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
7606 (mulv64di3_zext): Rename to ...
7607 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
7608 (mulv64di3_zext_exec): Rename to ...
7609 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
7610 (mulv64di3_zext_dup2): Rename to ...
7611 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
7612 (mulv64di3_zext_dup2_exec): Rename to ...
7613 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
7614 (<expander>v64di3): Rename to ...
7615 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
7616 (<expander>v64di3_exec): Rename to ...
7617 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
7618 (<expander>v64si3<exec>): Rename to ...
7619 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
7620 (v<expander>v64si3<exec>): Rename to ...
7621 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
7622 (<expander>v64si3<exec>): Rename to ...
7623 (<expander><vnsi>3<exec>): ... this, and use V_SI.
7624 (subv64df3<exec>): Rename to ...
7625 (sub<mode>3<exec>): ... this, and use V_DF.
7626 (truncv64di<mode>2): Rename to ...
7627 (trunc<vndi><mode>2): ... this, and use <VnDI>.
7628 (truncv64di<mode>2_exec): Rename to ...
7629 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
7630 (<convop><mode>v64di2): Rename to ...
7631 (<convop><mode><vndi>2): ... this, and use <VnDI>.
7632 (<convop><mode>v64di2_exec): Rename to ...
7633 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
7634 (vec_cmp<u>v64qidi): Rename to ...
7635 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
7636 (vec_cmp<u>v64qidi_exec): Rename to ...
7637 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
7638 (vcond_mask_<mode>di): Use <VnDI>.
7639 (maskload<mode>di): Likewise.
7640 (maskstore<mode>di): Likewise.
7641 (mask_gather_load<mode>v64si): Rename to ...
7642 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
7643 (mask_scatter_store<mode>v64si): Rename to ...
7644 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
7645 (*<reduc_op>_dpp_shr_v64di): Rename to ...
7646 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
7647 (*plus_carry_in_dpp_shr_v64si): Rename to ...
7648 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
7649 (*plus_carry_dpp_shr_v64di): Rename to ...
7650 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
7651 (vec_seriesv64si): Rename to ...
7652 (vec_series<mode>): ... this, and use V_SI.
7653 (vec_seriesv64di): Rename to ...
7654 (vec_series<mode>): ... this, and use V_DI.
7656 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
7658 * config/arc/arc.c (arc_print_operand): Use
7659 HOST_WIDE_INT_PRINT_DEC macro.
7661 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
7663 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
7665 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7667 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
7669 (__arm_vbicq): Likewise.
7671 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
7673 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
7675 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7677 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
7678 common section of both MVE Integer and MVE Floating Point.
7680 (vaddlvq_p): Likewise.
7681 (vaddvaq): Likewise.
7682 (vaddvq_p): Likewise.
7683 (vcmpcsq): Likewise.
7684 (vmlsdavxq): Likewise.
7685 (vmlsdavq): Likewise.
7686 (vmladavxq): Likewise.
7687 (vmladavq): Likewise.
7689 (vminavq): Likewise.
7691 (vmaxavq): Likewise.
7692 (vmlaldavq): Likewise.
7693 (vcmphiq): Likewise.
7694 (vaddlvaq): Likewise.
7695 (vrmlaldavhq): Likewise.
7696 (vrmlaldavhxq): Likewise.
7697 (vrmlsldavhq): Likewise.
7698 (vrmlsldavhxq): Likewise.
7699 (vmlsldavxq): Likewise.
7700 (vmlsldavq): Likewise.
7702 (vrmlaldavhaq): Likewise.
7703 (vcmpgeq_m_n): Likewise.
7704 (vmlsdavxq_p): Likewise.
7705 (vmlsdavq_p): Likewise.
7706 (vmlsdavaxq): Likewise.
7707 (vmlsdavaq): Likewise.
7708 (vaddvaq_p): Likewise.
7709 (vcmpcsq_m_n): Likewise.
7710 (vcmpcsq_m): Likewise.
7711 (vmladavxq_p): Likewise.
7712 (vmladavq_p): Likewise.
7713 (vmladavaxq): Likewise.
7714 (vmladavaq): Likewise.
7715 (vminvq_p): Likewise.
7716 (vminavq_p): Likewise.
7717 (vmaxvq_p): Likewise.
7718 (vmaxavq_p): Likewise.
7719 (vcmphiq_m): Likewise.
7720 (vaddlvaq_p): Likewise.
7721 (vmlaldavaq): Likewise.
7722 (vmlaldavaxq): Likewise.
7723 (vmlaldavq_p): Likewise.
7724 (vmlaldavxq_p): Likewise.
7725 (vmlsldavaq): Likewise.
7726 (vmlsldavaxq): Likewise.
7727 (vmlsldavq_p): Likewise.
7728 (vmlsldavxq_p): Likewise.
7729 (vrmlaldavhaxq): Likewise.
7730 (vrmlaldavhq_p): Likewise.
7731 (vrmlaldavhxq_p): Likewise.
7732 (vrmlsldavhaq): Likewise.
7733 (vrmlsldavhaxq): Likewise.
7734 (vrmlsldavhq_p): Likewise.
7735 (vrmlsldavhxq_p): Likewise.
7736 (vabavq_p): Likewise.
7737 (vmladavaq_p): Likewise.
7738 (vstrbq_scatter_offset): Likewise.
7739 (vstrbq_p): Likewise.
7740 (vstrbq_scatter_offset_p): Likewise.
7741 (vstrdq_scatter_base_p): Likewise.
7742 (vstrdq_scatter_base): Likewise.
7743 (vstrdq_scatter_offset_p): Likewise.
7744 (vstrdq_scatter_offset): Likewise.
7745 (vstrdq_scatter_shifted_offset_p): Likewise.
7746 (vstrdq_scatter_shifted_offset): Likewise.
7747 (vmaxq_x): Likewise.
7748 (vminq_x): Likewise.
7749 (vmovlbq_x): Likewise.
7750 (vmovltq_x): Likewise.
7751 (vmulhq_x): Likewise.
7752 (vmullbq_int_x): Likewise.
7753 (vmullbq_poly_x): Likewise.
7754 (vmulltq_int_x): Likewise.
7755 (vmulltq_poly_x): Likewise.
7758 2020-03-31 Jakub Jelinek <jakub@redhat.com>
7761 * config/aarch64/constraints.md (Uph): New constraint.
7762 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
7763 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
7766 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
7767 Jakub Jelinek <jakub@redhat.com>
7770 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
7771 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
7773 2020-03-31 Jakub Jelinek <jakub@redhat.com>
7775 PR tree-optimization/94403
7776 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
7777 ENUMERAL_TYPE lhs_type.
7779 PR rtl-optimization/94344
7780 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
7781 conversions, either on both operands of |^+ or just one. Handle
7782 also extra same precision conversion on RSHIFT_EXPR first operand
7783 provided RSHIFT_EXPR is performed in unsigned type.
7785 2020-03-30 David Malcolm <dmalcolm@redhat.com>
7787 * lra.c (finish_insn_code_data_once): Set the array elements
7788 to NULL after freeing them.
7790 2020-03-30 Andreas Schwab <schwab@suse.de>
7792 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
7795 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
7797 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
7798 to skip defining builtins based on builtin_mask.
7800 2020-03-30 Jakub Jelinek <jakub@redhat.com>
7803 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
7804 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
7805 operand is a register. Don't enable masked variants for V*[QH]Imode.
7808 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
7809 <store_mask_constraint> instead of m in output operand constraint.
7810 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
7813 2020-03-30 Alan Modra <amodra@gmail.com>
7815 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
7816 (rs6000_indirect_call_template_1): Adjust to suit.
7817 * config/rs6000/rs6000.md (call_local): Merge call_local32,
7818 call_local64, and call_local_aix.
7819 (call_value_local): Simlarly.
7820 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
7821 and disable pattern when CALL_LONG.
7822 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
7823 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
7824 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
7826 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
7829 * doc/invoke.texi: Update -falign-functions, -falign-loops and
7830 -falign-jumps documentation.
7832 2020-03-29 Martin Liska <mliska@suse.cz>
7835 * cgraphunit.c (process_function_and_variable_attributes): Remove
7836 double 'attribute' words.
7838 2020-03-29 John David Anglin <dave.anglin@bell.net>
7840 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
7843 2020-03-28 Jakub Jelinek <jakub@redhat.com>
7846 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
7847 to true after setting size to integer_one_node.
7849 PR tree-optimization/94329
7850 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
7851 on the last stmt in a bb, make sure gsi_prev isn't done immediately
7854 2020-03-27 Alan Modra <amodra@gmail.com>
7857 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
7858 for PLT16_LO and PLT_PCREL.
7859 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
7860 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
7861 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
7863 2020-03-27 Martin Sebor <msebor@redhat.com>
7866 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
7868 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
7870 * config/gcn/gcn-valu.md:
7871 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
7872 (VEC_1REG_MODE): Delete.
7873 (VEC_1REG_ALT): Delete.
7874 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
7875 (VEC_1REG_INT_MODE): Delete.
7876 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
7877 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
7878 (VEC_2REG_MODE): Rename to V_2REG throughout.
7879 (VEC_REG_MODE): Rename to V_noHI throughout.
7880 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
7881 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
7882 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
7883 (VEC_INT_MODE): Delete.
7884 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
7885 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
7886 (FP_MODE): Delete and replace with FP throughout.
7887 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
7888 (VCMP_MODE): Rename to V_noQI throughout and move to top.
7889 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
7890 * config/gcn/gcn.md (FP): New mode iterator.
7891 (FP_1REG): New mode iterator.
7893 2020-03-27 David Malcolm <dmalcolm@redhat.com>
7895 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
7896 now emits two .dot files.
7897 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
7898 (graphviz_out::end_tr): Only close a TR, not a TD.
7899 (graphviz_out::begin_td): New.
7900 (graphviz_out::end_td): New.
7901 (graphviz_out::begin_trtd): New, replacing the old implementation
7902 of graphviz_out::begin_tr.
7903 (graphviz_out::end_tdtr): New, replacing the old implementation
7904 of graphviz_out::end_tr.
7905 * graphviz.h (graphviz_out::begin_td): New decl.
7906 (graphviz_out::end_td): New decl.
7907 (graphviz_out::begin_trtd): New decl.
7908 (graphviz_out::end_tdtr): New decl.
7910 2020-03-27 Richard Biener <rguenther@suse.de>
7913 * dwarf2out.c (should_emit_struct_debug): Return false for
7916 2020-03-27 Richard Biener <rguenther@suse.de>
7918 PR tree-optimization/94352
7919 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
7921 (ssa_propagation_engine::ssa_propagate): ... here after
7922 initializing curr_order.
7924 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
7926 PR tree-optimization/90332
7927 * tree-vect-stmts.c (vector_vector_composition_type): New function.
7928 (get_group_load_store_type): Adjust to call
7929 vector_vector_composition_type, extend it to construct with scalar
7931 (vectorizable_load): Likewise.
7933 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
7935 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
7936 (create_ddg_dep_no_link): Likewise.
7937 (add_cross_iteration_register_deps): Move debug instruction check.
7938 Other minor refactoring.
7939 (add_intra_loop_mem_dep): Do not check for debug instructions.
7940 (add_inter_loop_mem_dep): Likewise.
7941 (build_intra_loop_deps): Likewise.
7942 (create_ddg): Do not include debug insns into the graph.
7943 * ddg.h (struct ddg): Remove num_debug field.
7944 * modulo-sched.c (doloop_register_get): Adjust condition.
7945 (res_MII): Remove DDG num_debug field usage.
7946 (sms_schedule_by_order): Use assertion against debug insns.
7947 (ps_has_conflicts): Drop debug insn check.
7949 2020-03-26 Jakub Jelinek <jakub@redhat.com>
7952 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
7953 that contains exactly one non-DEBUG_BEGIN_STMT statement.
7956 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
7957 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
7958 a single non-debug stmt followed by one or more debug stmts.
7959 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
7960 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
7961 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
7962 gimple_seq_last to check if outer_stmt gbind could be reused and
7963 if yes and it is surrounded by any debug stmts, move them into the
7966 PR rtl-optimization/92264
7967 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
7968 for sp based values in !frame_pointer_needed
7969 && !ACCUMULATE_OUTGOING_ARGS functions.
7971 2020-03-26 Felix Yang <felix.yang@huawei.com>
7973 PR tree-optimization/94269
7974 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
7976 operation to single basic block.
7978 2020-03-25 Jeff Law <law@redhat.com>
7980 PR rtl-optimization/90275
7981 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
7984 2020-03-25 Jakub Jelinek <jakub@redhat.com>
7987 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
7988 mode rather than VOIDmode.
7990 2020-03-25 Martin Sebor <msebor@redhat.com>
7993 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
7994 even for alloca calls resulting from system macro expansion.
7995 Include inlining context in all warnings.
7997 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
8000 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
8001 FPRs to change between SDmode and DDmode.
8003 2020-03-25 Martin Sebor <msebor@redhat.com>
8005 PR tree-optimization/94131
8006 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
8008 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
8009 types have constant sizes.
8011 2020-03-25 Martin Liska <mliska@suse.cz>
8014 * configure.ac: Report error only when --with-zstd
8016 * configure: Regenerate.
8018 2020-03-25 Jakub Jelinek <jakub@redhat.com>
8021 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
8022 INSN_CODE (insn) to -1 when changing the pattern.
8024 2020-03-25 Martin Liska <mliska@suse.cz>
8028 * config/i386/i386-features.c (make_resolver_func): Drop
8029 public flag for resolver.
8030 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
8031 group for resolver and drop public flag if possible.
8032 * multiple_target.c (create_dispatcher_calls): Drop unique_name
8033 and resolution as we want to enable LTO privatization of the default
8036 2020-03-25 Martin Liska <mliska@suse.cz>
8039 * configure.ac: Respect --without-zstd and report
8040 error when we can't find header file with --with-zstd.
8041 * configure: Regenerate.
8043 2020-03-25 Jakub Jelinek <jakub@redhat.com>
8046 * varasm.c (output_constructor_array_range): If local->index
8047 RANGE_EXPR doesn't start at the current location in the constructor,
8048 skip needed number of bytes using assemble_zeros or assert we don't
8052 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
8053 counter instead of DECL_UID.
8055 PR tree-optimization/94300
8056 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
8057 is positive, make sure that off + size isn't larger than needed_len.
8059 2020-03-25 Richard Biener <rguenther@suse.de>
8060 Jakub Jelinek <jakub@redhat.com>
8063 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
8065 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
8067 * doc/sourcebuild.texi (ARM-specific attributes): Add
8069 (Features for dg-add-options): Add arm_fp_dp.
8071 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
8074 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
8076 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
8079 * omp-offload.c (omp_finish_file): Fix target-link handling if
8080 targetm_common.have_named_sections is false.
8082 2020-03-24 Jakub Jelinek <jakub@redhat.com>
8085 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
8089 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
8090 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
8091 If not after and at *incr_pos is a debug stmt, set stmt location to
8092 location of next non-debug stmt after it if any.
8095 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
8096 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
8097 worklist or set GF_PLF_2 just because it is used in a debug stmt in
8098 another bb. Formatting improvements.
8101 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
8102 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
8103 regardless of whether TREE_NO_WARNING is set on it or whether
8104 warn_unused_function is true or not.
8106 2020-03-23 Jeff Law <law@redhat.com>
8108 PR rtl-optimization/90275
8111 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
8112 (simplify_logical_relational_operation): Use it.
8114 2020-03-23 Jakub Jelinek <jakub@redhat.com>
8117 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
8118 ultimate rhs and if returned something different, reconstructing
8121 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
8123 * opts.c (print_filtered_help): Improve the help text for alias options.
8125 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8126 Andre Vieira <andre.simoesdiasvieira@arm.com>
8127 Mihail Ionescu <mihail.ionescu@arm.com>
8129 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
8130 (vshlcq_m_u8): Likewise.
8131 (vshlcq_m_s16): Likewise.
8132 (vshlcq_m_u16): Likewise.
8133 (vshlcq_m_s32): Likewise.
8134 (vshlcq_m_u32): Likewise.
8135 (__arm_vshlcq_m_s8): Define intrinsic.
8136 (__arm_vshlcq_m_u8): Likewise.
8137 (__arm_vshlcq_m_s16): Likewise.
8138 (__arm_vshlcq_m_u16): Likewise.
8139 (__arm_vshlcq_m_s32): Likewise.
8140 (__arm_vshlcq_m_u32): Likewise.
8141 (vshlcq_m): Define polymorphic variant.
8142 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
8143 Use builtin qualifier.
8144 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
8145 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
8146 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
8147 (mve_vshlcq_m_<supf><mode>): Likewise.
8149 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8151 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
8152 (UQSHL_QUALIFIERS): Likewise.
8153 (ASRL_QUALIFIERS): Likewise.
8154 (SQSHL_QUALIFIERS): Likewise.
8155 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
8157 (sqrshr): Define macro.
8158 (sqrshrl): Likewise.
8159 (sqrshrl_sat48): Likewise.
8165 (uqrshll): Likewise.
8166 (uqrshll_sat48): Likewise.
8173 (__arm_lsll): Define intrinsic.
8174 (__arm_asrl): Likewise.
8175 (__arm_uqrshll): Likewise.
8176 (__arm_uqrshll_sat48): Likewise.
8177 (__arm_sqrshrl): Likewise.
8178 (__arm_sqrshrl_sat48): Likewise.
8179 (__arm_uqshll): Likewise.
8180 (__arm_urshrl): Likewise.
8181 (__arm_srshrl): Likewise.
8182 (__arm_sqshll): Likewise.
8183 (__arm_uqrshl): Likewise.
8184 (__arm_sqrshr): Likewise.
8185 (__arm_uqshl): Likewise.
8186 (__arm_urshr): Likewise.
8187 (__arm_sqshl): Likewise.
8188 (__arm_srshr): Likewise.
8189 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
8191 (UQSHL_QUALIFIERS): Likewise.
8192 (ASRL_QUALIFIERS): Likewise.
8193 (SQSHL_QUALIFIERS): Likewise.
8194 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
8195 (mve_sqrshrl_sat<supf>_di): Likewise.
8196 (mve_uqrshl_si): Likewise.
8197 (mve_sqrshr_si): Likewise.
8198 (mve_uqshll_di): Likewise.
8199 (mve_urshrl_di): Likewise.
8200 (mve_uqshl_si): Likewise.
8201 (mve_urshr_si): Likewise.
8202 (mve_sqshl_si): Likewise.
8203 (mve_srshr_si): Likewise.
8204 (mve_srshrl_di): Likewise.
8205 (mve_sqshll_di): Likewise.
8207 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8208 Andre Vieira <andre.simoesdiasvieira@arm.com>
8209 Mihail Ionescu <mihail.ionescu@arm.com>
8211 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
8212 (vsetq_lane_f32): Likewise.
8213 (vsetq_lane_s16): Likewise.
8214 (vsetq_lane_s32): Likewise.
8215 (vsetq_lane_s8): Likewise.
8216 (vsetq_lane_s64): Likewise.
8217 (vsetq_lane_u8): Likewise.
8218 (vsetq_lane_u16): Likewise.
8219 (vsetq_lane_u32): Likewise.
8220 (vsetq_lane_u64): Likewise.
8221 (vgetq_lane_f16): Likewise.
8222 (vgetq_lane_f32): Likewise.
8223 (vgetq_lane_s16): Likewise.
8224 (vgetq_lane_s32): Likewise.
8225 (vgetq_lane_s8): Likewise.
8226 (vgetq_lane_s64): Likewise.
8227 (vgetq_lane_u8): Likewise.
8228 (vgetq_lane_u16): Likewise.
8229 (vgetq_lane_u32): Likewise.
8230 (vgetq_lane_u64): Likewise.
8231 (__ARM_NUM_LANES): Likewise.
8232 (__ARM_LANEQ): Likewise.
8233 (__ARM_CHECK_LANEQ): Likewise.
8234 (__arm_vsetq_lane_s16): Define intrinsic.
8235 (__arm_vsetq_lane_s32): Likewise.
8236 (__arm_vsetq_lane_s8): Likewise.
8237 (__arm_vsetq_lane_s64): Likewise.
8238 (__arm_vsetq_lane_u8): Likewise.
8239 (__arm_vsetq_lane_u16): Likewise.
8240 (__arm_vsetq_lane_u32): Likewise.
8241 (__arm_vsetq_lane_u64): Likewise.
8242 (__arm_vgetq_lane_s16): Likewise.
8243 (__arm_vgetq_lane_s32): Likewise.
8244 (__arm_vgetq_lane_s8): Likewise.
8245 (__arm_vgetq_lane_s64): Likewise.
8246 (__arm_vgetq_lane_u8): Likewise.
8247 (__arm_vgetq_lane_u16): Likewise.
8248 (__arm_vgetq_lane_u32): Likewise.
8249 (__arm_vgetq_lane_u64): Likewise.
8250 (__arm_vsetq_lane_f16): Likewise.
8251 (__arm_vsetq_lane_f32): Likewise.
8252 (__arm_vgetq_lane_f16): Likewise.
8253 (__arm_vgetq_lane_f32): Likewise.
8254 (vgetq_lane): Define polymorphic variant.
8255 (vsetq_lane): Likewise.
8256 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
8258 (mve_vec_extractv2didi): Likewise.
8259 (mve_vec_extract_sext_internal<mode>): Likewise.
8260 (mve_vec_extract_zext_internal<mode>): Likewise.
8261 (mve_vec_set<mode>_internal): Likewise.
8262 (mve_vec_setv2di_internal): Likewise.
8263 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
8265 (vec_extract<mode><V_elem_l>): Rename to
8266 "neon_vec_extract<mode><V_elem_l>".
8267 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
8268 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
8269 pattern common for MVE and NEON.
8270 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
8273 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
8275 * config/arm/mve.md (earlyclobber_32): New mode attribute.
8276 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
8277 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
8279 2020-03-23 Richard Biener <rguenther@suse.de>
8281 PR tree-optimization/94261
8282 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
8283 IL operand swapping code.
8284 (vect_slp_rearrange_stmts): Do not arrange isomorphic
8285 nodes that would need operation code adjustments.
8287 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
8289 * doc/install.texi (amdgcn-*-amdhsa): Renamed
8290 from amdgcn-unknown-amdhsa; change
8291 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
8293 2020-03-23 Richard Biener <rguenther@suse.de>
8296 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
8297 directly rather than also folding it via build_fold_addr_expr.
8299 2020-03-23 Richard Biener <rguenther@suse.de>
8301 PR tree-optimization/94266
8302 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
8303 addresses of TARGET_MEM_REFs.
8305 2020-03-23 Martin Liska <mliska@suse.cz>
8308 * symtab.c (symtab_node::clone_references): Save speculative_id
8309 as ref may be overwritten by create_reference.
8310 (symtab_node::clone_referring): Likewise.
8311 (symtab_node::clone_reference): Likewise.
8313 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
8315 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
8316 references to Darwin.
8317 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
8318 unconditionally and comment on why.
8320 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
8322 * config/darwin.c (darwin_mergeable_constant_section): Collect
8323 section anchor checks into the caller.
8324 (machopic_select_section): Collect section anchor checks into
8325 the determination of 'effective zero-size' objects. When the
8326 size is unknown, assume it is non-zero, and thus return the
8327 'generic' section for the DECL.
8329 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
8332 * config/darwin.opt: Amend options descriptions.
8334 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
8336 PR rtl-optimization/94052
8337 * lra-constraints.c (simplify_operand_subreg): Reload the inner
8338 register of a paradoxical subreg if simplify_subreg_regno fails
8339 to give a valid hard register for the outer mode.
8341 2020-03-20 Martin Jambor <mjambor@suse.cz>
8343 PR tree-optimization/93435
8344 * params.opt (sra-max-propagations): New parameter.
8345 * tree-sra.c (propagation_budget): New variable.
8346 (budget_for_propagation_access): New function.
8347 (propagate_subaccesses_from_rhs): Use it.
8348 (propagate_subaccesses_from_lhs): Likewise.
8349 (propagate_all_subaccesses): Set up and destroy propagation_budget.
8351 2020-03-20 Carl Love <cel@us.ibm.com>
8354 * config/rs6000/rs6000.c (rs6000_option_override_internal):
8355 Add check for TARGET_FPRND for Power 7 or newer.
8357 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
8360 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
8361 (cgraph_edge::redirect_callee): Move here; likewise.
8362 (cgraph_node::remove_callees): Update calls_comdat_local flag.
8363 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
8365 (cgraph_node::check_calls_comdat_local_p): New member function.
8366 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
8367 (cgraph_edge::redirect_callee): Move offline.
8368 * ipa-fnsummary.c (compute_fn_summary): Do not compute
8369 calls_comdat_local flag here.
8370 * ipa-inline-transform.c (inline_call): Fix updating of
8371 calls_comdat_local flag.
8372 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
8373 * symtab.c (symtab_node::add_to_same_comdat_group): Update
8374 calls_comdat_local flag.
8376 2020-03-20 Richard Biener <rguenther@suse.de>
8378 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
8379 from the possibly modified root.
8381 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8382 Andre Vieira <andre.simoesdiasvieira@arm.com>
8383 Mihail Ionescu <mihail.ionescu@arm.com>
8385 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
8386 (vst1q_p_s8): Likewise.
8387 (vst2q_s8): Likewise.
8388 (vst2q_u8): Likewise.
8389 (vld1q_z_u8): Likewise.
8390 (vld1q_z_s8): Likewise.
8391 (vld2q_s8): Likewise.
8392 (vld2q_u8): Likewise.
8393 (vld4q_s8): Likewise.
8394 (vld4q_u8): Likewise.
8395 (vst1q_p_u16): Likewise.
8396 (vst1q_p_s16): Likewise.
8397 (vst2q_s16): Likewise.
8398 (vst2q_u16): Likewise.
8399 (vld1q_z_u16): Likewise.
8400 (vld1q_z_s16): Likewise.
8401 (vld2q_s16): Likewise.
8402 (vld2q_u16): Likewise.
8403 (vld4q_s16): Likewise.
8404 (vld4q_u16): Likewise.
8405 (vst1q_p_u32): Likewise.
8406 (vst1q_p_s32): Likewise.
8407 (vst2q_s32): Likewise.
8408 (vst2q_u32): Likewise.
8409 (vld1q_z_u32): Likewise.
8410 (vld1q_z_s32): Likewise.
8411 (vld2q_s32): Likewise.
8412 (vld2q_u32): Likewise.
8413 (vld4q_s32): Likewise.
8414 (vld4q_u32): Likewise.
8415 (vld4q_f16): Likewise.
8416 (vld2q_f16): Likewise.
8417 (vld1q_z_f16): Likewise.
8418 (vst2q_f16): Likewise.
8419 (vst1q_p_f16): Likewise.
8420 (vld4q_f32): Likewise.
8421 (vld2q_f32): Likewise.
8422 (vld1q_z_f32): Likewise.
8423 (vst2q_f32): Likewise.
8424 (vst1q_p_f32): Likewise.
8425 (__arm_vst1q_p_u8): Define intrinsic.
8426 (__arm_vst1q_p_s8): Likewise.
8427 (__arm_vst2q_s8): Likewise.
8428 (__arm_vst2q_u8): Likewise.
8429 (__arm_vld1q_z_u8): Likewise.
8430 (__arm_vld1q_z_s8): Likewise.
8431 (__arm_vld2q_s8): Likewise.
8432 (__arm_vld2q_u8): Likewise.
8433 (__arm_vld4q_s8): Likewise.
8434 (__arm_vld4q_u8): Likewise.
8435 (__arm_vst1q_p_u16): Likewise.
8436 (__arm_vst1q_p_s16): Likewise.
8437 (__arm_vst2q_s16): Likewise.
8438 (__arm_vst2q_u16): Likewise.
8439 (__arm_vld1q_z_u16): Likewise.
8440 (__arm_vld1q_z_s16): Likewise.
8441 (__arm_vld2q_s16): Likewise.
8442 (__arm_vld2q_u16): Likewise.
8443 (__arm_vld4q_s16): Likewise.
8444 (__arm_vld4q_u16): Likewise.
8445 (__arm_vst1q_p_u32): Likewise.
8446 (__arm_vst1q_p_s32): Likewise.
8447 (__arm_vst2q_s32): Likewise.
8448 (__arm_vst2q_u32): Likewise.
8449 (__arm_vld1q_z_u32): Likewise.
8450 (__arm_vld1q_z_s32): Likewise.
8451 (__arm_vld2q_s32): Likewise.
8452 (__arm_vld2q_u32): Likewise.
8453 (__arm_vld4q_s32): Likewise.
8454 (__arm_vld4q_u32): Likewise.
8455 (__arm_vld4q_f16): Likewise.
8456 (__arm_vld2q_f16): Likewise.
8457 (__arm_vld1q_z_f16): Likewise.
8458 (__arm_vst2q_f16): Likewise.
8459 (__arm_vst1q_p_f16): Likewise.
8460 (__arm_vld4q_f32): Likewise.
8461 (__arm_vld2q_f32): Likewise.
8462 (__arm_vld1q_z_f32): Likewise.
8463 (__arm_vst2q_f32): Likewise.
8464 (__arm_vst1q_p_f32): Likewise.
8465 (vld1q_z): Define polymorphic variant.
8468 (vst1q_p): Likewise.
8470 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
8472 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
8473 (mve_vld2q<mode>): Likewise.
8474 (mve_vld4q<mode>): Likewise.
8476 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8477 Andre Vieira <andre.simoesdiasvieira@arm.com>
8478 Mihail Ionescu <mihail.ionescu@arm.com>
8480 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
8481 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
8482 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
8483 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
8484 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
8485 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
8486 * config/arm/arm_mve.h (vadciq_s32): Define macro.
8487 (vadciq_u32): Likewise.
8488 (vadciq_m_s32): Likewise.
8489 (vadciq_m_u32): Likewise.
8490 (vadcq_s32): Likewise.
8491 (vadcq_u32): Likewise.
8492 (vadcq_m_s32): Likewise.
8493 (vadcq_m_u32): Likewise.
8494 (vsbciq_s32): Likewise.
8495 (vsbciq_u32): Likewise.
8496 (vsbciq_m_s32): Likewise.
8497 (vsbciq_m_u32): Likewise.
8498 (vsbcq_s32): Likewise.
8499 (vsbcq_u32): Likewise.
8500 (vsbcq_m_s32): Likewise.
8501 (vsbcq_m_u32): Likewise.
8502 (__arm_vadciq_s32): Define intrinsic.
8503 (__arm_vadciq_u32): Likewise.
8504 (__arm_vadciq_m_s32): Likewise.
8505 (__arm_vadciq_m_u32): Likewise.
8506 (__arm_vadcq_s32): Likewise.
8507 (__arm_vadcq_u32): Likewise.
8508 (__arm_vadcq_m_s32): Likewise.
8509 (__arm_vadcq_m_u32): Likewise.
8510 (__arm_vsbciq_s32): Likewise.
8511 (__arm_vsbciq_u32): Likewise.
8512 (__arm_vsbciq_m_s32): Likewise.
8513 (__arm_vsbciq_m_u32): Likewise.
8514 (__arm_vsbcq_s32): Likewise.
8515 (__arm_vsbcq_u32): Likewise.
8516 (__arm_vsbcq_m_s32): Likewise.
8517 (__arm_vsbcq_m_u32): Likewise.
8518 (vadciq_m): Define polymorphic variant.
8520 (vadcq_m): Likewise.
8522 (vsbciq_m): Likewise.
8524 (vsbcq_m): Likewise.
8526 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
8528 (BINOP_UNONE_UNONE_UNONE): Likewise.
8529 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
8530 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
8531 * config/arm/mve.md (VADCIQ): Define iterator.
8532 (VADCIQ_M): Likewise.
8534 (VSBCQ_M): Likewise.
8536 (VSBCIQ_M): Likewise.
8538 (VADCQ_M): Likewise.
8539 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
8540 (mve_vadciq_<supf>v4si): Likewise.
8541 (mve_vadcq_m_<supf>v4si): Likewise.
8542 (mve_vadcq_<supf>v4si): Likewise.
8543 (mve_vsbciq_m_<supf>v4si): Likewise.
8544 (mve_vsbciq_<supf>v4si): Likewise.
8545 (mve_vsbcq_m_<supf>v4si): Likewise.
8546 (mve_vsbcq_<supf>v4si): Likewise.
8547 (get_fpscr_nzcvqc): Define isns.
8548 (set_fpscr_nzcvqc): Define isns.
8549 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
8550 (UNSPEC_SET_FPSCR_NZCVQC): Define.
8552 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8554 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
8555 (vddupq_x_n_u16): Likewise.
8556 (vddupq_x_n_u32): Likewise.
8557 (vddupq_x_wb_u8): Likewise.
8558 (vddupq_x_wb_u16): Likewise.
8559 (vddupq_x_wb_u32): Likewise.
8560 (vdwdupq_x_n_u8): Likewise.
8561 (vdwdupq_x_n_u16): Likewise.
8562 (vdwdupq_x_n_u32): Likewise.
8563 (vdwdupq_x_wb_u8): Likewise.
8564 (vdwdupq_x_wb_u16): Likewise.
8565 (vdwdupq_x_wb_u32): Likewise.
8566 (vidupq_x_n_u8): Likewise.
8567 (vidupq_x_n_u16): Likewise.
8568 (vidupq_x_n_u32): Likewise.
8569 (vidupq_x_wb_u8): Likewise.
8570 (vidupq_x_wb_u16): Likewise.
8571 (vidupq_x_wb_u32): Likewise.
8572 (viwdupq_x_n_u8): Likewise.
8573 (viwdupq_x_n_u16): Likewise.
8574 (viwdupq_x_n_u32): Likewise.
8575 (viwdupq_x_wb_u8): Likewise.
8576 (viwdupq_x_wb_u16): Likewise.
8577 (viwdupq_x_wb_u32): Likewise.
8578 (vdupq_x_n_s8): Likewise.
8579 (vdupq_x_n_s16): Likewise.
8580 (vdupq_x_n_s32): Likewise.
8581 (vdupq_x_n_u8): Likewise.
8582 (vdupq_x_n_u16): Likewise.
8583 (vdupq_x_n_u32): Likewise.
8584 (vminq_x_s8): Likewise.
8585 (vminq_x_s16): Likewise.
8586 (vminq_x_s32): Likewise.
8587 (vminq_x_u8): Likewise.
8588 (vminq_x_u16): Likewise.
8589 (vminq_x_u32): Likewise.
8590 (vmaxq_x_s8): Likewise.
8591 (vmaxq_x_s16): Likewise.
8592 (vmaxq_x_s32): Likewise.
8593 (vmaxq_x_u8): Likewise.
8594 (vmaxq_x_u16): Likewise.
8595 (vmaxq_x_u32): Likewise.
8596 (vabdq_x_s8): Likewise.
8597 (vabdq_x_s16): Likewise.
8598 (vabdq_x_s32): Likewise.
8599 (vabdq_x_u8): Likewise.
8600 (vabdq_x_u16): Likewise.
8601 (vabdq_x_u32): Likewise.
8602 (vabsq_x_s8): Likewise.
8603 (vabsq_x_s16): Likewise.
8604 (vabsq_x_s32): Likewise.
8605 (vaddq_x_s8): Likewise.
8606 (vaddq_x_s16): Likewise.
8607 (vaddq_x_s32): Likewise.
8608 (vaddq_x_n_s8): Likewise.
8609 (vaddq_x_n_s16): Likewise.
8610 (vaddq_x_n_s32): Likewise.
8611 (vaddq_x_u8): Likewise.
8612 (vaddq_x_u16): Likewise.
8613 (vaddq_x_u32): Likewise.
8614 (vaddq_x_n_u8): Likewise.
8615 (vaddq_x_n_u16): Likewise.
8616 (vaddq_x_n_u32): Likewise.
8617 (vclsq_x_s8): Likewise.
8618 (vclsq_x_s16): Likewise.
8619 (vclsq_x_s32): Likewise.
8620 (vclzq_x_s8): Likewise.
8621 (vclzq_x_s16): Likewise.
8622 (vclzq_x_s32): Likewise.
8623 (vclzq_x_u8): Likewise.
8624 (vclzq_x_u16): Likewise.
8625 (vclzq_x_u32): Likewise.
8626 (vnegq_x_s8): Likewise.
8627 (vnegq_x_s16): Likewise.
8628 (vnegq_x_s32): Likewise.
8629 (vmulhq_x_s8): Likewise.
8630 (vmulhq_x_s16): Likewise.
8631 (vmulhq_x_s32): Likewise.
8632 (vmulhq_x_u8): Likewise.
8633 (vmulhq_x_u16): Likewise.
8634 (vmulhq_x_u32): Likewise.
8635 (vmullbq_poly_x_p8): Likewise.
8636 (vmullbq_poly_x_p16): Likewise.
8637 (vmullbq_int_x_s8): Likewise.
8638 (vmullbq_int_x_s16): Likewise.
8639 (vmullbq_int_x_s32): Likewise.
8640 (vmullbq_int_x_u8): Likewise.
8641 (vmullbq_int_x_u16): Likewise.
8642 (vmullbq_int_x_u32): Likewise.
8643 (vmulltq_poly_x_p8): Likewise.
8644 (vmulltq_poly_x_p16): Likewise.
8645 (vmulltq_int_x_s8): Likewise.
8646 (vmulltq_int_x_s16): Likewise.
8647 (vmulltq_int_x_s32): Likewise.
8648 (vmulltq_int_x_u8): Likewise.
8649 (vmulltq_int_x_u16): Likewise.
8650 (vmulltq_int_x_u32): Likewise.
8651 (vmulq_x_s8): Likewise.
8652 (vmulq_x_s16): Likewise.
8653 (vmulq_x_s32): Likewise.
8654 (vmulq_x_n_s8): Likewise.
8655 (vmulq_x_n_s16): Likewise.
8656 (vmulq_x_n_s32): Likewise.
8657 (vmulq_x_u8): Likewise.
8658 (vmulq_x_u16): Likewise.
8659 (vmulq_x_u32): Likewise.
8660 (vmulq_x_n_u8): Likewise.
8661 (vmulq_x_n_u16): Likewise.
8662 (vmulq_x_n_u32): Likewise.
8663 (vsubq_x_s8): Likewise.
8664 (vsubq_x_s16): Likewise.
8665 (vsubq_x_s32): Likewise.
8666 (vsubq_x_n_s8): Likewise.
8667 (vsubq_x_n_s16): Likewise.
8668 (vsubq_x_n_s32): Likewise.
8669 (vsubq_x_u8): Likewise.
8670 (vsubq_x_u16): Likewise.
8671 (vsubq_x_u32): Likewise.
8672 (vsubq_x_n_u8): Likewise.
8673 (vsubq_x_n_u16): Likewise.
8674 (vsubq_x_n_u32): Likewise.
8675 (vcaddq_rot90_x_s8): Likewise.
8676 (vcaddq_rot90_x_s16): Likewise.
8677 (vcaddq_rot90_x_s32): Likewise.
8678 (vcaddq_rot90_x_u8): Likewise.
8679 (vcaddq_rot90_x_u16): Likewise.
8680 (vcaddq_rot90_x_u32): Likewise.
8681 (vcaddq_rot270_x_s8): Likewise.
8682 (vcaddq_rot270_x_s16): Likewise.
8683 (vcaddq_rot270_x_s32): Likewise.
8684 (vcaddq_rot270_x_u8): Likewise.
8685 (vcaddq_rot270_x_u16): Likewise.
8686 (vcaddq_rot270_x_u32): Likewise.
8687 (vhaddq_x_n_s8): Likewise.
8688 (vhaddq_x_n_s16): Likewise.
8689 (vhaddq_x_n_s32): Likewise.
8690 (vhaddq_x_n_u8): Likewise.
8691 (vhaddq_x_n_u16): Likewise.
8692 (vhaddq_x_n_u32): Likewise.
8693 (vhaddq_x_s8): Likewise.
8694 (vhaddq_x_s16): Likewise.
8695 (vhaddq_x_s32): Likewise.
8696 (vhaddq_x_u8): Likewise.
8697 (vhaddq_x_u16): Likewise.
8698 (vhaddq_x_u32): Likewise.
8699 (vhcaddq_rot90_x_s8): Likewise.
8700 (vhcaddq_rot90_x_s16): Likewise.
8701 (vhcaddq_rot90_x_s32): Likewise.
8702 (vhcaddq_rot270_x_s8): Likewise.
8703 (vhcaddq_rot270_x_s16): Likewise.
8704 (vhcaddq_rot270_x_s32): Likewise.
8705 (vhsubq_x_n_s8): Likewise.
8706 (vhsubq_x_n_s16): Likewise.
8707 (vhsubq_x_n_s32): Likewise.
8708 (vhsubq_x_n_u8): Likewise.
8709 (vhsubq_x_n_u16): Likewise.
8710 (vhsubq_x_n_u32): Likewise.
8711 (vhsubq_x_s8): Likewise.
8712 (vhsubq_x_s16): Likewise.
8713 (vhsubq_x_s32): Likewise.
8714 (vhsubq_x_u8): Likewise.
8715 (vhsubq_x_u16): Likewise.
8716 (vhsubq_x_u32): Likewise.
8717 (vrhaddq_x_s8): Likewise.
8718 (vrhaddq_x_s16): Likewise.
8719 (vrhaddq_x_s32): Likewise.
8720 (vrhaddq_x_u8): Likewise.
8721 (vrhaddq_x_u16): Likewise.
8722 (vrhaddq_x_u32): Likewise.
8723 (vrmulhq_x_s8): Likewise.
8724 (vrmulhq_x_s16): Likewise.
8725 (vrmulhq_x_s32): Likewise.
8726 (vrmulhq_x_u8): Likewise.
8727 (vrmulhq_x_u16): Likewise.
8728 (vrmulhq_x_u32): Likewise.
8729 (vandq_x_s8): Likewise.
8730 (vandq_x_s16): Likewise.
8731 (vandq_x_s32): Likewise.
8732 (vandq_x_u8): Likewise.
8733 (vandq_x_u16): Likewise.
8734 (vandq_x_u32): Likewise.
8735 (vbicq_x_s8): Likewise.
8736 (vbicq_x_s16): Likewise.
8737 (vbicq_x_s32): Likewise.
8738 (vbicq_x_u8): Likewise.
8739 (vbicq_x_u16): Likewise.
8740 (vbicq_x_u32): Likewise.
8741 (vbrsrq_x_n_s8): Likewise.
8742 (vbrsrq_x_n_s16): Likewise.
8743 (vbrsrq_x_n_s32): Likewise.
8744 (vbrsrq_x_n_u8): Likewise.
8745 (vbrsrq_x_n_u16): Likewise.
8746 (vbrsrq_x_n_u32): Likewise.
8747 (veorq_x_s8): Likewise.
8748 (veorq_x_s16): Likewise.
8749 (veorq_x_s32): Likewise.
8750 (veorq_x_u8): Likewise.
8751 (veorq_x_u16): Likewise.
8752 (veorq_x_u32): Likewise.
8753 (vmovlbq_x_s8): Likewise.
8754 (vmovlbq_x_s16): Likewise.
8755 (vmovlbq_x_u8): Likewise.
8756 (vmovlbq_x_u16): Likewise.
8757 (vmovltq_x_s8): Likewise.
8758 (vmovltq_x_s16): Likewise.
8759 (vmovltq_x_u8): Likewise.
8760 (vmovltq_x_u16): Likewise.
8761 (vmvnq_x_s8): Likewise.
8762 (vmvnq_x_s16): Likewise.
8763 (vmvnq_x_s32): Likewise.
8764 (vmvnq_x_u8): Likewise.
8765 (vmvnq_x_u16): Likewise.
8766 (vmvnq_x_u32): Likewise.
8767 (vmvnq_x_n_s16): Likewise.
8768 (vmvnq_x_n_s32): Likewise.
8769 (vmvnq_x_n_u16): Likewise.
8770 (vmvnq_x_n_u32): Likewise.
8771 (vornq_x_s8): Likewise.
8772 (vornq_x_s16): Likewise.
8773 (vornq_x_s32): Likewise.
8774 (vornq_x_u8): Likewise.
8775 (vornq_x_u16): Likewise.
8776 (vornq_x_u32): Likewise.
8777 (vorrq_x_s8): Likewise.
8778 (vorrq_x_s16): Likewise.
8779 (vorrq_x_s32): Likewise.
8780 (vorrq_x_u8): Likewise.
8781 (vorrq_x_u16): Likewise.
8782 (vorrq_x_u32): Likewise.
8783 (vrev16q_x_s8): Likewise.
8784 (vrev16q_x_u8): Likewise.
8785 (vrev32q_x_s8): Likewise.
8786 (vrev32q_x_s16): Likewise.
8787 (vrev32q_x_u8): Likewise.
8788 (vrev32q_x_u16): Likewise.
8789 (vrev64q_x_s8): Likewise.
8790 (vrev64q_x_s16): Likewise.
8791 (vrev64q_x_s32): Likewise.
8792 (vrev64q_x_u8): Likewise.
8793 (vrev64q_x_u16): Likewise.
8794 (vrev64q_x_u32): Likewise.
8795 (vrshlq_x_s8): Likewise.
8796 (vrshlq_x_s16): Likewise.
8797 (vrshlq_x_s32): Likewise.
8798 (vrshlq_x_u8): Likewise.
8799 (vrshlq_x_u16): Likewise.
8800 (vrshlq_x_u32): Likewise.
8801 (vshllbq_x_n_s8): Likewise.
8802 (vshllbq_x_n_s16): Likewise.
8803 (vshllbq_x_n_u8): Likewise.
8804 (vshllbq_x_n_u16): Likewise.
8805 (vshlltq_x_n_s8): Likewise.
8806 (vshlltq_x_n_s16): Likewise.
8807 (vshlltq_x_n_u8): Likewise.
8808 (vshlltq_x_n_u16): Likewise.
8809 (vshlq_x_s8): Likewise.
8810 (vshlq_x_s16): Likewise.
8811 (vshlq_x_s32): Likewise.
8812 (vshlq_x_u8): Likewise.
8813 (vshlq_x_u16): Likewise.
8814 (vshlq_x_u32): Likewise.
8815 (vshlq_x_n_s8): Likewise.
8816 (vshlq_x_n_s16): Likewise.
8817 (vshlq_x_n_s32): Likewise.
8818 (vshlq_x_n_u8): Likewise.
8819 (vshlq_x_n_u16): Likewise.
8820 (vshlq_x_n_u32): Likewise.
8821 (vrshrq_x_n_s8): Likewise.
8822 (vrshrq_x_n_s16): Likewise.
8823 (vrshrq_x_n_s32): Likewise.
8824 (vrshrq_x_n_u8): Likewise.
8825 (vrshrq_x_n_u16): Likewise.
8826 (vrshrq_x_n_u32): Likewise.
8827 (vshrq_x_n_s8): Likewise.
8828 (vshrq_x_n_s16): Likewise.
8829 (vshrq_x_n_s32): Likewise.
8830 (vshrq_x_n_u8): Likewise.
8831 (vshrq_x_n_u16): Likewise.
8832 (vshrq_x_n_u32): Likewise.
8833 (vdupq_x_n_f16): Likewise.
8834 (vdupq_x_n_f32): Likewise.
8835 (vminnmq_x_f16): Likewise.
8836 (vminnmq_x_f32): Likewise.
8837 (vmaxnmq_x_f16): Likewise.
8838 (vmaxnmq_x_f32): Likewise.
8839 (vabdq_x_f16): Likewise.
8840 (vabdq_x_f32): Likewise.
8841 (vabsq_x_f16): Likewise.
8842 (vabsq_x_f32): Likewise.
8843 (vaddq_x_f16): Likewise.
8844 (vaddq_x_f32): Likewise.
8845 (vaddq_x_n_f16): Likewise.
8846 (vaddq_x_n_f32): Likewise.
8847 (vnegq_x_f16): Likewise.
8848 (vnegq_x_f32): Likewise.
8849 (vmulq_x_f16): Likewise.
8850 (vmulq_x_f32): Likewise.
8851 (vmulq_x_n_f16): Likewise.
8852 (vmulq_x_n_f32): Likewise.
8853 (vsubq_x_f16): Likewise.
8854 (vsubq_x_f32): Likewise.
8855 (vsubq_x_n_f16): Likewise.
8856 (vsubq_x_n_f32): Likewise.
8857 (vcaddq_rot90_x_f16): Likewise.
8858 (vcaddq_rot90_x_f32): Likewise.
8859 (vcaddq_rot270_x_f16): Likewise.
8860 (vcaddq_rot270_x_f32): Likewise.
8861 (vcmulq_x_f16): Likewise.
8862 (vcmulq_x_f32): Likewise.
8863 (vcmulq_rot90_x_f16): Likewise.
8864 (vcmulq_rot90_x_f32): Likewise.
8865 (vcmulq_rot180_x_f16): Likewise.
8866 (vcmulq_rot180_x_f32): Likewise.
8867 (vcmulq_rot270_x_f16): Likewise.
8868 (vcmulq_rot270_x_f32): Likewise.
8869 (vcvtaq_x_s16_f16): Likewise.
8870 (vcvtaq_x_s32_f32): Likewise.
8871 (vcvtaq_x_u16_f16): Likewise.
8872 (vcvtaq_x_u32_f32): Likewise.
8873 (vcvtnq_x_s16_f16): Likewise.
8874 (vcvtnq_x_s32_f32): Likewise.
8875 (vcvtnq_x_u16_f16): Likewise.
8876 (vcvtnq_x_u32_f32): Likewise.
8877 (vcvtpq_x_s16_f16): Likewise.
8878 (vcvtpq_x_s32_f32): Likewise.
8879 (vcvtpq_x_u16_f16): Likewise.
8880 (vcvtpq_x_u32_f32): Likewise.
8881 (vcvtmq_x_s16_f16): Likewise.
8882 (vcvtmq_x_s32_f32): Likewise.
8883 (vcvtmq_x_u16_f16): Likewise.
8884 (vcvtmq_x_u32_f32): Likewise.
8885 (vcvtbq_x_f32_f16): Likewise.
8886 (vcvttq_x_f32_f16): Likewise.
8887 (vcvtq_x_f16_u16): Likewise.
8888 (vcvtq_x_f16_s16): Likewise.
8889 (vcvtq_x_f32_s32): Likewise.
8890 (vcvtq_x_f32_u32): Likewise.
8891 (vcvtq_x_n_f16_s16): Likewise.
8892 (vcvtq_x_n_f16_u16): Likewise.
8893 (vcvtq_x_n_f32_s32): Likewise.
8894 (vcvtq_x_n_f32_u32): Likewise.
8895 (vcvtq_x_s16_f16): Likewise.
8896 (vcvtq_x_s32_f32): Likewise.
8897 (vcvtq_x_u16_f16): Likewise.
8898 (vcvtq_x_u32_f32): Likewise.
8899 (vcvtq_x_n_s16_f16): Likewise.
8900 (vcvtq_x_n_s32_f32): Likewise.
8901 (vcvtq_x_n_u16_f16): Likewise.
8902 (vcvtq_x_n_u32_f32): Likewise.
8903 (vrndq_x_f16): Likewise.
8904 (vrndq_x_f32): Likewise.
8905 (vrndnq_x_f16): Likewise.
8906 (vrndnq_x_f32): Likewise.
8907 (vrndmq_x_f16): Likewise.
8908 (vrndmq_x_f32): Likewise.
8909 (vrndpq_x_f16): Likewise.
8910 (vrndpq_x_f32): Likewise.
8911 (vrndaq_x_f16): Likewise.
8912 (vrndaq_x_f32): Likewise.
8913 (vrndxq_x_f16): Likewise.
8914 (vrndxq_x_f32): Likewise.
8915 (vandq_x_f16): Likewise.
8916 (vandq_x_f32): Likewise.
8917 (vbicq_x_f16): Likewise.
8918 (vbicq_x_f32): Likewise.
8919 (vbrsrq_x_n_f16): Likewise.
8920 (vbrsrq_x_n_f32): Likewise.
8921 (veorq_x_f16): Likewise.
8922 (veorq_x_f32): Likewise.
8923 (vornq_x_f16): Likewise.
8924 (vornq_x_f32): Likewise.
8925 (vorrq_x_f16): Likewise.
8926 (vorrq_x_f32): Likewise.
8927 (vrev32q_x_f16): Likewise.
8928 (vrev64q_x_f16): Likewise.
8929 (vrev64q_x_f32): Likewise.
8930 (__arm_vddupq_x_n_u8): Define intrinsic.
8931 (__arm_vddupq_x_n_u16): Likewise.
8932 (__arm_vddupq_x_n_u32): Likewise.
8933 (__arm_vddupq_x_wb_u8): Likewise.
8934 (__arm_vddupq_x_wb_u16): Likewise.
8935 (__arm_vddupq_x_wb_u32): Likewise.
8936 (__arm_vdwdupq_x_n_u8): Likewise.
8937 (__arm_vdwdupq_x_n_u16): Likewise.
8938 (__arm_vdwdupq_x_n_u32): Likewise.
8939 (__arm_vdwdupq_x_wb_u8): Likewise.
8940 (__arm_vdwdupq_x_wb_u16): Likewise.
8941 (__arm_vdwdupq_x_wb_u32): Likewise.
8942 (__arm_vidupq_x_n_u8): Likewise.
8943 (__arm_vidupq_x_n_u16): Likewise.
8944 (__arm_vidupq_x_n_u32): Likewise.
8945 (__arm_vidupq_x_wb_u8): Likewise.
8946 (__arm_vidupq_x_wb_u16): Likewise.
8947 (__arm_vidupq_x_wb_u32): Likewise.
8948 (__arm_viwdupq_x_n_u8): Likewise.
8949 (__arm_viwdupq_x_n_u16): Likewise.
8950 (__arm_viwdupq_x_n_u32): Likewise.
8951 (__arm_viwdupq_x_wb_u8): Likewise.
8952 (__arm_viwdupq_x_wb_u16): Likewise.
8953 (__arm_viwdupq_x_wb_u32): Likewise.
8954 (__arm_vdupq_x_n_s8): Likewise.
8955 (__arm_vdupq_x_n_s16): Likewise.
8956 (__arm_vdupq_x_n_s32): Likewise.
8957 (__arm_vdupq_x_n_u8): Likewise.
8958 (__arm_vdupq_x_n_u16): Likewise.
8959 (__arm_vdupq_x_n_u32): Likewise.
8960 (__arm_vminq_x_s8): Likewise.
8961 (__arm_vminq_x_s16): Likewise.
8962 (__arm_vminq_x_s32): Likewise.
8963 (__arm_vminq_x_u8): Likewise.
8964 (__arm_vminq_x_u16): Likewise.
8965 (__arm_vminq_x_u32): Likewise.
8966 (__arm_vmaxq_x_s8): Likewise.
8967 (__arm_vmaxq_x_s16): Likewise.
8968 (__arm_vmaxq_x_s32): Likewise.
8969 (__arm_vmaxq_x_u8): Likewise.
8970 (__arm_vmaxq_x_u16): Likewise.
8971 (__arm_vmaxq_x_u32): Likewise.
8972 (__arm_vabdq_x_s8): Likewise.
8973 (__arm_vabdq_x_s16): Likewise.
8974 (__arm_vabdq_x_s32): Likewise.
8975 (__arm_vabdq_x_u8): Likewise.
8976 (__arm_vabdq_x_u16): Likewise.
8977 (__arm_vabdq_x_u32): Likewise.
8978 (__arm_vabsq_x_s8): Likewise.
8979 (__arm_vabsq_x_s16): Likewise.
8980 (__arm_vabsq_x_s32): Likewise.
8981 (__arm_vaddq_x_s8): Likewise.
8982 (__arm_vaddq_x_s16): Likewise.
8983 (__arm_vaddq_x_s32): Likewise.
8984 (__arm_vaddq_x_n_s8): Likewise.
8985 (__arm_vaddq_x_n_s16): Likewise.
8986 (__arm_vaddq_x_n_s32): Likewise.
8987 (__arm_vaddq_x_u8): Likewise.
8988 (__arm_vaddq_x_u16): Likewise.
8989 (__arm_vaddq_x_u32): Likewise.
8990 (__arm_vaddq_x_n_u8): Likewise.
8991 (__arm_vaddq_x_n_u16): Likewise.
8992 (__arm_vaddq_x_n_u32): Likewise.
8993 (__arm_vclsq_x_s8): Likewise.
8994 (__arm_vclsq_x_s16): Likewise.
8995 (__arm_vclsq_x_s32): Likewise.
8996 (__arm_vclzq_x_s8): Likewise.
8997 (__arm_vclzq_x_s16): Likewise.
8998 (__arm_vclzq_x_s32): Likewise.
8999 (__arm_vclzq_x_u8): Likewise.
9000 (__arm_vclzq_x_u16): Likewise.
9001 (__arm_vclzq_x_u32): Likewise.
9002 (__arm_vnegq_x_s8): Likewise.
9003 (__arm_vnegq_x_s16): Likewise.
9004 (__arm_vnegq_x_s32): Likewise.
9005 (__arm_vmulhq_x_s8): Likewise.
9006 (__arm_vmulhq_x_s16): Likewise.
9007 (__arm_vmulhq_x_s32): Likewise.
9008 (__arm_vmulhq_x_u8): Likewise.
9009 (__arm_vmulhq_x_u16): Likewise.
9010 (__arm_vmulhq_x_u32): Likewise.
9011 (__arm_vmullbq_poly_x_p8): Likewise.
9012 (__arm_vmullbq_poly_x_p16): Likewise.
9013 (__arm_vmullbq_int_x_s8): Likewise.
9014 (__arm_vmullbq_int_x_s16): Likewise.
9015 (__arm_vmullbq_int_x_s32): Likewise.
9016 (__arm_vmullbq_int_x_u8): Likewise.
9017 (__arm_vmullbq_int_x_u16): Likewise.
9018 (__arm_vmullbq_int_x_u32): Likewise.
9019 (__arm_vmulltq_poly_x_p8): Likewise.
9020 (__arm_vmulltq_poly_x_p16): Likewise.
9021 (__arm_vmulltq_int_x_s8): Likewise.
9022 (__arm_vmulltq_int_x_s16): Likewise.
9023 (__arm_vmulltq_int_x_s32): Likewise.
9024 (__arm_vmulltq_int_x_u8): Likewise.
9025 (__arm_vmulltq_int_x_u16): Likewise.
9026 (__arm_vmulltq_int_x_u32): Likewise.
9027 (__arm_vmulq_x_s8): Likewise.
9028 (__arm_vmulq_x_s16): Likewise.
9029 (__arm_vmulq_x_s32): Likewise.
9030 (__arm_vmulq_x_n_s8): Likewise.
9031 (__arm_vmulq_x_n_s16): Likewise.
9032 (__arm_vmulq_x_n_s32): Likewise.
9033 (__arm_vmulq_x_u8): Likewise.
9034 (__arm_vmulq_x_u16): Likewise.
9035 (__arm_vmulq_x_u32): Likewise.
9036 (__arm_vmulq_x_n_u8): Likewise.
9037 (__arm_vmulq_x_n_u16): Likewise.
9038 (__arm_vmulq_x_n_u32): Likewise.
9039 (__arm_vsubq_x_s8): Likewise.
9040 (__arm_vsubq_x_s16): Likewise.
9041 (__arm_vsubq_x_s32): Likewise.
9042 (__arm_vsubq_x_n_s8): Likewise.
9043 (__arm_vsubq_x_n_s16): Likewise.
9044 (__arm_vsubq_x_n_s32): Likewise.
9045 (__arm_vsubq_x_u8): Likewise.
9046 (__arm_vsubq_x_u16): Likewise.
9047 (__arm_vsubq_x_u32): Likewise.
9048 (__arm_vsubq_x_n_u8): Likewise.
9049 (__arm_vsubq_x_n_u16): Likewise.
9050 (__arm_vsubq_x_n_u32): Likewise.
9051 (__arm_vcaddq_rot90_x_s8): Likewise.
9052 (__arm_vcaddq_rot90_x_s16): Likewise.
9053 (__arm_vcaddq_rot90_x_s32): Likewise.
9054 (__arm_vcaddq_rot90_x_u8): Likewise.
9055 (__arm_vcaddq_rot90_x_u16): Likewise.
9056 (__arm_vcaddq_rot90_x_u32): Likewise.
9057 (__arm_vcaddq_rot270_x_s8): Likewise.
9058 (__arm_vcaddq_rot270_x_s16): Likewise.
9059 (__arm_vcaddq_rot270_x_s32): Likewise.
9060 (__arm_vcaddq_rot270_x_u8): Likewise.
9061 (__arm_vcaddq_rot270_x_u16): Likewise.
9062 (__arm_vcaddq_rot270_x_u32): Likewise.
9063 (__arm_vhaddq_x_n_s8): Likewise.
9064 (__arm_vhaddq_x_n_s16): Likewise.
9065 (__arm_vhaddq_x_n_s32): Likewise.
9066 (__arm_vhaddq_x_n_u8): Likewise.
9067 (__arm_vhaddq_x_n_u16): Likewise.
9068 (__arm_vhaddq_x_n_u32): Likewise.
9069 (__arm_vhaddq_x_s8): Likewise.
9070 (__arm_vhaddq_x_s16): Likewise.
9071 (__arm_vhaddq_x_s32): Likewise.
9072 (__arm_vhaddq_x_u8): Likewise.
9073 (__arm_vhaddq_x_u16): Likewise.
9074 (__arm_vhaddq_x_u32): Likewise.
9075 (__arm_vhcaddq_rot90_x_s8): Likewise.
9076 (__arm_vhcaddq_rot90_x_s16): Likewise.
9077 (__arm_vhcaddq_rot90_x_s32): Likewise.
9078 (__arm_vhcaddq_rot270_x_s8): Likewise.
9079 (__arm_vhcaddq_rot270_x_s16): Likewise.
9080 (__arm_vhcaddq_rot270_x_s32): Likewise.
9081 (__arm_vhsubq_x_n_s8): Likewise.
9082 (__arm_vhsubq_x_n_s16): Likewise.
9083 (__arm_vhsubq_x_n_s32): Likewise.
9084 (__arm_vhsubq_x_n_u8): Likewise.
9085 (__arm_vhsubq_x_n_u16): Likewise.
9086 (__arm_vhsubq_x_n_u32): Likewise.
9087 (__arm_vhsubq_x_s8): Likewise.
9088 (__arm_vhsubq_x_s16): Likewise.
9089 (__arm_vhsubq_x_s32): Likewise.
9090 (__arm_vhsubq_x_u8): Likewise.
9091 (__arm_vhsubq_x_u16): Likewise.
9092 (__arm_vhsubq_x_u32): Likewise.
9093 (__arm_vrhaddq_x_s8): Likewise.
9094 (__arm_vrhaddq_x_s16): Likewise.
9095 (__arm_vrhaddq_x_s32): Likewise.
9096 (__arm_vrhaddq_x_u8): Likewise.
9097 (__arm_vrhaddq_x_u16): Likewise.
9098 (__arm_vrhaddq_x_u32): Likewise.
9099 (__arm_vrmulhq_x_s8): Likewise.
9100 (__arm_vrmulhq_x_s16): Likewise.
9101 (__arm_vrmulhq_x_s32): Likewise.
9102 (__arm_vrmulhq_x_u8): Likewise.
9103 (__arm_vrmulhq_x_u16): Likewise.
9104 (__arm_vrmulhq_x_u32): Likewise.
9105 (__arm_vandq_x_s8): Likewise.
9106 (__arm_vandq_x_s16): Likewise.
9107 (__arm_vandq_x_s32): Likewise.
9108 (__arm_vandq_x_u8): Likewise.
9109 (__arm_vandq_x_u16): Likewise.
9110 (__arm_vandq_x_u32): Likewise.
9111 (__arm_vbicq_x_s8): Likewise.
9112 (__arm_vbicq_x_s16): Likewise.
9113 (__arm_vbicq_x_s32): Likewise.
9114 (__arm_vbicq_x_u8): Likewise.
9115 (__arm_vbicq_x_u16): Likewise.
9116 (__arm_vbicq_x_u32): Likewise.
9117 (__arm_vbrsrq_x_n_s8): Likewise.
9118 (__arm_vbrsrq_x_n_s16): Likewise.
9119 (__arm_vbrsrq_x_n_s32): Likewise.
9120 (__arm_vbrsrq_x_n_u8): Likewise.
9121 (__arm_vbrsrq_x_n_u16): Likewise.
9122 (__arm_vbrsrq_x_n_u32): Likewise.
9123 (__arm_veorq_x_s8): Likewise.
9124 (__arm_veorq_x_s16): Likewise.
9125 (__arm_veorq_x_s32): Likewise.
9126 (__arm_veorq_x_u8): Likewise.
9127 (__arm_veorq_x_u16): Likewise.
9128 (__arm_veorq_x_u32): Likewise.
9129 (__arm_vmovlbq_x_s8): Likewise.
9130 (__arm_vmovlbq_x_s16): Likewise.
9131 (__arm_vmovlbq_x_u8): Likewise.
9132 (__arm_vmovlbq_x_u16): Likewise.
9133 (__arm_vmovltq_x_s8): Likewise.
9134 (__arm_vmovltq_x_s16): Likewise.
9135 (__arm_vmovltq_x_u8): Likewise.
9136 (__arm_vmovltq_x_u16): Likewise.
9137 (__arm_vmvnq_x_s8): Likewise.
9138 (__arm_vmvnq_x_s16): Likewise.
9139 (__arm_vmvnq_x_s32): Likewise.
9140 (__arm_vmvnq_x_u8): Likewise.
9141 (__arm_vmvnq_x_u16): Likewise.
9142 (__arm_vmvnq_x_u32): Likewise.
9143 (__arm_vmvnq_x_n_s16): Likewise.
9144 (__arm_vmvnq_x_n_s32): Likewise.
9145 (__arm_vmvnq_x_n_u16): Likewise.
9146 (__arm_vmvnq_x_n_u32): Likewise.
9147 (__arm_vornq_x_s8): Likewise.
9148 (__arm_vornq_x_s16): Likewise.
9149 (__arm_vornq_x_s32): Likewise.
9150 (__arm_vornq_x_u8): Likewise.
9151 (__arm_vornq_x_u16): Likewise.
9152 (__arm_vornq_x_u32): Likewise.
9153 (__arm_vorrq_x_s8): Likewise.
9154 (__arm_vorrq_x_s16): Likewise.
9155 (__arm_vorrq_x_s32): Likewise.
9156 (__arm_vorrq_x_u8): Likewise.
9157 (__arm_vorrq_x_u16): Likewise.
9158 (__arm_vorrq_x_u32): Likewise.
9159 (__arm_vrev16q_x_s8): Likewise.
9160 (__arm_vrev16q_x_u8): Likewise.
9161 (__arm_vrev32q_x_s8): Likewise.
9162 (__arm_vrev32q_x_s16): Likewise.
9163 (__arm_vrev32q_x_u8): Likewise.
9164 (__arm_vrev32q_x_u16): Likewise.
9165 (__arm_vrev64q_x_s8): Likewise.
9166 (__arm_vrev64q_x_s16): Likewise.
9167 (__arm_vrev64q_x_s32): Likewise.
9168 (__arm_vrev64q_x_u8): Likewise.
9169 (__arm_vrev64q_x_u16): Likewise.
9170 (__arm_vrev64q_x_u32): Likewise.
9171 (__arm_vrshlq_x_s8): Likewise.
9172 (__arm_vrshlq_x_s16): Likewise.
9173 (__arm_vrshlq_x_s32): Likewise.
9174 (__arm_vrshlq_x_u8): Likewise.
9175 (__arm_vrshlq_x_u16): Likewise.
9176 (__arm_vrshlq_x_u32): Likewise.
9177 (__arm_vshllbq_x_n_s8): Likewise.
9178 (__arm_vshllbq_x_n_s16): Likewise.
9179 (__arm_vshllbq_x_n_u8): Likewise.
9180 (__arm_vshllbq_x_n_u16): Likewise.
9181 (__arm_vshlltq_x_n_s8): Likewise.
9182 (__arm_vshlltq_x_n_s16): Likewise.
9183 (__arm_vshlltq_x_n_u8): Likewise.
9184 (__arm_vshlltq_x_n_u16): Likewise.
9185 (__arm_vshlq_x_s8): Likewise.
9186 (__arm_vshlq_x_s16): Likewise.
9187 (__arm_vshlq_x_s32): Likewise.
9188 (__arm_vshlq_x_u8): Likewise.
9189 (__arm_vshlq_x_u16): Likewise.
9190 (__arm_vshlq_x_u32): Likewise.
9191 (__arm_vshlq_x_n_s8): Likewise.
9192 (__arm_vshlq_x_n_s16): Likewise.
9193 (__arm_vshlq_x_n_s32): Likewise.
9194 (__arm_vshlq_x_n_u8): Likewise.
9195 (__arm_vshlq_x_n_u16): Likewise.
9196 (__arm_vshlq_x_n_u32): Likewise.
9197 (__arm_vrshrq_x_n_s8): Likewise.
9198 (__arm_vrshrq_x_n_s16): Likewise.
9199 (__arm_vrshrq_x_n_s32): Likewise.
9200 (__arm_vrshrq_x_n_u8): Likewise.
9201 (__arm_vrshrq_x_n_u16): Likewise.
9202 (__arm_vrshrq_x_n_u32): Likewise.
9203 (__arm_vshrq_x_n_s8): Likewise.
9204 (__arm_vshrq_x_n_s16): Likewise.
9205 (__arm_vshrq_x_n_s32): Likewise.
9206 (__arm_vshrq_x_n_u8): Likewise.
9207 (__arm_vshrq_x_n_u16): Likewise.
9208 (__arm_vshrq_x_n_u32): Likewise.
9209 (__arm_vdupq_x_n_f16): Likewise.
9210 (__arm_vdupq_x_n_f32): Likewise.
9211 (__arm_vminnmq_x_f16): Likewise.
9212 (__arm_vminnmq_x_f32): Likewise.
9213 (__arm_vmaxnmq_x_f16): Likewise.
9214 (__arm_vmaxnmq_x_f32): Likewise.
9215 (__arm_vabdq_x_f16): Likewise.
9216 (__arm_vabdq_x_f32): Likewise.
9217 (__arm_vabsq_x_f16): Likewise.
9218 (__arm_vabsq_x_f32): Likewise.
9219 (__arm_vaddq_x_f16): Likewise.
9220 (__arm_vaddq_x_f32): Likewise.
9221 (__arm_vaddq_x_n_f16): Likewise.
9222 (__arm_vaddq_x_n_f32): Likewise.
9223 (__arm_vnegq_x_f16): Likewise.
9224 (__arm_vnegq_x_f32): Likewise.
9225 (__arm_vmulq_x_f16): Likewise.
9226 (__arm_vmulq_x_f32): Likewise.
9227 (__arm_vmulq_x_n_f16): Likewise.
9228 (__arm_vmulq_x_n_f32): Likewise.
9229 (__arm_vsubq_x_f16): Likewise.
9230 (__arm_vsubq_x_f32): Likewise.
9231 (__arm_vsubq_x_n_f16): Likewise.
9232 (__arm_vsubq_x_n_f32): Likewise.
9233 (__arm_vcaddq_rot90_x_f16): Likewise.
9234 (__arm_vcaddq_rot90_x_f32): Likewise.
9235 (__arm_vcaddq_rot270_x_f16): Likewise.
9236 (__arm_vcaddq_rot270_x_f32): Likewise.
9237 (__arm_vcmulq_x_f16): Likewise.
9238 (__arm_vcmulq_x_f32): Likewise.
9239 (__arm_vcmulq_rot90_x_f16): Likewise.
9240 (__arm_vcmulq_rot90_x_f32): Likewise.
9241 (__arm_vcmulq_rot180_x_f16): Likewise.
9242 (__arm_vcmulq_rot180_x_f32): Likewise.
9243 (__arm_vcmulq_rot270_x_f16): Likewise.
9244 (__arm_vcmulq_rot270_x_f32): Likewise.
9245 (__arm_vcvtaq_x_s16_f16): Likewise.
9246 (__arm_vcvtaq_x_s32_f32): Likewise.
9247 (__arm_vcvtaq_x_u16_f16): Likewise.
9248 (__arm_vcvtaq_x_u32_f32): Likewise.
9249 (__arm_vcvtnq_x_s16_f16): Likewise.
9250 (__arm_vcvtnq_x_s32_f32): Likewise.
9251 (__arm_vcvtnq_x_u16_f16): Likewise.
9252 (__arm_vcvtnq_x_u32_f32): Likewise.
9253 (__arm_vcvtpq_x_s16_f16): Likewise.
9254 (__arm_vcvtpq_x_s32_f32): Likewise.
9255 (__arm_vcvtpq_x_u16_f16): Likewise.
9256 (__arm_vcvtpq_x_u32_f32): Likewise.
9257 (__arm_vcvtmq_x_s16_f16): Likewise.
9258 (__arm_vcvtmq_x_s32_f32): Likewise.
9259 (__arm_vcvtmq_x_u16_f16): Likewise.
9260 (__arm_vcvtmq_x_u32_f32): Likewise.
9261 (__arm_vcvtbq_x_f32_f16): Likewise.
9262 (__arm_vcvttq_x_f32_f16): Likewise.
9263 (__arm_vcvtq_x_f16_u16): Likewise.
9264 (__arm_vcvtq_x_f16_s16): Likewise.
9265 (__arm_vcvtq_x_f32_s32): Likewise.
9266 (__arm_vcvtq_x_f32_u32): Likewise.
9267 (__arm_vcvtq_x_n_f16_s16): Likewise.
9268 (__arm_vcvtq_x_n_f16_u16): Likewise.
9269 (__arm_vcvtq_x_n_f32_s32): Likewise.
9270 (__arm_vcvtq_x_n_f32_u32): Likewise.
9271 (__arm_vcvtq_x_s16_f16): Likewise.
9272 (__arm_vcvtq_x_s32_f32): Likewise.
9273 (__arm_vcvtq_x_u16_f16): Likewise.
9274 (__arm_vcvtq_x_u32_f32): Likewise.
9275 (__arm_vcvtq_x_n_s16_f16): Likewise.
9276 (__arm_vcvtq_x_n_s32_f32): Likewise.
9277 (__arm_vcvtq_x_n_u16_f16): Likewise.
9278 (__arm_vcvtq_x_n_u32_f32): Likewise.
9279 (__arm_vrndq_x_f16): Likewise.
9280 (__arm_vrndq_x_f32): Likewise.
9281 (__arm_vrndnq_x_f16): Likewise.
9282 (__arm_vrndnq_x_f32): Likewise.
9283 (__arm_vrndmq_x_f16): Likewise.
9284 (__arm_vrndmq_x_f32): Likewise.
9285 (__arm_vrndpq_x_f16): Likewise.
9286 (__arm_vrndpq_x_f32): Likewise.
9287 (__arm_vrndaq_x_f16): Likewise.
9288 (__arm_vrndaq_x_f32): Likewise.
9289 (__arm_vrndxq_x_f16): Likewise.
9290 (__arm_vrndxq_x_f32): Likewise.
9291 (__arm_vandq_x_f16): Likewise.
9292 (__arm_vandq_x_f32): Likewise.
9293 (__arm_vbicq_x_f16): Likewise.
9294 (__arm_vbicq_x_f32): Likewise.
9295 (__arm_vbrsrq_x_n_f16): Likewise.
9296 (__arm_vbrsrq_x_n_f32): Likewise.
9297 (__arm_veorq_x_f16): Likewise.
9298 (__arm_veorq_x_f32): Likewise.
9299 (__arm_vornq_x_f16): Likewise.
9300 (__arm_vornq_x_f32): Likewise.
9301 (__arm_vorrq_x_f16): Likewise.
9302 (__arm_vorrq_x_f32): Likewise.
9303 (__arm_vrev32q_x_f16): Likewise.
9304 (__arm_vrev64q_x_f16): Likewise.
9305 (__arm_vrev64q_x_f32): Likewise.
9306 (vabdq_x): Define polymorphic variant.
9307 (vabsq_x): Likewise.
9308 (vaddq_x): Likewise.
9309 (vandq_x): Likewise.
9310 (vbicq_x): Likewise.
9311 (vbrsrq_x): Likewise.
9312 (vcaddq_rot270_x): Likewise.
9313 (vcaddq_rot90_x): Likewise.
9314 (vcmulq_rot180_x): Likewise.
9315 (vcmulq_rot270_x): Likewise.
9316 (vcmulq_x): Likewise.
9317 (vcvtq_x): Likewise.
9318 (vcvtq_x_n): Likewise.
9319 (vcvtnq_m): Likewise.
9320 (veorq_x): Likewise.
9321 (vmaxnmq_x): Likewise.
9322 (vminnmq_x): Likewise.
9323 (vmulq_x): Likewise.
9324 (vnegq_x): Likewise.
9325 (vornq_x): Likewise.
9326 (vorrq_x): Likewise.
9327 (vrev32q_x): Likewise.
9328 (vrev64q_x): Likewise.
9329 (vrndaq_x): Likewise.
9330 (vrndmq_x): Likewise.
9331 (vrndnq_x): Likewise.
9332 (vrndpq_x): Likewise.
9333 (vrndq_x): Likewise.
9334 (vrndxq_x): Likewise.
9335 (vsubq_x): Likewise.
9336 (vcmulq_rot90_x): Likewise.
9338 (vclsq_x): Likewise.
9339 (vclzq_x): Likewise.
9340 (vhaddq_x): Likewise.
9341 (vhcaddq_rot270_x): Likewise.
9342 (vhcaddq_rot90_x): Likewise.
9343 (vhsubq_x): Likewise.
9344 (vmaxq_x): Likewise.
9345 (vminq_x): Likewise.
9346 (vmovlbq_x): Likewise.
9347 (vmovltq_x): Likewise.
9348 (vmulhq_x): Likewise.
9349 (vmullbq_int_x): Likewise.
9350 (vmullbq_poly_x): Likewise.
9351 (vmulltq_int_x): Likewise.
9352 (vmulltq_poly_x): Likewise.
9353 (vmvnq_x): Likewise.
9354 (vrev16q_x): Likewise.
9355 (vrhaddq_x): Likewise.
9356 (vrmulhq_x): Likewise.
9357 (vrshlq_x): Likewise.
9358 (vrshrq_x): Likewise.
9359 (vshllbq_x): Likewise.
9360 (vshlltq_x): Likewise.
9361 (vshlq_x_n): Likewise.
9362 (vshlq_x): Likewise.
9363 (vdwdupq_x_u8): Likewise.
9364 (vdwdupq_x_u16): Likewise.
9365 (vdwdupq_x_u32): Likewise.
9366 (viwdupq_x_u8): Likewise.
9367 (viwdupq_x_u16): Likewise.
9368 (viwdupq_x_u32): Likewise.
9369 (vidupq_x_u8): Likewise.
9370 (vddupq_x_u8): Likewise.
9371 (vidupq_x_u16): Likewise.
9372 (vddupq_x_u16): Likewise.
9373 (vidupq_x_u32): Likewise.
9374 (vddupq_x_u32): Likewise.
9375 (vshrq_x): Likewise.
9377 2020-03-20 Richard Biener <rguenther@suse.de>
9379 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
9380 to vectorize for CTOR defs.
9382 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9383 Andre Vieira <andre.simoesdiasvieira@arm.com>
9384 Mihail Ionescu <mihail.ionescu@arm.com>
9386 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
9388 (LDRGBWBU_QUALIFIERS): Likewise.
9389 (LDRGBWBS_Z_QUALIFIERS): Likewise.
9390 (LDRGBWBU_Z_QUALIFIERS): Likewise.
9391 (STRSBWBS_QUALIFIERS): Likewise.
9392 (STRSBWBU_QUALIFIERS): Likewise.
9393 (STRSBWBS_P_QUALIFIERS): Likewise.
9394 (STRSBWBU_P_QUALIFIERS): Likewise.
9395 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
9396 (vldrdq_gather_base_wb_u64): Likewise.
9397 (vldrdq_gather_base_wb_z_s64): Likewise.
9398 (vldrdq_gather_base_wb_z_u64): Likewise.
9399 (vldrwq_gather_base_wb_f32): Likewise.
9400 (vldrwq_gather_base_wb_s32): Likewise.
9401 (vldrwq_gather_base_wb_u32): Likewise.
9402 (vldrwq_gather_base_wb_z_f32): Likewise.
9403 (vldrwq_gather_base_wb_z_s32): Likewise.
9404 (vldrwq_gather_base_wb_z_u32): Likewise.
9405 (vstrdq_scatter_base_wb_p_s64): Likewise.
9406 (vstrdq_scatter_base_wb_p_u64): Likewise.
9407 (vstrdq_scatter_base_wb_s64): Likewise.
9408 (vstrdq_scatter_base_wb_u64): Likewise.
9409 (vstrwq_scatter_base_wb_p_s32): Likewise.
9410 (vstrwq_scatter_base_wb_p_f32): Likewise.
9411 (vstrwq_scatter_base_wb_p_u32): Likewise.
9412 (vstrwq_scatter_base_wb_s32): Likewise.
9413 (vstrwq_scatter_base_wb_u32): Likewise.
9414 (vstrwq_scatter_base_wb_f32): Likewise.
9415 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
9416 (__arm_vldrdq_gather_base_wb_u64): Likewise.
9417 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
9418 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
9419 (__arm_vldrwq_gather_base_wb_s32): Likewise.
9420 (__arm_vldrwq_gather_base_wb_u32): Likewise.
9421 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
9422 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
9423 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
9424 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
9425 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
9426 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
9427 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
9428 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
9429 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
9430 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
9431 (__arm_vldrwq_gather_base_wb_f32): Likewise.
9432 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
9433 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
9434 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
9435 (vstrwq_scatter_base_wb): Define polymorphic variant.
9436 (vstrwq_scatter_base_wb_p): Likewise.
9437 (vstrdq_scatter_base_wb_p): Likewise.
9438 (vstrdq_scatter_base_wb): Likewise.
9439 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
9441 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
9443 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
9444 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
9445 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
9446 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
9447 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
9448 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
9449 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
9450 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
9451 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
9452 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
9453 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
9454 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
9455 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
9456 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
9457 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
9458 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
9459 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
9460 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
9461 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
9462 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
9463 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
9464 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
9465 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
9466 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
9467 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
9468 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
9469 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
9470 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
9471 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
9473 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9474 Andre Vieira <andre.simoesdiasvieira@arm.com>
9475 Mihail Ionescu <mihail.ionescu@arm.com>
9477 * config/arm/arm-builtins.c
9478 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
9480 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
9481 (vddupq_m_n_u32): Likewise.
9482 (vddupq_m_n_u16): Likewise.
9483 (vddupq_m_wb_u8): Likewise.
9484 (vddupq_m_wb_u16): Likewise.
9485 (vddupq_m_wb_u32): Likewise.
9486 (vddupq_n_u8): Likewise.
9487 (vddupq_n_u32): Likewise.
9488 (vddupq_n_u16): Likewise.
9489 (vddupq_wb_u8): Likewise.
9490 (vddupq_wb_u16): Likewise.
9491 (vddupq_wb_u32): Likewise.
9492 (vdwdupq_m_n_u8): Likewise.
9493 (vdwdupq_m_n_u32): Likewise.
9494 (vdwdupq_m_n_u16): Likewise.
9495 (vdwdupq_m_wb_u8): Likewise.
9496 (vdwdupq_m_wb_u32): Likewise.
9497 (vdwdupq_m_wb_u16): Likewise.
9498 (vdwdupq_n_u8): Likewise.
9499 (vdwdupq_n_u32): Likewise.
9500 (vdwdupq_n_u16): Likewise.
9501 (vdwdupq_wb_u8): Likewise.
9502 (vdwdupq_wb_u32): Likewise.
9503 (vdwdupq_wb_u16): Likewise.
9504 (vidupq_m_n_u8): Likewise.
9505 (vidupq_m_n_u32): Likewise.
9506 (vidupq_m_n_u16): Likewise.
9507 (vidupq_m_wb_u8): Likewise.
9508 (vidupq_m_wb_u16): Likewise.
9509 (vidupq_m_wb_u32): Likewise.
9510 (vidupq_n_u8): Likewise.
9511 (vidupq_n_u32): Likewise.
9512 (vidupq_n_u16): Likewise.
9513 (vidupq_wb_u8): Likewise.
9514 (vidupq_wb_u16): Likewise.
9515 (vidupq_wb_u32): Likewise.
9516 (viwdupq_m_n_u8): Likewise.
9517 (viwdupq_m_n_u32): Likewise.
9518 (viwdupq_m_n_u16): Likewise.
9519 (viwdupq_m_wb_u8): Likewise.
9520 (viwdupq_m_wb_u32): Likewise.
9521 (viwdupq_m_wb_u16): Likewise.
9522 (viwdupq_n_u8): Likewise.
9523 (viwdupq_n_u32): Likewise.
9524 (viwdupq_n_u16): Likewise.
9525 (viwdupq_wb_u8): Likewise.
9526 (viwdupq_wb_u32): Likewise.
9527 (viwdupq_wb_u16): Likewise.
9528 (__arm_vddupq_m_n_u8): Define intrinsic.
9529 (__arm_vddupq_m_n_u32): Likewise.
9530 (__arm_vddupq_m_n_u16): Likewise.
9531 (__arm_vddupq_m_wb_u8): Likewise.
9532 (__arm_vddupq_m_wb_u16): Likewise.
9533 (__arm_vddupq_m_wb_u32): Likewise.
9534 (__arm_vddupq_n_u8): Likewise.
9535 (__arm_vddupq_n_u32): Likewise.
9536 (__arm_vddupq_n_u16): Likewise.
9537 (__arm_vdwdupq_m_n_u8): Likewise.
9538 (__arm_vdwdupq_m_n_u32): Likewise.
9539 (__arm_vdwdupq_m_n_u16): Likewise.
9540 (__arm_vdwdupq_m_wb_u8): Likewise.
9541 (__arm_vdwdupq_m_wb_u32): Likewise.
9542 (__arm_vdwdupq_m_wb_u16): Likewise.
9543 (__arm_vdwdupq_n_u8): Likewise.
9544 (__arm_vdwdupq_n_u32): Likewise.
9545 (__arm_vdwdupq_n_u16): Likewise.
9546 (__arm_vdwdupq_wb_u8): Likewise.
9547 (__arm_vdwdupq_wb_u32): Likewise.
9548 (__arm_vdwdupq_wb_u16): Likewise.
9549 (__arm_vidupq_m_n_u8): Likewise.
9550 (__arm_vidupq_m_n_u32): Likewise.
9551 (__arm_vidupq_m_n_u16): Likewise.
9552 (__arm_vidupq_n_u8): Likewise.
9553 (__arm_vidupq_m_wb_u8): Likewise.
9554 (__arm_vidupq_m_wb_u16): Likewise.
9555 (__arm_vidupq_m_wb_u32): Likewise.
9556 (__arm_vidupq_n_u32): Likewise.
9557 (__arm_vidupq_n_u16): Likewise.
9558 (__arm_vidupq_wb_u8): Likewise.
9559 (__arm_vidupq_wb_u16): Likewise.
9560 (__arm_vidupq_wb_u32): Likewise.
9561 (__arm_vddupq_wb_u8): Likewise.
9562 (__arm_vddupq_wb_u16): Likewise.
9563 (__arm_vddupq_wb_u32): Likewise.
9564 (__arm_viwdupq_m_n_u8): Likewise.
9565 (__arm_viwdupq_m_n_u32): Likewise.
9566 (__arm_viwdupq_m_n_u16): Likewise.
9567 (__arm_viwdupq_m_wb_u8): Likewise.
9568 (__arm_viwdupq_m_wb_u32): Likewise.
9569 (__arm_viwdupq_m_wb_u16): Likewise.
9570 (__arm_viwdupq_n_u8): Likewise.
9571 (__arm_viwdupq_n_u32): Likewise.
9572 (__arm_viwdupq_n_u16): Likewise.
9573 (__arm_viwdupq_wb_u8): Likewise.
9574 (__arm_viwdupq_wb_u32): Likewise.
9575 (__arm_viwdupq_wb_u16): Likewise.
9576 (vidupq_m): Define polymorphic variant.
9577 (vddupq_m): Likewise.
9578 (vidupq_u16): Likewise.
9579 (vidupq_u32): Likewise.
9580 (vidupq_u8): Likewise.
9581 (vddupq_u16): Likewise.
9582 (vddupq_u32): Likewise.
9583 (vddupq_u8): Likewise.
9584 (viwdupq_m): Likewise.
9585 (viwdupq_u16): Likewise.
9586 (viwdupq_u32): Likewise.
9587 (viwdupq_u8): Likewise.
9588 (vdwdupq_m): Likewise.
9589 (vdwdupq_u16): Likewise.
9590 (vdwdupq_u32): Likewise.
9591 (vdwdupq_u8): Likewise.
9592 * config/arm/arm_mve_builtins.def
9593 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
9595 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
9596 (mve_vidupq_u<mode>_insn): Likewise.
9597 (mve_vidupq_m_n_u<mode>): Likewise.
9598 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
9599 (mve_vddupq_n_u<mode>): Likewise.
9600 (mve_vddupq_u<mode>_insn): Likewise.
9601 (mve_vddupq_m_n_u<mode>): Likewise.
9602 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
9603 (mve_vdwdupq_n_u<mode>): Likewise.
9604 (mve_vdwdupq_wb_u<mode>): Likewise.
9605 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
9606 (mve_vdwdupq_m_n_u<mode>): Likewise.
9607 (mve_vdwdupq_m_wb_u<mode>): Likewise.
9608 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
9609 (mve_viwdupq_n_u<mode>): Likewise.
9610 (mve_viwdupq_wb_u<mode>): Likewise.
9611 (mve_viwdupq_wb_u<mode>_insn): Likewise.
9612 (mve_viwdupq_m_n_u<mode>): Likewise.
9613 (mve_viwdupq_m_wb_u<mode>): Likewise.
9614 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
9616 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9618 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
9619 (vreinterpretq_s16_s64): Likewise.
9620 (vreinterpretq_s16_s8): Likewise.
9621 (vreinterpretq_s16_u16): Likewise.
9622 (vreinterpretq_s16_u32): Likewise.
9623 (vreinterpretq_s16_u64): Likewise.
9624 (vreinterpretq_s16_u8): Likewise.
9625 (vreinterpretq_s32_s16): Likewise.
9626 (vreinterpretq_s32_s64): Likewise.
9627 (vreinterpretq_s32_s8): Likewise.
9628 (vreinterpretq_s32_u16): Likewise.
9629 (vreinterpretq_s32_u32): Likewise.
9630 (vreinterpretq_s32_u64): Likewise.
9631 (vreinterpretq_s32_u8): Likewise.
9632 (vreinterpretq_s64_s16): Likewise.
9633 (vreinterpretq_s64_s32): Likewise.
9634 (vreinterpretq_s64_s8): Likewise.
9635 (vreinterpretq_s64_u16): Likewise.
9636 (vreinterpretq_s64_u32): Likewise.
9637 (vreinterpretq_s64_u64): Likewise.
9638 (vreinterpretq_s64_u8): Likewise.
9639 (vreinterpretq_s8_s16): Likewise.
9640 (vreinterpretq_s8_s32): Likewise.
9641 (vreinterpretq_s8_s64): Likewise.
9642 (vreinterpretq_s8_u16): Likewise.
9643 (vreinterpretq_s8_u32): Likewise.
9644 (vreinterpretq_s8_u64): Likewise.
9645 (vreinterpretq_s8_u8): Likewise.
9646 (vreinterpretq_u16_s16): Likewise.
9647 (vreinterpretq_u16_s32): Likewise.
9648 (vreinterpretq_u16_s64): Likewise.
9649 (vreinterpretq_u16_s8): Likewise.
9650 (vreinterpretq_u16_u32): Likewise.
9651 (vreinterpretq_u16_u64): Likewise.
9652 (vreinterpretq_u16_u8): Likewise.
9653 (vreinterpretq_u32_s16): Likewise.
9654 (vreinterpretq_u32_s32): Likewise.
9655 (vreinterpretq_u32_s64): Likewise.
9656 (vreinterpretq_u32_s8): Likewise.
9657 (vreinterpretq_u32_u16): Likewise.
9658 (vreinterpretq_u32_u64): Likewise.
9659 (vreinterpretq_u32_u8): Likewise.
9660 (vreinterpretq_u64_s16): Likewise.
9661 (vreinterpretq_u64_s32): Likewise.
9662 (vreinterpretq_u64_s64): Likewise.
9663 (vreinterpretq_u64_s8): Likewise.
9664 (vreinterpretq_u64_u16): Likewise.
9665 (vreinterpretq_u64_u32): Likewise.
9666 (vreinterpretq_u64_u8): Likewise.
9667 (vreinterpretq_u8_s16): Likewise.
9668 (vreinterpretq_u8_s32): Likewise.
9669 (vreinterpretq_u8_s64): Likewise.
9670 (vreinterpretq_u8_s8): Likewise.
9671 (vreinterpretq_u8_u16): Likewise.
9672 (vreinterpretq_u8_u32): Likewise.
9673 (vreinterpretq_u8_u64): Likewise.
9674 (vreinterpretq_s32_f16): Likewise.
9675 (vreinterpretq_s32_f32): Likewise.
9676 (vreinterpretq_u16_f16): Likewise.
9677 (vreinterpretq_u16_f32): Likewise.
9678 (vreinterpretq_u32_f16): Likewise.
9679 (vreinterpretq_u32_f32): Likewise.
9680 (vreinterpretq_u64_f16): Likewise.
9681 (vreinterpretq_u64_f32): Likewise.
9682 (vreinterpretq_u8_f16): Likewise.
9683 (vreinterpretq_u8_f32): Likewise.
9684 (vreinterpretq_f16_f32): Likewise.
9685 (vreinterpretq_f16_s16): Likewise.
9686 (vreinterpretq_f16_s32): Likewise.
9687 (vreinterpretq_f16_s64): Likewise.
9688 (vreinterpretq_f16_s8): Likewise.
9689 (vreinterpretq_f16_u16): Likewise.
9690 (vreinterpretq_f16_u32): Likewise.
9691 (vreinterpretq_f16_u64): Likewise.
9692 (vreinterpretq_f16_u8): Likewise.
9693 (vreinterpretq_f32_f16): Likewise.
9694 (vreinterpretq_f32_s16): Likewise.
9695 (vreinterpretq_f32_s32): Likewise.
9696 (vreinterpretq_f32_s64): Likewise.
9697 (vreinterpretq_f32_s8): Likewise.
9698 (vreinterpretq_f32_u16): Likewise.
9699 (vreinterpretq_f32_u32): Likewise.
9700 (vreinterpretq_f32_u64): Likewise.
9701 (vreinterpretq_f32_u8): Likewise.
9702 (vreinterpretq_s16_f16): Likewise.
9703 (vreinterpretq_s16_f32): Likewise.
9704 (vreinterpretq_s64_f16): Likewise.
9705 (vreinterpretq_s64_f32): Likewise.
9706 (vreinterpretq_s8_f16): Likewise.
9707 (vreinterpretq_s8_f32): Likewise.
9708 (vuninitializedq_u8): Likewise.
9709 (vuninitializedq_u16): Likewise.
9710 (vuninitializedq_u32): Likewise.
9711 (vuninitializedq_u64): Likewise.
9712 (vuninitializedq_s8): Likewise.
9713 (vuninitializedq_s16): Likewise.
9714 (vuninitializedq_s32): Likewise.
9715 (vuninitializedq_s64): Likewise.
9716 (vuninitializedq_f16): Likewise.
9717 (vuninitializedq_f32): Likewise.
9718 (__arm_vuninitializedq_u8): Define intrinsic.
9719 (__arm_vuninitializedq_u16): Likewise.
9720 (__arm_vuninitializedq_u32): Likewise.
9721 (__arm_vuninitializedq_u64): Likewise.
9722 (__arm_vuninitializedq_s8): Likewise.
9723 (__arm_vuninitializedq_s16): Likewise.
9724 (__arm_vuninitializedq_s32): Likewise.
9725 (__arm_vuninitializedq_s64): Likewise.
9726 (__arm_vreinterpretq_s16_s32): Likewise.
9727 (__arm_vreinterpretq_s16_s64): Likewise.
9728 (__arm_vreinterpretq_s16_s8): Likewise.
9729 (__arm_vreinterpretq_s16_u16): Likewise.
9730 (__arm_vreinterpretq_s16_u32): Likewise.
9731 (__arm_vreinterpretq_s16_u64): Likewise.
9732 (__arm_vreinterpretq_s16_u8): Likewise.
9733 (__arm_vreinterpretq_s32_s16): Likewise.
9734 (__arm_vreinterpretq_s32_s64): Likewise.
9735 (__arm_vreinterpretq_s32_s8): Likewise.
9736 (__arm_vreinterpretq_s32_u16): Likewise.
9737 (__arm_vreinterpretq_s32_u32): Likewise.
9738 (__arm_vreinterpretq_s32_u64): Likewise.
9739 (__arm_vreinterpretq_s32_u8): Likewise.
9740 (__arm_vreinterpretq_s64_s16): Likewise.
9741 (__arm_vreinterpretq_s64_s32): Likewise.
9742 (__arm_vreinterpretq_s64_s8): Likewise.
9743 (__arm_vreinterpretq_s64_u16): Likewise.
9744 (__arm_vreinterpretq_s64_u32): Likewise.
9745 (__arm_vreinterpretq_s64_u64): Likewise.
9746 (__arm_vreinterpretq_s64_u8): Likewise.
9747 (__arm_vreinterpretq_s8_s16): Likewise.
9748 (__arm_vreinterpretq_s8_s32): Likewise.
9749 (__arm_vreinterpretq_s8_s64): Likewise.
9750 (__arm_vreinterpretq_s8_u16): Likewise.
9751 (__arm_vreinterpretq_s8_u32): Likewise.
9752 (__arm_vreinterpretq_s8_u64): Likewise.
9753 (__arm_vreinterpretq_s8_u8): Likewise.
9754 (__arm_vreinterpretq_u16_s16): Likewise.
9755 (__arm_vreinterpretq_u16_s32): Likewise.
9756 (__arm_vreinterpretq_u16_s64): Likewise.
9757 (__arm_vreinterpretq_u16_s8): Likewise.
9758 (__arm_vreinterpretq_u16_u32): Likewise.
9759 (__arm_vreinterpretq_u16_u64): Likewise.
9760 (__arm_vreinterpretq_u16_u8): Likewise.
9761 (__arm_vreinterpretq_u32_s16): Likewise.
9762 (__arm_vreinterpretq_u32_s32): Likewise.
9763 (__arm_vreinterpretq_u32_s64): Likewise.
9764 (__arm_vreinterpretq_u32_s8): Likewise.
9765 (__arm_vreinterpretq_u32_u16): Likewise.
9766 (__arm_vreinterpretq_u32_u64): Likewise.
9767 (__arm_vreinterpretq_u32_u8): Likewise.
9768 (__arm_vreinterpretq_u64_s16): Likewise.
9769 (__arm_vreinterpretq_u64_s32): Likewise.
9770 (__arm_vreinterpretq_u64_s64): Likewise.
9771 (__arm_vreinterpretq_u64_s8): Likewise.
9772 (__arm_vreinterpretq_u64_u16): Likewise.
9773 (__arm_vreinterpretq_u64_u32): Likewise.
9774 (__arm_vreinterpretq_u64_u8): Likewise.
9775 (__arm_vreinterpretq_u8_s16): Likewise.
9776 (__arm_vreinterpretq_u8_s32): Likewise.
9777 (__arm_vreinterpretq_u8_s64): Likewise.
9778 (__arm_vreinterpretq_u8_s8): Likewise.
9779 (__arm_vreinterpretq_u8_u16): Likewise.
9780 (__arm_vreinterpretq_u8_u32): Likewise.
9781 (__arm_vreinterpretq_u8_u64): Likewise.
9782 (__arm_vuninitializedq_f16): Likewise.
9783 (__arm_vuninitializedq_f32): Likewise.
9784 (__arm_vreinterpretq_s32_f16): Likewise.
9785 (__arm_vreinterpretq_s32_f32): Likewise.
9786 (__arm_vreinterpretq_s16_f16): Likewise.
9787 (__arm_vreinterpretq_s16_f32): Likewise.
9788 (__arm_vreinterpretq_s64_f16): Likewise.
9789 (__arm_vreinterpretq_s64_f32): Likewise.
9790 (__arm_vreinterpretq_s8_f16): Likewise.
9791 (__arm_vreinterpretq_s8_f32): Likewise.
9792 (__arm_vreinterpretq_u16_f16): Likewise.
9793 (__arm_vreinterpretq_u16_f32): Likewise.
9794 (__arm_vreinterpretq_u32_f16): Likewise.
9795 (__arm_vreinterpretq_u32_f32): Likewise.
9796 (__arm_vreinterpretq_u64_f16): Likewise.
9797 (__arm_vreinterpretq_u64_f32): Likewise.
9798 (__arm_vreinterpretq_u8_f16): Likewise.
9799 (__arm_vreinterpretq_u8_f32): Likewise.
9800 (__arm_vreinterpretq_f16_f32): Likewise.
9801 (__arm_vreinterpretq_f16_s16): Likewise.
9802 (__arm_vreinterpretq_f16_s32): Likewise.
9803 (__arm_vreinterpretq_f16_s64): Likewise.
9804 (__arm_vreinterpretq_f16_s8): Likewise.
9805 (__arm_vreinterpretq_f16_u16): Likewise.
9806 (__arm_vreinterpretq_f16_u32): Likewise.
9807 (__arm_vreinterpretq_f16_u64): Likewise.
9808 (__arm_vreinterpretq_f16_u8): Likewise.
9809 (__arm_vreinterpretq_f32_f16): Likewise.
9810 (__arm_vreinterpretq_f32_s16): Likewise.
9811 (__arm_vreinterpretq_f32_s32): Likewise.
9812 (__arm_vreinterpretq_f32_s64): Likewise.
9813 (__arm_vreinterpretq_f32_s8): Likewise.
9814 (__arm_vreinterpretq_f32_u16): Likewise.
9815 (__arm_vreinterpretq_f32_u32): Likewise.
9816 (__arm_vreinterpretq_f32_u64): Likewise.
9817 (__arm_vreinterpretq_f32_u8): Likewise.
9818 (vuninitializedq): Define polymorphic variant.
9819 (vreinterpretq_f16): Likewise.
9820 (vreinterpretq_f32): Likewise.
9821 (vreinterpretq_s16): Likewise.
9822 (vreinterpretq_s32): Likewise.
9823 (vreinterpretq_s64): Likewise.
9824 (vreinterpretq_s8): Likewise.
9825 (vreinterpretq_u16): Likewise.
9826 (vreinterpretq_u32): Likewise.
9827 (vreinterpretq_u64): Likewise.
9828 (vreinterpretq_u8): Likewise.
9830 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9831 Andre Vieira <andre.simoesdiasvieira@arm.com>
9832 Mihail Ionescu <mihail.ionescu@arm.com>
9834 * config/arm/arm_mve.h (vaddq_s8): Define macro.
9835 (vaddq_s16): Likewise.
9836 (vaddq_s32): Likewise.
9837 (vaddq_u8): Likewise.
9838 (vaddq_u16): Likewise.
9839 (vaddq_u32): Likewise.
9840 (vaddq_f16): Likewise.
9841 (vaddq_f32): Likewise.
9842 (__arm_vaddq_s8): Define intrinsic.
9843 (__arm_vaddq_s16): Likewise.
9844 (__arm_vaddq_s32): Likewise.
9845 (__arm_vaddq_u8): Likewise.
9846 (__arm_vaddq_u16): Likewise.
9847 (__arm_vaddq_u32): Likewise.
9848 (__arm_vaddq_f16): Likewise.
9849 (__arm_vaddq_f32): Likewise.
9850 (vaddq): Define polymorphic variant.
9851 * config/arm/iterators.md (VNIM): Define mode iterator for common types
9852 Neon, IWMMXT and MVE.
9853 (VNINOTM): Likewise.
9854 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
9855 (mve_vaddq_f<mode>): Define RTL pattern.
9856 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
9857 (addv8hf3_neon): Define RTL pattern.
9858 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
9860 (addv8hf3): Define standard RTL pattern for MVE and Neon.
9861 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
9863 2020-03-20 Martin Liska <mliska@suse.cz>
9866 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
9867 build_ref_for_offset function was used and it transforms off to bytes
9870 2020-03-20 Richard Biener <rguenther@suse.de>
9872 PR tree-optimization/94266
9873 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
9874 type of the underlying object to adjust for the containing
9877 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9879 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
9880 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
9881 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
9883 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9885 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
9887 2020-03-20 Jakub Jelinek <jakub@redhat.com>
9889 PR tree-optimization/94224
9890 * gimple-ssa-store-merging.c
9891 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
9892 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
9895 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9897 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
9899 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
9902 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
9903 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
9905 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
9908 * cgraphunit.c (process_function_and_variable_attributes): warn
9909 for flatten attribute on alias.
9910 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
9912 2020-03-19 Martin Liska <mliska@suse.cz>
9914 * lto-section-in.c: Add ext_symtab.
9915 * lto-streamer-out.c (write_symbol_extension_info): New.
9916 (produce_symtab_extension): New.
9917 (produce_asm_for_decls): Stream also produce_symtab_extension.
9918 * lto-streamer.h (enum lto_section_type): New section.
9920 2020-03-19 Jakub Jelinek <jakub@redhat.com>
9922 PR tree-optimization/94211
9923 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
9924 instead of estimate_num_insns for bb_seq (middle_bb). Rename
9925 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
9928 2020-03-19 Richard Biener <rguenther@suse.de>
9931 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
9932 and build_ref_for_offset.
9934 2020-03-19 Richard Biener <rguenther@suse.de>
9937 * fold-const.c (fold_binary_loc): Avoid using
9938 build_fold_addr_expr when we really want an ADDR_EXPR.
9940 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
9942 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
9945 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
9947 PR rtl-optimization/90275
9948 * cse.c (cse_insn): Delete no-op register moves too.
9950 2020-03-18 Martin Sebor <msebor@redhat.com>
9953 * cgraphunit.c (process_function_and_variable_attributes): Also
9954 complain about weakref function definitions and drop all effects
9957 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9958 Mihail Ionescu <mihail.ionescu@arm.com>
9959 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9961 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
9962 (vstrdq_scatter_base_p_u64): Likewise.
9963 (vstrdq_scatter_base_s64): Likewise.
9964 (vstrdq_scatter_base_u64): Likewise.
9965 (vstrdq_scatter_offset_p_s64): Likewise.
9966 (vstrdq_scatter_offset_p_u64): Likewise.
9967 (vstrdq_scatter_offset_s64): Likewise.
9968 (vstrdq_scatter_offset_u64): Likewise.
9969 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
9970 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
9971 (vstrdq_scatter_shifted_offset_s64): Likewise.
9972 (vstrdq_scatter_shifted_offset_u64): Likewise.
9973 (vstrhq_scatter_offset_f16): Likewise.
9974 (vstrhq_scatter_offset_p_f16): Likewise.
9975 (vstrhq_scatter_shifted_offset_f16): Likewise.
9976 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
9977 (vstrwq_scatter_base_f32): Likewise.
9978 (vstrwq_scatter_base_p_f32): Likewise.
9979 (vstrwq_scatter_offset_f32): Likewise.
9980 (vstrwq_scatter_offset_p_f32): Likewise.
9981 (vstrwq_scatter_offset_p_s32): Likewise.
9982 (vstrwq_scatter_offset_p_u32): Likewise.
9983 (vstrwq_scatter_offset_s32): Likewise.
9984 (vstrwq_scatter_offset_u32): Likewise.
9985 (vstrwq_scatter_shifted_offset_f32): Likewise.
9986 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
9987 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
9988 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
9989 (vstrwq_scatter_shifted_offset_s32): Likewise.
9990 (vstrwq_scatter_shifted_offset_u32): Likewise.
9991 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
9992 (__arm_vstrdq_scatter_base_p_u64): Likewise.
9993 (__arm_vstrdq_scatter_base_s64): Likewise.
9994 (__arm_vstrdq_scatter_base_u64): Likewise.
9995 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
9996 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
9997 (__arm_vstrdq_scatter_offset_s64): Likewise.
9998 (__arm_vstrdq_scatter_offset_u64): Likewise.
9999 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
10000 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
10001 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
10002 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
10003 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
10004 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
10005 (__arm_vstrwq_scatter_offset_s32): Likewise.
10006 (__arm_vstrwq_scatter_offset_u32): Likewise.
10007 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
10008 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
10009 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
10010 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
10011 (__arm_vstrhq_scatter_offset_f16): Likewise.
10012 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
10013 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
10014 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
10015 (__arm_vstrwq_scatter_base_f32): Likewise.
10016 (__arm_vstrwq_scatter_base_p_f32): Likewise.
10017 (__arm_vstrwq_scatter_offset_f32): Likewise.
10018 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
10019 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
10020 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
10021 (vstrhq_scatter_offset): Define polymorphic variant.
10022 (vstrhq_scatter_offset_p): Likewise.
10023 (vstrhq_scatter_shifted_offset): Likewise.
10024 (vstrhq_scatter_shifted_offset_p): Likewise.
10025 (vstrwq_scatter_base): Likewise.
10026 (vstrwq_scatter_base_p): Likewise.
10027 (vstrwq_scatter_offset): Likewise.
10028 (vstrwq_scatter_offset_p): Likewise.
10029 (vstrwq_scatter_shifted_offset): Likewise.
10030 (vstrwq_scatter_shifted_offset_p): Likewise.
10031 (vstrdq_scatter_base_p): Likewise.
10032 (vstrdq_scatter_base): Likewise.
10033 (vstrdq_scatter_offset_p): Likewise.
10034 (vstrdq_scatter_offset): Likewise.
10035 (vstrdq_scatter_shifted_offset_p): Likewise.
10036 (vstrdq_scatter_shifted_offset): Likewise.
10037 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
10038 (STRSBS_P): Likewise.
10039 (STRSBU): Likewise.
10040 (STRSBU_P): Likewise.
10042 (STRSS_P): Likewise.
10044 (STRSU_P): Likewise.
10045 * config/arm/constraints.md (Ri): Define.
10046 * config/arm/mve.md (VSTRDSBQ): Define iterator.
10047 (VSTRDSOQ): Likewise.
10048 (VSTRDSSOQ): Likewise.
10049 (VSTRWSOQ): Likewise.
10050 (VSTRWSSOQ): Likewise.
10051 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
10052 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
10053 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
10054 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
10055 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
10056 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
10057 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
10058 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
10059 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
10060 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
10061 (mve_vstrwq_scatter_base_fv4sf): Likewise.
10062 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
10063 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
10064 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
10065 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
10066 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
10067 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
10068 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
10069 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
10070 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
10071 * config/arm/predicates.md (Ri): Define predicate to check immediate
10072 is the range +/-1016 and multiple of 8.
10074 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10075 Mihail Ionescu <mihail.ionescu@arm.com>
10076 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10078 * config/arm/arm_mve.h (vst1q_f32): Define macro.
10079 (vst1q_f16): Likewise.
10080 (vst1q_s8): Likewise.
10081 (vst1q_s32): Likewise.
10082 (vst1q_s16): Likewise.
10083 (vst1q_u8): Likewise.
10084 (vst1q_u32): Likewise.
10085 (vst1q_u16): Likewise.
10086 (vstrhq_f16): Likewise.
10087 (vstrhq_scatter_offset_s32): Likewise.
10088 (vstrhq_scatter_offset_s16): Likewise.
10089 (vstrhq_scatter_offset_u32): Likewise.
10090 (vstrhq_scatter_offset_u16): Likewise.
10091 (vstrhq_scatter_offset_p_s32): Likewise.
10092 (vstrhq_scatter_offset_p_s16): Likewise.
10093 (vstrhq_scatter_offset_p_u32): Likewise.
10094 (vstrhq_scatter_offset_p_u16): Likewise.
10095 (vstrhq_scatter_shifted_offset_s32): Likewise.
10096 (vstrhq_scatter_shifted_offset_s16): Likewise.
10097 (vstrhq_scatter_shifted_offset_u32): Likewise.
10098 (vstrhq_scatter_shifted_offset_u16): Likewise.
10099 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
10100 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
10101 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
10102 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
10103 (vstrhq_s32): Likewise.
10104 (vstrhq_s16): Likewise.
10105 (vstrhq_u32): Likewise.
10106 (vstrhq_u16): Likewise.
10107 (vstrhq_p_f16): Likewise.
10108 (vstrhq_p_s32): Likewise.
10109 (vstrhq_p_s16): Likewise.
10110 (vstrhq_p_u32): Likewise.
10111 (vstrhq_p_u16): Likewise.
10112 (vstrwq_f32): Likewise.
10113 (vstrwq_s32): Likewise.
10114 (vstrwq_u32): Likewise.
10115 (vstrwq_p_f32): Likewise.
10116 (vstrwq_p_s32): Likewise.
10117 (vstrwq_p_u32): Likewise.
10118 (__arm_vst1q_s8): Define intrinsic.
10119 (__arm_vst1q_s32): Likewise.
10120 (__arm_vst1q_s16): Likewise.
10121 (__arm_vst1q_u8): Likewise.
10122 (__arm_vst1q_u32): Likewise.
10123 (__arm_vst1q_u16): Likewise.
10124 (__arm_vstrhq_scatter_offset_s32): Likewise.
10125 (__arm_vstrhq_scatter_offset_s16): Likewise.
10126 (__arm_vstrhq_scatter_offset_u32): Likewise.
10127 (__arm_vstrhq_scatter_offset_u16): Likewise.
10128 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
10129 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
10130 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
10131 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
10132 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
10133 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
10134 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
10135 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
10136 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
10137 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
10138 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
10139 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
10140 (__arm_vstrhq_s32): Likewise.
10141 (__arm_vstrhq_s16): Likewise.
10142 (__arm_vstrhq_u32): Likewise.
10143 (__arm_vstrhq_u16): Likewise.
10144 (__arm_vstrhq_p_s32): Likewise.
10145 (__arm_vstrhq_p_s16): Likewise.
10146 (__arm_vstrhq_p_u32): Likewise.
10147 (__arm_vstrhq_p_u16): Likewise.
10148 (__arm_vstrwq_s32): Likewise.
10149 (__arm_vstrwq_u32): Likewise.
10150 (__arm_vstrwq_p_s32): Likewise.
10151 (__arm_vstrwq_p_u32): Likewise.
10152 (__arm_vstrwq_p_f32): Likewise.
10153 (__arm_vstrwq_f32): Likewise.
10154 (__arm_vst1q_f32): Likewise.
10155 (__arm_vst1q_f16): Likewise.
10156 (__arm_vstrhq_f16): Likewise.
10157 (__arm_vstrhq_p_f16): Likewise.
10158 (vst1q): Define polymorphic variant.
10159 (vstrhq): Likewise.
10160 (vstrhq_p): Likewise.
10161 (vstrhq_scatter_offset_p): Likewise.
10162 (vstrhq_scatter_offset): Likewise.
10163 (vstrhq_scatter_shifted_offset_p): Likewise.
10164 (vstrhq_scatter_shifted_offset): Likewise.
10165 (vstrwq_p): Likewise.
10166 (vstrwq): Likewise.
10167 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
10168 (STRS_P): Likewise.
10170 (STRSS_P): Likewise.
10172 (STRSU_P): Likewise.
10174 (STRU_P): Likewise.
10175 * config/arm/mve.md (VST1Q): Define iterator.
10176 (VSTRHSOQ): Likewise.
10177 (VSTRHSSOQ): Likewise.
10178 (VSTRHQ): Likewise.
10179 (VSTRWQ): Likewise.
10180 (mve_vstrhq_fv8hf): Define RTL pattern.
10181 (mve_vstrhq_p_fv8hf): Likewise.
10182 (mve_vstrhq_p_<supf><mode>): Likewise.
10183 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
10184 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
10185 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
10186 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
10187 (mve_vstrhq_<supf><mode>): Likewise.
10188 (mve_vstrwq_fv4sf): Likewise.
10189 (mve_vstrwq_p_fv4sf): Likewise.
10190 (mve_vstrwq_p_<supf>v4si): Likewise.
10191 (mve_vstrwq_<supf>v4si): Likewise.
10192 (mve_vst1q_f<mode>): Define expand.
10193 (mve_vst1q_<supf><mode>): Likewise.
10195 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10196 Mihail Ionescu <mihail.ionescu@arm.com>
10197 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10199 * config/arm/arm_mve.h (vld1q_s8): Define macro.
10200 (vld1q_s32): Likewise.
10201 (vld1q_s16): Likewise.
10202 (vld1q_u8): Likewise.
10203 (vld1q_u32): Likewise.
10204 (vld1q_u16): Likewise.
10205 (vldrhq_gather_offset_s32): Likewise.
10206 (vldrhq_gather_offset_s16): Likewise.
10207 (vldrhq_gather_offset_u32): Likewise.
10208 (vldrhq_gather_offset_u16): Likewise.
10209 (vldrhq_gather_offset_z_s32): Likewise.
10210 (vldrhq_gather_offset_z_s16): Likewise.
10211 (vldrhq_gather_offset_z_u32): Likewise.
10212 (vldrhq_gather_offset_z_u16): Likewise.
10213 (vldrhq_gather_shifted_offset_s32): Likewise.
10214 (vldrhq_gather_shifted_offset_s16): Likewise.
10215 (vldrhq_gather_shifted_offset_u32): Likewise.
10216 (vldrhq_gather_shifted_offset_u16): Likewise.
10217 (vldrhq_gather_shifted_offset_z_s32): Likewise.
10218 (vldrhq_gather_shifted_offset_z_s16): Likewise.
10219 (vldrhq_gather_shifted_offset_z_u32): Likewise.
10220 (vldrhq_gather_shifted_offset_z_u16): Likewise.
10221 (vldrhq_s32): Likewise.
10222 (vldrhq_s16): Likewise.
10223 (vldrhq_u32): Likewise.
10224 (vldrhq_u16): Likewise.
10225 (vldrhq_z_s32): Likewise.
10226 (vldrhq_z_s16): Likewise.
10227 (vldrhq_z_u32): Likewise.
10228 (vldrhq_z_u16): Likewise.
10229 (vldrwq_s32): Likewise.
10230 (vldrwq_u32): Likewise.
10231 (vldrwq_z_s32): Likewise.
10232 (vldrwq_z_u32): Likewise.
10233 (vld1q_f32): Likewise.
10234 (vld1q_f16): Likewise.
10235 (vldrhq_f16): Likewise.
10236 (vldrhq_z_f16): Likewise.
10237 (vldrwq_f32): Likewise.
10238 (vldrwq_z_f32): Likewise.
10239 (__arm_vld1q_s8): Define intrinsic.
10240 (__arm_vld1q_s32): Likewise.
10241 (__arm_vld1q_s16): Likewise.
10242 (__arm_vld1q_u8): Likewise.
10243 (__arm_vld1q_u32): Likewise.
10244 (__arm_vld1q_u16): Likewise.
10245 (__arm_vldrhq_gather_offset_s32): Likewise.
10246 (__arm_vldrhq_gather_offset_s16): Likewise.
10247 (__arm_vldrhq_gather_offset_u32): Likewise.
10248 (__arm_vldrhq_gather_offset_u16): Likewise.
10249 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10250 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10251 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10252 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10253 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10254 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10255 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10256 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10257 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10258 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10259 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10260 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10261 (__arm_vldrhq_s32): Likewise.
10262 (__arm_vldrhq_s16): Likewise.
10263 (__arm_vldrhq_u32): Likewise.
10264 (__arm_vldrhq_u16): Likewise.
10265 (__arm_vldrhq_z_s32): Likewise.
10266 (__arm_vldrhq_z_s16): Likewise.
10267 (__arm_vldrhq_z_u32): Likewise.
10268 (__arm_vldrhq_z_u16): Likewise.
10269 (__arm_vldrwq_s32): Likewise.
10270 (__arm_vldrwq_u32): Likewise.
10271 (__arm_vldrwq_z_s32): Likewise.
10272 (__arm_vldrwq_z_u32): Likewise.
10273 (__arm_vld1q_f32): Likewise.
10274 (__arm_vld1q_f16): Likewise.
10275 (__arm_vldrwq_f32): Likewise.
10276 (__arm_vldrwq_z_f32): Likewise.
10277 (__arm_vldrhq_z_f16): Likewise.
10278 (__arm_vldrhq_f16): Likewise.
10279 (vld1q): Define polymorphic variant.
10280 (vldrhq_gather_offset): Likewise.
10281 (vldrhq_gather_offset_z): Likewise.
10282 (vldrhq_gather_shifted_offset): Likewise.
10283 (vldrhq_gather_shifted_offset_z): Likewise.
10284 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
10286 (LDRU_Z): Likewise.
10287 (LDRS_Z): Likewise.
10288 (LDRGU_Z): Likewise.
10290 (LDRGS_Z): Likewise.
10292 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
10293 (V_sz_elem1): Likewise.
10294 (VLD1Q): Define iterator.
10295 (VLDRHGOQ): Likewise.
10296 (VLDRHGSOQ): Likewise.
10297 (VLDRHQ): Likewise.
10298 (VLDRWQ): Likewise.
10299 (mve_vldrhq_fv8hf): Define RTL pattern.
10300 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
10301 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
10302 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
10303 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
10304 (mve_vldrhq_<supf><mode>): Likewise.
10305 (mve_vldrhq_z_fv8hf): Likewise.
10306 (mve_vldrhq_z_<supf><mode>): Likewise.
10307 (mve_vldrwq_fv4sf): Likewise.
10308 (mve_vldrwq_<supf>v4si): Likewise.
10309 (mve_vldrwq_z_fv4sf): Likewise.
10310 (mve_vldrwq_z_<supf>v4si): Likewise.
10311 (mve_vld1q_f<mode>): Define RTL expand pattern.
10312 (mve_vld1q_<supf><mode>): Likewise.
10314 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10315 Mihail Ionescu <mihail.ionescu@arm.com>
10316 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10318 * config/arm/arm_mve.h (vld1q_s8): Define macro.
10319 (vld1q_s32): Likewise.
10320 (vld1q_s16): Likewise.
10321 (vld1q_u8): Likewise.
10322 (vld1q_u32): Likewise.
10323 (vld1q_u16): Likewise.
10324 (vldrhq_gather_offset_s32): Likewise.
10325 (vldrhq_gather_offset_s16): Likewise.
10326 (vldrhq_gather_offset_u32): Likewise.
10327 (vldrhq_gather_offset_u16): Likewise.
10328 (vldrhq_gather_offset_z_s32): Likewise.
10329 (vldrhq_gather_offset_z_s16): Likewise.
10330 (vldrhq_gather_offset_z_u32): Likewise.
10331 (vldrhq_gather_offset_z_u16): Likewise.
10332 (vldrhq_gather_shifted_offset_s32): Likewise.
10333 (vldrhq_gather_shifted_offset_s16): Likewise.
10334 (vldrhq_gather_shifted_offset_u32): Likewise.
10335 (vldrhq_gather_shifted_offset_u16): Likewise.
10336 (vldrhq_gather_shifted_offset_z_s32): Likewise.
10337 (vldrhq_gather_shifted_offset_z_s16): Likewise.
10338 (vldrhq_gather_shifted_offset_z_u32): Likewise.
10339 (vldrhq_gather_shifted_offset_z_u16): Likewise.
10340 (vldrhq_s32): Likewise.
10341 (vldrhq_s16): Likewise.
10342 (vldrhq_u32): Likewise.
10343 (vldrhq_u16): Likewise.
10344 (vldrhq_z_s32): Likewise.
10345 (vldrhq_z_s16): Likewise.
10346 (vldrhq_z_u32): Likewise.
10347 (vldrhq_z_u16): Likewise.
10348 (vldrwq_s32): Likewise.
10349 (vldrwq_u32): Likewise.
10350 (vldrwq_z_s32): Likewise.
10351 (vldrwq_z_u32): Likewise.
10352 (vld1q_f32): Likewise.
10353 (vld1q_f16): Likewise.
10354 (vldrhq_f16): Likewise.
10355 (vldrhq_z_f16): Likewise.
10356 (vldrwq_f32): Likewise.
10357 (vldrwq_z_f32): Likewise.
10358 (__arm_vld1q_s8): Define intrinsic.
10359 (__arm_vld1q_s32): Likewise.
10360 (__arm_vld1q_s16): Likewise.
10361 (__arm_vld1q_u8): Likewise.
10362 (__arm_vld1q_u32): Likewise.
10363 (__arm_vld1q_u16): Likewise.
10364 (__arm_vldrhq_gather_offset_s32): Likewise.
10365 (__arm_vldrhq_gather_offset_s16): Likewise.
10366 (__arm_vldrhq_gather_offset_u32): Likewise.
10367 (__arm_vldrhq_gather_offset_u16): Likewise.
10368 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10369 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10370 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10371 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10372 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10373 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10374 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10375 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10376 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10377 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10378 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10379 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10380 (__arm_vldrhq_s32): Likewise.
10381 (__arm_vldrhq_s16): Likewise.
10382 (__arm_vldrhq_u32): Likewise.
10383 (__arm_vldrhq_u16): Likewise.
10384 (__arm_vldrhq_z_s32): Likewise.
10385 (__arm_vldrhq_z_s16): Likewise.
10386 (__arm_vldrhq_z_u32): Likewise.
10387 (__arm_vldrhq_z_u16): Likewise.
10388 (__arm_vldrwq_s32): Likewise.
10389 (__arm_vldrwq_u32): Likewise.
10390 (__arm_vldrwq_z_s32): Likewise.
10391 (__arm_vldrwq_z_u32): Likewise.
10392 (__arm_vld1q_f32): Likewise.
10393 (__arm_vld1q_f16): Likewise.
10394 (__arm_vldrwq_f32): Likewise.
10395 (__arm_vldrwq_z_f32): Likewise.
10396 (__arm_vldrhq_z_f16): Likewise.
10397 (__arm_vldrhq_f16): Likewise.
10398 (vld1q): Define polymorphic variant.
10399 (vldrhq_gather_offset): Likewise.
10400 (vldrhq_gather_offset_z): Likewise.
10401 (vldrhq_gather_shifted_offset): Likewise.
10402 (vldrhq_gather_shifted_offset_z): Likewise.
10403 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
10405 (LDRU_Z): Likewise.
10406 (LDRS_Z): Likewise.
10407 (LDRGU_Z): Likewise.
10409 (LDRGS_Z): Likewise.
10411 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
10412 (V_sz_elem1): Likewise.
10413 (VLD1Q): Define iterator.
10414 (VLDRHGOQ): Likewise.
10415 (VLDRHGSOQ): Likewise.
10416 (VLDRHQ): Likewise.
10417 (VLDRWQ): Likewise.
10418 (mve_vldrhq_fv8hf): Define RTL pattern.
10419 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
10420 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
10421 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
10422 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
10423 (mve_vldrhq_<supf><mode>): Likewise.
10424 (mve_vldrhq_z_fv8hf): Likewise.
10425 (mve_vldrhq_z_<supf><mode>): Likewise.
10426 (mve_vldrwq_fv4sf): Likewise.
10427 (mve_vldrwq_<supf>v4si): Likewise.
10428 (mve_vldrwq_z_fv4sf): Likewise.
10429 (mve_vldrwq_z_<supf>v4si): Likewise.
10430 (mve_vld1q_f<mode>): Define RTL expand pattern.
10431 (mve_vld1q_<supf><mode>): Likewise.
10433 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10434 Mihail Ionescu <mihail.ionescu@arm.com>
10435 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10437 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
10439 (LDRGBU_Z_QUALIFIERS): Likewise.
10440 (LDRGS_Z_QUALIFIERS): Likewise.
10441 (LDRGU_Z_QUALIFIERS): Likewise.
10442 (LDRS_Z_QUALIFIERS): Likewise.
10443 (LDRU_Z_QUALIFIERS): Likewise.
10444 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
10445 (vldrbq_gather_offset_z_u8): Likewise.
10446 (vldrbq_gather_offset_z_s32): Likewise.
10447 (vldrbq_gather_offset_z_u16): Likewise.
10448 (vldrbq_gather_offset_z_u32): Likewise.
10449 (vldrbq_gather_offset_z_s8): Likewise.
10450 (vldrbq_z_s16): Likewise.
10451 (vldrbq_z_u8): Likewise.
10452 (vldrbq_z_s8): Likewise.
10453 (vldrbq_z_s32): Likewise.
10454 (vldrbq_z_u16): Likewise.
10455 (vldrbq_z_u32): Likewise.
10456 (vldrwq_gather_base_z_u32): Likewise.
10457 (vldrwq_gather_base_z_s32): Likewise.
10458 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
10459 (__arm_vldrbq_gather_offset_z_s32): Likewise.
10460 (__arm_vldrbq_gather_offset_z_s16): Likewise.
10461 (__arm_vldrbq_gather_offset_z_u8): Likewise.
10462 (__arm_vldrbq_gather_offset_z_u32): Likewise.
10463 (__arm_vldrbq_gather_offset_z_u16): Likewise.
10464 (__arm_vldrbq_z_s8): Likewise.
10465 (__arm_vldrbq_z_s32): Likewise.
10466 (__arm_vldrbq_z_s16): Likewise.
10467 (__arm_vldrbq_z_u8): Likewise.
10468 (__arm_vldrbq_z_u32): Likewise.
10469 (__arm_vldrbq_z_u16): Likewise.
10470 (__arm_vldrwq_gather_base_z_s32): Likewise.
10471 (__arm_vldrwq_gather_base_z_u32): Likewise.
10472 (vldrbq_gather_offset_z): Define polymorphic variant.
10473 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
10475 (LDRGBU_Z_QUALIFIERS): Likewise.
10476 (LDRGS_Z_QUALIFIERS): Likewise.
10477 (LDRGU_Z_QUALIFIERS): Likewise.
10478 (LDRS_Z_QUALIFIERS): Likewise.
10479 (LDRU_Z_QUALIFIERS): Likewise.
10480 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
10482 (mve_vldrbq_z_<supf><mode>): Likewise.
10483 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
10485 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10486 Mihail Ionescu <mihail.ionescu@arm.com>
10487 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10489 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
10491 (STRU_P_QUALIFIERS): Likewise.
10492 (STRSU_P_QUALIFIERS): Likewise.
10493 (STRSS_P_QUALIFIERS): Likewise.
10494 (STRSBS_P_QUALIFIERS): Likewise.
10495 (STRSBU_P_QUALIFIERS): Likewise.
10496 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
10497 (vstrbq_p_s32): Likewise.
10498 (vstrbq_p_s16): Likewise.
10499 (vstrbq_p_u8): Likewise.
10500 (vstrbq_p_u32): Likewise.
10501 (vstrbq_p_u16): Likewise.
10502 (vstrbq_scatter_offset_p_s8): Likewise.
10503 (vstrbq_scatter_offset_p_s32): Likewise.
10504 (vstrbq_scatter_offset_p_s16): Likewise.
10505 (vstrbq_scatter_offset_p_u8): Likewise.
10506 (vstrbq_scatter_offset_p_u32): Likewise.
10507 (vstrbq_scatter_offset_p_u16): Likewise.
10508 (vstrwq_scatter_base_p_s32): Likewise.
10509 (vstrwq_scatter_base_p_u32): Likewise.
10510 (__arm_vstrbq_p_s8): Define intrinsic.
10511 (__arm_vstrbq_p_s32): Likewise.
10512 (__arm_vstrbq_p_s16): Likewise.
10513 (__arm_vstrbq_p_u8): Likewise.
10514 (__arm_vstrbq_p_u32): Likewise.
10515 (__arm_vstrbq_p_u16): Likewise.
10516 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
10517 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
10518 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
10519 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
10520 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
10521 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
10522 (__arm_vstrwq_scatter_base_p_s32): Likewise.
10523 (__arm_vstrwq_scatter_base_p_u32): Likewise.
10524 (vstrbq_p): Define polymorphic variant.
10525 (vstrbq_scatter_offset_p): Likewise.
10526 (vstrwq_scatter_base_p): Likewise.
10527 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
10529 (STRU_P_QUALIFIERS): Likewise.
10530 (STRSU_P_QUALIFIERS): Likewise.
10531 (STRSS_P_QUALIFIERS): Likewise.
10532 (STRSBS_P_QUALIFIERS): Likewise.
10533 (STRSBU_P_QUALIFIERS): Likewise.
10534 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
10536 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
10537 (mve_vstrbq_p_<supf><mode>): Likewise.
10539 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10540 Mihail Ionescu <mihail.ionescu@arm.com>
10541 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10543 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
10545 (LDRGS_QUALIFIERS): Likewise.
10546 (LDRS_QUALIFIERS): Likewise.
10547 (LDRU_QUALIFIERS): Likewise.
10548 (LDRGBS_QUALIFIERS): Likewise.
10549 (LDRGBU_QUALIFIERS): Likewise.
10550 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
10551 (vldrbq_gather_offset_s8): Likewise.
10552 (vldrbq_s8): Likewise.
10553 (vldrbq_u8): Likewise.
10554 (vldrbq_gather_offset_u16): Likewise.
10555 (vldrbq_gather_offset_s16): Likewise.
10556 (vldrbq_s16): Likewise.
10557 (vldrbq_u16): Likewise.
10558 (vldrbq_gather_offset_u32): Likewise.
10559 (vldrbq_gather_offset_s32): Likewise.
10560 (vldrbq_s32): Likewise.
10561 (vldrbq_u32): Likewise.
10562 (vldrwq_gather_base_s32): Likewise.
10563 (vldrwq_gather_base_u32): Likewise.
10564 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
10565 (__arm_vldrbq_gather_offset_s8): Likewise.
10566 (__arm_vldrbq_s8): Likewise.
10567 (__arm_vldrbq_u8): Likewise.
10568 (__arm_vldrbq_gather_offset_u16): Likewise.
10569 (__arm_vldrbq_gather_offset_s16): Likewise.
10570 (__arm_vldrbq_s16): Likewise.
10571 (__arm_vldrbq_u16): Likewise.
10572 (__arm_vldrbq_gather_offset_u32): Likewise.
10573 (__arm_vldrbq_gather_offset_s32): Likewise.
10574 (__arm_vldrbq_s32): Likewise.
10575 (__arm_vldrbq_u32): Likewise.
10576 (__arm_vldrwq_gather_base_s32): Likewise.
10577 (__arm_vldrwq_gather_base_u32): Likewise.
10578 (vldrbq_gather_offset): Define polymorphic variant.
10579 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
10581 (LDRGS_QUALIFIERS): Likewise.
10582 (LDRS_QUALIFIERS): Likewise.
10583 (LDRU_QUALIFIERS): Likewise.
10584 (LDRGBS_QUALIFIERS): Likewise.
10585 (LDRGBU_QUALIFIERS): Likewise.
10586 * config/arm/mve.md (VLDRBGOQ): Define iterator.
10587 (VLDRBQ): Likewise.
10588 (VLDRWGBQ): Likewise.
10589 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
10590 (mve_vldrbq_<supf><mode>): Likewise.
10591 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
10593 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10594 Mihail Ionescu <mihail.ionescu@arm.com>
10595 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10597 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
10598 (STRU_QUALIFIERS): Likewise.
10599 (STRSS_QUALIFIERS): Likewise.
10600 (STRSU_QUALIFIERS): Likewise.
10601 (STRSBS_QUALIFIERS): Likewise.
10602 (STRSBU_QUALIFIERS): Likewise.
10603 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
10604 (vstrbq_u8): Likewise.
10605 (vstrbq_u16): Likewise.
10606 (vstrbq_scatter_offset_s8): Likewise.
10607 (vstrbq_scatter_offset_u8): Likewise.
10608 (vstrbq_scatter_offset_u16): Likewise.
10609 (vstrbq_s16): Likewise.
10610 (vstrbq_u32): Likewise.
10611 (vstrbq_scatter_offset_s16): Likewise.
10612 (vstrbq_scatter_offset_u32): Likewise.
10613 (vstrbq_s32): Likewise.
10614 (vstrbq_scatter_offset_s32): Likewise.
10615 (vstrwq_scatter_base_s32): Likewise.
10616 (vstrwq_scatter_base_u32): Likewise.
10617 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
10618 (__arm_vstrbq_scatter_offset_s32): Likewise.
10619 (__arm_vstrbq_scatter_offset_s16): Likewise.
10620 (__arm_vstrbq_scatter_offset_u8): Likewise.
10621 (__arm_vstrbq_scatter_offset_u32): Likewise.
10622 (__arm_vstrbq_scatter_offset_u16): Likewise.
10623 (__arm_vstrbq_s8): Likewise.
10624 (__arm_vstrbq_s32): Likewise.
10625 (__arm_vstrbq_s16): Likewise.
10626 (__arm_vstrbq_u8): Likewise.
10627 (__arm_vstrbq_u32): Likewise.
10628 (__arm_vstrbq_u16): Likewise.
10629 (__arm_vstrwq_scatter_base_s32): Likewise.
10630 (__arm_vstrwq_scatter_base_u32): Likewise.
10631 (vstrbq): Define polymorphic variant.
10632 (vstrbq_scatter_offset): Likewise.
10633 (vstrwq_scatter_base): Likewise.
10634 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
10636 (STRU_QUALIFIERS): Likewise.
10637 (STRSS_QUALIFIERS): Likewise.
10638 (STRSU_QUALIFIERS): Likewise.
10639 (STRSBS_QUALIFIERS): Likewise.
10640 (STRSBU_QUALIFIERS): Likewise.
10641 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
10642 (VSTRWSBQ): Define iterators.
10643 (VSTRBSOQ): Likewise.
10644 (VSTRBQ): Likewise.
10645 (mve_vstrbq_<supf><mode>): Define RTL pattern.
10646 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
10647 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
10649 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10650 Mihail Ionescu <mihail.ionescu@arm.com>
10651 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10653 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
10654 (vabdq_m_f16): Likewise.
10655 (vaddq_m_f32): Likewise.
10656 (vaddq_m_f16): Likewise.
10657 (vaddq_m_n_f32): Likewise.
10658 (vaddq_m_n_f16): Likewise.
10659 (vandq_m_f32): Likewise.
10660 (vandq_m_f16): Likewise.
10661 (vbicq_m_f32): Likewise.
10662 (vbicq_m_f16): Likewise.
10663 (vbrsrq_m_n_f32): Likewise.
10664 (vbrsrq_m_n_f16): Likewise.
10665 (vcaddq_rot270_m_f32): Likewise.
10666 (vcaddq_rot270_m_f16): Likewise.
10667 (vcaddq_rot90_m_f32): Likewise.
10668 (vcaddq_rot90_m_f16): Likewise.
10669 (vcmlaq_m_f32): Likewise.
10670 (vcmlaq_m_f16): Likewise.
10671 (vcmlaq_rot180_m_f32): Likewise.
10672 (vcmlaq_rot180_m_f16): Likewise.
10673 (vcmlaq_rot270_m_f32): Likewise.
10674 (vcmlaq_rot270_m_f16): Likewise.
10675 (vcmlaq_rot90_m_f32): Likewise.
10676 (vcmlaq_rot90_m_f16): Likewise.
10677 (vcmulq_m_f32): Likewise.
10678 (vcmulq_m_f16): Likewise.
10679 (vcmulq_rot180_m_f32): Likewise.
10680 (vcmulq_rot180_m_f16): Likewise.
10681 (vcmulq_rot270_m_f32): Likewise.
10682 (vcmulq_rot270_m_f16): Likewise.
10683 (vcmulq_rot90_m_f32): Likewise.
10684 (vcmulq_rot90_m_f16): Likewise.
10685 (vcvtq_m_n_s32_f32): Likewise.
10686 (vcvtq_m_n_s16_f16): Likewise.
10687 (vcvtq_m_n_u32_f32): Likewise.
10688 (vcvtq_m_n_u16_f16): Likewise.
10689 (veorq_m_f32): Likewise.
10690 (veorq_m_f16): Likewise.
10691 (vfmaq_m_f32): Likewise.
10692 (vfmaq_m_f16): Likewise.
10693 (vfmaq_m_n_f32): Likewise.
10694 (vfmaq_m_n_f16): Likewise.
10695 (vfmasq_m_n_f32): Likewise.
10696 (vfmasq_m_n_f16): Likewise.
10697 (vfmsq_m_f32): Likewise.
10698 (vfmsq_m_f16): Likewise.
10699 (vmaxnmq_m_f32): Likewise.
10700 (vmaxnmq_m_f16): Likewise.
10701 (vminnmq_m_f32): Likewise.
10702 (vminnmq_m_f16): Likewise.
10703 (vmulq_m_f32): Likewise.
10704 (vmulq_m_f16): Likewise.
10705 (vmulq_m_n_f32): Likewise.
10706 (vmulq_m_n_f16): Likewise.
10707 (vornq_m_f32): Likewise.
10708 (vornq_m_f16): Likewise.
10709 (vorrq_m_f32): Likewise.
10710 (vorrq_m_f16): Likewise.
10711 (vsubq_m_f32): Likewise.
10712 (vsubq_m_f16): Likewise.
10713 (vsubq_m_n_f32): Likewise.
10714 (vsubq_m_n_f16): Likewise.
10715 (__attribute__): Likewise.
10716 (__arm_vabdq_m_f32): Likewise.
10717 (__arm_vabdq_m_f16): Likewise.
10718 (__arm_vaddq_m_f32): Likewise.
10719 (__arm_vaddq_m_f16): Likewise.
10720 (__arm_vaddq_m_n_f32): Likewise.
10721 (__arm_vaddq_m_n_f16): Likewise.
10722 (__arm_vandq_m_f32): Likewise.
10723 (__arm_vandq_m_f16): Likewise.
10724 (__arm_vbicq_m_f32): Likewise.
10725 (__arm_vbicq_m_f16): Likewise.
10726 (__arm_vbrsrq_m_n_f32): Likewise.
10727 (__arm_vbrsrq_m_n_f16): Likewise.
10728 (__arm_vcaddq_rot270_m_f32): Likewise.
10729 (__arm_vcaddq_rot270_m_f16): Likewise.
10730 (__arm_vcaddq_rot90_m_f32): Likewise.
10731 (__arm_vcaddq_rot90_m_f16): Likewise.
10732 (__arm_vcmlaq_m_f32): Likewise.
10733 (__arm_vcmlaq_m_f16): Likewise.
10734 (__arm_vcmlaq_rot180_m_f32): Likewise.
10735 (__arm_vcmlaq_rot180_m_f16): Likewise.
10736 (__arm_vcmlaq_rot270_m_f32): Likewise.
10737 (__arm_vcmlaq_rot270_m_f16): Likewise.
10738 (__arm_vcmlaq_rot90_m_f32): Likewise.
10739 (__arm_vcmlaq_rot90_m_f16): Likewise.
10740 (__arm_vcmulq_m_f32): Likewise.
10741 (__arm_vcmulq_m_f16): Likewise.
10742 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
10743 (__arm_vcmulq_rot180_m_f16): Likewise.
10744 (__arm_vcmulq_rot270_m_f32): Likewise.
10745 (__arm_vcmulq_rot270_m_f16): Likewise.
10746 (__arm_vcmulq_rot90_m_f32): Likewise.
10747 (__arm_vcmulq_rot90_m_f16): Likewise.
10748 (__arm_vcvtq_m_n_s32_f32): Likewise.
10749 (__arm_vcvtq_m_n_s16_f16): Likewise.
10750 (__arm_vcvtq_m_n_u32_f32): Likewise.
10751 (__arm_vcvtq_m_n_u16_f16): Likewise.
10752 (__arm_veorq_m_f32): Likewise.
10753 (__arm_veorq_m_f16): Likewise.
10754 (__arm_vfmaq_m_f32): Likewise.
10755 (__arm_vfmaq_m_f16): Likewise.
10756 (__arm_vfmaq_m_n_f32): Likewise.
10757 (__arm_vfmaq_m_n_f16): Likewise.
10758 (__arm_vfmasq_m_n_f32): Likewise.
10759 (__arm_vfmasq_m_n_f16): Likewise.
10760 (__arm_vfmsq_m_f32): Likewise.
10761 (__arm_vfmsq_m_f16): Likewise.
10762 (__arm_vmaxnmq_m_f32): Likewise.
10763 (__arm_vmaxnmq_m_f16): Likewise.
10764 (__arm_vminnmq_m_f32): Likewise.
10765 (__arm_vminnmq_m_f16): Likewise.
10766 (__arm_vmulq_m_f32): Likewise.
10767 (__arm_vmulq_m_f16): Likewise.
10768 (__arm_vmulq_m_n_f32): Likewise.
10769 (__arm_vmulq_m_n_f16): Likewise.
10770 (__arm_vornq_m_f32): Likewise.
10771 (__arm_vornq_m_f16): Likewise.
10772 (__arm_vorrq_m_f32): Likewise.
10773 (__arm_vorrq_m_f16): Likewise.
10774 (__arm_vsubq_m_f32): Likewise.
10775 (__arm_vsubq_m_f16): Likewise.
10776 (__arm_vsubq_m_n_f32): Likewise.
10777 (__arm_vsubq_m_n_f16): Likewise.
10778 (vabdq_m): Define polymorphic variant.
10779 (vaddq_m): Likewise.
10780 (vaddq_m_n): Likewise.
10781 (vandq_m): Likewise.
10782 (vbicq_m): Likewise.
10783 (vbrsrq_m_n): Likewise.
10784 (vcaddq_rot270_m): Likewise.
10785 (vcaddq_rot90_m): Likewise.
10786 (vcmlaq_m): Likewise.
10787 (vcmlaq_rot180_m): Likewise.
10788 (vcmlaq_rot270_m): Likewise.
10789 (vcmlaq_rot90_m): Likewise.
10790 (vcmulq_m): Likewise.
10791 (vcmulq_rot180_m): Likewise.
10792 (vcmulq_rot270_m): Likewise.
10793 (vcmulq_rot90_m): Likewise.
10794 (veorq_m): Likewise.
10795 (vfmaq_m): Likewise.
10796 (vfmaq_m_n): Likewise.
10797 (vfmasq_m_n): Likewise.
10798 (vfmsq_m): Likewise.
10799 (vmaxnmq_m): Likewise.
10800 (vminnmq_m): Likewise.
10801 (vmulq_m): Likewise.
10802 (vmulq_m_n): Likewise.
10803 (vornq_m): Likewise.
10804 (vsubq_m): Likewise.
10805 (vsubq_m_n): Likewise.
10806 (vorrq_m): Likewise.
10807 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10809 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10810 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
10811 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
10812 (mve_vaddq_m_f<mode>): Likewise.
10813 (mve_vaddq_m_n_f<mode>): Likewise.
10814 (mve_vandq_m_f<mode>): Likewise.
10815 (mve_vbicq_m_f<mode>): Likewise.
10816 (mve_vbrsrq_m_n_f<mode>): Likewise.
10817 (mve_vcaddq_rot270_m_f<mode>): Likewise.
10818 (mve_vcaddq_rot90_m_f<mode>): Likewise.
10819 (mve_vcmlaq_m_f<mode>): Likewise.
10820 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
10821 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
10822 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
10823 (mve_vcmulq_m_f<mode>): Likewise.
10824 (mve_vcmulq_rot180_m_f<mode>): Likewise.
10825 (mve_vcmulq_rot270_m_f<mode>): Likewise.
10826 (mve_vcmulq_rot90_m_f<mode>): Likewise.
10827 (mve_veorq_m_f<mode>): Likewise.
10828 (mve_vfmaq_m_f<mode>): Likewise.
10829 (mve_vfmaq_m_n_f<mode>): Likewise.
10830 (mve_vfmasq_m_n_f<mode>): Likewise.
10831 (mve_vfmsq_m_f<mode>): Likewise.
10832 (mve_vmaxnmq_m_f<mode>): Likewise.
10833 (mve_vminnmq_m_f<mode>): Likewise.
10834 (mve_vmulq_m_f<mode>): Likewise.
10835 (mve_vmulq_m_n_f<mode>): Likewise.
10836 (mve_vornq_m_f<mode>): Likewise.
10837 (mve_vorrq_m_f<mode>): Likewise.
10838 (mve_vsubq_m_f<mode>): Likewise.
10839 (mve_vsubq_m_n_f<mode>): Likewise.
10841 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10842 Mihail Ionescu <mihail.ionescu@arm.com>
10843 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10845 * config/arm/arm-protos.h (arm_mve_immediate_check):
10846 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
10847 mode and interger value.
10848 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
10849 (vmlaldavaq_p_s16): Likewise.
10850 (vmlaldavaq_p_u32): Likewise.
10851 (vmlaldavaq_p_u16): Likewise.
10852 (vmlaldavaxq_p_s32): Likewise.
10853 (vmlaldavaxq_p_s16): Likewise.
10854 (vmlaldavaxq_p_u32): Likewise.
10855 (vmlaldavaxq_p_u16): Likewise.
10856 (vmlsldavaq_p_s32): Likewise.
10857 (vmlsldavaq_p_s16): Likewise.
10858 (vmlsldavaxq_p_s32): Likewise.
10859 (vmlsldavaxq_p_s16): Likewise.
10860 (vmullbq_poly_m_p8): Likewise.
10861 (vmullbq_poly_m_p16): Likewise.
10862 (vmulltq_poly_m_p8): Likewise.
10863 (vmulltq_poly_m_p16): Likewise.
10864 (vqdmullbq_m_n_s32): Likewise.
10865 (vqdmullbq_m_n_s16): Likewise.
10866 (vqdmullbq_m_s32): Likewise.
10867 (vqdmullbq_m_s16): Likewise.
10868 (vqdmulltq_m_n_s32): Likewise.
10869 (vqdmulltq_m_n_s16): Likewise.
10870 (vqdmulltq_m_s32): Likewise.
10871 (vqdmulltq_m_s16): Likewise.
10872 (vqrshrnbq_m_n_s32): Likewise.
10873 (vqrshrnbq_m_n_s16): Likewise.
10874 (vqrshrnbq_m_n_u32): Likewise.
10875 (vqrshrnbq_m_n_u16): Likewise.
10876 (vqrshrntq_m_n_s32): Likewise.
10877 (vqrshrntq_m_n_s16): Likewise.
10878 (vqrshrntq_m_n_u32): Likewise.
10879 (vqrshrntq_m_n_u16): Likewise.
10880 (vqrshrunbq_m_n_s32): Likewise.
10881 (vqrshrunbq_m_n_s16): Likewise.
10882 (vqrshruntq_m_n_s32): Likewise.
10883 (vqrshruntq_m_n_s16): Likewise.
10884 (vqshrnbq_m_n_s32): Likewise.
10885 (vqshrnbq_m_n_s16): Likewise.
10886 (vqshrnbq_m_n_u32): Likewise.
10887 (vqshrnbq_m_n_u16): Likewise.
10888 (vqshrntq_m_n_s32): Likewise.
10889 (vqshrntq_m_n_s16): Likewise.
10890 (vqshrntq_m_n_u32): Likewise.
10891 (vqshrntq_m_n_u16): Likewise.
10892 (vqshrunbq_m_n_s32): Likewise.
10893 (vqshrunbq_m_n_s16): Likewise.
10894 (vqshruntq_m_n_s32): Likewise.
10895 (vqshruntq_m_n_s16): Likewise.
10896 (vrmlaldavhaq_p_s32): Likewise.
10897 (vrmlaldavhaq_p_u32): Likewise.
10898 (vrmlaldavhaxq_p_s32): Likewise.
10899 (vrmlsldavhaq_p_s32): Likewise.
10900 (vrmlsldavhaxq_p_s32): Likewise.
10901 (vrshrnbq_m_n_s32): Likewise.
10902 (vrshrnbq_m_n_s16): Likewise.
10903 (vrshrnbq_m_n_u32): Likewise.
10904 (vrshrnbq_m_n_u16): Likewise.
10905 (vrshrntq_m_n_s32): Likewise.
10906 (vrshrntq_m_n_s16): Likewise.
10907 (vrshrntq_m_n_u32): Likewise.
10908 (vrshrntq_m_n_u16): Likewise.
10909 (vshllbq_m_n_s8): Likewise.
10910 (vshllbq_m_n_s16): Likewise.
10911 (vshllbq_m_n_u8): Likewise.
10912 (vshllbq_m_n_u16): Likewise.
10913 (vshlltq_m_n_s8): Likewise.
10914 (vshlltq_m_n_s16): Likewise.
10915 (vshlltq_m_n_u8): Likewise.
10916 (vshlltq_m_n_u16): Likewise.
10917 (vshrnbq_m_n_s32): Likewise.
10918 (vshrnbq_m_n_s16): Likewise.
10919 (vshrnbq_m_n_u32): Likewise.
10920 (vshrnbq_m_n_u16): Likewise.
10921 (vshrntq_m_n_s32): Likewise.
10922 (vshrntq_m_n_s16): Likewise.
10923 (vshrntq_m_n_u32): Likewise.
10924 (vshrntq_m_n_u16): Likewise.
10925 (__arm_vmlaldavaq_p_s32): Define intrinsic.
10926 (__arm_vmlaldavaq_p_s16): Likewise.
10927 (__arm_vmlaldavaq_p_u32): Likewise.
10928 (__arm_vmlaldavaq_p_u16): Likewise.
10929 (__arm_vmlaldavaxq_p_s32): Likewise.
10930 (__arm_vmlaldavaxq_p_s16): Likewise.
10931 (__arm_vmlaldavaxq_p_u32): Likewise.
10932 (__arm_vmlaldavaxq_p_u16): Likewise.
10933 (__arm_vmlsldavaq_p_s32): Likewise.
10934 (__arm_vmlsldavaq_p_s16): Likewise.
10935 (__arm_vmlsldavaxq_p_s32): Likewise.
10936 (__arm_vmlsldavaxq_p_s16): Likewise.
10937 (__arm_vmullbq_poly_m_p8): Likewise.
10938 (__arm_vmullbq_poly_m_p16): Likewise.
10939 (__arm_vmulltq_poly_m_p8): Likewise.
10940 (__arm_vmulltq_poly_m_p16): Likewise.
10941 (__arm_vqdmullbq_m_n_s32): Likewise.
10942 (__arm_vqdmullbq_m_n_s16): Likewise.
10943 (__arm_vqdmullbq_m_s32): Likewise.
10944 (__arm_vqdmullbq_m_s16): Likewise.
10945 (__arm_vqdmulltq_m_n_s32): Likewise.
10946 (__arm_vqdmulltq_m_n_s16): Likewise.
10947 (__arm_vqdmulltq_m_s32): Likewise.
10948 (__arm_vqdmulltq_m_s16): Likewise.
10949 (__arm_vqrshrnbq_m_n_s32): Likewise.
10950 (__arm_vqrshrnbq_m_n_s16): Likewise.
10951 (__arm_vqrshrnbq_m_n_u32): Likewise.
10952 (__arm_vqrshrnbq_m_n_u16): Likewise.
10953 (__arm_vqrshrntq_m_n_s32): Likewise.
10954 (__arm_vqrshrntq_m_n_s16): Likewise.
10955 (__arm_vqrshrntq_m_n_u32): Likewise.
10956 (__arm_vqrshrntq_m_n_u16): Likewise.
10957 (__arm_vqrshrunbq_m_n_s32): Likewise.
10958 (__arm_vqrshrunbq_m_n_s16): Likewise.
10959 (__arm_vqrshruntq_m_n_s32): Likewise.
10960 (__arm_vqrshruntq_m_n_s16): Likewise.
10961 (__arm_vqshrnbq_m_n_s32): Likewise.
10962 (__arm_vqshrnbq_m_n_s16): Likewise.
10963 (__arm_vqshrnbq_m_n_u32): Likewise.
10964 (__arm_vqshrnbq_m_n_u16): Likewise.
10965 (__arm_vqshrntq_m_n_s32): Likewise.
10966 (__arm_vqshrntq_m_n_s16): Likewise.
10967 (__arm_vqshrntq_m_n_u32): Likewise.
10968 (__arm_vqshrntq_m_n_u16): Likewise.
10969 (__arm_vqshrunbq_m_n_s32): Likewise.
10970 (__arm_vqshrunbq_m_n_s16): Likewise.
10971 (__arm_vqshruntq_m_n_s32): Likewise.
10972 (__arm_vqshruntq_m_n_s16): Likewise.
10973 (__arm_vrmlaldavhaq_p_s32): Likewise.
10974 (__arm_vrmlaldavhaq_p_u32): Likewise.
10975 (__arm_vrmlaldavhaxq_p_s32): Likewise.
10976 (__arm_vrmlsldavhaq_p_s32): Likewise.
10977 (__arm_vrmlsldavhaxq_p_s32): Likewise.
10978 (__arm_vrshrnbq_m_n_s32): Likewise.
10979 (__arm_vrshrnbq_m_n_s16): Likewise.
10980 (__arm_vrshrnbq_m_n_u32): Likewise.
10981 (__arm_vrshrnbq_m_n_u16): Likewise.
10982 (__arm_vrshrntq_m_n_s32): Likewise.
10983 (__arm_vrshrntq_m_n_s16): Likewise.
10984 (__arm_vrshrntq_m_n_u32): Likewise.
10985 (__arm_vrshrntq_m_n_u16): Likewise.
10986 (__arm_vshllbq_m_n_s8): Likewise.
10987 (__arm_vshllbq_m_n_s16): Likewise.
10988 (__arm_vshllbq_m_n_u8): Likewise.
10989 (__arm_vshllbq_m_n_u16): Likewise.
10990 (__arm_vshlltq_m_n_s8): Likewise.
10991 (__arm_vshlltq_m_n_s16): Likewise.
10992 (__arm_vshlltq_m_n_u8): Likewise.
10993 (__arm_vshlltq_m_n_u16): Likewise.
10994 (__arm_vshrnbq_m_n_s32): Likewise.
10995 (__arm_vshrnbq_m_n_s16): Likewise.
10996 (__arm_vshrnbq_m_n_u32): Likewise.
10997 (__arm_vshrnbq_m_n_u16): Likewise.
10998 (__arm_vshrntq_m_n_s32): Likewise.
10999 (__arm_vshrntq_m_n_s16): Likewise.
11000 (__arm_vshrntq_m_n_u32): Likewise.
11001 (__arm_vshrntq_m_n_u16): Likewise.
11002 (vmullbq_poly_m): Define polymorphic variant.
11003 (vmulltq_poly_m): Likewise.
11004 (vshllbq_m): Likewise.
11005 (vshrntq_m_n): Likewise.
11006 (vshrnbq_m_n): Likewise.
11007 (vshlltq_m_n): Likewise.
11008 (vshllbq_m_n): Likewise.
11009 (vrshrntq_m_n): Likewise.
11010 (vrshrnbq_m_n): Likewise.
11011 (vqshruntq_m_n): Likewise.
11012 (vqshrunbq_m_n): Likewise.
11013 (vqdmullbq_m_n): Likewise.
11014 (vqdmullbq_m): Likewise.
11015 (vqdmulltq_m_n): Likewise.
11016 (vqdmulltq_m): Likewise.
11017 (vqrshrnbq_m_n): Likewise.
11018 (vqrshrntq_m_n): Likewise.
11019 (vqrshrunbq_m_n): Likewise.
11020 (vqrshruntq_m_n): Likewise.
11021 (vqshrnbq_m_n): Likewise.
11022 (vqshrntq_m_n): Likewise.
11023 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
11024 builtin qualifiers.
11025 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11026 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
11027 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11028 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11029 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
11030 (VMLALDAVAXQ_P): Likewise.
11031 (VQRSHRNBQ_M_N): Likewise.
11032 (VQRSHRNTQ_M_N): Likewise.
11033 (VQSHRNBQ_M_N): Likewise.
11034 (VQSHRNTQ_M_N): Likewise.
11035 (VRSHRNBQ_M_N): Likewise.
11036 (VRSHRNTQ_M_N): Likewise.
11037 (VSHLLBQ_M_N): Likewise.
11038 (VSHLLTQ_M_N): Likewise.
11039 (VSHRNBQ_M_N): Likewise.
11040 (VSHRNTQ_M_N): Likewise.
11041 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
11042 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
11043 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
11044 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
11045 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
11046 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
11047 (mve_vrmlaldavhaq_p_sv4si): Likewise.
11048 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
11049 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
11050 (mve_vshllbq_m_n_<supf><mode>): Likewise.
11051 (mve_vshlltq_m_n_<supf><mode>): Likewise.
11052 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
11053 (mve_vshrntq_m_n_<supf><mode>): Likewise.
11054 (mve_vmlsldavaq_p_s<mode>): Likewise.
11055 (mve_vmlsldavaxq_p_s<mode>): Likewise.
11056 (mve_vmullbq_poly_m_p<mode>): Likewise.
11057 (mve_vmulltq_poly_m_p<mode>): Likewise.
11058 (mve_vqdmullbq_m_n_s<mode>): Likewise.
11059 (mve_vqdmullbq_m_s<mode>): Likewise.
11060 (mve_vqdmulltq_m_n_s<mode>): Likewise.
11061 (mve_vqdmulltq_m_s<mode>): Likewise.
11062 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
11063 (mve_vqrshruntq_m_n_s<mode>): Likewise.
11064 (mve_vqshrunbq_m_n_s<mode>): Likewise.
11065 (mve_vqshruntq_m_n_s<mode>): Likewise.
11066 (mve_vrmlaldavhaq_p_uv4si): Likewise.
11067 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
11068 (mve_vrmlsldavhaq_p_sv4si): Likewise.
11069 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
11071 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11072 Mihail Ionescu <mihail.ionescu@arm.com>
11073 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11075 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
11076 (vabdq_m_s32): Likewise.
11077 (vabdq_m_s16): Likewise.
11078 (vabdq_m_u8): Likewise.
11079 (vabdq_m_u32): Likewise.
11080 (vabdq_m_u16): Likewise.
11081 (vaddq_m_n_s8): Likewise.
11082 (vaddq_m_n_s32): Likewise.
11083 (vaddq_m_n_s16): Likewise.
11084 (vaddq_m_n_u8): Likewise.
11085 (vaddq_m_n_u32): Likewise.
11086 (vaddq_m_n_u16): Likewise.
11087 (vaddq_m_s8): Likewise.
11088 (vaddq_m_s32): Likewise.
11089 (vaddq_m_s16): Likewise.
11090 (vaddq_m_u8): Likewise.
11091 (vaddq_m_u32): Likewise.
11092 (vaddq_m_u16): Likewise.
11093 (vandq_m_s8): Likewise.
11094 (vandq_m_s32): Likewise.
11095 (vandq_m_s16): Likewise.
11096 (vandq_m_u8): Likewise.
11097 (vandq_m_u32): Likewise.
11098 (vandq_m_u16): Likewise.
11099 (vbicq_m_s8): Likewise.
11100 (vbicq_m_s32): Likewise.
11101 (vbicq_m_s16): Likewise.
11102 (vbicq_m_u8): Likewise.
11103 (vbicq_m_u32): Likewise.
11104 (vbicq_m_u16): Likewise.
11105 (vbrsrq_m_n_s8): Likewise.
11106 (vbrsrq_m_n_s32): Likewise.
11107 (vbrsrq_m_n_s16): Likewise.
11108 (vbrsrq_m_n_u8): Likewise.
11109 (vbrsrq_m_n_u32): Likewise.
11110 (vbrsrq_m_n_u16): Likewise.
11111 (vcaddq_rot270_m_s8): Likewise.
11112 (vcaddq_rot270_m_s32): Likewise.
11113 (vcaddq_rot270_m_s16): Likewise.
11114 (vcaddq_rot270_m_u8): Likewise.
11115 (vcaddq_rot270_m_u32): Likewise.
11116 (vcaddq_rot270_m_u16): Likewise.
11117 (vcaddq_rot90_m_s8): Likewise.
11118 (vcaddq_rot90_m_s32): Likewise.
11119 (vcaddq_rot90_m_s16): Likewise.
11120 (vcaddq_rot90_m_u8): Likewise.
11121 (vcaddq_rot90_m_u32): Likewise.
11122 (vcaddq_rot90_m_u16): Likewise.
11123 (veorq_m_s8): Likewise.
11124 (veorq_m_s32): Likewise.
11125 (veorq_m_s16): Likewise.
11126 (veorq_m_u8): Likewise.
11127 (veorq_m_u32): Likewise.
11128 (veorq_m_u16): Likewise.
11129 (vhaddq_m_n_s8): Likewise.
11130 (vhaddq_m_n_s32): Likewise.
11131 (vhaddq_m_n_s16): Likewise.
11132 (vhaddq_m_n_u8): Likewise.
11133 (vhaddq_m_n_u32): Likewise.
11134 (vhaddq_m_n_u16): Likewise.
11135 (vhaddq_m_s8): Likewise.
11136 (vhaddq_m_s32): Likewise.
11137 (vhaddq_m_s16): Likewise.
11138 (vhaddq_m_u8): Likewise.
11139 (vhaddq_m_u32): Likewise.
11140 (vhaddq_m_u16): Likewise.
11141 (vhcaddq_rot270_m_s8): Likewise.
11142 (vhcaddq_rot270_m_s32): Likewise.
11143 (vhcaddq_rot270_m_s16): Likewise.
11144 (vhcaddq_rot90_m_s8): Likewise.
11145 (vhcaddq_rot90_m_s32): Likewise.
11146 (vhcaddq_rot90_m_s16): Likewise.
11147 (vhsubq_m_n_s8): Likewise.
11148 (vhsubq_m_n_s32): Likewise.
11149 (vhsubq_m_n_s16): Likewise.
11150 (vhsubq_m_n_u8): Likewise.
11151 (vhsubq_m_n_u32): Likewise.
11152 (vhsubq_m_n_u16): Likewise.
11153 (vhsubq_m_s8): Likewise.
11154 (vhsubq_m_s32): Likewise.
11155 (vhsubq_m_s16): Likewise.
11156 (vhsubq_m_u8): Likewise.
11157 (vhsubq_m_u32): Likewise.
11158 (vhsubq_m_u16): Likewise.
11159 (vmaxq_m_s8): Likewise.
11160 (vmaxq_m_s32): Likewise.
11161 (vmaxq_m_s16): Likewise.
11162 (vmaxq_m_u8): Likewise.
11163 (vmaxq_m_u32): Likewise.
11164 (vmaxq_m_u16): Likewise.
11165 (vminq_m_s8): Likewise.
11166 (vminq_m_s32): Likewise.
11167 (vminq_m_s16): Likewise.
11168 (vminq_m_u8): Likewise.
11169 (vminq_m_u32): Likewise.
11170 (vminq_m_u16): Likewise.
11171 (vmladavaq_p_s8): Likewise.
11172 (vmladavaq_p_s32): Likewise.
11173 (vmladavaq_p_s16): Likewise.
11174 (vmladavaq_p_u8): Likewise.
11175 (vmladavaq_p_u32): Likewise.
11176 (vmladavaq_p_u16): Likewise.
11177 (vmladavaxq_p_s8): Likewise.
11178 (vmladavaxq_p_s32): Likewise.
11179 (vmladavaxq_p_s16): Likewise.
11180 (vmlaq_m_n_s8): Likewise.
11181 (vmlaq_m_n_s32): Likewise.
11182 (vmlaq_m_n_s16): Likewise.
11183 (vmlaq_m_n_u8): Likewise.
11184 (vmlaq_m_n_u32): Likewise.
11185 (vmlaq_m_n_u16): Likewise.
11186 (vmlasq_m_n_s8): Likewise.
11187 (vmlasq_m_n_s32): Likewise.
11188 (vmlasq_m_n_s16): Likewise.
11189 (vmlasq_m_n_u8): Likewise.
11190 (vmlasq_m_n_u32): Likewise.
11191 (vmlasq_m_n_u16): Likewise.
11192 (vmlsdavaq_p_s8): Likewise.
11193 (vmlsdavaq_p_s32): Likewise.
11194 (vmlsdavaq_p_s16): Likewise.
11195 (vmlsdavaxq_p_s8): Likewise.
11196 (vmlsdavaxq_p_s32): Likewise.
11197 (vmlsdavaxq_p_s16): Likewise.
11198 (vmulhq_m_s8): Likewise.
11199 (vmulhq_m_s32): Likewise.
11200 (vmulhq_m_s16): Likewise.
11201 (vmulhq_m_u8): Likewise.
11202 (vmulhq_m_u32): Likewise.
11203 (vmulhq_m_u16): Likewise.
11204 (vmullbq_int_m_s8): Likewise.
11205 (vmullbq_int_m_s32): Likewise.
11206 (vmullbq_int_m_s16): Likewise.
11207 (vmullbq_int_m_u8): Likewise.
11208 (vmullbq_int_m_u32): Likewise.
11209 (vmullbq_int_m_u16): Likewise.
11210 (vmulltq_int_m_s8): Likewise.
11211 (vmulltq_int_m_s32): Likewise.
11212 (vmulltq_int_m_s16): Likewise.
11213 (vmulltq_int_m_u8): Likewise.
11214 (vmulltq_int_m_u32): Likewise.
11215 (vmulltq_int_m_u16): Likewise.
11216 (vmulq_m_n_s8): Likewise.
11217 (vmulq_m_n_s32): Likewise.
11218 (vmulq_m_n_s16): Likewise.
11219 (vmulq_m_n_u8): Likewise.
11220 (vmulq_m_n_u32): Likewise.
11221 (vmulq_m_n_u16): Likewise.
11222 (vmulq_m_s8): Likewise.
11223 (vmulq_m_s32): Likewise.
11224 (vmulq_m_s16): Likewise.
11225 (vmulq_m_u8): Likewise.
11226 (vmulq_m_u32): Likewise.
11227 (vmulq_m_u16): Likewise.
11228 (vornq_m_s8): Likewise.
11229 (vornq_m_s32): Likewise.
11230 (vornq_m_s16): Likewise.
11231 (vornq_m_u8): Likewise.
11232 (vornq_m_u32): Likewise.
11233 (vornq_m_u16): Likewise.
11234 (vorrq_m_s8): Likewise.
11235 (vorrq_m_s32): Likewise.
11236 (vorrq_m_s16): Likewise.
11237 (vorrq_m_u8): Likewise.
11238 (vorrq_m_u32): Likewise.
11239 (vorrq_m_u16): Likewise.
11240 (vqaddq_m_n_s8): Likewise.
11241 (vqaddq_m_n_s32): Likewise.
11242 (vqaddq_m_n_s16): Likewise.
11243 (vqaddq_m_n_u8): Likewise.
11244 (vqaddq_m_n_u32): Likewise.
11245 (vqaddq_m_n_u16): Likewise.
11246 (vqaddq_m_s8): Likewise.
11247 (vqaddq_m_s32): Likewise.
11248 (vqaddq_m_s16): Likewise.
11249 (vqaddq_m_u8): Likewise.
11250 (vqaddq_m_u32): Likewise.
11251 (vqaddq_m_u16): Likewise.
11252 (vqdmladhq_m_s8): Likewise.
11253 (vqdmladhq_m_s32): Likewise.
11254 (vqdmladhq_m_s16): Likewise.
11255 (vqdmladhxq_m_s8): Likewise.
11256 (vqdmladhxq_m_s32): Likewise.
11257 (vqdmladhxq_m_s16): Likewise.
11258 (vqdmlahq_m_n_s8): Likewise.
11259 (vqdmlahq_m_n_s32): Likewise.
11260 (vqdmlahq_m_n_s16): Likewise.
11261 (vqdmlahq_m_n_u8): Likewise.
11262 (vqdmlahq_m_n_u32): Likewise.
11263 (vqdmlahq_m_n_u16): Likewise.
11264 (vqdmlsdhq_m_s8): Likewise.
11265 (vqdmlsdhq_m_s32): Likewise.
11266 (vqdmlsdhq_m_s16): Likewise.
11267 (vqdmlsdhxq_m_s8): Likewise.
11268 (vqdmlsdhxq_m_s32): Likewise.
11269 (vqdmlsdhxq_m_s16): Likewise.
11270 (vqdmulhq_m_n_s8): Likewise.
11271 (vqdmulhq_m_n_s32): Likewise.
11272 (vqdmulhq_m_n_s16): Likewise.
11273 (vqdmulhq_m_s8): Likewise.
11274 (vqdmulhq_m_s32): Likewise.
11275 (vqdmulhq_m_s16): Likewise.
11276 (vqrdmladhq_m_s8): Likewise.
11277 (vqrdmladhq_m_s32): Likewise.
11278 (vqrdmladhq_m_s16): Likewise.
11279 (vqrdmladhxq_m_s8): Likewise.
11280 (vqrdmladhxq_m_s32): Likewise.
11281 (vqrdmladhxq_m_s16): Likewise.
11282 (vqrdmlahq_m_n_s8): Likewise.
11283 (vqrdmlahq_m_n_s32): Likewise.
11284 (vqrdmlahq_m_n_s16): Likewise.
11285 (vqrdmlahq_m_n_u8): Likewise.
11286 (vqrdmlahq_m_n_u32): Likewise.
11287 (vqrdmlahq_m_n_u16): Likewise.
11288 (vqrdmlashq_m_n_s8): Likewise.
11289 (vqrdmlashq_m_n_s32): Likewise.
11290 (vqrdmlashq_m_n_s16): Likewise.
11291 (vqrdmlashq_m_n_u8): Likewise.
11292 (vqrdmlashq_m_n_u32): Likewise.
11293 (vqrdmlashq_m_n_u16): Likewise.
11294 (vqrdmlsdhq_m_s8): Likewise.
11295 (vqrdmlsdhq_m_s32): Likewise.
11296 (vqrdmlsdhq_m_s16): Likewise.
11297 (vqrdmlsdhxq_m_s8): Likewise.
11298 (vqrdmlsdhxq_m_s32): Likewise.
11299 (vqrdmlsdhxq_m_s16): Likewise.
11300 (vqrdmulhq_m_n_s8): Likewise.
11301 (vqrdmulhq_m_n_s32): Likewise.
11302 (vqrdmulhq_m_n_s16): Likewise.
11303 (vqrdmulhq_m_s8): Likewise.
11304 (vqrdmulhq_m_s32): Likewise.
11305 (vqrdmulhq_m_s16): Likewise.
11306 (vqrshlq_m_s8): Likewise.
11307 (vqrshlq_m_s32): Likewise.
11308 (vqrshlq_m_s16): Likewise.
11309 (vqrshlq_m_u8): Likewise.
11310 (vqrshlq_m_u32): Likewise.
11311 (vqrshlq_m_u16): Likewise.
11312 (vqshlq_m_n_s8): Likewise.
11313 (vqshlq_m_n_s32): Likewise.
11314 (vqshlq_m_n_s16): Likewise.
11315 (vqshlq_m_n_u8): Likewise.
11316 (vqshlq_m_n_u32): Likewise.
11317 (vqshlq_m_n_u16): Likewise.
11318 (vqshlq_m_s8): Likewise.
11319 (vqshlq_m_s32): Likewise.
11320 (vqshlq_m_s16): Likewise.
11321 (vqshlq_m_u8): Likewise.
11322 (vqshlq_m_u32): Likewise.
11323 (vqshlq_m_u16): Likewise.
11324 (vqsubq_m_n_s8): Likewise.
11325 (vqsubq_m_n_s32): Likewise.
11326 (vqsubq_m_n_s16): Likewise.
11327 (vqsubq_m_n_u8): Likewise.
11328 (vqsubq_m_n_u32): Likewise.
11329 (vqsubq_m_n_u16): Likewise.
11330 (vqsubq_m_s8): Likewise.
11331 (vqsubq_m_s32): Likewise.
11332 (vqsubq_m_s16): Likewise.
11333 (vqsubq_m_u8): Likewise.
11334 (vqsubq_m_u32): Likewise.
11335 (vqsubq_m_u16): Likewise.
11336 (vrhaddq_m_s8): Likewise.
11337 (vrhaddq_m_s32): Likewise.
11338 (vrhaddq_m_s16): Likewise.
11339 (vrhaddq_m_u8): Likewise.
11340 (vrhaddq_m_u32): Likewise.
11341 (vrhaddq_m_u16): Likewise.
11342 (vrmulhq_m_s8): Likewise.
11343 (vrmulhq_m_s32): Likewise.
11344 (vrmulhq_m_s16): Likewise.
11345 (vrmulhq_m_u8): Likewise.
11346 (vrmulhq_m_u32): Likewise.
11347 (vrmulhq_m_u16): Likewise.
11348 (vrshlq_m_s8): Likewise.
11349 (vrshlq_m_s32): Likewise.
11350 (vrshlq_m_s16): Likewise.
11351 (vrshlq_m_u8): Likewise.
11352 (vrshlq_m_u32): Likewise.
11353 (vrshlq_m_u16): Likewise.
11354 (vrshrq_m_n_s8): Likewise.
11355 (vrshrq_m_n_s32): Likewise.
11356 (vrshrq_m_n_s16): Likewise.
11357 (vrshrq_m_n_u8): Likewise.
11358 (vrshrq_m_n_u32): Likewise.
11359 (vrshrq_m_n_u16): Likewise.
11360 (vshlq_m_n_s8): Likewise.
11361 (vshlq_m_n_s32): Likewise.
11362 (vshlq_m_n_s16): Likewise.
11363 (vshlq_m_n_u8): Likewise.
11364 (vshlq_m_n_u32): Likewise.
11365 (vshlq_m_n_u16): Likewise.
11366 (vshrq_m_n_s8): Likewise.
11367 (vshrq_m_n_s32): Likewise.
11368 (vshrq_m_n_s16): Likewise.
11369 (vshrq_m_n_u8): Likewise.
11370 (vshrq_m_n_u32): Likewise.
11371 (vshrq_m_n_u16): Likewise.
11372 (vsliq_m_n_s8): Likewise.
11373 (vsliq_m_n_s32): Likewise.
11374 (vsliq_m_n_s16): Likewise.
11375 (vsliq_m_n_u8): Likewise.
11376 (vsliq_m_n_u32): Likewise.
11377 (vsliq_m_n_u16): Likewise.
11378 (vsubq_m_n_s8): Likewise.
11379 (vsubq_m_n_s32): Likewise.
11380 (vsubq_m_n_s16): Likewise.
11381 (vsubq_m_n_u8): Likewise.
11382 (vsubq_m_n_u32): Likewise.
11383 (vsubq_m_n_u16): Likewise.
11384 (__arm_vabdq_m_s8): Define intrinsic.
11385 (__arm_vabdq_m_s32): Likewise.
11386 (__arm_vabdq_m_s16): Likewise.
11387 (__arm_vabdq_m_u8): Likewise.
11388 (__arm_vabdq_m_u32): Likewise.
11389 (__arm_vabdq_m_u16): Likewise.
11390 (__arm_vaddq_m_n_s8): Likewise.
11391 (__arm_vaddq_m_n_s32): Likewise.
11392 (__arm_vaddq_m_n_s16): Likewise.
11393 (__arm_vaddq_m_n_u8): Likewise.
11394 (__arm_vaddq_m_n_u32): Likewise.
11395 (__arm_vaddq_m_n_u16): Likewise.
11396 (__arm_vaddq_m_s8): Likewise.
11397 (__arm_vaddq_m_s32): Likewise.
11398 (__arm_vaddq_m_s16): Likewise.
11399 (__arm_vaddq_m_u8): Likewise.
11400 (__arm_vaddq_m_u32): Likewise.
11401 (__arm_vaddq_m_u16): Likewise.
11402 (__arm_vandq_m_s8): Likewise.
11403 (__arm_vandq_m_s32): Likewise.
11404 (__arm_vandq_m_s16): Likewise.
11405 (__arm_vandq_m_u8): Likewise.
11406 (__arm_vandq_m_u32): Likewise.
11407 (__arm_vandq_m_u16): Likewise.
11408 (__arm_vbicq_m_s8): Likewise.
11409 (__arm_vbicq_m_s32): Likewise.
11410 (__arm_vbicq_m_s16): Likewise.
11411 (__arm_vbicq_m_u8): Likewise.
11412 (__arm_vbicq_m_u32): Likewise.
11413 (__arm_vbicq_m_u16): Likewise.
11414 (__arm_vbrsrq_m_n_s8): Likewise.
11415 (__arm_vbrsrq_m_n_s32): Likewise.
11416 (__arm_vbrsrq_m_n_s16): Likewise.
11417 (__arm_vbrsrq_m_n_u8): Likewise.
11418 (__arm_vbrsrq_m_n_u32): Likewise.
11419 (__arm_vbrsrq_m_n_u16): Likewise.
11420 (__arm_vcaddq_rot270_m_s8): Likewise.
11421 (__arm_vcaddq_rot270_m_s32): Likewise.
11422 (__arm_vcaddq_rot270_m_s16): Likewise.
11423 (__arm_vcaddq_rot270_m_u8): Likewise.
11424 (__arm_vcaddq_rot270_m_u32): Likewise.
11425 (__arm_vcaddq_rot270_m_u16): Likewise.
11426 (__arm_vcaddq_rot90_m_s8): Likewise.
11427 (__arm_vcaddq_rot90_m_s32): Likewise.
11428 (__arm_vcaddq_rot90_m_s16): Likewise.
11429 (__arm_vcaddq_rot90_m_u8): Likewise.
11430 (__arm_vcaddq_rot90_m_u32): Likewise.
11431 (__arm_vcaddq_rot90_m_u16): Likewise.
11432 (__arm_veorq_m_s8): Likewise.
11433 (__arm_veorq_m_s32): Likewise.
11434 (__arm_veorq_m_s16): Likewise.
11435 (__arm_veorq_m_u8): Likewise.
11436 (__arm_veorq_m_u32): Likewise.
11437 (__arm_veorq_m_u16): Likewise.
11438 (__arm_vhaddq_m_n_s8): Likewise.
11439 (__arm_vhaddq_m_n_s32): Likewise.
11440 (__arm_vhaddq_m_n_s16): Likewise.
11441 (__arm_vhaddq_m_n_u8): Likewise.
11442 (__arm_vhaddq_m_n_u32): Likewise.
11443 (__arm_vhaddq_m_n_u16): Likewise.
11444 (__arm_vhaddq_m_s8): Likewise.
11445 (__arm_vhaddq_m_s32): Likewise.
11446 (__arm_vhaddq_m_s16): Likewise.
11447 (__arm_vhaddq_m_u8): Likewise.
11448 (__arm_vhaddq_m_u32): Likewise.
11449 (__arm_vhaddq_m_u16): Likewise.
11450 (__arm_vhcaddq_rot270_m_s8): Likewise.
11451 (__arm_vhcaddq_rot270_m_s32): Likewise.
11452 (__arm_vhcaddq_rot270_m_s16): Likewise.
11453 (__arm_vhcaddq_rot90_m_s8): Likewise.
11454 (__arm_vhcaddq_rot90_m_s32): Likewise.
11455 (__arm_vhcaddq_rot90_m_s16): Likewise.
11456 (__arm_vhsubq_m_n_s8): Likewise.
11457 (__arm_vhsubq_m_n_s32): Likewise.
11458 (__arm_vhsubq_m_n_s16): Likewise.
11459 (__arm_vhsubq_m_n_u8): Likewise.
11460 (__arm_vhsubq_m_n_u32): Likewise.
11461 (__arm_vhsubq_m_n_u16): Likewise.
11462 (__arm_vhsubq_m_s8): Likewise.
11463 (__arm_vhsubq_m_s32): Likewise.
11464 (__arm_vhsubq_m_s16): Likewise.
11465 (__arm_vhsubq_m_u8): Likewise.
11466 (__arm_vhsubq_m_u32): Likewise.
11467 (__arm_vhsubq_m_u16): Likewise.
11468 (__arm_vmaxq_m_s8): Likewise.
11469 (__arm_vmaxq_m_s32): Likewise.
11470 (__arm_vmaxq_m_s16): Likewise.
11471 (__arm_vmaxq_m_u8): Likewise.
11472 (__arm_vmaxq_m_u32): Likewise.
11473 (__arm_vmaxq_m_u16): Likewise.
11474 (__arm_vminq_m_s8): Likewise.
11475 (__arm_vminq_m_s32): Likewise.
11476 (__arm_vminq_m_s16): Likewise.
11477 (__arm_vminq_m_u8): Likewise.
11478 (__arm_vminq_m_u32): Likewise.
11479 (__arm_vminq_m_u16): Likewise.
11480 (__arm_vmladavaq_p_s8): Likewise.
11481 (__arm_vmladavaq_p_s32): Likewise.
11482 (__arm_vmladavaq_p_s16): Likewise.
11483 (__arm_vmladavaq_p_u8): Likewise.
11484 (__arm_vmladavaq_p_u32): Likewise.
11485 (__arm_vmladavaq_p_u16): Likewise.
11486 (__arm_vmladavaxq_p_s8): Likewise.
11487 (__arm_vmladavaxq_p_s32): Likewise.
11488 (__arm_vmladavaxq_p_s16): Likewise.
11489 (__arm_vmlaq_m_n_s8): Likewise.
11490 (__arm_vmlaq_m_n_s32): Likewise.
11491 (__arm_vmlaq_m_n_s16): Likewise.
11492 (__arm_vmlaq_m_n_u8): Likewise.
11493 (__arm_vmlaq_m_n_u32): Likewise.
11494 (__arm_vmlaq_m_n_u16): Likewise.
11495 (__arm_vmlasq_m_n_s8): Likewise.
11496 (__arm_vmlasq_m_n_s32): Likewise.
11497 (__arm_vmlasq_m_n_s16): Likewise.
11498 (__arm_vmlasq_m_n_u8): Likewise.
11499 (__arm_vmlasq_m_n_u32): Likewise.
11500 (__arm_vmlasq_m_n_u16): Likewise.
11501 (__arm_vmlsdavaq_p_s8): Likewise.
11502 (__arm_vmlsdavaq_p_s32): Likewise.
11503 (__arm_vmlsdavaq_p_s16): Likewise.
11504 (__arm_vmlsdavaxq_p_s8): Likewise.
11505 (__arm_vmlsdavaxq_p_s32): Likewise.
11506 (__arm_vmlsdavaxq_p_s16): Likewise.
11507 (__arm_vmulhq_m_s8): Likewise.
11508 (__arm_vmulhq_m_s32): Likewise.
11509 (__arm_vmulhq_m_s16): Likewise.
11510 (__arm_vmulhq_m_u8): Likewise.
11511 (__arm_vmulhq_m_u32): Likewise.
11512 (__arm_vmulhq_m_u16): Likewise.
11513 (__arm_vmullbq_int_m_s8): Likewise.
11514 (__arm_vmullbq_int_m_s32): Likewise.
11515 (__arm_vmullbq_int_m_s16): Likewise.
11516 (__arm_vmullbq_int_m_u8): Likewise.
11517 (__arm_vmullbq_int_m_u32): Likewise.
11518 (__arm_vmullbq_int_m_u16): Likewise.
11519 (__arm_vmulltq_int_m_s8): Likewise.
11520 (__arm_vmulltq_int_m_s32): Likewise.
11521 (__arm_vmulltq_int_m_s16): Likewise.
11522 (__arm_vmulltq_int_m_u8): Likewise.
11523 (__arm_vmulltq_int_m_u32): Likewise.
11524 (__arm_vmulltq_int_m_u16): Likewise.
11525 (__arm_vmulq_m_n_s8): Likewise.
11526 (__arm_vmulq_m_n_s32): Likewise.
11527 (__arm_vmulq_m_n_s16): Likewise.
11528 (__arm_vmulq_m_n_u8): Likewise.
11529 (__arm_vmulq_m_n_u32): Likewise.
11530 (__arm_vmulq_m_n_u16): Likewise.
11531 (__arm_vmulq_m_s8): Likewise.
11532 (__arm_vmulq_m_s32): Likewise.
11533 (__arm_vmulq_m_s16): Likewise.
11534 (__arm_vmulq_m_u8): Likewise.
11535 (__arm_vmulq_m_u32): Likewise.
11536 (__arm_vmulq_m_u16): Likewise.
11537 (__arm_vornq_m_s8): Likewise.
11538 (__arm_vornq_m_s32): Likewise.
11539 (__arm_vornq_m_s16): Likewise.
11540 (__arm_vornq_m_u8): Likewise.
11541 (__arm_vornq_m_u32): Likewise.
11542 (__arm_vornq_m_u16): Likewise.
11543 (__arm_vorrq_m_s8): Likewise.
11544 (__arm_vorrq_m_s32): Likewise.
11545 (__arm_vorrq_m_s16): Likewise.
11546 (__arm_vorrq_m_u8): Likewise.
11547 (__arm_vorrq_m_u32): Likewise.
11548 (__arm_vorrq_m_u16): Likewise.
11549 (__arm_vqaddq_m_n_s8): Likewise.
11550 (__arm_vqaddq_m_n_s32): Likewise.
11551 (__arm_vqaddq_m_n_s16): Likewise.
11552 (__arm_vqaddq_m_n_u8): Likewise.
11553 (__arm_vqaddq_m_n_u32): Likewise.
11554 (__arm_vqaddq_m_n_u16): Likewise.
11555 (__arm_vqaddq_m_s8): Likewise.
11556 (__arm_vqaddq_m_s32): Likewise.
11557 (__arm_vqaddq_m_s16): Likewise.
11558 (__arm_vqaddq_m_u8): Likewise.
11559 (__arm_vqaddq_m_u32): Likewise.
11560 (__arm_vqaddq_m_u16): Likewise.
11561 (__arm_vqdmladhq_m_s8): Likewise.
11562 (__arm_vqdmladhq_m_s32): Likewise.
11563 (__arm_vqdmladhq_m_s16): Likewise.
11564 (__arm_vqdmladhxq_m_s8): Likewise.
11565 (__arm_vqdmladhxq_m_s32): Likewise.
11566 (__arm_vqdmladhxq_m_s16): Likewise.
11567 (__arm_vqdmlahq_m_n_s8): Likewise.
11568 (__arm_vqdmlahq_m_n_s32): Likewise.
11569 (__arm_vqdmlahq_m_n_s16): Likewise.
11570 (__arm_vqdmlahq_m_n_u8): Likewise.
11571 (__arm_vqdmlahq_m_n_u32): Likewise.
11572 (__arm_vqdmlahq_m_n_u16): Likewise.
11573 (__arm_vqdmlsdhq_m_s8): Likewise.
11574 (__arm_vqdmlsdhq_m_s32): Likewise.
11575 (__arm_vqdmlsdhq_m_s16): Likewise.
11576 (__arm_vqdmlsdhxq_m_s8): Likewise.
11577 (__arm_vqdmlsdhxq_m_s32): Likewise.
11578 (__arm_vqdmlsdhxq_m_s16): Likewise.
11579 (__arm_vqdmulhq_m_n_s8): Likewise.
11580 (__arm_vqdmulhq_m_n_s32): Likewise.
11581 (__arm_vqdmulhq_m_n_s16): Likewise.
11582 (__arm_vqdmulhq_m_s8): Likewise.
11583 (__arm_vqdmulhq_m_s32): Likewise.
11584 (__arm_vqdmulhq_m_s16): Likewise.
11585 (__arm_vqrdmladhq_m_s8): Likewise.
11586 (__arm_vqrdmladhq_m_s32): Likewise.
11587 (__arm_vqrdmladhq_m_s16): Likewise.
11588 (__arm_vqrdmladhxq_m_s8): Likewise.
11589 (__arm_vqrdmladhxq_m_s32): Likewise.
11590 (__arm_vqrdmladhxq_m_s16): Likewise.
11591 (__arm_vqrdmlahq_m_n_s8): Likewise.
11592 (__arm_vqrdmlahq_m_n_s32): Likewise.
11593 (__arm_vqrdmlahq_m_n_s16): Likewise.
11594 (__arm_vqrdmlahq_m_n_u8): Likewise.
11595 (__arm_vqrdmlahq_m_n_u32): Likewise.
11596 (__arm_vqrdmlahq_m_n_u16): Likewise.
11597 (__arm_vqrdmlashq_m_n_s8): Likewise.
11598 (__arm_vqrdmlashq_m_n_s32): Likewise.
11599 (__arm_vqrdmlashq_m_n_s16): Likewise.
11600 (__arm_vqrdmlashq_m_n_u8): Likewise.
11601 (__arm_vqrdmlashq_m_n_u32): Likewise.
11602 (__arm_vqrdmlashq_m_n_u16): Likewise.
11603 (__arm_vqrdmlsdhq_m_s8): Likewise.
11604 (__arm_vqrdmlsdhq_m_s32): Likewise.
11605 (__arm_vqrdmlsdhq_m_s16): Likewise.
11606 (__arm_vqrdmlsdhxq_m_s8): Likewise.
11607 (__arm_vqrdmlsdhxq_m_s32): Likewise.
11608 (__arm_vqrdmlsdhxq_m_s16): Likewise.
11609 (__arm_vqrdmulhq_m_n_s8): Likewise.
11610 (__arm_vqrdmulhq_m_n_s32): Likewise.
11611 (__arm_vqrdmulhq_m_n_s16): Likewise.
11612 (__arm_vqrdmulhq_m_s8): Likewise.
11613 (__arm_vqrdmulhq_m_s32): Likewise.
11614 (__arm_vqrdmulhq_m_s16): Likewise.
11615 (__arm_vqrshlq_m_s8): Likewise.
11616 (__arm_vqrshlq_m_s32): Likewise.
11617 (__arm_vqrshlq_m_s16): Likewise.
11618 (__arm_vqrshlq_m_u8): Likewise.
11619 (__arm_vqrshlq_m_u32): Likewise.
11620 (__arm_vqrshlq_m_u16): Likewise.
11621 (__arm_vqshlq_m_n_s8): Likewise.
11622 (__arm_vqshlq_m_n_s32): Likewise.
11623 (__arm_vqshlq_m_n_s16): Likewise.
11624 (__arm_vqshlq_m_n_u8): Likewise.
11625 (__arm_vqshlq_m_n_u32): Likewise.
11626 (__arm_vqshlq_m_n_u16): Likewise.
11627 (__arm_vqshlq_m_s8): Likewise.
11628 (__arm_vqshlq_m_s32): Likewise.
11629 (__arm_vqshlq_m_s16): Likewise.
11630 (__arm_vqshlq_m_u8): Likewise.
11631 (__arm_vqshlq_m_u32): Likewise.
11632 (__arm_vqshlq_m_u16): Likewise.
11633 (__arm_vqsubq_m_n_s8): Likewise.
11634 (__arm_vqsubq_m_n_s32): Likewise.
11635 (__arm_vqsubq_m_n_s16): Likewise.
11636 (__arm_vqsubq_m_n_u8): Likewise.
11637 (__arm_vqsubq_m_n_u32): Likewise.
11638 (__arm_vqsubq_m_n_u16): Likewise.
11639 (__arm_vqsubq_m_s8): Likewise.
11640 (__arm_vqsubq_m_s32): Likewise.
11641 (__arm_vqsubq_m_s16): Likewise.
11642 (__arm_vqsubq_m_u8): Likewise.
11643 (__arm_vqsubq_m_u32): Likewise.
11644 (__arm_vqsubq_m_u16): Likewise.
11645 (__arm_vrhaddq_m_s8): Likewise.
11646 (__arm_vrhaddq_m_s32): Likewise.
11647 (__arm_vrhaddq_m_s16): Likewise.
11648 (__arm_vrhaddq_m_u8): Likewise.
11649 (__arm_vrhaddq_m_u32): Likewise.
11650 (__arm_vrhaddq_m_u16): Likewise.
11651 (__arm_vrmulhq_m_s8): Likewise.
11652 (__arm_vrmulhq_m_s32): Likewise.
11653 (__arm_vrmulhq_m_s16): Likewise.
11654 (__arm_vrmulhq_m_u8): Likewise.
11655 (__arm_vrmulhq_m_u32): Likewise.
11656 (__arm_vrmulhq_m_u16): Likewise.
11657 (__arm_vrshlq_m_s8): Likewise.
11658 (__arm_vrshlq_m_s32): Likewise.
11659 (__arm_vrshlq_m_s16): Likewise.
11660 (__arm_vrshlq_m_u8): Likewise.
11661 (__arm_vrshlq_m_u32): Likewise.
11662 (__arm_vrshlq_m_u16): Likewise.
11663 (__arm_vrshrq_m_n_s8): Likewise.
11664 (__arm_vrshrq_m_n_s32): Likewise.
11665 (__arm_vrshrq_m_n_s16): Likewise.
11666 (__arm_vrshrq_m_n_u8): Likewise.
11667 (__arm_vrshrq_m_n_u32): Likewise.
11668 (__arm_vrshrq_m_n_u16): Likewise.
11669 (__arm_vshlq_m_n_s8): Likewise.
11670 (__arm_vshlq_m_n_s32): Likewise.
11671 (__arm_vshlq_m_n_s16): Likewise.
11672 (__arm_vshlq_m_n_u8): Likewise.
11673 (__arm_vshlq_m_n_u32): Likewise.
11674 (__arm_vshlq_m_n_u16): Likewise.
11675 (__arm_vshrq_m_n_s8): Likewise.
11676 (__arm_vshrq_m_n_s32): Likewise.
11677 (__arm_vshrq_m_n_s16): Likewise.
11678 (__arm_vshrq_m_n_u8): Likewise.
11679 (__arm_vshrq_m_n_u32): Likewise.
11680 (__arm_vshrq_m_n_u16): Likewise.
11681 (__arm_vsliq_m_n_s8): Likewise.
11682 (__arm_vsliq_m_n_s32): Likewise.
11683 (__arm_vsliq_m_n_s16): Likewise.
11684 (__arm_vsliq_m_n_u8): Likewise.
11685 (__arm_vsliq_m_n_u32): Likewise.
11686 (__arm_vsliq_m_n_u16): Likewise.
11687 (__arm_vsubq_m_n_s8): Likewise.
11688 (__arm_vsubq_m_n_s32): Likewise.
11689 (__arm_vsubq_m_n_s16): Likewise.
11690 (__arm_vsubq_m_n_u8): Likewise.
11691 (__arm_vsubq_m_n_u32): Likewise.
11692 (__arm_vsubq_m_n_u16): Likewise.
11693 (vqdmladhq_m): Define polymorphic variant.
11694 (vqdmladhxq_m): Likewise.
11695 (vqdmlsdhq_m): Likewise.
11696 (vqdmlsdhxq_m): Likewise.
11697 (vabdq_m): Likewise.
11698 (vandq_m): Likewise.
11699 (vbicq_m): Likewise.
11700 (vbrsrq_m_n): Likewise.
11701 (vcaddq_rot270_m): Likewise.
11702 (vcaddq_rot90_m): Likewise.
11703 (veorq_m): Likewise.
11704 (vmaxq_m): Likewise.
11705 (vminq_m): Likewise.
11706 (vmladavaq_p): Likewise.
11707 (vmlaq_m_n): Likewise.
11708 (vmlasq_m_n): Likewise.
11709 (vmulhq_m): Likewise.
11710 (vmullbq_int_m): Likewise.
11711 (vmulltq_int_m): Likewise.
11712 (vornq_m): Likewise.
11713 (vorrq_m): Likewise.
11714 (vqdmlahq_m_n): Likewise.
11715 (vqrdmlahq_m_n): Likewise.
11716 (vqrdmlashq_m_n): Likewise.
11717 (vqrshlq_m): Likewise.
11718 (vqshlq_m_n): Likewise.
11719 (vqshlq_m): Likewise.
11720 (vrhaddq_m): Likewise.
11721 (vrmulhq_m): Likewise.
11722 (vrshlq_m): Likewise.
11723 (vrshrq_m_n): Likewise.
11724 (vshlq_m_n): Likewise.
11725 (vshrq_m_n): Likewise.
11726 (vsliq_m): Likewise.
11727 (vaddq_m_n): Likewise.
11728 (vaddq_m): Likewise.
11729 (vhaddq_m_n): Likewise.
11730 (vhaddq_m): Likewise.
11731 (vhcaddq_rot270_m): Likewise.
11732 (vhcaddq_rot90_m): Likewise.
11733 (vhsubq_m): Likewise.
11734 (vhsubq_m_n): Likewise.
11735 (vmulq_m_n): Likewise.
11736 (vmulq_m): Likewise.
11737 (vqaddq_m_n): Likewise.
11738 (vqaddq_m): Likewise.
11739 (vqdmulhq_m_n): Likewise.
11740 (vqdmulhq_m): Likewise.
11741 (vsubq_m_n): Likewise.
11742 (vsliq_m_n): Likewise.
11743 (vqsubq_m_n): Likewise.
11744 (vqsubq_m): Likewise.
11745 (vqrdmulhq_m): Likewise.
11746 (vqrdmulhq_m_n): Likewise.
11747 (vqrdmlsdhxq_m): Likewise.
11748 (vqrdmlsdhq_m): Likewise.
11749 (vqrdmladhq_m): Likewise.
11750 (vqrdmladhxq_m): Likewise.
11751 (vmlsdavaxq_p): Likewise.
11752 (vmlsdavaq_p): Likewise.
11753 (vmladavaxq_p): Likewise.
11754 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
11756 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11757 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11758 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
11759 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11760 * config/arm/mve.md (VHSUBQ_M): Define iterators.
11761 (VSLIQ_M_N): Likewise.
11762 (VQRDMLAHQ_M_N): Likewise.
11763 (VRSHLQ_M): Likewise.
11764 (VMINQ_M): Likewise.
11765 (VMULLBQ_INT_M): Likewise.
11766 (VMULHQ_M): Likewise.
11767 (VMULQ_M): Likewise.
11768 (VHSUBQ_M_N): Likewise.
11769 (VHADDQ_M_N): Likewise.
11770 (VORRQ_M): Likewise.
11771 (VRMULHQ_M): Likewise.
11772 (VQADDQ_M): Likewise.
11773 (VRSHRQ_M_N): Likewise.
11774 (VQSUBQ_M_N): Likewise.
11775 (VADDQ_M): Likewise.
11776 (VORNQ_M): Likewise.
11777 (VQDMLAHQ_M_N): Likewise.
11778 (VRHADDQ_M): Likewise.
11779 (VQSHLQ_M): Likewise.
11780 (VANDQ_M): Likewise.
11781 (VBICQ_M): Likewise.
11782 (VSHLQ_M_N): Likewise.
11783 (VCADDQ_ROT270_M): Likewise.
11784 (VQRSHLQ_M): Likewise.
11785 (VQADDQ_M_N): Likewise.
11786 (VADDQ_M_N): Likewise.
11787 (VMAXQ_M): Likewise.
11788 (VQSUBQ_M): Likewise.
11789 (VMLASQ_M_N): Likewise.
11790 (VMLADAVAQ_P): Likewise.
11791 (VBRSRQ_M_N): Likewise.
11792 (VMULQ_M_N): Likewise.
11793 (VCADDQ_ROT90_M): Likewise.
11794 (VMULLTQ_INT_M): Likewise.
11795 (VEORQ_M): Likewise.
11796 (VSHRQ_M_N): Likewise.
11797 (VSUBQ_M_N): Likewise.
11798 (VHADDQ_M): Likewise.
11799 (VABDQ_M): Likewise.
11800 (VQRDMLASHQ_M_N): Likewise.
11801 (VMLAQ_M_N): Likewise.
11802 (VQSHLQ_M_N): Likewise.
11803 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
11804 (mve_vaddq_m_n_<supf><mode>): Likewise.
11805 (mve_vaddq_m_<supf><mode>): Likewise.
11806 (mve_vandq_m_<supf><mode>): Likewise.
11807 (mve_vbicq_m_<supf><mode>): Likewise.
11808 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
11809 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
11810 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
11811 (mve_veorq_m_<supf><mode>): Likewise.
11812 (mve_vhaddq_m_n_<supf><mode>): Likewise.
11813 (mve_vhaddq_m_<supf><mode>): Likewise.
11814 (mve_vhsubq_m_n_<supf><mode>): Likewise.
11815 (mve_vhsubq_m_<supf><mode>): Likewise.
11816 (mve_vmaxq_m_<supf><mode>): Likewise.
11817 (mve_vminq_m_<supf><mode>): Likewise.
11818 (mve_vmladavaq_p_<supf><mode>): Likewise.
11819 (mve_vmlaq_m_n_<supf><mode>): Likewise.
11820 (mve_vmlasq_m_n_<supf><mode>): Likewise.
11821 (mve_vmulhq_m_<supf><mode>): Likewise.
11822 (mve_vmullbq_int_m_<supf><mode>): Likewise.
11823 (mve_vmulltq_int_m_<supf><mode>): Likewise.
11824 (mve_vmulq_m_n_<supf><mode>): Likewise.
11825 (mve_vmulq_m_<supf><mode>): Likewise.
11826 (mve_vornq_m_<supf><mode>): Likewise.
11827 (mve_vorrq_m_<supf><mode>): Likewise.
11828 (mve_vqaddq_m_n_<supf><mode>): Likewise.
11829 (mve_vqaddq_m_<supf><mode>): Likewise.
11830 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
11831 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
11832 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
11833 (mve_vqrshlq_m_<supf><mode>): Likewise.
11834 (mve_vqshlq_m_n_<supf><mode>): Likewise.
11835 (mve_vqshlq_m_<supf><mode>): Likewise.
11836 (mve_vqsubq_m_n_<supf><mode>): Likewise.
11837 (mve_vqsubq_m_<supf><mode>): Likewise.
11838 (mve_vrhaddq_m_<supf><mode>): Likewise.
11839 (mve_vrmulhq_m_<supf><mode>): Likewise.
11840 (mve_vrshlq_m_<supf><mode>): Likewise.
11841 (mve_vrshrq_m_n_<supf><mode>): Likewise.
11842 (mve_vshlq_m_n_<supf><mode>): Likewise.
11843 (mve_vshrq_m_n_<supf><mode>): Likewise.
11844 (mve_vsliq_m_n_<supf><mode>): Likewise.
11845 (mve_vsubq_m_n_<supf><mode>): Likewise.
11846 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
11847 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
11848 (mve_vmladavaxq_p_s<mode>): Likewise.
11849 (mve_vmlsdavaq_p_s<mode>): Likewise.
11850 (mve_vmlsdavaxq_p_s<mode>): Likewise.
11851 (mve_vqdmladhq_m_s<mode>): Likewise.
11852 (mve_vqdmladhxq_m_s<mode>): Likewise.
11853 (mve_vqdmlsdhq_m_s<mode>): Likewise.
11854 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
11855 (mve_vqdmulhq_m_n_s<mode>): Likewise.
11856 (mve_vqdmulhq_m_s<mode>): Likewise.
11857 (mve_vqrdmladhq_m_s<mode>): Likewise.
11858 (mve_vqrdmladhxq_m_s<mode>): Likewise.
11859 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
11860 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
11861 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
11862 (mve_vqrdmulhq_m_s<mode>): Likewise.
11864 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11865 Mihail Ionescu <mihail.ionescu@arm.com>
11866 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11868 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
11869 Define builtin qualifier.
11870 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11871 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11872 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11873 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11874 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11875 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11876 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11877 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
11878 (vsubq_m_s8): Likewise.
11879 (vcvtq_m_n_f16_u16): Likewise.
11880 (vqshluq_m_n_s8): Likewise.
11881 (vabavq_p_s8): Likewise.
11882 (vsriq_m_n_u8): Likewise.
11883 (vshlq_m_u8): Likewise.
11884 (vsubq_m_u8): Likewise.
11885 (vabavq_p_u8): Likewise.
11886 (vshlq_m_s8): Likewise.
11887 (vcvtq_m_n_f16_s16): Likewise.
11888 (vsriq_m_n_s16): Likewise.
11889 (vsubq_m_s16): Likewise.
11890 (vcvtq_m_n_f32_u32): Likewise.
11891 (vqshluq_m_n_s16): Likewise.
11892 (vabavq_p_s16): Likewise.
11893 (vsriq_m_n_u16): Likewise.
11894 (vshlq_m_u16): Likewise.
11895 (vsubq_m_u16): Likewise.
11896 (vabavq_p_u16): Likewise.
11897 (vshlq_m_s16): Likewise.
11898 (vcvtq_m_n_f32_s32): Likewise.
11899 (vsriq_m_n_s32): Likewise.
11900 (vsubq_m_s32): Likewise.
11901 (vqshluq_m_n_s32): Likewise.
11902 (vabavq_p_s32): Likewise.
11903 (vsriq_m_n_u32): Likewise.
11904 (vshlq_m_u32): Likewise.
11905 (vsubq_m_u32): Likewise.
11906 (vabavq_p_u32): Likewise.
11907 (vshlq_m_s32): Likewise.
11908 (__arm_vsriq_m_n_s8): Define intrinsic.
11909 (__arm_vsubq_m_s8): Likewise.
11910 (__arm_vqshluq_m_n_s8): Likewise.
11911 (__arm_vabavq_p_s8): Likewise.
11912 (__arm_vsriq_m_n_u8): Likewise.
11913 (__arm_vshlq_m_u8): Likewise.
11914 (__arm_vsubq_m_u8): Likewise.
11915 (__arm_vabavq_p_u8): Likewise.
11916 (__arm_vshlq_m_s8): Likewise.
11917 (__arm_vsriq_m_n_s16): Likewise.
11918 (__arm_vsubq_m_s16): Likewise.
11919 (__arm_vqshluq_m_n_s16): Likewise.
11920 (__arm_vabavq_p_s16): Likewise.
11921 (__arm_vsriq_m_n_u16): Likewise.
11922 (__arm_vshlq_m_u16): Likewise.
11923 (__arm_vsubq_m_u16): Likewise.
11924 (__arm_vabavq_p_u16): Likewise.
11925 (__arm_vshlq_m_s16): Likewise.
11926 (__arm_vsriq_m_n_s32): Likewise.
11927 (__arm_vsubq_m_s32): Likewise.
11928 (__arm_vqshluq_m_n_s32): Likewise.
11929 (__arm_vabavq_p_s32): Likewise.
11930 (__arm_vsriq_m_n_u32): Likewise.
11931 (__arm_vshlq_m_u32): Likewise.
11932 (__arm_vsubq_m_u32): Likewise.
11933 (__arm_vabavq_p_u32): Likewise.
11934 (__arm_vshlq_m_s32): Likewise.
11935 (__arm_vcvtq_m_n_f16_u16): Likewise.
11936 (__arm_vcvtq_m_n_f16_s16): Likewise.
11937 (__arm_vcvtq_m_n_f32_u32): Likewise.
11938 (__arm_vcvtq_m_n_f32_s32): Likewise.
11939 (vcvtq_m_n): Define polymorphic variant.
11940 (vqshluq_m_n): Likewise.
11941 (vshlq_m): Likewise.
11942 (vsriq_m_n): Likewise.
11943 (vsubq_m): Likewise.
11944 (vabavq_p): Likewise.
11945 * config/arm/arm_mve_builtins.def
11946 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
11947 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11948 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11949 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11950 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11951 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11952 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11953 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11954 * config/arm/mve.md (VABAVQ_P): Define iterator.
11955 (VSHLQ_M): Likewise.
11956 (VSRIQ_M_N): Likewise.
11957 (VSUBQ_M): Likewise.
11958 (VCVTQ_M_N_TO_F): Likewise.
11959 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
11960 (mve_vqshluq_m_n_s<mode>): Likewise.
11961 (mve_vshlq_m_<supf><mode>): Likewise.
11962 (mve_vsriq_m_n_<supf><mode>): Likewise.
11963 (mve_vsubq_m_<supf><mode>): Likewise.
11964 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
11966 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11967 Mihail Ionescu <mihail.ionescu@arm.com>
11968 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11970 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
11971 (vrmlsldavhaq_s32): Likewise.
11972 (vrmlsldavhaxq_s32): Likewise.
11973 (vaddlvaq_p_s32): Likewise.
11974 (vcvtbq_m_f16_f32): Likewise.
11975 (vcvtbq_m_f32_f16): Likewise.
11976 (vcvttq_m_f16_f32): Likewise.
11977 (vcvttq_m_f32_f16): Likewise.
11978 (vrev16q_m_s8): Likewise.
11979 (vrev32q_m_f16): Likewise.
11980 (vrmlaldavhq_p_s32): Likewise.
11981 (vrmlaldavhxq_p_s32): Likewise.
11982 (vrmlsldavhq_p_s32): Likewise.
11983 (vrmlsldavhxq_p_s32): Likewise.
11984 (vaddlvaq_p_u32): Likewise.
11985 (vrev16q_m_u8): Likewise.
11986 (vrmlaldavhq_p_u32): Likewise.
11987 (vmvnq_m_n_s16): Likewise.
11988 (vorrq_m_n_s16): Likewise.
11989 (vqrshrntq_n_s16): Likewise.
11990 (vqshrnbq_n_s16): Likewise.
11991 (vqshrntq_n_s16): Likewise.
11992 (vrshrnbq_n_s16): Likewise.
11993 (vrshrntq_n_s16): Likewise.
11994 (vshrnbq_n_s16): Likewise.
11995 (vshrntq_n_s16): Likewise.
11996 (vcmlaq_f16): Likewise.
11997 (vcmlaq_rot180_f16): Likewise.
11998 (vcmlaq_rot270_f16): Likewise.
11999 (vcmlaq_rot90_f16): Likewise.
12000 (vfmaq_f16): Likewise.
12001 (vfmaq_n_f16): Likewise.
12002 (vfmasq_n_f16): Likewise.
12003 (vfmsq_f16): Likewise.
12004 (vmlaldavaq_s16): Likewise.
12005 (vmlaldavaxq_s16): Likewise.
12006 (vmlsldavaq_s16): Likewise.
12007 (vmlsldavaxq_s16): Likewise.
12008 (vabsq_m_f16): Likewise.
12009 (vcvtmq_m_s16_f16): Likewise.
12010 (vcvtnq_m_s16_f16): Likewise.
12011 (vcvtpq_m_s16_f16): Likewise.
12012 (vcvtq_m_s16_f16): Likewise.
12013 (vdupq_m_n_f16): Likewise.
12014 (vmaxnmaq_m_f16): Likewise.
12015 (vmaxnmavq_p_f16): Likewise.
12016 (vmaxnmvq_p_f16): Likewise.
12017 (vminnmaq_m_f16): Likewise.
12018 (vminnmavq_p_f16): Likewise.
12019 (vminnmvq_p_f16): Likewise.
12020 (vmlaldavq_p_s16): Likewise.
12021 (vmlaldavxq_p_s16): Likewise.
12022 (vmlsldavq_p_s16): Likewise.
12023 (vmlsldavxq_p_s16): Likewise.
12024 (vmovlbq_m_s8): Likewise.
12025 (vmovltq_m_s8): Likewise.
12026 (vmovnbq_m_s16): Likewise.
12027 (vmovntq_m_s16): Likewise.
12028 (vnegq_m_f16): Likewise.
12029 (vpselq_f16): Likewise.
12030 (vqmovnbq_m_s16): Likewise.
12031 (vqmovntq_m_s16): Likewise.
12032 (vrev32q_m_s8): Likewise.
12033 (vrev64q_m_f16): Likewise.
12034 (vrndaq_m_f16): Likewise.
12035 (vrndmq_m_f16): Likewise.
12036 (vrndnq_m_f16): Likewise.
12037 (vrndpq_m_f16): Likewise.
12038 (vrndq_m_f16): Likewise.
12039 (vrndxq_m_f16): Likewise.
12040 (vcmpeqq_m_n_f16): Likewise.
12041 (vcmpgeq_m_f16): Likewise.
12042 (vcmpgeq_m_n_f16): Likewise.
12043 (vcmpgtq_m_f16): Likewise.
12044 (vcmpgtq_m_n_f16): Likewise.
12045 (vcmpleq_m_f16): Likewise.
12046 (vcmpleq_m_n_f16): Likewise.
12047 (vcmpltq_m_f16): Likewise.
12048 (vcmpltq_m_n_f16): Likewise.
12049 (vcmpneq_m_f16): Likewise.
12050 (vcmpneq_m_n_f16): Likewise.
12051 (vmvnq_m_n_u16): Likewise.
12052 (vorrq_m_n_u16): Likewise.
12053 (vqrshruntq_n_s16): Likewise.
12054 (vqshrunbq_n_s16): Likewise.
12055 (vqshruntq_n_s16): Likewise.
12056 (vcvtmq_m_u16_f16): Likewise.
12057 (vcvtnq_m_u16_f16): Likewise.
12058 (vcvtpq_m_u16_f16): Likewise.
12059 (vcvtq_m_u16_f16): Likewise.
12060 (vqmovunbq_m_s16): Likewise.
12061 (vqmovuntq_m_s16): Likewise.
12062 (vqrshrntq_n_u16): Likewise.
12063 (vqshrnbq_n_u16): Likewise.
12064 (vqshrntq_n_u16): Likewise.
12065 (vrshrnbq_n_u16): Likewise.
12066 (vrshrntq_n_u16): Likewise.
12067 (vshrnbq_n_u16): Likewise.
12068 (vshrntq_n_u16): Likewise.
12069 (vmlaldavaq_u16): Likewise.
12070 (vmlaldavaxq_u16): Likewise.
12071 (vmlaldavq_p_u16): Likewise.
12072 (vmlaldavxq_p_u16): Likewise.
12073 (vmovlbq_m_u8): Likewise.
12074 (vmovltq_m_u8): Likewise.
12075 (vmovnbq_m_u16): Likewise.
12076 (vmovntq_m_u16): Likewise.
12077 (vqmovnbq_m_u16): Likewise.
12078 (vqmovntq_m_u16): Likewise.
12079 (vrev32q_m_u8): Likewise.
12080 (vmvnq_m_n_s32): Likewise.
12081 (vorrq_m_n_s32): Likewise.
12082 (vqrshrntq_n_s32): Likewise.
12083 (vqshrnbq_n_s32): Likewise.
12084 (vqshrntq_n_s32): Likewise.
12085 (vrshrnbq_n_s32): Likewise.
12086 (vrshrntq_n_s32): Likewise.
12087 (vshrnbq_n_s32): Likewise.
12088 (vshrntq_n_s32): Likewise.
12089 (vcmlaq_f32): Likewise.
12090 (vcmlaq_rot180_f32): Likewise.
12091 (vcmlaq_rot270_f32): Likewise.
12092 (vcmlaq_rot90_f32): Likewise.
12093 (vfmaq_f32): Likewise.
12094 (vfmaq_n_f32): Likewise.
12095 (vfmasq_n_f32): Likewise.
12096 (vfmsq_f32): Likewise.
12097 (vmlaldavaq_s32): Likewise.
12098 (vmlaldavaxq_s32): Likewise.
12099 (vmlsldavaq_s32): Likewise.
12100 (vmlsldavaxq_s32): Likewise.
12101 (vabsq_m_f32): Likewise.
12102 (vcvtmq_m_s32_f32): Likewise.
12103 (vcvtnq_m_s32_f32): Likewise.
12104 (vcvtpq_m_s32_f32): Likewise.
12105 (vcvtq_m_s32_f32): Likewise.
12106 (vdupq_m_n_f32): Likewise.
12107 (vmaxnmaq_m_f32): Likewise.
12108 (vmaxnmavq_p_f32): Likewise.
12109 (vmaxnmvq_p_f32): Likewise.
12110 (vminnmaq_m_f32): Likewise.
12111 (vminnmavq_p_f32): Likewise.
12112 (vminnmvq_p_f32): Likewise.
12113 (vmlaldavq_p_s32): Likewise.
12114 (vmlaldavxq_p_s32): Likewise.
12115 (vmlsldavq_p_s32): Likewise.
12116 (vmlsldavxq_p_s32): Likewise.
12117 (vmovlbq_m_s16): Likewise.
12118 (vmovltq_m_s16): Likewise.
12119 (vmovnbq_m_s32): Likewise.
12120 (vmovntq_m_s32): Likewise.
12121 (vnegq_m_f32): Likewise.
12122 (vpselq_f32): Likewise.
12123 (vqmovnbq_m_s32): Likewise.
12124 (vqmovntq_m_s32): Likewise.
12125 (vrev32q_m_s16): Likewise.
12126 (vrev64q_m_f32): Likewise.
12127 (vrndaq_m_f32): Likewise.
12128 (vrndmq_m_f32): Likewise.
12129 (vrndnq_m_f32): Likewise.
12130 (vrndpq_m_f32): Likewise.
12131 (vrndq_m_f32): Likewise.
12132 (vrndxq_m_f32): Likewise.
12133 (vcmpeqq_m_n_f32): Likewise.
12134 (vcmpgeq_m_f32): Likewise.
12135 (vcmpgeq_m_n_f32): Likewise.
12136 (vcmpgtq_m_f32): Likewise.
12137 (vcmpgtq_m_n_f32): Likewise.
12138 (vcmpleq_m_f32): Likewise.
12139 (vcmpleq_m_n_f32): Likewise.
12140 (vcmpltq_m_f32): Likewise.
12141 (vcmpltq_m_n_f32): Likewise.
12142 (vcmpneq_m_f32): Likewise.
12143 (vcmpneq_m_n_f32): Likewise.
12144 (vmvnq_m_n_u32): Likewise.
12145 (vorrq_m_n_u32): Likewise.
12146 (vqrshruntq_n_s32): Likewise.
12147 (vqshrunbq_n_s32): Likewise.
12148 (vqshruntq_n_s32): Likewise.
12149 (vcvtmq_m_u32_f32): Likewise.
12150 (vcvtnq_m_u32_f32): Likewise.
12151 (vcvtpq_m_u32_f32): Likewise.
12152 (vcvtq_m_u32_f32): Likewise.
12153 (vqmovunbq_m_s32): Likewise.
12154 (vqmovuntq_m_s32): Likewise.
12155 (vqrshrntq_n_u32): Likewise.
12156 (vqshrnbq_n_u32): Likewise.
12157 (vqshrntq_n_u32): Likewise.
12158 (vrshrnbq_n_u32): Likewise.
12159 (vrshrntq_n_u32): Likewise.
12160 (vshrnbq_n_u32): Likewise.
12161 (vshrntq_n_u32): Likewise.
12162 (vmlaldavaq_u32): Likewise.
12163 (vmlaldavaxq_u32): Likewise.
12164 (vmlaldavq_p_u32): Likewise.
12165 (vmlaldavxq_p_u32): Likewise.
12166 (vmovlbq_m_u16): Likewise.
12167 (vmovltq_m_u16): Likewise.
12168 (vmovnbq_m_u32): Likewise.
12169 (vmovntq_m_u32): Likewise.
12170 (vqmovnbq_m_u32): Likewise.
12171 (vqmovntq_m_u32): Likewise.
12172 (vrev32q_m_u16): Likewise.
12173 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
12174 (__arm_vrmlsldavhaq_s32): Likewise.
12175 (__arm_vrmlsldavhaxq_s32): Likewise.
12176 (__arm_vaddlvaq_p_s32): Likewise.
12177 (__arm_vrev16q_m_s8): Likewise.
12178 (__arm_vrmlaldavhq_p_s32): Likewise.
12179 (__arm_vrmlaldavhxq_p_s32): Likewise.
12180 (__arm_vrmlsldavhq_p_s32): Likewise.
12181 (__arm_vrmlsldavhxq_p_s32): Likewise.
12182 (__arm_vaddlvaq_p_u32): Likewise.
12183 (__arm_vrev16q_m_u8): Likewise.
12184 (__arm_vrmlaldavhq_p_u32): Likewise.
12185 (__arm_vmvnq_m_n_s16): Likewise.
12186 (__arm_vorrq_m_n_s16): Likewise.
12187 (__arm_vqrshrntq_n_s16): Likewise.
12188 (__arm_vqshrnbq_n_s16): Likewise.
12189 (__arm_vqshrntq_n_s16): Likewise.
12190 (__arm_vrshrnbq_n_s16): Likewise.
12191 (__arm_vrshrntq_n_s16): Likewise.
12192 (__arm_vshrnbq_n_s16): Likewise.
12193 (__arm_vshrntq_n_s16): Likewise.
12194 (__arm_vmlaldavaq_s16): Likewise.
12195 (__arm_vmlaldavaxq_s16): Likewise.
12196 (__arm_vmlsldavaq_s16): Likewise.
12197 (__arm_vmlsldavaxq_s16): Likewise.
12198 (__arm_vmlaldavq_p_s16): Likewise.
12199 (__arm_vmlaldavxq_p_s16): Likewise.
12200 (__arm_vmlsldavq_p_s16): Likewise.
12201 (__arm_vmlsldavxq_p_s16): Likewise.
12202 (__arm_vmovlbq_m_s8): Likewise.
12203 (__arm_vmovltq_m_s8): Likewise.
12204 (__arm_vmovnbq_m_s16): Likewise.
12205 (__arm_vmovntq_m_s16): Likewise.
12206 (__arm_vqmovnbq_m_s16): Likewise.
12207 (__arm_vqmovntq_m_s16): Likewise.
12208 (__arm_vrev32q_m_s8): Likewise.
12209 (__arm_vmvnq_m_n_u16): Likewise.
12210 (__arm_vorrq_m_n_u16): Likewise.
12211 (__arm_vqrshruntq_n_s16): Likewise.
12212 (__arm_vqshrunbq_n_s16): Likewise.
12213 (__arm_vqshruntq_n_s16): Likewise.
12214 (__arm_vqmovunbq_m_s16): Likewise.
12215 (__arm_vqmovuntq_m_s16): Likewise.
12216 (__arm_vqrshrntq_n_u16): Likewise.
12217 (__arm_vqshrnbq_n_u16): Likewise.
12218 (__arm_vqshrntq_n_u16): Likewise.
12219 (__arm_vrshrnbq_n_u16): Likewise.
12220 (__arm_vrshrntq_n_u16): Likewise.
12221 (__arm_vshrnbq_n_u16): Likewise.
12222 (__arm_vshrntq_n_u16): Likewise.
12223 (__arm_vmlaldavaq_u16): Likewise.
12224 (__arm_vmlaldavaxq_u16): Likewise.
12225 (__arm_vmlaldavq_p_u16): Likewise.
12226 (__arm_vmlaldavxq_p_u16): Likewise.
12227 (__arm_vmovlbq_m_u8): Likewise.
12228 (__arm_vmovltq_m_u8): Likewise.
12229 (__arm_vmovnbq_m_u16): Likewise.
12230 (__arm_vmovntq_m_u16): Likewise.
12231 (__arm_vqmovnbq_m_u16): Likewise.
12232 (__arm_vqmovntq_m_u16): Likewise.
12233 (__arm_vrev32q_m_u8): Likewise.
12234 (__arm_vmvnq_m_n_s32): Likewise.
12235 (__arm_vorrq_m_n_s32): Likewise.
12236 (__arm_vqrshrntq_n_s32): Likewise.
12237 (__arm_vqshrnbq_n_s32): Likewise.
12238 (__arm_vqshrntq_n_s32): Likewise.
12239 (__arm_vrshrnbq_n_s32): Likewise.
12240 (__arm_vrshrntq_n_s32): Likewise.
12241 (__arm_vshrnbq_n_s32): Likewise.
12242 (__arm_vshrntq_n_s32): Likewise.
12243 (__arm_vmlaldavaq_s32): Likewise.
12244 (__arm_vmlaldavaxq_s32): Likewise.
12245 (__arm_vmlsldavaq_s32): Likewise.
12246 (__arm_vmlsldavaxq_s32): Likewise.
12247 (__arm_vmlaldavq_p_s32): Likewise.
12248 (__arm_vmlaldavxq_p_s32): Likewise.
12249 (__arm_vmlsldavq_p_s32): Likewise.
12250 (__arm_vmlsldavxq_p_s32): Likewise.
12251 (__arm_vmovlbq_m_s16): Likewise.
12252 (__arm_vmovltq_m_s16): Likewise.
12253 (__arm_vmovnbq_m_s32): Likewise.
12254 (__arm_vmovntq_m_s32): Likewise.
12255 (__arm_vqmovnbq_m_s32): Likewise.
12256 (__arm_vqmovntq_m_s32): Likewise.
12257 (__arm_vrev32q_m_s16): Likewise.
12258 (__arm_vmvnq_m_n_u32): Likewise.
12259 (__arm_vorrq_m_n_u32): Likewise.
12260 (__arm_vqrshruntq_n_s32): Likewise.
12261 (__arm_vqshrunbq_n_s32): Likewise.
12262 (__arm_vqshruntq_n_s32): Likewise.
12263 (__arm_vqmovunbq_m_s32): Likewise.
12264 (__arm_vqmovuntq_m_s32): Likewise.
12265 (__arm_vqrshrntq_n_u32): Likewise.
12266 (__arm_vqshrnbq_n_u32): Likewise.
12267 (__arm_vqshrntq_n_u32): Likewise.
12268 (__arm_vrshrnbq_n_u32): Likewise.
12269 (__arm_vrshrntq_n_u32): Likewise.
12270 (__arm_vshrnbq_n_u32): Likewise.
12271 (__arm_vshrntq_n_u32): Likewise.
12272 (__arm_vmlaldavaq_u32): Likewise.
12273 (__arm_vmlaldavaxq_u32): Likewise.
12274 (__arm_vmlaldavq_p_u32): Likewise.
12275 (__arm_vmlaldavxq_p_u32): Likewise.
12276 (__arm_vmovlbq_m_u16): Likewise.
12277 (__arm_vmovltq_m_u16): Likewise.
12278 (__arm_vmovnbq_m_u32): Likewise.
12279 (__arm_vmovntq_m_u32): Likewise.
12280 (__arm_vqmovnbq_m_u32): Likewise.
12281 (__arm_vqmovntq_m_u32): Likewise.
12282 (__arm_vrev32q_m_u16): Likewise.
12283 (__arm_vcvtbq_m_f16_f32): Likewise.
12284 (__arm_vcvtbq_m_f32_f16): Likewise.
12285 (__arm_vcvttq_m_f16_f32): Likewise.
12286 (__arm_vcvttq_m_f32_f16): Likewise.
12287 (__arm_vrev32q_m_f16): Likewise.
12288 (__arm_vcmlaq_f16): Likewise.
12289 (__arm_vcmlaq_rot180_f16): Likewise.
12290 (__arm_vcmlaq_rot270_f16): Likewise.
12291 (__arm_vcmlaq_rot90_f16): Likewise.
12292 (__arm_vfmaq_f16): Likewise.
12293 (__arm_vfmaq_n_f16): Likewise.
12294 (__arm_vfmasq_n_f16): Likewise.
12295 (__arm_vfmsq_f16): Likewise.
12296 (__arm_vabsq_m_f16): Likewise.
12297 (__arm_vcvtmq_m_s16_f16): Likewise.
12298 (__arm_vcvtnq_m_s16_f16): Likewise.
12299 (__arm_vcvtpq_m_s16_f16): Likewise.
12300 (__arm_vcvtq_m_s16_f16): Likewise.
12301 (__arm_vdupq_m_n_f16): Likewise.
12302 (__arm_vmaxnmaq_m_f16): Likewise.
12303 (__arm_vmaxnmavq_p_f16): Likewise.
12304 (__arm_vmaxnmvq_p_f16): Likewise.
12305 (__arm_vminnmaq_m_f16): Likewise.
12306 (__arm_vminnmavq_p_f16): Likewise.
12307 (__arm_vminnmvq_p_f16): Likewise.
12308 (__arm_vnegq_m_f16): Likewise.
12309 (__arm_vpselq_f16): Likewise.
12310 (__arm_vrev64q_m_f16): Likewise.
12311 (__arm_vrndaq_m_f16): Likewise.
12312 (__arm_vrndmq_m_f16): Likewise.
12313 (__arm_vrndnq_m_f16): Likewise.
12314 (__arm_vrndpq_m_f16): Likewise.
12315 (__arm_vrndq_m_f16): Likewise.
12316 (__arm_vrndxq_m_f16): Likewise.
12317 (__arm_vcmpeqq_m_n_f16): Likewise.
12318 (__arm_vcmpgeq_m_f16): Likewise.
12319 (__arm_vcmpgeq_m_n_f16): Likewise.
12320 (__arm_vcmpgtq_m_f16): Likewise.
12321 (__arm_vcmpgtq_m_n_f16): Likewise.
12322 (__arm_vcmpleq_m_f16): Likewise.
12323 (__arm_vcmpleq_m_n_f16): Likewise.
12324 (__arm_vcmpltq_m_f16): Likewise.
12325 (__arm_vcmpltq_m_n_f16): Likewise.
12326 (__arm_vcmpneq_m_f16): Likewise.
12327 (__arm_vcmpneq_m_n_f16): Likewise.
12328 (__arm_vcvtmq_m_u16_f16): Likewise.
12329 (__arm_vcvtnq_m_u16_f16): Likewise.
12330 (__arm_vcvtpq_m_u16_f16): Likewise.
12331 (__arm_vcvtq_m_u16_f16): Likewise.
12332 (__arm_vcmlaq_f32): Likewise.
12333 (__arm_vcmlaq_rot180_f32): Likewise.
12334 (__arm_vcmlaq_rot270_f32): Likewise.
12335 (__arm_vcmlaq_rot90_f32): Likewise.
12336 (__arm_vfmaq_f32): Likewise.
12337 (__arm_vfmaq_n_f32): Likewise.
12338 (__arm_vfmasq_n_f32): Likewise.
12339 (__arm_vfmsq_f32): Likewise.
12340 (__arm_vabsq_m_f32): Likewise.
12341 (__arm_vcvtmq_m_s32_f32): Likewise.
12342 (__arm_vcvtnq_m_s32_f32): Likewise.
12343 (__arm_vcvtpq_m_s32_f32): Likewise.
12344 (__arm_vcvtq_m_s32_f32): Likewise.
12345 (__arm_vdupq_m_n_f32): Likewise.
12346 (__arm_vmaxnmaq_m_f32): Likewise.
12347 (__arm_vmaxnmavq_p_f32): Likewise.
12348 (__arm_vmaxnmvq_p_f32): Likewise.
12349 (__arm_vminnmaq_m_f32): Likewise.
12350 (__arm_vminnmavq_p_f32): Likewise.
12351 (__arm_vminnmvq_p_f32): Likewise.
12352 (__arm_vnegq_m_f32): Likewise.
12353 (__arm_vpselq_f32): Likewise.
12354 (__arm_vrev64q_m_f32): Likewise.
12355 (__arm_vrndaq_m_f32): Likewise.
12356 (__arm_vrndmq_m_f32): Likewise.
12357 (__arm_vrndnq_m_f32): Likewise.
12358 (__arm_vrndpq_m_f32): Likewise.
12359 (__arm_vrndq_m_f32): Likewise.
12360 (__arm_vrndxq_m_f32): Likewise.
12361 (__arm_vcmpeqq_m_n_f32): Likewise.
12362 (__arm_vcmpgeq_m_f32): Likewise.
12363 (__arm_vcmpgeq_m_n_f32): Likewise.
12364 (__arm_vcmpgtq_m_f32): Likewise.
12365 (__arm_vcmpgtq_m_n_f32): Likewise.
12366 (__arm_vcmpleq_m_f32): Likewise.
12367 (__arm_vcmpleq_m_n_f32): Likewise.
12368 (__arm_vcmpltq_m_f32): Likewise.
12369 (__arm_vcmpltq_m_n_f32): Likewise.
12370 (__arm_vcmpneq_m_f32): Likewise.
12371 (__arm_vcmpneq_m_n_f32): Likewise.
12372 (__arm_vcvtmq_m_u32_f32): Likewise.
12373 (__arm_vcvtnq_m_u32_f32): Likewise.
12374 (__arm_vcvtpq_m_u32_f32): Likewise.
12375 (__arm_vcvtq_m_u32_f32): Likewise.
12376 (vcvtq_m): Define polymorphic variant.
12377 (vabsq_m): Likewise.
12378 (vcmlaq): Likewise.
12379 (vcmlaq_rot180): Likewise.
12380 (vcmlaq_rot270): Likewise.
12381 (vcmlaq_rot90): Likewise.
12382 (vcmpeqq_m_n): Likewise.
12383 (vcmpgeq_m_n): Likewise.
12384 (vrndxq_m): Likewise.
12385 (vrndq_m): Likewise.
12386 (vrndpq_m): Likewise.
12387 (vcmpgtq_m_n): Likewise.
12388 (vcmpgtq_m): Likewise.
12389 (vcmpleq_m): Likewise.
12390 (vcmpleq_m_n): Likewise.
12391 (vcmpltq_m_n): Likewise.
12392 (vcmpltq_m): Likewise.
12393 (vcmpneq_m): Likewise.
12394 (vcmpneq_m_n): Likewise.
12395 (vcvtbq_m): Likewise.
12396 (vcvttq_m): Likewise.
12397 (vcvtmq_m): Likewise.
12398 (vcvtnq_m): Likewise.
12399 (vcvtpq_m): Likewise.
12400 (vdupq_m_n): Likewise.
12401 (vfmaq_n): Likewise.
12403 (vfmasq_n): Likewise.
12405 (vmaxnmaq_m): Likewise.
12406 (vmaxnmavq_m): Likewise.
12407 (vmaxnmvq_m): Likewise.
12408 (vmaxnmavq_p): Likewise.
12409 (vmaxnmvq_p): Likewise.
12410 (vminnmaq_m): Likewise.
12411 (vminnmavq_p): Likewise.
12412 (vminnmvq_p): Likewise.
12413 (vrndnq_m): Likewise.
12414 (vrndaq_m): Likewise.
12415 (vrndmq_m): Likewise.
12416 (vrev64q_m): Likewise.
12417 (vrev32q_m): Likewise.
12418 (vpselq): Likewise.
12419 (vnegq_m): Likewise.
12420 (vcmpgeq_m): Likewise.
12421 (vshrntq_n): Likewise.
12422 (vrshrntq_n): Likewise.
12423 (vmovlbq_m): Likewise.
12424 (vmovnbq_m): Likewise.
12425 (vmovntq_m): Likewise.
12426 (vmvnq_m_n): Likewise.
12427 (vmvnq_m): Likewise.
12428 (vshrnbq_n): Likewise.
12429 (vrshrnbq_n): Likewise.
12430 (vqshruntq_n): Likewise.
12431 (vrev16q_m): Likewise.
12432 (vqshrunbq_n): Likewise.
12433 (vqshrntq_n): Likewise.
12434 (vqrshruntq_n): Likewise.
12435 (vqrshrntq_n): Likewise.
12436 (vqshrnbq_n): Likewise.
12437 (vqmovuntq_m): Likewise.
12438 (vqmovntq_m): Likewise.
12439 (vqmovnbq_m): Likewise.
12440 (vorrq_m_n): Likewise.
12441 (vmovltq_m): Likewise.
12442 (vqmovunbq_m): Likewise.
12443 (vaddlvaq_p): Likewise.
12444 (vmlaldavaq): Likewise.
12445 (vmlaldavaxq): Likewise.
12446 (vmlaldavq_p): Likewise.
12447 (vmlaldavxq_p): Likewise.
12448 (vmlsldavaq): Likewise.
12449 (vmlsldavaxq): Likewise.
12450 (vmlsldavq_p): Likewise.
12451 (vmlsldavxq_p): Likewise.
12452 (vrmlaldavhaxq): Likewise.
12453 (vrmlaldavhq_p): Likewise.
12454 (vrmlaldavhxq_p): Likewise.
12455 (vrmlsldavhaq): Likewise.
12456 (vrmlsldavhaxq): Likewise.
12457 (vrmlsldavhq_p): Likewise.
12458 (vrmlsldavhxq_p): Likewise.
12459 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
12461 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
12462 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
12463 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
12464 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
12465 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
12466 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
12467 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
12468 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
12469 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
12470 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
12471 (MVE_pred3): Likewise.
12472 (MVE_constraint1): Likewise.
12473 (MVE_pred1): Likewise.
12474 (VMLALDAVQ_P): Define iterator.
12475 (VQMOVNBQ_M): Likewise.
12476 (VMOVLTQ_M): Likewise.
12477 (VMOVNBQ_M): Likewise.
12478 (VRSHRNTQ_N): Likewise.
12479 (VORRQ_M_N): Likewise.
12480 (VREV32Q_M): Likewise.
12481 (VREV16Q_M): Likewise.
12482 (VQRSHRNTQ_N): Likewise.
12483 (VMOVNTQ_M): Likewise.
12484 (VMOVLBQ_M): Likewise.
12485 (VMLALDAVAQ): Likewise.
12486 (VQSHRNBQ_N): Likewise.
12487 (VSHRNBQ_N): Likewise.
12488 (VRSHRNBQ_N): Likewise.
12489 (VMLALDAVXQ_P): Likewise.
12490 (VQMOVNTQ_M): Likewise.
12491 (VMVNQ_M_N): Likewise.
12492 (VQSHRNTQ_N): Likewise.
12493 (VMLALDAVAXQ): Likewise.
12494 (VSHRNTQ_N): Likewise.
12495 (VCVTMQ_M): Likewise.
12496 (VCVTNQ_M): Likewise.
12497 (VCVTPQ_M): Likewise.
12498 (VCVTQ_M_N_FROM_F): Likewise.
12499 (VCVTQ_M_FROM_F): Likewise.
12500 (VRMLALDAVHQ_P): Likewise.
12501 (VADDLVAQ_P): Likewise.
12502 (mve_vrndq_m_f<mode>): Define RTL pattern.
12503 (mve_vabsq_m_f<mode>): Likewise.
12504 (mve_vaddlvaq_p_<supf>v4si): Likewise.
12505 (mve_vcmlaq_f<mode>): Likewise.
12506 (mve_vcmlaq_rot180_f<mode>): Likewise.
12507 (mve_vcmlaq_rot270_f<mode>): Likewise.
12508 (mve_vcmlaq_rot90_f<mode>): Likewise.
12509 (mve_vcmpeqq_m_n_f<mode>): Likewise.
12510 (mve_vcmpgeq_m_f<mode>): Likewise.
12511 (mve_vcmpgeq_m_n_f<mode>): Likewise.
12512 (mve_vcmpgtq_m_f<mode>): Likewise.
12513 (mve_vcmpgtq_m_n_f<mode>): Likewise.
12514 (mve_vcmpleq_m_f<mode>): Likewise.
12515 (mve_vcmpleq_m_n_f<mode>): Likewise.
12516 (mve_vcmpltq_m_f<mode>): Likewise.
12517 (mve_vcmpltq_m_n_f<mode>): Likewise.
12518 (mve_vcmpneq_m_f<mode>): Likewise.
12519 (mve_vcmpneq_m_n_f<mode>): Likewise.
12520 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
12521 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
12522 (mve_vcvttq_m_f16_f32v8hf): Likewise.
12523 (mve_vcvttq_m_f32_f16v4sf): Likewise.
12524 (mve_vdupq_m_n_f<mode>): Likewise.
12525 (mve_vfmaq_f<mode>): Likewise.
12526 (mve_vfmaq_n_f<mode>): Likewise.
12527 (mve_vfmasq_n_f<mode>): Likewise.
12528 (mve_vfmsq_f<mode>): Likewise.
12529 (mve_vmaxnmaq_m_f<mode>): Likewise.
12530 (mve_vmaxnmavq_p_f<mode>): Likewise.
12531 (mve_vmaxnmvq_p_f<mode>): Likewise.
12532 (mve_vminnmaq_m_f<mode>): Likewise.
12533 (mve_vminnmavq_p_f<mode>): Likewise.
12534 (mve_vminnmvq_p_f<mode>): Likewise.
12535 (mve_vmlaldavaq_<supf><mode>): Likewise.
12536 (mve_vmlaldavaxq_<supf><mode>): Likewise.
12537 (mve_vmlaldavq_p_<supf><mode>): Likewise.
12538 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
12539 (mve_vmlsldavaq_s<mode>): Likewise.
12540 (mve_vmlsldavaxq_s<mode>): Likewise.
12541 (mve_vmlsldavq_p_s<mode>): Likewise.
12542 (mve_vmlsldavxq_p_s<mode>): Likewise.
12543 (mve_vmovlbq_m_<supf><mode>): Likewise.
12544 (mve_vmovltq_m_<supf><mode>): Likewise.
12545 (mve_vmovnbq_m_<supf><mode>): Likewise.
12546 (mve_vmovntq_m_<supf><mode>): Likewise.
12547 (mve_vmvnq_m_n_<supf><mode>): Likewise.
12548 (mve_vnegq_m_f<mode>): Likewise.
12549 (mve_vorrq_m_n_<supf><mode>): Likewise.
12550 (mve_vpselq_f<mode>): Likewise.
12551 (mve_vqmovnbq_m_<supf><mode>): Likewise.
12552 (mve_vqmovntq_m_<supf><mode>): Likewise.
12553 (mve_vqmovunbq_m_s<mode>): Likewise.
12554 (mve_vqmovuntq_m_s<mode>): Likewise.
12555 (mve_vqrshrntq_n_<supf><mode>): Likewise.
12556 (mve_vqrshruntq_n_s<mode>): Likewise.
12557 (mve_vqshrnbq_n_<supf><mode>): Likewise.
12558 (mve_vqshrntq_n_<supf><mode>): Likewise.
12559 (mve_vqshrunbq_n_s<mode>): Likewise.
12560 (mve_vqshruntq_n_s<mode>): Likewise.
12561 (mve_vrev32q_m_fv8hf): Likewise.
12562 (mve_vrev32q_m_<supf><mode>): Likewise.
12563 (mve_vrev64q_m_f<mode>): Likewise.
12564 (mve_vrmlaldavhaxq_sv4si): Likewise.
12565 (mve_vrmlaldavhxq_p_sv4si): Likewise.
12566 (mve_vrmlsldavhaxq_sv4si): Likewise.
12567 (mve_vrmlsldavhq_p_sv4si): Likewise.
12568 (mve_vrmlsldavhxq_p_sv4si): Likewise.
12569 (mve_vrndaq_m_f<mode>): Likewise.
12570 (mve_vrndmq_m_f<mode>): Likewise.
12571 (mve_vrndnq_m_f<mode>): Likewise.
12572 (mve_vrndpq_m_f<mode>): Likewise.
12573 (mve_vrndxq_m_f<mode>): Likewise.
12574 (mve_vrshrnbq_n_<supf><mode>): Likewise.
12575 (mve_vrshrntq_n_<supf><mode>): Likewise.
12576 (mve_vshrnbq_n_<supf><mode>): Likewise.
12577 (mve_vshrntq_n_<supf><mode>): Likewise.
12578 (mve_vcvtmq_m_<supf><mode>): Likewise.
12579 (mve_vcvtpq_m_<supf><mode>): Likewise.
12580 (mve_vcvtnq_m_<supf><mode>): Likewise.
12581 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
12582 (mve_vrev16q_m_<supf>v16qi): Likewise.
12583 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
12584 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
12585 (mve_vrmlsldavhaq_sv4si): Likewise.
12587 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12588 Mihail Ionescu <mihail.ionescu@arm.com>
12589 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12591 * config/arm/arm_mve.h (vpselq_u8): Define macro.
12592 (vpselq_s8): Likewise.
12593 (vrev64q_m_u8): Likewise.
12594 (vqrdmlashq_n_u8): Likewise.
12595 (vqrdmlahq_n_u8): Likewise.
12596 (vqdmlahq_n_u8): Likewise.
12597 (vmvnq_m_u8): Likewise.
12598 (vmlasq_n_u8): Likewise.
12599 (vmlaq_n_u8): Likewise.
12600 (vmladavq_p_u8): Likewise.
12601 (vmladavaq_u8): Likewise.
12602 (vminvq_p_u8): Likewise.
12603 (vmaxvq_p_u8): Likewise.
12604 (vdupq_m_n_u8): Likewise.
12605 (vcmpneq_m_u8): Likewise.
12606 (vcmpneq_m_n_u8): Likewise.
12607 (vcmphiq_m_u8): Likewise.
12608 (vcmphiq_m_n_u8): Likewise.
12609 (vcmpeqq_m_u8): Likewise.
12610 (vcmpeqq_m_n_u8): Likewise.
12611 (vcmpcsq_m_u8): Likewise.
12612 (vcmpcsq_m_n_u8): Likewise.
12613 (vclzq_m_u8): Likewise.
12614 (vaddvaq_p_u8): Likewise.
12615 (vsriq_n_u8): Likewise.
12616 (vsliq_n_u8): Likewise.
12617 (vshlq_m_r_u8): Likewise.
12618 (vrshlq_m_n_u8): Likewise.
12619 (vqshlq_m_r_u8): Likewise.
12620 (vqrshlq_m_n_u8): Likewise.
12621 (vminavq_p_s8): Likewise.
12622 (vminaq_m_s8): Likewise.
12623 (vmaxavq_p_s8): Likewise.
12624 (vmaxaq_m_s8): Likewise.
12625 (vcmpneq_m_s8): Likewise.
12626 (vcmpneq_m_n_s8): Likewise.
12627 (vcmpltq_m_s8): Likewise.
12628 (vcmpltq_m_n_s8): Likewise.
12629 (vcmpleq_m_s8): Likewise.
12630 (vcmpleq_m_n_s8): Likewise.
12631 (vcmpgtq_m_s8): Likewise.
12632 (vcmpgtq_m_n_s8): Likewise.
12633 (vcmpgeq_m_s8): Likewise.
12634 (vcmpgeq_m_n_s8): Likewise.
12635 (vcmpeqq_m_s8): Likewise.
12636 (vcmpeqq_m_n_s8): Likewise.
12637 (vshlq_m_r_s8): Likewise.
12638 (vrshlq_m_n_s8): Likewise.
12639 (vrev64q_m_s8): Likewise.
12640 (vqshlq_m_r_s8): Likewise.
12641 (vqrshlq_m_n_s8): Likewise.
12642 (vqnegq_m_s8): Likewise.
12643 (vqabsq_m_s8): Likewise.
12644 (vnegq_m_s8): Likewise.
12645 (vmvnq_m_s8): Likewise.
12646 (vmlsdavxq_p_s8): Likewise.
12647 (vmlsdavq_p_s8): Likewise.
12648 (vmladavxq_p_s8): Likewise.
12649 (vmladavq_p_s8): Likewise.
12650 (vminvq_p_s8): Likewise.
12651 (vmaxvq_p_s8): Likewise.
12652 (vdupq_m_n_s8): Likewise.
12653 (vclzq_m_s8): Likewise.
12654 (vclsq_m_s8): Likewise.
12655 (vaddvaq_p_s8): Likewise.
12656 (vabsq_m_s8): Likewise.
12657 (vqrdmlsdhxq_s8): Likewise.
12658 (vqrdmlsdhq_s8): Likewise.
12659 (vqrdmlashq_n_s8): Likewise.
12660 (vqrdmlahq_n_s8): Likewise.
12661 (vqrdmladhxq_s8): Likewise.
12662 (vqrdmladhq_s8): Likewise.
12663 (vqdmlsdhxq_s8): Likewise.
12664 (vqdmlsdhq_s8): Likewise.
12665 (vqdmlahq_n_s8): Likewise.
12666 (vqdmladhxq_s8): Likewise.
12667 (vqdmladhq_s8): Likewise.
12668 (vmlsdavaxq_s8): Likewise.
12669 (vmlsdavaq_s8): Likewise.
12670 (vmlasq_n_s8): Likewise.
12671 (vmlaq_n_s8): Likewise.
12672 (vmladavaxq_s8): Likewise.
12673 (vmladavaq_s8): Likewise.
12674 (vsriq_n_s8): Likewise.
12675 (vsliq_n_s8): Likewise.
12676 (vpselq_u16): Likewise.
12677 (vpselq_s16): Likewise.
12678 (vrev64q_m_u16): Likewise.
12679 (vqrdmlashq_n_u16): Likewise.
12680 (vqrdmlahq_n_u16): Likewise.
12681 (vqdmlahq_n_u16): Likewise.
12682 (vmvnq_m_u16): Likewise.
12683 (vmlasq_n_u16): Likewise.
12684 (vmlaq_n_u16): Likewise.
12685 (vmladavq_p_u16): Likewise.
12686 (vmladavaq_u16): Likewise.
12687 (vminvq_p_u16): Likewise.
12688 (vmaxvq_p_u16): Likewise.
12689 (vdupq_m_n_u16): Likewise.
12690 (vcmpneq_m_u16): Likewise.
12691 (vcmpneq_m_n_u16): Likewise.
12692 (vcmphiq_m_u16): Likewise.
12693 (vcmphiq_m_n_u16): Likewise.
12694 (vcmpeqq_m_u16): Likewise.
12695 (vcmpeqq_m_n_u16): Likewise.
12696 (vcmpcsq_m_u16): Likewise.
12697 (vcmpcsq_m_n_u16): Likewise.
12698 (vclzq_m_u16): Likewise.
12699 (vaddvaq_p_u16): Likewise.
12700 (vsriq_n_u16): Likewise.
12701 (vsliq_n_u16): Likewise.
12702 (vshlq_m_r_u16): Likewise.
12703 (vrshlq_m_n_u16): Likewise.
12704 (vqshlq_m_r_u16): Likewise.
12705 (vqrshlq_m_n_u16): Likewise.
12706 (vminavq_p_s16): Likewise.
12707 (vminaq_m_s16): Likewise.
12708 (vmaxavq_p_s16): Likewise.
12709 (vmaxaq_m_s16): Likewise.
12710 (vcmpneq_m_s16): Likewise.
12711 (vcmpneq_m_n_s16): Likewise.
12712 (vcmpltq_m_s16): Likewise.
12713 (vcmpltq_m_n_s16): Likewise.
12714 (vcmpleq_m_s16): Likewise.
12715 (vcmpleq_m_n_s16): Likewise.
12716 (vcmpgtq_m_s16): Likewise.
12717 (vcmpgtq_m_n_s16): Likewise.
12718 (vcmpgeq_m_s16): Likewise.
12719 (vcmpgeq_m_n_s16): Likewise.
12720 (vcmpeqq_m_s16): Likewise.
12721 (vcmpeqq_m_n_s16): Likewise.
12722 (vshlq_m_r_s16): Likewise.
12723 (vrshlq_m_n_s16): Likewise.
12724 (vrev64q_m_s16): Likewise.
12725 (vqshlq_m_r_s16): Likewise.
12726 (vqrshlq_m_n_s16): Likewise.
12727 (vqnegq_m_s16): Likewise.
12728 (vqabsq_m_s16): Likewise.
12729 (vnegq_m_s16): Likewise.
12730 (vmvnq_m_s16): Likewise.
12731 (vmlsdavxq_p_s16): Likewise.
12732 (vmlsdavq_p_s16): Likewise.
12733 (vmladavxq_p_s16): Likewise.
12734 (vmladavq_p_s16): Likewise.
12735 (vminvq_p_s16): Likewise.
12736 (vmaxvq_p_s16): Likewise.
12737 (vdupq_m_n_s16): Likewise.
12738 (vclzq_m_s16): Likewise.
12739 (vclsq_m_s16): Likewise.
12740 (vaddvaq_p_s16): Likewise.
12741 (vabsq_m_s16): Likewise.
12742 (vqrdmlsdhxq_s16): Likewise.
12743 (vqrdmlsdhq_s16): Likewise.
12744 (vqrdmlashq_n_s16): Likewise.
12745 (vqrdmlahq_n_s16): Likewise.
12746 (vqrdmladhxq_s16): Likewise.
12747 (vqrdmladhq_s16): Likewise.
12748 (vqdmlsdhxq_s16): Likewise.
12749 (vqdmlsdhq_s16): Likewise.
12750 (vqdmlahq_n_s16): Likewise.
12751 (vqdmladhxq_s16): Likewise.
12752 (vqdmladhq_s16): Likewise.
12753 (vmlsdavaxq_s16): Likewise.
12754 (vmlsdavaq_s16): Likewise.
12755 (vmlasq_n_s16): Likewise.
12756 (vmlaq_n_s16): Likewise.
12757 (vmladavaxq_s16): Likewise.
12758 (vmladavaq_s16): Likewise.
12759 (vsriq_n_s16): Likewise.
12760 (vsliq_n_s16): Likewise.
12761 (vpselq_u32): Likewise.
12762 (vpselq_s32): Likewise.
12763 (vrev64q_m_u32): Likewise.
12764 (vqrdmlashq_n_u32): Likewise.
12765 (vqrdmlahq_n_u32): Likewise.
12766 (vqdmlahq_n_u32): Likewise.
12767 (vmvnq_m_u32): Likewise.
12768 (vmlasq_n_u32): Likewise.
12769 (vmlaq_n_u32): Likewise.
12770 (vmladavq_p_u32): Likewise.
12771 (vmladavaq_u32): Likewise.
12772 (vminvq_p_u32): Likewise.
12773 (vmaxvq_p_u32): Likewise.
12774 (vdupq_m_n_u32): Likewise.
12775 (vcmpneq_m_u32): Likewise.
12776 (vcmpneq_m_n_u32): Likewise.
12777 (vcmphiq_m_u32): Likewise.
12778 (vcmphiq_m_n_u32): Likewise.
12779 (vcmpeqq_m_u32): Likewise.
12780 (vcmpeqq_m_n_u32): Likewise.
12781 (vcmpcsq_m_u32): Likewise.
12782 (vcmpcsq_m_n_u32): Likewise.
12783 (vclzq_m_u32): Likewise.
12784 (vaddvaq_p_u32): Likewise.
12785 (vsriq_n_u32): Likewise.
12786 (vsliq_n_u32): Likewise.
12787 (vshlq_m_r_u32): Likewise.
12788 (vrshlq_m_n_u32): Likewise.
12789 (vqshlq_m_r_u32): Likewise.
12790 (vqrshlq_m_n_u32): Likewise.
12791 (vminavq_p_s32): Likewise.
12792 (vminaq_m_s32): Likewise.
12793 (vmaxavq_p_s32): Likewise.
12794 (vmaxaq_m_s32): Likewise.
12795 (vcmpneq_m_s32): Likewise.
12796 (vcmpneq_m_n_s32): Likewise.
12797 (vcmpltq_m_s32): Likewise.
12798 (vcmpltq_m_n_s32): Likewise.
12799 (vcmpleq_m_s32): Likewise.
12800 (vcmpleq_m_n_s32): Likewise.
12801 (vcmpgtq_m_s32): Likewise.
12802 (vcmpgtq_m_n_s32): Likewise.
12803 (vcmpgeq_m_s32): Likewise.
12804 (vcmpgeq_m_n_s32): Likewise.
12805 (vcmpeqq_m_s32): Likewise.
12806 (vcmpeqq_m_n_s32): Likewise.
12807 (vshlq_m_r_s32): Likewise.
12808 (vrshlq_m_n_s32): Likewise.
12809 (vrev64q_m_s32): Likewise.
12810 (vqshlq_m_r_s32): Likewise.
12811 (vqrshlq_m_n_s32): Likewise.
12812 (vqnegq_m_s32): Likewise.
12813 (vqabsq_m_s32): Likewise.
12814 (vnegq_m_s32): Likewise.
12815 (vmvnq_m_s32): Likewise.
12816 (vmlsdavxq_p_s32): Likewise.
12817 (vmlsdavq_p_s32): Likewise.
12818 (vmladavxq_p_s32): Likewise.
12819 (vmladavq_p_s32): Likewise.
12820 (vminvq_p_s32): Likewise.
12821 (vmaxvq_p_s32): Likewise.
12822 (vdupq_m_n_s32): Likewise.
12823 (vclzq_m_s32): Likewise.
12824 (vclsq_m_s32): Likewise.
12825 (vaddvaq_p_s32): Likewise.
12826 (vabsq_m_s32): Likewise.
12827 (vqrdmlsdhxq_s32): Likewise.
12828 (vqrdmlsdhq_s32): Likewise.
12829 (vqrdmlashq_n_s32): Likewise.
12830 (vqrdmlahq_n_s32): Likewise.
12831 (vqrdmladhxq_s32): Likewise.
12832 (vqrdmladhq_s32): Likewise.
12833 (vqdmlsdhxq_s32): Likewise.
12834 (vqdmlsdhq_s32): Likewise.
12835 (vqdmlahq_n_s32): Likewise.
12836 (vqdmladhxq_s32): Likewise.
12837 (vqdmladhq_s32): Likewise.
12838 (vmlsdavaxq_s32): Likewise.
12839 (vmlsdavaq_s32): Likewise.
12840 (vmlasq_n_s32): Likewise.
12841 (vmlaq_n_s32): Likewise.
12842 (vmladavaxq_s32): Likewise.
12843 (vmladavaq_s32): Likewise.
12844 (vsriq_n_s32): Likewise.
12845 (vsliq_n_s32): Likewise.
12846 (vpselq_u64): Likewise.
12847 (vpselq_s64): Likewise.
12848 (__arm_vpselq_u8): Define intrinsic.
12849 (__arm_vpselq_s8): Likewise.
12850 (__arm_vrev64q_m_u8): Likewise.
12851 (__arm_vqrdmlashq_n_u8): Likewise.
12852 (__arm_vqrdmlahq_n_u8): Likewise.
12853 (__arm_vqdmlahq_n_u8): Likewise.
12854 (__arm_vmvnq_m_u8): Likewise.
12855 (__arm_vmlasq_n_u8): Likewise.
12856 (__arm_vmlaq_n_u8): Likewise.
12857 (__arm_vmladavq_p_u8): Likewise.
12858 (__arm_vmladavaq_u8): Likewise.
12859 (__arm_vminvq_p_u8): Likewise.
12860 (__arm_vmaxvq_p_u8): Likewise.
12861 (__arm_vdupq_m_n_u8): Likewise.
12862 (__arm_vcmpneq_m_u8): Likewise.
12863 (__arm_vcmpneq_m_n_u8): Likewise.
12864 (__arm_vcmphiq_m_u8): Likewise.
12865 (__arm_vcmphiq_m_n_u8): Likewise.
12866 (__arm_vcmpeqq_m_u8): Likewise.
12867 (__arm_vcmpeqq_m_n_u8): Likewise.
12868 (__arm_vcmpcsq_m_u8): Likewise.
12869 (__arm_vcmpcsq_m_n_u8): Likewise.
12870 (__arm_vclzq_m_u8): Likewise.
12871 (__arm_vaddvaq_p_u8): Likewise.
12872 (__arm_vsriq_n_u8): Likewise.
12873 (__arm_vsliq_n_u8): Likewise.
12874 (__arm_vshlq_m_r_u8): Likewise.
12875 (__arm_vrshlq_m_n_u8): Likewise.
12876 (__arm_vqshlq_m_r_u8): Likewise.
12877 (__arm_vqrshlq_m_n_u8): Likewise.
12878 (__arm_vminavq_p_s8): Likewise.
12879 (__arm_vminaq_m_s8): Likewise.
12880 (__arm_vmaxavq_p_s8): Likewise.
12881 (__arm_vmaxaq_m_s8): Likewise.
12882 (__arm_vcmpneq_m_s8): Likewise.
12883 (__arm_vcmpneq_m_n_s8): Likewise.
12884 (__arm_vcmpltq_m_s8): Likewise.
12885 (__arm_vcmpltq_m_n_s8): Likewise.
12886 (__arm_vcmpleq_m_s8): Likewise.
12887 (__arm_vcmpleq_m_n_s8): Likewise.
12888 (__arm_vcmpgtq_m_s8): Likewise.
12889 (__arm_vcmpgtq_m_n_s8): Likewise.
12890 (__arm_vcmpgeq_m_s8): Likewise.
12891 (__arm_vcmpgeq_m_n_s8): Likewise.
12892 (__arm_vcmpeqq_m_s8): Likewise.
12893 (__arm_vcmpeqq_m_n_s8): Likewise.
12894 (__arm_vshlq_m_r_s8): Likewise.
12895 (__arm_vrshlq_m_n_s8): Likewise.
12896 (__arm_vrev64q_m_s8): Likewise.
12897 (__arm_vqshlq_m_r_s8): Likewise.
12898 (__arm_vqrshlq_m_n_s8): Likewise.
12899 (__arm_vqnegq_m_s8): Likewise.
12900 (__arm_vqabsq_m_s8): Likewise.
12901 (__arm_vnegq_m_s8): Likewise.
12902 (__arm_vmvnq_m_s8): Likewise.
12903 (__arm_vmlsdavxq_p_s8): Likewise.
12904 (__arm_vmlsdavq_p_s8): Likewise.
12905 (__arm_vmladavxq_p_s8): Likewise.
12906 (__arm_vmladavq_p_s8): Likewise.
12907 (__arm_vminvq_p_s8): Likewise.
12908 (__arm_vmaxvq_p_s8): Likewise.
12909 (__arm_vdupq_m_n_s8): Likewise.
12910 (__arm_vclzq_m_s8): Likewise.
12911 (__arm_vclsq_m_s8): Likewise.
12912 (__arm_vaddvaq_p_s8): Likewise.
12913 (__arm_vabsq_m_s8): Likewise.
12914 (__arm_vqrdmlsdhxq_s8): Likewise.
12915 (__arm_vqrdmlsdhq_s8): Likewise.
12916 (__arm_vqrdmlashq_n_s8): Likewise.
12917 (__arm_vqrdmlahq_n_s8): Likewise.
12918 (__arm_vqrdmladhxq_s8): Likewise.
12919 (__arm_vqrdmladhq_s8): Likewise.
12920 (__arm_vqdmlsdhxq_s8): Likewise.
12921 (__arm_vqdmlsdhq_s8): Likewise.
12922 (__arm_vqdmlahq_n_s8): Likewise.
12923 (__arm_vqdmladhxq_s8): Likewise.
12924 (__arm_vqdmladhq_s8): Likewise.
12925 (__arm_vmlsdavaxq_s8): Likewise.
12926 (__arm_vmlsdavaq_s8): Likewise.
12927 (__arm_vmlasq_n_s8): Likewise.
12928 (__arm_vmlaq_n_s8): Likewise.
12929 (__arm_vmladavaxq_s8): Likewise.
12930 (__arm_vmladavaq_s8): Likewise.
12931 (__arm_vsriq_n_s8): Likewise.
12932 (__arm_vsliq_n_s8): Likewise.
12933 (__arm_vpselq_u16): Likewise.
12934 (__arm_vpselq_s16): Likewise.
12935 (__arm_vrev64q_m_u16): Likewise.
12936 (__arm_vqrdmlashq_n_u16): Likewise.
12937 (__arm_vqrdmlahq_n_u16): Likewise.
12938 (__arm_vqdmlahq_n_u16): Likewise.
12939 (__arm_vmvnq_m_u16): Likewise.
12940 (__arm_vmlasq_n_u16): Likewise.
12941 (__arm_vmlaq_n_u16): Likewise.
12942 (__arm_vmladavq_p_u16): Likewise.
12943 (__arm_vmladavaq_u16): Likewise.
12944 (__arm_vminvq_p_u16): Likewise.
12945 (__arm_vmaxvq_p_u16): Likewise.
12946 (__arm_vdupq_m_n_u16): Likewise.
12947 (__arm_vcmpneq_m_u16): Likewise.
12948 (__arm_vcmpneq_m_n_u16): Likewise.
12949 (__arm_vcmphiq_m_u16): Likewise.
12950 (__arm_vcmphiq_m_n_u16): Likewise.
12951 (__arm_vcmpeqq_m_u16): Likewise.
12952 (__arm_vcmpeqq_m_n_u16): Likewise.
12953 (__arm_vcmpcsq_m_u16): Likewise.
12954 (__arm_vcmpcsq_m_n_u16): Likewise.
12955 (__arm_vclzq_m_u16): Likewise.
12956 (__arm_vaddvaq_p_u16): Likewise.
12957 (__arm_vsriq_n_u16): Likewise.
12958 (__arm_vsliq_n_u16): Likewise.
12959 (__arm_vshlq_m_r_u16): Likewise.
12960 (__arm_vrshlq_m_n_u16): Likewise.
12961 (__arm_vqshlq_m_r_u16): Likewise.
12962 (__arm_vqrshlq_m_n_u16): Likewise.
12963 (__arm_vminavq_p_s16): Likewise.
12964 (__arm_vminaq_m_s16): Likewise.
12965 (__arm_vmaxavq_p_s16): Likewise.
12966 (__arm_vmaxaq_m_s16): Likewise.
12967 (__arm_vcmpneq_m_s16): Likewise.
12968 (__arm_vcmpneq_m_n_s16): Likewise.
12969 (__arm_vcmpltq_m_s16): Likewise.
12970 (__arm_vcmpltq_m_n_s16): Likewise.
12971 (__arm_vcmpleq_m_s16): Likewise.
12972 (__arm_vcmpleq_m_n_s16): Likewise.
12973 (__arm_vcmpgtq_m_s16): Likewise.
12974 (__arm_vcmpgtq_m_n_s16): Likewise.
12975 (__arm_vcmpgeq_m_s16): Likewise.
12976 (__arm_vcmpgeq_m_n_s16): Likewise.
12977 (__arm_vcmpeqq_m_s16): Likewise.
12978 (__arm_vcmpeqq_m_n_s16): Likewise.
12979 (__arm_vshlq_m_r_s16): Likewise.
12980 (__arm_vrshlq_m_n_s16): Likewise.
12981 (__arm_vrev64q_m_s16): Likewise.
12982 (__arm_vqshlq_m_r_s16): Likewise.
12983 (__arm_vqrshlq_m_n_s16): Likewise.
12984 (__arm_vqnegq_m_s16): Likewise.
12985 (__arm_vqabsq_m_s16): Likewise.
12986 (__arm_vnegq_m_s16): Likewise.
12987 (__arm_vmvnq_m_s16): Likewise.
12988 (__arm_vmlsdavxq_p_s16): Likewise.
12989 (__arm_vmlsdavq_p_s16): Likewise.
12990 (__arm_vmladavxq_p_s16): Likewise.
12991 (__arm_vmladavq_p_s16): Likewise.
12992 (__arm_vminvq_p_s16): Likewise.
12993 (__arm_vmaxvq_p_s16): Likewise.
12994 (__arm_vdupq_m_n_s16): Likewise.
12995 (__arm_vclzq_m_s16): Likewise.
12996 (__arm_vclsq_m_s16): Likewise.
12997 (__arm_vaddvaq_p_s16): Likewise.
12998 (__arm_vabsq_m_s16): Likewise.
12999 (__arm_vqrdmlsdhxq_s16): Likewise.
13000 (__arm_vqrdmlsdhq_s16): Likewise.
13001 (__arm_vqrdmlashq_n_s16): Likewise.
13002 (__arm_vqrdmlahq_n_s16): Likewise.
13003 (__arm_vqrdmladhxq_s16): Likewise.
13004 (__arm_vqrdmladhq_s16): Likewise.
13005 (__arm_vqdmlsdhxq_s16): Likewise.
13006 (__arm_vqdmlsdhq_s16): Likewise.
13007 (__arm_vqdmlahq_n_s16): Likewise.
13008 (__arm_vqdmladhxq_s16): Likewise.
13009 (__arm_vqdmladhq_s16): Likewise.
13010 (__arm_vmlsdavaxq_s16): Likewise.
13011 (__arm_vmlsdavaq_s16): Likewise.
13012 (__arm_vmlasq_n_s16): Likewise.
13013 (__arm_vmlaq_n_s16): Likewise.
13014 (__arm_vmladavaxq_s16): Likewise.
13015 (__arm_vmladavaq_s16): Likewise.
13016 (__arm_vsriq_n_s16): Likewise.
13017 (__arm_vsliq_n_s16): Likewise.
13018 (__arm_vpselq_u32): Likewise.
13019 (__arm_vpselq_s32): Likewise.
13020 (__arm_vrev64q_m_u32): Likewise.
13021 (__arm_vqrdmlashq_n_u32): Likewise.
13022 (__arm_vqrdmlahq_n_u32): Likewise.
13023 (__arm_vqdmlahq_n_u32): Likewise.
13024 (__arm_vmvnq_m_u32): Likewise.
13025 (__arm_vmlasq_n_u32): Likewise.
13026 (__arm_vmlaq_n_u32): Likewise.
13027 (__arm_vmladavq_p_u32): Likewise.
13028 (__arm_vmladavaq_u32): Likewise.
13029 (__arm_vminvq_p_u32): Likewise.
13030 (__arm_vmaxvq_p_u32): Likewise.
13031 (__arm_vdupq_m_n_u32): Likewise.
13032 (__arm_vcmpneq_m_u32): Likewise.
13033 (__arm_vcmpneq_m_n_u32): Likewise.
13034 (__arm_vcmphiq_m_u32): Likewise.
13035 (__arm_vcmphiq_m_n_u32): Likewise.
13036 (__arm_vcmpeqq_m_u32): Likewise.
13037 (__arm_vcmpeqq_m_n_u32): Likewise.
13038 (__arm_vcmpcsq_m_u32): Likewise.
13039 (__arm_vcmpcsq_m_n_u32): Likewise.
13040 (__arm_vclzq_m_u32): Likewise.
13041 (__arm_vaddvaq_p_u32): Likewise.
13042 (__arm_vsriq_n_u32): Likewise.
13043 (__arm_vsliq_n_u32): Likewise.
13044 (__arm_vshlq_m_r_u32): Likewise.
13045 (__arm_vrshlq_m_n_u32): Likewise.
13046 (__arm_vqshlq_m_r_u32): Likewise.
13047 (__arm_vqrshlq_m_n_u32): Likewise.
13048 (__arm_vminavq_p_s32): Likewise.
13049 (__arm_vminaq_m_s32): Likewise.
13050 (__arm_vmaxavq_p_s32): Likewise.
13051 (__arm_vmaxaq_m_s32): Likewise.
13052 (__arm_vcmpneq_m_s32): Likewise.
13053 (__arm_vcmpneq_m_n_s32): Likewise.
13054 (__arm_vcmpltq_m_s32): Likewise.
13055 (__arm_vcmpltq_m_n_s32): Likewise.
13056 (__arm_vcmpleq_m_s32): Likewise.
13057 (__arm_vcmpleq_m_n_s32): Likewise.
13058 (__arm_vcmpgtq_m_s32): Likewise.
13059 (__arm_vcmpgtq_m_n_s32): Likewise.
13060 (__arm_vcmpgeq_m_s32): Likewise.
13061 (__arm_vcmpgeq_m_n_s32): Likewise.
13062 (__arm_vcmpeqq_m_s32): Likewise.
13063 (__arm_vcmpeqq_m_n_s32): Likewise.
13064 (__arm_vshlq_m_r_s32): Likewise.
13065 (__arm_vrshlq_m_n_s32): Likewise.
13066 (__arm_vrev64q_m_s32): Likewise.
13067 (__arm_vqshlq_m_r_s32): Likewise.
13068 (__arm_vqrshlq_m_n_s32): Likewise.
13069 (__arm_vqnegq_m_s32): Likewise.
13070 (__arm_vqabsq_m_s32): Likewise.
13071 (__arm_vnegq_m_s32): Likewise.
13072 (__arm_vmvnq_m_s32): Likewise.
13073 (__arm_vmlsdavxq_p_s32): Likewise.
13074 (__arm_vmlsdavq_p_s32): Likewise.
13075 (__arm_vmladavxq_p_s32): Likewise.
13076 (__arm_vmladavq_p_s32): Likewise.
13077 (__arm_vminvq_p_s32): Likewise.
13078 (__arm_vmaxvq_p_s32): Likewise.
13079 (__arm_vdupq_m_n_s32): Likewise.
13080 (__arm_vclzq_m_s32): Likewise.
13081 (__arm_vclsq_m_s32): Likewise.
13082 (__arm_vaddvaq_p_s32): Likewise.
13083 (__arm_vabsq_m_s32): Likewise.
13084 (__arm_vqrdmlsdhxq_s32): Likewise.
13085 (__arm_vqrdmlsdhq_s32): Likewise.
13086 (__arm_vqrdmlashq_n_s32): Likewise.
13087 (__arm_vqrdmlahq_n_s32): Likewise.
13088 (__arm_vqrdmladhxq_s32): Likewise.
13089 (__arm_vqrdmladhq_s32): Likewise.
13090 (__arm_vqdmlsdhxq_s32): Likewise.
13091 (__arm_vqdmlsdhq_s32): Likewise.
13092 (__arm_vqdmlahq_n_s32): Likewise.
13093 (__arm_vqdmladhxq_s32): Likewise.
13094 (__arm_vqdmladhq_s32): Likewise.
13095 (__arm_vmlsdavaxq_s32): Likewise.
13096 (__arm_vmlsdavaq_s32): Likewise.
13097 (__arm_vmlasq_n_s32): Likewise.
13098 (__arm_vmlaq_n_s32): Likewise.
13099 (__arm_vmladavaxq_s32): Likewise.
13100 (__arm_vmladavaq_s32): Likewise.
13101 (__arm_vsriq_n_s32): Likewise.
13102 (__arm_vsliq_n_s32): Likewise.
13103 (__arm_vpselq_u64): Likewise.
13104 (__arm_vpselq_s64): Likewise.
13105 (vcmpneq_m_n): Define polymorphic variant.
13106 (vcmpneq_m): Likewise.
13107 (vqrdmlsdhq): Likewise.
13108 (vqrdmlsdhxq): Likewise.
13109 (vqrshlq_m_n): Likewise.
13110 (vqshlq_m_r): Likewise.
13111 (vrev64q_m): Likewise.
13112 (vrshlq_m_n): Likewise.
13113 (vshlq_m_r): Likewise.
13114 (vsliq_n): Likewise.
13115 (vsriq_n): Likewise.
13116 (vqrdmlashq_n): Likewise.
13117 (vqrdmlahq): Likewise.
13118 (vqrdmladhxq): Likewise.
13119 (vqrdmladhq): Likewise.
13120 (vqnegq_m): Likewise.
13121 (vqdmlsdhxq): Likewise.
13122 (vabsq_m): Likewise.
13123 (vclsq_m): Likewise.
13124 (vclzq_m): Likewise.
13125 (vcmpgeq_m): Likewise.
13126 (vcmpgeq_m_n): Likewise.
13127 (vdupq_m_n): Likewise.
13128 (vmaxaq_m): Likewise.
13129 (vmlaq_n): Likewise.
13130 (vmlasq_n): Likewise.
13131 (vmvnq_m): Likewise.
13132 (vnegq_m): Likewise.
13133 (vpselq): Likewise.
13134 (vqdmlahq_n): Likewise.
13135 (vqrdmlahq_n): Likewise.
13136 (vqdmlsdhq): Likewise.
13137 (vqdmladhq): Likewise.
13138 (vqabsq_m): Likewise.
13139 (vminaq_m): Likewise.
13140 (vrmlaldavhaq): Likewise.
13141 (vmlsdavxq_p): Likewise.
13142 (vmlsdavq_p): Likewise.
13143 (vmlsdavaxq): Likewise.
13144 (vmlsdavaq): Likewise.
13145 (vaddvaq_p): Likewise.
13146 (vcmpcsq_m_n): Likewise.
13147 (vcmpcsq_m): Likewise.
13148 (vcmpeqq_m_n): Likewise.
13149 (vcmpeqq_m): Likewise.
13150 (vmladavxq_p): Likewise.
13151 (vmladavq_p): Likewise.
13152 (vmladavaxq): Likewise.
13153 (vmladavaq): Likewise.
13154 (vminvq_p): Likewise.
13155 (vminavq_p): Likewise.
13156 (vmaxvq_p): Likewise.
13157 (vmaxavq_p): Likewise.
13158 (vcmpltq_m_n): Likewise.
13159 (vcmpltq_m): Likewise.
13160 (vcmpleq_m): Likewise.
13161 (vcmpleq_m_n): Likewise.
13162 (vcmphiq_m_n): Likewise.
13163 (vcmphiq_m): Likewise.
13164 (vcmpgtq_m_n): Likewise.
13165 (vcmpgtq_m): Likewise.
13166 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
13168 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
13169 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
13170 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
13171 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
13172 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
13173 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
13174 * config/arm/constraints.md (Rc): Define constraint to check constant is
13175 in the range of 0 to 15.
13176 (Re): Define constraint to check constant is in the range of 0 to 31.
13177 * config/arm/mve.md (VADDVAQ_P): Define iterator.
13178 (VCLZQ_M): Likewise.
13179 (VCMPEQQ_M_N): Likewise.
13180 (VCMPEQQ_M): Likewise.
13181 (VCMPNEQ_M_N): Likewise.
13182 (VCMPNEQ_M): Likewise.
13183 (VDUPQ_M_N): Likewise.
13184 (VMAXVQ_P): Likewise.
13185 (VMINVQ_P): Likewise.
13186 (VMLADAVAQ): Likewise.
13187 (VMLADAVQ_P): Likewise.
13188 (VMLAQ_N): Likewise.
13189 (VMLASQ_N): Likewise.
13190 (VMVNQ_M): Likewise.
13191 (VPSELQ): Likewise.
13192 (VQDMLAHQ_N): Likewise.
13193 (VQRDMLAHQ_N): Likewise.
13194 (VQRDMLASHQ_N): Likewise.
13195 (VQRSHLQ_M_N): Likewise.
13196 (VQSHLQ_M_R): Likewise.
13197 (VREV64Q_M): Likewise.
13198 (VRSHLQ_M_N): Likewise.
13199 (VSHLQ_M_R): Likewise.
13200 (VSLIQ_N): Likewise.
13201 (VSRIQ_N): Likewise.
13202 (mve_vabsq_m_s<mode>): Define RTL pattern.
13203 (mve_vaddvaq_p_<supf><mode>): Likewise.
13204 (mve_vclsq_m_s<mode>): Likewise.
13205 (mve_vclzq_m_<supf><mode>): Likewise.
13206 (mve_vcmpcsq_m_n_u<mode>): Likewise.
13207 (mve_vcmpcsq_m_u<mode>): Likewise.
13208 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
13209 (mve_vcmpeqq_m_<supf><mode>): Likewise.
13210 (mve_vcmpgeq_m_n_s<mode>): Likewise.
13211 (mve_vcmpgeq_m_s<mode>): Likewise.
13212 (mve_vcmpgtq_m_n_s<mode>): Likewise.
13213 (mve_vcmpgtq_m_s<mode>): Likewise.
13214 (mve_vcmphiq_m_n_u<mode>): Likewise.
13215 (mve_vcmphiq_m_u<mode>): Likewise.
13216 (mve_vcmpleq_m_n_s<mode>): Likewise.
13217 (mve_vcmpleq_m_s<mode>): Likewise.
13218 (mve_vcmpltq_m_n_s<mode>): Likewise.
13219 (mve_vcmpltq_m_s<mode>): Likewise.
13220 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
13221 (mve_vcmpneq_m_<supf><mode>): Likewise.
13222 (mve_vdupq_m_n_<supf><mode>): Likewise.
13223 (mve_vmaxaq_m_s<mode>): Likewise.
13224 (mve_vmaxavq_p_s<mode>): Likewise.
13225 (mve_vmaxvq_p_<supf><mode>): Likewise.
13226 (mve_vminaq_m_s<mode>): Likewise.
13227 (mve_vminavq_p_s<mode>): Likewise.
13228 (mve_vminvq_p_<supf><mode>): Likewise.
13229 (mve_vmladavaq_<supf><mode>): Likewise.
13230 (mve_vmladavq_p_<supf><mode>): Likewise.
13231 (mve_vmladavxq_p_s<mode>): Likewise.
13232 (mve_vmlaq_n_<supf><mode>): Likewise.
13233 (mve_vmlasq_n_<supf><mode>): Likewise.
13234 (mve_vmlsdavq_p_s<mode>): Likewise.
13235 (mve_vmlsdavxq_p_s<mode>): Likewise.
13236 (mve_vmvnq_m_<supf><mode>): Likewise.
13237 (mve_vnegq_m_s<mode>): Likewise.
13238 (mve_vpselq_<supf><mode>): Likewise.
13239 (mve_vqabsq_m_s<mode>): Likewise.
13240 (mve_vqdmlahq_n_<supf><mode>): Likewise.
13241 (mve_vqnegq_m_s<mode>): Likewise.
13242 (mve_vqrdmladhq_s<mode>): Likewise.
13243 (mve_vqrdmladhxq_s<mode>): Likewise.
13244 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
13245 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
13246 (mve_vqrdmlsdhq_s<mode>): Likewise.
13247 (mve_vqrdmlsdhxq_s<mode>): Likewise.
13248 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
13249 (mve_vqshlq_m_r_<supf><mode>): Likewise.
13250 (mve_vrev64q_m_<supf><mode>): Likewise.
13251 (mve_vrshlq_m_n_<supf><mode>): Likewise.
13252 (mve_vshlq_m_r_<supf><mode>): Likewise.
13253 (mve_vsliq_n_<supf><mode>): Likewise.
13254 (mve_vsriq_n_<supf><mode>): Likewise.
13255 (mve_vqdmlsdhxq_s<mode>): Likewise.
13256 (mve_vqdmlsdhq_s<mode>): Likewise.
13257 (mve_vqdmladhxq_s<mode>): Likewise.
13258 (mve_vqdmladhq_s<mode>): Likewise.
13259 (mve_vmlsdavaxq_s<mode>): Likewise.
13260 (mve_vmlsdavaq_s<mode>): Likewise.
13261 (mve_vmladavaxq_s<mode>): Likewise.
13262 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
13263 matching constraint Rc.
13264 (mve_imm_31): Define predicate to check the matching constraint Re.
13266 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
13268 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
13269 (vec_cmp<mode>di_dup): Likewise.
13270 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
13272 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
13274 * config/gcn/gcn-valu.md (COND_MODE): Delete.
13275 (COND_INT_MODE): Delete.
13276 (cond_op): Add "mult".
13277 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
13278 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
13280 2020-03-18 Richard Biener <rguenther@suse.de>
13282 PR middle-end/94206
13283 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
13284 partial int modes or not mode-precision integer types for
13287 2020-03-18 Jakub Jelinek <jakub@redhat.com>
13289 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
13291 * config/arc/arc.c (frame_stack_add): Likewise.
13292 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
13294 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
13295 * tree-ssa-strlen.h (handle_printf_call): Likewise.
13296 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
13297 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
13299 2020-03-18 Duan bo <duanbo3@huawei.com>
13302 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
13303 (@ldr_got_tiny_<mode>): New pattern.
13304 (ldr_got_tiny_sidi): Likewise.
13305 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
13306 them to handle SYMBOL_TINY_GOT for ILP32.
13308 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
13310 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
13311 call-preserved for SVE PCS functions.
13312 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
13313 Optimize the case in which there are no following vector save slots.
13315 2020-03-18 Richard Biener <rguenther@suse.de>
13317 PR middle-end/94188
13318 * fold-const.c (build_fold_addr_expr): Convert address to
13320 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
13321 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
13322 to build the ADDR_EXPR which we don't really want to simplify.
13323 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
13324 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
13325 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
13326 (simplify_builtin_call): Strip useless type conversions.
13327 * tree-ssa-strlen.c (new_strinfo): Likewise.
13329 2020-03-17 Alexey Neyman <stilor@att.net>
13332 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
13333 the debug level is terse and the declaration is public. Do not
13334 generate type info.
13335 (dwarf2out_decl): Same.
13336 (add_type_attribute): Return immediately if debug level is
13339 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
13341 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
13343 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13344 Mihail Ionescu <mihail.ionescu@arm.com>
13345 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13347 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
13348 Define qualifier for ternary operands.
13349 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13350 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13351 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13352 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13353 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13354 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13355 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13356 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
13357 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13358 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13359 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13360 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13361 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
13362 * config/arm/arm_mve.h (vabavq_s8): Define macro.
13363 (vabavq_s16): Likewise.
13364 (vabavq_s32): Likewise.
13365 (vbicq_m_n_s16): Likewise.
13366 (vbicq_m_n_s32): Likewise.
13367 (vbicq_m_n_u16): Likewise.
13368 (vbicq_m_n_u32): Likewise.
13369 (vcmpeqq_m_f16): Likewise.
13370 (vcmpeqq_m_f32): Likewise.
13371 (vcvtaq_m_s16_f16): Likewise.
13372 (vcvtaq_m_u16_f16): Likewise.
13373 (vcvtaq_m_s32_f32): Likewise.
13374 (vcvtaq_m_u32_f32): Likewise.
13375 (vcvtq_m_f16_s16): Likewise.
13376 (vcvtq_m_f16_u16): Likewise.
13377 (vcvtq_m_f32_s32): Likewise.
13378 (vcvtq_m_f32_u32): Likewise.
13379 (vqrshrnbq_n_s16): Likewise.
13380 (vqrshrnbq_n_u16): Likewise.
13381 (vqrshrnbq_n_s32): Likewise.
13382 (vqrshrnbq_n_u32): Likewise.
13383 (vqrshrunbq_n_s16): Likewise.
13384 (vqrshrunbq_n_s32): Likewise.
13385 (vrmlaldavhaq_s32): Likewise.
13386 (vrmlaldavhaq_u32): Likewise.
13387 (vshlcq_s8): Likewise.
13388 (vshlcq_u8): Likewise.
13389 (vshlcq_s16): Likewise.
13390 (vshlcq_u16): Likewise.
13391 (vshlcq_s32): Likewise.
13392 (vshlcq_u32): Likewise.
13393 (vabavq_u8): Likewise.
13394 (vabavq_u16): Likewise.
13395 (vabavq_u32): Likewise.
13396 (__arm_vabavq_s8): Define intrinsic.
13397 (__arm_vabavq_s16): Likewise.
13398 (__arm_vabavq_s32): Likewise.
13399 (__arm_vabavq_u8): Likewise.
13400 (__arm_vabavq_u16): Likewise.
13401 (__arm_vabavq_u32): Likewise.
13402 (__arm_vbicq_m_n_s16): Likewise.
13403 (__arm_vbicq_m_n_s32): Likewise.
13404 (__arm_vbicq_m_n_u16): Likewise.
13405 (__arm_vbicq_m_n_u32): Likewise.
13406 (__arm_vqrshrnbq_n_s16): Likewise.
13407 (__arm_vqrshrnbq_n_u16): Likewise.
13408 (__arm_vqrshrnbq_n_s32): Likewise.
13409 (__arm_vqrshrnbq_n_u32): Likewise.
13410 (__arm_vqrshrunbq_n_s16): Likewise.
13411 (__arm_vqrshrunbq_n_s32): Likewise.
13412 (__arm_vrmlaldavhaq_s32): Likewise.
13413 (__arm_vrmlaldavhaq_u32): Likewise.
13414 (__arm_vshlcq_s8): Likewise.
13415 (__arm_vshlcq_u8): Likewise.
13416 (__arm_vshlcq_s16): Likewise.
13417 (__arm_vshlcq_u16): Likewise.
13418 (__arm_vshlcq_s32): Likewise.
13419 (__arm_vshlcq_u32): Likewise.
13420 (__arm_vcmpeqq_m_f16): Likewise.
13421 (__arm_vcmpeqq_m_f32): Likewise.
13422 (__arm_vcvtaq_m_s16_f16): Likewise.
13423 (__arm_vcvtaq_m_u16_f16): Likewise.
13424 (__arm_vcvtaq_m_s32_f32): Likewise.
13425 (__arm_vcvtaq_m_u32_f32): Likewise.
13426 (__arm_vcvtq_m_f16_s16): Likewise.
13427 (__arm_vcvtq_m_f16_u16): Likewise.
13428 (__arm_vcvtq_m_f32_s32): Likewise.
13429 (__arm_vcvtq_m_f32_u32): Likewise.
13430 (vcvtaq_m): Define polymorphic variant.
13431 (vcvtq_m): Likewise.
13432 (vabavq): Likewise.
13433 (vshlcq): Likewise.
13434 (vbicq_m_n): Likewise.
13435 (vqrshrnbq_n): Likewise.
13436 (vqrshrunbq_n): Likewise.
13437 * config/arm/arm_mve_builtins.def
13438 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
13439 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13440 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13441 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13442 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13443 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13444 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13445 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13446 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
13447 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13448 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13449 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13450 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13451 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
13452 * config/arm/mve.md (VBICQ_M_N): Define iterator.
13453 (VCVTAQ_M): Likewise.
13454 (VCVTQ_M_TO_F): Likewise.
13455 (VQRSHRNBQ_N): Likewise.
13456 (VABAVQ): Likewise.
13457 (VSHLCQ): Likewise.
13458 (VRMLALDAVHAQ): Likewise.
13459 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
13460 (mve_vcmpeqq_m_f<mode>): Likewise.
13461 (mve_vcvtaq_m_<supf><mode>): Likewise.
13462 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
13463 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
13464 (mve_vqrshrunbq_n_s<mode>): Likewise.
13465 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
13466 (mve_vabavq_<supf><mode>): Likewise.
13467 (mve_vshlcq_<supf><mode>): Likewise.
13468 (mve_vshlcq_<supf><mode>): Likewise.
13469 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
13470 (mve_vshlcq_carry_<supf><mode>): Likewise.
13472 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13473 Mihail Ionescu <mihail.ionescu@arm.com>
13474 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13476 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
13477 (vqmovnbq_u16): Likewise.
13478 (vmulltq_poly_p8): Likewise.
13479 (vmullbq_poly_p8): Likewise.
13480 (vmovntq_u16): Likewise.
13481 (vmovnbq_u16): Likewise.
13482 (vmlaldavxq_u16): Likewise.
13483 (vmlaldavq_u16): Likewise.
13484 (vqmovuntq_s16): Likewise.
13485 (vqmovunbq_s16): Likewise.
13486 (vshlltq_n_u8): Likewise.
13487 (vshllbq_n_u8): Likewise.
13488 (vorrq_n_u16): Likewise.
13489 (vbicq_n_u16): Likewise.
13490 (vcmpneq_n_f16): Likewise.
13491 (vcmpneq_f16): Likewise.
13492 (vcmpltq_n_f16): Likewise.
13493 (vcmpltq_f16): Likewise.
13494 (vcmpleq_n_f16): Likewise.
13495 (vcmpleq_f16): Likewise.
13496 (vcmpgtq_n_f16): Likewise.
13497 (vcmpgtq_f16): Likewise.
13498 (vcmpgeq_n_f16): Likewise.
13499 (vcmpgeq_f16): Likewise.
13500 (vcmpeqq_n_f16): Likewise.
13501 (vcmpeqq_f16): Likewise.
13502 (vsubq_f16): Likewise.
13503 (vqmovntq_s16): Likewise.
13504 (vqmovnbq_s16): Likewise.
13505 (vqdmulltq_s16): Likewise.
13506 (vqdmulltq_n_s16): Likewise.
13507 (vqdmullbq_s16): Likewise.
13508 (vqdmullbq_n_s16): Likewise.
13509 (vorrq_f16): Likewise.
13510 (vornq_f16): Likewise.
13511 (vmulq_n_f16): Likewise.
13512 (vmulq_f16): Likewise.
13513 (vmovntq_s16): Likewise.
13514 (vmovnbq_s16): Likewise.
13515 (vmlsldavxq_s16): Likewise.
13516 (vmlsldavq_s16): Likewise.
13517 (vmlaldavxq_s16): Likewise.
13518 (vmlaldavq_s16): Likewise.
13519 (vminnmvq_f16): Likewise.
13520 (vminnmq_f16): Likewise.
13521 (vminnmavq_f16): Likewise.
13522 (vminnmaq_f16): Likewise.
13523 (vmaxnmvq_f16): Likewise.
13524 (vmaxnmq_f16): Likewise.
13525 (vmaxnmavq_f16): Likewise.
13526 (vmaxnmaq_f16): Likewise.
13527 (veorq_f16): Likewise.
13528 (vcmulq_rot90_f16): Likewise.
13529 (vcmulq_rot270_f16): Likewise.
13530 (vcmulq_rot180_f16): Likewise.
13531 (vcmulq_f16): Likewise.
13532 (vcaddq_rot90_f16): Likewise.
13533 (vcaddq_rot270_f16): Likewise.
13534 (vbicq_f16): Likewise.
13535 (vandq_f16): Likewise.
13536 (vaddq_n_f16): Likewise.
13537 (vabdq_f16): Likewise.
13538 (vshlltq_n_s8): Likewise.
13539 (vshllbq_n_s8): Likewise.
13540 (vorrq_n_s16): Likewise.
13541 (vbicq_n_s16): Likewise.
13542 (vqmovntq_u32): Likewise.
13543 (vqmovnbq_u32): Likewise.
13544 (vmulltq_poly_p16): Likewise.
13545 (vmullbq_poly_p16): Likewise.
13546 (vmovntq_u32): Likewise.
13547 (vmovnbq_u32): Likewise.
13548 (vmlaldavxq_u32): Likewise.
13549 (vmlaldavq_u32): Likewise.
13550 (vqmovuntq_s32): Likewise.
13551 (vqmovunbq_s32): Likewise.
13552 (vshlltq_n_u16): Likewise.
13553 (vshllbq_n_u16): Likewise.
13554 (vorrq_n_u32): Likewise.
13555 (vbicq_n_u32): Likewise.
13556 (vcmpneq_n_f32): Likewise.
13557 (vcmpneq_f32): Likewise.
13558 (vcmpltq_n_f32): Likewise.
13559 (vcmpltq_f32): Likewise.
13560 (vcmpleq_n_f32): Likewise.
13561 (vcmpleq_f32): Likewise.
13562 (vcmpgtq_n_f32): Likewise.
13563 (vcmpgtq_f32): Likewise.
13564 (vcmpgeq_n_f32): Likewise.
13565 (vcmpgeq_f32): Likewise.
13566 (vcmpeqq_n_f32): Likewise.
13567 (vcmpeqq_f32): Likewise.
13568 (vsubq_f32): Likewise.
13569 (vqmovntq_s32): Likewise.
13570 (vqmovnbq_s32): Likewise.
13571 (vqdmulltq_s32): Likewise.
13572 (vqdmulltq_n_s32): Likewise.
13573 (vqdmullbq_s32): Likewise.
13574 (vqdmullbq_n_s32): Likewise.
13575 (vorrq_f32): Likewise.
13576 (vornq_f32): Likewise.
13577 (vmulq_n_f32): Likewise.
13578 (vmulq_f32): Likewise.
13579 (vmovntq_s32): Likewise.
13580 (vmovnbq_s32): Likewise.
13581 (vmlsldavxq_s32): Likewise.
13582 (vmlsldavq_s32): Likewise.
13583 (vmlaldavxq_s32): Likewise.
13584 (vmlaldavq_s32): Likewise.
13585 (vminnmvq_f32): Likewise.
13586 (vminnmq_f32): Likewise.
13587 (vminnmavq_f32): Likewise.
13588 (vminnmaq_f32): Likewise.
13589 (vmaxnmvq_f32): Likewise.
13590 (vmaxnmq_f32): Likewise.
13591 (vmaxnmavq_f32): Likewise.
13592 (vmaxnmaq_f32): Likewise.
13593 (veorq_f32): Likewise.
13594 (vcmulq_rot90_f32): Likewise.
13595 (vcmulq_rot270_f32): Likewise.
13596 (vcmulq_rot180_f32): Likewise.
13597 (vcmulq_f32): Likewise.
13598 (vcaddq_rot90_f32): Likewise.
13599 (vcaddq_rot270_f32): Likewise.
13600 (vbicq_f32): Likewise.
13601 (vandq_f32): Likewise.
13602 (vaddq_n_f32): Likewise.
13603 (vabdq_f32): Likewise.
13604 (vshlltq_n_s16): Likewise.
13605 (vshllbq_n_s16): Likewise.
13606 (vorrq_n_s32): Likewise.
13607 (vbicq_n_s32): Likewise.
13608 (vrmlaldavhq_u32): Likewise.
13609 (vctp8q_m): Likewise.
13610 (vctp64q_m): Likewise.
13611 (vctp32q_m): Likewise.
13612 (vctp16q_m): Likewise.
13613 (vaddlvaq_u32): Likewise.
13614 (vrmlsldavhxq_s32): Likewise.
13615 (vrmlsldavhq_s32): Likewise.
13616 (vrmlaldavhxq_s32): Likewise.
13617 (vrmlaldavhq_s32): Likewise.
13618 (vcvttq_f16_f32): Likewise.
13619 (vcvtbq_f16_f32): Likewise.
13620 (vaddlvaq_s32): Likewise.
13621 (__arm_vqmovntq_u16): Define intrinsic.
13622 (__arm_vqmovnbq_u16): Likewise.
13623 (__arm_vmulltq_poly_p8): Likewise.
13624 (__arm_vmullbq_poly_p8): Likewise.
13625 (__arm_vmovntq_u16): Likewise.
13626 (__arm_vmovnbq_u16): Likewise.
13627 (__arm_vmlaldavxq_u16): Likewise.
13628 (__arm_vmlaldavq_u16): Likewise.
13629 (__arm_vqmovuntq_s16): Likewise.
13630 (__arm_vqmovunbq_s16): Likewise.
13631 (__arm_vshlltq_n_u8): Likewise.
13632 (__arm_vshllbq_n_u8): Likewise.
13633 (__arm_vorrq_n_u16): Likewise.
13634 (__arm_vbicq_n_u16): Likewise.
13635 (__arm_vcmpneq_n_f16): Likewise.
13636 (__arm_vcmpneq_f16): Likewise.
13637 (__arm_vcmpltq_n_f16): Likewise.
13638 (__arm_vcmpltq_f16): Likewise.
13639 (__arm_vcmpleq_n_f16): Likewise.
13640 (__arm_vcmpleq_f16): Likewise.
13641 (__arm_vcmpgtq_n_f16): Likewise.
13642 (__arm_vcmpgtq_f16): Likewise.
13643 (__arm_vcmpgeq_n_f16): Likewise.
13644 (__arm_vcmpgeq_f16): Likewise.
13645 (__arm_vcmpeqq_n_f16): Likewise.
13646 (__arm_vcmpeqq_f16): Likewise.
13647 (__arm_vsubq_f16): Likewise.
13648 (__arm_vqmovntq_s16): Likewise.
13649 (__arm_vqmovnbq_s16): Likewise.
13650 (__arm_vqdmulltq_s16): Likewise.
13651 (__arm_vqdmulltq_n_s16): Likewise.
13652 (__arm_vqdmullbq_s16): Likewise.
13653 (__arm_vqdmullbq_n_s16): Likewise.
13654 (__arm_vorrq_f16): Likewise.
13655 (__arm_vornq_f16): Likewise.
13656 (__arm_vmulq_n_f16): Likewise.
13657 (__arm_vmulq_f16): Likewise.
13658 (__arm_vmovntq_s16): Likewise.
13659 (__arm_vmovnbq_s16): Likewise.
13660 (__arm_vmlsldavxq_s16): Likewise.
13661 (__arm_vmlsldavq_s16): Likewise.
13662 (__arm_vmlaldavxq_s16): Likewise.
13663 (__arm_vmlaldavq_s16): Likewise.
13664 (__arm_vminnmvq_f16): Likewise.
13665 (__arm_vminnmq_f16): Likewise.
13666 (__arm_vminnmavq_f16): Likewise.
13667 (__arm_vminnmaq_f16): Likewise.
13668 (__arm_vmaxnmvq_f16): Likewise.
13669 (__arm_vmaxnmq_f16): Likewise.
13670 (__arm_vmaxnmavq_f16): Likewise.
13671 (__arm_vmaxnmaq_f16): Likewise.
13672 (__arm_veorq_f16): Likewise.
13673 (__arm_vcmulq_rot90_f16): Likewise.
13674 (__arm_vcmulq_rot270_f16): Likewise.
13675 (__arm_vcmulq_rot180_f16): Likewise.
13676 (__arm_vcmulq_f16): Likewise.
13677 (__arm_vcaddq_rot90_f16): Likewise.
13678 (__arm_vcaddq_rot270_f16): Likewise.
13679 (__arm_vbicq_f16): Likewise.
13680 (__arm_vandq_f16): Likewise.
13681 (__arm_vaddq_n_f16): Likewise.
13682 (__arm_vabdq_f16): Likewise.
13683 (__arm_vshlltq_n_s8): Likewise.
13684 (__arm_vshllbq_n_s8): Likewise.
13685 (__arm_vorrq_n_s16): Likewise.
13686 (__arm_vbicq_n_s16): Likewise.
13687 (__arm_vqmovntq_u32): Likewise.
13688 (__arm_vqmovnbq_u32): Likewise.
13689 (__arm_vmulltq_poly_p16): Likewise.
13690 (__arm_vmullbq_poly_p16): Likewise.
13691 (__arm_vmovntq_u32): Likewise.
13692 (__arm_vmovnbq_u32): Likewise.
13693 (__arm_vmlaldavxq_u32): Likewise.
13694 (__arm_vmlaldavq_u32): Likewise.
13695 (__arm_vqmovuntq_s32): Likewise.
13696 (__arm_vqmovunbq_s32): Likewise.
13697 (__arm_vshlltq_n_u16): Likewise.
13698 (__arm_vshllbq_n_u16): Likewise.
13699 (__arm_vorrq_n_u32): Likewise.
13700 (__arm_vbicq_n_u32): Likewise.
13701 (__arm_vcmpneq_n_f32): Likewise.
13702 (__arm_vcmpneq_f32): Likewise.
13703 (__arm_vcmpltq_n_f32): Likewise.
13704 (__arm_vcmpltq_f32): Likewise.
13705 (__arm_vcmpleq_n_f32): Likewise.
13706 (__arm_vcmpleq_f32): Likewise.
13707 (__arm_vcmpgtq_n_f32): Likewise.
13708 (__arm_vcmpgtq_f32): Likewise.
13709 (__arm_vcmpgeq_n_f32): Likewise.
13710 (__arm_vcmpgeq_f32): Likewise.
13711 (__arm_vcmpeqq_n_f32): Likewise.
13712 (__arm_vcmpeqq_f32): Likewise.
13713 (__arm_vsubq_f32): Likewise.
13714 (__arm_vqmovntq_s32): Likewise.
13715 (__arm_vqmovnbq_s32): Likewise.
13716 (__arm_vqdmulltq_s32): Likewise.
13717 (__arm_vqdmulltq_n_s32): Likewise.
13718 (__arm_vqdmullbq_s32): Likewise.
13719 (__arm_vqdmullbq_n_s32): Likewise.
13720 (__arm_vorrq_f32): Likewise.
13721 (__arm_vornq_f32): Likewise.
13722 (__arm_vmulq_n_f32): Likewise.
13723 (__arm_vmulq_f32): Likewise.
13724 (__arm_vmovntq_s32): Likewise.
13725 (__arm_vmovnbq_s32): Likewise.
13726 (__arm_vmlsldavxq_s32): Likewise.
13727 (__arm_vmlsldavq_s32): Likewise.
13728 (__arm_vmlaldavxq_s32): Likewise.
13729 (__arm_vmlaldavq_s32): Likewise.
13730 (__arm_vminnmvq_f32): Likewise.
13731 (__arm_vminnmq_f32): Likewise.
13732 (__arm_vminnmavq_f32): Likewise.
13733 (__arm_vminnmaq_f32): Likewise.
13734 (__arm_vmaxnmvq_f32): Likewise.
13735 (__arm_vmaxnmq_f32): Likewise.
13736 (__arm_vmaxnmavq_f32): Likewise.
13737 (__arm_vmaxnmaq_f32): Likewise.
13738 (__arm_veorq_f32): Likewise.
13739 (__arm_vcmulq_rot90_f32): Likewise.
13740 (__arm_vcmulq_rot270_f32): Likewise.
13741 (__arm_vcmulq_rot180_f32): Likewise.
13742 (__arm_vcmulq_f32): Likewise.
13743 (__arm_vcaddq_rot90_f32): Likewise.
13744 (__arm_vcaddq_rot270_f32): Likewise.
13745 (__arm_vbicq_f32): Likewise.
13746 (__arm_vandq_f32): Likewise.
13747 (__arm_vaddq_n_f32): Likewise.
13748 (__arm_vabdq_f32): Likewise.
13749 (__arm_vshlltq_n_s16): Likewise.
13750 (__arm_vshllbq_n_s16): Likewise.
13751 (__arm_vorrq_n_s32): Likewise.
13752 (__arm_vbicq_n_s32): Likewise.
13753 (__arm_vrmlaldavhq_u32): Likewise.
13754 (__arm_vctp8q_m): Likewise.
13755 (__arm_vctp64q_m): Likewise.
13756 (__arm_vctp32q_m): Likewise.
13757 (__arm_vctp16q_m): Likewise.
13758 (__arm_vaddlvaq_u32): Likewise.
13759 (__arm_vrmlsldavhxq_s32): Likewise.
13760 (__arm_vrmlsldavhq_s32): Likewise.
13761 (__arm_vrmlaldavhxq_s32): Likewise.
13762 (__arm_vrmlaldavhq_s32): Likewise.
13763 (__arm_vcvttq_f16_f32): Likewise.
13764 (__arm_vcvtbq_f16_f32): Likewise.
13765 (__arm_vaddlvaq_s32): Likewise.
13766 (vst4q): Define polymorphic variant.
13767 (vrndxq): Likewise.
13769 (vrndpq): Likewise.
13770 (vrndnq): Likewise.
13771 (vrndmq): Likewise.
13772 (vrndaq): Likewise.
13773 (vrev64q): Likewise.
13775 (vdupq_n): Likewise.
13777 (vrev32q): Likewise.
13778 (vcvtbq_f32): Likewise.
13779 (vcvttq_f32): Likewise.
13781 (vsubq_n): Likewise.
13782 (vbrsrq_n): Likewise.
13783 (vcvtq_n): Likewise.
13787 (vaddq_n): Likewise.
13791 (vmulq_n): Likewise.
13793 (vcaddq_rot270): Likewise.
13794 (vcmpeqq_n): Likewise.
13795 (vcmpeqq): Likewise.
13796 (vcaddq_rot90): Likewise.
13797 (vcmpgeq_n): Likewise.
13798 (vcmpgeq): Likewise.
13799 (vcmpgtq_n): Likewise.
13800 (vcmpgtq): Likewise.
13801 (vcmpgtq): Likewise.
13802 (vcmpleq_n): Likewise.
13803 (vcmpleq_n): Likewise.
13804 (vcmpleq): Likewise.
13805 (vcmpleq): Likewise.
13806 (vcmpltq_n): Likewise.
13807 (vcmpltq_n): Likewise.
13808 (vcmpltq): Likewise.
13809 (vcmpltq): Likewise.
13810 (vcmpneq_n): Likewise.
13811 (vcmpneq_n): Likewise.
13812 (vcmpneq): Likewise.
13813 (vcmpneq): Likewise.
13814 (vcmulq): Likewise.
13815 (vcmulq): Likewise.
13816 (vcmulq_rot180): Likewise.
13817 (vcmulq_rot180): Likewise.
13818 (vcmulq_rot270): Likewise.
13819 (vcmulq_rot270): Likewise.
13820 (vcmulq_rot90): Likewise.
13821 (vcmulq_rot90): Likewise.
13824 (vmaxnmaq): Likewise.
13825 (vmaxnmaq): Likewise.
13826 (vmaxnmavq): Likewise.
13827 (vmaxnmavq): Likewise.
13828 (vmaxnmq): Likewise.
13829 (vmaxnmq): Likewise.
13830 (vmaxnmvq): Likewise.
13831 (vmaxnmvq): Likewise.
13832 (vminnmaq): Likewise.
13833 (vminnmaq): Likewise.
13834 (vminnmavq): Likewise.
13835 (vminnmavq): Likewise.
13836 (vminnmq): Likewise.
13837 (vminnmq): Likewise.
13838 (vminnmvq): Likewise.
13839 (vminnmvq): Likewise.
13840 (vbicq_n): Likewise.
13841 (vqmovntq): Likewise.
13842 (vqmovntq): Likewise.
13843 (vqmovnbq): Likewise.
13844 (vqmovnbq): Likewise.
13845 (vmulltq_poly): Likewise.
13846 (vmulltq_poly): Likewise.
13847 (vmullbq_poly): Likewise.
13848 (vmullbq_poly): Likewise.
13849 (vmovntq): Likewise.
13850 (vmovntq): Likewise.
13851 (vmovnbq): Likewise.
13852 (vmovnbq): Likewise.
13853 (vmlaldavxq): Likewise.
13854 (vmlaldavxq): Likewise.
13855 (vqmovuntq): Likewise.
13856 (vqmovuntq): Likewise.
13857 (vshlltq_n): Likewise.
13858 (vshlltq_n): Likewise.
13859 (vshllbq_n): Likewise.
13860 (vshllbq_n): Likewise.
13861 (vorrq_n): Likewise.
13862 (vorrq_n): Likewise.
13863 (vmlaldavq): Likewise.
13864 (vmlaldavq): Likewise.
13865 (vqmovunbq): Likewise.
13866 (vqmovunbq): Likewise.
13867 (vqdmulltq_n): Likewise.
13868 (vqdmulltq_n): Likewise.
13869 (vqdmulltq): Likewise.
13870 (vqdmulltq): Likewise.
13871 (vqdmullbq_n): Likewise.
13872 (vqdmullbq_n): Likewise.
13873 (vqdmullbq): Likewise.
13874 (vqdmullbq): Likewise.
13875 (vaddlvaq): Likewise.
13876 (vaddlvaq): Likewise.
13877 (vrmlaldavhq): Likewise.
13878 (vrmlaldavhq): Likewise.
13879 (vrmlaldavhxq): Likewise.
13880 (vrmlaldavhxq): Likewise.
13881 (vrmlsldavhq): Likewise.
13882 (vrmlsldavhq): Likewise.
13883 (vrmlsldavhxq): Likewise.
13884 (vrmlsldavhxq): Likewise.
13885 (vmlsldavxq): Likewise.
13886 (vmlsldavxq): Likewise.
13887 (vmlsldavq): Likewise.
13888 (vmlsldavq): Likewise.
13889 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
13890 (BINOP_NONE_NONE_NONE): Likewise.
13891 (BINOP_UNONE_NONE_NONE): Likewise.
13892 (BINOP_UNONE_UNONE_IMM): Likewise.
13893 (BINOP_UNONE_UNONE_NONE): Likewise.
13894 (BINOP_UNONE_UNONE_UNONE): Likewise.
13895 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
13896 (mve_vaddlvaq_<supf>v4si): Likewise.
13897 (mve_vaddq_n_f<mode>): Likewise.
13898 (mve_vandq_f<mode>): Likewise.
13899 (mve_vbicq_f<mode>): Likewise.
13900 (mve_vbicq_n_<supf><mode>): Likewise.
13901 (mve_vcaddq_rot270_f<mode>): Likewise.
13902 (mve_vcaddq_rot90_f<mode>): Likewise.
13903 (mve_vcmpeqq_f<mode>): Likewise.
13904 (mve_vcmpeqq_n_f<mode>): Likewise.
13905 (mve_vcmpgeq_f<mode>): Likewise.
13906 (mve_vcmpgeq_n_f<mode>): Likewise.
13907 (mve_vcmpgtq_f<mode>): Likewise.
13908 (mve_vcmpgtq_n_f<mode>): Likewise.
13909 (mve_vcmpleq_f<mode>): Likewise.
13910 (mve_vcmpleq_n_f<mode>): Likewise.
13911 (mve_vcmpltq_f<mode>): Likewise.
13912 (mve_vcmpltq_n_f<mode>): Likewise.
13913 (mve_vcmpneq_f<mode>): Likewise.
13914 (mve_vcmpneq_n_f<mode>): Likewise.
13915 (mve_vcmulq_f<mode>): Likewise.
13916 (mve_vcmulq_rot180_f<mode>): Likewise.
13917 (mve_vcmulq_rot270_f<mode>): Likewise.
13918 (mve_vcmulq_rot90_f<mode>): Likewise.
13919 (mve_vctp<mode1>q_mhi): Likewise.
13920 (mve_vcvtbq_f16_f32v8hf): Likewise.
13921 (mve_vcvttq_f16_f32v8hf): Likewise.
13922 (mve_veorq_f<mode>): Likewise.
13923 (mve_vmaxnmaq_f<mode>): Likewise.
13924 (mve_vmaxnmavq_f<mode>): Likewise.
13925 (mve_vmaxnmq_f<mode>): Likewise.
13926 (mve_vmaxnmvq_f<mode>): Likewise.
13927 (mve_vminnmaq_f<mode>): Likewise.
13928 (mve_vminnmavq_f<mode>): Likewise.
13929 (mve_vminnmq_f<mode>): Likewise.
13930 (mve_vminnmvq_f<mode>): Likewise.
13931 (mve_vmlaldavq_<supf><mode>): Likewise.
13932 (mve_vmlaldavxq_<supf><mode>): Likewise.
13933 (mve_vmlsldavq_s<mode>): Likewise.
13934 (mve_vmlsldavxq_s<mode>): Likewise.
13935 (mve_vmovnbq_<supf><mode>): Likewise.
13936 (mve_vmovntq_<supf><mode>): Likewise.
13937 (mve_vmulq_f<mode>): Likewise.
13938 (mve_vmulq_n_f<mode>): Likewise.
13939 (mve_vornq_f<mode>): Likewise.
13940 (mve_vorrq_f<mode>): Likewise.
13941 (mve_vorrq_n_<supf><mode>): Likewise.
13942 (mve_vqdmullbq_n_s<mode>): Likewise.
13943 (mve_vqdmullbq_s<mode>): Likewise.
13944 (mve_vqdmulltq_n_s<mode>): Likewise.
13945 (mve_vqdmulltq_s<mode>): Likewise.
13946 (mve_vqmovnbq_<supf><mode>): Likewise.
13947 (mve_vqmovntq_<supf><mode>): Likewise.
13948 (mve_vqmovunbq_s<mode>): Likewise.
13949 (mve_vqmovuntq_s<mode>): Likewise.
13950 (mve_vrmlaldavhxq_sv4si): Likewise.
13951 (mve_vrmlsldavhq_sv4si): Likewise.
13952 (mve_vrmlsldavhxq_sv4si): Likewise.
13953 (mve_vshllbq_n_<supf><mode>): Likewise.
13954 (mve_vshlltq_n_<supf><mode>): Likewise.
13955 (mve_vsubq_f<mode>): Likewise.
13956 (mve_vmulltq_poly_p<mode>): Likewise.
13957 (mve_vmullbq_poly_p<mode>): Likewise.
13958 (mve_vrmlaldavhq_<supf>v4si): Likewise.
13960 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13961 Mihail Ionescu <mihail.ionescu@arm.com>
13962 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13964 * config/arm/arm_mve.h (vsubq_u8): Define macro.
13965 (vsubq_n_u8): Likewise.
13966 (vrmulhq_u8): Likewise.
13967 (vrhaddq_u8): Likewise.
13968 (vqsubq_u8): Likewise.
13969 (vqsubq_n_u8): Likewise.
13970 (vqaddq_u8): Likewise.
13971 (vqaddq_n_u8): Likewise.
13972 (vorrq_u8): Likewise.
13973 (vornq_u8): Likewise.
13974 (vmulq_u8): Likewise.
13975 (vmulq_n_u8): Likewise.
13976 (vmulltq_int_u8): Likewise.
13977 (vmullbq_int_u8): Likewise.
13978 (vmulhq_u8): Likewise.
13979 (vmladavq_u8): Likewise.
13980 (vminvq_u8): Likewise.
13981 (vminq_u8): Likewise.
13982 (vmaxvq_u8): Likewise.
13983 (vmaxq_u8): Likewise.
13984 (vhsubq_u8): Likewise.
13985 (vhsubq_n_u8): Likewise.
13986 (vhaddq_u8): Likewise.
13987 (vhaddq_n_u8): Likewise.
13988 (veorq_u8): Likewise.
13989 (vcmpneq_n_u8): Likewise.
13990 (vcmphiq_u8): Likewise.
13991 (vcmphiq_n_u8): Likewise.
13992 (vcmpeqq_u8): Likewise.
13993 (vcmpeqq_n_u8): Likewise.
13994 (vcmpcsq_u8): Likewise.
13995 (vcmpcsq_n_u8): Likewise.
13996 (vcaddq_rot90_u8): Likewise.
13997 (vcaddq_rot270_u8): Likewise.
13998 (vbicq_u8): Likewise.
13999 (vandq_u8): Likewise.
14000 (vaddvq_p_u8): Likewise.
14001 (vaddvaq_u8): Likewise.
14002 (vaddq_n_u8): Likewise.
14003 (vabdq_u8): Likewise.
14004 (vshlq_r_u8): Likewise.
14005 (vrshlq_u8): Likewise.
14006 (vrshlq_n_u8): Likewise.
14007 (vqshlq_u8): Likewise.
14008 (vqshlq_r_u8): Likewise.
14009 (vqrshlq_u8): Likewise.
14010 (vqrshlq_n_u8): Likewise.
14011 (vminavq_s8): Likewise.
14012 (vminaq_s8): Likewise.
14013 (vmaxavq_s8): Likewise.
14014 (vmaxaq_s8): Likewise.
14015 (vbrsrq_n_u8): Likewise.
14016 (vshlq_n_u8): Likewise.
14017 (vrshrq_n_u8): Likewise.
14018 (vqshlq_n_u8): Likewise.
14019 (vcmpneq_n_s8): Likewise.
14020 (vcmpltq_s8): Likewise.
14021 (vcmpltq_n_s8): Likewise.
14022 (vcmpleq_s8): Likewise.
14023 (vcmpleq_n_s8): Likewise.
14024 (vcmpgtq_s8): Likewise.
14025 (vcmpgtq_n_s8): Likewise.
14026 (vcmpgeq_s8): Likewise.
14027 (vcmpgeq_n_s8): Likewise.
14028 (vcmpeqq_s8): Likewise.
14029 (vcmpeqq_n_s8): Likewise.
14030 (vqshluq_n_s8): Likewise.
14031 (vaddvq_p_s8): Likewise.
14032 (vsubq_s8): Likewise.
14033 (vsubq_n_s8): Likewise.
14034 (vshlq_r_s8): Likewise.
14035 (vrshlq_s8): Likewise.
14036 (vrshlq_n_s8): Likewise.
14037 (vrmulhq_s8): Likewise.
14038 (vrhaddq_s8): Likewise.
14039 (vqsubq_s8): Likewise.
14040 (vqsubq_n_s8): Likewise.
14041 (vqshlq_s8): Likewise.
14042 (vqshlq_r_s8): Likewise.
14043 (vqrshlq_s8): Likewise.
14044 (vqrshlq_n_s8): Likewise.
14045 (vqrdmulhq_s8): Likewise.
14046 (vqrdmulhq_n_s8): Likewise.
14047 (vqdmulhq_s8): Likewise.
14048 (vqdmulhq_n_s8): Likewise.
14049 (vqaddq_s8): Likewise.
14050 (vqaddq_n_s8): Likewise.
14051 (vorrq_s8): Likewise.
14052 (vornq_s8): Likewise.
14053 (vmulq_s8): Likewise.
14054 (vmulq_n_s8): Likewise.
14055 (vmulltq_int_s8): Likewise.
14056 (vmullbq_int_s8): Likewise.
14057 (vmulhq_s8): Likewise.
14058 (vmlsdavxq_s8): Likewise.
14059 (vmlsdavq_s8): Likewise.
14060 (vmladavxq_s8): Likewise.
14061 (vmladavq_s8): Likewise.
14062 (vminvq_s8): Likewise.
14063 (vminq_s8): Likewise.
14064 (vmaxvq_s8): Likewise.
14065 (vmaxq_s8): Likewise.
14066 (vhsubq_s8): Likewise.
14067 (vhsubq_n_s8): Likewise.
14068 (vhcaddq_rot90_s8): Likewise.
14069 (vhcaddq_rot270_s8): Likewise.
14070 (vhaddq_s8): Likewise.
14071 (vhaddq_n_s8): Likewise.
14072 (veorq_s8): Likewise.
14073 (vcaddq_rot90_s8): Likewise.
14074 (vcaddq_rot270_s8): Likewise.
14075 (vbrsrq_n_s8): Likewise.
14076 (vbicq_s8): Likewise.
14077 (vandq_s8): Likewise.
14078 (vaddvaq_s8): Likewise.
14079 (vaddq_n_s8): Likewise.
14080 (vabdq_s8): Likewise.
14081 (vshlq_n_s8): Likewise.
14082 (vrshrq_n_s8): Likewise.
14083 (vqshlq_n_s8): Likewise.
14084 (vsubq_u16): Likewise.
14085 (vsubq_n_u16): Likewise.
14086 (vrmulhq_u16): Likewise.
14087 (vrhaddq_u16): Likewise.
14088 (vqsubq_u16): Likewise.
14089 (vqsubq_n_u16): Likewise.
14090 (vqaddq_u16): Likewise.
14091 (vqaddq_n_u16): Likewise.
14092 (vorrq_u16): Likewise.
14093 (vornq_u16): Likewise.
14094 (vmulq_u16): Likewise.
14095 (vmulq_n_u16): Likewise.
14096 (vmulltq_int_u16): Likewise.
14097 (vmullbq_int_u16): Likewise.
14098 (vmulhq_u16): Likewise.
14099 (vmladavq_u16): Likewise.
14100 (vminvq_u16): Likewise.
14101 (vminq_u16): Likewise.
14102 (vmaxvq_u16): Likewise.
14103 (vmaxq_u16): Likewise.
14104 (vhsubq_u16): Likewise.
14105 (vhsubq_n_u16): Likewise.
14106 (vhaddq_u16): Likewise.
14107 (vhaddq_n_u16): Likewise.
14108 (veorq_u16): Likewise.
14109 (vcmpneq_n_u16): Likewise.
14110 (vcmphiq_u16): Likewise.
14111 (vcmphiq_n_u16): Likewise.
14112 (vcmpeqq_u16): Likewise.
14113 (vcmpeqq_n_u16): Likewise.
14114 (vcmpcsq_u16): Likewise.
14115 (vcmpcsq_n_u16): Likewise.
14116 (vcaddq_rot90_u16): Likewise.
14117 (vcaddq_rot270_u16): Likewise.
14118 (vbicq_u16): Likewise.
14119 (vandq_u16): Likewise.
14120 (vaddvq_p_u16): Likewise.
14121 (vaddvaq_u16): Likewise.
14122 (vaddq_n_u16): Likewise.
14123 (vabdq_u16): Likewise.
14124 (vshlq_r_u16): Likewise.
14125 (vrshlq_u16): Likewise.
14126 (vrshlq_n_u16): Likewise.
14127 (vqshlq_u16): Likewise.
14128 (vqshlq_r_u16): Likewise.
14129 (vqrshlq_u16): Likewise.
14130 (vqrshlq_n_u16): Likewise.
14131 (vminavq_s16): Likewise.
14132 (vminaq_s16): Likewise.
14133 (vmaxavq_s16): Likewise.
14134 (vmaxaq_s16): Likewise.
14135 (vbrsrq_n_u16): Likewise.
14136 (vshlq_n_u16): Likewise.
14137 (vrshrq_n_u16): Likewise.
14138 (vqshlq_n_u16): Likewise.
14139 (vcmpneq_n_s16): Likewise.
14140 (vcmpltq_s16): Likewise.
14141 (vcmpltq_n_s16): Likewise.
14142 (vcmpleq_s16): Likewise.
14143 (vcmpleq_n_s16): Likewise.
14144 (vcmpgtq_s16): Likewise.
14145 (vcmpgtq_n_s16): Likewise.
14146 (vcmpgeq_s16): Likewise.
14147 (vcmpgeq_n_s16): Likewise.
14148 (vcmpeqq_s16): Likewise.
14149 (vcmpeqq_n_s16): Likewise.
14150 (vqshluq_n_s16): Likewise.
14151 (vaddvq_p_s16): Likewise.
14152 (vsubq_s16): Likewise.
14153 (vsubq_n_s16): Likewise.
14154 (vshlq_r_s16): Likewise.
14155 (vrshlq_s16): Likewise.
14156 (vrshlq_n_s16): Likewise.
14157 (vrmulhq_s16): Likewise.
14158 (vrhaddq_s16): Likewise.
14159 (vqsubq_s16): Likewise.
14160 (vqsubq_n_s16): Likewise.
14161 (vqshlq_s16): Likewise.
14162 (vqshlq_r_s16): Likewise.
14163 (vqrshlq_s16): Likewise.
14164 (vqrshlq_n_s16): Likewise.
14165 (vqrdmulhq_s16): Likewise.
14166 (vqrdmulhq_n_s16): Likewise.
14167 (vqdmulhq_s16): Likewise.
14168 (vqdmulhq_n_s16): Likewise.
14169 (vqaddq_s16): Likewise.
14170 (vqaddq_n_s16): Likewise.
14171 (vorrq_s16): Likewise.
14172 (vornq_s16): Likewise.
14173 (vmulq_s16): Likewise.
14174 (vmulq_n_s16): Likewise.
14175 (vmulltq_int_s16): Likewise.
14176 (vmullbq_int_s16): Likewise.
14177 (vmulhq_s16): Likewise.
14178 (vmlsdavxq_s16): Likewise.
14179 (vmlsdavq_s16): Likewise.
14180 (vmladavxq_s16): Likewise.
14181 (vmladavq_s16): Likewise.
14182 (vminvq_s16): Likewise.
14183 (vminq_s16): Likewise.
14184 (vmaxvq_s16): Likewise.
14185 (vmaxq_s16): Likewise.
14186 (vhsubq_s16): Likewise.
14187 (vhsubq_n_s16): Likewise.
14188 (vhcaddq_rot90_s16): Likewise.
14189 (vhcaddq_rot270_s16): Likewise.
14190 (vhaddq_s16): Likewise.
14191 (vhaddq_n_s16): Likewise.
14192 (veorq_s16): Likewise.
14193 (vcaddq_rot90_s16): Likewise.
14194 (vcaddq_rot270_s16): Likewise.
14195 (vbrsrq_n_s16): Likewise.
14196 (vbicq_s16): Likewise.
14197 (vandq_s16): Likewise.
14198 (vaddvaq_s16): Likewise.
14199 (vaddq_n_s16): Likewise.
14200 (vabdq_s16): Likewise.
14201 (vshlq_n_s16): Likewise.
14202 (vrshrq_n_s16): Likewise.
14203 (vqshlq_n_s16): Likewise.
14204 (vsubq_u32): Likewise.
14205 (vsubq_n_u32): Likewise.
14206 (vrmulhq_u32): Likewise.
14207 (vrhaddq_u32): Likewise.
14208 (vqsubq_u32): Likewise.
14209 (vqsubq_n_u32): Likewise.
14210 (vqaddq_u32): Likewise.
14211 (vqaddq_n_u32): Likewise.
14212 (vorrq_u32): Likewise.
14213 (vornq_u32): Likewise.
14214 (vmulq_u32): Likewise.
14215 (vmulq_n_u32): Likewise.
14216 (vmulltq_int_u32): Likewise.
14217 (vmullbq_int_u32): Likewise.
14218 (vmulhq_u32): Likewise.
14219 (vmladavq_u32): Likewise.
14220 (vminvq_u32): Likewise.
14221 (vminq_u32): Likewise.
14222 (vmaxvq_u32): Likewise.
14223 (vmaxq_u32): Likewise.
14224 (vhsubq_u32): Likewise.
14225 (vhsubq_n_u32): Likewise.
14226 (vhaddq_u32): Likewise.
14227 (vhaddq_n_u32): Likewise.
14228 (veorq_u32): Likewise.
14229 (vcmpneq_n_u32): Likewise.
14230 (vcmphiq_u32): Likewise.
14231 (vcmphiq_n_u32): Likewise.
14232 (vcmpeqq_u32): Likewise.
14233 (vcmpeqq_n_u32): Likewise.
14234 (vcmpcsq_u32): Likewise.
14235 (vcmpcsq_n_u32): Likewise.
14236 (vcaddq_rot90_u32): Likewise.
14237 (vcaddq_rot270_u32): Likewise.
14238 (vbicq_u32): Likewise.
14239 (vandq_u32): Likewise.
14240 (vaddvq_p_u32): Likewise.
14241 (vaddvaq_u32): Likewise.
14242 (vaddq_n_u32): Likewise.
14243 (vabdq_u32): Likewise.
14244 (vshlq_r_u32): Likewise.
14245 (vrshlq_u32): Likewise.
14246 (vrshlq_n_u32): Likewise.
14247 (vqshlq_u32): Likewise.
14248 (vqshlq_r_u32): Likewise.
14249 (vqrshlq_u32): Likewise.
14250 (vqrshlq_n_u32): Likewise.
14251 (vminavq_s32): Likewise.
14252 (vminaq_s32): Likewise.
14253 (vmaxavq_s32): Likewise.
14254 (vmaxaq_s32): Likewise.
14255 (vbrsrq_n_u32): Likewise.
14256 (vshlq_n_u32): Likewise.
14257 (vrshrq_n_u32): Likewise.
14258 (vqshlq_n_u32): Likewise.
14259 (vcmpneq_n_s32): Likewise.
14260 (vcmpltq_s32): Likewise.
14261 (vcmpltq_n_s32): Likewise.
14262 (vcmpleq_s32): Likewise.
14263 (vcmpleq_n_s32): Likewise.
14264 (vcmpgtq_s32): Likewise.
14265 (vcmpgtq_n_s32): Likewise.
14266 (vcmpgeq_s32): Likewise.
14267 (vcmpgeq_n_s32): Likewise.
14268 (vcmpeqq_s32): Likewise.
14269 (vcmpeqq_n_s32): Likewise.
14270 (vqshluq_n_s32): Likewise.
14271 (vaddvq_p_s32): Likewise.
14272 (vsubq_s32): Likewise.
14273 (vsubq_n_s32): Likewise.
14274 (vshlq_r_s32): Likewise.
14275 (vrshlq_s32): Likewise.
14276 (vrshlq_n_s32): Likewise.
14277 (vrmulhq_s32): Likewise.
14278 (vrhaddq_s32): Likewise.
14279 (vqsubq_s32): Likewise.
14280 (vqsubq_n_s32): Likewise.
14281 (vqshlq_s32): Likewise.
14282 (vqshlq_r_s32): Likewise.
14283 (vqrshlq_s32): Likewise.
14284 (vqrshlq_n_s32): Likewise.
14285 (vqrdmulhq_s32): Likewise.
14286 (vqrdmulhq_n_s32): Likewise.
14287 (vqdmulhq_s32): Likewise.
14288 (vqdmulhq_n_s32): Likewise.
14289 (vqaddq_s32): Likewise.
14290 (vqaddq_n_s32): Likewise.
14291 (vorrq_s32): Likewise.
14292 (vornq_s32): Likewise.
14293 (vmulq_s32): Likewise.
14294 (vmulq_n_s32): Likewise.
14295 (vmulltq_int_s32): Likewise.
14296 (vmullbq_int_s32): Likewise.
14297 (vmulhq_s32): Likewise.
14298 (vmlsdavxq_s32): Likewise.
14299 (vmlsdavq_s32): Likewise.
14300 (vmladavxq_s32): Likewise.
14301 (vmladavq_s32): Likewise.
14302 (vminvq_s32): Likewise.
14303 (vminq_s32): Likewise.
14304 (vmaxvq_s32): Likewise.
14305 (vmaxq_s32): Likewise.
14306 (vhsubq_s32): Likewise.
14307 (vhsubq_n_s32): Likewise.
14308 (vhcaddq_rot90_s32): Likewise.
14309 (vhcaddq_rot270_s32): Likewise.
14310 (vhaddq_s32): Likewise.
14311 (vhaddq_n_s32): Likewise.
14312 (veorq_s32): Likewise.
14313 (vcaddq_rot90_s32): Likewise.
14314 (vcaddq_rot270_s32): Likewise.
14315 (vbrsrq_n_s32): Likewise.
14316 (vbicq_s32): Likewise.
14317 (vandq_s32): Likewise.
14318 (vaddvaq_s32): Likewise.
14319 (vaddq_n_s32): Likewise.
14320 (vabdq_s32): Likewise.
14321 (vshlq_n_s32): Likewise.
14322 (vrshrq_n_s32): Likewise.
14323 (vqshlq_n_s32): Likewise.
14324 (__arm_vsubq_u8): Define intrinsic.
14325 (__arm_vsubq_n_u8): Likewise.
14326 (__arm_vrmulhq_u8): Likewise.
14327 (__arm_vrhaddq_u8): Likewise.
14328 (__arm_vqsubq_u8): Likewise.
14329 (__arm_vqsubq_n_u8): Likewise.
14330 (__arm_vqaddq_u8): Likewise.
14331 (__arm_vqaddq_n_u8): Likewise.
14332 (__arm_vorrq_u8): Likewise.
14333 (__arm_vornq_u8): Likewise.
14334 (__arm_vmulq_u8): Likewise.
14335 (__arm_vmulq_n_u8): Likewise.
14336 (__arm_vmulltq_int_u8): Likewise.
14337 (__arm_vmullbq_int_u8): Likewise.
14338 (__arm_vmulhq_u8): Likewise.
14339 (__arm_vmladavq_u8): Likewise.
14340 (__arm_vminvq_u8): Likewise.
14341 (__arm_vminq_u8): Likewise.
14342 (__arm_vmaxvq_u8): Likewise.
14343 (__arm_vmaxq_u8): Likewise.
14344 (__arm_vhsubq_u8): Likewise.
14345 (__arm_vhsubq_n_u8): Likewise.
14346 (__arm_vhaddq_u8): Likewise.
14347 (__arm_vhaddq_n_u8): Likewise.
14348 (__arm_veorq_u8): Likewise.
14349 (__arm_vcmpneq_n_u8): Likewise.
14350 (__arm_vcmphiq_u8): Likewise.
14351 (__arm_vcmphiq_n_u8): Likewise.
14352 (__arm_vcmpeqq_u8): Likewise.
14353 (__arm_vcmpeqq_n_u8): Likewise.
14354 (__arm_vcmpcsq_u8): Likewise.
14355 (__arm_vcmpcsq_n_u8): Likewise.
14356 (__arm_vcaddq_rot90_u8): Likewise.
14357 (__arm_vcaddq_rot270_u8): Likewise.
14358 (__arm_vbicq_u8): Likewise.
14359 (__arm_vandq_u8): Likewise.
14360 (__arm_vaddvq_p_u8): Likewise.
14361 (__arm_vaddvaq_u8): Likewise.
14362 (__arm_vaddq_n_u8): Likewise.
14363 (__arm_vabdq_u8): Likewise.
14364 (__arm_vshlq_r_u8): Likewise.
14365 (__arm_vrshlq_u8): Likewise.
14366 (__arm_vrshlq_n_u8): Likewise.
14367 (__arm_vqshlq_u8): Likewise.
14368 (__arm_vqshlq_r_u8): Likewise.
14369 (__arm_vqrshlq_u8): Likewise.
14370 (__arm_vqrshlq_n_u8): Likewise.
14371 (__arm_vminavq_s8): Likewise.
14372 (__arm_vminaq_s8): Likewise.
14373 (__arm_vmaxavq_s8): Likewise.
14374 (__arm_vmaxaq_s8): Likewise.
14375 (__arm_vbrsrq_n_u8): Likewise.
14376 (__arm_vshlq_n_u8): Likewise.
14377 (__arm_vrshrq_n_u8): Likewise.
14378 (__arm_vqshlq_n_u8): Likewise.
14379 (__arm_vcmpneq_n_s8): Likewise.
14380 (__arm_vcmpltq_s8): Likewise.
14381 (__arm_vcmpltq_n_s8): Likewise.
14382 (__arm_vcmpleq_s8): Likewise.
14383 (__arm_vcmpleq_n_s8): Likewise.
14384 (__arm_vcmpgtq_s8): Likewise.
14385 (__arm_vcmpgtq_n_s8): Likewise.
14386 (__arm_vcmpgeq_s8): Likewise.
14387 (__arm_vcmpgeq_n_s8): Likewise.
14388 (__arm_vcmpeqq_s8): Likewise.
14389 (__arm_vcmpeqq_n_s8): Likewise.
14390 (__arm_vqshluq_n_s8): Likewise.
14391 (__arm_vaddvq_p_s8): Likewise.
14392 (__arm_vsubq_s8): Likewise.
14393 (__arm_vsubq_n_s8): Likewise.
14394 (__arm_vshlq_r_s8): Likewise.
14395 (__arm_vrshlq_s8): Likewise.
14396 (__arm_vrshlq_n_s8): Likewise.
14397 (__arm_vrmulhq_s8): Likewise.
14398 (__arm_vrhaddq_s8): Likewise.
14399 (__arm_vqsubq_s8): Likewise.
14400 (__arm_vqsubq_n_s8): Likewise.
14401 (__arm_vqshlq_s8): Likewise.
14402 (__arm_vqshlq_r_s8): Likewise.
14403 (__arm_vqrshlq_s8): Likewise.
14404 (__arm_vqrshlq_n_s8): Likewise.
14405 (__arm_vqrdmulhq_s8): Likewise.
14406 (__arm_vqrdmulhq_n_s8): Likewise.
14407 (__arm_vqdmulhq_s8): Likewise.
14408 (__arm_vqdmulhq_n_s8): Likewise.
14409 (__arm_vqaddq_s8): Likewise.
14410 (__arm_vqaddq_n_s8): Likewise.
14411 (__arm_vorrq_s8): Likewise.
14412 (__arm_vornq_s8): Likewise.
14413 (__arm_vmulq_s8): Likewise.
14414 (__arm_vmulq_n_s8): Likewise.
14415 (__arm_vmulltq_int_s8): Likewise.
14416 (__arm_vmullbq_int_s8): Likewise.
14417 (__arm_vmulhq_s8): Likewise.
14418 (__arm_vmlsdavxq_s8): Likewise.
14419 (__arm_vmlsdavq_s8): Likewise.
14420 (__arm_vmladavxq_s8): Likewise.
14421 (__arm_vmladavq_s8): Likewise.
14422 (__arm_vminvq_s8): Likewise.
14423 (__arm_vminq_s8): Likewise.
14424 (__arm_vmaxvq_s8): Likewise.
14425 (__arm_vmaxq_s8): Likewise.
14426 (__arm_vhsubq_s8): Likewise.
14427 (__arm_vhsubq_n_s8): Likewise.
14428 (__arm_vhcaddq_rot90_s8): Likewise.
14429 (__arm_vhcaddq_rot270_s8): Likewise.
14430 (__arm_vhaddq_s8): Likewise.
14431 (__arm_vhaddq_n_s8): Likewise.
14432 (__arm_veorq_s8): Likewise.
14433 (__arm_vcaddq_rot90_s8): Likewise.
14434 (__arm_vcaddq_rot270_s8): Likewise.
14435 (__arm_vbrsrq_n_s8): Likewise.
14436 (__arm_vbicq_s8): Likewise.
14437 (__arm_vandq_s8): Likewise.
14438 (__arm_vaddvaq_s8): Likewise.
14439 (__arm_vaddq_n_s8): Likewise.
14440 (__arm_vabdq_s8): Likewise.
14441 (__arm_vshlq_n_s8): Likewise.
14442 (__arm_vrshrq_n_s8): Likewise.
14443 (__arm_vqshlq_n_s8): Likewise.
14444 (__arm_vsubq_u16): Likewise.
14445 (__arm_vsubq_n_u16): Likewise.
14446 (__arm_vrmulhq_u16): Likewise.
14447 (__arm_vrhaddq_u16): Likewise.
14448 (__arm_vqsubq_u16): Likewise.
14449 (__arm_vqsubq_n_u16): Likewise.
14450 (__arm_vqaddq_u16): Likewise.
14451 (__arm_vqaddq_n_u16): Likewise.
14452 (__arm_vorrq_u16): Likewise.
14453 (__arm_vornq_u16): Likewise.
14454 (__arm_vmulq_u16): Likewise.
14455 (__arm_vmulq_n_u16): Likewise.
14456 (__arm_vmulltq_int_u16): Likewise.
14457 (__arm_vmullbq_int_u16): Likewise.
14458 (__arm_vmulhq_u16): Likewise.
14459 (__arm_vmladavq_u16): Likewise.
14460 (__arm_vminvq_u16): Likewise.
14461 (__arm_vminq_u16): Likewise.
14462 (__arm_vmaxvq_u16): Likewise.
14463 (__arm_vmaxq_u16): Likewise.
14464 (__arm_vhsubq_u16): Likewise.
14465 (__arm_vhsubq_n_u16): Likewise.
14466 (__arm_vhaddq_u16): Likewise.
14467 (__arm_vhaddq_n_u16): Likewise.
14468 (__arm_veorq_u16): Likewise.
14469 (__arm_vcmpneq_n_u16): Likewise.
14470 (__arm_vcmphiq_u16): Likewise.
14471 (__arm_vcmphiq_n_u16): Likewise.
14472 (__arm_vcmpeqq_u16): Likewise.
14473 (__arm_vcmpeqq_n_u16): Likewise.
14474 (__arm_vcmpcsq_u16): Likewise.
14475 (__arm_vcmpcsq_n_u16): Likewise.
14476 (__arm_vcaddq_rot90_u16): Likewise.
14477 (__arm_vcaddq_rot270_u16): Likewise.
14478 (__arm_vbicq_u16): Likewise.
14479 (__arm_vandq_u16): Likewise.
14480 (__arm_vaddvq_p_u16): Likewise.
14481 (__arm_vaddvaq_u16): Likewise.
14482 (__arm_vaddq_n_u16): Likewise.
14483 (__arm_vabdq_u16): Likewise.
14484 (__arm_vshlq_r_u16): Likewise.
14485 (__arm_vrshlq_u16): Likewise.
14486 (__arm_vrshlq_n_u16): Likewise.
14487 (__arm_vqshlq_u16): Likewise.
14488 (__arm_vqshlq_r_u16): Likewise.
14489 (__arm_vqrshlq_u16): Likewise.
14490 (__arm_vqrshlq_n_u16): Likewise.
14491 (__arm_vminavq_s16): Likewise.
14492 (__arm_vminaq_s16): Likewise.
14493 (__arm_vmaxavq_s16): Likewise.
14494 (__arm_vmaxaq_s16): Likewise.
14495 (__arm_vbrsrq_n_u16): Likewise.
14496 (__arm_vshlq_n_u16): Likewise.
14497 (__arm_vrshrq_n_u16): Likewise.
14498 (__arm_vqshlq_n_u16): Likewise.
14499 (__arm_vcmpneq_n_s16): Likewise.
14500 (__arm_vcmpltq_s16): Likewise.
14501 (__arm_vcmpltq_n_s16): Likewise.
14502 (__arm_vcmpleq_s16): Likewise.
14503 (__arm_vcmpleq_n_s16): Likewise.
14504 (__arm_vcmpgtq_s16): Likewise.
14505 (__arm_vcmpgtq_n_s16): Likewise.
14506 (__arm_vcmpgeq_s16): Likewise.
14507 (__arm_vcmpgeq_n_s16): Likewise.
14508 (__arm_vcmpeqq_s16): Likewise.
14509 (__arm_vcmpeqq_n_s16): Likewise.
14510 (__arm_vqshluq_n_s16): Likewise.
14511 (__arm_vaddvq_p_s16): Likewise.
14512 (__arm_vsubq_s16): Likewise.
14513 (__arm_vsubq_n_s16): Likewise.
14514 (__arm_vshlq_r_s16): Likewise.
14515 (__arm_vrshlq_s16): Likewise.
14516 (__arm_vrshlq_n_s16): Likewise.
14517 (__arm_vrmulhq_s16): Likewise.
14518 (__arm_vrhaddq_s16): Likewise.
14519 (__arm_vqsubq_s16): Likewise.
14520 (__arm_vqsubq_n_s16): Likewise.
14521 (__arm_vqshlq_s16): Likewise.
14522 (__arm_vqshlq_r_s16): Likewise.
14523 (__arm_vqrshlq_s16): Likewise.
14524 (__arm_vqrshlq_n_s16): Likewise.
14525 (__arm_vqrdmulhq_s16): Likewise.
14526 (__arm_vqrdmulhq_n_s16): Likewise.
14527 (__arm_vqdmulhq_s16): Likewise.
14528 (__arm_vqdmulhq_n_s16): Likewise.
14529 (__arm_vqaddq_s16): Likewise.
14530 (__arm_vqaddq_n_s16): Likewise.
14531 (__arm_vorrq_s16): Likewise.
14532 (__arm_vornq_s16): Likewise.
14533 (__arm_vmulq_s16): Likewise.
14534 (__arm_vmulq_n_s16): Likewise.
14535 (__arm_vmulltq_int_s16): Likewise.
14536 (__arm_vmullbq_int_s16): Likewise.
14537 (__arm_vmulhq_s16): Likewise.
14538 (__arm_vmlsdavxq_s16): Likewise.
14539 (__arm_vmlsdavq_s16): Likewise.
14540 (__arm_vmladavxq_s16): Likewise.
14541 (__arm_vmladavq_s16): Likewise.
14542 (__arm_vminvq_s16): Likewise.
14543 (__arm_vminq_s16): Likewise.
14544 (__arm_vmaxvq_s16): Likewise.
14545 (__arm_vmaxq_s16): Likewise.
14546 (__arm_vhsubq_s16): Likewise.
14547 (__arm_vhsubq_n_s16): Likewise.
14548 (__arm_vhcaddq_rot90_s16): Likewise.
14549 (__arm_vhcaddq_rot270_s16): Likewise.
14550 (__arm_vhaddq_s16): Likewise.
14551 (__arm_vhaddq_n_s16): Likewise.
14552 (__arm_veorq_s16): Likewise.
14553 (__arm_vcaddq_rot90_s16): Likewise.
14554 (__arm_vcaddq_rot270_s16): Likewise.
14555 (__arm_vbrsrq_n_s16): Likewise.
14556 (__arm_vbicq_s16): Likewise.
14557 (__arm_vandq_s16): Likewise.
14558 (__arm_vaddvaq_s16): Likewise.
14559 (__arm_vaddq_n_s16): Likewise.
14560 (__arm_vabdq_s16): Likewise.
14561 (__arm_vshlq_n_s16): Likewise.
14562 (__arm_vrshrq_n_s16): Likewise.
14563 (__arm_vqshlq_n_s16): Likewise.
14564 (__arm_vsubq_u32): Likewise.
14565 (__arm_vsubq_n_u32): Likewise.
14566 (__arm_vrmulhq_u32): Likewise.
14567 (__arm_vrhaddq_u32): Likewise.
14568 (__arm_vqsubq_u32): Likewise.
14569 (__arm_vqsubq_n_u32): Likewise.
14570 (__arm_vqaddq_u32): Likewise.
14571 (__arm_vqaddq_n_u32): Likewise.
14572 (__arm_vorrq_u32): Likewise.
14573 (__arm_vornq_u32): Likewise.
14574 (__arm_vmulq_u32): Likewise.
14575 (__arm_vmulq_n_u32): Likewise.
14576 (__arm_vmulltq_int_u32): Likewise.
14577 (__arm_vmullbq_int_u32): Likewise.
14578 (__arm_vmulhq_u32): Likewise.
14579 (__arm_vmladavq_u32): Likewise.
14580 (__arm_vminvq_u32): Likewise.
14581 (__arm_vminq_u32): Likewise.
14582 (__arm_vmaxvq_u32): Likewise.
14583 (__arm_vmaxq_u32): Likewise.
14584 (__arm_vhsubq_u32): Likewise.
14585 (__arm_vhsubq_n_u32): Likewise.
14586 (__arm_vhaddq_u32): Likewise.
14587 (__arm_vhaddq_n_u32): Likewise.
14588 (__arm_veorq_u32): Likewise.
14589 (__arm_vcmpneq_n_u32): Likewise.
14590 (__arm_vcmphiq_u32): Likewise.
14591 (__arm_vcmphiq_n_u32): Likewise.
14592 (__arm_vcmpeqq_u32): Likewise.
14593 (__arm_vcmpeqq_n_u32): Likewise.
14594 (__arm_vcmpcsq_u32): Likewise.
14595 (__arm_vcmpcsq_n_u32): Likewise.
14596 (__arm_vcaddq_rot90_u32): Likewise.
14597 (__arm_vcaddq_rot270_u32): Likewise.
14598 (__arm_vbicq_u32): Likewise.
14599 (__arm_vandq_u32): Likewise.
14600 (__arm_vaddvq_p_u32): Likewise.
14601 (__arm_vaddvaq_u32): Likewise.
14602 (__arm_vaddq_n_u32): Likewise.
14603 (__arm_vabdq_u32): Likewise.
14604 (__arm_vshlq_r_u32): Likewise.
14605 (__arm_vrshlq_u32): Likewise.
14606 (__arm_vrshlq_n_u32): Likewise.
14607 (__arm_vqshlq_u32): Likewise.
14608 (__arm_vqshlq_r_u32): Likewise.
14609 (__arm_vqrshlq_u32): Likewise.
14610 (__arm_vqrshlq_n_u32): Likewise.
14611 (__arm_vminavq_s32): Likewise.
14612 (__arm_vminaq_s32): Likewise.
14613 (__arm_vmaxavq_s32): Likewise.
14614 (__arm_vmaxaq_s32): Likewise.
14615 (__arm_vbrsrq_n_u32): Likewise.
14616 (__arm_vshlq_n_u32): Likewise.
14617 (__arm_vrshrq_n_u32): Likewise.
14618 (__arm_vqshlq_n_u32): Likewise.
14619 (__arm_vcmpneq_n_s32): Likewise.
14620 (__arm_vcmpltq_s32): Likewise.
14621 (__arm_vcmpltq_n_s32): Likewise.
14622 (__arm_vcmpleq_s32): Likewise.
14623 (__arm_vcmpleq_n_s32): Likewise.
14624 (__arm_vcmpgtq_s32): Likewise.
14625 (__arm_vcmpgtq_n_s32): Likewise.
14626 (__arm_vcmpgeq_s32): Likewise.
14627 (__arm_vcmpgeq_n_s32): Likewise.
14628 (__arm_vcmpeqq_s32): Likewise.
14629 (__arm_vcmpeqq_n_s32): Likewise.
14630 (__arm_vqshluq_n_s32): Likewise.
14631 (__arm_vaddvq_p_s32): Likewise.
14632 (__arm_vsubq_s32): Likewise.
14633 (__arm_vsubq_n_s32): Likewise.
14634 (__arm_vshlq_r_s32): Likewise.
14635 (__arm_vrshlq_s32): Likewise.
14636 (__arm_vrshlq_n_s32): Likewise.
14637 (__arm_vrmulhq_s32): Likewise.
14638 (__arm_vrhaddq_s32): Likewise.
14639 (__arm_vqsubq_s32): Likewise.
14640 (__arm_vqsubq_n_s32): Likewise.
14641 (__arm_vqshlq_s32): Likewise.
14642 (__arm_vqshlq_r_s32): Likewise.
14643 (__arm_vqrshlq_s32): Likewise.
14644 (__arm_vqrshlq_n_s32): Likewise.
14645 (__arm_vqrdmulhq_s32): Likewise.
14646 (__arm_vqrdmulhq_n_s32): Likewise.
14647 (__arm_vqdmulhq_s32): Likewise.
14648 (__arm_vqdmulhq_n_s32): Likewise.
14649 (__arm_vqaddq_s32): Likewise.
14650 (__arm_vqaddq_n_s32): Likewise.
14651 (__arm_vorrq_s32): Likewise.
14652 (__arm_vornq_s32): Likewise.
14653 (__arm_vmulq_s32): Likewise.
14654 (__arm_vmulq_n_s32): Likewise.
14655 (__arm_vmulltq_int_s32): Likewise.
14656 (__arm_vmullbq_int_s32): Likewise.
14657 (__arm_vmulhq_s32): Likewise.
14658 (__arm_vmlsdavxq_s32): Likewise.
14659 (__arm_vmlsdavq_s32): Likewise.
14660 (__arm_vmladavxq_s32): Likewise.
14661 (__arm_vmladavq_s32): Likewise.
14662 (__arm_vminvq_s32): Likewise.
14663 (__arm_vminq_s32): Likewise.
14664 (__arm_vmaxvq_s32): Likewise.
14665 (__arm_vmaxq_s32): Likewise.
14666 (__arm_vhsubq_s32): Likewise.
14667 (__arm_vhsubq_n_s32): Likewise.
14668 (__arm_vhcaddq_rot90_s32): Likewise.
14669 (__arm_vhcaddq_rot270_s32): Likewise.
14670 (__arm_vhaddq_s32): Likewise.
14671 (__arm_vhaddq_n_s32): Likewise.
14672 (__arm_veorq_s32): Likewise.
14673 (__arm_vcaddq_rot90_s32): Likewise.
14674 (__arm_vcaddq_rot270_s32): Likewise.
14675 (__arm_vbrsrq_n_s32): Likewise.
14676 (__arm_vbicq_s32): Likewise.
14677 (__arm_vandq_s32): Likewise.
14678 (__arm_vaddvaq_s32): Likewise.
14679 (__arm_vaddq_n_s32): Likewise.
14680 (__arm_vabdq_s32): Likewise.
14681 (__arm_vshlq_n_s32): Likewise.
14682 (__arm_vrshrq_n_s32): Likewise.
14683 (__arm_vqshlq_n_s32): Likewise.
14684 (vsubq): Define polymorphic variant.
14685 (vsubq_n): Likewise.
14686 (vshlq_r): Likewise.
14687 (vrshlq_n): Likewise.
14688 (vrshlq): Likewise.
14689 (vrmulhq): Likewise.
14690 (vrhaddq): Likewise.
14691 (vqsubq_n): Likewise.
14692 (vqsubq): Likewise.
14693 (vqshlq): Likewise.
14694 (vqshlq_r): Likewise.
14695 (vqshluq): Likewise.
14696 (vrshrq_n): Likewise.
14697 (vshlq_n): Likewise.
14698 (vqshluq_n): Likewise.
14699 (vqshlq_n): Likewise.
14700 (vqrshlq_n): Likewise.
14701 (vqrshlq): Likewise.
14702 (vqrdmulhq_n): Likewise.
14703 (vqrdmulhq): Likewise.
14704 (vqdmulhq_n): Likewise.
14705 (vqdmulhq): Likewise.
14706 (vqaddq_n): Likewise.
14707 (vqaddq): Likewise.
14708 (vorrq_n): Likewise.
14711 (vmulq_n): Likewise.
14713 (vmulltq_int): Likewise.
14714 (vmullbq_int): Likewise.
14715 (vmulhq): Likewise.
14717 (vminaq): Likewise.
14719 (vmaxaq): Likewise.
14720 (vhsubq_n): Likewise.
14721 (vhsubq): Likewise.
14722 (vhcaddq_rot90): Likewise.
14723 (vhcaddq_rot270): Likewise.
14724 (vhaddq_n): Likewise.
14725 (vhaddq): Likewise.
14727 (vcaddq_rot90): Likewise.
14728 (vcaddq_rot270): Likewise.
14729 (vbrsrq_n): Likewise.
14730 (vbicq_n): Likewise.
14733 (vaddq_n): Likewise.
14736 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
14737 (BINOP_NONE_NONE_NONE): Likewise.
14738 (BINOP_NONE_NONE_UNONE): Likewise.
14739 (BINOP_UNONE_NONE_IMM): Likewise.
14740 (BINOP_UNONE_NONE_NONE): Likewise.
14741 (BINOP_UNONE_UNONE_IMM): Likewise.
14742 (BINOP_UNONE_UNONE_NONE): Likewise.
14743 (BINOP_UNONE_UNONE_UNONE): Likewise.
14744 * config/arm/constraints.md (Ra): Define constraint to check constant is
14745 in the range of 0 to 7.
14746 (Rg): Define constriant to check the constant is one among 1, 2, 4
14748 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
14749 (mve_vaddq_n_<supf>): Likewise.
14750 (mve_vaddvaq_<supf>): Likewise.
14751 (mve_vaddvq_p_<supf>): Likewise.
14752 (mve_vandq_<supf>): Likewise.
14753 (mve_vbicq_<supf>): Likewise.
14754 (mve_vbrsrq_n_<supf>): Likewise.
14755 (mve_vcaddq_rot270_<supf>): Likewise.
14756 (mve_vcaddq_rot90_<supf>): Likewise.
14757 (mve_vcmpcsq_n_u): Likewise.
14758 (mve_vcmpcsq_u): Likewise.
14759 (mve_vcmpeqq_n_<supf>): Likewise.
14760 (mve_vcmpeqq_<supf>): Likewise.
14761 (mve_vcmpgeq_n_s): Likewise.
14762 (mve_vcmpgeq_s): Likewise.
14763 (mve_vcmpgtq_n_s): Likewise.
14764 (mve_vcmpgtq_s): Likewise.
14765 (mve_vcmphiq_n_u): Likewise.
14766 (mve_vcmphiq_u): Likewise.
14767 (mve_vcmpleq_n_s): Likewise.
14768 (mve_vcmpleq_s): Likewise.
14769 (mve_vcmpltq_n_s): Likewise.
14770 (mve_vcmpltq_s): Likewise.
14771 (mve_vcmpneq_n_<supf>): Likewise.
14772 (mve_vddupq_n_u): Likewise.
14773 (mve_veorq_<supf>): Likewise.
14774 (mve_vhaddq_n_<supf>): Likewise.
14775 (mve_vhaddq_<supf>): Likewise.
14776 (mve_vhcaddq_rot270_s): Likewise.
14777 (mve_vhcaddq_rot90_s): Likewise.
14778 (mve_vhsubq_n_<supf>): Likewise.
14779 (mve_vhsubq_<supf>): Likewise.
14780 (mve_vidupq_n_u): Likewise.
14781 (mve_vmaxaq_s): Likewise.
14782 (mve_vmaxavq_s): Likewise.
14783 (mve_vmaxq_<supf>): Likewise.
14784 (mve_vmaxvq_<supf>): Likewise.
14785 (mve_vminaq_s): Likewise.
14786 (mve_vminavq_s): Likewise.
14787 (mve_vminq_<supf>): Likewise.
14788 (mve_vminvq_<supf>): Likewise.
14789 (mve_vmladavq_<supf>): Likewise.
14790 (mve_vmladavxq_s): Likewise.
14791 (mve_vmlsdavq_s): Likewise.
14792 (mve_vmlsdavxq_s): Likewise.
14793 (mve_vmulhq_<supf>): Likewise.
14794 (mve_vmullbq_int_<supf>): Likewise.
14795 (mve_vmulltq_int_<supf>): Likewise.
14796 (mve_vmulq_n_<supf>): Likewise.
14797 (mve_vmulq_<supf>): Likewise.
14798 (mve_vornq_<supf>): Likewise.
14799 (mve_vorrq_<supf>): Likewise.
14800 (mve_vqaddq_n_<supf>): Likewise.
14801 (mve_vqaddq_<supf>): Likewise.
14802 (mve_vqdmulhq_n_s): Likewise.
14803 (mve_vqdmulhq_s): Likewise.
14804 (mve_vqrdmulhq_n_s): Likewise.
14805 (mve_vqrdmulhq_s): Likewise.
14806 (mve_vqrshlq_n_<supf>): Likewise.
14807 (mve_vqrshlq_<supf>): Likewise.
14808 (mve_vqshlq_n_<supf>): Likewise.
14809 (mve_vqshlq_r_<supf>): Likewise.
14810 (mve_vqshlq_<supf>): Likewise.
14811 (mve_vqshluq_n_s): Likewise.
14812 (mve_vqsubq_n_<supf>): Likewise.
14813 (mve_vqsubq_<supf>): Likewise.
14814 (mve_vrhaddq_<supf>): Likewise.
14815 (mve_vrmulhq_<supf>): Likewise.
14816 (mve_vrshlq_n_<supf>): Likewise.
14817 (mve_vrshlq_<supf>): Likewise.
14818 (mve_vrshrq_n_<supf>): Likewise.
14819 (mve_vshlq_n_<supf>): Likewise.
14820 (mve_vshlq_r_<supf>): Likewise.
14821 (mve_vsubq_n_<supf>): Likewise.
14822 (mve_vsubq_<supf>): Likewise.
14823 * config/arm/predicates.md (mve_imm_7): Define predicate to check
14824 the matching constraint Ra.
14825 (mve_imm_selective_upto_8): Define predicate to check the matching
14828 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14829 Mihail Ionescu <mihail.ionescu@arm.com>
14830 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14832 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
14833 qualifier for binary operands.
14834 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14835 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
14836 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
14837 (vaddlvq_p_u32): Likewise.
14838 (vcmpneq_s8): Likewise.
14839 (vcmpneq_s16): Likewise.
14840 (vcmpneq_s32): Likewise.
14841 (vcmpneq_u8): Likewise.
14842 (vcmpneq_u16): Likewise.
14843 (vcmpneq_u32): Likewise.
14844 (vshlq_s8): Likewise.
14845 (vshlq_s16): Likewise.
14846 (vshlq_s32): Likewise.
14847 (vshlq_u8): Likewise.
14848 (vshlq_u16): Likewise.
14849 (vshlq_u32): Likewise.
14850 (__arm_vaddlvq_p_s32): Define intrinsic.
14851 (__arm_vaddlvq_p_u32): Likewise.
14852 (__arm_vcmpneq_s8): Likewise.
14853 (__arm_vcmpneq_s16): Likewise.
14854 (__arm_vcmpneq_s32): Likewise.
14855 (__arm_vcmpneq_u8): Likewise.
14856 (__arm_vcmpneq_u16): Likewise.
14857 (__arm_vcmpneq_u32): Likewise.
14858 (__arm_vshlq_s8): Likewise.
14859 (__arm_vshlq_s16): Likewise.
14860 (__arm_vshlq_s32): Likewise.
14861 (__arm_vshlq_u8): Likewise.
14862 (__arm_vshlq_u16): Likewise.
14863 (__arm_vshlq_u32): Likewise.
14864 (vaddlvq_p): Define polymorphic variant.
14865 (vcmpneq): Likewise.
14867 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
14869 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14870 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
14871 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
14872 (mve_vcmpneq_<supf><mode>): Likewise.
14873 (mve_vshlq_<supf><mode>): Likewise.
14875 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14876 Mihail Ionescu <mihail.ionescu@arm.com>
14877 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14879 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
14880 qualifier for binary operands.
14881 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14882 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14883 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
14884 (vcvtq_n_s32_f32): Likewise.
14885 (vcvtq_n_u16_f16): Likewise.
14886 (vcvtq_n_u32_f32): Likewise.
14887 (vcreateq_u8): Likewise.
14888 (vcreateq_u16): Likewise.
14889 (vcreateq_u32): Likewise.
14890 (vcreateq_u64): Likewise.
14891 (vcreateq_s8): Likewise.
14892 (vcreateq_s16): Likewise.
14893 (vcreateq_s32): Likewise.
14894 (vcreateq_s64): Likewise.
14895 (vshrq_n_s8): Likewise.
14896 (vshrq_n_s16): Likewise.
14897 (vshrq_n_s32): Likewise.
14898 (vshrq_n_u8): Likewise.
14899 (vshrq_n_u16): Likewise.
14900 (vshrq_n_u32): Likewise.
14901 (__arm_vcreateq_u8): Define intrinsic.
14902 (__arm_vcreateq_u16): Likewise.
14903 (__arm_vcreateq_u32): Likewise.
14904 (__arm_vcreateq_u64): Likewise.
14905 (__arm_vcreateq_s8): Likewise.
14906 (__arm_vcreateq_s16): Likewise.
14907 (__arm_vcreateq_s32): Likewise.
14908 (__arm_vcreateq_s64): Likewise.
14909 (__arm_vshrq_n_s8): Likewise.
14910 (__arm_vshrq_n_s16): Likewise.
14911 (__arm_vshrq_n_s32): Likewise.
14912 (__arm_vshrq_n_u8): Likewise.
14913 (__arm_vshrq_n_u16): Likewise.
14914 (__arm_vshrq_n_u32): Likewise.
14915 (__arm_vcvtq_n_s16_f16): Likewise.
14916 (__arm_vcvtq_n_s32_f32): Likewise.
14917 (__arm_vcvtq_n_u16_f16): Likewise.
14918 (__arm_vcvtq_n_u32_f32): Likewise.
14919 (vshrq_n): Define polymorphic variant.
14920 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
14922 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14923 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14924 * config/arm/constraints.md (Rb): Define constraint to check constant is
14925 in the range of 1 to 8.
14926 (Rf): Define constraint to check constant is in the range of 1 to 32.
14927 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
14928 (mve_vshrq_n_<supf><mode>): Likewise.
14929 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
14930 * config/arm/predicates.md (mve_imm_8): Define predicate to check
14931 the matching constraint Rb.
14932 (mve_imm_32): Define predicate to check the matching constraint Rf.
14934 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14935 Mihail Ionescu <mihail.ionescu@arm.com>
14936 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14938 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
14939 qualifier for binary operands.
14940 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
14941 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14942 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14943 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
14944 (vsubq_n_f32): Likewise.
14945 (vbrsrq_n_f16): Likewise.
14946 (vbrsrq_n_f32): Likewise.
14947 (vcvtq_n_f16_s16): Likewise.
14948 (vcvtq_n_f32_s32): Likewise.
14949 (vcvtq_n_f16_u16): Likewise.
14950 (vcvtq_n_f32_u32): Likewise.
14951 (vcreateq_f16): Likewise.
14952 (vcreateq_f32): Likewise.
14953 (__arm_vsubq_n_f16): Define intrinsic.
14954 (__arm_vsubq_n_f32): Likewise.
14955 (__arm_vbrsrq_n_f16): Likewise.
14956 (__arm_vbrsrq_n_f32): Likewise.
14957 (__arm_vcvtq_n_f16_s16): Likewise.
14958 (__arm_vcvtq_n_f32_s32): Likewise.
14959 (__arm_vcvtq_n_f16_u16): Likewise.
14960 (__arm_vcvtq_n_f32_u32): Likewise.
14961 (__arm_vcreateq_f16): Likewise.
14962 (__arm_vcreateq_f32): Likewise.
14963 (vsubq): Define polymorphic variant.
14964 (vbrsrq): Likewise.
14965 (vcvtq_n): Likewise.
14966 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
14968 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
14969 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14970 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14971 * config/arm/constraints.md (Rd): Define constraint to check constant is
14972 in the range of 1 to 16.
14973 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
14974 mve_vbrsrq_n_f<mode>: Likewise.
14975 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
14976 mve_vcreateq_f<mode>: Likewise.
14977 * config/arm/predicates.md (mve_imm_16): Define predicate to check
14978 the matching constraint Rd.
14980 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14981 Mihail Ionescu <mihail.ionescu@arm.com>
14982 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14984 * config/arm/arm-builtins.c (hi_UP): Define mode.
14985 * config/arm/arm.h (IS_VPR_REGNUM): Move.
14986 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
14987 (APSRQ_REGNUM): Modify.
14988 (APSRGE_REGNUM): Modify.
14989 * config/arm/arm_mve.h (vctp16q): Define macro.
14990 (vctp32q): Likewise.
14991 (vctp64q): Likewise.
14992 (vctp8q): Likewise.
14994 (__arm_vctp16q): Define intrinsic.
14995 (__arm_vctp32q): Likewise.
14996 (__arm_vctp64q): Likewise.
14997 (__arm_vctp8q): Likewise.
14998 (__arm_vpnot): Likewise.
14999 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
15001 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
15002 (mve_vpnothi): Likewise.
15004 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15005 Mihail Ionescu <mihail.ionescu@arm.com>
15006 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15008 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
15009 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
15010 (vdupq_n_s16): Likewise.
15011 (vdupq_n_s32): Likewise.
15012 (vabsq_s8): Likewise.
15013 (vabsq_s16): Likewise.
15014 (vabsq_s32): Likewise.
15015 (vclsq_s8): Likewise.
15016 (vclsq_s16): Likewise.
15017 (vclsq_s32): Likewise.
15018 (vclzq_s8): Likewise.
15019 (vclzq_s16): Likewise.
15020 (vclzq_s32): Likewise.
15021 (vnegq_s8): Likewise.
15022 (vnegq_s16): Likewise.
15023 (vnegq_s32): Likewise.
15024 (vaddlvq_s32): Likewise.
15025 (vaddvq_s8): Likewise.
15026 (vaddvq_s16): Likewise.
15027 (vaddvq_s32): Likewise.
15028 (vmovlbq_s8): Likewise.
15029 (vmovlbq_s16): Likewise.
15030 (vmovltq_s8): Likewise.
15031 (vmovltq_s16): Likewise.
15032 (vmvnq_s8): Likewise.
15033 (vmvnq_s16): Likewise.
15034 (vmvnq_s32): Likewise.
15035 (vrev16q_s8): Likewise.
15036 (vrev32q_s8): Likewise.
15037 (vrev32q_s16): Likewise.
15038 (vqabsq_s8): Likewise.
15039 (vqabsq_s16): Likewise.
15040 (vqabsq_s32): Likewise.
15041 (vqnegq_s8): Likewise.
15042 (vqnegq_s16): Likewise.
15043 (vqnegq_s32): Likewise.
15044 (vcvtaq_s16_f16): Likewise.
15045 (vcvtaq_s32_f32): Likewise.
15046 (vcvtnq_s16_f16): Likewise.
15047 (vcvtnq_s32_f32): Likewise.
15048 (vcvtpq_s16_f16): Likewise.
15049 (vcvtpq_s32_f32): Likewise.
15050 (vcvtmq_s16_f16): Likewise.
15051 (vcvtmq_s32_f32): Likewise.
15052 (vmvnq_u8): Likewise.
15053 (vmvnq_u16): Likewise.
15054 (vmvnq_u32): Likewise.
15055 (vdupq_n_u8): Likewise.
15056 (vdupq_n_u16): Likewise.
15057 (vdupq_n_u32): Likewise.
15058 (vclzq_u8): Likewise.
15059 (vclzq_u16): Likewise.
15060 (vclzq_u32): Likewise.
15061 (vaddvq_u8): Likewise.
15062 (vaddvq_u16): Likewise.
15063 (vaddvq_u32): Likewise.
15064 (vrev32q_u8): Likewise.
15065 (vrev32q_u16): Likewise.
15066 (vmovltq_u8): Likewise.
15067 (vmovltq_u16): Likewise.
15068 (vmovlbq_u8): Likewise.
15069 (vmovlbq_u16): Likewise.
15070 (vrev16q_u8): Likewise.
15071 (vaddlvq_u32): Likewise.
15072 (vcvtpq_u16_f16): Likewise.
15073 (vcvtpq_u32_f32): Likewise.
15074 (vcvtnq_u16_f16): Likewise.
15075 (vcvtmq_u16_f16): Likewise.
15076 (vcvtmq_u32_f32): Likewise.
15077 (vcvtaq_u16_f16): Likewise.
15078 (vcvtaq_u32_f32): Likewise.
15079 (__arm_vdupq_n_s8): Define intrinsic.
15080 (__arm_vdupq_n_s16): Likewise.
15081 (__arm_vdupq_n_s32): Likewise.
15082 (__arm_vabsq_s8): Likewise.
15083 (__arm_vabsq_s16): Likewise.
15084 (__arm_vabsq_s32): Likewise.
15085 (__arm_vclsq_s8): Likewise.
15086 (__arm_vclsq_s16): Likewise.
15087 (__arm_vclsq_s32): Likewise.
15088 (__arm_vclzq_s8): Likewise.
15089 (__arm_vclzq_s16): Likewise.
15090 (__arm_vclzq_s32): Likewise.
15091 (__arm_vnegq_s8): Likewise.
15092 (__arm_vnegq_s16): Likewise.
15093 (__arm_vnegq_s32): Likewise.
15094 (__arm_vaddlvq_s32): Likewise.
15095 (__arm_vaddvq_s8): Likewise.
15096 (__arm_vaddvq_s16): Likewise.
15097 (__arm_vaddvq_s32): Likewise.
15098 (__arm_vmovlbq_s8): Likewise.
15099 (__arm_vmovlbq_s16): Likewise.
15100 (__arm_vmovltq_s8): Likewise.
15101 (__arm_vmovltq_s16): Likewise.
15102 (__arm_vmvnq_s8): Likewise.
15103 (__arm_vmvnq_s16): Likewise.
15104 (__arm_vmvnq_s32): Likewise.
15105 (__arm_vrev16q_s8): Likewise.
15106 (__arm_vrev32q_s8): Likewise.
15107 (__arm_vrev32q_s16): Likewise.
15108 (__arm_vqabsq_s8): Likewise.
15109 (__arm_vqabsq_s16): Likewise.
15110 (__arm_vqabsq_s32): Likewise.
15111 (__arm_vqnegq_s8): Likewise.
15112 (__arm_vqnegq_s16): Likewise.
15113 (__arm_vqnegq_s32): Likewise.
15114 (__arm_vmvnq_u8): Likewise.
15115 (__arm_vmvnq_u16): Likewise.
15116 (__arm_vmvnq_u32): Likewise.
15117 (__arm_vdupq_n_u8): Likewise.
15118 (__arm_vdupq_n_u16): Likewise.
15119 (__arm_vdupq_n_u32): Likewise.
15120 (__arm_vclzq_u8): Likewise.
15121 (__arm_vclzq_u16): Likewise.
15122 (__arm_vclzq_u32): Likewise.
15123 (__arm_vaddvq_u8): Likewise.
15124 (__arm_vaddvq_u16): Likewise.
15125 (__arm_vaddvq_u32): Likewise.
15126 (__arm_vrev32q_u8): Likewise.
15127 (__arm_vrev32q_u16): Likewise.
15128 (__arm_vmovltq_u8): Likewise.
15129 (__arm_vmovltq_u16): Likewise.
15130 (__arm_vmovlbq_u8): Likewise.
15131 (__arm_vmovlbq_u16): Likewise.
15132 (__arm_vrev16q_u8): Likewise.
15133 (__arm_vaddlvq_u32): Likewise.
15134 (__arm_vcvtpq_u16_f16): Likewise.
15135 (__arm_vcvtpq_u32_f32): Likewise.
15136 (__arm_vcvtnq_u16_f16): Likewise.
15137 (__arm_vcvtmq_u16_f16): Likewise.
15138 (__arm_vcvtmq_u32_f32): Likewise.
15139 (__arm_vcvtaq_u16_f16): Likewise.
15140 (__arm_vcvtaq_u32_f32): Likewise.
15141 (__arm_vcvtaq_s16_f16): Likewise.
15142 (__arm_vcvtaq_s32_f32): Likewise.
15143 (__arm_vcvtnq_s16_f16): Likewise.
15144 (__arm_vcvtnq_s32_f32): Likewise.
15145 (__arm_vcvtpq_s16_f16): Likewise.
15146 (__arm_vcvtpq_s32_f32): Likewise.
15147 (__arm_vcvtmq_s16_f16): Likewise.
15148 (__arm_vcvtmq_s32_f32): Likewise.
15149 (vdupq_n): Define polymorphic variant.
15154 (vaddlvq): Likewise.
15155 (vaddvq): Likewise.
15156 (vmovlbq): Likewise.
15157 (vmovltq): Likewise.
15159 (vrev16q): Likewise.
15160 (vrev32q): Likewise.
15161 (vqabsq): Likewise.
15162 (vqnegq): Likewise.
15163 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
15164 (UNOP_SNONE_NONE): Likewise.
15165 (UNOP_UNONE_UNONE): Likewise.
15166 (UNOP_UNONE_NONE): Likewise.
15167 * config/arm/constraints.md (e): Define new constriant to allow only
15169 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
15170 (mve_vnegq_s<mode>): Likewise.
15171 (mve_vmvnq_<supf><mode>): Likewise.
15172 (mve_vdupq_n_<supf><mode>): Likewise.
15173 (mve_vclzq_<supf><mode>): Likewise.
15174 (mve_vclsq_s<mode>): Likewise.
15175 (mve_vaddvq_<supf><mode>): Likewise.
15176 (mve_vabsq_s<mode>): Likewise.
15177 (mve_vrev32q_<supf><mode>): Likewise.
15178 (mve_vmovltq_<supf><mode>): Likewise.
15179 (mve_vmovlbq_<supf><mode>): Likewise.
15180 (mve_vcvtpq_<supf><mode>): Likewise.
15181 (mve_vcvtnq_<supf><mode>): Likewise.
15182 (mve_vcvtmq_<supf><mode>): Likewise.
15183 (mve_vcvtaq_<supf><mode>): Likewise.
15184 (mve_vrev16q_<supf>v16qi): Likewise.
15185 (mve_vaddlvq_<supf>v4si): Likewise.
15187 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15189 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
15191 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
15193 * read-rtl-function.c (find_param_by_name,
15194 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
15196 * spellcheck.c (get_edit_distance_cutoff): Likewise.
15197 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
15198 * tree.def (SWITCH_EXPR): Likewise.
15199 * selftest.c (assert_str_contains): Likewise.
15200 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
15202 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
15203 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
15204 * langhooks.h (struct lang_hooks_for_decls): Likewise.
15205 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
15206 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
15208 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
15209 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
15210 * tree.c (component_ref_size): Likewise.
15211 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
15212 * gimple-ssa-sprintf.c (get_string_length, format_string,
15213 format_directive): Likewise.
15214 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
15215 * input.c (string_concat_db::get_string_concatenation,
15216 test_lexer_string_locations_ucn4): Likewise.
15217 * cfgexpand.c (pass_expand::execute): Likewise.
15218 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
15219 maybe_diag_overlap): Likewise.
15220 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
15221 * shrink-wrap.c (spread_components): Likewise.
15222 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
15224 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
15226 * dwarf2out.c (dwarf2out_early_finish): Likewise.
15227 * gimple-ssa-store-merging.c: Likewise.
15228 * ira-costs.c (record_operand_costs): Likewise.
15229 * tree-vect-loop.c (vectorizable_reduction): Likewise.
15230 * target.def (dispatch): Likewise.
15231 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
15232 in documentation text.
15233 * doc/tm.texi: Regenerated.
15234 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
15235 duplicated word issue in a comment.
15236 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
15237 * config/i386/i386-features.c (remove_partial_avx_dependency):
15239 * config/msp430/msp430.c (msp430_select_section): Likewise.
15240 * config/gcn/gcn-run.c (load_image): Likewise.
15241 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
15242 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
15243 * config/aarch64/falkor-tag-collision-avoidance.c
15244 (single_dest_per_chain): Likewise.
15245 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
15246 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
15247 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
15248 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
15250 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
15251 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
15252 * config/rs6000/rs6000-logue.c
15253 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
15254 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
15255 Fix various other issues in the comment.
15257 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
15259 * config/arm/t-rmprofile: create new multilib for
15260 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
15263 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15265 PR tree-optimization/94015
15266 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
15267 function where EXP is address of the bytes being stored rather than
15268 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
15269 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
15270 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
15271 calling native_encode_expr if host or target doesn't have 8-bit
15272 chars. Formatting fixes.
15273 (count_nonzero_bytes_addr): New function.
15275 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15276 Mihail Ionescu <mihail.ionescu@arm.com>
15277 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15279 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
15280 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
15281 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
15282 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
15283 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
15284 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
15285 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
15286 (vmvnq_n_s32): Likewise.
15287 (vrev64q_s8): Likewise.
15288 (vrev64q_s16): Likewise.
15289 (vrev64q_s32): Likewise.
15290 (vcvtq_s16_f16): Likewise.
15291 (vcvtq_s32_f32): Likewise.
15292 (vrev64q_u8): Likewise.
15293 (vrev64q_u16): Likewise.
15294 (vrev64q_u32): Likewise.
15295 (vmvnq_n_u16): Likewise.
15296 (vmvnq_n_u32): Likewise.
15297 (vcvtq_u16_f16): Likewise.
15298 (vcvtq_u32_f32): Likewise.
15299 (__arm_vmvnq_n_s16): Define intrinsic.
15300 (__arm_vmvnq_n_s32): Likewise.
15301 (__arm_vrev64q_s8): Likewise.
15302 (__arm_vrev64q_s16): Likewise.
15303 (__arm_vrev64q_s32): Likewise.
15304 (__arm_vrev64q_u8): Likewise.
15305 (__arm_vrev64q_u16): Likewise.
15306 (__arm_vrev64q_u32): Likewise.
15307 (__arm_vmvnq_n_u16): Likewise.
15308 (__arm_vmvnq_n_u32): Likewise.
15309 (__arm_vcvtq_s16_f16): Likewise.
15310 (__arm_vcvtq_s32_f32): Likewise.
15311 (__arm_vcvtq_u16_f16): Likewise.
15312 (__arm_vcvtq_u32_f32): Likewise.
15313 (vrev64q): Define polymorphic variant.
15314 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
15315 (UNOP_SNONE_NONE): Likewise.
15316 (UNOP_SNONE_IMM): Likewise.
15317 (UNOP_UNONE_UNONE): Likewise.
15318 (UNOP_UNONE_NONE): Likewise.
15319 (UNOP_UNONE_IMM): Likewise.
15320 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
15321 (mve_vcvtq_from_f_<supf><mode>): Likewise.
15322 (mve_vmvnq_n_<supf><mode>): Likewise.
15324 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15325 Mihail Ionescu <mihail.ionescu@arm.com>
15326 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15328 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
15329 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
15330 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
15331 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
15332 (vrndxq_f32): Likewise.
15333 (vrndq_f16) Likewise.
15334 (vrndq_f32): Likewise.
15335 (vrndpq_f16): Likewise.
15336 (vrndpq_f32): Likewise.
15337 (vrndnq_f16): Likewise.
15338 (vrndnq_f32): Likewise.
15339 (vrndmq_f16): Likewise.
15340 (vrndmq_f32): Likewise.
15341 (vrndaq_f16): Likewise.
15342 (vrndaq_f32): Likewise.
15343 (vrev64q_f16): Likewise.
15344 (vrev64q_f32): Likewise.
15345 (vnegq_f16): Likewise.
15346 (vnegq_f32): Likewise.
15347 (vdupq_n_f16): Likewise.
15348 (vdupq_n_f32): Likewise.
15349 (vabsq_f16): Likewise.
15350 (vabsq_f32): Likewise.
15351 (vrev32q_f16): Likewise.
15352 (vcvttq_f32_f16): Likewise.
15353 (vcvtbq_f32_f16): Likewise.
15354 (vcvtq_f16_s16): Likewise.
15355 (vcvtq_f32_s32): Likewise.
15356 (vcvtq_f16_u16): Likewise.
15357 (vcvtq_f32_u32): Likewise.
15358 (__arm_vrndxq_f16): Define intrinsic.
15359 (__arm_vrndxq_f32): Likewise.
15360 (__arm_vrndq_f16): Likewise.
15361 (__arm_vrndq_f32): Likewise.
15362 (__arm_vrndpq_f16): Likewise.
15363 (__arm_vrndpq_f32): Likewise.
15364 (__arm_vrndnq_f16): Likewise.
15365 (__arm_vrndnq_f32): Likewise.
15366 (__arm_vrndmq_f16): Likewise.
15367 (__arm_vrndmq_f32): Likewise.
15368 (__arm_vrndaq_f16): Likewise.
15369 (__arm_vrndaq_f32): Likewise.
15370 (__arm_vrev64q_f16): Likewise.
15371 (__arm_vrev64q_f32): Likewise.
15372 (__arm_vnegq_f16): Likewise.
15373 (__arm_vnegq_f32): Likewise.
15374 (__arm_vdupq_n_f16): Likewise.
15375 (__arm_vdupq_n_f32): Likewise.
15376 (__arm_vabsq_f16): Likewise.
15377 (__arm_vabsq_f32): Likewise.
15378 (__arm_vrev32q_f16): Likewise.
15379 (__arm_vcvttq_f32_f16): Likewise.
15380 (__arm_vcvtbq_f32_f16): Likewise.
15381 (__arm_vcvtq_f16_s16): Likewise.
15382 (__arm_vcvtq_f32_s32): Likewise.
15383 (__arm_vcvtq_f16_u16): Likewise.
15384 (__arm_vcvtq_f32_u32): Likewise.
15385 (vrndxq): Define polymorphic variants.
15387 (vrndpq): Likewise.
15388 (vrndnq): Likewise.
15389 (vrndmq): Likewise.
15390 (vrndaq): Likewise.
15391 (vrev64q): Likewise.
15394 (vrev32q): Likewise.
15395 (vcvtbq_f32): Likewise.
15396 (vcvttq_f32): Likewise.
15398 * config/arm/arm_mve_builtins.def (VAR2): Define.
15400 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
15401 (mve_vrndq_f<mode>): Likewise.
15402 (mve_vrndpq_f<mode>): Likewise.
15403 (mve_vrndnq_f<mode>): Likewise.
15404 (mve_vrndmq_f<mode>): Likewise.
15405 (mve_vrndaq_f<mode>): Likewise.
15406 (mve_vrev64q_f<mode>): Likewise.
15407 (mve_vnegq_f<mode>): Likewise.
15408 (mve_vdupq_n_f<mode>): Likewise.
15409 (mve_vabsq_f<mode>): Likewise.
15410 (mve_vrev32q_fv8hf): Likewise.
15411 (mve_vcvttq_f32_f16v4sf): Likewise.
15412 (mve_vcvtbq_f32_f16v4sf): Likewise.
15413 (mve_vcvtq_to_f_<supf><mode>): Likewise.
15415 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15416 Mihail Ionescu <mihail.ionescu@arm.com>
15417 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15419 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
15421 (ARM_BUILTIN_MVE_PATTERN_START): Define.
15422 (arm_init_mve_builtins): Define function.
15423 (arm_init_builtins): Add TARGET_HAVE_MVE check.
15424 (arm_expand_builtin_1): Check the range of fcode.
15425 (arm_expand_mve_builtin): Define function to expand MVE builtins.
15426 (arm_expand_builtin): Check the range of fcode.
15427 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
15429 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
15430 (vst4q_s8): Define macro.
15431 (vst4q_s16): Likewise.
15432 (vst4q_s32): Likewise.
15433 (vst4q_u8): Likewise.
15434 (vst4q_u16): Likewise.
15435 (vst4q_u32): Likewise.
15436 (vst4q_f16): Likewise.
15437 (vst4q_f32): Likewise.
15438 (__arm_vst4q_s8): Define inline builtin.
15439 (__arm_vst4q_s16): Likewise.
15440 (__arm_vst4q_s32): Likewise.
15441 (__arm_vst4q_u8): Likewise.
15442 (__arm_vst4q_u16): Likewise.
15443 (__arm_vst4q_u32): Likewise.
15444 (__arm_vst4q_f16): Likewise.
15445 (__arm_vst4q_f32): Likewise.
15446 (__ARM_mve_typeid): Define macro with MVE types.
15447 (__ARM_mve_coerce): Define macro with _Generic feature.
15448 (vst4q): Define polymorphic variant for different vst4q builtins.
15449 * config/arm/arm_mve_builtins.def: New file.
15450 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
15452 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
15453 (unspec): Define unspec.
15454 (mve_vst4q<mode>): Define RTL pattern.
15455 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
15457 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
15459 (define_split): Allow OI mode split for MVE after reload.
15460 (define_split): Allow XI mode split for MVE after reload.
15461 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
15462 (arm-builtins.o): Likewise.
15464 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
15466 * c-typeck.c (process_init_element): Handle constructor_type with
15467 type size represented by POLY_INT_CST.
15469 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15471 PR tree-optimization/94187
15472 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
15473 nchars - offset < nbytes.
15475 PR middle-end/94189
15476 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
15477 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
15478 for code-generation.
15480 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
15483 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
15484 after changing memory subreg.
15486 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15487 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15489 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
15490 emulator calls for dobule precision arithmetic operations for MVE.
15492 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15493 Mihail Ionescu <mihail.ionescu@arm.com>
15494 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15496 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
15497 feature bit is on and -mfpu=auto is passed as compiler option, do not
15498 generate error on not finding any matching fpu. Because in this case
15499 fpu is not required.
15500 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
15501 enabled for MVE and also for all VFP extensions.
15502 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
15504 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
15505 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
15506 along with feature bits mve_float.
15507 (mve): Modify add options in armv8.1-m.main arch for MVE.
15508 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
15510 * config/arm/arm.c (use_return_insn): Replace the
15511 check with TARGET_VFP_BASE.
15512 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
15514 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
15515 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
15517 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
15518 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
15520 (arm_compute_frame_layout): Likewise.
15521 (arm_save_coproc_regs): Likewise.
15522 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
15524 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
15525 with equivalent macro TARGET_VFP_BASE.
15526 (arm_expand_epilogue_apcs_frame): Likewise.
15527 (arm_expand_epilogue): Likewise.
15528 (arm_conditional_register_usage): Likewise.
15529 (arm_declare_function_name): Add check to skip printing .fpu directive
15530 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
15532 * config/arm/arm.h (TARGET_VFP_BASE): Define.
15533 * config/arm/arm.md (arch): Add "mve" to arch.
15534 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
15535 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
15536 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
15537 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
15539 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
15540 to not allow for MVE.
15541 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
15543 (VUNSPEC_GET_FPSCR): Define.
15544 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
15545 instructions which move to general-purpose Register from Floating-point
15546 Special register and vice-versa.
15547 (thumb2_movhi_fp16): Likewise.
15548 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
15549 with MCR and MRC instructions which set and get Floating-point Status
15550 and Control Register (FPSCR).
15551 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
15553 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
15554 float move patterns in MVE.
15555 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
15556 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
15557 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
15558 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
15559 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
15560 TARGET_VFP_BASE check.
15561 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
15562 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
15564 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
15565 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
15569 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15570 Mihail Ionescu <mihail.ionescu@arm.com>
15571 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15573 * config.gcc (arm_mve.h): Include mve intrinsics header file.
15574 * config/arm/aout.h (p0): Add new register name for MVE predicated
15576 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
15577 common to Neon and MVE.
15578 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
15579 (arm_init_simd_builtin_types): Disable poly types for MVE.
15580 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
15581 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
15582 ARM_BUILTIN_NEON_LANE_CHECK.
15583 (mve_dereference_pointer): Add function.
15584 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
15586 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
15587 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
15588 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
15589 with floating point enabled.
15590 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
15591 simd_immediate_valid_for_move.
15592 (simd_immediate_valid_for_move): Renamed from
15593 neon_immediate_valid_for_move function.
15594 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
15595 error if vfpv2 feature bit is disabled and mve feature bit is also
15596 disabled for HARD_FLOAT_ABI.
15597 (use_return_insn): Check to not push VFP regs for MVE.
15598 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
15600 (aapcs_vfp_allocate_return_reg): Likewise.
15601 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
15602 address operand for MVE.
15603 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
15604 (neon_valid_immediate): Rename to simd_valid_immediate.
15605 (simd_valid_immediate): Rename from neon_valid_immediate.
15606 (simd_valid_immediate): MVE check on size of vector is 128 bits.
15607 (neon_immediate_valid_for_move): Rename to
15608 simd_immediate_valid_for_move.
15609 (simd_immediate_valid_for_move): Rename from
15610 neon_immediate_valid_for_move.
15611 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
15613 (neon_make_constant): Modify call to neon_valid_immediate function.
15614 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
15616 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
15617 (arm_compute_frame_layout): Calculate space for saved VFP registers for
15619 (arm_save_coproc_regs): Save coproc registers for MVE.
15620 (arm_print_operand): Add case 'E' to print memory operands for MVE.
15621 (arm_print_operand_address): Check to print register number for MVE.
15622 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
15623 (arm_modes_tieable_p): Check to allow structure mode for MVE.
15624 (arm_regno_class): Add VPR_REGNUM check.
15625 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
15627 (arm_expand_epilogue): MVE check for enabling pop instructions in
15629 (arm_print_asm_arch_directives): Modify function to disable print of
15630 .arch_extension "mve" and "fp" for cases where MVE is enabled with
15632 (arm_vector_mode_supported_p): Check for modes available in MVE interger
15633 and MVE floating point.
15634 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
15636 (arm_conditional_register_usage): Enable usage of conditional regsiter
15638 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
15639 (arm_declare_function_name): Modify function to disable print of
15640 .arch_extension "mve" and "fp" for cases where MVE is enabled with
15642 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
15643 when target general registers are required.
15644 (TARGET_HAVE_MVE_FLOAT): Likewise.
15645 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
15647 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
15648 which indicate this is not available for across function calls.
15649 (FIRST_PSEUDO_REGISTER): Modify.
15650 (VALID_MVE_MODE): Define valid MVE mode.
15651 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
15652 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
15653 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
15654 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
15656 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
15657 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
15658 (enum reg_class): Add VPR_REG entry.
15659 (REG_CLASS_NAMES): Add VPR_REG entry.
15660 * config/arm/arm.md (VPR_REGNUM): Define.
15661 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
15662 "unconditional" instructions.
15663 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
15664 (movdf_soft_insn): Modify RTL to not allow for MVE.
15665 (vfp_pop_multiple_with_writeback): Enable for MVE.
15666 (include "mve.md"): Include mve.md file.
15667 * config/arm/arm_mve.h: Add MVE intrinsics head file.
15668 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
15669 for vector predicated operands.
15670 * config/arm/iterators.md (VNIM1): Define.
15671 (VNINOTM1): Define.
15672 (VHFBF_split): Define
15673 * config/arm/mve.md: New file.
15674 (mve_mov<mode>): Define RTL for move, store and load in MVE.
15675 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
15677 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
15678 simd_immediate_valid_for_move.
15679 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
15680 is common to MVE and NEON to vec-common.md file.
15681 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
15682 * config/arm/predicates.md (vpr_register_operand): Define.
15683 * config/arm/t-arm: Add mve.md file.
15684 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
15686 (mve_store): Add MVE instructions mve_store to attribute "type".
15687 (mve_load): Add MVE instructions mve_load to attribute "type".
15688 (is_mve_type): Define attribute.
15689 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
15690 standard move patterns in MVE along with NEON and IWMMXT with mode
15692 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
15693 and IWMMXT with mode iterator V8HF.
15694 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
15696 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
15697 simd_immediate_valid_for_move.
15700 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
15703 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
15704 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
15706 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
15708 2020-03-16 Jakub Jelinek <jakub@redhat.com>
15711 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
15714 PR tree-optimization/94166
15715 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
15716 as secondary comparison key.
15718 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
15720 PR tree-optimization/94125
15721 * tree-loop-distribution.c
15722 (loop_distribution::break_alias_scc_partitions): Update post order
15723 number for merged scc.
15725 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
15728 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
15730 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
15731 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
15732 and ext_sse_reg_operand check.
15734 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
15736 * common.opt: Avoid redundancy in the help text.
15737 * config/arc/arc.opt: Likewise.
15738 * config/cr16/cr16.opt: Likewise.
15740 2020-03-14 Jakub Jelinek <jakub@redhat.com>
15742 PR middle-end/93566
15743 * tree-nested.c (convert_nonlocal_omp_clauses,
15744 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
15745 with C/C++ array sections.
15747 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
15750 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
15751 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
15754 2020-03-14 Jakub Jelinek <jakub@redhat.com>
15756 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
15757 "a an" to "an" in a comment.
15758 * hsa-common.h (is_a_helper): Likewise.
15759 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
15760 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
15761 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
15763 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
15766 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
15767 64-bit value by 64 bits (UB).
15769 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
15771 PR rtl-optimization/92303
15772 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
15774 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
15776 PR rtl-optimization/94148
15777 PR rtl-optimization/94042
15778 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
15779 (df_worklist_propagate_forward): New parameter last_change_age, use
15780 that instead of bb->aux.
15781 (df_worklist_propagate_backward): Ditto.
15782 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
15784 2020-03-13 Richard Biener <rguenther@suse.de>
15786 PR tree-optimization/94163
15787 * tree-ssa-pre.c (create_expression_by_pieces): Check
15788 whether alignment would be zero.
15790 2020-03-13 Martin Liska <mliska@suse.cz>
15793 * lto-wrapper.c (run_gcc): Use concat for appending
15794 to collect_gcc_options.
15796 2020-03-13 Jakub Jelinek <jakub@redhat.com>
15799 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
15800 instead of GEN_INT.
15802 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
15805 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
15806 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
15807 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
15808 TARGET_AVX512VL and ext_sse_reg_operand check.
15810 2020-03-13 Bu Le <bule1@huawei.com>
15813 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
15814 (-param=aarch64-double-recp-precision=): New options.
15815 * doc/invoke.texi: Document them.
15816 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
15817 instead of hard-coding the choice of 1 for float and 2 for double.
15819 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
15821 PR rtl-optimization/94119
15822 * resource.h (clear_hashed_info_until_next_barrier): Declare.
15823 * resource.c (clear_hashed_info_until_next_barrier): New function.
15824 * reorg.c (add_to_delay_list): Fix formatting.
15825 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
15826 the next instruction after removing a BARRIER.
15828 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
15830 PR middle-end/92071
15831 * expmed.c (store_integral_bit_field): For fields larger than a word,
15832 call extract_bit_field on the value if the mode is BLKmode. Remove
15833 specific path for big-endian targets and tidy things up a little bit.
15835 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
15837 PR rtl-optimization/90275
15838 * cse.c (cse_insn): Delete no-op register moves too.
15840 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
15842 * config/rx/rx.md (CTRLREG_CPEN): Remove.
15843 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
15845 2020-03-12 Richard Biener <rguenther@suse.de>
15847 PR tree-optimization/94103
15848 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
15849 punning when the mode precision is not sufficient.
15851 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
15854 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
15855 MODE_V1DF and MODE_V2SF.
15856 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
15857 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
15860 2020-03-12 Jakub Jelinek <jakub@redhat.com>
15862 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
15863 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
15864 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
15865 * doc/tm.texi: Regenerated.
15867 PR tree-optimization/94130
15868 * tree-ssa-dse.c: Include gimplify.h.
15869 (increment_start_addr): If stmt has lhs, drop the lhs from call and
15870 set it after the call to the original value of the first argument.
15872 (decrement_count): Formatting fix.
15874 2020-03-11 Delia Burduv <delia.burduv@arm.com>
15876 * config/arm/arm-builtins.c
15877 (arm_init_simd_builtin_scalar_types): New.
15878 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
15879 (vld2q_bf16): Used new builtin type.
15880 (vld3_bf16): Used new builtin type.
15881 (vld3q_bf16): Used new builtin type.
15882 (vld4_bf16): Used new builtin type.
15883 (vld4q_bf16): Used new builtin type.
15884 (vld2_dup_bf16): Used new builtin type.
15885 (vld2q_dup_bf16): Used new builtin type.
15886 (vld3_dup_bf16): Used new builtin type.
15887 (vld3q_dup_bf16): Used new builtin type.
15888 (vld4_dup_bf16): Used new builtin type.
15889 (vld4q_dup_bf16): Used new builtin type.
15891 2020-03-11 Jakub Jelinek <jakub@redhat.com>
15894 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
15895 at the start to switch to data section. Don't print extra newline if
15896 .globl directive has not been emitted.
15898 2020-03-11 Richard Biener <rguenther@suse.de>
15900 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
15903 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
15905 PR middle-end/93961
15906 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
15907 whose type is a qualified union.
15909 2020-03-11 Jakub Jelinek <jakub@redhat.com>
15912 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
15913 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
15916 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
15918 (get_nth_most_common_value): Use abs_hwi instead of abs.
15920 PR middle-end/94111
15921 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
15922 is rvc_normal, otherwise use real_to_decimal to print the number to
15925 PR tree-optimization/94114
15926 * tree-loop-distribution.c (generate_memset_builtin): Call
15927 rewrite_to_non_trapping_overflow even on mem.
15928 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
15931 2020-03-10 Jeff Law <law@redhat.com>
15933 * config/bfin/bfin.md (movsi_insv): Add length attribute.
15935 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
15938 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
15939 NAN and SIGNED_ZEROR for smax/smin.
15941 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
15944 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
15945 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
15947 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
15949 * loop-iv.c (find_simple_exit): Make it static.
15950 * cfgloop.h: Remove the corresponding prototype.
15952 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
15954 * ddg.c (create_ddg): Fix intendation.
15955 (set_recurrence_length): Likewise.
15956 (create_ddg_all_sccs): Likewise.
15958 2020-03-10 Jakub Jelinek <jakub@redhat.com>
15961 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
15962 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
15965 2020-03-09 Jason Merrill <jason@redhat.com>
15967 * gdbinit.in (pgs): Fix typo in documentation.
15969 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
15973 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
15975 PR rtl-optimization/93564
15976 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
15977 do not honor reg alloc order.
15979 2020-03-09 Andrew Pinski <apinski@marvell.com>
15981 PR inline-asm/94095
15982 * doc/extend.texi (x86 Operand Modifiers): Fix column
15985 2020-03-09 Martin Liska <mliska@suse.cz>
15988 * config/rs6000/rs6000.c (rs6000_option_override_internal):
15989 Remove set of str_align_loops and str_align_jumps as these
15990 should be set in previous 2 conditions in the function.
15992 2020-03-09 Jakub Jelinek <jakub@redhat.com>
15994 PR rtl-optimization/94045
15995 * params.opt (-param=max-find-base-term-values=): New option.
15996 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
15997 in a single toplevel find_base_term call.
15999 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
16002 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
16003 * config/aarch64/aarch64-simd.md
16004 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
16005 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
16006 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
16007 * config/aarch64/arm_neon.h:
16008 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
16009 (vmlal_lane_u16): Likewise.
16010 (vmlal_lane_s32): Likewise.
16011 (vmlal_lane_u32): Likewise.
16012 (vmlal_laneq_s16): Likewise.
16013 (vmlal_laneq_u16): Likewise.
16014 (vmlal_laneq_s32): Likewise.
16015 (vmlal_laneq_u32): Likewise.
16016 (vmull_lane_s16): Likewise.
16017 (vmull_lane_u16): Likewise.
16018 (vmull_lane_s32): Likewise.
16019 (vmull_lane_u32): Likewise.
16020 (vmull_laneq_s16): Likewise.
16021 (vmull_laneq_u16): Likewise.
16022 (vmull_laneq_s32): Likewise.
16023 (vmull_laneq_u32): Likewise.
16024 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
16027 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
16029 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
16030 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
16031 (aarch64_mls_elt<mode>): Likewise.
16032 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
16033 (aarch64_fma4_elt<mode>): Likewise.
16034 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
16035 (aarch64_fma4_elt_to_64v2df): Likewise.
16036 (aarch64_fnma4_elt<mode>): Likewise.
16037 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
16038 (aarch64_fnma4_elt_to_64v2df): Likewise.
16040 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16042 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
16043 Specify movprfx attribute.
16044 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
16046 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
16049 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
16051 (TARGET_NO_FP_IN_TOC): Same.
16052 * config/rs6000/aix71.h: Same.
16053 * config/rs6000/aix72.h: Same.
16055 2020-03-06 Andrew Pinski <apinski@marvell.com>
16056 Jeff Law <law@redhat.com>
16058 PR rtl-optimization/93996
16059 * haifa-sched.c (remove_notes): Be more careful when adding
16062 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16064 * config/arm/arm_neon.h (vld2_bf16): New.
16070 (vld2_dup_bf16): New.
16071 (vld2q_dup_bf16): New.
16072 (vld3_dup_bf16): New.
16073 (vld3q_dup_bf16): New.
16074 (vld4_dup_bf16): New.
16075 (vld4q_dup_bf16): New.
16076 * config/arm/arm_neon_builtins.def
16077 (vld2): Changed to VAR13 and added v4bf, v8bf
16078 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
16079 (vld3): Changed to VAR13 and added v4bf, v8bf
16080 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
16081 (vld4): Changed to VAR13 and added v4bf, v8bf
16082 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
16083 * config/arm/iterators.md (VDXBF2): New iterator.
16084 *config/arm/neon.md (neon_vld2): Use new iterators.
16085 (neon_vld2_dup<mode): Use new iterators.
16086 (neon_vld3<mode>): Likewise.
16087 (neon_vld3qa<mode>): Likewise.
16088 (neon_vld3qb<mode>): Likewise.
16089 (neon_vld3_dup<mode>): Likewise.
16090 (neon_vld4<mode>): Likewise.
16091 (neon_vld4qa<mode>): Likewise.
16092 (neon_vld4qb<mode>): Likewise.
16093 (neon_vld4_dup<mode>): Likewise.
16094 (neon_vld2_dupv8bf): New.
16095 (neon_vld3_dupv8bf): Likewise.
16096 (neon_vld4_dupv8bf): Likewise.
16098 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16100 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
16101 (bfloat16x8x2_t): New typedef.
16102 (bfloat16x4x3_t): New typedef.
16103 (bfloat16x8x3_t): New typedef.
16104 (bfloat16x4x4_t): New typedef.
16105 (bfloat16x8x4_t): New typedef.
16112 * config/arm/arm-builtins.c (v2bf_UP): Define.
16114 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
16115 * config/arm/arm-modes.def (V2BF): New mode.
16116 * config/arm/arm-simd-builtin-types.def
16117 (Bfloat16x2_t): New entry.
16118 * config/arm/arm_neon_builtins.def
16119 (vst2): Changed to VAR13 and added v4bf, v8bf
16120 (vst3): Changed to VAR13 and added v4bf, v8bf
16121 (vst4): Changed to VAR13 and added v4bf, v8bf
16122 * config/arm/iterators.md (VDXBF): New iterator.
16123 (VQ2BF): New iterator.
16124 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
16125 (neon_vst2<mode>): Used new iterators.
16126 (neon_vst3<mode>): Used new iterators.
16127 (neon_vst3<mode>): Used new iterators.
16128 (neon_vst3qa<mode>): Used new iterators.
16129 (neon_vst3qb<mode>): Used new iterators.
16130 (neon_vst4<mode>): Used new iterators.
16131 (neon_vst4<mode>): Used new iterators.
16132 (neon_vst4qa<mode>): Used new iterators.
16133 (neon_vst4qb<mode>): Used new iterators.
16135 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16137 * config/aarch64/aarch64-simd-builtins.def
16138 (bfcvtn): New built-in function.
16139 (bfcvtn_q): New built-in function.
16140 (bfcvtn2): New built-in function.
16141 (bfcvt): New built-in function.
16142 * config/aarch64/aarch64-simd.md
16143 (aarch64_bfcvtn<q><mode>): New pattern.
16144 (aarch64_bfcvtn2v8bf): New pattern.
16145 (aarch64_bfcvtbf): New pattern.
16146 * config/aarch64/arm_bf16.h (float32_t): New typedef.
16147 (vcvth_bf16_f32): New intrinsic.
16148 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
16149 (vcvtq_low_bf16_f32): New intrinsic.
16150 (vcvtq_high_bf16_f32): New intrinsic.
16151 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
16152 (UNSPEC_BFCVTN): New UNSPEC.
16153 (UNSPEC_BFCVTN2): New UNSPEC.
16154 (UNSPEC_BFCVT): New UNSPEC.
16155 * config/arm/types.md (bf_cvt): New type.
16157 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
16159 * config/s390/s390.md ("tabort"): Get rid of two consecutive
16160 blanks in format string.
16162 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
16166 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
16167 * config/i386/i386.c (ix86_get_ssemov): New function.
16168 (ix86_output_ssemov): Likewise.
16169 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
16170 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
16172 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
16173 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
16174 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
16175 (*movti_internal): Likewise.
16176 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
16178 2020-03-05 Jeff Law <law@redhat.com>
16180 PR tree-optimization/91890
16181 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
16182 Use gimple_or_expr_nonartificial_location.
16183 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
16184 Use gimple_or_expr_nonartificial_location.
16185 * gimple.c (gimple_or_expr_nonartificial_location): New function.
16186 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
16187 * tree-ssa-strlen.c (maybe_warn_overflow): Use
16188 gimple_or_expr_nonartificial_location.
16189 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
16190 (maybe_warn_pointless_strcmp): Likewise.
16192 2020-03-05 Jakub Jelinek <jakub@redhat.com>
16195 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
16196 SRC and MASK arguments to __m128 from __m128d.
16197 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
16199 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
16201 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
16202 argument to __m128i from __m128d.
16203 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
16205 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
16206 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
16209 2020-03-05 Delia Burduv <delia.burduv@arm.com>
16211 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
16212 (vbfmlalbq_f32): New.
16213 (vbfmlaltq_f32): New.
16214 (vbfmlalbq_lane_f32): New.
16215 (vbfmlaltq_lane_f32): New.
16216 (vbfmlalbq_laneq_f32): New.
16217 (vbfmlaltq_laneq_f32): New.
16218 * config/arm/arm_neon_builtins.def (vmmla): New.
16223 (vfmab_laneq): New.
16224 (vfmat_laneq): New.
16225 * config/arm/iterators.md (BF_MA): New int iterator.
16226 (bt): New int attribute.
16227 (VQXBF): Copy of VQX with V8BF.
16228 * config/arm/neon.md (neon_vmmlav8bf): New insn.
16229 (neon_vfma<bt>v8bf): New insn.
16230 (neon_vfma<bt>_lanev8bf): New insn.
16231 (neon_vfma<bt>_laneqv8bf): New expand.
16232 (neon_vget_high<mode>): Changed iterator to VQXBF.
16233 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
16234 (UNSPEC_BFMAB): New UNSPEC.
16235 (UNSPEC_BFMAT): New UNSPEC.
16237 2020-03-05 Jakub Jelinek <jakub@redhat.com>
16239 PR middle-end/93399
16240 * tree-pretty-print.h (pretty_print_string): Declare.
16241 * tree-pretty-print.c (pretty_print_string): Remove forward
16242 declaration, no longer static. Change nbytes parameter type
16243 from unsigned to size_t.
16244 * print-rtl.c (print_value) <case CONST_STRING>: Use
16245 pretty_print_string and for shrink way too long strings.
16247 2020-03-05 Richard Biener <rguenther@suse.de>
16248 Jakub Jelinek <jakub@redhat.com>
16250 PR tree-optimization/93582
16251 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
16252 last operand as signed when looking for memset offset. Formatting
16255 2020-03-04 Andrew Pinski <apinski@marvell.com>
16258 * value-prof.c (dump_histogram_value): Use std::abs.
16260 2020-03-04 Martin Sebor <msebor@redhat.com>
16262 PR tree-optimization/93986
16263 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
16264 operands to the same precision widest_int to avoid ICEs.
16266 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
16269 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
16270 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
16271 for OPTION_MASK_ALTIVEC.
16273 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
16275 * config.gcc: Include the glibc-stdint.h header for zTPF.
16277 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
16279 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
16280 direct FPR-GPR copies.
16281 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
16284 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
16286 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
16287 operands to the prologue_tpf expander.
16288 (s390_emit_epilogue): Likewise.
16289 (s390_option_override_internal): Do error checking and setup for
16291 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
16292 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
16293 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
16294 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
16295 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
16296 operands for the check flag and the branch target.
16297 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
16298 ("mtpf-trace-hook-prologue-target")
16299 ("mtpf-trace-hook-epilogue-check")
16300 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
16302 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
16303 options are for debugging purposes and will not be documented
16306 2020-03-04 Jakub Jelinek <jakub@redhat.com>
16309 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
16311 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
16312 argument. Change pd argument so that it can be modified. Turn
16313 constant non-CONSTRUCTOR store into non-constant if it is too large.
16314 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
16316 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
16319 2020-02-04 Richard Biener <rguenther@suse.de>
16321 PR tree-optimization/93964
16322 * graphite-isl-ast-to-gimple.c
16323 (gcc_expression_from_isl_ast_expr_id): Add intermediate
16324 conversion for pointer to integer converts.
16325 * graphite-scop-detection.c (assign_parameter_index_in_region):
16328 2020-03-04 Martin Liska <mliska@suse.cz>
16332 * doc/invoke.texi: Clarify --help=language and --help=common
16335 2020-03-04 Jakub Jelinek <jakub@redhat.com>
16337 PR tree-optimization/94001
16338 * tree-tailcall.c (process_assignment): Before comparing op1 to
16339 *ass_var, verify *ass_var is non-NULL.
16341 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
16344 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
16347 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
16349 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
16350 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
16351 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
16352 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
16353 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
16354 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
16355 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
16356 (V_bf_low, V_bf_cvt_m): New mode attributes.
16357 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
16358 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
16359 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
16360 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
16361 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
16363 2020-03-03 Jakub Jelinek <jakub@redhat.com>
16365 PR tree-optimization/93582
16366 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
16367 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
16368 members, initialize them in the constructor and if mask is non-NULL,
16369 artificially push_partial_def {} for the portions of the mask that
16371 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
16372 val and return (void *)-1. Formatting fix.
16373 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
16375 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
16376 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
16378 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
16380 (visit_stmt): Formatting fix.
16382 2020-03-03 Richard Biener <rguenther@suse.de>
16384 PR tree-optimization/93946
16385 * alias.h (refs_same_for_tbaa_p): Declare.
16386 * alias.c (refs_same_for_tbaa_p): New function.
16387 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
16389 * tree-ssa-scopedtables.h
16390 (avail_exprs_stack::lookup_avail_expr): Add output argument
16391 giving access to the hashtable entry.
16392 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
16394 * tree-ssa-dom.c: Include alias.h.
16395 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
16396 removing redundant store.
16397 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
16398 (ao_ref_init_from_vn_reference): Adjust prototype.
16399 (vn_reference_lookup_pieces): Likewise.
16400 (vn_reference_insert_pieces): Likewise.
16401 * tree-ssa-sccvn.c: Track base alias set in addition to alias
16403 (eliminate_dom_walker::eliminate_stmt): Also check base alias
16404 set when removing redundant stores.
16405 (visit_reference_op_store): Likewise.
16406 * dse.c (record_store): Adjust valdity check for redundant
16409 2020-03-03 Jakub Jelinek <jakub@redhat.com>
16412 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
16414 PR rtl-optimization/94002
16415 * explow.c (plus_constant): Punt if cst has VOIDmode and
16416 get_pool_mode is different from mode.
16418 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16420 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
16421 address has an offset which fits the scalling constraint for a
16422 load/store operation.
16423 (legitimate_scaled_address_p): Update use
16424 leigitimate_small_data_address_p.
16425 (arc_print_operand): Likewise.
16426 (arc_legitimate_address_p): Likewise.
16427 (legitimate_small_data_address_p): Likewise.
16429 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16431 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
16432 (fnmasf4_fpu): Likewise.
16434 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16436 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
16438 (subdi3): Likewise.
16439 (adddi3_i): Remove pattern.
16440 (subdi3_i): Likewise.
16442 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16444 * config/arc/arc.md (eh_return): Add length info.
16446 2020-03-02 David Malcolm <dmalcolm@redhat.com>
16448 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
16450 2020-03-02 David Malcolm <dmalcolm@redhat.com>
16452 * doc/invoke.texi (Static Analyzer Options): Add
16453 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
16456 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
16459 * config/i386/i386.md (movstrict<mode>): Allow only
16460 registers with VALID_INT_MODE_P modes.
16462 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
16464 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
16465 (reduc_insn): Use 'U' and 'B' operand codes.
16466 (reduc_<reduc_op>_scal_<mode>): Allow all types.
16467 (reduc_<reduc_op>_scal_v64di): Delete.
16468 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
16469 (*plus_carry_dpp_shr_v64si): Change to ...
16470 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
16471 (mov_from_lane63_v64di): Change to ...
16472 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
16473 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
16474 Support UNSPEC_MOV_DPP_SHR output formats.
16475 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
16476 Add "use_extends" reductions.
16477 (print_operand_address): Add 'I' and 'U' codes.
16478 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
16480 2020-03-02 Martin Liska <mliska@suse.cz>
16482 * lto-wrapper.c: Fix typo in comment about
16483 C++ standard version.
16485 2020-03-01 Martin Sebor <msebor@redhat.com>
16488 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
16490 2020-03-01 Martin Sebor <msebor@redhat.com>
16492 PR middle-end/93829
16493 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
16494 of a pointer in the outermost ADDR_EXPRs.
16496 2020-02-28 Jeff Law <law@redhat.com>
16498 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
16499 * config/v850/v850.c (v850_asm_trampoline_template): Update
16502 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
16505 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
16508 2020-02-28 Martin Liska <mliska@suse.cz>
16511 * configure.ac: Improve detection of ld_date by requiring
16512 either two dashes or none.
16513 * configure: Regenerate.
16515 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
16517 PR rtl-optimization/93564
16518 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
16519 do not honor reg alloc order.
16521 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
16524 * config/aarch64/aarch64.c (aarch64_override_options): Fix
16525 misleading warning string.
16527 2020-02-27 Martin Sebor <msebor@redhat.com>
16529 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
16531 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
16534 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
16535 Split the insn into two parts. This insn only does variable
16536 extract from a register.
16537 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
16538 variable extract from memory.
16539 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
16540 only does variable extract from a register.
16541 (vsx_extract_v4sf_var_load): New insn, do variable extract from
16543 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
16544 into two parts. This insn only does variable extract from a
16546 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
16547 do variable extract from memory.
16549 2020-02-27 Martin Jambor <mjambor@suse.cz>
16550 Feng Xue <fxue@os.amperecomputing.com>
16553 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
16554 new function calls_same_node_or_its_all_contexts_clone_p.
16555 (cgraph_edge_brings_value_p): Use it.
16556 (cgraph_edge_brings_value_p): Likewise.
16557 (self_recursive_pass_through_p): Return false if caller is a clone.
16558 (self_recursive_agg_pass_through_p): Likewise.
16560 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
16562 PR middle-end/92152
16563 * alias.c (ends_tbaa_access_path_p): Break out from ...
16564 (component_uses_parent_alias_set_from): ... here.
16565 * alias.h (ends_tbaa_access_path_p): Declare.
16566 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
16567 handle trailing arrays past end of tbaa access path.
16568 (aliasing_component_refs_p): ... here; likewise.
16569 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
16570 path; disambiguate also past end of it.
16571 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
16574 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
16576 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
16577 beginning of the file.
16578 (vcreate_bf16, vcombine_bf16): New.
16579 (vdup_n_bf16, vdupq_n_bf16): New.
16580 (vdup_lane_bf16, vdup_laneq_bf16): New.
16581 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
16582 (vduph_lane_bf16, vduph_laneq_bf16): New.
16583 (vset_lane_bf16, vsetq_lane_bf16): New.
16584 (vget_lane_bf16, vgetq_lane_bf16): New.
16585 (vget_high_bf16, vget_low_bf16): New.
16586 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
16587 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
16588 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
16589 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
16590 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
16591 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
16592 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
16593 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
16594 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
16595 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
16596 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
16597 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
16598 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
16599 (vreinterpretq_bf16_p128): New.
16600 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
16601 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
16602 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
16603 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
16604 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
16605 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
16606 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
16607 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
16608 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
16609 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
16610 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
16611 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
16612 (vreinterpretq_p128_bf16): New.
16613 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
16614 (V_elem): Likewise.
16615 (V_elem_l): Likewise.
16616 (VD_LANE): Likewise.
16618 (V_DOUBLE): Likewise.
16619 (VDQX): Add V4BF and V8BF.
16620 (V_two_elem, V_three_elem, V_four_elem): Likewise.
16622 (V_HALF): Likewise.
16623 (V_double_vector_mode): Likewise.
16624 (V_cmp_result): Likewise.
16625 (V_uf_sclr): Likewise.
16626 (V_sz_elem): Likewise.
16627 (Is_d_reg): Likewise.
16628 (V_mode_nunits): Likewise.
16629 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
16631 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
16633 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
16634 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
16635 (<expander><mode>3<exec>): Likewise.
16636 (<expander><mode>3): New.
16637 (v<expander><mode>3): New.
16638 (<expander><mode>3): New.
16639 (<expander><mode>3<exec>): Rename to ...
16640 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
16641 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
16643 2020-02-27 Alexandre Oliva <oliva@adacore.com>
16645 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
16648 2020-02-27 Richard Biener <rguenther@suse.de>
16650 PR tree-optimization/93508
16651 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
16652 non-_CHK variants. Valueize their length arguments.
16654 2020-02-27 Richard Biener <rguenther@suse.de>
16656 PR tree-optimization/93953
16657 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
16658 to the hash-map entry.
16660 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
16662 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
16664 2020-02-27 Mark Williams <mwilliams@fb.com>
16666 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
16667 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
16668 -ffile-prefix-map and -fmacro-prefix-map.
16669 * lto-streamer-out.c: Include file-prefix-map.h.
16670 (lto_output_location): Remap the file part of locations.
16672 2020-02-27 Jakub Jelinek <jakub@redhat.com>
16675 * gimplify.c (gimplify_init_constructor): Don't promote readonly
16676 DECL_REGISTER variables to TREE_STATIC.
16678 PR tree-optimization/93582
16679 PR tree-optimization/93945
16680 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
16681 non-zero INTEGER_CST second argument and ref->offset or ref->size
16682 not a multiple of BITS_PER_UNIT.
16684 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
16686 * doc/install.texi (Binaries): Update description of BullFreeware.
16688 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
16692 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
16693 C++ Language Options, Warning Options, and Static Analyzer
16694 Options lists. Document negative form of options enabled by
16695 default. Move some things around to more accurately sort
16696 warnings by category.
16697 (C++ Dialect Options, Warning Options, Static Analyzer
16698 Options): Document negative form of options when enabled by
16699 default. Move some things around to more accurately sort
16700 warnings by category. Add some missing index entries.
16701 Light copy-editing.
16703 2020-02-26 Carl Love <cel@us.ibm.com>
16706 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
16707 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
16708 for the vector unsigned short arguments. It is also listed as the
16709 name of the built-in for arguments vector unsigned short,
16710 vector unsigned int and vector unsigned long long built-ins. The
16711 name of the builtins for these arguments should be:
16712 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
16713 __builtin_crypto_vpmsumd respectively.
16715 2020-02-26 Richard Biener <rguenther@suse.de>
16717 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
16718 and load permutation.
16720 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
16722 PR middle-end/93843
16723 * optabs-tree.c (supportable_convert_operation): Reject types with
16726 2020-02-26 David Malcolm <dmalcolm@redhat.com>
16728 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
16730 2020-02-26 Jakub Jelinek <jakub@redhat.com>
16732 PR tree-optimization/93820
16733 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
16734 argument to ALL_INTEGER_CST_P boolean.
16735 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
16736 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
16737 adjacent INTEGER_CST store into merged_store->only_constants like
16740 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16743 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
16745 * cfghooks.c (verify_flow_info): Likewise.
16746 * predict.c (combine_predictions_for_bb): Likewise.
16747 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
16748 sucessor -> successor.
16749 (find_traces_1_round): Fix comment typo, destinarion -> destination.
16750 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
16752 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
16753 message typo, sucessors -> successors.
16755 2020-02-25 Martin Sebor <msebor@redhat.com>
16757 * doc/extend.texi (attribute access): Correct an example.
16759 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
16761 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
16763 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
16764 (VAR15, VAR16): New.
16765 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
16766 (VD): Enable for V4BF.
16768 (VQ): Enable for V8BF.
16770 (VQ_NO2E): Likewise.
16771 (VDBL, Vdbl): Add V4BF.
16772 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
16773 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
16774 (bfloat16x8x2_t): Likewise.
16775 (bfloat16x4x3_t): Likewise.
16776 (bfloat16x8x3_t): Likewise.
16777 (bfloat16x4x4_t): Likewise.
16778 (bfloat16x8x4_t): Likewise.
16779 (vcombine_bf16): New.
16780 (vld1_bf16, vld1_bf16_x2): New.
16781 (vld1_bf16_x3, vld1_bf16_x4): New.
16782 (vld1q_bf16, vld1q_bf16_x2): New.
16783 (vld1q_bf16_x3, vld1q_bf16_x4): New.
16784 (vld1_lane_bf16): New.
16785 (vld1q_lane_bf16): New.
16786 (vld1_dup_bf16): New.
16787 (vld1q_dup_bf16): New.
16790 (vld2_dup_bf16): New.
16791 (vld2q_dup_bf16): New.
16794 (vld3_dup_bf16): New.
16795 (vld3q_dup_bf16): New.
16798 (vld4_dup_bf16): New.
16799 (vld4q_dup_bf16): New.
16800 (vst1_bf16, vst1_bf16_x2): New.
16801 (vst1_bf16_x3, vst1_bf16_x4): New.
16802 (vst1q_bf16, vst1q_bf16_x2): New.
16803 (vst1q_bf16_x3, vst1q_bf16_x4): New.
16804 (vst1_lane_bf16): New.
16805 (vst1q_lane_bf16): New.
16813 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
16815 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
16816 (VALL_F16): Likewise.
16817 (VALLDI_F16): Likewise.
16819 (Vetype): Likewise.
16820 (vswap_width_name): Likewise.
16821 (VSWAP_WIDTH): Likewise.
16825 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
16826 (vget_lane_bf16, vgetq_lane_bf16): New.
16827 (vcreate_bf16): New.
16828 (vdup_n_bf16, vdupq_n_bf16): New.
16829 (vdup_lane_bf16, vdup_laneq_bf16): New.
16830 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
16831 (vduph_lane_bf16, vduph_laneq_bf16): New.
16832 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
16833 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
16834 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
16835 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
16836 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
16837 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
16838 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
16839 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
16840 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
16841 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
16842 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
16843 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
16844 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
16845 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
16846 (vreinterpretq_bf16_p128): New.
16847 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
16848 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
16849 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
16850 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
16851 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
16852 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
16853 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
16854 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
16855 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
16856 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
16857 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
16858 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
16859 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
16860 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
16861 (vreinterpretq_p128_bf16): New.
16863 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
16865 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
16866 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
16867 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
16868 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
16869 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
16870 * config/arm/iterators.md (VSF2BF): New attribute.
16871 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
16872 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
16873 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
16875 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
16877 * config/arm/arm.md (required_for_purecode): New attribute.
16878 (enabled): Handle required_for_purecode.
16879 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
16880 work with -mpure-code.
16882 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16884 PR rtl-optimization/93908
16885 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
16888 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
16890 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
16892 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
16894 * doc/install.texi (--enable-checking): Adjust wording.
16896 2020-02-25 Richard Biener <rguenther@suse.de>
16898 PR tree-optimization/93868
16899 * tree-vect-slp.c (slp_copy_subtree): New function.
16900 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
16901 re-arranging stmts in it.
16903 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16905 PR middle-end/93874
16906 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
16907 dummy function and remove it at the end.
16909 PR translation/93864
16910 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
16911 paramter -> parameter.
16912 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
16913 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
16915 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
16917 * doc/install.texi (--enable-checking): Properly document current
16919 (--enable-stage1-checking): Minor clarification about bootstrap.
16921 2020-02-24 David Malcolm <dmalcolm@redhat.com>
16924 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
16925 -fanalyzer-checker=taint is also required.
16926 (-fanalyzer-checker=): Note that providing this option enables the
16927 given checker, and doing so may be required for checkers that are
16928 disabled by default.
16930 2020-02-24 David Malcolm <dmalcolm@redhat.com>
16932 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
16933 significant control flow events; add a "3" which shows all
16934 control flow events; the old "3" becomes "4".
16936 2020-02-24 Jakub Jelinek <jakub@redhat.com>
16938 PR tree-optimization/93582
16939 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
16940 pd.offset and pd.size to be counted in bits rather than bytes, add
16941 support for maxsizei that is not a multiple of BITS_PER_UNIT and
16942 handle bitfield stores and loads.
16943 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
16944 uncomparable quantities - bytes vs. bits. Allow push_partial_def
16945 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
16946 pd.offset/pd.size to be counted in bits rather than bytes.
16947 Formatting fix. Rename shadowed len variable to buflen.
16949 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16950 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
16953 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
16954 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
16955 * opts-common.c (parse_options_from_collect_gcc_options): New function.
16956 (prepend_xassembler_to_collect_as_options): Likewise.
16957 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
16958 (prepend_xassembler_to_collect_as_options): Likewise.
16959 * lto-opts.c (lto_write_options): Stream assembler options
16960 in COLLECT_AS_OPTIONS.
16961 * lto-wrapper.c (xassembler_options_error): New static variable.
16962 (get_options_from_collect_gcc_options): Move parsing options code to
16963 parse_options_from_collect_gcc_options and call it.
16964 (merge_and_complain): Validate -Xassembler options.
16965 (append_compiler_options): Handle OPT_Xassembler.
16966 (run_gcc): Append command line -Xassembler options to
16967 collect_gcc_options.
16968 * doc/invoke.texi: Add documentation about using Xassembler
16971 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
16973 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
16975 (riscv_rtx_costs): Update cost model for LTGT.
16977 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
16979 PR rtl-optimization/93564
16980 * ira-color.c (struct update_cost_queue_elem): New member start.
16981 (queue_update_cost, get_next_update_cost): Add new arg start.
16982 (allocnos_conflict_p): New function.
16983 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
16984 Add checking conflicts with allocnos_conflict_p.
16985 (update_costs_from_prefs, restore_costs_from_copies): Adjust
16986 update_costs_from_allocno calls.
16987 (update_conflict_hard_regno_costs): Add checking conflicts with
16988 allocnos_conflict_p. Adjust calls of queue_update_cost and
16989 get_next_update_cost.
16990 (assign_hard_reg): Adjust calls of queue_update_cost. Add
16992 (bucket_allocno_compare_func): Restore previous version.
16994 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
16996 * config/pa/pa.c (pa_function_value): Fix check for word and
16997 double-word size when handling aggregate return values.
16998 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
16999 that homogeneous SFmode and DFmode aggregates are passed and returned
17000 in general registers.
17002 2020-02-21 Jakub Jelinek <jakub@redhat.com>
17004 PR translation/93759
17005 * opts.c (print_filtered_help): Translate help before appending
17006 messages to it rather than after that.
17008 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
17010 PR rtl-optimization/PR92989
17011 * lra-lives.c (process_bb_lives): Restore the original order
17012 of the bb liveness update. Call make_hard_regno_dead for each
17013 register clobbered at the start of an EH receiver.
17015 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
17018 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
17019 self-recursively generated.
17021 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
17024 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
17027 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
17029 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
17030 Document new target supports option.
17032 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
17034 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
17035 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
17036 * config/arm/iterators.md (MATMUL): New iterator.
17037 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
17038 (mmla_sfx): New attribute.
17039 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
17040 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
17041 (UNSPEC_MATMUL_US): New.
17043 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17045 * config/arm/arm.md: Prevent scalar shifts from being used when big
17048 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
17049 Richard Biener <rguenther@suse.de>
17051 PR tree-optimization/93586
17052 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
17053 after mismatched array refs; do not sure type size information to
17054 recover from unmatched referneces with !flag_strict_aliasing_p.
17056 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17058 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
17059 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
17060 (scatter_store<mode>): Rename to ...
17061 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
17062 (scatter<mode>_exec): Delete. Move contents ...
17063 (mask_scatter_store<mode>): ... here, and rename that to ...
17064 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
17065 Remove mode conversion.
17066 (mask_gather_load<mode>): Rename to ...
17067 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
17068 Remove mode conversion.
17069 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
17071 2020-02-21 Martin Jambor <mjambor@suse.cz>
17073 PR tree-optimization/93845
17074 * tree-sra.c (verify_sra_access_forest): Only test access size of
17077 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17079 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
17080 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
17081 (addv64di3_exec): Likewise.
17082 (subv64di3): Likewise.
17083 (subv64di3_exec): Likewise.
17084 (addv64di3_zext): Likewise.
17085 (addv64di3_zext_exec): Likewise.
17086 (addv64di3_zext_dup): Likewise.
17087 (addv64di3_zext_dup_exec): Likewise.
17088 (addv64di3_zext_dup2): Likewise.
17089 (addv64di3_zext_dup2_exec): Likewise.
17090 (addv64di3_sext_dup2): Likewise.
17091 (addv64di3_sext_dup2_exec): Likewise.
17092 (<expander>v64di3): Likewise.
17093 (<expander>v64di3_exec): Likewise.
17094 (*<reduc_op>_dpp_shr_v64di): Likewise.
17095 (*plus_carry_dpp_shr_v64di): Likewise.
17096 * config/gcn/gcn.md (adddi3): Likewise.
17097 (addptrdi3): Likewise.
17098 (<expander>di3): Likewise.
17100 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17102 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
17104 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17106 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
17107 support. Use aarch64_emit_mult instead of emitting multiplication
17108 instructions directly.
17109 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
17110 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
17112 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17114 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
17115 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
17116 instead of emitting multiplication instructions directly.
17117 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
17118 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
17119 (@aarch64_frecps<mode>): New expanders.
17121 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17123 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
17124 on and produce uint64_ts rather than ints.
17125 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
17126 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
17128 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17130 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
17131 an unused xmsk register when handling approximate rsqrt.
17133 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17135 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
17136 flag_finite_math_only condition.
17138 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
17141 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
17142 to destination operand for shufps alternative.
17143 (*vec_extractv2si_1): Ditto.
17145 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
17148 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
17151 2020-02-20 Martin Liska <mliska@suse.cz>
17153 PR translation/93831
17154 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
17156 2020-02-20 Martin Liska <mliska@suse.cz>
17158 PR translation/93830
17159 * common/config/avr/avr-common.c: Remote trailing "|".
17161 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
17163 * collect2.c (maybe_run_lto_and_relink): Fix typo in
17166 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
17168 PR tree-optimization/93767
17169 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
17170 access-size bias from the offset calculations for negative strides.
17172 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
17174 * collect2.c (c_file, o_file): Make const again.
17175 (ldout,lderrout, dump_ld_file): Remove.
17176 (tool_cleanup): Avoid calling not signal-safe functions.
17177 (maybe_run_lto_and_relink): Avoid possible signal handler
17178 access to unintialzed memory (lto_o_files).
17179 (main): Avoid leaking temp files in $TMPDIR.
17180 Initialize c_file/o_file with concat, which avoids exposing
17181 uninitialized memory to signal handler, which calls unlink(!).
17182 Avoid calling maybe_unlink when the main function returns,
17183 since the atexit handler is already doing this.
17184 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
17186 2020-02-19 Martin Jambor <mjambor@suse.cz>
17188 PR tree-optimization/93776
17189 * tree-sra.c (create_access): Do not create zero size accesses.
17190 (get_access_for_expr): Do not search for zero sized accesses.
17192 2020-02-19 Martin Jambor <mjambor@suse.cz>
17194 PR tree-optimization/93667
17195 * tree-sra.c (scalarizable_type_p): Return false if record fields
17196 do not follow wach other.
17198 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
17200 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
17201 rather than fmv.x.s/fmv.s.x.
17203 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
17205 * config/aarch64/aarch64-simd-builtins.def
17206 (intrinsic_vec_smult_lo_): New.
17207 (intrinsic_vec_umult_lo_): Likewise.
17208 (vec_widen_smult_hi_): Likewise.
17209 (vec_widen_umult_hi_): Likewise.
17210 * config/aarch64/aarch64-simd.md
17211 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
17212 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
17213 (vmull_high_s16): Likewise.
17214 (vmull_high_s32): Likewise.
17215 (vmull_high_u8): Likewise.
17216 (vmull_high_u16): Likewise.
17217 (vmull_high_u32): Likewise.
17218 (vmull_s8): Likewise.
17219 (vmull_s16): Likewise.
17220 (vmull_s32): Likewise.
17221 (vmull_u8): Likewise.
17222 (vmull_u16): Likewise.
17223 (vmull_u32): Likewise.
17225 2020-02-18 Martin Liska <mliska@suse.cz>
17227 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
17228 bootstrap by missing removal of invalid sanity check.
17230 2020-02-18 Martin Liska <mliska@suse.cz>
17233 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
17234 Always compare LHS of gimple_assign.
17236 2020-02-18 Martin Liska <mliska@suse.cz>
17239 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
17240 and return type of functions.
17241 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
17242 Drop MALLOC attribute for void functions.
17243 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
17244 malloc_state for a new VOID clone.
17246 2020-02-18 Martin Liska <mliska@suse.cz>
17249 * common.opt: Add -fprofile-reproducibility.
17250 * doc/invoke.texi: Document it.
17251 * value-prof.c (dump_histogram_value):
17252 Document and support behavior for counters[0]
17253 being a negative value.
17254 (get_nth_most_common_value): Handle negative
17255 counters[0] in respect to flag_profile_reproducible.
17257 2020-02-18 Jakub Jelinek <jakub@redhat.com>
17260 * cgraph.c (verify_speculative_call): Use speculative_id instead of
17261 speculative_uid in messages. Remove trailing whitespace from error
17262 message. Use num_speculative_call_targets instead of
17263 num_speculative_targets in a message.
17264 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
17265 edge messages and stmt instead of cal_stmt in reference message.
17267 PR tree-optimization/93780
17268 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
17269 before calling build_vector_type.
17270 (execute_update_addresses_taken): Likewise.
17273 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
17274 typo, functoin -> function.
17275 * tree.c (free_lang_data_in_decl): Fix comment typo,
17276 functoin -> function.
17277 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
17279 2020-02-17 David Malcolm <dmalcolm@redhat.com>
17281 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
17283 (print_option_information): Don't call get_option_url if URLs
17286 2020-02-17 Alexandre Oliva <oliva@adacore.com>
17288 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
17289 handling of register_common-less targets.
17291 2020-02-17 Martin Liska <mliska@suse.cz>
17294 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
17296 2020-02-17 Martin Liska <mliska@suse.cz>
17298 PR translation/93755
17299 * config/rs6000/rs6000.c (rs6000_option_override_internal):
17302 2020-02-17 Martin Liska <mliska@suse.cz>
17305 * config/rx/elf.opt: Fix typo.
17307 2020-02-17 Richard Biener <rguenther@suse.de>
17310 * opts-global.c (print_ignored_options): Use inform and
17313 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
17316 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
17318 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
17321 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
17322 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
17324 2020-02-15 Jason Merrill <jason@redhat.com>
17326 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
17328 2020-02-15 Jakub Jelinek <jakub@redhat.com>
17330 PR tree-optimization/93744
17331 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
17332 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
17333 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
17334 sure @2 in the first and @1 in the other patterns has no side-effects.
17336 2020-02-15 David Malcolm <dmalcolm@redhat.com>
17337 Bernd Edlinger <bernd.edlinger@hotmail.de>
17341 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
17342 * configure.ac (--with-diagnostics-urls): New configuration
17343 option, based on --with-diagnostics-color.
17344 (DIAGNOSTICS_URLS_DEFAULT): New define.
17345 * config.h: Regenerate.
17346 * configure: Regenerate.
17347 * diagnostic.c (diagnostic_urls_init): Handle -1 for
17348 DIAGNOSTICS_URLS_DEFAULT from configure-time
17349 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
17350 and TERM_URLS environment variable.
17351 * diagnostic-url.h (diagnostic_url_format): New enum type.
17352 (diagnostic_urls_enabled_p): rename to...
17353 (determine_url_format): ... this, and change return type.
17354 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
17355 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
17356 the linux console, and mingw.
17357 (diagnostic_urls_enabled_p): rename to...
17358 (determine_url_format): ... this, and adjust.
17359 * pretty-print.h (pretty_printer::show_urls): rename to...
17360 (pretty_printer::url_format): ... this, and change to enum.
17361 * pretty-print.c (pretty_printer::pretty_printer,
17362 pp_begin_url, pp_end_url, test_urls): Adjust.
17363 * doc/install.texi (--with-diagnostics-urls): Document the new
17364 configuration option.
17365 (--with-diagnostics-color): Document the existing interaction
17366 with GCC_COLORS better.
17367 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
17368 vindex reference. Update description of defaults based on the above.
17369 (-fdiagnostics-color): Update description of how -fdiagnostics-color
17370 interacts with GCC_COLORS.
17372 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
17375 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
17376 conjunction with TARGET_GNU_TLS in early return.
17378 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
17380 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
17381 the mode is not wider than UNITS_PER_WORD.
17383 2020-02-14 Martin Jambor <mjambor@suse.cz>
17385 PR tree-optimization/93516
17386 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
17387 access of the same type as the parent.
17388 (propagate_subaccesses_from_lhs): Likewise.
17390 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
17393 * config/i386/avx512vbmi2intrin.h
17394 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
17395 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
17396 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
17397 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
17398 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
17399 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
17400 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
17401 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
17402 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
17403 of lacking a closing parenthesis.
17404 * config/i386/avx512vbmi2vlintrin.h
17405 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
17406 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
17407 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
17408 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
17409 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
17410 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
17411 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
17412 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
17413 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
17414 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
17415 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
17416 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
17417 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
17418 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
17419 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
17420 _mm_shldi_epi32, _mm_mask_shldi_epi32,
17421 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
17422 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
17424 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
17427 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
17428 the target function entry.
17430 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17432 * common/config/arc/arc-common.c (arc_option_optimization_table):
17433 Disable if-conversion step when optimized for size.
17435 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17437 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
17438 R12-R15 are always in ARCOMPACT16_REGS register class.
17439 * config/arc/arc.opt (mq-class): Deprecate.
17440 * config/arc/constraint.md ("q"): Remove dependency on mq-class
17442 * doc/invoke.texi (mq-class): Update text.
17443 * common/config/arc/arc-common.c (arc_option_optimization_table):
17446 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17448 * config/arc/arc.c (arc_insn_cost): New function.
17449 (TARGET_INSN_COST): Define.
17450 * config/arc/arc.md (cost): New attribute.
17451 (add_n): Use arc_nonmemory_operand.
17452 (ashlsi3_insn): Likewise, also update constraints.
17453 (ashrsi3_insn): Likewise.
17454 (rotrsi3): Likewise.
17455 (add_shift): Likewise.
17456 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
17458 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17460 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
17462 (umulsidi_600): Likewise.
17464 2020-02-13 Jakub Jelinek <jakub@redhat.com>
17467 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
17468 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
17469 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
17470 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
17471 pass __A to the builtin followed by __W instead of __A followed by
17473 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
17474 _mm512_mask_popcnt_epi64): Likewise.
17475 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
17476 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
17477 _mm256_mask_popcnt_epi64): Likewise.
17479 PR tree-optimization/93582
17480 * fold-const.h (shift_bytes_in_array_left,
17481 shift_bytes_in_array_right): Declare.
17482 * fold-const.c (shift_bytes_in_array_left,
17483 shift_bytes_in_array_right): New function, moved from
17484 gimple-ssa-store-merging.c, no longer static.
17485 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
17486 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
17487 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
17488 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
17489 shift_bytes_in_array.
17490 (verify_shift_bytes_in_array): Rename to ...
17491 (verify_shift_bytes_in_array_left): ... this. Use
17492 shift_bytes_in_array_left instead of shift_bytes_in_array.
17493 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
17494 instead of verify_shift_bytes_in_array.
17495 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
17496 / native_interpret_expr where the store covers all needed bits,
17497 punt on PDP-endian, otherwise allow all involved offsets and sizes
17498 not to be byte-aligned.
17501 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
17502 use const_0_to_255_operand predicate instead of immediate_operand.
17503 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
17504 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
17505 vgf2p8affineinvqb_<mode><mask_name>,
17506 vgf2p8affineqb_<mode><mask_name>): Drop mode from
17507 const_0_to_255_operand predicated operands.
17509 2020-02-12 Jeff Law <law@redhat.com>
17511 * config/h8300/h8300.md (comparison shortening peepholes): Use
17512 a mode iterator to merge the HImode and SImode peepholes.
17514 2020-02-12 Jakub Jelinek <jakub@redhat.com>
17516 PR middle-end/93663
17517 * real.c (is_even): Make static. Function comment fix.
17518 (is_halfway_below): Make static, don't assert R is not inf/nan,
17519 instead return false for those. Small formatting fixes.
17521 2020-02-12 Martin Sebor <msebor@redhat.com>
17523 PR middle-end/93646
17524 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
17525 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
17526 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
17527 (strlen_check_and_optimize_call): Adjust callee name.
17529 2020-02-12 Jeff Law <law@redhat.com>
17531 * config/h8300/h8300.md (comparison shortening peepholes): Drop
17532 (and (xor)) variant. Combine other two into single peephole.
17534 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
17536 PR rtl-optimization/93565
17537 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
17539 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
17541 * config/aarch64/aarch64-simd.md
17542 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
17543 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
17544 generating separate ADDV and zero_extend patterns.
17545 * config/aarch64/iterators.md (VDQV_E): New iterator.
17547 2020-02-12 Jeff Law <law@redhat.com>
17549 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
17550 expanders, splits, etc.
17551 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
17552 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
17553 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
17554 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
17555 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
17556 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
17557 function prototype.
17558 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
17560 2020-02-12 Jakub Jelinek <jakub@redhat.com>
17563 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
17564 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
17565 TARGET_AVX512DQ from condition.
17566 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
17567 instead of <mask_mode512bit_condition> in condition. If
17568 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
17570 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
17573 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
17576 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
17578 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
17580 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
17581 where strlen is more legible.
17582 (rs6000_builtin_vectorized_libmass): Ditto.
17583 (rs6000_print_options_internal): Ditto.
17585 2020-02-11 Martin Sebor <msebor@redhat.com>
17587 PR tree-optimization/93683
17588 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
17590 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
17592 * config/rs6000/predicates.md (cint34_operand): Rename the
17593 -mprefixed-addr option to be -mprefixed.
17594 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
17595 the -mprefixed-addr option to be -mprefixed.
17596 (OTHER_FUTURE_MASKS): Likewise.
17597 (POWERPC_MASKS): Likewise.
17598 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
17599 the -mprefixed-addr option to be -mprefixed. Change error
17600 messages to refer to -mprefixed.
17601 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
17603 (rs6000_legitimate_offset_address_p): Likewise.
17604 (rs6000_mode_dependent_address): Likewise.
17605 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
17606 "-mprefixed" for target attributes and pragmas.
17607 (address_to_insn_form): Rename the -mprefixed-addr option to be
17609 (rs6000_adjust_insn_length): Likewise.
17610 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
17611 -mprefixed-addr option to be -mprefixed.
17612 (ASM_OUTPUT_OPCODE): Likewise.
17613 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
17614 -mprefixed-addr option to be -mprefixed.
17615 * config/rs6000/rs6000.opt (-mprefixed): Rename the
17616 -mprefixed-addr option to be prefixed. Change the option from
17617 being undocumented to being documented.
17618 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
17619 -mprefixed option. Update the -mpcrel documentation to mention
17622 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
17624 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
17625 including FIRST_PSEUDO_REGISTER - 1.
17626 * ira-color.c (print_hard_reg_set): Ditto.
17628 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17630 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
17631 (USTERNOP_QUALIFIERS): New define.
17632 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
17633 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
17634 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
17635 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
17636 * config/arm/arm_neon.h (vusdot_s32): New.
17637 (vusdot_lane_s32): New.
17638 (vusdotq_lane_s32): New.
17639 (vsudot_lane_s32): New.
17640 (vsudotq_lane_s32): New.
17641 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
17642 * config/arm/iterators.md (DOTPROD_I8MM): New.
17643 (sup, opsuffix): Add <us/su>.
17644 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
17645 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
17647 2020-02-11 Richard Biener <rguenther@suse.de>
17649 PR tree-optimization/93661
17650 PR tree-optimization/93662
17651 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
17652 tree_to_poly_int64.
17653 * tree-sra.c (get_access_for_expr): Likewise.
17655 2020-02-10 Jakub Jelinek <jakub@redhat.com>
17658 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
17659 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
17660 Change condition from TARGET_AVX2 to TARGET_AVX.
17662 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
17665 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
17666 argument of strncmp.
17668 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
17670 Try to generate zero-based comparisons.
17671 * config/cris/cris.c (cris_reduce_compare): New function.
17672 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
17673 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
17674 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
17676 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
17679 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
17680 in Thumb state and also as a destination in Arm state. Add T16
17683 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
17685 * md.texi (Define Subst): Match closing paren in example.
17687 2020-02-10 Jakub Jelinek <jakub@redhat.com>
17691 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
17692 arguments of strncmp.
17694 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
17697 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
17698 but different source value.
17699 (adjust_callers_for_value_intersection): New function.
17700 (gather_edges_for_value): Adjust order of callers to let a
17701 non-self-recursive caller be the first element.
17702 (self_recursive_pass_through_p): Add a new parameter "simple", and
17703 check generalized self-recursive pass-through jump function.
17704 (self_recursive_agg_pass_through_p): Likewise.
17705 (find_more_scalar_values_for_callers_subset): Compute value from
17706 pass-through jump function for self-recursive.
17707 (intersect_with_plats): Cleanup previous implementation code for value
17708 itersection with self-recursive call edge.
17709 (intersect_with_agg_replacements): Likewise.
17710 (intersect_aggregates_with_edge): Deduce value from pass-through jump
17711 function for self-recursive call edge. Cleanup previous implementation
17712 code for value intersection with self-recursive call edge.
17713 (decide_whether_version_node): Remove dead callers and adjust order
17714 to let a non-self-recursive caller be the first element.
17716 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
17718 * recog.c: Move pass_split_before_sched2 code in front of
17719 pass_split_before_regstack.
17720 (pass_data_split_before_sched2): Rename pass to split3 from split4.
17721 (pass_data_split_before_regstack): Rename pass to split4 from split3.
17722 (rest_of_handle_split_before_sched2): Remove.
17723 (pass_split_before_sched2::execute): Unconditionally call
17725 (enable_split_before_sched2): New function.
17726 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
17727 (pass_split_before_regstack::gate): Ditto.
17728 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
17729 Update name check for renamed split4 pass.
17730 * config/sh/sh.c (register_sh_passes): Update pass insertion
17731 point for renamed split4 pass.
17733 2020-02-09 Jakub Jelinek <jakub@redhat.com>
17735 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
17736 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
17737 copying them around between host and target.
17739 2020-02-08 Andrew Pinski <apinski@marvell.com>
17742 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
17743 STRICT_ALIGNMENT also.
17745 2020-02-08 Jim Wilson <jimw@sifive.com>
17748 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
17750 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
17751 Jakub Jelinek <jakub@redhat.com>
17754 * config/i386/i386.h (CALL_USED_REGISTERS): Make
17755 xmm16-xmm31 call-used even in 64-bit ms-abi.
17757 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
17759 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
17760 (simd_ummla, simd_usmmla): Likewise.
17761 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
17762 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
17763 (vusmmlaq_s32): New.
17765 2020-02-07 Richard Biener <rguenther@suse.de>
17767 PR middle-end/93519
17768 * tree-inline.c (fold_marked_statements): Do a PRE walk,
17769 skipping unreachable regions.
17770 (optimize_inline_calls): Skip folding stmts when we didn't
17773 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
17776 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
17777 Don't return aggregates with only SFmode and DFmode in SSE
17779 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
17781 2020-02-07 Jakub Jelinek <jakub@redhat.com>
17784 * config/rs6000/rs6000-logue.c
17785 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
17786 if it fails, move rs into end_addr and retry. Add
17787 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
17788 the insn pattern doesn't describe well what exactly happens to
17792 * config/i386/predicates.md (avx_identity_operand): Remove.
17793 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
17794 (avx_<castmode><avxsizesuffix>_<castmode>,
17795 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
17796 a VEC_CONCAT of the operand and UNSPEC_CAST.
17797 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
17798 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
17802 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
17803 recog_data.insn if distance_non_agu_define changed it.
17805 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
17808 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
17809 we only had X-FORM (reg+reg) addressing for vectors. Also before
17810 ISA 3.0, we only had X-FORM addressing for scalars in the
17811 traditional Altivec registers.
17813 2020-02-06 <zhongyunde@huawei.com>
17814 Vladimir Makarov <vmakarov@redhat.com>
17816 PR rtl-optimization/93561
17817 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
17818 hard register range.
17820 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17822 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
17825 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
17827 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
17828 where the low and the high 32 bits are equal to each other specially,
17829 with an rldimi instruction.
17831 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
17833 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
17835 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
17837 * config/arm/arm-tables.opt: Regenerate.
17839 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17842 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
17843 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
17844 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
17846 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17848 PR rtl-optimization/87763
17849 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
17851 2020-02-06 Delia Burduv <delia.burduv@arm.com>
17853 * config/aarch64/aarch64-simd-builtins.def
17854 (bfmlaq): New built-in function.
17855 (bfmlalb): New built-in function.
17856 (bfmlalt): New built-in function.
17857 (bfmlalb_lane): New built-in function.
17858 (bfmlalt_lane): New built-in function.
17859 * config/aarch64/aarch64-simd.md
17860 (aarch64_bfmmlaqv4sf): New pattern.
17861 (aarch64_bfmlal<bt>v4sf): New pattern.
17862 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
17863 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
17864 (vbfmlalbq_f32): New intrinsic.
17865 (vbfmlaltq_f32): New intrinsic.
17866 (vbfmlalbq_lane_f32): New intrinsic.
17867 (vbfmlaltq_lane_f32): New intrinsic.
17868 (vbfmlalbq_laneq_f32): New intrinsic.
17869 (vbfmlaltq_laneq_f32): New intrinsic.
17870 * config/aarch64/iterators.md (BF_MLA): New int iterator.
17871 (bt): New int attribute.
17873 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
17875 * config/i386/i386.md (*pushtf): Emit "#" instead of
17876 calling gcc_unreachable in insn output.
17879 (*pushsf_rex64): Ditto for alternatives other than 1.
17880 (*pushsf): Ditto for alternatives other than 1.
17882 2020-02-06 Martin Liska <mliska@suse.cz>
17884 PR gcov-profile/91971
17885 PR gcov-profile/93466
17886 * coverage.c (coverage_init): Revert mangling of
17887 path into filename. It can lead to huge filename length.
17888 Creation of subfolders seem more natural.
17890 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17893 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
17894 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
17895 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
17897 2020-02-06 Jakub Jelinek <jakub@redhat.com>
17900 * config/i386/predicates.md (avx_identity_operand): New predicate.
17901 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
17902 define_insn_and_split.
17905 * omp-low.c (use_pointer_for_field): For nested constructs, also
17906 look for map clauses on target construct.
17907 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
17908 taskreg_nesting_level.
17911 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
17912 shared clause, call omp_notice_variable on outer context if any.
17914 2020-02-05 Jason Merrill <jason@redhat.com>
17917 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
17918 non-zero address even if weak and not yet defined.
17920 2020-02-05 Martin Sebor <msebor@redhat.com>
17922 PR tree-optimization/92765
17923 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
17924 * tree-ssa-strlen.c (compute_string_length): Remove.
17925 (determine_min_objsize): Remove.
17926 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
17927 Avoid using type size as the upper bound on string length.
17928 (handle_builtin_string_cmp): Add an argument. Adjust.
17929 (strlen_check_and_optimize_call): Pass additional argument to
17930 handle_builtin_string_cmp.
17932 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
17934 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
17935 (*pushdi2_rex64 peephole2): Unconditionally split after
17936 epilogue_completed.
17937 (*ashl<mode>3_doubleword): Ditto.
17938 (*<shift_insn><mode>3_doubleword): Ditto.
17940 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
17943 * config/rs6000/rs6000.c (get_vector_offset): Fix
17945 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
17947 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
17949 2020-02-05 David Malcolm <dmalcolm@redhat.com>
17951 * doc/analyzer.texi
17952 (Special Functions for Debugging the Analyzer): Update description
17953 of __analyzer_dump_exploded_nodes.
17955 2020-02-05 Jakub Jelinek <jakub@redhat.com>
17958 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
17959 include sets and not clobbers in the vzeroupper pattern.
17960 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
17961 the parallel has 17 (64-bit) or 9 (32-bit) elts.
17962 (*avx_vzeroupper_1): New define_insn_and_split.
17965 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
17966 don't run when !optimize.
17967 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
17970 2020-02-05 Richard Biener <rguenther@suse.de>
17972 PR middle-end/90648
17973 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
17974 checks before matching calls.
17976 2020-02-05 Jakub Jelinek <jakub@redhat.com>
17978 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
17979 function comment typo.
17981 PR middle-end/93555
17982 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
17983 simd_clone_create failed when i == 0, adjust clone->nargs by
17986 2020-02-05 Martin Liska <mliska@suse.cz>
17989 * doc/invoke.texi: Document that one should
17990 not combine ASLR and -fpch.
17992 2020-02-04 Richard Biener <rguenther@suse.de>
17994 PR tree-optimization/93538
17995 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
17997 2020-02-04 Richard Biener <rguenther@suse.de>
17999 PR tree-optimization/91123
18000 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
18001 (vn_walk_cb_data::last_vuse): New member.
18002 (vn_walk_cb_data::saved_operands): Likewsie.
18003 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
18004 (vn_walk_cb_data::push_partial_def): Use finish.
18005 (vn_reference_lookup_2): Update last_vuse and use finish if
18006 we've saved operands.
18007 (vn_reference_lookup_3): Use finish and update calls to
18008 push_partial_defs everywhere. When translating through
18009 memcpy or aggregate copies save off operands and alias-set.
18010 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
18011 operation for redundant store removal.
18013 2020-02-04 Richard Biener <rguenther@suse.de>
18015 PR tree-optimization/92819
18016 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
18017 generating more stmts than before.
18019 2020-02-04 Martin Liska <mliska@suse.cz>
18021 * config/arm/arm.c (arm_gen_far_branch): Move the function
18022 outside of selftests.
18024 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18026 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
18027 function to adjust PC-relative vector addresses.
18028 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
18029 handle vectors with PC-relative addresses.
18031 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18033 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
18035 (hard_reg_and_mode_to_addr_mask): Delete.
18036 (rs6000_adjust_vec_address): If the original vector address
18037 was REG+REG or REG+OFFSET and the element is not zero, do the add
18038 of the elements in the original address before adding the offset
18039 for the vector element. Use address_to_insn_form to validate the
18040 address using the register being loaded, rather than guessing
18041 whether the address is a DS-FORM or DQ-FORM address.
18043 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18045 * config/rs6000/rs6000.c (get_vector_offset): New helper function
18046 to calculate the offset in memory from the start of a vector of a
18047 particular element. Add code to keep the element number in
18048 bounds if the element number is variable.
18049 (rs6000_adjust_vec_address): Move calculation of offset of the
18050 vector element to get_vector_offset.
18051 (rs6000_split_vec_extract_var): Do not do the initial AND of
18052 element here, move the code to get_vector_offset.
18054 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18056 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
18059 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
18061 * config/rs6000/constraints.md: Improve documentation.
18063 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
18066 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
18067 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
18069 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
18071 * config.gcc: Remove "carrizo" support.
18072 * config/gcn/gcn-opts.h (processor_type): Likewise.
18073 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
18074 * config/gcn/gcn.opt (gpu_type): Likewise.
18075 * config/gcn/t-omp-device: Likewise.
18077 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18080 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
18081 * config/arm/arm.c (arm_gen_far_branch): New function
18082 arm_gen_far_branch.
18083 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
18085 2020-02-03 Julian Brown <julian@codesourcery.com>
18086 Tobias Burnus <tobias@codesourcery.com>
18088 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
18090 2020-02-03 Jakub Jelinek <jakub@redhat.com>
18093 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
18094 valid RTL to sum up the lowest and second lowest bytes of the popcnt
18097 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
18099 PR rtl-optimization/91333
18100 * ira-color.c (struct allocno_color_data): Add member
18102 (init_allocno_threads): Set the member up.
18103 (bucket_allocno_compare_func): Add compare hard reg
18106 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
18108 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
18110 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
18111 * config.in: Regenerated.
18112 * configure: Regenerated.
18113 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
18114 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
18115 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
18117 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
18119 * configure: Regenerate.
18121 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
18123 PR rtl-optimization/91333
18124 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
18125 reg preferences comparison up.
18127 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
18129 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
18130 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
18131 aarch64-sve-builtins-base.h.
18132 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
18133 aarch64-sve-builtins-base.cc.
18134 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
18135 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18136 (svcvtnt): Declare.
18137 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
18138 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18139 (svcvtnt): New functions.
18140 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
18141 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18142 (svcvtnt): New functions.
18143 (svcvt): Add a form that converts f32 to bf16.
18144 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
18145 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
18147 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
18148 Treat B as bfloat16_t.
18149 (ternary_bfloat_lane_base): New class.
18150 (ternary_bfloat_def): Likewise.
18151 (ternary_bfloat): New shape.
18152 (ternary_bfloat_lane_def): New class.
18153 (ternary_bfloat_lane): New shape.
18154 (ternary_bfloat_lanex2_def): New class.
18155 (ternary_bfloat_lanex2): New shape.
18156 (ternary_bfloat_opt_n_def): New class.
18157 (ternary_bfloat_opt_n): New shape.
18158 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
18159 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
18160 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
18161 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
18162 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
18163 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
18164 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
18165 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
18166 the pattern off the narrow mode instead of the wider one.
18167 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
18168 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
18169 (sve_fp_op): Handle them.
18170 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
18171 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
18173 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
18175 * config/aarch64/arm_sve.h: Include arm_bf16.h.
18176 * config/aarch64/aarch64-modes.def (BF): Move definition before
18177 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
18178 (SVE_MODES): Handle BF modes.
18179 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
18181 (aarch64_full_sve_mode): Likewise.
18182 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
18184 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
18185 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
18186 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
18187 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
18189 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
18191 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
18192 (TYPES_all_data): Add bf16.
18193 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
18194 (register_tuple_type): Increase buffer size.
18195 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
18196 (bf16): New type suffix.
18197 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
18198 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
18199 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
18200 Change type from all_data to all_arith.
18201 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
18202 (svminp): Likewise.
18204 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
18205 Matthew Malcomson <matthew.malcomson@arm.com>
18206 Richard Sandiford <richard.sandiford@arm.com>
18208 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
18209 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
18210 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
18211 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
18212 __ARM_FEATURE_MATMUL_FP64.
18213 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
18214 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
18215 be disabled at the same time.
18216 (f32mm): New extension.
18217 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
18218 (AARCH64_FL_F64MM): Bump to the next bit up.
18219 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
18220 (TARGET_SVE_F64MM): New macros.
18221 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
18222 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
18223 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
18224 (UNSPEC_ZIP2Q): New unspeccs.
18225 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
18226 (optab, sur, perm_insn): Handle the new unspecs.
18227 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
18228 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
18229 TARGET_SVE_F64MM instead of separate tests.
18230 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
18231 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
18232 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
18233 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
18234 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
18235 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
18236 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
18237 (TYPES_s_signed): New macro.
18238 (TYPES_s_integer): Use it.
18239 (TYPES_d_float): New macro.
18240 (TYPES_d_data): Use it.
18241 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
18242 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
18243 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
18244 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
18245 (svmmla): New shape.
18246 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
18247 template parameters.
18248 (ternary_resize2_lane_base): Likewise.
18249 (ternary_resize2_base): New class.
18250 (ternary_qq_lane_base): Likewise.
18251 (ternary_intq_uintq_lane_def): Likewise.
18252 (ternary_intq_uintq_lane): New shape.
18253 (ternary_intq_uintq_opt_n_def): New class
18254 (ternary_intq_uintq_opt_n): New shape.
18255 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
18256 (ternary_uintq_intq_def): New class.
18257 (ternary_uintq_intq): New shape.
18258 (ternary_uintq_intq_lane_def): New class.
18259 (ternary_uintq_intq_lane): New shape.
18260 (ternary_uintq_intq_opt_n_def): New class.
18261 (ternary_uintq_intq_opt_n): New shape.
18262 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
18263 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
18264 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
18265 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
18267 (svdotprod_lane_impl): ...this new class.
18268 (svmmla_impl, svusdot_impl): New classes.
18269 (svdot_lane): Update to use svdotprod_lane_impl.
18270 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
18271 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
18273 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
18274 function, with no types defined.
18275 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
18276 AARCH64_FL_I8MM functions.
18277 (svmmla): New AARCH64_FL_F32MM function.
18278 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
18279 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
18280 AARCH64_FL_F64MM function.
18281 (REQUIRED_EXTENSIONS):
18283 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
18285 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
18288 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
18290 * config/i386/i386.md (*movoi_internal_avx): Do not check for
18291 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
18292 (*movti_internal): Do not check for
18293 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
18294 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
18295 just after check for TARGET_AVX.
18296 (*movdf_internal): Ditto.
18297 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
18298 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
18299 * config/i386/sse.md (mov<mode>_internal): Only check
18300 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
18301 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
18302 (<sse>_andnot<mode>3<mask_name>): Move check for
18303 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
18304 (<code><mode>3<mask_name>): Ditto.
18305 (*andnot<mode>3): Ditto.
18306 (*andnottf3): Ditto.
18307 (*<code><mode>3): Ditto.
18308 (*<code>tf3): Ditto.
18309 (*andnot<VI:mode>3): Remove
18310 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
18311 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
18312 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
18313 (sse4_1_blendv<ssemodesuffix>): Ditto.
18314 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
18315 Explain that tune applies to 128bit instructions only.
18317 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
18319 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
18320 to definition of hsa_kernel_description. Parse assembly to find SGPR
18321 and VGPR count of kernel and store in hsa_kernel_description.
18323 2020-01-31 Tamar Christina <tamar.christina@arm.com>
18325 PR rtl-optimization/91838
18326 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
18327 to truncate if allowed or reject combination.
18329 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
18331 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
18332 (find_inv_vars_cb): Likewise.
18334 2020-01-31 David Malcolm <dmalcolm@redhat.com>
18336 * calls.c (special_function_p): Split out the check for DECL_NAME
18337 being non-NULL and fndecl being extern at file scope into a
18338 new maybe_special_function_p and call it. Drop check for fndecl
18339 being non-NULL that was after a usage of DECL_NAME (fndecl).
18340 * tree.h (maybe_special_function_p): New inline function.
18342 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
18344 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
18345 (mask_gather_load<mode>): ... here, and zero-initialize the
18347 (maskload<mode>di): Zero-initialize the destination.
18348 * config/gcn/gcn.c:
18350 2020-01-30 David Malcolm <dmalcolm@redhat.com>
18353 * doc/analyzer.texi (Limitations): Note that constraints on
18354 floating-point values are currently ignored.
18356 2020-01-30 Jakub Jelinek <jakub@redhat.com>
18359 * symtab.c (symtab_node::noninterposable_alias): If localalias
18360 already exists, but is not usable, append numbers after it until
18361 a unique name is found. Formatting fix.
18363 PR middle-end/93505
18364 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
18367 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
18369 * config/gcn/gcn.c (print_operand): Handle LTGT.
18370 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
18372 2020-01-30 Richard Biener <rguenther@suse.de>
18374 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
18375 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
18377 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
18379 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
18380 without a DECL in .data.rel.ro.local.
18382 2020-01-30 Jakub Jelinek <jakub@redhat.com>
18385 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
18389 * config/i386/sse.md
18390 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
18391 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
18392 any_extend code iterator instead of always zero_extend.
18393 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
18394 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
18395 Use any_extend code iterator instead of always zero_extend.
18396 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
18397 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
18398 Use any_extend code iterator instead of always zero_extend.
18399 (*sse2_pmovmskb_ext): New define_insn.
18400 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
18403 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
18404 (*popcountsi2_zext_falsedep): New define_insn.
18406 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18408 * config.in: Regenerated.
18409 * configure: Regenerated.
18411 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
18414 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
18415 LLVM's assembler changed the default in version 9.
18417 2020-01-24 Jeff Law <law@redhat.com>
18419 PR tree-optimization/89689
18420 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
18422 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
18426 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18428 PR rtl-optimization/87763
18429 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
18430 simplification to handle subregs as well as bare regs.
18431 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
18433 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
18436 * ira.c (ira): Revert use of simplified LRA algorithm.
18438 2020-01-29 Martin Jambor <mjambor@suse.cz>
18440 PR tree-optimization/92706
18441 * tree-sra.c (struct access): Fields first_link, last_link,
18442 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
18443 next_rhs_queued and grp_rhs_queued respectively, new fields
18444 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
18445 (struct assign_link): Field next renamed to next_rhs, new field
18446 next_lhs. Updated comment.
18447 (work_queue_head): Renamed to rhs_work_queue_head.
18448 (lhs_work_queue_head): New variable.
18449 (add_link_to_lhs): New function.
18450 (relink_to_new_repr): Also relink LHS lists.
18451 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
18452 (add_access_to_lhs_work_queue): New function.
18453 (pop_access_from_work_queue): Renamed to
18454 pop_access_from_rhs_work_queue.
18455 (pop_access_from_lhs_work_queue): New function.
18456 (build_accesses_from_assign): Also add links to LHS lists and to LHS
18458 (child_would_conflict_in_lacc): Renamed to
18459 child_would_conflict_in_acc. Adjusted parameter names.
18460 (create_artificial_child_access): New parameter set_grp_read, use it.
18461 (subtree_mark_written_and_enqueue): Renamed to
18462 subtree_mark_written_and_rhs_enqueue.
18463 (propagate_subaccesses_across_link): Renamed to
18464 propagate_subaccesses_from_rhs.
18465 (propagate_subaccesses_from_lhs): New function.
18466 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
18469 2020-01-29 Martin Jambor <mjambor@suse.cz>
18471 PR tree-optimization/92706
18472 * tree-sra.c (struct access): Adjust comment of
18473 grp_total_scalarization.
18474 (find_access_in_subtree): Look for single children spanning an entire
18476 (scalarizable_type_p): Allow register accesses, adjust callers.
18477 (completely_scalarize): Remove function.
18478 (scalarize_elem): Likewise.
18479 (create_total_scalarization_access): Likewise.
18480 (sort_and_splice_var_accesses): Do not track total scalarization
18482 (analyze_access_subtree): New parameter totally, adjust to new meaning
18483 of grp_total_scalarization.
18484 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
18485 (can_totally_scalarize_forest_p): New function.
18486 (create_total_scalarization_access): Likewise.
18487 (create_total_access_and_reshape): Likewise.
18488 (total_should_skip_creating_access): Likewise.
18489 (totally_scalarize_subtree): Likewise.
18490 (analyze_all_variable_accesses): Perform total scalarization after
18491 subaccess propagation using the new functions above.
18492 (initialize_constant_pool_replacements): Output initializers by
18493 traversing the access tree.
18495 2020-01-29 Martin Jambor <mjambor@suse.cz>
18497 * tree-sra.c (verify_sra_access_forest): New function.
18498 (verify_all_sra_access_forests): Likewise.
18499 (create_artificial_child_access): Set parent.
18500 (analyze_all_variable_accesses): Call the verifier.
18502 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18504 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
18505 if called on indirect edge.
18506 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
18507 speculative call if needed.
18509 2020-01-29 Richard Biener <rguenther@suse.de>
18511 PR tree-optimization/93428
18512 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
18513 permutation when the load node is created.
18514 (vect_analyze_slp_instance): Re-use it here.
18516 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18518 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
18520 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
18522 PR rtl-optimization/93272
18523 * ira-lives.c (process_out_of_region_eh_regs): New function.
18524 (process_bb_node_lives): Call it.
18526 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18528 * coverage.c (read_counts_file): Make error message lowercase.
18530 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18532 * profile-count.c (profile_quality_display_names): Fix ordering.
18534 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18537 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
18538 hash only when edge is first within the sequence.
18539 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
18540 (symbol_table::create_edge): Do not set target_prob.
18541 (cgraph_edge::remove_caller): Watch for speculative calls when updating
18542 the call site hash.
18543 (cgraph_edge::make_speculative): Drop target_prob parameter.
18544 (cgraph_edge::speculative_call_info): Remove.
18545 (cgraph_edge::first_speculative_call_target): New member function.
18546 (update_call_stmt_hash_for_removing_direct_edge): New function.
18547 (cgraph_edge::resolve_speculation): Rewrite to new API.
18548 (cgraph_edge::speculative_call_for_target): New member function.
18549 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
18550 multiple speculation targets.
18551 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
18553 (verify_speculative_call): Verify that targets form an interval.
18554 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
18555 (cgraph_edge::first_speculative_call_target): New member function.
18556 (cgraph_edge::next_speculative_call_target): New member function.
18557 (cgraph_edge::speculative_call_target_ref): New member function.
18558 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
18559 (cgraph_edge): Remove target_prob.
18560 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
18561 Fix handling of speculative calls.
18562 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
18563 * ipa-fnsummary.c (analyze_function_body): Likewise.
18564 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
18565 * ipa-profile.c (dump_histogram): Fix formating.
18566 (ipa_profile_generate_summary): Watch for overflows.
18567 (ipa_profile): Do not require probablity to be 1/2; update to new API.
18568 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
18569 (update_indirect_edges_after_inlining): Update to new API.
18570 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
18572 * profile-count.h: (profile_probability::adjusted): New.
18573 * tree-inline.c (copy_bb): Update to new speculative call API; fix
18574 updating of profile.
18575 * value-prof.c (gimple_ic_transform): Rename to ...
18576 (dump_ic_profile): ... this one; update dumping.
18577 (stream_in_histogram_value): Fix formating.
18578 (gimple_value_profile_transformations): Update.
18580 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
18583 * config/i386/i386.md (*movoi_internal_avx): Remove
18584 TARGET_SSE_TYPELESS_STORES check.
18585 (*movti_internal): Prefer TARGET_AVX over
18586 TARGET_SSE_TYPELESS_STORES.
18587 (*movtf_internal): Likewise.
18588 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
18589 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
18590 from TARGET_SSE_TYPELESS_STORES.
18592 2020-01-28 David Malcolm <dmalcolm@redhat.com>
18594 * diagnostic-core.h (warning_at): Rename overload to...
18595 (warning_meta): ...this.
18596 (emit_diagnostic_valist): Delete decl of overload taking
18597 diagnostic_metadata.
18598 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
18599 (warning_at): Rename overload taking diagnostic_metadata to...
18600 (warning_meta): ...this.
18602 2020-01-28 Richard Biener <rguenther@suse.de>
18604 PR tree-optimization/93439
18605 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
18606 * tree-cfg.c (move_sese_region_to_fn): ... here.
18607 (verify_types_in_gimple_reference): Verify used cliques are
18610 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
18613 * config/i386/i386-options.c (set_ix86_tune_features): Add an
18614 argument of a pointer to struct gcc_options and pass it to
18615 parse_mtune_ctrl_str.
18616 (ix86_function_specific_restore): Pass opts to
18617 set_ix86_tune_features.
18618 (ix86_option_override_internal): Likewise.
18619 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
18620 gcc_options and use it for x_ix86_tune_ctrl_string.
18622 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18624 PR rtl-optimization/87763
18625 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
18626 simplification to handle subregs as well as bare regs.
18627 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
18629 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18631 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
18632 for reduction chains that (now) include a call.
18634 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18636 PR tree-optimization/92822
18637 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
18638 out the don't-care elements of a vector whose significant elements
18639 are duplicates, make the don't-care elements duplicates too.
18641 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18643 PR tree-optimization/93434
18644 * tree-predcom.c (split_data_refs_to_components): Record which
18645 components have had aliasing loads removed. Prevent store-store
18646 commoning for all such components.
18648 2020-01-28 Jakub Jelinek <jakub@redhat.com>
18651 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
18652 -1 or is_vshift is true, use new_vector with number of elts npatterns
18653 rather than new_unary_operation.
18655 PR tree-optimization/93454
18656 * gimple-fold.c (fold_array_ctor_reference): Perform
18657 elt_size.to_uhwi () just once, instead of calling it in every
18658 iteration. Punt if that value is above size of the temporary
18659 buffer. Decrease third native_encode_expr argument when
18660 bufoff + elt_sz is above size of buf.
18662 2020-01-27 Joseph Myers <joseph@codesourcery.com>
18664 * config/mips/mips.c (mips_declare_object_name)
18665 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
18667 2020-01-27 Martin Liska <mliska@suse.cz>
18669 PR gcov-profile/93403
18670 * tree-profile.c (gimple_init_gcov_profiler): Generate
18671 both __gcov_indirect_call_profiler_v4 and
18672 __gcov_indirect_call_profiler_v4_atomic.
18674 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18677 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
18679 (@aarch64_split_simd_mov<mode>): Use it.
18680 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
18681 Leave the vec_extract patterns to handle 2-element vectors.
18682 (aarch64_simd_mov_from_<mode>high): Likewise.
18683 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
18684 (vec_extractv2dfv1df): Likewise.
18686 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18688 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
18689 jump conditions for *compare_condjump<GPI:mode>.
18691 2020-01-27 David Malcolm <dmalcolm@redhat.com>
18694 * digraph.cc (test_edge::test_edge): Specify template for base
18697 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
18699 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
18701 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
18703 * config/arc/arc-protos.h (gen_mlo): Remove.
18704 (gen_mhi): Likewise.
18705 * config/arc/arc.c (AUX_MULHI): Define.
18706 (arc_must_save_reister): Special handling for r58/59.
18707 (arc_compute_frame_size): Consider mlo/mhi registers.
18708 (arc_save_callee_saves): Emit fp/sp move only when emit_move
18710 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
18711 mlo/mhi name selection.
18712 (arc_restore_callee_saves): Don't early restore blink when ISR.
18713 (arc_expand_prologue): Add mlo/mhi saving.
18714 (arc_expand_epilogue): Add mlo/mhi restoring.
18717 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
18718 numbering when MUL64 option is used.
18719 (DWARF2_FRAME_REG_OUT): Define.
18720 * config/arc/arc.md (arc600_stall): New pattern.
18721 (VUNSPEC_ARC_ARC600_STALL): Define.
18722 (mulsi64): Use correct mlo/mhi registers.
18723 (mulsi_600): Clean it up.
18724 * config/arc/predicates.md (mlo_operand): Remove any dependency on
18726 (mhi_operand): Likewise.
18728 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
18729 Petro Karashchenko <petro.karashchenko@ring.com>
18731 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
18732 attributes if needed.
18733 (prepare_move_operands): Generate special unspec instruction for
18735 (arc_isuncached_mem_p): Propagate uncached attribute to each
18737 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
18738 (VUNSPEC_ARC_STDI): Likewise.
18739 (ALLI): New mode iterator.
18740 (mALLI): New mode attribute.
18741 (lddi): New instruction pattern.
18743 (stdidi_split): Split instruction for architectures which are not
18744 supporting ll64 option.
18745 (lddidi_split): Likewise.
18747 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18749 PR rtl-optimization/92989
18750 * lra-lives.c (process_bb_lives): Update the live-in set before
18751 processing additional clobbers.
18753 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18755 PR rtl-optimization/93170
18756 * cselib.c (cselib_invalidate_regno_val): New function, split out
18758 (cselib_invalidate_regno): ...here.
18759 (cselib_invalidated_by_call_p): New function.
18760 (cselib_process_insn): Iterate over all the hard-register entries in
18761 REG_VALUES and invalidate any that cross call-clobbered registers.
18763 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18765 * dojump.c (split_comparison): Use HONOR_NANS rather than
18766 HONOR_SNANS when splitting LTGT.
18768 2020-01-27 Martin Liska <mliska@suse.cz>
18771 * opts.c (print_filtered_help): Exclude language-specific
18772 options from --help=common unless enabled in all FEs.
18774 2020-01-27 Martin Liska <mliska@suse.cz>
18776 * opts.c (print_help): Exclude params from
18777 all except --help=param.
18779 2020-01-27 Martin Liska <mliska@suse.cz>
18782 * config/i386/i386-features.c (make_resolver_func):
18783 Align the code with ppc64 target implementation.
18784 Do not generate a unique name for resolver function.
18786 2020-01-27 Richard Biener <rguenther@suse.de>
18788 PR tree-optimization/93397
18789 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
18790 converted reduction chain SLP graph adjustment.
18792 2020-01-26 Marek Polacek <polacek@redhat.com>
18795 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
18798 2020-01-26 Jason Merrill <jason@redhat.com>
18801 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
18804 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
18806 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
18807 (rx_setmem): Likewise.
18809 2020-01-26 Jakub Jelinek <jakub@redhat.com>
18812 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
18813 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
18814 drop <di> from constraint of last operand.
18817 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
18818 TARGET_AVX2 and V4DFmode not in the split condition, but in the
18819 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
18821 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
18824 * ipa-cp.c (get_info_about_necessary_edges): Remove value
18827 2020-01-24 Jeff Law <law@redhat.com>
18829 PR tree-optimization/92788
18830 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
18833 2020-01-24 Jakub Jelinek <jakub@redhat.com>
18836 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
18837 *avx_vperm_broadcast_<mode>,
18838 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
18839 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
18840 Move before avx2_perm<mode>/avx512f_perm<mode>.
18843 * simplify-rtx.c (simplify_const_unary_operation,
18844 simplify_const_binary_operation): Punt for mode precision above
18845 MAX_BITSIZE_MODE_ANY_INT.
18847 2020-01-24 Andrew Pinski <apinski@marvell.com>
18849 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
18850 alu.shift_reg to 0.
18852 2020-01-24 Jeff Law <law@redhat.com>
18855 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
18856 for REGs. Call output_operand_lossage to get more reasonable
18859 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
18861 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
18862 gcn_fp_compare_operator.
18863 (vec_cmpu<mode>di): Use gcn_compare_operator.
18864 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
18865 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
18866 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
18867 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
18868 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
18869 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
18870 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
18871 gcn_fp_compare_operator.
18872 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
18873 gcn_fp_compare_operator.
18874 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
18875 gcn_fp_compare_operator.
18876 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
18877 gcn_fp_compare_operator.
18879 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
18881 * doc/install.texi (Cross-Compiler-Specific Options): Document
18882 `--with-toolexeclibdir' option.
18884 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
18886 * target.def (flags_regnum): Also mention effect on delay slot filling.
18887 * doc/tm.texi: Regenerate.
18889 2020-01-23 Jeff Law <law@redhat.com>
18891 PR translation/90162
18892 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
18894 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
18897 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
18900 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18902 PR rtl-optimization/93402
18903 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
18906 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18908 * config.in: Regenerated.
18909 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
18910 for TARGET_LIBC_GNUSTACK.
18911 * configure: Regenerated.
18912 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
18913 found to be 2.31 or greater.
18915 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18917 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
18919 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
18920 (mips_asm_file_end): New function. Delegate to
18921 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
18922 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
18924 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18927 * config/i386/i386-modes.def (POImode): New mode.
18928 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
18929 * config/i386/i386.md (DPWI): New mode attribute.
18930 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
18931 (QWI): Rename to...
18932 (QPWI): ... this. Use POI instead of OI for TImode.
18933 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
18934 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
18937 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18940 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
18942 (speculation_tracker_rev): New pattern.
18943 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
18944 Use speculation_tracker_rev to track the inverse condition.
18946 2020-01-23 Richard Biener <rguenther@suse.de>
18948 PR tree-optimization/93381
18949 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
18950 alias-set of the def as argument and record the first one.
18951 (vn_walk_cb_data::first_set): New member.
18952 (vn_reference_lookup_3): Pass the alias-set of the current def
18953 to push_partial_def. Fix alias-set used in the aggregate copy
18955 (vn_reference_lookup): Consistently set *last_vuse_ptr.
18956 * real.c (clear_significand_below): Fix out-of-bound access.
18958 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18961 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
18962 New define_insn patterns.
18964 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18966 * doc/sourcebuild.texi (check-function-bodies): Add an
18967 optional target/xfail selector.
18969 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18971 PR rtl-optimization/93124
18972 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
18973 bare USE and CLOBBER insns.
18975 2020-01-22 Andrew Pinski <apinski@marvell.com>
18977 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
18979 2020-01-22 David Malcolm <dmalcolm@redhat.com>
18982 * gdbinit.in (break-on-saved-diagnostic): Update for move of
18983 diagnostic_manager into "ana" namespace.
18984 * selftest-run-tests.c (selftest::run_tests): Update for move of
18985 selftest::run_analyzer_selftests to
18986 ana::selftest::run_analyzer_selftests.
18988 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
18990 * cfgexpand.c (union_stack_vars): Update the size.
18992 2020-01-22 Richard Biener <rguenther@suse.de>
18994 PR tree-optimization/93381
18995 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
18996 throughout, handle all conversions the same.
18998 2020-01-22 Jakub Jelinek <jakub@redhat.com>
19001 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
19002 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
19003 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
19004 Call force_reg on high_in2 unconditionally.
19006 2020-01-22 Martin Liska <mliska@suse.cz>
19008 PR tree-optimization/92924
19009 * profile.c (compute_value_histograms): Divide
19010 all counter values.
19012 2020-01-22 Jakub Jelinek <jakub@redhat.com>
19015 * output.h (assemble_name_resolve): Declare.
19016 * varasm.c (assemble_name_resolve): New function.
19017 (assemble_name): Use it.
19018 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
19020 2020-01-22 Joseph Myers <joseph@codesourcery.com>
19022 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
19023 update_web_docs_git instead of update_web_docs_svn.
19025 2020-01-21 Andrew Pinski <apinski@marvell.com>
19028 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
19029 as PTR mode. Have operand 1 as being modeless, it can be P mode.
19030 (*tlsgd_small_<mode>): Likewise.
19031 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
19032 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
19033 register. Convert that register back to dest using convert_mode.
19035 2020-01-21 Jim Wilson <jimw@sifive.com>
19037 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
19040 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
19041 Uros Bizjak <ubizjak@gmail.com>
19044 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
19046 (legitimize_tls_address): Do GNU2 TLS address computation in
19047 ptr_mode and zero-extend result to Pmode.
19048 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
19049 :P with :PTR and Pmode with ptr_mode.
19050 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
19051 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
19052 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
19054 2020-01-21 Jakub Jelinek <jakub@redhat.com>
19057 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
19058 the last two operands are CONST_INT_P before using them as such.
19060 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
19062 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
19063 to get the integer element types.
19065 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
19067 * config/aarch64/aarch64-sve-builtins.h
19068 (function_expander::convert_to_pmode): Declare.
19069 * config/aarch64/aarch64-sve-builtins.cc
19070 (function_expander::convert_to_pmode): New function.
19071 (function_expander::get_contiguous_base): Use it.
19072 (function_expander::prepare_gather_address_operands): Likewise.
19073 * config/aarch64/aarch64-sve-builtins-sve2.cc
19074 (svwhilerw_svwhilewr_impl::expand): Likewise.
19076 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
19079 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
19080 cfun->machine->label_is_assembled.
19081 (aarch64_print_patchable_function_entry): New.
19082 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
19083 * config/aarch64/aarch64.h (struct machine_function): New field,
19084 label_is_assembled.
19086 2020-01-21 David Malcolm <dmalcolm@redhat.com>
19089 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
19092 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19095 * cgraph.c (cgraph_edge::resolve_speculation,
19096 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
19097 call_stmt_site_hash.
19099 2020-01-21 Martin Liska <mliska@suse.cz>
19101 * config/rs6000/rs6000.c (common_mode_defined): Remove
19104 2020-01-21 Richard Biener <rguenther@suse.de>
19106 PR tree-optimization/92328
19107 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
19108 type when value-numbering same-sized store by inserting a
19110 (eliminate_dom_walker::eliminate_stmt): When eliminating
19111 a redundant store handle bit-reinterpretation of the same value.
19113 2020-01-21 Andrew Pinski <apinski@marvel.com>
19116 * tree-into-ssa.c (prepare_block_for_update_1): Split out
19118 (prepare_block_for_update): This. Use a worklist instead of
19121 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19123 * config/arm/arm.c (clear_operation_p):
19124 Initialise last_regno, skip first iteration
19125 based on the first_set value and use ints instead
19126 of the unnecessary HOST_WIDE_INTs.
19128 2020-01-21 Jakub Jelinek <jakub@redhat.com>
19131 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
19132 compare_mode other than SFmode or DFmode.
19134 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
19137 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
19138 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
19139 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
19141 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
19143 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
19145 2020-01-20 Andrew Pinski <apinski@marvell.com>
19147 PR middle-end/93242
19148 * targhooks.c (default_print_patchable_function_entry): Use
19149 output_asm_insn to emit the nop instruction.
19151 2020-01-20 Fangrui Song <maskray@google.com>
19153 PR middle-end/93194
19154 * targhooks.c (default_print_patchable_function_entry): Align to
19157 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
19160 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
19161 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
19162 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
19163 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
19164 (*tls_dynamic_gnu2_lea_64): Renamed to ...
19165 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
19166 Remove the {q} suffix from lea.
19167 (*tls_dynamic_gnu2_call_64): Renamed to ...
19168 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
19169 (*tls_dynamic_gnu2_combine_64): Renamed to ...
19170 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
19171 Pass Pmode to gen_tls_dynamic_gnu2_64.
19173 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
19175 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
19177 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
19179 * config/aarch64/aarch64-sve-builtins-base.cc
19180 (svld1ro_impl::memory_vector_mode): Remove parameter name.
19182 2020-01-20 Richard Biener <rguenther@suse.de>
19185 * dwarf2out.c (prune_unused_types): Unconditionally mark
19186 called function DIEs.
19188 2020-01-20 Martin Liska <mliska@suse.cz>
19190 PR tree-optimization/93199
19191 * tree-eh.c (struct leh_state): Add
19192 new field outer_non_cleanup.
19193 (cleanup_is_dead_in): Pass leh_state instead
19194 of eh_region. Add a checking that state->outer_non_cleanup
19195 points to outer non-clean up region.
19196 (lower_try_finally): Record outer_non_cleanup
19198 (lower_catch): Likewise.
19199 (lower_eh_filter): Likewise.
19200 (lower_eh_must_not_throw): Likewise.
19201 (lower_cleanup): Likewise.
19203 2020-01-20 Richard Biener <rguenther@suse.de>
19205 PR tree-optimization/93094
19206 * tree-vectorizer.h (vect_loop_versioning): Adjust.
19207 (vect_transform_loop): Likewise.
19208 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
19209 loop_vectorized_call to vect_transform_loop.
19210 * tree-vect-loop.c (vect_transform_loop): Pass down
19211 loop_vectorized_call to vect_loop_versioning.
19212 * tree-vect-loop-manip.c (vect_loop_versioning): Use
19213 the earlier discovered loop_vectorized_call.
19215 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
19217 * doc/contribute.texi: Update for SVN -> Git transition.
19218 * doc/install.texi: Likewise.
19220 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19223 * cgraph.c (cgraph_edge::make_speculative): Increase number of
19224 speculative targets.
19225 (verify_speculative_call): New function
19226 (cgraph_node::verify_node): Use it.
19227 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
19230 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19233 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
19234 (cgraph_edge::make_direct): Remove all indirect targets.
19235 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
19236 (cgraph_node::verify_node): Verify that only one call_stmt or
19237 lto_stmt_uid is set.
19238 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
19240 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
19241 (lto_output_ref): Simplify streaming of stmt.
19242 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
19244 2020-01-18 Tamar Christina <tamar.christina@arm.com>
19246 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
19247 Mark parameter unused.
19249 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
19251 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
19253 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
19255 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
19257 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
19259 * Makefile.in: Add coroutine-passes.o.
19260 * builtin-types.def (BT_CONST_SIZE): New.
19261 (BT_FN_BOOL_PTR): New.
19262 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
19263 * builtins.def (DEF_COROUTINE_BUILTIN): New.
19264 * coroutine-builtins.def: New file.
19265 * coroutine-passes.cc: New file.
19266 * function.h (struct GTY function): Add a bit to indicate that the
19267 function is a coroutine component.
19268 * internal-fn.c (expand_CO_FRAME): New.
19269 (expand_CO_YIELD): New.
19270 (expand_CO_SUSPN): New.
19271 (expand_CO_ACTOR): New.
19272 * internal-fn.def (CO_ACTOR): New.
19276 * passes.def: Add pass_coroutine_lower_builtins,
19277 pass_coroutine_early_expand_ifns.
19278 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
19279 (make_pass_coroutine_early_expand_ifns): New.
19280 * doc/invoke.texi: Document the fcoroutines command line
19283 2020-01-18 Jakub Jelinek <jakub@redhat.com>
19285 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
19288 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
19289 after checking the argument is a REG. Don't use REGNO (reg)
19290 again to set last_regno, reuse regno variable instead.
19292 2020-01-17 David Malcolm <dmalcolm@redhat.com>
19294 * doc/analyzer.texi (Limitations): Add note about NaN.
19296 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19297 Sudakshina Das <sudi.das@arm.com>
19299 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
19300 and valid immediate.
19301 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
19302 (lshrdi3): Generate thumb2_lsrl for valid immediates.
19303 * config/arm/constraints.md (Pg): New.
19304 * config/arm/predicates.md (long_shift_imm): New.
19305 (arm_reg_or_long_shift_imm): Likewise.
19306 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
19307 (thumb2_lsll): Likewise.
19308 (thumb2_lsrl): New.
19310 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19311 Sudakshina Das <sudi.das@arm.com>
19313 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
19314 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
19315 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
19316 register pairs for doubleword quantities for ARMv8.1M-Mainline.
19317 * config/arm/thumb2.md (thumb2_asrl): New.
19318 (thumb2_lsll): Likewise.
19320 2020-01-17 Jakub Jelinek <jakub@redhat.com>
19322 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
19325 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
19327 * gdbinit.in (help-gcc-hooks): New command.
19328 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
19329 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
19332 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
19334 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
19335 correct target macro.
19337 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
19339 * config/aarch64/aarch64-protos.h
19340 (aarch64_sve_ld1ro_operand_p): New.
19341 * config/aarch64/aarch64-sve-builtins-base.cc
19342 (class load_replicate): New.
19343 (class svld1ro_impl): New.
19344 (class svld1rq_impl): Change to inherit from load_replicate.
19345 (svld1ro): New sve intrinsic function base.
19346 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
19347 New DEF_SVE_FUNCTION.
19348 * config/aarch64/aarch64-sve-builtins-base.h
19349 (svld1ro): New decl.
19350 * config/aarch64/aarch64-sve-builtins.cc
19351 (function_expander::add_mem_operand): Modify assert to allow
19353 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
19355 * config/aarch64/aarch64.c
19356 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
19357 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
19358 (aarch64_sve_ld1ro_operand_p): New.
19359 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
19360 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
19361 * config/aarch64/predicates.md
19362 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
19364 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
19366 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
19367 Introduce this ACLE specified predefined macro.
19368 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
19369 (fp): Disabling this disables f64mm.
19370 (simd): Disabling this disables f64mm.
19371 (fp16): Disabling this disables f64mm.
19372 (sve): Disabling this disables f64mm.
19373 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
19374 (AARCH64_ISA_F64MM): New.
19375 (TARGET_F64MM): New.
19376 * doc/invoke.texi (f64mm): Document new option.
19378 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
19380 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
19381 (neoversen1_tunings): Likewise.
19383 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
19386 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
19387 Add assert to ensure prolog has been emitted.
19388 (aarch64_split_atomic_op): Likewise.
19389 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
19390 Use epilogue_completed rather than reload_completed.
19391 (aarch64_atomic_exchange<mode>): Likewise.
19392 (aarch64_atomic_<atomic_optab><mode>): Likewise.
19393 (atomic_nand<mode>): Likewise.
19394 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
19395 (atomic_fetch_nand<mode>): Likewise.
19396 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
19397 (atomic_nand_fetch<mode>): Likewise.
19399 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
19402 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
19404 (REVERSE_CONDITION): Delete.
19405 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
19406 (CCFP_CCFPE): Likewise.
19407 (e): New mode attribute.
19408 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
19409 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
19410 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
19411 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
19412 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
19413 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
19414 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
19415 name of generator from gen_ccmpdi to gen_ccmpccdi.
19416 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
19417 the previous comparison but aren't able to, use the new ccmp_rev
19420 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
19422 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
19423 than testing directly for INTEGER_CST.
19424 (gimplify_target_expr, gimplify_omp_depend): Likewise.
19426 2020-01-17 Jakub Jelinek <jakub@redhat.com>
19428 PR tree-optimization/93292
19429 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
19430 get_vectype_for_scalar_type returns NULL.
19432 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
19434 * params.opt (-param=max-predicted-iterations): Increase range from 0.
19435 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
19437 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
19439 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
19441 * params.opt: (max-predicted-iterations): Set bounds.
19442 * predict.c (real_almost_one, real_br_prob_base,
19443 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
19444 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
19445 probabilities; do not truncate to reg_br_prob_bases.
19446 (estimate_loops_at_level): Pass max_cyclic_prob.
19447 (estimate_loops): Compute max_cyclic_prob.
19448 (estimate_bb_frequencies): Do not initialize real_*; update calculation
19450 * profile-count.c (profile_probability::to_sreal): New.
19451 * profile-count.h (class sreal): Move up in file.
19452 (profile_probability::to_sreal): Declare.
19454 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19457 (arm_invalid_conversion): New function for target hook.
19458 (arm_invalid_unary_op): New function for target hook.
19459 (arm_invalid_binary_op): New function for target hook.
19461 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19463 * config.gcc: Add arm_bf16.h.
19464 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
19465 (arm_simd_builtin_std_type): Add BFmode.
19466 (arm_init_simd_builtin_types): Define element types for vector types.
19467 (arm_init_bf16_types): New function.
19468 (arm_init_builtins): Add arm_init_bf16_types function call.
19469 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
19470 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
19471 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
19472 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
19473 (arm_vector_mode_supported_p): Add V4BF, V8BF.
19474 (arm_mangle_type): Add __bf16.
19475 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
19476 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
19477 arm_bf16_ptr_type_node.
19478 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
19479 define_split between ARM registers.
19480 * config/arm/arm_bf16.h: New file.
19481 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
19482 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
19483 (VQXMOV): Add V8BF.
19484 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
19485 * config/arm/vfp.md: Add BFmode to movhf patterns.
19487 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
19488 Andre Vieira <andre.simoesdiasvieira@arm.com>
19490 * config/arm/arm-cpus.in (mve, mve_float): New features.
19491 (dsp, mve, mve.fp): New options.
19492 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
19493 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
19494 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
19496 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19497 Thomas Preud'homme <thomas.preudhomme@arm.com>
19499 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
19501 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
19502 error for using -mcmse when targeting Armv8.1-M Mainline.
19504 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19505 Thomas Preud'homme <thomas.preudhomme@arm.com>
19507 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
19508 address in r4 when targeting Armv8.1-M Mainline.
19509 (nonsecure_call_value_internal): Likewise.
19510 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
19511 a register match_operand again. Emit BLXNS when targeting
19512 Armv8.1-M Mainline.
19513 (nonsecure_call_value_reg_thumb2): Likewise.
19515 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19516 Thomas Preud'homme <thomas.preudhomme@arm.com>
19518 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
19519 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
19520 variable as true when floating-point ABI is not hard. Replace
19521 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
19522 Generate VLSTM and VLLDM instruction respectively before and
19523 after a function call to cmse_nonsecure_call function.
19524 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
19525 (VUNSPEC_VLLDM): Likewise.
19526 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
19527 (lazy_load_multiple_insn): Likewise.
19529 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19530 Thomas Preud'homme <thomas.preudhomme@arm.com>
19532 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
19533 (arm_emit_vfp_multi_reg_pop): Likewise.
19534 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
19535 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
19536 restore callee-saved VFP registers.
19538 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19539 Thomas Preud'homme <thomas.preudhomme@arm.com>
19541 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
19542 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
19543 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
19544 callee-saved GPRs as well as clear ip register before doing a nonsecure
19545 call then restore callee-saved GPRs after it when targeting
19546 Armv8.1-M Mainline.
19547 (arm_reorg): Adapt to function rename.
19549 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19550 Thomas Preud'homme <thomas.preudhomme@arm.com>
19552 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
19553 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
19554 clear_vfp_multiple pattern based on a new vfp parameter.
19555 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
19556 targeting Armv8.1-M Mainline.
19557 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
19558 unconditionally when targeting Armv8.1-M Mainline architecture. Check
19559 whether VFP registers are available before looking call_used_regs for a
19561 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
19562 of prototype of clear_operation_p.
19563 (clear_vfp_multiple_operation): New predicate.
19564 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
19565 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
19567 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19568 Thomas Preud'homme <thomas.preudhomme@arm.com>
19570 * config/arm/arm-protos.h (clear_operation_p): Declare.
19571 * config/arm/arm.c (clear_operation_p): New function.
19572 (cmse_clear_registers): Generate clear_multiple instruction pattern if
19573 targeting Armv8.1-M Mainline or successor.
19574 (output_return_instruction): Only output APSR register clearing if
19575 Armv8.1-M Mainline instructions not available.
19576 (thumb_exit): Likewise.
19577 * config/arm/predicates.md (clear_multiple_operation): New predicate.
19578 * config/arm/thumb2.md (clear_apsr): New define_insn.
19579 (clear_multiple): Likewise.
19580 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
19582 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19583 Thomas Preud'homme <thomas.preudhomme@arm.com>
19585 * config/arm/arm.c (fp_sysreg_names): Declare and define.
19586 (use_return_insn): Also return false for Armv8.1-M Mainline.
19587 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
19588 Mainline instructions are available.
19589 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
19590 when targeting Armv8.1-M Mainline Security Extensions.
19591 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
19592 Mainline entry function.
19593 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
19594 targeting Armv8.1-M Mainline or successor.
19595 (arm_expand_epilogue): Fix indentation of caller-saved register
19596 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
19598 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
19599 (FP_SYSREGS): Likewise.
19600 (enum vfp_sysregs_encoding): Define enum.
19601 (fp_sysreg_names): Declare.
19602 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
19603 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
19604 (pop_fpsysreg_insn): Likewise.
19606 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19607 Thomas Preud'homme <thomas.preudhomme@arm.com>
19609 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
19610 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
19611 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
19612 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
19613 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
19614 (ARMv8_1m_main): New feature group.
19615 (armv8.1-m.main): New architecture.
19616 * config/arm/arm-tables.opt: Regenerate.
19617 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
19618 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
19619 (arm_options_perform_arch_sanity_checks): Error out when targeting
19620 Armv8.1-M Mainline Security Extensions.
19621 * config/arm/arm.h (arm_arch8_1m_main): Declare.
19623 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19625 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
19626 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
19627 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
19628 aarch64_bfdot_laneq): New.
19629 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
19630 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
19631 vbfdotq_laneq_f32): New.
19632 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
19633 VBFMLA_W, VBF): New.
19634 (isquadop): Add V4BF, V8BF.
19636 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19638 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
19639 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
19640 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
19641 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
19642 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
19643 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
19644 usdot_laneq, sudot_lane,sudot_laneq): New.
19645 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
19646 (aarch64_<sur>dot_lane): New.
19647 * config/aarch64/arm_neon.h (vusdot_s32): New.
19648 (vusdotq_s32): New.
19649 (vusdot_lane_s32): New.
19650 (vsudot_lane_s32): New.
19651 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
19652 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
19654 2020-01-16 Martin Liska <mliska@suse.cz>
19656 * value-prof.c (dump_histogram_value): Fix
19657 obvious spacing issue.
19659 2020-01-16 Andrew Pinski <apinski@marvell.com>
19661 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
19662 !storage_order_barrier_p.
19664 2020-01-16 Andrew Pinski <apinski@marvell.com>
19666 * sched-int.h (_dep): Add unused bit-field field for the padding.
19667 * sched-deps.c (init_dep_1): Init unused field.
19669 2020-01-16 Andrew Pinski <apinski@marvell.com>
19671 * optabs.h (create_expand_operand): Initialize target field also.
19673 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19675 PR tree-optimization/92429
19676 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
19677 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
19679 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
19682 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
19684 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
19685 aarch64_sve_int_mode to each mode.
19687 2020-01-15 David Malcolm <dmalcolm@redhat.com>
19689 * doc/analyzer.texi (Overview): Add note about
19690 -fdump-ipa-analyzer.
19692 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
19694 PR tree-optimization/93231
19695 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
19696 input_type is unsigned. Use tree_to_shwi for shift constant.
19697 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
19698 (simplify_count_trailing_zeroes): Add test to handle known non-zero
19699 inputs more efficiently.
19701 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
19703 * config/i386/i386.md (*movsf_internal): Do not require
19704 SSE2 ISA for alternatives 14 and 15.
19706 2020-01-15 Richard Biener <rguenther@suse.de>
19708 PR middle-end/93273
19709 * tree-eh.c (sink_clobbers): If we already visited the destination
19710 block do not defer insertion.
19711 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
19712 the purpose of defered insertion.
19714 2020-01-15 Jakub Jelinek <jakub@redhat.com>
19716 * BASE-VER: Bump to 10.0.1.
19718 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
19720 PR tree-optimization/93247
19721 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
19722 type of the stmt that we're going to vectorize.
19724 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
19726 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
19727 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
19730 2020-01-15 Martin Liska <mliska@suse.cz>
19732 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
19733 2 calls of streamer_read_hwi in a function call.
19735 2020-01-15 Richard Biener <rguenther@suse.de>
19737 * alias.c (record_alias_subset): Avoid redundant work when
19738 subset is already recorded.
19740 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19742 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
19743 the analyzer options provide CWE identifiers.
19745 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19747 * tree-diagnostic-path.cc (path_summary::event_range::print):
19748 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
19749 using get_pure_location.
19751 2020-01-15 Jakub Jelinek <jakub@redhat.com>
19753 PR tree-optimization/93262
19754 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
19755 perform head trimming only if the last argument is constant,
19756 either all ones, or larger or equal to head trim, in the latter
19757 case decrease the last argument by head_trim.
19759 PR tree-optimization/93249
19760 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
19761 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
19762 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
19763 perform head trim unless we can prove there are no '\0' chars
19764 from the source among the first head_trim chars.
19766 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19768 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
19770 2020-01-15 Jakub Jelinek <jakub@redhat.com>
19773 * config/i386/sse.md
19774 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
19775 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
19776 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
19777 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
19778 just a single alternative instead of two, make operands 1 and 2
19781 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
19784 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
19787 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19789 * Makefile.in (lang_opt_files): Add analyzer.opt.
19790 (ANALYZER_OBJS): New.
19791 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
19792 tristate.o and ANALYZER_OBJS.
19793 (TEXI_GCCINT_FILES): Add analyzer.texi.
19794 * common.opt (-fanalyzer): New driver option.
19795 * config.in: Regenerate.
19796 * configure: Regenerate.
19797 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
19798 (gccdepdir): Also create depdir for "analyzer" subdir.
19799 * digraph.cc: New file.
19800 * digraph.h: New file.
19801 * doc/analyzer.texi: New file.
19802 * doc/gccint.texi ("Static Analyzer") New menu item.
19803 (analyzer.texi): Include it.
19804 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
19805 ("Warning Options"): Add static analysis warnings to the list.
19806 (-Wno-analyzer-double-fclose): New option.
19807 (-Wno-analyzer-double-free): New option.
19808 (-Wno-analyzer-exposure-through-output-file): New option.
19809 (-Wno-analyzer-file-leak): New option.
19810 (-Wno-analyzer-free-of-non-heap): New option.
19811 (-Wno-analyzer-malloc-leak): New option.
19812 (-Wno-analyzer-possible-null-argument): New option.
19813 (-Wno-analyzer-possible-null-dereference): New option.
19814 (-Wno-analyzer-null-argument): New option.
19815 (-Wno-analyzer-null-dereference): New option.
19816 (-Wno-analyzer-stale-setjmp-buffer): New option.
19817 (-Wno-analyzer-tainted-array-index): New option.
19818 (-Wno-analyzer-use-after-free): New option.
19819 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
19820 (-Wno-analyzer-use-of-uninitialized-value): New option.
19821 (-Wanalyzer-too-complex): New option.
19822 (-fanalyzer-call-summaries): New warning.
19823 (-fanalyzer-checker=): New warning.
19824 (-fanalyzer-fine-grained): New warning.
19825 (-fno-analyzer-state-merge): New warning.
19826 (-fno-analyzer-state-purge): New warning.
19827 (-fanalyzer-transitivity): New warning.
19828 (-fanalyzer-verbose-edges): New warning.
19829 (-fanalyzer-verbose-state-changes): New warning.
19830 (-fanalyzer-verbosity=): New warning.
19831 (-fdump-analyzer): New warning.
19832 (-fdump-analyzer-callgraph): New warning.
19833 (-fdump-analyzer-exploded-graph): New warning.
19834 (-fdump-analyzer-exploded-nodes): New warning.
19835 (-fdump-analyzer-exploded-nodes-2): New warning.
19836 (-fdump-analyzer-exploded-nodes-3): New warning.
19837 (-fdump-analyzer-supergraph): New warning.
19838 * doc/sourcebuild.texi (dg-require-dot): New.
19839 (dg-check-dot): New.
19840 * gdbinit.in (break-on-saved-diagnostic): New command.
19841 * graphviz.cc: New file.
19842 * graphviz.h: New file.
19843 * ordered-hash-map-tests.cc: New file.
19844 * ordered-hash-map.h: New file.
19845 * passes.def (pass_analyzer): Add before
19846 pass_ipa_whole_program_visibility.
19847 * selftest-run-tests.c (selftest::run_tests): Call
19848 selftest::ordered_hash_map_tests_cc_tests.
19849 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
19851 * shortest-paths.h: New file.
19852 * timevar.def (TV_ANALYZER): New timevar.
19853 (TV_ANALYZER_SUPERGRAPH): Likewise.
19854 (TV_ANALYZER_STATE_PURGE): Likewise.
19855 (TV_ANALYZER_PLAN): Likewise.
19856 (TV_ANALYZER_SCC): Likewise.
19857 (TV_ANALYZER_WORKLIST): Likewise.
19858 (TV_ANALYZER_DUMP): Likewise.
19859 (TV_ANALYZER_DIAGNOSTICS): Likewise.
19860 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
19861 * tree-pass.h (make_pass_analyzer): New decl.
19862 * tristate.cc: New file.
19863 * tristate.h: New file.
19865 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
19868 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
19869 alternatives 9 and 10.
19871 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19873 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
19874 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
19875 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
19876 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
19877 (selftest::hash_map_tests_c_tests): Call it.
19878 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
19879 New static constant, using the value of = H::empty_zero_p.
19880 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
19881 from default_hash_traits <Value>.
19882 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
19884 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
19885 * hash-table.h (hash_table::alloc_entries): Guard the loop of
19886 calls to mark_empty with !Descriptor::empty_zero_p.
19887 (hash_table::empty_slow): Conditionalize the memset call with a
19888 check that Descriptor::empty_zero_p; otherwise, loop through the
19889 entries calling mark_empty on them.
19890 * hash-traits.h (int_hash::empty_zero_p): New static constant.
19891 (pointer_hash::empty_zero_p): Likewise.
19892 (pair_hash::empty_zero_p): Likewise.
19893 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
19895 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
19896 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
19897 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
19898 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
19899 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
19900 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
19901 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
19902 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
19903 * tree-vectorizer.h
19904 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
19907 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
19909 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
19910 fix typo on return value.
19912 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
19915 * cgraph.c (symbol_table::create_edge): Init speculative_id and
19917 (cgraph_edge::make_speculative): Add param for setting speculative_id
19919 (cgraph_edge::speculative_call_info): Update comments and find reference
19920 by speculative_id for multiple indirect targets.
19921 (cgraph_edge::resolve_speculation): Decrease the speculations
19922 for indirect edge, drop it's speculative if not direct target
19923 left. Update comments.
19924 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
19925 (cgraph_node::dump): Print num_speculative_call_targets.
19926 (cgraph_node::verify_node): Don't report error if speculative
19927 edge not include statement.
19928 (cgraph_edge::num_speculative_call_targets_p): New function.
19929 * cgraph.h (int common_target_id): Remove.
19930 (int common_target_probability): Remove.
19931 (num_speculative_call_targets): New variable.
19932 (make_speculative): Add param for setting speculative_id.
19933 (cgraph_edge::num_speculative_call_targets_p): New declare.
19934 (target_prob): New variable.
19935 (speculative_id): New variable.
19936 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
19937 call summaries for multiple speculative call targets.
19938 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
19939 * ipa-profile.c (struct speculative_call_target): New struct.
19940 (class speculative_call_summary): New class.
19941 (class speculative_call_summaries): New class.
19942 (call_sums): New variable.
19943 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
19944 (ipa_profile_write_edge_summary): New function.
19945 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
19946 (ipa_profile_dump_all_summaries): New function.
19947 (ipa_profile_read_edge_summary): New function.
19948 (ipa_profile_read_summary_section): New function.
19949 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
19950 (ipa_profile): Generate num_speculative_call_targets from
19952 * ipa-ref.h (speculative_id): New variable.
19953 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
19954 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
19955 common_target_probability. Stream out speculative_id and
19956 num_speculative_call_targets.
19957 (input_edge): Likewise.
19958 * predict.c (dump_prediction): Remove edges count assert to be
19960 * symtab.c (symtab_node::create_reference): Init speculative_id.
19961 (symtab_node::clone_references): Clone speculative_id.
19962 (symtab_node::clone_referring): Clone speculative_id.
19963 (symtab_node::clone_reference): Clone speculative_id.
19964 (symtab_node::clear_stmts_in_references): Clear speculative_id.
19965 * tree-inline.c (copy_bb): Duplicate all the speculative edges
19966 if indirect call contains multiple speculative targets.
19967 * value-prof.h (check_ic_target): Remove.
19968 * value-prof.c (gimple_value_profile_transformations):
19969 Use void function gimple_ic_transform.
19970 * value-prof.c (gimple_ic_transform): Handle topn case.
19971 Fix comment typos. Change it to a void function.
19973 2020-01-13 Andrew Pinski <apinski@marvell.com>
19975 * config/aarch64/aarch64-cores.def (octeontx2): New define.
19976 (octeontx2t98): New define.
19977 (octeontx2t96): New define.
19978 (octeontx2t93): New define.
19979 (octeontx2f95): New define.
19980 (octeontx2f95n): New define.
19981 (octeontx2f95mm): New define.
19982 * config/aarch64/aarch64-tune.md: Regenerate.
19983 * doc/invoke.texi (-mcpu=): Document the new cpu types.
19985 2020-01-13 Jason Merrill <jason@redhat.com>
19987 PR c++/33799 - destroy return value if local cleanup throws.
19988 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
19990 2020-01-13 Martin Liska <mliska@suse.cz>
19992 * ipa-cp.c (get_max_overall_size): Use newly
19993 renamed param param_ipa_cp_unit_growth.
19994 * params.opt: Remove legacy param name.
19996 2020-01-13 Martin Sebor <msebor@redhat.com>
19998 PR tree-optimization/93213
19999 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
20000 stores to be eliminated.
20002 2020-01-13 Martin Liska <mliska@suse.cz>
20004 * opts.c (print_help): Do not print CL_PARAM
20005 and CL_WARNING for CL_OPTIMIZATION.
20007 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
20010 * doc/invoke.texi (Warning Options): Add caveat about some warnings
20011 depending on optimization settings.
20013 2020-01-13 Jakub Jelinek <jakub@redhat.com>
20015 PR tree-optimization/90838
20016 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
20017 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
20018 argument rather than to initialize temporary for targets that
20019 don't use the mode argument at all. Initialize ctzval to avoid
20022 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
20024 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
20025 * tree-core.h: Document it.
20026 * gimplify.c (gimplify_omp_workshare): Set it.
20027 * omp-low.c (lower_omp_target): Use it.
20028 * tree-pretty-print.c (dump_omp_clause): Print it.
20030 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
20031 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
20033 2020-01-10 David Malcolm <dmalcolm@redhat.com>
20035 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
20036 * common.opt (fdiagnostics-path-format=): New option.
20037 (diagnostic_path_format): New enum.
20038 (fdiagnostics-show-path-depths): New option.
20039 * coretypes.h (diagnostic_event_id_t): New forward decl.
20040 * diagnostic-color.c (color_dict): Add "path".
20041 * diagnostic-event-id.h: New file.
20042 * diagnostic-format-json.cc (json_from_expanded_location): Make
20044 (json_end_diagnostic): Call context->make_json_for_path if it
20045 exists and the diagnostic has a path.
20046 (diagnostic_output_format_init): Clear context->print_path.
20047 * diagnostic-path.h: New file.
20048 * diagnostic-show-locus.c (colorizer::set_range): Special-case
20049 when printing a run of events in a diagnostic_path so that they
20050 all get the same color.
20051 (layout::m_diagnostic_path_p): New field.
20052 (layout::layout): Initialize it.
20053 (layout::print_any_labels): Don't colorize the label text for an
20054 event in a diagnostic_path.
20055 (gcc_rich_location::add_location_if_nearby): Add
20056 "restrict_to_current_line_spans" and "label" params. Pass the
20057 former to layout.maybe_add_location_range; pass the latter
20058 when calling add_range.
20059 * diagnostic.c: Include "diagnostic-path.h".
20060 (diagnostic_initialize): Initialize context->path_format and
20061 context->show_path_depths.
20062 (diagnostic_show_any_path): New function.
20063 (diagnostic_path::interprocedural_p): New function.
20064 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
20065 (simple_diagnostic_path::num_events): New function.
20066 (simple_diagnostic_path::get_event): New function.
20067 (simple_diagnostic_path::add_event): New function.
20068 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
20069 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
20070 (debug): New overload taking a diagnostic_path *.
20071 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
20072 * diagnostic.h (enum diagnostic_path_format): New enum.
20073 (json::value): New forward decl.
20074 (diagnostic_context::path_format): New field.
20075 (diagnostic_context::show_path_depths): New field.
20076 (diagnostic_context::print_path): New callback field.
20077 (diagnostic_context::make_json_for_path): New callback field.
20078 (diagnostic_show_any_path): New decl.
20079 (json_from_expanded_location): New decl.
20080 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
20081 (-fdiagnostics-show-path-depths): New option.
20082 (-fdiagnostics-color): Add "path" to description of default
20083 GCC_COLORS; describe it.
20084 (-fdiagnostics-format=json): Document how diagnostic paths are
20085 represented in the JSON output format.
20086 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
20087 Add optional params "restrict_to_current_line_spans" and "label".
20088 * opts.c (common_handle_option): Handle
20089 OPT_fdiagnostics_path_format_ and
20090 OPT_fdiagnostics_show_path_depths.
20091 * pretty-print.c: Include "diagnostic-event-id.h".
20092 (pp_format): Implement "%@" format code for printing
20093 diagnostic_event_id_t *.
20094 (selftest::test_pp_format): Add tests for "%@".
20095 * selftest-run-tests.c (selftest::run_tests): Call
20096 selftest::tree_diagnostic_path_cc_tests.
20097 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
20098 * toplev.c (general_init): Initialize global_dc->path_format and
20099 global_dc->show_path_depths.
20100 * tree-diagnostic-path.cc: New file.
20101 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
20102 non-static. Drop "diagnostic" param in favor of storing the
20103 original value of "where" and re-using it.
20104 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
20105 maybe_unwind_expanded_macro_loc.
20106 (tree_diagnostics_defaults): Initialize context->print_path and
20107 context->make_json_for_path.
20108 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
20110 (default_tree_make_json_for_path): New decl.
20111 (maybe_unwind_expanded_macro_loc): New decl.
20113 2020-01-10 Jakub Jelinek <jakub@redhat.com>
20115 PR tree-optimization/93210
20116 * fold-const.h (native_encode_initializer,
20117 can_native_interpret_type_p): Declare.
20118 * fold-const.c (native_encode_string): Fix up handling with off != -1,
20120 (native_encode_initializer): New function, moved from dwarf2out.c.
20121 Adjust to native_encode_expr compatible arguments, including dry-run
20122 and partial extraction modes. Don't handle STRING_CST.
20123 (can_native_interpret_type_p): No longer static.
20124 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
20125 offset / BITS_PER_UNIT fits into int and don't call it if
20126 can_native_interpret_type_p fails. If suboff is NULL and for
20127 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
20128 native_encode_initializer.
20129 (fold_const_aggregate_ref_1): Formatting fix.
20130 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
20131 (tree_add_const_value_attribute): Adjust caller.
20133 PR tree-optimization/90838
20134 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
20135 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
20136 CTZ_DEFINED_VALUE_AT_ZERO.
20138 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
20140 PR inline-asm/93027
20141 * lra-constraints.c (match_reload): Permit input operands have the
20142 same mode as output while other input operands have a different
20145 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
20147 PR tree-optimization/90838
20148 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
20149 (check_ctz_string): Likewise.
20150 (optimize_count_trailing_zeroes): Likewise.
20151 (simplify_count_trailing_zeroes): Likewise.
20152 (pass_forwprop::execute): Try ctz simplification.
20153 * match.pd: Add matching for ctz idioms.
20155 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20157 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
20159 (aarch64_invalid_unary_op): New function for target hook.
20160 (aarch64_invalid_binary_op): New function for target hook.
20162 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20164 * config.gcc: Add arm_bf16.h.
20165 * config/aarch64/aarch64-builtins.c
20166 (aarch64_simd_builtin_std_type): Add BFmode.
20167 (aarch64_init_simd_builtin_types): Define element types for vector
20169 (aarch64_init_bf16_types): New function.
20170 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
20171 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
20173 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
20174 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
20176 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
20177 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
20178 * config/aarch64/aarch64.c
20179 (aarch64_classify_vector_mode): Add support for BF types.
20180 (aarch64_gimplify_va_arg_expr): Add support for BF types.
20181 (aarch64_vq_mode): Add support for BF types.
20182 (aarch64_simd_container_mode): Add support for BF types.
20183 (aarch64_mangle_type): Add support for BF scalar type.
20184 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
20185 * config/aarch64/arm_bf16.h: New file.
20186 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
20187 * config/aarch64/iterators.md: Add BF types to mode attributes.
20188 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
20190 2020-01-10 Jason Merrill <jason@redhat.com>
20192 PR c++/93173 - incorrect tree sharing.
20193 * gimplify.c (copy_if_shared): No longer static.
20194 * gimplify.h: Declare it.
20196 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20198 * doc/invoke.texi (-msve-vector-bits=): Document that
20199 -msve-vector-bits=128 now generates VL-specific code for
20200 little-endian targets.
20201 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
20202 build_vector_type_for_mode to construct the data vector types.
20203 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
20204 VL-specific code for -msve-vector-bits=128 on little-endian targets.
20205 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
20206 for 128-bit vectors.
20208 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20210 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
20213 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20215 * config/aarch64/aarch64-builtins.c
20216 (aarch64_builtin_vectorized_function): Check for specific vector modes,
20217 rather than checking the number of elements and the element mode.
20219 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20221 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
20222 get_related_vectype_for_scalar_type rather than build_vector_type
20223 to create the index type for a conditional reduction.
20225 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20227 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
20228 for any type of gather or scatter, including strided accesses.
20230 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
20232 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
20235 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
20237 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
20238 get_dr_vinfo_offset
20239 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
20240 parameter and its use to reset DR_OFFSET's.
20241 (vect_transform_loop): Remove orig_drs_init argument.
20242 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
20243 member of dr_vec_info rather than the offset of the associated
20244 data_reference's innermost_loop_behavior.
20245 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
20246 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
20247 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
20248 get_dr_vinfo_offset.
20249 (vectorizable_store): Likewise.
20250 (vectorizable_load): Likewise.
20252 2020-01-10 Richard Biener <rguenther@suse.de>
20254 * gimple-ssa-store-merging
20255 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
20257 2020-01-10 Martin Liska <mliska@suse.cz>
20260 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
20261 encapsulation that was there before r280040.
20263 2020-01-10 Richard Biener <rguenther@suse.de>
20265 PR middle-end/93199
20266 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
20267 sequences to avoid walking them again for secondary opportunities.
20268 (pass_lower_eh_dispatch::execute): Instead actually insert
20271 2020-01-10 Richard Biener <rguenther@suse.de>
20273 PR middle-end/93199
20274 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
20275 (cleanup_all_empty_eh): Walk landing pads in reverse order to
20276 avoid quadraticness.
20278 2020-01-10 Martin Jambor <mjambor@suse.cz>
20280 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
20281 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
20282 to get param_ipa_sra_max_replacements.
20283 (param_splitting_across_edge): Pass the caller to
20284 pull_accesses_from_callee.
20286 2020-01-10 Martin Jambor <mjambor@suse.cz>
20288 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
20289 * ipa-cp.c (max_new_size): Removed.
20290 (orig_overall_size): New variable.
20291 (get_max_overall_size): New function.
20292 (estimate_local_effects): Use it. Adjust dump.
20293 (decide_about_value): Likewise.
20294 (ipcp_propagate_stage): Do not calculate max_new_size, just store
20295 orig_overall_size. Adjust dump.
20296 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
20298 2020-01-10 Martin Jambor <mjambor@suse.cz>
20300 * params.opt (param_ipa_max_agg_items): Mark as Optimization
20301 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
20302 instead of param_ipa_max_agg_items.
20303 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
20304 optimization info for the callee.
20306 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
20308 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
20309 markers if debug_inline_points is false.
20311 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20313 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
20315 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
20316 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
20317 aarch64-sve-builtins-sve2.h.
20318 (aarch64-sve-builtins-sve2.o): New rule.
20319 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
20320 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
20321 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
20322 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
20323 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
20324 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
20326 * config/aarch64/aarch64-sve.md: Update comments with SVE2
20327 instructions that are handled here.
20328 (@cond_asrd<mode>): Generalize to...
20329 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
20330 (*cond_asrd<mode>_2): Generalize to...
20331 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
20332 (*cond_asrd<mode>_z): Generalize to...
20333 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
20334 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
20335 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
20336 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
20337 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
20339 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
20340 (@aarch64_scatter_stnt<mode>): Likewise.
20341 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
20342 (@aarch64_mul_lane_<mode>): Likewise.
20343 (@aarch64_sve_suqadd<mode>_const): Likewise.
20344 (*<sur>h<addsub><mode>): Generalize to...
20345 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
20347 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
20348 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
20349 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
20350 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
20351 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
20352 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
20353 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
20354 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
20355 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
20356 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
20357 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
20358 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
20359 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
20360 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
20361 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
20362 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
20363 (@aarch64_sve2_xar<mode>): Likewise.
20364 (@aarch64_sve2_bcax<mode>): Likewise.
20365 (*aarch64_sve2_eor3<mode>): Rename to...
20366 (@aarch64_sve2_eor3<mode>): ...this.
20367 (@aarch64_sve2_bsl<mode>): New expander.
20368 (@aarch64_sve2_nbsl<mode>): Likewise.
20369 (@aarch64_sve2_bsl1n<mode>): Likewise.
20370 (@aarch64_sve2_bsl2n<mode>): Likewise.
20371 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
20372 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
20373 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
20374 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
20375 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
20376 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
20377 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
20378 (<su>mull<bt><Vwide>): Generalize to...
20379 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
20381 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
20382 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
20383 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
20384 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20385 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
20386 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20387 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
20388 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20389 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
20390 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20391 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
20392 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
20393 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
20394 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
20395 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
20396 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
20397 (<SHRNB:r>shrnb<mode>): Generalize to...
20398 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
20400 (<SHRNT:r>shrnt<mode>): Generalize to...
20401 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
20403 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
20404 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
20405 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
20406 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
20407 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
20408 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
20409 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
20410 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
20411 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
20412 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
20413 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
20414 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
20415 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
20416 (@aarch64_sve2_cvtnt<mode>): Likewise.
20417 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
20418 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
20419 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
20420 (@aarch64_sve2_cvtxnt<mode>): Likewise.
20421 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
20422 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
20423 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
20424 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
20425 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
20426 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
20427 (@aarch64_sve2_pmul<mode>): Likewise.
20428 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
20429 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
20430 (@aarch64_sve2_tbl2<mode>): Likewise.
20431 (@aarch64_sve2_tbx<mode>): Likewise.
20432 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
20433 (@aarch64_sve2_histcnt<mode>): Likewise.
20434 (@aarch64_sve2_histseg<mode>): Likewise.
20435 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
20436 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
20437 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
20438 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
20439 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
20440 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
20441 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
20442 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
20443 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
20444 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
20445 (SVE2_PMULL_PAIR_I): New mode iterators.
20446 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
20447 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
20448 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
20449 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
20450 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
20451 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
20452 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
20453 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
20454 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
20455 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
20456 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
20457 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
20458 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
20459 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
20460 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
20461 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
20462 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
20463 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
20464 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
20465 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
20466 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
20467 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
20468 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
20469 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
20470 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
20471 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
20472 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
20473 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
20474 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
20475 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
20476 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
20478 (VNARROW, Ventype): New mode attributes.
20479 (Vewtype): Handle VNx2DI. Fix typo in comment.
20480 (VDOUBLE): New mode attribute.
20481 (sve_lane_con): Handle VNx8HI.
20482 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
20483 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
20484 (sve_int_op, sve_int_op_rev): Handle the above codes.
20485 (sve_pred_int_rhs2_operand): Likewise.
20486 (MULLBT, SHRNB, SHRNT): Delete.
20487 (SVE_INT_SHIFT_IMM): New int iterator.
20488 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
20489 and UNSPEC_WHILEHS for TARGET_SVE2.
20490 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
20491 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
20492 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
20493 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
20494 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
20495 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
20496 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
20497 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
20498 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
20499 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
20500 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
20501 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
20502 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
20503 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
20504 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
20505 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
20506 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
20507 (optab): Handle the new unspecs.
20508 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
20510 (lr): Handle the new unspecs.
20512 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
20513 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
20514 (sve_int_qsub_op): New int attributes.
20515 (sve_fp_op, rot): Handle the new unspecs.
20516 * config/aarch64/aarch64-sve-builtins.h
20517 (function_resolver::require_matching_pointer_type): Declare.
20518 (function_resolver::resolve_unary): Add an optional boolean argument.
20519 (function_resolver::finish_opt_n_resolution): Add an optional
20520 type_suffix_index argument.
20521 (gimple_folder::redirect_call): Declare.
20522 (gimple_expander::prepare_gather_address_operands): Add an optional
20524 * config/aarch64/aarch64-sve-builtins.cc: Include
20525 aarch64-sve-builtins-sve2.h.
20526 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
20527 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
20528 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
20529 (TYPES_hsd_integer): Use TYPES_hsd_signed.
20530 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
20531 (TYPES_s_unsigned): Likewise.
20532 (TYPES_s_integer): Use TYPES_s_unsigned.
20533 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
20534 (TYPES_sd_integer): Use them.
20535 (TYPES_d_unsigned): New macro.
20536 (TYPES_d_integer): Use it.
20537 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
20538 (TYPES_cvt_narrow): Likewise.
20539 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
20540 (preds_mx): New variable.
20541 (function_builder::add_overloaded_function): Allow the new feature
20542 set to be more restrictive than the original one.
20543 (function_resolver::infer_pointer_type): Remove qualifiers from
20544 the pointer type before printing it.
20545 (function_resolver::require_matching_pointer_type): New function.
20546 (function_resolver::resolve_sv_displacement): Handle functions
20547 that don't support 32-bit vector indices or svint32_t vector offsets.
20548 (function_resolver::finish_opt_n_resolution): Take the inferred type
20549 as a separate argument.
20550 (function_resolver::resolve_unary): Optionally treat all forms in
20551 the same way as normal merging functions.
20552 (gimple_folder::redirect_call): New function.
20553 (function_expander::prepare_gather_address_operands): Add an argument
20554 that says whether scaled forms are available. If they aren't,
20555 handle scaling of vector indices and don't add the extension and
20557 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
20558 fall back to using cond_* instead.
20559 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
20560 Split out the member variables into...
20561 (rtx_code_function_base): ...this new base class.
20562 (rtx_code_function_rotated): Inherit rtx_code_function_base.
20563 (unspec_based_function): Split out the member variables into...
20564 (unspec_based_function_base): ...this new base class.
20565 (unspec_based_function_rotated): Inherit unspec_based_function_base.
20566 (unspec_based_function_exact_insn): New class.
20567 (unspec_based_add_function, unspec_based_add_lane_function)
20568 (unspec_based_lane_function, unspec_based_pred_function)
20569 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
20570 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
20571 (unspec_based_sub_function, unspec_based_sub_lane_function): New
20573 (unspec_based_fused_function): New class.
20574 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
20575 (unspec_based_fused_lane_function): New class.
20576 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
20578 (CODE_FOR_MODE1): New macro.
20579 (fixed_insn_function): New class.
20580 (while_comparison): Likewise.
20581 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
20582 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
20583 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
20584 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
20585 (load_gather_sv_restricted, shift_left_imm_long): Declare.
20586 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
20587 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
20588 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
20589 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
20590 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
20591 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
20592 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
20593 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
20594 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
20595 Also add an initial argument for unary_convert_narrowt, regardless
20596 of the predication type.
20597 (build_32_64): Allow loads and stores to specify MODE_none.
20598 (build_sv_index64, build_sv_uint_offset): New functions.
20599 (long_type_suffix): New function.
20600 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
20601 (binary_imm_long_base, load_gather_sv_base): Likewise.
20602 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
20603 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
20604 (unary_narrowb_base, unary_narrowt_base): Likewise.
20605 (binary_long_lane_def, binary_long_lane): New shape.
20606 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
20607 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
20608 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
20609 (binary_to_uint_def, binary_to_uint): Likewise.
20610 (binary_wide_def, binary_wide): Likewise.
20611 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
20612 (compare_def, compare): Likewise.
20613 (compare_ptr_def, compare_ptr): Likewise.
20614 (load_ext_gather_index_restricted_def,
20615 load_ext_gather_index_restricted): Likewise.
20616 (load_ext_gather_offset_restricted_def,
20617 load_ext_gather_offset_restricted): Likewise.
20618 (load_gather_sv_def): Inherit from load_gather_sv_base.
20619 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
20620 (shift_left_imm_def, shift_left_imm): Likewise.
20621 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
20622 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
20623 (store_scatter_index_restricted_def,
20624 store_scatter_index_restricted): Likewise.
20625 (store_scatter_offset_restricted_def,
20626 store_scatter_offset_restricted): Likewise.
20627 (tbl_tuple_def, tbl_tuple): Likewise.
20628 (ternary_long_lane_def, ternary_long_lane): Likewise.
20629 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
20630 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
20631 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
20632 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
20633 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
20634 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
20635 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
20636 (ternary_uint_def, ternary_uint): Likewise.
20637 (unary_convert): Fix typo in comment.
20638 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
20639 (unary_long_def, unary_long): Likewise.
20640 (unary_narrowb_def, unary_narrowb): Likewise.
20641 (unary_narrowt_def, unary_narrowt): Likewise.
20642 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
20643 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
20644 (unary_to_int_def, unary_to_int): Likewise.
20645 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
20646 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
20647 (svasrd_impl): Delete.
20648 (svcadd_impl::expand): Handle integer operations too.
20649 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
20650 new functions to derive the unspec numbers.
20651 (svmla_svmls_lane_impl): Replace with...
20652 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
20653 integer operations too.
20654 (svwhile_impl): Rename to...
20655 (svwhilelx_impl): ...this and inherit from while_comparison.
20656 (svasrd): Use unspec_based_function.
20657 (svmla_lane): Use svmla_lane_impl.
20658 (svmls_lane): Use svmls_lane_impl.
20659 (svrecpe, svrsqrte): Handle unsigned integer operations too.
20660 (svwhilele, svwhilelt): Use svwhilelx_impl.
20661 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
20662 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
20663 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
20664 * config/aarch64/aarch64-sve-builtins.def: Include
20665 aarch64-sve-builtins-sve2.def.
20667 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20669 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
20670 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
20671 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
20672 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
20673 immediates as well as vector ones.
20674 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
20675 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
20676 (aarch64_sve_qsub_immediate): Update calls accordingly.
20678 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20680 * config/aarch64/aarch64-sve2.md: Add banner comments.
20681 (<su>mulh<r>s<mode>3): Move further up file.
20682 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
20683 (*aarch64_sve2_sra<mode>): Move further down file.
20684 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
20686 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20688 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
20689 and UNSPEC_WHILEWR.
20690 (while_optab_cmp): Handle them.
20691 * config/aarch64/aarch64-sve.md
20692 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
20693 and add a "@" marker.
20694 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
20695 instead of gen_aarch64_sve2_while_ptest.
20696 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
20698 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20700 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
20701 (UNSPEC_WHILELE): ...this.
20702 (UNSPEC_WHILE_LO): Rename to...
20703 (UNSPEC_WHILELO): ...this.
20704 (UNSPEC_WHILE_LS): Rename to...
20705 (UNSPEC_WHILELS): ...this.
20706 (UNSPEC_WHILE_LT): Rename to...
20707 (UNSPEC_WHILELT): ...this.
20708 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
20709 (cmp_op, while_optab_cmp): Likewise.
20710 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
20711 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
20712 (svwhilelt): Likewise.
20714 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20716 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
20717 (unary_to_uint): Define.
20718 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
20719 (unary_count): Rename to...
20720 (unary_to_uint_def, unary_to_uint): ...this.
20721 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
20723 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20725 * config/aarch64/aarch64-sve-builtins-functions.h
20726 (code_for_mode_function): New class.
20727 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
20728 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
20729 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
20730 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
20731 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
20733 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20735 * config/aarch64/iterators.md (addsub): New code attribute.
20736 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
20738 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
20739 in the asm string and attributes. Fix indentation.
20740 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
20742 (@aarch64_sve_<optab><mode>): ...this.
20743 * config/aarch64/aarch64-sve-builtins.h
20744 (function_expander::expand_signed_unpred_op): Delete.
20745 * config/aarch64/aarch64-sve-builtins.cc
20746 (function_expander::expand_signed_unpred_op): Likewise.
20747 (function_expander::map_to_rtx_codes): If the optab isn't defined,
20748 try using code_for_aarch64_sve instead.
20749 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
20750 (svqsub_impl): Likewise.
20751 (svqadd, svqsub): Use rtx_code_function instead.
20753 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20755 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
20756 (HADDSUB, sur, addsub): Remove them.
20758 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20760 * tree-nrv.c (pass_return_slot::execute): Handle all internal
20761 functions the same way, rather than singling out those that
20762 aren't mapped directly to optabs.
20764 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20766 * target.def (compatible_vector_types_p): New target hook.
20767 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
20768 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
20769 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
20770 * doc/tm.texi: Regenerate.
20771 * gimple-expr.c: Include target.h.
20772 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
20773 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
20775 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
20776 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
20777 Use the original predicate if it already has a suitable type.
20779 2020-01-09 Martin Jambor <mjambor@suse.cz>
20781 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
20782 resolve_speculation and redirect_call_stmt_to_callee static. Change
20783 return type of set_call_stmt to cgraph_edge *.
20784 * auto-profile.c (afdo_indirect_call): Adjust call to
20785 redirect_call_stmt_to_callee.
20786 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
20787 make the this pointer explicit, adjust self-recursive calls and the
20788 call top make_direct. Return the resulting edge.
20789 (cgraph_edge::remove): Make this pointer explicit.
20790 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
20791 (cgraph_edge::make_direct): Likewise, adjust call to
20792 resolve_speculation.
20793 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
20794 call to set_call_stmt.
20795 (cgraph_update_edges_for_call_stmt_node): Update call to
20796 set_call_stmt and remove.
20797 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
20798 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
20799 (cgraph_node::create_edge_including_clones): Moved "first" definition
20800 of edge to the block where it was used. Adjusted calls to
20802 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
20803 cgraph_edge::remove.
20804 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
20805 make_direct and redirect_call_stmt_to_callee.
20806 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
20807 resolve_speculation and make_direct.
20808 * ipa-inline-transform.c (inline_transform): Adjust call to
20809 redirect_call_stmt_to_callee.
20810 (check_speculations_1):: Adjust call to resolve_speculation.
20811 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
20812 resolve-speculation.
20813 (inline_small_functions): Adjust call to resolve_speculation.
20814 (ipa_inline): Likewise.
20815 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
20817 * ipa-visibility.c (function_and_variable_visibility): Make iteration
20818 safe with regards to edge removal, adjust calls to
20819 redirect_call_stmt_to_callee.
20820 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
20821 and redirect_call_stmt_to_callee.
20822 * multiple_target.c (create_dispatcher_calls): Adjust call to
20823 redirect_call_stmt_to_callee
20824 (redirect_to_specific_clone): Likewise.
20825 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
20826 Adjust calls to cgraph_edge::remove.
20827 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
20828 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
20829 (expand_call_inline): Adjust call to cgraph_edge::remove.
20831 2020-01-09 Martin Liska <mliska@suse.cz>
20833 * params.opt: Set Optimization for
20834 param_max_speculative_devirt_maydefs.
20836 2020-01-09 Martin Sebor <msebor@redhat.com>
20838 PR middle-end/93200
20840 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
20842 2020-01-09 Martin Liska <mliska@suse.cz>
20844 * auto-profile.c (auto_profile): Use opt_for_fn
20846 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
20847 (propagate_vals_across_arith_jfunc): Likewise.
20848 (hint_time_bonus): Likewise.
20849 (incorporate_penalties): Likewise.
20850 (good_cloning_opportunity_p): Likewise.
20851 (perform_estimation_of_a_value): Likewise.
20852 (estimate_local_effects): Likewise.
20853 (ipcp_propagate_stage): Likewise.
20854 * ipa-fnsummary.c (decompose_param_expr): Likewise.
20855 (set_switch_stmt_execution_predicate): Likewise.
20856 (analyze_function_body): Likewise.
20857 * ipa-inline-analysis.c (offline_size): Likewise.
20858 * ipa-inline.c (early_inliner): Likewise.
20859 * ipa-prop.c (ipa_analyze_node): Likewise.
20860 (ipcp_transform_function): Likewise.
20861 * ipa-sra.c (process_scan_results): Likewise.
20862 (ipa_sra_summarize_function): Likewise.
20863 * params.opt: Rename ipcp-unit-growth to
20864 ipa-cp-unit-growth. Add Optimization for various
20865 IPA-related parameters.
20867 2020-01-09 Richard Biener <rguenther@suse.de>
20869 PR middle-end/93054
20870 * gimplify.c (gimplify_expr): Deal with NOP definitions.
20872 2020-01-09 Richard Biener <rguenther@suse.de>
20874 PR tree-optimization/93040
20875 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
20877 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
20879 * common/config/avr/avr-common.c (avr_option_optimization_table)
20880 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
20882 2020-01-09 Martin Liska <mliska@suse.cz>
20884 * cgraphclones.c (symbol_table::materialize_all_clones):
20885 Use cgraph_node::dump_name.
20887 2020-01-09 Jakub Jelinek <jakub@redhat.com>
20889 PR inline-asm/93202
20890 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
20891 output_operand_lossage instead of gcc_unreachable.
20892 * doc/md.texi (riscv f constraint): Fix typo.
20895 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
20896 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
20897 CONST_SCALAR_INT_P instead of CONST_INT_P.
20898 (*subv<mode>4_1): Rename to ...
20899 (subv<mode>4_1): ... this.
20900 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
20901 define_insn_and_split patterns.
20902 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
20905 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20907 * vec.c (class selftest::count_dtor): New class.
20908 (selftest::test_auto_delete_vec): New test.
20909 (selftest::vec_c_tests): Call it.
20910 * vec.h (class auto_delete_vec): New class template.
20911 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
20913 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20915 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
20917 2020-01-08 Jim Wilson <jimw@sifive.com>
20919 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
20920 use of TLS_MODEL_LOCAL_EXEC when not pic.
20922 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20924 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
20927 2020-01-08 Jakub Jelinek <jakub@redhat.com>
20930 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
20931 *stack_protect_set_3 peephole2): Also check that the second
20932 insns source is general_operand.
20935 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
20936 predicate for output operand instead of register_operand.
20937 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
20938 memory destination and non-memory operands[2].
20940 2020-01-08 Martin Liska <mliska@suse.cz>
20942 * cgraph.c (cgraph_node::dump): Use ::dump_name or
20943 ::dump_asm_name instead of (::name or ::asm_name).
20944 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
20945 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
20946 (analyze_functions): Likewise.
20947 (expand_all_functions): Likewise.
20948 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
20949 (propagate_bits_across_jump_function): Likewise.
20950 (dump_profile_updates): Likewise.
20951 (ipcp_store_bits_results): Likewise.
20952 (ipcp_store_vr_results): Likewise.
20953 * ipa-devirt.c (dump_targets): Likewise.
20954 * ipa-fnsummary.c (analyze_function_body): Likewise.
20955 * ipa-hsa.c (check_warn_node_versionable): Likewise.
20956 (process_hsa_functions): Likewise.
20957 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
20958 (set_alias_uids): Likewise.
20959 * ipa-inline-transform.c (save_inline_function_body): Likewise.
20960 * ipa-inline.c (recursive_inlining): Likewise.
20961 (inline_to_all_callers_1): Likewise.
20962 (ipa_inline): Likewise.
20963 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
20964 (ipa_propagate_frequency): Likewise.
20965 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
20966 (remove_described_reference): Likewise.
20967 * ipa-pure-const.c (worse_state): Likewise.
20968 (check_retval_uses): Likewise.
20969 (analyze_function): Likewise.
20970 (propagate_pure_const): Likewise.
20971 (propagate_nothrow): Likewise.
20972 (dump_malloc_lattice): Likewise.
20973 (propagate_malloc): Likewise.
20974 (pass_local_pure_const::execute): Likewise.
20975 * ipa-visibility.c (optimize_weakref): Likewise.
20976 (function_and_variable_visibility): Likewise.
20977 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
20978 (ipa_discover_variable_flags): Likewise.
20979 * lto-streamer-out.c (output_function): Likewise.
20980 (output_constructor): Likewise.
20981 * tree-inline.c (copy_bb): Likewise.
20982 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
20983 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
20985 2020-01-08 Richard Biener <rguenther@suse.de>
20987 PR middle-end/93199
20988 * tree-eh.c (sink_clobbers): Update virtual operands for
20989 the first and last stmt only. Add a dry-run capability.
20990 (pass_lower_eh_dispatch::execute): Perform clobber sinking
20991 after CFG manipulations and in RPO order to catch all
20992 secondary opportunities reliably.
20994 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
20997 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
20999 2019-01-08 Richard Biener <rguenther@suse.de>
21001 PR middle-end/93199
21002 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
21003 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
21004 virtual operand, also updating SSA use.
21005 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
21006 Update stmt after resetting virtual operand.
21007 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
21008 * gimple-iterator.c (gsi_remove): When not removing the stmt
21009 permanently do not delink immediate uses or mark the stmt modified.
21011 2020-01-08 Martin Liska <mliska@suse.cz>
21013 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
21014 (ipa_call_context::estimate_size_and_time): Likewise.
21015 (inline_analyze_function): Likewise.
21017 2020-01-08 Martin Liska <mliska@suse.cz>
21019 * cgraph.c (cgraph_node::dump): Use systematically
21022 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
21024 Add -nodevicespecs option for avr.
21027 * config/avr/avr.opt (-nodevicespecs): New driver option.
21028 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
21029 "-specs=device-specs/..." if that option is not set.
21030 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
21032 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
21034 Implement 64-bit double functions for avr.
21037 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
21038 --with-double-comparison.
21039 * doc/install.texi: Document them.
21040 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
21041 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
21042 <WITH_DOUBLE_COMPARISON>: New built-in defines.
21043 * doc/invoke.texi (AVR Built-in Macros): Document them.
21044 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
21045 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
21046 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
21048 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
21051 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
21052 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
21053 when only building rm-profile multilibs.
21055 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
21058 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
21059 lattice for a value to check.
21060 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
21061 finite propagation in self-recursive scc.
21063 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
21065 * ipa-inline.c (caller_growth_limits): Restore the AND.
21067 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
21069 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
21070 (VEC_ALLREG_ALT): New iterator.
21071 (VEC_ALLREG_INT_MODE): New iterator.
21072 (VCMP_MODE): New iterator.
21073 (VCMP_MODE_INT): New iterator.
21074 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
21075 (vec_cmp<u>v64qidi): New define_expand.
21076 (vec_cmp<mode>di_exec): Use VCMP_MODE.
21077 (vec_cmpu<mode>di_exec): New define_expand.
21078 (vec_cmp<u>v64qidi_exec): New define_expand.
21079 (vec_cmp<mode>di_dup): Use VCMP_MODE.
21080 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
21081 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
21082 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
21083 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
21084 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
21085 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
21086 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
21087 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
21088 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
21090 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
21091 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
21093 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
21095 * config/gcn/constraints.md (DA): Update description and match.
21097 (Db): New constraint.
21098 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
21100 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
21101 Implement 'Db' mixed immediate type.
21102 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
21103 (addcv64si3_dup<exec_vcc>): Delete.
21104 (subcv64si3<exec_vcc>): Rework constraints.
21105 (addv64di3): Rework constraints.
21106 (addv64di3_exec): Rework constraints.
21107 (subv64di3): Rework constraints.
21108 (addv64di3_dup): Delete.
21109 (addv64di3_dup_exec): Delete.
21110 (addv64di3_zext): Rework constraints.
21111 (addv64di3_zext_exec): Rework constraints.
21112 (addv64di3_zext_dup): Rework constraints.
21113 (addv64di3_zext_dup_exec): Rework constraints.
21114 (addv64di3_zext_dup2): Rework constraints.
21115 (addv64di3_zext_dup2_exec): Rework constraints.
21116 (addv64di3_sext_dup2): Rework constraints.
21117 (addv64di3_sext_dup2_exec): Rework constraints.
21119 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
21121 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
21122 existing target checks.
21124 2020-01-07 Richard Biener <rguenther@suse.de>
21126 * doc/install.texi: Bump minimal supported MPC version.
21128 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
21130 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
21131 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
21132 * langhooks.c: Include stor-layout.h.
21133 (lhd_simulate_enum_decl): New function.
21134 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
21135 handle_arm_sve_h for the LTO frontend.
21136 (register_vector_type): Cope with null returns from pushdecl.
21138 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
21140 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
21141 (aarch64_sve::nvectors_if_data_type): Replace with...
21142 (aarch64_sve::builtin_type_p): ...this.
21143 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
21144 (find_vector_type): Delete.
21145 (add_sve_type_attribute): New function.
21146 (lookup_sve_type_attribute): Likewise.
21147 (register_builtin_types): Add an "SVE type" attribute to each type.
21148 (register_tuple_type): Likewise.
21149 (svbool_type_p, nvectors_if_data_type): Delete.
21150 (mangle_builtin_type): Use lookup_sve_type_attribute.
21151 (builtin_type_p): Likewise. Add an overload that returns the
21152 number of constituent vector and predicate registers.
21153 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
21154 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
21155 instead of aarch64_sve_argument_p.
21156 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
21157 (aarch64_pass_by_reference): Likewise.
21158 (aarch64_function_value_1): Likewise.
21159 (aarch64_return_in_memory): Likewise.
21160 (aarch64_layout_arg): Likewise.
21162 2020-01-07 Jakub Jelinek <jakub@redhat.com>
21164 PR tree-optimization/93156
21165 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
21166 least significant bit is always clear.
21168 PR tree-optimization/93118
21169 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
21170 simplifier with two intermediate conversions.
21172 2020-01-07 Martin Liska <mliska@suse.cz>
21174 * params.opt: Add Optimization for various parameters.
21176 2020-01-07 Martin Liska <mliska@suse.cz>
21179 * doc/extend.texi: Explain cloning for target_clone
21182 2020-01-07 Martin Liska <mliska@suse.cz>
21184 PR tree-optimization/92860
21185 * common.opt: Make in Optimization option
21186 as it is affected by -O0, which is an Optimization
21188 * tree-inline.c (tree_inlinable_function_p):
21189 Use opt_for_fn for warn_inline.
21190 (expand_call_inline): Likewise.
21192 2020-01-07 Martin Liska <mliska@suse.cz>
21194 PR tree-optimization/92860
21195 * common.opt: Make flag_ree as optimization
21198 2020-01-07 Martin Liska <mliska@suse.cz>
21200 PR optimization/92860
21201 * params.opt: Mark param_min_crossjump_insns with Optimization
21204 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
21206 * ipa-inline-analysis.c (estimate_growth): Fix typo.
21207 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
21209 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
21211 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
21212 helper function to return the valid addressing formats for a given
21213 hard register and mode.
21214 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
21216 * config/rs6000/constraints.md (Q constraint): Update
21218 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
21221 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
21222 Use 'Q' for doing vector extract from memory.
21223 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
21225 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
21226 doing vector extract from memory.
21227 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
21228 extract from memory.
21230 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
21231 for the offset being 34-bits when -mcpu=future is used.
21233 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
21235 * config/pa/pa.md: Revert change to use ordered_comparison_operator
21236 instead of cmpib_comparison_operator in cmpib patterns.
21237 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
21238 of cmpib_comparison_operator. Revise comment.
21240 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21242 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
21243 in an IFN_DIV_POW2 node to be equal.
21245 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21247 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
21248 (vect_check_scalar_mask): ...this.
21249 (vectorizable_store, vectorizable_load): Update call accordingly.
21250 (vectorizable_call): Use vect_check_scalar_mask to check the mask
21251 argument in calls to conditional internal functions.
21253 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
21255 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
21256 '0' matching inputs.
21257 (subv64di3_exec): Likewise.
21259 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
21261 * config/mips/mips.c (vr4130_align_insns): Fix typo.
21262 * doc/md.texi (movstr): Likewise.
21264 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
21266 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
21269 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21271 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
21273 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
21274 to a temporary file and use move-if-change to update the real
21275 file where necessary.
21277 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21279 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
21280 rather than Upa for CPY /M.
21282 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
21284 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
21287 2020-01-06 Martin Liska <mliska@suse.cz>
21289 PR tree-optimization/92860
21290 * params.opt: Mark param_max_combine_insns with Optimization
21293 2020-01-05 Jakub Jelinek <jakub@redhat.com>
21296 * config/i386/i386.md (SWIDWI): New mode iterator.
21297 (DWI, dwi): Add TImode variants.
21298 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
21299 <general_hilo_operand> instead of <general_operand>. Use
21300 CONST_SCALAR_INT_P instead of CONST_INT_P.
21301 (*addv<mode>4_1): Rename to ...
21302 (addv<mode>4_1): ... this.
21303 (QWI): New mode attribute.
21304 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
21305 define_insn_and_split patterns.
21306 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
21308 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
21309 <general_hilo_operand> instead of <general_operand>.
21310 (*addcarry<mode>_1): New define_insn.
21311 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
21313 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
21315 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
21316 Use "call" instead of "set".
21318 2020-01-03 Martin Jambor <mjambor@suse.cz>
21321 * ipa-cp.c (print_all_lattices): Skip functions without info.
21323 2020-01-03 Jakub Jelinek <jakub@redhat.com>
21326 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
21327 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
21328 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
21329 for 'e' simd clones.
21332 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
21334 (mprefer-vector-width=): Add Save.
21335 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
21336 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
21337 (ix86_debug_options, ix86_function_specific_print): Adjust
21338 ix86_target_string callers.
21339 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
21340 (ix86_valid_target_attribute_tree): Likewise.
21341 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
21342 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
21343 ix86_target_string caller.
21346 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
21347 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
21348 instead of gen_int_shift_amount + convert_modes.
21350 PR rtl-optimization/93088
21351 * loop-iv.c (find_single_def_src): Punt after looking through
21352 128 reg copies for regs with single definitions. Move definitions
21355 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
21357 * config/arm/arm-c.c (arm_cpu_builtins): Define
21358 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
21359 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
21360 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
21361 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
21362 * config/arm/arm-tables.opt: Regenerated.
21363 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
21364 arm_arch_i8mm and arm_arch_bf16 when enabled.
21365 * config/arm/arm.h (TARGET_I8MM): New macro.
21366 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
21367 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
21368 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
21369 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
21370 (v8_6_a_simd_variants): New.
21371 (v8_*_a_simd_variants): Add i8mm and bf16.
21372 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
21374 2020-01-02 Jakub Jelinek <jakub@redhat.com>
21377 * predict.c (compute_function_frequency): Don't call
21378 warn_function_cold on functions that already have cold attribute.
21380 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
21383 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
21384 COMDAT group function labels in .data.rel.ro.local section.
21385 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
21388 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
21389 comparison_operator in B and S integer comparisons. Likewise, use
21390 ordered_comparison_operator instead of cmpib_comparison_operator in
21392 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
21394 2020-01-01 Jakub Jelinek <jakub@redhat.com>
21396 Update copyright years.
21398 * gcc.c (process_command): Update copyright notice dates.
21399 * gcov-dump.c (print_version): Ditto.
21400 * gcov.c (print_version): Ditto.
21401 * gcov-tool.c (print_version): Ditto.
21402 * gengtype.c (create_file): Ditto.
21403 * doc/cpp.texi: Bump @copying's copyright year.
21404 * doc/cppinternals.texi: Ditto.
21405 * doc/gcc.texi: Ditto.
21406 * doc/gccint.texi: Ditto.
21407 * doc/gcov.texi: Ditto.
21408 * doc/install.texi: Ditto.
21409 * doc/invoke.texi: Ditto.
21411 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
21413 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
21416 2020-01-01 Jakub Jelinek <jakub@redhat.com>
21418 PR tree-optimization/93098
21419 * match.pd (popcount): For shift amounts, use integer_onep
21420 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
21421 tests. Make sure that precision is power of two larger than or equal
21422 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
21423 instead of ULL suffixed constants. Formatting fixes.
21425 Copyright (C) 2020 Free Software Foundation, Inc.
21427 Copying and distribution of this file, with or without modification,
21428 are permitted in any medium without royalty provided the copyright
21429 notice and this notice are preserved.