gcc/lra-int.h

   1 /* Local Register Allocator (LRA) intercommunication header file.
   2    Copyright (C) 2010-2015 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_LRA_INT_H
  22 #define GCC_LRA_INT_H
  23
  24 #include "lra.h"
  25 #include "bitmap.h"
  26 #include "recog.h"
  27 #include "insn-attr.h"
  28 #include "insn-codes.h"
  29 #include "insn-config.h"
  30 #include "regs.h"
  31
  32 #define lra_assert(c) gcc_checking_assert (c)
  33
  34 /* The parameter used to prevent infinite reloading for an insn.  Each
  35    insn operands might require a reload and, if it is a memory, its
  36    base and index registers might require a reload too.  */
  37 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
  38
  39 typedef struct lra_live_range *lra_live_range_t;
  40
  41 /* The structure describes program points where a given pseudo lives.
  42    The live ranges can be used to find conflicts with other pseudos.
  43    If the live ranges of two pseudos are intersected, the pseudos are
  44    in conflict.  */
  45 struct lra_live_range
  46 {
  47   /* Pseudo regno whose live range is described by given
  48      structure.  */
  49   int regno;
  50   /* Program point range.  */
  51   int start, finish;
  52   /* Next structure describing program points where the pseudo
  53      lives.  */
  54   lra_live_range_t next;
  55   /* Pointer to structures with the same start.  */
  56   lra_live_range_t start_next;
  57
  58   /* Pool allocation new operator.  */
  59   inline void *operator new (size_t)
  60   {
  61     return pool.allocate ();
  62   }
  63
  64   /* Delete operator utilizing pool allocation.  */
  65   inline void operator delete (void *ptr)
  66   {
  67     pool.remove ((lra_live_range *) ptr);
  68   }
  69
  70   /* Memory allocation pool.  */
  71   static pool_allocator<lra_live_range> pool;
  72 };
  73
  74 typedef struct lra_copy *lra_copy_t;
  75
  76 /* Copy between pseudos which affects assigning hard registers.  */
  77 struct lra_copy
  78 {
  79   /* True if regno1 is the destination of the copy.  */
  80   bool regno1_dest_p;
  81   /* Execution frequency of the copy.  */
  82   int freq;
  83   /* Pseudos connected by the copy.  REGNO1 < REGNO2.  */
  84   int regno1, regno2;
  85   /* Next copy with correspondingly REGNO1 and REGNO2.  */
  86   lra_copy_t regno1_next, regno2_next;
  87
  88   /* Pool allocation new operator.  */
  89   inline void *operator new (size_t)
  90   {
  91     return pool.allocate ();
  92   }
  93
  94   /* Delete operator utilizing pool allocation.  */
  95   inline void operator delete (void *ptr)
  96   {
  97     pool.remove ((lra_copy *) ptr);
  98   }
  99
 100   /* Memory allocation pool.  */
 101   static pool_allocator<lra_copy> pool;
 102
 103 };
 104
 105 /* Common info about a register (pseudo or hard register).  */
 106 struct lra_reg
 107 {
 108   /* Bitmap of UIDs of insns (including debug insns) referring the
 109      reg.  */
 110   bitmap_head insn_bitmap;
 111   /* The following fields are defined only for pseudos.  */
 112   /* Hard registers with which the pseudo conflicts.  */
 113   HARD_REG_SET conflict_hard_regs;
 114   /* Call used registers with which the pseudo conflicts, taking into account
 115      the registers used by functions called from calls which cross the
 116      pseudo.  */
 117   HARD_REG_SET actual_call_used_reg_set;
 118   /* We assign hard registers to reload pseudos which can occur in few
 119      places.  So two hard register preferences are enough for them.
 120      The following fields define the preferred hard registers.  If
 121      there are no such hard registers the first field value is
 122      negative.  If there is only one preferred hard register, the 2nd
 123      field is negative.  */
 124   int preferred_hard_regno1, preferred_hard_regno2;
 125   /* Profits to use the corresponding preferred hard registers.  If
 126      the both hard registers defined, the first hard register has not
 127      less profit than the second one.  */
 128   int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
 129 #ifdef STACK_REGS
 130   /* True if the pseudo should not be assigned to a stack register.  */
 131   bool no_stack_p;
 132 #endif
 133 #ifdef ENABLE_CHECKING
 134   /* True if the pseudo crosses a call.  It is setup in lra-lives.c
 135      and used to check that the pseudo crossing a call did not get a
 136      call used hard register.  */
 137   bool call_p;
 138 #endif
 139   /* Number of references and execution frequencies of the register in
 140      *non-debug* insns.  */
 141   int nrefs, freq;
 142   int last_reload;
 143   /* Regno used to undo the inheritance.  It can be non-zero only
 144      between couple of inheritance and undo inheritance passes.  */
 145   int restore_regno;
 146   /* Value holding by register.  If the pseudos have the same value
 147      they do not conflict.  */
 148   int val;
 149   /* Offset from relative eliminate register to pesudo reg.  */
 150   int offset;
 151   /* These members are set up in lra-lives.c and updated in
 152      lra-coalesce.c.  */
 153   /* The biggest size mode in which each pseudo reg is referred in
 154      whole function (possibly via subreg).  */
 155   machine_mode biggest_mode;
 156   /* Live ranges of the pseudo.  */
 157   lra_live_range_t live_ranges;
 158   /* This member is set up in lra-lives.c for subsequent
 159      assignments.  */
 160   lra_copy_t copies;
 161 };
 162
 163 /* References to the common info about each register.  */
 164 extern struct lra_reg *lra_reg_info;
 165
 166 /* Static info about each insn operand (common for all insns with the
 167    same ICODE).  Warning: if the structure definition is changed, the
 168    initializer for debug_operand_data in lra.c should be changed
 169    too.  */
 170 struct lra_operand_data
 171 {
 172   /* The machine description constraint string of the operand.  */
 173   const char *constraint;
 174   /* It is taken only from machine description (which is different
 175      from recog_data.operand_mode) and can be of VOIDmode.  */
 176   ENUM_BITFIELD(machine_mode) mode : 16;
 177   /* The type of the operand (in/out/inout).  */
 178   ENUM_BITFIELD (op_type) type : 8;
 179   /* Through if accessed through STRICT_LOW.  */
 180   unsigned int strict_low : 1;
 181   /* True if the operand is an operator.  */
 182   unsigned int is_operator : 1;
 183   /* True if there is an early clobber alternative for this operand.
 184      This field is set up every time when corresponding
 185      operand_alternative in lra_static_insn_data is set up.  */
 186   unsigned int early_clobber : 1;
 187   /* True if the operand is an address.  */
 188   unsigned int is_address : 1;
 189 };
 190
 191 /* Info about register occurrence in an insn.  */
 192 struct lra_insn_reg
 193 {
 194   /* The biggest mode through which the insn refers to the register
 195      occurrence (remember the register can be accessed through a
 196      subreg in the insn).  */
 197   ENUM_BITFIELD(machine_mode) biggest_mode : 16;
 198   /* The type of the corresponding operand which is the register.  */
 199   ENUM_BITFIELD (op_type) type : 8;
 200   /* True if the reg is accessed through a subreg and the subreg is
 201      just a part of the register.  */
 202   unsigned int subreg_p : 1;
 203   /* True if there is an early clobber alternative for this
 204      operand.  */
 205   unsigned int early_clobber : 1;
 206   /* The corresponding regno of the register.  */
 207   int regno;
 208   /* Next reg info of the same insn.  */
 209   struct lra_insn_reg *next;
 210
 211   /* Pool allocation new operator.  */
 212   inline void *operator new (size_t)
 213   {
 214     return pool.allocate ();
 215   }
 216
 217   /* Delete operator utilizing pool allocation.  */
 218   inline void operator delete (void *ptr)
 219   {
 220     pool.remove ((lra_insn_reg *) ptr);
 221   }
 222
 223   /* Memory allocation pool.  */
 224   static pool_allocator<lra_insn_reg> pool;
 225 };
 226
 227 /* Static part (common info for insns with the same ICODE) of LRA
 228    internal insn info. It exists in at most one exemplar for each
 229    non-negative ICODE. There is only one exception. Each asm insn has
 230    own structure.  Warning: if the structure definition is changed,
 231    the initializer for debug_insn_static_data in lra.c should be
 232    changed too.  */
 233 struct lra_static_insn_data
 234 {
 235   /* Static info about each insn operand.  */
 236   struct lra_operand_data *operand;
 237   /* Each duplication refers to the number of the corresponding
 238      operand which is duplicated.  */
 239   int *dup_num;
 240   /* The number of an operand marked as commutative, -1 otherwise.  */
 241   int commutative;
 242   /* Number of operands, duplications, and alternatives of the
 243      insn.  */
 244   char n_operands;
 245   char n_dups;
 246   char n_alternatives;
 247   /* Insns in machine description (or clobbers in asm) may contain
 248      explicit hard regs which are not operands.  The following list
 249      describes such hard registers.  */
 250   struct lra_insn_reg *hard_regs;
 251   /* Array [n_alternatives][n_operand] of static constraint info for
 252      given operand in given alternative.  This info can be changed if
 253      the target reg info is changed.  */
 254   const struct operand_alternative *operand_alternative;
 255 };
 256
 257 /* LRA internal info about an insn (LRA internal insn
 258    representation).  */
 259 struct lra_insn_recog_data
 260 {
 261   /* The insn code.  */
 262   int icode;
 263   /* The alternative should be used for the insn, -1 if invalid, or we
 264      should try to use any alternative, or the insn is a debug
 265      insn.  */
 266   int used_insn_alternative;
 267   /* SP offset before the insn relative to one at the func start.  */
 268   HOST_WIDE_INT sp_offset;
 269   /* The insn itself.  */
 270   rtx_insn *insn;
 271   /* Common data for insns with the same ICODE.  Asm insns (their
 272      ICODE is negative) do not share such structures.  */
 273   struct lra_static_insn_data *insn_static_data;
 274   /* Two arrays of size correspondingly equal to the operand and the
 275      duplication numbers: */
 276   rtx **operand_loc; /* The operand locations, NULL if no operands.  */
 277   rtx **dup_loc; /* The dup locations, NULL if no dups.  */
 278   /* Number of hard registers implicitly used in given call insn.  The
 279      value can be NULL or points to array of the hard register numbers
 280      ending with a negative value.  */
 281   int *arg_hard_regs;
 282   /* Cached value of get_preferred_alternatives.  */
 283   alternative_mask preferred_alternatives;
 284   /* The following member value is always NULL for a debug insn.  */
 285   struct lra_insn_reg *regs;
 286 };
 287
 288 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
 289
 290 /* Whether the clobber is used temporary in LRA.  */
 291 #define LRA_TEMP_CLOBBER_P(x) \
 292   (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
 293
 294 /* Cost factor for each additional reload and maximal cost reject for
 295    insn reloads.  One might ask about such strange numbers.  Their
 296    values occurred historically from former reload pass.  */
 297 #define LRA_LOSER_COST_FACTOR 6
 298 #define LRA_MAX_REJECT 600
 299
 300 /* Maximum allowed number of assignment pass iterations after the
 301    latest spill pass when any former reload pseudo was spilled.  It is
 302    for preventing LRA cycling in a bug case.  */
 303 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
 304
 305 /* The maximal number of inheritance/split passes in LRA.  It should
 306    be more 1 in order to perform caller saves transformations and much
 307    less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
 308    as permitted constraint passes in some complicated cases.  The
 309    first inheritance/split pass has a biggest impact on generated code
 310    quality.  Each subsequent affects generated code in less degree.
 311    For example, the 3rd pass does not change generated SPEC2000 code
 312    at all on x86-64.  */
 313 #define LRA_MAX_INHERITANCE_PASSES 2
 314
 315 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
 316     || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 317 #error wrong LRA_MAX_INHERITANCE_PASSES value
 318 #endif
 319
 320 /* Analogous macro to the above one but for rematerialization.  */
 321 #define LRA_MAX_REMATERIALIZATION_PASSES 2
 322
 323 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
 324     || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 325 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
 326 #endif
 327
 328 /* lra.c: */
 329
 330 extern FILE *lra_dump_file;
 331
 332 extern bool lra_reg_spill_p;
 333
 334 extern HARD_REG_SET lra_no_alloc_regs;
 335
 336 extern int lra_insn_recog_data_len;
 337 extern lra_insn_recog_data_t *lra_insn_recog_data;
 338
 339 extern int lra_curr_reload_num;
 340
 341 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
 342 extern void lra_push_insn (rtx_insn *);
 343 extern void lra_push_insn_by_uid (unsigned int);
 344 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
 345 extern rtx_insn *lra_pop_insn (void);
 346 extern unsigned int lra_insn_stack_length (void);
 347
 348 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
 349                                                  enum reg_class, const char *);
 350 extern void lra_set_regno_unique_value (int);
 351 extern void lra_invalidate_insn_data (rtx_insn *);
 352 extern void lra_set_insn_deleted (rtx_insn *);
 353 extern void lra_delete_dead_insn (rtx_insn *);
 354 extern void lra_emit_add (rtx, rtx, rtx);
 355 extern void lra_emit_move (rtx, rtx);
 356 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 357
 358 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
 359                                    const char *);
 360
 361 extern bool lra_substitute_pseudo (rtx *, int, rtx);
 362 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx);
 363
 364 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
 365 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
 366 extern void lra_set_used_insn_alternative (rtx_insn *, int);
 367 extern void lra_set_used_insn_alternative_by_uid (int, int);
 368
 369 extern void lra_invalidate_insn_regno_info (rtx_insn *);
 370 extern void lra_update_insn_regno_info (rtx_insn *);
 371 extern struct lra_insn_reg *lra_get_insn_regs (int);
 372
 373 extern void lra_free_copies (void);
 374 extern void lra_create_copy (int, int, int);
 375 extern lra_copy_t lra_get_copy (int);
 376 extern bool lra_former_scratch_p (int);
 377 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
 378 extern void lra_register_new_scratch_op (rtx_insn *, int);
 379
 380 extern int lra_new_regno_start;
 381 extern int lra_constraint_new_regno_start;
 382 extern int lra_bad_spill_regno_start;
 383 extern bitmap_head lra_inheritance_pseudos;
 384 extern bitmap_head lra_split_regs;
 385 extern bitmap_head lra_subreg_reload_pseudos;
 386 extern bitmap_head lra_optional_reload_pseudos;
 387
 388 /* lra-constraints.c: */
 389
 390 extern void lra_init_equiv (void);
 391 extern int lra_constraint_offset (int, machine_mode);
 392
 393 extern int lra_constraint_iter;
 394 extern bool lra_risky_transformations_p;
 395 extern int lra_inheritance_iter;
 396 extern int lra_undo_inheritance_iter;
 397 extern bool lra_constrain_insn (rtx_insn *);
 398 extern bool lra_constraints (bool);
 399 extern void lra_constraints_init (void);
 400 extern void lra_constraints_finish (void);
 401 extern void lra_inheritance (void);
 402 extern bool lra_undo_inheritance (void);
 403
 404 /* lra-lives.c: */
 405
 406 extern int lra_live_max_point;
 407 extern int *lra_point_freq;
 408
 409 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
 410
 411 extern int lra_live_range_iter;
 412 extern void lra_create_live_ranges (bool, bool);
 413 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
 414 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
 415                                                lra_live_range_t);
 416 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
 417                                            lra_live_range_t);
 418 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
 419 extern void debug (lra_live_range &ref);
 420 extern void debug (lra_live_range *ptr);
 421 extern void lra_debug_live_range_list (lra_live_range_t);
 422 extern void lra_debug_pseudo_live_ranges (int);
 423 extern void lra_debug_live_ranges (void);
 424 extern void lra_clear_live_ranges (void);
 425 extern void lra_live_ranges_init (void);
 426 extern void lra_live_ranges_finish (void);
 427 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
 428
 429 /* lra-assigns.c: */
 430
 431 extern int lra_assignment_iter;
 432 extern int lra_assignment_iter_after_spill;
 433 extern void lra_setup_reg_renumber (int, int, bool);
 434 extern bool lra_assign (void);
 435
 436
 437 /* lra-coalesce.c: */
 438
 439 extern int lra_coalesce_iter;
 440 extern bool lra_coalesce (void);
 441
 442 /* lra-spills.c:  */
 443
 444 extern bool lra_need_for_spills_p (void);
 445 extern void lra_spill (void);
 446 extern void lra_final_code_change (void);
 447
 448 /* lra-remat.c:  */
 449
 450 extern int lra_rematerialization_iter;
 451 extern bool lra_remat (void);
 452
 453 /* lra-elimination.c: */
 454
 455 extern void lra_debug_elim_table (void);
 456 extern int lra_get_elimination_hard_regno (int);
 457 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
 458                                  bool, bool, HOST_WIDE_INT, bool);
 459 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, HOST_WIDE_INT);
 460 extern void lra_eliminate (bool, bool);
 461
 462 extern void lra_eliminate_reg_if_possible (rtx *);
 463
 464 \f
 465
 466 /* Return the hard register which given pseudo REGNO assigned to.
 467    Negative value means that the register got memory or we don't know
 468    allocation yet.  */
 469 static inline int
 470 lra_get_regno_hard_regno (int regno)
 471 {
 472   resize_reg_info ();
 473   return reg_renumber[regno];
 474 }
 475
 476 /* Change class of pseudo REGNO to NEW_CLASS.  Print info about it
 477    using TITLE.  Output a new line if NL_P.  */
 478 static void inline
 479 lra_change_class (int regno, enum reg_class new_class,
 480                   const char *title, bool nl_p)
 481 {
 482   lra_assert (regno >= FIRST_PSEUDO_REGISTER);
 483   if (lra_dump_file != NULL)
 484     fprintf (lra_dump_file, "%s class %s for r%d",
 485              title, reg_class_names[new_class], regno);
 486   setup_reg_classes (regno, new_class, NO_REGS, new_class);
 487   if (lra_dump_file != NULL && nl_p)
 488     fprintf (lra_dump_file, "\n");
 489 }
 490
 491 /* Update insn operands which are duplication of NOP operand.  The
 492    insn is represented by its LRA internal representation ID.  */
 493 static inline void
 494 lra_update_dup (lra_insn_recog_data_t id, int nop)
 495 {
 496   int i;
 497   struct lra_static_insn_data *static_id = id->insn_static_data;
 498
 499   for (i = 0; i < static_id->n_dups; i++)
 500     if (static_id->dup_num[i] == nop)
 501       *id->dup_loc[i] = *id->operand_loc[nop];
 502 }
 503
 504 /* Process operator duplications in insn with ID.  We do it after the
 505    operands processing.  Generally speaking, we could do this probably
 506    simultaneously with operands processing because a common practice
 507    is to enumerate the operators after their operands.  */
 508 static inline void
 509 lra_update_operator_dups (lra_insn_recog_data_t id)
 510 {
 511   int i;
 512   struct lra_static_insn_data *static_id = id->insn_static_data;
 513
 514   for (i = 0; i < static_id->n_dups; i++)
 515     {
 516       int ndup = static_id->dup_num[i];
 517
 518       if (static_id->operand[ndup].is_operator)
 519         *id->dup_loc[i] = *id->operand_loc[ndup];
 520     }
 521 }
 522
 523 /* Return info about INSN.  Set up the info if it is not done yet.  */
 524 static inline lra_insn_recog_data_t
 525 lra_get_insn_recog_data (rtx_insn *insn)
 526 {
 527   lra_insn_recog_data_t data;
 528   unsigned int uid = INSN_UID (insn);
 529
 530   if (lra_insn_recog_data_len > (int) uid
 531       && (data = lra_insn_recog_data[uid]) != NULL)
 532     {
 533       /* Check that we did not change insn without updating the insn
 534          info.  */
 535       lra_assert (data->insn == insn
 536                   && (INSN_CODE (insn) < 0
 537                       || data->icode == INSN_CODE (insn)));
 538       return data;
 539     }
 540   return lra_set_insn_recog_data (insn);
 541 }
 542
 543 /* Update offset from pseudos with VAL by INCR.  */
 544 static inline void
 545 lra_update_reg_val_offset (int val, int incr)
 546 {
 547   int i;
 548
 549   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
 550     {
 551       if (lra_reg_info[i].val == val)
 552         lra_reg_info[i].offset += incr;
 553     }
 554 }
 555
 556 /* Return true if register content is equal to VAL with OFFSET.  */
 557 static inline bool
 558 lra_reg_val_equal_p (int regno, int val, int offset)
 559 {
 560   if (lra_reg_info[regno].val == val
 561       && lra_reg_info[regno].offset == offset)
 562     return true;
 563
 564   return false;
 565 }
 566
 567 /* Assign value of register FROM to TO.  */
 568 static inline void
 569 lra_assign_reg_val (int from, int to)
 570 {
 571   lra_reg_info[to].val = lra_reg_info[from].val;
 572   lra_reg_info[to].offset = lra_reg_info[from].offset;
 573 }
 574
 575 #endif /* GCC_LRA_INT_H */