1 ;; Predicate definitions for IA-64.
2 ;; Copyright (C) 2004-2015 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; True if OP is a valid operand for the MEM of a CALL insn.
21 (define_predicate "call_operand"
22 (ior (match_code "symbol_ref")
23 (match_operand 0 "register_operand")))
25 ;; True if OP refers to any kind of symbol.
26 ;; For roughly the same reasons that pmode_register_operand exists, this
27 ;; predicate ignores its mode argument.
28 (define_special_predicate "symbolic_operand"
29 (match_code "symbol_ref,const,label_ref"))
31 ;; True if OP is a SYMBOL_REF which refers to a function.
32 (define_predicate "function_operand"
33 (and (match_code "symbol_ref")
34 (match_test "SYMBOL_REF_FUNCTION_P (op)")))
36 ;; True if OP refers to a symbol in the sdata section.
37 (define_predicate "sdata_symbolic_operand"
38 (match_code "symbol_ref,const")
40 HOST_WIDE_INT offset = 0, size = 0;
42 switch (GET_CODE (op))
46 if (GET_CODE (op) != PLUS
47 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
48 || GET_CODE (XEXP (op, 1)) != CONST_INT)
50 offset = INTVAL (XEXP (op, 1));
55 if (CONSTANT_POOL_ADDRESS_P (op))
57 size = GET_MODE_SIZE (get_pool_mode (op));
58 if (size > ia64_section_threshold)
65 if (!SYMBOL_REF_LOCAL_P (op) || !SYMBOL_REF_SMALL_P (op))
68 /* Note that in addition to DECLs, we can get various forms
70 t = SYMBOL_REF_DECL (op);
73 /* Common symbol isn't placed in small data section. */
76 t = DECL_SIZE_UNIT (t);
79 t = TYPE_SIZE_UNIT (TREE_TYPE (t));
80 if (t && tree_fits_shwi_p (t))
82 size = tree_to_shwi (t);
88 /* Deny the stupid user trick of addressing outside the object. Such
89 things quickly result in GPREL22 relocation overflows. Of course,
90 they're also highly undefined. From a pure pedant's point of view
91 they deserve a slap on the wrist (such as provided by a relocation
92 overflow), but that just leads to bugzilla noise. */
93 return (offset >= 0 && offset <= size);
100 ;; True if OP refers to a symbol in the small address area.
101 (define_predicate "small_addr_symbolic_operand"
102 (match_code "symbol_ref,const")
104 switch (GET_CODE (op))
108 if (GET_CODE (op) != PLUS
109 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
110 || GET_CODE (XEXP (op, 1)) != CONST_INT)
116 return SYMBOL_REF_SMALL_ADDR_P (op);
123 ;; True if OP refers to a symbol with which we may use any offset.
124 (define_predicate "any_offset_symbol_operand"
125 (match_code "symbol_ref")
127 if (TARGET_NO_PIC || TARGET_AUTO_PIC)
129 if (SYMBOL_REF_SMALL_ADDR_P (op))
131 if (SYMBOL_REF_FUNCTION_P (op))
133 if (sdata_symbolic_operand (op, mode))
138 ;; True if OP refers to a symbol with which we may use 14-bit aligned offsets.
139 ;; False if OP refers to a symbol with which we may not use any offset at any
141 (define_predicate "aligned_offset_symbol_operand"
142 (and (match_code "symbol_ref")
143 (match_test "! SYMBOL_REF_FUNCTION_P (op)")))
145 ;; True if OP refers to a symbol, and is appropriate for a GOT load.
146 (define_predicate "got_symbolic_operand"
147 (match_operand 0 "symbolic_operand" "")
149 HOST_WIDE_INT addend = 0;
151 switch (GET_CODE (op))
157 /* Accept only (plus (symbol_ref) (const_int)). */
159 if (GET_CODE (op) != PLUS
160 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
161 || GET_CODE (XEXP (op, 1)) != CONST_INT)
164 addend = INTVAL (XEXP (op, 1));
169 /* These symbols shouldn't be used with got loads. */
170 if (SYMBOL_REF_SMALL_ADDR_P (op))
172 if (SYMBOL_REF_TLS_MODEL (op) != 0)
175 if (any_offset_symbol_operand (op, mode))
178 /* The low 14 bits of the constant have been forced to zero
179 so that we do not use up so many GOT entries. Prevent cse
180 from undoing this. */
181 if (aligned_offset_symbol_operand (op, mode))
182 return (addend & 0x3fff) == 0;
191 ;; Return true if OP is a valid thread local storage symbolic operand.
192 (define_predicate "tls_symbolic_operand"
193 (match_code "symbol_ref,const")
195 switch (GET_CODE (op))
198 return SYMBOL_REF_TLS_MODEL (op) != 0;
202 if (GET_CODE (op) != PLUS
203 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
204 || GET_CODE (XEXP (op, 1)) != CONST_INT)
207 /* We only allow certain offsets for certain tls models. */
208 switch (SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
210 case TLS_MODEL_GLOBAL_DYNAMIC:
211 case TLS_MODEL_LOCAL_DYNAMIC:
214 case TLS_MODEL_INITIAL_EXEC:
215 return (INTVAL (XEXP (op, 1)) & 0x3fff) == 0;
217 case TLS_MODEL_LOCAL_EXEC:
229 ;; Return true if OP is a local-dynamic thread local storage symbolic operand.
230 (define_predicate "ld_tls_symbolic_operand"
231 (and (match_code "symbol_ref")
232 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
234 ;; Return true if OP is an initial-exec thread local storage symbolic operand.
235 (define_predicate "ie_tls_symbolic_operand"
236 (match_code "symbol_ref,const")
238 switch (GET_CODE (op))
242 if (GET_CODE (op) != PLUS
243 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
244 || GET_CODE (XEXP (op, 1)) != CONST_INT
245 || (INTVAL (XEXP (op, 1)) & 0x3fff) != 0)
251 return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC;
258 ;; Return true if OP is a local-exec thread local storage symbolic operand.
259 (define_predicate "le_tls_symbolic_operand"
260 (match_code "symbol_ref,const")
262 switch (GET_CODE (op))
266 if (GET_CODE (op) != PLUS
267 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
268 || GET_CODE (XEXP (op, 1)) != CONST_INT)
274 return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC;
281 ;; Like nonimmediate_operand, but don't allow MEMs that try to use a
282 ;; POST_MODIFY with a REG as displacement.
283 (define_predicate "destination_operand"
284 (and (match_operand 0 "nonimmediate_operand")
285 (match_test "GET_CODE (op) != MEM
286 || GET_CODE (XEXP (op, 0)) != POST_MODIFY
287 || GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 1)) != REG")))
289 ;; Like destination_operand, but don't allow any post-increments.
290 (define_predicate "not_postinc_destination_operand"
291 (and (match_operand 0 "nonimmediate_operand")
292 (match_test "GET_CODE (op) != MEM
293 || GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
295 ;; Like memory_operand, but don't allow post-increments.
296 (define_predicate "not_postinc_memory_operand"
297 (and (match_operand 0 "memory_operand")
298 (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
300 ;; True if OP is a general operand, with some restrictions on symbols.
301 (define_predicate "move_operand"
302 (match_operand 0 "general_operand")
304 switch (GET_CODE (op))
308 HOST_WIDE_INT addend;
310 /* Accept only (plus (symbol_ref) (const_int)). */
312 if (GET_CODE (op) != PLUS
313 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
314 || GET_CODE (XEXP (op, 1)) != CONST_INT)
317 addend = INTVAL (XEXP (op, 1));
320 /* After reload, we want to allow any offset whatsoever. This
321 allows reload the opportunity to avoid spilling addresses to
322 the stack, and instead simply substitute in the value from a
323 REG_EQUIV. We'll split this up again when splitting the insn. */
324 if (reload_in_progress || reload_completed)
327 /* Some symbol types we allow to use with any offset. */
328 if (any_offset_symbol_operand (op, mode))
331 /* Some symbol types we allow offsets with the low 14 bits of the
332 constant forced to zero so that we do not use up so many GOT
333 entries. We want to prevent cse from undoing this. */
334 if (aligned_offset_symbol_operand (op, mode))
335 return (addend & 0x3fff) == 0;
337 /* The remaining symbol types may never be used with an offset. */
346 ;; Like move_operand but don't allow post-increments.
347 (define_predicate "not_postinc_move_operand"
348 (and (match_operand 0 "move_operand")
349 (match_test "GET_CODE (op) != MEM
350 || GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
352 ;; True if OP is a register operand that is (or could be) a GR reg.
353 (define_predicate "gr_register_operand"
354 (match_operand 0 "register_operand")
357 if (GET_CODE (op) == SUBREG)
358 op = SUBREG_REG (op);
361 return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
364 ;; True if OP is a register operand that is (or could be) an FR reg.
365 (define_predicate "fr_register_operand"
366 (match_operand 0 "register_operand")
369 if (GET_CODE (op) == SUBREG)
370 op = SUBREG_REG (op);
373 return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
376 ;; True if OP is a register operand that is (or could be) a GR/FR reg.
377 (define_predicate "grfr_register_operand"
378 (match_operand 0 "register_operand")
381 if (GET_CODE (op) == SUBREG)
382 op = SUBREG_REG (op);
385 return (regno >= FIRST_PSEUDO_REGISTER
386 || GENERAL_REGNO_P (regno)
387 || FR_REGNO_P (regno));
390 ;; True if OP is a nonimmediate operand that is (or could be) a GR reg.
391 (define_predicate "gr_nonimmediate_operand"
392 (match_operand 0 "nonimmediate_operand")
396 if (GET_CODE (op) == MEM)
398 if (GET_CODE (op) == SUBREG)
399 op = SUBREG_REG (op);
402 return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
405 ;; True if OP is a nonimmediate operand that is (or could be) a FR reg.
406 (define_predicate "fr_nonimmediate_operand"
407 (match_operand 0 "nonimmediate_operand")
411 if (GET_CODE (op) == MEM)
413 if (GET_CODE (op) == SUBREG)
414 op = SUBREG_REG (op);
417 return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
420 ;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg.
421 (define_predicate "grfr_nonimmediate_operand"
422 (match_operand 0 "nonimmediate_operand")
426 if (GET_CODE (op) == MEM)
428 if (GET_CODE (op) == SUBREG)
429 op = SUBREG_REG (op);
432 return (regno >= FIRST_PSEUDO_REGISTER
433 || GENERAL_REGNO_P (regno)
434 || FR_REGNO_P (regno));
437 ;; True if OP is a GR register operand, or zero.
438 (define_predicate "gr_reg_or_0_operand"
439 (ior (match_operand 0 "gr_register_operand")
440 (and (match_code "const_int,const_double,const_vector")
441 (match_test "op == CONST0_RTX (GET_MODE (op))"))))
443 ;; True if OP is a GR register operand, or a 5-bit immediate operand.
444 (define_predicate "gr_reg_or_5bit_operand"
445 (ior (match_operand 0 "gr_register_operand")
446 (and (match_code "const_int")
447 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))))
449 ;; True if OP is a GR register operand, or a 6-bit immediate operand.
450 (define_predicate "gr_reg_or_6bit_operand"
451 (ior (match_operand 0 "gr_register_operand")
452 (and (match_code "const_int")
453 (match_test "satisfies_constraint_M (op)"))))
455 ;; True if OP is a GR register operand, or an 8-bit immediate operand.
456 (define_predicate "gr_reg_or_8bit_operand"
457 (ior (match_operand 0 "gr_register_operand")
458 (and (match_code "const_int")
459 (match_test "satisfies_constraint_K (op)"))))
461 ;; True if OP is a GR/FR register operand, or an 8-bit immediate operand.
462 (define_predicate "grfr_reg_or_8bit_operand"
463 (ior (match_operand 0 "grfr_register_operand")
464 (and (match_code "const_int")
465 (match_test "satisfies_constraint_K (op)"))))
467 ;; True if OP is a register operand, or an 8-bit adjusted immediate operand.
468 (define_predicate "gr_reg_or_8bit_adjusted_operand"
469 (ior (match_operand 0 "gr_register_operand")
470 (and (match_code "const_int")
471 (match_test "satisfies_constraint_L (op)"))))
473 ;; True if OP is a register operand, or is valid for both an 8-bit
474 ;; immediate and an 8-bit adjusted immediate operand. This is necessary
475 ;; because when we emit a compare, we don't know what the condition will be,
476 ;; so we need the union of the immediates accepted by GT and LT.
477 (define_predicate "gr_reg_or_8bit_and_adjusted_operand"
478 (ior (match_operand 0 "gr_register_operand")
479 (and (match_code "const_int")
480 (match_test "satisfies_constraint_K (op)
481 && satisfies_constraint_L (op)"))))
483 ;; True if OP is a register operand, or a 14-bit immediate operand.
484 (define_predicate "gr_reg_or_14bit_operand"
485 (ior (match_operand 0 "gr_register_operand")
486 (and (match_code "const_int")
487 (match_test "satisfies_constraint_I (op)"))))
489 ;; True if OP is a register operand, or a 22-bit immediate operand.
490 (define_predicate "gr_reg_or_22bit_operand"
491 (ior (match_operand 0 "gr_register_operand")
492 (and (match_code "const_int")
493 (match_test "satisfies_constraint_J (op)"))))
495 ;; True if OP is a 7-bit immediate operand.
496 (define_predicate "dshift_count_operand"
497 (and (match_code "const_int")
498 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 128")))
500 ;; True if OP is a 6-bit immediate operand.
501 (define_predicate "shift_count_operand"
502 (and (match_code "const_int")
503 (match_test "satisfies_constraint_M (op)")))
505 ;; True if OP-1 is a 6-bit immediate operand, used in extr instruction.
506 (define_predicate "extr_len_operand"
507 (and (match_code "const_int")
508 (match_test "satisfies_constraint_M (GEN_INT (INTVAL (op) - 1))")))
510 ;; True if OP is a 5-bit immediate operand.
511 (define_predicate "shift_32bit_count_operand"
512 (and (match_code "const_int")
513 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))
515 ;; True if OP is one of the immediate values 2, 4, 8, or 16.
516 (define_predicate "shladd_operand"
517 (and (match_code "const_int")
518 (match_test "INTVAL (op) == 2 || INTVAL (op) == 4 ||
519 INTVAL (op) == 8 || INTVAL (op) == 16")))
521 ;; True if OP is one of the immediate values 1, 2, 3, or 4.
522 (define_predicate "shladd_log2_operand"
523 (and (match_code "const_int")
524 (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 4")))
526 ;; True if OP is one of the immediate values -16, -8, -4, -1, 1, 4, 8, 16.
527 (define_predicate "fetchadd_operand"
528 (and (match_code "const_int")
529 (match_test "INTVAL (op) == -16 || INTVAL (op) == -8 ||
530 INTVAL (op) == -4 || INTVAL (op) == -1 ||
531 INTVAL (op) == 1 || INTVAL (op) == 4 ||
532 INTVAL (op) == 8 || INTVAL (op) == 16")))
534 ;; True if OP is one of the immediate values 0, 7, 15, 16
535 (define_predicate "pmpyshr_operand"
536 (and (match_code "const_int")
537 (match_test "INTVAL (op) == 0 || INTVAL (op) == 7
538 || INTVAL (op) == 15 || INTVAL (op) == 16")))
540 ;; True if OP is 0..3.
541 (define_predicate "const_int_2bit_operand"
542 (and (match_code "const_int")
543 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))
545 ;; True if OP is a floating-point constant zero, one, or a register.
546 (define_predicate "fr_reg_or_fp01_operand"
547 (ior (match_operand 0 "fr_register_operand")
548 (and (match_code "const_double")
549 (match_test "satisfies_constraint_G (op)"))))
551 ;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs.
552 (define_predicate "xfreg_or_fp01_operand"
553 (and (match_operand 0 "fr_reg_or_fp01_operand")
554 (not (match_code "subreg"))))
556 ;; Like fr_reg_or_fp01_operand, but don't allow 0 if flag_signed_zero is set.
557 ;; Using f0 as the second arg to fadd or fsub, or as the third arg to fma or
558 ;; fms can cause a zero result to have the wrong sign.
559 (define_predicate "fr_reg_or_signed_fp01_operand"
560 (ior (match_operand 0 "fr_register_operand")
561 (and (match_code "const_double")
562 (match_test "satisfies_constraint_Z (op)"))))
564 ;; Like fr_reg_or_signed_fp01_operand, but don't allow any SUBREGs.
565 (define_predicate "xfreg_or_signed_fp01_operand"
566 (and (match_operand 0 "fr_reg_or_signed_fp01_operand")
567 (not (match_code "subreg"))))
569 ;; True if OP is a constant zero, or a register.
570 (define_predicate "fr_reg_or_0_operand"
571 (ior (match_operand 0 "fr_register_operand")
572 (and (match_code "const_double,const_vector")
573 (match_test "op == CONST0_RTX (GET_MODE (op))"))))
575 ;; Return 1 if OP is a valid comparison operator for "cbranch" instructions.
576 ;; If we're assuming that FP operations cannot generate user-visible traps,
577 ;; then we can use the FP unordered-signaling instructions to implement the
578 ;; FP unordered-quiet comparison predicates.
579 (define_predicate "ia64_cbranch_operator"
580 (if_then_else (match_test "flag_trapping_math")
581 (ior (match_operand 0 "ordered_comparison_operator")
582 (match_code "ordered,unordered"))
583 (and (match_operand 0 "comparison_operator")
584 (not (match_code "uneq,ltgt")))))
586 ;; True if this is a comparison operator, which accepts a normal 8-bit
587 ;; signed immediate operand.
588 (define_predicate "normal_comparison_operator"
589 (match_code "eq,ne,gt,le,gtu,leu"))
591 ;; True if this is a comparison operator, which accepts an adjusted 8-bit
592 ;; signed immediate operand.
593 (define_predicate "adjusted_comparison_operator"
594 (match_code "lt,ge,ltu,geu"))
596 ;; True if this is a signed inequality operator.
597 (define_predicate "signed_inequality_operator"
598 (match_code "ge,gt,le,lt"))
600 ;; True if this operator is valid for predication.
601 (define_predicate "predicate_operator"
602 (match_code "eq,ne"))
604 ;; True if this operator can be used in a conditional operation.
605 (define_predicate "condop_operator"
606 (match_code "plus,minus,ior,xor,and"))
608 ;; These three are hardware registers that can only be addressed in
609 ;; DImode. It's not strictly necessary to test mode == DImode here,
610 ;; but it makes decent insurance against someone writing a
611 ;; match_operand wrong.
613 ;; True if this is the ar.lc register.
614 (define_predicate "ar_lc_reg_operand"
615 (and (match_code "reg")
616 (match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM")))
618 ;; True if this is the ar.ccv register.
619 (define_predicate "ar_ccv_reg_operand"
620 (and (match_code "reg")
621 (match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM")))
623 ;; True if this is the ar.pfs register.
624 (define_predicate "ar_pfs_reg_operand"
625 (and (match_code "reg")
626 (match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM")))
628 ;; True if OP is valid as a base register in a reg + offset address.
629 ;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected
630 ;; checks from pa.c basereg_operand as well? Seems to be OK without them
632 (define_predicate "basereg_operand"
633 (match_operand 0 "register_operand")
635 return REG_P (op) && REG_POINTER (op);
638 ;; True if this is the right-most vector element; for mux1 @brcst.
639 (define_predicate "mux1_brcst_element"
640 (and (match_code "const_int")
641 (match_test "INTVAL (op) == (TARGET_BIG_ENDIAN ? 7 : 0)")))