1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2020 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
77 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
,
79 unsigned HOST_WIDE_INT
, bool);
80 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
81 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
82 static rtx_insn
*compress_float_constant (rtx
, rtx
);
83 static rtx
get_subtarget (rtx
);
84 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
85 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
86 machine_mode
, tree
, alias_set_type
, bool, bool);
88 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
90 static int is_aligning_offset (const_tree
, const_tree
);
91 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
92 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
94 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
96 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
98 static rtx
const_vector_from_tree (tree
);
99 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
100 static tree
tree_expr_size (const_tree
);
101 static HOST_WIDE_INT
int_expr_size (tree
);
102 static void convert_mode_scalar (rtx
, rtx
, int);
105 /* This is run to set up which modes can be used
106 directly in memory and to initialize the block move optab. It is run
107 at the beginning of compilation and when the target is reinitialized. */
110 init_expr_target (void)
117 /* Try indexing by frame ptr and try by stack ptr.
118 It is known that on the Convex the stack ptr isn't a valid index.
119 With luck, one or the other is valid on any machine. */
120 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
121 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
123 /* A scratch register we can modify in-place below to avoid
124 useless RTL allocations. */
125 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
127 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
128 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
129 PATTERN (insn
) = pat
;
131 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
132 mode
= (machine_mode
) ((int) mode
+ 1))
136 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
137 PUT_MODE (mem
, mode
);
138 PUT_MODE (mem1
, mode
);
140 /* See if there is some register that can be used in this mode and
141 directly loaded or stored from memory. */
143 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
144 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
145 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
148 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
151 set_mode_and_regno (reg
, mode
, regno
);
154 SET_DEST (pat
) = reg
;
155 if (recog (pat
, insn
, &num_clobbers
) >= 0)
156 direct_load
[(int) mode
] = 1;
158 SET_SRC (pat
) = mem1
;
159 SET_DEST (pat
) = reg
;
160 if (recog (pat
, insn
, &num_clobbers
) >= 0)
161 direct_load
[(int) mode
] = 1;
164 SET_DEST (pat
) = mem
;
165 if (recog (pat
, insn
, &num_clobbers
) >= 0)
166 direct_store
[(int) mode
] = 1;
169 SET_DEST (pat
) = mem1
;
170 if (recog (pat
, insn
, &num_clobbers
) >= 0)
171 direct_store
[(int) mode
] = 1;
175 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
177 opt_scalar_float_mode mode_iter
;
178 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
180 scalar_float_mode mode
= mode_iter
.require ();
181 scalar_float_mode srcmode
;
182 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
186 ic
= can_extend_p (mode
, srcmode
, 0);
187 if (ic
== CODE_FOR_nothing
)
190 PUT_MODE (mem
, srcmode
);
192 if (insn_operand_matches (ic
, 1, mem
))
193 float_extend_from_mem
[mode
][srcmode
] = true;
198 /* This is run at the start of compiling a function. */
203 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
206 /* Copy data from FROM to TO, where the machine modes are not the same.
207 Both modes may be integer, or both may be floating, or both may be
209 UNSIGNEDP should be nonzero if FROM is an unsigned type.
210 This causes zero-extension instead of sign-extension. */
213 convert_move (rtx to
, rtx from
, int unsignedp
)
215 machine_mode to_mode
= GET_MODE (to
);
216 machine_mode from_mode
= GET_MODE (from
);
218 gcc_assert (to_mode
!= BLKmode
);
219 gcc_assert (from_mode
!= BLKmode
);
221 /* If the source and destination are already the same, then there's
226 /* If FROM is a SUBREG that indicates that we have already done at least
227 the required extension, strip it. We don't handle such SUBREGs as
230 scalar_int_mode to_int_mode
;
231 if (GET_CODE (from
) == SUBREG
232 && SUBREG_PROMOTED_VAR_P (from
)
233 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
234 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
235 >= GET_MODE_PRECISION (to_int_mode
))
236 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
238 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
239 from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 if (GET_MODE_UNIT_PRECISION (to_mode
)
254 > GET_MODE_UNIT_PRECISION (from_mode
))
256 optab op
= unsignedp
? zext_optab
: sext_optab
;
257 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
258 if (icode
!= CODE_FOR_nothing
)
260 emit_unop_insn (icode
, to
, from
,
261 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
266 if (GET_MODE_UNIT_PRECISION (to_mode
)
267 < GET_MODE_UNIT_PRECISION (from_mode
))
269 insn_code icode
= convert_optab_handler (trunc_optab
,
271 if (icode
!= CODE_FOR_nothing
)
273 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
278 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
279 GET_MODE_BITSIZE (to_mode
)));
281 if (VECTOR_MODE_P (to_mode
))
282 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
284 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
286 emit_move_insn (to
, from
);
290 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
292 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
293 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
297 convert_mode_scalar (to
, from
, unsignedp
);
300 /* Like convert_move, but deals only with scalar modes. */
303 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
305 /* Both modes should be scalar types. */
306 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
307 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
308 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
309 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
313 gcc_assert (to_real
== from_real
);
315 /* rtx code for making an equivalent value. */
316 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
317 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
325 gcc_assert ((GET_MODE_PRECISION (from_mode
)
326 != GET_MODE_PRECISION (to_mode
))
327 || (DECIMAL_FLOAT_MODE_P (from_mode
)
328 != DECIMAL_FLOAT_MODE_P (to_mode
)));
330 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
331 /* Conversion between decimal float and binary float, same size. */
332 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
333 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
338 /* Try converting directly if the insn is supported. */
340 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
341 if (code
!= CODE_FOR_nothing
)
343 emit_unop_insn (code
, to
, from
,
344 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
348 /* Otherwise use a libcall. */
349 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
351 /* Is this conversion implemented yet? */
352 gcc_assert (libcall
);
355 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
357 insns
= get_insns ();
359 emit_libcall_block (insns
, to
, value
,
360 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
362 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
366 /* Handle pointer conversion. */ /* SPEE 900220. */
367 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
371 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
378 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
381 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
387 /* Targets are expected to provide conversion insns between PxImode and
388 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
389 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
391 scalar_int_mode full_mode
392 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
394 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
395 != CODE_FOR_nothing
);
397 if (full_mode
!= from_mode
)
398 from
= convert_to_mode (full_mode
, from
, unsignedp
);
399 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
403 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
406 scalar_int_mode full_mode
407 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
408 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
409 enum insn_code icode
;
411 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
412 gcc_assert (icode
!= CODE_FOR_nothing
);
414 if (to_mode
== full_mode
)
416 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
420 new_from
= gen_reg_rtx (full_mode
);
421 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
423 /* else proceed to integer conversions below. */
424 from_mode
= full_mode
;
428 /* Make sure both are fixed-point modes or both are not. */
429 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
430 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
431 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
433 /* If we widen from_mode to to_mode and they are in the same class,
434 we won't saturate the result.
435 Otherwise, always saturate the result to play safe. */
436 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
437 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
438 expand_fixed_convert (to
, from
, 0, 0);
440 expand_fixed_convert (to
, from
, 0, 1);
444 /* Now both modes are integers. */
446 /* Handle expanding beyond a word. */
447 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
448 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
455 scalar_mode lowpart_mode
;
456 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
458 /* Try converting directly if the insn is supported. */
459 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
462 /* If FROM is a SUBREG, put it into a register. Do this
463 so that we always generate the same set of insns for
464 better cse'ing; if an intermediate assignment occurred,
465 we won't be doing the operation directly on the SUBREG. */
466 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
467 from
= force_reg (from_mode
, from
);
468 emit_unop_insn (code
, to
, from
, equiv_code
);
471 /* Next, try converting via full word. */
472 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
473 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
474 != CODE_FOR_nothing
))
476 rtx word_to
= gen_reg_rtx (word_mode
);
479 if (reg_overlap_mentioned_p (to
, from
))
480 from
= force_reg (from_mode
, from
);
483 convert_move (word_to
, from
, unsignedp
);
484 emit_unop_insn (code
, to
, word_to
, equiv_code
);
488 /* No special multiword conversion insn; do it by hand. */
491 /* Since we will turn this into a no conflict block, we must ensure
492 the source does not overlap the target so force it into an isolated
493 register when maybe so. Likewise for any MEM input, since the
494 conversion sequence might require several references to it and we
495 must ensure we're getting the same value every time. */
497 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
498 from
= force_reg (from_mode
, from
);
500 /* Get a copy of FROM widened to a word, if necessary. */
501 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
502 lowpart_mode
= word_mode
;
504 lowpart_mode
= from_mode
;
506 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
508 lowpart
= gen_lowpart (lowpart_mode
, to
);
509 emit_move_insn (lowpart
, lowfrom
);
511 /* Compute the value to put in each remaining word. */
513 fill_value
= const0_rtx
;
515 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
516 LT
, lowfrom
, const0_rtx
,
517 lowpart_mode
, 0, -1);
519 /* Fill the remaining words. */
520 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
522 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
523 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
525 gcc_assert (subword
);
527 if (fill_value
!= subword
)
528 emit_move_insn (subword
, fill_value
);
531 insns
= get_insns ();
538 /* Truncating multi-word to a word or less. */
539 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
540 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
543 && ! MEM_VOLATILE_P (from
)
544 && direct_load
[(int) to_mode
]
545 && ! mode_dependent_address_p (XEXP (from
, 0),
546 MEM_ADDR_SPACE (from
)))
548 || GET_CODE (from
) == SUBREG
))
549 from
= force_reg (from_mode
, from
);
550 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
554 /* Now follow all the conversions between integers
555 no more than a word long. */
557 /* For truncation, usually we can just refer to FROM in a narrower mode. */
558 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
559 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
562 && ! MEM_VOLATILE_P (from
)
563 && direct_load
[(int) to_mode
]
564 && ! mode_dependent_address_p (XEXP (from
, 0),
565 MEM_ADDR_SPACE (from
)))
567 || GET_CODE (from
) == SUBREG
))
568 from
= force_reg (from_mode
, from
);
569 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
570 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
571 from
= copy_to_reg (from
);
572 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
576 /* Handle extension. */
577 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
579 /* Convert directly if that works. */
580 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
583 emit_unop_insn (code
, to
, from
, equiv_code
);
591 /* Search for a mode to convert via. */
592 opt_scalar_mode intermediate_iter
;
593 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
595 scalar_mode intermediate
= intermediate_iter
.require ();
596 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
598 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
599 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
601 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
602 != CODE_FOR_nothing
))
604 convert_move (to
, convert_to_mode (intermediate
, from
,
605 unsignedp
), unsignedp
);
610 /* No suitable intermediate mode.
611 Generate what we need with shifts. */
612 shift_amount
= (GET_MODE_PRECISION (to_mode
)
613 - GET_MODE_PRECISION (from_mode
));
614 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
615 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
617 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
620 emit_move_insn (to
, tmp
);
625 /* Support special truncate insns for certain modes. */
626 if (convert_optab_handler (trunc_optab
, to_mode
,
627 from_mode
) != CODE_FOR_nothing
)
629 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
634 /* Handle truncation of volatile memrefs, and so on;
635 the things that couldn't be truncated directly,
636 and for which there was no special instruction.
638 ??? Code above formerly short-circuited this, for most integer
639 mode pairs, with a force_reg in from_mode followed by a recursive
640 call to this routine. Appears always to have been wrong. */
641 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
643 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
644 emit_move_insn (to
, temp
);
648 /* Mode combination is not recognized. */
652 /* Return an rtx for a value that would result
653 from converting X to mode MODE.
654 Both X and MODE may be floating, or both integer.
655 UNSIGNEDP is nonzero if X is an unsigned value.
656 This can be done by referring to a part of X in place
657 or by copying to a new temporary with conversion. */
660 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
662 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
665 /* Return an rtx for a value that would result
666 from converting X from mode OLDMODE to mode MODE.
667 Both modes may be floating, or both integer.
668 UNSIGNEDP is nonzero if X is an unsigned value.
670 This can be done by referring to a part of X in place
671 or by copying to a new temporary with conversion.
673 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
676 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
679 scalar_int_mode int_mode
;
681 /* If FROM is a SUBREG that indicates that we have already done at least
682 the required extension, strip it. */
684 if (GET_CODE (x
) == SUBREG
685 && SUBREG_PROMOTED_VAR_P (x
)
686 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
687 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
688 >= GET_MODE_PRECISION (int_mode
))
689 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
690 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
692 if (GET_MODE (x
) != VOIDmode
)
693 oldmode
= GET_MODE (x
);
698 if (CONST_SCALAR_INT_P (x
)
699 && is_a
<scalar_int_mode
> (mode
, &int_mode
))
701 /* If the caller did not tell us the old mode, then there is not
702 much to do with respect to canonicalization. We have to
703 assume that all the bits are significant. */
704 if (!is_a
<scalar_int_mode
> (oldmode
))
705 oldmode
= MAX_MODE_INT
;
706 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
707 GET_MODE_PRECISION (int_mode
),
708 unsignedp
? UNSIGNED
: SIGNED
);
709 return immed_wide_int_const (w
, int_mode
);
712 /* We can do this with a gen_lowpart if both desired and current modes
713 are integer, and this is either a constant integer, a register, or a
715 scalar_int_mode int_oldmode
;
716 if (is_int_mode (mode
, &int_mode
)
717 && is_int_mode (oldmode
, &int_oldmode
)
718 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
719 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
720 || CONST_POLY_INT_P (x
)
722 && (!HARD_REGISTER_P (x
)
723 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
724 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
725 return gen_lowpart (int_mode
, x
);
727 /* Converting from integer constant into mode is always equivalent to an
729 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
731 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
732 GET_MODE_BITSIZE (oldmode
)));
733 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
736 temp
= gen_reg_rtx (mode
);
737 convert_move (temp
, x
, unsignedp
);
741 /* Return the largest alignment we can use for doing a move (or store)
742 of MAX_PIECES. ALIGN is the largest alignment we could use. */
745 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
747 scalar_int_mode tmode
748 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
750 if (align
>= GET_MODE_ALIGNMENT (tmode
))
751 align
= GET_MODE_ALIGNMENT (tmode
);
754 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
755 opt_scalar_int_mode mode_iter
;
756 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
758 tmode
= mode_iter
.require ();
759 if (GET_MODE_SIZE (tmode
) > max_pieces
760 || targetm
.slow_unaligned_access (tmode
, align
))
765 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
771 /* Return the widest integer mode that is narrower than SIZE bytes. */
773 static scalar_int_mode
774 widest_int_mode_for_size (unsigned int size
)
776 scalar_int_mode result
= NARROWEST_INT_MODE
;
778 gcc_checking_assert (size
> 1);
780 opt_scalar_int_mode tmode
;
781 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
782 if (GET_MODE_SIZE (tmode
.require ()) < size
)
783 result
= tmode
.require ();
788 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
789 and should be performed piecewise. */
792 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
793 enum by_pieces_operation op
)
795 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
796 optimize_insn_for_speed_p ());
799 /* Determine whether the LEN bytes can be moved by using several move
800 instructions. Return nonzero if a call to move_by_pieces should
804 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
806 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
809 /* Return number of insns required to perform operation OP by pieces
810 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
812 unsigned HOST_WIDE_INT
813 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
814 unsigned int max_size
, by_pieces_operation op
)
816 unsigned HOST_WIDE_INT n_insns
= 0;
818 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
820 while (max_size
> 1 && l
> 0)
822 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
823 enum insn_code icode
;
825 unsigned int modesize
= GET_MODE_SIZE (mode
);
827 icode
= optab_handler (mov_optab
, mode
);
828 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
830 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
838 case COMPARE_BY_PIECES
:
839 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
840 int batch_ops
= 4 * batch
- 1;
841 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
842 n_insns
+= full
* batch_ops
;
843 if (n_pieces
% batch
!= 0)
856 /* Used when performing piecewise block operations, holds information
857 about one of the memory objects involved. The member functions
858 can be used to generate code for loading from the object and
859 updating the address when iterating. */
863 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
866 /* The address of the object. Can differ from that seen in the
867 MEM rtx if we copied the address to a register. */
869 /* Nonzero if the address on the object has an autoincrement already,
870 signifies whether that was an increment or decrement. */
871 signed char m_addr_inc
;
872 /* Nonzero if we intend to use autoinc without the address already
873 having autoinc form. We will insert add insns around each memory
874 reference, expecting later passes to form autoinc addressing modes.
875 The only supported options are predecrement and postincrement. */
876 signed char m_explicit_inc
;
877 /* True if we have either of the two possible cases of using
880 /* True if this is an address to be used for load operations rather
884 /* Optionally, a function to obtain constants for any given offset into
885 the objects, and data associated with it. */
886 by_pieces_constfn m_constfn
;
889 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
890 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
891 void increment_address (HOST_WIDE_INT
);
892 void maybe_predec (HOST_WIDE_INT
);
893 void maybe_postinc (HOST_WIDE_INT
);
894 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
901 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
902 true if the operation to be performed on this object is a load
903 rather than a store. For stores, OBJ can be NULL, in which case we
904 assume the operation is a stack push. For loads, the optional
905 CONSTFN and its associated CFNDATA can be used in place of the
908 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
910 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
916 rtx addr
= XEXP (obj
, 0);
917 rtx_code code
= GET_CODE (addr
);
919 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
920 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
923 m_addr_inc
= dec
? -1 : 1;
925 /* While we have always looked for these codes here, the code
926 implementing the memory operation has never handled them.
927 Support could be added later if necessary or beneficial. */
928 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
936 if (STACK_GROWS_DOWNWARD
)
942 gcc_assert (constfn
!= NULL
);
946 gcc_assert (is_load
);
949 /* Decide whether to use autoinc for an address involved in a memory op.
950 MODE is the mode of the accesses, REVERSE is true if we've decided to
951 perform the operation starting from the end, and LEN is the length of
952 the operation. Don't override an earlier decision to set m_auto. */
955 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
958 if (m_auto
|| m_obj
== NULL_RTX
)
961 bool use_predec
= (m_is_load
962 ? USE_LOAD_PRE_DECREMENT (mode
)
963 : USE_STORE_PRE_DECREMENT (mode
));
964 bool use_postinc
= (m_is_load
965 ? USE_LOAD_POST_INCREMENT (mode
)
966 : USE_STORE_POST_INCREMENT (mode
));
967 machine_mode addr_mode
= get_address_mode (m_obj
);
969 if (use_predec
&& reverse
)
971 m_addr
= copy_to_mode_reg (addr_mode
,
972 plus_constant (addr_mode
,
977 else if (use_postinc
&& !reverse
)
979 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
983 else if (CONSTANT_P (m_addr
))
984 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
987 /* Adjust the address to refer to the data at OFFSET in MODE. If we
988 are using autoincrement for this address, we don't add the offset,
989 but we still modify the MEM's properties. */
992 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
995 return m_constfn (m_cfndata
, offset
, mode
);
996 if (m_obj
== NULL_RTX
)
999 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1001 return adjust_address (m_obj
, mode
, offset
);
1004 /* Emit an add instruction to increment the address by SIZE. */
1007 pieces_addr::increment_address (HOST_WIDE_INT size
)
1009 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1010 emit_insn (gen_add2_insn (m_addr
, amount
));
1013 /* If we are supposed to decrement the address after each access, emit code
1014 to do so now. Increment by SIZE (which has should have the correct sign
1018 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1020 if (m_explicit_inc
>= 0)
1022 gcc_assert (HAVE_PRE_DECREMENT
);
1023 increment_address (size
);
1026 /* If we are supposed to decrement the address after each access, emit code
1027 to do so now. Increment by SIZE. */
1030 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1032 if (m_explicit_inc
<= 0)
1034 gcc_assert (HAVE_POST_INCREMENT
);
1035 increment_address (size
);
1038 /* This structure is used by do_op_by_pieces to describe the operation
1041 class op_by_pieces_d
1044 pieces_addr m_to
, m_from
;
1045 unsigned HOST_WIDE_INT m_len
;
1046 HOST_WIDE_INT m_offset
;
1047 unsigned int m_align
;
1048 unsigned int m_max_size
;
1051 /* Virtual functions, overriden by derived classes for the specific
1053 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1054 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1055 virtual void finish_mode (machine_mode
)
1060 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1061 unsigned HOST_WIDE_INT
, unsigned int);
1065 /* The constructor for an op_by_pieces_d structure. We require two
1066 objects named TO and FROM, which are identified as loads or stores
1067 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1068 and its associated FROM_CFN_DATA can be used to replace loads with
1069 constant values. LEN describes the length of the operation. */
1071 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1072 rtx from
, bool from_load
,
1073 by_pieces_constfn from_cfn
,
1074 void *from_cfn_data
,
1075 unsigned HOST_WIDE_INT len
,
1077 : m_to (to
, to_load
, NULL
, NULL
),
1078 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1079 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1081 int toi
= m_to
.get_addr_inc ();
1082 int fromi
= m_from
.get_addr_inc ();
1083 if (toi
>= 0 && fromi
>= 0)
1085 else if (toi
<= 0 && fromi
<= 0)
1090 m_offset
= m_reverse
? len
: 0;
1091 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1092 from
? MEM_ALIGN (from
) : align
);
1094 /* If copying requires more than two move insns,
1095 copy addresses to registers (to make displacements shorter)
1096 and use post-increment if available. */
1097 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1099 /* Find the mode of the largest comparison. */
1100 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1102 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1103 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1106 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1110 /* This function contains the main loop used for expanding a block
1111 operation. First move what we can in the largest integer mode,
1112 then go to successively smaller modes. For every access, call
1113 GENFUN with the two operands and the EXTRA_DATA. */
1116 op_by_pieces_d::run ()
1118 while (m_max_size
> 1 && m_len
> 0)
1120 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1122 if (prepare_mode (mode
, m_align
))
1124 unsigned int size
= GET_MODE_SIZE (mode
);
1125 rtx to1
= NULL_RTX
, from1
;
1127 while (m_len
>= size
)
1132 to1
= m_to
.adjust (mode
, m_offset
);
1133 from1
= m_from
.adjust (mode
, m_offset
);
1135 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1136 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1138 generate (to1
, from1
, mode
);
1140 m_to
.maybe_postinc (size
);
1141 m_from
.maybe_postinc (size
);
1152 m_max_size
= GET_MODE_SIZE (mode
);
1155 /* The code above should have handled everything. */
1156 gcc_assert (!m_len
);
1159 /* Derived class from op_by_pieces_d, providing support for block move
1162 class move_by_pieces_d
: public op_by_pieces_d
1164 insn_gen_fn m_gen_fun
;
1165 void generate (rtx
, rtx
, machine_mode
);
1166 bool prepare_mode (machine_mode
, unsigned int);
1169 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1171 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1174 rtx
finish_retmode (memop_ret
);
1177 /* Return true if MODE can be used for a set of copies, given an
1178 alignment ALIGN. Prepare whatever data is necessary for later
1179 calls to generate. */
1182 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1184 insn_code icode
= optab_handler (mov_optab
, mode
);
1185 m_gen_fun
= GEN_FCN (icode
);
1186 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1189 /* A callback used when iterating for a compare_by_pieces_operation.
1190 OP0 and OP1 are the values that have been loaded and should be
1191 compared in MODE. If OP0 is NULL, this means we should generate a
1192 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1193 gen function that should be used to generate the mode. */
1196 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1197 machine_mode mode ATTRIBUTE_UNUSED
)
1199 #ifdef PUSH_ROUNDING
1200 if (op0
== NULL_RTX
)
1202 emit_single_push_insn (mode
, op1
, NULL
);
1206 emit_insn (m_gen_fun (op0
, op1
));
1209 /* Perform the final adjustment at the end of a string to obtain the
1210 correct return value for the block operation.
1211 Return value is based on RETMODE argument. */
1214 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1216 gcc_assert (!m_reverse
);
1217 if (retmode
== RETURN_END_MINUS_ONE
)
1219 m_to
.maybe_postinc (-1);
1222 return m_to
.adjust (QImode
, m_offset
);
1225 /* Generate several move instructions to copy LEN bytes from block FROM to
1226 block TO. (These are MEM rtx's with BLKmode).
1228 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1229 used to push FROM to the stack.
1231 ALIGN is maximum stack alignment we can assume.
1233 Return value is based on RETMODE argument. */
1236 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1237 unsigned int align
, memop_ret retmode
)
1239 #ifndef PUSH_ROUNDING
1244 move_by_pieces_d
data (to
, from
, len
, align
);
1248 if (retmode
!= RETURN_BEGIN
)
1249 return data
.finish_retmode (retmode
);
1254 /* Derived class from op_by_pieces_d, providing support for block move
1257 class store_by_pieces_d
: public op_by_pieces_d
1259 insn_gen_fn m_gen_fun
;
1260 void generate (rtx
, rtx
, machine_mode
);
1261 bool prepare_mode (machine_mode
, unsigned int);
1264 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1265 unsigned HOST_WIDE_INT len
, unsigned int align
)
1266 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1269 rtx
finish_retmode (memop_ret
);
1272 /* Return true if MODE can be used for a set of stores, given an
1273 alignment ALIGN. Prepare whatever data is necessary for later
1274 calls to generate. */
1277 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1279 insn_code icode
= optab_handler (mov_optab
, mode
);
1280 m_gen_fun
= GEN_FCN (icode
);
1281 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1284 /* A callback used when iterating for a store_by_pieces_operation.
1285 OP0 and OP1 are the values that have been loaded and should be
1286 compared in MODE. If OP0 is NULL, this means we should generate a
1287 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1288 gen function that should be used to generate the mode. */
1291 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1293 emit_insn (m_gen_fun (op0
, op1
));
1296 /* Perform the final adjustment at the end of a string to obtain the
1297 correct return value for the block operation.
1298 Return value is based on RETMODE argument. */
1301 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1303 gcc_assert (!m_reverse
);
1304 if (retmode
== RETURN_END_MINUS_ONE
)
1306 m_to
.maybe_postinc (-1);
1309 return m_to
.adjust (QImode
, m_offset
);
1312 /* Determine whether the LEN bytes generated by CONSTFUN can be
1313 stored to memory using several move instructions. CONSTFUNDATA is
1314 a pointer which will be passed as argument in every CONSTFUN call.
1315 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1316 a memset operation and false if it's a copy of a constant string.
1317 Return nonzero if a call to store_by_pieces should succeed. */
1320 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1321 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1322 void *constfundata
, unsigned int align
, bool memsetp
)
1324 unsigned HOST_WIDE_INT l
;
1325 unsigned int max_size
;
1326 HOST_WIDE_INT offset
= 0;
1327 enum insn_code icode
;
1329 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1330 rtx cst ATTRIBUTE_UNUSED
;
1335 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1339 optimize_insn_for_speed_p ()))
1342 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1344 /* We would first store what we can in the largest integer mode, then go to
1345 successively smaller modes. */
1348 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1352 max_size
= STORE_MAX_PIECES
+ 1;
1353 while (max_size
> 1 && l
> 0)
1355 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1357 icode
= optab_handler (mov_optab
, mode
);
1358 if (icode
!= CODE_FOR_nothing
1359 && align
>= GET_MODE_ALIGNMENT (mode
))
1361 unsigned int size
= GET_MODE_SIZE (mode
);
1368 cst
= (*constfun
) (constfundata
, offset
, mode
);
1369 if (!targetm
.legitimate_constant_p (mode
, cst
))
1379 max_size
= GET_MODE_SIZE (mode
);
1382 /* The code above should have handled everything. */
1389 /* Generate several move instructions to store LEN bytes generated by
1390 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1391 pointer which will be passed as argument in every CONSTFUN call.
1392 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1393 a memset operation and false if it's a copy of a constant string.
1394 Return value is based on RETMODE argument. */
1397 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1398 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1399 void *constfundata
, unsigned int align
, bool memsetp
,
1404 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1408 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1410 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1411 optimize_insn_for_speed_p ()));
1413 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1416 if (retmode
!= RETURN_BEGIN
)
1417 return data
.finish_retmode (retmode
);
1422 /* Callback routine for clear_by_pieces.
1423 Return const0_rtx unconditionally. */
1426 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1431 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1432 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1435 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1440 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1444 /* Context used by compare_by_pieces_genfn. It stores the fail label
1445 to jump to in case of miscomparison, and for branch ratios greater than 1,
1446 it stores an accumulator and the current and maximum counts before
1447 emitting another branch. */
1449 class compare_by_pieces_d
: public op_by_pieces_d
1451 rtx_code_label
*m_fail_label
;
1453 int m_count
, m_batch
;
1455 void generate (rtx
, rtx
, machine_mode
);
1456 bool prepare_mode (machine_mode
, unsigned int);
1457 void finish_mode (machine_mode
);
1459 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1460 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1461 rtx_code_label
*fail_label
)
1462 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1464 m_fail_label
= fail_label
;
1468 /* A callback used when iterating for a compare_by_pieces_operation.
1469 OP0 and OP1 are the values that have been loaded and should be
1470 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1471 context structure. */
1474 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1478 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1479 true, OPTAB_LIB_WIDEN
);
1481 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1482 true, OPTAB_LIB_WIDEN
);
1483 m_accumulator
= temp
;
1485 if (++m_count
< m_batch
)
1489 op0
= m_accumulator
;
1491 m_accumulator
= NULL_RTX
;
1493 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1494 m_fail_label
, profile_probability::uninitialized ());
1497 /* Return true if MODE can be used for a set of moves and comparisons,
1498 given an alignment ALIGN. Prepare whatever data is necessary for
1499 later calls to generate. */
1502 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1504 insn_code icode
= optab_handler (mov_optab
, mode
);
1505 if (icode
== CODE_FOR_nothing
1506 || align
< GET_MODE_ALIGNMENT (mode
)
1507 || !can_compare_p (EQ
, mode
, ccp_jump
))
1509 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1512 m_accumulator
= NULL_RTX
;
1517 /* Called after expanding a series of comparisons in MODE. If we have
1518 accumulated results for which we haven't emitted a branch yet, do
1522 compare_by_pieces_d::finish_mode (machine_mode mode
)
1524 if (m_accumulator
!= NULL_RTX
)
1525 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1526 NULL_RTX
, NULL
, m_fail_label
,
1527 profile_probability::uninitialized ());
1530 /* Generate several move instructions to compare LEN bytes from blocks
1531 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1533 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1534 used to push FROM to the stack.
1536 ALIGN is maximum stack alignment we can assume.
1538 Optionally, the caller can pass a constfn and associated data in A1_CFN
1539 and A1_CFN_DATA. describing that the second operand being compared is a
1540 known constant and how to obtain its data. */
1543 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1544 rtx target
, unsigned int align
,
1545 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1547 rtx_code_label
*fail_label
= gen_label_rtx ();
1548 rtx_code_label
*end_label
= gen_label_rtx ();
1550 if (target
== NULL_RTX
1551 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1552 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1554 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1559 emit_move_insn (target
, const0_rtx
);
1560 emit_jump (end_label
);
1562 emit_label (fail_label
);
1563 emit_move_insn (target
, const1_rtx
);
1564 emit_label (end_label
);
1569 /* Emit code to move a block Y to a block X. This may be done with
1570 string-move instructions, with multiple scalar move instructions,
1571 or with a library call.
1573 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1574 SIZE is an rtx that says how long they are.
1575 ALIGN is the maximum alignment we can assume they have.
1576 METHOD describes what kind of copy this is, and what mechanisms may be used.
1577 MIN_SIZE is the minimal size of block to move
1578 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1579 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1581 Return the address of the new block, if memcpy is called and returns it,
1585 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1586 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1587 unsigned HOST_WIDE_INT min_size
,
1588 unsigned HOST_WIDE_INT max_size
,
1589 unsigned HOST_WIDE_INT probable_max_size
,
1590 bool bail_out_libcall
, bool *is_move_done
,
1598 *is_move_done
= true;
1601 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1606 case BLOCK_OP_NORMAL
:
1607 case BLOCK_OP_TAILCALL
:
1611 case BLOCK_OP_CALL_PARM
:
1612 may_use_call
= block_move_libcall_safe_for_call_parm ();
1614 /* Make inhibit_defer_pop nonzero around the library call
1615 to force it to pop the arguments right away. */
1619 case BLOCK_OP_NO_LIBCALL
:
1623 case BLOCK_OP_NO_LIBCALL_RET
:
1631 gcc_assert (MEM_P (x
) && MEM_P (y
));
1632 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1633 gcc_assert (align
>= BITS_PER_UNIT
);
1635 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1636 block copy is more efficient for other large modes, e.g. DCmode. */
1637 x
= adjust_address (x
, BLKmode
, 0);
1638 y
= adjust_address (y
, BLKmode
, 0);
1640 /* If source and destination are the same, no need to copy anything. */
1641 if (rtx_equal_p (x
, y
)
1642 && !MEM_VOLATILE_P (x
)
1643 && !MEM_VOLATILE_P (y
))
1646 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1647 can be incorrect is coming from __builtin_memcpy. */
1648 poly_int64 const_size
;
1649 if (poly_int_rtx_p (size
, &const_size
))
1651 x
= shallow_copy_rtx (x
);
1652 y
= shallow_copy_rtx (y
);
1653 set_mem_size (x
, const_size
);
1654 set_mem_size (y
, const_size
);
1657 bool pieces_ok
= CONST_INT_P (size
)
1658 && can_move_by_pieces (INTVAL (size
), align
);
1659 bool pattern_ok
= false;
1661 if (!pieces_ok
|| might_overlap
)
1664 = emit_block_move_via_pattern (x
, y
, size
, align
,
1665 expected_align
, expected_size
,
1666 min_size
, max_size
, probable_max_size
,
1668 if (!pattern_ok
&& might_overlap
)
1670 /* Do not try any of the other methods below as they are not safe
1671 for overlapping moves. */
1672 *is_move_done
= false;
1680 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1681 else if (may_use_call
&& !might_overlap
1682 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1683 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1685 if (bail_out_libcall
)
1688 *is_move_done
= false;
1692 if (may_use_call
< 0)
1695 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1696 method
== BLOCK_OP_TAILCALL
);
1698 else if (might_overlap
)
1699 *is_move_done
= false;
1701 emit_block_move_via_loop (x
, y
, size
, align
);
1703 if (method
== BLOCK_OP_CALL_PARM
)
1710 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1712 unsigned HOST_WIDE_INT max
, min
= 0;
1713 if (GET_CODE (size
) == CONST_INT
)
1714 min
= max
= UINTVAL (size
);
1716 max
= GET_MODE_MASK (GET_MODE (size
));
1717 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1721 /* A subroutine of emit_block_move. Returns true if calling the
1722 block move libcall will not clobber any parameters which may have
1723 already been placed on the stack. */
1726 block_move_libcall_safe_for_call_parm (void)
1730 /* If arguments are pushed on the stack, then they're safe. */
1734 /* If registers go on the stack anyway, any argument is sure to clobber
1735 an outgoing argument. */
1736 #if defined (REG_PARM_STACK_SPACE)
1737 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1738 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1739 depend on its argument. */
1741 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1742 && REG_PARM_STACK_SPACE (fn
) != 0)
1746 /* If any argument goes in memory, then it might clobber an outgoing
1749 CUMULATIVE_ARGS args_so_far_v
;
1750 cumulative_args_t args_so_far
;
1753 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1754 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1755 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1757 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1758 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1760 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1761 function_arg_info
arg_info (mode
, /*named=*/true);
1762 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
1763 if (!tmp
|| !REG_P (tmp
))
1765 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
1767 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
1773 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1774 return true if successful.
1776 X is the destination of the copy or move.
1777 Y is the source of the copy or move.
1778 SIZE is the size of the block to be moved.
1780 MIGHT_OVERLAP indicates this originated with expansion of a
1781 builtin_memmove() and the source and destination blocks may
1786 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
1787 unsigned int expected_align
,
1788 HOST_WIDE_INT expected_size
,
1789 unsigned HOST_WIDE_INT min_size
,
1790 unsigned HOST_WIDE_INT max_size
,
1791 unsigned HOST_WIDE_INT probable_max_size
,
1794 if (expected_align
< align
)
1795 expected_align
= align
;
1796 if (expected_size
!= -1)
1798 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1799 expected_size
= probable_max_size
;
1800 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1801 expected_size
= min_size
;
1804 /* Since this is a move insn, we don't care about volatility. */
1805 temporary_volatile_ok
v (true);
1807 /* Try the most limited insn first, because there's no point
1808 including more than one in the machine description unless
1809 the more limited one has some advantage. */
1811 opt_scalar_int_mode mode_iter
;
1812 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1814 scalar_int_mode mode
= mode_iter
.require ();
1815 enum insn_code code
;
1817 code
= direct_optab_handler (movmem_optab
, mode
);
1819 code
= direct_optab_handler (cpymem_optab
, mode
);
1821 if (code
!= CODE_FOR_nothing
1822 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1823 here because if SIZE is less than the mode mask, as it is
1824 returned by the macro, it will definitely be less than the
1825 actual mode mask. Since SIZE is within the Pmode address
1826 space, we limit MODE to Pmode. */
1827 && ((CONST_INT_P (size
)
1828 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1829 <= (GET_MODE_MASK (mode
) >> 1)))
1830 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1831 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1833 class expand_operand ops
[9];
1836 /* ??? When called via emit_block_move_for_call, it'd be
1837 nice if there were some way to inform the backend, so
1838 that it doesn't fail the expansion because it thinks
1839 emitting the libcall would be more efficient. */
1840 nops
= insn_data
[(int) code
].n_generator_args
;
1841 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1843 create_fixed_operand (&ops
[0], x
);
1844 create_fixed_operand (&ops
[1], y
);
1845 /* The check above guarantees that this size conversion is valid. */
1846 create_convert_operand_to (&ops
[2], size
, mode
, true);
1847 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1850 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1851 create_integer_operand (&ops
[5], expected_size
);
1855 create_integer_operand (&ops
[6], min_size
);
1856 /* If we cannot represent the maximal size,
1857 make parameter NULL. */
1858 if ((HOST_WIDE_INT
) max_size
!= -1)
1859 create_integer_operand (&ops
[7], max_size
);
1861 create_fixed_operand (&ops
[7], NULL
);
1865 /* If we cannot represent the maximal size,
1866 make parameter NULL. */
1867 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1868 create_integer_operand (&ops
[8], probable_max_size
);
1870 create_fixed_operand (&ops
[8], NULL
);
1872 if (maybe_expand_insn (code
, nops
, ops
))
1880 /* A subroutine of emit_block_move. Copy the data via an explicit
1881 loop. This is used only when libcalls are forbidden. */
1882 /* ??? It'd be nice to copy in hunks larger than QImode. */
1885 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1886 unsigned int align ATTRIBUTE_UNUSED
)
1888 rtx_code_label
*cmp_label
, *top_label
;
1889 rtx iter
, x_addr
, y_addr
, tmp
;
1890 machine_mode x_addr_mode
= get_address_mode (x
);
1891 machine_mode y_addr_mode
= get_address_mode (y
);
1892 machine_mode iter_mode
;
1894 iter_mode
= GET_MODE (size
);
1895 if (iter_mode
== VOIDmode
)
1896 iter_mode
= word_mode
;
1898 top_label
= gen_label_rtx ();
1899 cmp_label
= gen_label_rtx ();
1900 iter
= gen_reg_rtx (iter_mode
);
1902 emit_move_insn (iter
, const0_rtx
);
1904 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1905 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1906 do_pending_stack_adjust ();
1908 emit_jump (cmp_label
);
1909 emit_label (top_label
);
1911 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1912 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1914 if (x_addr_mode
!= y_addr_mode
)
1915 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1916 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1918 x
= change_address (x
, QImode
, x_addr
);
1919 y
= change_address (y
, QImode
, y_addr
);
1921 emit_move_insn (x
, y
);
1923 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1924 true, OPTAB_LIB_WIDEN
);
1926 emit_move_insn (iter
, tmp
);
1928 emit_label (cmp_label
);
1930 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1932 profile_probability::guessed_always ()
1933 .apply_scale (9, 10));
1936 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1937 TAILCALL is true if this is a tail call. */
1940 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1941 rtx size
, bool tailcall
)
1943 rtx dst_addr
, src_addr
;
1944 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1945 machine_mode size_mode
;
1947 /* Since dst and src are passed to a libcall, mark the corresponding
1948 tree EXPR as addressable. */
1949 tree dst_expr
= MEM_EXPR (dst
);
1950 tree src_expr
= MEM_EXPR (src
);
1952 mark_addressable (dst_expr
);
1954 mark_addressable (src_expr
);
1956 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1957 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1958 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1960 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1961 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1962 src_tree
= make_tree (ptr_type_node
, src_addr
);
1964 size_mode
= TYPE_MODE (sizetype
);
1965 size
= convert_to_mode (size_mode
, size
, 1);
1966 size
= copy_to_mode_reg (size_mode
, size
);
1967 size_tree
= make_tree (sizetype
, size
);
1969 /* It is incorrect to use the libcall calling conventions for calls to
1970 memcpy/memmove/memcmp because they can be provided by the user. */
1971 tree fn
= builtin_decl_implicit (fncode
);
1972 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1973 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1975 return expand_call (call_expr
, NULL_RTX
, false);
1978 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1979 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1980 otherwise return null. */
1983 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1984 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1985 HOST_WIDE_INT align
)
1987 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1989 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1992 class expand_operand ops
[5];
1993 create_output_operand (&ops
[0], target
, insn_mode
);
1994 create_fixed_operand (&ops
[1], arg1_rtx
);
1995 create_fixed_operand (&ops
[2], arg2_rtx
);
1996 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1997 TYPE_UNSIGNED (arg3_type
));
1998 create_integer_operand (&ops
[4], align
);
1999 if (maybe_expand_insn (icode
, 5, ops
))
2000 return ops
[0].value
;
2004 /* Expand a block compare between X and Y with length LEN using the
2005 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2006 of the expression that was used to calculate the length. ALIGN
2007 gives the known minimum common alignment. */
2010 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2013 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2014 implementing memcmp because it will stop if it encounters two
2016 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2018 if (icode
== CODE_FOR_nothing
)
2021 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2024 /* Emit code to compare a block Y to a block X. This may be done with
2025 string-compare instructions, with multiple scalar instructions,
2026 or with a library call.
2028 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2029 they are. LEN_TYPE is the type of the expression that was used to
2032 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2033 value of a normal memcmp call, instead we can just compare for equality.
2034 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2037 Optionally, the caller can pass a constfn and associated data in Y_CFN
2038 and Y_CFN_DATA. describing that the second operand being compared is a
2039 known constant and how to obtain its data.
2040 Return the result of the comparison, or NULL_RTX if we failed to
2041 perform the operation. */
2044 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2045 bool equality_only
, by_pieces_constfn y_cfn
,
2050 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2053 gcc_assert (MEM_P (x
) && MEM_P (y
));
2054 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2055 gcc_assert (align
>= BITS_PER_UNIT
);
2057 x
= adjust_address (x
, BLKmode
, 0);
2058 y
= adjust_address (y
, BLKmode
, 0);
2061 && CONST_INT_P (len
)
2062 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2063 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2066 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2071 /* Copy all or part of a value X into registers starting at REGNO.
2072 The number of registers to be filled is NREGS. */
2075 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2080 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2081 x
= validize_mem (force_const_mem (mode
, x
));
2083 /* See if the machine can do this with a load multiple insn. */
2084 if (targetm
.have_load_multiple ())
2086 rtx_insn
*last
= get_last_insn ();
2087 rtx first
= gen_rtx_REG (word_mode
, regno
);
2088 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2095 delete_insns_since (last
);
2098 for (int i
= 0; i
< nregs
; i
++)
2099 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2100 operand_subword_force (x
, i
, mode
));
2103 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2104 The number of registers to be filled is NREGS. */
2107 move_block_from_reg (int regno
, rtx x
, int nregs
)
2112 /* See if the machine can do this with a store multiple insn. */
2113 if (targetm
.have_store_multiple ())
2115 rtx_insn
*last
= get_last_insn ();
2116 rtx first
= gen_rtx_REG (word_mode
, regno
);
2117 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2124 delete_insns_since (last
);
2127 for (int i
= 0; i
< nregs
; i
++)
2129 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2133 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2137 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2138 ORIG, where ORIG is a non-consecutive group of registers represented by
2139 a PARALLEL. The clone is identical to the original except in that the
2140 original set of registers is replaced by a new set of pseudo registers.
2141 The new set has the same modes as the original set. */
2144 gen_group_rtx (rtx orig
)
2149 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2151 length
= XVECLEN (orig
, 0);
2152 tmps
= XALLOCAVEC (rtx
, length
);
2154 /* Skip a NULL entry in first slot. */
2155 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2160 for (; i
< length
; i
++)
2162 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2163 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2165 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2168 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2171 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2172 except that values are placed in TMPS[i], and must later be moved
2173 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2176 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2181 machine_mode m
= GET_MODE (orig_src
);
2183 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2186 && !SCALAR_INT_MODE_P (m
)
2187 && !MEM_P (orig_src
)
2188 && GET_CODE (orig_src
) != CONCAT
)
2190 scalar_int_mode imode
;
2191 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2193 src
= gen_reg_rtx (imode
);
2194 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2198 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2199 emit_move_insn (src
, orig_src
);
2201 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2205 /* Check for a NULL entry, used to indicate that the parameter goes
2206 both on the stack and in registers. */
2207 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2212 /* Process the pieces. */
2213 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2215 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2216 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2217 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2218 poly_int64 shift
= 0;
2220 /* Handle trailing fragments that run over the size of the struct.
2221 It's the target's responsibility to make sure that the fragment
2222 cannot be strictly smaller in some cases and strictly larger
2224 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2225 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2227 /* Arrange to shift the fragment to where it belongs.
2228 extract_bit_field loads to the lsb of the reg. */
2230 #ifdef BLOCK_REG_PADDING
2231 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2232 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2237 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2238 bytelen
= ssize
- bytepos
;
2239 gcc_assert (maybe_gt (bytelen
, 0));
2242 /* If we won't be loading directly from memory, protect the real source
2243 from strange tricks we might play; but make sure that the source can
2244 be loaded directly into the destination. */
2246 if (!MEM_P (orig_src
)
2247 && (!CONSTANT_P (orig_src
)
2248 || (GET_MODE (orig_src
) != mode
2249 && GET_MODE (orig_src
) != VOIDmode
)))
2251 if (GET_MODE (orig_src
) == VOIDmode
)
2252 src
= gen_reg_rtx (mode
);
2254 src
= gen_reg_rtx (GET_MODE (orig_src
));
2256 emit_move_insn (src
, orig_src
);
2259 /* Optimize the access just a bit. */
2261 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2262 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2263 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2264 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2266 tmps
[i
] = gen_reg_rtx (mode
);
2267 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2269 else if (COMPLEX_MODE_P (mode
)
2270 && GET_MODE (src
) == mode
2271 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2272 /* Let emit_move_complex do the bulk of the work. */
2274 else if (GET_CODE (src
) == CONCAT
)
2276 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2277 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2281 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2282 && known_le (subpos
+ bytelen
, slen0
))
2284 /* The following assumes that the concatenated objects all
2285 have the same size. In this case, a simple calculation
2286 can be used to determine the object and the bit field
2288 tmps
[i
] = XEXP (src
, elt
);
2289 if (maybe_ne (subpos
, 0)
2290 || maybe_ne (subpos
+ bytelen
, slen0
)
2291 || (!CONSTANT_P (tmps
[i
])
2292 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2293 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2294 subpos
* BITS_PER_UNIT
,
2295 1, NULL_RTX
, mode
, mode
, false,
2302 gcc_assert (known_eq (bytepos
, 0));
2303 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2304 emit_move_insn (mem
, src
);
2305 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2306 0, 1, NULL_RTX
, mode
, mode
, false,
2310 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2311 SIMD register, which is currently broken. While we get GCC
2312 to emit proper RTL for these cases, let's dump to memory. */
2313 else if (VECTOR_MODE_P (GET_MODE (dst
))
2316 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2319 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2320 emit_move_insn (mem
, src
);
2321 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2323 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2324 && XVECLEN (dst
, 0) > 1)
2325 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2326 else if (CONSTANT_P (src
))
2328 if (known_eq (bytelen
, ssize
))
2334 /* TODO: const_wide_int can have sizes other than this... */
2335 gcc_assert (known_eq (2 * bytelen
, ssize
));
2336 split_double (src
, &first
, &second
);
2343 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2346 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2347 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2348 mode
, mode
, false, NULL
);
2350 if (maybe_ne (shift
, 0))
2351 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2356 /* Emit code to move a block SRC of type TYPE to a block DST,
2357 where DST is non-consecutive registers represented by a PARALLEL.
2358 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2362 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2367 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2368 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2370 /* Copy the extracted pieces into the proper (probable) hard regs. */
2371 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2373 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2376 emit_move_insn (d
, tmps
[i
]);
2380 /* Similar, but load SRC into new pseudos in a format that looks like
2381 PARALLEL. This can later be fed to emit_group_move to get things
2382 in the right place. */
2385 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2390 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2391 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2393 /* Convert the vector to look just like the original PARALLEL, except
2394 with the computed values. */
2395 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2397 rtx e
= XVECEXP (parallel
, 0, i
);
2398 rtx d
= XEXP (e
, 0);
2402 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2403 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2405 RTVEC_ELT (vec
, i
) = e
;
2408 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2411 /* Emit code to move a block SRC to block DST, where SRC and DST are
2412 non-consecutive groups of registers, each represented by a PARALLEL. */
2415 emit_group_move (rtx dst
, rtx src
)
2419 gcc_assert (GET_CODE (src
) == PARALLEL
2420 && GET_CODE (dst
) == PARALLEL
2421 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2423 /* Skip first entry if NULL. */
2424 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2425 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2426 XEXP (XVECEXP (src
, 0, i
), 0));
2429 /* Move a group of registers represented by a PARALLEL into pseudos. */
2432 emit_group_move_into_temps (rtx src
)
2434 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2437 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2439 rtx e
= XVECEXP (src
, 0, i
);
2440 rtx d
= XEXP (e
, 0);
2443 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2444 RTVEC_ELT (vec
, i
) = e
;
2447 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2450 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2451 where SRC is non-consecutive registers represented by a PARALLEL.
2452 SSIZE represents the total size of block ORIG_DST, or -1 if not
2456 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2460 int start
, finish
, i
;
2461 machine_mode m
= GET_MODE (orig_dst
);
2463 gcc_assert (GET_CODE (src
) == PARALLEL
);
2465 if (!SCALAR_INT_MODE_P (m
)
2466 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2468 scalar_int_mode imode
;
2469 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2471 dst
= gen_reg_rtx (imode
);
2472 emit_group_store (dst
, src
, type
, ssize
);
2473 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2477 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2478 emit_group_store (dst
, src
, type
, ssize
);
2480 emit_move_insn (orig_dst
, dst
);
2484 /* Check for a NULL entry, used to indicate that the parameter goes
2485 both on the stack and in registers. */
2486 if (XEXP (XVECEXP (src
, 0, 0), 0))
2490 finish
= XVECLEN (src
, 0);
2492 tmps
= XALLOCAVEC (rtx
, finish
);
2494 /* Copy the (probable) hard regs into pseudos. */
2495 for (i
= start
; i
< finish
; i
++)
2497 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2498 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2500 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2501 emit_move_insn (tmps
[i
], reg
);
2507 /* If we won't be storing directly into memory, protect the real destination
2508 from strange tricks we might play. */
2510 if (GET_CODE (dst
) == PARALLEL
)
2514 /* We can get a PARALLEL dst if there is a conditional expression in
2515 a return statement. In that case, the dst and src are the same,
2516 so no action is necessary. */
2517 if (rtx_equal_p (dst
, src
))
2520 /* It is unclear if we can ever reach here, but we may as well handle
2521 it. Allocate a temporary, and split this into a store/load to/from
2523 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2524 emit_group_store (temp
, src
, type
, ssize
);
2525 emit_group_load (dst
, temp
, type
, ssize
);
2528 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2530 machine_mode outer
= GET_MODE (dst
);
2536 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2537 dst
= gen_reg_rtx (outer
);
2539 /* Make life a bit easier for combine. */
2540 /* If the first element of the vector is the low part
2541 of the destination mode, use a paradoxical subreg to
2542 initialize the destination. */
2545 inner
= GET_MODE (tmps
[start
]);
2546 bytepos
= subreg_lowpart_offset (inner
, outer
);
2547 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2550 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2554 emit_move_insn (dst
, temp
);
2561 /* If the first element wasn't the low part, try the last. */
2563 && start
< finish
- 1)
2565 inner
= GET_MODE (tmps
[finish
- 1]);
2566 bytepos
= subreg_lowpart_offset (inner
, outer
);
2567 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2571 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2575 emit_move_insn (dst
, temp
);
2582 /* Otherwise, simply initialize the result to zero. */
2584 emit_move_insn (dst
, CONST0_RTX (outer
));
2587 /* Process the pieces. */
2588 for (i
= start
; i
< finish
; i
++)
2590 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2591 machine_mode mode
= GET_MODE (tmps
[i
]);
2592 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2593 poly_uint64 adj_bytelen
;
2596 /* Handle trailing fragments that run over the size of the struct.
2597 It's the target's responsibility to make sure that the fragment
2598 cannot be strictly smaller in some cases and strictly larger
2600 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2601 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2602 adj_bytelen
= ssize
- bytepos
;
2604 adj_bytelen
= bytelen
;
2606 if (GET_CODE (dst
) == CONCAT
)
2608 if (known_le (bytepos
+ adj_bytelen
,
2609 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2610 dest
= XEXP (dst
, 0);
2611 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2613 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2614 dest
= XEXP (dst
, 1);
2618 machine_mode dest_mode
= GET_MODE (dest
);
2619 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2621 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2623 if (GET_MODE_ALIGNMENT (dest_mode
)
2624 >= GET_MODE_ALIGNMENT (tmp_mode
))
2626 dest
= assign_stack_temp (dest_mode
,
2627 GET_MODE_SIZE (dest_mode
));
2628 emit_move_insn (adjust_address (dest
,
2636 dest
= assign_stack_temp (tmp_mode
,
2637 GET_MODE_SIZE (tmp_mode
));
2638 emit_move_insn (dest
, tmps
[i
]);
2639 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2645 /* Handle trailing fragments that run over the size of the struct. */
2646 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2648 /* store_bit_field always takes its value from the lsb.
2649 Move the fragment to the lsb if it's not already there. */
2651 #ifdef BLOCK_REG_PADDING
2652 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2653 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2659 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2660 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2664 /* Make sure not to write past the end of the struct. */
2665 store_bit_field (dest
,
2666 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2667 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2668 VOIDmode
, tmps
[i
], false);
2671 /* Optimize the access just a bit. */
2672 else if (MEM_P (dest
)
2673 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2674 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2675 && multiple_p (bytepos
* BITS_PER_UNIT
,
2676 GET_MODE_ALIGNMENT (mode
))
2677 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2678 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2681 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2682 0, 0, mode
, tmps
[i
], false);
2685 /* Copy from the pseudo into the (probable) hard reg. */
2686 if (orig_dst
!= dst
)
2687 emit_move_insn (orig_dst
, dst
);
2690 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2691 of the value stored in X. */
2694 maybe_emit_group_store (rtx x
, tree type
)
2696 machine_mode mode
= TYPE_MODE (type
);
2697 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2698 if (GET_CODE (x
) == PARALLEL
)
2700 rtx result
= gen_reg_rtx (mode
);
2701 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2707 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2709 This is used on targets that return BLKmode values in registers. */
2712 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2714 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2715 rtx src
= NULL
, dst
= NULL
;
2716 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2717 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2718 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2719 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2720 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2721 fixed_size_mode copy_mode
;
2723 /* BLKmode registers created in the back-end shouldn't have survived. */
2724 gcc_assert (mode
!= BLKmode
);
2726 /* If the structure doesn't take up a whole number of words, see whether
2727 SRCREG is padded on the left or on the right. If it's on the left,
2728 set PADDING_CORRECTION to the number of bits to skip.
2730 In most ABIs, the structure will be returned at the least end of
2731 the register, which translates to right padding on little-endian
2732 targets and left padding on big-endian targets. The opposite
2733 holds if the structure is returned at the most significant
2734 end of the register. */
2735 if (bytes
% UNITS_PER_WORD
!= 0
2736 && (targetm
.calls
.return_in_msb (type
)
2738 : BYTES_BIG_ENDIAN
))
2740 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2742 /* We can use a single move if we have an exact mode for the size. */
2743 else if (MEM_P (target
)
2744 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2745 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2746 && bytes
== GET_MODE_SIZE (mode
))
2748 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2752 /* And if we additionally have the same mode for a register. */
2753 else if (REG_P (target
)
2754 && GET_MODE (target
) == mode
2755 && bytes
== GET_MODE_SIZE (mode
))
2757 emit_move_insn (target
, srcreg
);
2761 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2762 into a new pseudo which is a full word. */
2763 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2765 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2769 /* Copy the structure BITSIZE bits at a time. If the target lives in
2770 memory, take care of not reading/writing past its end by selecting
2771 a copy mode suited to BITSIZE. This should always be possible given
2774 If the target lives in register, make sure not to select a copy mode
2775 larger than the mode of the register.
2777 We could probably emit more efficient code for machines which do not use
2778 strict alignment, but it doesn't seem worth the effort at the current
2781 copy_mode
= word_mode
;
2784 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2785 if (mem_mode
.exists ())
2786 copy_mode
= mem_mode
.require ();
2788 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2791 for (bitpos
= 0, xbitpos
= padding_correction
;
2792 bitpos
< bytes
* BITS_PER_UNIT
;
2793 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2795 /* We need a new source operand each time xbitpos is on a
2796 word boundary and when xbitpos == padding_correction
2797 (the first time through). */
2798 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2799 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2801 /* We need a new destination operand each time bitpos is on
2803 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2805 else if (bitpos
% BITS_PER_WORD
== 0)
2806 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2808 /* Use xbitpos for the source extraction (right justified) and
2809 bitpos for the destination store (left justified). */
2810 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2811 extract_bit_field (src
, bitsize
,
2812 xbitpos
% BITS_PER_WORD
, 1,
2813 NULL_RTX
, copy_mode
, copy_mode
,
2819 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2820 register if it contains any data, otherwise return null.
2822 This is used on targets that return BLKmode values in registers. */
2825 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2828 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2829 unsigned int bitsize
;
2830 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2831 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2832 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2833 fixed_size_mode dst_mode
;
2834 scalar_int_mode min_mode
;
2836 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2838 x
= expand_normal (src
);
2840 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2844 /* If the structure doesn't take up a whole number of words, see
2845 whether the register value should be padded on the left or on
2846 the right. Set PADDING_CORRECTION to the number of padding
2847 bits needed on the left side.
2849 In most ABIs, the structure will be returned at the least end of
2850 the register, which translates to right padding on little-endian
2851 targets and left padding on big-endian targets. The opposite
2852 holds if the structure is returned at the most significant
2853 end of the register. */
2854 if (bytes
% UNITS_PER_WORD
!= 0
2855 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2857 : BYTES_BIG_ENDIAN
))
2858 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2861 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2862 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2863 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2864 min_mode
= smallest_int_mode_for_size (bitsize
);
2866 /* Copy the structure BITSIZE bits at a time. */
2867 for (bitpos
= 0, xbitpos
= padding_correction
;
2868 bitpos
< bytes
* BITS_PER_UNIT
;
2869 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2871 /* We need a new destination pseudo each time xbitpos is
2872 on a word boundary and when xbitpos == padding_correction
2873 (the first time through). */
2874 if (xbitpos
% BITS_PER_WORD
== 0
2875 || xbitpos
== padding_correction
)
2877 /* Generate an appropriate register. */
2878 dst_word
= gen_reg_rtx (word_mode
);
2879 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2881 /* Clear the destination before we move anything into it. */
2882 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2885 /* Find the largest integer mode that can be used to copy all or as
2886 many bits as possible of the structure if the target supports larger
2887 copies. There are too many corner cases here w.r.t to alignments on
2888 the read/writes. So if there is any padding just use single byte
2890 opt_scalar_int_mode mode_iter
;
2891 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2893 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2895 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2896 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2897 && msize
<= BITS_PER_WORD
)
2904 /* We need a new source operand each time bitpos is on a word
2906 if (bitpos
% BITS_PER_WORD
== 0)
2907 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2909 /* Use bitpos for the source extraction (left justified) and
2910 xbitpos for the destination store (right justified). */
2911 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2913 extract_bit_field (src_word
, bitsize
,
2914 bitpos
% BITS_PER_WORD
, 1,
2915 NULL_RTX
, word_mode
, word_mode
,
2920 if (mode
== BLKmode
)
2922 /* Find the smallest integer mode large enough to hold the
2923 entire structure. */
2924 opt_scalar_int_mode mode_iter
;
2925 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2926 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2929 /* A suitable mode should have been found. */
2930 mode
= mode_iter
.require ();
2933 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2934 dst_mode
= word_mode
;
2937 dst
= gen_reg_rtx (dst_mode
);
2939 for (i
= 0; i
< n_regs
; i
++)
2940 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2942 if (mode
!= dst_mode
)
2943 dst
= gen_lowpart (mode
, dst
);
2948 /* Add a USE expression for REG to the (possibly empty) list pointed
2949 to by CALL_FUSAGE. REG must denote a hard register. */
2952 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2954 gcc_assert (REG_P (reg
));
2956 if (!HARD_REGISTER_P (reg
))
2960 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2963 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2964 to by CALL_FUSAGE. REG must denote a hard register. */
2967 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2969 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2972 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2975 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2976 starting at REGNO. All of these registers must be hard registers. */
2979 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2983 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2985 for (i
= 0; i
< nregs
; i
++)
2986 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2989 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2990 PARALLEL REGS. This is for calls that pass values in multiple
2991 non-contiguous locations. The Irix 6 ABI has examples of this. */
2994 use_group_regs (rtx
*call_fusage
, rtx regs
)
2998 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
3000 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
3002 /* A NULL entry means the parameter goes both on the stack and in
3003 registers. This can also be a MEM for targets that pass values
3004 partially on the stack and partially in registers. */
3005 if (reg
!= 0 && REG_P (reg
))
3006 use_reg (call_fusage
, reg
);
3010 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3011 assigment and the code of the expresion on the RHS is CODE. Return
3015 get_def_for_expr (tree name
, enum tree_code code
)
3019 if (TREE_CODE (name
) != SSA_NAME
)
3022 def_stmt
= get_gimple_for_ssa_name (name
);
3024 || gimple_assign_rhs_code (def_stmt
) != code
)
3030 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3031 assigment and the class of the expresion on the RHS is CLASS. Return
3035 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3039 if (TREE_CODE (name
) != SSA_NAME
)
3042 def_stmt
= get_gimple_for_ssa_name (name
);
3044 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3050 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3051 its length in bytes. */
3054 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3055 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3056 unsigned HOST_WIDE_INT min_size
,
3057 unsigned HOST_WIDE_INT max_size
,
3058 unsigned HOST_WIDE_INT probable_max_size
)
3060 machine_mode mode
= GET_MODE (object
);
3063 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3065 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3066 just move a zero. Otherwise, do this a piece at a time. */
3067 poly_int64 size_val
;
3069 && poly_int_rtx_p (size
, &size_val
)
3070 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3072 rtx zero
= CONST0_RTX (mode
);
3075 emit_move_insn (object
, zero
);
3079 if (COMPLEX_MODE_P (mode
))
3081 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3084 write_complex_part (object
, zero
, 0);
3085 write_complex_part (object
, zero
, 1);
3091 if (size
== const0_rtx
)
3094 align
= MEM_ALIGN (object
);
3096 if (CONST_INT_P (size
)
3097 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3099 optimize_insn_for_speed_p ()))
3100 clear_by_pieces (object
, INTVAL (size
), align
);
3101 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3102 expected_align
, expected_size
,
3103 min_size
, max_size
, probable_max_size
))
3105 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3106 return set_storage_via_libcall (object
, size
, const0_rtx
,
3107 method
== BLOCK_OP_TAILCALL
);
3115 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3117 unsigned HOST_WIDE_INT max
, min
= 0;
3118 if (GET_CODE (size
) == CONST_INT
)
3119 min
= max
= UINTVAL (size
);
3121 max
= GET_MODE_MASK (GET_MODE (size
));
3122 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3126 /* A subroutine of clear_storage. Expand a call to memset.
3127 Return the return value of memset, 0 otherwise. */
3130 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3132 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3133 machine_mode size_mode
;
3135 object
= copy_addr_to_reg (XEXP (object
, 0));
3136 object_tree
= make_tree (ptr_type_node
, object
);
3138 if (!CONST_INT_P (val
))
3139 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3140 val_tree
= make_tree (integer_type_node
, val
);
3142 size_mode
= TYPE_MODE (sizetype
);
3143 size
= convert_to_mode (size_mode
, size
, 1);
3144 size
= copy_to_mode_reg (size_mode
, size
);
3145 size_tree
= make_tree (sizetype
, size
);
3147 /* It is incorrect to use the libcall calling conventions for calls to
3148 memset because it can be provided by the user. */
3149 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3150 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3151 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3153 return expand_call (call_expr
, NULL_RTX
, false);
3156 /* Expand a setmem pattern; return true if successful. */
3159 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3160 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3161 unsigned HOST_WIDE_INT min_size
,
3162 unsigned HOST_WIDE_INT max_size
,
3163 unsigned HOST_WIDE_INT probable_max_size
)
3165 /* Try the most limited insn first, because there's no point
3166 including more than one in the machine description unless
3167 the more limited one has some advantage. */
3169 if (expected_align
< align
)
3170 expected_align
= align
;
3171 if (expected_size
!= -1)
3173 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3174 expected_size
= max_size
;
3175 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3176 expected_size
= min_size
;
3179 opt_scalar_int_mode mode_iter
;
3180 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3182 scalar_int_mode mode
= mode_iter
.require ();
3183 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3185 if (code
!= CODE_FOR_nothing
3186 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3187 here because if SIZE is less than the mode mask, as it is
3188 returned by the macro, it will definitely be less than the
3189 actual mode mask. Since SIZE is within the Pmode address
3190 space, we limit MODE to Pmode. */
3191 && ((CONST_INT_P (size
)
3192 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3193 <= (GET_MODE_MASK (mode
) >> 1)))
3194 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3195 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3197 class expand_operand ops
[9];
3200 nops
= insn_data
[(int) code
].n_generator_args
;
3201 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3203 create_fixed_operand (&ops
[0], object
);
3204 /* The check above guarantees that this size conversion is valid. */
3205 create_convert_operand_to (&ops
[1], size
, mode
, true);
3206 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3207 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3210 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3211 create_integer_operand (&ops
[5], expected_size
);
3215 create_integer_operand (&ops
[6], min_size
);
3216 /* If we cannot represent the maximal size,
3217 make parameter NULL. */
3218 if ((HOST_WIDE_INT
) max_size
!= -1)
3219 create_integer_operand (&ops
[7], max_size
);
3221 create_fixed_operand (&ops
[7], NULL
);
3225 /* If we cannot represent the maximal size,
3226 make parameter NULL. */
3227 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3228 create_integer_operand (&ops
[8], probable_max_size
);
3230 create_fixed_operand (&ops
[8], NULL
);
3232 if (maybe_expand_insn (code
, nops
, ops
))
3241 /* Write to one of the components of the complex value CPLX. Write VAL to
3242 the real part if IMAG_P is false, and the imaginary part if its true. */
3245 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3251 if (GET_CODE (cplx
) == CONCAT
)
3253 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3257 cmode
= GET_MODE (cplx
);
3258 imode
= GET_MODE_INNER (cmode
);
3259 ibitsize
= GET_MODE_BITSIZE (imode
);
3261 /* For MEMs simplify_gen_subreg may generate an invalid new address
3262 because, e.g., the original address is considered mode-dependent
3263 by the target, which restricts simplify_subreg from invoking
3264 adjust_address_nv. Instead of preparing fallback support for an
3265 invalid address, we call adjust_address_nv directly. */
3268 emit_move_insn (adjust_address_nv (cplx
, imode
,
3269 imag_p
? GET_MODE_SIZE (imode
) : 0),
3274 /* If the sub-object is at least word sized, then we know that subregging
3275 will work. This special case is important, since store_bit_field
3276 wants to operate on integer modes, and there's rarely an OImode to
3277 correspond to TCmode. */
3278 if (ibitsize
>= BITS_PER_WORD
3279 /* For hard regs we have exact predicates. Assume we can split
3280 the original object if it spans an even number of hard regs.
3281 This special case is important for SCmode on 64-bit platforms
3282 where the natural size of floating-point regs is 32-bit. */
3284 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3285 && REG_NREGS (cplx
) % 2 == 0))
3287 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3288 imag_p
? GET_MODE_SIZE (imode
) : 0);
3291 emit_move_insn (part
, val
);
3295 /* simplify_gen_subreg may fail for sub-word MEMs. */
3296 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3299 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3303 /* Extract one of the components of the complex value CPLX. Extract the
3304 real part if IMAG_P is false, and the imaginary part if it's true. */
3307 read_complex_part (rtx cplx
, bool imag_p
)
3313 if (GET_CODE (cplx
) == CONCAT
)
3314 return XEXP (cplx
, imag_p
);
3316 cmode
= GET_MODE (cplx
);
3317 imode
= GET_MODE_INNER (cmode
);
3318 ibitsize
= GET_MODE_BITSIZE (imode
);
3320 /* Special case reads from complex constants that got spilled to memory. */
3321 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3323 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3324 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3326 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3327 if (CONSTANT_CLASS_P (part
))
3328 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3332 /* For MEMs simplify_gen_subreg may generate an invalid new address
3333 because, e.g., the original address is considered mode-dependent
3334 by the target, which restricts simplify_subreg from invoking
3335 adjust_address_nv. Instead of preparing fallback support for an
3336 invalid address, we call adjust_address_nv directly. */
3338 return adjust_address_nv (cplx
, imode
,
3339 imag_p
? GET_MODE_SIZE (imode
) : 0);
3341 /* If the sub-object is at least word sized, then we know that subregging
3342 will work. This special case is important, since extract_bit_field
3343 wants to operate on integer modes, and there's rarely an OImode to
3344 correspond to TCmode. */
3345 if (ibitsize
>= BITS_PER_WORD
3346 /* For hard regs we have exact predicates. Assume we can split
3347 the original object if it spans an even number of hard regs.
3348 This special case is important for SCmode on 64-bit platforms
3349 where the natural size of floating-point regs is 32-bit. */
3351 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3352 && REG_NREGS (cplx
) % 2 == 0))
3354 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3355 imag_p
? GET_MODE_SIZE (imode
) : 0);
3359 /* simplify_gen_subreg may fail for sub-word MEMs. */
3360 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3363 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3364 true, NULL_RTX
, imode
, imode
, false, NULL
);
3367 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3368 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3369 represented in NEW_MODE. If FORCE is true, this will never happen, as
3370 we'll force-create a SUBREG if needed. */
3373 emit_move_change_mode (machine_mode new_mode
,
3374 machine_mode old_mode
, rtx x
, bool force
)
3378 if (push_operand (x
, GET_MODE (x
)))
3380 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3381 MEM_COPY_ATTRIBUTES (ret
, x
);
3385 /* We don't have to worry about changing the address since the
3386 size in bytes is supposed to be the same. */
3387 if (reload_in_progress
)
3389 /* Copy the MEM to change the mode and move any
3390 substitutions from the old MEM to the new one. */
3391 ret
= adjust_address_nv (x
, new_mode
, 0);
3392 copy_replacements (x
, ret
);
3395 ret
= adjust_address (x
, new_mode
, 0);
3399 /* Note that we do want simplify_subreg's behavior of validating
3400 that the new mode is ok for a hard register. If we were to use
3401 simplify_gen_subreg, we would create the subreg, but would
3402 probably run into the target not being able to implement it. */
3403 /* Except, of course, when FORCE is true, when this is exactly what
3404 we want. Which is needed for CCmodes on some targets. */
3406 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3408 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3414 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3415 an integer mode of the same size as MODE. Returns the instruction
3416 emitted, or NULL if such a move could not be generated. */
3419 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3421 scalar_int_mode imode
;
3422 enum insn_code code
;
3424 /* There must exist a mode of the exact size we require. */
3425 if (!int_mode_for_mode (mode
).exists (&imode
))
3428 /* The target must support moves in this mode. */
3429 code
= optab_handler (mov_optab
, imode
);
3430 if (code
== CODE_FOR_nothing
)
3433 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3436 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3439 return emit_insn (GEN_FCN (code
) (x
, y
));
3442 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3443 Return an equivalent MEM that does not use an auto-increment. */
3446 emit_move_resolve_push (machine_mode mode
, rtx x
)
3448 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3451 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3452 #ifdef PUSH_ROUNDING
3453 adjust
= PUSH_ROUNDING (adjust
);
3455 if (code
== PRE_DEC
|| code
== POST_DEC
)
3457 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3459 rtx expr
= XEXP (XEXP (x
, 0), 1);
3461 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3462 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3463 if (GET_CODE (expr
) == MINUS
)
3465 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3469 /* Do not use anti_adjust_stack, since we don't want to update
3470 stack_pointer_delta. */
3471 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3472 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3473 0, OPTAB_LIB_WIDEN
);
3474 if (temp
!= stack_pointer_rtx
)
3475 emit_move_insn (stack_pointer_rtx
, temp
);
3482 temp
= stack_pointer_rtx
;
3487 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3493 return replace_equiv_address (x
, temp
);
3496 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3497 X is known to satisfy push_operand, and MODE is known to be complex.
3498 Returns the last instruction emitted. */
3501 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3503 scalar_mode submode
= GET_MODE_INNER (mode
);
3506 #ifdef PUSH_ROUNDING
3507 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3509 /* In case we output to the stack, but the size is smaller than the
3510 machine can push exactly, we need to use move instructions. */
3511 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3513 x
= emit_move_resolve_push (mode
, x
);
3514 return emit_move_insn (x
, y
);
3518 /* Note that the real part always precedes the imag part in memory
3519 regardless of machine's endianness. */
3520 switch (GET_CODE (XEXP (x
, 0)))
3534 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3535 read_complex_part (y
, imag_first
));
3536 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3537 read_complex_part (y
, !imag_first
));
3540 /* A subroutine of emit_move_complex. Perform the move from Y to X
3541 via two moves of the parts. Returns the last instruction emitted. */
3544 emit_move_complex_parts (rtx x
, rtx y
)
3546 /* Show the output dies here. This is necessary for SUBREGs
3547 of pseudos since we cannot track their lifetimes correctly;
3548 hard regs shouldn't appear here except as return values. */
3549 if (!reload_completed
&& !reload_in_progress
3550 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3553 write_complex_part (x
, read_complex_part (y
, false), false);
3554 write_complex_part (x
, read_complex_part (y
, true), true);
3556 return get_last_insn ();
3559 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3560 MODE is known to be complex. Returns the last instruction emitted. */
3563 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3567 /* Need to take special care for pushes, to maintain proper ordering
3568 of the data, and possibly extra padding. */
3569 if (push_operand (x
, mode
))
3570 return emit_move_complex_push (mode
, x
, y
);
3572 /* See if we can coerce the target into moving both values at once, except
3573 for floating point where we favor moving as parts if this is easy. */
3574 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3575 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3577 && HARD_REGISTER_P (x
)
3578 && REG_NREGS (x
) == 1)
3580 && HARD_REGISTER_P (y
)
3581 && REG_NREGS (y
) == 1))
3583 /* Not possible if the values are inherently not adjacent. */
3584 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3586 /* Is possible if both are registers (or subregs of registers). */
3587 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3589 /* If one of the operands is a memory, and alignment constraints
3590 are friendly enough, we may be able to do combined memory operations.
3591 We do not attempt this if Y is a constant because that combination is
3592 usually better with the by-parts thing below. */
3593 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3594 && (!STRICT_ALIGNMENT
3595 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3604 /* For memory to memory moves, optimal behavior can be had with the
3605 existing block move logic. But use normal expansion if optimizing
3607 if (MEM_P (x
) && MEM_P (y
))
3609 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3610 (optimize_insn_for_speed_p()
3611 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
3612 return get_last_insn ();
3615 ret
= emit_move_via_integer (mode
, x
, y
, true);
3620 return emit_move_complex_parts (x
, y
);
3623 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3624 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3627 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3631 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3634 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3635 if (code
!= CODE_FOR_nothing
)
3637 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3638 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3639 return emit_insn (GEN_FCN (code
) (x
, y
));
3643 /* Otherwise, find the MODE_INT mode of the same width. */
3644 ret
= emit_move_via_integer (mode
, x
, y
, false);
3645 gcc_assert (ret
!= NULL
);
3649 /* Return true if word I of OP lies entirely in the
3650 undefined bits of a paradoxical subreg. */
3653 undefined_operand_subword_p (const_rtx op
, int i
)
3655 if (GET_CODE (op
) != SUBREG
)
3657 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3658 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3659 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3660 || known_le (offset
, -UNITS_PER_WORD
));
3663 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3664 MODE is any multi-word or full-word mode that lacks a move_insn
3665 pattern. Note that you will get better code if you define such
3666 patterns, even if they must turn into multiple assembler instructions. */
3669 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3671 rtx_insn
*last_insn
= 0;
3677 /* This function can only handle cases where the number of words is
3678 known at compile time. */
3679 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3680 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3682 /* If X is a push on the stack, do the push now and replace
3683 X with a reference to the stack pointer. */
3684 if (push_operand (x
, mode
))
3685 x
= emit_move_resolve_push (mode
, x
);
3687 /* If we are in reload, see if either operand is a MEM whose address
3688 is scheduled for replacement. */
3689 if (reload_in_progress
&& MEM_P (x
)
3690 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3691 x
= replace_equiv_address_nv (x
, inner
);
3692 if (reload_in_progress
&& MEM_P (y
)
3693 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3694 y
= replace_equiv_address_nv (y
, inner
);
3698 need_clobber
= false;
3699 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3701 /* Do not generate code for a move if it would go entirely
3702 to the non-existing bits of a paradoxical subreg. */
3703 if (undefined_operand_subword_p (x
, i
))
3706 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3709 /* Do not generate code for a move if it would come entirely
3710 from the undefined bits of a paradoxical subreg. */
3711 if (undefined_operand_subword_p (y
, i
))
3714 ypart
= operand_subword (y
, i
, 1, mode
);
3716 /* If we can't get a part of Y, put Y into memory if it is a
3717 constant. Otherwise, force it into a register. Then we must
3718 be able to get a part of Y. */
3719 if (ypart
== 0 && CONSTANT_P (y
))
3721 y
= use_anchored_address (force_const_mem (mode
, y
));
3722 ypart
= operand_subword (y
, i
, 1, mode
);
3724 else if (ypart
== 0)
3725 ypart
= operand_subword_force (y
, i
, mode
);
3727 gcc_assert (xpart
&& ypart
);
3729 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3731 last_insn
= emit_move_insn (xpart
, ypart
);
3737 /* Show the output dies here. This is necessary for SUBREGs
3738 of pseudos since we cannot track their lifetimes correctly;
3739 hard regs shouldn't appear here except as return values.
3740 We never want to emit such a clobber after reload. */
3742 && ! (reload_in_progress
|| reload_completed
)
3743 && need_clobber
!= 0)
3751 /* Low level part of emit_move_insn.
3752 Called just like emit_move_insn, but assumes X and Y
3753 are basically valid. */
3756 emit_move_insn_1 (rtx x
, rtx y
)
3758 machine_mode mode
= GET_MODE (x
);
3759 enum insn_code code
;
3761 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3763 code
= optab_handler (mov_optab
, mode
);
3764 if (code
!= CODE_FOR_nothing
)
3765 return emit_insn (GEN_FCN (code
) (x
, y
));
3767 /* Expand complex moves by moving real part and imag part. */
3768 if (COMPLEX_MODE_P (mode
))
3769 return emit_move_complex (mode
, x
, y
);
3771 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3772 || ALL_FIXED_POINT_MODE_P (mode
))
3774 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3776 /* If we can't find an integer mode, use multi words. */
3780 return emit_move_multi_word (mode
, x
, y
);
3783 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3784 return emit_move_ccmode (mode
, x
, y
);
3786 /* Try using a move pattern for the corresponding integer mode. This is
3787 only safe when simplify_subreg can convert MODE constants into integer
3788 constants. At present, it can only do this reliably if the value
3789 fits within a HOST_WIDE_INT. */
3791 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3793 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3797 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3802 return emit_move_multi_word (mode
, x
, y
);
3805 /* Generate code to copy Y into X.
3806 Both Y and X must have the same mode, except that
3807 Y can be a constant with VOIDmode.
3808 This mode cannot be BLKmode; use emit_block_move for that.
3810 Return the last instruction emitted. */
3813 emit_move_insn (rtx x
, rtx y
)
3815 machine_mode mode
= GET_MODE (x
);
3816 rtx y_cst
= NULL_RTX
;
3817 rtx_insn
*last_insn
;
3820 gcc_assert (mode
!= BLKmode
3821 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3823 /* If we have a copy that looks like one of the following patterns:
3824 (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
3825 (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
3826 (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
3827 (set (subreg:M1 (reg:M2 ...)) (constant C))
3828 where mode M1 is equal in size to M2, try to detect whether the
3829 mode change involves an implicit round trip through memory.
3830 If so, see if we can avoid that by removing the subregs and
3831 doing the move in mode M2 instead. */
3833 rtx x_inner
= NULL_RTX
;
3834 rtx y_inner
= NULL_RTX
;
3836 auto candidate_subreg_p
= [&](rtx subreg
) {
3837 return (REG_P (SUBREG_REG (subreg
))
3838 && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg
))),
3839 GET_MODE_SIZE (GET_MODE (subreg
)))
3840 && optab_handler (mov_optab
, GET_MODE (SUBREG_REG (subreg
)))
3841 != CODE_FOR_nothing
);
3844 auto candidate_mem_p
= [&](machine_mode innermode
, rtx mem
) {
3845 return (!targetm
.can_change_mode_class (innermode
, GET_MODE (mem
), ALL_REGS
)
3846 && !push_operand (mem
, GET_MODE (mem
))
3847 /* Not a candiate if innermode requires too much alignment. */
3848 && (MEM_ALIGN (mem
) >= GET_MODE_ALIGNMENT (innermode
)
3849 || targetm
.slow_unaligned_access (GET_MODE (mem
),
3851 || !targetm
.slow_unaligned_access (innermode
,
3855 if (SUBREG_P (x
) && candidate_subreg_p (x
))
3856 x_inner
= SUBREG_REG (x
);
3858 if (SUBREG_P (y
) && candidate_subreg_p (y
))
3859 y_inner
= SUBREG_REG (y
);
3861 if (x_inner
!= NULL_RTX
3862 && y_inner
!= NULL_RTX
3863 && GET_MODE (x_inner
) == GET_MODE (y_inner
)
3864 && !targetm
.can_change_mode_class (GET_MODE (x_inner
), mode
, ALL_REGS
))
3868 mode
= GET_MODE (x_inner
);
3870 else if (x_inner
!= NULL_RTX
3872 && candidate_mem_p (GET_MODE (x_inner
), y
))
3875 y
= adjust_address (y
, GET_MODE (x_inner
), 0);
3876 mode
= GET_MODE (x_inner
);
3878 else if (y_inner
!= NULL_RTX
3880 && candidate_mem_p (GET_MODE (y_inner
), x
))
3882 x
= adjust_address (x
, GET_MODE (y_inner
), 0);
3884 mode
= GET_MODE (y_inner
);
3886 else if (x_inner
!= NULL_RTX
3888 && !targetm
.can_change_mode_class (GET_MODE (x_inner
),
3890 && (y_inner
= simplify_subreg (GET_MODE (x_inner
), y
, mode
, 0)))
3894 mode
= GET_MODE (x_inner
);
3900 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3901 && (last_insn
= compress_float_constant (x
, y
)))
3906 if (!targetm
.legitimate_constant_p (mode
, y
))
3908 y
= force_const_mem (mode
, y
);
3910 /* If the target's cannot_force_const_mem prevented the spill,
3911 assume that the target's move expanders will also take care
3912 of the non-legitimate constant. */
3916 y
= use_anchored_address (y
);
3920 /* If X or Y are memory references, verify that their addresses are valid
3923 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3925 && ! push_operand (x
, GET_MODE (x
))))
3926 x
= validize_mem (x
);
3929 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3930 MEM_ADDR_SPACE (y
)))
3931 y
= validize_mem (y
);
3933 gcc_assert (mode
!= BLKmode
);
3935 last_insn
= emit_move_insn_1 (x
, y
);
3937 if (y_cst
&& REG_P (x
)
3938 && (set
= single_set (last_insn
)) != NULL_RTX
3939 && SET_DEST (set
) == x
3940 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3941 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3946 /* Generate the body of an instruction to copy Y into X.
3947 It may be a list of insns, if one insn isn't enough. */
3950 gen_move_insn (rtx x
, rtx y
)
3955 emit_move_insn_1 (x
, y
);
3961 /* If Y is representable exactly in a narrower mode, and the target can
3962 perform the extension directly from constant or memory, then emit the
3963 move as an extension. */
3966 compress_float_constant (rtx x
, rtx y
)
3968 machine_mode dstmode
= GET_MODE (x
);
3969 machine_mode orig_srcmode
= GET_MODE (y
);
3970 machine_mode srcmode
;
3971 const REAL_VALUE_TYPE
*r
;
3972 int oldcost
, newcost
;
3973 bool speed
= optimize_insn_for_speed_p ();
3975 r
= CONST_DOUBLE_REAL_VALUE (y
);
3977 if (targetm
.legitimate_constant_p (dstmode
, y
))
3978 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3980 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3982 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3986 rtx_insn
*last_insn
;
3988 /* Skip if the target can't extend this way. */
3989 ic
= can_extend_p (dstmode
, srcmode
, 0);
3990 if (ic
== CODE_FOR_nothing
)
3993 /* Skip if the narrowed value isn't exact. */
3994 if (! exact_real_truncate (srcmode
, r
))
3997 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3999 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
4001 /* Skip if the target needs extra instructions to perform
4003 if (!insn_operand_matches (ic
, 1, trunc_y
))
4005 /* This is valid, but may not be cheaper than the original. */
4006 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4008 if (oldcost
< newcost
)
4011 else if (float_extend_from_mem
[dstmode
][srcmode
])
4013 trunc_y
= force_const_mem (srcmode
, trunc_y
);
4014 /* This is valid, but may not be cheaper than the original. */
4015 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4017 if (oldcost
< newcost
)
4019 trunc_y
= validize_mem (trunc_y
);
4024 /* For CSE's benefit, force the compressed constant pool entry
4025 into a new pseudo. This constant may be used in different modes,
4026 and if not, combine will put things back together for us. */
4027 trunc_y
= force_reg (srcmode
, trunc_y
);
4029 /* If x is a hard register, perform the extension into a pseudo,
4030 so that e.g. stack realignment code is aware of it. */
4032 if (REG_P (x
) && HARD_REGISTER_P (x
))
4033 target
= gen_reg_rtx (dstmode
);
4035 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
4036 last_insn
= get_last_insn ();
4039 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
4042 return emit_move_insn (x
, target
);
4049 /* Pushing data onto the stack. */
4051 /* Push a block of length SIZE (perhaps variable)
4052 and return an rtx to address the beginning of the block.
4053 The value may be virtual_outgoing_args_rtx.
4055 EXTRA is the number of bytes of padding to push in addition to SIZE.
4056 BELOW nonzero means this padding comes at low addresses;
4057 otherwise, the padding comes at high addresses. */
4060 push_block (rtx size
, poly_int64 extra
, int below
)
4064 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
4065 if (CONSTANT_P (size
))
4066 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
4067 else if (REG_P (size
) && known_eq (extra
, 0))
4068 anti_adjust_stack (size
);
4071 temp
= copy_to_mode_reg (Pmode
, size
);
4072 if (maybe_ne (extra
, 0))
4073 temp
= expand_binop (Pmode
, add_optab
, temp
,
4074 gen_int_mode (extra
, Pmode
),
4075 temp
, 0, OPTAB_LIB_WIDEN
);
4076 anti_adjust_stack (temp
);
4079 if (STACK_GROWS_DOWNWARD
)
4081 temp
= virtual_outgoing_args_rtx
;
4082 if (maybe_ne (extra
, 0) && below
)
4083 temp
= plus_constant (Pmode
, temp
, extra
);
4088 if (poly_int_rtx_p (size
, &csize
))
4089 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4090 -csize
- (below
? 0 : extra
));
4091 else if (maybe_ne (extra
, 0) && !below
)
4092 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4093 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4096 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4097 negate_rtx (Pmode
, size
));
4100 return memory_address (NARROWEST_INT_MODE
, temp
);
4103 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4106 mem_autoinc_base (rtx mem
)
4110 rtx addr
= XEXP (mem
, 0);
4111 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4112 return XEXP (addr
, 0);
4117 /* A utility routine used here, in reload, and in try_split. The insns
4118 after PREV up to and including LAST are known to adjust the stack,
4119 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4120 placing notes as appropriate. PREV may be NULL, indicating the
4121 entire insn sequence prior to LAST should be scanned.
4123 The set of allowed stack pointer modifications is small:
4124 (1) One or more auto-inc style memory references (aka pushes),
4125 (2) One or more addition/subtraction with the SP as destination,
4126 (3) A single move insn with the SP as destination,
4127 (4) A call_pop insn,
4128 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4130 Insns in the sequence that do not modify the SP are ignored,
4131 except for noreturn calls.
4133 The return value is the amount of adjustment that can be trivially
4134 verified, via immediate operand or auto-inc. If the adjustment
4135 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4138 find_args_size_adjust (rtx_insn
*insn
)
4143 pat
= PATTERN (insn
);
4146 /* Look for a call_pop pattern. */
4149 /* We have to allow non-call_pop patterns for the case
4150 of emit_single_push_insn of a TLS address. */
4151 if (GET_CODE (pat
) != PARALLEL
)
4154 /* All call_pop have a stack pointer adjust in the parallel.
4155 The call itself is always first, and the stack adjust is
4156 usually last, so search from the end. */
4157 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4159 set
= XVECEXP (pat
, 0, i
);
4160 if (GET_CODE (set
) != SET
)
4162 dest
= SET_DEST (set
);
4163 if (dest
== stack_pointer_rtx
)
4166 /* We'd better have found the stack pointer adjust. */
4169 /* Fall through to process the extracted SET and DEST
4170 as if it was a standalone insn. */
4172 else if (GET_CODE (pat
) == SET
)
4174 else if ((set
= single_set (insn
)) != NULL
)
4176 else if (GET_CODE (pat
) == PARALLEL
)
4178 /* ??? Some older ports use a parallel with a stack adjust
4179 and a store for a PUSH_ROUNDING pattern, rather than a
4180 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4181 /* ??? See h8300 and m68k, pushqi1. */
4182 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4184 set
= XVECEXP (pat
, 0, i
);
4185 if (GET_CODE (set
) != SET
)
4187 dest
= SET_DEST (set
);
4188 if (dest
== stack_pointer_rtx
)
4191 /* We do not expect an auto-inc of the sp in the parallel. */
4192 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4193 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4194 != stack_pointer_rtx
);
4202 dest
= SET_DEST (set
);
4204 /* Look for direct modifications of the stack pointer. */
4205 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4207 /* Look for a trivial adjustment, otherwise assume nothing. */
4208 /* Note that the SPU restore_stack_block pattern refers to
4209 the stack pointer in V4SImode. Consider that non-trivial. */
4211 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4212 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4214 /* ??? Reload can generate no-op moves, which will be cleaned
4215 up later. Recognize it and continue searching. */
4216 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4219 return HOST_WIDE_INT_MIN
;
4225 /* Otherwise only think about autoinc patterns. */
4226 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4229 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4230 != stack_pointer_rtx
);
4232 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4233 mem
= SET_SRC (set
);
4237 addr
= XEXP (mem
, 0);
4238 switch (GET_CODE (addr
))
4242 return GET_MODE_SIZE (GET_MODE (mem
));
4245 return -GET_MODE_SIZE (GET_MODE (mem
));
4248 addr
= XEXP (addr
, 1);
4249 gcc_assert (GET_CODE (addr
) == PLUS
);
4250 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4251 return rtx_to_poly_int64 (XEXP (addr
, 1));
4259 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4260 poly_int64 end_args_size
)
4262 poly_int64 args_size
= end_args_size
;
4263 bool saw_unknown
= false;
4266 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4268 if (!NONDEBUG_INSN_P (insn
))
4271 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4272 a call argument containing a TLS address that itself requires
4273 a call to __tls_get_addr. The handling of stack_pointer_delta
4274 in emit_single_push_insn is supposed to ensure that any such
4275 notes are already correct. */
4276 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4277 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4279 poly_int64 this_delta
= find_args_size_adjust (insn
);
4280 if (known_eq (this_delta
, 0))
4283 || ACCUMULATE_OUTGOING_ARGS
4284 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4288 gcc_assert (!saw_unknown
);
4289 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4293 add_args_size_note (insn
, args_size
);
4294 if (STACK_GROWS_DOWNWARD
)
4295 this_delta
= -poly_uint64 (this_delta
);
4298 args_size
= HOST_WIDE_INT_MIN
;
4300 args_size
-= this_delta
;
4306 #ifdef PUSH_ROUNDING
4307 /* Emit single push insn. */
4310 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4313 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4315 enum insn_code icode
;
4317 /* If there is push pattern, use it. Otherwise try old way of throwing
4318 MEM representing push operation to move expander. */
4319 icode
= optab_handler (push_optab
, mode
);
4320 if (icode
!= CODE_FOR_nothing
)
4322 class expand_operand ops
[1];
4324 create_input_operand (&ops
[0], x
, mode
);
4325 if (maybe_expand_insn (icode
, 1, ops
))
4328 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4329 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4330 /* If we are to pad downward, adjust the stack pointer first and
4331 then store X into the stack location using an offset. This is
4332 because emit_move_insn does not know how to pad; it does not have
4334 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4336 emit_move_insn (stack_pointer_rtx
,
4337 expand_binop (Pmode
,
4338 STACK_GROWS_DOWNWARD
? sub_optab
4341 gen_int_mode (rounded_size
, Pmode
),
4342 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4344 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4345 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4346 /* We have already decremented the stack pointer, so get the
4348 offset
+= rounded_size
;
4350 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4351 /* We have already incremented the stack pointer, so get the
4353 offset
-= rounded_size
;
4355 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4359 if (STACK_GROWS_DOWNWARD
)
4360 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4361 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4363 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4364 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4366 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4369 dest
= gen_rtx_MEM (mode
, dest_addr
);
4373 set_mem_attributes (dest
, type
, 1);
4375 if (cfun
->tail_call_marked
)
4376 /* Function incoming arguments may overlap with sibling call
4377 outgoing arguments and we cannot allow reordering of reads
4378 from function arguments with stores to outgoing arguments
4379 of sibling calls. */
4380 set_mem_alias_set (dest
, 0);
4382 emit_move_insn (dest
, x
);
4385 /* Emit and annotate a single push insn. */
4388 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4390 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4391 rtx_insn
*prev
= get_last_insn ();
4394 emit_single_push_insn_1 (mode
, x
, type
);
4396 /* Adjust stack_pointer_delta to describe the situation after the push
4397 we just performed. Note that we must do this after the push rather
4398 than before the push in case calculating X needs pushes and pops of
4399 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4400 for such pushes and pops must not include the effect of the future
4402 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4404 last
= get_last_insn ();
4406 /* Notice the common case where we emitted exactly one insn. */
4407 if (PREV_INSN (last
) == prev
)
4409 add_args_size_note (last
, stack_pointer_delta
);
4413 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4414 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4415 || known_eq (delta
, old_delta
));
4419 /* If reading SIZE bytes from X will end up reading from
4420 Y return the number of bytes that overlap. Return -1
4421 if there is no overlap or -2 if we can't determine
4422 (for example when X and Y have different base registers). */
4425 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4427 rtx tmp
= plus_constant (Pmode
, x
, size
);
4428 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4430 if (!CONST_INT_P (sub
))
4433 HOST_WIDE_INT val
= INTVAL (sub
);
4435 return IN_RANGE (val
, 1, size
) ? val
: -1;
4438 /* Generate code to push X onto the stack, assuming it has mode MODE and
4440 MODE is redundant except when X is a CONST_INT (since they don't
4442 SIZE is an rtx for the size of data to be copied (in bytes),
4443 needed only if X is BLKmode.
4444 Return true if successful. May return false if asked to push a
4445 partial argument during a sibcall optimization (as specified by
4446 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4449 ALIGN (in bits) is maximum alignment we can assume.
4451 If PARTIAL and REG are both nonzero, then copy that many of the first
4452 bytes of X into registers starting with REG, and push the rest of X.
4453 The amount of space pushed is decreased by PARTIAL bytes.
4454 REG must be a hard register in this case.
4455 If REG is zero but PARTIAL is not, take any all others actions for an
4456 argument partially in registers, but do not actually load any
4459 EXTRA is the amount in bytes of extra space to leave next to this arg.
4460 This is ignored if an argument block has already been allocated.
4462 On a machine that lacks real push insns, ARGS_ADDR is the address of
4463 the bottom of the argument block for this call. We use indexing off there
4464 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4465 argument block has not been preallocated.
4467 ARGS_SO_FAR is the size of args previously pushed for this call.
4469 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4470 for arguments passed in registers. If nonzero, it will be the number
4471 of bytes required. */
4474 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4475 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4476 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4477 rtx alignment_pad
, bool sibcall_p
)
4480 pad_direction stack_direction
4481 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4483 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4484 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4485 Default is below for small data on big-endian machines; else above. */
4486 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4488 /* Invert direction if stack is post-decrement.
4490 if (STACK_PUSH_CODE
== POST_DEC
)
4491 if (where_pad
!= PAD_NONE
)
4492 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4496 int nregs
= partial
/ UNITS_PER_WORD
;
4497 rtx
*tmp_regs
= NULL
;
4498 int overlapping
= 0;
4501 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4503 /* Copy a block into the stack, entirely or partially. */
4510 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4511 used
= partial
- offset
;
4513 if (mode
!= BLKmode
)
4515 /* A value is to be stored in an insufficiently aligned
4516 stack slot; copy via a suitably aligned slot if
4518 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4519 if (!MEM_P (xinner
))
4521 temp
= assign_temp (type
, 1, 1);
4522 emit_move_insn (temp
, xinner
);
4529 /* USED is now the # of bytes we need not copy to the stack
4530 because registers will take care of them. */
4533 xinner
= adjust_address (xinner
, BLKmode
, used
);
4535 /* If the partial register-part of the arg counts in its stack size,
4536 skip the part of stack space corresponding to the registers.
4537 Otherwise, start copying to the beginning of the stack space,
4538 by setting SKIP to 0. */
4539 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4541 #ifdef PUSH_ROUNDING
4542 /* Do it with several push insns if that doesn't take lots of insns
4543 and if there is no difficulty with push insns that skip bytes
4544 on the stack for alignment purposes. */
4547 && CONST_INT_P (size
)
4549 && MEM_ALIGN (xinner
) >= align
4550 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4551 /* Here we avoid the case of a structure whose weak alignment
4552 forces many pushes of a small amount of data,
4553 and such small pushes do rounding that causes trouble. */
4554 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4555 || align
>= BIGGEST_ALIGNMENT
4556 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4557 align
/ BITS_PER_UNIT
))
4558 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4560 /* Push padding now if padding above and stack grows down,
4561 or if padding below and stack grows up.
4562 But if space already allocated, this has already been done. */
4563 if (maybe_ne (extra
, 0)
4565 && where_pad
!= PAD_NONE
4566 && where_pad
!= stack_direction
)
4567 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4569 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4573 #endif /* PUSH_ROUNDING */
4577 /* Otherwise make space on the stack and copy the data
4578 to the address of that space. */
4580 /* Deduct words put into registers from the size we must copy. */
4583 if (CONST_INT_P (size
))
4584 size
= GEN_INT (INTVAL (size
) - used
);
4586 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4587 gen_int_mode (used
, GET_MODE (size
)),
4588 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4591 /* Get the address of the stack space.
4592 In this case, we do not deal with EXTRA separately.
4593 A single stack adjust will do. */
4594 poly_int64 const_args_so_far
;
4597 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4600 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
4601 temp
= memory_address (BLKmode
,
4602 plus_constant (Pmode
, args_addr
,
4603 skip
+ const_args_so_far
));
4605 temp
= memory_address (BLKmode
,
4606 plus_constant (Pmode
,
4607 gen_rtx_PLUS (Pmode
,
4612 if (!ACCUMULATE_OUTGOING_ARGS
)
4614 /* If the source is referenced relative to the stack pointer,
4615 copy it to another register to stabilize it. We do not need
4616 to do this if we know that we won't be changing sp. */
4618 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4619 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4620 temp
= copy_to_reg (temp
);
4623 target
= gen_rtx_MEM (BLKmode
, temp
);
4625 /* We do *not* set_mem_attributes here, because incoming arguments
4626 may overlap with sibling call outgoing arguments and we cannot
4627 allow reordering of reads from function arguments with stores
4628 to outgoing arguments of sibling calls. We do, however, want
4629 to record the alignment of the stack slot. */
4630 /* ALIGN may well be better aligned than TYPE, e.g. due to
4631 PARM_BOUNDARY. Assume the caller isn't lying. */
4632 set_mem_align (target
, align
);
4634 /* If part should go in registers and pushing to that part would
4635 overwrite some of the values that need to go into regs, load the
4636 overlapping values into temporary pseudos to be moved into the hard
4637 regs at the end after the stack pushing has completed.
4638 We cannot load them directly into the hard regs here because
4639 they can be clobbered by the block move expansions.
4642 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4643 && GET_CODE (reg
) != PARALLEL
)
4645 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4646 if (overlapping
> 0)
4648 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4649 overlapping
/= UNITS_PER_WORD
;
4651 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4653 for (int i
= 0; i
< overlapping
; i
++)
4654 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4656 for (int i
= 0; i
< overlapping
; i
++)
4657 emit_move_insn (tmp_regs
[i
],
4658 operand_subword_force (target
, i
, mode
));
4660 else if (overlapping
== -1)
4662 /* Could not determine whether there is overlap.
4663 Fail the sibcall. */
4671 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4674 else if (partial
> 0)
4676 /* Scalar partly in registers. This case is only supported
4677 for fixed-wdth modes. */
4678 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
4679 num_words
/= UNITS_PER_WORD
;
4682 /* # bytes of start of argument
4683 that we must make space for but need not store. */
4684 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4685 int args_offset
= INTVAL (args_so_far
);
4688 /* Push padding now if padding above and stack grows down,
4689 or if padding below and stack grows up.
4690 But if space already allocated, this has already been done. */
4691 if (maybe_ne (extra
, 0)
4693 && where_pad
!= PAD_NONE
4694 && where_pad
!= stack_direction
)
4695 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4697 /* If we make space by pushing it, we might as well push
4698 the real data. Otherwise, we can leave OFFSET nonzero
4699 and leave the space uninitialized. */
4703 /* Now NOT_STACK gets the number of words that we don't need to
4704 allocate on the stack. Convert OFFSET to words too. */
4705 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4706 offset
/= UNITS_PER_WORD
;
4708 /* If the partial register-part of the arg counts in its stack size,
4709 skip the part of stack space corresponding to the registers.
4710 Otherwise, start copying to the beginning of the stack space,
4711 by setting SKIP to 0. */
4712 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4714 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4715 x
= validize_mem (force_const_mem (mode
, x
));
4717 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4718 SUBREGs of such registers are not allowed. */
4719 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4720 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4721 x
= copy_to_reg (x
);
4723 /* Loop over all the words allocated on the stack for this arg. */
4724 /* We can do it by words, because any scalar bigger than a word
4725 has a size a multiple of a word. */
4726 for (i
= num_words
- 1; i
>= not_stack
; i
--)
4727 if (i
>= not_stack
+ offset
)
4728 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4729 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4731 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4733 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4741 /* Push padding now if padding above and stack grows down,
4742 or if padding below and stack grows up.
4743 But if space already allocated, this has already been done. */
4744 if (maybe_ne (extra
, 0)
4746 && where_pad
!= PAD_NONE
4747 && where_pad
!= stack_direction
)
4748 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4750 #ifdef PUSH_ROUNDING
4751 if (args_addr
== 0 && PUSH_ARGS
)
4752 emit_single_push_insn (mode
, x
, type
);
4756 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4757 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4759 /* We do *not* set_mem_attributes here, because incoming arguments
4760 may overlap with sibling call outgoing arguments and we cannot
4761 allow reordering of reads from function arguments with stores
4762 to outgoing arguments of sibling calls. We do, however, want
4763 to record the alignment of the stack slot. */
4764 /* ALIGN may well be better aligned than TYPE, e.g. due to
4765 PARM_BOUNDARY. Assume the caller isn't lying. */
4766 set_mem_align (dest
, align
);
4768 emit_move_insn (dest
, x
);
4772 /* Move the partial arguments into the registers and any overlapping
4773 values that we moved into the pseudos in tmp_regs. */
4774 if (partial
> 0 && reg
!= 0)
4776 /* Handle calls that pass values in multiple non-contiguous locations.
4777 The Irix 6 ABI has examples of this. */
4778 if (GET_CODE (reg
) == PARALLEL
)
4779 emit_group_load (reg
, x
, type
, -1);
4782 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4783 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4785 for (int i
= 0; i
< overlapping
; i
++)
4786 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4787 + nregs
- overlapping
+ i
),
4793 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4794 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4796 if (alignment_pad
&& args_addr
== 0)
4797 anti_adjust_stack (alignment_pad
);
4802 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4806 get_subtarget (rtx x
)
4810 /* Only registers can be subtargets. */
4812 /* Don't use hard regs to avoid extending their life. */
4813 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4817 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4818 FIELD is a bitfield. Returns true if the optimization was successful,
4819 and there's nothing else to do. */
4822 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4823 poly_uint64 pbitpos
,
4824 poly_uint64 pbitregion_start
,
4825 poly_uint64 pbitregion_end
,
4826 machine_mode mode1
, rtx str_rtx
,
4827 tree to
, tree src
, bool reverse
)
4829 /* str_mode is not guaranteed to be a scalar type. */
4830 machine_mode str_mode
= GET_MODE (str_rtx
);
4831 unsigned int str_bitsize
;
4836 enum tree_code code
;
4838 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4839 if (mode1
!= VOIDmode
4840 || !pbitsize
.is_constant (&bitsize
)
4841 || !pbitpos
.is_constant (&bitpos
)
4842 || !pbitregion_start
.is_constant (&bitregion_start
)
4843 || !pbitregion_end
.is_constant (&bitregion_end
)
4844 || bitsize
>= BITS_PER_WORD
4845 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4846 || str_bitsize
> BITS_PER_WORD
4847 || TREE_SIDE_EFFECTS (to
)
4848 || TREE_THIS_VOLATILE (to
))
4852 if (TREE_CODE (src
) != SSA_NAME
)
4854 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4857 srcstmt
= get_gimple_for_ssa_name (src
);
4859 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4862 code
= gimple_assign_rhs_code (srcstmt
);
4864 op0
= gimple_assign_rhs1 (srcstmt
);
4866 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4867 to find its initialization. Hopefully the initialization will
4868 be from a bitfield load. */
4869 if (TREE_CODE (op0
) == SSA_NAME
)
4871 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4873 /* We want to eventually have OP0 be the same as TO, which
4874 should be a bitfield. */
4876 || !is_gimple_assign (op0stmt
)
4877 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4879 op0
= gimple_assign_rhs1 (op0stmt
);
4882 op1
= gimple_assign_rhs2 (srcstmt
);
4884 if (!operand_equal_p (to
, op0
, 0))
4887 if (MEM_P (str_rtx
))
4889 unsigned HOST_WIDE_INT offset1
;
4891 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4892 str_bitsize
= BITS_PER_WORD
;
4894 scalar_int_mode best_mode
;
4895 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4896 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4898 str_mode
= best_mode
;
4899 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4902 bitpos
%= str_bitsize
;
4903 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4904 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4906 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4909 /* If the bit field covers the whole REG/MEM, store_field
4910 will likely generate better code. */
4911 if (bitsize
>= str_bitsize
)
4914 /* We can't handle fields split across multiple entities. */
4915 if (bitpos
+ bitsize
> str_bitsize
)
4918 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4919 bitpos
= str_bitsize
- bitpos
- bitsize
;
4925 /* For now, just optimize the case of the topmost bitfield
4926 where we don't need to do any masking and also
4927 1 bit bitfields where xor can be used.
4928 We might win by one instruction for the other bitfields
4929 too if insv/extv instructions aren't used, so that
4930 can be added later. */
4931 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4932 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4935 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4936 value
= convert_modes (str_mode
,
4937 TYPE_MODE (TREE_TYPE (op1
)), value
,
4938 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4940 /* We may be accessing data outside the field, which means
4941 we can alias adjacent data. */
4942 if (MEM_P (str_rtx
))
4944 str_rtx
= shallow_copy_rtx (str_rtx
);
4945 set_mem_alias_set (str_rtx
, 0);
4946 set_mem_expr (str_rtx
, 0);
4949 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4951 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4955 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4957 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4959 value
= flip_storage_order (str_mode
, value
);
4960 result
= expand_binop (str_mode
, binop
, str_rtx
,
4961 value
, str_rtx
, 1, OPTAB_WIDEN
);
4962 if (result
!= str_rtx
)
4963 emit_move_insn (str_rtx
, result
);
4968 if (TREE_CODE (op1
) != INTEGER_CST
)
4970 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4971 value
= convert_modes (str_mode
,
4972 TYPE_MODE (TREE_TYPE (op1
)), value
,
4973 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4975 /* We may be accessing data outside the field, which means
4976 we can alias adjacent data. */
4977 if (MEM_P (str_rtx
))
4979 str_rtx
= shallow_copy_rtx (str_rtx
);
4980 set_mem_alias_set (str_rtx
, 0);
4981 set_mem_expr (str_rtx
, 0);
4984 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4985 if (bitpos
+ bitsize
!= str_bitsize
)
4987 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4989 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4991 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4993 value
= flip_storage_order (str_mode
, value
);
4994 result
= expand_binop (str_mode
, binop
, str_rtx
,
4995 value
, str_rtx
, 1, OPTAB_WIDEN
);
4996 if (result
!= str_rtx
)
4997 emit_move_insn (str_rtx
, result
);
5007 /* In the C++ memory model, consecutive bit fields in a structure are
5008 considered one memory location.
5010 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
5011 returns the bit range of consecutive bits in which this COMPONENT_REF
5012 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
5013 and *OFFSET may be adjusted in the process.
5015 If the access does not need to be restricted, 0 is returned in both
5016 *BITSTART and *BITEND. */
5019 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
5020 poly_int64_pod
*bitpos
, tree
*offset
)
5022 poly_int64 bitoffset
;
5025 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
5027 field
= TREE_OPERAND (exp
, 1);
5028 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
5029 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
5030 need to limit the range we can access. */
5033 *bitstart
= *bitend
= 0;
5037 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
5038 part of a larger bit field, then the representative does not serve any
5039 useful purpose. This can occur in Ada. */
5040 if (handled_component_p (TREE_OPERAND (exp
, 0)))
5043 poly_int64 rbitsize
, rbitpos
;
5045 int unsignedp
, reversep
, volatilep
= 0;
5046 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
5047 &roffset
, &rmode
, &unsignedp
, &reversep
,
5049 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
5051 *bitstart
= *bitend
= 0;
5056 /* Compute the adjustment to bitpos from the offset of the field
5057 relative to the representative. DECL_FIELD_OFFSET of field and
5058 repr are the same by construction if they are not constants,
5059 see finish_bitfield_layout. */
5060 poly_uint64 field_offset
, repr_offset
;
5061 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
5062 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
5063 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
5066 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
5067 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
5069 /* If the adjustment is larger than bitpos, we would have a negative bit
5070 position for the lower bound and this may wreak havoc later. Adjust
5071 offset and bitpos to make the lower bound non-negative in that case. */
5072 if (maybe_gt (bitoffset
, *bitpos
))
5074 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
5075 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
5077 *bitpos
+= adjust_bits
;
5078 if (*offset
== NULL_TREE
)
5079 *offset
= size_int (-adjust_bytes
);
5081 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5085 *bitstart
= *bitpos
- bitoffset
;
5087 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5090 /* Returns true if BASE is a DECL that does not reside in memory and
5091 has non-BLKmode. DECL_RTL must not be a MEM; if
5092 DECL_RTL was not set yet, return false. */
5095 non_mem_decl_p (tree base
)
5098 || TREE_ADDRESSABLE (base
)
5099 || DECL_MODE (base
) == BLKmode
)
5102 if (!DECL_RTL_SET_P (base
))
5105 return (!MEM_P (DECL_RTL (base
)));
5108 /* Returns true if REF refers to an object that does not
5109 reside in memory and has non-BLKmode. */
5112 mem_ref_refers_to_non_mem_p (tree ref
)
5116 if (TREE_CODE (ref
) == MEM_REF
5117 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5119 tree addr
= TREE_OPERAND (ref
, 0);
5121 if (TREE_CODE (addr
) != ADDR_EXPR
)
5124 base
= TREE_OPERAND (addr
, 0);
5129 return non_mem_decl_p (base
);
5132 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5133 is true, try generating a nontemporal store. */
5136 expand_assignment (tree to
, tree from
, bool nontemporal
)
5142 enum insn_code icode
;
5144 /* Don't crash if the lhs of the assignment was erroneous. */
5145 if (TREE_CODE (to
) == ERROR_MARK
)
5147 expand_normal (from
);
5151 /* Optimize away no-op moves without side-effects. */
5152 if (operand_equal_p (to
, from
, 0))
5155 /* Handle misaligned stores. */
5156 mode
= TYPE_MODE (TREE_TYPE (to
));
5157 if ((TREE_CODE (to
) == MEM_REF
5158 || TREE_CODE (to
) == TARGET_MEM_REF
5161 && !mem_ref_refers_to_non_mem_p (to
)
5162 && ((align
= get_object_alignment (to
))
5163 < GET_MODE_ALIGNMENT (mode
))
5164 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5165 != CODE_FOR_nothing
)
5166 || targetm
.slow_unaligned_access (mode
, align
)))
5170 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5171 /* Handle PARALLEL. */
5172 reg
= maybe_emit_group_store (reg
, TREE_TYPE (from
));
5173 reg
= force_not_mem (reg
);
5174 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5175 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5176 reg
= flip_storage_order (mode
, reg
);
5178 if (icode
!= CODE_FOR_nothing
)
5180 class expand_operand ops
[2];
5182 create_fixed_operand (&ops
[0], mem
);
5183 create_input_operand (&ops
[1], reg
, mode
);
5184 /* The movmisalign<mode> pattern cannot fail, else the assignment
5185 would silently be omitted. */
5186 expand_insn (icode
, 2, ops
);
5189 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5194 /* Assignment of a structure component needs special treatment
5195 if the structure component's rtx is not simply a MEM.
5196 Assignment of an array element at a constant index, and assignment of
5197 an array element in an unaligned packed structure field, has the same
5198 problem. Same for (partially) storing into a non-memory object. */
5199 if (handled_component_p (to
)
5200 || (TREE_CODE (to
) == MEM_REF
5201 && (REF_REVERSE_STORAGE_ORDER (to
)
5202 || mem_ref_refers_to_non_mem_p (to
)))
5203 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5206 poly_int64 bitsize
, bitpos
;
5207 poly_uint64 bitregion_start
= 0;
5208 poly_uint64 bitregion_end
= 0;
5210 int unsignedp
, reversep
, volatilep
= 0;
5214 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5215 &unsignedp
, &reversep
, &volatilep
);
5217 /* Make sure bitpos is not negative, it can wreak havoc later. */
5218 if (maybe_lt (bitpos
, 0))
5220 gcc_assert (offset
== NULL_TREE
);
5221 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5222 bitpos
= num_trailing_bits (bitpos
);
5225 if (TREE_CODE (to
) == COMPONENT_REF
5226 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5227 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5228 /* The C++ memory model naturally applies to byte-aligned fields.
5229 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5230 BITSIZE are not byte-aligned, there is no need to limit the range
5231 we can access. This can occur with packed structures in Ada. */
5232 else if (maybe_gt (bitsize
, 0)
5233 && multiple_p (bitsize
, BITS_PER_UNIT
)
5234 && multiple_p (bitpos
, BITS_PER_UNIT
))
5236 bitregion_start
= bitpos
;
5237 bitregion_end
= bitpos
+ bitsize
- 1;
5240 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5242 /* If the field has a mode, we want to access it in the
5243 field's mode, not the computed mode.
5244 If a MEM has VOIDmode (external with incomplete type),
5245 use BLKmode for it instead. */
5248 if (mode1
!= VOIDmode
)
5249 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5250 else if (GET_MODE (to_rtx
) == VOIDmode
)
5251 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5256 machine_mode address_mode
;
5259 if (!MEM_P (to_rtx
))
5261 /* We can get constant negative offsets into arrays with broken
5262 user code. Translate this to a trap instead of ICEing. */
5263 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5264 expand_builtin_trap ();
5265 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5268 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5269 address_mode
= get_address_mode (to_rtx
);
5270 if (GET_MODE (offset_rtx
) != address_mode
)
5272 /* We cannot be sure that the RTL in offset_rtx is valid outside
5273 of a memory address context, so force it into a register
5274 before attempting to convert it to the desired mode. */
5275 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5276 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5279 /* If we have an expression in OFFSET_RTX and a non-zero
5280 byte offset in BITPOS, adding the byte offset before the
5281 OFFSET_RTX results in better intermediate code, which makes
5282 later rtl optimization passes perform better.
5284 We prefer intermediate code like this:
5286 r124:DI=r123:DI+0x18
5291 r124:DI=r123:DI+0x10
5292 [r124:DI+0x8]=r121:DI
5294 This is only done for aligned data values, as these can
5295 be expected to result in single move instructions. */
5297 if (mode1
!= VOIDmode
5298 && maybe_ne (bitpos
, 0)
5299 && maybe_gt (bitsize
, 0)
5300 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5301 && multiple_p (bitpos
, bitsize
)
5302 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5303 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5305 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5306 bitregion_start
= 0;
5307 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5308 bitregion_end
-= bitpos
;
5312 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5313 highest_pow2_factor_for_target (to
,
5317 /* No action is needed if the target is not a memory and the field
5318 lies completely outside that target. This can occur if the source
5319 code contains an out-of-bounds access to a small array. */
5321 && GET_MODE (to_rtx
) != BLKmode
5322 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5324 expand_normal (from
);
5327 /* Handle expand_expr of a complex value returning a CONCAT. */
5328 else if (GET_CODE (to_rtx
) == CONCAT
)
5330 machine_mode to_mode
= GET_MODE (to_rtx
);
5331 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5332 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5333 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5334 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5335 && known_eq (bitpos
, 0)
5336 && known_eq (bitsize
, mode_bitsize
))
5337 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5338 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5339 && known_eq (bitsize
, inner_bitsize
)
5340 && (known_eq (bitpos
, 0)
5341 || known_eq (bitpos
, inner_bitsize
)))
5342 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5343 false, nontemporal
, reversep
);
5344 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5345 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5346 bitregion_start
, bitregion_end
,
5347 mode1
, from
, get_alias_set (to
),
5348 nontemporal
, reversep
);
5349 else if (known_ge (bitpos
, inner_bitsize
))
5350 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5351 bitpos
- inner_bitsize
,
5352 bitregion_start
, bitregion_end
,
5353 mode1
, from
, get_alias_set (to
),
5354 nontemporal
, reversep
);
5355 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5357 result
= expand_normal (from
);
5358 if (GET_CODE (result
) == CONCAT
)
5360 to_mode
= GET_MODE_INNER (to_mode
);
5361 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5363 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5366 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5368 if (!from_real
|| !from_imag
)
5369 goto concat_store_slow
;
5370 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5371 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5375 machine_mode from_mode
5376 = GET_MODE (result
) == VOIDmode
5377 ? TYPE_MODE (TREE_TYPE (from
))
5378 : GET_MODE (result
);
5381 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5384 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5387 emit_move_insn (XEXP (to_rtx
, 0),
5388 read_complex_part (from_rtx
, false));
5389 emit_move_insn (XEXP (to_rtx
, 1),
5390 read_complex_part (from_rtx
, true));
5394 to_mode
= GET_MODE_INNER (to_mode
);
5396 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5398 = simplify_gen_subreg (to_mode
, result
, from_mode
,
5399 GET_MODE_SIZE (to_mode
));
5400 if (!from_real
|| !from_imag
)
5401 goto concat_store_slow
;
5402 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5403 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5410 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5411 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5412 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5413 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5414 result
= store_field (temp
, bitsize
, bitpos
,
5415 bitregion_start
, bitregion_end
,
5416 mode1
, from
, get_alias_set (to
),
5417 nontemporal
, reversep
);
5418 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5419 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5422 /* For calls to functions returning variable length structures, if TO_RTX
5423 is not a MEM, go through a MEM because we must not create temporaries
5425 else if (!MEM_P (to_rtx
)
5426 && TREE_CODE (from
) == CALL_EXPR
5427 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5428 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5430 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5431 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5432 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5433 bitregion_end
, mode1
, from
, get_alias_set (to
),
5434 nontemporal
, reversep
);
5435 emit_move_insn (to_rtx
, temp
);
5441 /* If the field is at offset zero, we could have been given the
5442 DECL_RTX of the parent struct. Don't munge it. */
5443 to_rtx
= shallow_copy_rtx (to_rtx
);
5444 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5446 MEM_VOLATILE_P (to_rtx
) = 1;
5449 gcc_checking_assert (known_ge (bitpos
, 0));
5450 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5451 bitregion_start
, bitregion_end
,
5452 mode1
, to_rtx
, to
, from
,
5456 result
= store_field (to_rtx
, bitsize
, bitpos
,
5457 bitregion_start
, bitregion_end
,
5458 mode1
, from
, get_alias_set (to
),
5459 nontemporal
, reversep
);
5463 preserve_temp_slots (result
);
5468 /* If the rhs is a function call and its value is not an aggregate,
5469 call the function before we start to compute the lhs.
5470 This is needed for correct code for cases such as
5471 val = setjmp (buf) on machines where reference to val
5472 requires loading up part of an address in a separate insn.
5474 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5475 since it might be a promoted variable where the zero- or sign- extension
5476 needs to be done. Handling this in the normal way is safe because no
5477 computation is done before the call. The same is true for SSA names. */
5478 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5479 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5480 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5482 || TREE_CODE (to
) == PARM_DECL
5483 || TREE_CODE (to
) == RESULT_DECL
)
5484 && REG_P (DECL_RTL (to
)))
5485 || TREE_CODE (to
) == SSA_NAME
))
5490 value
= expand_normal (from
);
5493 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5495 /* Handle calls that return values in multiple non-contiguous locations.
5496 The Irix 6 ABI has examples of this. */
5497 if (GET_CODE (to_rtx
) == PARALLEL
)
5499 if (GET_CODE (value
) == PARALLEL
)
5500 emit_group_move (to_rtx
, value
);
5502 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5503 int_size_in_bytes (TREE_TYPE (from
)));
5505 else if (GET_CODE (value
) == PARALLEL
)
5506 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5507 int_size_in_bytes (TREE_TYPE (from
)));
5508 else if (GET_MODE (to_rtx
) == BLKmode
)
5510 /* Handle calls that return BLKmode values in registers. */
5512 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5514 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5518 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5519 value
= convert_memory_address_addr_space
5520 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5521 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5523 emit_move_insn (to_rtx
, value
);
5526 preserve_temp_slots (to_rtx
);
5531 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5532 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5534 /* Don't move directly into a return register. */
5535 if (TREE_CODE (to
) == RESULT_DECL
5536 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5542 /* If the source is itself a return value, it still is in a pseudo at
5543 this point so we can move it back to the return register directly. */
5545 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5546 && TREE_CODE (from
) != CALL_EXPR
)
5547 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5549 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5551 /* Handle calls that return values in multiple non-contiguous locations.
5552 The Irix 6 ABI has examples of this. */
5553 if (GET_CODE (to_rtx
) == PARALLEL
)
5555 if (GET_CODE (temp
) == PARALLEL
)
5556 emit_group_move (to_rtx
, temp
);
5558 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5559 int_size_in_bytes (TREE_TYPE (from
)));
5562 emit_move_insn (to_rtx
, temp
);
5564 preserve_temp_slots (to_rtx
);
5569 /* In case we are returning the contents of an object which overlaps
5570 the place the value is being stored, use a safe function when copying
5571 a value through a pointer into a structure value return block. */
5572 if (TREE_CODE (to
) == RESULT_DECL
5573 && TREE_CODE (from
) == INDIRECT_REF
5574 && ADDR_SPACE_GENERIC_P
5575 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5576 && refs_may_alias_p (to
, from
)
5577 && cfun
->returns_struct
5578 && !cfun
->returns_pcc_struct
)
5583 size
= expr_size (from
);
5584 from_rtx
= expand_normal (from
);
5586 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5588 preserve_temp_slots (to_rtx
);
5593 /* Compute FROM and store the value in the rtx we got. */
5596 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5597 preserve_temp_slots (result
);
5602 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5603 succeeded, false otherwise. */
5606 emit_storent_insn (rtx to
, rtx from
)
5608 class expand_operand ops
[2];
5609 machine_mode mode
= GET_MODE (to
);
5610 enum insn_code code
= optab_handler (storent_optab
, mode
);
5612 if (code
== CODE_FOR_nothing
)
5615 create_fixed_operand (&ops
[0], to
);
5616 create_input_operand (&ops
[1], from
, mode
);
5617 return maybe_expand_insn (code
, 2, ops
);
5620 /* Helper function for store_expr storing of STRING_CST. */
5623 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5625 tree str
= (tree
) data
;
5627 gcc_assert (offset
>= 0);
5628 if (offset
>= TREE_STRING_LENGTH (str
))
5631 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5632 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5634 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5635 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5636 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5637 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5638 return c_readstr (p
, mode
, false);
5641 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5644 /* Generate code for computing expression EXP,
5645 and storing the value into TARGET.
5647 If the mode is BLKmode then we may return TARGET itself.
5648 It turns out that in BLKmode it doesn't cause a problem.
5649 because C has no operators that could combine two different
5650 assignments into the same BLKmode object with different values
5651 with no sequence point. Will other languages need this to
5654 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5655 stack, and block moves may need to be treated specially.
5657 If NONTEMPORAL is true, try using a nontemporal store instruction.
5659 If REVERSE is true, the store is to be done in reverse order. */
5662 store_expr (tree exp
, rtx target
, int call_param_p
,
5663 bool nontemporal
, bool reverse
)
5666 rtx alt_rtl
= NULL_RTX
;
5667 location_t loc
= curr_insn_location ();
5668 bool shortened_string_cst
= false;
5670 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5672 /* C++ can generate ?: expressions with a throw expression in one
5673 branch and an rvalue in the other. Here, we resolve attempts to
5674 store the throw expression's nonexistent result. */
5675 gcc_assert (!call_param_p
);
5676 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5679 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5681 /* Perform first part of compound expression, then assign from second
5683 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5684 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5685 return store_expr (TREE_OPERAND (exp
, 1), target
,
5686 call_param_p
, nontemporal
, reverse
);
5688 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5690 /* For conditional expression, get safe form of the target. Then
5691 test the condition, doing the appropriate assignment on either
5692 side. This avoids the creation of unnecessary temporaries.
5693 For non-BLKmode, it is more efficient not to do this. */
5695 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5697 do_pending_stack_adjust ();
5699 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5700 profile_probability::uninitialized ());
5701 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5702 nontemporal
, reverse
);
5703 emit_jump_insn (targetm
.gen_jump (lab2
));
5706 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5707 nontemporal
, reverse
);
5713 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5714 /* If this is a scalar in a register that is stored in a wider mode
5715 than the declared mode, compute the result into its declared mode
5716 and then convert to the wider mode. Our value is the computed
5719 rtx inner_target
= 0;
5720 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5721 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5723 /* We can do the conversion inside EXP, which will often result
5724 in some optimizations. Do the conversion in two steps: first
5725 change the signedness, if needed, then the extend. But don't
5726 do this if the type of EXP is a subtype of something else
5727 since then the conversion might involve more than just
5728 converting modes. */
5729 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5730 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5731 && GET_MODE_PRECISION (outer_mode
)
5732 == TYPE_PRECISION (TREE_TYPE (exp
)))
5734 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5735 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5737 /* Some types, e.g. Fortran's logical*4, won't have a signed
5738 version, so use the mode instead. */
5740 = (signed_or_unsigned_type_for
5741 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5743 ntype
= lang_hooks
.types
.type_for_mode
5744 (TYPE_MODE (TREE_TYPE (exp
)),
5745 SUBREG_PROMOTED_SIGN (target
));
5747 exp
= fold_convert_loc (loc
, ntype
, exp
);
5750 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5751 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5754 inner_target
= SUBREG_REG (target
);
5757 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5758 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5761 /* If TEMP is a VOIDmode constant, use convert_modes to make
5762 sure that we properly convert it. */
5763 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5765 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5766 temp
, SUBREG_PROMOTED_SIGN (target
));
5767 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5768 SUBREG_PROMOTED_SIGN (target
));
5771 convert_move (SUBREG_REG (target
), temp
,
5772 SUBREG_PROMOTED_SIGN (target
));
5776 else if ((TREE_CODE (exp
) == STRING_CST
5777 || (TREE_CODE (exp
) == MEM_REF
5778 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5779 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5781 && integer_zerop (TREE_OPERAND (exp
, 1))))
5782 && !nontemporal
&& !call_param_p
5785 /* Optimize initialization of an array with a STRING_CST. */
5786 HOST_WIDE_INT exp_len
, str_copy_len
;
5788 tree str
= TREE_CODE (exp
) == STRING_CST
5789 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5791 exp_len
= int_expr_size (exp
);
5795 if (TREE_STRING_LENGTH (str
) <= 0)
5798 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5799 MEM_ALIGN (target
), false))
5801 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5802 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5806 str_copy_len
= TREE_STRING_LENGTH (str
);
5807 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5809 str_copy_len
+= STORE_MAX_PIECES
- 1;
5810 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5812 if (str_copy_len
>= exp_len
)
5815 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5816 (void *) str
, MEM_ALIGN (target
), false))
5819 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5820 (void *) str
, MEM_ALIGN (target
), false,
5822 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5823 exp_len
- str_copy_len
),
5824 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5832 /* If we want to use a nontemporal or a reverse order store, force the
5833 value into a register first. */
5834 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5836 if (TREE_CODE (exp
) == STRING_CST
5837 && tmp_target
== target
5838 && GET_MODE (target
) == BLKmode
5839 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
5841 rtx size
= expr_size (exp
);
5842 if (CONST_INT_P (size
)
5843 && size
!= const0_rtx
5845 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
5847 /* If the STRING_CST has much larger array type than
5848 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
5849 it into the rodata section as the code later on will use
5850 memset zero for the remainder anyway. See PR95052. */
5851 tmp_target
= NULL_RTX
;
5852 rexp
= copy_node (exp
);
5854 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
5855 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
5857 shortened_string_cst
= true;
5860 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
5862 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5864 if (shortened_string_cst
)
5866 gcc_assert (MEM_P (temp
));
5867 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
5871 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5872 the same as that of TARGET, adjust the constant. This is needed, for
5873 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5874 only a word-sized value. */
5875 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5876 && TREE_CODE (exp
) != ERROR_MARK
5877 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5879 gcc_assert (!shortened_string_cst
);
5880 if (GET_MODE_CLASS (GET_MODE (target
))
5881 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5882 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5883 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5885 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5886 TYPE_MODE (TREE_TYPE (exp
)), 0);
5890 if (GET_MODE (temp
) == VOIDmode
)
5891 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5892 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5895 /* If value was not generated in the target, store it there.
5896 Convert the value to TARGET's type first if necessary and emit the
5897 pending incrementations that have been queued when expanding EXP.
5898 Note that we cannot emit the whole queue blindly because this will
5899 effectively disable the POST_INC optimization later.
5901 If TEMP and TARGET compare equal according to rtx_equal_p, but
5902 one or both of them are volatile memory refs, we have to distinguish
5904 - expand_expr has used TARGET. In this case, we must not generate
5905 another copy. This can be detected by TARGET being equal according
5907 - expand_expr has not used TARGET - that means that the source just
5908 happens to have the same RTX form. Since temp will have been created
5909 by expand_expr, it will compare unequal according to == .
5910 We must generate a copy in this case, to reach the correct number
5911 of volatile memory references. */
5913 if ((! rtx_equal_p (temp
, target
)
5914 || (temp
!= target
&& (side_effects_p (temp
)
5915 || side_effects_p (target
))))
5916 && TREE_CODE (exp
) != ERROR_MARK
5917 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5918 but TARGET is not valid memory reference, TEMP will differ
5919 from TARGET although it is really the same location. */
5921 && rtx_equal_p (alt_rtl
, target
)
5922 && !side_effects_p (alt_rtl
)
5923 && !side_effects_p (target
))
5924 /* If there's nothing to copy, don't bother. Don't call
5925 expr_size unless necessary, because some front-ends (C++)
5926 expr_size-hook must not be given objects that are not
5927 supposed to be bit-copied or bit-initialized. */
5928 && expr_size (exp
) != const0_rtx
)
5930 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5932 gcc_assert (!shortened_string_cst
);
5933 if (GET_MODE (target
) == BLKmode
)
5935 /* Handle calls that return BLKmode values in registers. */
5936 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5937 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5939 store_bit_field (target
,
5940 rtx_to_poly_int64 (expr_size (exp
))
5942 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5945 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5948 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5950 /* Handle copying a string constant into an array. The string
5951 constant may be shorter than the array. So copy just the string's
5952 actual length, and clear the rest. First get the size of the data
5953 type of the string, which is actually the size of the target. */
5954 rtx size
= expr_size (exp
);
5956 if (CONST_INT_P (size
)
5957 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5958 emit_block_move (target
, temp
, size
,
5960 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5963 machine_mode pointer_mode
5964 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5965 machine_mode address_mode
= get_address_mode (target
);
5967 /* Compute the size of the data to copy from the string. */
5969 = size_binop_loc (loc
, MIN_EXPR
,
5970 make_tree (sizetype
, size
),
5971 size_int (TREE_STRING_LENGTH (exp
)));
5973 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5975 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5976 rtx_code_label
*label
= 0;
5978 /* Copy that much. */
5979 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5980 TYPE_UNSIGNED (sizetype
));
5981 emit_block_move (target
, temp
, copy_size_rtx
,
5983 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5985 /* Figure out how much is left in TARGET that we have to clear.
5986 Do all calculations in pointer_mode. */
5987 poly_int64 const_copy_size
;
5988 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5990 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5991 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5995 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5996 copy_size_rtx
, NULL_RTX
, 0,
5999 if (GET_MODE (copy_size_rtx
) != address_mode
)
6000 copy_size_rtx
= convert_to_mode (address_mode
,
6002 TYPE_UNSIGNED (sizetype
));
6004 target
= offset_address (target
, copy_size_rtx
,
6005 highest_pow2_factor (copy_size
));
6006 label
= gen_label_rtx ();
6007 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
6008 GET_MODE (size
), 0, label
);
6011 if (size
!= const0_rtx
)
6012 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
6018 else if (shortened_string_cst
)
6020 /* Handle calls that return values in multiple non-contiguous locations.
6021 The Irix 6 ABI has examples of this. */
6022 else if (GET_CODE (target
) == PARALLEL
)
6024 if (GET_CODE (temp
) == PARALLEL
)
6025 emit_group_move (target
, temp
);
6027 emit_group_load (target
, temp
, TREE_TYPE (exp
),
6028 int_size_in_bytes (TREE_TYPE (exp
)));
6030 else if (GET_CODE (temp
) == PARALLEL
)
6031 emit_group_store (target
, temp
, TREE_TYPE (exp
),
6032 int_size_in_bytes (TREE_TYPE (exp
)));
6033 else if (GET_MODE (temp
) == BLKmode
)
6034 emit_block_move (target
, temp
, expr_size (exp
),
6036 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6037 /* If we emit a nontemporal store, there is nothing else to do. */
6038 else if (nontemporal
&& emit_storent_insn (target
, temp
))
6043 temp
= flip_storage_order (GET_MODE (target
), temp
);
6044 temp
= force_operand (temp
, target
);
6046 emit_move_insn (target
, temp
);
6050 gcc_assert (!shortened_string_cst
);
6055 /* Return true if field F of structure TYPE is a flexible array. */
6058 flexible_array_member_p (const_tree f
, const_tree type
)
6063 return (DECL_CHAIN (f
) == NULL
6064 && TREE_CODE (tf
) == ARRAY_TYPE
6066 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
6067 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
6068 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
6069 && int_size_in_bytes (type
) >= 0);
6072 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
6073 must have in order for it to completely initialize a value of type TYPE.
6074 Return -1 if the number isn't known.
6076 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
6078 static HOST_WIDE_INT
6079 count_type_elements (const_tree type
, bool for_ctor_p
)
6081 switch (TREE_CODE (type
))
6087 nelts
= array_type_nelts (type
);
6088 if (nelts
&& tree_fits_uhwi_p (nelts
))
6090 unsigned HOST_WIDE_INT n
;
6092 n
= tree_to_uhwi (nelts
) + 1;
6093 if (n
== 0 || for_ctor_p
)
6096 return n
* count_type_elements (TREE_TYPE (type
), false);
6098 return for_ctor_p
? -1 : 1;
6103 unsigned HOST_WIDE_INT n
;
6107 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6108 if (TREE_CODE (f
) == FIELD_DECL
)
6111 n
+= count_type_elements (TREE_TYPE (f
), false);
6112 else if (!flexible_array_member_p (f
, type
))
6113 /* Don't count flexible arrays, which are not supposed
6114 to be initialized. */
6122 case QUAL_UNION_TYPE
:
6127 gcc_assert (!for_ctor_p
);
6128 /* Estimate the number of scalars in each field and pick the
6129 maximum. Other estimates would do instead; the idea is simply
6130 to make sure that the estimate is not sensitive to the ordering
6133 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6134 if (TREE_CODE (f
) == FIELD_DECL
)
6136 m
= count_type_elements (TREE_TYPE (f
), false);
6137 /* If the field doesn't span the whole union, add an extra
6138 scalar for the rest. */
6139 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
6140 TYPE_SIZE (type
)) != 1)
6153 unsigned HOST_WIDE_INT nelts
;
6154 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6162 case FIXED_POINT_TYPE
:
6167 case REFERENCE_TYPE
:
6183 /* Helper for categorize_ctor_elements. Identical interface. */
6186 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6187 HOST_WIDE_INT
*p_unique_nz_elts
,
6188 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6190 unsigned HOST_WIDE_INT idx
;
6191 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6192 tree value
, purpose
, elt_type
;
6194 /* Whether CTOR is a valid constant initializer, in accordance with what
6195 initializer_constant_valid_p does. If inferred from the constructor
6196 elements, true until proven otherwise. */
6197 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6198 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6204 elt_type
= NULL_TREE
;
6206 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6208 HOST_WIDE_INT mult
= 1;
6210 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6212 tree lo_index
= TREE_OPERAND (purpose
, 0);
6213 tree hi_index
= TREE_OPERAND (purpose
, 1);
6215 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6216 mult
= (tree_to_uhwi (hi_index
)
6217 - tree_to_uhwi (lo_index
) + 1);
6220 elt_type
= TREE_TYPE (value
);
6222 switch (TREE_CODE (value
))
6226 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6228 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6231 nz_elts
+= mult
* nz
;
6232 unique_nz_elts
+= unz
;
6233 init_elts
+= mult
* ic
;
6235 if (const_from_elts_p
&& const_p
)
6236 const_p
= const_elt_p
;
6243 if (!initializer_zerop (value
))
6252 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6253 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6254 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6258 if (!initializer_zerop (TREE_REALPART (value
)))
6263 if (!initializer_zerop (TREE_IMAGPART (value
)))
6268 init_elts
+= 2 * mult
;
6273 /* We can only construct constant-length vectors using
6275 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6276 for (unsigned int i
= 0; i
< nunits
; ++i
)
6278 tree v
= VECTOR_CST_ELT (value
, i
);
6279 if (!initializer_zerop (v
))
6291 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6292 nz_elts
+= mult
* tc
;
6293 unique_nz_elts
+= tc
;
6294 init_elts
+= mult
* tc
;
6296 if (const_from_elts_p
&& const_p
)
6298 = initializer_constant_valid_p (value
,
6300 TYPE_REVERSE_STORAGE_ORDER
6308 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6309 num_fields
, elt_type
))
6310 *p_complete
= false;
6312 *p_nz_elts
+= nz_elts
;
6313 *p_unique_nz_elts
+= unique_nz_elts
;
6314 *p_init_elts
+= init_elts
;
6319 /* Examine CTOR to discover:
6320 * how many scalar fields are set to nonzero values,
6321 and place it in *P_NZ_ELTS;
6322 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6323 high - low + 1 (this can be useful for callers to determine ctors
6324 that could be cheaply initialized with - perhaps nested - loops
6325 compared to copied from huge read-only data),
6326 and place it in *P_UNIQUE_NZ_ELTS;
6327 * how many scalar fields in total are in CTOR,
6328 and place it in *P_ELT_COUNT.
6329 * whether the constructor is complete -- in the sense that every
6330 meaningful byte is explicitly given a value --
6331 and place it in *P_COMPLETE.
6333 Return whether or not CTOR is a valid static constant initializer, the same
6334 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6337 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6338 HOST_WIDE_INT
*p_unique_nz_elts
,
6339 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6342 *p_unique_nz_elts
= 0;
6346 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6347 p_init_elts
, p_complete
);
6350 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6351 of which had type LAST_TYPE. Each element was itself a complete
6352 initializer, in the sense that every meaningful byte was explicitly
6353 given a value. Return true if the same is true for the constructor
6357 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6358 const_tree last_type
)
6360 if (TREE_CODE (type
) == UNION_TYPE
6361 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6366 gcc_assert (num_elts
== 1 && last_type
);
6368 /* ??? We could look at each element of the union, and find the
6369 largest element. Which would avoid comparing the size of the
6370 initialized element against any tail padding in the union.
6371 Doesn't seem worth the effort... */
6372 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6375 return count_type_elements (type
, true) == num_elts
;
6378 /* Return 1 if EXP contains mostly (3/4) zeros. */
6381 mostly_zeros_p (const_tree exp
)
6383 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6385 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6388 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6390 return !complete_p
|| nz_elts
< init_elts
/ 4;
6393 return initializer_zerop (exp
);
6396 /* Return 1 if EXP contains all zeros. */
6399 all_zeros_p (const_tree exp
)
6401 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6403 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6406 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6408 return nz_elts
== 0;
6411 return initializer_zerop (exp
);
6414 /* Helper function for store_constructor.
6415 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6416 CLEARED is as for store_constructor.
6417 ALIAS_SET is the alias set to use for any stores.
6418 If REVERSE is true, the store is to be done in reverse order.
6420 This provides a recursive shortcut back to store_constructor when it isn't
6421 necessary to go through store_field. This is so that we can pass through
6422 the cleared field to let store_constructor know that we may not have to
6423 clear a substructure if the outer structure has already been cleared. */
6426 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6427 poly_uint64 bitregion_start
,
6428 poly_uint64 bitregion_end
,
6430 tree exp
, int cleared
,
6431 alias_set_type alias_set
, bool reverse
)
6434 poly_uint64 bytesize
;
6435 if (TREE_CODE (exp
) == CONSTRUCTOR
6436 /* We can only call store_constructor recursively if the size and
6437 bit position are on a byte boundary. */
6438 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6439 && maybe_ne (bitsize
, 0U)
6440 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6441 /* If we have a nonzero bitpos for a register target, then we just
6442 let store_field do the bitfield handling. This is unlikely to
6443 generate unnecessary clear instructions anyways. */
6444 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6448 machine_mode target_mode
= GET_MODE (target
);
6449 if (target_mode
!= BLKmode
6450 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6451 target_mode
= BLKmode
;
6452 target
= adjust_address (target
, target_mode
, bytepos
);
6456 /* Update the alias set, if required. */
6457 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6458 && MEM_ALIAS_SET (target
) != 0)
6460 target
= copy_rtx (target
);
6461 set_mem_alias_set (target
, alias_set
);
6464 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6467 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6468 exp
, alias_set
, false, reverse
);
6472 /* Returns the number of FIELD_DECLs in TYPE. */
6475 fields_length (const_tree type
)
6477 tree t
= TYPE_FIELDS (type
);
6480 for (; t
; t
= DECL_CHAIN (t
))
6481 if (TREE_CODE (t
) == FIELD_DECL
)
6488 /* Store the value of constructor EXP into the rtx TARGET.
6489 TARGET is either a REG or a MEM; we know it cannot conflict, since
6490 safe_from_p has been called.
6491 CLEARED is true if TARGET is known to have been zero'd.
6492 SIZE is the number of bytes of TARGET we are allowed to modify: this
6493 may not be the same as the size of EXP if we are assigning to a field
6494 which has been packed to exclude padding bits.
6495 If REVERSE is true, the store is to be done in reverse order. */
6498 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6501 tree type
= TREE_TYPE (exp
);
6502 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6503 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6505 switch (TREE_CODE (type
))
6509 case QUAL_UNION_TYPE
:
6511 unsigned HOST_WIDE_INT idx
;
6514 /* The storage order is specified for every aggregate type. */
6515 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6517 /* If size is zero or the target is already cleared, do nothing. */
6518 if (known_eq (size
, 0) || cleared
)
6520 /* We either clear the aggregate or indicate the value is dead. */
6521 else if ((TREE_CODE (type
) == UNION_TYPE
6522 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6523 && ! CONSTRUCTOR_ELTS (exp
))
6524 /* If the constructor is empty, clear the union. */
6526 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6530 /* If we are building a static constructor into a register,
6531 set the initial value as zero so we can fold the value into
6532 a constant. But if more than one register is involved,
6533 this probably loses. */
6534 else if (REG_P (target
) && TREE_STATIC (exp
)
6535 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6536 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6538 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6542 /* If the constructor has fewer fields than the structure or
6543 if we are initializing the structure to mostly zeros, clear
6544 the whole structure first. Don't do this if TARGET is a
6545 register whose mode size isn't equal to SIZE since
6546 clear_storage can't handle this case. */
6547 else if (known_size_p (size
)
6548 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6549 || mostly_zeros_p (exp
))
6551 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6553 clear_storage (target
, gen_int_mode (size
, Pmode
),
6558 if (REG_P (target
) && !cleared
)
6559 emit_clobber (target
);
6561 /* Store each element of the constructor into the
6562 corresponding field of TARGET. */
6563 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6566 HOST_WIDE_INT bitsize
;
6567 HOST_WIDE_INT bitpos
= 0;
6569 rtx to_rtx
= target
;
6571 /* Just ignore missing fields. We cleared the whole
6572 structure, above, if any fields are missing. */
6576 if (cleared
&& initializer_zerop (value
))
6579 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6580 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6584 mode
= DECL_MODE (field
);
6585 if (DECL_BIT_FIELD (field
))
6588 offset
= DECL_FIELD_OFFSET (field
);
6589 if (tree_fits_shwi_p (offset
)
6590 && tree_fits_shwi_p (bit_position (field
)))
6592 bitpos
= int_bit_position (field
);
6598 /* If this initializes a field that is smaller than a
6599 word, at the start of a word, try to widen it to a full
6600 word. This special case allows us to output C++ member
6601 function initializations in a form that the optimizers
6603 if (WORD_REGISTER_OPERATIONS
6605 && bitsize
< BITS_PER_WORD
6606 && bitpos
% BITS_PER_WORD
== 0
6607 && GET_MODE_CLASS (mode
) == MODE_INT
6608 && TREE_CODE (value
) == INTEGER_CST
6610 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6612 type
= TREE_TYPE (value
);
6614 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6616 type
= lang_hooks
.types
.type_for_mode
6617 (word_mode
, TYPE_UNSIGNED (type
));
6618 value
= fold_convert (type
, value
);
6619 /* Make sure the bits beyond the original bitsize are zero
6620 so that we can correctly avoid extra zeroing stores in
6621 later constructor elements. */
6623 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6625 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6628 if (BYTES_BIG_ENDIAN
)
6630 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6631 build_int_cst (type
,
6632 BITS_PER_WORD
- bitsize
));
6633 bitsize
= BITS_PER_WORD
;
6637 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6638 && DECL_NONADDRESSABLE_P (field
))
6640 to_rtx
= copy_rtx (to_rtx
);
6641 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6644 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6645 0, bitregion_end
, mode
,
6647 get_alias_set (TREE_TYPE (field
)),
6655 unsigned HOST_WIDE_INT i
;
6658 tree elttype
= TREE_TYPE (type
);
6660 HOST_WIDE_INT minelt
= 0;
6661 HOST_WIDE_INT maxelt
= 0;
6663 /* The storage order is specified for every aggregate type. */
6664 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6666 domain
= TYPE_DOMAIN (type
);
6667 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6668 && TYPE_MAX_VALUE (domain
)
6669 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6670 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6672 /* If we have constant bounds for the range of the type, get them. */
6675 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6676 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6679 /* If the constructor has fewer elements than the array, clear
6680 the whole array first. Similarly if this is static
6681 constructor of a non-BLKmode object. */
6684 else if (REG_P (target
) && TREE_STATIC (exp
))
6688 unsigned HOST_WIDE_INT idx
;
6689 HOST_WIDE_INT count
= 0, zero_count
= 0;
6690 need_to_clear
= ! const_bounds_p
;
6692 /* This loop is a more accurate version of the loop in
6693 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6694 is also needed to check for missing elements. */
6695 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6697 HOST_WIDE_INT this_node_count
;
6702 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6704 tree lo_index
= TREE_OPERAND (index
, 0);
6705 tree hi_index
= TREE_OPERAND (index
, 1);
6707 if (! tree_fits_uhwi_p (lo_index
)
6708 || ! tree_fits_uhwi_p (hi_index
))
6714 this_node_count
= (tree_to_uhwi (hi_index
)
6715 - tree_to_uhwi (lo_index
) + 1);
6718 this_node_count
= 1;
6720 count
+= this_node_count
;
6721 if (mostly_zeros_p (value
))
6722 zero_count
+= this_node_count
;
6725 /* Clear the entire array first if there are any missing
6726 elements, or if the incidence of zero elements is >=
6729 && (count
< maxelt
- minelt
+ 1
6730 || 4 * zero_count
>= 3 * count
))
6734 if (need_to_clear
&& maybe_gt (size
, 0))
6737 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6739 clear_storage (target
, gen_int_mode (size
, Pmode
),
6744 if (!cleared
&& REG_P (target
))
6745 /* Inform later passes that the old value is dead. */
6746 emit_clobber (target
);
6748 /* Store each element of the constructor into the
6749 corresponding element of TARGET, determined by counting the
6751 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6755 HOST_WIDE_INT bitpos
;
6756 rtx xtarget
= target
;
6758 if (cleared
&& initializer_zerop (value
))
6761 mode
= TYPE_MODE (elttype
);
6762 if (mode
!= BLKmode
)
6763 bitsize
= GET_MODE_BITSIZE (mode
);
6764 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6767 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6769 tree lo_index
= TREE_OPERAND (index
, 0);
6770 tree hi_index
= TREE_OPERAND (index
, 1);
6771 rtx index_r
, pos_rtx
;
6772 HOST_WIDE_INT lo
, hi
, count
;
6775 /* If the range is constant and "small", unroll the loop. */
6777 && tree_fits_shwi_p (lo_index
)
6778 && tree_fits_shwi_p (hi_index
)
6779 && (lo
= tree_to_shwi (lo_index
),
6780 hi
= tree_to_shwi (hi_index
),
6781 count
= hi
- lo
+ 1,
6784 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6785 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6788 lo
-= minelt
; hi
-= minelt
;
6789 for (; lo
<= hi
; lo
++)
6791 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6794 && !MEM_KEEP_ALIAS_SET_P (target
)
6795 && TREE_CODE (type
) == ARRAY_TYPE
6796 && TYPE_NONALIASED_COMPONENT (type
))
6798 target
= copy_rtx (target
);
6799 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6802 store_constructor_field
6803 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6804 mode
, value
, cleared
,
6805 get_alias_set (elttype
), reverse
);
6810 rtx_code_label
*loop_start
= gen_label_rtx ();
6811 rtx_code_label
*loop_end
= gen_label_rtx ();
6814 expand_normal (hi_index
);
6816 index
= build_decl (EXPR_LOCATION (exp
),
6817 VAR_DECL
, NULL_TREE
, domain
);
6818 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6819 SET_DECL_RTL (index
, index_r
);
6820 store_expr (lo_index
, index_r
, 0, false, reverse
);
6822 /* Build the head of the loop. */
6823 do_pending_stack_adjust ();
6824 emit_label (loop_start
);
6826 /* Assign value to element index. */
6828 fold_convert (ssizetype
,
6829 fold_build2 (MINUS_EXPR
,
6832 TYPE_MIN_VALUE (domain
)));
6835 size_binop (MULT_EXPR
, position
,
6836 fold_convert (ssizetype
,
6837 TYPE_SIZE_UNIT (elttype
)));
6839 pos_rtx
= expand_normal (position
);
6840 xtarget
= offset_address (target
, pos_rtx
,
6841 highest_pow2_factor (position
));
6842 xtarget
= adjust_address (xtarget
, mode
, 0);
6843 if (TREE_CODE (value
) == CONSTRUCTOR
)
6844 store_constructor (value
, xtarget
, cleared
,
6845 exact_div (bitsize
, BITS_PER_UNIT
),
6848 store_expr (value
, xtarget
, 0, false, reverse
);
6850 /* Generate a conditional jump to exit the loop. */
6851 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6853 jumpif (exit_cond
, loop_end
,
6854 profile_probability::uninitialized ());
6856 /* Update the loop counter, and jump to the head of
6858 expand_assignment (index
,
6859 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6860 index
, integer_one_node
),
6863 emit_jump (loop_start
);
6865 /* Build the end of the loop. */
6866 emit_label (loop_end
);
6869 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6870 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6875 index
= ssize_int (1);
6878 index
= fold_convert (ssizetype
,
6879 fold_build2 (MINUS_EXPR
,
6882 TYPE_MIN_VALUE (domain
)));
6885 size_binop (MULT_EXPR
, index
,
6886 fold_convert (ssizetype
,
6887 TYPE_SIZE_UNIT (elttype
)));
6888 xtarget
= offset_address (target
,
6889 expand_normal (position
),
6890 highest_pow2_factor (position
));
6891 xtarget
= adjust_address (xtarget
, mode
, 0);
6892 store_expr (value
, xtarget
, 0, false, reverse
);
6897 bitpos
= ((tree_to_shwi (index
) - minelt
)
6898 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6900 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6902 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6903 && TREE_CODE (type
) == ARRAY_TYPE
6904 && TYPE_NONALIASED_COMPONENT (type
))
6906 target
= copy_rtx (target
);
6907 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6909 store_constructor_field (target
, bitsize
, bitpos
, 0,
6910 bitregion_end
, mode
, value
,
6911 cleared
, get_alias_set (elttype
),
6920 unsigned HOST_WIDE_INT idx
;
6921 constructor_elt
*ce
;
6924 insn_code icode
= CODE_FOR_nothing
;
6926 tree elttype
= TREE_TYPE (type
);
6927 int elt_size
= vector_element_bits (type
);
6928 machine_mode eltmode
= TYPE_MODE (elttype
);
6929 HOST_WIDE_INT bitsize
;
6930 HOST_WIDE_INT bitpos
;
6931 rtvec vector
= NULL
;
6933 unsigned HOST_WIDE_INT const_n_elts
;
6934 alias_set_type alias
;
6935 bool vec_vec_init_p
= false;
6936 machine_mode mode
= GET_MODE (target
);
6938 gcc_assert (eltmode
!= BLKmode
);
6940 /* Try using vec_duplicate_optab for uniform vectors. */
6941 if (!TREE_SIDE_EFFECTS (exp
)
6942 && VECTOR_MODE_P (mode
)
6943 && eltmode
== GET_MODE_INNER (mode
)
6944 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6945 != CODE_FOR_nothing
)
6946 && (elt
= uniform_vector_p (exp
)))
6948 class expand_operand ops
[2];
6949 create_output_operand (&ops
[0], target
, mode
);
6950 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6951 expand_insn (icode
, 2, ops
);
6952 if (!rtx_equal_p (target
, ops
[0].value
))
6953 emit_move_insn (target
, ops
[0].value
);
6957 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6959 && VECTOR_MODE_P (mode
)
6960 && n_elts
.is_constant (&const_n_elts
))
6962 machine_mode emode
= eltmode
;
6963 bool vector_typed_elts_p
= false;
6965 if (CONSTRUCTOR_NELTS (exp
)
6966 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6969 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6970 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6971 * TYPE_VECTOR_SUBPARTS (etype
),
6973 emode
= TYPE_MODE (etype
);
6974 vector_typed_elts_p
= true;
6976 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6977 if (icode
!= CODE_FOR_nothing
)
6979 unsigned int n
= const_n_elts
;
6981 if (vector_typed_elts_p
)
6983 n
= CONSTRUCTOR_NELTS (exp
);
6984 vec_vec_init_p
= true;
6986 vector
= rtvec_alloc (n
);
6987 for (unsigned int k
= 0; k
< n
; k
++)
6988 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
6992 /* Compute the size of the elements in the CTOR. It differs
6993 from the size of the vector type elements only when the
6994 CTOR elements are vectors themselves. */
6995 tree val_type
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6996 if (VECTOR_TYPE_P (val_type
))
6997 bitsize
= tree_to_uhwi (TYPE_SIZE (val_type
));
7001 /* If the constructor has fewer elements than the vector,
7002 clear the whole array first. Similarly if this is static
7003 constructor of a non-BLKmode object. */
7006 else if (REG_P (target
) && TREE_STATIC (exp
))
7010 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
7013 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
7015 int n_elts_here
= bitsize
/ elt_size
;
7016 count
+= n_elts_here
;
7017 if (mostly_zeros_p (value
))
7018 zero_count
+= n_elts_here
;
7021 /* Clear the entire vector first if there are any missing elements,
7022 or if the incidence of zero elements is >= 75%. */
7023 need_to_clear
= (maybe_lt (count
, n_elts
)
7024 || 4 * zero_count
>= 3 * count
);
7027 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
7030 emit_move_insn (target
, CONST0_RTX (mode
));
7032 clear_storage (target
, gen_int_mode (size
, Pmode
),
7037 /* Inform later passes that the old value is dead. */
7038 if (!cleared
&& !vector
&& REG_P (target
))
7039 emit_move_insn (target
, CONST0_RTX (mode
));
7042 alias
= MEM_ALIAS_SET (target
);
7044 alias
= get_alias_set (elttype
);
7046 /* Store each element of the constructor into the corresponding
7047 element of TARGET, determined by counting the elements. */
7048 for (idx
= 0, i
= 0;
7049 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
7050 idx
++, i
+= bitsize
/ elt_size
)
7052 HOST_WIDE_INT eltpos
;
7053 tree value
= ce
->value
;
7055 if (cleared
&& initializer_zerop (value
))
7059 eltpos
= tree_to_uhwi (ce
->index
);
7067 gcc_assert (ce
->index
== NULL_TREE
);
7068 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
7072 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
7073 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
7077 machine_mode value_mode
7078 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
7079 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
7080 bitpos
= eltpos
* elt_size
;
7081 store_constructor_field (target
, bitsize
, bitpos
, 0,
7082 bitregion_end
, value_mode
,
7083 value
, cleared
, alias
, reverse
);
7088 emit_insn (GEN_FCN (icode
) (target
,
7089 gen_rtx_PARALLEL (mode
, vector
)));
7098 /* Store the value of EXP (an expression tree)
7099 into a subfield of TARGET which has mode MODE and occupies
7100 BITSIZE bits, starting BITPOS bits from the start of TARGET.
7101 If MODE is VOIDmode, it means that we are storing into a bit-field.
7103 BITREGION_START is bitpos of the first bitfield in this region.
7104 BITREGION_END is the bitpos of the ending bitfield in this region.
7105 These two fields are 0, if the C++ memory model does not apply,
7106 or we are not interested in keeping track of bitfield regions.
7108 Always return const0_rtx unless we have something particular to
7111 ALIAS_SET is the alias set for the destination. This value will
7112 (in general) be different from that for TARGET, since TARGET is a
7113 reference to the containing structure.
7115 If NONTEMPORAL is true, try generating a nontemporal store.
7117 If REVERSE is true, the store is to be done in reverse order. */
7120 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
7121 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
7122 machine_mode mode
, tree exp
,
7123 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
7125 if (TREE_CODE (exp
) == ERROR_MARK
)
7128 /* If we have nothing to store, do nothing unless the expression has
7129 side-effects. Don't do that for zero sized addressable lhs of
7131 if (known_eq (bitsize
, 0)
7132 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7133 || TREE_CODE (exp
) != CALL_EXPR
))
7134 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
7136 if (GET_CODE (target
) == CONCAT
)
7138 /* We're storing into a struct containing a single __complex. */
7140 gcc_assert (known_eq (bitpos
, 0));
7141 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
7144 /* If the structure is in a register or if the component
7145 is a bit field, we cannot use addressing to access it.
7146 Use bit-field techniques or SUBREG to store in it. */
7148 poly_int64 decl_bitsize
;
7149 if (mode
== VOIDmode
7150 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
7151 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
7152 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
7154 || GET_CODE (target
) == SUBREG
7155 /* If the field isn't aligned enough to store as an ordinary memref,
7156 store it as a bit field. */
7158 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7159 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7160 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7161 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7162 || (known_size_p (bitsize
)
7164 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7165 /* If the RHS and field are a constant size and the size of the
7166 RHS isn't the same size as the bitfield, we must use bitfield
7168 || (known_size_p (bitsize
)
7169 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7170 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7172 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7173 we will handle specially below. */
7174 && !(TREE_CODE (exp
) == CONSTRUCTOR
7175 && multiple_p (bitsize
, BITS_PER_UNIT
))
7176 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7177 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7178 includes some extra padding. store_expr / expand_expr will in
7179 that case call get_inner_reference that will have the bitsize
7180 we check here and thus the block move will not clobber the
7181 padding that shouldn't be clobbered. In the future we could
7182 replace the TREE_ADDRESSABLE check with a check that
7183 get_base_address needs to live in memory. */
7184 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7185 || TREE_CODE (exp
) != COMPONENT_REF
7186 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7187 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7188 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7190 || maybe_ne (decl_bitsize
, bitsize
)))
7191 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7192 decl we must use bitfield operations. */
7193 || (known_size_p (bitsize
)
7194 && TREE_CODE (exp
) == MEM_REF
7195 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7196 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7197 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7198 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7203 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7204 implies a mask operation. If the precision is the same size as
7205 the field we're storing into, that mask is redundant. This is
7206 particularly common with bit field assignments generated by the
7208 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7211 tree type
= TREE_TYPE (exp
);
7212 if (INTEGRAL_TYPE_P (type
)
7213 && maybe_ne (TYPE_PRECISION (type
),
7214 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7215 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7217 tree op
= gimple_assign_rhs1 (nop_def
);
7218 type
= TREE_TYPE (op
);
7219 if (INTEGRAL_TYPE_P (type
)
7220 && known_ge (TYPE_PRECISION (type
), bitsize
))
7225 temp
= expand_normal (exp
);
7227 /* We don't support variable-sized BLKmode bitfields, since our
7228 handling of BLKmode is bound up with the ability to break
7229 things into words. */
7230 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7232 /* Handle calls that return values in multiple non-contiguous locations.
7233 The Irix 6 ABI has examples of this. */
7234 if (GET_CODE (temp
) == PARALLEL
)
7236 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7237 machine_mode temp_mode
= GET_MODE (temp
);
7238 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7239 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7240 rtx temp_target
= gen_reg_rtx (temp_mode
);
7241 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7245 /* Handle calls that return BLKmode values in registers. */
7246 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7248 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7249 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7253 /* If the value has aggregate type and an integral mode then, if BITSIZE
7254 is narrower than this mode and this is for big-endian data, we first
7255 need to put the value into the low-order bits for store_bit_field,
7256 except when MODE is BLKmode and BITSIZE larger than the word size
7257 (see the handling of fields larger than a word in store_bit_field).
7258 Moreover, the field may be not aligned on a byte boundary; in this
7259 case, if it has reverse storage order, it needs to be accessed as a
7260 scalar field with reverse storage order and we must first put the
7261 value into target order. */
7262 scalar_int_mode temp_mode
;
7263 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7264 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7266 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7268 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7271 temp
= flip_storage_order (temp_mode
, temp
);
7273 gcc_checking_assert (known_le (bitsize
, size
));
7274 if (maybe_lt (bitsize
, size
)
7275 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7276 /* Use of to_constant for BLKmode was checked above. */
7277 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7278 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7279 size
- bitsize
, NULL_RTX
, 1);
7282 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7283 if (mode
!= VOIDmode
&& mode
!= BLKmode
7284 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7285 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7287 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7288 and BITPOS must be aligned on a byte boundary. If so, we simply do
7289 a block copy. Likewise for a BLKmode-like TARGET. */
7290 if (GET_MODE (temp
) == BLKmode
7291 && (GET_MODE (target
) == BLKmode
7293 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7294 && multiple_p (bitpos
, BITS_PER_UNIT
)
7295 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7297 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7298 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7299 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7301 target
= adjust_address (target
, VOIDmode
, bytepos
);
7302 emit_block_move (target
, temp
,
7303 gen_int_mode (bytesize
, Pmode
),
7309 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7310 word size, we need to load the value (see again store_bit_field). */
7311 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7313 temp_mode
= smallest_int_mode_for_size (bitsize
);
7314 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7315 temp_mode
, false, NULL
);
7318 /* Store the value in the bitfield. */
7319 gcc_checking_assert (known_ge (bitpos
, 0));
7320 store_bit_field (target
, bitsize
, bitpos
,
7321 bitregion_start
, bitregion_end
,
7322 mode
, temp
, reverse
);
7328 /* Now build a reference to just the desired component. */
7329 rtx to_rtx
= adjust_address (target
, mode
,
7330 exact_div (bitpos
, BITS_PER_UNIT
));
7332 if (to_rtx
== target
)
7333 to_rtx
= copy_rtx (to_rtx
);
7335 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7336 set_mem_alias_set (to_rtx
, alias_set
);
7338 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7339 into a target smaller than its type; handle that case now. */
7340 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7342 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7343 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7347 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7351 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7352 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7353 codes and find the ultimate containing object, which we return.
7355 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7356 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7357 storage order of the field.
7358 If the position of the field is variable, we store a tree
7359 giving the variable offset (in units) in *POFFSET.
7360 This offset is in addition to the bit position.
7361 If the position is not variable, we store 0 in *POFFSET.
7363 If any of the extraction expressions is volatile,
7364 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7366 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7367 Otherwise, it is a mode that can be used to access the field.
7369 If the field describes a variable-sized object, *PMODE is set to
7370 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7371 this case, but the address of the object can be found. */
7374 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7375 poly_int64_pod
*pbitpos
, tree
*poffset
,
7376 machine_mode
*pmode
, int *punsignedp
,
7377 int *preversep
, int *pvolatilep
)
7380 machine_mode mode
= VOIDmode
;
7381 bool blkmode_bitfield
= false;
7382 tree offset
= size_zero_node
;
7383 poly_offset_int bit_offset
= 0;
7385 /* First get the mode, signedness, storage order and size. We do this from
7386 just the outermost expression. */
7388 if (TREE_CODE (exp
) == COMPONENT_REF
)
7390 tree field
= TREE_OPERAND (exp
, 1);
7391 size_tree
= DECL_SIZE (field
);
7392 if (flag_strict_volatile_bitfields
> 0
7393 && TREE_THIS_VOLATILE (exp
)
7394 && DECL_BIT_FIELD_TYPE (field
)
7395 && DECL_MODE (field
) != BLKmode
)
7396 /* Volatile bitfields should be accessed in the mode of the
7397 field's type, not the mode computed based on the bit
7399 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7400 else if (!DECL_BIT_FIELD (field
))
7402 mode
= DECL_MODE (field
);
7403 /* For vector fields re-check the target flags, as DECL_MODE
7404 could have been set with different target flags than
7405 the current function has. */
7407 && VECTOR_TYPE_P (TREE_TYPE (field
))
7408 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7409 mode
= TYPE_MODE (TREE_TYPE (field
));
7411 else if (DECL_MODE (field
) == BLKmode
)
7412 blkmode_bitfield
= true;
7414 *punsignedp
= DECL_UNSIGNED (field
);
7416 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7418 size_tree
= TREE_OPERAND (exp
, 1);
7419 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7420 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7422 /* For vector element types with the correct size of access or for
7423 vector typed accesses use the mode of the access type. */
7424 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7425 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7426 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7427 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7428 mode
= TYPE_MODE (TREE_TYPE (exp
));
7432 mode
= TYPE_MODE (TREE_TYPE (exp
));
7433 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7435 if (mode
== BLKmode
)
7436 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7438 *pbitsize
= GET_MODE_BITSIZE (mode
);
7443 if (! tree_fits_uhwi_p (size_tree
))
7444 mode
= BLKmode
, *pbitsize
= -1;
7446 *pbitsize
= tree_to_uhwi (size_tree
);
7449 *preversep
= reverse_storage_order_for_component_p (exp
);
7451 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7452 and find the ultimate containing object. */
7455 switch (TREE_CODE (exp
))
7458 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7463 tree field
= TREE_OPERAND (exp
, 1);
7464 tree this_offset
= component_ref_field_offset (exp
);
7466 /* If this field hasn't been filled in yet, don't go past it.
7467 This should only happen when folding expressions made during
7468 type construction. */
7469 if (this_offset
== 0)
7472 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7473 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7475 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7480 case ARRAY_RANGE_REF
:
7482 tree index
= TREE_OPERAND (exp
, 1);
7483 tree low_bound
= array_ref_low_bound (exp
);
7484 tree unit_size
= array_ref_element_size (exp
);
7486 /* We assume all arrays have sizes that are a multiple of a byte.
7487 First subtract the lower bound, if any, in the type of the
7488 index, then convert to sizetype and multiply by the size of
7489 the array element. */
7490 if (! integer_zerop (low_bound
))
7491 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7494 offset
= size_binop (PLUS_EXPR
, offset
,
7495 size_binop (MULT_EXPR
,
7496 fold_convert (sizetype
, index
),
7505 bit_offset
+= *pbitsize
;
7508 case VIEW_CONVERT_EXPR
:
7512 /* Hand back the decl for MEM[&decl, off]. */
7513 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7515 tree off
= TREE_OPERAND (exp
, 1);
7516 if (!integer_zerop (off
))
7518 poly_offset_int boff
= mem_ref_offset (exp
);
7519 boff
<<= LOG2_BITS_PER_UNIT
;
7522 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7530 /* If any reference in the chain is volatile, the effect is volatile. */
7531 if (TREE_THIS_VOLATILE (exp
))
7534 exp
= TREE_OPERAND (exp
, 0);
7538 /* If OFFSET is constant, see if we can return the whole thing as a
7539 constant bit position. Make sure to handle overflow during
7541 if (poly_int_tree_p (offset
))
7543 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7544 TYPE_PRECISION (sizetype
));
7545 tem
<<= LOG2_BITS_PER_UNIT
;
7547 if (tem
.to_shwi (pbitpos
))
7548 *poffset
= offset
= NULL_TREE
;
7551 /* Otherwise, split it up. */
7554 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7555 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7557 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7558 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7559 offset
= size_binop (PLUS_EXPR
, offset
,
7560 build_int_cst (sizetype
, bytes
.force_shwi ()));
7566 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7567 if (mode
== VOIDmode
7569 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7570 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7578 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7580 static unsigned HOST_WIDE_INT
7581 target_align (const_tree target
)
7583 /* We might have a chain of nested references with intermediate misaligning
7584 bitfields components, so need to recurse to find out. */
7586 unsigned HOST_WIDE_INT this_align
, outer_align
;
7588 switch (TREE_CODE (target
))
7594 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7595 outer_align
= target_align (TREE_OPERAND (target
, 0));
7596 return MIN (this_align
, outer_align
);
7599 case ARRAY_RANGE_REF
:
7600 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7601 outer_align
= target_align (TREE_OPERAND (target
, 0));
7602 return MIN (this_align
, outer_align
);
7605 case NON_LVALUE_EXPR
:
7606 case VIEW_CONVERT_EXPR
:
7607 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7608 outer_align
= target_align (TREE_OPERAND (target
, 0));
7609 return MAX (this_align
, outer_align
);
7612 return TYPE_ALIGN (TREE_TYPE (target
));
7617 /* Given an rtx VALUE that may contain additions and multiplications, return
7618 an equivalent value that just refers to a register, memory, or constant.
7619 This is done by generating instructions to perform the arithmetic and
7620 returning a pseudo-register containing the value.
7622 The returned value may be a REG, SUBREG, MEM or constant. */
7625 force_operand (rtx value
, rtx target
)
7628 /* Use subtarget as the target for operand 0 of a binary operation. */
7629 rtx subtarget
= get_subtarget (target
);
7630 enum rtx_code code
= GET_CODE (value
);
7632 /* Check for subreg applied to an expression produced by loop optimizer. */
7634 && !REG_P (SUBREG_REG (value
))
7635 && !MEM_P (SUBREG_REG (value
)))
7638 = simplify_gen_subreg (GET_MODE (value
),
7639 force_reg (GET_MODE (SUBREG_REG (value
)),
7640 force_operand (SUBREG_REG (value
),
7642 GET_MODE (SUBREG_REG (value
)),
7643 SUBREG_BYTE (value
));
7644 code
= GET_CODE (value
);
7647 /* Check for a PIC address load. */
7648 if ((code
== PLUS
|| code
== MINUS
)
7649 && XEXP (value
, 0) == pic_offset_table_rtx
7650 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7651 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7652 || GET_CODE (XEXP (value
, 1)) == CONST
))
7655 subtarget
= gen_reg_rtx (GET_MODE (value
));
7656 emit_move_insn (subtarget
, value
);
7660 if (ARITHMETIC_P (value
))
7662 op2
= XEXP (value
, 1);
7663 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7665 if (code
== MINUS
&& CONST_INT_P (op2
))
7668 op2
= negate_rtx (GET_MODE (value
), op2
);
7671 /* Check for an addition with OP2 a constant integer and our first
7672 operand a PLUS of a virtual register and something else. In that
7673 case, we want to emit the sum of the virtual register and the
7674 constant first and then add the other value. This allows virtual
7675 register instantiation to simply modify the constant rather than
7676 creating another one around this addition. */
7677 if (code
== PLUS
&& CONST_INT_P (op2
)
7678 && GET_CODE (XEXP (value
, 0)) == PLUS
7679 && REG_P (XEXP (XEXP (value
, 0), 0))
7680 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7681 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7683 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7684 XEXP (XEXP (value
, 0), 0), op2
,
7685 subtarget
, 0, OPTAB_LIB_WIDEN
);
7686 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7687 force_operand (XEXP (XEXP (value
,
7689 target
, 0, OPTAB_LIB_WIDEN
);
7692 op1
= force_operand (XEXP (value
, 0), subtarget
);
7693 op2
= force_operand (op2
, NULL_RTX
);
7697 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7699 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7700 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7701 target
, 1, OPTAB_LIB_WIDEN
);
7703 return expand_divmod (0,
7704 FLOAT_MODE_P (GET_MODE (value
))
7705 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7706 GET_MODE (value
), op1
, op2
, target
, 0);
7708 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7711 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7714 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7717 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7718 target
, 0, OPTAB_LIB_WIDEN
);
7720 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7721 target
, 1, OPTAB_LIB_WIDEN
);
7724 if (UNARY_P (value
))
7727 target
= gen_reg_rtx (GET_MODE (value
));
7728 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7735 case FLOAT_TRUNCATE
:
7736 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7741 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7745 case UNSIGNED_FLOAT
:
7746 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7750 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7754 #ifdef INSN_SCHEDULING
7755 /* On machines that have insn scheduling, we want all memory reference to be
7756 explicit, so we need to deal with such paradoxical SUBREGs. */
7757 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7759 = simplify_gen_subreg (GET_MODE (value
),
7760 force_reg (GET_MODE (SUBREG_REG (value
)),
7761 force_operand (SUBREG_REG (value
),
7763 GET_MODE (SUBREG_REG (value
)),
7764 SUBREG_BYTE (value
));
7770 /* Subroutine of expand_expr: return nonzero iff there is no way that
7771 EXP can reference X, which is being modified. TOP_P is nonzero if this
7772 call is going to be used to determine whether we need a temporary
7773 for EXP, as opposed to a recursive call to this function.
7775 It is always safe for this routine to return zero since it merely
7776 searches for optimization opportunities. */
7779 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7785 /* If EXP has varying size, we MUST use a target since we currently
7786 have no way of allocating temporaries of variable size
7787 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7788 So we assume here that something at a higher level has prevented a
7789 clash. This is somewhat bogus, but the best we can do. Only
7790 do this when X is BLKmode and when we are at the top level. */
7791 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7792 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7793 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7794 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7795 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7797 && GET_MODE (x
) == BLKmode
)
7798 /* If X is in the outgoing argument area, it is always safe. */
7800 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7801 || (GET_CODE (XEXP (x
, 0)) == PLUS
7802 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7805 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7806 find the underlying pseudo. */
7807 if (GET_CODE (x
) == SUBREG
)
7810 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7814 /* Now look at our tree code and possibly recurse. */
7815 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7817 case tcc_declaration
:
7818 exp_rtl
= DECL_RTL_IF_SET (exp
);
7824 case tcc_exceptional
:
7825 if (TREE_CODE (exp
) == TREE_LIST
)
7829 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7831 exp
= TREE_CHAIN (exp
);
7834 if (TREE_CODE (exp
) != TREE_LIST
)
7835 return safe_from_p (x
, exp
, 0);
7838 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7840 constructor_elt
*ce
;
7841 unsigned HOST_WIDE_INT idx
;
7843 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7844 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7845 || !safe_from_p (x
, ce
->value
, 0))
7849 else if (TREE_CODE (exp
) == ERROR_MARK
)
7850 return 1; /* An already-visited SAVE_EXPR? */
7855 /* The only case we look at here is the DECL_INITIAL inside a
7857 return (TREE_CODE (exp
) != DECL_EXPR
7858 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7859 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7860 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7863 case tcc_comparison
:
7864 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7869 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7871 case tcc_expression
:
7874 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7875 the expression. If it is set, we conflict iff we are that rtx or
7876 both are in memory. Otherwise, we check all operands of the
7877 expression recursively. */
7879 switch (TREE_CODE (exp
))
7882 /* If the operand is static or we are static, we can't conflict.
7883 Likewise if we don't conflict with the operand at all. */
7884 if (staticp (TREE_OPERAND (exp
, 0))
7885 || TREE_STATIC (exp
)
7886 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7889 /* Otherwise, the only way this can conflict is if we are taking
7890 the address of a DECL a that address if part of X, which is
7892 exp
= TREE_OPERAND (exp
, 0);
7895 if (!DECL_RTL_SET_P (exp
)
7896 || !MEM_P (DECL_RTL (exp
)))
7899 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7905 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7906 get_alias_set (exp
)))
7911 /* Assume that the call will clobber all hard registers and
7913 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7918 case WITH_CLEANUP_EXPR
:
7919 case CLEANUP_POINT_EXPR
:
7920 /* Lowered by gimplify.c. */
7924 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7930 /* If we have an rtx, we do not need to scan our operands. */
7934 nops
= TREE_OPERAND_LENGTH (exp
);
7935 for (i
= 0; i
< nops
; i
++)
7936 if (TREE_OPERAND (exp
, i
) != 0
7937 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7943 /* Should never get a type here. */
7947 /* If we have an rtl, find any enclosed object. Then see if we conflict
7951 if (GET_CODE (exp_rtl
) == SUBREG
)
7953 exp_rtl
= SUBREG_REG (exp_rtl
);
7955 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7959 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7960 are memory and they conflict. */
7961 return ! (rtx_equal_p (x
, exp_rtl
)
7962 || (MEM_P (x
) && MEM_P (exp_rtl
)
7963 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7966 /* If we reach here, it is safe. */
7971 /* Return the highest power of two that EXP is known to be a multiple of.
7972 This is used in updating alignment of MEMs in array references. */
7974 unsigned HOST_WIDE_INT
7975 highest_pow2_factor (const_tree exp
)
7977 unsigned HOST_WIDE_INT ret
;
7978 int trailing_zeros
= tree_ctz (exp
);
7979 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7980 return BIGGEST_ALIGNMENT
;
7981 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7982 if (ret
> BIGGEST_ALIGNMENT
)
7983 return BIGGEST_ALIGNMENT
;
7987 /* Similar, except that the alignment requirements of TARGET are
7988 taken into account. Assume it is at least as aligned as its
7989 type, unless it is a COMPONENT_REF in which case the layout of
7990 the structure gives the alignment. */
7992 static unsigned HOST_WIDE_INT
7993 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7995 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7996 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7998 return MAX (factor
, talign
);
8001 /* Convert the tree comparison code TCODE to the rtl one where the
8002 signedness is UNSIGNEDP. */
8004 static enum rtx_code
8005 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
8017 code
= unsignedp
? LTU
: LT
;
8020 code
= unsignedp
? LEU
: LE
;
8023 code
= unsignedp
? GTU
: GT
;
8026 code
= unsignedp
? GEU
: GE
;
8028 case UNORDERED_EXPR
:
8059 /* Subroutine of expand_expr. Expand the two operands of a binary
8060 expression EXP0 and EXP1 placing the results in OP0 and OP1.
8061 The value may be stored in TARGET if TARGET is nonzero. The
8062 MODIFIER argument is as documented by expand_expr. */
8065 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
8066 enum expand_modifier modifier
)
8068 if (! safe_from_p (target
, exp1
, 1))
8070 if (operand_equal_p (exp0
, exp1
, 0))
8072 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8073 *op1
= copy_rtx (*op0
);
8077 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8078 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
8083 /* Return a MEM that contains constant EXP. DEFER is as for
8084 output_constant_def and MODIFIER is as for expand_expr. */
8087 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
8091 mem
= output_constant_def (exp
, defer
);
8092 if (modifier
!= EXPAND_INITIALIZER
)
8093 mem
= use_anchored_address (mem
);
8097 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
8098 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8101 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
8102 enum expand_modifier modifier
, addr_space_t as
)
8104 rtx result
, subtarget
;
8106 poly_int64 bitsize
, bitpos
;
8107 int unsignedp
, reversep
, volatilep
= 0;
8110 /* If we are taking the address of a constant and are at the top level,
8111 we have to use output_constant_def since we can't call force_const_mem
8113 /* ??? This should be considered a front-end bug. We should not be
8114 generating ADDR_EXPR of something that isn't an LVALUE. The only
8115 exception here is STRING_CST. */
8116 if (CONSTANT_CLASS_P (exp
))
8118 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
8119 if (modifier
< EXPAND_SUM
)
8120 result
= force_operand (result
, target
);
8124 /* Everything must be something allowed by is_gimple_addressable. */
8125 switch (TREE_CODE (exp
))
8128 /* This case will happen via recursion for &a->b. */
8129 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
8133 tree tem
= TREE_OPERAND (exp
, 0);
8134 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
8135 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
8136 return expand_expr (tem
, target
, tmode
, modifier
);
8139 case TARGET_MEM_REF
:
8140 return addr_for_mem_ref (exp
, as
, true);
8143 /* Expand the initializer like constants above. */
8144 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
8146 if (modifier
< EXPAND_SUM
)
8147 result
= force_operand (result
, target
);
8151 /* The real part of the complex number is always first, therefore
8152 the address is the same as the address of the parent object. */
8155 inner
= TREE_OPERAND (exp
, 0);
8159 /* The imaginary part of the complex number is always second.
8160 The expression is therefore always offset by the size of the
8163 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8164 inner
= TREE_OPERAND (exp
, 0);
8167 case COMPOUND_LITERAL_EXPR
:
8168 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8169 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8170 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8171 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8172 the initializers aren't gimplified. */
8173 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8174 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8175 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8176 target
, tmode
, modifier
, as
);
8179 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8180 expand_expr, as that can have various side effects; LABEL_DECLs for
8181 example, may not have their DECL_RTL set yet. Expand the rtl of
8182 CONSTRUCTORs too, which should yield a memory reference for the
8183 constructor's contents. Assume language specific tree nodes can
8184 be expanded in some interesting way. */
8185 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8187 || TREE_CODE (exp
) == CONSTRUCTOR
8188 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8190 result
= expand_expr (exp
, target
, tmode
,
8191 modifier
== EXPAND_INITIALIZER
8192 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8194 /* If the DECL isn't in memory, then the DECL wasn't properly
8195 marked TREE_ADDRESSABLE, which will be either a front-end
8196 or a tree optimizer bug. */
8198 gcc_assert (MEM_P (result
));
8199 result
= XEXP (result
, 0);
8201 /* ??? Is this needed anymore? */
8203 TREE_USED (exp
) = 1;
8205 if (modifier
!= EXPAND_INITIALIZER
8206 && modifier
!= EXPAND_CONST_ADDRESS
8207 && modifier
!= EXPAND_SUM
)
8208 result
= force_operand (result
, target
);
8212 /* Pass FALSE as the last argument to get_inner_reference although
8213 we are expanding to RTL. The rationale is that we know how to
8214 handle "aligning nodes" here: we can just bypass them because
8215 they won't change the final object whose address will be returned
8216 (they actually exist only for that purpose). */
8217 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8218 &unsignedp
, &reversep
, &volatilep
);
8222 /* We must have made progress. */
8223 gcc_assert (inner
!= exp
);
8225 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8226 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8227 inner alignment, force the inner to be sufficiently aligned. */
8228 if (CONSTANT_CLASS_P (inner
)
8229 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8231 inner
= copy_node (inner
);
8232 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8233 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8234 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8236 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8242 if (modifier
!= EXPAND_NORMAL
)
8243 result
= force_operand (result
, NULL
);
8244 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8245 modifier
== EXPAND_INITIALIZER
8246 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8248 /* expand_expr is allowed to return an object in a mode other
8249 than TMODE. If it did, we need to convert. */
8250 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8251 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8252 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8253 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8254 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8256 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8257 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8260 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8261 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8262 1, OPTAB_LIB_WIDEN
);
8266 if (maybe_ne (bitpos
, 0))
8268 /* Someone beforehand should have rejected taking the address
8269 of an object that isn't byte-aligned. */
8270 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8271 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8272 result
= plus_constant (tmode
, result
, bytepos
);
8273 if (modifier
< EXPAND_SUM
)
8274 result
= force_operand (result
, target
);
8280 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8281 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8284 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8285 enum expand_modifier modifier
)
8287 addr_space_t as
= ADDR_SPACE_GENERIC
;
8288 scalar_int_mode address_mode
= Pmode
;
8289 scalar_int_mode pointer_mode
= ptr_mode
;
8293 /* Target mode of VOIDmode says "whatever's natural". */
8294 if (tmode
== VOIDmode
)
8295 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8297 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8299 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8300 address_mode
= targetm
.addr_space
.address_mode (as
);
8301 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8304 /* We can get called with some Weird Things if the user does silliness
8305 like "(short) &a". In that case, convert_memory_address won't do
8306 the right thing, so ignore the given target mode. */
8307 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8311 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8312 new_tmode
, modifier
, as
);
8314 /* Despite expand_expr claims concerning ignoring TMODE when not
8315 strictly convenient, stuff breaks if we don't honor it. Note
8316 that combined with the above, we only do this for pointer modes. */
8317 rmode
= GET_MODE (result
);
8318 if (rmode
== VOIDmode
)
8320 if (rmode
!= new_tmode
)
8321 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8326 /* Generate code for computing CONSTRUCTOR EXP.
8327 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8328 is TRUE, instead of creating a temporary variable in memory
8329 NULL is returned and the caller needs to handle it differently. */
8332 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8333 bool avoid_temp_mem
)
8335 tree type
= TREE_TYPE (exp
);
8336 machine_mode mode
= TYPE_MODE (type
);
8338 /* Try to avoid creating a temporary at all. This is possible
8339 if all of the initializer is zero.
8340 FIXME: try to handle all [0..255] initializers we can handle
8342 if (TREE_STATIC (exp
)
8343 && !TREE_ADDRESSABLE (exp
)
8344 && target
!= 0 && mode
== BLKmode
8345 && all_zeros_p (exp
))
8347 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8351 /* All elts simple constants => refer to a constant in memory. But
8352 if this is a non-BLKmode mode, let it store a field at a time
8353 since that should make a CONST_INT, CONST_WIDE_INT or
8354 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8355 use, it is best to store directly into the target unless the type
8356 is large enough that memcpy will be used. If we are making an
8357 initializer and all operands are constant, put it in memory as
8360 FIXME: Avoid trying to fill vector constructors piece-meal.
8361 Output them with output_constant_def below unless we're sure
8362 they're zeros. This should go away when vector initializers
8363 are treated like VECTOR_CST instead of arrays. */
8364 if ((TREE_STATIC (exp
)
8365 && ((mode
== BLKmode
8366 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8367 || TREE_ADDRESSABLE (exp
)
8368 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8369 && (! can_move_by_pieces
8370 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8372 && ! mostly_zeros_p (exp
))))
8373 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8374 && TREE_CONSTANT (exp
)))
8381 constructor
= expand_expr_constant (exp
, 1, modifier
);
8383 if (modifier
!= EXPAND_CONST_ADDRESS
8384 && modifier
!= EXPAND_INITIALIZER
8385 && modifier
!= EXPAND_SUM
)
8386 constructor
= validize_mem (constructor
);
8391 /* Handle calls that pass values in multiple non-contiguous
8392 locations. The Irix 6 ABI has examples of this. */
8393 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8394 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
8395 /* Also make a temporary if the store is to volatile memory, to
8396 avoid individual accesses to aggregate members. */
8397 || (GET_CODE (target
) == MEM
8398 && MEM_VOLATILE_P (target
)
8399 && !TREE_ADDRESSABLE (TREE_TYPE (exp
))))
8404 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8407 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8412 /* expand_expr: generate code for computing expression EXP.
8413 An rtx for the computed value is returned. The value is never null.
8414 In the case of a void EXP, const0_rtx is returned.
8416 The value may be stored in TARGET if TARGET is nonzero.
8417 TARGET is just a suggestion; callers must assume that
8418 the rtx returned may not be the same as TARGET.
8420 If TARGET is CONST0_RTX, it means that the value will be ignored.
8422 If TMODE is not VOIDmode, it suggests generating the
8423 result in mode TMODE. But this is done only when convenient.
8424 Otherwise, TMODE is ignored and the value generated in its natural mode.
8425 TMODE is just a suggestion; callers must assume that
8426 the rtx returned may not have mode TMODE.
8428 Note that TARGET may have neither TMODE nor MODE. In that case, it
8429 probably will not be used.
8431 If MODIFIER is EXPAND_SUM then when EXP is an addition
8432 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8433 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8434 products as above, or REG or MEM, or constant.
8435 Ordinarily in such cases we would output mul or add instructions
8436 and then return a pseudo reg containing the sum.
8438 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8439 it also marks a label as absolutely required (it can't be dead).
8440 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8441 This is used for outputting expressions used in initializers.
8443 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8444 with a constant address even if that address is not normally legitimate.
8445 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8447 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8448 a call parameter. Such targets require special care as we haven't yet
8449 marked TARGET so that it's safe from being trashed by libcalls. We
8450 don't want to use TARGET for anything but the final result;
8451 Intermediate values must go elsewhere. Additionally, calls to
8452 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8454 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8455 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8456 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8457 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8459 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8460 then *ALT_RTL is set to TARGET (before legitimziation).
8462 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8463 In this case, we don't adjust a returned MEM rtx that wouldn't be
8464 sufficiently aligned for its mode; instead, it's up to the caller
8465 to deal with it afterwards. This is used to make sure that unaligned
8466 base objects for which out-of-bounds accesses are supported, for
8467 example record types with trailing arrays, aren't realigned behind
8468 the back of the caller.
8469 The normal operating mode is to pass FALSE for this parameter. */
8472 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8473 enum expand_modifier modifier
, rtx
*alt_rtl
,
8474 bool inner_reference_p
)
8478 /* Handle ERROR_MARK before anybody tries to access its type. */
8479 if (TREE_CODE (exp
) == ERROR_MARK
8480 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8482 ret
= CONST0_RTX (tmode
);
8483 return ret
? ret
: const0_rtx
;
8486 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8491 /* Try to expand the conditional expression which is represented by
8492 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8493 return the rtl reg which represents the result. Otherwise return
8497 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8498 tree treeop1 ATTRIBUTE_UNUSED
,
8499 tree treeop2 ATTRIBUTE_UNUSED
)
8502 rtx op00
, op01
, op1
, op2
;
8503 enum rtx_code comparison_code
;
8504 machine_mode comparison_mode
;
8507 tree type
= TREE_TYPE (treeop1
);
8508 int unsignedp
= TYPE_UNSIGNED (type
);
8509 machine_mode mode
= TYPE_MODE (type
);
8510 machine_mode orig_mode
= mode
;
8511 static bool expanding_cond_expr_using_cmove
= false;
8513 /* Conditional move expansion can end up TERing two operands which,
8514 when recursively hitting conditional expressions can result in
8515 exponential behavior if the cmove expansion ultimatively fails.
8516 It's hardly profitable to TER a cmove into a cmove so avoid doing
8517 that by failing early if we end up recursing. */
8518 if (expanding_cond_expr_using_cmove
)
8521 /* If we cannot do a conditional move on the mode, try doing it
8522 with the promoted mode. */
8523 if (!can_conditionally_move_p (mode
))
8525 mode
= promote_mode (type
, mode
, &unsignedp
);
8526 if (!can_conditionally_move_p (mode
))
8528 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8531 temp
= assign_temp (type
, 0, 1);
8533 expanding_cond_expr_using_cmove
= true;
8535 expand_operands (treeop1
, treeop2
,
8536 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8538 if (TREE_CODE (treeop0
) == SSA_NAME
8539 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8541 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8542 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8543 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8544 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8545 comparison_mode
= TYPE_MODE (type
);
8546 unsignedp
= TYPE_UNSIGNED (type
);
8547 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8549 else if (COMPARISON_CLASS_P (treeop0
))
8551 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8552 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8553 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8554 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8555 unsignedp
= TYPE_UNSIGNED (type
);
8556 comparison_mode
= TYPE_MODE (type
);
8557 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8561 op00
= expand_normal (treeop0
);
8563 comparison_code
= NE
;
8564 comparison_mode
= GET_MODE (op00
);
8565 if (comparison_mode
== VOIDmode
)
8566 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8568 expanding_cond_expr_using_cmove
= false;
8570 if (GET_MODE (op1
) != mode
)
8571 op1
= gen_lowpart (mode
, op1
);
8573 if (GET_MODE (op2
) != mode
)
8574 op2
= gen_lowpart (mode
, op2
);
8576 /* Try to emit the conditional move. */
8577 insn
= emit_conditional_move (temp
, comparison_code
,
8578 op00
, op01
, comparison_mode
,
8582 /* If we could do the conditional move, emit the sequence,
8586 rtx_insn
*seq
= get_insns ();
8589 return convert_modes (orig_mode
, mode
, temp
, 0);
8592 /* Otherwise discard the sequence and fall back to code with
8598 /* A helper function for expand_expr_real_2 to be used with a
8599 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8600 is nonzero, with alignment ALIGN in bits.
8601 Store the value at TARGET if possible (if TARGET is nonzero).
8602 Regardless of TARGET, we return the rtx for where the value is placed.
8603 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8604 then *ALT_RTL is set to TARGET (before legitimziation). */
8607 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
8608 unsigned int align
, rtx target
, rtx
*alt_rtl
)
8610 enum insn_code icode
;
8612 if ((icode
= optab_handler (movmisalign_optab
, mode
))
8613 != CODE_FOR_nothing
)
8615 class expand_operand ops
[2];
8617 /* We've already validated the memory, and we're creating a
8618 new pseudo destination. The predicates really can't fail,
8619 nor can the generator. */
8620 create_output_operand (&ops
[0], NULL_RTX
, mode
);
8621 create_fixed_operand (&ops
[1], temp
);
8622 expand_insn (icode
, 2, ops
);
8623 temp
= ops
[0].value
;
8625 else if (targetm
.slow_unaligned_access (mode
, align
))
8626 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
8627 0, unsignedp
, target
,
8628 mode
, mode
, false, alt_rtl
);
8633 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8634 enum expand_modifier modifier
)
8636 rtx op0
, op1
, op2
, temp
;
8637 rtx_code_label
*lab
;
8641 scalar_int_mode int_mode
;
8642 enum tree_code code
= ops
->code
;
8644 rtx subtarget
, original_target
;
8646 bool reduce_bit_field
;
8647 location_t loc
= ops
->location
;
8648 tree treeop0
, treeop1
, treeop2
;
8649 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8650 ? reduce_to_bit_field_precision ((expr), \
8656 mode
= TYPE_MODE (type
);
8657 unsignedp
= TYPE_UNSIGNED (type
);
8663 /* We should be called only on simple (binary or unary) expressions,
8664 exactly those that are valid in gimple expressions that aren't
8665 GIMPLE_SINGLE_RHS (or invalid). */
8666 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8667 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8668 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8670 ignore
= (target
== const0_rtx
8671 || ((CONVERT_EXPR_CODE_P (code
)
8672 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8673 && TREE_CODE (type
) == VOID_TYPE
));
8675 /* We should be called only if we need the result. */
8676 gcc_assert (!ignore
);
8678 /* An operation in what may be a bit-field type needs the
8679 result to be reduced to the precision of the bit-field type,
8680 which is narrower than that of the type's mode. */
8681 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8682 && !type_has_mode_precision_p (type
));
8684 if (reduce_bit_field
8685 && (modifier
== EXPAND_STACK_PARM
8686 || (target
&& GET_MODE (target
) != mode
)))
8689 /* Use subtarget as the target for operand 0 of a binary operation. */
8690 subtarget
= get_subtarget (target
);
8691 original_target
= target
;
8695 case NON_LVALUE_EXPR
:
8698 if (treeop0
== error_mark_node
)
8701 if (TREE_CODE (type
) == UNION_TYPE
)
8703 tree valtype
= TREE_TYPE (treeop0
);
8705 /* If both input and output are BLKmode, this conversion isn't doing
8706 anything except possibly changing memory attribute. */
8707 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8709 rtx result
= expand_expr (treeop0
, target
, tmode
,
8712 result
= copy_rtx (result
);
8713 set_mem_attributes (result
, type
, 0);
8719 if (TYPE_MODE (type
) != BLKmode
)
8720 target
= gen_reg_rtx (TYPE_MODE (type
));
8722 target
= assign_temp (type
, 1, 1);
8726 /* Store data into beginning of memory target. */
8727 store_expr (treeop0
,
8728 adjust_address (target
, TYPE_MODE (valtype
), 0),
8729 modifier
== EXPAND_STACK_PARM
,
8730 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8734 gcc_assert (REG_P (target
)
8735 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8737 /* Store this field into a union of the proper type. */
8738 poly_uint64 op0_size
8739 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8740 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8741 store_field (target
,
8742 /* The conversion must be constructed so that
8743 we know at compile time how many bits
8745 ordered_min (op0_size
, union_size
),
8746 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8750 /* Return the entire union. */
8754 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8756 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8759 /* If the signedness of the conversion differs and OP0 is
8760 a promoted SUBREG, clear that indication since we now
8761 have to do the proper extension. */
8762 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8763 && GET_CODE (op0
) == SUBREG
)
8764 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8766 return REDUCE_BIT_FIELD (op0
);
8769 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8770 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8771 if (GET_MODE (op0
) == mode
)
8774 /* If OP0 is a constant, just convert it into the proper mode. */
8775 else if (CONSTANT_P (op0
))
8777 tree inner_type
= TREE_TYPE (treeop0
);
8778 machine_mode inner_mode
= GET_MODE (op0
);
8780 if (inner_mode
== VOIDmode
)
8781 inner_mode
= TYPE_MODE (inner_type
);
8783 if (modifier
== EXPAND_INITIALIZER
)
8784 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8786 op0
= convert_modes (mode
, inner_mode
, op0
,
8787 TYPE_UNSIGNED (inner_type
));
8790 else if (modifier
== EXPAND_INITIALIZER
)
8791 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8792 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8794 else if (target
== 0)
8795 op0
= convert_to_mode (mode
, op0
,
8796 TYPE_UNSIGNED (TREE_TYPE
8800 convert_move (target
, op0
,
8801 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8805 return REDUCE_BIT_FIELD (op0
);
8807 case ADDR_SPACE_CONVERT_EXPR
:
8809 tree treeop0_type
= TREE_TYPE (treeop0
);
8811 gcc_assert (POINTER_TYPE_P (type
));
8812 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8814 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8815 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8817 /* Conversions between pointers to the same address space should
8818 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8819 gcc_assert (as_to
!= as_from
);
8821 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8823 /* Ask target code to handle conversion between pointers
8824 to overlapping address spaces. */
8825 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8826 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8828 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8832 /* For disjoint address spaces, converting anything but a null
8833 pointer invokes undefined behavior. We truncate or extend the
8834 value as if we'd converted via integers, which handles 0 as
8835 required, and all others as the programmer likely expects. */
8836 #ifndef POINTERS_EXTEND_UNSIGNED
8837 const int POINTERS_EXTEND_UNSIGNED
= 1;
8839 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8840 op0
, POINTERS_EXTEND_UNSIGNED
);
8846 case POINTER_PLUS_EXPR
:
8847 /* Even though the sizetype mode and the pointer's mode can be different
8848 expand is able to handle this correctly and get the correct result out
8849 of the PLUS_EXPR code. */
8850 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8851 if sizetype precision is smaller than pointer precision. */
8852 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8853 treeop1
= fold_convert_loc (loc
, type
,
8854 fold_convert_loc (loc
, ssizetype
,
8856 /* If sizetype precision is larger than pointer precision, truncate the
8857 offset to have matching modes. */
8858 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8859 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8863 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8864 something else, make sure we add the register to the constant and
8865 then to the other thing. This case can occur during strength
8866 reduction and doing it this way will produce better code if the
8867 frame pointer or argument pointer is eliminated.
8869 fold-const.c will ensure that the constant is always in the inner
8870 PLUS_EXPR, so the only case we need to do anything about is if
8871 sp, ap, or fp is our second argument, in which case we must swap
8872 the innermost first argument and our second argument. */
8874 if (TREE_CODE (treeop0
) == PLUS_EXPR
8875 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8877 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8878 || DECL_RTL (treeop1
) == stack_pointer_rtx
8879 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8884 /* If the result is to be ptr_mode and we are adding an integer to
8885 something, we might be forming a constant. So try to use
8886 plus_constant. If it produces a sum and we can't accept it,
8887 use force_operand. This allows P = &ARR[const] to generate
8888 efficient code on machines where a SYMBOL_REF is not a valid
8891 If this is an EXPAND_SUM call, always return the sum. */
8892 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8893 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8895 if (modifier
== EXPAND_STACK_PARM
)
8897 if (TREE_CODE (treeop0
) == INTEGER_CST
8898 && HWI_COMPUTABLE_MODE_P (mode
)
8899 && TREE_CONSTANT (treeop1
))
8903 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8905 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8907 /* Use wi::shwi to ensure that the constant is
8908 truncated according to the mode of OP1, then sign extended
8909 to a HOST_WIDE_INT. Using the constant directly can result
8910 in non-canonical RTL in a 64x32 cross compile. */
8911 wc
= TREE_INT_CST_LOW (treeop0
);
8913 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8914 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8915 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8916 op1
= force_operand (op1
, target
);
8917 return REDUCE_BIT_FIELD (op1
);
8920 else if (TREE_CODE (treeop1
) == INTEGER_CST
8921 && HWI_COMPUTABLE_MODE_P (mode
)
8922 && TREE_CONSTANT (treeop0
))
8926 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8928 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8929 (modifier
== EXPAND_INITIALIZER
8930 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8931 if (! CONSTANT_P (op0
))
8933 op1
= expand_expr (treeop1
, NULL_RTX
,
8934 VOIDmode
, modifier
);
8935 /* Return a PLUS if modifier says it's OK. */
8936 if (modifier
== EXPAND_SUM
8937 || modifier
== EXPAND_INITIALIZER
)
8938 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8941 /* Use wi::shwi to ensure that the constant is
8942 truncated according to the mode of OP1, then sign extended
8943 to a HOST_WIDE_INT. Using the constant directly can result
8944 in non-canonical RTL in a 64x32 cross compile. */
8945 wc
= TREE_INT_CST_LOW (treeop1
);
8947 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8948 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8949 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8950 op0
= force_operand (op0
, target
);
8951 return REDUCE_BIT_FIELD (op0
);
8955 /* Use TER to expand pointer addition of a negated value
8956 as pointer subtraction. */
8957 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8958 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8959 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8960 && TREE_CODE (treeop1
) == SSA_NAME
8961 && TYPE_MODE (TREE_TYPE (treeop0
))
8962 == TYPE_MODE (TREE_TYPE (treeop1
)))
8964 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8967 treeop1
= gimple_assign_rhs1 (def
);
8973 /* No sense saving up arithmetic to be done
8974 if it's all in the wrong mode to form part of an address.
8975 And force_operand won't know whether to sign-extend or
8977 if (modifier
!= EXPAND_INITIALIZER
8978 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8980 expand_operands (treeop0
, treeop1
,
8981 subtarget
, &op0
, &op1
, modifier
);
8982 if (op0
== const0_rtx
)
8984 if (op1
== const0_rtx
)
8989 expand_operands (treeop0
, treeop1
,
8990 subtarget
, &op0
, &op1
, modifier
);
8991 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8994 case POINTER_DIFF_EXPR
:
8996 /* For initializers, we are allowed to return a MINUS of two
8997 symbolic constants. Here we handle all cases when both operands
8999 /* Handle difference of two symbolic constants,
9000 for the sake of an initializer. */
9001 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
9002 && really_constant_p (treeop0
)
9003 && really_constant_p (treeop1
))
9005 expand_operands (treeop0
, treeop1
,
9006 NULL_RTX
, &op0
, &op1
, modifier
);
9007 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
9010 /* No sense saving up arithmetic to be done
9011 if it's all in the wrong mode to form part of an address.
9012 And force_operand won't know whether to sign-extend or
9014 if (modifier
!= EXPAND_INITIALIZER
9015 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9018 expand_operands (treeop0
, treeop1
,
9019 subtarget
, &op0
, &op1
, modifier
);
9021 /* Convert A - const to A + (-const). */
9022 if (CONST_INT_P (op1
))
9024 op1
= negate_rtx (mode
, op1
);
9025 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9030 case WIDEN_MULT_PLUS_EXPR
:
9031 case WIDEN_MULT_MINUS_EXPR
:
9032 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9033 op2
= expand_normal (treeop2
);
9034 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9038 case WIDEN_MULT_EXPR
:
9039 /* If first operand is constant, swap them.
9040 Thus the following special case checks need only
9041 check the second operand. */
9042 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9043 std::swap (treeop0
, treeop1
);
9045 /* First, check if we have a multiplication of one signed and one
9046 unsigned operand. */
9047 if (TREE_CODE (treeop1
) != INTEGER_CST
9048 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9049 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
9051 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
9052 this_optab
= usmul_widen_optab
;
9053 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9054 != CODE_FOR_nothing
)
9056 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9057 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9060 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
9062 /* op0 and op1 might still be constant, despite the above
9063 != INTEGER_CST check. Handle it. */
9064 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9066 op0
= convert_modes (mode
, innermode
, op0
, true);
9067 op1
= convert_modes (mode
, innermode
, op1
, false);
9068 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9069 target
, unsignedp
));
9074 /* Check for a multiplication with matching signedness. */
9075 else if ((TREE_CODE (treeop1
) == INTEGER_CST
9076 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
9077 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
9078 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
9080 tree op0type
= TREE_TYPE (treeop0
);
9081 machine_mode innermode
= TYPE_MODE (op0type
);
9082 bool zextend_p
= TYPE_UNSIGNED (op0type
);
9083 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
9084 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
9086 if (TREE_CODE (treeop0
) != INTEGER_CST
)
9088 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9089 != CODE_FOR_nothing
)
9091 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9093 /* op0 and op1 might still be constant, despite the above
9094 != INTEGER_CST check. Handle it. */
9095 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9098 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
9100 = convert_modes (mode
, innermode
, op1
,
9101 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
9102 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9106 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
9107 unsignedp
, this_optab
);
9108 return REDUCE_BIT_FIELD (temp
);
9110 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
9112 && innermode
== word_mode
)
9115 op0
= expand_normal (treeop0
);
9116 op1
= expand_normal (treeop1
);
9117 /* op0 and op1 might be constants, despite the above
9118 != INTEGER_CST check. Handle it. */
9119 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9120 goto widen_mult_const
;
9121 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
9122 unsignedp
, OPTAB_LIB_WIDEN
);
9123 hipart
= gen_highpart (word_mode
, temp
);
9124 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
9128 emit_move_insn (hipart
, htem
);
9129 return REDUCE_BIT_FIELD (temp
);
9133 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
9134 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
9135 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9136 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9139 /* If this is a fixed-point operation, then we cannot use the code
9140 below because "expand_mult" doesn't support sat/no-sat fixed-point
9142 if (ALL_FIXED_POINT_MODE_P (mode
))
9145 /* If first operand is constant, swap them.
9146 Thus the following special case checks need only
9147 check the second operand. */
9148 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9149 std::swap (treeop0
, treeop1
);
9151 /* Attempt to return something suitable for generating an
9152 indexed address, for machines that support that. */
9154 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
9155 && tree_fits_shwi_p (treeop1
))
9157 tree exp1
= treeop1
;
9159 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9163 op0
= force_operand (op0
, NULL_RTX
);
9165 op0
= copy_to_mode_reg (mode
, op0
);
9167 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
9168 gen_int_mode (tree_to_shwi (exp1
),
9169 TYPE_MODE (TREE_TYPE (exp1
)))));
9172 if (modifier
== EXPAND_STACK_PARM
)
9175 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9176 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9178 case TRUNC_MOD_EXPR
:
9179 case FLOOR_MOD_EXPR
:
9181 case ROUND_MOD_EXPR
:
9183 case TRUNC_DIV_EXPR
:
9184 case FLOOR_DIV_EXPR
:
9186 case ROUND_DIV_EXPR
:
9187 case EXACT_DIV_EXPR
:
9189 /* If this is a fixed-point operation, then we cannot use the code
9190 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9192 if (ALL_FIXED_POINT_MODE_P (mode
))
9195 if (modifier
== EXPAND_STACK_PARM
)
9197 /* Possible optimization: compute the dividend with EXPAND_SUM
9198 then if the divisor is constant can optimize the case
9199 where some terms of the dividend have coeffs divisible by it. */
9200 expand_operands (treeop0
, treeop1
,
9201 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9202 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9203 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
9204 if (SCALAR_INT_MODE_P (mode
)
9206 && get_range_pos_neg (treeop0
) == 1
9207 && get_range_pos_neg (treeop1
) == 1)
9209 /* If both arguments are known to be positive when interpreted
9210 as signed, we can expand it as both signed and unsigned
9211 division or modulo. Choose the cheaper sequence in that case. */
9212 bool speed_p
= optimize_insn_for_speed_p ();
9213 do_pending_stack_adjust ();
9215 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9216 rtx_insn
*uns_insns
= get_insns ();
9219 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9220 rtx_insn
*sgn_insns
= get_insns ();
9222 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9223 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9225 /* If costs are the same then use as tie breaker the other
9227 if (uns_cost
== sgn_cost
)
9229 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9230 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9233 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9235 emit_insn (uns_insns
);
9238 emit_insn (sgn_insns
);
9241 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9246 case MULT_HIGHPART_EXPR
:
9247 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9248 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9252 case FIXED_CONVERT_EXPR
:
9253 op0
= expand_normal (treeop0
);
9254 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9255 target
= gen_reg_rtx (mode
);
9257 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9258 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9259 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9260 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9262 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9265 case FIX_TRUNC_EXPR
:
9266 op0
= expand_normal (treeop0
);
9267 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9268 target
= gen_reg_rtx (mode
);
9269 expand_fix (target
, op0
, unsignedp
);
9273 op0
= expand_normal (treeop0
);
9274 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9275 target
= gen_reg_rtx (mode
);
9276 /* expand_float can't figure out what to do if FROM has VOIDmode.
9277 So give it the correct mode. With -O, cse will optimize this. */
9278 if (GET_MODE (op0
) == VOIDmode
)
9279 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9281 expand_float (target
, op0
,
9282 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9286 op0
= expand_expr (treeop0
, subtarget
,
9287 VOIDmode
, EXPAND_NORMAL
);
9288 if (modifier
== EXPAND_STACK_PARM
)
9290 temp
= expand_unop (mode
,
9291 optab_for_tree_code (NEGATE_EXPR
, type
,
9295 return REDUCE_BIT_FIELD (temp
);
9299 op0
= expand_expr (treeop0
, subtarget
,
9300 VOIDmode
, EXPAND_NORMAL
);
9301 if (modifier
== EXPAND_STACK_PARM
)
9304 /* ABS_EXPR is not valid for complex arguments. */
9305 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9306 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9308 /* Unsigned abs is simply the operand. Testing here means we don't
9309 risk generating incorrect code below. */
9310 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9313 return expand_abs (mode
, op0
, target
, unsignedp
,
9314 safe_from_p (target
, treeop0
, 1));
9318 target
= original_target
;
9320 || modifier
== EXPAND_STACK_PARM
9321 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9322 || GET_MODE (target
) != mode
9324 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9325 target
= gen_reg_rtx (mode
);
9326 expand_operands (treeop0
, treeop1
,
9327 target
, &op0
, &op1
, EXPAND_NORMAL
);
9329 /* First try to do it with a special MIN or MAX instruction.
9330 If that does not win, use a conditional jump to select the proper
9332 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9333 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9338 if (VECTOR_TYPE_P (type
))
9341 /* At this point, a MEM target is no longer useful; we will get better
9344 if (! REG_P (target
))
9345 target
= gen_reg_rtx (mode
);
9347 /* If op1 was placed in target, swap op0 and op1. */
9348 if (target
!= op0
&& target
== op1
)
9349 std::swap (op0
, op1
);
9351 /* We generate better code and avoid problems with op1 mentioning
9352 target by forcing op1 into a pseudo if it isn't a constant. */
9353 if (! CONSTANT_P (op1
))
9354 op1
= force_reg (mode
, op1
);
9357 enum rtx_code comparison_code
;
9360 if (code
== MAX_EXPR
)
9361 comparison_code
= unsignedp
? GEU
: GE
;
9363 comparison_code
= unsignedp
? LEU
: LE
;
9365 /* Canonicalize to comparisons against 0. */
9366 if (op1
== const1_rtx
)
9368 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9369 or (a != 0 ? a : 1) for unsigned.
9370 For MIN we are safe converting (a <= 1 ? a : 1)
9371 into (a <= 0 ? a : 1) */
9372 cmpop1
= const0_rtx
;
9373 if (code
== MAX_EXPR
)
9374 comparison_code
= unsignedp
? NE
: GT
;
9376 if (op1
== constm1_rtx
&& !unsignedp
)
9378 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9379 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9380 cmpop1
= const0_rtx
;
9381 if (code
== MIN_EXPR
)
9382 comparison_code
= LT
;
9385 /* Use a conditional move if possible. */
9386 if (can_conditionally_move_p (mode
))
9392 /* Try to emit the conditional move. */
9393 insn
= emit_conditional_move (target
, comparison_code
,
9398 /* If we could do the conditional move, emit the sequence,
9402 rtx_insn
*seq
= get_insns ();
9408 /* Otherwise discard the sequence and fall back to code with
9414 emit_move_insn (target
, op0
);
9416 lab
= gen_label_rtx ();
9417 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9418 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9419 profile_probability::uninitialized ());
9421 emit_move_insn (target
, op1
);
9426 op0
= expand_expr (treeop0
, subtarget
,
9427 VOIDmode
, EXPAND_NORMAL
);
9428 if (modifier
== EXPAND_STACK_PARM
)
9430 /* In case we have to reduce the result to bitfield precision
9431 for unsigned bitfield expand this as XOR with a proper constant
9433 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9435 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9436 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9437 false, GET_MODE_PRECISION (int_mode
));
9439 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9440 immed_wide_int_const (mask
, int_mode
),
9441 target
, 1, OPTAB_LIB_WIDEN
);
9444 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9448 /* ??? Can optimize bitwise operations with one arg constant.
9449 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9450 and (a bitwise1 b) bitwise2 b (etc)
9451 but that is probably not worth while. */
9460 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9461 || type_has_mode_precision_p (type
));
9467 /* If this is a fixed-point operation, then we cannot use the code
9468 below because "expand_shift" doesn't support sat/no-sat fixed-point
9470 if (ALL_FIXED_POINT_MODE_P (mode
))
9473 if (! safe_from_p (subtarget
, treeop1
, 1))
9475 if (modifier
== EXPAND_STACK_PARM
)
9477 op0
= expand_expr (treeop0
, subtarget
,
9478 VOIDmode
, EXPAND_NORMAL
);
9480 /* Left shift optimization when shifting across word_size boundary.
9482 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9483 there isn't native instruction to support this wide mode
9484 left shift. Given below scenario:
9486 Type A = (Type) B << C
9489 | dest_high | dest_low |
9493 If the shift amount C caused we shift B to across the word
9494 size boundary, i.e part of B shifted into high half of
9495 destination register, and part of B remains in the low
9496 half, then GCC will use the following left shift expand
9499 1. Initialize dest_low to B.
9500 2. Initialize every bit of dest_high to the sign bit of B.
9501 3. Logic left shift dest_low by C bit to finalize dest_low.
9502 The value of dest_low before this shift is kept in a temp D.
9503 4. Logic left shift dest_high by C.
9504 5. Logic right shift D by (word_size - C).
9505 6. Or the result of 4 and 5 to finalize dest_high.
9507 While, by checking gimple statements, if operand B is
9508 coming from signed extension, then we can simplify above
9511 1. dest_high = src_low >> (word_size - C).
9512 2. dest_low = src_low << C.
9514 We can use one arithmetic right shift to finish all the
9515 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9516 needed from 6 into 2.
9518 The case is similar for zero extension, except that we
9519 initialize dest_high to zero rather than copies of the sign
9520 bit from B. Furthermore, we need to use a logical right shift
9523 The choice of sign-extension versus zero-extension is
9524 determined entirely by whether or not B is signed and is
9525 independent of the current setting of unsignedp. */
9528 if (code
== LSHIFT_EXPR
9531 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9533 && TREE_CONSTANT (treeop1
)
9534 && TREE_CODE (treeop0
) == SSA_NAME
)
9536 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9537 if (is_gimple_assign (def
)
9538 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9540 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9541 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9543 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9544 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9545 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9546 >= GET_MODE_BITSIZE (word_mode
)))
9548 rtx_insn
*seq
, *seq_old
;
9549 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9551 bool extend_unsigned
9552 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9553 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9554 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9555 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9556 int_mode
, high_off
);
9557 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9558 - TREE_INT_CST_LOW (treeop1
));
9559 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9562 /* dest_high = src_low >> (word_size - C). */
9563 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9566 if (temp
!= dest_high
)
9567 emit_move_insn (dest_high
, temp
);
9569 /* dest_low = src_low << C. */
9570 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9571 treeop1
, dest_low
, unsignedp
);
9572 if (temp
!= dest_low
)
9573 emit_move_insn (dest_low
, temp
);
9579 if (have_insn_for (ASHIFT
, int_mode
))
9581 bool speed_p
= optimize_insn_for_speed_p ();
9583 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9588 seq_old
= get_insns ();
9590 if (seq_cost (seq
, speed_p
)
9591 >= seq_cost (seq_old
, speed_p
))
9602 if (temp
== NULL_RTX
)
9603 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9605 if (code
== LSHIFT_EXPR
)
9606 temp
= REDUCE_BIT_FIELD (temp
);
9610 /* Could determine the answer when only additive constants differ. Also,
9611 the addition of one can be handled by changing the condition. */
9618 case UNORDERED_EXPR
:
9627 temp
= do_store_flag (ops
,
9628 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9629 tmode
!= VOIDmode
? tmode
: mode
);
9633 /* Use a compare and a jump for BLKmode comparisons, or for function
9634 type comparisons is have_canonicalize_funcptr_for_compare. */
9637 || modifier
== EXPAND_STACK_PARM
9638 || ! safe_from_p (target
, treeop0
, 1)
9639 || ! safe_from_p (target
, treeop1
, 1)
9640 /* Make sure we don't have a hard reg (such as function's return
9641 value) live across basic blocks, if not optimizing. */
9642 || (!optimize
&& REG_P (target
)
9643 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9644 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9646 emit_move_insn (target
, const0_rtx
);
9648 rtx_code_label
*lab1
= gen_label_rtx ();
9649 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9650 profile_probability::uninitialized ());
9652 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9653 emit_move_insn (target
, constm1_rtx
);
9655 emit_move_insn (target
, const1_rtx
);
9661 /* Get the rtx code of the operands. */
9662 op0
= expand_normal (treeop0
);
9663 op1
= expand_normal (treeop1
);
9666 target
= gen_reg_rtx (TYPE_MODE (type
));
9668 /* If target overlaps with op1, then either we need to force
9669 op1 into a pseudo (if target also overlaps with op0),
9670 or write the complex parts in reverse order. */
9671 switch (GET_CODE (target
))
9674 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9676 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9678 complex_expr_force_op1
:
9679 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9680 emit_move_insn (temp
, op1
);
9684 complex_expr_swap_order
:
9685 /* Move the imaginary (op1) and real (op0) parts to their
9687 write_complex_part (target
, op1
, true);
9688 write_complex_part (target
, op0
, false);
9694 temp
= adjust_address_nv (target
,
9695 GET_MODE_INNER (GET_MODE (target
)), 0);
9696 if (reg_overlap_mentioned_p (temp
, op1
))
9698 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9699 temp
= adjust_address_nv (target
, imode
,
9700 GET_MODE_SIZE (imode
));
9701 if (reg_overlap_mentioned_p (temp
, op0
))
9702 goto complex_expr_force_op1
;
9703 goto complex_expr_swap_order
;
9707 if (reg_overlap_mentioned_p (target
, op1
))
9709 if (reg_overlap_mentioned_p (target
, op0
))
9710 goto complex_expr_force_op1
;
9711 goto complex_expr_swap_order
;
9716 /* Move the real (op0) and imaginary (op1) parts to their location. */
9717 write_complex_part (target
, op0
, false);
9718 write_complex_part (target
, op1
, true);
9722 case WIDEN_SUM_EXPR
:
9724 tree oprnd0
= treeop0
;
9725 tree oprnd1
= treeop1
;
9727 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9728 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9733 case VEC_UNPACK_HI_EXPR
:
9734 case VEC_UNPACK_LO_EXPR
:
9735 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9736 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9738 op0
= expand_normal (treeop0
);
9739 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9745 case VEC_UNPACK_FLOAT_HI_EXPR
:
9746 case VEC_UNPACK_FLOAT_LO_EXPR
:
9748 op0
= expand_normal (treeop0
);
9749 /* The signedness is determined from input operand. */
9750 temp
= expand_widen_pattern_expr
9751 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9752 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9758 case VEC_WIDEN_MULT_HI_EXPR
:
9759 case VEC_WIDEN_MULT_LO_EXPR
:
9760 case VEC_WIDEN_MULT_EVEN_EXPR
:
9761 case VEC_WIDEN_MULT_ODD_EXPR
:
9762 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9763 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9764 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9765 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9767 gcc_assert (target
);
9770 case VEC_PACK_SAT_EXPR
:
9771 case VEC_PACK_FIX_TRUNC_EXPR
:
9772 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9775 case VEC_PACK_TRUNC_EXPR
:
9776 if (VECTOR_BOOLEAN_TYPE_P (type
)
9777 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9778 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9779 && SCALAR_INT_MODE_P (mode
))
9781 class expand_operand eops
[4];
9782 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9783 expand_operands (treeop0
, treeop1
,
9784 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9785 this_optab
= vec_pack_sbool_trunc_optab
;
9786 enum insn_code icode
= optab_handler (this_optab
, imode
);
9787 create_output_operand (&eops
[0], target
, mode
);
9788 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9789 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9790 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9791 create_input_operand (&eops
[3], temp
, imode
);
9792 expand_insn (icode
, 4, eops
);
9793 return eops
[0].value
;
9795 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9798 case VEC_PACK_FLOAT_EXPR
:
9799 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9800 expand_operands (treeop0
, treeop1
,
9801 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9802 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9804 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9805 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9807 gcc_assert (target
);
9812 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9813 vec_perm_builder sel
;
9814 if (TREE_CODE (treeop2
) == VECTOR_CST
9815 && tree_to_vec_perm_builder (&sel
, treeop2
))
9817 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9818 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9823 op2
= expand_normal (treeop2
);
9824 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9832 tree oprnd0
= treeop0
;
9833 tree oprnd1
= treeop1
;
9834 tree oprnd2
= treeop2
;
9836 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9837 op2
= expand_normal (oprnd2
);
9838 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9845 tree oprnd0
= treeop0
;
9846 tree oprnd1
= treeop1
;
9847 tree oprnd2
= treeop2
;
9849 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9850 op2
= expand_normal (oprnd2
);
9851 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9856 case REALIGN_LOAD_EXPR
:
9858 tree oprnd0
= treeop0
;
9859 tree oprnd1
= treeop1
;
9860 tree oprnd2
= treeop2
;
9862 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9863 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9864 op2
= expand_normal (oprnd2
);
9865 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9873 /* A COND_EXPR with its type being VOID_TYPE represents a
9874 conditional jump and is handled in
9875 expand_gimple_cond_expr. */
9876 gcc_assert (!VOID_TYPE_P (type
));
9878 /* Note that COND_EXPRs whose type is a structure or union
9879 are required to be constructed to contain assignments of
9880 a temporary variable, so that we can evaluate them here
9881 for side effect only. If type is void, we must do likewise. */
9883 gcc_assert (!TREE_ADDRESSABLE (type
)
9885 && TREE_TYPE (treeop1
) != void_type_node
9886 && TREE_TYPE (treeop2
) != void_type_node
);
9888 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9892 /* If we are not to produce a result, we have no target. Otherwise,
9893 if a target was specified use it; it will not be used as an
9894 intermediate target unless it is safe. If no target, use a
9897 if (modifier
!= EXPAND_STACK_PARM
9899 && safe_from_p (original_target
, treeop0
, 1)
9900 && GET_MODE (original_target
) == mode
9901 && !MEM_P (original_target
))
9902 temp
= original_target
;
9904 temp
= assign_temp (type
, 0, 1);
9906 do_pending_stack_adjust ();
9908 rtx_code_label
*lab0
= gen_label_rtx ();
9909 rtx_code_label
*lab1
= gen_label_rtx ();
9910 jumpifnot (treeop0
, lab0
,
9911 profile_probability::uninitialized ());
9912 store_expr (treeop1
, temp
,
9913 modifier
== EXPAND_STACK_PARM
,
9916 emit_jump_insn (targetm
.gen_jump (lab1
));
9919 store_expr (treeop2
, temp
,
9920 modifier
== EXPAND_STACK_PARM
,
9928 case VEC_DUPLICATE_EXPR
:
9929 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9930 target
= expand_vector_broadcast (mode
, op0
);
9931 gcc_assert (target
);
9934 case VEC_SERIES_EXPR
:
9935 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9936 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9938 case BIT_INSERT_EXPR
:
9940 unsigned bitpos
= tree_to_uhwi (treeop2
);
9942 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9943 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9945 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9946 op0
= expand_normal (treeop0
);
9947 op1
= expand_normal (treeop1
);
9948 rtx dst
= gen_reg_rtx (mode
);
9949 emit_move_insn (dst
, op0
);
9950 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9951 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9959 /* Here to do an ordinary binary operator. */
9961 expand_operands (treeop0
, treeop1
,
9962 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9964 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9966 if (modifier
== EXPAND_STACK_PARM
)
9968 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9969 unsignedp
, OPTAB_LIB_WIDEN
);
9971 /* Bitwise operations do not need bitfield reduction as we expect their
9972 operands being properly truncated. */
9973 if (code
== BIT_XOR_EXPR
9974 || code
== BIT_AND_EXPR
9975 || code
== BIT_IOR_EXPR
)
9977 return REDUCE_BIT_FIELD (temp
);
9979 #undef REDUCE_BIT_FIELD
9982 /* Return TRUE if expression STMT is suitable for replacement.
9983 Never consider memory loads as replaceable, because those don't ever lead
9984 into constant expressions. */
9987 stmt_is_replaceable_p (gimple
*stmt
)
9989 if (ssa_is_replaceable_p (stmt
))
9991 /* Don't move around loads. */
9992 if (!gimple_assign_single_p (stmt
)
9993 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
10000 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
10001 enum expand_modifier modifier
, rtx
*alt_rtl
,
10002 bool inner_reference_p
)
10004 rtx op0
, op1
, temp
, decl_rtl
;
10007 machine_mode mode
, dmode
;
10008 enum tree_code code
= TREE_CODE (exp
);
10009 rtx subtarget
, original_target
;
10012 bool reduce_bit_field
;
10013 location_t loc
= EXPR_LOCATION (exp
);
10014 struct separate_ops ops
;
10015 tree treeop0
, treeop1
, treeop2
;
10016 tree ssa_name
= NULL_TREE
;
10019 type
= TREE_TYPE (exp
);
10020 mode
= TYPE_MODE (type
);
10021 unsignedp
= TYPE_UNSIGNED (type
);
10023 treeop0
= treeop1
= treeop2
= NULL_TREE
;
10024 if (!VL_EXP_CLASS_P (exp
))
10025 switch (TREE_CODE_LENGTH (code
))
10028 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
10029 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
10030 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
10038 ops
.location
= loc
;
10040 ignore
= (target
== const0_rtx
10041 || ((CONVERT_EXPR_CODE_P (code
)
10042 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
10043 && TREE_CODE (type
) == VOID_TYPE
));
10045 /* An operation in what may be a bit-field type needs the
10046 result to be reduced to the precision of the bit-field type,
10047 which is narrower than that of the type's mode. */
10048 reduce_bit_field
= (!ignore
10049 && INTEGRAL_TYPE_P (type
)
10050 && !type_has_mode_precision_p (type
));
10052 /* If we are going to ignore this result, we need only do something
10053 if there is a side-effect somewhere in the expression. If there
10054 is, short-circuit the most common cases here. Note that we must
10055 not call expand_expr with anything but const0_rtx in case this
10056 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
10060 if (! TREE_SIDE_EFFECTS (exp
))
10063 /* Ensure we reference a volatile object even if value is ignored, but
10064 don't do this if all we are doing is taking its address. */
10065 if (TREE_THIS_VOLATILE (exp
)
10066 && TREE_CODE (exp
) != FUNCTION_DECL
10067 && mode
!= VOIDmode
&& mode
!= BLKmode
10068 && modifier
!= EXPAND_CONST_ADDRESS
)
10070 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
10072 copy_to_reg (temp
);
10076 if (TREE_CODE_CLASS (code
) == tcc_unary
10077 || code
== BIT_FIELD_REF
10078 || code
== COMPONENT_REF
10079 || code
== INDIRECT_REF
)
10080 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
10083 else if (TREE_CODE_CLASS (code
) == tcc_binary
10084 || TREE_CODE_CLASS (code
) == tcc_comparison
10085 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
10087 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
10088 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
10095 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
10098 /* Use subtarget as the target for operand 0 of a binary operation. */
10099 subtarget
= get_subtarget (target
);
10100 original_target
= target
;
10106 tree function
= decl_function_context (exp
);
10108 temp
= label_rtx (exp
);
10109 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
10111 if (function
!= current_function_decl
10113 LABEL_REF_NONLOCAL_P (temp
) = 1;
10115 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
10120 /* ??? ivopts calls expander, without any preparation from
10121 out-of-ssa. So fake instructions as if this was an access to the
10122 base variable. This unnecessarily allocates a pseudo, see how we can
10123 reuse it, if partition base vars have it set already. */
10124 if (!currently_expanding_to_rtl
)
10126 tree var
= SSA_NAME_VAR (exp
);
10127 if (var
&& DECL_RTL_SET_P (var
))
10128 return DECL_RTL (var
);
10129 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
10130 LAST_VIRTUAL_REGISTER
+ 1);
10133 g
= get_gimple_for_ssa_name (exp
);
10134 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10136 && modifier
== EXPAND_INITIALIZER
10137 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
10138 && (optimize
|| !SSA_NAME_VAR (exp
)
10139 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
10140 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
10141 g
= SSA_NAME_DEF_STMT (exp
);
10145 location_t saved_loc
= curr_insn_location ();
10146 loc
= gimple_location (g
);
10147 if (loc
!= UNKNOWN_LOCATION
)
10148 set_curr_insn_location (loc
);
10149 ops
.code
= gimple_assign_rhs_code (g
);
10150 switch (get_gimple_rhs_class (ops
.code
))
10152 case GIMPLE_TERNARY_RHS
:
10153 ops
.op2
= gimple_assign_rhs3 (g
);
10155 case GIMPLE_BINARY_RHS
:
10156 ops
.op1
= gimple_assign_rhs2 (g
);
10158 /* Try to expand conditonal compare. */
10159 if (targetm
.gen_ccmp_first
)
10161 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10162 r
= expand_ccmp_expr (g
, mode
);
10167 case GIMPLE_UNARY_RHS
:
10168 ops
.op0
= gimple_assign_rhs1 (g
);
10169 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10170 ops
.location
= loc
;
10171 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10173 case GIMPLE_SINGLE_RHS
:
10175 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10176 tmode
, modifier
, alt_rtl
,
10177 inner_reference_p
);
10181 gcc_unreachable ();
10183 set_curr_insn_location (saved_loc
);
10184 if (REG_P (r
) && !REG_EXPR (r
))
10185 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10190 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10191 exp
= SSA_NAME_VAR (ssa_name
);
10192 goto expand_decl_rtl
;
10196 /* If a static var's type was incomplete when the decl was written,
10197 but the type is complete now, lay out the decl now. */
10198 if (DECL_SIZE (exp
) == 0
10199 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10200 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10201 layout_decl (exp
, 0);
10205 case FUNCTION_DECL
:
10207 decl_rtl
= DECL_RTL (exp
);
10209 gcc_assert (decl_rtl
);
10211 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10212 settings for VECTOR_TYPE_P that might switch for the function. */
10213 if (currently_expanding_to_rtl
10214 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10215 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10216 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10218 decl_rtl
= copy_rtx (decl_rtl
);
10220 /* Record writes to register variables. */
10221 if (modifier
== EXPAND_WRITE
10222 && REG_P (decl_rtl
)
10223 && HARD_REGISTER_P (decl_rtl
))
10224 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10225 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10227 /* Ensure variable marked as used even if it doesn't go through
10228 a parser. If it hasn't be used yet, write out an external
10231 TREE_USED (exp
) = 1;
10233 /* Show we haven't gotten RTL for this yet. */
10236 /* Variables inherited from containing functions should have
10237 been lowered by this point. */
10239 context
= decl_function_context (exp
);
10241 || SCOPE_FILE_SCOPE_P (context
)
10242 || context
== current_function_decl
10243 || TREE_STATIC (exp
)
10244 || DECL_EXTERNAL (exp
)
10245 /* ??? C++ creates functions that are not TREE_STATIC. */
10246 || TREE_CODE (exp
) == FUNCTION_DECL
);
10248 /* This is the case of an array whose size is to be determined
10249 from its initializer, while the initializer is still being parsed.
10250 ??? We aren't parsing while expanding anymore. */
10252 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10253 temp
= validize_mem (decl_rtl
);
10255 /* If DECL_RTL is memory, we are in the normal case and the
10256 address is not valid, get the address into a register. */
10258 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10261 *alt_rtl
= decl_rtl
;
10262 decl_rtl
= use_anchored_address (decl_rtl
);
10263 if (modifier
!= EXPAND_CONST_ADDRESS
10264 && modifier
!= EXPAND_SUM
10265 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10266 : GET_MODE (decl_rtl
),
10267 XEXP (decl_rtl
, 0),
10268 MEM_ADDR_SPACE (decl_rtl
)))
10269 temp
= replace_equiv_address (decl_rtl
,
10270 copy_rtx (XEXP (decl_rtl
, 0)));
10273 /* If we got something, return it. But first, set the alignment
10274 if the address is a register. */
10277 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10278 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10280 else if (MEM_P (decl_rtl
))
10286 && modifier
!= EXPAND_WRITE
10287 && modifier
!= EXPAND_MEMORY
10288 && modifier
!= EXPAND_INITIALIZER
10289 && modifier
!= EXPAND_CONST_ADDRESS
10290 && modifier
!= EXPAND_SUM
10291 && !inner_reference_p
10293 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10294 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10295 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10301 dmode
= DECL_MODE (exp
);
10303 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10305 /* If the mode of DECL_RTL does not match that of the decl,
10306 there are two cases: we are dealing with a BLKmode value
10307 that is returned in a register, or we are dealing with
10308 a promoted value. In the latter case, return a SUBREG
10309 of the wanted mode, but mark it so that we know that it
10310 was already extended. */
10311 if (REG_P (decl_rtl
)
10312 && dmode
!= BLKmode
10313 && GET_MODE (decl_rtl
) != dmode
)
10315 machine_mode pmode
;
10317 /* Get the signedness to be used for this variable. Ensure we get
10318 the same mode we got when the variable was declared. */
10319 if (code
!= SSA_NAME
)
10320 pmode
= promote_decl_mode (exp
, &unsignedp
);
10321 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10322 && gimple_code (g
) == GIMPLE_CALL
10323 && !gimple_call_internal_p (g
))
10324 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10325 gimple_call_fntype (g
),
10328 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10329 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10331 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10332 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10333 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10341 /* Given that TYPE_PRECISION (type) is not always equal to
10342 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10343 the former to the latter according to the signedness of the
10345 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
10346 temp
= immed_wide_int_const
10347 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
10353 tree tmp
= NULL_TREE
;
10354 if (VECTOR_MODE_P (mode
))
10355 return const_vector_from_tree (exp
);
10356 scalar_int_mode int_mode
;
10357 if (is_int_mode (mode
, &int_mode
))
10359 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10360 return const_scalar_mask_from_tree (int_mode
, exp
);
10364 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10366 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10367 type_for_mode
, exp
);
10372 vec
<constructor_elt
, va_gc
> *v
;
10373 /* Constructors need to be fixed-length. FIXME. */
10374 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10375 vec_alloc (v
, nunits
);
10376 for (unsigned int i
= 0; i
< nunits
; ++i
)
10377 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10378 tmp
= build_constructor (type
, v
);
10380 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10385 if (modifier
== EXPAND_WRITE
)
10387 /* Writing into CONST_DECL is always invalid, but handle it
10389 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10390 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10391 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10392 EXPAND_NORMAL
, as
);
10393 op0
= memory_address_addr_space (mode
, op0
, as
);
10394 temp
= gen_rtx_MEM (mode
, op0
);
10395 set_mem_addr_space (temp
, as
);
10398 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10401 /* If optimized, generate immediate CONST_DOUBLE
10402 which will be turned into memory by reload if necessary.
10404 We used to force a register so that loop.c could see it. But
10405 this does not allow gen_* patterns to perform optimizations with
10406 the constants. It also produces two insns in cases like "x = 1.0;".
10407 On most machines, floating-point constants are not permitted in
10408 many insns, so we'd end up copying it to a register in any case.
10410 Now, we do the copying in expand_binop, if appropriate. */
10411 return const_double_from_real_value (TREE_REAL_CST (exp
),
10412 TYPE_MODE (TREE_TYPE (exp
)));
10415 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10416 TYPE_MODE (TREE_TYPE (exp
)));
10419 /* Handle evaluating a complex constant in a CONCAT target. */
10420 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10424 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10425 rtarg
= XEXP (original_target
, 0);
10426 itarg
= XEXP (original_target
, 1);
10428 /* Move the real and imaginary parts separately. */
10429 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10430 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10433 emit_move_insn (rtarg
, op0
);
10435 emit_move_insn (itarg
, op1
);
10437 return original_target
;
10443 temp
= expand_expr_constant (exp
, 1, modifier
);
10445 /* temp contains a constant address.
10446 On RISC machines where a constant address isn't valid,
10447 make some insns to get that address into a register. */
10448 if (modifier
!= EXPAND_CONST_ADDRESS
10449 && modifier
!= EXPAND_INITIALIZER
10450 && modifier
!= EXPAND_SUM
10451 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10452 MEM_ADDR_SPACE (temp
)))
10453 return replace_equiv_address (temp
,
10454 copy_rtx (XEXP (temp
, 0)));
10458 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10462 tree val
= treeop0
;
10463 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10464 inner_reference_p
);
10466 if (!SAVE_EXPR_RESOLVED_P (exp
))
10468 /* We can indeed still hit this case, typically via builtin
10469 expanders calling save_expr immediately before expanding
10470 something. Assume this means that we only have to deal
10471 with non-BLKmode values. */
10472 gcc_assert (GET_MODE (ret
) != BLKmode
);
10474 val
= build_decl (curr_insn_location (),
10475 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10476 DECL_ARTIFICIAL (val
) = 1;
10477 DECL_IGNORED_P (val
) = 1;
10479 TREE_OPERAND (exp
, 0) = treeop0
;
10480 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10482 if (!CONSTANT_P (ret
))
10483 ret
= copy_to_reg (ret
);
10484 SET_DECL_RTL (val
, ret
);
10492 /* If we don't need the result, just ensure we evaluate any
10496 unsigned HOST_WIDE_INT idx
;
10499 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10500 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10505 return expand_constructor (exp
, target
, modifier
, false);
10507 case TARGET_MEM_REF
:
10510 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10511 unsigned int align
;
10513 op0
= addr_for_mem_ref (exp
, as
, true);
10514 op0
= memory_address_addr_space (mode
, op0
, as
);
10515 temp
= gen_rtx_MEM (mode
, op0
);
10516 set_mem_attributes (temp
, exp
, 0);
10517 set_mem_addr_space (temp
, as
);
10518 align
= get_object_alignment (exp
);
10519 if (modifier
!= EXPAND_WRITE
10520 && modifier
!= EXPAND_MEMORY
10522 && align
< GET_MODE_ALIGNMENT (mode
))
10523 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10524 align
, NULL_RTX
, NULL
);
10530 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10532 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10533 machine_mode address_mode
;
10534 tree base
= TREE_OPERAND (exp
, 0);
10537 /* Handle expansion of non-aliased memory with non-BLKmode. That
10538 might end up in a register. */
10539 if (mem_ref_refers_to_non_mem_p (exp
))
10541 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10542 base
= TREE_OPERAND (base
, 0);
10543 poly_uint64 type_size
;
10544 if (known_eq (offset
, 0)
10546 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10547 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10548 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10549 target
, tmode
, modifier
);
10550 if (TYPE_MODE (type
) == BLKmode
)
10552 temp
= assign_stack_temp (DECL_MODE (base
),
10553 GET_MODE_SIZE (DECL_MODE (base
)));
10554 store_expr (base
, temp
, 0, false, false);
10555 temp
= adjust_address (temp
, BLKmode
, offset
);
10556 set_mem_size (temp
, int_size_in_bytes (type
));
10559 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10560 bitsize_int (offset
* BITS_PER_UNIT
));
10561 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10562 return expand_expr (exp
, target
, tmode
, modifier
);
10564 address_mode
= targetm
.addr_space
.address_mode (as
);
10565 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10567 tree mask
= gimple_assign_rhs2 (def_stmt
);
10568 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10569 gimple_assign_rhs1 (def_stmt
), mask
);
10570 TREE_OPERAND (exp
, 0) = base
;
10572 align
= get_object_alignment (exp
);
10573 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10574 op0
= memory_address_addr_space (mode
, op0
, as
);
10575 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10577 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10578 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10579 op0
= memory_address_addr_space (mode
, op0
, as
);
10581 temp
= gen_rtx_MEM (mode
, op0
);
10582 set_mem_attributes (temp
, exp
, 0);
10583 set_mem_addr_space (temp
, as
);
10584 if (TREE_THIS_VOLATILE (exp
))
10585 MEM_VOLATILE_P (temp
) = 1;
10586 if (modifier
!= EXPAND_WRITE
10587 && modifier
!= EXPAND_MEMORY
10588 && !inner_reference_p
10590 && align
< GET_MODE_ALIGNMENT (mode
))
10591 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
10592 modifier
== EXPAND_STACK_PARM
10593 ? NULL_RTX
: target
, alt_rtl
);
10595 && modifier
!= EXPAND_MEMORY
10596 && modifier
!= EXPAND_WRITE
)
10597 temp
= flip_storage_order (mode
, temp
);
10604 tree array
= treeop0
;
10605 tree index
= treeop1
;
10608 /* Fold an expression like: "foo"[2].
10609 This is not done in fold so it won't happen inside &.
10610 Don't fold if this is for wide characters since it's too
10611 difficult to do correctly and this is a very rare case. */
10613 if (modifier
!= EXPAND_CONST_ADDRESS
10614 && modifier
!= EXPAND_INITIALIZER
10615 && modifier
!= EXPAND_MEMORY
)
10617 tree t
= fold_read_from_constant_string (exp
);
10620 return expand_expr (t
, target
, tmode
, modifier
);
10623 /* If this is a constant index into a constant array,
10624 just get the value from the array. Handle both the cases when
10625 we have an explicit constructor and when our operand is a variable
10626 that was declared const. */
10628 if (modifier
!= EXPAND_CONST_ADDRESS
10629 && modifier
!= EXPAND_INITIALIZER
10630 && modifier
!= EXPAND_MEMORY
10631 && TREE_CODE (array
) == CONSTRUCTOR
10632 && ! TREE_SIDE_EFFECTS (array
)
10633 && TREE_CODE (index
) == INTEGER_CST
)
10635 unsigned HOST_WIDE_INT ix
;
10638 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10640 if (tree_int_cst_equal (field
, index
))
10642 if (!TREE_SIDE_EFFECTS (value
))
10643 return expand_expr (fold (value
), target
, tmode
, modifier
);
10648 else if (optimize
>= 1
10649 && modifier
!= EXPAND_CONST_ADDRESS
10650 && modifier
!= EXPAND_INITIALIZER
10651 && modifier
!= EXPAND_MEMORY
10652 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10653 && TREE_CODE (index
) == INTEGER_CST
10654 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10655 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10657 if (init
== NULL_TREE
)
10659 tree value
= build_zero_cst (type
);
10660 if (TREE_CODE (value
) == CONSTRUCTOR
)
10662 /* If VALUE is a CONSTRUCTOR, this optimization is only
10663 useful if this doesn't store the CONSTRUCTOR into
10664 memory. If it does, it is more efficient to just
10665 load the data from the array directly. */
10666 rtx ret
= expand_constructor (value
, target
,
10668 if (ret
== NULL_RTX
)
10673 return expand_expr (value
, target
, tmode
, modifier
);
10675 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10677 unsigned HOST_WIDE_INT ix
;
10680 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10682 if (tree_int_cst_equal (field
, index
))
10684 if (TREE_SIDE_EFFECTS (value
))
10687 if (TREE_CODE (value
) == CONSTRUCTOR
)
10689 /* If VALUE is a CONSTRUCTOR, this
10690 optimization is only useful if
10691 this doesn't store the CONSTRUCTOR
10692 into memory. If it does, it is more
10693 efficient to just load the data from
10694 the array directly. */
10695 rtx ret
= expand_constructor (value
, target
,
10697 if (ret
== NULL_RTX
)
10702 expand_expr (fold (value
), target
, tmode
, modifier
);
10705 else if (TREE_CODE (init
) == STRING_CST
)
10707 tree low_bound
= array_ref_low_bound (exp
);
10708 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10710 /* Optimize the special case of a zero lower bound.
10712 We convert the lower bound to sizetype to avoid problems
10713 with constant folding. E.g. suppose the lower bound is
10714 1 and its mode is QI. Without the conversion
10715 (ARRAY + (INDEX - (unsigned char)1))
10717 (ARRAY + (-(unsigned char)1) + INDEX)
10719 (ARRAY + 255 + INDEX). Oops! */
10720 if (!integer_zerop (low_bound
))
10721 index1
= size_diffop_loc (loc
, index1
,
10722 fold_convert_loc (loc
, sizetype
,
10725 if (tree_fits_uhwi_p (index1
)
10726 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10728 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
10729 scalar_int_mode char_mode
;
10731 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
10732 && GET_MODE_SIZE (char_mode
) == 1)
10733 return gen_int_mode (TREE_STRING_POINTER (init
)
10734 [TREE_INT_CST_LOW (index1
)],
10740 goto normal_inner_ref
;
10742 case COMPONENT_REF
:
10743 /* If the operand is a CONSTRUCTOR, we can just extract the
10744 appropriate field if it is present. */
10745 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10747 unsigned HOST_WIDE_INT idx
;
10749 scalar_int_mode field_mode
;
10751 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10753 if (field
== treeop1
10754 /* We can normally use the value of the field in the
10755 CONSTRUCTOR. However, if this is a bitfield in
10756 an integral mode that we can fit in a HOST_WIDE_INT,
10757 we must mask only the number of bits in the bitfield,
10758 since this is done implicitly by the constructor. If
10759 the bitfield does not meet either of those conditions,
10760 we can't do this optimization. */
10761 && (! DECL_BIT_FIELD (field
)
10762 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10763 && (GET_MODE_PRECISION (field_mode
)
10764 <= HOST_BITS_PER_WIDE_INT
))))
10766 if (DECL_BIT_FIELD (field
)
10767 && modifier
== EXPAND_STACK_PARM
)
10769 op0
= expand_expr (value
, target
, tmode
, modifier
);
10770 if (DECL_BIT_FIELD (field
))
10772 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10773 scalar_int_mode imode
10774 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10776 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10778 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10780 op0
= expand_and (imode
, op0
, op1
, target
);
10784 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10786 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10788 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10796 goto normal_inner_ref
;
10798 case BIT_FIELD_REF
:
10799 case ARRAY_RANGE_REF
:
10802 machine_mode mode1
, mode2
;
10803 poly_int64 bitsize
, bitpos
, bytepos
;
10805 int reversep
, volatilep
= 0, must_force_mem
;
10807 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10808 &unsignedp
, &reversep
, &volatilep
);
10809 rtx orig_op0
, memloc
;
10810 bool clear_mem_expr
= false;
10812 /* If we got back the original object, something is wrong. Perhaps
10813 we are evaluating an expression too early. In any event, don't
10814 infinitely recurse. */
10815 gcc_assert (tem
!= exp
);
10817 /* If TEM's type is a union of variable size, pass TARGET to the inner
10818 computation, since it will need a temporary and TARGET is known
10819 to have to do. This occurs in unchecked conversion in Ada. */
10821 = expand_expr_real (tem
,
10822 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10823 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10824 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10826 && modifier
!= EXPAND_STACK_PARM
10827 ? target
: NULL_RTX
),
10829 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10832 /* If the field has a mode, we want to access it in the
10833 field's mode, not the computed mode.
10834 If a MEM has VOIDmode (external with incomplete type),
10835 use BLKmode for it instead. */
10838 if (mode1
!= VOIDmode
)
10839 op0
= adjust_address (op0
, mode1
, 0);
10840 else if (GET_MODE (op0
) == VOIDmode
)
10841 op0
= adjust_address (op0
, BLKmode
, 0);
10845 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10847 /* Make sure bitpos is not negative, it can wreak havoc later. */
10848 if (maybe_lt (bitpos
, 0))
10850 gcc_checking_assert (offset
== NULL_TREE
);
10851 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10852 bitpos
= num_trailing_bits (bitpos
);
10855 /* If we have either an offset, a BLKmode result, or a reference
10856 outside the underlying object, we must force it to memory.
10857 Such a case can occur in Ada if we have unchecked conversion
10858 of an expression from a scalar type to an aggregate type or
10859 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10860 passed a partially uninitialized object or a view-conversion
10861 to a larger size. */
10862 must_force_mem
= (offset
10863 || mode1
== BLKmode
10864 || (mode
== BLKmode
10865 && !int_mode_for_size (bitsize
, 1).exists ())
10866 || maybe_gt (bitpos
+ bitsize
,
10867 GET_MODE_BITSIZE (mode2
)));
10869 /* Handle CONCAT first. */
10870 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10872 if (known_eq (bitpos
, 0)
10873 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10874 && COMPLEX_MODE_P (mode1
)
10875 && COMPLEX_MODE_P (GET_MODE (op0
))
10876 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10877 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10880 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10881 if (mode1
!= GET_MODE (op0
))
10884 for (int i
= 0; i
< 2; i
++)
10886 rtx op
= read_complex_part (op0
, i
!= 0);
10887 if (GET_CODE (op
) == SUBREG
)
10888 op
= force_reg (GET_MODE (op
), op
);
10889 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
10894 if (!REG_P (op
) && !MEM_P (op
))
10895 op
= force_reg (GET_MODE (op
), op
);
10896 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10900 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10904 if (known_eq (bitpos
, 0)
10905 && known_eq (bitsize
,
10906 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10907 && maybe_ne (bitsize
, 0))
10909 op0
= XEXP (op0
, 0);
10910 mode2
= GET_MODE (op0
);
10912 else if (known_eq (bitpos
,
10913 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10914 && known_eq (bitsize
,
10915 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10916 && maybe_ne (bitpos
, 0)
10917 && maybe_ne (bitsize
, 0))
10919 op0
= XEXP (op0
, 1);
10921 mode2
= GET_MODE (op0
);
10924 /* Otherwise force into memory. */
10925 must_force_mem
= 1;
10928 /* If this is a constant, put it in a register if it is a legitimate
10929 constant and we don't need a memory reference. */
10930 if (CONSTANT_P (op0
)
10931 && mode2
!= BLKmode
10932 && targetm
.legitimate_constant_p (mode2
, op0
)
10933 && !must_force_mem
)
10934 op0
= force_reg (mode2
, op0
);
10936 /* Otherwise, if this is a constant, try to force it to the constant
10937 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10938 is a legitimate constant. */
10939 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10940 op0
= validize_mem (memloc
);
10942 /* Otherwise, if this is a constant or the object is not in memory
10943 and need be, put it there. */
10944 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10946 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10947 emit_move_insn (memloc
, op0
);
10949 clear_mem_expr
= true;
10954 machine_mode address_mode
;
10955 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10958 gcc_assert (MEM_P (op0
));
10960 address_mode
= get_address_mode (op0
);
10961 if (GET_MODE (offset_rtx
) != address_mode
)
10963 /* We cannot be sure that the RTL in offset_rtx is valid outside
10964 of a memory address context, so force it into a register
10965 before attempting to convert it to the desired mode. */
10966 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10967 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10970 /* See the comment in expand_assignment for the rationale. */
10971 if (mode1
!= VOIDmode
10972 && maybe_ne (bitpos
, 0)
10973 && maybe_gt (bitsize
, 0)
10974 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10975 && multiple_p (bitpos
, bitsize
)
10976 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10977 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10979 op0
= adjust_address (op0
, mode1
, bytepos
);
10983 op0
= offset_address (op0
, offset_rtx
,
10984 highest_pow2_factor (offset
));
10987 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10988 record its alignment as BIGGEST_ALIGNMENT. */
10990 && known_eq (bitpos
, 0)
10992 && is_aligning_offset (offset
, tem
))
10993 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10995 /* Don't forget about volatility even if this is a bitfield. */
10996 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10998 if (op0
== orig_op0
)
10999 op0
= copy_rtx (op0
);
11001 MEM_VOLATILE_P (op0
) = 1;
11004 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
11006 if (op0
== orig_op0
)
11007 op0
= copy_rtx (op0
);
11009 set_mem_align (op0
, BITS_PER_UNIT
);
11012 /* In cases where an aligned union has an unaligned object
11013 as a field, we might be extracting a BLKmode value from
11014 an integer-mode (e.g., SImode) object. Handle this case
11015 by doing the extract into an object as wide as the field
11016 (which we know to be the width of a basic mode), then
11017 storing into memory, and changing the mode to BLKmode. */
11018 if (mode1
== VOIDmode
11019 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
11020 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
11021 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
11022 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
11023 && modifier
!= EXPAND_CONST_ADDRESS
11024 && modifier
!= EXPAND_INITIALIZER
11025 && modifier
!= EXPAND_MEMORY
)
11026 /* If the bitfield is volatile and the bitsize
11027 is narrower than the access size of the bitfield,
11028 we need to extract bitfields from the access. */
11029 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
11030 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
11031 && mode1
!= BLKmode
11032 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
11033 /* If the field isn't aligned enough to fetch as a memref,
11034 fetch it as a bit field. */
11035 || (mode1
!= BLKmode
11037 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
11038 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
11039 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
11040 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
11041 && modifier
!= EXPAND_MEMORY
11042 && ((modifier
== EXPAND_CONST_ADDRESS
11043 || modifier
== EXPAND_INITIALIZER
)
11045 : targetm
.slow_unaligned_access (mode1
,
11047 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
11048 /* If the type and the field are a constant size and the
11049 size of the type isn't the same size as the bitfield,
11050 we must use bitfield operations. */
11051 || (known_size_p (bitsize
)
11052 && TYPE_SIZE (TREE_TYPE (exp
))
11053 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
11054 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
11057 machine_mode ext_mode
= mode
;
11059 if (ext_mode
== BLKmode
11060 && ! (target
!= 0 && MEM_P (op0
)
11062 && multiple_p (bitpos
, BITS_PER_UNIT
)))
11063 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
11065 if (ext_mode
== BLKmode
)
11068 target
= assign_temp (type
, 1, 1);
11070 /* ??? Unlike the similar test a few lines below, this one is
11071 very likely obsolete. */
11072 if (known_eq (bitsize
, 0))
11075 /* In this case, BITPOS must start at a byte boundary and
11076 TARGET, if specified, must be a MEM. */
11077 gcc_assert (MEM_P (op0
)
11078 && (!target
|| MEM_P (target
)));
11080 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
11081 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
11082 emit_block_move (target
,
11083 adjust_address (op0
, VOIDmode
, bytepos
),
11084 gen_int_mode (bytesize
, Pmode
),
11085 (modifier
== EXPAND_STACK_PARM
11086 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11091 /* If we have nothing to extract, the result will be 0 for targets
11092 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
11093 return 0 for the sake of consistency, as reading a zero-sized
11094 bitfield is valid in Ada and the value is fully specified. */
11095 if (known_eq (bitsize
, 0))
11098 op0
= validize_mem (op0
);
11100 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
11101 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11103 /* If the result has aggregate type and the extraction is done in
11104 an integral mode, then the field may be not aligned on a byte
11105 boundary; in this case, if it has reverse storage order, it
11106 needs to be extracted as a scalar field with reverse storage
11107 order and put back into memory order afterwards. */
11108 if (AGGREGATE_TYPE_P (type
)
11109 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
11110 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
11112 gcc_checking_assert (known_ge (bitpos
, 0));
11113 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
11114 (modifier
== EXPAND_STACK_PARM
11115 ? NULL_RTX
: target
),
11116 ext_mode
, ext_mode
, reversep
, alt_rtl
);
11118 /* If the result has aggregate type and the mode of OP0 is an
11119 integral mode then, if BITSIZE is narrower than this mode
11120 and this is for big-endian data, we must put the field
11121 into the high-order bits. And we must also put it back
11122 into memory order if it has been previously reversed. */
11123 scalar_int_mode op0_mode
;
11124 if (AGGREGATE_TYPE_P (type
)
11125 && is_int_mode (GET_MODE (op0
), &op0_mode
))
11127 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
11129 gcc_checking_assert (known_le (bitsize
, size
));
11130 if (maybe_lt (bitsize
, size
)
11131 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
11132 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
11133 size
- bitsize
, op0
, 1);
11136 op0
= flip_storage_order (op0_mode
, op0
);
11139 /* If the result type is BLKmode, store the data into a temporary
11140 of the appropriate type, but with the mode corresponding to the
11141 mode for the data we have (op0's mode). */
11142 if (mode
== BLKmode
)
11145 = assign_stack_temp_for_type (ext_mode
,
11146 GET_MODE_BITSIZE (ext_mode
),
11148 emit_move_insn (new_rtx
, op0
);
11149 op0
= copy_rtx (new_rtx
);
11150 PUT_MODE (op0
, BLKmode
);
11156 /* If the result is BLKmode, use that to access the object
11158 if (mode
== BLKmode
)
11161 /* Get a reference to just this component. */
11162 bytepos
= bits_to_bytes_round_down (bitpos
);
11163 if (modifier
== EXPAND_CONST_ADDRESS
11164 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11165 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11167 op0
= adjust_address (op0
, mode1
, bytepos
);
11169 if (op0
== orig_op0
)
11170 op0
= copy_rtx (op0
);
11172 /* Don't set memory attributes if the base expression is
11173 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11174 we should just honor its original memory attributes. */
11175 if (!(TREE_CODE (tem
) == SSA_NAME
11176 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11177 set_mem_attributes (op0
, exp
, 0);
11179 if (REG_P (XEXP (op0
, 0)))
11180 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11182 /* If op0 is a temporary because the original expressions was forced
11183 to memory, clear MEM_EXPR so that the original expression cannot
11184 be marked as addressable through MEM_EXPR of the temporary. */
11185 if (clear_mem_expr
)
11186 set_mem_expr (op0
, NULL_TREE
);
11188 MEM_VOLATILE_P (op0
) |= volatilep
;
11191 && modifier
!= EXPAND_MEMORY
11192 && modifier
!= EXPAND_WRITE
)
11193 op0
= flip_storage_order (mode1
, op0
);
11195 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11196 || modifier
== EXPAND_CONST_ADDRESS
11197 || modifier
== EXPAND_INITIALIZER
)
11201 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11203 convert_move (target
, op0
, unsignedp
);
11208 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11211 /* All valid uses of __builtin_va_arg_pack () are removed during
11213 if (CALL_EXPR_VA_ARG_PACK (exp
))
11214 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11216 tree fndecl
= get_callee_fndecl (exp
), attr
;
11219 /* Don't diagnose the error attribute in thunks, those are
11220 artificially created. */
11221 && !CALL_FROM_THUNK_P (exp
)
11222 && (attr
= lookup_attribute ("error",
11223 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11225 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11226 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11227 identifier_to_locale (ident
),
11228 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11231 /* Don't diagnose the warning attribute in thunks, those are
11232 artificially created. */
11233 && !CALL_FROM_THUNK_P (exp
)
11234 && (attr
= lookup_attribute ("warning",
11235 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11237 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11238 warning_at (tree_nonartificial_location (exp
),
11239 OPT_Wattribute_warning
,
11240 "%Kcall to %qs declared with attribute warning: %s",
11241 exp
, identifier_to_locale (ident
),
11242 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11245 /* Check for a built-in function. */
11246 if (fndecl
&& fndecl_built_in_p (fndecl
))
11248 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11249 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11252 return expand_call (exp
, target
, ignore
);
11254 case VIEW_CONVERT_EXPR
:
11257 /* If we are converting to BLKmode, try to avoid an intermediate
11258 temporary by fetching an inner memory reference. */
11259 if (mode
== BLKmode
11260 && poly_int_tree_p (TYPE_SIZE (type
))
11261 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11262 && handled_component_p (treeop0
))
11264 machine_mode mode1
;
11265 poly_int64 bitsize
, bitpos
, bytepos
;
11267 int reversep
, volatilep
= 0;
11269 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11270 &unsignedp
, &reversep
, &volatilep
);
11272 /* ??? We should work harder and deal with non-zero offsets. */
11274 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11276 && known_size_p (bitsize
)
11277 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11279 /* See the normal_inner_ref case for the rationale. */
11281 = expand_expr_real (tem
,
11282 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11283 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11285 && modifier
!= EXPAND_STACK_PARM
11286 ? target
: NULL_RTX
),
11288 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11291 if (MEM_P (orig_op0
))
11295 /* Get a reference to just this component. */
11296 if (modifier
== EXPAND_CONST_ADDRESS
11297 || modifier
== EXPAND_SUM
11298 || modifier
== EXPAND_INITIALIZER
)
11299 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11301 op0
= adjust_address (op0
, mode
, bytepos
);
11303 if (op0
== orig_op0
)
11304 op0
= copy_rtx (op0
);
11306 set_mem_attributes (op0
, treeop0
, 0);
11307 if (REG_P (XEXP (op0
, 0)))
11308 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11310 MEM_VOLATILE_P (op0
) |= volatilep
;
11316 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11317 NULL
, inner_reference_p
);
11319 /* If the input and output modes are both the same, we are done. */
11320 if (mode
== GET_MODE (op0
))
11322 /* If neither mode is BLKmode, and both modes are the same size
11323 then we can use gen_lowpart. */
11324 else if (mode
!= BLKmode
11325 && GET_MODE (op0
) != BLKmode
11326 && known_eq (GET_MODE_PRECISION (mode
),
11327 GET_MODE_PRECISION (GET_MODE (op0
)))
11328 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11330 if (GET_CODE (op0
) == SUBREG
)
11331 op0
= force_reg (GET_MODE (op0
), op0
);
11332 temp
= gen_lowpart_common (mode
, op0
);
11337 if (!REG_P (op0
) && !MEM_P (op0
))
11338 op0
= force_reg (GET_MODE (op0
), op0
);
11339 op0
= gen_lowpart (mode
, op0
);
11342 /* If both types are integral, convert from one mode to the other. */
11343 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11344 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11345 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11346 /* If the output type is a bit-field type, do an extraction. */
11347 else if (reduce_bit_field
)
11348 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11349 TYPE_UNSIGNED (type
), NULL_RTX
,
11350 mode
, mode
, false, NULL
);
11351 /* As a last resort, spill op0 to memory, and reload it in a
11353 else if (!MEM_P (op0
))
11355 /* If the operand is not a MEM, force it into memory. Since we
11356 are going to be changing the mode of the MEM, don't call
11357 force_const_mem for constants because we don't allow pool
11358 constants to change mode. */
11359 tree inner_type
= TREE_TYPE (treeop0
);
11361 gcc_assert (!TREE_ADDRESSABLE (exp
));
11363 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11365 = assign_stack_temp_for_type
11366 (TYPE_MODE (inner_type
),
11367 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11369 emit_move_insn (target
, op0
);
11373 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11374 output type is such that the operand is known to be aligned, indicate
11375 that it is. Otherwise, we need only be concerned about alignment for
11376 non-BLKmode results. */
11379 enum insn_code icode
;
11381 if (modifier
!= EXPAND_WRITE
11382 && modifier
!= EXPAND_MEMORY
11383 && !inner_reference_p
11385 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11387 /* If the target does have special handling for unaligned
11388 loads of mode then use them. */
11389 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11390 != CODE_FOR_nothing
)
11394 op0
= adjust_address (op0
, mode
, 0);
11395 /* We've already validated the memory, and we're creating a
11396 new pseudo destination. The predicates really can't
11398 reg
= gen_reg_rtx (mode
);
11400 /* Nor can the insn generator. */
11401 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11405 else if (STRICT_ALIGNMENT
)
11407 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11408 poly_uint64 temp_size
= mode_size
;
11409 if (GET_MODE (op0
) != BLKmode
)
11410 temp_size
= upper_bound (temp_size
,
11411 GET_MODE_SIZE (GET_MODE (op0
)));
11413 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11414 rtx new_with_op0_mode
11415 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11417 gcc_assert (!TREE_ADDRESSABLE (exp
));
11419 if (GET_MODE (op0
) == BLKmode
)
11421 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11422 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11423 (modifier
== EXPAND_STACK_PARM
11424 ? BLOCK_OP_CALL_PARM
11425 : BLOCK_OP_NORMAL
));
11428 emit_move_insn (new_with_op0_mode
, op0
);
11434 op0
= adjust_address (op0
, mode
, 0);
11441 tree lhs
= treeop0
;
11442 tree rhs
= treeop1
;
11443 gcc_assert (ignore
);
11445 /* Check for |= or &= of a bitfield of size one into another bitfield
11446 of size 1. In this case, (unless we need the result of the
11447 assignment) we can do this more efficiently with a
11448 test followed by an assignment, if necessary.
11450 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11451 things change so we do, this code should be enhanced to
11453 if (TREE_CODE (lhs
) == COMPONENT_REF
11454 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11455 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11456 && TREE_OPERAND (rhs
, 0) == lhs
11457 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11458 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11459 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11461 rtx_code_label
*label
= gen_label_rtx ();
11462 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11463 profile_probability prob
= profile_probability::uninitialized ();
11465 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11467 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11468 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11470 do_pending_stack_adjust ();
11471 emit_label (label
);
11475 expand_assignment (lhs
, rhs
, false);
11480 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11482 case REALPART_EXPR
:
11483 op0
= expand_normal (treeop0
);
11484 return read_complex_part (op0
, false);
11486 case IMAGPART_EXPR
:
11487 op0
= expand_normal (treeop0
);
11488 return read_complex_part (op0
, true);
11495 /* Expanded in cfgexpand.c. */
11496 gcc_unreachable ();
11498 case TRY_CATCH_EXPR
:
11500 case EH_FILTER_EXPR
:
11501 case TRY_FINALLY_EXPR
:
11503 /* Lowered by tree-eh.c. */
11504 gcc_unreachable ();
11506 case WITH_CLEANUP_EXPR
:
11507 case CLEANUP_POINT_EXPR
:
11509 case CASE_LABEL_EXPR
:
11514 case COMPOUND_EXPR
:
11515 case PREINCREMENT_EXPR
:
11516 case PREDECREMENT_EXPR
:
11517 case POSTINCREMENT_EXPR
:
11518 case POSTDECREMENT_EXPR
:
11521 case COMPOUND_LITERAL_EXPR
:
11522 /* Lowered by gimplify.c. */
11523 gcc_unreachable ();
11526 /* Function descriptors are not valid except for as
11527 initialization constants, and should not be expanded. */
11528 gcc_unreachable ();
11530 case WITH_SIZE_EXPR
:
11531 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11532 have pulled out the size to use in whatever context it needed. */
11533 return expand_expr_real (treeop0
, original_target
, tmode
,
11534 modifier
, alt_rtl
, inner_reference_p
);
11537 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11541 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11542 signedness of TYPE), possibly returning the result in TARGET.
11543 TYPE is known to be a partial integer type. */
11545 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11547 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
11548 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11549 gcc_assert ((GET_MODE (exp
) == VOIDmode
|| GET_MODE (exp
) == mode
)
11550 && (!target
|| GET_MODE (target
) == mode
));
11552 /* For constant values, reduce using wide_int_to_tree. */
11553 if (poly_int_rtx_p (exp
))
11555 auto value
= wi::to_poly_wide (exp
, mode
);
11556 tree t
= wide_int_to_tree (type
, value
);
11557 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11559 else if (TYPE_UNSIGNED (type
))
11561 rtx mask
= immed_wide_int_const
11562 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11563 return expand_and (mode
, exp
, mask
, target
);
11567 int count
= GET_MODE_PRECISION (mode
) - prec
;
11568 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11569 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11573 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11574 when applied to the address of EXP produces an address known to be
11575 aligned more than BIGGEST_ALIGNMENT. */
11578 is_aligning_offset (const_tree offset
, const_tree exp
)
11580 /* Strip off any conversions. */
11581 while (CONVERT_EXPR_P (offset
))
11582 offset
= TREE_OPERAND (offset
, 0);
11584 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11585 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11586 if (TREE_CODE (offset
) != BIT_AND_EXPR
11587 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11588 || compare_tree_int (TREE_OPERAND (offset
, 1),
11589 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11590 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11593 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11594 It must be NEGATE_EXPR. Then strip any more conversions. */
11595 offset
= TREE_OPERAND (offset
, 0);
11596 while (CONVERT_EXPR_P (offset
))
11597 offset
= TREE_OPERAND (offset
, 0);
11599 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11602 offset
= TREE_OPERAND (offset
, 0);
11603 while (CONVERT_EXPR_P (offset
))
11604 offset
= TREE_OPERAND (offset
, 0);
11606 /* This must now be the address of EXP. */
11607 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11610 /* If EXPR is a constant initializer (either an expression or CONSTRUCTOR),
11611 attempt to obtain its native representation as an array of nonzero BYTES.
11612 Return true on success and false on failure (the latter without modifying
11616 convert_to_bytes (tree type
, tree expr
, vec
<unsigned char> *bytes
)
11618 if (TREE_CODE (expr
) == CONSTRUCTOR
)
11620 /* Set to the size of the CONSTRUCTOR elements. */
11621 unsigned HOST_WIDE_INT ctor_size
= bytes
->length ();
11623 if (TREE_CODE (type
) == ARRAY_TYPE
)
11626 tree eltype
= TREE_TYPE (type
);
11627 unsigned HOST_WIDE_INT elsize
=
11628 tree_to_uhwi (TYPE_SIZE_UNIT (eltype
));
11630 /* Jump through hoops to determine the lower bound for languages
11631 like Ada that can set it to an (almost) arbitrary value. */
11632 tree dom
= TYPE_DOMAIN (type
);
11635 tree min
= TYPE_MIN_VALUE (dom
);
11636 if (!min
|| !tree_fits_uhwi_p (min
))
11638 unsigned HOST_WIDE_INT i
, last_idx
= tree_to_uhwi (min
) - 1;
11639 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (expr
), i
, idx
, val
)
11641 /* Append zeros for elements with no initializers. */
11642 if (!tree_fits_uhwi_p (idx
))
11644 unsigned HOST_WIDE_INT cur_idx
= tree_to_uhwi (idx
);
11645 if (unsigned HOST_WIDE_INT size
= cur_idx
- (last_idx
+ 1))
11647 size
= size
* elsize
+ bytes
->length ();
11648 bytes
->safe_grow_cleared (size
, true);
11651 if (!convert_to_bytes (eltype
, val
, bytes
))
11654 last_idx
= cur_idx
;
11657 else if (TREE_CODE (type
) == RECORD_TYPE
)
11660 unsigned HOST_WIDE_INT i
;
11661 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (expr
), i
, fld
, val
)
11663 /* Append zeros for members with no initializers and
11665 unsigned HOST_WIDE_INT cur_off
= int_byte_position (fld
);
11666 if (bytes
->length () < cur_off
)
11667 bytes
->safe_grow_cleared (cur_off
, true);
11669 if (!convert_to_bytes (TREE_TYPE (val
), val
, bytes
))
11676 /* Compute the size of the COSNTRUCTOR elements. */
11677 ctor_size
= bytes
->length () - ctor_size
;
11679 /* Append zeros to the byte vector to the full size of the type.
11680 The type size can be less than the size of the CONSTRUCTOR
11681 if the latter contains initializers for a flexible array
11683 tree size
= TYPE_SIZE_UNIT (type
);
11684 unsigned HOST_WIDE_INT type_size
= tree_to_uhwi (size
);
11685 if (ctor_size
< type_size
)
11686 if (unsigned HOST_WIDE_INT size_grow
= type_size
- ctor_size
)
11687 bytes
->safe_grow_cleared (bytes
->length () + size_grow
, true);
11692 /* Except for RECORD_TYPE which may have an initialized flexible array
11693 member, the size of a type is the same as the size of the initializer
11694 (including any implicitly zeroed out members and padding). Allocate
11695 just enough for that many bytes. */
11696 tree expr_size
= TYPE_SIZE_UNIT (TREE_TYPE (expr
));
11697 if (!expr_size
|| !tree_fits_uhwi_p (expr_size
))
11699 const unsigned HOST_WIDE_INT expr_bytes
= tree_to_uhwi (expr_size
);
11700 const unsigned bytes_sofar
= bytes
->length ();
11701 /* native_encode_expr can convert at most INT_MAX bytes. vec is limited
11702 to at most UINT_MAX. */
11703 if (bytes_sofar
+ expr_bytes
> INT_MAX
)
11706 /* Unlike for RECORD_TYPE, there is no need to clear the memory since
11707 it's completely overwritten by native_encode_expr. */
11708 bytes
->safe_grow (bytes_sofar
+ expr_bytes
, true);
11709 unsigned char *pnext
= bytes
->begin () + bytes_sofar
;
11710 int nbytes
= native_encode_expr (expr
, pnext
, expr_bytes
, 0);
11711 /* NBYTES is zero on failure. Otherwise it should equal EXPR_BYTES. */
11712 return (unsigned HOST_WIDE_INT
) nbytes
== expr_bytes
;
11715 /* Return a STRING_CST corresponding to ARG's constant initializer either
11716 if it's a string constant, or, when VALREP is set, any other constant,
11718 On success, set *PTR_OFFSET to the (possibly non-constant) byte offset
11719 within the byte string that ARG is references. If nonnull set *MEM_SIZE
11720 to the size of the byte string. If nonnull, set *DECL to the constant
11721 declaration ARG refers to. */
11724 constant_byte_string (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
,
11725 bool valrep
= false)
11727 tree dummy
= NULL_TREE
;;
11731 /* Store the type of the original expression before conversions
11732 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11734 tree argtype
= TREE_TYPE (arg
);
11739 /* Non-constant index into the character array in an ARRAY_REF
11740 expression or null. */
11741 tree varidx
= NULL_TREE
;
11743 poly_int64 base_off
= 0;
11745 if (TREE_CODE (arg
) == ADDR_EXPR
)
11747 arg
= TREE_OPERAND (arg
, 0);
11749 if (TREE_CODE (arg
) == ARRAY_REF
)
11751 tree idx
= TREE_OPERAND (arg
, 1);
11752 if (TREE_CODE (idx
) != INTEGER_CST
)
11754 /* From a pointer (but not array) argument extract the variable
11755 index to prevent get_addr_base_and_unit_offset() from failing
11756 due to it. Use it later to compute the non-constant offset
11757 into the string and return it to the caller. */
11759 ref
= TREE_OPERAND (arg
, 0);
11761 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11764 if (!integer_zerop (array_ref_low_bound (arg
)))
11767 if (!integer_onep (array_ref_element_size (arg
)))
11771 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11773 || (TREE_CODE (array
) != VAR_DECL
11774 && TREE_CODE (array
) != CONST_DECL
11775 && TREE_CODE (array
) != STRING_CST
))
11778 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11780 tree arg0
= TREE_OPERAND (arg
, 0);
11781 tree arg1
= TREE_OPERAND (arg
, 1);
11784 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11787 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11793 /* Avoid pointers to arrays (see bug 86622). */
11794 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11795 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11796 && !(decl
&& !*decl
)
11797 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11798 && tree_fits_uhwi_p (*mem_size
)
11799 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11802 tree type
= TREE_TYPE (offset
);
11803 arg1
= fold_convert (type
, arg1
);
11804 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11809 else if (TREE_CODE (arg
) == SSA_NAME
)
11811 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11812 if (!is_gimple_assign (stmt
))
11815 tree rhs1
= gimple_assign_rhs1 (stmt
);
11816 tree_code code
= gimple_assign_rhs_code (stmt
);
11817 if (code
== ADDR_EXPR
)
11818 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11819 else if (code
!= POINTER_PLUS_EXPR
)
11823 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11825 /* Avoid pointers to arrays (see bug 86622). */
11826 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11827 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11828 && !(decl
&& !*decl
)
11829 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11830 && tree_fits_uhwi_p (*mem_size
)
11831 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11834 tree rhs2
= gimple_assign_rhs2 (stmt
);
11835 tree type
= TREE_TYPE (offset
);
11836 rhs2
= fold_convert (type
, rhs2
);
11837 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11842 else if (DECL_P (arg
))
11847 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11850 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11853 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11854 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11855 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11858 offset
= fold_convert (sizetype
, varidx
);
11861 if (TREE_CODE (array
) == STRING_CST
)
11863 *ptr_offset
= fold_convert (sizetype
, offset
);
11864 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11867 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11868 >= TREE_STRING_LENGTH (array
));
11872 tree init
= ctor_for_folding (array
);
11873 if (!init
|| init
== error_mark_node
)
11878 HOST_WIDE_INT cstoff
;
11879 if (!base_off
.is_constant (&cstoff
))
11882 /* If value representation was requested convert the initializer
11883 for the whole array or object into a string of bytes forming
11884 its value representation and return it. */
11885 auto_vec
<unsigned char> bytes
;
11886 if (!convert_to_bytes (TREE_TYPE (init
), init
, &bytes
))
11889 unsigned n
= bytes
.length ();
11890 const char *p
= reinterpret_cast<const char *>(bytes
.address ());
11891 init
= build_string_literal (n
, p
, char_type_node
);
11892 init
= TREE_OPERAND (init
, 0);
11893 init
= TREE_OPERAND (init
, 0);
11895 *mem_size
= size_int (TREE_STRING_LENGTH (init
));
11896 *ptr_offset
= wide_int_to_tree (ssizetype
, base_off
);
11904 if (TREE_CODE (init
) == CONSTRUCTOR
)
11906 /* Convert the 64-bit constant offset to a wider type to avoid
11907 overflow and use it to obtain the initializer for the subobject
11910 if (!base_off
.is_constant (&wioff
))
11913 wioff
*= BITS_PER_UNIT
;
11914 if (!wi::fits_uhwi_p (wioff
))
11917 base_off
= wioff
.to_uhwi ();
11918 unsigned HOST_WIDE_INT fieldoff
= 0;
11919 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
11921 if (!init
|| init
== error_mark_node
)
11924 HOST_WIDE_INT cstoff
;
11925 if (!base_off
.is_constant (&cstoff
))
11928 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11929 tree off
= build_int_cst (sizetype
, cstoff
);
11931 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11936 *ptr_offset
= offset
;
11938 tree inittype
= TREE_TYPE (init
);
11940 if (TREE_CODE (init
) == INTEGER_CST
11941 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11942 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
11944 /* For a reference to (address of) a single constant character,
11945 store the native representation of the character in CHARBUF.
11946 If the reference is to an element of an array or a member
11947 of a struct, only consider narrow characters until ctors
11948 for wide character arrays are transformed to STRING_CSTs
11949 like those for narrow arrays. */
11950 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11951 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11954 /* Construct a string literal with elements of INITTYPE and
11955 the representation above. Then strip
11956 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11957 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
11958 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11962 tree initsize
= TYPE_SIZE_UNIT (inittype
);
11964 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
11966 /* Fold an empty/zero constructor for an implicitly initialized
11967 object or subobject into the empty string. */
11969 /* Determine the character type from that of the original
11971 tree chartype
= argtype
;
11972 if (POINTER_TYPE_P (chartype
))
11973 chartype
= TREE_TYPE (chartype
);
11974 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
11975 chartype
= TREE_TYPE (chartype
);
11977 if (INTEGRAL_TYPE_P (chartype
)
11978 && TYPE_PRECISION (chartype
) == TYPE_PRECISION (char_type_node
))
11980 /* Convert a char array to an empty STRING_CST having an array
11981 of the expected type and size. */
11983 initsize
= integer_zero_node
;
11985 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
11986 init
= build_string_literal (size
, NULL
, chartype
, size
);
11987 init
= TREE_OPERAND (init
, 0);
11988 init
= TREE_OPERAND (init
, 0);
11990 *ptr_offset
= integer_zero_node
;
11997 if (TREE_CODE (init
) != STRING_CST
)
12000 *mem_size
= initsize
;
12002 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
12007 /* Return STRING_CST if an ARG corresponds to a string constant or zero
12008 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
12009 non-constant) offset in bytes within the string that ARG is accessing.
12010 If MEM_SIZE is non-zero the storage size of the memory is returned.
12011 If DECL is non-zero the constant declaration is returned if available. */
12014 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
12016 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, false);
12019 /* Similar to string_constant, return a STRING_CST corresponding
12020 to the value representation of the first argument if it's
12024 byte_representation (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
12026 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, true);
12029 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
12030 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
12031 for C2 > 0 to x & C3 == C2
12032 for C2 < 0 to x & C3 == (C2 & C3). */
12034 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12036 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12037 tree treeop0
= gimple_assign_rhs1 (stmt
);
12038 tree treeop1
= gimple_assign_rhs2 (stmt
);
12039 tree type
= TREE_TYPE (*arg0
);
12040 scalar_int_mode mode
;
12041 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12043 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12044 || TYPE_PRECISION (type
) <= 1
12045 || TYPE_UNSIGNED (type
)
12046 /* Signed x % c == 0 should have been optimized into unsigned modulo
12048 || integer_zerop (*arg1
)
12049 /* If c is known to be non-negative, modulo will be expanded as unsigned
12051 || get_range_pos_neg (treeop0
) == 1)
12054 /* x % c == d where d < 0 && d <= -c should be always false. */
12055 if (tree_int_cst_sgn (*arg1
) == -1
12056 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
12059 int prec
= TYPE_PRECISION (type
);
12060 wide_int w
= wi::to_wide (treeop1
) - 1;
12061 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
12062 tree c3
= wide_int_to_tree (type
, w
);
12064 if (tree_int_cst_sgn (*arg1
) == -1)
12065 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
12067 rtx op0
= expand_normal (treeop0
);
12068 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12070 bool speed_p
= optimize_insn_for_speed_p ();
12072 do_pending_stack_adjust ();
12074 location_t loc
= gimple_location (stmt
);
12075 struct separate_ops ops
;
12076 ops
.code
= TRUNC_MOD_EXPR
;
12077 ops
.location
= loc
;
12078 ops
.type
= TREE_TYPE (treeop0
);
12081 ops
.op2
= NULL_TREE
;
12083 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12085 rtx_insn
*moinsns
= get_insns ();
12088 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12089 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12090 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12092 ops
.code
= BIT_AND_EXPR
;
12093 ops
.location
= loc
;
12094 ops
.type
= TREE_TYPE (treeop0
);
12097 ops
.op2
= NULL_TREE
;
12099 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12101 rtx_insn
*muinsns
= get_insns ();
12104 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12105 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
12106 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
12108 if (mocost
<= mucost
)
12110 emit_insn (moinsns
);
12111 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12115 emit_insn (muinsns
);
12116 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
12121 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
12123 (X - C2) * C3 <= C4 (or >), where
12124 C3 is modular multiplicative inverse of C1 and 1<<prec and
12125 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
12126 if C2 > ((1<<prec) - 1) % C1).
12127 If C1 is even, S = ctz (C1) and C2 is 0, use
12128 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
12129 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
12131 For signed (X % C1) == 0 if C1 is odd to (all operations in it
12133 (X * C3) + C4 <= 2 * C4, where
12134 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
12135 C4 is ((1<<(prec - 1) - 1) / C1).
12136 If C1 is even, S = ctz(C1), use
12137 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
12138 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
12139 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
12141 See the Hacker's Delight book, section 10-17. */
12143 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12145 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
12146 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
12151 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12155 tree treeop0
= gimple_assign_rhs1 (stmt
);
12156 tree treeop1
= gimple_assign_rhs2 (stmt
);
12157 if (TREE_CODE (treeop0
) != SSA_NAME
12158 || TREE_CODE (treeop1
) != INTEGER_CST
12159 /* Don't optimize the undefined behavior case x % 0;
12160 x % 1 should have been optimized into zero, punt if
12161 it makes it here for whatever reason;
12162 x % -c should have been optimized into x % c. */
12163 || compare_tree_int (treeop1
, 2) <= 0
12164 /* Likewise x % c == d where d >= c should be always false. */
12165 || tree_int_cst_le (treeop1
, *arg1
))
12168 /* Unsigned x % pow2 is handled right already, for signed
12169 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
12170 if (integer_pow2p (treeop1
))
12171 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
12173 tree type
= TREE_TYPE (*arg0
);
12174 scalar_int_mode mode
;
12175 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12177 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12178 || TYPE_PRECISION (type
) <= 1)
12181 signop sgn
= UNSIGNED
;
12182 /* If both operands are known to have the sign bit clear, handle
12183 even the signed modulo case as unsigned. treeop1 is always
12184 positive >= 2, checked above. */
12185 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
12188 if (!TYPE_UNSIGNED (type
))
12190 if (tree_int_cst_sgn (*arg1
) == -1)
12192 type
= unsigned_type_for (type
);
12193 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
12197 int prec
= TYPE_PRECISION (type
);
12198 wide_int w
= wi::to_wide (treeop1
);
12199 int shift
= wi::ctz (w
);
12200 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
12201 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
12202 If C1 is odd, we can handle all cases by subtracting
12203 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
12204 e.g. by testing for overflow on the subtraction, punt on that for now
12206 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
12210 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
12211 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
12215 imm_use_iterator imm_iter
;
12216 use_operand_p use_p
;
12217 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
12219 gimple
*use_stmt
= USE_STMT (use_p
);
12220 /* Punt if treeop0 is used in the same bb in a division
12221 or another modulo with the same divisor. We should expect
12222 the division and modulo combined together. */
12223 if (use_stmt
== stmt
12224 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
12226 if (!is_gimple_assign (use_stmt
)
12227 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
12228 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
12230 if (gimple_assign_rhs1 (use_stmt
) != treeop0
12231 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
12236 w
= wi::lrshift (w
, shift
);
12237 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
12238 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
12239 wide_int m
= wide_int::from (wi::mod_inv (a
, b
), prec
, UNSIGNED
);
12240 tree c3
= wide_int_to_tree (type
, m
);
12241 tree c5
= NULL_TREE
;
12243 if (sgn
== UNSIGNED
)
12245 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
12246 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12247 otherwise use < or subtract one from C4. E.g. for
12248 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12249 x % 3U == 1 already needs to be
12250 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12251 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
12254 d
= wi::lrshift (d
, shift
);
12258 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
12260 d
= wi::lshift (e
, 1);
12263 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
12264 d
= wi::lrshift (e
, shift
- 1);
12266 c5
= wide_int_to_tree (type
, e
);
12268 tree c4
= wide_int_to_tree (type
, d
);
12270 rtx op0
= expand_normal (treeop0
);
12271 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12273 bool speed_p
= optimize_insn_for_speed_p ();
12275 do_pending_stack_adjust ();
12277 location_t loc
= gimple_location (stmt
);
12278 struct separate_ops ops
;
12279 ops
.code
= TRUNC_MOD_EXPR
;
12280 ops
.location
= loc
;
12281 ops
.type
= TREE_TYPE (treeop0
);
12284 ops
.op2
= NULL_TREE
;
12286 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12288 rtx_insn
*moinsns
= get_insns ();
12291 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12292 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12293 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12295 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12296 if (!integer_zerop (*arg1
))
12297 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12298 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12300 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12303 tree s
= build_int_cst (NULL_TREE
, shift
);
12304 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12308 rtx mur
= expand_normal (t
);
12309 rtx_insn
*muinsns
= get_insns ();
12312 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12313 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12314 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12316 if (mocost
<= mucost
)
12318 emit_insn (moinsns
);
12319 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12323 emit_insn (muinsns
);
12324 *arg0
= make_tree (type
, mur
);
12326 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12329 /* Generate code to calculate OPS, and exploded expression
12330 using a store-flag instruction and return an rtx for the result.
12331 OPS reflects a comparison.
12333 If TARGET is nonzero, store the result there if convenient.
12335 Return zero if there is no suitable set-flag instruction
12336 available on this machine.
12338 Once expand_expr has been called on the arguments of the comparison,
12339 we are committed to doing the store flag, since it is not safe to
12340 re-evaluate the expression. We emit the store-flag insn by calling
12341 emit_store_flag, but only expand the arguments if we have a reason
12342 to believe that emit_store_flag will be successful. If we think that
12343 it will, but it isn't, we have to simulate the store-flag with a
12344 set/jump/set sequence. */
12347 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
12349 enum rtx_code code
;
12350 tree arg0
, arg1
, type
;
12351 machine_mode operand_mode
;
12354 rtx subtarget
= target
;
12355 location_t loc
= ops
->location
;
12360 /* Don't crash if the comparison was erroneous. */
12361 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
12364 type
= TREE_TYPE (arg0
);
12365 operand_mode
= TYPE_MODE (type
);
12366 unsignedp
= TYPE_UNSIGNED (type
);
12368 /* We won't bother with BLKmode store-flag operations because it would mean
12369 passing a lot of information to emit_store_flag. */
12370 if (operand_mode
== BLKmode
)
12373 /* We won't bother with store-flag operations involving function pointers
12374 when function pointers must be canonicalized before comparisons. */
12375 if (targetm
.have_canonicalize_funcptr_for_compare ()
12376 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12377 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12378 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12379 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12385 /* For vector typed comparisons emit code to generate the desired
12386 all-ones or all-zeros mask. */
12387 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12389 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12390 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12391 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12392 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12394 gcc_unreachable ();
12397 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12398 into (x - C2) * C3 < C4. */
12399 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12400 && TREE_CODE (arg0
) == SSA_NAME
12401 && TREE_CODE (arg1
) == INTEGER_CST
)
12403 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
12405 if (new_code
!= ops
->code
)
12407 struct separate_ops nops
= *ops
;
12408 nops
.code
= ops
->code
= new_code
;
12411 nops
.type
= TREE_TYPE (arg0
);
12412 return do_store_flag (&nops
, target
, mode
);
12416 /* Get the rtx comparison code to use. We know that EXP is a comparison
12417 operation of some type. Some comparisons against 1 and -1 can be
12418 converted to comparisons with zero. Do so here so that the tests
12419 below will be aware that we have a comparison with zero. These
12420 tests will not catch constants in the first operand, but constants
12421 are rarely passed as the first operand. */
12432 if (integer_onep (arg1
))
12433 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12435 code
= unsignedp
? LTU
: LT
;
12438 if (! unsignedp
&& integer_all_onesp (arg1
))
12439 arg1
= integer_zero_node
, code
= LT
;
12441 code
= unsignedp
? LEU
: LE
;
12444 if (! unsignedp
&& integer_all_onesp (arg1
))
12445 arg1
= integer_zero_node
, code
= GE
;
12447 code
= unsignedp
? GTU
: GT
;
12450 if (integer_onep (arg1
))
12451 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12453 code
= unsignedp
? GEU
: GE
;
12456 case UNORDERED_EXPR
:
12482 gcc_unreachable ();
12485 /* Put a constant second. */
12486 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12487 || TREE_CODE (arg0
) == FIXED_CST
)
12489 std::swap (arg0
, arg1
);
12490 code
= swap_condition (code
);
12493 /* If this is an equality or inequality test of a single bit, we can
12494 do this by shifting the bit being tested to the low-order bit and
12495 masking the result with the constant 1. If the condition was EQ,
12496 we xor it with 1. This does not require an scc insn and is faster
12497 than an scc insn even if we have it.
12499 The code to make this transformation was moved into fold_single_bit_test,
12500 so we just call into the folder and expand its result. */
12502 if ((code
== NE
|| code
== EQ
)
12503 && integer_zerop (arg1
)
12504 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12506 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12508 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12510 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12511 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12512 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12513 gimple_assign_rhs1 (srcstmt
),
12514 gimple_assign_rhs2 (srcstmt
));
12515 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12517 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12521 if (! get_subtarget (target
)
12522 || GET_MODE (subtarget
) != operand_mode
)
12525 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12528 target
= gen_reg_rtx (mode
);
12530 /* Try a cstore if possible. */
12531 return emit_store_flag_force (target
, code
, op0
, op1
,
12532 operand_mode
, unsignedp
,
12533 (TYPE_PRECISION (ops
->type
) == 1
12534 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12537 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12538 0 otherwise (i.e. if there is no casesi instruction).
12540 DEFAULT_PROBABILITY is the probability of jumping to the default
12543 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12544 rtx table_label
, rtx default_label
, rtx fallback_label
,
12545 profile_probability default_probability
)
12547 class expand_operand ops
[5];
12548 scalar_int_mode index_mode
= SImode
;
12549 rtx op1
, op2
, index
;
12551 if (! targetm
.have_casesi ())
12554 /* The index must be some form of integer. Convert it to SImode. */
12555 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12556 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12558 rtx rangertx
= expand_normal (range
);
12560 /* We must handle the endpoints in the original mode. */
12561 index_expr
= build2 (MINUS_EXPR
, index_type
,
12562 index_expr
, minval
);
12563 minval
= integer_zero_node
;
12564 index
= expand_normal (index_expr
);
12566 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12567 omode
, 1, default_label
,
12568 default_probability
);
12569 /* Now we can safely truncate. */
12570 index
= convert_to_mode (index_mode
, index
, 0);
12574 if (omode
!= index_mode
)
12576 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12577 index_expr
= fold_convert (index_type
, index_expr
);
12580 index
= expand_normal (index_expr
);
12583 do_pending_stack_adjust ();
12585 op1
= expand_normal (minval
);
12586 op2
= expand_normal (range
);
12588 create_input_operand (&ops
[0], index
, index_mode
);
12589 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12590 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12591 create_fixed_operand (&ops
[3], table_label
);
12592 create_fixed_operand (&ops
[4], (default_label
12594 : fallback_label
));
12595 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12599 /* Attempt to generate a tablejump instruction; same concept. */
12600 /* Subroutine of the next function.
12602 INDEX is the value being switched on, with the lowest value
12603 in the table already subtracted.
12604 MODE is its expected mode (needed if INDEX is constant).
12605 RANGE is the length of the jump table.
12606 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12608 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12609 index value is out of range.
12610 DEFAULT_PROBABILITY is the probability of jumping to
12611 the default label. */
12614 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12615 rtx default_label
, profile_probability default_probability
)
12619 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12620 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12622 /* Do an unsigned comparison (in the proper mode) between the index
12623 expression and the value which represents the length of the range.
12624 Since we just finished subtracting the lower bound of the range
12625 from the index expression, this comparison allows us to simultaneously
12626 check that the original index expression value is both greater than
12627 or equal to the minimum value of the range and less than or equal to
12628 the maximum value of the range. */
12631 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12632 default_label
, default_probability
);
12634 /* If index is in range, it must fit in Pmode.
12635 Convert to Pmode so we can index with it. */
12638 unsigned int width
;
12640 /* We know the value of INDEX is between 0 and RANGE. If we have a
12641 sign-extended subreg, and RANGE does not have the sign bit set, then
12642 we have a value that is valid for both sign and zero extension. In
12643 this case, we get better code if we sign extend. */
12644 if (GET_CODE (index
) == SUBREG
12645 && SUBREG_PROMOTED_VAR_P (index
)
12646 && SUBREG_PROMOTED_SIGNED_P (index
)
12647 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12648 <= HOST_BITS_PER_WIDE_INT
)
12649 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12650 index
= convert_to_mode (Pmode
, index
, 0);
12652 index
= convert_to_mode (Pmode
, index
, 1);
12655 /* Don't let a MEM slip through, because then INDEX that comes
12656 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12657 and break_out_memory_refs will go to work on it and mess it up. */
12658 #ifdef PIC_CASE_VECTOR_ADDRESS
12659 if (flag_pic
&& !REG_P (index
))
12660 index
= copy_to_mode_reg (Pmode
, index
);
12663 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12664 GET_MODE_SIZE, because this indicates how large insns are. The other
12665 uses should all be Pmode, because they are addresses. This code
12666 could fail if addresses and insns are not the same size. */
12667 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12668 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12670 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12671 gen_rtx_LABEL_REF (Pmode
, table_label
));
12673 #ifdef PIC_CASE_VECTOR_ADDRESS
12675 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12678 index
= memory_address (CASE_VECTOR_MODE
, index
);
12679 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12680 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12681 convert_move (temp
, vector
, 0);
12683 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12685 /* If we are generating PIC code or if the table is PC-relative, the
12686 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12687 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12692 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12693 rtx table_label
, rtx default_label
,
12694 profile_probability default_probability
)
12698 if (! targetm
.have_tablejump ())
12701 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12702 fold_convert (index_type
, index_expr
),
12703 fold_convert (index_type
, minval
));
12704 index
= expand_normal (index_expr
);
12705 do_pending_stack_adjust ();
12707 do_tablejump (index
, TYPE_MODE (index_type
),
12708 convert_modes (TYPE_MODE (index_type
),
12709 TYPE_MODE (TREE_TYPE (range
)),
12710 expand_normal (range
),
12711 TYPE_UNSIGNED (TREE_TYPE (range
))),
12712 table_label
, default_label
, default_probability
);
12716 /* Return a CONST_VECTOR rtx representing vector mask for
12717 a VECTOR_CST of booleans. */
12719 const_vector_mask_from_tree (tree exp
)
12721 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12722 machine_mode inner
= GET_MODE_INNER (mode
);
12724 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12725 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12726 unsigned int count
= builder
.encoded_nelts ();
12727 for (unsigned int i
= 0; i
< count
; ++i
)
12729 tree elt
= VECTOR_CST_ELT (exp
, i
);
12730 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12731 if (integer_zerop (elt
))
12732 builder
.quick_push (CONST0_RTX (inner
));
12733 else if (integer_onep (elt
)
12734 || integer_minus_onep (elt
))
12735 builder
.quick_push (CONSTM1_RTX (inner
));
12737 gcc_unreachable ();
12739 return builder
.build ();
12742 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12743 Return a constant scalar rtx of mode MODE in which bit X is set if element
12744 X of EXP is nonzero. */
12746 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12748 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12751 /* The result has a fixed number of bits so the input must too. */
12752 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12753 for (unsigned int i
= 0; i
< nunits
; ++i
)
12755 elt
= VECTOR_CST_ELT (exp
, i
);
12756 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12757 if (integer_all_onesp (elt
))
12758 res
= wi::set_bit (res
, i
);
12760 gcc_assert (integer_zerop (elt
));
12763 return immed_wide_int_const (res
, mode
);
12766 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12768 const_vector_from_tree (tree exp
)
12770 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12772 if (initializer_zerop (exp
))
12773 return CONST0_RTX (mode
);
12775 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12776 return const_vector_mask_from_tree (exp
);
12778 machine_mode inner
= GET_MODE_INNER (mode
);
12780 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12781 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12782 unsigned int count
= builder
.encoded_nelts ();
12783 for (unsigned int i
= 0; i
< count
; ++i
)
12785 tree elt
= VECTOR_CST_ELT (exp
, i
);
12786 if (TREE_CODE (elt
) == REAL_CST
)
12787 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12789 else if (TREE_CODE (elt
) == FIXED_CST
)
12790 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12793 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12796 return builder
.build ();
12799 /* Build a decl for a personality function given a language prefix. */
12802 build_personality_function (const char *lang
)
12804 const char *unwind_and_version
;
12808 switch (targetm_common
.except_unwind_info (&global_options
))
12813 unwind_and_version
= "_sj0";
12817 unwind_and_version
= "_v0";
12820 unwind_and_version
= "_seh0";
12823 gcc_unreachable ();
12826 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12828 type
= build_function_type_list (unsigned_type_node
,
12829 integer_type_node
, integer_type_node
,
12830 long_long_unsigned_type_node
,
12831 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12832 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12833 get_identifier (name
), type
);
12834 DECL_ARTIFICIAL (decl
) = 1;
12835 DECL_EXTERNAL (decl
) = 1;
12836 TREE_PUBLIC (decl
) = 1;
12838 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12839 are the flags assigned by targetm.encode_section_info. */
12840 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12845 /* Extracts the personality function of DECL and returns the corresponding
12849 get_personality_function (tree decl
)
12851 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12852 enum eh_personality_kind pk
;
12854 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12855 if (pk
== eh_personality_none
)
12859 && pk
== eh_personality_any
)
12860 personality
= lang_hooks
.eh_personality ();
12862 if (pk
== eh_personality_lang
)
12863 gcc_assert (personality
!= NULL_TREE
);
12865 return XEXP (DECL_RTL (personality
), 0);
12868 /* Returns a tree for the size of EXP in bytes. */
12871 tree_expr_size (const_tree exp
)
12874 && DECL_SIZE_UNIT (exp
) != 0)
12875 return DECL_SIZE_UNIT (exp
);
12877 return size_in_bytes (TREE_TYPE (exp
));
12880 /* Return an rtx for the size in bytes of the value of EXP. */
12883 expr_size (tree exp
)
12887 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12888 size
= TREE_OPERAND (exp
, 1);
12891 size
= tree_expr_size (exp
);
12893 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12896 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12899 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12900 if the size can vary or is larger than an integer. */
12902 static HOST_WIDE_INT
12903 int_expr_size (tree exp
)
12907 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12908 size
= TREE_OPERAND (exp
, 1);
12911 size
= tree_expr_size (exp
);
12915 if (size
== 0 || !tree_fits_shwi_p (size
))
12918 return tree_to_shwi (size
);