2014-01-17 Richard Biener <rguenther@suse.de>
[official-gcc.git] / gcc / config / arm / arm_neon_builtins.def
bloba00951ab65b77515052601ee0c2829a43d80c8f0
1 /* NEON builtin definitions for ARM.
2 Copyright (C) 2013-2014 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 VAR10 (BINOP, vadd,
22 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
23 VAR3 (BINOP, vaddl, v8qi, v4hi, v2si),
24 VAR3 (BINOP, vaddw, v8qi, v4hi, v2si),
25 VAR6 (BINOP, vhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
26 VAR8 (BINOP, vqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
27 VAR3 (BINOP, vaddhn, v8hi, v4si, v2di),
28 VAR8 (BINOP, vmul, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
29 VAR8 (TERNOP, vmla, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
30 VAR3 (TERNOP, vmlal, v8qi, v4hi, v2si),
31 VAR2 (TERNOP, vfma, v2sf, v4sf),
32 VAR2 (TERNOP, vfms, v2sf, v4sf),
33 VAR8 (TERNOP, vmls, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
34 VAR3 (TERNOP, vmlsl, v8qi, v4hi, v2si),
35 VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si),
36 VAR2 (TERNOP, vqdmlal, v4hi, v2si),
37 VAR2 (TERNOP, vqdmlsl, v4hi, v2si),
38 VAR3 (BINOP, vmull, v8qi, v4hi, v2si),
39 VAR2 (SCALARMULL, vmull_n, v4hi, v2si),
40 VAR2 (LANEMULL, vmull_lane, v4hi, v2si),
41 VAR2 (SCALARMULL, vqdmull_n, v4hi, v2si),
42 VAR2 (LANEMULL, vqdmull_lane, v4hi, v2si),
43 VAR4 (SCALARMULH, vqdmulh_n, v4hi, v2si, v8hi, v4si),
44 VAR4 (LANEMULH, vqdmulh_lane, v4hi, v2si, v8hi, v4si),
45 VAR2 (BINOP, vqdmull, v4hi, v2si),
46 VAR8 (BINOP, vshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
47 VAR8 (BINOP, vqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
48 VAR8 (SHIFTIMM, vshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
49 VAR3 (SHIFTIMM, vshrn_n, v8hi, v4si, v2di),
50 VAR3 (SHIFTIMM, vqshrn_n, v8hi, v4si, v2di),
51 VAR3 (SHIFTIMM, vqshrun_n, v8hi, v4si, v2di),
52 VAR8 (SHIFTIMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
53 VAR8 (SHIFTIMM, vqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
54 VAR8 (SHIFTIMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
55 VAR3 (SHIFTIMM, vshll_n, v8qi, v4hi, v2si),
56 VAR8 (SHIFTACC, vsra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
57 VAR10 (BINOP, vsub, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
58 VAR3 (BINOP, vsubl, v8qi, v4hi, v2si),
59 VAR3 (BINOP, vsubw, v8qi, v4hi, v2si),
60 VAR8 (BINOP, vqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
61 VAR6 (BINOP, vhsub, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
62 VAR3 (BINOP, vsubhn, v8hi, v4si, v2di),
63 VAR8 (BINOP, vceq, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
64 VAR8 (BINOP, vcge, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
65 VAR6 (BINOP, vcgeu, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
66 VAR8 (BINOP, vcgt, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
67 VAR6 (BINOP, vcgtu, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
68 VAR2 (BINOP, vcage, v2sf, v4sf),
69 VAR2 (BINOP, vcagt, v2sf, v4sf),
70 VAR6 (BINOP, vtst, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
71 VAR8 (BINOP, vabd, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
72 VAR3 (BINOP, vabdl, v8qi, v4hi, v2si),
73 VAR6 (TERNOP, vaba, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
74 VAR3 (TERNOP, vabal, v8qi, v4hi, v2si),
75 VAR8 (BINOP, vmax, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
76 VAR8 (BINOP, vmin, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
77 VAR4 (BINOP, vpadd, v8qi, v4hi, v2si, v2sf),
78 VAR6 (UNOP, vpaddl, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
79 VAR6 (BINOP, vpadal, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
80 VAR4 (BINOP, vpmax, v8qi, v4hi, v2si, v2sf),
81 VAR4 (BINOP, vpmin, v8qi, v4hi, v2si, v2sf),
82 VAR2 (BINOP, vrecps, v2sf, v4sf),
83 VAR2 (BINOP, vrsqrts, v2sf, v4sf),
84 VAR8 (SHIFTINSERT, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
85 VAR8 (SHIFTINSERT, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di),
86 VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
87 VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
88 VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
89 VAR6 (UNOP, vqneg, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
90 VAR6 (UNOP, vcls, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
91 VAR6 (UNOP, vclz, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
92 VAR2 (UNOP, vcnt, v8qi, v16qi),
93 VAR4 (UNOP, vrecpe, v2si, v2sf, v4si, v4sf),
94 VAR4 (UNOP, vrsqrte, v2si, v2sf, v4si, v4sf),
95 VAR6 (UNOP, vmvn, v8qi, v4hi, v2si, v16qi, v8hi, v4si),
96 /* FIXME: vget_lane supports more variants than this! */
97 VAR10 (GETLANE, vget_lane,
98 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
99 VAR10 (SETLANE, vset_lane,
100 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
101 VAR5 (CREATE, vcreate, v8qi, v4hi, v2si, v2sf, di),
102 VAR10 (DUP, vdup_n,
103 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
104 VAR10 (DUPLANE, vdup_lane,
105 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
106 VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di),
107 VAR5 (SPLIT, vget_high, v16qi, v8hi, v4si, v4sf, v2di),
108 VAR5 (SPLIT, vget_low, v16qi, v8hi, v4si, v4sf, v2di),
109 VAR3 (UNOP, vmovn, v8hi, v4si, v2di),
110 VAR3 (UNOP, vqmovn, v8hi, v4si, v2di),
111 VAR3 (UNOP, vqmovun, v8hi, v4si, v2di),
112 VAR3 (UNOP, vmovl, v8qi, v4hi, v2si),
113 VAR6 (LANEMUL, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
114 VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
115 VAR2 (LANEMAC, vmlal_lane, v4hi, v2si),
116 VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si),
117 VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
118 VAR2 (LANEMAC, vmlsl_lane, v4hi, v2si),
119 VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si),
120 VAR6 (SCALARMUL, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
121 VAR6 (SCALARMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
122 VAR2 (SCALARMAC, vmlal_n, v4hi, v2si),
123 VAR2 (SCALARMAC, vqdmlal_n, v4hi, v2si),
124 VAR6 (SCALARMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
125 VAR2 (SCALARMAC, vmlsl_n, v4hi, v2si),
126 VAR2 (SCALARMAC, vqdmlsl_n, v4hi, v2si),
127 VAR10 (BINOP, vext,
128 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
129 VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
130 VAR4 (UNOP, vrev32, v8qi, v4hi, v16qi, v8hi),
131 VAR2 (UNOP, vrev16, v8qi, v16qi),
132 VAR4 (CONVERT, vcvt, v2si, v2sf, v4si, v4sf),
133 VAR4 (FIXCONV, vcvt_n, v2si, v2sf, v4si, v4sf),
134 VAR1 (FLOAT_WIDEN, vcvtv4sf, v4hf),
135 VAR1 (FLOAT_NARROW, vcvtv4hf, v4sf),
136 VAR10 (SELECT, vbsl,
137 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
138 VAR2 (RINT, vrintn, v2sf, v4sf),
139 VAR2 (RINT, vrinta, v2sf, v4sf),
140 VAR2 (RINT, vrintp, v2sf, v4sf),
141 VAR2 (RINT, vrintm, v2sf, v4sf),
142 VAR2 (RINT, vrintz, v2sf, v4sf),
143 VAR2 (RINT, vrintx, v2sf, v4sf),
144 VAR1 (VTBL, vtbl1, v8qi),
145 VAR1 (VTBL, vtbl2, v8qi),
146 VAR1 (VTBL, vtbl3, v8qi),
147 VAR1 (VTBL, vtbl4, v8qi),
148 VAR1 (VTBX, vtbx1, v8qi),
149 VAR1 (VTBX, vtbx2, v8qi),
150 VAR1 (VTBX, vtbx3, v8qi),
151 VAR1 (VTBX, vtbx4, v8qi),
152 VAR8 (RESULTPAIR, vtrn, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
153 VAR8 (RESULTPAIR, vzip, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
154 VAR8 (RESULTPAIR, vuzp, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf),
155 VAR5 (REINTERP, vreinterpretv8qi, v8qi, v4hi, v2si, v2sf, di),
156 VAR5 (REINTERP, vreinterpretv4hi, v8qi, v4hi, v2si, v2sf, di),
157 VAR5 (REINTERP, vreinterpretv2si, v8qi, v4hi, v2si, v2sf, di),
158 VAR5 (REINTERP, vreinterpretv2sf, v8qi, v4hi, v2si, v2sf, di),
159 VAR5 (REINTERP, vreinterpretdi, v8qi, v4hi, v2si, v2sf, di),
160 VAR6 (REINTERP, vreinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di, ti),
161 VAR6 (REINTERP, vreinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di, ti),
162 VAR6 (REINTERP, vreinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di, ti),
163 VAR6 (REINTERP, vreinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di, ti),
164 VAR6 (REINTERP, vreinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di, ti),
165 VAR6 (REINTERP, vreinterpretti, v16qi, v8hi, v4si, v4sf, v2di, ti),
166 VAR10 (LOAD1, vld1,
167 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
168 VAR10 (LOAD1LANE, vld1_lane,
169 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
170 VAR10 (LOAD1, vld1_dup,
171 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
172 VAR10 (STORE1, vst1,
173 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
174 VAR10 (STORE1LANE, vst1_lane,
175 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
176 VAR9 (LOADSTRUCT,
177 vld2, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf),
178 VAR7 (LOADSTRUCTLANE, vld2_lane,
179 v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
180 VAR5 (LOADSTRUCT, vld2_dup, v8qi, v4hi, v2si, v2sf, di),
181 VAR9 (STORESTRUCT, vst2,
182 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf),
183 VAR7 (STORESTRUCTLANE, vst2_lane,
184 v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
185 VAR9 (LOADSTRUCT,
186 vld3, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf),
187 VAR7 (LOADSTRUCTLANE, vld3_lane,
188 v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
189 VAR5 (LOADSTRUCT, vld3_dup, v8qi, v4hi, v2si, v2sf, di),
190 VAR9 (STORESTRUCT, vst3,
191 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf),
192 VAR7 (STORESTRUCTLANE, vst3_lane,
193 v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
194 VAR9 (LOADSTRUCT, vld4,
195 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf),
196 VAR7 (LOADSTRUCTLANE, vld4_lane,
197 v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
198 VAR5 (LOADSTRUCT, vld4_dup, v8qi, v4hi, v2si, v2sf, di),
199 VAR9 (STORESTRUCT, vst4,
200 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf),
201 VAR7 (STORESTRUCTLANE, vst4_lane,
202 v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf),
203 VAR10 (LOGICBINOP, vand,
204 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
205 VAR10 (LOGICBINOP, vorr,
206 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
207 VAR10 (BINOP, veor,
208 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
209 VAR10 (LOGICBINOP, vbic,
210 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di),
211 VAR10 (LOGICBINOP, vorn,
212 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)