gcc/config/arm/aarch-cost-tables.h

   1 /* RTX cost tables shared between arm and aarch64.
   2
   3    Copyright (C) 2013-2014 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef GCC_AARCH_COST_TABLES_H
  23 #define GCC_AARCH_COST_TABLES_H
  24
  25 const struct cpu_cost_table generic_extra_costs =
  26 {
  27   /* ALU */
  28   {
  29     0,                  /* Arith.  */
  30     0,                  /* Logical.  */
  31     0,                  /* Shift.  */
  32     COSTS_N_INSNS (1),  /* Shift_reg.  */
  33     0,                  /* Arith_shift.  */
  34     COSTS_N_INSNS (1),  /* Arith_shift_reg.  */
  35     0,                  /* Log_shift.  */
  36     COSTS_N_INSNS (1),  /* Log_shift_reg.  */
  37     0,                  /* Extend.  */
  38     COSTS_N_INSNS (1),  /* Extend_arith.  */
  39     0,                  /* Bfi.  */
  40     0,                  /* Bfx.  */
  41     0,                  /* Clz.  */
  42     COSTS_N_INSNS (1),  /* non_exec.  */
  43     false               /* non_exec_costs_exec.  */
  44   },
  45   {
  46     /* MULT SImode */
  47     {
  48       COSTS_N_INSNS (2),        /* Simple.  */
  49       COSTS_N_INSNS (1),        /* Flag_setting.  */
  50       COSTS_N_INSNS (2),        /* Extend.  */
  51       COSTS_N_INSNS (3),        /* Add.  */
  52       COSTS_N_INSNS (3),        /* Extend_add.  */
  53       COSTS_N_INSNS (8)         /* Idiv.  */
  54     },
  55     /* MULT DImode */
  56     {
  57       0,                        /* Simple (N/A).  */
  58       0,                        /* Flag_setting (N/A).  */
  59       COSTS_N_INSNS (2),        /* Extend.  */
  60       0,                        /* Add (N/A).  */
  61       COSTS_N_INSNS (3),        /* Extend_add.  */
  62       0                         /* Idiv (N/A).  */
  63     }
  64   },
  65   /* LD/ST */
  66   {
  67     COSTS_N_INSNS (2),  /* Load.  */
  68     COSTS_N_INSNS (2),  /* Load_sign_extend.  */
  69     COSTS_N_INSNS (3),  /* Ldrd.  */
  70     COSTS_N_INSNS (2),  /* Ldm_1st.  */
  71     1,                  /* Ldm_regs_per_insn_1st.  */
  72     1,                  /* Ldm_regs_per_insn_subsequent.  */
  73     COSTS_N_INSNS (2),  /* Loadf.  */
  74     COSTS_N_INSNS (3),  /* Loadd.  */
  75     COSTS_N_INSNS (1),  /* Load_unaligned.  */
  76     COSTS_N_INSNS (2),  /* Store.  */
  77     COSTS_N_INSNS (3),  /* Strd.  */
  78     COSTS_N_INSNS (2),  /* Stm_1st.  */
  79     1,                  /* Stm_regs_per_insn_1st.  */
  80     1,                  /* Stm_regs_per_insn_subsequent.  */
  81     COSTS_N_INSNS (2),  /* Storef.  */
  82     COSTS_N_INSNS (3),  /* Stored.  */
  83     COSTS_N_INSNS (1)  /* Store_unaligned.  */
  84   },
  85   {
  86     /* FP SFmode */
  87     {
  88       COSTS_N_INSNS (7),        /* Div.  */
  89       COSTS_N_INSNS (2),        /* Mult.  */
  90       COSTS_N_INSNS (3),        /* Mult_addsub.  */
  91       COSTS_N_INSNS (3),        /* Fma.  */
  92       COSTS_N_INSNS (1),        /* Addsub.  */
  93       0,                        /* Fpconst.  */
  94       0,                        /* Neg.  */
  95       0,                        /* Compare.  */
  96       0,                        /* Widen.  */
  97       0,                        /* Narrow.  */
  98       0,                        /* Toint.  */
  99       0,                        /* Fromint.  */
 100       0                         /* Roundint.  */
 101     },
 102     /* FP DFmode */
 103     {
 104       COSTS_N_INSNS (15),       /* Div.  */
 105       COSTS_N_INSNS (5),        /* Mult.  */
 106       COSTS_N_INSNS (7),        /* Mult_addsub.  */
 107       COSTS_N_INSNS (7),        /* Fma.  */
 108       COSTS_N_INSNS (3),        /* Addsub.  */
 109       0,                        /* Fpconst.  */
 110       0,                        /* Neg.  */
 111       0,                        /* Compare.  */
 112       0,                        /* Widen.  */
 113       0,                        /* Narrow.  */
 114       0,                        /* Toint.  */
 115       0,                        /* Fromint.  */
 116       0                         /* Roundint.  */
 117     }
 118   },
 119   /* Vector */
 120   {
 121     COSTS_N_INSNS (1)   /* Alu.  */
 122   }
 123 };
 124
 125 const struct cpu_cost_table cortexa53_extra_costs =
 126 {
 127   /* ALU */
 128   {
 129     0,                  /* Arith.  */
 130     0,                  /* Logical.  */
 131     COSTS_N_INSNS (1),  /* Shift.  */
 132     COSTS_N_INSNS (2),  /* Shift_reg.  */
 133     COSTS_N_INSNS (1),  /* Arith_shift.  */
 134     COSTS_N_INSNS (2),  /* Arith_shift_reg.  */
 135     COSTS_N_INSNS (1),  /* Log_shift.  */
 136     COSTS_N_INSNS (2),  /* Log_shift_reg.  */
 137     0,                  /* Extend.  */
 138     COSTS_N_INSNS (1),  /* Extend_arith.  */
 139     COSTS_N_INSNS (1),  /* Bfi.  */
 140     COSTS_N_INSNS (1),  /* Bfx.  */
 141     0,                  /* Clz.  */
 142     0,                  /* non_exec.  */
 143     true                /* non_exec_costs_exec.  */
 144   },
 145   {
 146     /* MULT SImode */
 147     {
 148       COSTS_N_INSNS (1),        /* Simple.  */
 149       COSTS_N_INSNS (2),        /* Flag_setting.  */
 150       COSTS_N_INSNS (1),        /* Extend.  */
 151       COSTS_N_INSNS (1),        /* Add.  */
 152       COSTS_N_INSNS (1),        /* Extend_add.  */
 153       COSTS_N_INSNS (7)         /* Idiv.  */
 154     },
 155     /* MULT DImode */
 156     {
 157       COSTS_N_INSNS (2),        /* Simple.  */
 158       0,                        /* Flag_setting (N/A).  */
 159       COSTS_N_INSNS (2),        /* Extend.  */
 160       COSTS_N_INSNS (2),        /* Add.  */
 161       COSTS_N_INSNS (2),        /* Extend_add.  */
 162       COSTS_N_INSNS (15)        /* Idiv.  */
 163     }
 164   },
 165   /* LD/ST */
 166   {
 167     COSTS_N_INSNS (1),          /* Load.  */
 168     COSTS_N_INSNS (1),          /* Load_sign_extend.  */
 169     COSTS_N_INSNS (1),          /* Ldrd.  */
 170     COSTS_N_INSNS (1),          /* Ldm_1st.  */
 171     1,                          /* Ldm_regs_per_insn_1st.  */
 172     2,                          /* Ldm_regs_per_insn_subsequent.  */
 173     COSTS_N_INSNS (1),          /* Loadf.  */
 174     COSTS_N_INSNS (1),          /* Loadd.  */
 175     COSTS_N_INSNS (1),          /* Load_unaligned.  */
 176     0,                          /* Store.  */
 177     0,                          /* Strd.  */
 178     0,                          /* Stm_1st.  */
 179     1,                          /* Stm_regs_per_insn_1st.  */
 180     2,                          /* Stm_regs_per_insn_subsequent.  */
 181     0,                          /* Storef.  */
 182     0,                          /* Stored.  */
 183     COSTS_N_INSNS (1)           /* Store_unaligned.  */
 184   },
 185   {
 186     /* FP SFmode */
 187     {
 188       COSTS_N_INSNS (15),       /* Div.  */
 189       COSTS_N_INSNS (3),        /* Mult.  */
 190       COSTS_N_INSNS (7),        /* Mult_addsub. */
 191       COSTS_N_INSNS (7),        /* Fma.  */
 192       COSTS_N_INSNS (3),        /* Addsub.  */
 193       COSTS_N_INSNS (1),        /* Fpconst. */
 194       COSTS_N_INSNS (2),        /* Neg.  */
 195       COSTS_N_INSNS (1),        /* Compare.  */
 196       COSTS_N_INSNS (3),        /* Widen.  */
 197       COSTS_N_INSNS (3),        /* Narrow.  */
 198       COSTS_N_INSNS (3),        /* Toint.  */
 199       COSTS_N_INSNS (3),        /* Fromint.  */
 200       COSTS_N_INSNS (3)         /* Roundint.  */
 201     },
 202     /* FP DFmode */
 203     {
 204       COSTS_N_INSNS (30),       /* Div.  */
 205       COSTS_N_INSNS (3),        /* Mult.  */
 206       COSTS_N_INSNS (7),        /* Mult_addsub.  */
 207       COSTS_N_INSNS (7),        /* Fma.  */
 208       COSTS_N_INSNS (3),        /* Addsub.  */
 209       COSTS_N_INSNS (1),        /* Fpconst.  */
 210       COSTS_N_INSNS (2),        /* Neg.  */
 211       COSTS_N_INSNS (1),        /* Compare.  */
 212       COSTS_N_INSNS (3),        /* Widen.  */
 213       COSTS_N_INSNS (3),        /* Narrow.  */
 214       COSTS_N_INSNS (3),        /* Toint.  */
 215       COSTS_N_INSNS (3),        /* Fromint.  */
 216       COSTS_N_INSNS (3)         /* Roundint.  */
 217     }
 218   },
 219   /* Vector */
 220   {
 221     COSTS_N_INSNS (1)   /* Alu.  */
 222   }
 223 };
 224
 225
 226 #endif /* GCC_AARCH_COST_TABLES_H */
 227