1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "c-family/c-common.h"
30 #include "target-def.h"
32 #include "c-family/c-pragma.h"
34 static bool ix86_pragma_target_parse (tree
, tree
);
35 static void ix86_target_macros_internal
36 (HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
37 void (*def_or_undef
) (cpp_reader
*, const char *));
40 /* Internal function to either define or undef the appropriate system
43 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
44 enum processor_type arch
,
45 enum processor_type tune
,
46 enum fpmath_unit fpmath
,
47 void (*def_or_undef
) (cpp_reader
*,
50 /* For some of the k6/pentium varients there weren't separate ISA bits to
51 identify which tune/arch flag was passed, so figure it out here. */
52 size_t arch_len
= strlen (ix86_arch_string
);
53 size_t tune_len
= strlen (ix86_tune_string
);
54 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
55 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
57 /* Built-ins based on -march=. */
63 def_or_undef (parse_in
, "__i486");
64 def_or_undef (parse_in
, "__i486__");
66 case PROCESSOR_PENTIUM
:
67 def_or_undef (parse_in
, "__i586");
68 def_or_undef (parse_in
, "__i586__");
69 def_or_undef (parse_in
, "__pentium");
70 def_or_undef (parse_in
, "__pentium__");
71 if (isa_flag
& OPTION_MASK_ISA_MMX
)
72 def_or_undef (parse_in
, "__pentium_mmx__");
74 case PROCESSOR_PENTIUMPRO
:
75 def_or_undef (parse_in
, "__i686");
76 def_or_undef (parse_in
, "__i686__");
77 def_or_undef (parse_in
, "__pentiumpro");
78 def_or_undef (parse_in
, "__pentiumpro__");
81 def_or_undef (parse_in
, "__geode");
82 def_or_undef (parse_in
, "__geode__");
85 def_or_undef (parse_in
, "__k6");
86 def_or_undef (parse_in
, "__k6__");
87 if (last_arch_char
== '2')
88 def_or_undef (parse_in
, "__k6_2__");
89 else if (last_arch_char
== '3')
90 def_or_undef (parse_in
, "__k6_3__");
91 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
92 def_or_undef (parse_in
, "__k6_3__");
94 case PROCESSOR_ATHLON
:
95 def_or_undef (parse_in
, "__athlon");
96 def_or_undef (parse_in
, "__athlon__");
97 if (isa_flag
& OPTION_MASK_ISA_SSE
)
98 def_or_undef (parse_in
, "__athlon_sse__");
101 def_or_undef (parse_in
, "__k8");
102 def_or_undef (parse_in
, "__k8__");
104 case PROCESSOR_AMDFAM10
:
105 def_or_undef (parse_in
, "__amdfam10");
106 def_or_undef (parse_in
, "__amdfam10__");
108 case PROCESSOR_BDVER1
:
109 def_or_undef (parse_in
, "__bdver1");
110 def_or_undef (parse_in
, "__bdver1__");
112 case PROCESSOR_BDVER2
:
113 def_or_undef (parse_in
, "__bdver2");
114 def_or_undef (parse_in
, "__bdver2__");
116 case PROCESSOR_BDVER3
:
117 def_or_undef (parse_in
, "__bdver3");
118 def_or_undef (parse_in
, "__bdver3__");
120 case PROCESSOR_BTVER1
:
121 def_or_undef (parse_in
, "__btver1");
122 def_or_undef (parse_in
, "__btver1__");
124 case PROCESSOR_BTVER2
:
125 def_or_undef (parse_in
, "__btver2");
126 def_or_undef (parse_in
, "__btver2__");
128 case PROCESSOR_PENTIUM4
:
129 def_or_undef (parse_in
, "__pentium4");
130 def_or_undef (parse_in
, "__pentium4__");
132 case PROCESSOR_NOCONA
:
133 def_or_undef (parse_in
, "__nocona");
134 def_or_undef (parse_in
, "__nocona__");
136 case PROCESSOR_CORE2
:
137 def_or_undef (parse_in
, "__core2");
138 def_or_undef (parse_in
, "__core2__");
140 case PROCESSOR_COREI7
:
141 def_or_undef (parse_in
, "__corei7");
142 def_or_undef (parse_in
, "__corei7__");
144 case PROCESSOR_HASWELL
:
145 def_or_undef (parse_in
, "__core_avx2");
146 def_or_undef (parse_in
, "__core_avx2__");
149 def_or_undef (parse_in
, "__atom");
150 def_or_undef (parse_in
, "__atom__");
152 /* use PROCESSOR_max to not set/unset the arch macro. */
155 case PROCESSOR_GENERIC32
:
156 case PROCESSOR_GENERIC64
:
160 /* Built-ins based on -mtune=. */
164 def_or_undef (parse_in
, "__tune_i386__");
167 def_or_undef (parse_in
, "__tune_i486__");
169 case PROCESSOR_PENTIUM
:
170 def_or_undef (parse_in
, "__tune_i586__");
171 def_or_undef (parse_in
, "__tune_pentium__");
172 if (last_tune_char
== 'x')
173 def_or_undef (parse_in
, "__tune_pentium_mmx__");
175 case PROCESSOR_PENTIUMPRO
:
176 def_or_undef (parse_in
, "__tune_i686__");
177 def_or_undef (parse_in
, "__tune_pentiumpro__");
178 switch (last_tune_char
)
181 def_or_undef (parse_in
, "__tune_pentium3__");
184 def_or_undef (parse_in
, "__tune_pentium2__");
188 case PROCESSOR_GEODE
:
189 def_or_undef (parse_in
, "__tune_geode__");
192 def_or_undef (parse_in
, "__tune_k6__");
193 if (last_tune_char
== '2')
194 def_or_undef (parse_in
, "__tune_k6_2__");
195 else if (last_tune_char
== '3')
196 def_or_undef (parse_in
, "__tune_k6_3__");
197 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
198 def_or_undef (parse_in
, "__tune_k6_3__");
200 case PROCESSOR_ATHLON
:
201 def_or_undef (parse_in
, "__tune_athlon__");
202 if (isa_flag
& OPTION_MASK_ISA_SSE
)
203 def_or_undef (parse_in
, "__tune_athlon_sse__");
206 def_or_undef (parse_in
, "__tune_k8__");
208 case PROCESSOR_AMDFAM10
:
209 def_or_undef (parse_in
, "__tune_amdfam10__");
211 case PROCESSOR_BDVER1
:
212 def_or_undef (parse_in
, "__tune_bdver1__");
214 case PROCESSOR_BDVER2
:
215 def_or_undef (parse_in
, "__tune_bdver2__");
217 case PROCESSOR_BDVER3
:
218 def_or_undef (parse_in
, "__tune_bdver3__");
220 case PROCESSOR_BTVER1
:
221 def_or_undef (parse_in
, "__tune_btver1__");
223 case PROCESSOR_BTVER2
:
224 def_or_undef (parse_in
, "__tune_btver2__");
226 case PROCESSOR_PENTIUM4
:
227 def_or_undef (parse_in
, "__tune_pentium4__");
229 case PROCESSOR_NOCONA
:
230 def_or_undef (parse_in
, "__tune_nocona__");
232 case PROCESSOR_CORE2
:
233 def_or_undef (parse_in
, "__tune_core2__");
235 case PROCESSOR_COREI7
:
236 def_or_undef (parse_in
, "__tune_corei7__");
238 case PROCESSOR_HASWELL
:
239 def_or_undef (parse_in
, "__tune_core_avx2__");
242 def_or_undef (parse_in
, "__tune_atom__");
244 case PROCESSOR_GENERIC32
:
245 case PROCESSOR_GENERIC64
:
247 /* use PROCESSOR_max to not set/unset the tune macro. */
256 def_or_undef (parse_in
, "__code_model_small__");
260 def_or_undef (parse_in
, "__code_model_medium__");
264 def_or_undef (parse_in
, "__code_model_large__");
267 def_or_undef (parse_in
, "__code_model_32__");
270 def_or_undef (parse_in
, "__code_model_kernel__");
276 if (isa_flag
& OPTION_MASK_ISA_MMX
)
277 def_or_undef (parse_in
, "__MMX__");
278 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
279 def_or_undef (parse_in
, "__3dNOW__");
280 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
281 def_or_undef (parse_in
, "__3dNOW_A__");
282 if (isa_flag
& OPTION_MASK_ISA_SSE
)
283 def_or_undef (parse_in
, "__SSE__");
284 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
285 def_or_undef (parse_in
, "__SSE2__");
286 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
287 def_or_undef (parse_in
, "__SSE3__");
288 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
289 def_or_undef (parse_in
, "__SSSE3__");
290 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
291 def_or_undef (parse_in
, "__SSE4_1__");
292 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
293 def_or_undef (parse_in
, "__SSE4_2__");
294 if (isa_flag
& OPTION_MASK_ISA_AES
)
295 def_or_undef (parse_in
, "__AES__");
296 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
297 def_or_undef (parse_in
, "__PCLMUL__");
298 if (isa_flag
& OPTION_MASK_ISA_AVX
)
299 def_or_undef (parse_in
, "__AVX__");
300 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
301 def_or_undef (parse_in
, "__AVX2__");
302 if (isa_flag
& OPTION_MASK_ISA_FMA
)
303 def_or_undef (parse_in
, "__FMA__");
304 if (isa_flag
& OPTION_MASK_ISA_RTM
)
305 def_or_undef (parse_in
, "__RTM__");
306 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
307 def_or_undef (parse_in
, "__SSE4A__");
308 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
309 def_or_undef (parse_in
, "__FMA4__");
310 if (isa_flag
& OPTION_MASK_ISA_XOP
)
311 def_or_undef (parse_in
, "__XOP__");
312 if (isa_flag
& OPTION_MASK_ISA_LWP
)
313 def_or_undef (parse_in
, "__LWP__");
314 if (isa_flag
& OPTION_MASK_ISA_ABM
)
315 def_or_undef (parse_in
, "__ABM__");
316 if (isa_flag
& OPTION_MASK_ISA_BMI
)
317 def_or_undef (parse_in
, "__BMI__");
318 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
319 def_or_undef (parse_in
, "__BMI2__");
320 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
321 def_or_undef (parse_in
, "__LZCNT__");
322 if (isa_flag
& OPTION_MASK_ISA_TBM
)
323 def_or_undef (parse_in
, "__TBM__");
324 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
325 def_or_undef (parse_in
, "__POPCNT__");
326 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
327 def_or_undef (parse_in
, "__FSGSBASE__");
328 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
329 def_or_undef (parse_in
, "__RDRND__");
330 if (isa_flag
& OPTION_MASK_ISA_F16C
)
331 def_or_undef (parse_in
, "__F16C__");
332 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
333 def_or_undef (parse_in
, "__RDSEED__");
334 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
335 def_or_undef (parse_in
, "__PRFCHW__");
336 if (isa_flag
& OPTION_MASK_ISA_ADX
)
337 def_or_undef (parse_in
, "__ADX__");
338 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
339 def_or_undef (parse_in
, "__FXSR__");
340 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
341 def_or_undef (parse_in
, "__XSAVE__");
342 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
343 def_or_undef (parse_in
, "__XSAVEOPT__");
344 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
345 def_or_undef (parse_in
, "__SSE_MATH__");
346 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
347 def_or_undef (parse_in
, "__SSE2_MATH__");
351 /* Hook to validate the current #pragma GCC target and set the state, and
352 update the macros based on what was changed. If ARGS is NULL, then
353 POP_TARGET is used to reset the options. */
356 ix86_pragma_target_parse (tree args
, tree pop_target
)
358 tree prev_tree
= build_target_option_node ();
360 struct cl_target_option
*prev_opt
;
361 struct cl_target_option
*cur_opt
;
362 HOST_WIDE_INT prev_isa
;
363 HOST_WIDE_INT cur_isa
;
364 HOST_WIDE_INT diff_isa
;
365 enum processor_type prev_arch
;
366 enum processor_type prev_tune
;
367 enum processor_type cur_arch
;
368 enum processor_type cur_tune
;
372 cur_tree
= ((pop_target
)
374 : target_option_default_node
);
375 cl_target_option_restore (&global_options
,
376 TREE_TARGET_OPTION (cur_tree
));
380 cur_tree
= ix86_valid_target_attribute_tree (args
);
385 target_option_current_node
= cur_tree
;
387 /* Figure out the previous/current isa, arch, tune and the differences. */
388 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
389 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
390 prev_isa
= prev_opt
->x_ix86_isa_flags
;
391 cur_isa
= cur_opt
->x_ix86_isa_flags
;
392 diff_isa
= (prev_isa
^ cur_isa
);
393 prev_arch
= (enum processor_type
) prev_opt
->arch
;
394 prev_tune
= (enum processor_type
) prev_opt
->tune
;
395 cur_arch
= (enum processor_type
) cur_opt
->arch
;
396 cur_tune
= (enum processor_type
) cur_opt
->tune
;
398 /* If the same processor is used for both previous and current options, don't
399 change the macros. */
400 if (cur_arch
== prev_arch
)
401 cur_arch
= prev_arch
= PROCESSOR_max
;
403 if (cur_tune
== prev_tune
)
404 cur_tune
= prev_tune
= PROCESSOR_max
;
406 /* Undef all of the macros for that are no longer current. */
407 ix86_target_macros_internal (prev_isa
& diff_isa
,
410 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
413 /* Define all of the macros for new options that were just turned on. */
414 ix86_target_macros_internal (cur_isa
& diff_isa
,
417 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
423 /* Function to tell the preprocessor about the defines for the current target. */
426 ix86_target_macros (void)
428 /* 32/64-bit won't change with target specific options, so do the assert and
429 builtin_define_std calls here. */
432 cpp_assert (parse_in
, "cpu=x86_64");
433 cpp_assert (parse_in
, "machine=x86_64");
434 cpp_define (parse_in
, "__amd64");
435 cpp_define (parse_in
, "__amd64__");
436 cpp_define (parse_in
, "__x86_64");
437 cpp_define (parse_in
, "__x86_64__");
440 cpp_define (parse_in
, "_ILP32");
441 cpp_define (parse_in
, "__ILP32__");
446 cpp_assert (parse_in
, "cpu=i386");
447 cpp_assert (parse_in
, "machine=i386");
448 builtin_define_std ("i386");
451 if (TARGET_LONG_DOUBLE_64
)
452 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
454 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
455 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
457 ix86_target_macros_internal (ix86_isa_flags
,
465 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
466 option here rather than in i386.c since it will pull in various preprocessor
467 functions, and those are not present in languages like fortran without a
471 ix86_register_pragmas (void)
473 /* Update pragma hook to allow parsing #pragma GCC target. */
474 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
476 #ifdef REGISTER_SUBTARGET_PRAGMAS
477 REGISTER_SUBTARGET_PRAGMAS ();