1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "coretypes.h"
32 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
34 #include "insn-config.h"
38 #include "hard-reg-set.h"
42 #include "basic-block.h"
47 #include "tree-pass.h"
50 static int perhaps_ends_bb_p (rtx
);
51 static int optimize_reg_copy_1 (rtx
, rtx
, rtx
);
52 static void optimize_reg_copy_2 (rtx
, rtx
, rtx
);
53 static void optimize_reg_copy_3 (rtx
, rtx
, rtx
);
54 static void copy_src_to_dest (rtx
, rtx
, rtx
);
57 int with
[MAX_RECOG_OPERANDS
];
58 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
59 int commutative
[MAX_RECOG_OPERANDS
];
60 int early_clobber
[MAX_RECOG_OPERANDS
];
63 static rtx
discover_flags_reg (void);
64 static void mark_flags_life_zones (rtx
);
65 static void flags_set_1 (rtx
, const_rtx
, void *);
67 static int try_auto_increment (rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int);
68 static int find_matches (rtx
, struct match
*);
69 static void replace_in_call_usage (rtx
*, unsigned int, rtx
, rtx
);
70 static int fixup_match_1 (rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int);
71 static int stable_and_no_regs_but_for_p (rtx
, rtx
, rtx
);
72 static int regclass_compatible_p (int, int);
73 static int replacement_quality (rtx
);
74 static int fixup_match_2 (rtx
, rtx
, rtx
, rtx
);
76 /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
77 causing too much register allocation problems. */
79 regclass_compatible_p (int class0
, int class1
)
81 return (class0
== class1
82 || (reg_class_subset_p (class0
, class1
)
83 && ! CLASS_LIKELY_SPILLED_P (class0
))
84 || (reg_class_subset_p (class1
, class0
)
85 && ! CLASS_LIKELY_SPILLED_P (class1
)));
88 /* Find the place in the rtx X where REG is used as a memory address.
89 Return the MEM rtx that so uses it.
90 If PLUSCONST is nonzero, search instead for a memory address equivalent to
91 (plus REG (const_int PLUSCONST)).
93 If such an address does not appear, return 0.
94 If REG appears more than once, or is used other than in such an address,
98 find_use_as_address (rtx x
, rtx reg
, HOST_WIDE_INT plusconst
)
100 enum rtx_code code
= GET_CODE (x
);
101 const char * const fmt
= GET_RTX_FORMAT (code
);
106 if (code
== MEM
&& XEXP (x
, 0) == reg
&& plusconst
== 0)
109 if (code
== MEM
&& GET_CODE (XEXP (x
, 0)) == PLUS
110 && XEXP (XEXP (x
, 0), 0) == reg
111 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
112 && INTVAL (XEXP (XEXP (x
, 0), 1)) == plusconst
)
115 if (code
== SIGN_EXTRACT
|| code
== ZERO_EXTRACT
)
117 /* If REG occurs inside a MEM used in a bit-field reference,
118 that is unacceptable. */
119 if (find_use_as_address (XEXP (x
, 0), reg
, 0) != 0)
120 return (rtx
) (size_t) 1;
124 return (rtx
) (size_t) 1;
126 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
130 tem
= find_use_as_address (XEXP (x
, i
), reg
, plusconst
);
134 return (rtx
) (size_t) 1;
136 else if (fmt
[i
] == 'E')
139 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
141 tem
= find_use_as_address (XVECEXP (x
, i
, j
), reg
, plusconst
);
145 return (rtx
) (size_t) 1;
154 /* INC_INSN is an instruction that adds INCREMENT to REG.
155 Try to fold INC_INSN as a post/pre in/decrement into INSN.
156 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
157 Return nonzero for success. */
159 try_auto_increment (rtx insn
, rtx inc_insn
, rtx inc_insn_set
, rtx reg
,
160 HOST_WIDE_INT increment
, int pre
)
162 enum rtx_code inc_code
;
164 rtx pset
= single_set (insn
);
167 /* Can't use the size of SET_SRC, we might have something like
168 (sign_extend:SI (mem:QI ... */
169 rtx use
= find_use_as_address (pset
, reg
, 0);
170 if (use
!= 0 && use
!= (rtx
) (size_t) 1)
172 int size
= GET_MODE_SIZE (GET_MODE (use
));
174 || (HAVE_POST_INCREMENT
175 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
176 || (HAVE_PRE_INCREMENT
177 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
178 || (HAVE_POST_DECREMENT
179 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
180 || (HAVE_PRE_DECREMENT
181 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
187 &SET_SRC (inc_insn_set
),
188 XEXP (SET_SRC (inc_insn_set
), 0), 1);
189 validate_change (insn
, &XEXP (use
, 0),
190 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
191 if (apply_change_group ())
193 /* If there is a REG_DEAD note on this insn, we must
194 change this not to REG_UNUSED meaning that the register
195 is set, but the value is dead. Failure to do so will
196 result in sched1 dying -- when it recomputes lifetime
197 information, the number of REG_DEAD notes will have
199 rtx note
= find_reg_note (insn
, REG_DEAD
, reg
);
201 PUT_MODE (note
, REG_UNUSED
);
203 add_reg_note (insn
, REG_INC
, reg
);
206 delete_insn (inc_insn
);
215 /* Determine if the pattern generated by add_optab has a clobber,
216 such as might be issued for a flags hard register. To make the
217 code elsewhere simpler, we handle cc0 in this same framework.
219 Return the register if one was discovered. Return NULL_RTX if
220 if no flags were found. Return pc_rtx if we got confused. */
223 discover_flags_reg (void)
226 tmp
= gen_rtx_REG (word_mode
, 10000);
227 tmp
= gen_add3_insn (tmp
, tmp
, const2_rtx
);
229 /* If we get something that isn't a simple set, or a
230 [(set ..) (clobber ..)], this whole function will go wrong. */
231 if (GET_CODE (tmp
) == SET
)
233 else if (GET_CODE (tmp
) == PARALLEL
)
237 if (XVECLEN (tmp
, 0) != 2)
239 tmp
= XVECEXP (tmp
, 0, 1);
240 if (GET_CODE (tmp
) != CLOBBER
)
244 /* Don't do anything foolish if the md wanted to clobber a
245 scratch or something. We only care about hard regs.
246 Moreover we don't like the notion of subregs of hard regs. */
247 if (GET_CODE (tmp
) == SUBREG
248 && REG_P (SUBREG_REG (tmp
))
249 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
251 found
= (REG_P (tmp
) && REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
253 return (found
? tmp
: NULL_RTX
);
259 /* It is a tedious task identifying when the flags register is live and
260 when it is safe to optimize. Since we process the instruction stream
261 multiple times, locate and record these live zones by marking the
262 mode of the instructions --
264 QImode is used on the instruction at which the flags becomes live.
266 HImode is used within the range (exclusive) that the flags are
267 live. Thus the user of the flags is not marked.
269 All other instructions are cleared to VOIDmode. */
271 /* Used to communicate with flags_set_1. */
272 static rtx flags_set_1_rtx
;
273 static int flags_set_1_set
;
276 mark_flags_life_zones (rtx flags
)
283 /* If we found a flags register on a cc0 host, bail. */
284 if (flags
== NULL_RTX
)
286 else if (flags
!= cc0_rtx
)
290 /* Simple cases first: if no flags, clear all modes. If confusing,
291 mark the entire function as being in a flags shadow. */
292 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
294 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
296 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
297 PUT_MODE (insn
, mode
);
305 flags_regno
= REGNO (flags
);
306 flags_nregs
= hard_regno_nregs
[flags_regno
][GET_MODE (flags
)];
308 flags_set_1_rtx
= flags
;
310 /* Process each basic block. */
311 FOR_EACH_BB_REVERSE (block
)
316 insn
= BB_HEAD (block
);
317 end
= BB_END (block
);
319 /* Look out for the (unlikely) case of flags being live across
320 basic block boundaries. */
325 for (i
= 0; i
< flags_nregs
; ++i
)
326 live
|= REGNO_REG_SET_P (df_get_live_in (block
), flags_regno
+ i
);
332 /* Process liveness in reverse order of importance --
333 alive, death, birth. This lets more important info
334 overwrite the mode of lesser info. */
339 /* In the cc0 case, death is not marked in reg notes,
340 but is instead the mere use of cc0 when it is alive. */
341 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
344 /* In the hard reg case, we watch death notes. */
345 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
348 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
350 /* In either case, birth is denoted simply by its presence
351 as the destination of a set. */
353 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
357 PUT_MODE (insn
, QImode
);
361 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
365 insn
= NEXT_INSN (insn
);
370 /* A subroutine of mark_flags_life_zones, called through note_stores. */
373 flags_set_1 (rtx x
, const_rtx pat
, void *data ATTRIBUTE_UNUSED
)
375 if (GET_CODE (pat
) == SET
376 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
380 static int *regno_src_regno
;
382 /* Indicate how good a choice REG (which appears as a source) is to replace
383 a destination register with. The higher the returned value, the better
384 the choice. The main objective is to avoid using a register that is
385 a candidate for tying to a hard register, since the output might in
386 turn be a candidate to be tied to a different hard register. */
388 replacement_quality (rtx reg
)
392 /* Bad if this isn't a register at all. */
396 /* If this register is not meant to get a hard register,
397 it is a poor choice. */
398 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
401 src_regno
= regno_src_regno
[REGNO (reg
)];
403 /* If it was not copied from another register, it is fine. */
407 /* Copied from a hard register? */
408 if (src_regno
< FIRST_PSEUDO_REGISTER
)
411 /* Copied from a pseudo register - not as bad as from a hard register,
412 yet still cumbersome, since the register live length will be lengthened
413 when the registers get tied. */
417 /* Return 1 if INSN might end a basic block. */
419 static int perhaps_ends_bb_p (rtx insn
)
421 switch (GET_CODE (insn
))
425 /* These always end a basic block. */
429 /* A CALL_INSN might be the last insn of a basic block, if it is inside
430 an EH region or if there are nonlocal gotos. Note that this test is
431 very conservative. */
432 if (nonlocal_goto_handler_labels
)
436 return can_throw_internal (insn
);
440 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
443 Search forward to see if SRC dies before either it or DEST is modified,
444 but don't scan past the end of a basic block. If so, we can replace SRC
445 with DEST and let SRC die in INSN.
447 This will reduce the number of registers live in that range and may enable
448 DEST to be tied to SRC, thus often saving one register in addition to a
449 register-register copy. */
452 optimize_reg_copy_1 (rtx insn
, rtx dest
, rtx src
)
457 int sregno
= REGNO (src
);
458 int dregno
= REGNO (dest
);
460 /* We don't want to mess with hard regs if register classes are small. */
462 || (SMALL_REGISTER_CLASSES
463 && (sregno
< FIRST_PSEUDO_REGISTER
464 || dregno
< FIRST_PSEUDO_REGISTER
))
465 /* We don't see all updates to SP if they are in an auto-inc memory
466 reference, so we must disallow this optimization on them. */
467 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
470 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
472 /* ??? We can't scan past the end of a basic block without updating
473 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
474 if (perhaps_ends_bb_p (p
))
476 else if (! INSN_P (p
))
479 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
480 /* If SRC is an asm-declared register, it must not be replaced
481 in any asm. Unfortunately, the REG_EXPR tree for the asm
482 variable may be absent in the SRC rtx, so we can't check the
483 actual register declaration easily (the asm operand will have
484 it, though). To avoid complicating the test for a rare case,
485 we just don't perform register replacement for a hard reg
486 mentioned in an asm. */
487 || (sregno
< FIRST_PSEUDO_REGISTER
488 && asm_noperands (PATTERN (p
)) >= 0
489 && reg_overlap_mentioned_p (src
, PATTERN (p
)))
490 /* Don't change hard registers used by a call. */
491 || (CALL_P (p
) && sregno
< FIRST_PSEUDO_REGISTER
492 && find_reg_fusage (p
, USE
, src
))
493 /* Don't change a USE of a register. */
494 || (GET_CODE (PATTERN (p
)) == USE
495 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
498 /* See if all of SRC dies in P. This test is slightly more
499 conservative than it needs to be. */
500 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
501 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
508 int s_freq_calls
= 0;
509 int d_freq_calls
= 0;
511 /* We can do the optimization. Scan forward from INSN again,
512 replacing regs as we go. Set FAILED if a replacement can't
513 be done. In that case, we can't move the death note for SRC.
514 This should be rare. */
516 /* Set to stop at next insn. */
517 for (q
= next_real_insn (insn
);
518 q
!= next_real_insn (p
);
519 q
= next_real_insn (q
))
521 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
523 /* If SRC is a hard register, we might miss some
524 overlapping registers with validate_replace_rtx,
525 so we would have to undo it. We can't if DEST is
526 present in the insn, so fail in that combination
528 if (sregno
< FIRST_PSEUDO_REGISTER
529 && reg_mentioned_p (dest
, PATTERN (q
)))
532 /* Attempt to replace all uses. */
533 else if (!validate_replace_rtx (src
, dest
, q
))
536 /* If this succeeded, but some part of the register
537 is still present, undo the replacement. */
538 else if (sregno
< FIRST_PSEUDO_REGISTER
539 && reg_overlap_mentioned_p (src
, PATTERN (q
)))
541 validate_replace_rtx (dest
, src
, q
);
546 /* For SREGNO, count the total number of insns scanned.
547 For DREGNO, count the total number of insns scanned after
548 passing the death note for DREGNO. */
553 /* If the insn in which SRC dies is a CALL_INSN, don't count it
554 as a call that has been crossed. Otherwise, count it. */
555 if (q
!= p
&& CALL_P (q
))
557 /* Similarly, total calls for SREGNO, total calls beyond
558 the death note for DREGNO. */
560 s_freq_calls
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (q
));
564 d_freq_calls
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (q
));
568 /* If DEST dies here, remove the death note and save it for
569 later. Make sure ALL of DEST dies here; again, this is
570 overly conservative. */
572 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
574 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
575 failed
= 1, dest_death
= 0;
577 remove_note (q
, dest_death
);
583 /* These counters need to be updated if and only if we are
584 going to move the REG_DEAD note. */
585 if (sregno
>= FIRST_PSEUDO_REGISTER
)
587 if (REG_LIVE_LENGTH (sregno
) >= 0)
589 REG_LIVE_LENGTH (sregno
) -= s_length
;
590 /* REG_LIVE_LENGTH is only an approximation after
591 combine if sched is not run, so make sure that we
592 still have a reasonable value. */
593 if (REG_LIVE_LENGTH (sregno
) < 2)
594 REG_LIVE_LENGTH (sregno
) = 2;
597 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
598 REG_FREQ_CALLS_CROSSED (sregno
) -= s_freq_calls
;
601 /* Move death note of SRC from P to INSN. */
602 remove_note (p
, note
);
603 XEXP (note
, 1) = REG_NOTES (insn
);
604 REG_NOTES (insn
) = note
;
607 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
609 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
611 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
612 remove_note (insn
, dest_death
);
615 /* Put death note of DEST on P if we saw it die. */
618 XEXP (dest_death
, 1) = REG_NOTES (p
);
619 REG_NOTES (p
) = dest_death
;
621 if (dregno
>= FIRST_PSEUDO_REGISTER
)
623 /* If and only if we are moving the death note for DREGNO,
624 then we need to update its counters. */
625 if (REG_LIVE_LENGTH (dregno
) >= 0)
626 REG_LIVE_LENGTH (dregno
) += d_length
;
627 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
628 REG_FREQ_CALLS_CROSSED (dregno
) += d_freq_calls
;
635 /* If SRC is a hard register which is set or killed in some other
636 way, we can't do this optimization. */
637 else if (sregno
< FIRST_PSEUDO_REGISTER
638 && dead_or_set_p (p
, src
))
644 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
645 a sequence of insns that modify DEST followed by an insn that sets
646 SRC to DEST in which DEST dies, with no prior modification of DEST.
647 (There is no need to check if the insns in between actually modify
648 DEST. We should not have cases where DEST is not modified, but
649 the optimization is safe if no such modification is detected.)
650 In that case, we can replace all uses of DEST, starting with INSN and
651 ending with the set of SRC to DEST, with SRC. We do not do this
652 optimization if a CALL_INSN is crossed unless SRC already crosses a
653 call or if DEST dies before the copy back to SRC.
655 It is assumed that DEST and SRC are pseudos; it is too complicated to do
656 this for hard registers since the substitutions we may make might fail. */
659 optimize_reg_copy_2 (rtx insn
, rtx dest
, rtx src
)
663 int sregno
= REGNO (src
);
664 int dregno
= REGNO (dest
);
666 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
668 /* ??? We can't scan past the end of a basic block without updating
669 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
670 if (perhaps_ends_bb_p (p
))
672 else if (! INSN_P (p
))
675 set
= single_set (p
);
676 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
677 && find_reg_note (p
, REG_DEAD
, dest
))
679 /* We can do the optimization. Scan forward from INSN again,
680 replacing regs as we go. */
682 /* Set to stop at next insn. */
683 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
686 if (reg_mentioned_p (dest
, PATTERN (q
)))
688 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
694 int freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (q
));
695 REG_N_CALLS_CROSSED (dregno
)--;
696 REG_N_CALLS_CROSSED (sregno
)++;
697 REG_FREQ_CALLS_CROSSED (dregno
) -= freq
;
698 REG_FREQ_CALLS_CROSSED (sregno
) += freq
;
702 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
703 REG_N_DEATHS (dregno
)--;
704 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
705 REG_N_DEATHS (sregno
)--;
709 if (reg_set_p (src
, p
)
710 || find_reg_note (p
, REG_DEAD
, dest
)
711 || (CALL_P (p
) && REG_N_CALLS_CROSSED (sregno
) == 0))
716 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
717 Look if SRC dies there, and if it is only set once, by loading
718 it from memory. If so, try to incorporate the zero/sign extension
719 into the memory read, change SRC to the mode of DEST, and alter
720 the remaining accesses to use the appropriate SUBREG. This allows
721 SRC and DEST to be tied later. */
723 optimize_reg_copy_3 (rtx insn
, rtx dest
, rtx src
)
725 rtx src_reg
= XEXP (src
, 0);
726 int src_no
= REGNO (src_reg
);
727 int dst_no
= REGNO (dest
);
729 enum machine_mode old_mode
;
731 if (src_no
< FIRST_PSEUDO_REGISTER
732 || dst_no
< FIRST_PSEUDO_REGISTER
733 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
734 || REG_N_DEATHS (src_no
) != 1
735 || REG_N_SETS (src_no
) != 1)
737 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
738 /* ??? We can't scan past the end of a basic block without updating
739 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
740 if (perhaps_ends_bb_p (p
))
746 if (! (set
= single_set (p
))
747 || !MEM_P (SET_SRC (set
))
748 /* If there's a REG_EQUIV note, this must be an insn that loads an
749 argument. Prefer keeping the note over doing this optimization. */
750 || find_reg_note (p
, REG_EQUIV
, NULL_RTX
)
751 || SET_DEST (set
) != src_reg
)
754 /* Be conservative: although this optimization is also valid for
755 volatile memory references, that could cause trouble in later passes. */
756 if (MEM_VOLATILE_P (SET_SRC (set
)))
759 /* Do not use a SUBREG to truncate from one mode to another if truncation
761 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
762 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
763 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
766 old_mode
= GET_MODE (src_reg
);
767 PUT_MODE (src_reg
, GET_MODE (src
));
768 XEXP (src
, 0) = SET_SRC (set
);
770 /* Include this change in the group so that it's easily undone if
771 one of the changes in the group is invalid. */
772 validate_change (p
, &SET_SRC (set
), src
, 1);
774 /* Now walk forward making additional replacements. We want to be able
775 to undo all the changes if a later substitution fails. */
776 while (p
= NEXT_INSN (p
), p
!= insn
)
781 /* Make a tentative change. */
782 validate_replace_rtx_group (src_reg
,
783 gen_lowpart_SUBREG (old_mode
, src_reg
),
787 validate_replace_rtx_group (src
, src_reg
, insn
);
789 /* Now see if all the changes are valid. */
790 if (! apply_change_group ())
792 /* One or more changes were no good. Back out everything. */
793 PUT_MODE (src_reg
, old_mode
);
794 XEXP (src
, 0) = src_reg
;
798 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
800 remove_note (p
, note
);
805 /* If we were not able to update the users of src to use dest directly, try
806 instead moving the value to dest directly before the operation. */
809 copy_src_to_dest (rtx insn
, rtx src
, rtx dest
)
823 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
824 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
825 parameter when there is no frame pointer that is not allocated a register.
826 For now, we just reject them, rather than incrementing the live length. */
829 && REG_LIVE_LENGTH (REGNO (src
)) > 0
831 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
832 && (set
= single_set (insn
)) != NULL_RTX
833 && !reg_mentioned_p (dest
, SET_SRC (set
))
834 && GET_MODE (src
) == GET_MODE (dest
))
836 int old_num_regs
= reg_rtx_no
;
838 /* Generate the src->dest move. */
840 emit_move_insn (dest
, src
);
843 /* If this sequence uses new registers, we may not use it. */
844 if (old_num_regs
!= reg_rtx_no
845 || ! validate_replace_rtx (src
, dest
, insn
))
847 /* We have to restore reg_rtx_no to its old value, lest
848 recompute_reg_usage will try to compute the usage of the
849 new regs, yet reg_n_info is not valid for them. */
850 reg_rtx_no
= old_num_regs
;
853 emit_insn_before (seq
, insn
);
854 move_insn
= PREV_INSN (insn
);
855 p_move_notes
= ®_NOTES (move_insn
);
856 p_insn_notes
= ®_NOTES (insn
);
858 /* Move any notes mentioning src to the move instruction. */
859 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
861 next
= XEXP (link
, 1);
862 if (XEXP (link
, 0) == src
)
864 *p_move_notes
= link
;
865 p_move_notes
= &XEXP (link
, 1);
869 *p_insn_notes
= link
;
870 p_insn_notes
= &XEXP (link
, 1);
874 *p_move_notes
= NULL_RTX
;
875 *p_insn_notes
= NULL_RTX
;
877 insn_uid
= INSN_UID (insn
);
878 move_uid
= INSN_UID (move_insn
);
880 /* Update the various register tables. */
881 dest_regno
= REGNO (dest
);
882 INC_REG_N_SETS (dest_regno
, 1);
883 REG_LIVE_LENGTH (dest_regno
)++;
884 src_regno
= REGNO (src
);
885 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
886 REG_LIVE_LENGTH (src_regno
)++;
890 /* reg_set_in_bb[REGNO] points to basic block iff the register is set
891 only once in the given block and has REG_EQUAL note. */
893 basic_block
*reg_set_in_bb
;
895 /* Size of reg_set_in_bb array. */
896 static unsigned int max_reg_computed
;
899 /* Return whether REG is set in only one location, and is set to a
900 constant, but is set in a different basic block from INSN (an
901 instructions which uses REG). In this case REG is equivalent to a
902 constant, and we don't want to break that equivalence, because that
903 may increase register pressure and make reload harder. If REG is
904 set in the same basic block as INSN, we don't worry about it,
905 because we'll probably need a register anyhow (??? but what if REG
906 is used in a different basic block as well as this one?). */
909 reg_is_remote_constant_p (rtx reg
, rtx insn
)
917 max_reg_computed
= max
= max_reg_num ();
918 reg_set_in_bb
= XCNEWVEC (basic_block
, max
);
928 /* This is the instruction which sets REG. If there is a
929 REG_EQUAL note, then REG is equivalent to a constant. */
931 && REG_P (SET_DEST (s
))
932 && REG_N_SETS (REGNO (SET_DEST (s
))) == 1
933 && find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
934 reg_set_in_bb
[REGNO (SET_DEST (s
))] = bb
;
938 gcc_assert (REGNO (reg
) < max_reg_computed
);
939 if (reg_set_in_bb
[REGNO (reg
)] == NULL
)
941 return (reg_set_in_bb
[REGNO (reg
)] != BLOCK_FOR_INSN (insn
));
944 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
945 another add immediate instruction with the same source and dest registers,
946 and if we find one, we change INSN to an increment, and return 1. If
947 no changes are made, we return 0.
950 (set (reg100) (plus reg1 offset1))
952 (set (reg100) (plus reg1 offset2))
954 (set (reg100) (plus reg1 offset1))
956 (set (reg100) (plus reg100 offset2-offset1)) */
958 /* ??? What does this comment mean? */
959 /* cse disrupts preincrement / postdecrement sequences when it finds a
960 hard register as ultimate source, like the frame pointer. */
963 fixup_match_2 (rtx insn
, rtx dst
, rtx src
, rtx offset
)
965 rtx p
, dst_death
= 0;
966 int length
, num_calls
= 0, freq_calls
= 0;
968 /* If SRC dies in INSN, we'd have to move the death note. This is
969 considered to be very unlikely, so we just skip the optimization
971 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
974 /* Scan backward to find the first instruction that sets DST. */
976 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
980 /* ??? We can't scan past the end of a basic block without updating
981 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
982 if (perhaps_ends_bb_p (p
))
984 else if (! INSN_P (p
))
987 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
992 pset
= single_set (p
);
993 if (pset
&& SET_DEST (pset
) == dst
994 && GET_CODE (SET_SRC (pset
)) == PLUS
995 && XEXP (SET_SRC (pset
), 0) == src
996 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
998 HOST_WIDE_INT newconst
999 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
1000 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
1002 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
1004 /* Remove the death note for DST from DST_DEATH. */
1007 remove_death (REGNO (dst
), dst_death
);
1008 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
1009 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
1010 REG_FREQ_CALLS_CROSSED (REGNO (dst
)) += freq_calls
;
1015 "Fixed operand of insn %d.\n",
1019 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1026 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1028 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
1033 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1040 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1042 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1051 if (reg_set_p (dst
, PATTERN (p
)))
1054 /* If we have passed a call instruction, and the
1055 pseudo-reg SRC is not already live across a call,
1056 then don't perform the optimization. */
1057 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1058 hard regs are clobbered. Thus, we only use it for src for
1065 freq_calls
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p
));
1068 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1071 if (call_used_regs
[REGNO (dst
)]
1072 || find_reg_fusage (p
, CLOBBER
, dst
))
1075 else if (reg_set_p (src
, PATTERN (p
)))
1082 /* Main entry for the register move optimization.
1083 F is the first instruction.
1084 NREGS is one plus the highest pseudo-reg number used in the instruction.
1085 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1086 (or 0 if none should be output). */
1089 regmove_optimize (rtx f
, int nregs
)
1095 rtx copy_src
, copy_dst
;
1097 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1098 confused by non-call exceptions ending blocks. */
1099 if (flag_non_call_exceptions
)
1102 df_note_add_problem ();
1105 regstat_init_n_sets_and_refs ();
1106 regstat_compute_ri ();
1108 /* Find out where a potential flags register is live, and so that we
1109 can suppress some optimizations in those zones. */
1110 mark_flags_life_zones (discover_flags_reg ());
1112 regno_src_regno
= XNEWVEC (int, nregs
);
1113 for (i
= nregs
; --i
>= 0; )
1114 regno_src_regno
[i
] = -1;
1116 /* A forward/backward pass. Replace output operands with input operands. */
1118 for (pass
= 0; pass
<= 2; pass
++)
1120 /* We need fewer optimizations for IRA. */
1121 if ((! flag_regmove
|| flag_ira
) && pass
>= flag_expensive_optimizations
)
1125 fprintf (dump_file
, "Starting %s pass...\n",
1126 pass
? "backward" : "forward");
1128 for (insn
= pass
? get_last_insn () : f
; insn
;
1129 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1132 int op_no
, match_no
;
1134 set
= single_set (insn
);
1138 if (flag_expensive_optimizations
&& ! pass
1139 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1140 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1141 && REG_P (XEXP (SET_SRC (set
), 0))
1142 && REG_P (SET_DEST (set
)))
1143 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1145 if (flag_expensive_optimizations
&& ! pass
1146 && REG_P (SET_SRC (set
))
1147 && REG_P (SET_DEST (set
)))
1149 /* If this is a register-register copy where SRC is not dead,
1150 see if we can optimize it. If this optimization succeeds,
1151 it will become a copy where SRC is dead. */
1152 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1153 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1154 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1156 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1157 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1158 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1159 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1160 && SET_SRC (set
) != SET_DEST (set
))
1162 int srcregno
= REGNO (SET_SRC (set
));
1163 if (regno_src_regno
[srcregno
] >= 0)
1164 srcregno
= regno_src_regno
[srcregno
];
1165 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1170 /* All optimizations important for IRA have been done. */
1171 if (! flag_regmove
|| flag_ira
)
1174 if (! find_matches (insn
, &match
))
1177 /* Now scan through the operands looking for a source operand
1178 which is supposed to match the destination operand.
1179 Then scan forward for an instruction which uses the dest
1181 If it dies there, then replace the dest in both operands with
1182 the source operand. */
1184 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1186 rtx src
, dst
, src_subreg
;
1187 enum reg_class src_class
, dst_class
;
1189 match_no
= match
.with
[op_no
];
1191 /* Nothing to do if the two operands aren't supposed to match. */
1195 src
= recog_data
.operand
[op_no
];
1196 dst
= recog_data
.operand
[match_no
];
1202 if (GET_CODE (dst
) == SUBREG
1203 && GET_MODE_SIZE (GET_MODE (dst
))
1204 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1206 dst
= SUBREG_REG (dst
);
1207 src_subreg
= lowpart_subreg (GET_MODE (dst
),
1208 src
, GET_MODE (src
));
1213 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1216 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1218 if (match
.commutative
[op_no
] < op_no
)
1219 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1223 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1226 /* op_no/src must be a read-only operand, and
1227 match_operand/dst must be a write-only operand. */
1228 if (match
.use
[op_no
] != READ
1229 || match
.use
[match_no
] != WRITE
)
1232 if (match
.early_clobber
[match_no
]
1233 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1236 /* Make sure match_operand is the destination. */
1237 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1240 /* If the operands already match, then there is nothing to do. */
1241 if (operands_match_p (src
, dst
))
1244 /* But in the commutative case, we might find a better match. */
1245 if (match
.commutative
[op_no
] >= 0)
1247 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1248 if (operands_match_p (comm
, dst
)
1249 && (replacement_quality (comm
)
1250 >= replacement_quality (src
)))
1254 src_class
= reg_preferred_class (REGNO (src
));
1255 dst_class
= reg_preferred_class (REGNO (dst
));
1256 if (! regclass_compatible_p (src_class
, dst_class
))
1259 if (GET_MODE (src
) != GET_MODE (dst
))
1262 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1269 /* A backward pass. Replace input operands with output operands. */
1272 fprintf (dump_file
, "Starting backward pass...\n");
1274 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1278 int op_no
, match_no
;
1281 if (! find_matches (insn
, &match
))
1284 /* Now scan through the operands looking for a destination operand
1285 which is supposed to match a source operand.
1286 Then scan backward for an instruction which sets the source
1287 operand. If safe, then replace the source operand with the
1288 dest operand in both instructions. */
1290 copy_src
= NULL_RTX
;
1291 copy_dst
= NULL_RTX
;
1292 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1294 rtx set
, p
, src
, dst
;
1295 rtx src_note
, dst_note
;
1296 int num_calls
= 0, freq_calls
= 0;
1297 enum reg_class src_class
, dst_class
;
1300 match_no
= match
.with
[op_no
];
1302 /* Nothing to do if the two operands aren't supposed to match. */
1306 dst
= recog_data
.operand
[match_no
];
1307 src
= recog_data
.operand
[op_no
];
1313 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1314 || REG_LIVE_LENGTH (REGNO (dst
)) < 0
1315 || GET_MODE (src
) != GET_MODE (dst
))
1318 /* If the operands already match, then there is nothing to do. */
1319 if (operands_match_p (src
, dst
))
1322 if (match
.commutative
[op_no
] >= 0)
1324 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1325 if (operands_match_p (comm
, dst
))
1329 set
= single_set (insn
);
1333 /* Note that single_set ignores parts of a parallel set for
1334 which one of the destinations is REG_UNUSED. We can't
1335 handle that here, since we can wind up rewriting things
1336 such that a single register is set twice within a single
1338 if (reg_set_p (src
, insn
))
1341 /* match_no/dst must be a write-only operand, and
1342 operand_operand/src must be a read-only operand. */
1343 if (match
.use
[op_no
] != READ
1344 || match
.use
[match_no
] != WRITE
)
1347 if (match
.early_clobber
[match_no
]
1348 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1351 /* Make sure match_no is the destination. */
1352 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1355 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1357 if (GET_CODE (SET_SRC (set
)) == PLUS
1358 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1359 && XEXP (SET_SRC (set
), 0) == src
1360 && fixup_match_2 (insn
, dst
, src
,
1361 XEXP (SET_SRC (set
), 1)))
1365 src_class
= reg_preferred_class (REGNO (src
));
1366 dst_class
= reg_preferred_class (REGNO (dst
));
1368 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1370 /* We used to force the copy here like in other cases, but
1371 it produces worse code, as it eliminates no copy
1372 instructions and the copy emitted will be produced by
1373 reload anyway. On patterns with multiple alternatives,
1374 there may be better solution available.
1376 In particular this change produced slower code for numeric
1382 if (! regclass_compatible_p (src_class
, dst_class
))
1392 /* Can not modify an earlier insn to set dst if this insn
1393 uses an old value in the source. */
1394 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1404 /* If src is set once in a different basic block,
1405 and is set equal to a constant, then do not use
1406 it for this optimization, as this would make it
1407 no longer equivalent to a constant. */
1409 if (reg_is_remote_constant_p (src
, insn
))
1422 "Could fix operand %d of insn %d matching operand %d.\n",
1423 op_no
, INSN_UID (insn
), match_no
);
1425 /* Scan backward to find the first instruction that uses
1426 the input operand. If the operand is set here, then
1427 replace it in both instructions with match_no. */
1429 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1433 /* ??? We can't scan past the end of a basic block without
1434 updating the register lifetime info
1435 (REG_DEAD/basic_block_live_at_start). */
1436 if (perhaps_ends_bb_p (p
))
1438 else if (! INSN_P (p
))
1443 /* ??? See if all of SRC is set in P. This test is much
1444 more conservative than it needs to be. */
1445 pset
= single_set (p
);
1446 if (pset
&& SET_DEST (pset
) == src
)
1448 /* We use validate_replace_rtx, in case there
1449 are multiple identical source operands. All of
1450 them have to be changed at the same time. */
1451 if (validate_replace_rtx (src
, dst
, insn
))
1453 if (validate_change (p
, &SET_DEST (pset
),
1458 /* Change all source operands back.
1459 This modifies the dst as a side-effect. */
1460 validate_replace_rtx (dst
, src
, insn
);
1461 /* Now make sure the dst is right. */
1462 validate_change (insn
,
1463 recog_data
.operand_loc
[match_no
],
1470 /* We can't make this change if SRC is read or
1471 partially written in P, since we are going to
1472 eliminate SRC. We can't make this change
1473 if DST is mentioned at all in P,
1474 since we are going to change its value. */
1475 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1476 || reg_mentioned_p (dst
, PATTERN (p
)))
1479 /* If we have passed a call instruction, and the
1480 pseudo-reg DST is not already live across a call,
1481 then don't perform the optimization. */
1485 freq_calls
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p
));
1487 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1496 /* Remove the death note for SRC from INSN. */
1497 remove_note (insn
, src_note
);
1498 /* Move the death note for SRC to P if it is used
1500 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1502 XEXP (src_note
, 1) = REG_NOTES (p
);
1503 REG_NOTES (p
) = src_note
;
1505 /* If there is a REG_DEAD note for DST on P, then remove
1506 it, because DST is now set there. */
1507 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1508 remove_note (p
, dst_note
);
1510 dstno
= REGNO (dst
);
1511 srcno
= REGNO (src
);
1513 INC_REG_N_SETS (dstno
, 1);
1514 INC_REG_N_SETS (srcno
, -1);
1516 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1517 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1518 REG_FREQ_CALLS_CROSSED (dstno
) += freq_calls
;
1519 REG_FREQ_CALLS_CROSSED (srcno
) -= freq_calls
;
1521 REG_LIVE_LENGTH (dstno
) += length
;
1522 if (REG_LIVE_LENGTH (srcno
) >= 0)
1524 REG_LIVE_LENGTH (srcno
) -= length
;
1525 /* REG_LIVE_LENGTH is only an approximation after
1526 combine if sched is not run, so make sure that we
1527 still have a reasonable value. */
1528 if (REG_LIVE_LENGTH (srcno
) < 2)
1529 REG_LIVE_LENGTH (srcno
) = 2;
1534 "Fixed operand %d of insn %d matching operand %d.\n",
1535 op_no
, INSN_UID (insn
), match_no
);
1541 /* If we weren't able to replace any of the alternatives, try an
1542 alternative approach of copying the source to the destination. */
1543 if (!success
&& copy_src
!= NULL_RTX
)
1544 copy_src_to_dest (insn
, copy_src
, copy_dst
);
1550 free (regno_src_regno
);
1553 free (reg_set_in_bb
);
1554 reg_set_in_bb
= NULL
;
1556 regstat_free_n_sets_and_refs ();
1560 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1561 Returns 0 if INSN can't be recognized, or if the alternative can't be
1564 Initialize the info in MATCHP based on the constraints. */
1567 find_matches (rtx insn
, struct match
*matchp
)
1569 int likely_spilled
[MAX_RECOG_OPERANDS
];
1571 int any_matches
= 0;
1573 extract_insn (insn
);
1574 if (! constrain_operands (0))
1577 /* Must initialize this before main loop, because the code for
1578 the commutative case may set matches for operands other than
1580 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1581 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1583 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1589 p
= recog_data
.constraints
[op_no
];
1591 likely_spilled
[op_no
] = 0;
1592 matchp
->use
[op_no
] = READ
;
1593 matchp
->early_clobber
[op_no
] = 0;
1595 matchp
->use
[op_no
] = WRITE
;
1597 matchp
->use
[op_no
] = READWRITE
;
1599 for (;*p
&& i
< which_alternative
; p
++)
1603 while ((c
= *p
) != '\0' && c
!= ',')
1612 matchp
->early_clobber
[op_no
] = 1;
1615 matchp
->commutative
[op_no
] = op_no
+ 1;
1616 matchp
->commutative
[op_no
+ 1] = op_no
;
1619 case '0': case '1': case '2': case '3': case '4':
1620 case '5': case '6': case '7': case '8': case '9':
1623 unsigned long match_ul
= strtoul (p
, &end
, 10);
1624 int match
= match_ul
;
1628 if (match
< op_no
&& likely_spilled
[match
])
1630 matchp
->with
[op_no
] = match
;
1632 if (matchp
->commutative
[op_no
] >= 0)
1633 matchp
->with
[matchp
->commutative
[op_no
]] = match
;
1637 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1638 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1639 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1640 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1641 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c
, p
) ))
1642 likely_spilled
[op_no
] = 1;
1645 p
+= CONSTRAINT_LEN (c
, p
);
1651 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1652 assumed to be in INSN. */
1655 replace_in_call_usage (rtx
*loc
, unsigned int dst_reg
, rtx src
, rtx insn
)
1665 code
= GET_CODE (x
);
1668 if (REGNO (x
) != dst_reg
)
1671 validate_change (insn
, loc
, src
, 1);
1676 /* Process each of our operands recursively. */
1677 fmt
= GET_RTX_FORMAT (code
);
1678 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++, fmt
++)
1680 replace_in_call_usage (&XEXP (x
, i
), dst_reg
, src
, insn
);
1681 else if (*fmt
== 'E')
1682 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1683 replace_in_call_usage (& XVECEXP (x
, i
, j
), dst_reg
, src
, insn
);
1686 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1687 the only set in INSN. INSN has just been recognized and constrained.
1688 SRC is operand number OPERAND_NUMBER in INSN.
1689 DST is operand number MATCH_NUMBER in INSN.
1690 If BACKWARD is nonzero, we have been called in a backward pass.
1691 Return nonzero for success. */
1694 fixup_match_1 (rtx insn
, rtx set
, rtx src
, rtx src_subreg
, rtx dst
,
1695 int backward
, int operand_number
, int match_number
)
1698 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1700 int num_calls
= 0, freq_calls
= 0, s_num_calls
= 0, s_freq_calls
= 0;
1701 enum rtx_code code
= NOTE
;
1702 HOST_WIDE_INT insn_const
= 0, newconst
= 0;
1703 rtx overlap
= 0; /* need to move insn ? */
1704 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1705 int length
, s_length
;
1709 /* Look for (set (regX) (op regA constX))
1710 (set (regY) (op regA constY))
1712 (set (regA) (op regA constX)).
1713 (set (regY) (op regA constY-constX)).
1714 This works for add and shift operations, if
1715 regA is dead after or set by the second insn. */
1717 code
= GET_CODE (SET_SRC (set
));
1718 if ((code
== PLUS
|| code
== LSHIFTRT
1719 || code
== ASHIFT
|| code
== ASHIFTRT
)
1720 && XEXP (SET_SRC (set
), 0) == src
1721 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1722 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1723 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1726 /* We might find a src_note while scanning. */
1732 "Could fix operand %d of insn %d matching operand %d.\n",
1733 operand_number
, INSN_UID (insn
), match_number
);
1735 /* If SRC is equivalent to a constant set in a different basic block,
1736 then do not use it for this optimization. We want the equivalence
1737 so that if we have to reload this register, we can reload the
1738 constant, rather than extending the lifespan of the register. */
1739 if (reg_is_remote_constant_p (src
, insn
))
1742 /* Scan forward to find the next instruction that
1743 uses the output operand. If the operand dies here,
1744 then replace it in both instructions with
1747 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1750 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p
),
1751 REGNO (dst
), src
, p
);
1753 /* ??? We can't scan past the end of a basic block without updating
1754 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1755 if (perhaps_ends_bb_p (p
))
1757 else if (! INSN_P (p
))
1764 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1765 || (GET_CODE (PATTERN (p
)) == USE
1766 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1769 /* See if all of DST dies in P. This test is
1770 slightly more conservative than it needs to be. */
1771 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1772 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1774 /* If we would be moving INSN, check that we won't move it
1775 into the shadow of a live a live flags register. */
1776 /* ??? We only try to move it in front of P, although
1777 we could move it anywhere between OVERLAP and P. */
1778 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1784 rtx set2
= NULL_RTX
;
1786 /* If an optimization is done, the value of SRC while P
1787 is executed will be changed. Check that this is OK. */
1788 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1790 for (q
= p
; q
; q
= NEXT_INSN (q
))
1792 /* ??? We can't scan past the end of a basic block without
1793 updating the register lifetime info
1794 (REG_DEAD/basic_block_live_at_start). */
1795 if (perhaps_ends_bb_p (q
))
1800 else if (! INSN_P (q
))
1802 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1803 || reg_set_p (src
, q
))
1807 set2
= single_set (q
);
1808 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1809 || XEXP (SET_SRC (set2
), 0) != src
1810 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1811 || (SET_DEST (set2
) != src
1812 && ! find_reg_note (q
, REG_DEAD
, src
)))
1814 /* If this is a PLUS, we can still save a register by doing
1817 src -= insn_const; .
1818 This also gives opportunities for subsequent
1819 optimizations in the backward pass, so do it there. */
1820 if (code
== PLUS
&& backward
1821 /* Don't do this if we can likely tie DST to SET_DEST
1822 of P later; we can't do this tying here if we got a
1824 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1826 && REG_P (SET_DEST (single_set (p
)))
1827 && (REGNO (SET_DEST (single_set (p
)))
1828 < FIRST_PSEUDO_REGISTER
))
1829 /* We may only emit an insn directly after P if we
1830 are not in the shadow of a live flags register. */
1831 && GET_MODE (p
) == VOIDmode
)
1836 newconst
= -insn_const
;
1844 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1845 /* Reject out of range shifts. */
1848 || ((unsigned HOST_WIDE_INT
) newconst
1849 >= (GET_MODE_BITSIZE (GET_MODE
1850 (SET_SRC (set2
)))))))
1855 if (SET_DEST (set2
) != src
)
1856 post_inc_set
= set2
;
1859 /* We use 1 as last argument to validate_change so that all
1860 changes are accepted or rejected together by apply_change_group
1861 when it is called by validate_replace_rtx . */
1862 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1863 GEN_INT (newconst
), 1);
1865 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1866 if (validate_replace_rtx (dst
, src_subreg
, p
))
1871 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1873 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1875 /* INSN was already checked to be movable wrt. the registers that it
1876 sets / uses when we found no REG_DEAD note for src on it, but it
1877 still might clobber the flags register. We'll have to check that
1878 we won't insert it into the shadow of a live flags register when
1879 we finally know where we are to move it. */
1881 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1884 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1885 already live across a call, then don't perform the optimization. */
1888 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1892 freq_calls
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p
));
1897 s_freq_calls
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p
));
1905 /* Remove the death note for DST from P. */
1906 remove_note (p
, dst_note
);
1909 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1910 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1912 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1914 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1915 INC_REG_N_SETS (REGNO (src
), 1);
1916 REG_LIVE_LENGTH (REGNO (src
))++;
1920 /* The lifetime of src and dest overlap,
1921 but we can change this by moving insn. */
1922 rtx pat
= PATTERN (insn
);
1924 remove_note (overlap
, src_note
);
1925 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1927 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1931 rtx notes
= REG_NOTES (insn
);
1933 p
= emit_insn_after_setloc (pat
, PREV_INSN (p
), INSN_LOCATOR (insn
));
1935 REG_NOTES (p
) = notes
;
1936 df_notes_rescan (p
);
1939 /* Sometimes we'd generate src = const; src += n;
1940 if so, replace the instruction that set src
1941 in the first place. */
1943 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1945 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1946 rtx q
, set2
= NULL_RTX
;
1947 int num_calls2
= 0, s_length2
= 0, freq_calls2
= 0;
1949 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1951 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN (q
))
1953 /* ??? We can't scan past the end of a basic block without
1954 updating the register lifetime info
1955 (REG_DEAD/basic_block_live_at_start). */
1956 if (perhaps_ends_bb_p (q
))
1961 else if (! INSN_P (q
))
1965 if (reg_set_p (src
, q
))
1967 set2
= single_set (q
);
1970 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1978 freq_calls2
+= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (p
));
1981 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1982 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1985 INC_REG_N_SETS (REGNO (src
), -1);
1986 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1987 REG_FREQ_CALLS_CROSSED (REGNO (src
)) -= freq_calls2
;
1988 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1994 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1995 && (code
== PLUS
|| code
== MINUS
) && insn_const
1996 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1998 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
2000 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
2002 /* If post_inc still prevails, try to find an
2003 insn where it can be used as a pre-in/decrement.
2004 If code is MINUS, this was already tried. */
2005 if (post_inc
&& code
== PLUS
2006 /* Check that newconst is likely to be usable
2007 in a pre-in/decrement before starting the search. */
2008 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
2009 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
2010 && exact_log2 (newconst
))
2014 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
2015 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
2017 /* ??? We can't scan past the end of a basic block without updating
2018 the register lifetime info
2019 (REG_DEAD/basic_block_live_at_start). */
2020 if (perhaps_ends_bb_p (q
))
2022 else if (! INSN_P (q
))
2024 else if (src
!= inc_dest
2025 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
2026 || reg_set_p (src
, q
)))
2028 else if (reg_set_p (inc_dest
, q
))
2030 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
2032 try_auto_increment (q
, post_inc
,
2033 post_inc_set
, inc_dest
, newconst
, 1);
2039 /* Move the death note for DST to INSN if it is used
2041 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
2043 XEXP (dst_note
, 1) = REG_NOTES (insn
);
2044 REG_NOTES (insn
) = dst_note
;
2049 /* Move the death note for SRC from INSN to P. */
2051 remove_note (insn
, src_note
);
2052 XEXP (src_note
, 1) = REG_NOTES (p
);
2053 REG_NOTES (p
) = src_note
;
2055 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
2056 REG_FREQ_CALLS_CROSSED (REGNO (src
)) += s_freq_calls
;
2059 INC_REG_N_SETS (REGNO (src
), 1);
2060 INC_REG_N_SETS (REGNO (dst
), -1);
2062 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
2063 REG_FREQ_CALLS_CROSSED (REGNO (dst
)) -= freq_calls
;
2065 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
2066 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
2068 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
2069 /* REG_LIVE_LENGTH is only an approximation after
2070 combine if sched is not run, so make sure that we
2071 still have a reasonable value. */
2072 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
2073 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
2077 "Fixed operand %d of insn %d matching operand %d.\n",
2078 operand_number
, INSN_UID (insn
), match_number
);
2083 /* Return nonzero if X is stable and mentions no registers but for
2084 mentioning SRC or mentioning / changing DST . If in doubt, presume
2086 The rationale is that we want to check if we can move an insn easily
2087 while just paying attention to SRC and DST. */
2089 stable_and_no_regs_but_for_p (rtx x
, rtx src
, rtx dst
)
2091 RTX_CODE code
= GET_CODE (x
);
2092 switch (GET_RTX_CLASS (code
))
2096 case RTX_COMM_ARITH
:
2098 case RTX_COMM_COMPARE
:
2100 case RTX_BITFIELD_OPS
:
2103 const char *fmt
= GET_RTX_FORMAT (code
);
2104 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2106 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2112 return x
== src
|| x
== dst
;
2113 /* If this is a MEM, look inside - there might be a register hidden in
2114 the address of an unchanging MEM. */
2116 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2120 return ! rtx_unstable_p (x
);
2126 gate_handle_regmove (void)
2128 return (optimize
> 0 && flag_regmove
);
2131 /* Register allocation pre-pass, to reduce number of moves necessary
2132 for two-address machines. */
2134 rest_of_handle_regmove (void)
2136 regmove_optimize (get_insns (), max_reg_num ());
2140 struct rtl_opt_pass pass_regmove
=
2144 "regmove", /* name */
2145 gate_handle_regmove
, /* gate */
2146 rest_of_handle_regmove
, /* execute */
2149 0, /* static_pass_number */
2150 TV_REGMOVE
, /* tv_id */
2151 0, /* properties_required */
2152 0, /* properties_provided */
2153 0, /* properties_destroyed */
2154 0, /* todo_flags_start */
2155 TODO_df_finish
| TODO_verify_rtl_sharing
|
2157 TODO_ggc_collect
/* todo_flags_finish */