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final.c (output_addr_const): Use target opening and closing parentheses.
[official-gcc.git] / gcc / config / i370 / i370.h
blobca106331c697e0f541b81327ea079f969901d290
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* The sizes of the code and literals on the current page. */
32
33 extern int mvs_page_code, mvs_page_lit;
34
35 /* The current page number and the base page number for the function. */
36
37 extern int mvs_page_num, function_base_page;
38
39 /* The name of the current function. */
40
41 extern char *mvs_function_name;
42
43 /* The length of the function name malloc'd area. */
44
45 extern int mvs_function_name_length;
46
47 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
48 these are more than twice as fast as load-op-store.
49 On 3090 don't use this since load-op-store is much faster. */
50
51 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
52
53 /* Default target switches */
54
55 #define TARGET_DEFAULT 1
56
57 /* Macro to define tables used to set the flags. This is a list in braces
58 of pairs in braces, each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
61
62 #define TARGET_SWITCHES \
63 { { "char-instructions", 1, N_("Generate char instructions")}, \
64 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
65 { "", TARGET_DEFAULT, 0} }
66
67 /* To use IBM supplied macro function prologue and epilogue, define the
68 following to 1. Should only be needed if IBM changes the definition
69 of their prologue and epilogue. */
70
71 #define MACROPROLOGUE 0
72 #define MACROEPILOGUE 0
73
74 /* Target machine storage layout */
75
76 /* Define this if most significant bit is lowest numbered in instructions
77 that operate on numbered bit-fields. */
78
79 #define BITS_BIG_ENDIAN 1
80
81 /* Define this if most significant byte of a word is the lowest numbered. */
82
83 #define BYTES_BIG_ENDIAN 1
84
85 /* Define this if MS word of a multiword is the lowest numbered. */
86
87 #define WORDS_BIG_ENDIAN 1
88
89 /* Number of bits in an addressable storage unit. */
90
91 #define BITS_PER_UNIT 8
92
93 /* Width in bits of a "word", which is the contents of a machine register. */
94
95 #define BITS_PER_WORD 32
96
97 /* Width of a word, in units (bytes). */
98
99 #define UNITS_PER_WORD 4
100
101 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
102
103 #define POINTER_SIZE 32
104
105 /* Allocation boundary (in *bits*) for storing pointers in memory. */
106
107 #define POINTER_BOUNDARY 32
108
109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
110
111 #define PARM_BOUNDARY 32
112
113 /* Boundary (in *bits*) on which stack pointer should be aligned. */
114
115 #define STACK_BOUNDARY 32
116
117 /* Allocation boundary (in *bits*) for the code of a function. */
118
119 #define FUNCTION_BOUNDARY 32
120
121 /* There is no point aligning anything to a rounder boundary than this. */
122
123 #define BIGGEST_ALIGNMENT 64
124
125 /* Alignment of field after `int : 0' in a structure. */
126
127 #define EMPTY_FIELD_BOUNDARY 32
128
129 /* Define this if move instructions will actually fail to work when given
130 unaligned data. */
131
132 #define STRICT_ALIGNMENT 0
133
134 /* Define target floating point format. */
135
136 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
137
138 /* Define character mapping for cross-compiling. */
139 /* but only define it if really needed, since otherwise it will break builds */
140
141 #ifdef TARGET_EBCDIC
142 #ifdef HOST_EBCDIC
143 #define MAP_CHARACTER(c) ((char)(c))
144 #else
145 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
146 #endif
147 #endif
148
149 #ifdef TARGET_HLASM
150 /* HLASM requires #pragma map. */
151 #define REGISTER_TARGET_PRAGMAS(PFILE) \
152 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
153 #endif /* TARGET_HLASM */
154
155 /* Define maximum length of page minus page escape overhead. */
156
157 #define MAX_MVS_PAGE_LENGTH 4080
158
159 /* Define special register allocation order desired.
160 Don't fiddle with this. I did, and I got all sorts of register
161 spill errors when compiling even relatively simple programs...
162 I have no clue why ...
163 E.g. this one is bad:
164 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
165 */
166
167 #define REG_ALLOC_ORDER \
168 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
169
170 /* Standard register usage. */
171
172 /* Number of actual hardware registers. The hardware registers are
173 assigned numbers for the compiler from 0 to just below
174 FIRST_PSEUDO_REGISTER.
175 All registers that the compiler knows about must be given numbers,
176 even those that are not normally considered general registers.
177 For the 370, we give the data registers numbers 0-15,
178 and the floating point registers numbers 16-19. */
179
180 #define FIRST_PSEUDO_REGISTER 20
181
182 /* Define base and page registers. */
183
184 #define BASE_REGISTER 3
185 #define PAGE_REGISTER 4
186
187 #ifdef TARGET_HLASM
188 /* 1 for registers that have pervasive standard uses and are not available
189 for the register allocator. These are registers that must have fixed,
190 valid values stored in them for the entire length of the subroutine call,
191 and must not in any way be moved around, jiggered with, etc. That is,
192 they must never be clobbered, and, if clobbered, the register allocator
193 will never restore them back.
194
195 We use five registers in this special way:
196 -- R3 which is used as the base register
197 -- R4 the page origin table pointer used to load R3,
198 -- R11 the arg pointer.
199 -- R12 the TCA pointer
200 -- R13 the stack (DSA) pointer
201
202 A fifth register is also exceptional: R14 is used in many branch
203 instructions to hold the target of the branch. Technically, this
204 does not qualify R14 as a register with a long-term meaning; it should
205 be enough, theoretically, to note that these instructions clobber
206 R14, and let the compiler deal with that. In practice, however,
207 the "clobber" directive acts as a barrier to optimization, and the
208 optimizer appears to be unable to perform optimizations around branches.
209 Thus, a much better strategy appears to give R14 a pervasive use;
210 this eliminates it from the register pool witout hurting optimization.
211
212 There are other registers which have special meanings, but its OK
213 for them to get clobbered, since other allocator config below will
214 make sure that they always have the right value. These are for
215 example:
216 -- R1 the returned structure pointer.
217 -- R10 the static chain reg.
218 -- R15 holds the value a subroutine returns.
219
220 Notice that it is *almost* safe to mark R11 as available to the allocator.
221 By marking it as a call_used_register, in most cases, the compiler
222 can handle it being clobbered. However, there are a few rare
223 circumstances where the register allocator will allocate r11 and
224 also try to use it as the arg pointer ... thus it must be marked fixed.
225 I think this is a bug, but I can't track it down...
226 */
227
228 #define FIXED_REGISTERS \
229 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
230 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
231
232 /* 1 for registers not available across function calls. These must include
233 the FIXED_REGISTERS and also any registers that can be used without being
234 saved.
235 The latter must include the registers where values are returned
236 and the register where structure-value addresses are passed.
237 NOTE: all floating registers are undefined across calls.
238 */
239
240 #define CALL_USED_REGISTERS \
241 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
242 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
243
244 /* Return number of consecutive hard regs needed starting at reg REGNO
245 to hold something of mode MODE.
246 This is ordinarily the length in words of a value of mode MODE
247 but can be less for certain modes in special long registers.
248 Note that DCmode (complex double) needs two regs.
249 */
250 #endif /* TARGET_HLASM */
251
252 /* ================= */
253 #ifdef TARGET_ELF_ABI
254 /* The Linux/ELF ABI uses the same register layout as the
255 * the MVS/OE version, with the following exceptions:
256 * -- r12 (rtca) is not used.
257 */
258
259 #define FIXED_REGISTERS \
260 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
261 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
262
263 #define CALL_USED_REGISTERS \
264 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
265 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
266
267 #endif /* TARGET_ELF_ABI */
268 /* ================= */
269
270
271 #define HARD_REGNO_NREGS(REGNO, MODE) \
272 ((REGNO) > 15 ? \
273 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
274 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
275
276 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
277 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
278 even registers can hold DI. The floating point registers can hold
279 either SF, DF, SC or DC. */
280
281 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
282 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
283 (((MODE) != DImode) && ((MODE) != DFmode))) \
284 : ((MODE) == SFmode || (MODE) == DFmode) || \
285 (MODE) == SCmode || (MODE) == DCmode)
286
287 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
288 mode MODE1 and one has mode MODE2.
289 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
290 for any hard reg, then this must be 0 for correct output. */
291
292 #define MODES_TIEABLE_P(MODE1, MODE2) \
293 (((MODE1) == SFmode || (MODE1) == DFmode) \
294 == ((MODE2) == SFmode || (MODE2) == DFmode))
295
296 /* Mark external references. */
297
298 #define ENCODE_SECTION_INFO(decl) \
299 if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) \
300 SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1;
301
302 /* Specify the registers used for certain standard purposes.
303 The values of these macros are register numbers. */
304
305 /* 370 PC isn't overloaded on a register. */
306
307 /* #define PC_REGNUM */
308
309 /* Register to use for pushing function arguments. */
310
311 #define STACK_POINTER_REGNUM 13
312
313 /* Base register for access to local variables of the function. */
314
315 #define FRAME_POINTER_REGNUM 13
316
317 /* Value should be nonzero if functions must have frame pointers.
318 Zero means the frame pointer need not be set up (and parms may be
319 accessed via the stack pointer) in functions that seem suitable.
320 This is computed in `reload', in reload1.c. */
321
322 #define FRAME_POINTER_REQUIRED 1
323
324 /* Base register for access to arguments of the function. */
325
326 #define ARG_POINTER_REGNUM 11
327
328 /* R10 is register in which static-chain is passed to a function.
329 Static-chaining is done when a nested function references as a global
330 a stack variable of its parent: e.g.
331 int parent_func (int arg) {
332 int x; // x is in parents stack
333 void child_func (void) { x++: } // child references x as global var
334 ...
335 }
336 */
337
338 #define STATIC_CHAIN_REGNUM 10
339
340 /* R1 is register in which address to store a structure value is passed to
341 a function. This is used only when returning 64-bit long-long in a 32-bit arch
342 and when calling functions that return structs by value. e.g.
343 typedef struct A_s { int a,b,c; } A_t;
344 A_t fun_returns_value (void) {
345 A_t a; a.a=1; a.b=2 a.c=3;
346 return a;
347 }
348 In the above, the storage for the return value is in the callers stack, and
349 the R1 points at that mem location.
350 */
351
352 #define STRUCT_VALUE_REGNUM 1
353
354 /* Define the classes of registers for register constraints in the
355 machine description. Also define ranges of constants.
356
357 One of the classes must always be named ALL_REGS and include all hard regs.
358 If there is more than one class, another class must be named NO_REGS
359 and contain no registers.
360
361 The name GENERAL_REGS must be the name of a class (or an alias for
362 another name such as ALL_REGS). This is the class of registers
363 that is allowed by "g" or "r" in a register constraint.
364 Also, registers outside this class are allocated only when
365 instructions express preferences for them.
366
367 The classes must be numbered in nondecreasing order; that is,
368 a larger-numbered class must never be contained completely
369 in a smaller-numbered class.
370
371 For any two classes, it is very desirable that there be another
372 class that represents their union. */
373
374 enum reg_class
375 {
376 NO_REGS, ADDR_REGS, DATA_REGS,
377 FP_REGS, ALL_REGS, LIM_REG_CLASSES
378 };
379
380 #define GENERAL_REGS DATA_REGS
381 #define N_REG_CLASSES (int) LIM_REG_CLASSES
382
383 /* Give names of register classes as strings for dump file. */
384
385 #define REG_CLASS_NAMES \
386 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
387
388 /* Define which registers fit in which classes. This is an initializer for
389 a vector of HARD_REG_SET of length N_REG_CLASSES. */
390
391 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
392
393 /* The same information, inverted:
394 Return the class number of the smallest class containing
395 reg number REGNO. This could be a conditional expression
396 or could index an array. */
397
398 #define REGNO_REG_CLASS(REGNO) \
399 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
400
401 /* The class value for index registers, and the one for base regs. */
402
403 #define INDEX_REG_CLASS ADDR_REGS
404 #define BASE_REG_CLASS ADDR_REGS
405
406 /* Get reg_class from a letter such as appears in the machine description. */
407
408 #define REG_CLASS_FROM_LETTER(C) \
409 ((C) == 'a' ? ADDR_REGS : \
410 ((C) == 'd' ? DATA_REGS : \
411 ((C) == 'f' ? FP_REGS : NO_REGS)))
412
413 /* The letters I, J, K, L and M in a register constraint string can be used
414 to stand for particular ranges of immediate operands.
415 This macro defines what the ranges are.
416 C is the letter, and VALUE is a constant value.
417 Return 1 if VALUE is in the range specified by C. */
418
419 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
420 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
421 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
422 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
423
424 /* Similar, but for floating constants, and defining letters G and H.
425 Here VALUE is the CONST_DOUBLE rtx itself. */
426
427 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
428
429 /* see recog.c for details */
430 #define EXTRA_CONSTRAINT(OP,C) \
431 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
432 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
433
434 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
435 return the class of reg to actually use. In general this is just CLASS;
436 but on some machines in some cases it is preferable to use a more
437 restrictive class.
438
439 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
440 rare occasions when lots of egisters are spilled, reload() will try
441 to put a const int into r0 and then use r0 as an index register.
442 */
443
444 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
445 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
446 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
447 GET_CODE(X) == LABEL_REF || \
448 GET_CODE(X) == SYMBOL_REF || \
449 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
450
451 /* Return the maximum number of consecutive registers needed to represent
452 mode MODE in a register of class CLASS.
453 Note that DCmode (complex double) needs two regs.
454 */
455
456 #define CLASS_MAX_NREGS(CLASS, MODE) \
457 ((CLASS) == FP_REGS ? \
458 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
459 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
460
461 /* Stack layout; function entry, exit and calling. */
462
463 /* Define this if pushing a word on the stack makes the stack pointer a
464 smaller address. */
465 /* ------------------------------------------------------------------- */
466
467 /* ================= */
468 #ifdef TARGET_HLASM
469 /* #define STACK_GROWS_DOWNWARD */
470
471 /* Define this if the nominal address of the stack frame is at the
472 high-address end of the local variables; that is, each additional local
473 variable allocated goes at a more negative offset in the frame. */
474
475 /* #define FRAME_GROWS_DOWNWARD */
476
477 /* Offset within stack frame to start allocating local variables at.
478 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
479 first local allocated. Otherwise, it is the offset to the BEGINNING
480 of the first local allocated. */
481
482 #define STARTING_FRAME_OFFSET \
483 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
484
485 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
486
487 /* If we generate an insn to push BYTES bytes, this says how many the stack
488 pointer really advances by. On the 370, we have no push instruction. */
489
490 #endif /* TARGET_HLASM */
491
492 /* ================= */
493 #ifdef TARGET_ELF_ABI
494
495 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
496 But we want the compiler to generate posistive displacements from the
497 stack pointer, and so we make the frame lie above the stack. */
498
499 #define STACK_GROWS_DOWNWARD
500 /* #define FRAME_GROWS_DOWNWARD */
501
502 /* Offset within stack frame to start allocating local variables at.
503 This is the offset to the BEGINNING of the first local allocated. */
504
505 #define STARTING_FRAME_OFFSET \
506 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
507
508 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
509
510 #endif /* TARGET_ELF_ABI */
511 /* ================= */
512
513 /* #define PUSH_ROUNDING(BYTES) */
514
515 /* Accumulate the outgoing argument count so we can request the right
516 DSA size and determine stack offset. */
517
518 #define ACCUMULATE_OUTGOING_ARGS 1
519
520 /* Define offset from stack pointer, to location where a parm can be
521 pushed. */
522
523 #define STACK_POINTER_OFFSET 148
524
525 /* Offset of first parameter from the argument pointer register value. */
526
527 #define FIRST_PARM_OFFSET(FNDECL) 0
528
529 /* 1 if N is a possible register number for function argument passing.
530 On the 370, no registers are used in this way. */
531
532 #define FUNCTION_ARG_REGNO_P(N) 0
533
534 /* Define a data type for recording info about an argument list during
535 the scan of that argument list. This data type should hold all
536 necessary information about the function itself and about the args
537 processed so far, enough to enable macros such as FUNCTION_ARG to
538 determine where the next arg should go. */
539
540 #define CUMULATIVE_ARGS int
541
542 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
543 a function whose data type is FNTYPE.
544 For a library call, FNTYPE is 0. */
545
546 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
547
548 /* Update the data in CUM to advance over an argument of mode MODE and
549 data type TYPE. (TYPE is null for libcalls where that information
550 may not be available.) */
551
552 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
553 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
554 ? 256 \
555 : (MODE) != BLKmode \
556 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
557 : (int_size_in_bytes (TYPE) + 3) / 4))
558
559 /* Define where to put the arguments to a function. Value is zero to push
560 the argument on the stack, or a hard register in which to store the
561 argument. */
562
563 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
564
565 /* For an arg passed partly in registers and partly in memory, this is the
566 number of registers used. For args passed entirely in registers or
567 entirely in memory, zero. */
568
569 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
570
571 /* Define if returning from a function call automatically pops the
572 arguments described by the number-of-args field in the call. */
573
574 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
575
576 /* The FUNCTION_VALUE macro defines how to find the value returned by a
577 function. VALTYPE is the data type of the value (as a tree).
578 If the precise function being called is known, FUNC is its FUNCTION_DECL;
579 otherwise, FUNC is NULL.
580
581 On the 370 the return value is in R15 or R16. However,
582 DImode (64-bit ints) scalars need to get returned on the stack,
583 with r15 pointing to the location. To accomplish this, we define
584 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
585 and the DImode scalars.
586 */
587
588 #define RET_REG(MODE) \
589 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
590
591 #define FUNCTION_VALUE(VALTYPE, FUNC) \
592 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
593
594 #define RETURN_IN_MEMORY(VALTYPE) \
595 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
596
597 /* Define how to find the value returned by a library function assuming
598 the value has mode MODE. */
599
600 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
601
602 /* 1 if N is a possible register number for a function value.
603 On the 370 under C/370, R15 and R16 are thus used. */
604
605 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
606
607 /* This macro definition sets up a default value for `main' to return. */
608
609 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
610
611
612 /* Output assembler code for a block containing the constant parts of a
613 trampoline, leaving space for the variable parts.
614
615 On the 370, the trampoline contains these instructions:
616
617 BALR 14,0
618 USING *,14
619 L STATIC_CHAIN_REGISTER,X
620 L 15,Y
621 BR 15
622 X DS 0F
623 Y DS 0F */
624 /*
625 I am confused as to why this emitting raw binary, instead of instructions ...
626 see for example, rs6000/rs000.c for an example of a different way to
627 do this ... especially since BASR should probably be substituted for BALR.
628 */
629
630 #define TRAMPOLINE_TEMPLATE(FILE) \
631 { \
632 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \
633 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
634 ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \
635 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \
636 ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \
637 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \
638 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
639 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
640 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
641 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
642 }
643
644 /* Length in units of the trampoline for entering a nested function. */
645
646 #define TRAMPOLINE_SIZE 20
647
648 /* Emit RTL insns to initialize the variable parts of a trampoline. */
649
650 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
651 { \
652 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
653 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
654 }
655
656 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
657 pointer does not matter (provided there is a frame pointer). */
658
659 #define EXIT_IGNORE_STACK 1
660
661 /* Addressing modes, and classification of registers for them. */
662
663 /* #define HAVE_POST_INCREMENT */
664 /* #define HAVE_POST_DECREMENT */
665
666 /* #define HAVE_PRE_DECREMENT */
667 /* #define HAVE_PRE_INCREMENT */
668
669 /* These assume that REGNO is a hard or pseudo reg number. They give
670 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
671 reg currently allocated to a suitable hard reg.
672 These definitions are NOT overridden anywhere. */
673
674 #define REGNO_OK_FOR_INDEX_P(REGNO) \
675 (((REGNO) > 0 && (REGNO) < 16) \
676 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
677
678 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
679
680 #define REGNO_OK_FOR_DATA_P(REGNO) \
681 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
682
683 #define REGNO_OK_FOR_FP_P(REGNO) \
684 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
685
686 /* Now macros that check whether X is a register and also,
687 strictly, whether it is in a specified class. */
688
689 /* 1 if X is a data register. */
690
691 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
692
693 /* 1 if X is an fp register. */
694
695 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
696
697 /* 1 if X is an address register. */
698
699 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
700
701 /* Maximum number of registers that can appear in a valid memory address. */
702
703 #define MAX_REGS_PER_ADDRESS 2
704
705 /* Recognize any constant value that is a valid address. */
706
707 #define CONSTANT_ADDRESS_P(X) \
708 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
709 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
710 || (GET_CODE (X) == CONST \
711 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
712 || (GET_CODE (X) == CONST \
713 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
714 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
715
716 /* Nonzero if the constant value X is a legitimate general operand.
717 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
718
719 #define LEGITIMATE_CONSTANT_P(X) 1
720
721 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
722 its validity for a certain class. We have two alternate definitions
723 for each of them. The usual definition accepts all pseudo regs; the
724 other rejects them all. The symbol REG_OK_STRICT causes the latter
725 definition to be used.
726
727 Most source files want to accept pseudo regs in the hope that they will
728 get allocated to the class that the insn wants them to be in.
729 Some source files that are used after register allocation
730 need to be strict. */
731
732 #ifndef REG_OK_STRICT
733
734 /* Nonzero if X is a hard reg that can be used as an index or if it is
735 a pseudo reg. */
736
737 #define REG_OK_FOR_INDEX_P(X) \
738 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
739
740 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
741 a pseudo reg. */
742
743 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
744
745 #else /* REG_OK_STRICT */
746
747 /* Nonzero if X is a hard reg that can be used as an index. */
748
749 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
750
751 /* Nonzero if X is a hard reg that can be used as a base reg. */
752
753 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
754
755 #endif /* REG_OK_STRICT */
756
757 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
758 valid memory address for an instruction.
759 The MODE argument is the machine mode for the MEM expression
760 that wants to use this address.
761
762 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
763 except for CONSTANT_ADDRESS_P which is actually machine-independent.
764 */
765
766 #define COUNT_REGS(X, REGS, FAIL) \
767 if (REG_P (X)) { \
768 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
769 else goto FAIL; \
770 } \
771 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
772 goto FAIL;
773
774 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
775 { \
776 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
777 goto ADDR; \
778 if (GET_CODE (X) == PLUS) \
779 { \
780 int regs = 0; \
781 rtx x0 = XEXP (X, 0); \
782 rtx x1 = XEXP (X, 1); \
783 if (GET_CODE (x0) == PLUS) \
784 { \
785 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
786 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
787 COUNT_REGS (x1, regs, FAIL); \
788 if (regs == 2) \
789 goto ADDR; \
790 } \
791 else if (GET_CODE (x1) == PLUS) \
792 { \
793 COUNT_REGS (x0, regs, FAIL); \
794 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
795 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
796 if (regs == 2) \
797 goto ADDR; \
798 } \
799 else \
800 { \
801 COUNT_REGS (x0, regs, FAIL); \
802 COUNT_REGS (x1, regs, FAIL); \
803 if (regs != 0) \
804 goto ADDR; \
805 } \
806 } \
807 FAIL: ; \
808 }
809
810 /* The 370 has no mode dependent addresses. */
811
812 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
813
814 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
815 Try machine-dependent ways of modifying an illegitimate address
816 to be legitimate. If we find one, return the new, valid address.
817 This macro is used in only one place: `memory_address' in explow.c.
818
819 Several comments:
820 (1) It's not obvious that this macro results in better code
821 than its omission does. For historical reasons we leave it in.
822
823 (2) This macro may be (???) implicated in the accidental promotion
824 or RS operand to RX operands, which bombs out any RS, SI, SS
825 instruction that was expecting a simple address. Note that
826 this occurs fairly rarely ...
827
828 (3) There is a bug somewhere that causes either r4 to be spilled,
829 or causes r0 to be used as a base register. Changeing the macro
830 below will make the bug move around, but will not make it go away
831 ... Note that this is a rare bug ...
832
833 */
834
835 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
836 { \
837 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
838 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
839 copy_to_mode_reg (SImode, XEXP (X, 1))); \
840 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
841 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
842 copy_to_mode_reg (SImode, XEXP (X, 0))); \
843 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
844 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
845 force_operand (XEXP (X, 0), 0)); \
846 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
847 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
848 force_operand (XEXP (X, 1), 0)); \
849 if (memory_address_p (MODE, X)) \
850 goto WIN; \
851 }
852
853 /* Specify the machine mode that this machine uses for the index in the
854 tablejump instruction. */
855
856 #define CASE_VECTOR_MODE SImode
857
858 /* Define this if the tablejump instruction expects the table to contain
859 offsets from the address of the table.
860 Do not define this if the table should contain absolute addresses. */
861
862 /* #define CASE_VECTOR_PC_RELATIVE */
863
864 /* Specify the tree operation to be used to convert reals to integers. */
865
866 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
867
868 /* Define this if fixuns_trunc is the same as fix_trunc. */
869
870 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
871
872 /* We use "unsigned char" as default. */
873
874 #define DEFAULT_SIGNED_CHAR 0
875
876 /* This is the kind of divide that is easiest to do in the general case. */
877
878 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
879
880 /* Max number of bytes we can move from memory to memory in one reasonably
881 fast instruction. */
882
883 #define MOVE_MAX 256
884
885 /* Define this if zero-extension is slow (more than one real instruction). */
886
887 #define SLOW_ZERO_EXTEND 1
888
889 /* Nonzero if access to memory by bytes is slow and undesirable. */
890
891 #define SLOW_BYTE_ACCESS 1
892
893 /* Define if shifts truncate the shift count which implies one can omit
894 a sign-extension or zero-extension of a shift count. */
895
896 /* #define SHIFT_COUNT_TRUNCATED */
897
898 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
899 is done just by pretending it is already truncated. */
900
901 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
902
903 /* We assume that the store-condition-codes instructions store 0 for false
904 and some other value for true. This is the value stored for true. */
905
906 /* #define STORE_FLAG_VALUE (-1) */
907
908 /* When a prototype says `char' or `short', really pass an `int'. */
909
910 #define PROMOTE_PROTOTYPES 1
911
912 /* Don't perform CSE on function addresses. */
913
914 #define NO_FUNCTION_CSE
915
916 /* Specify the machine mode that pointers have.
917 After generation of rtl, the compiler makes no further distinction
918 between pointers and any other objects of this machine mode. */
919
920 #define Pmode SImode
921
922 /* A function address in a call instruction is a byte address (for
923 indexing purposes) so give the MEM rtx a byte's mode. */
924
925 #define FUNCTION_MODE QImode
926
927 /* Compute the cost of computing a constant rtl expression RTX whose
928 rtx-code is CODE. The body of this macro is a portion of a switch
929 statement. If the code is computed here, return it with a return
930 statement. Otherwise, break from the switch. */
931
932 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
933 case CONST_INT: \
934 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
935 case CONST: \
936 case LABEL_REF: \
937 case SYMBOL_REF: \
938 return 2; \
939 case CONST_DOUBLE: \
940 return 4;
941
942 /* A C statement (sans semicolon) to update the integer variable COST
943 based on the relationship between INSN that is dependent on
944 DEP_INSN through the dependence LINK. The default is to make no
945 adjustment to COST. This can be used for example to specify to
946 the scheduler that an output- or anti-dependence does not incur
947 the same cost as a data-dependence.
948
949 We will want to use this to indicate that there is a cost associated
950 with the loading, followed by use of base registers ...
951 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
952 */
953
954 /* Tell final.c how to eliminate redundant test instructions. */
955
956 /* Here we define machine-dependent flags and fields in cc_status
957 (see `conditions.h'). */
958
959 /* Store in cc_status the expressions that the condition codes will
960 describe after execution of an instruction whose pattern is EXP.
961 Do not alter them if the instruction would not alter the cc's.
962
963 On the 370, load insns do not alter the cc's. However, in some
964 cases these instructions can make it possibly invalid to use the
965 saved cc's. In those cases we clear out some or all of the saved
966 cc's so they won't be used.
967
968 Note that only some arith instructions set the CC. These include
969 add, subtract, complement, various shifts. Note that multiply
970 and divide do *not* set set the CC. Therefore, in the code below,
971 don't set the status for MUL, DIV, etc.
972
973 Note that the bitwise ops set the condition code, but not in a
974 way that we can make use of it. So we treat these as clobbering,
975 rather than setting the CC. These are clobbered in the individual
976 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
977 */
978
979 #define NOTICE_UPDATE_CC(EXP, INSN) \
980 { \
981 rtx exp = (EXP); \
982 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
983 exp = XVECEXP (exp, 0, 0); \
984 if (GET_CODE (exp) != SET) \
985 CC_STATUS_INIT; \
986 else \
987 { \
988 if (XEXP (exp, 0) == cc0_rtx) \
989 { \
990 cc_status.value1 = XEXP (exp, 0); \
991 cc_status.value2 = XEXP (exp, 1); \
992 cc_status.flags = 0; \
993 } \
994 else \
995 { \
996 if (cc_status.value1 \
997 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
998 cc_status.value1 = 0; \
999 if (cc_status.value2 \
1000 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
1001 cc_status.value2 = 0; \
1002 switch (GET_CODE (XEXP (exp, 1))) \
1003 { \
1004 case PLUS: case MINUS: case NEG: \
1005 case NOT: case ABS: \
1006 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
1007 \
1008 /* mult and div don't set any cc codes !! */ \
1009 case MULT: /* case UMULT: */ case DIV: case UDIV: \
1010 /* and, or and xor set the cc's the wrong way !! */ \
1011 case AND: case IOR: case XOR: \
1012 /* some shifts set the CC some don't. */ \
1013 case ASHIFT: case ASHIFTRT: \
1014 do {} while (0); \
1015 default: \
1016 break; \
1017 } \
1018 } \
1019 } \
1020 }
1021
1022
1023 #define CC_STATUS_SET(V1, V2) \
1024 { \
1025 cc_status.flags = 0; \
1026 cc_status.value1 = (V1); \
1027 cc_status.value2 = (V2); \
1028 if (cc_status.value1 \
1029 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1030 cc_status.value2 = 0; \
1031 }
1032
1033 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1034 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1035
1036 /* ------------------------------------------ */
1037 /* Control the assembler format that we output. */
1038
1039 /* Define standard character escape sequences for non-ASCII targets
1040 only. */
1041
1042 #ifdef TARGET_EBCDIC
1043 #define TARGET_ESC 39
1044 #define TARGET_BELL 47
1045 #define TARGET_BS 22
1046 #define TARGET_TAB 5
1047 #define TARGET_NEWLINE 21
1048 #define TARGET_VT 11
1049 #define TARGET_FF 12
1050 #define TARGET_CR 13
1051 #endif
1052
1053 /* ======================================================== */
1054
1055 #ifdef TARGET_HLASM
1056 #define TEXT_SECTION_ASM_OP "* Program text area"
1057 #define DATA_SECTION_ASM_OP "* Program data area"
1058 #define INIT_SECTION_ASM_OP "* Program initialization area"
1059 #define SHARED_SECTION_ASM_OP "* Program shared data"
1060 #define CTOR_LIST_BEGIN /* NO OP */
1061 #define CTOR_LIST_END /* NO OP */
1062 #define MAX_MVS_LABEL_SIZE 8
1063
1064 /* How to refer to registers in assembler output. This sequence is
1065 indexed by compiler's hard-register-number (see above). */
1066
1067 #define REGISTER_NAMES \
1068 { "0", "1", "2", "3", "4", "5", "6", "7", \
1069 "8", "9", "10", "11", "12", "13", "14", "15", \
1070 "0", "2", "4", "6" \
1071 }
1072
1073 /* How to renumber registers for dbx and gdb. */
1074 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1075
1076 #define ASM_FILE_START(FILE) \
1077 { fputs ("\tRMODE\tANY\n", FILE); \
1078 fputs ("\tCSECT\n", FILE); }
1079
1080 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1081 #define ASM_COMMENT_START "*"
1082 #define ASM_APP_OFF ""
1083 #define ASM_APP_ON ""
1084
1085 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1086 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1087
1088 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1089 { \
1090 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1091 if (mvs_check_alias (NAME, temp) == 2) \
1092 { \
1093 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1094 } \
1095 }
1096
1097 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1098 { \
1099 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1100 if (mvs_check_alias (NAME, temp) == 2) \
1101 { \
1102 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1103 } \
1104 fputs ("\tENTRY\t", FILE); \
1105 assemble_name (FILE, NAME); \
1106 fputs ("\n", FILE); \
1107 }
1108
1109 /* MVS externals are limited to 8 characters, upper case only.
1110 The '_' is mapped to '@', except for MVS functions, then '#'. */
1111
1112
1113 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1114 { \
1115 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1116 if (!mvs_get_alias (NAME, temp)) \
1117 strcpy (temp, NAME); \
1118 if (!strcmp (temp,"main")) \
1119 strcpy (temp,"gccmain"); \
1120 if (mvs_function_check (temp)) \
1121 ch = '#'; \
1122 else \
1123 ch = '@'; \
1124 for (bp = temp; *bp; bp++) \
1125 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1126 fprintf (FILE, "%s", temp); \
1127 }
1128
1129 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1130 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1131
1132 /* Generate internal label. Since we can branch here from off page, we
1133 must reload the base register. */
1134
1135 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1136 { \
1137 if (!strcmp (PREFIX,"L")) \
1138 { \
1139 mvs_add_label(NUM); \
1140 } \
1141 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1142 }
1143
1144 /* Generate case label. For HLASM we can change to the data CSECT
1145 and put the vectors out of the code body. The assembler just
1146 concatenates CSECTs with the same name. */
1147
1148 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1149 fprintf (FILE, "\tDS\t0F\n"); \
1150 fprintf (FILE,"\tCSECT\n"); \
1151 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1152
1153 /* Put the CSECT back to the code body */
1154
1155 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1156 assemble_name (FILE, mvs_function_name); \
1157 fputs ("\tCSECT\n", FILE);
1158
1159 /* This is how to output an element of a case-vector that is absolute. */
1160
1161 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1162 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1163
1164 /* This is how to output an element of a case-vector that is relative. */
1165
1166 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1167 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1168
1169 /* This is how to output an insn to push a register on the stack.
1170 It need not be very fast code.
1171 Right now, PUSH & POP are used only when profiling is enabled,
1172 and then, only to push the static chain reg and the function struct
1173 value reg, and only if those are used. Since profiling is not
1174 supported anyway, punt on this. */
1175
1176 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1177 mvs_check_page (FILE, 8, 4); \
1178 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1179 reg_names[REGNO], STACK_POINTER_OFFSET)
1180
1181 /* This is how to output an insn to pop a register from the stack.
1182 It need not be very fast code. */
1183
1184 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1185 mvs_check_page (FILE, 8, 0); \
1186 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1187 reg_names[REGNO], STACK_POINTER_OFFSET)
1188
1189 /* This is how to output an assembler line defining a `double' constant. */
1190 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1191 fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
1192
1193 /* This is how to output an assembler line defining a `float' constant. */
1194 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1195 fprintf (FILE, "\tDC\tE'%.9G'\n", (VALUE))
1196
1197 /* This outputs an integer, if not a CONST_INT must be address constant. */
1198
1199 #define ASM_OUTPUT_INT(FILE, EXP) \
1200 { \
1201 if (GET_CODE (EXP) == CONST_INT) \
1202 { \
1203 fprintf (FILE, "\tDC\tF'"); \
1204 output_addr_const (FILE, EXP); \
1205 fprintf (FILE, "'\n"); \
1206 } \
1207 else \
1208 { \
1209 fprintf (FILE, "\tDC\tA("); \
1210 output_addr_const (FILE, EXP); \
1211 fprintf (FILE, ")\n"); \
1212 } \
1213 }
1214
1215 /* This outputs a short integer. */
1216
1217 #define ASM_OUTPUT_SHORT(FILE, EXP) \
1218 { \
1219 fprintf (FILE, "\tDC\tX'%04X'\n", INTVAL(EXP) & 0xFFFF); \
1220 }
1221
1222 /* This outputs a byte sized integer. */
1223
1224 #define ASM_OUTPUT_CHAR(FILE, EXP) \
1225 fprintf (FILE, "\tDC\tX'%02X'\n", INTVAL (EXP) )
1226
1227 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1228 fprintf (FILE, "\tDC\tX'%02X'\n", VALUE)
1229
1230 /* This outputs a text string. The string are chopped up to fit into
1231 an 80 byte record. Also, control and special characters, interpreted
1232 by the IBM assembler, are output numerically. */
1233
1234 #define MVS_ASCII_TEXT_LENGTH 48
1235
1236 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1237 { \
1238 int i, j; \
1239 int c; \
1240 for (j = 0, i = 0; i < LEN; j++, i++) \
1241 { \
1242 c = PTR[i]; \
1243 if (ISCNTRL (c) || c == '&') \
1244 { \
1245 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1246 fprintf (FILE, "'\n"); \
1247 j = -1; \
1248 if (c == '&') c = MAP_CHARACTER (c); \
1249 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1250 } \
1251 else \
1252 { \
1253 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1254 fprintf (FILE, "\tDC\tC'"); \
1255 if ( c == '\'' ) \
1256 fprintf (FILE, "%c%c", c, c); \
1257 else \
1258 fprintf (FILE, "%c", c); \
1259 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1260 fprintf (FILE, "'\n" ); \
1261 } \
1262 } \
1263 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1264 fprintf (FILE, "'\n"); \
1265 }
1266
1267 /* This is how to output an assembler line that says to advance the
1268 location counter to a multiple of 2**LOG bytes. */
1269
1270 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1271 if (LOG) \
1272 { \
1273 if ((LOG) == 1) \
1274 fprintf (FILE, "\tDS\t0H\n" ); \
1275 else \
1276 fprintf (FILE, "\tDS\t0F\n" ); \
1277 } \
1278
1279 /* The maximum length of memory that the IBM assembler will allow in one
1280 DS operation. */
1281
1282 #define MAX_CHUNK 32767
1283
1284 /* A C statement to output to the stdio stream FILE an assembler
1285 instruction to advance the location counter by SIZE bytes. Those
1286 bytes should be zero when loaded. */
1287
1288 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1289 { \
1290 int s, k; \
1291 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1292 { \
1293 if (s > MAX_CHUNK) \
1294 k = MAX_CHUNK; \
1295 else \
1296 k = s; \
1297 fprintf (FILE, "\tDS\tXL%d\n", k); \
1298 } \
1299 }
1300
1301 /* A C statement (sans semicolon) to output to the stdio stream
1302 FILE the assembler definition of a common-label named NAME whose
1303 size is SIZE bytes. The variable ROUNDED is the size rounded up
1304 to whatever alignment the caller wants. */
1305
1306 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1307 { \
1308 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1309 if (mvs_check_alias(NAME, temp) == 2) \
1310 { \
1311 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1312 } \
1313 fputs ("\tENTRY\t", FILE); \
1314 assemble_name (FILE, NAME); \
1315 fputs ("\n", FILE); \
1316 fprintf (FILE, "\tDS\t0F\n"); \
1317 ASM_OUTPUT_LABEL (FILE,NAME); \
1318 ASM_OUTPUT_SKIP (FILE,SIZE); \
1319 }
1320
1321 /* A C statement (sans semicolon) to output to the stdio stream
1322 FILE the assembler definition of a local-common-label named NAME
1323 whose size is SIZE bytes. The variable ROUNDED is the size
1324 rounded up to whatever alignment the caller wants. */
1325
1326 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1327 { \
1328 fprintf (FILE, "\tDS\t0F\n"); \
1329 ASM_OUTPUT_LABEL (FILE,NAME); \
1330 ASM_OUTPUT_SKIP (FILE,SIZE); \
1331 }
1332
1333 /* Store in OUTPUT a string (made with alloca) containing an
1334 assembler-name for a local static variable named NAME.
1335 LABELNO is an integer which is different for each call. */
1336
1337 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1338 { \
1339 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1340 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1341 }
1342
1343 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1344 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1345 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1346
1347 #define PRINT_OPERAND(FILE, XV, CODE) \
1348 { \
1349 switch (GET_CODE (XV)) \
1350 { \
1351 static char curreg[4]; \
1352 case REG: \
1353 if (CODE == 'N') \
1354 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1355 else \
1356 strcpy (curreg, reg_names[REGNO (XV)]); \
1357 fprintf (FILE, "%s", curreg); \
1358 break; \
1359 case MEM: \
1360 { \
1361 rtx addr = XEXP (XV, 0); \
1362 if (CODE == 'O') \
1363 { \
1364 if (GET_CODE (addr) == PLUS) \
1365 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1366 else \
1367 fprintf (FILE, "0"); \
1368 } \
1369 else if (CODE == 'R') \
1370 { \
1371 if (GET_CODE (addr) == PLUS) \
1372 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1373 else \
1374 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1375 } \
1376 else \
1377 output_address (XEXP (XV, 0)); \
1378 } \
1379 break; \
1380 case SYMBOL_REF: \
1381 case LABEL_REF: \
1382 mvs_page_lit += 4; \
1383 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1384 else fprintf (FILE, "=A("); \
1385 output_addr_const (FILE, XV); \
1386 fprintf (FILE, ")"); \
1387 break; \
1388 case CONST_INT: \
1389 if (CODE == 'B') \
1390 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1391 else if (CODE == 'X') \
1392 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1393 else if (CODE == 'h') \
1394 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1395 else if (CODE == 'H') \
1396 { \
1397 mvs_page_lit += 2; \
1398 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1399 } \
1400 else if (CODE == 'K') \
1401 { \
1402 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1403 mvs_page_lit += 4; \
1404 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1405 } \
1406 else if (CODE == 'W') \
1407 { \
1408 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1409 mvs_page_lit += 8; \
1410 if (0 <= INTVAL (XV)) { \
1411 fprintf (FILE, "=XL8'00000000"); \
1412 } else { \
1413 fprintf (FILE, "=XL8'FFFFFFFF"); \
1414 } \
1415 fprintf (FILE, "%08X'", INTVAL (XV)); \
1416 } \
1417 else \
1418 { \
1419 mvs_page_lit += 4; \
1420 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1421 } \
1422 break; \
1423 case CONST_DOUBLE: \
1424 if (GET_MODE (XV) == DImode) \
1425 { \
1426 if (CODE == 'M') \
1427 { \
1428 mvs_page_lit += 4; \
1429 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1430 } \
1431 else if (CODE == 'L') \
1432 { \
1433 mvs_page_lit += 4; \
1434 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1435 } \
1436 else \
1437 { \
1438 mvs_page_lit += 8; \
1439 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1440 CONST_DOUBLE_HIGH (XV)); \
1441 } \
1442 } \
1443 else \
1444 { \
1445 /* hack alert -- this prints wildly incorrect values */ \
1446 /* when run in cross-compiler mode. See ELF section */ \
1447 /* for suggested fix */ \
1448 union { double d; int i[2]; } u; \
1449 u.i[0] = CONST_DOUBLE_LOW (XV); \
1450 u.i[1] = CONST_DOUBLE_HIGH (XV); \
1451 if (GET_MODE (XV) == SFmode) \
1452 { \
1453 mvs_page_lit += 4; \
1454 fprintf (FILE, "=E'%.9G'", u.d); \
1455 } \
1456 else \
1457 { \
1458 mvs_page_lit += 8; \
1459 fprintf (FILE, "=D'%.18G'", u.d); \
1460 } \
1461 } \
1462 break; \
1463 case CONST: \
1464 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1465 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1466 { \
1467 mvs_page_lit += 4; \
1468 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1469 { \
1470 fprintf (FILE, "=V("); \
1471 ASM_OUTPUT_LABELREF (FILE, \
1472 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1473 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1474 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1475 } \
1476 else \
1477 { \
1478 fprintf (FILE, "=A("); \
1479 output_addr_const (FILE, XV); \
1480 fprintf (FILE, ")"); \
1481 } \
1482 } \
1483 else \
1484 { \
1485 mvs_page_lit += 4; \
1486 fprintf (FILE, "=F'"); \
1487 output_addr_const (FILE, XV); \
1488 fprintf (FILE, "'"); \
1489 } \
1490 break; \
1491 default: \
1492 abort(); \
1493 } \
1494 }
1495
1496 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1497 { \
1498 rtx breg, xreg, offset, plus; \
1499 \
1500 switch (GET_CODE (ADDR)) \
1501 { \
1502 case REG: \
1503 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1504 break; \
1505 case PLUS: \
1506 breg = 0; \
1507 xreg = 0; \
1508 offset = 0; \
1509 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1510 { \
1511 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1512 breg = XEXP (ADDR, 1); \
1513 else \
1514 offset = XEXP (ADDR, 1); \
1515 plus = XEXP (ADDR, 0); \
1516 } \
1517 else \
1518 { \
1519 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1520 breg = XEXP (ADDR, 0); \
1521 else \
1522 offset = XEXP (ADDR, 0); \
1523 plus = XEXP (ADDR, 1); \
1524 } \
1525 if (GET_CODE (plus) == PLUS) \
1526 { \
1527 if (GET_CODE (XEXP (plus, 0)) == REG) \
1528 { \
1529 if (breg) \
1530 xreg = XEXP (plus, 0); \
1531 else \
1532 breg = XEXP (plus, 0); \
1533 } \
1534 else \
1535 { \
1536 offset = XEXP (plus, 0); \
1537 } \
1538 if (GET_CODE (XEXP (plus, 1)) == REG) \
1539 { \
1540 if (breg) \
1541 xreg = XEXP (plus, 1); \
1542 else \
1543 breg = XEXP (plus, 1); \
1544 } \
1545 else \
1546 { \
1547 offset = XEXP (plus, 1); \
1548 } \
1549 } \
1550 else if (GET_CODE (plus) == REG) \
1551 { \
1552 if (breg) \
1553 xreg = plus; \
1554 else \
1555 breg = plus; \
1556 } \
1557 else \
1558 { \
1559 offset = plus; \
1560 } \
1561 if (offset) \
1562 { \
1563 if (GET_CODE (offset) == LABEL_REF) \
1564 fprintf (FILE, "L%d", \
1565 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1566 else \
1567 output_addr_const (FILE, offset); \
1568 } \
1569 else \
1570 fprintf (FILE, "0"); \
1571 if (xreg) \
1572 fprintf (FILE, "(%s,%s)", \
1573 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1574 else \
1575 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1576 break; \
1577 default: \
1578 mvs_page_lit += 4; \
1579 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1580 else fprintf (FILE, "=A("); \
1581 output_addr_const (FILE, ADDR); \
1582 fprintf (FILE, ")"); \
1583 break; \
1584 } \
1585 }
1586
1587 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1588 { \
1589 if (strlen (NAME) + 1 > mvs_function_name_length) \
1590 { \
1591 if (mvs_function_name) \
1592 free (mvs_function_name); \
1593 mvs_function_name = 0; \
1594 } \
1595 if (!mvs_function_name) \
1596 { \
1597 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1598 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1599 } \
1600 if (!strcmp (NAME, "main")) \
1601 strcpy (mvs_function_name, "gccmain"); \
1602 else \
1603 strcpy (mvs_function_name, NAME); \
1604 fprintf (FILE, "\tDS\t0F\n"); \
1605 assemble_name (FILE, mvs_function_name); \
1606 fputs ("\tRMODE\tANY\n", FILE); \
1607 assemble_name (FILE, mvs_function_name); \
1608 fputs ("\tCSECT\n", FILE); \
1609 }
1610
1611 /* Output assembler code to FILE to increment profiler label # LABELNO
1612 for profiling a function entry. */
1613
1614 #define FUNCTION_PROFILER(FILE, LABELNO) \
1615 fprintf (FILE, "Error: No profiling available.\n")
1616
1617 #endif /* TARGET_HLASM */
1618
1619 /* ======================================================== */
1620
1621 #ifdef TARGET_ELF_ABI
1622
1623 /* How to refer to registers in assembler output. This sequence is
1624 indexed by compiler's hard-register-number (see above). */
1625
1626 #define REGISTER_NAMES \
1627 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1628 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1629 "f0", "f2", "f4", "f6" \
1630 }
1631
1632 /* How to renumber registers for dbx and gdb. */
1633 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1634
1635 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1636 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1637 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1638
1639 #define PRINT_OPERAND(FILE, XV, CODE) \
1640 { \
1641 switch (GET_CODE (XV)) \
1642 { \
1643 static char curreg[4]; \
1644 case REG: \
1645 if (CODE == 'N') \
1646 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1647 else \
1648 strcpy (curreg, reg_names[REGNO (XV)]); \
1649 fprintf (FILE, "%s", curreg); \
1650 break; \
1651 case MEM: \
1652 { \
1653 rtx addr = XEXP (XV, 0); \
1654 if (CODE == 'O') \
1655 { \
1656 if (GET_CODE (addr) == PLUS) \
1657 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1658 else \
1659 fprintf (FILE, "0"); \
1660 } \
1661 else if (CODE == 'R') \
1662 { \
1663 if (GET_CODE (addr) == PLUS) \
1664 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1665 else \
1666 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1667 } \
1668 else \
1669 output_address (XEXP (XV, 0)); \
1670 } \
1671 break; \
1672 case SYMBOL_REF: \
1673 case LABEL_REF: \
1674 mvs_page_lit += 4; \
1675 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1676 else fprintf (FILE, "=A("); \
1677 output_addr_const (FILE, XV); \
1678 fprintf (FILE, ")"); \
1679 break; \
1680 case CONST_INT: \
1681 if (CODE == 'B') \
1682 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1683 else if (CODE == 'X') \
1684 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1685 else if (CODE == 'h') \
1686 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1687 else if (CODE == 'H') \
1688 { \
1689 mvs_page_lit += 2; \
1690 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1691 } \
1692 else if (CODE == 'K') \
1693 { \
1694 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1695 mvs_page_lit += 4; \
1696 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1697 } \
1698 else if (CODE == 'W') \
1699 { \
1700 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1701 mvs_page_lit += 8; \
1702 if (0 <= INTVAL (XV)) { \
1703 fprintf (FILE, "=XL8'00000000"); \
1704 } else { \
1705 fprintf (FILE, "=XL8'FFFFFFFF"); \
1706 } \
1707 fprintf (FILE, "%08X'", INTVAL (XV)); \
1708 } \
1709 else \
1710 { \
1711 mvs_page_lit += 4; \
1712 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1713 } \
1714 break; \
1715 case CONST_DOUBLE: \
1716 if (GET_MODE (XV) == DImode) \
1717 { \
1718 if (CODE == 'M') \
1719 { \
1720 mvs_page_lit += 4; \
1721 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1722 } \
1723 else if (CODE == 'L') \
1724 { \
1725 mvs_page_lit += 4; \
1726 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1727 } \
1728 else \
1729 { \
1730 mvs_page_lit += 8; \
1731 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1732 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1733 } \
1734 } \
1735 else \
1736 { \
1737 char buf[50]; \
1738 REAL_VALUE_TYPE rval; \
1739 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1740 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1741 if (GET_MODE (XV) == SFmode) \
1742 { \
1743 mvs_page_lit += 4; \
1744 fprintf (FILE, "=E'%s'", buf); \
1745 } \
1746 else \
1747 if (GET_MODE (XV) == DFmode) \
1748 { \
1749 mvs_page_lit += 8; \
1750 fprintf (FILE, "=D'%s'", buf); \
1751 } \
1752 else /* VOIDmode !?!? strange but true ... */ \
1753 { \
1754 mvs_page_lit += 8; \
1755 fprintf (FILE, "=XL8'%08X%08X'", \
1756 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1757 } \
1758 } \
1759 break; \
1760 case CONST: \
1761 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1762 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1763 { \
1764 mvs_page_lit += 4; \
1765 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1766 { \
1767 fprintf (FILE, "=V("); \
1768 ASM_OUTPUT_LABELREF (FILE, \
1769 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1770 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1771 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1772 } \
1773 else \
1774 { \
1775 fprintf (FILE, "=A("); \
1776 output_addr_const (FILE, XV); \
1777 fprintf (FILE, ")"); \
1778 } \
1779 } \
1780 else \
1781 { \
1782 mvs_page_lit += 4; \
1783 fprintf (FILE, "=bogus_bad_F'"); \
1784 output_addr_const (FILE, XV); \
1785 fprintf (FILE, "'"); \
1786 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1787 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1788 debug_rtx (XV); \
1789 abort(); \
1790 } \
1791 break; \
1792 default: \
1793 abort(); \
1794 } \
1795 }
1796
1797 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1798 { \
1799 rtx breg, xreg, offset, plus; \
1800 \
1801 switch (GET_CODE (ADDR)) \
1802 { \
1803 case REG: \
1804 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1805 break; \
1806 case PLUS: \
1807 breg = 0; \
1808 xreg = 0; \
1809 offset = 0; \
1810 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1811 { \
1812 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1813 breg = XEXP (ADDR, 1); \
1814 else \
1815 offset = XEXP (ADDR, 1); \
1816 plus = XEXP (ADDR, 0); \
1817 } \
1818 else \
1819 { \
1820 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1821 breg = XEXP (ADDR, 0); \
1822 else \
1823 offset = XEXP (ADDR, 0); \
1824 plus = XEXP (ADDR, 1); \
1825 } \
1826 if (GET_CODE (plus) == PLUS) \
1827 { \
1828 if (GET_CODE (XEXP (plus, 0)) == REG) \
1829 { \
1830 if (breg) \
1831 xreg = XEXP (plus, 0); \
1832 else \
1833 breg = XEXP (plus, 0); \
1834 } \
1835 else \
1836 { \
1837 offset = XEXP (plus, 0); \
1838 } \
1839 if (GET_CODE (XEXP (plus, 1)) == REG) \
1840 { \
1841 if (breg) \
1842 xreg = XEXP (plus, 1); \
1843 else \
1844 breg = XEXP (plus, 1); \
1845 } \
1846 else \
1847 { \
1848 offset = XEXP (plus, 1); \
1849 } \
1850 } \
1851 else if (GET_CODE (plus) == REG) \
1852 { \
1853 if (breg) \
1854 xreg = plus; \
1855 else \
1856 breg = plus; \
1857 } \
1858 else \
1859 { \
1860 offset = plus; \
1861 } \
1862 if (offset) \
1863 { \
1864 if (GET_CODE (offset) == LABEL_REF) \
1865 fprintf (FILE, "L%d", \
1866 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1867 else \
1868 output_addr_const (FILE, offset); \
1869 } \
1870 else \
1871 fprintf (FILE, "0"); \
1872 if (xreg) \
1873 fprintf (FILE, "(%s,%s)", \
1874 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1875 else \
1876 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1877 break; \
1878 default: \
1879 mvs_page_lit += 4; \
1880 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1881 else fprintf (FILE, "=A("); \
1882 output_addr_const (FILE, ADDR); \
1883 fprintf (FILE, ")"); \
1884 break; \
1885 } \
1886 }
1887
1888 /* Output assembler code to FILE to increment profiler label # LABELNO
1889 for profiling a function entry. */
1890 /* Make it a no-op for now, so we can at least compile glibc */
1891 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1892 mvs_check_page (FILE, 24, 4); \
1893 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1894 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1895 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1896 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1897 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1898 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1899 }
1900
1901 /* Don't bother to output .extern pseudo-ops. They are not needed by
1902 ELF assemblers. */
1903
1904 #undef ASM_OUTPUT_EXTERNAL
1905
1906 #define ASM_DOUBLE "\t.double"
1907 #define ASM_LONG "\t.long"
1908 #define ASM_SHORT "\t.short"
1909 #define ASM_BYTE "\t.byte"
1910
1911 /* Argument to the flt pt. macros is a REAL_VALUE_TYPE which
1912 may or may not be a float/double, depending on whther we
1913 are running in cross-compiler mode. */
1914 /* This is how to output an assembler line defining a `double' constant. */
1915 #define ASM_OUTPUT_DOUBLE(FILE, RVAL) { \
1916 char buf[50]; \
1917 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DOUBLE_HEX, buf); \
1918 fprintf (FILE, "\tDC\tD'%s'\n", buf); \
1919 }
1920
1921 /* This is how to output an assembler line defining a `float' constant. */
1922 #define ASM_OUTPUT_FLOAT(FILE, RVAL) { \
1923 char buf[50]; \
1924 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DEC, buf); \
1925 fprintf (FILE, "\tDC\tE'%s'\n", buf); \
1926 }
1927
1928
1929 /* This is how to output an assembler line defining an `int' constant. */
1930 #define ASM_OUTPUT_INT(FILE,VALUE) \
1931 ( fprintf (FILE, "%s ", ASM_LONG), \
1932 output_addr_const (FILE,(VALUE)), \
1933 putc('\n',FILE))
1934
1935 /* Likewise for `char' and `short' constants. */
1936 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1937 ( fprintf (FILE, "%s ", ASM_SHORT), \
1938 output_addr_const (FILE,(VALUE)), \
1939 putc('\n',FILE))
1940
1941
1942 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1943 ( fprintf (FILE, "%s", ASM_BYTE_OP), \
1944 output_addr_const (FILE, (VALUE)), \
1945 putc ('\n', FILE))
1946
1947 /* This is how to output an assembler line for a numeric constant byte. */
1948 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1949 fprintf ((FILE), "%s0x%x\n", ASM_BYTE_OP, (VALUE))
1950
1951 /* This is how to output the definition of a user-level label named NAME,
1952 such as the label on a static function or variable NAME. */
1953 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1954 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1955
1956 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1957
1958 /* Generate internal label. Since we can branch here from off page, we
1959 must reload the base register. Note that internal labels are generated
1960 for loops, goto's and case labels. */
1961 #undef ASM_OUTPUT_INTERNAL_LABEL
1962 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1963 { \
1964 if (!strcmp (PREFIX,"L")) \
1965 { \
1966 mvs_add_label(NUM); \
1967 } \
1968 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1969 }
1970
1971 /* let config/svr4.h define this ...
1972 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1973 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1974 */
1975
1976 /* This is how to output an element of a case-vector that is absolute. */
1977 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1978 mvs_check_page (FILE, 4, 0); \
1979 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1980
1981 /* This is how to output an element of a case-vector that is relative. */
1982 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1983 mvs_check_page (FILE, 4, 0); \
1984 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1985
1986 /* Right now, PUSH & POP are used only when profiling is enabled,
1987 and then, only to push the static chain reg and the function struct
1988 value reg, and only if those are used by the function being profiled.
1989 We don't need this for profiling, so punt. */
1990 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1991 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1992
1993
1994 /* Indicate that jump tables go in the text section. This is
1995 necessary when compiling PIC code. */
1996 #define JUMP_TABLES_IN_TEXT_SECTION 1
1997
1998 /* Define macro used to output shift-double opcodes when the shift
1999 count is in %cl. Some assemblers require %cl as an argument;
2000 some don't.
2001
2002 GAS requires the %cl argument, so override i386/unix.h. */
2003
2004 #undef SHIFT_DOUBLE_OMITS_COUNT
2005 #define SHIFT_DOUBLE_OMITS_COUNT 0
2006
2007 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2008 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2009 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2010
2011 /* Allow #sccs in preprocessor. */
2012 #define SCCS_DIRECTIVE
2013
2014 /* Implicit library calls should use memcpy, not bcopy, etc. */
2015 #define TARGET_MEM_FUNCTIONS
2016
2017 /* Output before read-only data. */
2018 #define TEXT_SECTION_ASM_OP "\t.text"
2019
2020 /* Output before writable (initialized) data. */
2021 #define DATA_SECTION_ASM_OP "\t.data"
2022
2023 /* Output before writable (uninitialized) data. */
2024 #define BSS_SECTION_ASM_OP "\t.bss"
2025
2026 /* In the past there was confusion as to what the argument to .align was
2027 in GAS. For the last several years the rule has been this: for a.out
2028 file formats that argument is LOG, and for all other file formats the
2029 argument is 1<<LOG.
2030
2031 However, GAS now has .p2align and .balign pseudo-ops so to remove any
2032 doubt or guess work, and since this file is used for both a.out and other
2033 file formats, we use one of them. */
2034
2035 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2036 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
2037
2038 /* This is how to output a command to make the user-level label named NAME
2039 defined for reference from other files. */
2040
2041 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2042 (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
2043
2044 /* This says how to output an assembler line
2045 to define a global common symbol. */
2046
2047 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2048 ( fputs (".comm ", (FILE)), \
2049 assemble_name ((FILE), (NAME)), \
2050 fprintf ((FILE), ",%u\n", (ROUNDED)))
2051
2052 /* This says how to output an assembler line
2053 to define a local common symbol. */
2054
2055 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2056 ( fputs (".lcomm ", (FILE)), \
2057 assemble_name ((FILE), (NAME)), \
2058 fprintf ((FILE), ",%u\n", (ROUNDED)))
2059
2060 #endif /* TARGET_ELF_ABI */
2061 #endif /* ! GCC_I370_H */
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