gcc/config/i386/i386-c.c

   1 /* Subroutines used for macro/preprocessor support on the ia-32.
   2    Copyright (C) 2008-2016 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 3, or (at your option)
   9 any later version.
  10
  11 GCC is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20 #include "config.h"
  21 #include "system.h"
  22 #include "coretypes.h"
  23 #include "target.h"
  24 #include "c-family/c-common.h"
  25 #include "memmodel.h"
  26 #include "tm_p.h"
  27 #include "c-family/c-pragma.h"
  28
  29 static bool ix86_pragma_target_parse (tree, tree);
  30 static void ix86_target_macros_internal
  31   (HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
  32    void (*def_or_undef) (cpp_reader *, const char *));
  33
  34 \f
  35 /* Internal function to either define or undef the appropriate system
  36    macros.  */
  37 static void
  38 ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
  39                              enum processor_type arch,
  40                              enum processor_type tune,
  41                              enum fpmath_unit fpmath,
  42                              void (*def_or_undef) (cpp_reader *,
  43                                                    const char *))
  44 {
  45   /* For some of the k6/pentium varients there weren't separate ISA bits to
  46      identify which tune/arch flag was passed, so figure it out here.  */
  47   size_t arch_len = strlen (ix86_arch_string);
  48   size_t tune_len = strlen (ix86_tune_string);
  49   int last_arch_char = ix86_arch_string[arch_len - 1];
  50   int last_tune_char = ix86_tune_string[tune_len - 1];
  51
  52   /* Built-ins based on -march=.  */
  53   switch (arch)
  54     {
  55     case PROCESSOR_I386:
  56       break;
  57     case PROCESSOR_I486:
  58       def_or_undef (parse_in, "__i486");
  59       def_or_undef (parse_in, "__i486__");
  60       break;
  61     case PROCESSOR_LAKEMONT:
  62       /* Intel MCU is based on Intel Pentium CPU.  */
  63     case PROCESSOR_PENTIUM:
  64       def_or_undef (parse_in, "__i586");
  65       def_or_undef (parse_in, "__i586__");
  66       def_or_undef (parse_in, "__pentium");
  67       def_or_undef (parse_in, "__pentium__");
  68       if (isa_flag & OPTION_MASK_ISA_MMX)
  69         def_or_undef (parse_in, "__pentium_mmx__");
  70       break;
  71     case PROCESSOR_PENTIUMPRO:
  72       def_or_undef (parse_in, "__i686");
  73       def_or_undef (parse_in, "__i686__");
  74       def_or_undef (parse_in, "__pentiumpro");
  75       def_or_undef (parse_in, "__pentiumpro__");
  76       break;
  77     case PROCESSOR_GEODE:
  78       def_or_undef (parse_in, "__geode");
  79       def_or_undef (parse_in, "__geode__");
  80       break;
  81     case PROCESSOR_K6:
  82       def_or_undef (parse_in, "__k6");
  83       def_or_undef (parse_in, "__k6__");
  84       if (last_arch_char == '2')
  85         def_or_undef (parse_in, "__k6_2__");
  86       else if (last_arch_char == '3')
  87         def_or_undef (parse_in, "__k6_3__");
  88       else if (isa_flag & OPTION_MASK_ISA_3DNOW)
  89         def_or_undef (parse_in, "__k6_3__");
  90       break;
  91     case PROCESSOR_ATHLON:
  92       def_or_undef (parse_in, "__athlon");
  93       def_or_undef (parse_in, "__athlon__");
  94       if (isa_flag & OPTION_MASK_ISA_SSE)
  95         def_or_undef (parse_in, "__athlon_sse__");
  96       break;
  97     case PROCESSOR_K8:
  98       def_or_undef (parse_in, "__k8");
  99       def_or_undef (parse_in, "__k8__");
 100       break;
 101     case PROCESSOR_AMDFAM10:
 102       def_or_undef (parse_in, "__amdfam10");
 103       def_or_undef (parse_in, "__amdfam10__");
 104       break;
 105     case PROCESSOR_BDVER1:
 106       def_or_undef (parse_in, "__bdver1");
 107       def_or_undef (parse_in, "__bdver1__");
 108       break;
 109     case PROCESSOR_BDVER2:
 110       def_or_undef (parse_in, "__bdver2");
 111       def_or_undef (parse_in, "__bdver2__");
 112       break;
 113     case PROCESSOR_BDVER3:
 114       def_or_undef (parse_in, "__bdver3");
 115       def_or_undef (parse_in, "__bdver3__");
 116       break;
 117     case PROCESSOR_BDVER4:
 118       def_or_undef (parse_in, "__bdver4");
 119       def_or_undef (parse_in, "__bdver4__");
 120       break;
 121     case PROCESSOR_ZNVER1:
 122       def_or_undef (parse_in, "__znver1");
 123       def_or_undef (parse_in, "__znver1__");
 124       break;
 125     case PROCESSOR_BTVER1:
 126       def_or_undef (parse_in, "__btver1");
 127       def_or_undef (parse_in, "__btver1__");
 128       break;
 129     case PROCESSOR_BTVER2:
 130       def_or_undef (parse_in, "__btver2");
 131       def_or_undef (parse_in, "__btver2__");
 132       break;
 133     case PROCESSOR_PENTIUM4:
 134       def_or_undef (parse_in, "__pentium4");
 135       def_or_undef (parse_in, "__pentium4__");
 136       break;
 137     case PROCESSOR_NOCONA:
 138       def_or_undef (parse_in, "__nocona");
 139       def_or_undef (parse_in, "__nocona__");
 140       break;
 141     case PROCESSOR_CORE2:
 142       def_or_undef (parse_in, "__core2");
 143       def_or_undef (parse_in, "__core2__");
 144       break;
 145     case PROCESSOR_NEHALEM:
 146       def_or_undef (parse_in, "__corei7");
 147       def_or_undef (parse_in, "__corei7__");
 148       def_or_undef (parse_in, "__nehalem");
 149       def_or_undef (parse_in, "__nehalem__");
 150       break;
 151     case PROCESSOR_SANDYBRIDGE:
 152       def_or_undef (parse_in, "__corei7_avx");
 153       def_or_undef (parse_in, "__corei7_avx__");
 154       def_or_undef (parse_in, "__sandybridge");
 155       def_or_undef (parse_in, "__sandybridge__");
 156       break;
 157     case PROCESSOR_HASWELL:
 158       def_or_undef (parse_in, "__core_avx2");
 159       def_or_undef (parse_in, "__core_avx2__");
 160       def_or_undef (parse_in, "__haswell");
 161       def_or_undef (parse_in, "__haswell__");
 162       break;
 163     case PROCESSOR_BONNELL:
 164       def_or_undef (parse_in, "__atom");
 165       def_or_undef (parse_in, "__atom__");
 166       def_or_undef (parse_in, "__bonnell");
 167       def_or_undef (parse_in, "__bonnell__");
 168       break;
 169     case PROCESSOR_SILVERMONT:
 170       def_or_undef (parse_in, "__slm");
 171       def_or_undef (parse_in, "__slm__");
 172       def_or_undef (parse_in, "__silvermont");
 173       def_or_undef (parse_in, "__silvermont__");
 174       break;
 175     case PROCESSOR_KNL:
 176       def_or_undef (parse_in, "__knl");
 177       def_or_undef (parse_in, "__knl__");
 178       break;
 179     case PROCESSOR_SKYLAKE_AVX512:
 180       def_or_undef (parse_in, "__skylake_avx512");
 181       def_or_undef (parse_in, "__skylake_avx512__");
 182       break;
 183     /* use PROCESSOR_max to not set/unset the arch macro.  */
 184     case PROCESSOR_max:
 185       break;
 186     case PROCESSOR_INTEL:
 187     case PROCESSOR_GENERIC:
 188       gcc_unreachable ();
 189     }
 190
 191   /* Built-ins based on -mtune=.  */
 192   switch (tune)
 193     {
 194     case PROCESSOR_I386:
 195       def_or_undef (parse_in, "__tune_i386__");
 196       break;
 197     case PROCESSOR_I486:
 198       def_or_undef (parse_in, "__tune_i486__");
 199       break;
 200     case PROCESSOR_PENTIUM:
 201       def_or_undef (parse_in, "__tune_i586__");
 202       def_or_undef (parse_in, "__tune_pentium__");
 203       if (last_tune_char == 'x')
 204         def_or_undef (parse_in, "__tune_pentium_mmx__");
 205       break;
 206     case PROCESSOR_PENTIUMPRO:
 207       def_or_undef (parse_in, "__tune_i686__");
 208       def_or_undef (parse_in, "__tune_pentiumpro__");
 209       switch (last_tune_char)
 210         {
 211         case '3':
 212           def_or_undef (parse_in, "__tune_pentium3__");
 213           /* FALLTHRU */
 214         case '2':
 215           def_or_undef (parse_in, "__tune_pentium2__");
 216           break;
 217         }
 218       break;
 219     case PROCESSOR_GEODE:
 220       def_or_undef (parse_in, "__tune_geode__");
 221       break;
 222     case PROCESSOR_K6:
 223       def_or_undef (parse_in, "__tune_k6__");
 224       if (last_tune_char == '2')
 225         def_or_undef (parse_in, "__tune_k6_2__");
 226       else if (last_tune_char == '3')
 227         def_or_undef (parse_in, "__tune_k6_3__");
 228       else if (isa_flag & OPTION_MASK_ISA_3DNOW)
 229         def_or_undef (parse_in, "__tune_k6_3__");
 230       break;
 231     case PROCESSOR_ATHLON:
 232       def_or_undef (parse_in, "__tune_athlon__");
 233       if (isa_flag & OPTION_MASK_ISA_SSE)
 234         def_or_undef (parse_in, "__tune_athlon_sse__");
 235       break;
 236     case PROCESSOR_K8:
 237       def_or_undef (parse_in, "__tune_k8__");
 238       break;
 239     case PROCESSOR_AMDFAM10:
 240       def_or_undef (parse_in, "__tune_amdfam10__");
 241       break;
 242     case PROCESSOR_BDVER1:
 243       def_or_undef (parse_in, "__tune_bdver1__");
 244       break;
 245     case PROCESSOR_BDVER2:
 246       def_or_undef (parse_in, "__tune_bdver2__");
 247       break;
 248     case PROCESSOR_BDVER3:
 249       def_or_undef (parse_in, "__tune_bdver3__");
 250       break;
 251     case PROCESSOR_BDVER4:
 252       def_or_undef (parse_in, "__tune_bdver4__");
 253       break;
 254     case PROCESSOR_ZNVER1:
 255       def_or_undef (parse_in, "__tune_znver1__");
 256       break;
 257     case PROCESSOR_BTVER1:
 258       def_or_undef (parse_in, "__tune_btver1__");
 259       break;
 260     case PROCESSOR_BTVER2:
 261       def_or_undef (parse_in, "__tune_btver2__");
 262        break;
 263     case PROCESSOR_PENTIUM4:
 264       def_or_undef (parse_in, "__tune_pentium4__");
 265       break;
 266     case PROCESSOR_NOCONA:
 267       def_or_undef (parse_in, "__tune_nocona__");
 268       break;
 269     case PROCESSOR_CORE2:
 270       def_or_undef (parse_in, "__tune_core2__");
 271       break;
 272     case PROCESSOR_NEHALEM:
 273       def_or_undef (parse_in, "__tune_corei7__");
 274       def_or_undef (parse_in, "__tune_nehalem__");
 275       break;
 276     case PROCESSOR_SANDYBRIDGE:
 277       def_or_undef (parse_in, "__tune_corei7_avx__");
 278       def_or_undef (parse_in, "__tune_sandybridge__");
 279       break;
 280     case PROCESSOR_HASWELL:
 281       def_or_undef (parse_in, "__tune_core_avx2__");
 282       def_or_undef (parse_in, "__tune_haswell__");
 283       break;
 284     case PROCESSOR_BONNELL:
 285       def_or_undef (parse_in, "__tune_atom__");
 286       def_or_undef (parse_in, "__tune_bonnell__");
 287       break;
 288     case PROCESSOR_SILVERMONT:
 289       def_or_undef (parse_in, "__tune_slm__");
 290       def_or_undef (parse_in, "__tune_silvermont__");
 291       break;
 292     case PROCESSOR_KNL:
 293       def_or_undef (parse_in, "__tune_knl__");
 294       break;
 295     case PROCESSOR_SKYLAKE_AVX512:
 296       def_or_undef (parse_in, "__tune_skylake_avx512__");
 297       break;
 298     case PROCESSOR_LAKEMONT:
 299       def_or_undef (parse_in, "__tune_lakemont__");
 300       break;
 301     case PROCESSOR_INTEL:
 302     case PROCESSOR_GENERIC:
 303       break;
 304     /* use PROCESSOR_max to not set/unset the tune macro.  */
 305     case PROCESSOR_max:
 306       break;
 307     }
 308
 309   switch (ix86_cmodel)
 310     {
 311     case CM_SMALL:
 312     case CM_SMALL_PIC:
 313       def_or_undef (parse_in, "__code_model_small__");
 314       break;
 315     case CM_MEDIUM:
 316     case CM_MEDIUM_PIC:
 317       def_or_undef (parse_in, "__code_model_medium__");
 318       break;
 319     case CM_LARGE:
 320     case CM_LARGE_PIC:
 321       def_or_undef (parse_in, "__code_model_large__");
 322       break;
 323     case CM_32:
 324       def_or_undef (parse_in, "__code_model_32__");
 325       break;
 326     case CM_KERNEL:
 327       def_or_undef (parse_in, "__code_model_kernel__");
 328       break;
 329     default:
 330       ;
 331     }
 332
 333   if (isa_flag & OPTION_MASK_ISA_MMX)
 334     def_or_undef (parse_in, "__MMX__");
 335   if (isa_flag & OPTION_MASK_ISA_3DNOW)
 336     def_or_undef (parse_in, "__3dNOW__");
 337   if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
 338     def_or_undef (parse_in, "__3dNOW_A__");
 339   if (isa_flag & OPTION_MASK_ISA_SSE)
 340     def_or_undef (parse_in, "__SSE__");
 341   if (isa_flag & OPTION_MASK_ISA_SSE2)
 342     def_or_undef (parse_in, "__SSE2__");
 343   if (isa_flag & OPTION_MASK_ISA_SSE3)
 344     def_or_undef (parse_in, "__SSE3__");
 345   if (isa_flag & OPTION_MASK_ISA_SSSE3)
 346     def_or_undef (parse_in, "__SSSE3__");
 347   if (isa_flag & OPTION_MASK_ISA_SSE4_1)
 348     def_or_undef (parse_in, "__SSE4_1__");
 349   if (isa_flag & OPTION_MASK_ISA_SSE4_2)
 350     def_or_undef (parse_in, "__SSE4_2__");
 351   if (isa_flag & OPTION_MASK_ISA_AES)
 352     def_or_undef (parse_in, "__AES__");
 353   if (isa_flag & OPTION_MASK_ISA_SHA)
 354     def_or_undef (parse_in, "__SHA__");
 355   if (isa_flag & OPTION_MASK_ISA_PCLMUL)
 356     def_or_undef (parse_in, "__PCLMUL__");
 357   if (isa_flag & OPTION_MASK_ISA_AVX)
 358     def_or_undef (parse_in, "__AVX__");
 359   if (isa_flag & OPTION_MASK_ISA_AVX2)
 360     def_or_undef (parse_in, "__AVX2__");
 361   if (isa_flag & OPTION_MASK_ISA_AVX512F)
 362     def_or_undef (parse_in, "__AVX512F__");
 363   if (isa_flag & OPTION_MASK_ISA_AVX512ER)
 364     def_or_undef (parse_in, "__AVX512ER__");
 365   if (isa_flag & OPTION_MASK_ISA_AVX512CD)
 366     def_or_undef (parse_in, "__AVX512CD__");
 367   if (isa_flag & OPTION_MASK_ISA_AVX512PF)
 368     def_or_undef (parse_in, "__AVX512PF__");
 369   if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
 370     def_or_undef (parse_in, "__AVX512DQ__");
 371   if (isa_flag & OPTION_MASK_ISA_AVX512BW)
 372     def_or_undef (parse_in, "__AVX512BW__");
 373   if (isa_flag & OPTION_MASK_ISA_AVX512VL)
 374     def_or_undef (parse_in, "__AVX512VL__");
 375   if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
 376     def_or_undef (parse_in, "__AVX512VBMI__");
 377   if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
 378     def_or_undef (parse_in, "__AVX512IFMA__");
 379   if (isa_flag & OPTION_MASK_ISA_FMA)
 380     def_or_undef (parse_in, "__FMA__");
 381   if (isa_flag & OPTION_MASK_ISA_RTM)
 382     def_or_undef (parse_in, "__RTM__");
 383   if (isa_flag & OPTION_MASK_ISA_SSE4A)
 384     def_or_undef (parse_in, "__SSE4A__");
 385   if (isa_flag & OPTION_MASK_ISA_FMA4)
 386     def_or_undef (parse_in, "__FMA4__");
 387   if (isa_flag & OPTION_MASK_ISA_XOP)
 388     def_or_undef (parse_in, "__XOP__");
 389   if (isa_flag & OPTION_MASK_ISA_LWP)
 390     def_or_undef (parse_in, "__LWP__");
 391   if (isa_flag & OPTION_MASK_ISA_ABM)
 392     def_or_undef (parse_in, "__ABM__");
 393   if (isa_flag & OPTION_MASK_ISA_BMI)
 394     def_or_undef (parse_in, "__BMI__");
 395   if (isa_flag & OPTION_MASK_ISA_BMI2)
 396     def_or_undef (parse_in, "__BMI2__");
 397   if (isa_flag & OPTION_MASK_ISA_LZCNT)
 398     def_or_undef (parse_in, "__LZCNT__");
 399   if (isa_flag & OPTION_MASK_ISA_TBM)
 400     def_or_undef (parse_in, "__TBM__");
 401   if (isa_flag & OPTION_MASK_ISA_POPCNT)
 402     def_or_undef (parse_in, "__POPCNT__");
 403   if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
 404     def_or_undef (parse_in, "__FSGSBASE__");
 405   if (isa_flag & OPTION_MASK_ISA_RDRND)
 406     def_or_undef (parse_in, "__RDRND__");
 407   if (isa_flag & OPTION_MASK_ISA_F16C)
 408     def_or_undef (parse_in, "__F16C__");
 409   if (isa_flag & OPTION_MASK_ISA_RDSEED)
 410     def_or_undef (parse_in, "__RDSEED__");
 411   if (isa_flag & OPTION_MASK_ISA_PRFCHW)
 412     def_or_undef (parse_in, "__PRFCHW__");
 413   if (isa_flag & OPTION_MASK_ISA_ADX)
 414     def_or_undef (parse_in, "__ADX__");
 415   if (isa_flag & OPTION_MASK_ISA_FXSR)
 416     def_or_undef (parse_in, "__FXSR__");
 417   if (isa_flag & OPTION_MASK_ISA_XSAVE)
 418     def_or_undef (parse_in, "__XSAVE__");
 419   if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
 420     def_or_undef (parse_in, "__XSAVEOPT__");
 421   if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1)
 422     def_or_undef (parse_in, "__PREFETCHWT1__");
 423   if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
 424     def_or_undef (parse_in, "__SSE_MATH__");
 425   if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
 426     def_or_undef (parse_in, "__SSE2_MATH__");
 427   if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
 428     def_or_undef (parse_in, "__CLFLUSHOPT__");
 429   if (isa_flag & OPTION_MASK_ISA_CLZERO)
 430     def_or_undef (parse_in, "__CLZERO__");
 431   if (isa_flag & OPTION_MASK_ISA_XSAVEC)
 432     def_or_undef (parse_in, "__XSAVEC__");
 433   if (isa_flag & OPTION_MASK_ISA_XSAVES)
 434     def_or_undef (parse_in, "__XSAVES__");
 435   if (isa_flag & OPTION_MASK_ISA_MPX)
 436     def_or_undef (parse_in, "__MPX__");
 437   if (isa_flag & OPTION_MASK_ISA_CLWB)
 438     def_or_undef (parse_in, "__CLWB__");
 439   if (isa_flag & OPTION_MASK_ISA_MWAITX)
 440     def_or_undef (parse_in, "__MWAITX__");
 441   if (isa_flag & OPTION_MASK_ISA_PKU)
 442     def_or_undef (parse_in, "__PKU__");
 443   if (TARGET_IAMCU)
 444     {
 445       def_or_undef (parse_in, "__iamcu");
 446       def_or_undef (parse_in, "__iamcu__");
 447     }
 448 }
 449
 450 \f
 451 /* Hook to validate the current #pragma GCC target and set the state, and
 452    update the macros based on what was changed.  If ARGS is NULL, then
 453    POP_TARGET is used to reset the options.  */
 454
 455 static bool
 456 ix86_pragma_target_parse (tree args, tree pop_target)
 457 {
 458   tree prev_tree = build_target_option_node (&global_options);
 459   tree cur_tree;
 460   struct cl_target_option *prev_opt;
 461   struct cl_target_option *cur_opt;
 462   HOST_WIDE_INT prev_isa;
 463   HOST_WIDE_INT cur_isa;
 464   HOST_WIDE_INT diff_isa;
 465   enum processor_type prev_arch;
 466   enum processor_type prev_tune;
 467   enum processor_type cur_arch;
 468   enum processor_type cur_tune;
 469
 470   if (! args)
 471     {
 472       cur_tree = (pop_target ? pop_target : target_option_default_node);
 473       cl_target_option_restore (&global_options,
 474                                 TREE_TARGET_OPTION (cur_tree));
 475     }
 476   else
 477     {
 478       cur_tree = ix86_valid_target_attribute_tree (args, &global_options,
 479                                                    &global_options_set);
 480       if (!cur_tree || cur_tree == error_mark_node)
 481        {
 482          cl_target_option_restore (&global_options,
 483                                    TREE_TARGET_OPTION (prev_tree));
 484          return false;
 485        }
 486     }
 487
 488   target_option_current_node = cur_tree;
 489   ix86_reset_previous_fndecl ();
 490
 491   /* Figure out the previous/current isa, arch, tune and the differences.  */
 492   prev_opt  = TREE_TARGET_OPTION (prev_tree);
 493   cur_opt   = TREE_TARGET_OPTION (cur_tree);
 494   prev_isa  = prev_opt->x_ix86_isa_flags;
 495   cur_isa   = cur_opt->x_ix86_isa_flags;
 496   diff_isa  = (prev_isa ^ cur_isa);
 497   prev_arch = (enum processor_type) prev_opt->arch;
 498   prev_tune = (enum processor_type) prev_opt->tune;
 499   cur_arch  = (enum processor_type) cur_opt->arch;
 500   cur_tune  = (enum processor_type) cur_opt->tune;
 501
 502   /* If the same processor is used for both previous and current options, don't
 503      change the macros.  */
 504   if (cur_arch == prev_arch)
 505     cur_arch = prev_arch = PROCESSOR_max;
 506
 507   if (cur_tune == prev_tune)
 508     cur_tune = prev_tune = PROCESSOR_max;
 509
 510   /* Undef all of the macros for that are no longer current.  */
 511   ix86_target_macros_internal (prev_isa & diff_isa,
 512                                prev_arch,
 513                                prev_tune,
 514                                (enum fpmath_unit) prev_opt->x_ix86_fpmath,
 515                                cpp_undef);
 516
 517   /* For the definitions, ensure all newly defined macros are considered
 518      as used for -Wunused-macros.  There is no point warning about the
 519      compiler predefined macros.  */
 520   cpp_options *cpp_opts = cpp_get_options (parse_in);
 521   unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
 522   cpp_opts->warn_unused_macros = 0;
 523
 524   /* Define all of the macros for new options that were just turned on.  */
 525   ix86_target_macros_internal (cur_isa & diff_isa,
 526                                cur_arch,
 527                                cur_tune,
 528                                (enum fpmath_unit) cur_opt->x_ix86_fpmath,
 529                                cpp_define);
 530
 531   cpp_opts->warn_unused_macros = saved_warn_unused_macros;
 532
 533   return true;
 534 }
 535 \f
 536 /* Function to tell the preprocessor about the defines for the current target.  */
 537
 538 void
 539 ix86_target_macros (void)
 540 {
 541   /* 32/64-bit won't change with target specific options, so do the assert and
 542      builtin_define_std calls here.  */
 543   if (TARGET_64BIT)
 544     {
 545       cpp_assert (parse_in, "cpu=x86_64");
 546       cpp_assert (parse_in, "machine=x86_64");
 547       cpp_define (parse_in, "__amd64");
 548       cpp_define (parse_in, "__amd64__");
 549       cpp_define (parse_in, "__x86_64");
 550       cpp_define (parse_in, "__x86_64__");
 551       if (TARGET_X32)
 552         {
 553           cpp_define (parse_in, "_ILP32");
 554           cpp_define (parse_in, "__ILP32__");
 555         }
 556     }
 557   else
 558     {
 559       cpp_assert (parse_in, "cpu=i386");
 560       cpp_assert (parse_in, "machine=i386");
 561       builtin_define_std ("i386");
 562     }
 563
 564   if (!TARGET_80387)
 565     cpp_define (parse_in, "_SOFT_FLOAT");
 566
 567   if (TARGET_LONG_DOUBLE_64)
 568     cpp_define (parse_in, "__LONG_DOUBLE_64__");
 569
 570   if (TARGET_LONG_DOUBLE_128)
 571     cpp_define (parse_in, "__LONG_DOUBLE_128__");
 572
 573   if (TARGET_128BIT_LONG_DOUBLE)
 574     cpp_define (parse_in, "__SIZEOF_FLOAT80__=16");
 575   else
 576     cpp_define (parse_in, "__SIZEOF_FLOAT80__=12");
 577
 578   cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
 579
 580   cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
 581   cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
 582
 583   cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
 584
 585   ix86_target_macros_internal (ix86_isa_flags,
 586                                ix86_arch,
 587                                ix86_tune,
 588                                ix86_fpmath,
 589                                cpp_define);
 590
 591   cpp_define (parse_in, "__SEG_FS");
 592   cpp_define (parse_in, "__SEG_GS");
 593 }
 594
 595 \f
 596 /* Register target pragmas.  We need to add the hook for parsing #pragma GCC
 597    option here rather than in i386.c since it will pull in various preprocessor
 598    functions, and those are not present in languages like fortran without a
 599    preprocessor.  */
 600
 601 void
 602 ix86_register_pragmas (void)
 603 {
 604   /* Update pragma hook to allow parsing #pragma GCC target.  */
 605   targetm.target_option.pragma_parse = ix86_pragma_target_parse;
 606
 607   c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
 608   c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
 609
 610 #ifdef REGISTER_SUBTARGET_PRAGMAS
 611   REGISTER_SUBTARGET_PRAGMAS ();
 612 #endif
 613 }