1 /* Subroutines used by or related to instruction recognition.
2 Copyright (C) 1987, 1988, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "insn-config.h"
26 #include "insn-attr.h"
27 #include "insn-flags.h"
28 #include "insn-codes.h"
31 #include "hard-reg-set.h"
35 #ifndef STACK_PUSH_CODE
36 #ifdef STACK_GROWS_DOWNWARD
37 #define STACK_PUSH_CODE PRE_DEC
39 #define STACK_PUSH_CODE PRE_INC
43 /* Import from final.c: */
44 extern rtx
alter_subreg ();
46 static void validate_replace_rtx_1
PROTO((rtx
*, rtx
, rtx
, rtx
));
47 static rtx
*find_single_use_1
PROTO((rtx
, rtx
*));
48 static rtx
*find_constant_term_loc
PROTO((rtx
*));
50 /* Nonzero means allow operands to be volatile.
51 This should be 0 if you are generating rtl, such as if you are calling
52 the functions in optabs.c and expmed.c (most of the time).
53 This should be 1 if all valid insns need to be recognized,
54 such as in regclass.c and final.c and reload.c.
56 init_recog and init_recog_no_volatile are responsible for setting this. */
60 /* On return from `constrain_operands', indicate which alternative
63 int which_alternative
;
65 /* Nonzero after end of reload pass.
66 Set to 1 or 0 by toplev.c.
67 Controls the significance of (SUBREG (MEM)). */
71 /* Initialize data used by the function `recog'.
72 This must be called once in the compilation of a function
73 before any insn recognition may be done in the function. */
76 init_recog_no_volatile ()
87 /* Try recognizing the instruction INSN,
88 and return the code number that results.
89 Remember the code so that repeated calls do not
90 need to spend the time for actual rerecognition.
92 This function is the normal interface to instruction recognition.
93 The automatically-generated function `recog' is normally called
94 through this one. (The only exception is in combine.c.) */
100 if (INSN_CODE (insn
) < 0)
101 INSN_CODE (insn
) = recog (PATTERN (insn
), insn
, NULL_PTR
);
102 return INSN_CODE (insn
);
105 /* Check that X is an insn-body for an `asm' with operands
106 and that the operands mentioned in it are legitimate. */
109 check_asm_operands (x
)
112 int noperands
= asm_noperands (x
);
121 operands
= (rtx
*) alloca (noperands
* sizeof (rtx
));
122 decode_asm_operands (x
, operands
, NULL_PTR
, NULL_PTR
, NULL_PTR
);
124 for (i
= 0; i
< noperands
; i
++)
125 if (!general_operand (operands
[i
], VOIDmode
))
131 /* Static data for the next two routines. */
133 typedef struct change_t
141 static change_t
*changes
;
142 static int changes_allocated
;
144 static int num_changes
= 0;
146 /* Validate a proposed change to OBJECT. LOC is the location in the rtl for
147 at which NEW will be placed. If OBJECT is zero, no validation is done,
148 the change is simply made.
150 Two types of objects are supported: If OBJECT is a MEM, memory_address_p
151 will be called with the address and mode as parameters. If OBJECT is
152 an INSN, CALL_INSN, or JUMP_INSN, the insn will be re-recognized with
155 IN_GROUP is non-zero if this is part of a group of changes that must be
156 performed as a group. In that case, the changes will be stored. The
157 function `apply_change_group' will validate and apply the changes.
159 If IN_GROUP is zero, this is a single change. Try to recognize the insn
160 or validate the memory reference with the change applied. If the result
161 is not valid for the machine, suppress the change and return zero.
162 Otherwise, perform the change and return 1. */
165 validate_change (object
, loc
, new, in_group
)
173 if (old
== new || rtx_equal_p (old
, new))
176 if (in_group
== 0 && num_changes
!= 0)
181 /* Save the information describing this change. */
182 if (num_changes
>= changes_allocated
)
184 if (changes_allocated
== 0)
185 /* This value allows for repeated substitutions inside complex
186 indexed addresses, or changes in up to 5 insns. */
187 changes_allocated
= MAX_RECOG_OPERANDS
* 5;
189 changes_allocated
*= 2;
192 (change_t
*) xrealloc (changes
,
193 sizeof (change_t
) * changes_allocated
);
196 changes
[num_changes
].object
= object
;
197 changes
[num_changes
].loc
= loc
;
198 changes
[num_changes
].old
= old
;
200 if (object
&& GET_CODE (object
) != MEM
)
202 /* Set INSN_CODE to force rerecognition of insn. Save old code in
204 changes
[num_changes
].old_code
= INSN_CODE (object
);
205 INSN_CODE (object
) = -1;
210 /* If we are making a group of changes, return 1. Otherwise, validate the
211 change group we made. */
216 return apply_change_group ();
219 /* Apply a group of changes previously issued with `validate_change'.
220 Return 1 if all changes are valid, zero otherwise. */
223 apply_change_group ()
227 /* The changes have been applied and all INSN_CODEs have been reset to force
230 The changes are valid if we aren't given an object, or if we are
231 given a MEM and it still is a valid address, or if this is in insn
232 and it is recognized. In the latter case, if reload has completed,
233 we also require that the operands meet the constraints for
234 the insn. We do not allow modifying an ASM_OPERANDS after reload
235 has completed because verifying the constraints is too difficult. */
237 for (i
= 0; i
< num_changes
; i
++)
239 rtx object
= changes
[i
].object
;
244 if (GET_CODE (object
) == MEM
)
246 if (! memory_address_p (GET_MODE (object
), XEXP (object
, 0)))
249 else if ((recog_memoized (object
) < 0
250 && (asm_noperands (PATTERN (object
)) < 0
251 || ! check_asm_operands (PATTERN (object
))
252 || reload_completed
))
254 && (insn_extract (object
),
255 ! constrain_operands (INSN_CODE (object
), 1))))
257 rtx pat
= PATTERN (object
);
259 /* Perhaps we couldn't recognize the insn because there were
260 extra CLOBBERs at the end. If so, try to re-recognize
261 without the last CLOBBER (later iterations will cause each of
262 them to be eliminated, in turn). But don't do this if we
263 have an ASM_OPERAND. */
264 if (GET_CODE (pat
) == PARALLEL
265 && GET_CODE (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1)) == CLOBBER
266 && asm_noperands (PATTERN (object
)) < 0)
270 if (XVECLEN (pat
, 0) == 2)
271 newpat
= XVECEXP (pat
, 0, 0);
276 newpat
= gen_rtx_PARALLEL (VOIDmode
,
277 gen_rtvec (XVECLEN (pat
, 0) - 1));
278 for (j
= 0; j
< XVECLEN (newpat
, 0); j
++)
279 XVECEXP (newpat
, 0, j
) = XVECEXP (pat
, 0, j
);
282 /* Add a new change to this group to replace the pattern
283 with this new pattern. Then consider this change
284 as having succeeded. The change we added will
285 cause the entire call to fail if things remain invalid.
287 Note that this can lose if a later change than the one
288 we are processing specified &XVECEXP (PATTERN (object), 0, X)
289 but this shouldn't occur. */
291 validate_change (object
, &PATTERN (object
), newpat
, 1);
293 else if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
294 /* If this insn is a CLOBBER or USE, it is always valid, but is
302 if (i
== num_changes
)
314 /* Return the number of changes so far in the current group. */
317 num_validated_changes ()
322 /* Retract the changes numbered NUM and up. */
330 /* Back out all the changes. Do this in the opposite order in which
332 for (i
= num_changes
- 1; i
>= num
; i
--)
334 *changes
[i
].loc
= changes
[i
].old
;
335 if (changes
[i
].object
&& GET_CODE (changes
[i
].object
) != MEM
)
336 INSN_CODE (changes
[i
].object
) = changes
[i
].old_code
;
341 /* Replace every occurrence of FROM in X with TO. Mark each change with
342 validate_change passing OBJECT. */
345 validate_replace_rtx_1 (loc
, from
, to
, object
)
347 rtx from
, to
, object
;
351 register rtx x
= *loc
;
352 enum rtx_code code
= GET_CODE (x
);
354 /* X matches FROM if it is the same rtx or they are both referring to the
355 same register in the same mode. Avoid calling rtx_equal_p unless the
356 operands look similar. */
359 || (GET_CODE (x
) == REG
&& GET_CODE (from
) == REG
360 && GET_MODE (x
) == GET_MODE (from
)
361 && REGNO (x
) == REGNO (from
))
362 || (GET_CODE (x
) == GET_CODE (from
) && GET_MODE (x
) == GET_MODE (from
)
363 && rtx_equal_p (x
, from
)))
365 validate_change (object
, loc
, to
, 1);
369 /* For commutative or comparison operations, try replacing each argument
370 separately and seeing if we made any changes. If so, put a constant
372 if (GET_RTX_CLASS (code
) == '<' || GET_RTX_CLASS (code
) == 'c')
374 int prev_changes
= num_changes
;
376 validate_replace_rtx_1 (&XEXP (x
, 0), from
, to
, object
);
377 validate_replace_rtx_1 (&XEXP (x
, 1), from
, to
, object
);
378 if (prev_changes
!= num_changes
&& CONSTANT_P (XEXP (x
, 0)))
380 validate_change (object
, loc
,
381 gen_rtx_fmt_ee (GET_RTX_CLASS (code
) == 'c' ? code
382 : swap_condition (code
),
383 GET_MODE (x
), XEXP (x
, 1),
391 /* Note that if CODE's RTX_CLASS is "c" or "<" we will have already
392 done the substitution, otherwise we won't. */
397 /* If we have a PLUS whose second operand is now a CONST_INT, use
398 plus_constant to try to simplify it. */
399 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
&& XEXP (x
, 1) == to
)
400 validate_change (object
, loc
, plus_constant (XEXP (x
, 0), INTVAL (to
)),
405 if (GET_CODE (to
) == CONST_INT
&& XEXP (x
, 1) == from
)
407 validate_change (object
, loc
,
408 plus_constant (XEXP (x
, 0), - INTVAL (to
)),
416 /* In these cases, the operation to be performed depends on the mode
417 of the operand. If we are replacing the operand with a VOIDmode
418 constant, we lose the information. So try to simplify the operation
419 in that case. If it fails, substitute in something that we know
420 won't be recognized. */
421 if (GET_MODE (to
) == VOIDmode
422 && (XEXP (x
, 0) == from
423 || (GET_CODE (XEXP (x
, 0)) == REG
&& GET_CODE (from
) == REG
424 && GET_MODE (XEXP (x
, 0)) == GET_MODE (from
)
425 && REGNO (XEXP (x
, 0)) == REGNO (from
))))
427 rtx
new = simplify_unary_operation (code
, GET_MODE (x
), to
,
430 new = gen_rtx_CLOBBER (GET_MODE (x
), const0_rtx
);
432 validate_change (object
, loc
, new, 1);
438 /* If we have a SUBREG of a register that we are replacing and we are
439 replacing it with a MEM, make a new MEM and try replacing the
440 SUBREG with it. Don't do this if the MEM has a mode-dependent address
441 or if we would be widening it. */
443 if (SUBREG_REG (x
) == from
444 && GET_CODE (from
) == REG
445 && GET_CODE (to
) == MEM
446 && ! mode_dependent_address_p (XEXP (to
, 0))
447 && ! MEM_VOLATILE_P (to
)
448 && GET_MODE_SIZE (GET_MODE (x
)) <= GET_MODE_SIZE (GET_MODE (to
)))
450 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
451 enum machine_mode mode
= GET_MODE (x
);
454 if (BYTES_BIG_ENDIAN
)
455 offset
+= (MIN (UNITS_PER_WORD
,
456 GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
457 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
)));
459 new = gen_rtx_MEM (mode
, plus_constant (XEXP (to
, 0), offset
));
460 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (to
);
461 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (to
);
462 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (to
);
463 validate_change (object
, loc
, new, 1);
470 /* If we are replacing a register with memory, try to change the memory
471 to be the mode required for memory in extract operations (this isn't
472 likely to be an insertion operation; if it was, nothing bad will
473 happen, we might just fail in some cases). */
475 if (XEXP (x
, 0) == from
&& GET_CODE (from
) == REG
&& GET_CODE (to
) == MEM
476 && GET_CODE (XEXP (x
, 1)) == CONST_INT
477 && GET_CODE (XEXP (x
, 2)) == CONST_INT
478 && ! mode_dependent_address_p (XEXP (to
, 0))
479 && ! MEM_VOLATILE_P (to
))
481 enum machine_mode wanted_mode
= VOIDmode
;
482 enum machine_mode is_mode
= GET_MODE (to
);
483 int pos
= INTVAL (XEXP (x
, 2));
486 if (code
== ZERO_EXTRACT
)
488 wanted_mode
= insn_operand_mode
[(int) CODE_FOR_extzv
][1];
489 if (wanted_mode
== VOIDmode
)
490 wanted_mode
= word_mode
;
494 if (code
== SIGN_EXTRACT
)
496 wanted_mode
= insn_operand_mode
[(int) CODE_FOR_extv
][1];
497 if (wanted_mode
== VOIDmode
)
498 wanted_mode
= word_mode
;
502 /* If we have a narrower mode, we can do something. */
503 if (wanted_mode
!= VOIDmode
504 && GET_MODE_SIZE (wanted_mode
) < GET_MODE_SIZE (is_mode
))
506 int offset
= pos
/ BITS_PER_UNIT
;
509 /* If the bytes and bits are counted differently, we
510 must adjust the offset. */
511 if (BYTES_BIG_ENDIAN
!= BITS_BIG_ENDIAN
)
512 offset
= (GET_MODE_SIZE (is_mode
) - GET_MODE_SIZE (wanted_mode
)
515 pos
%= GET_MODE_BITSIZE (wanted_mode
);
517 newmem
= gen_rtx_MEM (wanted_mode
,
518 plus_constant (XEXP (to
, 0), offset
));
519 RTX_UNCHANGING_P (newmem
) = RTX_UNCHANGING_P (to
);
520 MEM_VOLATILE_P (newmem
) = MEM_VOLATILE_P (to
);
521 MEM_IN_STRUCT_P (newmem
) = MEM_IN_STRUCT_P (to
);
523 validate_change (object
, &XEXP (x
, 2), GEN_INT (pos
), 1);
524 validate_change (object
, &XEXP (x
, 0), newmem
, 1);
534 /* For commutative or comparison operations we've already performed
535 replacements. Don't try to perform them again. */
536 if (GET_RTX_CLASS (code
) != '<' && GET_RTX_CLASS (code
) != 'c')
538 fmt
= GET_RTX_FORMAT (code
);
539 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
542 validate_replace_rtx_1 (&XEXP (x
, i
), from
, to
, object
);
543 else if (fmt
[i
] == 'E')
544 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
545 validate_replace_rtx_1 (&XVECEXP (x
, i
, j
), from
, to
, object
);
550 /* Try replacing every occurrence of FROM in INSN with TO. After all
551 changes have been made, validate by seeing if INSN is still valid. */
554 validate_replace_rtx (from
, to
, insn
)
557 validate_replace_rtx_1 (&PATTERN (insn
), from
, to
, insn
);
558 return apply_change_group ();
561 /* Try replacing every occurrence of FROM in INSN with TO. After all
562 changes have been made, validate by seeing if INSN is still valid. */
565 validate_replace_rtx_group (from
, to
, insn
)
568 validate_replace_rtx_1 (&PATTERN (insn
), from
, to
, insn
);
571 /* Try replacing every occurrence of FROM in INSN with TO, avoiding
572 SET_DESTs. After all changes have been made, validate by seeing if
573 INSN is still valid. */
576 validate_replace_src (from
, to
, insn
)
579 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != JUMP_INSN
)
580 || GET_CODE (PATTERN (insn
)) != SET
)
583 validate_replace_rtx_1 (&SET_SRC (PATTERN (insn
)), from
, to
, insn
);
584 if (GET_CODE (SET_DEST (PATTERN (insn
))) == MEM
)
585 validate_replace_rtx_1 (&XEXP (SET_DEST (PATTERN (insn
)), 0),
587 return apply_change_group ();
591 /* Return 1 if the insn using CC0 set by INSN does not contain
592 any ordered tests applied to the condition codes.
593 EQ and NE tests do not count. */
596 next_insn_tests_no_inequality (insn
)
599 register rtx next
= next_cc0_user (insn
);
601 /* If there is no next insn, we have to take the conservative choice. */
605 return ((GET_CODE (next
) == JUMP_INSN
606 || GET_CODE (next
) == INSN
607 || GET_CODE (next
) == CALL_INSN
)
608 && ! inequality_comparisons_p (PATTERN (next
)));
611 #if 0 /* This is useless since the insn that sets the cc's
612 must be followed immediately by the use of them. */
613 /* Return 1 if the CC value set up by INSN is not used. */
616 next_insns_test_no_inequality (insn
)
619 register rtx next
= NEXT_INSN (insn
);
621 for (; next
!= 0; next
= NEXT_INSN (next
))
623 if (GET_CODE (next
) == CODE_LABEL
624 || GET_CODE (next
) == BARRIER
)
626 if (GET_CODE (next
) == NOTE
)
628 if (inequality_comparisons_p (PATTERN (next
)))
630 if (sets_cc0_p (PATTERN (next
)) == 1)
632 if (! reg_mentioned_p (cc0_rtx
, PATTERN (next
)))
640 /* This is used by find_single_use to locate an rtx that contains exactly one
641 use of DEST, which is typically either a REG or CC0. It returns a
642 pointer to the innermost rtx expression containing DEST. Appearances of
643 DEST that are being used to totally replace it are not counted. */
646 find_single_use_1 (dest
, loc
)
651 enum rtx_code code
= GET_CODE (x
);
668 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
669 of a REG that occupies all of the REG, the insn uses DEST if
670 it is mentioned in the destination or the source. Otherwise, we
671 need just check the source. */
672 if (GET_CODE (SET_DEST (x
)) != CC0
673 && GET_CODE (SET_DEST (x
)) != PC
674 && GET_CODE (SET_DEST (x
)) != REG
675 && ! (GET_CODE (SET_DEST (x
)) == SUBREG
676 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
677 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (x
))))
678 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
679 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (x
)))
680 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
683 return find_single_use_1 (dest
, &SET_SRC (x
));
687 return find_single_use_1 (dest
, &XEXP (x
, 0));
693 /* If it wasn't one of the common cases above, check each expression and
694 vector of this code. Look for a unique usage of DEST. */
696 fmt
= GET_RTX_FORMAT (code
);
697 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
701 if (dest
== XEXP (x
, i
)
702 || (GET_CODE (dest
) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
703 && REGNO (dest
) == REGNO (XEXP (x
, i
))))
706 this_result
= find_single_use_1 (dest
, &XEXP (x
, i
));
709 result
= this_result
;
710 else if (this_result
)
711 /* Duplicate usage. */
714 else if (fmt
[i
] == 'E')
718 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
720 if (XVECEXP (x
, i
, j
) == dest
721 || (GET_CODE (dest
) == REG
722 && GET_CODE (XVECEXP (x
, i
, j
)) == REG
723 && REGNO (XVECEXP (x
, i
, j
)) == REGNO (dest
)))
726 this_result
= find_single_use_1 (dest
, &XVECEXP (x
, i
, j
));
729 result
= this_result
;
730 else if (this_result
)
739 /* See if DEST, produced in INSN, is used only a single time in the
740 sequel. If so, return a pointer to the innermost rtx expression in which
743 If PLOC is non-zero, *PLOC is set to the insn containing the single use.
745 This routine will return usually zero either before flow is called (because
746 there will be no LOG_LINKS notes) or after reload (because the REG_DEAD
747 note can't be trusted).
749 If DEST is cc0_rtx, we look only at the next insn. In that case, we don't
750 care about REG_DEAD notes or LOG_LINKS.
752 Otherwise, we find the single use by finding an insn that has a
753 LOG_LINKS pointing at INSN and has a REG_DEAD note for DEST. If DEST is
754 only referenced once in that insn, we know that it must be the first
755 and last insn referencing DEST. */
758 find_single_use (dest
, insn
, ploc
)
770 next
= NEXT_INSN (insn
);
772 || (GET_CODE (next
) != INSN
&& GET_CODE (next
) != JUMP_INSN
))
775 result
= find_single_use_1 (dest
, &PATTERN (next
));
782 if (reload_completed
|| reload_in_progress
|| GET_CODE (dest
) != REG
)
785 for (next
= next_nonnote_insn (insn
);
786 next
!= 0 && GET_CODE (next
) != CODE_LABEL
;
787 next
= next_nonnote_insn (next
))
788 if (GET_RTX_CLASS (GET_CODE (next
)) == 'i' && dead_or_set_p (next
, dest
))
790 for (link
= LOG_LINKS (next
); link
; link
= XEXP (link
, 1))
791 if (XEXP (link
, 0) == insn
)
796 result
= find_single_use_1 (dest
, &PATTERN (next
));
806 /* Return 1 if OP is a valid general operand for machine mode MODE.
807 This is either a register reference, a memory reference,
808 or a constant. In the case of a memory reference, the address
809 is checked for general validity for the target machine.
811 Register and memory references must have mode MODE in order to be valid,
812 but some constants have no machine mode and are valid for any mode.
814 If MODE is VOIDmode, OP is checked for validity for whatever mode
817 The main use of this function is as a predicate in match_operand
818 expressions in the machine description.
820 For an explanation of this function's behavior for registers of
821 class NO_REGS, see the comment for `register_operand'. */
824 general_operand (op
, mode
)
826 enum machine_mode mode
;
828 register enum rtx_code code
= GET_CODE (op
);
829 int mode_altering_drug
= 0;
831 if (mode
== VOIDmode
)
832 mode
= GET_MODE (op
);
834 /* Don't accept CONST_INT or anything similar
835 if the caller wants something floating. */
836 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
837 && GET_MODE_CLASS (mode
) != MODE_INT
838 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
842 return ((GET_MODE (op
) == VOIDmode
|| GET_MODE (op
) == mode
)
843 #ifdef LEGITIMATE_PIC_OPERAND_P
844 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
846 && LEGITIMATE_CONSTANT_P (op
));
848 /* Except for certain constants with VOIDmode, already checked for,
849 OP's mode must match MODE if MODE specifies a mode. */
851 if (GET_MODE (op
) != mode
)
856 #ifdef INSN_SCHEDULING
857 /* On machines that have insn scheduling, we want all memory
858 reference to be explicit, so outlaw paradoxical SUBREGs. */
859 if (GET_CODE (SUBREG_REG (op
)) == MEM
860 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
864 op
= SUBREG_REG (op
);
865 code
= GET_CODE (op
);
867 /* No longer needed, since (SUBREG (MEM...))
868 will load the MEM into a reload reg in the MEM's own mode. */
869 mode_altering_drug
= 1;
874 /* A register whose class is NO_REGS is not a general operand. */
875 return (REGNO (op
) >= FIRST_PSEUDO_REGISTER
876 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
);
880 register rtx y
= XEXP (op
, 0);
881 if (! volatile_ok
&& MEM_VOLATILE_P (op
))
883 if (GET_CODE (y
) == ADDRESSOF
)
885 /* Use the mem's mode, since it will be reloaded thus. */
886 mode
= GET_MODE (op
);
887 GO_IF_LEGITIMATE_ADDRESS (mode
, y
, win
);
890 /* Pretend this is an operand for now; we'll run force_operand
891 on its replacement in fixup_var_refs_1. */
892 if (code
== ADDRESSOF
)
898 if (mode_altering_drug
)
899 return ! mode_dependent_address_p (XEXP (op
, 0));
903 /* Return 1 if OP is a valid memory address for a memory reference
906 The main use of this function is as a predicate in match_operand
907 expressions in the machine description. */
910 address_operand (op
, mode
)
912 enum machine_mode mode
;
914 return memory_address_p (mode
, op
);
917 /* Return 1 if OP is a register reference of mode MODE.
918 If MODE is VOIDmode, accept a register in any mode.
920 The main use of this function is as a predicate in match_operand
921 expressions in the machine description.
923 As a special exception, registers whose class is NO_REGS are
924 not accepted by `register_operand'. The reason for this change
925 is to allow the representation of special architecture artifacts
926 (such as a condition code register) without extending the rtl
927 definitions. Since registers of class NO_REGS cannot be used
928 as registers in any case where register classes are examined,
929 it is most consistent to keep this function from accepting them. */
932 register_operand (op
, mode
)
934 enum machine_mode mode
;
936 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
939 if (GET_CODE (op
) == SUBREG
)
941 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
942 because it is guaranteed to be reloaded into one.
943 Just make sure the MEM is valid in itself.
944 (Ideally, (SUBREG (MEM)...) should not exist after reload,
945 but currently it does result from (SUBREG (REG)...) where the
946 reg went on the stack.) */
947 if (! reload_completed
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
948 return general_operand (op
, mode
);
950 #ifdef CLASS_CANNOT_CHANGE_SIZE
951 if (GET_CODE (SUBREG_REG (op
)) == REG
952 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
953 && TEST_HARD_REG_BIT (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
954 REGNO (SUBREG_REG (op
)))
955 && (GET_MODE_SIZE (mode
)
956 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
957 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op
))) != MODE_COMPLEX_INT
958 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op
))) != MODE_COMPLEX_FLOAT
)
962 op
= SUBREG_REG (op
);
965 /* We don't consider registers whose class is NO_REGS
966 to be a register operand. */
967 return (GET_CODE (op
) == REG
968 && (REGNO (op
) >= FIRST_PSEUDO_REGISTER
969 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
));
972 /* Return 1 if OP should match a MATCH_SCRATCH, i.e., if it is a SCRATCH
973 or a hard register. */
976 scratch_operand (op
, mode
)
978 enum machine_mode mode
;
980 return (GET_MODE (op
) == mode
981 && (GET_CODE (op
) == SCRATCH
982 || (GET_CODE (op
) == REG
983 && REGNO (op
) < FIRST_PSEUDO_REGISTER
)));
986 /* Return 1 if OP is a valid immediate operand for mode MODE.
988 The main use of this function is as a predicate in match_operand
989 expressions in the machine description. */
992 immediate_operand (op
, mode
)
994 enum machine_mode mode
;
996 /* Don't accept CONST_INT or anything similar
997 if the caller wants something floating. */
998 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
999 && GET_MODE_CLASS (mode
) != MODE_INT
1000 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1003 return (CONSTANT_P (op
)
1004 && (GET_MODE (op
) == mode
|| mode
== VOIDmode
1005 || GET_MODE (op
) == VOIDmode
)
1006 #ifdef LEGITIMATE_PIC_OPERAND_P
1007 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
1009 && LEGITIMATE_CONSTANT_P (op
));
1012 /* Returns 1 if OP is an operand that is a CONST_INT. */
1015 const_int_operand (op
, mode
)
1017 enum machine_mode mode
;
1019 return GET_CODE (op
) == CONST_INT
;
1022 /* Returns 1 if OP is an operand that is a constant integer or constant
1023 floating-point number. */
1026 const_double_operand (op
, mode
)
1028 enum machine_mode mode
;
1030 /* Don't accept CONST_INT or anything similar
1031 if the caller wants something floating. */
1032 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
1033 && GET_MODE_CLASS (mode
) != MODE_INT
1034 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1037 return ((GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
)
1038 && (mode
== VOIDmode
|| GET_MODE (op
) == mode
1039 || GET_MODE (op
) == VOIDmode
));
1042 /* Return 1 if OP is a general operand that is not an immediate operand. */
1045 nonimmediate_operand (op
, mode
)
1047 enum machine_mode mode
;
1049 return (general_operand (op
, mode
) && ! CONSTANT_P (op
));
1052 /* Return 1 if OP is a register reference or immediate value of mode MODE. */
1055 nonmemory_operand (op
, mode
)
1057 enum machine_mode mode
;
1059 if (CONSTANT_P (op
))
1061 /* Don't accept CONST_INT or anything similar
1062 if the caller wants something floating. */
1063 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
1064 && GET_MODE_CLASS (mode
) != MODE_INT
1065 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1068 return ((GET_MODE (op
) == VOIDmode
|| GET_MODE (op
) == mode
)
1069 #ifdef LEGITIMATE_PIC_OPERAND_P
1070 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
1072 && LEGITIMATE_CONSTANT_P (op
));
1075 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1078 if (GET_CODE (op
) == SUBREG
)
1080 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
1081 because it is guaranteed to be reloaded into one.
1082 Just make sure the MEM is valid in itself.
1083 (Ideally, (SUBREG (MEM)...) should not exist after reload,
1084 but currently it does result from (SUBREG (REG)...) where the
1085 reg went on the stack.) */
1086 if (! reload_completed
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1087 return general_operand (op
, mode
);
1088 op
= SUBREG_REG (op
);
1091 /* We don't consider registers whose class is NO_REGS
1092 to be a register operand. */
1093 return (GET_CODE (op
) == REG
1094 && (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1095 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
));
1098 /* Return 1 if OP is a valid operand that stands for pushing a
1099 value of mode MODE onto the stack.
1101 The main use of this function is as a predicate in match_operand
1102 expressions in the machine description. */
1105 push_operand (op
, mode
)
1107 enum machine_mode mode
;
1109 if (GET_CODE (op
) != MEM
)
1112 if (GET_MODE (op
) != mode
)
1117 if (GET_CODE (op
) != STACK_PUSH_CODE
)
1120 return XEXP (op
, 0) == stack_pointer_rtx
;
1123 /* Return 1 if ADDR is a valid memory address for mode MODE. */
1126 memory_address_p (mode
, addr
)
1127 enum machine_mode mode
;
1130 if (GET_CODE (addr
) == ADDRESSOF
)
1133 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1140 /* Return 1 if OP is a valid memory reference with mode MODE,
1141 including a valid address.
1143 The main use of this function is as a predicate in match_operand
1144 expressions in the machine description. */
1147 memory_operand (op
, mode
)
1149 enum machine_mode mode
;
1153 if (! reload_completed
)
1154 /* Note that no SUBREG is a memory operand before end of reload pass,
1155 because (SUBREG (MEM...)) forces reloading into a register. */
1156 return GET_CODE (op
) == MEM
&& general_operand (op
, mode
);
1158 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1162 if (GET_CODE (inner
) == SUBREG
)
1163 inner
= SUBREG_REG (inner
);
1165 return (GET_CODE (inner
) == MEM
&& general_operand (op
, mode
));
1168 /* Return 1 if OP is a valid indirect memory reference with mode MODE;
1169 that is, a memory reference whose address is a general_operand. */
1172 indirect_operand (op
, mode
)
1174 enum machine_mode mode
;
1176 /* Before reload, a SUBREG isn't in memory (see memory_operand, above). */
1177 if (! reload_completed
1178 && GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1180 register int offset
= SUBREG_WORD (op
) * UNITS_PER_WORD
;
1181 rtx inner
= SUBREG_REG (op
);
1183 if (BYTES_BIG_ENDIAN
)
1184 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (op
)))
1185 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (inner
))));
1187 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1190 /* The only way that we can have a general_operand as the resulting
1191 address is if OFFSET is zero and the address already is an operand
1192 or if the address is (plus Y (const_int -OFFSET)) and Y is an
1195 return ((offset
== 0 && general_operand (XEXP (inner
, 0), Pmode
))
1196 || (GET_CODE (XEXP (inner
, 0)) == PLUS
1197 && GET_CODE (XEXP (XEXP (inner
, 0), 1)) == CONST_INT
1198 && INTVAL (XEXP (XEXP (inner
, 0), 1)) == -offset
1199 && general_operand (XEXP (XEXP (inner
, 0), 0), Pmode
)));
1202 return (GET_CODE (op
) == MEM
1203 && memory_operand (op
, mode
)
1204 && general_operand (XEXP (op
, 0), Pmode
));
1207 /* Return 1 if this is a comparison operator. This allows the use of
1208 MATCH_OPERATOR to recognize all the branch insns. */
1211 comparison_operator (op
, mode
)
1213 enum machine_mode mode
;
1215 return ((mode
== VOIDmode
|| GET_MODE (op
) == mode
)
1216 && GET_RTX_CLASS (GET_CODE (op
)) == '<');
1219 /* If BODY is an insn body that uses ASM_OPERANDS,
1220 return the number of operands (both input and output) in the insn.
1221 Otherwise return -1. */
1224 asm_noperands (body
)
1227 if (GET_CODE (body
) == ASM_OPERANDS
)
1228 /* No output operands: return number of input operands. */
1229 return ASM_OPERANDS_INPUT_LENGTH (body
);
1230 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1231 /* Single output operand: BODY is (set OUTPUT (asm_operands ...)). */
1232 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
)) + 1;
1233 else if (GET_CODE (body
) == PARALLEL
1234 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
1235 && GET_CODE (SET_SRC (XVECEXP (body
, 0, 0))) == ASM_OPERANDS
)
1237 /* Multiple output operands, or 1 output plus some clobbers:
1238 body is [(set OUTPUT (asm_operands ...))... (clobber (reg ...))...]. */
1242 /* Count backwards through CLOBBERs to determine number of SETs. */
1243 for (i
= XVECLEN (body
, 0); i
> 0; i
--)
1245 if (GET_CODE (XVECEXP (body
, 0, i
- 1)) == SET
)
1247 if (GET_CODE (XVECEXP (body
, 0, i
- 1)) != CLOBBER
)
1251 /* N_SETS is now number of output operands. */
1254 /* Verify that all the SETs we have
1255 came from a single original asm_operands insn
1256 (so that invalid combinations are blocked). */
1257 for (i
= 0; i
< n_sets
; i
++)
1259 rtx elt
= XVECEXP (body
, 0, i
);
1260 if (GET_CODE (elt
) != SET
)
1262 if (GET_CODE (SET_SRC (elt
)) != ASM_OPERANDS
)
1264 /* If these ASM_OPERANDS rtx's came from different original insns
1265 then they aren't allowed together. */
1266 if (ASM_OPERANDS_INPUT_VEC (SET_SRC (elt
))
1267 != ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (body
, 0, 0))))
1270 return (ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)))
1273 else if (GET_CODE (body
) == PARALLEL
1274 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1276 /* 0 outputs, but some clobbers:
1277 body is [(asm_operands ...) (clobber (reg ...))...]. */
1280 /* Make sure all the other parallel things really are clobbers. */
1281 for (i
= XVECLEN (body
, 0) - 1; i
> 0; i
--)
1282 if (GET_CODE (XVECEXP (body
, 0, i
)) != CLOBBER
)
1285 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1291 /* Assuming BODY is an insn body that uses ASM_OPERANDS,
1292 copy its operands (both input and output) into the vector OPERANDS,
1293 the locations of the operands within the insn into the vector OPERAND_LOCS,
1294 and the constraints for the operands into CONSTRAINTS.
1295 Write the modes of the operands into MODES.
1296 Return the assembler-template.
1298 If MODES, OPERAND_LOCS, CONSTRAINTS or OPERANDS is 0,
1299 we don't store that info. */
1302 decode_asm_operands (body
, operands
, operand_locs
, constraints
, modes
)
1307 enum machine_mode
*modes
;
1313 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1315 rtx asmop
= SET_SRC (body
);
1316 /* Single output operand: BODY is (set OUTPUT (asm_operands ....)). */
1318 noperands
= ASM_OPERANDS_INPUT_LENGTH (asmop
) + 1;
1320 for (i
= 1; i
< noperands
; i
++)
1323 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
- 1);
1325 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
- 1);
1327 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
- 1);
1329 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
- 1);
1332 /* The output is in the SET.
1333 Its constraint is in the ASM_OPERANDS itself. */
1335 operands
[0] = SET_DEST (body
);
1337 operand_locs
[0] = &SET_DEST (body
);
1339 constraints
[0] = ASM_OPERANDS_OUTPUT_CONSTRAINT (asmop
);
1341 modes
[0] = GET_MODE (SET_DEST (body
));
1342 template = ASM_OPERANDS_TEMPLATE (asmop
);
1344 else if (GET_CODE (body
) == ASM_OPERANDS
)
1347 /* No output operands: BODY is (asm_operands ....). */
1349 noperands
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1351 /* The input operands are found in the 1st element vector. */
1352 /* Constraints for inputs are in the 2nd element vector. */
1353 for (i
= 0; i
< noperands
; i
++)
1356 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1358 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
);
1360 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1362 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1364 template = ASM_OPERANDS_TEMPLATE (asmop
);
1366 else if (GET_CODE (body
) == PARALLEL
1367 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1369 rtx asmop
= SET_SRC (XVECEXP (body
, 0, 0));
1370 int nparallel
= XVECLEN (body
, 0); /* Includes CLOBBERs. */
1371 int nin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1372 int nout
= 0; /* Does not include CLOBBERs. */
1374 /* At least one output, plus some CLOBBERs. */
1376 /* The outputs are in the SETs.
1377 Their constraints are in the ASM_OPERANDS itself. */
1378 for (i
= 0; i
< nparallel
; i
++)
1380 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
1381 break; /* Past last SET */
1384 operands
[i
] = SET_DEST (XVECEXP (body
, 0, i
));
1386 operand_locs
[i
] = &SET_DEST (XVECEXP (body
, 0, i
));
1388 constraints
[i
] = XSTR (SET_SRC (XVECEXP (body
, 0, i
)), 1);
1390 modes
[i
] = GET_MODE (SET_DEST (XVECEXP (body
, 0, i
)));
1394 for (i
= 0; i
< nin
; i
++)
1397 operand_locs
[i
+ nout
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1399 operands
[i
+ nout
] = ASM_OPERANDS_INPUT (asmop
, i
);
1401 constraints
[i
+ nout
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1403 modes
[i
+ nout
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1406 template = ASM_OPERANDS_TEMPLATE (asmop
);
1408 else if (GET_CODE (body
) == PARALLEL
1409 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1411 /* No outputs, but some CLOBBERs. */
1413 rtx asmop
= XVECEXP (body
, 0, 0);
1414 int nin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1416 for (i
= 0; i
< nin
; i
++)
1419 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1421 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
);
1423 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1425 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1428 template = ASM_OPERANDS_TEMPLATE (asmop
);
1434 /* Given an rtx *P, if it is a sum containing an integer constant term,
1435 return the location (type rtx *) of the pointer to that constant term.
1436 Otherwise, return a null pointer. */
1439 find_constant_term_loc (p
)
1443 register enum rtx_code code
= GET_CODE (*p
);
1445 /* If *P IS such a constant term, P is its location. */
1447 if (code
== CONST_INT
|| code
== SYMBOL_REF
|| code
== LABEL_REF
1451 /* Otherwise, if not a sum, it has no constant term. */
1453 if (GET_CODE (*p
) != PLUS
)
1456 /* If one of the summands is constant, return its location. */
1458 if (XEXP (*p
, 0) && CONSTANT_P (XEXP (*p
, 0))
1459 && XEXP (*p
, 1) && CONSTANT_P (XEXP (*p
, 1)))
1462 /* Otherwise, check each summand for containing a constant term. */
1464 if (XEXP (*p
, 0) != 0)
1466 tem
= find_constant_term_loc (&XEXP (*p
, 0));
1471 if (XEXP (*p
, 1) != 0)
1473 tem
= find_constant_term_loc (&XEXP (*p
, 1));
1481 /* Return 1 if OP is a memory reference
1482 whose address contains no side effects
1483 and remains valid after the addition
1484 of a positive integer less than the
1485 size of the object being referenced.
1487 We assume that the original address is valid and do not check it.
1489 This uses strict_memory_address_p as a subroutine, so
1490 don't use it before reload. */
1493 offsettable_memref_p (op
)
1496 return ((GET_CODE (op
) == MEM
)
1497 && offsettable_address_p (1, GET_MODE (op
), XEXP (op
, 0)));
1500 /* Similar, but don't require a strictly valid mem ref:
1501 consider pseudo-regs valid as index or base regs. */
1504 offsettable_nonstrict_memref_p (op
)
1507 return ((GET_CODE (op
) == MEM
)
1508 && offsettable_address_p (0, GET_MODE (op
), XEXP (op
, 0)));
1511 /* Return 1 if Y is a memory address which contains no side effects
1512 and would remain valid after the addition of a positive integer
1513 less than the size of that mode.
1515 We assume that the original address is valid and do not check it.
1516 We do check that it is valid for narrower modes.
1518 If STRICTP is nonzero, we require a strictly valid address,
1519 for the sake of use in reload.c. */
1522 offsettable_address_p (strictp
, mode
, y
)
1524 enum machine_mode mode
;
1527 register enum rtx_code ycode
= GET_CODE (y
);
1531 int (*addressp
) () = (strictp
? strict_memory_address_p
: memory_address_p
);
1533 if (CONSTANT_ADDRESS_P (y
))
1536 /* Adjusting an offsettable address involves changing to a narrower mode.
1537 Make sure that's OK. */
1539 if (mode_dependent_address_p (y
))
1542 /* If the expression contains a constant term,
1543 see if it remains valid when max possible offset is added. */
1545 if ((ycode
== PLUS
) && (y2
= find_constant_term_loc (&y1
)))
1550 *y2
= plus_constant (*y2
, GET_MODE_SIZE (mode
) - 1);
1551 /* Use QImode because an odd displacement may be automatically invalid
1552 for any wider mode. But it should be valid for a single byte. */
1553 good
= (*addressp
) (QImode
, y
);
1555 /* In any case, restore old contents of memory. */
1560 if (ycode
== PRE_DEC
|| ycode
== PRE_INC
1561 || ycode
== POST_DEC
|| ycode
== POST_INC
)
1564 /* The offset added here is chosen as the maximum offset that
1565 any instruction could need to add when operating on something
1566 of the specified mode. We assume that if Y and Y+c are
1567 valid addresses then so is Y+d for all 0<d<c. */
1569 z
= plus_constant_for_output (y
, GET_MODE_SIZE (mode
) - 1);
1571 /* Use QImode because an odd displacement may be automatically invalid
1572 for any wider mode. But it should be valid for a single byte. */
1573 return (*addressp
) (QImode
, z
);
1576 /* Return 1 if ADDR is an address-expression whose effect depends
1577 on the mode of the memory reference it is used in.
1579 Autoincrement addressing is a typical example of mode-dependence
1580 because the amount of the increment depends on the mode. */
1583 mode_dependent_address_p (addr
)
1586 GO_IF_MODE_DEPENDENT_ADDRESS (addr
, win
);
1592 /* Return 1 if OP is a general operand
1593 other than a memory ref with a mode dependent address. */
1596 mode_independent_operand (op
, mode
)
1597 enum machine_mode mode
;
1602 if (! general_operand (op
, mode
))
1605 if (GET_CODE (op
) != MEM
)
1608 addr
= XEXP (op
, 0);
1609 GO_IF_MODE_DEPENDENT_ADDRESS (addr
, lose
);
1615 /* Given an operand OP that is a valid memory reference
1616 which satisfies offsettable_memref_p,
1617 return a new memory reference whose address has been adjusted by OFFSET.
1618 OFFSET should be positive and less than the size of the object referenced.
1622 adj_offsettable_operand (op
, offset
)
1626 register enum rtx_code code
= GET_CODE (op
);
1630 register rtx y
= XEXP (op
, 0);
1633 if (CONSTANT_ADDRESS_P (y
))
1635 new = gen_rtx_MEM (GET_MODE (op
), plus_constant_for_output (y
, offset
));
1636 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1640 if (GET_CODE (y
) == PLUS
)
1643 register rtx
*const_loc
;
1647 const_loc
= find_constant_term_loc (&z
);
1650 *const_loc
= plus_constant_for_output (*const_loc
, offset
);
1655 new = gen_rtx_MEM (GET_MODE (op
), plus_constant_for_output (y
, offset
));
1656 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1662 #ifdef REGISTER_CONSTRAINTS
1664 /* Check the operands of an insn (found in recog_operands)
1665 against the insn's operand constraints (found via INSN_CODE_NUM)
1666 and return 1 if they are valid.
1668 WHICH_ALTERNATIVE is set to a number which indicates which
1669 alternative of constraints was matched: 0 for the first alternative,
1670 1 for the next, etc.
1672 In addition, when two operands are match
1673 and it happens that the output operand is (reg) while the
1674 input operand is --(reg) or ++(reg) (a pre-inc or pre-dec),
1675 make the output operand look like the input.
1676 This is because the output operand is the one the template will print.
1678 This is used in final, just before printing the assembler code and by
1679 the routines that determine an insn's attribute.
1681 If STRICT is a positive non-zero value, it means that we have been
1682 called after reload has been completed. In that case, we must
1683 do all checks strictly. If it is zero, it means that we have been called
1684 before reload has completed. In that case, we first try to see if we can
1685 find an alternative that matches strictly. If not, we try again, this
1686 time assuming that reload will fix up the insn. This provides a "best
1687 guess" for the alternative and is used to compute attributes of insns prior
1688 to reload. A negative value of STRICT is used for this internal call. */
1696 constrain_operands (insn_code_num
, strict
)
1700 char *constraints
[MAX_RECOG_OPERANDS
];
1701 int matching_operands
[MAX_RECOG_OPERANDS
];
1702 enum op_type
{OP_IN
, OP_OUT
, OP_INOUT
} op_types
[MAX_RECOG_OPERANDS
];
1703 int earlyclobber
[MAX_RECOG_OPERANDS
];
1705 int noperands
= insn_n_operands
[insn_code_num
];
1707 struct funny_match funny_match
[MAX_RECOG_OPERANDS
];
1708 int funny_match_index
;
1709 int nalternatives
= insn_n_alternatives
[insn_code_num
];
1711 if (noperands
== 0 || nalternatives
== 0)
1714 for (c
= 0; c
< noperands
; c
++)
1716 constraints
[c
] = insn_operand_constraint
[insn_code_num
][c
];
1717 matching_operands
[c
] = -1;
1718 op_types
[c
] = OP_IN
;
1721 which_alternative
= 0;
1723 while (which_alternative
< nalternatives
)
1727 funny_match_index
= 0;
1729 for (opno
= 0; opno
< noperands
; opno
++)
1731 register rtx op
= recog_operand
[opno
];
1732 enum machine_mode mode
= GET_MODE (op
);
1733 register char *p
= constraints
[opno
];
1738 earlyclobber
[opno
] = 0;
1740 /* A unary operator may be accepted by the predicate, but it
1741 is irrelevant for matching constraints. */
1742 if (GET_RTX_CLASS (GET_CODE (op
)) == '1')
1745 if (GET_CODE (op
) == SUBREG
)
1747 if (GET_CODE (SUBREG_REG (op
)) == REG
1748 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
1749 offset
= SUBREG_WORD (op
);
1750 op
= SUBREG_REG (op
);
1753 /* An empty constraint or empty alternative
1754 allows anything which matched the pattern. */
1755 if (*p
== 0 || *p
== ',')
1758 while (*p
&& (c
= *p
++) != ',')
1768 /* Ignore rest of this alternative as far as
1769 constraint checking is concerned. */
1770 while (*p
&& *p
!= ',')
1775 op_types
[opno
] = OP_OUT
;
1779 op_types
[opno
] = OP_INOUT
;
1783 earlyclobber
[opno
] = 1;
1791 /* This operand must be the same as a previous one.
1792 This kind of constraint is used for instructions such
1793 as add when they take only two operands.
1795 Note that the lower-numbered operand is passed first.
1797 If we are not testing strictly, assume that this constraint
1798 will be satisfied. */
1802 val
= operands_match_p (recog_operand
[c
- '0'],
1803 recog_operand
[opno
]);
1805 matching_operands
[opno
] = c
- '0';
1806 matching_operands
[c
- '0'] = opno
;
1810 /* If output is *x and input is *--x,
1811 arrange later to change the output to *--x as well,
1812 since the output op is the one that will be printed. */
1813 if (val
== 2 && strict
> 0)
1815 funny_match
[funny_match_index
].this = opno
;
1816 funny_match
[funny_match_index
++].other
= c
- '0';
1821 /* p is used for address_operands. When we are called by
1822 gen_reload, no one will have checked that the address is
1823 strictly valid, i.e., that all pseudos requiring hard regs
1824 have gotten them. */
1826 || (strict_memory_address_p
1827 (insn_operand_mode
[insn_code_num
][opno
], op
)))
1831 /* No need to check general_operand again;
1832 it was done in insn-recog.c. */
1834 /* Anything goes unless it is a REG and really has a hard reg
1835 but the hard reg is not in the class GENERAL_REGS. */
1837 || GENERAL_REGS
== ALL_REGS
1838 || GET_CODE (op
) != REG
1839 || (reload_in_progress
1840 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
1841 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
1848 && GET_CODE (op
) == REG
1849 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
1850 || (strict
== 0 && GET_CODE (op
) == SCRATCH
)
1851 || (GET_CODE (op
) == REG
1852 && ((GENERAL_REGS
== ALL_REGS
1853 && REGNO (op
) < FIRST_PSEUDO_REGISTER
)
1854 || reg_fits_class_p (op
, GENERAL_REGS
,
1860 /* This is used for a MATCH_SCRATCH in the cases when
1861 we don't actually need anything. So anything goes
1867 if (GET_CODE (op
) == MEM
1868 /* Before reload, accept what reload can turn into mem. */
1869 || (strict
< 0 && CONSTANT_P (op
))
1870 /* During reload, accept a pseudo */
1871 || (reload_in_progress
&& GET_CODE (op
) == REG
1872 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))
1877 if (GET_CODE (op
) == MEM
1878 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
1879 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
1884 if (GET_CODE (op
) == MEM
1885 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
1886 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
1891 #ifndef REAL_ARITHMETIC
1892 /* Match any CONST_DOUBLE, but only if
1893 we can examine the bits of it reliably. */
1894 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
1895 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
1896 && GET_MODE (op
) != VOIDmode
&& ! flag_pretend_float
)
1899 if (GET_CODE (op
) == CONST_DOUBLE
)
1904 if (GET_CODE (op
) == CONST_DOUBLE
)
1910 if (GET_CODE (op
) == CONST_DOUBLE
1911 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
1916 if (GET_CODE (op
) == CONST_INT
1917 || (GET_CODE (op
) == CONST_DOUBLE
1918 && GET_MODE (op
) == VOIDmode
))
1921 if (CONSTANT_P (op
))
1926 if (GET_CODE (op
) == CONST_INT
1927 || (GET_CODE (op
) == CONST_DOUBLE
1928 && GET_MODE (op
) == VOIDmode
))
1940 if (GET_CODE (op
) == CONST_INT
1941 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
1945 #ifdef EXTRA_CONSTRAINT
1951 if (EXTRA_CONSTRAINT (op
, c
))
1957 if (GET_CODE (op
) == MEM
1958 && ((strict
> 0 && ! offsettable_memref_p (op
))
1960 && !(CONSTANT_P (op
) || GET_CODE (op
) == MEM
))
1961 || (reload_in_progress
1962 && !(GET_CODE (op
) == REG
1963 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))))
1968 if ((strict
> 0 && offsettable_memref_p (op
))
1969 || (strict
== 0 && offsettable_nonstrict_memref_p (op
))
1970 /* Before reload, accept what reload can handle. */
1972 && (CONSTANT_P (op
) || GET_CODE (op
) == MEM
))
1973 /* During reload, accept a pseudo */
1974 || (reload_in_progress
&& GET_CODE (op
) == REG
1975 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))
1982 && GET_CODE (op
) == REG
1983 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
1984 || (strict
== 0 && GET_CODE (op
) == SCRATCH
)
1985 || (GET_CODE (op
) == REG
1986 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
1991 constraints
[opno
] = p
;
1992 /* If this operand did not win somehow,
1993 this alternative loses. */
1997 /* This alternative won; the operands are ok.
1998 Change whichever operands this alternative says to change. */
2003 /* See if any earlyclobber operand conflicts with some other
2007 for (eopno
= 0; eopno
< noperands
; eopno
++)
2008 /* Ignore earlyclobber operands now in memory,
2009 because we would often report failure when we have
2010 two memory operands, one of which was formerly a REG. */
2011 if (earlyclobber
[eopno
]
2012 && GET_CODE (recog_operand
[eopno
]) == REG
)
2013 for (opno
= 0; opno
< noperands
; opno
++)
2014 if ((GET_CODE (recog_operand
[opno
]) == MEM
2015 || op_types
[opno
] != OP_OUT
)
2017 /* Ignore things like match_operator operands. */
2018 && *insn_operand_constraint
[insn_code_num
][opno
] != 0
2019 && ! (matching_operands
[opno
] == eopno
2020 && operands_match_p (recog_operand
[opno
],
2021 recog_operand
[eopno
]))
2022 && ! safe_from_earlyclobber (recog_operand
[opno
],
2023 recog_operand
[eopno
]))
2028 while (--funny_match_index
>= 0)
2030 recog_operand
[funny_match
[funny_match_index
].other
]
2031 = recog_operand
[funny_match
[funny_match_index
].this];
2038 which_alternative
++;
2041 /* If we are about to reject this, but we are not to test strictly,
2042 try a very loose test. Only return failure if it fails also. */
2044 return constrain_operands (insn_code_num
, -1);
2049 /* Return 1 iff OPERAND (assumed to be a REG rtx)
2050 is a hard reg in class CLASS when its regno is offset by OFFSET
2051 and changed to mode MODE.
2052 If REG occupies multiple hard regs, all of them must be in CLASS. */
2055 reg_fits_class_p (operand
, class, offset
, mode
)
2057 register enum reg_class
class;
2059 enum machine_mode mode
;
2061 register int regno
= REGNO (operand
);
2062 if (regno
< FIRST_PSEUDO_REGISTER
2063 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2068 for (sr
= HARD_REGNO_NREGS (regno
, mode
) - 1;
2070 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2079 #endif /* REGISTER_CONSTRAINTS */