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[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
56 global CSE.
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
84 of as containing.
86 All real quantity numbers are greater than or equal to `max_reg'.
87 If register N has not been assigned a quantity, reg_qty[N] will equal N.
89 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
90 entries should be referenced with an index below `max_reg'.
92 We also maintain a bidirectional chain of registers for each
93 quantity number. The `qty_table` members `first_reg' and `last_reg',
94 and `reg_eqv_table' members `next' and `prev' hold these chains.
96 The first register in a chain is the one whose lifespan is least local.
97 Among equals, it is the one that was seen first.
98 We replace any equivalent register with that one.
100 If two registers have the same quantity number, it must be true that
101 REG expressions with qty_table `mode' must be in the hash table for both
102 registers and must be in the same class.
104 The converse is not true. Since hard registers may be referenced in
105 any mode, two REG expressions might be equivalent in the hash table
106 but not have the same quantity number if the quantity number of one
107 of the registers is not the same mode as those expressions.
109 Constants and quantity numbers
111 When a quantity has a known constant value, that value is stored
112 in the appropriate qty_table `const_rtx'. This is in addition to
113 putting the constant in the hash table as is usual for non-regs.
115 Whether a reg or a constant is preferred is determined by the configuration
116 macro CONST_COSTS and will often depend on the constant value. In any
117 event, expressions containing constants can be simplified, by fold_rtx.
119 When a quantity has a known nearly constant value (such as an address
120 of a stack slot), that value is stored in the appropriate qty_table
121 `const_rtx'.
123 Integer constants don't have a machine mode. However, cse
124 determines the intended machine mode from the destination
125 of the instruction that moves the constant. The machine mode
126 is recorded in the hash table along with the actual RTL
127 constant expression so that different modes are kept separate.
129 Other expressions:
131 To record known equivalences among expressions in general
132 we use a hash table called `table'. It has a fixed number of buckets
133 that contain chains of `struct table_elt' elements for expressions.
134 These chains connect the elements whose expressions have the same
135 hash codes.
137 Other chains through the same elements connect the elements which
138 currently have equivalent values.
140 Register references in an expression are canonicalized before hashing
141 the expression. This is done using `reg_qty' and qty_table `first_reg'.
142 The hash code of a register reference is computed using the quantity
143 number, not the register number.
145 When the value of an expression changes, it is necessary to remove from the
146 hash table not just that expression but all expressions whose values
147 could be different as a result.
149 1. If the value changing is in memory, except in special cases
150 ANYTHING referring to memory could be changed. That is because
151 nobody knows where a pointer does not point.
152 The function `invalidate_memory' removes what is necessary.
154 The special cases are when the address is constant or is
155 a constant plus a fixed register such as the frame pointer
156 or a static chain pointer. When such addresses are stored in,
157 we can tell exactly which other such addresses must be invalidated
158 due to overlap. `invalidate' does this.
159 All expressions that refer to non-constant
160 memory addresses are also invalidated. `invalidate_memory' does this.
162 2. If the value changing is a register, all expressions
163 containing references to that register, and only those,
164 must be removed.
166 Because searching the entire hash table for expressions that contain
167 a register is very slow, we try to figure out when it isn't necessary.
168 Precisely, this is necessary only when expressions have been
169 entered in the hash table using this register, and then the value has
170 changed, and then another expression wants to be added to refer to
171 the register's new value. This sequence of circumstances is rare
172 within any one basic block.
174 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
175 reg_tick[i] is incremented whenever a value is stored in register i.
176 reg_in_table[i] holds -1 if no references to register i have been
177 entered in the table; otherwise, it contains the value reg_tick[i] had
178 when the references were entered. If we want to enter a reference
179 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
180 Until we want to enter a new entry, the mere fact that the two vectors
181 don't match makes the entries be ignored if anyone tries to match them.
183 Registers themselves are entered in the hash table as well as in
184 the equivalent-register chains. However, the vectors `reg_tick'
185 and `reg_in_table' do not apply to expressions which are simple
186 register references. These expressions are removed from the table
187 immediately when they become invalid, and this can be done even if
188 we do not immediately search for all the expressions that refer to
189 the register.
191 A CLOBBER rtx in an instruction invalidates its operand for further
192 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
193 invalidates everything that resides in memory.
195 Related expressions:
197 Constant expressions that differ only by an additive integer
198 are called related. When a constant expression is put in
199 the table, the related expression with no constant term
200 is also entered. These are made to point at each other
201 so that it is possible to find out if there exists any
202 register equivalent to an expression related to a given expression. */
204 /* One plus largest register number used in this function. */
206 static int max_reg;
208 /* One plus largest instruction UID used in this function at time of
209 cse_main call. */
211 static int max_insn_uid;
213 /* Length of qty_table vector. We know in advance we will not need
214 a quantity number this big. */
216 static int max_qty;
218 /* Next quantity number to be allocated.
219 This is 1 + the largest number needed so far. */
221 static int next_qty;
223 /* Per-qty information tracking.
225 `first_reg' and `last_reg' track the head and tail of the
226 chain of registers which currently contain this quantity.
228 `mode' contains the machine mode of this quantity.
230 `const_rtx' holds the rtx of the constant value of this
231 quantity, if known. A summations of the frame/arg pointer
232 and a constant can also be entered here. When this holds
233 a known value, `const_insn' is the insn which stored the
234 constant value.
236 `comparison_{code,const,qty}' are used to track when a
237 comparison between a quantity and some constant or register has
238 been passed. In such a case, we know the results of the comparison
239 in case we see it again. These members record a comparison that
240 is known to be true. `comparison_code' holds the rtx code of such
241 a comparison, else it is set to UNKNOWN and the other two
242 comparison members are undefined. `comparison_const' holds
243 the constant being compared against, or zero if the comparison
244 is not against a constant. `comparison_qty' holds the quantity
245 being compared against when the result is known. If the comparison
246 is not with a register, `comparison_qty' is -1. */
248 struct qty_table_elem
250 rtx const_rtx;
251 rtx const_insn;
252 rtx comparison_const;
253 int comparison_qty;
254 unsigned int first_reg, last_reg;
255 /* The sizes of these fields should match the sizes of the
256 code and mode fields of struct rtx_def (see rtl.h). */
257 ENUM_BITFIELD(rtx_code) comparison_code : 16;
258 ENUM_BITFIELD(machine_mode) mode : 8;
261 /* The table of all qtys, indexed by qty number. */
262 static struct qty_table_elem *qty_table;
264 #ifdef HAVE_cc0
265 /* For machines that have a CC0, we do not record its value in the hash
266 table since its use is guaranteed to be the insn immediately following
267 its definition and any other insn is presumed to invalidate it.
269 Instead, we store below the value last assigned to CC0. If it should
270 happen to be a constant, it is stored in preference to the actual
271 assigned value. In case it is a constant, we store the mode in which
272 the constant should be interpreted. */
274 static rtx prev_insn_cc0;
275 static enum machine_mode prev_insn_cc0_mode;
277 /* Previous actual insn. 0 if at first insn of basic block. */
279 static rtx prev_insn;
280 #endif
282 /* Insn being scanned. */
284 static rtx this_insn;
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
288 value.
290 Or -1 if this register is at the end of the chain.
292 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
294 /* Per-register equivalence chain. */
295 struct reg_eqv_elem
297 int next, prev;
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem *reg_eqv_table;
303 struct cse_reg_info
305 /* Next in hash chain. */
306 struct cse_reg_info *hash_next;
308 /* The next cse_reg_info structure in the free or used list. */
309 struct cse_reg_info *next;
311 /* Search key */
312 unsigned int regno;
314 /* The quantity number of the register's current contents. */
315 int reg_qty;
317 /* The number of times the register has been altered in the current
318 basic block. */
319 int reg_tick;
321 /* The REG_TICK value at which rtx's containing this register are
322 valid in the hash table. If this does not equal the current
323 reg_tick value, such expressions existing in the hash table are
324 invalid. */
325 int reg_in_table;
327 /* The SUBREG that was set when REG_TICK was last incremented. Set
328 to -1 if the last store was to the whole register, not a subreg. */
329 unsigned int subreg_ticked;
332 /* A free list of cse_reg_info entries. */
333 static struct cse_reg_info *cse_reg_info_free_list;
335 /* A used list of cse_reg_info entries. */
336 static struct cse_reg_info *cse_reg_info_used_list;
337 static struct cse_reg_info *cse_reg_info_used_list_end;
339 /* A mapping from registers to cse_reg_info data structures. */
340 #define REGHASH_SHIFT 7
341 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
342 #define REGHASH_MASK (REGHASH_SIZE - 1)
343 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
345 #define REGHASH_FN(REGNO) \
346 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
348 /* The last lookup we did into the cse_reg_info_tree. This allows us
349 to cache repeated lookups. */
350 static unsigned int cached_regno;
351 static struct cse_reg_info *cached_cse_reg_info;
353 /* A HARD_REG_SET containing all the hard registers for which there is
354 currently a REG expression in the hash table. Note the difference
355 from the above variables, which indicate if the REG is mentioned in some
356 expression in the table. */
358 static HARD_REG_SET hard_regs_in_table;
360 /* CUID of insn that starts the basic block currently being cse-processed. */
362 static int cse_basic_block_start;
364 /* CUID of insn that ends the basic block currently being cse-processed. */
366 static int cse_basic_block_end;
368 /* Vector mapping INSN_UIDs to cuids.
369 The cuids are like uids but increase monotonically always.
370 We use them to see whether a reg is used outside a given basic block. */
372 static int *uid_cuid;
374 /* Highest UID in UID_CUID. */
375 static int max_uid;
377 /* Get the cuid of an insn. */
379 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
381 /* Nonzero if this pass has made changes, and therefore it's
382 worthwhile to run the garbage collector. */
384 static int cse_altered;
386 /* Nonzero if cse has altered conditional jump insns
387 in such a way that jump optimization should be redone. */
389 static int cse_jumps_altered;
391 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
392 REG_LABEL, we have to rerun jump after CSE to put in the note. */
393 static int recorded_label_ref;
395 /* canon_hash stores 1 in do_not_record
396 if it notices a reference to CC0, PC, or some other volatile
397 subexpression. */
399 static int do_not_record;
401 #ifdef LOAD_EXTEND_OP
403 /* Scratch rtl used when looking for load-extended copy of a MEM. */
404 static rtx memory_extend_rtx;
405 #endif
407 /* canon_hash stores 1 in hash_arg_in_memory
408 if it notices a reference to memory within the expression being hashed. */
410 static int hash_arg_in_memory;
412 /* The hash table contains buckets which are chains of `struct table_elt's,
413 each recording one expression's information.
414 That expression is in the `exp' field.
416 The canon_exp field contains a canonical (from the point of view of
417 alias analysis) version of the `exp' field.
419 Those elements with the same hash code are chained in both directions
420 through the `next_same_hash' and `prev_same_hash' fields.
422 Each set of expressions with equivalent values
423 are on a two-way chain through the `next_same_value'
424 and `prev_same_value' fields, and all point with
425 the `first_same_value' field at the first element in
426 that chain. The chain is in order of increasing cost.
427 Each element's cost value is in its `cost' field.
429 The `in_memory' field is nonzero for elements that
430 involve any reference to memory. These elements are removed
431 whenever a write is done to an unidentified location in memory.
432 To be safe, we assume that a memory address is unidentified unless
433 the address is either a symbol constant or a constant plus
434 the frame pointer or argument pointer.
436 The `related_value' field is used to connect related expressions
437 (that differ by adding an integer).
438 The related expressions are chained in a circular fashion.
439 `related_value' is zero for expressions for which this
440 chain is not useful.
442 The `cost' field stores the cost of this element's expression.
443 The `regcost' field stores the value returned by approx_reg_cost for
444 this element's expression.
446 The `is_const' flag is set if the element is a constant (including
447 a fixed address).
449 The `flag' field is used as a temporary during some search routines.
451 The `mode' field is usually the same as GET_MODE (`exp'), but
452 if `exp' is a CONST_INT and has no machine mode then the `mode'
453 field is the mode it was being used as. Each constant is
454 recorded separately for each mode it is used with. */
456 struct table_elt
458 rtx exp;
459 rtx canon_exp;
460 struct table_elt *next_same_hash;
461 struct table_elt *prev_same_hash;
462 struct table_elt *next_same_value;
463 struct table_elt *prev_same_value;
464 struct table_elt *first_same_value;
465 struct table_elt *related_value;
466 int cost;
467 int regcost;
468 /* The size of this field should match the size
469 of the mode field of struct rtx_def (see rtl.h). */
470 ENUM_BITFIELD(machine_mode) mode : 8;
471 char in_memory;
472 char is_const;
473 char flag;
476 /* We don't want a lot of buckets, because we rarely have very many
477 things stored in the hash table, and a lot of buckets slows
478 down a lot of loops that happen frequently. */
479 #define HASH_SHIFT 5
480 #define HASH_SIZE (1 << HASH_SHIFT)
481 #define HASH_MASK (HASH_SIZE - 1)
483 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
484 register (hard registers may require `do_not_record' to be set). */
486 #define HASH(X, M) \
487 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
488 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
489 : canon_hash (X, M)) & HASH_MASK)
491 /* Determine whether register number N is considered a fixed register for the
492 purpose of approximating register costs.
493 It is desirable to replace other regs with fixed regs, to reduce need for
494 non-fixed hard regs.
495 A reg wins if it is either the frame pointer or designated as fixed. */
496 #define FIXED_REGNO_P(N) \
497 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
498 || fixed_regs[N] || global_regs[N])
500 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
501 hard registers and pointers into the frame are the cheapest with a cost
502 of 0. Next come pseudos with a cost of one and other hard registers with
503 a cost of 2. Aside from these special cases, call `rtx_cost'. */
505 #define CHEAP_REGNO(N) \
506 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
507 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
508 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
509 || ((N) < FIRST_PSEUDO_REGISTER \
510 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
512 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
513 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
515 /* Get the info associated with register N. */
517 #define GET_CSE_REG_INFO(N) \
518 (((N) == cached_regno && cached_cse_reg_info) \
519 ? cached_cse_reg_info : get_cse_reg_info ((N)))
521 /* Get the number of times this register has been updated in this
522 basic block. */
524 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
526 /* Get the point at which REG was recorded in the table. */
528 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
530 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
531 SUBREG). */
533 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
535 /* Get the quantity number for REG. */
537 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
539 /* Determine if the quantity number for register X represents a valid index
540 into the qty_table. */
542 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
544 static struct table_elt *table[HASH_SIZE];
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
549 static struct table_elt *free_element_chain;
551 /* Number of `struct table_elt' structures made so far for this function. */
553 static int n_elements_made;
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
558 static int max_elements_made;
560 /* Surviving equivalence class when two equivalence classes are merged
561 by recording the effects of a jump in the last insn. Zero if the
562 last insn was not a conditional jump. */
564 static struct table_elt *last_jump_equiv_class;
566 /* Set to the cost of a constant pool reference if one was found for a
567 symbolic constant. If this was found, it means we should try to
568 convert constants into constant pool entries if they don't fit in
569 the insn. */
571 static int constant_pool_entries_cost;
573 /* This data describes a block that will be processed by cse_basic_block. */
575 struct cse_basic_block_data
577 /* Lowest CUID value of insns in block. */
578 int low_cuid;
579 /* Highest CUID value of insns in block. */
580 int high_cuid;
581 /* Total number of SETs in block. */
582 int nsets;
583 /* Last insn in the block. */
584 rtx last;
585 /* Size of current branch path, if any. */
586 int path_size;
587 /* Current branch path, indicating which branches will be taken. */
588 struct branch_path
590 /* The branch insn. */
591 rtx branch;
592 /* Whether it should be taken or not. AROUND is the same as taken
593 except that it is used when the destination label is not preceded
594 by a BARRIER. */
595 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
596 } *path;
599 static bool fixed_base_plus_p PARAMS ((rtx x));
600 static int notreg_cost PARAMS ((rtx, enum rtx_code));
601 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
602 static int approx_reg_cost PARAMS ((rtx));
603 static int preferrable PARAMS ((int, int, int, int));
604 static void new_basic_block PARAMS ((void));
605 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
606 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
607 static void delete_reg_equiv PARAMS ((unsigned int));
608 static int mention_regs PARAMS ((rtx));
609 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
610 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
611 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
612 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
613 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
614 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
615 enum machine_mode));
616 static void merge_equiv_classes PARAMS ((struct table_elt *,
617 struct table_elt *));
618 static void invalidate PARAMS ((rtx, enum machine_mode));
619 static int cse_rtx_varies_p PARAMS ((rtx, int));
620 static void remove_invalid_refs PARAMS ((unsigned int));
621 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
622 enum machine_mode));
623 static void rehash_using_reg PARAMS ((rtx));
624 static void invalidate_memory PARAMS ((void));
625 static void invalidate_for_call PARAMS ((void));
626 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
627 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
628 static unsigned canon_hash_string PARAMS ((const char *));
629 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
630 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
631 static rtx canon_reg PARAMS ((rtx, rtx));
632 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
633 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
634 enum machine_mode *,
635 enum machine_mode *));
636 static rtx fold_rtx PARAMS ((rtx, rtx));
637 static rtx equiv_constant PARAMS ((rtx));
638 static void record_jump_equiv PARAMS ((rtx, int));
639 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
640 rtx, rtx, int));
641 static void cse_insn PARAMS ((rtx, rtx));
642 static int addr_affects_sp_p PARAMS ((rtx));
643 static void invalidate_from_clobbers PARAMS ((rtx));
644 static rtx cse_process_notes PARAMS ((rtx, rtx));
645 static void cse_around_loop PARAMS ((rtx));
646 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
647 static void invalidate_skipped_block PARAMS ((rtx));
648 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
649 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
650 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
651 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
652 static int check_for_label_ref PARAMS ((rtx *, void *));
653 extern void dump_class PARAMS ((struct table_elt*));
654 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
655 static int check_dependence PARAMS ((rtx *, void *));
657 static void flush_hash_table PARAMS ((void));
658 static bool insn_live_p PARAMS ((rtx, int *));
659 static bool set_live_p PARAMS ((rtx, rtx, int *));
660 static bool dead_libcall_p PARAMS ((rtx, int *));
662 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
663 virtual regs here because the simplify_*_operation routines are called
664 by integrate.c, which is called before virtual register instantiation. */
666 static bool
667 fixed_base_plus_p (x)
668 rtx x;
670 switch (GET_CODE (x))
672 case REG:
673 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
674 return true;
675 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
676 return true;
677 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
678 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
679 return true;
680 return false;
682 case PLUS:
683 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
684 return false;
685 return fixed_base_plus_p (XEXP (x, 0));
687 case ADDRESSOF:
688 return true;
690 default:
691 return false;
695 /* Dump the expressions in the equivalence class indicated by CLASSP.
696 This function is used only for debugging. */
697 void
698 dump_class (classp)
699 struct table_elt *classp;
701 struct table_elt *elt;
703 fprintf (stderr, "Equivalence chain for ");
704 print_rtl (stderr, classp->exp);
705 fprintf (stderr, ": \n");
707 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
709 print_rtl (stderr, elt->exp);
710 fprintf (stderr, "\n");
714 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
716 static int
717 approx_reg_cost_1 (xp, data)
718 rtx *xp;
719 void *data;
721 rtx x = *xp;
722 int *cost_p = data;
724 if (x && GET_CODE (x) == REG)
726 unsigned int regno = REGNO (x);
728 if (! CHEAP_REGNO (regno))
730 if (regno < FIRST_PSEUDO_REGISTER)
732 if (SMALL_REGISTER_CLASSES)
733 return 1;
734 *cost_p += 2;
736 else
737 *cost_p += 1;
741 return 0;
744 /* Return an estimate of the cost of the registers used in an rtx.
745 This is mostly the number of different REG expressions in the rtx;
746 however for some exceptions like fixed registers we use a cost of
747 0. If any other hard register reference occurs, return MAX_COST. */
749 static int
750 approx_reg_cost (x)
751 rtx x;
753 int cost = 0;
755 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
756 return MAX_COST;
758 return cost;
761 /* Return a negative value if an rtx A, whose costs are given by COST_A
762 and REGCOST_A, is more desirable than an rtx B.
763 Return a positive value if A is less desirable, or 0 if the two are
764 equally good. */
765 static int
766 preferrable (cost_a, regcost_a, cost_b, regcost_b)
767 int cost_a, regcost_a, cost_b, regcost_b;
769 /* First, get rid of cases involving expressions that are entirely
770 unwanted. */
771 if (cost_a != cost_b)
773 if (cost_a == MAX_COST)
774 return 1;
775 if (cost_b == MAX_COST)
776 return -1;
779 /* Avoid extending lifetimes of hardregs. */
780 if (regcost_a != regcost_b)
782 if (regcost_a == MAX_COST)
783 return 1;
784 if (regcost_b == MAX_COST)
785 return -1;
788 /* Normal operation costs take precedence. */
789 if (cost_a != cost_b)
790 return cost_a - cost_b;
791 /* Only if these are identical consider effects on register pressure. */
792 if (regcost_a != regcost_b)
793 return regcost_a - regcost_b;
794 return 0;
797 /* Internal function, to compute cost when X is not a register; called
798 from COST macro to keep it simple. */
800 static int
801 notreg_cost (x, outer)
802 rtx x;
803 enum rtx_code outer;
805 return ((GET_CODE (x) == SUBREG
806 && GET_CODE (SUBREG_REG (x)) == REG
807 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
808 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
809 && (GET_MODE_SIZE (GET_MODE (x))
810 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
811 && subreg_lowpart_p (x)
812 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
813 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
815 : rtx_cost (x, outer) * 2);
818 /* Return an estimate of the cost of computing rtx X.
819 One use is in cse, to decide which expression to keep in the hash table.
820 Another is in rtl generation, to pick the cheapest way to multiply.
821 Other uses like the latter are expected in the future. */
824 rtx_cost (x, outer_code)
825 rtx x;
826 enum rtx_code outer_code ATTRIBUTE_UNUSED;
828 int i, j;
829 enum rtx_code code;
830 const char *fmt;
831 int total;
833 if (x == 0)
834 return 0;
836 /* Compute the default costs of certain things.
837 Note that targetm.rtx_costs can override the defaults. */
839 code = GET_CODE (x);
840 switch (code)
842 case MULT:
843 total = COSTS_N_INSNS (5);
844 break;
845 case DIV:
846 case UDIV:
847 case MOD:
848 case UMOD:
849 total = COSTS_N_INSNS (7);
850 break;
851 case USE:
852 /* Used in loop.c and combine.c as a marker. */
853 total = 0;
854 break;
855 default:
856 total = COSTS_N_INSNS (1);
859 switch (code)
861 case REG:
862 return 0;
864 case SUBREG:
865 /* If we can't tie these modes, make this expensive. The larger
866 the mode, the more expensive it is. */
867 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
868 return COSTS_N_INSNS (2
869 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
870 break;
872 default:
873 if ((*targetm.rtx_costs) (x, code, outer_code, &total))
874 return total;
875 break;
878 /* Sum the costs of the sub-rtx's, plus cost of this operation,
879 which is already in total. */
881 fmt = GET_RTX_FORMAT (code);
882 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
883 if (fmt[i] == 'e')
884 total += rtx_cost (XEXP (x, i), code);
885 else if (fmt[i] == 'E')
886 for (j = 0; j < XVECLEN (x, i); j++)
887 total += rtx_cost (XVECEXP (x, i, j), code);
889 return total;
892 /* Return cost of address expression X.
893 Expect that X is properly formed address reference. */
896 address_cost (x, mode)
897 rtx x;
898 enum machine_mode mode;
900 /* The address_cost target hook does not deal with ADDRESSOF nodes. But,
901 during CSE, such nodes are present. Using an ADDRESSOF node which
902 refers to the address of a REG is a good thing because we can then
903 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
905 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
906 return -1;
908 /* We may be asked for cost of various unusual addresses, such as operands
909 of push instruction. It is not worthwhile to complicate writing
910 of the target hook by such cases. */
912 if (!memory_address_p (mode, x))
913 return 1000;
915 return (*targetm.address_cost) (x);
918 /* If the target doesn't override, compute the cost as with arithmetic. */
921 default_address_cost (x)
922 rtx x;
924 return rtx_cost (x, MEM);
927 static struct cse_reg_info *
928 get_cse_reg_info (regno)
929 unsigned int regno;
931 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
932 struct cse_reg_info *p;
934 for (p = *hash_head; p != NULL; p = p->hash_next)
935 if (p->regno == regno)
936 break;
938 if (p == NULL)
940 /* Get a new cse_reg_info structure. */
941 if (cse_reg_info_free_list)
943 p = cse_reg_info_free_list;
944 cse_reg_info_free_list = p->next;
946 else
947 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
949 /* Insert into hash table. */
950 p->hash_next = *hash_head;
951 *hash_head = p;
953 /* Initialize it. */
954 p->reg_tick = 1;
955 p->reg_in_table = -1;
956 p->subreg_ticked = -1;
957 p->reg_qty = regno;
958 p->regno = regno;
959 p->next = cse_reg_info_used_list;
960 cse_reg_info_used_list = p;
961 if (!cse_reg_info_used_list_end)
962 cse_reg_info_used_list_end = p;
965 /* Cache this lookup; we tend to be looking up information about the
966 same register several times in a row. */
967 cached_regno = regno;
968 cached_cse_reg_info = p;
970 return p;
973 /* Clear the hash table and initialize each register with its own quantity,
974 for a new basic block. */
976 static void
977 new_basic_block ()
979 int i;
981 next_qty = max_reg;
983 /* Clear out hash table state for this pass. */
985 memset ((char *) reg_hash, 0, sizeof reg_hash);
987 if (cse_reg_info_used_list)
989 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
990 cse_reg_info_free_list = cse_reg_info_used_list;
991 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
993 cached_cse_reg_info = 0;
995 CLEAR_HARD_REG_SET (hard_regs_in_table);
997 /* The per-quantity values used to be initialized here, but it is
998 much faster to initialize each as it is made in `make_new_qty'. */
1000 for (i = 0; i < HASH_SIZE; i++)
1002 struct table_elt *first;
1004 first = table[i];
1005 if (first != NULL)
1007 struct table_elt *last = first;
1009 table[i] = NULL;
1011 while (last->next_same_hash != NULL)
1012 last = last->next_same_hash;
1014 /* Now relink this hash entire chain into
1015 the free element list. */
1017 last->next_same_hash = free_element_chain;
1018 free_element_chain = first;
1022 #ifdef HAVE_cc0
1023 prev_insn = 0;
1024 prev_insn_cc0 = 0;
1025 #endif
1028 /* Say that register REG contains a quantity in mode MODE not in any
1029 register before and initialize that quantity. */
1031 static void
1032 make_new_qty (reg, mode)
1033 unsigned int reg;
1034 enum machine_mode mode;
1036 int q;
1037 struct qty_table_elem *ent;
1038 struct reg_eqv_elem *eqv;
1040 if (next_qty >= max_qty)
1041 abort ();
1043 q = REG_QTY (reg) = next_qty++;
1044 ent = &qty_table[q];
1045 ent->first_reg = reg;
1046 ent->last_reg = reg;
1047 ent->mode = mode;
1048 ent->const_rtx = ent->const_insn = NULL_RTX;
1049 ent->comparison_code = UNKNOWN;
1051 eqv = &reg_eqv_table[reg];
1052 eqv->next = eqv->prev = -1;
1055 /* Make reg NEW equivalent to reg OLD.
1056 OLD is not changing; NEW is. */
1058 static void
1059 make_regs_eqv (new, old)
1060 unsigned int new, old;
1062 unsigned int lastr, firstr;
1063 int q = REG_QTY (old);
1064 struct qty_table_elem *ent;
1066 ent = &qty_table[q];
1068 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1069 if (! REGNO_QTY_VALID_P (old))
1070 abort ();
1072 REG_QTY (new) = q;
1073 firstr = ent->first_reg;
1074 lastr = ent->last_reg;
1076 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1077 hard regs. Among pseudos, if NEW will live longer than any other reg
1078 of the same qty, and that is beyond the current basic block,
1079 make it the new canonical replacement for this qty. */
1080 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1081 /* Certain fixed registers might be of the class NO_REGS. This means
1082 that not only can they not be allocated by the compiler, but
1083 they cannot be used in substitutions or canonicalizations
1084 either. */
1085 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1086 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1087 || (new >= FIRST_PSEUDO_REGISTER
1088 && (firstr < FIRST_PSEUDO_REGISTER
1089 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1090 || (uid_cuid[REGNO_FIRST_UID (new)]
1091 < cse_basic_block_start))
1092 && (uid_cuid[REGNO_LAST_UID (new)]
1093 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1095 reg_eqv_table[firstr].prev = new;
1096 reg_eqv_table[new].next = firstr;
1097 reg_eqv_table[new].prev = -1;
1098 ent->first_reg = new;
1100 else
1102 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1103 Otherwise, insert before any non-fixed hard regs that are at the
1104 end. Registers of class NO_REGS cannot be used as an
1105 equivalent for anything. */
1106 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1107 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1108 && new >= FIRST_PSEUDO_REGISTER)
1109 lastr = reg_eqv_table[lastr].prev;
1110 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1111 if (reg_eqv_table[lastr].next >= 0)
1112 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1113 else
1114 qty_table[q].last_reg = new;
1115 reg_eqv_table[lastr].next = new;
1116 reg_eqv_table[new].prev = lastr;
1120 /* Remove REG from its equivalence class. */
1122 static void
1123 delete_reg_equiv (reg)
1124 unsigned int reg;
1126 struct qty_table_elem *ent;
1127 int q = REG_QTY (reg);
1128 int p, n;
1130 /* If invalid, do nothing. */
1131 if (q == (int) reg)
1132 return;
1134 ent = &qty_table[q];
1136 p = reg_eqv_table[reg].prev;
1137 n = reg_eqv_table[reg].next;
1139 if (n != -1)
1140 reg_eqv_table[n].prev = p;
1141 else
1142 ent->last_reg = p;
1143 if (p != -1)
1144 reg_eqv_table[p].next = n;
1145 else
1146 ent->first_reg = n;
1148 REG_QTY (reg) = reg;
1151 /* Remove any invalid expressions from the hash table
1152 that refer to any of the registers contained in expression X.
1154 Make sure that newly inserted references to those registers
1155 as subexpressions will be considered valid.
1157 mention_regs is not called when a register itself
1158 is being stored in the table.
1160 Return 1 if we have done something that may have changed the hash code
1161 of X. */
1163 static int
1164 mention_regs (x)
1165 rtx x;
1167 enum rtx_code code;
1168 int i, j;
1169 const char *fmt;
1170 int changed = 0;
1172 if (x == 0)
1173 return 0;
1175 code = GET_CODE (x);
1176 if (code == REG)
1178 unsigned int regno = REGNO (x);
1179 unsigned int endregno
1180 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1181 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1182 unsigned int i;
1184 for (i = regno; i < endregno; i++)
1186 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1187 remove_invalid_refs (i);
1189 REG_IN_TABLE (i) = REG_TICK (i);
1190 SUBREG_TICKED (i) = -1;
1193 return 0;
1196 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1197 pseudo if they don't use overlapping words. We handle only pseudos
1198 here for simplicity. */
1199 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1200 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1202 unsigned int i = REGNO (SUBREG_REG (x));
1204 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1206 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1207 the last store to this register really stored into this
1208 subreg, then remove the memory of this subreg.
1209 Otherwise, remove any memory of the entire register and
1210 all its subregs from the table. */
1211 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1212 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1213 remove_invalid_refs (i);
1214 else
1215 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1218 REG_IN_TABLE (i) = REG_TICK (i);
1219 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1220 return 0;
1223 /* If X is a comparison or a COMPARE and either operand is a register
1224 that does not have a quantity, give it one. This is so that a later
1225 call to record_jump_equiv won't cause X to be assigned a different
1226 hash code and not found in the table after that call.
1228 It is not necessary to do this here, since rehash_using_reg can
1229 fix up the table later, but doing this here eliminates the need to
1230 call that expensive function in the most common case where the only
1231 use of the register is in the comparison. */
1233 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1235 if (GET_CODE (XEXP (x, 0)) == REG
1236 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1237 if (insert_regs (XEXP (x, 0), NULL, 0))
1239 rehash_using_reg (XEXP (x, 0));
1240 changed = 1;
1243 if (GET_CODE (XEXP (x, 1)) == REG
1244 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1245 if (insert_regs (XEXP (x, 1), NULL, 0))
1247 rehash_using_reg (XEXP (x, 1));
1248 changed = 1;
1252 fmt = GET_RTX_FORMAT (code);
1253 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1254 if (fmt[i] == 'e')
1255 changed |= mention_regs (XEXP (x, i));
1256 else if (fmt[i] == 'E')
1257 for (j = 0; j < XVECLEN (x, i); j++)
1258 changed |= mention_regs (XVECEXP (x, i, j));
1260 return changed;
1263 /* Update the register quantities for inserting X into the hash table
1264 with a value equivalent to CLASSP.
1265 (If the class does not contain a REG, it is irrelevant.)
1266 If MODIFIED is nonzero, X is a destination; it is being modified.
1267 Note that delete_reg_equiv should be called on a register
1268 before insert_regs is done on that register with MODIFIED != 0.
1270 Nonzero value means that elements of reg_qty have changed
1271 so X's hash code may be different. */
1273 static int
1274 insert_regs (x, classp, modified)
1275 rtx x;
1276 struct table_elt *classp;
1277 int modified;
1279 if (GET_CODE (x) == REG)
1281 unsigned int regno = REGNO (x);
1282 int qty_valid;
1284 /* If REGNO is in the equivalence table already but is of the
1285 wrong mode for that equivalence, don't do anything here. */
1287 qty_valid = REGNO_QTY_VALID_P (regno);
1288 if (qty_valid)
1290 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1292 if (ent->mode != GET_MODE (x))
1293 return 0;
1296 if (modified || ! qty_valid)
1298 if (classp)
1299 for (classp = classp->first_same_value;
1300 classp != 0;
1301 classp = classp->next_same_value)
1302 if (GET_CODE (classp->exp) == REG
1303 && GET_MODE (classp->exp) == GET_MODE (x))
1305 make_regs_eqv (regno, REGNO (classp->exp));
1306 return 1;
1309 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1310 than REG_IN_TABLE to find out if there was only a single preceding
1311 invalidation - for the SUBREG - or another one, which would be
1312 for the full register. However, if we find here that REG_TICK
1313 indicates that the register is invalid, it means that it has
1314 been invalidated in a separate operation. The SUBREG might be used
1315 now (then this is a recursive call), or we might use the full REG
1316 now and a SUBREG of it later. So bump up REG_TICK so that
1317 mention_regs will do the right thing. */
1318 if (! modified
1319 && REG_IN_TABLE (regno) >= 0
1320 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1321 REG_TICK (regno)++;
1322 make_new_qty (regno, GET_MODE (x));
1323 return 1;
1326 return 0;
1329 /* If X is a SUBREG, we will likely be inserting the inner register in the
1330 table. If that register doesn't have an assigned quantity number at
1331 this point but does later, the insertion that we will be doing now will
1332 not be accessible because its hash code will have changed. So assign
1333 a quantity number now. */
1335 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1336 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1338 insert_regs (SUBREG_REG (x), NULL, 0);
1339 mention_regs (x);
1340 return 1;
1342 else
1343 return mention_regs (x);
1346 /* Look in or update the hash table. */
1348 /* Remove table element ELT from use in the table.
1349 HASH is its hash code, made using the HASH macro.
1350 It's an argument because often that is known in advance
1351 and we save much time not recomputing it. */
1353 static void
1354 remove_from_table (elt, hash)
1355 struct table_elt *elt;
1356 unsigned hash;
1358 if (elt == 0)
1359 return;
1361 /* Mark this element as removed. See cse_insn. */
1362 elt->first_same_value = 0;
1364 /* Remove the table element from its equivalence class. */
1367 struct table_elt *prev = elt->prev_same_value;
1368 struct table_elt *next = elt->next_same_value;
1370 if (next)
1371 next->prev_same_value = prev;
1373 if (prev)
1374 prev->next_same_value = next;
1375 else
1377 struct table_elt *newfirst = next;
1378 while (next)
1380 next->first_same_value = newfirst;
1381 next = next->next_same_value;
1386 /* Remove the table element from its hash bucket. */
1389 struct table_elt *prev = elt->prev_same_hash;
1390 struct table_elt *next = elt->next_same_hash;
1392 if (next)
1393 next->prev_same_hash = prev;
1395 if (prev)
1396 prev->next_same_hash = next;
1397 else if (table[hash] == elt)
1398 table[hash] = next;
1399 else
1401 /* This entry is not in the proper hash bucket. This can happen
1402 when two classes were merged by `merge_equiv_classes'. Search
1403 for the hash bucket that it heads. This happens only very
1404 rarely, so the cost is acceptable. */
1405 for (hash = 0; hash < HASH_SIZE; hash++)
1406 if (table[hash] == elt)
1407 table[hash] = next;
1411 /* Remove the table element from its related-value circular chain. */
1413 if (elt->related_value != 0 && elt->related_value != elt)
1415 struct table_elt *p = elt->related_value;
1417 while (p->related_value != elt)
1418 p = p->related_value;
1419 p->related_value = elt->related_value;
1420 if (p->related_value == p)
1421 p->related_value = 0;
1424 /* Now add it to the free element chain. */
1425 elt->next_same_hash = free_element_chain;
1426 free_element_chain = elt;
1429 /* Look up X in the hash table and return its table element,
1430 or 0 if X is not in the table.
1432 MODE is the machine-mode of X, or if X is an integer constant
1433 with VOIDmode then MODE is the mode with which X will be used.
1435 Here we are satisfied to find an expression whose tree structure
1436 looks like X. */
1438 static struct table_elt *
1439 lookup (x, hash, mode)
1440 rtx x;
1441 unsigned hash;
1442 enum machine_mode mode;
1444 struct table_elt *p;
1446 for (p = table[hash]; p; p = p->next_same_hash)
1447 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1448 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1449 return p;
1451 return 0;
1454 /* Like `lookup' but don't care whether the table element uses invalid regs.
1455 Also ignore discrepancies in the machine mode of a register. */
1457 static struct table_elt *
1458 lookup_for_remove (x, hash, mode)
1459 rtx x;
1460 unsigned hash;
1461 enum machine_mode mode;
1463 struct table_elt *p;
1465 if (GET_CODE (x) == REG)
1467 unsigned int regno = REGNO (x);
1469 /* Don't check the machine mode when comparing registers;
1470 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1471 for (p = table[hash]; p; p = p->next_same_hash)
1472 if (GET_CODE (p->exp) == REG
1473 && REGNO (p->exp) == regno)
1474 return p;
1476 else
1478 for (p = table[hash]; p; p = p->next_same_hash)
1479 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1480 return p;
1483 return 0;
1486 /* Look for an expression equivalent to X and with code CODE.
1487 If one is found, return that expression. */
1489 static rtx
1490 lookup_as_function (x, code)
1491 rtx x;
1492 enum rtx_code code;
1494 struct table_elt *p
1495 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1497 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1498 long as we are narrowing. So if we looked in vain for a mode narrower
1499 than word_mode before, look for word_mode now. */
1500 if (p == 0 && code == CONST_INT
1501 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1503 x = copy_rtx (x);
1504 PUT_MODE (x, word_mode);
1505 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1508 if (p == 0)
1509 return 0;
1511 for (p = p->first_same_value; p; p = p->next_same_value)
1512 if (GET_CODE (p->exp) == code
1513 /* Make sure this is a valid entry in the table. */
1514 && exp_equiv_p (p->exp, p->exp, 1, 0))
1515 return p->exp;
1517 return 0;
1520 /* Insert X in the hash table, assuming HASH is its hash code
1521 and CLASSP is an element of the class it should go in
1522 (or 0 if a new class should be made).
1523 It is inserted at the proper position to keep the class in
1524 the order cheapest first.
1526 MODE is the machine-mode of X, or if X is an integer constant
1527 with VOIDmode then MODE is the mode with which X will be used.
1529 For elements of equal cheapness, the most recent one
1530 goes in front, except that the first element in the list
1531 remains first unless a cheaper element is added. The order of
1532 pseudo-registers does not matter, as canon_reg will be called to
1533 find the cheapest when a register is retrieved from the table.
1535 The in_memory field in the hash table element is set to 0.
1536 The caller must set it nonzero if appropriate.
1538 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1539 and if insert_regs returns a nonzero value
1540 you must then recompute its hash code before calling here.
1542 If necessary, update table showing constant values of quantities. */
1544 #define CHEAPER(X, Y) \
1545 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1547 static struct table_elt *
1548 insert (x, classp, hash, mode)
1549 rtx x;
1550 struct table_elt *classp;
1551 unsigned hash;
1552 enum machine_mode mode;
1554 struct table_elt *elt;
1556 /* If X is a register and we haven't made a quantity for it,
1557 something is wrong. */
1558 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1559 abort ();
1561 /* If X is a hard register, show it is being put in the table. */
1562 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1564 unsigned int regno = REGNO (x);
1565 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1566 unsigned int i;
1568 for (i = regno; i < endregno; i++)
1569 SET_HARD_REG_BIT (hard_regs_in_table, i);
1572 /* Put an element for X into the right hash bucket. */
1574 elt = free_element_chain;
1575 if (elt)
1576 free_element_chain = elt->next_same_hash;
1577 else
1579 n_elements_made++;
1580 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1583 elt->exp = x;
1584 elt->canon_exp = NULL_RTX;
1585 elt->cost = COST (x);
1586 elt->regcost = approx_reg_cost (x);
1587 elt->next_same_value = 0;
1588 elt->prev_same_value = 0;
1589 elt->next_same_hash = table[hash];
1590 elt->prev_same_hash = 0;
1591 elt->related_value = 0;
1592 elt->in_memory = 0;
1593 elt->mode = mode;
1594 elt->is_const = (CONSTANT_P (x)
1595 /* GNU C++ takes advantage of this for `this'
1596 (and other const values). */
1597 || (GET_CODE (x) == REG
1598 && RTX_UNCHANGING_P (x)
1599 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1600 || fixed_base_plus_p (x));
1602 if (table[hash])
1603 table[hash]->prev_same_hash = elt;
1604 table[hash] = elt;
1606 /* Put it into the proper value-class. */
1607 if (classp)
1609 classp = classp->first_same_value;
1610 if (CHEAPER (elt, classp))
1611 /* Insert at the head of the class */
1613 struct table_elt *p;
1614 elt->next_same_value = classp;
1615 classp->prev_same_value = elt;
1616 elt->first_same_value = elt;
1618 for (p = classp; p; p = p->next_same_value)
1619 p->first_same_value = elt;
1621 else
1623 /* Insert not at head of the class. */
1624 /* Put it after the last element cheaper than X. */
1625 struct table_elt *p, *next;
1627 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1628 p = next);
1630 /* Put it after P and before NEXT. */
1631 elt->next_same_value = next;
1632 if (next)
1633 next->prev_same_value = elt;
1635 elt->prev_same_value = p;
1636 p->next_same_value = elt;
1637 elt->first_same_value = classp;
1640 else
1641 elt->first_same_value = elt;
1643 /* If this is a constant being set equivalent to a register or a register
1644 being set equivalent to a constant, note the constant equivalence.
1646 If this is a constant, it cannot be equivalent to a different constant,
1647 and a constant is the only thing that can be cheaper than a register. So
1648 we know the register is the head of the class (before the constant was
1649 inserted).
1651 If this is a register that is not already known equivalent to a
1652 constant, we must check the entire class.
1654 If this is a register that is already known equivalent to an insn,
1655 update the qtys `const_insn' to show that `this_insn' is the latest
1656 insn making that quantity equivalent to the constant. */
1658 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1659 && GET_CODE (x) != REG)
1661 int exp_q = REG_QTY (REGNO (classp->exp));
1662 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1664 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1665 exp_ent->const_insn = this_insn;
1668 else if (GET_CODE (x) == REG
1669 && classp
1670 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1671 && ! elt->is_const)
1673 struct table_elt *p;
1675 for (p = classp; p != 0; p = p->next_same_value)
1677 if (p->is_const && GET_CODE (p->exp) != REG)
1679 int x_q = REG_QTY (REGNO (x));
1680 struct qty_table_elem *x_ent = &qty_table[x_q];
1682 x_ent->const_rtx
1683 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1684 x_ent->const_insn = this_insn;
1685 break;
1690 else if (GET_CODE (x) == REG
1691 && qty_table[REG_QTY (REGNO (x))].const_rtx
1692 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1693 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1695 /* If this is a constant with symbolic value,
1696 and it has a term with an explicit integer value,
1697 link it up with related expressions. */
1698 if (GET_CODE (x) == CONST)
1700 rtx subexp = get_related_value (x);
1701 unsigned subhash;
1702 struct table_elt *subelt, *subelt_prev;
1704 if (subexp != 0)
1706 /* Get the integer-free subexpression in the hash table. */
1707 subhash = safe_hash (subexp, mode) & HASH_MASK;
1708 subelt = lookup (subexp, subhash, mode);
1709 if (subelt == 0)
1710 subelt = insert (subexp, NULL, subhash, mode);
1711 /* Initialize SUBELT's circular chain if it has none. */
1712 if (subelt->related_value == 0)
1713 subelt->related_value = subelt;
1714 /* Find the element in the circular chain that precedes SUBELT. */
1715 subelt_prev = subelt;
1716 while (subelt_prev->related_value != subelt)
1717 subelt_prev = subelt_prev->related_value;
1718 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1719 This way the element that follows SUBELT is the oldest one. */
1720 elt->related_value = subelt_prev->related_value;
1721 subelt_prev->related_value = elt;
1725 return elt;
1728 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1729 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1730 the two classes equivalent.
1732 CLASS1 will be the surviving class; CLASS2 should not be used after this
1733 call.
1735 Any invalid entries in CLASS2 will not be copied. */
1737 static void
1738 merge_equiv_classes (class1, class2)
1739 struct table_elt *class1, *class2;
1741 struct table_elt *elt, *next, *new;
1743 /* Ensure we start with the head of the classes. */
1744 class1 = class1->first_same_value;
1745 class2 = class2->first_same_value;
1747 /* If they were already equal, forget it. */
1748 if (class1 == class2)
1749 return;
1751 for (elt = class2; elt; elt = next)
1753 unsigned int hash;
1754 rtx exp = elt->exp;
1755 enum machine_mode mode = elt->mode;
1757 next = elt->next_same_value;
1759 /* Remove old entry, make a new one in CLASS1's class.
1760 Don't do this for invalid entries as we cannot find their
1761 hash code (it also isn't necessary). */
1762 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1764 hash_arg_in_memory = 0;
1765 hash = HASH (exp, mode);
1767 if (GET_CODE (exp) == REG)
1768 delete_reg_equiv (REGNO (exp));
1770 remove_from_table (elt, hash);
1772 if (insert_regs (exp, class1, 0))
1774 rehash_using_reg (exp);
1775 hash = HASH (exp, mode);
1777 new = insert (exp, class1, hash, mode);
1778 new->in_memory = hash_arg_in_memory;
1783 /* Flush the entire hash table. */
1785 static void
1786 flush_hash_table ()
1788 int i;
1789 struct table_elt *p;
1791 for (i = 0; i < HASH_SIZE; i++)
1792 for (p = table[i]; p; p = table[i])
1794 /* Note that invalidate can remove elements
1795 after P in the current hash chain. */
1796 if (GET_CODE (p->exp) == REG)
1797 invalidate (p->exp, p->mode);
1798 else
1799 remove_from_table (p, i);
1803 /* Function called for each rtx to check whether true dependence exist. */
1804 struct check_dependence_data
1806 enum machine_mode mode;
1807 rtx exp;
1810 static int
1811 check_dependence (x, data)
1812 rtx *x;
1813 void *data;
1815 struct check_dependence_data *d = (struct check_dependence_data *) data;
1816 if (*x && GET_CODE (*x) == MEM)
1817 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1818 else
1819 return 0;
1822 /* Remove from the hash table, or mark as invalid, all expressions whose
1823 values could be altered by storing in X. X is a register, a subreg, or
1824 a memory reference with nonvarying address (because, when a memory
1825 reference with a varying address is stored in, all memory references are
1826 removed by invalidate_memory so specific invalidation is superfluous).
1827 FULL_MODE, if not VOIDmode, indicates that this much should be
1828 invalidated instead of just the amount indicated by the mode of X. This
1829 is only used for bitfield stores into memory.
1831 A nonvarying address may be just a register or just a symbol reference,
1832 or it may be either of those plus a numeric offset. */
1834 static void
1835 invalidate (x, full_mode)
1836 rtx x;
1837 enum machine_mode full_mode;
1839 int i;
1840 struct table_elt *p;
1842 switch (GET_CODE (x))
1844 case REG:
1846 /* If X is a register, dependencies on its contents are recorded
1847 through the qty number mechanism. Just change the qty number of
1848 the register, mark it as invalid for expressions that refer to it,
1849 and remove it itself. */
1850 unsigned int regno = REGNO (x);
1851 unsigned int hash = HASH (x, GET_MODE (x));
1853 /* Remove REGNO from any quantity list it might be on and indicate
1854 that its value might have changed. If it is a pseudo, remove its
1855 entry from the hash table.
1857 For a hard register, we do the first two actions above for any
1858 additional hard registers corresponding to X. Then, if any of these
1859 registers are in the table, we must remove any REG entries that
1860 overlap these registers. */
1862 delete_reg_equiv (regno);
1863 REG_TICK (regno)++;
1864 SUBREG_TICKED (regno) = -1;
1866 if (regno >= FIRST_PSEUDO_REGISTER)
1868 /* Because a register can be referenced in more than one mode,
1869 we might have to remove more than one table entry. */
1870 struct table_elt *elt;
1872 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1873 remove_from_table (elt, hash);
1875 else
1877 HOST_WIDE_INT in_table
1878 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1879 unsigned int endregno
1880 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1881 unsigned int tregno, tendregno, rn;
1882 struct table_elt *p, *next;
1884 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1886 for (rn = regno + 1; rn < endregno; rn++)
1888 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1889 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1890 delete_reg_equiv (rn);
1891 REG_TICK (rn)++;
1892 SUBREG_TICKED (rn) = -1;
1895 if (in_table)
1896 for (hash = 0; hash < HASH_SIZE; hash++)
1897 for (p = table[hash]; p; p = next)
1899 next = p->next_same_hash;
1901 if (GET_CODE (p->exp) != REG
1902 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1903 continue;
1905 tregno = REGNO (p->exp);
1906 tendregno
1907 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1908 if (tendregno > regno && tregno < endregno)
1909 remove_from_table (p, hash);
1913 return;
1915 case SUBREG:
1916 invalidate (SUBREG_REG (x), VOIDmode);
1917 return;
1919 case PARALLEL:
1920 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1921 invalidate (XVECEXP (x, 0, i), VOIDmode);
1922 return;
1924 case EXPR_LIST:
1925 /* This is part of a disjoint return value; extract the location in
1926 question ignoring the offset. */
1927 invalidate (XEXP (x, 0), VOIDmode);
1928 return;
1930 case MEM:
1931 /* Calculate the canonical version of X here so that
1932 true_dependence doesn't generate new RTL for X on each call. */
1933 x = canon_rtx (x);
1935 /* Remove all hash table elements that refer to overlapping pieces of
1936 memory. */
1937 if (full_mode == VOIDmode)
1938 full_mode = GET_MODE (x);
1940 for (i = 0; i < HASH_SIZE; i++)
1942 struct table_elt *next;
1944 for (p = table[i]; p; p = next)
1946 next = p->next_same_hash;
1947 if (p->in_memory)
1949 struct check_dependence_data d;
1951 /* Just canonicalize the expression once;
1952 otherwise each time we call invalidate
1953 true_dependence will canonicalize the
1954 expression again. */
1955 if (!p->canon_exp)
1956 p->canon_exp = canon_rtx (p->exp);
1957 d.exp = x;
1958 d.mode = full_mode;
1959 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1960 remove_from_table (p, i);
1964 return;
1966 default:
1967 abort ();
1971 /* Remove all expressions that refer to register REGNO,
1972 since they are already invalid, and we are about to
1973 mark that register valid again and don't want the old
1974 expressions to reappear as valid. */
1976 static void
1977 remove_invalid_refs (regno)
1978 unsigned int regno;
1980 unsigned int i;
1981 struct table_elt *p, *next;
1983 for (i = 0; i < HASH_SIZE; i++)
1984 for (p = table[i]; p; p = next)
1986 next = p->next_same_hash;
1987 if (GET_CODE (p->exp) != REG
1988 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1989 remove_from_table (p, i);
1993 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1994 and mode MODE. */
1995 static void
1996 remove_invalid_subreg_refs (regno, offset, mode)
1997 unsigned int regno;
1998 unsigned int offset;
1999 enum machine_mode mode;
2001 unsigned int i;
2002 struct table_elt *p, *next;
2003 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2005 for (i = 0; i < HASH_SIZE; i++)
2006 for (p = table[i]; p; p = next)
2008 rtx exp = p->exp;
2009 next = p->next_same_hash;
2011 if (GET_CODE (exp) != REG
2012 && (GET_CODE (exp) != SUBREG
2013 || GET_CODE (SUBREG_REG (exp)) != REG
2014 || REGNO (SUBREG_REG (exp)) != regno
2015 || (((SUBREG_BYTE (exp)
2016 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2017 && SUBREG_BYTE (exp) <= end))
2018 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2019 remove_from_table (p, i);
2023 /* Recompute the hash codes of any valid entries in the hash table that
2024 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2026 This is called when we make a jump equivalence. */
2028 static void
2029 rehash_using_reg (x)
2030 rtx x;
2032 unsigned int i;
2033 struct table_elt *p, *next;
2034 unsigned hash;
2036 if (GET_CODE (x) == SUBREG)
2037 x = SUBREG_REG (x);
2039 /* If X is not a register or if the register is known not to be in any
2040 valid entries in the table, we have no work to do. */
2042 if (GET_CODE (x) != REG
2043 || REG_IN_TABLE (REGNO (x)) < 0
2044 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2045 return;
2047 /* Scan all hash chains looking for valid entries that mention X.
2048 If we find one and it is in the wrong hash chain, move it. We can skip
2049 objects that are registers, since they are handled specially. */
2051 for (i = 0; i < HASH_SIZE; i++)
2052 for (p = table[i]; p; p = next)
2054 next = p->next_same_hash;
2055 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2056 && exp_equiv_p (p->exp, p->exp, 1, 0)
2057 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2059 if (p->next_same_hash)
2060 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2062 if (p->prev_same_hash)
2063 p->prev_same_hash->next_same_hash = p->next_same_hash;
2064 else
2065 table[i] = p->next_same_hash;
2067 p->next_same_hash = table[hash];
2068 p->prev_same_hash = 0;
2069 if (table[hash])
2070 table[hash]->prev_same_hash = p;
2071 table[hash] = p;
2076 /* Remove from the hash table any expression that is a call-clobbered
2077 register. Also update their TICK values. */
2079 static void
2080 invalidate_for_call ()
2082 unsigned int regno, endregno;
2083 unsigned int i;
2084 unsigned hash;
2085 struct table_elt *p, *next;
2086 int in_table = 0;
2088 /* Go through all the hard registers. For each that is clobbered in
2089 a CALL_INSN, remove the register from quantity chains and update
2090 reg_tick if defined. Also see if any of these registers is currently
2091 in the table. */
2093 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2094 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2096 delete_reg_equiv (regno);
2097 if (REG_TICK (regno) >= 0)
2099 REG_TICK (regno)++;
2100 SUBREG_TICKED (regno) = -1;
2103 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2106 /* In the case where we have no call-clobbered hard registers in the
2107 table, we are done. Otherwise, scan the table and remove any
2108 entry that overlaps a call-clobbered register. */
2110 if (in_table)
2111 for (hash = 0; hash < HASH_SIZE; hash++)
2112 for (p = table[hash]; p; p = next)
2114 next = p->next_same_hash;
2116 if (GET_CODE (p->exp) != REG
2117 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2118 continue;
2120 regno = REGNO (p->exp);
2121 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2123 for (i = regno; i < endregno; i++)
2124 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2126 remove_from_table (p, hash);
2127 break;
2132 /* Given an expression X of type CONST,
2133 and ELT which is its table entry (or 0 if it
2134 is not in the hash table),
2135 return an alternate expression for X as a register plus integer.
2136 If none can be found, return 0. */
2138 static rtx
2139 use_related_value (x, elt)
2140 rtx x;
2141 struct table_elt *elt;
2143 struct table_elt *relt = 0;
2144 struct table_elt *p, *q;
2145 HOST_WIDE_INT offset;
2147 /* First, is there anything related known?
2148 If we have a table element, we can tell from that.
2149 Otherwise, must look it up. */
2151 if (elt != 0 && elt->related_value != 0)
2152 relt = elt;
2153 else if (elt == 0 && GET_CODE (x) == CONST)
2155 rtx subexp = get_related_value (x);
2156 if (subexp != 0)
2157 relt = lookup (subexp,
2158 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2159 GET_MODE (subexp));
2162 if (relt == 0)
2163 return 0;
2165 /* Search all related table entries for one that has an
2166 equivalent register. */
2168 p = relt;
2169 while (1)
2171 /* This loop is strange in that it is executed in two different cases.
2172 The first is when X is already in the table. Then it is searching
2173 the RELATED_VALUE list of X's class (RELT). The second case is when
2174 X is not in the table. Then RELT points to a class for the related
2175 value.
2177 Ensure that, whatever case we are in, that we ignore classes that have
2178 the same value as X. */
2180 if (rtx_equal_p (x, p->exp))
2181 q = 0;
2182 else
2183 for (q = p->first_same_value; q; q = q->next_same_value)
2184 if (GET_CODE (q->exp) == REG)
2185 break;
2187 if (q)
2188 break;
2190 p = p->related_value;
2192 /* We went all the way around, so there is nothing to be found.
2193 Alternatively, perhaps RELT was in the table for some other reason
2194 and it has no related values recorded. */
2195 if (p == relt || p == 0)
2196 break;
2199 if (q == 0)
2200 return 0;
2202 offset = (get_integer_term (x) - get_integer_term (p->exp));
2203 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2204 return plus_constant (q->exp, offset);
2207 /* Hash a string. Just add its bytes up. */
2208 static inline unsigned
2209 canon_hash_string (ps)
2210 const char *ps;
2212 unsigned hash = 0;
2213 const unsigned char *p = (const unsigned char *) ps;
2215 if (p)
2216 while (*p)
2217 hash += *p++;
2219 return hash;
2222 /* Hash an rtx. We are careful to make sure the value is never negative.
2223 Equivalent registers hash identically.
2224 MODE is used in hashing for CONST_INTs only;
2225 otherwise the mode of X is used.
2227 Store 1 in do_not_record if any subexpression is volatile.
2229 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2230 which does not have the RTX_UNCHANGING_P bit set.
2232 Note that cse_insn knows that the hash code of a MEM expression
2233 is just (int) MEM plus the hash code of the address. */
2235 static unsigned
2236 canon_hash (x, mode)
2237 rtx x;
2238 enum machine_mode mode;
2240 int i, j;
2241 unsigned hash = 0;
2242 enum rtx_code code;
2243 const char *fmt;
2245 /* repeat is used to turn tail-recursion into iteration. */
2246 repeat:
2247 if (x == 0)
2248 return hash;
2250 code = GET_CODE (x);
2251 switch (code)
2253 case REG:
2255 unsigned int regno = REGNO (x);
2256 bool record;
2258 /* On some machines, we can't record any non-fixed hard register,
2259 because extending its life will cause reload problems. We
2260 consider ap, fp, sp, gp to be fixed for this purpose.
2262 We also consider CCmode registers to be fixed for this purpose;
2263 failure to do so leads to failure to simplify 0<100 type of
2264 conditionals.
2266 On all machines, we can't record any global registers.
2267 Nor should we record any register that is in a small
2268 class, as defined by CLASS_LIKELY_SPILLED_P. */
2270 if (regno >= FIRST_PSEUDO_REGISTER)
2271 record = true;
2272 else if (x == frame_pointer_rtx
2273 || x == hard_frame_pointer_rtx
2274 || x == arg_pointer_rtx
2275 || x == stack_pointer_rtx
2276 || x == pic_offset_table_rtx)
2277 record = true;
2278 else if (global_regs[regno])
2279 record = false;
2280 else if (fixed_regs[regno])
2281 record = true;
2282 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2283 record = true;
2284 else if (SMALL_REGISTER_CLASSES)
2285 record = false;
2286 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2287 record = false;
2288 else
2289 record = true;
2291 if (!record)
2293 do_not_record = 1;
2294 return 0;
2297 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2298 return hash;
2301 /* We handle SUBREG of a REG specially because the underlying
2302 reg changes its hash value with every value change; we don't
2303 want to have to forget unrelated subregs when one subreg changes. */
2304 case SUBREG:
2306 if (GET_CODE (SUBREG_REG (x)) == REG)
2308 hash += (((unsigned) SUBREG << 7)
2309 + REGNO (SUBREG_REG (x))
2310 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2311 return hash;
2313 break;
2316 case CONST_INT:
2318 unsigned HOST_WIDE_INT tem = INTVAL (x);
2319 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2320 return hash;
2323 case CONST_DOUBLE:
2324 /* This is like the general case, except that it only counts
2325 the integers representing the constant. */
2326 hash += (unsigned) code + (unsigned) GET_MODE (x);
2327 if (GET_MODE (x) != VOIDmode)
2328 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2329 else
2330 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2331 + (unsigned) CONST_DOUBLE_HIGH (x));
2332 return hash;
2334 case CONST_VECTOR:
2336 int units;
2337 rtx elt;
2339 units = CONST_VECTOR_NUNITS (x);
2341 for (i = 0; i < units; ++i)
2343 elt = CONST_VECTOR_ELT (x, i);
2344 hash += canon_hash (elt, GET_MODE (elt));
2347 return hash;
2350 /* Assume there is only one rtx object for any given label. */
2351 case LABEL_REF:
2352 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2353 return hash;
2355 case SYMBOL_REF:
2356 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2357 return hash;
2359 case MEM:
2360 /* We don't record if marked volatile or if BLKmode since we don't
2361 know the size of the move. */
2362 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2364 do_not_record = 1;
2365 return 0;
2367 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2368 hash_arg_in_memory = 1;
2370 /* Now that we have already found this special case,
2371 might as well speed it up as much as possible. */
2372 hash += (unsigned) MEM;
2373 x = XEXP (x, 0);
2374 goto repeat;
2376 case USE:
2377 /* A USE that mentions non-volatile memory needs special
2378 handling since the MEM may be BLKmode which normally
2379 prevents an entry from being made. Pure calls are
2380 marked by a USE which mentions BLKmode memory. */
2381 if (GET_CODE (XEXP (x, 0)) == MEM
2382 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2384 hash += (unsigned) USE;
2385 x = XEXP (x, 0);
2387 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2388 hash_arg_in_memory = 1;
2390 /* Now that we have already found this special case,
2391 might as well speed it up as much as possible. */
2392 hash += (unsigned) MEM;
2393 x = XEXP (x, 0);
2394 goto repeat;
2396 break;
2398 case PRE_DEC:
2399 case PRE_INC:
2400 case POST_DEC:
2401 case POST_INC:
2402 case PRE_MODIFY:
2403 case POST_MODIFY:
2404 case PC:
2405 case CC0:
2406 case CALL:
2407 case UNSPEC_VOLATILE:
2408 do_not_record = 1;
2409 return 0;
2411 case ASM_OPERANDS:
2412 if (MEM_VOLATILE_P (x))
2414 do_not_record = 1;
2415 return 0;
2417 else
2419 /* We don't want to take the filename and line into account. */
2420 hash += (unsigned) code + (unsigned) GET_MODE (x)
2421 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2422 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2423 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2425 if (ASM_OPERANDS_INPUT_LENGTH (x))
2427 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2429 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2430 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2431 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2432 (x, i)));
2435 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2436 x = ASM_OPERANDS_INPUT (x, 0);
2437 mode = GET_MODE (x);
2438 goto repeat;
2441 return hash;
2443 break;
2445 default:
2446 break;
2449 i = GET_RTX_LENGTH (code) - 1;
2450 hash += (unsigned) code + (unsigned) GET_MODE (x);
2451 fmt = GET_RTX_FORMAT (code);
2452 for (; i >= 0; i--)
2454 if (fmt[i] == 'e')
2456 rtx tem = XEXP (x, i);
2458 /* If we are about to do the last recursive call
2459 needed at this level, change it into iteration.
2460 This function is called enough to be worth it. */
2461 if (i == 0)
2463 x = tem;
2464 goto repeat;
2466 hash += canon_hash (tem, 0);
2468 else if (fmt[i] == 'E')
2469 for (j = 0; j < XVECLEN (x, i); j++)
2470 hash += canon_hash (XVECEXP (x, i, j), 0);
2471 else if (fmt[i] == 's')
2472 hash += canon_hash_string (XSTR (x, i));
2473 else if (fmt[i] == 'i')
2475 unsigned tem = XINT (x, i);
2476 hash += tem;
2478 else if (fmt[i] == '0' || fmt[i] == 't')
2479 /* Unused. */
2481 else
2482 abort ();
2484 return hash;
2487 /* Like canon_hash but with no side effects. */
2489 static unsigned
2490 safe_hash (x, mode)
2491 rtx x;
2492 enum machine_mode mode;
2494 int save_do_not_record = do_not_record;
2495 int save_hash_arg_in_memory = hash_arg_in_memory;
2496 unsigned hash = canon_hash (x, mode);
2497 hash_arg_in_memory = save_hash_arg_in_memory;
2498 do_not_record = save_do_not_record;
2499 return hash;
2502 /* Return 1 iff X and Y would canonicalize into the same thing,
2503 without actually constructing the canonicalization of either one.
2504 If VALIDATE is nonzero,
2505 we assume X is an expression being processed from the rtl
2506 and Y was found in the hash table. We check register refs
2507 in Y for being marked as valid.
2509 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2510 that is known to be in the register. Ordinarily, we don't allow them
2511 to match, because letting them match would cause unpredictable results
2512 in all the places that search a hash table chain for an equivalent
2513 for a given value. A possible equivalent that has different structure
2514 has its hash code computed from different data. Whether the hash code
2515 is the same as that of the given value is pure luck. */
2517 static int
2518 exp_equiv_p (x, y, validate, equal_values)
2519 rtx x, y;
2520 int validate;
2521 int equal_values;
2523 int i, j;
2524 enum rtx_code code;
2525 const char *fmt;
2527 /* Note: it is incorrect to assume an expression is equivalent to itself
2528 if VALIDATE is nonzero. */
2529 if (x == y && !validate)
2530 return 1;
2531 if (x == 0 || y == 0)
2532 return x == y;
2534 code = GET_CODE (x);
2535 if (code != GET_CODE (y))
2537 if (!equal_values)
2538 return 0;
2540 /* If X is a constant and Y is a register or vice versa, they may be
2541 equivalent. We only have to validate if Y is a register. */
2542 if (CONSTANT_P (x) && GET_CODE (y) == REG
2543 && REGNO_QTY_VALID_P (REGNO (y)))
2545 int y_q = REG_QTY (REGNO (y));
2546 struct qty_table_elem *y_ent = &qty_table[y_q];
2548 if (GET_MODE (y) == y_ent->mode
2549 && rtx_equal_p (x, y_ent->const_rtx)
2550 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2551 return 1;
2554 if (CONSTANT_P (y) && code == REG
2555 && REGNO_QTY_VALID_P (REGNO (x)))
2557 int x_q = REG_QTY (REGNO (x));
2558 struct qty_table_elem *x_ent = &qty_table[x_q];
2560 if (GET_MODE (x) == x_ent->mode
2561 && rtx_equal_p (y, x_ent->const_rtx))
2562 return 1;
2565 return 0;
2568 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2569 if (GET_MODE (x) != GET_MODE (y))
2570 return 0;
2572 switch (code)
2574 case PC:
2575 case CC0:
2576 case CONST_INT:
2577 return x == y;
2579 case LABEL_REF:
2580 return XEXP (x, 0) == XEXP (y, 0);
2582 case SYMBOL_REF:
2583 return XSTR (x, 0) == XSTR (y, 0);
2585 case REG:
2587 unsigned int regno = REGNO (y);
2588 unsigned int endregno
2589 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2590 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2591 unsigned int i;
2593 /* If the quantities are not the same, the expressions are not
2594 equivalent. If there are and we are not to validate, they
2595 are equivalent. Otherwise, ensure all regs are up-to-date. */
2597 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2598 return 0;
2600 if (! validate)
2601 return 1;
2603 for (i = regno; i < endregno; i++)
2604 if (REG_IN_TABLE (i) != REG_TICK (i))
2605 return 0;
2607 return 1;
2610 /* For commutative operations, check both orders. */
2611 case PLUS:
2612 case MULT:
2613 case AND:
2614 case IOR:
2615 case XOR:
2616 case NE:
2617 case EQ:
2618 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2619 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2620 validate, equal_values))
2621 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2622 validate, equal_values)
2623 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2624 validate, equal_values)));
2626 case ASM_OPERANDS:
2627 /* We don't use the generic code below because we want to
2628 disregard filename and line numbers. */
2630 /* A volatile asm isn't equivalent to any other. */
2631 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2632 return 0;
2634 if (GET_MODE (x) != GET_MODE (y)
2635 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2636 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2637 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2638 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2639 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2640 return 0;
2642 if (ASM_OPERANDS_INPUT_LENGTH (x))
2644 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2645 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2646 ASM_OPERANDS_INPUT (y, i),
2647 validate, equal_values)
2648 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2649 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2650 return 0;
2653 return 1;
2655 default:
2656 break;
2659 /* Compare the elements. If any pair of corresponding elements
2660 fail to match, return 0 for the whole things. */
2662 fmt = GET_RTX_FORMAT (code);
2663 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2665 switch (fmt[i])
2667 case 'e':
2668 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2669 return 0;
2670 break;
2672 case 'E':
2673 if (XVECLEN (x, i) != XVECLEN (y, i))
2674 return 0;
2675 for (j = 0; j < XVECLEN (x, i); j++)
2676 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2677 validate, equal_values))
2678 return 0;
2679 break;
2681 case 's':
2682 if (strcmp (XSTR (x, i), XSTR (y, i)))
2683 return 0;
2684 break;
2686 case 'i':
2687 if (XINT (x, i) != XINT (y, i))
2688 return 0;
2689 break;
2691 case 'w':
2692 if (XWINT (x, i) != XWINT (y, i))
2693 return 0;
2694 break;
2696 case '0':
2697 case 't':
2698 break;
2700 default:
2701 abort ();
2705 return 1;
2708 /* Return 1 if X has a value that can vary even between two
2709 executions of the program. 0 means X can be compared reliably
2710 against certain constants or near-constants. */
2712 static int
2713 cse_rtx_varies_p (x, from_alias)
2714 rtx x;
2715 int from_alias;
2717 /* We need not check for X and the equivalence class being of the same
2718 mode because if X is equivalent to a constant in some mode, it
2719 doesn't vary in any mode. */
2721 if (GET_CODE (x) == REG
2722 && REGNO_QTY_VALID_P (REGNO (x)))
2724 int x_q = REG_QTY (REGNO (x));
2725 struct qty_table_elem *x_ent = &qty_table[x_q];
2727 if (GET_MODE (x) == x_ent->mode
2728 && x_ent->const_rtx != NULL_RTX)
2729 return 0;
2732 if (GET_CODE (x) == PLUS
2733 && GET_CODE (XEXP (x, 1)) == CONST_INT
2734 && GET_CODE (XEXP (x, 0)) == REG
2735 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2737 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2738 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2740 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2741 && x0_ent->const_rtx != NULL_RTX)
2742 return 0;
2745 /* This can happen as the result of virtual register instantiation, if
2746 the initial constant is too large to be a valid address. This gives
2747 us a three instruction sequence, load large offset into a register,
2748 load fp minus a constant into a register, then a MEM which is the
2749 sum of the two `constant' registers. */
2750 if (GET_CODE (x) == PLUS
2751 && GET_CODE (XEXP (x, 0)) == REG
2752 && GET_CODE (XEXP (x, 1)) == REG
2753 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2754 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2756 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2757 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2758 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2759 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2761 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2762 && x0_ent->const_rtx != NULL_RTX
2763 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2764 && x1_ent->const_rtx != NULL_RTX)
2765 return 0;
2768 return rtx_varies_p (x, from_alias);
2771 /* Canonicalize an expression:
2772 replace each register reference inside it
2773 with the "oldest" equivalent register.
2775 If INSN is nonzero and we are replacing a pseudo with a hard register
2776 or vice versa, validate_change is used to ensure that INSN remains valid
2777 after we make our substitution. The calls are made with IN_GROUP nonzero
2778 so apply_change_group must be called upon the outermost return from this
2779 function (unless INSN is zero). The result of apply_change_group can
2780 generally be discarded since the changes we are making are optional. */
2782 static rtx
2783 canon_reg (x, insn)
2784 rtx x;
2785 rtx insn;
2787 int i;
2788 enum rtx_code code;
2789 const char *fmt;
2791 if (x == 0)
2792 return x;
2794 code = GET_CODE (x);
2795 switch (code)
2797 case PC:
2798 case CC0:
2799 case CONST:
2800 case CONST_INT:
2801 case CONST_DOUBLE:
2802 case CONST_VECTOR:
2803 case SYMBOL_REF:
2804 case LABEL_REF:
2805 case ADDR_VEC:
2806 case ADDR_DIFF_VEC:
2807 return x;
2809 case REG:
2811 int first;
2812 int q;
2813 struct qty_table_elem *ent;
2815 /* Never replace a hard reg, because hard regs can appear
2816 in more than one machine mode, and we must preserve the mode
2817 of each occurrence. Also, some hard regs appear in
2818 MEMs that are shared and mustn't be altered. Don't try to
2819 replace any reg that maps to a reg of class NO_REGS. */
2820 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2821 || ! REGNO_QTY_VALID_P (REGNO (x)))
2822 return x;
2824 q = REG_QTY (REGNO (x));
2825 ent = &qty_table[q];
2826 first = ent->first_reg;
2827 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2828 : REGNO_REG_CLASS (first) == NO_REGS ? x
2829 : gen_rtx_REG (ent->mode, first));
2832 default:
2833 break;
2836 fmt = GET_RTX_FORMAT (code);
2837 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2839 int j;
2841 if (fmt[i] == 'e')
2843 rtx new = canon_reg (XEXP (x, i), insn);
2844 int insn_code;
2846 /* If replacing pseudo with hard reg or vice versa, ensure the
2847 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2848 if (insn != 0 && new != 0
2849 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2850 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2851 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2852 || (insn_code = recog_memoized (insn)) < 0
2853 || insn_data[insn_code].n_dups > 0))
2854 validate_change (insn, &XEXP (x, i), new, 1);
2855 else
2856 XEXP (x, i) = new;
2858 else if (fmt[i] == 'E')
2859 for (j = 0; j < XVECLEN (x, i); j++)
2860 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2863 return x;
2866 /* LOC is a location within INSN that is an operand address (the contents of
2867 a MEM). Find the best equivalent address to use that is valid for this
2868 insn.
2870 On most CISC machines, complicated address modes are costly, and rtx_cost
2871 is a good approximation for that cost. However, most RISC machines have
2872 only a few (usually only one) memory reference formats. If an address is
2873 valid at all, it is often just as cheap as any other address. Hence, for
2874 RISC machines, we use `address_cost' to compare the costs of various
2875 addresses. For two addresses of equal cost, choose the one with the
2876 highest `rtx_cost' value as that has the potential of eliminating the
2877 most insns. For equal costs, we choose the first in the equivalence
2878 class. Note that we ignore the fact that pseudo registers are cheaper than
2879 hard registers here because we would also prefer the pseudo registers. */
2881 static void
2882 find_best_addr (insn, loc, mode)
2883 rtx insn;
2884 rtx *loc;
2885 enum machine_mode mode;
2887 struct table_elt *elt;
2888 rtx addr = *loc;
2889 struct table_elt *p;
2890 int found_better = 1;
2891 int save_do_not_record = do_not_record;
2892 int save_hash_arg_in_memory = hash_arg_in_memory;
2893 int addr_volatile;
2894 int regno;
2895 unsigned hash;
2897 /* Do not try to replace constant addresses or addresses of local and
2898 argument slots. These MEM expressions are made only once and inserted
2899 in many instructions, as well as being used to control symbol table
2900 output. It is not safe to clobber them.
2902 There are some uncommon cases where the address is already in a register
2903 for some reason, but we cannot take advantage of that because we have
2904 no easy way to unshare the MEM. In addition, looking up all stack
2905 addresses is costly. */
2906 if ((GET_CODE (addr) == PLUS
2907 && GET_CODE (XEXP (addr, 0)) == REG
2908 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2909 && (regno = REGNO (XEXP (addr, 0)),
2910 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2911 || regno == ARG_POINTER_REGNUM))
2912 || (GET_CODE (addr) == REG
2913 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2914 || regno == HARD_FRAME_POINTER_REGNUM
2915 || regno == ARG_POINTER_REGNUM))
2916 || GET_CODE (addr) == ADDRESSOF
2917 || CONSTANT_ADDRESS_P (addr))
2918 return;
2920 /* If this address is not simply a register, try to fold it. This will
2921 sometimes simplify the expression. Many simplifications
2922 will not be valid, but some, usually applying the associative rule, will
2923 be valid and produce better code. */
2924 if (GET_CODE (addr) != REG)
2926 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2927 int addr_folded_cost = address_cost (folded, mode);
2928 int addr_cost = address_cost (addr, mode);
2930 if ((addr_folded_cost < addr_cost
2931 || (addr_folded_cost == addr_cost
2932 /* ??? The rtx_cost comparison is left over from an older
2933 version of this code. It is probably no longer helpful. */
2934 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2935 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2936 && validate_change (insn, loc, folded, 0))
2937 addr = folded;
2940 /* If this address is not in the hash table, we can't look for equivalences
2941 of the whole address. Also, ignore if volatile. */
2943 do_not_record = 0;
2944 hash = HASH (addr, Pmode);
2945 addr_volatile = do_not_record;
2946 do_not_record = save_do_not_record;
2947 hash_arg_in_memory = save_hash_arg_in_memory;
2949 if (addr_volatile)
2950 return;
2952 elt = lookup (addr, hash, Pmode);
2954 if (elt)
2956 /* We need to find the best (under the criteria documented above) entry
2957 in the class that is valid. We use the `flag' field to indicate
2958 choices that were invalid and iterate until we can't find a better
2959 one that hasn't already been tried. */
2961 for (p = elt->first_same_value; p; p = p->next_same_value)
2962 p->flag = 0;
2964 while (found_better)
2966 int best_addr_cost = address_cost (*loc, mode);
2967 int best_rtx_cost = (elt->cost + 1) >> 1;
2968 int exp_cost;
2969 struct table_elt *best_elt = elt;
2971 found_better = 0;
2972 for (p = elt->first_same_value; p; p = p->next_same_value)
2973 if (! p->flag)
2975 if ((GET_CODE (p->exp) == REG
2976 || exp_equiv_p (p->exp, p->exp, 1, 0))
2977 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2978 || (exp_cost == best_addr_cost
2979 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2981 found_better = 1;
2982 best_addr_cost = exp_cost;
2983 best_rtx_cost = (p->cost + 1) >> 1;
2984 best_elt = p;
2988 if (found_better)
2990 if (validate_change (insn, loc,
2991 canon_reg (copy_rtx (best_elt->exp),
2992 NULL_RTX), 0))
2993 return;
2994 else
2995 best_elt->flag = 1;
3000 /* If the address is a binary operation with the first operand a register
3001 and the second a constant, do the same as above, but looking for
3002 equivalences of the register. Then try to simplify before checking for
3003 the best address to use. This catches a few cases: First is when we
3004 have REG+const and the register is another REG+const. We can often merge
3005 the constants and eliminate one insn and one register. It may also be
3006 that a machine has a cheap REG+REG+const. Finally, this improves the
3007 code on the Alpha for unaligned byte stores. */
3009 if (flag_expensive_optimizations
3010 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3011 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3012 && GET_CODE (XEXP (*loc, 0)) == REG)
3014 rtx op1 = XEXP (*loc, 1);
3016 do_not_record = 0;
3017 hash = HASH (XEXP (*loc, 0), Pmode);
3018 do_not_record = save_do_not_record;
3019 hash_arg_in_memory = save_hash_arg_in_memory;
3021 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3022 if (elt == 0)
3023 return;
3025 /* We need to find the best (under the criteria documented above) entry
3026 in the class that is valid. We use the `flag' field to indicate
3027 choices that were invalid and iterate until we can't find a better
3028 one that hasn't already been tried. */
3030 for (p = elt->first_same_value; p; p = p->next_same_value)
3031 p->flag = 0;
3033 while (found_better)
3035 int best_addr_cost = address_cost (*loc, mode);
3036 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3037 struct table_elt *best_elt = elt;
3038 rtx best_rtx = *loc;
3039 int count;
3041 /* This is at worst case an O(n^2) algorithm, so limit our search
3042 to the first 32 elements on the list. This avoids trouble
3043 compiling code with very long basic blocks that can easily
3044 call simplify_gen_binary so many times that we run out of
3045 memory. */
3047 found_better = 0;
3048 for (p = elt->first_same_value, count = 0;
3049 p && count < 32;
3050 p = p->next_same_value, count++)
3051 if (! p->flag
3052 && (GET_CODE (p->exp) == REG
3053 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3055 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3056 p->exp, op1);
3057 int new_cost;
3058 new_cost = address_cost (new, mode);
3060 if (new_cost < best_addr_cost
3061 || (new_cost == best_addr_cost
3062 && (COST (new) + 1) >> 1 > best_rtx_cost))
3064 found_better = 1;
3065 best_addr_cost = new_cost;
3066 best_rtx_cost = (COST (new) + 1) >> 1;
3067 best_elt = p;
3068 best_rtx = new;
3072 if (found_better)
3074 if (validate_change (insn, loc,
3075 canon_reg (copy_rtx (best_rtx),
3076 NULL_RTX), 0))
3077 return;
3078 else
3079 best_elt->flag = 1;
3085 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3086 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3087 what values are being compared.
3089 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3090 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3091 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3092 compared to produce cc0.
3094 The return value is the comparison operator and is either the code of
3095 A or the code corresponding to the inverse of the comparison. */
3097 static enum rtx_code
3098 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3099 enum rtx_code code;
3100 rtx *parg1, *parg2;
3101 enum machine_mode *pmode1, *pmode2;
3103 rtx arg1, arg2;
3105 arg1 = *parg1, arg2 = *parg2;
3107 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3109 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3111 /* Set nonzero when we find something of interest. */
3112 rtx x = 0;
3113 int reverse_code = 0;
3114 struct table_elt *p = 0;
3116 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3117 On machines with CC0, this is the only case that can occur, since
3118 fold_rtx will return the COMPARE or item being compared with zero
3119 when given CC0. */
3121 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3122 x = arg1;
3124 /* If ARG1 is a comparison operator and CODE is testing for
3125 STORE_FLAG_VALUE, get the inner arguments. */
3127 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3129 #ifdef FLOAT_STORE_FLAG_VALUE
3130 REAL_VALUE_TYPE fsfv;
3131 #endif
3133 if (code == NE
3134 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3135 && code == LT && STORE_FLAG_VALUE == -1)
3136 #ifdef FLOAT_STORE_FLAG_VALUE
3137 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3138 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3139 REAL_VALUE_NEGATIVE (fsfv)))
3140 #endif
3142 x = arg1;
3143 else if (code == EQ
3144 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3145 && code == GE && STORE_FLAG_VALUE == -1)
3146 #ifdef FLOAT_STORE_FLAG_VALUE
3147 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3148 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3149 REAL_VALUE_NEGATIVE (fsfv)))
3150 #endif
3152 x = arg1, reverse_code = 1;
3155 /* ??? We could also check for
3157 (ne (and (eq (...) (const_int 1))) (const_int 0))
3159 and related forms, but let's wait until we see them occurring. */
3161 if (x == 0)
3162 /* Look up ARG1 in the hash table and see if it has an equivalence
3163 that lets us see what is being compared. */
3164 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3165 GET_MODE (arg1));
3166 if (p)
3168 p = p->first_same_value;
3170 /* If what we compare is already known to be constant, that is as
3171 good as it gets.
3172 We need to break the loop in this case, because otherwise we
3173 can have an infinite loop when looking at a reg that is known
3174 to be a constant which is the same as a comparison of a reg
3175 against zero which appears later in the insn stream, which in
3176 turn is constant and the same as the comparison of the first reg
3177 against zero... */
3178 if (p->is_const)
3179 break;
3182 for (; p; p = p->next_same_value)
3184 enum machine_mode inner_mode = GET_MODE (p->exp);
3185 #ifdef FLOAT_STORE_FLAG_VALUE
3186 REAL_VALUE_TYPE fsfv;
3187 #endif
3189 /* If the entry isn't valid, skip it. */
3190 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3191 continue;
3193 if (GET_CODE (p->exp) == COMPARE
3194 /* Another possibility is that this machine has a compare insn
3195 that includes the comparison code. In that case, ARG1 would
3196 be equivalent to a comparison operation that would set ARG1 to
3197 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3198 ORIG_CODE is the actual comparison being done; if it is an EQ,
3199 we must reverse ORIG_CODE. On machine with a negative value
3200 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3201 || ((code == NE
3202 || (code == LT
3203 && GET_MODE_CLASS (inner_mode) == MODE_INT
3204 && (GET_MODE_BITSIZE (inner_mode)
3205 <= HOST_BITS_PER_WIDE_INT)
3206 && (STORE_FLAG_VALUE
3207 & ((HOST_WIDE_INT) 1
3208 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3209 #ifdef FLOAT_STORE_FLAG_VALUE
3210 || (code == LT
3211 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3212 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3213 REAL_VALUE_NEGATIVE (fsfv)))
3214 #endif
3216 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3218 x = p->exp;
3219 break;
3221 else if ((code == EQ
3222 || (code == GE
3223 && GET_MODE_CLASS (inner_mode) == MODE_INT
3224 && (GET_MODE_BITSIZE (inner_mode)
3225 <= HOST_BITS_PER_WIDE_INT)
3226 && (STORE_FLAG_VALUE
3227 & ((HOST_WIDE_INT) 1
3228 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3229 #ifdef FLOAT_STORE_FLAG_VALUE
3230 || (code == GE
3231 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3232 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3233 REAL_VALUE_NEGATIVE (fsfv)))
3234 #endif
3236 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3238 reverse_code = 1;
3239 x = p->exp;
3240 break;
3243 /* If this non-trapping address, e.g. fp + constant, the
3244 equivalent is a better operand since it may let us predict
3245 the value of the comparison. */
3246 else if (!rtx_addr_can_trap_p (p->exp))
3248 arg1 = p->exp;
3249 continue;
3253 /* If we didn't find a useful equivalence for ARG1, we are done.
3254 Otherwise, set up for the next iteration. */
3255 if (x == 0)
3256 break;
3258 /* If we need to reverse the comparison, make sure that that is
3259 possible -- we can't necessarily infer the value of GE from LT
3260 with floating-point operands. */
3261 if (reverse_code)
3263 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3264 if (reversed == UNKNOWN)
3265 break;
3266 else
3267 code = reversed;
3269 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3270 code = GET_CODE (x);
3271 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3274 /* Return our results. Return the modes from before fold_rtx
3275 because fold_rtx might produce const_int, and then it's too late. */
3276 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3277 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3279 return code;
3282 /* If X is a nontrivial arithmetic operation on an argument
3283 for which a constant value can be determined, return
3284 the result of operating on that value, as a constant.
3285 Otherwise, return X, possibly with one or more operands
3286 modified by recursive calls to this function.
3288 If X is a register whose contents are known, we do NOT
3289 return those contents here. equiv_constant is called to
3290 perform that task.
3292 INSN is the insn that we may be modifying. If it is 0, make a copy
3293 of X before modifying it. */
3295 static rtx
3296 fold_rtx (x, insn)
3297 rtx x;
3298 rtx insn;
3300 enum rtx_code code;
3301 enum machine_mode mode;
3302 const char *fmt;
3303 int i;
3304 rtx new = 0;
3305 int copied = 0;
3306 int must_swap = 0;
3308 /* Folded equivalents of first two operands of X. */
3309 rtx folded_arg0;
3310 rtx folded_arg1;
3312 /* Constant equivalents of first three operands of X;
3313 0 when no such equivalent is known. */
3314 rtx const_arg0;
3315 rtx const_arg1;
3316 rtx const_arg2;
3318 /* The mode of the first operand of X. We need this for sign and zero
3319 extends. */
3320 enum machine_mode mode_arg0;
3322 if (x == 0)
3323 return x;
3325 mode = GET_MODE (x);
3326 code = GET_CODE (x);
3327 switch (code)
3329 case CONST:
3330 case CONST_INT:
3331 case CONST_DOUBLE:
3332 case CONST_VECTOR:
3333 case SYMBOL_REF:
3334 case LABEL_REF:
3335 case REG:
3336 /* No use simplifying an EXPR_LIST
3337 since they are used only for lists of args
3338 in a function call's REG_EQUAL note. */
3339 case EXPR_LIST:
3340 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3341 want to (e.g.,) make (addressof (const_int 0)) just because
3342 the location is known to be zero. */
3343 case ADDRESSOF:
3344 return x;
3346 #ifdef HAVE_cc0
3347 case CC0:
3348 return prev_insn_cc0;
3349 #endif
3351 case PC:
3352 /* If the next insn is a CODE_LABEL followed by a jump table,
3353 PC's value is a LABEL_REF pointing to that label. That
3354 lets us fold switch statements on the VAX. */
3356 rtx next;
3357 if (insn && tablejump_p (insn, &next, NULL))
3358 return gen_rtx_LABEL_REF (Pmode, next);
3360 break;
3362 case SUBREG:
3363 /* See if we previously assigned a constant value to this SUBREG. */
3364 if ((new = lookup_as_function (x, CONST_INT)) != 0
3365 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3366 return new;
3368 /* If this is a paradoxical SUBREG, we have no idea what value the
3369 extra bits would have. However, if the operand is equivalent
3370 to a SUBREG whose operand is the same as our mode, and all the
3371 modes are within a word, we can just use the inner operand
3372 because these SUBREGs just say how to treat the register.
3374 Similarly if we find an integer constant. */
3376 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3378 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3379 struct table_elt *elt;
3381 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3382 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3383 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3384 imode)) != 0)
3385 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3387 if (CONSTANT_P (elt->exp)
3388 && GET_MODE (elt->exp) == VOIDmode)
3389 return elt->exp;
3391 if (GET_CODE (elt->exp) == SUBREG
3392 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3393 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3394 return copy_rtx (SUBREG_REG (elt->exp));
3397 return x;
3400 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3401 We might be able to if the SUBREG is extracting a single word in an
3402 integral mode or extracting the low part. */
3404 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3405 const_arg0 = equiv_constant (folded_arg0);
3406 if (const_arg0)
3407 folded_arg0 = const_arg0;
3409 if (folded_arg0 != SUBREG_REG (x))
3411 new = simplify_subreg (mode, folded_arg0,
3412 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3413 if (new)
3414 return new;
3417 /* If this is a narrowing SUBREG and our operand is a REG, see if
3418 we can find an equivalence for REG that is an arithmetic operation
3419 in a wider mode where both operands are paradoxical SUBREGs
3420 from objects of our result mode. In that case, we couldn't report
3421 an equivalent value for that operation, since we don't know what the
3422 extra bits will be. But we can find an equivalence for this SUBREG
3423 by folding that operation is the narrow mode. This allows us to
3424 fold arithmetic in narrow modes when the machine only supports
3425 word-sized arithmetic.
3427 Also look for a case where we have a SUBREG whose operand is the
3428 same as our result. If both modes are smaller than a word, we
3429 are simply interpreting a register in different modes and we
3430 can use the inner value. */
3432 if (GET_CODE (folded_arg0) == REG
3433 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3434 && subreg_lowpart_p (x))
3436 struct table_elt *elt;
3438 /* We can use HASH here since we know that canon_hash won't be
3439 called. */
3440 elt = lookup (folded_arg0,
3441 HASH (folded_arg0, GET_MODE (folded_arg0)),
3442 GET_MODE (folded_arg0));
3444 if (elt)
3445 elt = elt->first_same_value;
3447 for (; elt; elt = elt->next_same_value)
3449 enum rtx_code eltcode = GET_CODE (elt->exp);
3451 /* Just check for unary and binary operations. */
3452 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3453 && GET_CODE (elt->exp) != SIGN_EXTEND
3454 && GET_CODE (elt->exp) != ZERO_EXTEND
3455 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3456 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3457 && (GET_MODE_CLASS (mode)
3458 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3460 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3462 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3463 op0 = fold_rtx (op0, NULL_RTX);
3465 op0 = equiv_constant (op0);
3466 if (op0)
3467 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3468 op0, mode);
3470 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3471 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3472 && eltcode != DIV && eltcode != MOD
3473 && eltcode != UDIV && eltcode != UMOD
3474 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3475 && eltcode != ROTATE && eltcode != ROTATERT
3476 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3477 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3478 == mode))
3479 || CONSTANT_P (XEXP (elt->exp, 0)))
3480 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3481 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3482 == mode))
3483 || CONSTANT_P (XEXP (elt->exp, 1))))
3485 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3486 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3488 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3489 op0 = fold_rtx (op0, NULL_RTX);
3491 if (op0)
3492 op0 = equiv_constant (op0);
3494 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3495 op1 = fold_rtx (op1, NULL_RTX);
3497 if (op1)
3498 op1 = equiv_constant (op1);
3500 /* If we are looking for the low SImode part of
3501 (ashift:DI c (const_int 32)), it doesn't work
3502 to compute that in SImode, because a 32-bit shift
3503 in SImode is unpredictable. We know the value is 0. */
3504 if (op0 && op1
3505 && GET_CODE (elt->exp) == ASHIFT
3506 && GET_CODE (op1) == CONST_INT
3507 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3509 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3511 /* If the count fits in the inner mode's width,
3512 but exceeds the outer mode's width,
3513 the value will get truncated to 0
3514 by the subreg. */
3515 new = const0_rtx;
3516 else
3517 /* If the count exceeds even the inner mode's width,
3518 don't fold this expression. */
3519 new = 0;
3521 else if (op0 && op1)
3522 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3523 op0, op1);
3526 else if (GET_CODE (elt->exp) == SUBREG
3527 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3528 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3529 <= UNITS_PER_WORD)
3530 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3531 new = copy_rtx (SUBREG_REG (elt->exp));
3533 if (new)
3534 return new;
3538 return x;
3540 case NOT:
3541 case NEG:
3542 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3543 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3544 new = lookup_as_function (XEXP (x, 0), code);
3545 if (new)
3546 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3547 break;
3549 case MEM:
3550 /* If we are not actually processing an insn, don't try to find the
3551 best address. Not only don't we care, but we could modify the
3552 MEM in an invalid way since we have no insn to validate against. */
3553 if (insn != 0)
3554 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3557 /* Even if we don't fold in the insn itself,
3558 we can safely do so here, in hopes of getting a constant. */
3559 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3560 rtx base = 0;
3561 HOST_WIDE_INT offset = 0;
3563 if (GET_CODE (addr) == REG
3564 && REGNO_QTY_VALID_P (REGNO (addr)))
3566 int addr_q = REG_QTY (REGNO (addr));
3567 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3569 if (GET_MODE (addr) == addr_ent->mode
3570 && addr_ent->const_rtx != NULL_RTX)
3571 addr = addr_ent->const_rtx;
3574 /* If address is constant, split it into a base and integer offset. */
3575 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3576 base = addr;
3577 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3578 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3580 base = XEXP (XEXP (addr, 0), 0);
3581 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3583 else if (GET_CODE (addr) == LO_SUM
3584 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3585 base = XEXP (addr, 1);
3586 else if (GET_CODE (addr) == ADDRESSOF)
3587 return change_address (x, VOIDmode, addr);
3589 /* If this is a constant pool reference, we can fold it into its
3590 constant to allow better value tracking. */
3591 if (base && GET_CODE (base) == SYMBOL_REF
3592 && CONSTANT_POOL_ADDRESS_P (base))
3594 rtx constant = get_pool_constant (base);
3595 enum machine_mode const_mode = get_pool_mode (base);
3596 rtx new;
3598 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3599 constant_pool_entries_cost = COST (constant);
3601 /* If we are loading the full constant, we have an equivalence. */
3602 if (offset == 0 && mode == const_mode)
3603 return constant;
3605 /* If this actually isn't a constant (weird!), we can't do
3606 anything. Otherwise, handle the two most common cases:
3607 extracting a word from a multi-word constant, and extracting
3608 the low-order bits. Other cases don't seem common enough to
3609 worry about. */
3610 if (! CONSTANT_P (constant))
3611 return x;
3613 if (GET_MODE_CLASS (mode) == MODE_INT
3614 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3615 && offset % UNITS_PER_WORD == 0
3616 && (new = operand_subword (constant,
3617 offset / UNITS_PER_WORD,
3618 0, const_mode)) != 0)
3619 return new;
3621 if (((BYTES_BIG_ENDIAN
3622 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3623 || (! BYTES_BIG_ENDIAN && offset == 0))
3624 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3625 return new;
3628 /* If this is a reference to a label at a known position in a jump
3629 table, we also know its value. */
3630 if (base && GET_CODE (base) == LABEL_REF)
3632 rtx label = XEXP (base, 0);
3633 rtx table_insn = NEXT_INSN (label);
3635 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3636 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3638 rtx table = PATTERN (table_insn);
3640 if (offset >= 0
3641 && (offset / GET_MODE_SIZE (GET_MODE (table))
3642 < XVECLEN (table, 0)))
3643 return XVECEXP (table, 0,
3644 offset / GET_MODE_SIZE (GET_MODE (table)));
3646 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3647 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3649 rtx table = PATTERN (table_insn);
3651 if (offset >= 0
3652 && (offset / GET_MODE_SIZE (GET_MODE (table))
3653 < XVECLEN (table, 1)))
3655 offset /= GET_MODE_SIZE (GET_MODE (table));
3656 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3657 XEXP (table, 0));
3659 if (GET_MODE (table) != Pmode)
3660 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3662 /* Indicate this is a constant. This isn't a
3663 valid form of CONST, but it will only be used
3664 to fold the next insns and then discarded, so
3665 it should be safe.
3667 Note this expression must be explicitly discarded,
3668 by cse_insn, else it may end up in a REG_EQUAL note
3669 and "escape" to cause problems elsewhere. */
3670 return gen_rtx_CONST (GET_MODE (new), new);
3675 return x;
3678 #ifdef NO_FUNCTION_CSE
3679 case CALL:
3680 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3681 return x;
3682 break;
3683 #endif
3685 case ASM_OPERANDS:
3686 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3687 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3688 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3689 break;
3691 default:
3692 break;
3695 const_arg0 = 0;
3696 const_arg1 = 0;
3697 const_arg2 = 0;
3698 mode_arg0 = VOIDmode;
3700 /* Try folding our operands.
3701 Then see which ones have constant values known. */
3703 fmt = GET_RTX_FORMAT (code);
3704 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3705 if (fmt[i] == 'e')
3707 rtx arg = XEXP (x, i);
3708 rtx folded_arg = arg, const_arg = 0;
3709 enum machine_mode mode_arg = GET_MODE (arg);
3710 rtx cheap_arg, expensive_arg;
3711 rtx replacements[2];
3712 int j;
3713 int old_cost = COST_IN (XEXP (x, i), code);
3715 /* Most arguments are cheap, so handle them specially. */
3716 switch (GET_CODE (arg))
3718 case REG:
3719 /* This is the same as calling equiv_constant; it is duplicated
3720 here for speed. */
3721 if (REGNO_QTY_VALID_P (REGNO (arg)))
3723 int arg_q = REG_QTY (REGNO (arg));
3724 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3726 if (arg_ent->const_rtx != NULL_RTX
3727 && GET_CODE (arg_ent->const_rtx) != REG
3728 && GET_CODE (arg_ent->const_rtx) != PLUS)
3729 const_arg
3730 = gen_lowpart_if_possible (GET_MODE (arg),
3731 arg_ent->const_rtx);
3733 break;
3735 case CONST:
3736 case CONST_INT:
3737 case SYMBOL_REF:
3738 case LABEL_REF:
3739 case CONST_DOUBLE:
3740 case CONST_VECTOR:
3741 const_arg = arg;
3742 break;
3744 #ifdef HAVE_cc0
3745 case CC0:
3746 folded_arg = prev_insn_cc0;
3747 mode_arg = prev_insn_cc0_mode;
3748 const_arg = equiv_constant (folded_arg);
3749 break;
3750 #endif
3752 default:
3753 folded_arg = fold_rtx (arg, insn);
3754 const_arg = equiv_constant (folded_arg);
3757 /* For the first three operands, see if the operand
3758 is constant or equivalent to a constant. */
3759 switch (i)
3761 case 0:
3762 folded_arg0 = folded_arg;
3763 const_arg0 = const_arg;
3764 mode_arg0 = mode_arg;
3765 break;
3766 case 1:
3767 folded_arg1 = folded_arg;
3768 const_arg1 = const_arg;
3769 break;
3770 case 2:
3771 const_arg2 = const_arg;
3772 break;
3775 /* Pick the least expensive of the folded argument and an
3776 equivalent constant argument. */
3777 if (const_arg == 0 || const_arg == folded_arg
3778 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3779 cheap_arg = folded_arg, expensive_arg = const_arg;
3780 else
3781 cheap_arg = const_arg, expensive_arg = folded_arg;
3783 /* Try to replace the operand with the cheapest of the two
3784 possibilities. If it doesn't work and this is either of the first
3785 two operands of a commutative operation, try swapping them.
3786 If THAT fails, try the more expensive, provided it is cheaper
3787 than what is already there. */
3789 if (cheap_arg == XEXP (x, i))
3790 continue;
3792 if (insn == 0 && ! copied)
3794 x = copy_rtx (x);
3795 copied = 1;
3798 /* Order the replacements from cheapest to most expensive. */
3799 replacements[0] = cheap_arg;
3800 replacements[1] = expensive_arg;
3802 for (j = 0; j < 2 && replacements[j]; j++)
3804 int new_cost = COST_IN (replacements[j], code);
3806 /* Stop if what existed before was cheaper. Prefer constants
3807 in the case of a tie. */
3808 if (new_cost > old_cost
3809 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3810 break;
3812 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3813 break;
3815 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3816 || code == LTGT || code == UNEQ || code == ORDERED
3817 || code == UNORDERED)
3819 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3820 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3822 if (apply_change_group ())
3824 /* Swap them back to be invalid so that this loop can
3825 continue and flag them to be swapped back later. */
3826 rtx tem;
3828 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3829 XEXP (x, 1) = tem;
3830 must_swap = 1;
3831 break;
3837 else
3839 if (fmt[i] == 'E')
3840 /* Don't try to fold inside of a vector of expressions.
3841 Doing nothing is harmless. */
3845 /* If a commutative operation, place a constant integer as the second
3846 operand unless the first operand is also a constant integer. Otherwise,
3847 place any constant second unless the first operand is also a constant. */
3849 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3850 || code == LTGT || code == UNEQ || code == ORDERED
3851 || code == UNORDERED)
3853 if (must_swap || (const_arg0
3854 && (const_arg1 == 0
3855 || (GET_CODE (const_arg0) == CONST_INT
3856 && GET_CODE (const_arg1) != CONST_INT))))
3858 rtx tem = XEXP (x, 0);
3860 if (insn == 0 && ! copied)
3862 x = copy_rtx (x);
3863 copied = 1;
3866 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3867 validate_change (insn, &XEXP (x, 1), tem, 1);
3868 if (apply_change_group ())
3870 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3871 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3876 /* If X is an arithmetic operation, see if we can simplify it. */
3878 switch (GET_RTX_CLASS (code))
3880 case '1':
3882 int is_const = 0;
3884 /* We can't simplify extension ops unless we know the
3885 original mode. */
3886 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3887 && mode_arg0 == VOIDmode)
3888 break;
3890 /* If we had a CONST, strip it off and put it back later if we
3891 fold. */
3892 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3893 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3895 new = simplify_unary_operation (code, mode,
3896 const_arg0 ? const_arg0 : folded_arg0,
3897 mode_arg0);
3898 if (new != 0 && is_const)
3899 new = gen_rtx_CONST (mode, new);
3901 break;
3903 case '<':
3904 /* See what items are actually being compared and set FOLDED_ARG[01]
3905 to those values and CODE to the actual comparison code. If any are
3906 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3907 do anything if both operands are already known to be constant. */
3909 if (const_arg0 == 0 || const_arg1 == 0)
3911 struct table_elt *p0, *p1;
3912 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3913 enum machine_mode mode_arg1;
3915 #ifdef FLOAT_STORE_FLAG_VALUE
3916 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3918 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3919 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3920 false_rtx = CONST0_RTX (mode);
3922 #endif
3924 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3925 &mode_arg0, &mode_arg1);
3926 const_arg0 = equiv_constant (folded_arg0);
3927 const_arg1 = equiv_constant (folded_arg1);
3929 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3930 what kinds of things are being compared, so we can't do
3931 anything with this comparison. */
3933 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3934 break;
3936 /* If we do not now have two constants being compared, see
3937 if we can nevertheless deduce some things about the
3938 comparison. */
3939 if (const_arg0 == 0 || const_arg1 == 0)
3941 /* Some addresses are known to be nonzero. We don't know
3942 their sign, but equality comparisons are known. */
3943 if (const_arg1 == const0_rtx
3944 && nonzero_address_p (folded_arg0))
3946 if (code == EQ)
3947 return false_rtx;
3948 else if (code == NE)
3949 return true_rtx;
3952 /* See if the two operands are the same. */
3954 if (folded_arg0 == folded_arg1
3955 || (GET_CODE (folded_arg0) == REG
3956 && GET_CODE (folded_arg1) == REG
3957 && (REG_QTY (REGNO (folded_arg0))
3958 == REG_QTY (REGNO (folded_arg1))))
3959 || ((p0 = lookup (folded_arg0,
3960 (safe_hash (folded_arg0, mode_arg0)
3961 & HASH_MASK), mode_arg0))
3962 && (p1 = lookup (folded_arg1,
3963 (safe_hash (folded_arg1, mode_arg0)
3964 & HASH_MASK), mode_arg0))
3965 && p0->first_same_value == p1->first_same_value))
3967 /* Sadly two equal NaNs are not equivalent. */
3968 if (!HONOR_NANS (mode_arg0))
3969 return ((code == EQ || code == LE || code == GE
3970 || code == LEU || code == GEU || code == UNEQ
3971 || code == UNLE || code == UNGE
3972 || code == ORDERED)
3973 ? true_rtx : false_rtx);
3974 /* Take care for the FP compares we can resolve. */
3975 if (code == UNEQ || code == UNLE || code == UNGE)
3976 return true_rtx;
3977 if (code == LTGT || code == LT || code == GT)
3978 return false_rtx;
3981 /* If FOLDED_ARG0 is a register, see if the comparison we are
3982 doing now is either the same as we did before or the reverse
3983 (we only check the reverse if not floating-point). */
3984 else if (GET_CODE (folded_arg0) == REG)
3986 int qty = REG_QTY (REGNO (folded_arg0));
3988 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3990 struct qty_table_elem *ent = &qty_table[qty];
3992 if ((comparison_dominates_p (ent->comparison_code, code)
3993 || (! FLOAT_MODE_P (mode_arg0)
3994 && comparison_dominates_p (ent->comparison_code,
3995 reverse_condition (code))))
3996 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3997 || (const_arg1
3998 && rtx_equal_p (ent->comparison_const,
3999 const_arg1))
4000 || (GET_CODE (folded_arg1) == REG
4001 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4002 return (comparison_dominates_p (ent->comparison_code, code)
4003 ? true_rtx : false_rtx);
4009 /* If we are comparing against zero, see if the first operand is
4010 equivalent to an IOR with a constant. If so, we may be able to
4011 determine the result of this comparison. */
4013 if (const_arg1 == const0_rtx)
4015 rtx y = lookup_as_function (folded_arg0, IOR);
4016 rtx inner_const;
4018 if (y != 0
4019 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4020 && GET_CODE (inner_const) == CONST_INT
4021 && INTVAL (inner_const) != 0)
4023 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4024 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4025 && (INTVAL (inner_const)
4026 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4027 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4029 #ifdef FLOAT_STORE_FLAG_VALUE
4030 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4032 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4033 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4034 false_rtx = CONST0_RTX (mode);
4036 #endif
4038 switch (code)
4040 case EQ:
4041 return false_rtx;
4042 case NE:
4043 return true_rtx;
4044 case LT: case LE:
4045 if (has_sign)
4046 return true_rtx;
4047 break;
4048 case GT: case GE:
4049 if (has_sign)
4050 return false_rtx;
4051 break;
4052 default:
4053 break;
4058 new = simplify_relational_operation (code,
4059 (mode_arg0 != VOIDmode
4060 ? mode_arg0
4061 : (GET_MODE (const_arg0
4062 ? const_arg0
4063 : folded_arg0)
4064 != VOIDmode)
4065 ? GET_MODE (const_arg0
4066 ? const_arg0
4067 : folded_arg0)
4068 : GET_MODE (const_arg1
4069 ? const_arg1
4070 : folded_arg1)),
4071 const_arg0 ? const_arg0 : folded_arg0,
4072 const_arg1 ? const_arg1 : folded_arg1);
4073 #ifdef FLOAT_STORE_FLAG_VALUE
4074 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4076 if (new == const0_rtx)
4077 new = CONST0_RTX (mode);
4078 else
4079 new = (CONST_DOUBLE_FROM_REAL_VALUE
4080 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4082 #endif
4083 break;
4085 case '2':
4086 case 'c':
4087 switch (code)
4089 case PLUS:
4090 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4091 with that LABEL_REF as its second operand. If so, the result is
4092 the first operand of that MINUS. This handles switches with an
4093 ADDR_DIFF_VEC table. */
4094 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4096 rtx y
4097 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4098 : lookup_as_function (folded_arg0, MINUS);
4100 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4101 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4102 return XEXP (y, 0);
4104 /* Now try for a CONST of a MINUS like the above. */
4105 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4106 : lookup_as_function (folded_arg0, CONST))) != 0
4107 && GET_CODE (XEXP (y, 0)) == MINUS
4108 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4109 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4110 return XEXP (XEXP (y, 0), 0);
4113 /* Likewise if the operands are in the other order. */
4114 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4116 rtx y
4117 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4118 : lookup_as_function (folded_arg1, MINUS);
4120 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4121 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4122 return XEXP (y, 0);
4124 /* Now try for a CONST of a MINUS like the above. */
4125 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4126 : lookup_as_function (folded_arg1, CONST))) != 0
4127 && GET_CODE (XEXP (y, 0)) == MINUS
4128 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4129 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4130 return XEXP (XEXP (y, 0), 0);
4133 /* If second operand is a register equivalent to a negative
4134 CONST_INT, see if we can find a register equivalent to the
4135 positive constant. Make a MINUS if so. Don't do this for
4136 a non-negative constant since we might then alternate between
4137 choosing positive and negative constants. Having the positive
4138 constant previously-used is the more common case. Be sure
4139 the resulting constant is non-negative; if const_arg1 were
4140 the smallest negative number this would overflow: depending
4141 on the mode, this would either just be the same value (and
4142 hence not save anything) or be incorrect. */
4143 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4144 && INTVAL (const_arg1) < 0
4145 /* This used to test
4147 -INTVAL (const_arg1) >= 0
4149 But The Sun V5.0 compilers mis-compiled that test. So
4150 instead we test for the problematic value in a more direct
4151 manner and hope the Sun compilers get it correct. */
4152 && INTVAL (const_arg1) !=
4153 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4154 && GET_CODE (folded_arg1) == REG)
4156 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4157 struct table_elt *p
4158 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4159 mode);
4161 if (p)
4162 for (p = p->first_same_value; p; p = p->next_same_value)
4163 if (GET_CODE (p->exp) == REG)
4164 return simplify_gen_binary (MINUS, mode, folded_arg0,
4165 canon_reg (p->exp, NULL_RTX));
4167 goto from_plus;
4169 case MINUS:
4170 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4171 If so, produce (PLUS Z C2-C). */
4172 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4174 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4175 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4176 return fold_rtx (plus_constant (copy_rtx (y),
4177 -INTVAL (const_arg1)),
4178 NULL_RTX);
4181 /* Fall through. */
4183 from_plus:
4184 case SMIN: case SMAX: case UMIN: case UMAX:
4185 case IOR: case AND: case XOR:
4186 case MULT:
4187 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4188 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4189 is known to be of similar form, we may be able to replace the
4190 operation with a combined operation. This may eliminate the
4191 intermediate operation if every use is simplified in this way.
4192 Note that the similar optimization done by combine.c only works
4193 if the intermediate operation's result has only one reference. */
4195 if (GET_CODE (folded_arg0) == REG
4196 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4198 int is_shift
4199 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4200 rtx y = lookup_as_function (folded_arg0, code);
4201 rtx inner_const;
4202 enum rtx_code associate_code;
4203 rtx new_const;
4205 if (y == 0
4206 || 0 == (inner_const
4207 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4208 || GET_CODE (inner_const) != CONST_INT
4209 /* If we have compiled a statement like
4210 "if (x == (x & mask1))", and now are looking at
4211 "x & mask2", we will have a case where the first operand
4212 of Y is the same as our first operand. Unless we detect
4213 this case, an infinite loop will result. */
4214 || XEXP (y, 0) == folded_arg0)
4215 break;
4217 /* Don't associate these operations if they are a PLUS with the
4218 same constant and it is a power of two. These might be doable
4219 with a pre- or post-increment. Similarly for two subtracts of
4220 identical powers of two with post decrement. */
4222 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4223 && ((HAVE_PRE_INCREMENT
4224 && exact_log2 (INTVAL (const_arg1)) >= 0)
4225 || (HAVE_POST_INCREMENT
4226 && exact_log2 (INTVAL (const_arg1)) >= 0)
4227 || (HAVE_PRE_DECREMENT
4228 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4229 || (HAVE_POST_DECREMENT
4230 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4231 break;
4233 /* Compute the code used to compose the constants. For example,
4234 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4236 associate_code = (is_shift || code == MINUS ? PLUS : code);
4238 new_const = simplify_binary_operation (associate_code, mode,
4239 const_arg1, inner_const);
4241 if (new_const == 0)
4242 break;
4244 /* If we are associating shift operations, don't let this
4245 produce a shift of the size of the object or larger.
4246 This could occur when we follow a sign-extend by a right
4247 shift on a machine that does a sign-extend as a pair
4248 of shifts. */
4250 if (is_shift && GET_CODE (new_const) == CONST_INT
4251 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4253 /* As an exception, we can turn an ASHIFTRT of this
4254 form into a shift of the number of bits - 1. */
4255 if (code == ASHIFTRT)
4256 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4257 else
4258 break;
4261 y = copy_rtx (XEXP (y, 0));
4263 /* If Y contains our first operand (the most common way this
4264 can happen is if Y is a MEM), we would do into an infinite
4265 loop if we tried to fold it. So don't in that case. */
4267 if (! reg_mentioned_p (folded_arg0, y))
4268 y = fold_rtx (y, insn);
4270 return simplify_gen_binary (code, mode, y, new_const);
4272 break;
4274 case DIV: case UDIV:
4275 /* ??? The associative optimization performed immediately above is
4276 also possible for DIV and UDIV using associate_code of MULT.
4277 However, we would need extra code to verify that the
4278 multiplication does not overflow, that is, there is no overflow
4279 in the calculation of new_const. */
4280 break;
4282 default:
4283 break;
4286 new = simplify_binary_operation (code, mode,
4287 const_arg0 ? const_arg0 : folded_arg0,
4288 const_arg1 ? const_arg1 : folded_arg1);
4289 break;
4291 case 'o':
4292 /* (lo_sum (high X) X) is simply X. */
4293 if (code == LO_SUM && const_arg0 != 0
4294 && GET_CODE (const_arg0) == HIGH
4295 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4296 return const_arg1;
4297 break;
4299 case '3':
4300 case 'b':
4301 new = simplify_ternary_operation (code, mode, mode_arg0,
4302 const_arg0 ? const_arg0 : folded_arg0,
4303 const_arg1 ? const_arg1 : folded_arg1,
4304 const_arg2 ? const_arg2 : XEXP (x, 2));
4305 break;
4307 case 'x':
4308 /* Eliminate CONSTANT_P_RTX if its constant. */
4309 if (code == CONSTANT_P_RTX)
4311 if (const_arg0)
4312 return const1_rtx;
4313 if (optimize == 0 || !flag_gcse)
4314 return const0_rtx;
4316 break;
4319 return new ? new : x;
4322 /* Return a constant value currently equivalent to X.
4323 Return 0 if we don't know one. */
4325 static rtx
4326 equiv_constant (x)
4327 rtx x;
4329 if (GET_CODE (x) == REG
4330 && REGNO_QTY_VALID_P (REGNO (x)))
4332 int x_q = REG_QTY (REGNO (x));
4333 struct qty_table_elem *x_ent = &qty_table[x_q];
4335 if (x_ent->const_rtx)
4336 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4339 if (x == 0 || CONSTANT_P (x))
4340 return x;
4342 /* If X is a MEM, try to fold it outside the context of any insn to see if
4343 it might be equivalent to a constant. That handles the case where it
4344 is a constant-pool reference. Then try to look it up in the hash table
4345 in case it is something whose value we have seen before. */
4347 if (GET_CODE (x) == MEM)
4349 struct table_elt *elt;
4351 x = fold_rtx (x, NULL_RTX);
4352 if (CONSTANT_P (x))
4353 return x;
4355 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4356 if (elt == 0)
4357 return 0;
4359 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4360 if (elt->is_const && CONSTANT_P (elt->exp))
4361 return elt->exp;
4364 return 0;
4367 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4368 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4369 least-significant part of X.
4370 MODE specifies how big a part of X to return.
4372 If the requested operation cannot be done, 0 is returned.
4374 This is similar to gen_lowpart in emit-rtl.c. */
4377 gen_lowpart_if_possible (mode, x)
4378 enum machine_mode mode;
4379 rtx x;
4381 rtx result = gen_lowpart_common (mode, x);
4383 if (result)
4384 return result;
4385 else if (GET_CODE (x) == MEM)
4387 /* This is the only other case we handle. */
4388 int offset = 0;
4389 rtx new;
4391 if (WORDS_BIG_ENDIAN)
4392 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4393 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4394 if (BYTES_BIG_ENDIAN)
4395 /* Adjust the address so that the address-after-the-data is
4396 unchanged. */
4397 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4398 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4400 new = adjust_address_nv (x, mode, offset);
4401 if (! memory_address_p (mode, XEXP (new, 0)))
4402 return 0;
4404 return new;
4406 else
4407 return 0;
4410 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4411 branch. It will be zero if not.
4413 In certain cases, this can cause us to add an equivalence. For example,
4414 if we are following the taken case of
4415 if (i == 2)
4416 we can add the fact that `i' and '2' are now equivalent.
4418 In any case, we can record that this comparison was passed. If the same
4419 comparison is seen later, we will know its value. */
4421 static void
4422 record_jump_equiv (insn, taken)
4423 rtx insn;
4424 int taken;
4426 int cond_known_true;
4427 rtx op0, op1;
4428 rtx set;
4429 enum machine_mode mode, mode0, mode1;
4430 int reversed_nonequality = 0;
4431 enum rtx_code code;
4433 /* Ensure this is the right kind of insn. */
4434 if (! any_condjump_p (insn))
4435 return;
4436 set = pc_set (insn);
4438 /* See if this jump condition is known true or false. */
4439 if (taken)
4440 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4441 else
4442 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4444 /* Get the type of comparison being done and the operands being compared.
4445 If we had to reverse a non-equality condition, record that fact so we
4446 know that it isn't valid for floating-point. */
4447 code = GET_CODE (XEXP (SET_SRC (set), 0));
4448 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4449 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4451 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4452 if (! cond_known_true)
4454 code = reversed_comparison_code_parts (code, op0, op1, insn);
4456 /* Don't remember if we can't find the inverse. */
4457 if (code == UNKNOWN)
4458 return;
4461 /* The mode is the mode of the non-constant. */
4462 mode = mode0;
4463 if (mode1 != VOIDmode)
4464 mode = mode1;
4466 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4469 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4470 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4471 Make any useful entries we can with that information. Called from
4472 above function and called recursively. */
4474 static void
4475 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4476 enum rtx_code code;
4477 enum machine_mode mode;
4478 rtx op0, op1;
4479 int reversed_nonequality;
4481 unsigned op0_hash, op1_hash;
4482 int op0_in_memory, op1_in_memory;
4483 struct table_elt *op0_elt, *op1_elt;
4485 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4486 we know that they are also equal in the smaller mode (this is also
4487 true for all smaller modes whether or not there is a SUBREG, but
4488 is not worth testing for with no SUBREG). */
4490 /* Note that GET_MODE (op0) may not equal MODE. */
4491 if (code == EQ && GET_CODE (op0) == SUBREG
4492 && (GET_MODE_SIZE (GET_MODE (op0))
4493 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4495 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4496 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4498 record_jump_cond (code, mode, SUBREG_REG (op0),
4499 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4500 reversed_nonequality);
4503 if (code == EQ && GET_CODE (op1) == SUBREG
4504 && (GET_MODE_SIZE (GET_MODE (op1))
4505 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4507 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4508 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4510 record_jump_cond (code, mode, SUBREG_REG (op1),
4511 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4512 reversed_nonequality);
4515 /* Similarly, if this is an NE comparison, and either is a SUBREG
4516 making a smaller mode, we know the whole thing is also NE. */
4518 /* Note that GET_MODE (op0) may not equal MODE;
4519 if we test MODE instead, we can get an infinite recursion
4520 alternating between two modes each wider than MODE. */
4522 if (code == NE && GET_CODE (op0) == SUBREG
4523 && subreg_lowpart_p (op0)
4524 && (GET_MODE_SIZE (GET_MODE (op0))
4525 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4527 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4528 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4530 record_jump_cond (code, mode, SUBREG_REG (op0),
4531 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4532 reversed_nonequality);
4535 if (code == NE && GET_CODE (op1) == SUBREG
4536 && subreg_lowpart_p (op1)
4537 && (GET_MODE_SIZE (GET_MODE (op1))
4538 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4540 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4541 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4543 record_jump_cond (code, mode, SUBREG_REG (op1),
4544 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4545 reversed_nonequality);
4548 /* Hash both operands. */
4550 do_not_record = 0;
4551 hash_arg_in_memory = 0;
4552 op0_hash = HASH (op0, mode);
4553 op0_in_memory = hash_arg_in_memory;
4555 if (do_not_record)
4556 return;
4558 do_not_record = 0;
4559 hash_arg_in_memory = 0;
4560 op1_hash = HASH (op1, mode);
4561 op1_in_memory = hash_arg_in_memory;
4563 if (do_not_record)
4564 return;
4566 /* Look up both operands. */
4567 op0_elt = lookup (op0, op0_hash, mode);
4568 op1_elt = lookup (op1, op1_hash, mode);
4570 /* If both operands are already equivalent or if they are not in the
4571 table but are identical, do nothing. */
4572 if ((op0_elt != 0 && op1_elt != 0
4573 && op0_elt->first_same_value == op1_elt->first_same_value)
4574 || op0 == op1 || rtx_equal_p (op0, op1))
4575 return;
4577 /* If we aren't setting two things equal all we can do is save this
4578 comparison. Similarly if this is floating-point. In the latter
4579 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4580 If we record the equality, we might inadvertently delete code
4581 whose intent was to change -0 to +0. */
4583 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4585 struct qty_table_elem *ent;
4586 int qty;
4588 /* If we reversed a floating-point comparison, if OP0 is not a
4589 register, or if OP1 is neither a register or constant, we can't
4590 do anything. */
4592 if (GET_CODE (op1) != REG)
4593 op1 = equiv_constant (op1);
4595 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4596 || GET_CODE (op0) != REG || op1 == 0)
4597 return;
4599 /* Put OP0 in the hash table if it isn't already. This gives it a
4600 new quantity number. */
4601 if (op0_elt == 0)
4603 if (insert_regs (op0, NULL, 0))
4605 rehash_using_reg (op0);
4606 op0_hash = HASH (op0, mode);
4608 /* If OP0 is contained in OP1, this changes its hash code
4609 as well. Faster to rehash than to check, except
4610 for the simple case of a constant. */
4611 if (! CONSTANT_P (op1))
4612 op1_hash = HASH (op1,mode);
4615 op0_elt = insert (op0, NULL, op0_hash, mode);
4616 op0_elt->in_memory = op0_in_memory;
4619 qty = REG_QTY (REGNO (op0));
4620 ent = &qty_table[qty];
4622 ent->comparison_code = code;
4623 if (GET_CODE (op1) == REG)
4625 /* Look it up again--in case op0 and op1 are the same. */
4626 op1_elt = lookup (op1, op1_hash, mode);
4628 /* Put OP1 in the hash table so it gets a new quantity number. */
4629 if (op1_elt == 0)
4631 if (insert_regs (op1, NULL, 0))
4633 rehash_using_reg (op1);
4634 op1_hash = HASH (op1, mode);
4637 op1_elt = insert (op1, NULL, op1_hash, mode);
4638 op1_elt->in_memory = op1_in_memory;
4641 ent->comparison_const = NULL_RTX;
4642 ent->comparison_qty = REG_QTY (REGNO (op1));
4644 else
4646 ent->comparison_const = op1;
4647 ent->comparison_qty = -1;
4650 return;
4653 /* If either side is still missing an equivalence, make it now,
4654 then merge the equivalences. */
4656 if (op0_elt == 0)
4658 if (insert_regs (op0, NULL, 0))
4660 rehash_using_reg (op0);
4661 op0_hash = HASH (op0, mode);
4664 op0_elt = insert (op0, NULL, op0_hash, mode);
4665 op0_elt->in_memory = op0_in_memory;
4668 if (op1_elt == 0)
4670 if (insert_regs (op1, NULL, 0))
4672 rehash_using_reg (op1);
4673 op1_hash = HASH (op1, mode);
4676 op1_elt = insert (op1, NULL, op1_hash, mode);
4677 op1_elt->in_memory = op1_in_memory;
4680 merge_equiv_classes (op0_elt, op1_elt);
4681 last_jump_equiv_class = op0_elt;
4684 /* CSE processing for one instruction.
4685 First simplify sources and addresses of all assignments
4686 in the instruction, using previously-computed equivalents values.
4687 Then install the new sources and destinations in the table
4688 of available values.
4690 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4691 the insn. It means that INSN is inside libcall block. In this
4692 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4694 /* Data on one SET contained in the instruction. */
4696 struct set
4698 /* The SET rtx itself. */
4699 rtx rtl;
4700 /* The SET_SRC of the rtx (the original value, if it is changing). */
4701 rtx src;
4702 /* The hash-table element for the SET_SRC of the SET. */
4703 struct table_elt *src_elt;
4704 /* Hash value for the SET_SRC. */
4705 unsigned src_hash;
4706 /* Hash value for the SET_DEST. */
4707 unsigned dest_hash;
4708 /* The SET_DEST, with SUBREG, etc., stripped. */
4709 rtx inner_dest;
4710 /* Nonzero if the SET_SRC is in memory. */
4711 char src_in_memory;
4712 /* Nonzero if the SET_SRC contains something
4713 whose value cannot be predicted and understood. */
4714 char src_volatile;
4715 /* Original machine mode, in case it becomes a CONST_INT.
4716 The size of this field should match the size of the mode
4717 field of struct rtx_def (see rtl.h). */
4718 ENUM_BITFIELD(machine_mode) mode : 8;
4719 /* A constant equivalent for SET_SRC, if any. */
4720 rtx src_const;
4721 /* Original SET_SRC value used for libcall notes. */
4722 rtx orig_src;
4723 /* Hash value of constant equivalent for SET_SRC. */
4724 unsigned src_const_hash;
4725 /* Table entry for constant equivalent for SET_SRC, if any. */
4726 struct table_elt *src_const_elt;
4729 static void
4730 cse_insn (insn, libcall_insn)
4731 rtx insn;
4732 rtx libcall_insn;
4734 rtx x = PATTERN (insn);
4735 int i;
4736 rtx tem;
4737 int n_sets = 0;
4739 #ifdef HAVE_cc0
4740 /* Records what this insn does to set CC0. */
4741 rtx this_insn_cc0 = 0;
4742 enum machine_mode this_insn_cc0_mode = VOIDmode;
4743 #endif
4745 rtx src_eqv = 0;
4746 struct table_elt *src_eqv_elt = 0;
4747 int src_eqv_volatile = 0;
4748 int src_eqv_in_memory = 0;
4749 unsigned src_eqv_hash = 0;
4751 struct set *sets = (struct set *) 0;
4753 this_insn = insn;
4755 /* Find all the SETs and CLOBBERs in this instruction.
4756 Record all the SETs in the array `set' and count them.
4757 Also determine whether there is a CLOBBER that invalidates
4758 all memory references, or all references at varying addresses. */
4760 if (GET_CODE (insn) == CALL_INSN)
4762 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4764 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4765 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4766 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4770 if (GET_CODE (x) == SET)
4772 sets = (struct set *) alloca (sizeof (struct set));
4773 sets[0].rtl = x;
4775 /* Ignore SETs that are unconditional jumps.
4776 They never need cse processing, so this does not hurt.
4777 The reason is not efficiency but rather
4778 so that we can test at the end for instructions
4779 that have been simplified to unconditional jumps
4780 and not be misled by unchanged instructions
4781 that were unconditional jumps to begin with. */
4782 if (SET_DEST (x) == pc_rtx
4783 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4786 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4787 The hard function value register is used only once, to copy to
4788 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4789 Ensure we invalidate the destination register. On the 80386 no
4790 other code would invalidate it since it is a fixed_reg.
4791 We need not check the return of apply_change_group; see canon_reg. */
4793 else if (GET_CODE (SET_SRC (x)) == CALL)
4795 canon_reg (SET_SRC (x), insn);
4796 apply_change_group ();
4797 fold_rtx (SET_SRC (x), insn);
4798 invalidate (SET_DEST (x), VOIDmode);
4800 else
4801 n_sets = 1;
4803 else if (GET_CODE (x) == PARALLEL)
4805 int lim = XVECLEN (x, 0);
4807 sets = (struct set *) alloca (lim * sizeof (struct set));
4809 /* Find all regs explicitly clobbered in this insn,
4810 and ensure they are not replaced with any other regs
4811 elsewhere in this insn.
4812 When a reg that is clobbered is also used for input,
4813 we should presume that that is for a reason,
4814 and we should not substitute some other register
4815 which is not supposed to be clobbered.
4816 Therefore, this loop cannot be merged into the one below
4817 because a CALL may precede a CLOBBER and refer to the
4818 value clobbered. We must not let a canonicalization do
4819 anything in that case. */
4820 for (i = 0; i < lim; i++)
4822 rtx y = XVECEXP (x, 0, i);
4823 if (GET_CODE (y) == CLOBBER)
4825 rtx clobbered = XEXP (y, 0);
4827 if (GET_CODE (clobbered) == REG
4828 || GET_CODE (clobbered) == SUBREG)
4829 invalidate (clobbered, VOIDmode);
4830 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4831 || GET_CODE (clobbered) == ZERO_EXTRACT)
4832 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4836 for (i = 0; i < lim; i++)
4838 rtx y = XVECEXP (x, 0, i);
4839 if (GET_CODE (y) == SET)
4841 /* As above, we ignore unconditional jumps and call-insns and
4842 ignore the result of apply_change_group. */
4843 if (GET_CODE (SET_SRC (y)) == CALL)
4845 canon_reg (SET_SRC (y), insn);
4846 apply_change_group ();
4847 fold_rtx (SET_SRC (y), insn);
4848 invalidate (SET_DEST (y), VOIDmode);
4850 else if (SET_DEST (y) == pc_rtx
4851 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4853 else
4854 sets[n_sets++].rtl = y;
4856 else if (GET_CODE (y) == CLOBBER)
4858 /* If we clobber memory, canon the address.
4859 This does nothing when a register is clobbered
4860 because we have already invalidated the reg. */
4861 if (GET_CODE (XEXP (y, 0)) == MEM)
4862 canon_reg (XEXP (y, 0), NULL_RTX);
4864 else if (GET_CODE (y) == USE
4865 && ! (GET_CODE (XEXP (y, 0)) == REG
4866 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4867 canon_reg (y, NULL_RTX);
4868 else if (GET_CODE (y) == CALL)
4870 /* The result of apply_change_group can be ignored; see
4871 canon_reg. */
4872 canon_reg (y, insn);
4873 apply_change_group ();
4874 fold_rtx (y, insn);
4878 else if (GET_CODE (x) == CLOBBER)
4880 if (GET_CODE (XEXP (x, 0)) == MEM)
4881 canon_reg (XEXP (x, 0), NULL_RTX);
4884 /* Canonicalize a USE of a pseudo register or memory location. */
4885 else if (GET_CODE (x) == USE
4886 && ! (GET_CODE (XEXP (x, 0)) == REG
4887 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4888 canon_reg (XEXP (x, 0), NULL_RTX);
4889 else if (GET_CODE (x) == CALL)
4891 /* The result of apply_change_group can be ignored; see canon_reg. */
4892 canon_reg (x, insn);
4893 apply_change_group ();
4894 fold_rtx (x, insn);
4897 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4898 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4899 is handled specially for this case, and if it isn't set, then there will
4900 be no equivalence for the destination. */
4901 if (n_sets == 1 && REG_NOTES (insn) != 0
4902 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4903 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4904 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4906 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4907 XEXP (tem, 0) = src_eqv;
4910 /* Canonicalize sources and addresses of destinations.
4911 We do this in a separate pass to avoid problems when a MATCH_DUP is
4912 present in the insn pattern. In that case, we want to ensure that
4913 we don't break the duplicate nature of the pattern. So we will replace
4914 both operands at the same time. Otherwise, we would fail to find an
4915 equivalent substitution in the loop calling validate_change below.
4917 We used to suppress canonicalization of DEST if it appears in SRC,
4918 but we don't do this any more. */
4920 for (i = 0; i < n_sets; i++)
4922 rtx dest = SET_DEST (sets[i].rtl);
4923 rtx src = SET_SRC (sets[i].rtl);
4924 rtx new = canon_reg (src, insn);
4925 int insn_code;
4927 sets[i].orig_src = src;
4928 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4929 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4930 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4931 || (insn_code = recog_memoized (insn)) < 0
4932 || insn_data[insn_code].n_dups > 0)
4933 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4934 else
4935 SET_SRC (sets[i].rtl) = new;
4937 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4939 validate_change (insn, &XEXP (dest, 1),
4940 canon_reg (XEXP (dest, 1), insn), 1);
4941 validate_change (insn, &XEXP (dest, 2),
4942 canon_reg (XEXP (dest, 2), insn), 1);
4945 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4946 || GET_CODE (dest) == ZERO_EXTRACT
4947 || GET_CODE (dest) == SIGN_EXTRACT)
4948 dest = XEXP (dest, 0);
4950 if (GET_CODE (dest) == MEM)
4951 canon_reg (dest, insn);
4954 /* Now that we have done all the replacements, we can apply the change
4955 group and see if they all work. Note that this will cause some
4956 canonicalizations that would have worked individually not to be applied
4957 because some other canonicalization didn't work, but this should not
4958 occur often.
4960 The result of apply_change_group can be ignored; see canon_reg. */
4962 apply_change_group ();
4964 /* Set sets[i].src_elt to the class each source belongs to.
4965 Detect assignments from or to volatile things
4966 and set set[i] to zero so they will be ignored
4967 in the rest of this function.
4969 Nothing in this loop changes the hash table or the register chains. */
4971 for (i = 0; i < n_sets; i++)
4973 rtx src, dest;
4974 rtx src_folded;
4975 struct table_elt *elt = 0, *p;
4976 enum machine_mode mode;
4977 rtx src_eqv_here;
4978 rtx src_const = 0;
4979 rtx src_related = 0;
4980 struct table_elt *src_const_elt = 0;
4981 int src_cost = MAX_COST;
4982 int src_eqv_cost = MAX_COST;
4983 int src_folded_cost = MAX_COST;
4984 int src_related_cost = MAX_COST;
4985 int src_elt_cost = MAX_COST;
4986 int src_regcost = MAX_COST;
4987 int src_eqv_regcost = MAX_COST;
4988 int src_folded_regcost = MAX_COST;
4989 int src_related_regcost = MAX_COST;
4990 int src_elt_regcost = MAX_COST;
4991 /* Set nonzero if we need to call force_const_mem on with the
4992 contents of src_folded before using it. */
4993 int src_folded_force_flag = 0;
4995 dest = SET_DEST (sets[i].rtl);
4996 src = SET_SRC (sets[i].rtl);
4998 /* If SRC is a constant that has no machine mode,
4999 hash it with the destination's machine mode.
5000 This way we can keep different modes separate. */
5002 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5003 sets[i].mode = mode;
5005 if (src_eqv)
5007 enum machine_mode eqvmode = mode;
5008 if (GET_CODE (dest) == STRICT_LOW_PART)
5009 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5010 do_not_record = 0;
5011 hash_arg_in_memory = 0;
5012 src_eqv_hash = HASH (src_eqv, eqvmode);
5014 /* Find the equivalence class for the equivalent expression. */
5016 if (!do_not_record)
5017 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5019 src_eqv_volatile = do_not_record;
5020 src_eqv_in_memory = hash_arg_in_memory;
5023 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5024 value of the INNER register, not the destination. So it is not
5025 a valid substitution for the source. But save it for later. */
5026 if (GET_CODE (dest) == STRICT_LOW_PART)
5027 src_eqv_here = 0;
5028 else
5029 src_eqv_here = src_eqv;
5031 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5032 simplified result, which may not necessarily be valid. */
5033 src_folded = fold_rtx (src, insn);
5035 #if 0
5036 /* ??? This caused bad code to be generated for the m68k port with -O2.
5037 Suppose src is (CONST_INT -1), and that after truncation src_folded
5038 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5039 At the end we will add src and src_const to the same equivalence
5040 class. We now have 3 and -1 on the same equivalence class. This
5041 causes later instructions to be mis-optimized. */
5042 /* If storing a constant in a bitfield, pre-truncate the constant
5043 so we will be able to record it later. */
5044 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5045 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5047 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5049 if (GET_CODE (src) == CONST_INT
5050 && GET_CODE (width) == CONST_INT
5051 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5052 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5053 src_folded
5054 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5055 << INTVAL (width)) - 1));
5057 #endif
5059 /* Compute SRC's hash code, and also notice if it
5060 should not be recorded at all. In that case,
5061 prevent any further processing of this assignment. */
5062 do_not_record = 0;
5063 hash_arg_in_memory = 0;
5065 sets[i].src = src;
5066 sets[i].src_hash = HASH (src, mode);
5067 sets[i].src_volatile = do_not_record;
5068 sets[i].src_in_memory = hash_arg_in_memory;
5070 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5071 a pseudo, do not record SRC. Using SRC as a replacement for
5072 anything else will be incorrect in that situation. Note that
5073 this usually occurs only for stack slots, in which case all the
5074 RTL would be referring to SRC, so we don't lose any optimization
5075 opportunities by not having SRC in the hash table. */
5077 if (GET_CODE (src) == MEM
5078 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5079 && GET_CODE (dest) == REG
5080 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5081 sets[i].src_volatile = 1;
5083 #if 0
5084 /* It is no longer clear why we used to do this, but it doesn't
5085 appear to still be needed. So let's try without it since this
5086 code hurts cse'ing widened ops. */
5087 /* If source is a perverse subreg (such as QI treated as an SI),
5088 treat it as volatile. It may do the work of an SI in one context
5089 where the extra bits are not being used, but cannot replace an SI
5090 in general. */
5091 if (GET_CODE (src) == SUBREG
5092 && (GET_MODE_SIZE (GET_MODE (src))
5093 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5094 sets[i].src_volatile = 1;
5095 #endif
5097 /* Locate all possible equivalent forms for SRC. Try to replace
5098 SRC in the insn with each cheaper equivalent.
5100 We have the following types of equivalents: SRC itself, a folded
5101 version, a value given in a REG_EQUAL note, or a value related
5102 to a constant.
5104 Each of these equivalents may be part of an additional class
5105 of equivalents (if more than one is in the table, they must be in
5106 the same class; we check for this).
5108 If the source is volatile, we don't do any table lookups.
5110 We note any constant equivalent for possible later use in a
5111 REG_NOTE. */
5113 if (!sets[i].src_volatile)
5114 elt = lookup (src, sets[i].src_hash, mode);
5116 sets[i].src_elt = elt;
5118 if (elt && src_eqv_here && src_eqv_elt)
5120 if (elt->first_same_value != src_eqv_elt->first_same_value)
5122 /* The REG_EQUAL is indicating that two formerly distinct
5123 classes are now equivalent. So merge them. */
5124 merge_equiv_classes (elt, src_eqv_elt);
5125 src_eqv_hash = HASH (src_eqv, elt->mode);
5126 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5129 src_eqv_here = 0;
5132 else if (src_eqv_elt)
5133 elt = src_eqv_elt;
5135 /* Try to find a constant somewhere and record it in `src_const'.
5136 Record its table element, if any, in `src_const_elt'. Look in
5137 any known equivalences first. (If the constant is not in the
5138 table, also set `sets[i].src_const_hash'). */
5139 if (elt)
5140 for (p = elt->first_same_value; p; p = p->next_same_value)
5141 if (p->is_const)
5143 src_const = p->exp;
5144 src_const_elt = elt;
5145 break;
5148 if (src_const == 0
5149 && (CONSTANT_P (src_folded)
5150 /* Consider (minus (label_ref L1) (label_ref L2)) as
5151 "constant" here so we will record it. This allows us
5152 to fold switch statements when an ADDR_DIFF_VEC is used. */
5153 || (GET_CODE (src_folded) == MINUS
5154 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5155 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5156 src_const = src_folded, src_const_elt = elt;
5157 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5158 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5160 /* If we don't know if the constant is in the table, get its
5161 hash code and look it up. */
5162 if (src_const && src_const_elt == 0)
5164 sets[i].src_const_hash = HASH (src_const, mode);
5165 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5168 sets[i].src_const = src_const;
5169 sets[i].src_const_elt = src_const_elt;
5171 /* If the constant and our source are both in the table, mark them as
5172 equivalent. Otherwise, if a constant is in the table but the source
5173 isn't, set ELT to it. */
5174 if (src_const_elt && elt
5175 && src_const_elt->first_same_value != elt->first_same_value)
5176 merge_equiv_classes (elt, src_const_elt);
5177 else if (src_const_elt && elt == 0)
5178 elt = src_const_elt;
5180 /* See if there is a register linearly related to a constant
5181 equivalent of SRC. */
5182 if (src_const
5183 && (GET_CODE (src_const) == CONST
5184 || (src_const_elt && src_const_elt->related_value != 0)))
5186 src_related = use_related_value (src_const, src_const_elt);
5187 if (src_related)
5189 struct table_elt *src_related_elt
5190 = lookup (src_related, HASH (src_related, mode), mode);
5191 if (src_related_elt && elt)
5193 if (elt->first_same_value
5194 != src_related_elt->first_same_value)
5195 /* This can occur when we previously saw a CONST
5196 involving a SYMBOL_REF and then see the SYMBOL_REF
5197 twice. Merge the involved classes. */
5198 merge_equiv_classes (elt, src_related_elt);
5200 src_related = 0;
5201 src_related_elt = 0;
5203 else if (src_related_elt && elt == 0)
5204 elt = src_related_elt;
5208 /* See if we have a CONST_INT that is already in a register in a
5209 wider mode. */
5211 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5212 && GET_MODE_CLASS (mode) == MODE_INT
5213 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5215 enum machine_mode wider_mode;
5217 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5218 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5219 && src_related == 0;
5220 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5222 struct table_elt *const_elt
5223 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5225 if (const_elt == 0)
5226 continue;
5228 for (const_elt = const_elt->first_same_value;
5229 const_elt; const_elt = const_elt->next_same_value)
5230 if (GET_CODE (const_elt->exp) == REG)
5232 src_related = gen_lowpart_if_possible (mode,
5233 const_elt->exp);
5234 break;
5239 /* Another possibility is that we have an AND with a constant in
5240 a mode narrower than a word. If so, it might have been generated
5241 as part of an "if" which would narrow the AND. If we already
5242 have done the AND in a wider mode, we can use a SUBREG of that
5243 value. */
5245 if (flag_expensive_optimizations && ! src_related
5246 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5247 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5249 enum machine_mode tmode;
5250 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5252 for (tmode = GET_MODE_WIDER_MODE (mode);
5253 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5254 tmode = GET_MODE_WIDER_MODE (tmode))
5256 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5257 struct table_elt *larger_elt;
5259 if (inner)
5261 PUT_MODE (new_and, tmode);
5262 XEXP (new_and, 0) = inner;
5263 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5264 if (larger_elt == 0)
5265 continue;
5267 for (larger_elt = larger_elt->first_same_value;
5268 larger_elt; larger_elt = larger_elt->next_same_value)
5269 if (GET_CODE (larger_elt->exp) == REG)
5271 src_related
5272 = gen_lowpart_if_possible (mode, larger_elt->exp);
5273 break;
5276 if (src_related)
5277 break;
5282 #ifdef LOAD_EXTEND_OP
5283 /* See if a MEM has already been loaded with a widening operation;
5284 if it has, we can use a subreg of that. Many CISC machines
5285 also have such operations, but this is only likely to be
5286 beneficial these machines. */
5288 if (flag_expensive_optimizations && src_related == 0
5289 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5290 && GET_MODE_CLASS (mode) == MODE_INT
5291 && GET_CODE (src) == MEM && ! do_not_record
5292 && LOAD_EXTEND_OP (mode) != NIL)
5294 enum machine_mode tmode;
5296 /* Set what we are trying to extend and the operation it might
5297 have been extended with. */
5298 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5299 XEXP (memory_extend_rtx, 0) = src;
5301 for (tmode = GET_MODE_WIDER_MODE (mode);
5302 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5303 tmode = GET_MODE_WIDER_MODE (tmode))
5305 struct table_elt *larger_elt;
5307 PUT_MODE (memory_extend_rtx, tmode);
5308 larger_elt = lookup (memory_extend_rtx,
5309 HASH (memory_extend_rtx, tmode), tmode);
5310 if (larger_elt == 0)
5311 continue;
5313 for (larger_elt = larger_elt->first_same_value;
5314 larger_elt; larger_elt = larger_elt->next_same_value)
5315 if (GET_CODE (larger_elt->exp) == REG)
5317 src_related = gen_lowpart_if_possible (mode,
5318 larger_elt->exp);
5319 break;
5322 if (src_related)
5323 break;
5326 #endif /* LOAD_EXTEND_OP */
5328 if (src == src_folded)
5329 src_folded = 0;
5331 /* At this point, ELT, if nonzero, points to a class of expressions
5332 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5333 and SRC_RELATED, if nonzero, each contain additional equivalent
5334 expressions. Prune these latter expressions by deleting expressions
5335 already in the equivalence class.
5337 Check for an equivalent identical to the destination. If found,
5338 this is the preferred equivalent since it will likely lead to
5339 elimination of the insn. Indicate this by placing it in
5340 `src_related'. */
5342 if (elt)
5343 elt = elt->first_same_value;
5344 for (p = elt; p; p = p->next_same_value)
5346 enum rtx_code code = GET_CODE (p->exp);
5348 /* If the expression is not valid, ignore it. Then we do not
5349 have to check for validity below. In most cases, we can use
5350 `rtx_equal_p', since canonicalization has already been done. */
5351 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5352 continue;
5354 /* Also skip paradoxical subregs, unless that's what we're
5355 looking for. */
5356 if (code == SUBREG
5357 && (GET_MODE_SIZE (GET_MODE (p->exp))
5358 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5359 && ! (src != 0
5360 && GET_CODE (src) == SUBREG
5361 && GET_MODE (src) == GET_MODE (p->exp)
5362 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5363 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5364 continue;
5366 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5367 src = 0;
5368 else if (src_folded && GET_CODE (src_folded) == code
5369 && rtx_equal_p (src_folded, p->exp))
5370 src_folded = 0;
5371 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5372 && rtx_equal_p (src_eqv_here, p->exp))
5373 src_eqv_here = 0;
5374 else if (src_related && GET_CODE (src_related) == code
5375 && rtx_equal_p (src_related, p->exp))
5376 src_related = 0;
5378 /* This is the same as the destination of the insns, we want
5379 to prefer it. Copy it to src_related. The code below will
5380 then give it a negative cost. */
5381 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5382 src_related = dest;
5385 /* Find the cheapest valid equivalent, trying all the available
5386 possibilities. Prefer items not in the hash table to ones
5387 that are when they are equal cost. Note that we can never
5388 worsen an insn as the current contents will also succeed.
5389 If we find an equivalent identical to the destination, use it as best,
5390 since this insn will probably be eliminated in that case. */
5391 if (src)
5393 if (rtx_equal_p (src, dest))
5394 src_cost = src_regcost = -1;
5395 else
5397 src_cost = COST (src);
5398 src_regcost = approx_reg_cost (src);
5402 if (src_eqv_here)
5404 if (rtx_equal_p (src_eqv_here, dest))
5405 src_eqv_cost = src_eqv_regcost = -1;
5406 else
5408 src_eqv_cost = COST (src_eqv_here);
5409 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5413 if (src_folded)
5415 if (rtx_equal_p (src_folded, dest))
5416 src_folded_cost = src_folded_regcost = -1;
5417 else
5419 src_folded_cost = COST (src_folded);
5420 src_folded_regcost = approx_reg_cost (src_folded);
5424 if (src_related)
5426 if (rtx_equal_p (src_related, dest))
5427 src_related_cost = src_related_regcost = -1;
5428 else
5430 src_related_cost = COST (src_related);
5431 src_related_regcost = approx_reg_cost (src_related);
5435 /* If this was an indirect jump insn, a known label will really be
5436 cheaper even though it looks more expensive. */
5437 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5438 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5440 /* Terminate loop when replacement made. This must terminate since
5441 the current contents will be tested and will always be valid. */
5442 while (1)
5444 rtx trial;
5446 /* Skip invalid entries. */
5447 while (elt && GET_CODE (elt->exp) != REG
5448 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5449 elt = elt->next_same_value;
5451 /* A paradoxical subreg would be bad here: it'll be the right
5452 size, but later may be adjusted so that the upper bits aren't
5453 what we want. So reject it. */
5454 if (elt != 0
5455 && GET_CODE (elt->exp) == SUBREG
5456 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5457 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5458 /* It is okay, though, if the rtx we're trying to match
5459 will ignore any of the bits we can't predict. */
5460 && ! (src != 0
5461 && GET_CODE (src) == SUBREG
5462 && GET_MODE (src) == GET_MODE (elt->exp)
5463 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5464 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5466 elt = elt->next_same_value;
5467 continue;
5470 if (elt)
5472 src_elt_cost = elt->cost;
5473 src_elt_regcost = elt->regcost;
5476 /* Find cheapest and skip it for the next time. For items
5477 of equal cost, use this order:
5478 src_folded, src, src_eqv, src_related and hash table entry. */
5479 if (src_folded
5480 && preferrable (src_folded_cost, src_folded_regcost,
5481 src_cost, src_regcost) <= 0
5482 && preferrable (src_folded_cost, src_folded_regcost,
5483 src_eqv_cost, src_eqv_regcost) <= 0
5484 && preferrable (src_folded_cost, src_folded_regcost,
5485 src_related_cost, src_related_regcost) <= 0
5486 && preferrable (src_folded_cost, src_folded_regcost,
5487 src_elt_cost, src_elt_regcost) <= 0)
5489 trial = src_folded, src_folded_cost = MAX_COST;
5490 if (src_folded_force_flag)
5491 trial = force_const_mem (mode, trial);
5493 else if (src
5494 && preferrable (src_cost, src_regcost,
5495 src_eqv_cost, src_eqv_regcost) <= 0
5496 && preferrable (src_cost, src_regcost,
5497 src_related_cost, src_related_regcost) <= 0
5498 && preferrable (src_cost, src_regcost,
5499 src_elt_cost, src_elt_regcost) <= 0)
5500 trial = src, src_cost = MAX_COST;
5501 else if (src_eqv_here
5502 && preferrable (src_eqv_cost, src_eqv_regcost,
5503 src_related_cost, src_related_regcost) <= 0
5504 && preferrable (src_eqv_cost, src_eqv_regcost,
5505 src_elt_cost, src_elt_regcost) <= 0)
5506 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5507 else if (src_related
5508 && preferrable (src_related_cost, src_related_regcost,
5509 src_elt_cost, src_elt_regcost) <= 0)
5510 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5511 else
5513 trial = copy_rtx (elt->exp);
5514 elt = elt->next_same_value;
5515 src_elt_cost = MAX_COST;
5518 /* We don't normally have an insn matching (set (pc) (pc)), so
5519 check for this separately here. We will delete such an
5520 insn below.
5522 For other cases such as a table jump or conditional jump
5523 where we know the ultimate target, go ahead and replace the
5524 operand. While that may not make a valid insn, we will
5525 reemit the jump below (and also insert any necessary
5526 barriers). */
5527 if (n_sets == 1 && dest == pc_rtx
5528 && (trial == pc_rtx
5529 || (GET_CODE (trial) == LABEL_REF
5530 && ! condjump_p (insn))))
5532 SET_SRC (sets[i].rtl) = trial;
5533 cse_jumps_altered = 1;
5534 break;
5537 /* Look for a substitution that makes a valid insn. */
5538 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5540 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5542 /* If we just made a substitution inside a libcall, then we
5543 need to make the same substitution in any notes attached
5544 to the RETVAL insn. */
5545 if (libcall_insn
5546 && (GET_CODE (sets[i].orig_src) == REG
5547 || GET_CODE (sets[i].orig_src) == SUBREG
5548 || GET_CODE (sets[i].orig_src) == MEM))
5549 simplify_replace_rtx (REG_NOTES (libcall_insn),
5550 sets[i].orig_src, copy_rtx (new));
5552 /* The result of apply_change_group can be ignored; see
5553 canon_reg. */
5555 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5556 apply_change_group ();
5557 break;
5560 /* If we previously found constant pool entries for
5561 constants and this is a constant, try making a
5562 pool entry. Put it in src_folded unless we already have done
5563 this since that is where it likely came from. */
5565 else if (constant_pool_entries_cost
5566 && CONSTANT_P (trial)
5567 /* Reject cases that will abort in decode_rtx_const.
5568 On the alpha when simplifying a switch, we get
5569 (const (truncate (minus (label_ref) (label_ref)))). */
5570 && ! (GET_CODE (trial) == CONST
5571 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5572 /* Likewise on IA-64, except without the truncate. */
5573 && ! (GET_CODE (trial) == CONST
5574 && GET_CODE (XEXP (trial, 0)) == MINUS
5575 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5576 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5577 && (src_folded == 0
5578 || (GET_CODE (src_folded) != MEM
5579 && ! src_folded_force_flag))
5580 && GET_MODE_CLASS (mode) != MODE_CC
5581 && mode != VOIDmode)
5583 src_folded_force_flag = 1;
5584 src_folded = trial;
5585 src_folded_cost = constant_pool_entries_cost;
5589 src = SET_SRC (sets[i].rtl);
5591 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5592 However, there is an important exception: If both are registers
5593 that are not the head of their equivalence class, replace SET_SRC
5594 with the head of the class. If we do not do this, we will have
5595 both registers live over a portion of the basic block. This way,
5596 their lifetimes will likely abut instead of overlapping. */
5597 if (GET_CODE (dest) == REG
5598 && REGNO_QTY_VALID_P (REGNO (dest)))
5600 int dest_q = REG_QTY (REGNO (dest));
5601 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5603 if (dest_ent->mode == GET_MODE (dest)
5604 && dest_ent->first_reg != REGNO (dest)
5605 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5606 /* Don't do this if the original insn had a hard reg as
5607 SET_SRC or SET_DEST. */
5608 && (GET_CODE (sets[i].src) != REG
5609 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5610 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5611 /* We can't call canon_reg here because it won't do anything if
5612 SRC is a hard register. */
5614 int src_q = REG_QTY (REGNO (src));
5615 struct qty_table_elem *src_ent = &qty_table[src_q];
5616 int first = src_ent->first_reg;
5617 rtx new_src
5618 = (first >= FIRST_PSEUDO_REGISTER
5619 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5621 /* We must use validate-change even for this, because this
5622 might be a special no-op instruction, suitable only to
5623 tag notes onto. */
5624 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5626 src = new_src;
5627 /* If we had a constant that is cheaper than what we are now
5628 setting SRC to, use that constant. We ignored it when we
5629 thought we could make this into a no-op. */
5630 if (src_const && COST (src_const) < COST (src)
5631 && validate_change (insn, &SET_SRC (sets[i].rtl),
5632 src_const, 0))
5633 src = src_const;
5638 /* If we made a change, recompute SRC values. */
5639 if (src != sets[i].src)
5641 cse_altered = 1;
5642 do_not_record = 0;
5643 hash_arg_in_memory = 0;
5644 sets[i].src = src;
5645 sets[i].src_hash = HASH (src, mode);
5646 sets[i].src_volatile = do_not_record;
5647 sets[i].src_in_memory = hash_arg_in_memory;
5648 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5651 /* If this is a single SET, we are setting a register, and we have an
5652 equivalent constant, we want to add a REG_NOTE. We don't want
5653 to write a REG_EQUAL note for a constant pseudo since verifying that
5654 that pseudo hasn't been eliminated is a pain. Such a note also
5655 won't help anything.
5657 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5658 which can be created for a reference to a compile time computable
5659 entry in a jump table. */
5661 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5662 && GET_CODE (src_const) != REG
5663 && ! (GET_CODE (src_const) == CONST
5664 && GET_CODE (XEXP (src_const, 0)) == MINUS
5665 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5666 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5668 /* We only want a REG_EQUAL note if src_const != src. */
5669 if (! rtx_equal_p (src, src_const))
5671 /* Make sure that the rtx is not shared. */
5672 src_const = copy_rtx (src_const);
5674 /* Record the actual constant value in a REG_EQUAL note,
5675 making a new one if one does not already exist. */
5676 set_unique_reg_note (insn, REG_EQUAL, src_const);
5679 /* If storing a constant value in a register that
5680 previously held the constant value 0,
5681 record this fact with a REG_WAS_0 note on this insn.
5683 Note that the *register* is required to have previously held 0,
5684 not just any register in the quantity and we must point to the
5685 insn that set that register to zero.
5687 Rather than track each register individually, we just see if
5688 the last set for this quantity was for this register. */
5690 if (REGNO_QTY_VALID_P (REGNO (dest)))
5692 int dest_q = REG_QTY (REGNO (dest));
5693 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5695 if (dest_ent->const_rtx == const0_rtx)
5697 /* See if we previously had a REG_WAS_0 note. */
5698 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5699 rtx const_insn = dest_ent->const_insn;
5701 if ((tem = single_set (const_insn)) != 0
5702 && rtx_equal_p (SET_DEST (tem), dest))
5704 if (note)
5705 XEXP (note, 0) = const_insn;
5706 else
5707 REG_NOTES (insn)
5708 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5709 REG_NOTES (insn));
5715 /* Now deal with the destination. */
5716 do_not_record = 0;
5718 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5719 to the MEM or REG within it. */
5720 while (GET_CODE (dest) == SIGN_EXTRACT
5721 || GET_CODE (dest) == ZERO_EXTRACT
5722 || GET_CODE (dest) == SUBREG
5723 || GET_CODE (dest) == STRICT_LOW_PART)
5724 dest = XEXP (dest, 0);
5726 sets[i].inner_dest = dest;
5728 if (GET_CODE (dest) == MEM)
5730 #ifdef PUSH_ROUNDING
5731 /* Stack pushes invalidate the stack pointer. */
5732 rtx addr = XEXP (dest, 0);
5733 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5734 && XEXP (addr, 0) == stack_pointer_rtx)
5735 invalidate (stack_pointer_rtx, Pmode);
5736 #endif
5737 dest = fold_rtx (dest, insn);
5740 /* Compute the hash code of the destination now,
5741 before the effects of this instruction are recorded,
5742 since the register values used in the address computation
5743 are those before this instruction. */
5744 sets[i].dest_hash = HASH (dest, mode);
5746 /* Don't enter a bit-field in the hash table
5747 because the value in it after the store
5748 may not equal what was stored, due to truncation. */
5750 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5751 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5753 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5755 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5756 && GET_CODE (width) == CONST_INT
5757 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5758 && ! (INTVAL (src_const)
5759 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5760 /* Exception: if the value is constant,
5761 and it won't be truncated, record it. */
5763 else
5765 /* This is chosen so that the destination will be invalidated
5766 but no new value will be recorded.
5767 We must invalidate because sometimes constant
5768 values can be recorded for bitfields. */
5769 sets[i].src_elt = 0;
5770 sets[i].src_volatile = 1;
5771 src_eqv = 0;
5772 src_eqv_elt = 0;
5776 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5777 the insn. */
5778 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5780 /* One less use of the label this insn used to jump to. */
5781 delete_insn (insn);
5782 cse_jumps_altered = 1;
5783 /* No more processing for this set. */
5784 sets[i].rtl = 0;
5787 /* If this SET is now setting PC to a label, we know it used to
5788 be a conditional or computed branch. */
5789 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5791 /* Now emit a BARRIER after the unconditional jump. */
5792 if (NEXT_INSN (insn) == 0
5793 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5794 emit_barrier_after (insn);
5796 /* We reemit the jump in as many cases as possible just in
5797 case the form of an unconditional jump is significantly
5798 different than a computed jump or conditional jump.
5800 If this insn has multiple sets, then reemitting the
5801 jump is nontrivial. So instead we just force rerecognition
5802 and hope for the best. */
5803 if (n_sets == 1)
5805 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5807 JUMP_LABEL (new) = XEXP (src, 0);
5808 LABEL_NUSES (XEXP (src, 0))++;
5809 delete_insn (insn);
5810 insn = new;
5812 /* Now emit a BARRIER after the unconditional jump. */
5813 if (NEXT_INSN (insn) == 0
5814 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5815 emit_barrier_after (insn);
5817 else
5818 INSN_CODE (insn) = -1;
5820 never_reached_warning (insn, NULL);
5822 /* Do not bother deleting any unreachable code,
5823 let jump/flow do that. */
5825 cse_jumps_altered = 1;
5826 sets[i].rtl = 0;
5829 /* If destination is volatile, invalidate it and then do no further
5830 processing for this assignment. */
5832 else if (do_not_record)
5834 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5835 invalidate (dest, VOIDmode);
5836 else if (GET_CODE (dest) == MEM)
5838 /* Outgoing arguments for a libcall don't
5839 affect any recorded expressions. */
5840 if (! libcall_insn || insn == libcall_insn)
5841 invalidate (dest, VOIDmode);
5843 else if (GET_CODE (dest) == STRICT_LOW_PART
5844 || GET_CODE (dest) == ZERO_EXTRACT)
5845 invalidate (XEXP (dest, 0), GET_MODE (dest));
5846 sets[i].rtl = 0;
5849 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5850 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5852 #ifdef HAVE_cc0
5853 /* If setting CC0, record what it was set to, or a constant, if it
5854 is equivalent to a constant. If it is being set to a floating-point
5855 value, make a COMPARE with the appropriate constant of 0. If we
5856 don't do this, later code can interpret this as a test against
5857 const0_rtx, which can cause problems if we try to put it into an
5858 insn as a floating-point operand. */
5859 if (dest == cc0_rtx)
5861 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5862 this_insn_cc0_mode = mode;
5863 if (FLOAT_MODE_P (mode))
5864 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5865 CONST0_RTX (mode));
5867 #endif
5870 /* Now enter all non-volatile source expressions in the hash table
5871 if they are not already present.
5872 Record their equivalence classes in src_elt.
5873 This way we can insert the corresponding destinations into
5874 the same classes even if the actual sources are no longer in them
5875 (having been invalidated). */
5877 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5878 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5880 struct table_elt *elt;
5881 struct table_elt *classp = sets[0].src_elt;
5882 rtx dest = SET_DEST (sets[0].rtl);
5883 enum machine_mode eqvmode = GET_MODE (dest);
5885 if (GET_CODE (dest) == STRICT_LOW_PART)
5887 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5888 classp = 0;
5890 if (insert_regs (src_eqv, classp, 0))
5892 rehash_using_reg (src_eqv);
5893 src_eqv_hash = HASH (src_eqv, eqvmode);
5895 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5896 elt->in_memory = src_eqv_in_memory;
5897 src_eqv_elt = elt;
5899 /* Check to see if src_eqv_elt is the same as a set source which
5900 does not yet have an elt, and if so set the elt of the set source
5901 to src_eqv_elt. */
5902 for (i = 0; i < n_sets; i++)
5903 if (sets[i].rtl && sets[i].src_elt == 0
5904 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5905 sets[i].src_elt = src_eqv_elt;
5908 for (i = 0; i < n_sets; i++)
5909 if (sets[i].rtl && ! sets[i].src_volatile
5910 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5912 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5914 /* REG_EQUAL in setting a STRICT_LOW_PART
5915 gives an equivalent for the entire destination register,
5916 not just for the subreg being stored in now.
5917 This is a more interesting equivalence, so we arrange later
5918 to treat the entire reg as the destination. */
5919 sets[i].src_elt = src_eqv_elt;
5920 sets[i].src_hash = src_eqv_hash;
5922 else
5924 /* Insert source and constant equivalent into hash table, if not
5925 already present. */
5926 struct table_elt *classp = src_eqv_elt;
5927 rtx src = sets[i].src;
5928 rtx dest = SET_DEST (sets[i].rtl);
5929 enum machine_mode mode
5930 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5932 if (sets[i].src_elt == 0)
5934 /* Don't put a hard register source into the table if this is
5935 the last insn of a libcall. In this case, we only need
5936 to put src_eqv_elt in src_elt. */
5937 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5939 struct table_elt *elt;
5941 /* Note that these insert_regs calls cannot remove
5942 any of the src_elt's, because they would have failed to
5943 match if not still valid. */
5944 if (insert_regs (src, classp, 0))
5946 rehash_using_reg (src);
5947 sets[i].src_hash = HASH (src, mode);
5949 elt = insert (src, classp, sets[i].src_hash, mode);
5950 elt->in_memory = sets[i].src_in_memory;
5951 sets[i].src_elt = classp = elt;
5953 else
5954 sets[i].src_elt = classp;
5956 if (sets[i].src_const && sets[i].src_const_elt == 0
5957 && src != sets[i].src_const
5958 && ! rtx_equal_p (sets[i].src_const, src))
5959 sets[i].src_elt = insert (sets[i].src_const, classp,
5960 sets[i].src_const_hash, mode);
5963 else if (sets[i].src_elt == 0)
5964 /* If we did not insert the source into the hash table (e.g., it was
5965 volatile), note the equivalence class for the REG_EQUAL value, if any,
5966 so that the destination goes into that class. */
5967 sets[i].src_elt = src_eqv_elt;
5969 invalidate_from_clobbers (x);
5971 /* Some registers are invalidated by subroutine calls. Memory is
5972 invalidated by non-constant calls. */
5974 if (GET_CODE (insn) == CALL_INSN)
5976 if (! CONST_OR_PURE_CALL_P (insn))
5977 invalidate_memory ();
5978 invalidate_for_call ();
5981 /* Now invalidate everything set by this instruction.
5982 If a SUBREG or other funny destination is being set,
5983 sets[i].rtl is still nonzero, so here we invalidate the reg
5984 a part of which is being set. */
5986 for (i = 0; i < n_sets; i++)
5987 if (sets[i].rtl)
5989 /* We can't use the inner dest, because the mode associated with
5990 a ZERO_EXTRACT is significant. */
5991 rtx dest = SET_DEST (sets[i].rtl);
5993 /* Needed for registers to remove the register from its
5994 previous quantity's chain.
5995 Needed for memory if this is a nonvarying address, unless
5996 we have just done an invalidate_memory that covers even those. */
5997 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5998 invalidate (dest, VOIDmode);
5999 else if (GET_CODE (dest) == MEM)
6001 /* Outgoing arguments for a libcall don't
6002 affect any recorded expressions. */
6003 if (! libcall_insn || insn == libcall_insn)
6004 invalidate (dest, VOIDmode);
6006 else if (GET_CODE (dest) == STRICT_LOW_PART
6007 || GET_CODE (dest) == ZERO_EXTRACT)
6008 invalidate (XEXP (dest, 0), GET_MODE (dest));
6011 /* A volatile ASM invalidates everything. */
6012 if (GET_CODE (insn) == INSN
6013 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6014 && MEM_VOLATILE_P (PATTERN (insn)))
6015 flush_hash_table ();
6017 /* Make sure registers mentioned in destinations
6018 are safe for use in an expression to be inserted.
6019 This removes from the hash table
6020 any invalid entry that refers to one of these registers.
6022 We don't care about the return value from mention_regs because
6023 we are going to hash the SET_DEST values unconditionally. */
6025 for (i = 0; i < n_sets; i++)
6027 if (sets[i].rtl)
6029 rtx x = SET_DEST (sets[i].rtl);
6031 if (GET_CODE (x) != REG)
6032 mention_regs (x);
6033 else
6035 /* We used to rely on all references to a register becoming
6036 inaccessible when a register changes to a new quantity,
6037 since that changes the hash code. However, that is not
6038 safe, since after HASH_SIZE new quantities we get a
6039 hash 'collision' of a register with its own invalid
6040 entries. And since SUBREGs have been changed not to
6041 change their hash code with the hash code of the register,
6042 it wouldn't work any longer at all. So we have to check
6043 for any invalid references lying around now.
6044 This code is similar to the REG case in mention_regs,
6045 but it knows that reg_tick has been incremented, and
6046 it leaves reg_in_table as -1 . */
6047 unsigned int regno = REGNO (x);
6048 unsigned int endregno
6049 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6050 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6051 unsigned int i;
6053 for (i = regno; i < endregno; i++)
6055 if (REG_IN_TABLE (i) >= 0)
6057 remove_invalid_refs (i);
6058 REG_IN_TABLE (i) = -1;
6065 /* We may have just removed some of the src_elt's from the hash table.
6066 So replace each one with the current head of the same class. */
6068 for (i = 0; i < n_sets; i++)
6069 if (sets[i].rtl)
6071 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6072 /* If elt was removed, find current head of same class,
6073 or 0 if nothing remains of that class. */
6075 struct table_elt *elt = sets[i].src_elt;
6077 while (elt && elt->prev_same_value)
6078 elt = elt->prev_same_value;
6080 while (elt && elt->first_same_value == 0)
6081 elt = elt->next_same_value;
6082 sets[i].src_elt = elt ? elt->first_same_value : 0;
6086 /* Now insert the destinations into their equivalence classes. */
6088 for (i = 0; i < n_sets; i++)
6089 if (sets[i].rtl)
6091 rtx dest = SET_DEST (sets[i].rtl);
6092 rtx inner_dest = sets[i].inner_dest;
6093 struct table_elt *elt;
6095 /* Don't record value if we are not supposed to risk allocating
6096 floating-point values in registers that might be wider than
6097 memory. */
6098 if ((flag_float_store
6099 && GET_CODE (dest) == MEM
6100 && FLOAT_MODE_P (GET_MODE (dest)))
6101 /* Don't record BLKmode values, because we don't know the
6102 size of it, and can't be sure that other BLKmode values
6103 have the same or smaller size. */
6104 || GET_MODE (dest) == BLKmode
6105 /* Don't record values of destinations set inside a libcall block
6106 since we might delete the libcall. Things should have been set
6107 up so we won't want to reuse such a value, but we play it safe
6108 here. */
6109 || libcall_insn
6110 /* If we didn't put a REG_EQUAL value or a source into the hash
6111 table, there is no point is recording DEST. */
6112 || sets[i].src_elt == 0
6113 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6114 or SIGN_EXTEND, don't record DEST since it can cause
6115 some tracking to be wrong.
6117 ??? Think about this more later. */
6118 || (GET_CODE (dest) == SUBREG
6119 && (GET_MODE_SIZE (GET_MODE (dest))
6120 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6121 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6122 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6123 continue;
6125 /* STRICT_LOW_PART isn't part of the value BEING set,
6126 and neither is the SUBREG inside it.
6127 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6128 if (GET_CODE (dest) == STRICT_LOW_PART)
6129 dest = SUBREG_REG (XEXP (dest, 0));
6131 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6132 /* Registers must also be inserted into chains for quantities. */
6133 if (insert_regs (dest, sets[i].src_elt, 1))
6135 /* If `insert_regs' changes something, the hash code must be
6136 recalculated. */
6137 rehash_using_reg (dest);
6138 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6141 if (GET_CODE (inner_dest) == MEM
6142 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6143 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6144 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6145 Consider the case in which the address of the MEM is
6146 passed to a function, which alters the MEM. Then, if we
6147 later use Y instead of the MEM we'll miss the update. */
6148 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6149 else
6150 elt = insert (dest, sets[i].src_elt,
6151 sets[i].dest_hash, GET_MODE (dest));
6153 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6154 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6155 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6156 0))));
6158 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6159 narrower than M2, and both M1 and M2 are the same number of words,
6160 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6161 make that equivalence as well.
6163 However, BAR may have equivalences for which gen_lowpart_if_possible
6164 will produce a simpler value than gen_lowpart_if_possible applied to
6165 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6166 BAR's equivalences. If we don't get a simplified form, make
6167 the SUBREG. It will not be used in an equivalence, but will
6168 cause two similar assignments to be detected.
6170 Note the loop below will find SUBREG_REG (DEST) since we have
6171 already entered SRC and DEST of the SET in the table. */
6173 if (GET_CODE (dest) == SUBREG
6174 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6175 / UNITS_PER_WORD)
6176 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6177 && (GET_MODE_SIZE (GET_MODE (dest))
6178 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6179 && sets[i].src_elt != 0)
6181 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6182 struct table_elt *elt, *classp = 0;
6184 for (elt = sets[i].src_elt->first_same_value; elt;
6185 elt = elt->next_same_value)
6187 rtx new_src = 0;
6188 unsigned src_hash;
6189 struct table_elt *src_elt;
6190 int byte = 0;
6192 /* Ignore invalid entries. */
6193 if (GET_CODE (elt->exp) != REG
6194 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6195 continue;
6197 /* We may have already been playing subreg games. If the
6198 mode is already correct for the destination, use it. */
6199 if (GET_MODE (elt->exp) == new_mode)
6200 new_src = elt->exp;
6201 else
6203 /* Calculate big endian correction for the SUBREG_BYTE.
6204 We have already checked that M1 (GET_MODE (dest))
6205 is not narrower than M2 (new_mode). */
6206 if (BYTES_BIG_ENDIAN)
6207 byte = (GET_MODE_SIZE (GET_MODE (dest))
6208 - GET_MODE_SIZE (new_mode));
6210 new_src = simplify_gen_subreg (new_mode, elt->exp,
6211 GET_MODE (dest), byte);
6214 /* The call to simplify_gen_subreg fails if the value
6215 is VOIDmode, yet we can't do any simplification, e.g.
6216 for EXPR_LISTs denoting function call results.
6217 It is invalid to construct a SUBREG with a VOIDmode
6218 SUBREG_REG, hence a zero new_src means we can't do
6219 this substitution. */
6220 if (! new_src)
6221 continue;
6223 src_hash = HASH (new_src, new_mode);
6224 src_elt = lookup (new_src, src_hash, new_mode);
6226 /* Put the new source in the hash table is if isn't
6227 already. */
6228 if (src_elt == 0)
6230 if (insert_regs (new_src, classp, 0))
6232 rehash_using_reg (new_src);
6233 src_hash = HASH (new_src, new_mode);
6235 src_elt = insert (new_src, classp, src_hash, new_mode);
6236 src_elt->in_memory = elt->in_memory;
6238 else if (classp && classp != src_elt->first_same_value)
6239 /* Show that two things that we've seen before are
6240 actually the same. */
6241 merge_equiv_classes (src_elt, classp);
6243 classp = src_elt->first_same_value;
6244 /* Ignore invalid entries. */
6245 while (classp
6246 && GET_CODE (classp->exp) != REG
6247 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6248 classp = classp->next_same_value;
6253 /* Special handling for (set REG0 REG1) where REG0 is the
6254 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6255 be used in the sequel, so (if easily done) change this insn to
6256 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6257 that computed their value. Then REG1 will become a dead store
6258 and won't cloud the situation for later optimizations.
6260 Do not make this change if REG1 is a hard register, because it will
6261 then be used in the sequel and we may be changing a two-operand insn
6262 into a three-operand insn.
6264 Also do not do this if we are operating on a copy of INSN.
6266 Also don't do this if INSN ends a libcall; this would cause an unrelated
6267 register to be set in the middle of a libcall, and we then get bad code
6268 if the libcall is deleted. */
6270 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6271 && NEXT_INSN (PREV_INSN (insn)) == insn
6272 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6273 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6274 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6276 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6277 struct qty_table_elem *src_ent = &qty_table[src_q];
6279 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6280 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6282 rtx prev = insn;
6283 /* Scan for the previous nonnote insn, but stop at a basic
6284 block boundary. */
6287 prev = PREV_INSN (prev);
6289 while (prev && GET_CODE (prev) == NOTE
6290 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6292 /* Do not swap the registers around if the previous instruction
6293 attaches a REG_EQUIV note to REG1.
6295 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6296 from the pseudo that originally shadowed an incoming argument
6297 to another register. Some uses of REG_EQUIV might rely on it
6298 being attached to REG1 rather than REG2.
6300 This section previously turned the REG_EQUIV into a REG_EQUAL
6301 note. We cannot do that because REG_EQUIV may provide an
6302 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6304 if (prev != 0 && GET_CODE (prev) == INSN
6305 && GET_CODE (PATTERN (prev)) == SET
6306 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6307 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6309 rtx dest = SET_DEST (sets[0].rtl);
6310 rtx src = SET_SRC (sets[0].rtl);
6311 rtx note;
6313 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6314 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6315 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6316 apply_change_group ();
6318 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6319 any REG_WAS_0 note on INSN to PREV. */
6320 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6321 if (note)
6322 remove_note (prev, note);
6324 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6325 if (note)
6327 remove_note (insn, note);
6328 XEXP (note, 1) = REG_NOTES (prev);
6329 REG_NOTES (prev) = note;
6332 /* If INSN has a REG_EQUAL note, and this note mentions
6333 REG0, then we must delete it, because the value in
6334 REG0 has changed. If the note's value is REG1, we must
6335 also delete it because that is now this insn's dest. */
6336 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6337 if (note != 0
6338 && (reg_mentioned_p (dest, XEXP (note, 0))
6339 || rtx_equal_p (src, XEXP (note, 0))))
6340 remove_note (insn, note);
6345 /* If this is a conditional jump insn, record any known equivalences due to
6346 the condition being tested. */
6348 last_jump_equiv_class = 0;
6349 if (GET_CODE (insn) == JUMP_INSN
6350 && n_sets == 1 && GET_CODE (x) == SET
6351 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6352 record_jump_equiv (insn, 0);
6354 #ifdef HAVE_cc0
6355 /* If the previous insn set CC0 and this insn no longer references CC0,
6356 delete the previous insn. Here we use the fact that nothing expects CC0
6357 to be valid over an insn, which is true until the final pass. */
6358 if (prev_insn && GET_CODE (prev_insn) == INSN
6359 && (tem = single_set (prev_insn)) != 0
6360 && SET_DEST (tem) == cc0_rtx
6361 && ! reg_mentioned_p (cc0_rtx, x))
6362 delete_insn (prev_insn);
6364 prev_insn_cc0 = this_insn_cc0;
6365 prev_insn_cc0_mode = this_insn_cc0_mode;
6366 prev_insn = insn;
6367 #endif
6370 /* Remove from the hash table all expressions that reference memory. */
6372 static void
6373 invalidate_memory ()
6375 int i;
6376 struct table_elt *p, *next;
6378 for (i = 0; i < HASH_SIZE; i++)
6379 for (p = table[i]; p; p = next)
6381 next = p->next_same_hash;
6382 if (p->in_memory)
6383 remove_from_table (p, i);
6387 /* If ADDR is an address that implicitly affects the stack pointer, return
6388 1 and update the register tables to show the effect. Else, return 0. */
6390 static int
6391 addr_affects_sp_p (addr)
6392 rtx addr;
6394 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6395 && GET_CODE (XEXP (addr, 0)) == REG
6396 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6398 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6400 REG_TICK (STACK_POINTER_REGNUM)++;
6401 /* Is it possible to use a subreg of SP? */
6402 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6405 /* This should be *very* rare. */
6406 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6407 invalidate (stack_pointer_rtx, VOIDmode);
6409 return 1;
6412 return 0;
6415 /* Perform invalidation on the basis of everything about an insn
6416 except for invalidating the actual places that are SET in it.
6417 This includes the places CLOBBERed, and anything that might
6418 alias with something that is SET or CLOBBERed.
6420 X is the pattern of the insn. */
6422 static void
6423 invalidate_from_clobbers (x)
6424 rtx x;
6426 if (GET_CODE (x) == CLOBBER)
6428 rtx ref = XEXP (x, 0);
6429 if (ref)
6431 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6432 || GET_CODE (ref) == MEM)
6433 invalidate (ref, VOIDmode);
6434 else if (GET_CODE (ref) == STRICT_LOW_PART
6435 || GET_CODE (ref) == ZERO_EXTRACT)
6436 invalidate (XEXP (ref, 0), GET_MODE (ref));
6439 else if (GET_CODE (x) == PARALLEL)
6441 int i;
6442 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6444 rtx y = XVECEXP (x, 0, i);
6445 if (GET_CODE (y) == CLOBBER)
6447 rtx ref = XEXP (y, 0);
6448 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6449 || GET_CODE (ref) == MEM)
6450 invalidate (ref, VOIDmode);
6451 else if (GET_CODE (ref) == STRICT_LOW_PART
6452 || GET_CODE (ref) == ZERO_EXTRACT)
6453 invalidate (XEXP (ref, 0), GET_MODE (ref));
6459 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6460 and replace any registers in them with either an equivalent constant
6461 or the canonical form of the register. If we are inside an address,
6462 only do this if the address remains valid.
6464 OBJECT is 0 except when within a MEM in which case it is the MEM.
6466 Return the replacement for X. */
6468 static rtx
6469 cse_process_notes (x, object)
6470 rtx x;
6471 rtx object;
6473 enum rtx_code code = GET_CODE (x);
6474 const char *fmt = GET_RTX_FORMAT (code);
6475 int i;
6477 switch (code)
6479 case CONST_INT:
6480 case CONST:
6481 case SYMBOL_REF:
6482 case LABEL_REF:
6483 case CONST_DOUBLE:
6484 case CONST_VECTOR:
6485 case PC:
6486 case CC0:
6487 case LO_SUM:
6488 return x;
6490 case MEM:
6491 validate_change (x, &XEXP (x, 0),
6492 cse_process_notes (XEXP (x, 0), x), 0);
6493 return x;
6495 case EXPR_LIST:
6496 case INSN_LIST:
6497 if (REG_NOTE_KIND (x) == REG_EQUAL)
6498 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6499 if (XEXP (x, 1))
6500 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6501 return x;
6503 case SIGN_EXTEND:
6504 case ZERO_EXTEND:
6505 case SUBREG:
6507 rtx new = cse_process_notes (XEXP (x, 0), object);
6508 /* We don't substitute VOIDmode constants into these rtx,
6509 since they would impede folding. */
6510 if (GET_MODE (new) != VOIDmode)
6511 validate_change (object, &XEXP (x, 0), new, 0);
6512 return x;
6515 case REG:
6516 i = REG_QTY (REGNO (x));
6518 /* Return a constant or a constant register. */
6519 if (REGNO_QTY_VALID_P (REGNO (x)))
6521 struct qty_table_elem *ent = &qty_table[i];
6523 if (ent->const_rtx != NULL_RTX
6524 && (CONSTANT_P (ent->const_rtx)
6525 || GET_CODE (ent->const_rtx) == REG))
6527 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6528 if (new)
6529 return new;
6533 /* Otherwise, canonicalize this register. */
6534 return canon_reg (x, NULL_RTX);
6536 default:
6537 break;
6540 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6541 if (fmt[i] == 'e')
6542 validate_change (object, &XEXP (x, i),
6543 cse_process_notes (XEXP (x, i), object), 0);
6545 return x;
6548 /* Find common subexpressions between the end test of a loop and the beginning
6549 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6551 Often we have a loop where an expression in the exit test is used
6552 in the body of the loop. For example "while (*p) *q++ = *p++;".
6553 Because of the way we duplicate the loop exit test in front of the loop,
6554 however, we don't detect that common subexpression. This will be caught
6555 when global cse is implemented, but this is a quite common case.
6557 This function handles the most common cases of these common expressions.
6558 It is called after we have processed the basic block ending with the
6559 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6560 jumps to a label used only once. */
6562 static void
6563 cse_around_loop (loop_start)
6564 rtx loop_start;
6566 rtx insn;
6567 int i;
6568 struct table_elt *p;
6570 /* If the jump at the end of the loop doesn't go to the start, we don't
6571 do anything. */
6572 for (insn = PREV_INSN (loop_start);
6573 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6574 insn = PREV_INSN (insn))
6577 if (insn == 0
6578 || GET_CODE (insn) != NOTE
6579 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6580 return;
6582 /* If the last insn of the loop (the end test) was an NE comparison,
6583 we will interpret it as an EQ comparison, since we fell through
6584 the loop. Any equivalences resulting from that comparison are
6585 therefore not valid and must be invalidated. */
6586 if (last_jump_equiv_class)
6587 for (p = last_jump_equiv_class->first_same_value; p;
6588 p = p->next_same_value)
6590 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6591 || (GET_CODE (p->exp) == SUBREG
6592 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6593 invalidate (p->exp, VOIDmode);
6594 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6595 || GET_CODE (p->exp) == ZERO_EXTRACT)
6596 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6599 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6600 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6602 The only thing we do with SET_DEST is invalidate entries, so we
6603 can safely process each SET in order. It is slightly less efficient
6604 to do so, but we only want to handle the most common cases.
6606 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6607 These pseudos won't have valid entries in any of the tables indexed
6608 by register number, such as reg_qty. We avoid out-of-range array
6609 accesses by not processing any instructions created after cse started. */
6611 for (insn = NEXT_INSN (loop_start);
6612 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6613 && INSN_UID (insn) < max_insn_uid
6614 && ! (GET_CODE (insn) == NOTE
6615 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6616 insn = NEXT_INSN (insn))
6618 if (INSN_P (insn)
6619 && (GET_CODE (PATTERN (insn)) == SET
6620 || GET_CODE (PATTERN (insn)) == CLOBBER))
6621 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6622 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6623 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6624 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6625 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6626 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6627 loop_start);
6631 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6632 since they are done elsewhere. This function is called via note_stores. */
6634 static void
6635 invalidate_skipped_set (dest, set, data)
6636 rtx set;
6637 rtx dest;
6638 void *data ATTRIBUTE_UNUSED;
6640 enum rtx_code code = GET_CODE (dest);
6642 if (code == MEM
6643 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6644 /* There are times when an address can appear varying and be a PLUS
6645 during this scan when it would be a fixed address were we to know
6646 the proper equivalences. So invalidate all memory if there is
6647 a BLKmode or nonscalar memory reference or a reference to a
6648 variable address. */
6649 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6650 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6652 invalidate_memory ();
6653 return;
6656 if (GET_CODE (set) == CLOBBER
6657 || CC0_P (dest)
6658 || dest == pc_rtx)
6659 return;
6661 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6662 invalidate (XEXP (dest, 0), GET_MODE (dest));
6663 else if (code == REG || code == SUBREG || code == MEM)
6664 invalidate (dest, VOIDmode);
6667 /* Invalidate all insns from START up to the end of the function or the
6668 next label. This called when we wish to CSE around a block that is
6669 conditionally executed. */
6671 static void
6672 invalidate_skipped_block (start)
6673 rtx start;
6675 rtx insn;
6677 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6678 insn = NEXT_INSN (insn))
6680 if (! INSN_P (insn))
6681 continue;
6683 if (GET_CODE (insn) == CALL_INSN)
6685 if (! CONST_OR_PURE_CALL_P (insn))
6686 invalidate_memory ();
6687 invalidate_for_call ();
6690 invalidate_from_clobbers (PATTERN (insn));
6691 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6695 /* If modifying X will modify the value in *DATA (which is really an
6696 `rtx *'), indicate that fact by setting the pointed to value to
6697 NULL_RTX. */
6699 static void
6700 cse_check_loop_start (x, set, data)
6701 rtx x;
6702 rtx set ATTRIBUTE_UNUSED;
6703 void *data;
6705 rtx *cse_check_loop_start_value = (rtx *) data;
6707 if (*cse_check_loop_start_value == NULL_RTX
6708 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6709 return;
6711 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6712 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6713 *cse_check_loop_start_value = NULL_RTX;
6716 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6717 a loop that starts with the label at LOOP_START.
6719 If X is a SET, we see if its SET_SRC is currently in our hash table.
6720 If so, we see if it has a value equal to some register used only in the
6721 loop exit code (as marked by jump.c).
6723 If those two conditions are true, we search backwards from the start of
6724 the loop to see if that same value was loaded into a register that still
6725 retains its value at the start of the loop.
6727 If so, we insert an insn after the load to copy the destination of that
6728 load into the equivalent register and (try to) replace our SET_SRC with that
6729 register.
6731 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6733 static void
6734 cse_set_around_loop (x, insn, loop_start)
6735 rtx x;
6736 rtx insn;
6737 rtx loop_start;
6739 struct table_elt *src_elt;
6741 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6742 are setting PC or CC0 or whose SET_SRC is already a register. */
6743 if (GET_CODE (x) == SET
6744 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6745 && GET_CODE (SET_SRC (x)) != REG)
6747 src_elt = lookup (SET_SRC (x),
6748 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6749 GET_MODE (SET_DEST (x)));
6751 if (src_elt)
6752 for (src_elt = src_elt->first_same_value; src_elt;
6753 src_elt = src_elt->next_same_value)
6754 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6755 && COST (src_elt->exp) < COST (SET_SRC (x)))
6757 rtx p, set;
6759 /* Look for an insn in front of LOOP_START that sets
6760 something in the desired mode to SET_SRC (x) before we hit
6761 a label or CALL_INSN. */
6763 for (p = prev_nonnote_insn (loop_start);
6764 p && GET_CODE (p) != CALL_INSN
6765 && GET_CODE (p) != CODE_LABEL;
6766 p = prev_nonnote_insn (p))
6767 if ((set = single_set (p)) != 0
6768 && GET_CODE (SET_DEST (set)) == REG
6769 && GET_MODE (SET_DEST (set)) == src_elt->mode
6770 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6772 /* We now have to ensure that nothing between P
6773 and LOOP_START modified anything referenced in
6774 SET_SRC (x). We know that nothing within the loop
6775 can modify it, or we would have invalidated it in
6776 the hash table. */
6777 rtx q;
6778 rtx cse_check_loop_start_value = SET_SRC (x);
6779 for (q = p; q != loop_start; q = NEXT_INSN (q))
6780 if (INSN_P (q))
6781 note_stores (PATTERN (q),
6782 cse_check_loop_start,
6783 &cse_check_loop_start_value);
6785 /* If nothing was changed and we can replace our
6786 SET_SRC, add an insn after P to copy its destination
6787 to what we will be replacing SET_SRC with. */
6788 if (cse_check_loop_start_value
6789 && single_set (p)
6790 && !can_throw_internal (insn)
6791 && validate_change (insn, &SET_SRC (x),
6792 src_elt->exp, 0))
6794 /* If this creates new pseudos, this is unsafe,
6795 because the regno of new pseudo is unsuitable
6796 to index into reg_qty when cse_insn processes
6797 the new insn. Therefore, if a new pseudo was
6798 created, discard this optimization. */
6799 int nregs = max_reg_num ();
6800 rtx move
6801 = gen_move_insn (src_elt->exp, SET_DEST (set));
6802 if (nregs != max_reg_num ())
6804 if (! validate_change (insn, &SET_SRC (x),
6805 SET_SRC (set), 0))
6806 abort ();
6808 else
6809 emit_insn_after (move, p);
6811 break;
6816 /* Deal with the destination of X affecting the stack pointer. */
6817 addr_affects_sp_p (SET_DEST (x));
6819 /* See comment on similar code in cse_insn for explanation of these
6820 tests. */
6821 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6822 || GET_CODE (SET_DEST (x)) == MEM)
6823 invalidate (SET_DEST (x), VOIDmode);
6824 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6825 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6826 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6829 /* Find the end of INSN's basic block and return its range,
6830 the total number of SETs in all the insns of the block, the last insn of the
6831 block, and the branch path.
6833 The branch path indicates which branches should be followed. If a nonzero
6834 path size is specified, the block should be rescanned and a different set
6835 of branches will be taken. The branch path is only used if
6836 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6838 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6839 used to describe the block. It is filled in with the information about
6840 the current block. The incoming structure's branch path, if any, is used
6841 to construct the output branch path. */
6843 void
6844 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6845 rtx insn;
6846 struct cse_basic_block_data *data;
6847 int follow_jumps;
6848 int after_loop;
6849 int skip_blocks;
6851 rtx p = insn, q;
6852 int nsets = 0;
6853 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6854 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6855 int path_size = data->path_size;
6856 int path_entry = 0;
6857 int i;
6859 /* Update the previous branch path, if any. If the last branch was
6860 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6861 shorten the path by one and look at the previous branch. We know that
6862 at least one branch must have been taken if PATH_SIZE is nonzero. */
6863 while (path_size > 0)
6865 if (data->path[path_size - 1].status != NOT_TAKEN)
6867 data->path[path_size - 1].status = NOT_TAKEN;
6868 break;
6870 else
6871 path_size--;
6874 /* If the first instruction is marked with QImode, that means we've
6875 already processed this block. Our caller will look at DATA->LAST
6876 to figure out where to go next. We want to return the next block
6877 in the instruction stream, not some branched-to block somewhere
6878 else. We accomplish this by pretending our called forbid us to
6879 follow jumps, or skip blocks. */
6880 if (GET_MODE (insn) == QImode)
6881 follow_jumps = skip_blocks = 0;
6883 /* Scan to end of this basic block. */
6884 while (p && GET_CODE (p) != CODE_LABEL)
6886 /* Don't cse out the end of a loop. This makes a difference
6887 only for the unusual loops that always execute at least once;
6888 all other loops have labels there so we will stop in any case.
6889 Cse'ing out the end of the loop is dangerous because it
6890 might cause an invariant expression inside the loop
6891 to be reused after the end of the loop. This would make it
6892 hard to move the expression out of the loop in loop.c,
6893 especially if it is one of several equivalent expressions
6894 and loop.c would like to eliminate it.
6896 If we are running after loop.c has finished, we can ignore
6897 the NOTE_INSN_LOOP_END. */
6899 if (! after_loop && GET_CODE (p) == NOTE
6900 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6901 break;
6903 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6904 the regs restored by the longjmp come from
6905 a later time than the setjmp. */
6906 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6907 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6908 break;
6910 /* A PARALLEL can have lots of SETs in it,
6911 especially if it is really an ASM_OPERANDS. */
6912 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6913 nsets += XVECLEN (PATTERN (p), 0);
6914 else if (GET_CODE (p) != NOTE)
6915 nsets += 1;
6917 /* Ignore insns made by CSE; they cannot affect the boundaries of
6918 the basic block. */
6920 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6921 high_cuid = INSN_CUID (p);
6922 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6923 low_cuid = INSN_CUID (p);
6925 /* See if this insn is in our branch path. If it is and we are to
6926 take it, do so. */
6927 if (path_entry < path_size && data->path[path_entry].branch == p)
6929 if (data->path[path_entry].status != NOT_TAKEN)
6930 p = JUMP_LABEL (p);
6932 /* Point to next entry in path, if any. */
6933 path_entry++;
6936 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6937 was specified, we haven't reached our maximum path length, there are
6938 insns following the target of the jump, this is the only use of the
6939 jump label, and the target label is preceded by a BARRIER.
6941 Alternatively, we can follow the jump if it branches around a
6942 block of code and there are no other branches into the block.
6943 In this case invalidate_skipped_block will be called to invalidate any
6944 registers set in the block when following the jump. */
6946 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6947 && GET_CODE (p) == JUMP_INSN
6948 && GET_CODE (PATTERN (p)) == SET
6949 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6950 && JUMP_LABEL (p) != 0
6951 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6952 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6954 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6955 if ((GET_CODE (q) != NOTE
6956 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6957 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6958 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6959 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6960 break;
6962 /* If we ran into a BARRIER, this code is an extension of the
6963 basic block when the branch is taken. */
6964 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6966 /* Don't allow ourself to keep walking around an
6967 always-executed loop. */
6968 if (next_real_insn (q) == next)
6970 p = NEXT_INSN (p);
6971 continue;
6974 /* Similarly, don't put a branch in our path more than once. */
6975 for (i = 0; i < path_entry; i++)
6976 if (data->path[i].branch == p)
6977 break;
6979 if (i != path_entry)
6980 break;
6982 data->path[path_entry].branch = p;
6983 data->path[path_entry++].status = TAKEN;
6985 /* This branch now ends our path. It was possible that we
6986 didn't see this branch the last time around (when the
6987 insn in front of the target was a JUMP_INSN that was
6988 turned into a no-op). */
6989 path_size = path_entry;
6991 p = JUMP_LABEL (p);
6992 /* Mark block so we won't scan it again later. */
6993 PUT_MODE (NEXT_INSN (p), QImode);
6995 /* Detect a branch around a block of code. */
6996 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6998 rtx tmp;
7000 if (next_real_insn (q) == next)
7002 p = NEXT_INSN (p);
7003 continue;
7006 for (i = 0; i < path_entry; i++)
7007 if (data->path[i].branch == p)
7008 break;
7010 if (i != path_entry)
7011 break;
7013 /* This is no_labels_between_p (p, q) with an added check for
7014 reaching the end of a function (in case Q precedes P). */
7015 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
7016 if (GET_CODE (tmp) == CODE_LABEL)
7017 break;
7019 if (tmp == q)
7021 data->path[path_entry].branch = p;
7022 data->path[path_entry++].status = AROUND;
7024 path_size = path_entry;
7026 p = JUMP_LABEL (p);
7027 /* Mark block so we won't scan it again later. */
7028 PUT_MODE (NEXT_INSN (p), QImode);
7032 p = NEXT_INSN (p);
7035 data->low_cuid = low_cuid;
7036 data->high_cuid = high_cuid;
7037 data->nsets = nsets;
7038 data->last = p;
7040 /* If all jumps in the path are not taken, set our path length to zero
7041 so a rescan won't be done. */
7042 for (i = path_size - 1; i >= 0; i--)
7043 if (data->path[i].status != NOT_TAKEN)
7044 break;
7046 if (i == -1)
7047 data->path_size = 0;
7048 else
7049 data->path_size = path_size;
7051 /* End the current branch path. */
7052 data->path[path_size].branch = 0;
7055 /* Perform cse on the instructions of a function.
7056 F is the first instruction.
7057 NREGS is one plus the highest pseudo-reg number used in the instruction.
7059 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7060 (only if -frerun-cse-after-loop).
7062 Returns 1 if jump_optimize should be redone due to simplifications
7063 in conditional jump instructions. */
7066 cse_main (f, nregs, after_loop, file)
7067 rtx f;
7068 int nregs;
7069 int after_loop;
7070 FILE *file;
7072 struct cse_basic_block_data val;
7073 rtx insn = f;
7074 int i;
7076 val.path = xmalloc (sizeof (struct branch_path)
7077 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7079 cse_jumps_altered = 0;
7080 recorded_label_ref = 0;
7081 constant_pool_entries_cost = 0;
7082 val.path_size = 0;
7084 init_recog ();
7085 init_alias_analysis ();
7087 max_reg = nregs;
7089 max_insn_uid = get_max_uid ();
7091 reg_eqv_table = (struct reg_eqv_elem *)
7092 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7094 #ifdef LOAD_EXTEND_OP
7096 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7097 and change the code and mode as appropriate. */
7098 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7099 #endif
7101 /* Reset the counter indicating how many elements have been made
7102 thus far. */
7103 n_elements_made = 0;
7105 /* Find the largest uid. */
7107 max_uid = get_max_uid ();
7108 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7110 /* Compute the mapping from uids to cuids.
7111 CUIDs are numbers assigned to insns, like uids,
7112 except that cuids increase monotonically through the code.
7113 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7114 between two insns is not affected by -g. */
7116 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7118 if (GET_CODE (insn) != NOTE
7119 || NOTE_LINE_NUMBER (insn) < 0)
7120 INSN_CUID (insn) = ++i;
7121 else
7122 /* Give a line number note the same cuid as preceding insn. */
7123 INSN_CUID (insn) = i;
7126 ggc_push_context ();
7128 /* Loop over basic blocks.
7129 Compute the maximum number of qty's needed for each basic block
7130 (which is 2 for each SET). */
7131 insn = f;
7132 while (insn)
7134 cse_altered = 0;
7135 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7136 flag_cse_skip_blocks);
7138 /* If this basic block was already processed or has no sets, skip it. */
7139 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7141 PUT_MODE (insn, VOIDmode);
7142 insn = (val.last ? NEXT_INSN (val.last) : 0);
7143 val.path_size = 0;
7144 continue;
7147 cse_basic_block_start = val.low_cuid;
7148 cse_basic_block_end = val.high_cuid;
7149 max_qty = val.nsets * 2;
7151 if (file)
7152 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7153 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7154 val.nsets);
7156 /* Make MAX_QTY bigger to give us room to optimize
7157 past the end of this basic block, if that should prove useful. */
7158 if (max_qty < 500)
7159 max_qty = 500;
7161 max_qty += max_reg;
7163 /* If this basic block is being extended by following certain jumps,
7164 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7165 Otherwise, we start after this basic block. */
7166 if (val.path_size > 0)
7167 cse_basic_block (insn, val.last, val.path, 0);
7168 else
7170 int old_cse_jumps_altered = cse_jumps_altered;
7171 rtx temp;
7173 /* When cse changes a conditional jump to an unconditional
7174 jump, we want to reprocess the block, since it will give
7175 us a new branch path to investigate. */
7176 cse_jumps_altered = 0;
7177 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7178 if (cse_jumps_altered == 0
7179 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7180 insn = temp;
7182 cse_jumps_altered |= old_cse_jumps_altered;
7185 if (cse_altered)
7186 ggc_collect ();
7188 #ifdef USE_C_ALLOCA
7189 alloca (0);
7190 #endif
7193 ggc_pop_context ();
7195 if (max_elements_made < n_elements_made)
7196 max_elements_made = n_elements_made;
7198 /* Clean up. */
7199 end_alias_analysis ();
7200 free (uid_cuid);
7201 free (reg_eqv_table);
7202 free (val.path);
7204 return cse_jumps_altered || recorded_label_ref;
7207 /* Process a single basic block. FROM and TO and the limits of the basic
7208 block. NEXT_BRANCH points to the branch path when following jumps or
7209 a null path when not following jumps.
7211 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7212 loop. This is true when we are being called for the last time on a
7213 block and this CSE pass is before loop.c. */
7215 static rtx
7216 cse_basic_block (from, to, next_branch, around_loop)
7217 rtx from, to;
7218 struct branch_path *next_branch;
7219 int around_loop;
7221 rtx insn;
7222 int to_usage = 0;
7223 rtx libcall_insn = NULL_RTX;
7224 int num_insns = 0;
7226 /* This array is undefined before max_reg, so only allocate
7227 the space actually needed and adjust the start. */
7229 qty_table
7230 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7231 * sizeof (struct qty_table_elem));
7232 qty_table -= max_reg;
7234 new_basic_block ();
7236 /* TO might be a label. If so, protect it from being deleted. */
7237 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7238 ++LABEL_NUSES (to);
7240 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7242 enum rtx_code code = GET_CODE (insn);
7244 /* If we have processed 1,000 insns, flush the hash table to
7245 avoid extreme quadratic behavior. We must not include NOTEs
7246 in the count since there may be more of them when generating
7247 debugging information. If we clear the table at different
7248 times, code generated with -g -O might be different than code
7249 generated with -O but not -g.
7251 ??? This is a real kludge and needs to be done some other way.
7252 Perhaps for 2.9. */
7253 if (code != NOTE && num_insns++ > 1000)
7255 flush_hash_table ();
7256 num_insns = 0;
7259 /* See if this is a branch that is part of the path. If so, and it is
7260 to be taken, do so. */
7261 if (next_branch->branch == insn)
7263 enum taken status = next_branch++->status;
7264 if (status != NOT_TAKEN)
7266 if (status == TAKEN)
7267 record_jump_equiv (insn, 1);
7268 else
7269 invalidate_skipped_block (NEXT_INSN (insn));
7271 /* Set the last insn as the jump insn; it doesn't affect cc0.
7272 Then follow this branch. */
7273 #ifdef HAVE_cc0
7274 prev_insn_cc0 = 0;
7275 prev_insn = insn;
7276 #endif
7277 insn = JUMP_LABEL (insn);
7278 continue;
7282 if (GET_MODE (insn) == QImode)
7283 PUT_MODE (insn, VOIDmode);
7285 if (GET_RTX_CLASS (code) == 'i')
7287 rtx p;
7289 /* Process notes first so we have all notes in canonical forms when
7290 looking for duplicate operations. */
7292 if (REG_NOTES (insn))
7293 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7295 /* Track when we are inside in LIBCALL block. Inside such a block,
7296 we do not want to record destinations. The last insn of a
7297 LIBCALL block is not considered to be part of the block, since
7298 its destination is the result of the block and hence should be
7299 recorded. */
7301 if (REG_NOTES (insn) != 0)
7303 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7304 libcall_insn = XEXP (p, 0);
7305 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7306 libcall_insn = 0;
7309 cse_insn (insn, libcall_insn);
7311 /* If we haven't already found an insn where we added a LABEL_REF,
7312 check this one. */
7313 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7314 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7315 (void *) insn))
7316 recorded_label_ref = 1;
7319 /* If INSN is now an unconditional jump, skip to the end of our
7320 basic block by pretending that we just did the last insn in the
7321 basic block. If we are jumping to the end of our block, show
7322 that we can have one usage of TO. */
7324 if (any_uncondjump_p (insn))
7326 if (to == 0)
7328 free (qty_table + max_reg);
7329 return 0;
7332 if (JUMP_LABEL (insn) == to)
7333 to_usage = 1;
7335 /* Maybe TO was deleted because the jump is unconditional.
7336 If so, there is nothing left in this basic block. */
7337 /* ??? Perhaps it would be smarter to set TO
7338 to whatever follows this insn,
7339 and pretend the basic block had always ended here. */
7340 if (INSN_DELETED_P (to))
7341 break;
7343 insn = PREV_INSN (to);
7346 /* See if it is ok to keep on going past the label
7347 which used to end our basic block. Remember that we incremented
7348 the count of that label, so we decrement it here. If we made
7349 a jump unconditional, TO_USAGE will be one; in that case, we don't
7350 want to count the use in that jump. */
7352 if (to != 0 && NEXT_INSN (insn) == to
7353 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7355 struct cse_basic_block_data val;
7356 rtx prev;
7358 insn = NEXT_INSN (to);
7360 /* If TO was the last insn in the function, we are done. */
7361 if (insn == 0)
7363 free (qty_table + max_reg);
7364 return 0;
7367 /* If TO was preceded by a BARRIER we are done with this block
7368 because it has no continuation. */
7369 prev = prev_nonnote_insn (to);
7370 if (prev && GET_CODE (prev) == BARRIER)
7372 free (qty_table + max_reg);
7373 return insn;
7376 /* Find the end of the following block. Note that we won't be
7377 following branches in this case. */
7378 to_usage = 0;
7379 val.path_size = 0;
7380 val.path = xmalloc (sizeof (struct branch_path)
7381 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7382 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7383 free (val.path);
7385 /* If the tables we allocated have enough space left
7386 to handle all the SETs in the next basic block,
7387 continue through it. Otherwise, return,
7388 and that block will be scanned individually. */
7389 if (val.nsets * 2 + next_qty > max_qty)
7390 break;
7392 cse_basic_block_start = val.low_cuid;
7393 cse_basic_block_end = val.high_cuid;
7394 to = val.last;
7396 /* Prevent TO from being deleted if it is a label. */
7397 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7398 ++LABEL_NUSES (to);
7400 /* Back up so we process the first insn in the extension. */
7401 insn = PREV_INSN (insn);
7405 if (next_qty > max_qty)
7406 abort ();
7408 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7409 the previous insn is the only insn that branches to the head of a loop,
7410 we can cse into the loop. Don't do this if we changed the jump
7411 structure of a loop unless we aren't going to be following jumps. */
7413 insn = prev_nonnote_insn (to);
7414 if ((cse_jumps_altered == 0
7415 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7416 && around_loop && to != 0
7417 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7418 && GET_CODE (insn) == JUMP_INSN
7419 && JUMP_LABEL (insn) != 0
7420 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7421 cse_around_loop (JUMP_LABEL (insn));
7423 free (qty_table + max_reg);
7425 return to ? NEXT_INSN (to) : 0;
7428 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7429 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7431 static int
7432 check_for_label_ref (rtl, data)
7433 rtx *rtl;
7434 void *data;
7436 rtx insn = (rtx) data;
7438 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7439 we must rerun jump since it needs to place the note. If this is a
7440 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7441 since no REG_LABEL will be added. */
7442 return (GET_CODE (*rtl) == LABEL_REF
7443 && ! LABEL_REF_NONLOCAL_P (*rtl)
7444 && LABEL_P (XEXP (*rtl, 0))
7445 && INSN_UID (XEXP (*rtl, 0)) != 0
7446 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7449 /* Count the number of times registers are used (not set) in X.
7450 COUNTS is an array in which we accumulate the count, INCR is how much
7451 we count each register usage.
7453 Don't count a usage of DEST, which is the SET_DEST of a SET which
7454 contains X in its SET_SRC. This is because such a SET does not
7455 modify the liveness of DEST. */
7457 static void
7458 count_reg_usage (x, counts, dest, incr)
7459 rtx x;
7460 int *counts;
7461 rtx dest;
7462 int incr;
7464 enum rtx_code code;
7465 rtx note;
7466 const char *fmt;
7467 int i, j;
7469 if (x == 0)
7470 return;
7472 switch (code = GET_CODE (x))
7474 case REG:
7475 if (x != dest)
7476 counts[REGNO (x)] += incr;
7477 return;
7479 case PC:
7480 case CC0:
7481 case CONST:
7482 case CONST_INT:
7483 case CONST_DOUBLE:
7484 case CONST_VECTOR:
7485 case SYMBOL_REF:
7486 case LABEL_REF:
7487 return;
7489 case CLOBBER:
7490 /* If we are clobbering a MEM, mark any registers inside the address
7491 as being used. */
7492 if (GET_CODE (XEXP (x, 0)) == MEM)
7493 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7494 return;
7496 case SET:
7497 /* Unless we are setting a REG, count everything in SET_DEST. */
7498 if (GET_CODE (SET_DEST (x)) != REG)
7499 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7500 count_reg_usage (SET_SRC (x), counts,
7501 SET_DEST (x),
7502 incr);
7503 return;
7505 case CALL_INSN:
7506 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7507 /* Fall through. */
7509 case INSN:
7510 case JUMP_INSN:
7511 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7513 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7514 use them. */
7516 note = find_reg_equal_equiv_note (x);
7517 if (note)
7519 rtx eqv = XEXP (note, 0);
7521 if (GET_CODE (eqv) == EXPR_LIST)
7522 /* This REG_EQUAL note describes the result of a function call.
7523 Process all the arguments. */
7526 count_reg_usage (XEXP (eqv, 0), counts, NULL_RTX, incr);
7527 eqv = XEXP (eqv, 1);
7529 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7530 else
7531 count_reg_usage (eqv, counts, NULL_RTX, incr);
7533 return;
7535 case EXPR_LIST:
7536 if (REG_NOTE_KIND (x) == REG_EQUAL
7537 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7538 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7539 involving registers in the address. */
7540 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7541 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7543 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7544 return;
7546 case INSN_LIST:
7547 abort ();
7549 default:
7550 break;
7553 fmt = GET_RTX_FORMAT (code);
7554 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7556 if (fmt[i] == 'e')
7557 count_reg_usage (XEXP (x, i), counts, dest, incr);
7558 else if (fmt[i] == 'E')
7559 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7560 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7564 /* Return true if set is live. */
7565 static bool
7566 set_live_p (set, insn, counts)
7567 rtx set;
7568 rtx insn ATTRIBUTE_UNUSED; /* Only used with HAVE_cc0. */
7569 int *counts;
7571 #ifdef HAVE_cc0
7572 rtx tem;
7573 #endif
7575 if (set_noop_p (set))
7578 #ifdef HAVE_cc0
7579 else if (GET_CODE (SET_DEST (set)) == CC0
7580 && !side_effects_p (SET_SRC (set))
7581 && ((tem = next_nonnote_insn (insn)) == 0
7582 || !INSN_P (tem)
7583 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7584 return false;
7585 #endif
7586 else if (GET_CODE (SET_DEST (set)) != REG
7587 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7588 || counts[REGNO (SET_DEST (set))] != 0
7589 || side_effects_p (SET_SRC (set))
7590 /* An ADDRESSOF expression can turn into a use of the
7591 internal arg pointer, so always consider the
7592 internal arg pointer live. If it is truly dead,
7593 flow will delete the initializing insn. */
7594 || (SET_DEST (set) == current_function_internal_arg_pointer))
7595 return true;
7596 return false;
7599 /* Return true if insn is live. */
7601 static bool
7602 insn_live_p (insn, counts)
7603 rtx insn;
7604 int *counts;
7606 int i;
7607 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7608 return true;
7609 else if (GET_CODE (PATTERN (insn)) == SET)
7610 return set_live_p (PATTERN (insn), insn, counts);
7611 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7613 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7615 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7617 if (GET_CODE (elt) == SET)
7619 if (set_live_p (elt, insn, counts))
7620 return true;
7622 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7623 return true;
7625 return false;
7627 else
7628 return true;
7631 /* Return true if libcall is dead as a whole. */
7633 static bool
7634 dead_libcall_p (insn, counts)
7635 rtx insn;
7636 int *counts;
7638 rtx note, set, new;
7640 /* See if there's a REG_EQUAL note on this insn and try to
7641 replace the source with the REG_EQUAL expression.
7643 We assume that insns with REG_RETVALs can only be reg->reg
7644 copies at this point. */
7645 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7646 if (!note)
7647 return false;
7649 set = single_set (insn);
7650 if (!set)
7651 return false;
7653 new = simplify_rtx (XEXP (note, 0));
7654 if (!new)
7655 new = XEXP (note, 0);
7657 /* While changing insn, we must update the counts accordingly. */
7658 count_reg_usage (insn, counts, NULL_RTX, -1);
7660 if (validate_change (insn, &SET_SRC (set), new, 0))
7662 count_reg_usage (insn, counts, NULL_RTX, 1);
7663 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7664 remove_note (insn, note);
7665 return true;
7668 if (CONSTANT_P (new))
7670 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7671 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7673 count_reg_usage (insn, counts, NULL_RTX, 1);
7674 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7675 remove_note (insn, note);
7676 return true;
7680 count_reg_usage (insn, counts, NULL_RTX, 1);
7681 return false;
7684 /* Scan all the insns and delete any that are dead; i.e., they store a register
7685 that is never used or they copy a register to itself.
7687 This is used to remove insns made obviously dead by cse, loop or other
7688 optimizations. It improves the heuristics in loop since it won't try to
7689 move dead invariants out of loops or make givs for dead quantities. The
7690 remaining passes of the compilation are also sped up. */
7693 delete_trivially_dead_insns (insns, nreg)
7694 rtx insns;
7695 int nreg;
7697 int *counts;
7698 rtx insn, prev;
7699 int in_libcall = 0, dead_libcall = 0;
7700 int ndead = 0, nlastdead, niterations = 0;
7702 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7703 /* First count the number of times each register is used. */
7704 counts = (int *) xcalloc (nreg, sizeof (int));
7705 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7706 count_reg_usage (insn, counts, NULL_RTX, 1);
7710 nlastdead = ndead;
7711 niterations++;
7712 /* Go from the last insn to the first and delete insns that only set unused
7713 registers or copy a register to itself. As we delete an insn, remove
7714 usage counts for registers it uses.
7716 The first jump optimization pass may leave a real insn as the last
7717 insn in the function. We must not skip that insn or we may end
7718 up deleting code that is not really dead. */
7719 insn = get_last_insn ();
7720 if (! INSN_P (insn))
7721 insn = prev_real_insn (insn);
7723 for (; insn; insn = prev)
7725 int live_insn = 0;
7727 prev = prev_real_insn (insn);
7729 /* Don't delete any insns that are part of a libcall block unless
7730 we can delete the whole libcall block.
7732 Flow or loop might get confused if we did that. Remember
7733 that we are scanning backwards. */
7734 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7736 in_libcall = 1;
7737 live_insn = 1;
7738 dead_libcall = dead_libcall_p (insn, counts);
7740 else if (in_libcall)
7741 live_insn = ! dead_libcall;
7742 else
7743 live_insn = insn_live_p (insn, counts);
7745 /* If this is a dead insn, delete it and show registers in it aren't
7746 being used. */
7748 if (! live_insn)
7750 count_reg_usage (insn, counts, NULL_RTX, -1);
7751 delete_insn_and_edges (insn);
7752 ndead++;
7755 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7757 in_libcall = 0;
7758 dead_libcall = 0;
7762 while (ndead != nlastdead);
7764 if (rtl_dump_file && ndead)
7765 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7766 ndead, niterations);
7767 /* Clean up. */
7768 free (counts);
7769 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7770 return ndead;