1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num
= 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num
;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num
;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers
;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl
[GR_MAX
];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
101 REAL_VALUE_TYPE dconst0
;
102 REAL_VALUE_TYPE dconst1
;
103 REAL_VALUE_TYPE dconst2
;
104 REAL_VALUE_TYPE dconstm1
;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab
;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn
;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 /* This is where the pointer to the obstack being used for RTL is stored. */
174 extern struct obstack
*rtl_obstack
;
176 static rtx make_jump_insn_raw
PARAMS ((rtx
));
177 static rtx make_call_insn_raw
PARAMS ((rtx
));
178 static rtx find_line_note
PARAMS ((rtx
));
179 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
180 static void unshare_all_rtl_1
PARAMS ((rtx
));
181 static void unshare_all_decls
PARAMS ((tree
));
182 static void reset_used_decls
PARAMS ((tree
));
183 static hashval_t const_int_htab_hash
PARAMS ((const void *));
184 static int const_int_htab_eq
PARAMS ((const void *,
186 static int rtx_htab_mark_1
PARAMS ((void **, void *));
187 static void rtx_htab_mark
PARAMS ((void *));
190 /* Returns a hash code for X (which is a really a CONST_INT). */
193 const_int_htab_hash (x
)
196 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
199 /* Returns non-zero if the value represented by X (which is really a
200 CONST_INT) is the same as that given by Y (which is really a
204 const_int_htab_eq (x
, y
)
208 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
211 /* Mark the hash-table element X (which is really a pointer to an
215 rtx_htab_mark_1 (x
, data
)
217 void *data ATTRIBUTE_UNUSED
;
223 /* Mark all the elements of HTAB (which is really an htab_t full of
230 htab_traverse (*((htab_t
*) htab
), rtx_htab_mark_1
, NULL
);
233 /* There are some RTL codes that require special attention; the generation
234 functions do the raw handling. If you add to this list, modify
235 special_rtx in gengenrtl.c as well. */
238 gen_rtx_CONST_INT (mode
, arg
)
239 enum machine_mode mode ATTRIBUTE_UNUSED
;
244 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
245 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
247 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
248 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
249 return const_true_rtx
;
252 /* Look up the CONST_INT in the hash table. */
253 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
254 (hashval_t
) arg
, INSERT
);
259 push_obstacks_nochange ();
260 end_temporary_allocation ();
261 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
265 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
271 /* CONST_DOUBLEs needs special handling because their length is known
275 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
276 enum machine_mode mode
;
278 HOST_WIDE_INT arg1
, arg2
;
280 rtx r
= rtx_alloc (CONST_DOUBLE
);
285 X0EXP (r
, 1) = NULL_RTX
;
289 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
296 gen_rtx_REG (mode
, regno
)
297 enum machine_mode mode
;
300 /* In case the MD file explicitly references the frame pointer, have
301 all such references point to the same frame pointer. This is
302 used during frame pointer elimination to distinguish the explicit
303 references to these registers from pseudos that happened to be
306 If we have eliminated the frame pointer or arg pointer, we will
307 be using it as a normal register, for example as a spill
308 register. In such cases, we might be accessing it in a mode that
309 is not Pmode and therefore cannot use the pre-allocated rtx.
311 Also don't do this when we are making new REGs in reload, since
312 we don't want to get confused with the real pointers. */
314 if (mode
== Pmode
&& !reload_in_progress
)
316 if (regno
== FRAME_POINTER_REGNUM
)
317 return frame_pointer_rtx
;
318 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
319 if (regno
== HARD_FRAME_POINTER_REGNUM
)
320 return hard_frame_pointer_rtx
;
322 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
323 if (regno
== ARG_POINTER_REGNUM
)
324 return arg_pointer_rtx
;
326 #ifdef RETURN_ADDRESS_POINTER_REGNUM
327 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
328 return return_address_pointer_rtx
;
330 if (regno
== STACK_POINTER_REGNUM
)
331 return stack_pointer_rtx
;
334 return gen_rtx_raw_REG (mode
, regno
);
338 gen_rtx_MEM (mode
, addr
)
339 enum machine_mode mode
;
342 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
344 /* This field is not cleared by the mere allocation of the rtx, so
346 MEM_ALIAS_SET (rt
) = 0;
351 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
353 ** This routine generates an RTX of the size specified by
354 ** <code>, which is an RTX code. The RTX structure is initialized
355 ** from the arguments <element1> through <elementn>, which are
356 ** interpreted according to the specific RTX type's format. The
357 ** special machine mode associated with the rtx (if any) is specified
360 ** gen_rtx can be invoked in a way which resembles the lisp-like
361 ** rtx it will generate. For example, the following rtx structure:
363 ** (plus:QI (mem:QI (reg:SI 1))
364 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
366 ** ...would be generated by the following C code:
368 ** gen_rtx (PLUS, QImode,
369 ** gen_rtx (MEM, QImode,
370 ** gen_rtx (REG, SImode, 1)),
371 ** gen_rtx (MEM, QImode,
372 ** gen_rtx (PLUS, SImode,
373 ** gen_rtx (REG, SImode, 2),
374 ** gen_rtx (REG, SImode, 3)))),
379 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
381 #ifndef ANSI_PROTOTYPES
383 enum machine_mode mode
;
386 register int i
; /* Array indices... */
387 register const char *fmt
; /* Current rtx's format... */
388 register rtx rt_val
; /* RTX to return to caller... */
392 #ifndef ANSI_PROTOTYPES
393 code
= va_arg (p
, enum rtx_code
);
394 mode
= va_arg (p
, enum machine_mode
);
400 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
405 rtx arg0
= va_arg (p
, rtx
);
406 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
407 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
408 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
413 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
417 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
421 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
422 rt_val
->mode
= mode
; /* Store the machine mode... */
424 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
425 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
429 case '0': /* Unused field. */
432 case 'i': /* An integer? */
433 XINT (rt_val
, i
) = va_arg (p
, int);
436 case 'w': /* A wide integer? */
437 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
440 case 's': /* A string? */
441 XSTR (rt_val
, i
) = va_arg (p
, char *);
444 case 'e': /* An expression? */
445 case 'u': /* An insn? Same except when printing. */
446 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
449 case 'E': /* An RTX vector? */
450 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
453 case 'b': /* A bitmap? */
454 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
457 case 't': /* A tree? */
458 XTREE (rt_val
, i
) = va_arg (p
, tree
);
472 /* gen_rtvec (n, [rt1, ..., rtn])
474 ** This routine creates an rtvec and stores within it the
475 ** pointers to rtx's which are its arguments.
480 gen_rtvec
VPARAMS ((int n
, ...))
482 #ifndef ANSI_PROTOTYPES
491 #ifndef ANSI_PROTOTYPES
496 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
498 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
500 for (i
= 0; i
< n
; i
++)
501 vector
[i
] = va_arg (p
, rtx
);
504 return gen_rtvec_v (n
, vector
);
508 gen_rtvec_v (n
, argp
)
513 register rtvec rt_val
;
516 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
518 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
520 for (i
= 0; i
< n
; i
++)
521 rt_val
->elem
[i
] = *argp
++;
527 /* Generate a REG rtx for a new pseudo register of mode MODE.
528 This pseudo is assigned the next sequential register number. */
532 enum machine_mode mode
;
534 struct function
*f
= cfun
;
537 /* Don't let anything called after initial flow analysis create new
542 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
543 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
545 /* For complex modes, don't make a single pseudo.
546 Instead, make a CONCAT of two pseudos.
547 This allows noncontiguous allocation of the real and imaginary parts,
548 which makes much better code. Besides, allocating DCmode
549 pseudos overstrains reload on some machines like the 386. */
550 rtx realpart
, imagpart
;
551 int size
= GET_MODE_UNIT_SIZE (mode
);
552 enum machine_mode partmode
553 = mode_for_size (size
* BITS_PER_UNIT
,
554 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
555 ? MODE_FLOAT
: MODE_INT
),
558 realpart
= gen_reg_rtx (partmode
);
559 imagpart
= gen_reg_rtx (partmode
);
560 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
563 /* Make sure regno_pointer_flag and regno_reg_rtx are large
564 enough to have an element for this pseudo reg number. */
566 if (reg_rtx_no
== f
->emit
->regno_pointer_flag_length
)
568 int old_size
= f
->emit
->regno_pointer_flag_length
;
571 new = xrealloc (f
->emit
->regno_pointer_flag
, old_size
* 2);
572 memset (new + old_size
, 0, old_size
);
573 f
->emit
->regno_pointer_flag
= new;
575 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
576 memset (new + old_size
, 0, old_size
);
577 f
->emit
->regno_pointer_align
= (unsigned char *) new;
579 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
580 old_size
* 2 * sizeof (rtx
));
581 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
582 regno_reg_rtx
= new1
;
584 f
->emit
->regno_pointer_flag_length
= old_size
* 2;
587 val
= gen_rtx_raw_REG (mode
, reg_rtx_no
);
588 regno_reg_rtx
[reg_rtx_no
++] = val
;
592 /* Identify REG (which may be a CONCAT) as a user register. */
598 if (GET_CODE (reg
) == CONCAT
)
600 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
601 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
603 else if (GET_CODE (reg
) == REG
)
604 REG_USERVAR_P (reg
) = 1;
609 /* Identify REG as a probable pointer register and show its alignment
610 as ALIGN, if nonzero. */
613 mark_reg_pointer (reg
, align
)
617 if (! REGNO_POINTER_FLAG (REGNO (reg
)))
619 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
622 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
624 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
625 /* We can no-longer be sure just how aligned this pointer is */
626 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
629 /* Return 1 plus largest pseudo reg number used in the current function. */
637 /* Return 1 + the largest label number used so far in the current function. */
642 if (last_label_num
&& label_num
== base_label_num
)
643 return last_label_num
;
647 /* Return first label number used in this function (if any were used). */
650 get_first_label_num ()
652 return first_label_num
;
655 /* Return a value representing some low-order bits of X, where the number
656 of low-order bits is given by MODE. Note that no conversion is done
657 between floating-point and fixed-point values, rather, the bit
658 representation is returned.
660 This function handles the cases in common between gen_lowpart, below,
661 and two variants in cse.c and combine.c. These are the cases that can
662 be safely handled at all points in the compilation.
664 If this is not a case we can handle, return 0. */
667 gen_lowpart_common (mode
, x
)
668 enum machine_mode mode
;
673 if (GET_MODE (x
) == mode
)
676 /* MODE must occupy no more words than the mode of X. */
677 if (GET_MODE (x
) != VOIDmode
678 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
679 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
683 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
684 word
= ((GET_MODE_SIZE (GET_MODE (x
))
685 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
688 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
689 && (GET_MODE_CLASS (mode
) == MODE_INT
690 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
692 /* If we are getting the low-order part of something that has been
693 sign- or zero-extended, we can either just use the object being
694 extended or make a narrower extension. If we want an even smaller
695 piece than the size of the object being extended, call ourselves
698 This case is used mostly by combine and cse. */
700 if (GET_MODE (XEXP (x
, 0)) == mode
)
702 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
703 return gen_lowpart_common (mode
, XEXP (x
, 0));
704 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
705 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
707 else if (GET_CODE (x
) == SUBREG
708 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
709 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
710 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
712 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
713 else if (GET_CODE (x
) == REG
)
715 /* Let the backend decide how many registers to skip. This is needed
716 in particular for Sparc64 where fp regs are smaller than a word. */
717 /* ??? Note that subregs are now ambiguous, in that those against
718 pseudos are sized by the Word Size, while those against hard
719 regs are sized by the underlying register size. Better would be
720 to always interpret the subreg offset parameter as bytes or bits. */
722 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
723 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
724 - HARD_REGNO_NREGS (REGNO (x
), mode
));
726 /* If the register is not valid for MODE, return 0. If we don't
727 do this, there is no way to fix up the resulting REG later.
728 But we do do this if the current REG is not valid for its
729 mode. This latter is a kludge, but is required due to the
730 way that parameters are passed on some machines, most
732 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
733 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
734 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
736 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
737 /* integrate.c can't handle parts of a return value register. */
738 && (! REG_FUNCTION_VALUE_P (x
)
739 || ! rtx_equal_function_value_matters
)
740 #ifdef CLASS_CANNOT_CHANGE_MODE
741 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode
, GET_MODE (x
))
742 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
743 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
744 && (TEST_HARD_REG_BIT
745 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
748 /* We want to keep the stack, frame, and arg pointers
750 && x
!= frame_pointer_rtx
751 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
752 && x
!= arg_pointer_rtx
754 && x
!= stack_pointer_rtx
)
755 return gen_rtx_REG (mode
, REGNO (x
) + word
);
757 return gen_rtx_SUBREG (mode
, x
, word
);
759 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
760 from the low-order part of the constant. */
761 else if ((GET_MODE_CLASS (mode
) == MODE_INT
762 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
763 && GET_MODE (x
) == VOIDmode
764 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
766 /* If MODE is twice the host word size, X is already the desired
767 representation. Otherwise, if MODE is wider than a word, we can't
768 do this. If MODE is exactly a word, return just one CONST_INT.
769 If MODE is smaller than a word, clear the bits that don't belong
770 in our mode, unless they and our sign bit are all one. So we get
771 either a reasonable negative value or a reasonable unsigned value
774 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
776 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
778 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
779 return (GET_CODE (x
) == CONST_INT
? x
780 : GEN_INT (CONST_DOUBLE_LOW (x
)));
783 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
784 int width
= GET_MODE_BITSIZE (mode
);
785 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
786 : CONST_DOUBLE_LOW (x
));
788 /* Sign extend to HOST_WIDE_INT. */
789 val
= val
<< (HOST_BITS_PER_WIDE_INT
- width
) >> (HOST_BITS_PER_WIDE_INT
- width
);
791 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
796 #ifndef REAL_ARITHMETIC
797 /* If X is an integral constant but we want it in floating-point, it
798 must be the case that we have a union of an integer and a floating-point
799 value. If the machine-parameters allow it, simulate that union here
800 and return the result. The two-word and single-word cases are
803 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
804 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
805 || flag_pretend_float
)
806 && GET_MODE_CLASS (mode
) == MODE_FLOAT
807 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
808 && GET_CODE (x
) == CONST_INT
809 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
811 union {HOST_WIDE_INT i
; float d
; } u
;
814 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
816 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
817 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
818 || flag_pretend_float
)
819 && GET_MODE_CLASS (mode
) == MODE_FLOAT
820 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
821 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
822 && GET_MODE (x
) == VOIDmode
823 && (sizeof (double) * HOST_BITS_PER_CHAR
824 == 2 * HOST_BITS_PER_WIDE_INT
))
826 union {HOST_WIDE_INT i
[2]; double d
; } u
;
827 HOST_WIDE_INT low
, high
;
829 if (GET_CODE (x
) == CONST_INT
)
830 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
832 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
834 #ifdef HOST_WORDS_BIG_ENDIAN
835 u
.i
[0] = high
, u
.i
[1] = low
;
837 u
.i
[0] = low
, u
.i
[1] = high
;
840 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
843 /* Similarly, if this is converting a floating-point value into a
844 single-word integer. Only do this is the host and target parameters are
847 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
848 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
849 || flag_pretend_float
)
850 && (GET_MODE_CLASS (mode
) == MODE_INT
851 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
852 && GET_CODE (x
) == CONST_DOUBLE
853 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
854 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
855 return operand_subword (x
, word
, 0, GET_MODE (x
));
857 /* Similarly, if this is converting a floating-point value into a
858 two-word integer, we can do this one word at a time and make an
859 integer. Only do this is the host and target parameters are
862 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
863 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
864 || flag_pretend_float
)
865 && (GET_MODE_CLASS (mode
) == MODE_INT
866 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
867 && GET_CODE (x
) == CONST_DOUBLE
868 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
869 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
872 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
874 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
876 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
877 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
878 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
880 #else /* ifndef REAL_ARITHMETIC */
882 /* When we have a FP emulator, we can handle all conversions between
883 FP and integer operands. This simplifies reload because it
884 doesn't have to deal with constructs like (subreg:DI
885 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
887 else if (mode
== SFmode
888 && GET_CODE (x
) == CONST_INT
)
894 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
895 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
897 else if (mode
== DFmode
898 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
899 && GET_MODE (x
) == VOIDmode
)
903 HOST_WIDE_INT low
, high
;
905 if (GET_CODE (x
) == CONST_INT
)
908 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
912 low
= CONST_DOUBLE_LOW (x
);
913 high
= CONST_DOUBLE_HIGH (x
);
916 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
918 if (WORDS_BIG_ENDIAN
)
919 i
[0] = high
, i
[1] = low
;
921 i
[0] = low
, i
[1] = high
;
923 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
924 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
926 else if ((GET_MODE_CLASS (mode
) == MODE_INT
927 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
928 && GET_CODE (x
) == CONST_DOUBLE
929 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
932 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
933 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
935 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
936 switch (GET_MODE (x
))
939 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[endian
]);
943 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
);
945 #if LONG_DOUBLE_TYPE_SIZE == 96
950 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
956 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
958 #if HOST_BITS_PER_WIDE_INT == 32
959 return immed_double_const (i
[endian
], i
[1 - endian
], mode
);
964 if (HOST_BITS_PER_WIDE_INT
!= 64)
967 for (c
= 0; c
< 4; c
++)
970 return immed_double_const (i
[endian
* 3]
971 | (((HOST_WIDE_INT
) i
[1 + endian
]) << 32),
973 | (((HOST_WIDE_INT
) i
[3 - endian
* 3])
979 #endif /* ifndef REAL_ARITHMETIC */
981 /* Otherwise, we can't do this. */
985 /* Return the real part (which has mode MODE) of a complex value X.
986 This always comes at the low address in memory. */
989 gen_realpart (mode
, x
)
990 enum machine_mode mode
;
993 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
995 else if (WORDS_BIG_ENDIAN
996 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
998 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
999 fatal ("Unable to access real part of complex value in a hard register on this target");
1000 else if (WORDS_BIG_ENDIAN
)
1001 return gen_highpart (mode
, x
);
1003 return gen_lowpart (mode
, x
);
1006 /* Return the imaginary part (which has mode MODE) of a complex value X.
1007 This always comes at the high address in memory. */
1010 gen_imagpart (mode
, x
)
1011 enum machine_mode mode
;
1014 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
1016 else if (WORDS_BIG_ENDIAN
)
1017 return gen_lowpart (mode
, x
);
1018 else if (!WORDS_BIG_ENDIAN
1019 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1021 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1022 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1024 return gen_highpart (mode
, x
);
1027 /* Return 1 iff X, assumed to be a SUBREG,
1028 refers to the real part of the complex value in its containing reg.
1029 Complex values are always stored with the real part in the first word,
1030 regardless of WORDS_BIG_ENDIAN. */
1033 subreg_realpart_p (x
)
1036 if (GET_CODE (x
) != SUBREG
)
1039 return ((unsigned int) SUBREG_WORD (x
) * UNITS_PER_WORD
1040 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1043 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1044 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1045 least-significant part of X.
1046 MODE specifies how big a part of X to return;
1047 it usually should not be larger than a word.
1048 If X is a MEM whose address is a QUEUED, the value may be so also. */
1051 gen_lowpart (mode
, x
)
1052 enum machine_mode mode
;
1055 rtx result
= gen_lowpart_common (mode
, x
);
1059 else if (GET_CODE (x
) == REG
)
1061 /* Must be a hard reg that's not valid in MODE. */
1062 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1067 else if (GET_CODE (x
) == MEM
)
1069 /* The only additional case we can do is MEM. */
1070 register int offset
= 0;
1071 if (WORDS_BIG_ENDIAN
)
1072 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1073 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1075 if (BYTES_BIG_ENDIAN
)
1076 /* Adjust the address so that the address-after-the-data
1078 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1079 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1081 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1083 else if (GET_CODE (x
) == ADDRESSOF
)
1084 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1089 /* Like `gen_lowpart', but refer to the most significant part.
1090 This is used to access the imaginary part of a complex number. */
1093 gen_highpart (mode
, x
)
1094 enum machine_mode mode
;
1097 /* This case loses if X is a subreg. To catch bugs early,
1098 complain if an invalid MODE is used even in other cases. */
1099 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1100 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1102 if (GET_CODE (x
) == CONST_DOUBLE
1103 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1104 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
1107 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
1108 else if (GET_CODE (x
) == CONST_INT
)
1110 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
1112 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1114 else if (GET_CODE (x
) == MEM
)
1116 register int offset
= 0;
1117 if (! WORDS_BIG_ENDIAN
)
1118 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1119 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1121 if (! BYTES_BIG_ENDIAN
1122 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1123 offset
-= (GET_MODE_SIZE (mode
)
1124 - MIN (UNITS_PER_WORD
,
1125 GET_MODE_SIZE (GET_MODE (x
))));
1127 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1129 else if (GET_CODE (x
) == SUBREG
)
1131 /* The only time this should occur is when we are looking at a
1132 multi-word item with a SUBREG whose mode is the same as that of the
1133 item. It isn't clear what we would do if it wasn't. */
1134 if (SUBREG_WORD (x
) != 0)
1136 return gen_highpart (mode
, SUBREG_REG (x
));
1138 else if (GET_CODE (x
) == REG
)
1142 /* Let the backend decide how many registers to skip. This is needed
1143 in particular for sparc64 where fp regs are smaller than a word. */
1144 /* ??? Note that subregs are now ambiguous, in that those against
1145 pseudos are sized by the word size, while those against hard
1146 regs are sized by the underlying register size. Better would be
1147 to always interpret the subreg offset parameter as bytes or bits. */
1149 if (WORDS_BIG_ENDIAN
)
1151 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1152 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1153 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1155 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1156 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1159 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1160 /* integrate.c can't handle parts of a return value register. */
1161 && (! REG_FUNCTION_VALUE_P (x
)
1162 || ! rtx_equal_function_value_matters
)
1163 /* We want to keep the stack, frame, and arg pointers special. */
1164 && x
!= frame_pointer_rtx
1165 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1166 && x
!= arg_pointer_rtx
1168 && x
!= stack_pointer_rtx
)
1169 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1171 return gen_rtx_SUBREG (mode
, x
, word
);
1177 /* Return 1 iff X, assumed to be a SUBREG,
1178 refers to the least significant part of its containing reg.
1179 If X is not a SUBREG, always return 1 (it is its own low part!). */
1182 subreg_lowpart_p (x
)
1185 if (GET_CODE (x
) != SUBREG
)
1187 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1190 if (WORDS_BIG_ENDIAN
1191 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1192 return (SUBREG_WORD (x
)
1193 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1194 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1197 return SUBREG_WORD (x
) == 0;
1200 /* Return subword I of operand OP.
1201 The word number, I, is interpreted as the word number starting at the
1202 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1203 otherwise it is the high-order word.
1205 If we cannot extract the required word, we return zero. Otherwise, an
1206 rtx corresponding to the requested word will be returned.
1208 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1209 reload has completed, a valid address will always be returned. After
1210 reload, if a valid address cannot be returned, we return zero.
1212 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1213 it is the responsibility of the caller.
1215 MODE is the mode of OP in case it is a CONST_INT. */
1218 operand_subword (op
, i
, validate_address
, mode
)
1221 int validate_address
;
1222 enum machine_mode mode
;
1225 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1227 if (mode
== VOIDmode
)
1228 mode
= GET_MODE (op
);
1230 if (mode
== VOIDmode
)
1233 /* If OP is narrower than a word, fail. */
1235 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1238 /* If we want a word outside OP, return zero. */
1240 && (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1243 /* If OP is already an integer word, return it. */
1244 if (GET_MODE_CLASS (mode
) == MODE_INT
1245 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1248 /* If OP is a REG or SUBREG, we can handle it very simply. */
1249 if (GET_CODE (op
) == REG
)
1251 /* ??? There is a potential problem with this code. It does not
1252 properly handle extractions of a subword from a hard register
1253 that is larger than word_mode. Presumably the check for
1254 HARD_REGNO_MODE_OK catches these most of these cases. */
1256 /* If OP is a hard register, but OP + I is not a hard register,
1257 then extracting a subword is impossible.
1259 For example, consider if OP is the last hard register and it is
1260 larger than word_mode. If we wanted word N (for N > 0) because a
1261 part of that hard register was known to contain a useful value,
1262 then OP + I would refer to a pseudo, not the hard register we
1264 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1265 && REGNO (op
) + i
>= FIRST_PSEUDO_REGISTER
)
1268 /* If the register is not valid for MODE, return 0. Note we
1269 have to check both OP and OP + I since they may refer to
1270 different parts of the register file.
1272 Consider if OP refers to the last 96bit FP register and we want
1273 subword 3 because that subword is known to contain a value we
1275 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1276 && (! HARD_REGNO_MODE_OK (REGNO (op
), word_mode
)
1277 || ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
)))
1279 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1280 || (REG_FUNCTION_VALUE_P (op
)
1281 && rtx_equal_function_value_matters
)
1282 /* We want to keep the stack, frame, and arg pointers
1284 || op
== frame_pointer_rtx
1285 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1286 || op
== arg_pointer_rtx
1288 || op
== stack_pointer_rtx
)
1289 return gen_rtx_SUBREG (word_mode
, op
, i
);
1291 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1293 else if (GET_CODE (op
) == SUBREG
)
1294 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1295 else if (GET_CODE (op
) == CONCAT
)
1297 unsigned int partwords
1298 = GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1301 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1302 return operand_subword (XEXP (op
, 1), i
- partwords
,
1303 validate_address
, mode
);
1306 /* Form a new MEM at the requested address. */
1307 if (GET_CODE (op
) == MEM
)
1309 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1312 if (validate_address
)
1314 if (reload_completed
)
1316 if (! strict_memory_address_p (word_mode
, addr
))
1320 addr
= memory_address (word_mode
, addr
);
1323 new = gen_rtx_MEM (word_mode
, addr
);
1324 MEM_COPY_ATTRIBUTES (new, op
);
1328 /* The only remaining cases are when OP is a constant. If the host and
1329 target floating formats are the same, handling two-word floating
1330 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1331 are defined as returning one or two 32 bit values, respectively,
1332 and not values of BITS_PER_WORD bits. */
1333 #ifdef REAL_ARITHMETIC
1334 /* The output is some bits, the width of the target machine's word.
1335 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1337 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1338 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1339 && GET_MODE_BITSIZE (mode
) == 64
1340 && GET_CODE (op
) == CONST_DOUBLE
)
1345 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1346 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1348 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1349 which the words are written depends on the word endianness.
1350 ??? This is a potential portability problem and should
1351 be fixed at some point.
1353 We must excercise caution with the sign bit. By definition there
1354 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1355 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1356 So we explicitly mask and sign-extend as necessary. */
1357 if (BITS_PER_WORD
== 32)
1360 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1361 return GEN_INT (val
);
1363 #if HOST_BITS_PER_WIDE_INT >= 64
1364 else if (BITS_PER_WORD
>= 64 && i
== 0)
1366 val
= k
[! WORDS_BIG_ENDIAN
];
1367 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1368 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1369 return GEN_INT (val
);
1372 else if (BITS_PER_WORD
== 16)
1375 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1378 return GEN_INT (val
);
1383 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1384 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1385 && GET_MODE_BITSIZE (mode
) > 64
1386 && GET_CODE (op
) == CONST_DOUBLE
)
1391 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1392 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1394 if (BITS_PER_WORD
== 32)
1397 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1398 return GEN_INT (val
);
1400 #if HOST_BITS_PER_WIDE_INT >= 64
1401 else if (BITS_PER_WORD
>= 64 && i
<= 1)
1403 val
= k
[i
*2 + ! WORDS_BIG_ENDIAN
];
1404 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1405 val
|= (HOST_WIDE_INT
) k
[i
*2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1406 return GEN_INT (val
);
1412 #else /* no REAL_ARITHMETIC */
1413 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1414 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1415 || flag_pretend_float
)
1416 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1417 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1418 && GET_CODE (op
) == CONST_DOUBLE
)
1420 /* The constant is stored in the host's word-ordering,
1421 but we want to access it in the target's word-ordering. Some
1422 compilers don't like a conditional inside macro args, so we have two
1423 copies of the return. */
1424 #ifdef HOST_WORDS_BIG_ENDIAN
1425 return GEN_INT (i
== WORDS_BIG_ENDIAN
1426 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1428 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1429 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1432 #endif /* no REAL_ARITHMETIC */
1434 /* Single word float is a little harder, since single- and double-word
1435 values often do not have the same high-order bits. We have already
1436 verified that we want the only defined word of the single-word value. */
1437 #ifdef REAL_ARITHMETIC
1438 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1439 && GET_MODE_BITSIZE (mode
) == 32
1440 && GET_CODE (op
) == CONST_DOUBLE
)
1445 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1446 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1448 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1450 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1452 if (BITS_PER_WORD
== 16)
1454 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1459 return GEN_INT (val
);
1462 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1463 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1464 || flag_pretend_float
)
1465 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1466 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1467 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1468 && GET_CODE (op
) == CONST_DOUBLE
)
1471 union {float f
; HOST_WIDE_INT i
; } u
;
1473 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1476 return GEN_INT (u
.i
);
1478 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1479 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1480 || flag_pretend_float
)
1481 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1482 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1483 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1484 && GET_CODE (op
) == CONST_DOUBLE
)
1487 union {double d
; HOST_WIDE_INT i
; } u
;
1489 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1492 return GEN_INT (u
.i
);
1494 #endif /* no REAL_ARITHMETIC */
1496 /* The only remaining cases that we can handle are integers.
1497 Convert to proper endianness now since these cases need it.
1498 At this point, i == 0 means the low-order word.
1500 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1501 in general. However, if OP is (const_int 0), we can just return
1504 if (op
== const0_rtx
)
1507 if (GET_MODE_CLASS (mode
) != MODE_INT
1508 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1509 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1512 if (WORDS_BIG_ENDIAN
)
1513 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1515 /* Find out which word on the host machine this value is in and get
1516 it from the constant. */
1517 val
= (i
/ size_ratio
== 0
1518 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1519 : (GET_CODE (op
) == CONST_INT
1520 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1522 /* Get the value we want into the low bits of val. */
1523 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1524 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1526 val
= trunc_int_for_mode (val
, word_mode
);
1528 return GEN_INT (val
);
1531 /* Similar to `operand_subword', but never return 0. If we can't extract
1532 the required subword, put OP into a register and try again. If that fails,
1533 abort. We always validate the address in this case. It is not valid
1534 to call this function after reload; it is mostly meant for RTL
1537 MODE is the mode of OP, in case it is CONST_INT. */
1540 operand_subword_force (op
, i
, mode
)
1543 enum machine_mode mode
;
1545 rtx result
= operand_subword (op
, i
, 1, mode
);
1550 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1552 /* If this is a register which can not be accessed by words, copy it
1553 to a pseudo register. */
1554 if (GET_CODE (op
) == REG
)
1555 op
= copy_to_reg (op
);
1557 op
= force_reg (mode
, op
);
1560 result
= operand_subword (op
, i
, 1, mode
);
1567 /* Given a compare instruction, swap the operands.
1568 A test instruction is changed into a compare of 0 against the operand. */
1571 reverse_comparison (insn
)
1574 rtx body
= PATTERN (insn
);
1577 if (GET_CODE (body
) == SET
)
1578 comp
= SET_SRC (body
);
1580 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1582 if (GET_CODE (comp
) == COMPARE
)
1584 rtx op0
= XEXP (comp
, 0);
1585 rtx op1
= XEXP (comp
, 1);
1586 XEXP (comp
, 0) = op1
;
1587 XEXP (comp
, 1) = op0
;
1591 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1592 CONST0_RTX (GET_MODE (comp
)), comp
);
1593 if (GET_CODE (body
) == SET
)
1594 SET_SRC (body
) = new;
1596 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1600 /* Return a memory reference like MEMREF, but with its mode changed
1601 to MODE and its address changed to ADDR.
1602 (VOIDmode means don't change the mode.
1603 NULL for ADDR means don't change the address.) */
1606 change_address (memref
, mode
, addr
)
1608 enum machine_mode mode
;
1613 if (GET_CODE (memref
) != MEM
)
1615 if (mode
== VOIDmode
)
1616 mode
= GET_MODE (memref
);
1618 addr
= XEXP (memref
, 0);
1620 /* If reload is in progress or has completed, ADDR must be valid.
1621 Otherwise, we can call memory_address to make it valid. */
1622 if (reload_completed
|| reload_in_progress
)
1624 if (! memory_address_p (mode
, addr
))
1628 addr
= memory_address (mode
, addr
);
1630 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1633 new = gen_rtx_MEM (mode
, addr
);
1634 MEM_COPY_ATTRIBUTES (new, memref
);
1638 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1645 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1646 NULL_RTX
, label_num
++, NULL_PTR
, NULL_PTR
);
1648 LABEL_NUSES (label
) = 0;
1649 LABEL_ALTERNATE_NAME (label
) = NULL
;
1653 /* For procedure integration. */
1655 /* Install new pointers to the first and last insns in the chain.
1656 Also, set cur_insn_uid to one higher than the last in use.
1657 Used for an inline-procedure after copying the insn chain. */
1660 set_new_first_and_last_insn (first
, last
)
1669 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1670 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1675 /* Set the range of label numbers found in the current function.
1676 This is used when belatedly compiling an inline function. */
1679 set_new_first_and_last_label_num (first
, last
)
1682 base_label_num
= label_num
;
1683 first_label_num
= first
;
1684 last_label_num
= last
;
1687 /* Set the last label number found in the current function.
1688 This is used when belatedly compiling an inline function. */
1691 set_new_last_label_num (last
)
1694 base_label_num
= label_num
;
1695 last_label_num
= last
;
1698 /* Restore all variables describing the current status from the structure *P.
1699 This is used after a nested function. */
1702 restore_emit_status (p
)
1703 struct function
*p ATTRIBUTE_UNUSED
;
1706 clear_emit_caches ();
1709 /* Clear out all parts of the state in F that can safely be discarded
1710 after the function has been compiled, to let garbage collection
1711 reclaim the memory. */
1714 free_emit_status (f
)
1717 free (f
->emit
->x_regno_reg_rtx
);
1718 free (f
->emit
->regno_pointer_flag
);
1719 free (f
->emit
->regno_pointer_align
);
1724 /* Go through all the RTL insn bodies and copy any invalid shared
1725 structure. This routine should only be called once. */
1728 unshare_all_rtl (fndecl
, insn
)
1734 /* Make sure that virtual parameters are not shared. */
1735 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
1736 DECL_RTL (decl
) = copy_rtx_if_shared (DECL_RTL (decl
));
1738 /* Make sure that virtual stack slots are not shared. */
1739 unshare_all_decls (DECL_INITIAL (fndecl
));
1741 /* Unshare just about everything else. */
1742 unshare_all_rtl_1 (insn
);
1744 /* Make sure the addresses of stack slots found outside the insn chain
1745 (such as, in DECL_RTL of a variable) are not shared
1746 with the insn chain.
1748 This special care is necessary when the stack slot MEM does not
1749 actually appear in the insn chain. If it does appear, its address
1750 is unshared from all else at that point. */
1751 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
1754 /* Go through all the RTL insn bodies and copy any invalid shared
1755 structure, again. This is a fairly expensive thing to do so it
1756 should be done sparingly. */
1759 unshare_all_rtl_again (insn
)
1765 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1768 reset_used_flags (PATTERN (p
));
1769 reset_used_flags (REG_NOTES (p
));
1770 reset_used_flags (LOG_LINKS (p
));
1773 /* Make sure that virtual stack slots are not shared. */
1774 reset_used_decls (DECL_INITIAL (cfun
->decl
));
1776 /* Make sure that virtual parameters are not shared. */
1777 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
1778 reset_used_flags (DECL_RTL (decl
));
1780 reset_used_flags (stack_slot_list
);
1782 unshare_all_rtl (cfun
->decl
, insn
);
1785 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1786 Assumes the mark bits are cleared at entry. */
1789 unshare_all_rtl_1 (insn
)
1792 for (; insn
; insn
= NEXT_INSN (insn
))
1795 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1796 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1797 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1801 /* Go through all virtual stack slots of a function and copy any
1802 shared structure. */
1804 unshare_all_decls (blk
)
1809 /* Copy shared decls. */
1810 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1811 DECL_RTL (t
) = copy_rtx_if_shared (DECL_RTL (t
));
1813 /* Now process sub-blocks. */
1814 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1815 unshare_all_decls (t
);
1818 /* Go through all virtual stack slots of a function and mark them as
1821 reset_used_decls (blk
)
1827 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1828 reset_used_flags (DECL_RTL (t
));
1830 /* Now process sub-blocks. */
1831 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1832 reset_used_decls (t
);
1835 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1836 Recursively does the same for subexpressions. */
1839 copy_rtx_if_shared (orig
)
1842 register rtx x
= orig
;
1844 register enum rtx_code code
;
1845 register const char *format_ptr
;
1851 code
= GET_CODE (x
);
1853 /* These types may be freely shared. */
1866 /* SCRATCH must be shared because they represent distinct values. */
1870 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1871 a LABEL_REF, it isn't sharable. */
1872 if (GET_CODE (XEXP (x
, 0)) == PLUS
1873 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1874 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1883 /* The chain of insns is not being copied. */
1887 /* A MEM is allowed to be shared if its address is constant.
1889 We used to allow sharing of MEMs which referenced
1890 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1891 that can lose. instantiate_virtual_regs will not unshare
1892 the MEMs, and combine may change the structure of the address
1893 because it looks safe and profitable in one context, but
1894 in some other context it creates unrecognizable RTL. */
1895 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
1904 /* This rtx may not be shared. If it has already been seen,
1905 replace it with a copy of itself. */
1911 copy
= rtx_alloc (code
);
1912 bcopy ((char *) x
, (char *) copy
,
1913 (sizeof (*copy
) - sizeof (copy
->fld
)
1914 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1920 /* Now scan the subexpressions recursively.
1921 We can store any replaced subexpressions directly into X
1922 since we know X is not shared! Any vectors in X
1923 must be copied if X was copied. */
1925 format_ptr
= GET_RTX_FORMAT (code
);
1927 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1929 switch (*format_ptr
++)
1932 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1936 if (XVEC (x
, i
) != NULL
)
1939 int len
= XVECLEN (x
, i
);
1941 if (copied
&& len
> 0)
1942 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
1943 for (j
= 0; j
< len
; j
++)
1944 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1952 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1953 to look for shared sub-parts. */
1956 reset_used_flags (x
)
1960 register enum rtx_code code
;
1961 register const char *format_ptr
;
1966 code
= GET_CODE (x
);
1968 /* These types may be freely shared so we needn't do any resetting
1989 /* The chain of insns is not being copied. */
1998 format_ptr
= GET_RTX_FORMAT (code
);
1999 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2001 switch (*format_ptr
++)
2004 reset_used_flags (XEXP (x
, i
));
2008 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2009 reset_used_flags (XVECEXP (x
, i
, j
));
2015 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2016 Return X or the rtx for the pseudo reg the value of X was copied into.
2017 OTHER must be valid as a SET_DEST. */
2020 make_safe_from (x
, other
)
2024 switch (GET_CODE (other
))
2027 other
= SUBREG_REG (other
);
2029 case STRICT_LOW_PART
:
2032 other
= XEXP (other
, 0);
2038 if ((GET_CODE (other
) == MEM
2040 && GET_CODE (x
) != REG
2041 && GET_CODE (x
) != SUBREG
)
2042 || (GET_CODE (other
) == REG
2043 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2044 || reg_mentioned_p (other
, x
))))
2046 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2047 emit_move_insn (temp
, x
);
2053 /* Emission of insns (adding them to the doubly-linked list). */
2055 /* Return the first insn of the current sequence or current function. */
2063 /* Return the last insn emitted in current sequence or current function. */
2071 /* Specify a new insn as the last in the chain. */
2074 set_last_insn (insn
)
2077 if (NEXT_INSN (insn
) != 0)
2082 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2085 get_last_insn_anywhere ()
2087 struct sequence_stack
*stack
;
2090 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2091 if (stack
->last
!= 0)
2096 /* Return a number larger than any instruction's uid in this function. */
2101 return cur_insn_uid
;
2104 /* Renumber instructions so that no instruction UIDs are wasted. */
2107 renumber_insns (stream
)
2112 /* If we're not supposed to renumber instructions, don't. */
2113 if (!flag_renumber_insns
)
2116 /* If there aren't that many instructions, then it's not really
2117 worth renumbering them. */
2118 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2123 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2126 fprintf (stream
, "Renumbering insn %d to %d\n",
2127 INSN_UID (insn
), cur_insn_uid
);
2128 INSN_UID (insn
) = cur_insn_uid
++;
2132 /* Return the next insn. If it is a SEQUENCE, return the first insn
2141 insn
= NEXT_INSN (insn
);
2142 if (insn
&& GET_CODE (insn
) == INSN
2143 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2144 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2150 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2154 previous_insn (insn
)
2159 insn
= PREV_INSN (insn
);
2160 if (insn
&& GET_CODE (insn
) == INSN
2161 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2162 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2168 /* Return the next insn after INSN that is not a NOTE. This routine does not
2169 look inside SEQUENCEs. */
2172 next_nonnote_insn (insn
)
2177 insn
= NEXT_INSN (insn
);
2178 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2185 /* Return the previous insn before INSN that is not a NOTE. This routine does
2186 not look inside SEQUENCEs. */
2189 prev_nonnote_insn (insn
)
2194 insn
= PREV_INSN (insn
);
2195 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2202 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2203 or 0, if there is none. This routine does not look inside
2207 next_real_insn (insn
)
2212 insn
= NEXT_INSN (insn
);
2213 if (insn
== 0 || GET_CODE (insn
) == INSN
2214 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2221 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2222 or 0, if there is none. This routine does not look inside
2226 prev_real_insn (insn
)
2231 insn
= PREV_INSN (insn
);
2232 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2233 || GET_CODE (insn
) == JUMP_INSN
)
2240 /* Find the next insn after INSN that really does something. This routine
2241 does not look inside SEQUENCEs. Until reload has completed, this is the
2242 same as next_real_insn. */
2245 active_insn_p (insn
)
2248 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2249 || (GET_CODE (insn
) == INSN
2250 && (! reload_completed
2251 || (GET_CODE (PATTERN (insn
)) != USE
2252 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2256 next_active_insn (insn
)
2261 insn
= NEXT_INSN (insn
);
2262 if (insn
== 0 || active_insn_p (insn
))
2269 /* Find the last insn before INSN that really does something. This routine
2270 does not look inside SEQUENCEs. Until reload has completed, this is the
2271 same as prev_real_insn. */
2274 prev_active_insn (insn
)
2279 insn
= PREV_INSN (insn
);
2280 if (insn
== 0 || active_insn_p (insn
))
2287 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2295 insn
= NEXT_INSN (insn
);
2296 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2303 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2311 insn
= PREV_INSN (insn
);
2312 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2320 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2321 and REG_CC_USER notes so we can find it. */
2324 link_cc0_insns (insn
)
2327 rtx user
= next_nonnote_insn (insn
);
2329 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2330 user
= XVECEXP (PATTERN (user
), 0, 0);
2332 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2334 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2337 /* Return the next insn that uses CC0 after INSN, which is assumed to
2338 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2339 applied to the result of this function should yield INSN).
2341 Normally, this is simply the next insn. However, if a REG_CC_USER note
2342 is present, it contains the insn that uses CC0.
2344 Return 0 if we can't find the insn. */
2347 next_cc0_user (insn
)
2350 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2353 return XEXP (note
, 0);
2355 insn
= next_nonnote_insn (insn
);
2356 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2357 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2359 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2365 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2366 note, it is the previous insn. */
2369 prev_cc0_setter (insn
)
2372 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2375 return XEXP (note
, 0);
2377 insn
= prev_nonnote_insn (insn
);
2378 if (! sets_cc0_p (PATTERN (insn
)))
2385 /* Try splitting insns that can be split for better scheduling.
2386 PAT is the pattern which might split.
2387 TRIAL is the insn providing PAT.
2388 LAST is non-zero if we should return the last insn of the sequence produced.
2390 If this routine succeeds in splitting, it returns the first or last
2391 replacement insn depending on the value of LAST. Otherwise, it
2392 returns TRIAL. If the insn to be returned can be split, it will be. */
2395 try_split (pat
, trial
, last
)
2399 rtx before
= PREV_INSN (trial
);
2400 rtx after
= NEXT_INSN (trial
);
2401 rtx seq
= split_insns (pat
, trial
);
2402 int has_barrier
= 0;
2405 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2406 We may need to handle this specially. */
2407 if (after
&& GET_CODE (after
) == BARRIER
)
2410 after
= NEXT_INSN (after
);
2415 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2416 The latter case will normally arise only when being done so that
2417 it, in turn, will be split (SFmode on the 29k is an example). */
2418 if (GET_CODE (seq
) == SEQUENCE
)
2422 /* Avoid infinite loop if any insn of the result matches
2423 the original pattern. */
2424 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2425 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2426 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2429 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2430 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2431 increment the usage count so we don't delete the label. */
2433 if (GET_CODE (trial
) == JUMP_INSN
)
2434 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2435 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2437 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2439 if (JUMP_LABEL (trial
))
2440 LABEL_NUSES (JUMP_LABEL (trial
))++;
2443 tem
= emit_insn_after (seq
, before
);
2445 delete_insn (trial
);
2447 emit_barrier_after (tem
);
2449 /* Recursively call try_split for each new insn created; by the
2450 time control returns here that insn will be fully split, so
2451 set LAST and continue from the insn after the one returned.
2452 We can't use next_active_insn here since AFTER may be a note.
2453 Ignore deleted insns, which can be occur if not optimizing. */
2454 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
2455 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
2456 tem
= try_split (PATTERN (tem
), tem
, 1);
2458 /* Avoid infinite loop if the result matches the original pattern. */
2459 else if (rtx_equal_p (seq
, pat
))
2463 PATTERN (trial
) = seq
;
2464 INSN_CODE (trial
) = -1;
2465 try_split (seq
, trial
, last
);
2468 /* Return either the first or the last insn, depending on which was
2471 ? (after
? prev_active_insn (after
) : last_insn
)
2472 : next_active_insn (before
);
2478 /* Make and return an INSN rtx, initializing all its slots.
2479 Store PATTERN in the pattern slots. */
2482 make_insn_raw (pattern
)
2487 /* If in RTL generation phase, see if FREE_INSN can be used. */
2488 if (!ggc_p
&& free_insn
!= 0 && rtx_equal_function_value_matters
)
2491 free_insn
= NEXT_INSN (free_insn
);
2492 PUT_CODE (insn
, INSN
);
2495 insn
= rtx_alloc (INSN
);
2497 INSN_UID (insn
) = cur_insn_uid
++;
2498 PATTERN (insn
) = pattern
;
2499 INSN_CODE (insn
) = -1;
2500 LOG_LINKS (insn
) = NULL
;
2501 REG_NOTES (insn
) = NULL
;
2503 #ifdef ENABLE_RTL_CHECKING
2506 && (returnjump_p (insn
)
2507 || (GET_CODE (insn
) == SET
2508 && SET_DEST (insn
) == pc_rtx
)))
2510 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2518 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2521 make_jump_insn_raw (pattern
)
2526 insn
= rtx_alloc (JUMP_INSN
);
2527 INSN_UID (insn
) = cur_insn_uid
++;
2529 PATTERN (insn
) = pattern
;
2530 INSN_CODE (insn
) = -1;
2531 LOG_LINKS (insn
) = NULL
;
2532 REG_NOTES (insn
) = NULL
;
2533 JUMP_LABEL (insn
) = NULL
;
2538 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2541 make_call_insn_raw (pattern
)
2546 insn
= rtx_alloc (CALL_INSN
);
2547 INSN_UID (insn
) = cur_insn_uid
++;
2549 PATTERN (insn
) = pattern
;
2550 INSN_CODE (insn
) = -1;
2551 LOG_LINKS (insn
) = NULL
;
2552 REG_NOTES (insn
) = NULL
;
2553 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2558 /* Add INSN to the end of the doubly-linked list.
2559 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2565 PREV_INSN (insn
) = last_insn
;
2566 NEXT_INSN (insn
) = 0;
2568 if (NULL
!= last_insn
)
2569 NEXT_INSN (last_insn
) = insn
;
2571 if (NULL
== first_insn
)
2577 /* Add INSN into the doubly-linked list after insn AFTER. This and
2578 the next should be the only functions called to insert an insn once
2579 delay slots have been filled since only they know how to update a
2583 add_insn_after (insn
, after
)
2586 rtx next
= NEXT_INSN (after
);
2588 if (optimize
&& INSN_DELETED_P (after
))
2591 NEXT_INSN (insn
) = next
;
2592 PREV_INSN (insn
) = after
;
2596 PREV_INSN (next
) = insn
;
2597 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2598 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2600 else if (last_insn
== after
)
2604 struct sequence_stack
*stack
= seq_stack
;
2605 /* Scan all pending sequences too. */
2606 for (; stack
; stack
= stack
->next
)
2607 if (after
== stack
->last
)
2617 NEXT_INSN (after
) = insn
;
2618 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2620 rtx sequence
= PATTERN (after
);
2621 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2625 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2626 the previous should be the only functions called to insert an insn once
2627 delay slots have been filled since only they know how to update a
2631 add_insn_before (insn
, before
)
2634 rtx prev
= PREV_INSN (before
);
2636 if (optimize
&& INSN_DELETED_P (before
))
2639 PREV_INSN (insn
) = prev
;
2640 NEXT_INSN (insn
) = before
;
2644 NEXT_INSN (prev
) = insn
;
2645 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2647 rtx sequence
= PATTERN (prev
);
2648 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2651 else if (first_insn
== before
)
2655 struct sequence_stack
*stack
= seq_stack
;
2656 /* Scan all pending sequences too. */
2657 for (; stack
; stack
= stack
->next
)
2658 if (before
== stack
->first
)
2660 stack
->first
= insn
;
2668 PREV_INSN (before
) = insn
;
2669 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2670 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2673 /* Remove an insn from its doubly-linked list. This function knows how
2674 to handle sequences. */
2679 rtx next
= NEXT_INSN (insn
);
2680 rtx prev
= PREV_INSN (insn
);
2683 NEXT_INSN (prev
) = next
;
2684 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2686 rtx sequence
= PATTERN (prev
);
2687 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2690 else if (first_insn
== insn
)
2694 struct sequence_stack
*stack
= seq_stack
;
2695 /* Scan all pending sequences too. */
2696 for (; stack
; stack
= stack
->next
)
2697 if (insn
== stack
->first
)
2699 stack
->first
= next
;
2709 PREV_INSN (next
) = prev
;
2710 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2711 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2713 else if (last_insn
== insn
)
2717 struct sequence_stack
*stack
= seq_stack
;
2718 /* Scan all pending sequences too. */
2719 for (; stack
; stack
= stack
->next
)
2720 if (insn
== stack
->last
)
2731 /* Delete all insns made since FROM.
2732 FROM becomes the new last instruction. */
2735 delete_insns_since (from
)
2741 NEXT_INSN (from
) = 0;
2745 /* This function is deprecated, please use sequences instead.
2747 Move a consecutive bunch of insns to a different place in the chain.
2748 The insns to be moved are those between FROM and TO.
2749 They are moved to a new position after the insn AFTER.
2750 AFTER must not be FROM or TO or any insn in between.
2752 This function does not know about SEQUENCEs and hence should not be
2753 called after delay-slot filling has been done. */
2756 reorder_insns (from
, to
, after
)
2757 rtx from
, to
, after
;
2759 /* Splice this bunch out of where it is now. */
2760 if (PREV_INSN (from
))
2761 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2763 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2764 if (last_insn
== to
)
2765 last_insn
= PREV_INSN (from
);
2766 if (first_insn
== from
)
2767 first_insn
= NEXT_INSN (to
);
2769 /* Make the new neighbors point to it and it to them. */
2770 if (NEXT_INSN (after
))
2771 PREV_INSN (NEXT_INSN (after
)) = to
;
2773 NEXT_INSN (to
) = NEXT_INSN (after
);
2774 PREV_INSN (from
) = after
;
2775 NEXT_INSN (after
) = from
;
2776 if (after
== last_insn
)
2780 /* Return the line note insn preceding INSN. */
2783 find_line_note (insn
)
2786 if (no_line_numbers
)
2789 for (; insn
; insn
= PREV_INSN (insn
))
2790 if (GET_CODE (insn
) == NOTE
2791 && NOTE_LINE_NUMBER (insn
) >= 0)
2797 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2798 of the moved insns when debugging. This may insert a note between AFTER
2799 and FROM, and another one after TO. */
2802 reorder_insns_with_line_notes (from
, to
, after
)
2803 rtx from
, to
, after
;
2805 rtx from_line
= find_line_note (from
);
2806 rtx after_line
= find_line_note (after
);
2808 reorder_insns (from
, to
, after
);
2810 if (from_line
== after_line
)
2814 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2815 NOTE_LINE_NUMBER (from_line
),
2818 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2819 NOTE_LINE_NUMBER (after_line
),
2823 /* Remove unnecessary notes from the instruction stream. */
2826 remove_unnecessary_notes ()
2831 /* We must not remove the first instruction in the function because
2832 the compiler depends on the first instruction being a note. */
2833 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
2835 /* Remember what's next. */
2836 next
= NEXT_INSN (insn
);
2838 /* We're only interested in notes. */
2839 if (GET_CODE (insn
) != NOTE
)
2842 /* By now, all notes indicating lexical blocks should have
2843 NOTE_BLOCK filled in. */
2844 if ((NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BLOCK_BEG
2845 || NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BLOCK_END
)
2846 && NOTE_BLOCK (insn
) == NULL_TREE
)
2849 /* Remove NOTE_INSN_DELETED notes. */
2850 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_DELETED
)
2852 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BLOCK_END
)
2854 /* Scan back to see if there are any non-note instructions
2855 between INSN and the beginning of this block. If not,
2856 then there is no PC range in the generated code that will
2857 actually be in this block, so there's no point in
2858 remembering the existence of the block. */
2861 for (prev
= PREV_INSN (insn
); prev
; prev
= PREV_INSN (prev
))
2863 /* This block contains a real instruction. Note that we
2864 don't include labels; if the only thing in the block
2865 is a label, then there are still no PC values that
2866 lie within the block. */
2870 /* We're only interested in NOTEs. */
2871 if (GET_CODE (prev
) != NOTE
)
2874 if (NOTE_LINE_NUMBER (prev
) == NOTE_INSN_BLOCK_BEG
)
2876 /* If the BLOCKs referred to by these notes don't
2877 match, then something is wrong with our BLOCK
2878 nesting structure. */
2879 if (NOTE_BLOCK (prev
) != NOTE_BLOCK (insn
))
2882 if (debug_ignore_block (NOTE_BLOCK (insn
)))
2889 else if (NOTE_LINE_NUMBER (prev
) == NOTE_INSN_BLOCK_END
)
2890 /* There's a nested block. We need to leave the
2891 current block in place since otherwise the debugger
2892 wouldn't be able to show symbols from our block in
2893 the nested block. */
2901 /* Emit an insn of given code and pattern
2902 at a specified place within the doubly-linked list. */
2904 /* Make an instruction with body PATTERN
2905 and output it before the instruction BEFORE. */
2908 emit_insn_before (pattern
, before
)
2909 register rtx pattern
, before
;
2911 register rtx insn
= before
;
2913 if (GET_CODE (pattern
) == SEQUENCE
)
2917 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2919 insn
= XVECEXP (pattern
, 0, i
);
2920 add_insn_before (insn
, before
);
2922 if (!ggc_p
&& XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2923 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2927 insn
= make_insn_raw (pattern
);
2928 add_insn_before (insn
, before
);
2934 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2937 emit_block_insn_before (pattern
, before
, block
)
2938 rtx pattern
, before
;
2941 rtx prev
= PREV_INSN (before
);
2942 rtx r
= emit_insn_before (pattern
, before
);
2943 if (block
&& block
->head
== before
)
2944 block
->head
= NEXT_INSN (prev
);
2948 /* Make an instruction with body PATTERN and code JUMP_INSN
2949 and output it before the instruction BEFORE. */
2952 emit_jump_insn_before (pattern
, before
)
2953 register rtx pattern
, before
;
2957 if (GET_CODE (pattern
) == SEQUENCE
)
2958 insn
= emit_insn_before (pattern
, before
);
2961 insn
= make_jump_insn_raw (pattern
);
2962 add_insn_before (insn
, before
);
2968 /* Make an instruction with body PATTERN and code CALL_INSN
2969 and output it before the instruction BEFORE. */
2972 emit_call_insn_before (pattern
, before
)
2973 register rtx pattern
, before
;
2977 if (GET_CODE (pattern
) == SEQUENCE
)
2978 insn
= emit_insn_before (pattern
, before
);
2981 insn
= make_call_insn_raw (pattern
);
2982 add_insn_before (insn
, before
);
2983 PUT_CODE (insn
, CALL_INSN
);
2989 /* Make an insn of code BARRIER
2990 and output it before the insn BEFORE. */
2993 emit_barrier_before (before
)
2994 register rtx before
;
2996 register rtx insn
= rtx_alloc (BARRIER
);
2998 INSN_UID (insn
) = cur_insn_uid
++;
3000 add_insn_before (insn
, before
);
3004 /* Emit the label LABEL before the insn BEFORE. */
3007 emit_label_before (label
, before
)
3010 /* This can be called twice for the same label as a result of the
3011 confusion that follows a syntax error! So make it harmless. */
3012 if (INSN_UID (label
) == 0)
3014 INSN_UID (label
) = cur_insn_uid
++;
3015 add_insn_before (label
, before
);
3021 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3024 emit_note_before (subtype
, before
)
3028 register rtx note
= rtx_alloc (NOTE
);
3029 INSN_UID (note
) = cur_insn_uid
++;
3030 NOTE_SOURCE_FILE (note
) = 0;
3031 NOTE_LINE_NUMBER (note
) = subtype
;
3033 add_insn_before (note
, before
);
3037 /* Make an insn of code INSN with body PATTERN
3038 and output it after the insn AFTER. */
3041 emit_insn_after (pattern
, after
)
3042 register rtx pattern
, after
;
3044 register rtx insn
= after
;
3046 if (GET_CODE (pattern
) == SEQUENCE
)
3050 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3052 insn
= XVECEXP (pattern
, 0, i
);
3053 add_insn_after (insn
, after
);
3056 if (!ggc_p
&& XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
3057 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
3061 insn
= make_insn_raw (pattern
);
3062 add_insn_after (insn
, after
);
3068 /* Similar to emit_insn_after, except that line notes are to be inserted so
3069 as to act as if this insn were at FROM. */
3072 emit_insn_after_with_line_notes (pattern
, after
, from
)
3073 rtx pattern
, after
, from
;
3075 rtx from_line
= find_line_note (from
);
3076 rtx after_line
= find_line_note (after
);
3077 rtx insn
= emit_insn_after (pattern
, after
);
3080 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3081 NOTE_LINE_NUMBER (from_line
),
3085 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3086 NOTE_LINE_NUMBER (after_line
),
3090 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3093 emit_block_insn_after (pattern
, after
, block
)
3097 rtx r
= emit_insn_after (pattern
, after
);
3098 if (block
&& block
->end
== after
)
3103 /* Make an insn of code JUMP_INSN with body PATTERN
3104 and output it after the insn AFTER. */
3107 emit_jump_insn_after (pattern
, after
)
3108 register rtx pattern
, after
;
3112 if (GET_CODE (pattern
) == SEQUENCE
)
3113 insn
= emit_insn_after (pattern
, after
);
3116 insn
= make_jump_insn_raw (pattern
);
3117 add_insn_after (insn
, after
);
3123 /* Make an insn of code BARRIER
3124 and output it after the insn AFTER. */
3127 emit_barrier_after (after
)
3130 register rtx insn
= rtx_alloc (BARRIER
);
3132 INSN_UID (insn
) = cur_insn_uid
++;
3134 add_insn_after (insn
, after
);
3138 /* Emit the label LABEL after the insn AFTER. */
3141 emit_label_after (label
, after
)
3144 /* This can be called twice for the same label
3145 as a result of the confusion that follows a syntax error!
3146 So make it harmless. */
3147 if (INSN_UID (label
) == 0)
3149 INSN_UID (label
) = cur_insn_uid
++;
3150 add_insn_after (label
, after
);
3156 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3159 emit_note_after (subtype
, after
)
3163 register rtx note
= rtx_alloc (NOTE
);
3164 INSN_UID (note
) = cur_insn_uid
++;
3165 NOTE_SOURCE_FILE (note
) = 0;
3166 NOTE_LINE_NUMBER (note
) = subtype
;
3167 add_insn_after (note
, after
);
3171 /* Emit a line note for FILE and LINE after the insn AFTER. */
3174 emit_line_note_after (file
, line
, after
)
3181 if (no_line_numbers
&& line
> 0)
3187 note
= rtx_alloc (NOTE
);
3188 INSN_UID (note
) = cur_insn_uid
++;
3189 NOTE_SOURCE_FILE (note
) = file
;
3190 NOTE_LINE_NUMBER (note
) = line
;
3191 add_insn_after (note
, after
);
3195 /* Make an insn of code INSN with pattern PATTERN
3196 and add it to the end of the doubly-linked list.
3197 If PATTERN is a SEQUENCE, take the elements of it
3198 and emit an insn for each element.
3200 Returns the last insn emitted. */
3206 rtx insn
= last_insn
;
3208 if (GET_CODE (pattern
) == SEQUENCE
)
3212 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3214 insn
= XVECEXP (pattern
, 0, i
);
3217 if (!ggc_p
&& XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
3218 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
3222 insn
= make_insn_raw (pattern
);
3229 /* Emit the insns in a chain starting with INSN.
3230 Return the last insn emitted. */
3240 rtx next
= NEXT_INSN (insn
);
3249 /* Emit the insns in a chain starting with INSN and place them in front of
3250 the insn BEFORE. Return the last insn emitted. */
3253 emit_insns_before (insn
, before
)
3261 rtx next
= NEXT_INSN (insn
);
3262 add_insn_before (insn
, before
);
3270 /* Emit the insns in a chain starting with FIRST and place them in back of
3271 the insn AFTER. Return the last insn emitted. */
3274 emit_insns_after (first
, after
)
3279 register rtx after_after
;
3287 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3290 after_after
= NEXT_INSN (after
);
3292 NEXT_INSN (after
) = first
;
3293 PREV_INSN (first
) = after
;
3294 NEXT_INSN (last
) = after_after
;
3296 PREV_INSN (after_after
) = last
;
3298 if (after
== last_insn
)
3303 /* Make an insn of code JUMP_INSN with pattern PATTERN
3304 and add it to the end of the doubly-linked list. */
3307 emit_jump_insn (pattern
)
3310 if (GET_CODE (pattern
) == SEQUENCE
)
3311 return emit_insn (pattern
);
3314 register rtx insn
= make_jump_insn_raw (pattern
);
3320 /* Make an insn of code CALL_INSN with pattern PATTERN
3321 and add it to the end of the doubly-linked list. */
3324 emit_call_insn (pattern
)
3327 if (GET_CODE (pattern
) == SEQUENCE
)
3328 return emit_insn (pattern
);
3331 register rtx insn
= make_call_insn_raw (pattern
);
3333 PUT_CODE (insn
, CALL_INSN
);
3338 /* Add the label LABEL to the end of the doubly-linked list. */
3344 /* This can be called twice for the same label
3345 as a result of the confusion that follows a syntax error!
3346 So make it harmless. */
3347 if (INSN_UID (label
) == 0)
3349 INSN_UID (label
) = cur_insn_uid
++;
3355 /* Make an insn of code BARRIER
3356 and add it to the end of the doubly-linked list. */
3361 register rtx barrier
= rtx_alloc (BARRIER
);
3362 INSN_UID (barrier
) = cur_insn_uid
++;
3367 /* Make an insn of code NOTE
3368 with data-fields specified by FILE and LINE
3369 and add it to the end of the doubly-linked list,
3370 but only if line-numbers are desired for debugging info. */
3373 emit_line_note (file
, line
)
3377 set_file_and_line_for_stmt (file
, line
);
3380 if (no_line_numbers
)
3384 return emit_note (file
, line
);
3387 /* Make an insn of code NOTE
3388 with data-fields specified by FILE and LINE
3389 and add it to the end of the doubly-linked list.
3390 If it is a line-number NOTE, omit it if it matches the previous one. */
3393 emit_note (file
, line
)
3401 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3402 && line
== last_linenum
)
3404 last_filename
= file
;
3405 last_linenum
= line
;
3408 if (no_line_numbers
&& line
> 0)
3414 note
= rtx_alloc (NOTE
);
3415 INSN_UID (note
) = cur_insn_uid
++;
3416 NOTE_SOURCE_FILE (note
) = file
;
3417 NOTE_LINE_NUMBER (note
) = line
;
3422 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3425 emit_line_note_force (file
, line
)
3430 return emit_line_note (file
, line
);
3433 /* Cause next statement to emit a line note even if the line number
3434 has not changed. This is used at the beginning of a function. */
3437 force_next_line_note ()
3442 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3443 note of this type already exists, remove it first. */
3446 set_unique_reg_note (insn
, kind
, datum
)
3451 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3453 /* First remove the note if there already is one. */
3455 remove_note (insn
, note
);
3457 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3460 /* Return an indication of which type of insn should have X as a body.
3461 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3467 if (GET_CODE (x
) == CODE_LABEL
)
3469 if (GET_CODE (x
) == CALL
)
3471 if (GET_CODE (x
) == RETURN
)
3473 if (GET_CODE (x
) == SET
)
3475 if (SET_DEST (x
) == pc_rtx
)
3477 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3482 if (GET_CODE (x
) == PARALLEL
)
3485 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3486 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3488 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3489 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3491 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3492 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3498 /* Emit the rtl pattern X as an appropriate kind of insn.
3499 If X is a label, it is simply added into the insn chain. */
3505 enum rtx_code code
= classify_insn (x
);
3507 if (code
== CODE_LABEL
)
3508 return emit_label (x
);
3509 else if (code
== INSN
)
3510 return emit_insn (x
);
3511 else if (code
== JUMP_INSN
)
3513 register rtx insn
= emit_jump_insn (x
);
3514 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
3515 return emit_barrier ();
3518 else if (code
== CALL_INSN
)
3519 return emit_call_insn (x
);
3524 /* Begin emitting insns to a sequence which can be packaged in an
3525 RTL_EXPR. If this sequence will contain something that might cause
3526 the compiler to pop arguments to function calls (because those
3527 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3528 details), use do_pending_stack_adjust before calling this function.
3529 That will ensure that the deferred pops are not accidentally
3530 emitted in the middle of this sequence. */
3535 struct sequence_stack
*tem
;
3537 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
3539 tem
->next
= seq_stack
;
3540 tem
->first
= first_insn
;
3541 tem
->last
= last_insn
;
3542 tem
->sequence_rtl_expr
= seq_rtl_expr
;
3550 /* Similarly, but indicate that this sequence will be placed in T, an
3551 RTL_EXPR. See the documentation for start_sequence for more
3552 information about how to use this function. */
3555 start_sequence_for_rtl_expr (t
)
3563 /* Set up the insn chain starting with FIRST as the current sequence,
3564 saving the previously current one. See the documentation for
3565 start_sequence for more information about how to use this function. */
3568 push_to_sequence (first
)
3575 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3581 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3584 push_to_full_sequence (first
, last
)
3590 /* We really should have the end of the insn chain here. */
3591 if (last
&& NEXT_INSN (last
))
3595 /* Set up the outer-level insn chain
3596 as the current sequence, saving the previously current one. */
3599 push_topmost_sequence ()
3601 struct sequence_stack
*stack
, *top
= NULL
;
3605 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3608 first_insn
= top
->first
;
3609 last_insn
= top
->last
;
3610 seq_rtl_expr
= top
->sequence_rtl_expr
;
3613 /* After emitting to the outer-level insn chain, update the outer-level
3614 insn chain, and restore the previous saved state. */
3617 pop_topmost_sequence ()
3619 struct sequence_stack
*stack
, *top
= NULL
;
3621 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3624 top
->first
= first_insn
;
3625 top
->last
= last_insn
;
3626 /* ??? Why don't we save seq_rtl_expr here? */
3631 /* After emitting to a sequence, restore previous saved state.
3633 To get the contents of the sequence just made, you must call
3634 `gen_sequence' *before* calling here.
3636 If the compiler might have deferred popping arguments while
3637 generating this sequence, and this sequence will not be immediately
3638 inserted into the instruction stream, use do_pending_stack_adjust
3639 before calling gen_sequence. That will ensure that the deferred
3640 pops are inserted into this sequence, and not into some random
3641 location in the instruction stream. See INHIBIT_DEFER_POP for more
3642 information about deferred popping of arguments. */
3647 struct sequence_stack
*tem
= seq_stack
;
3649 first_insn
= tem
->first
;
3650 last_insn
= tem
->last
;
3651 seq_rtl_expr
= tem
->sequence_rtl_expr
;
3652 seq_stack
= tem
->next
;
3657 /* This works like end_sequence, but records the old sequence in FIRST
3661 end_full_sequence (first
, last
)
3664 *first
= first_insn
;
3669 /* Return 1 if currently emitting into a sequence. */
3674 return seq_stack
!= 0;
3677 /* Generate a SEQUENCE rtx containing the insns already emitted
3678 to the current sequence.
3680 This is how the gen_... function from a DEFINE_EXPAND
3681 constructs the SEQUENCE that it returns. */
3691 /* Count the insns in the chain. */
3693 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3696 /* If only one insn, return it rather than a SEQUENCE.
3697 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3698 the case of an empty list.)
3699 We only return the pattern of an insn if its code is INSN and it
3700 has no notes. This ensures that no information gets lost. */
3702 && ! RTX_FRAME_RELATED_P (first_insn
)
3703 && GET_CODE (first_insn
) == INSN
3704 /* Don't throw away any reg notes. */
3705 && REG_NOTES (first_insn
) == 0)
3709 NEXT_INSN (first_insn
) = free_insn
;
3710 free_insn
= first_insn
;
3712 return PATTERN (first_insn
);
3715 /* Put them in a vector. See if we already have a SEQUENCE of the
3716 appropriate length around. */
3717 if (!ggc_p
&& len
< SEQUENCE_RESULT_SIZE
3718 && (result
= sequence_result
[len
]) != 0)
3719 sequence_result
[len
] = 0;
3722 /* Ensure that this rtl goes in saveable_obstack, since we may
3724 push_obstacks_nochange ();
3725 rtl_in_saveable_obstack ();
3726 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3730 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3731 XVECEXP (result
, 0, i
) = tem
;
3736 /* Put the various virtual registers into REGNO_REG_RTX. */
3739 init_virtual_regs (es
)
3740 struct emit_status
*es
;
3742 rtx
*ptr
= es
->x_regno_reg_rtx
;
3743 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3744 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3745 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3746 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3747 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3751 clear_emit_caches ()
3755 /* Clear the start_sequence/gen_sequence cache. */
3756 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3757 sequence_result
[i
] = 0;
3761 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3762 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
3763 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
3764 static int copy_insn_n_scratches
;
3766 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3767 copied an ASM_OPERANDS.
3768 In that case, it is the original input-operand vector. */
3769 static rtvec orig_asm_operands_vector
;
3771 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3772 copied an ASM_OPERANDS.
3773 In that case, it is the copied input-operand vector. */
3774 static rtvec copy_asm_operands_vector
;
3776 /* Likewise for the constraints vector. */
3777 static rtvec orig_asm_constraints_vector
;
3778 static rtvec copy_asm_constraints_vector
;
3780 /* Recursively create a new copy of an rtx for copy_insn.
3781 This function differs from copy_rtx in that it handles SCRATCHes and
3782 ASM_OPERANDs properly.
3783 Normally, this function is not used directly; use copy_insn as front end.
3784 However, you could first copy an insn pattern with copy_insn and then use
3785 this function afterwards to properly copy any REG_NOTEs containing
3794 register RTX_CODE code
;
3795 register const char *format_ptr
;
3797 code
= GET_CODE (orig
);
3813 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
3814 if (copy_insn_scratch_in
[i
] == orig
)
3815 return copy_insn_scratch_out
[i
];
3819 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3820 a LABEL_REF, it isn't sharable. */
3821 if (GET_CODE (XEXP (orig
, 0)) == PLUS
3822 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
3823 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
3827 /* A MEM with a constant address is not sharable. The problem is that
3828 the constant address may need to be reloaded. If the mem is shared,
3829 then reloading one copy of this mem will cause all copies to appear
3830 to have been reloaded. */
3836 copy
= rtx_alloc (code
);
3838 /* Copy the various flags, and other information. We assume that
3839 all fields need copying, and then clear the fields that should
3840 not be copied. That is the sensible default behavior, and forces
3841 us to explicitly document why we are *not* copying a flag. */
3842 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
3844 /* We do not copy the USED flag, which is used as a mark bit during
3845 walks over the RTL. */
3848 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3849 if (GET_RTX_CLASS (code
) == 'i')
3853 copy
->frame_related
= 0;
3856 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
3858 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
3860 copy
->fld
[i
] = orig
->fld
[i
];
3861 switch (*format_ptr
++)
3864 if (XEXP (orig
, i
) != NULL
)
3865 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
3870 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
3871 XVEC (copy
, i
) = copy_asm_constraints_vector
;
3872 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
3873 XVEC (copy
, i
) = copy_asm_operands_vector
;
3874 else if (XVEC (orig
, i
) != NULL
)
3876 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
3877 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
3878 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
3884 bitmap new_bits
= BITMAP_OBSTACK_ALLOC (rtl_obstack
);
3885 bitmap_copy (new_bits
, XBITMAP (orig
, i
));
3886 XBITMAP (copy
, i
) = new_bits
;
3897 /* These are left unchanged. */
3905 if (code
== SCRATCH
)
3907 i
= copy_insn_n_scratches
++;
3908 if (i
>= MAX_RECOG_OPERANDS
)
3910 copy_insn_scratch_in
[i
] = orig
;
3911 copy_insn_scratch_out
[i
] = copy
;
3913 else if (code
== ASM_OPERANDS
)
3915 orig_asm_operands_vector
= XVEC (orig
, 3);
3916 copy_asm_operands_vector
= XVEC (copy
, 3);
3917 orig_asm_constraints_vector
= XVEC (orig
, 4);
3918 copy_asm_constraints_vector
= XVEC (copy
, 4);
3924 /* Create a new copy of an rtx.
3925 This function differs from copy_rtx in that it handles SCRATCHes and
3926 ASM_OPERANDs properly.
3927 INSN doesn't really have to be a full INSN; it could be just the
3933 copy_insn_n_scratches
= 0;
3934 orig_asm_operands_vector
= 0;
3935 orig_asm_constraints_vector
= 0;
3936 copy_asm_operands_vector
= 0;
3937 copy_asm_constraints_vector
= 0;
3938 return copy_insn_1 (insn
);
3941 /* Initialize data structures and variables in this file
3942 before generating rtl for each function. */
3947 struct function
*f
= cfun
;
3949 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
3952 seq_rtl_expr
= NULL
;
3954 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3957 first_label_num
= label_num
;
3961 clear_emit_caches ();
3963 /* Init the tables that describe all the pseudo regs. */
3965 f
->emit
->regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3967 f
->emit
->regno_pointer_flag
3968 = (char *) xcalloc (f
->emit
->regno_pointer_flag_length
, sizeof (char));
3970 f
->emit
->regno_pointer_align
3971 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_flag_length
,
3972 sizeof (unsigned char));
3975 = (rtx
*) xcalloc (f
->emit
->regno_pointer_flag_length
* sizeof (rtx
),
3978 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3979 init_virtual_regs (f
->emit
);
3981 /* Indicate that the virtual registers and stack locations are
3983 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3984 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3985 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3986 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3988 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3989 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3990 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3991 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3992 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM
) = 1;
3994 #ifdef STACK_BOUNDARY
3995 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
3996 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
3997 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
3998 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4000 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4001 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4002 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4003 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4004 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
4007 #ifdef INIT_EXPANDERS
4012 /* Mark SS for GC. */
4015 mark_sequence_stack (ss
)
4016 struct sequence_stack
*ss
;
4020 ggc_mark_rtx (ss
->first
);
4021 ggc_mark_tree (ss
->sequence_rtl_expr
);
4026 /* Mark ES for GC. */
4029 mark_emit_status (es
)
4030 struct emit_status
*es
;
4038 for (i
= es
->regno_pointer_flag_length
, r
= es
->x_regno_reg_rtx
;
4042 mark_sequence_stack (es
->sequence_stack
);
4043 ggc_mark_tree (es
->sequence_rtl_expr
);
4044 ggc_mark_rtx (es
->x_first_insn
);
4047 /* Create some permanent unique rtl objects shared between all functions.
4048 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4051 init_emit_once (line_numbers
)
4055 enum machine_mode mode
;
4056 enum machine_mode double_mode
;
4058 no_line_numbers
= ! line_numbers
;
4060 /* Compute the word and byte modes. */
4062 byte_mode
= VOIDmode
;
4063 word_mode
= VOIDmode
;
4064 double_mode
= VOIDmode
;
4066 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4067 mode
= GET_MODE_WIDER_MODE (mode
))
4069 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4070 && byte_mode
== VOIDmode
)
4073 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4074 && word_mode
== VOIDmode
)
4078 #ifndef DOUBLE_TYPE_SIZE
4079 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
4082 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4083 mode
= GET_MODE_WIDER_MODE (mode
))
4085 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4086 && double_mode
== VOIDmode
)
4090 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4092 /* Assign register numbers to the globally defined register rtx.
4093 This must be done at runtime because the register number field
4094 is in a union and some compilers can't initialize unions. */
4096 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4097 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4098 stack_pointer_rtx
= gen_rtx_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4099 frame_pointer_rtx
= gen_rtx_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4100 if (hard_frame_pointer_rtx
== 0)
4101 hard_frame_pointer_rtx
= gen_rtx_raw_REG (Pmode
,
4102 HARD_FRAME_POINTER_REGNUM
);
4103 if (arg_pointer_rtx
== 0)
4104 arg_pointer_rtx
= gen_rtx_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4105 virtual_incoming_args_rtx
=
4106 gen_rtx_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4107 virtual_stack_vars_rtx
=
4108 gen_rtx_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4109 virtual_stack_dynamic_rtx
=
4110 gen_rtx_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4111 virtual_outgoing_args_rtx
=
4112 gen_rtx_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4113 virtual_cfa_rtx
= gen_rtx_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4115 /* These rtx must be roots if GC is enabled. */
4117 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4119 #ifdef INIT_EXPANDERS
4120 /* This is to initialize save_machine_status and restore_machine_status before
4121 the first call to push_function_context_to. This is needed by the Chill
4122 front end which calls push_function_context_to before the first cal to
4123 init_function_start. */
4127 /* Create the unique rtx's for certain rtx codes and operand values. */
4129 /* Don't use gen_rtx here since gen_rtx in this case
4130 tries to use these variables. */
4131 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4132 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4133 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4135 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4137 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4138 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4139 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4141 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4143 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4144 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4145 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4146 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4148 for (i
= 0; i
<= 2; i
++)
4150 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4151 mode
= GET_MODE_WIDER_MODE (mode
))
4153 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4154 union real_extract u
;
4156 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
4157 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4159 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
4160 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
4161 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4162 PUT_MODE (tem
, mode
);
4164 const_tiny_rtx
[i
][(int) mode
] = tem
;
4167 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4169 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4170 mode
= GET_MODE_WIDER_MODE (mode
))
4171 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4173 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4175 mode
= GET_MODE_WIDER_MODE (mode
))
4176 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4179 for (mode
= CCmode
; mode
< MAX_MACHINE_MODE
; ++mode
)
4180 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4181 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
4183 ggc_add_rtx_root (&const_tiny_rtx
[0][0], sizeof(const_tiny_rtx
)/sizeof(rtx
));
4184 ggc_add_rtx_root (&const_true_rtx
, 1);
4186 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4187 return_address_pointer_rtx
4188 = gen_rtx_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4192 struct_value_rtx
= STRUCT_VALUE
;
4194 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4197 #ifdef STRUCT_VALUE_INCOMING
4198 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4200 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4201 struct_value_incoming_rtx
4202 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4204 struct_value_incoming_rtx
= struct_value_rtx
;
4208 #ifdef STATIC_CHAIN_REGNUM
4209 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4211 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4212 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4213 static_chain_incoming_rtx
4214 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4217 static_chain_incoming_rtx
= static_chain_rtx
;
4221 static_chain_rtx
= STATIC_CHAIN
;
4223 #ifdef STATIC_CHAIN_INCOMING
4224 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4226 static_chain_incoming_rtx
= static_chain_rtx
;
4230 #ifdef PIC_OFFSET_TABLE_REGNUM
4231 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4234 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4235 ggc_add_rtx_root (&struct_value_rtx
, 1);
4236 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4237 ggc_add_rtx_root (&static_chain_rtx
, 1);
4238 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4239 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4241 /* Initialize the CONST_INT hash table. */
4242 const_int_htab
= htab_create (37, const_int_htab_hash
,
4243 const_int_htab_eq
, NULL
);
4244 ggc_add_root (&const_int_htab
, 1, sizeof (const_int_htab
),
4248 /* Query and clear/ restore no_line_numbers. This is used by the
4249 switch / case handling in stmt.c to give proper line numbers in
4250 warnings about unreachable code. */
4253 force_line_numbers ()
4255 int old
= no_line_numbers
;
4257 no_line_numbers
= 0;
4259 force_next_line_note ();
4264 restore_line_number_status (old_value
)
4267 no_line_numbers
= old_value
;