2000-08-08 Alexandre Petit-Bianco <apbianco@cygnus.com>
[official-gcc.git] / gcc / caller-save.c
blob8a411e17c78b9f6ec2afa6b8bd0b491ab5032ec4
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "insn-config.h"
26 #include "flags.h"
27 #include "regs.h"
28 #include "hard-reg-set.h"
29 #include "recog.h"
30 #include "basic-block.h"
31 #include "reload.h"
32 #include "function.h"
33 #include "expr.h"
34 #include "toplev.h"
35 #include "tm_p.h"
37 #ifndef MAX_MOVE_MAX
38 #define MAX_MOVE_MAX MOVE_MAX
39 #endif
41 #ifndef MIN_UNITS_PER_WORD
42 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
43 #endif
45 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
47 /* Modes for each hard register that we can save. The smallest mode is wide
48 enough to save the entire contents of the register. When saving the
49 register because it is live we first try to save in multi-register modes.
50 If that is not possible the save is done one register at a time. */
52 static enum machine_mode
53 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* For each hard register, a place on the stack where it can be saved,
56 if needed. */
58 static rtx
59 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
65 be recognized. */
67 static enum insn_code
68 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
69 static enum insn_code
70 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
81 insn. */
82 static HARD_REG_SET referenced_regs;
84 /* Computed in mark_set_regs, holds all registers set by the current
85 instruction. */
86 static HARD_REG_SET this_insn_sets;
89 static void mark_set_regs PARAMS ((rtx, rtx, void *));
90 static void mark_referenced_regs PARAMS ((rtx));
91 static int insert_save PARAMS ((struct insn_chain *, int, int,
92 HARD_REG_SET *));
93 static int insert_restore PARAMS ((struct insn_chain *, int, int,
94 int));
95 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
96 enum insn_code, rtx));
97 static void add_stored_regs PARAMS ((rtx, rtx, void *));
99 /* Initialize for caller-save.
101 Look at all the hard registers that are used by a call and for which
102 regclass.c has not already excluded from being used across a call.
104 Ensure that we can find a mode to save the register and that there is a
105 simple insn to save and restore the register. This latter check avoids
106 problems that would occur if we tried to save the MQ register of some
107 machines directly into memory. */
109 void
110 init_caller_save ()
112 char *first_obj = (char *) oballoc (0);
113 rtx addr_reg;
114 int offset;
115 rtx address;
116 int i, j;
118 /* First find all the registers that we need to deal with and all
119 the modes that they can have. If we can't find a mode to use,
120 we can't have the register live over calls. */
122 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
124 if (call_used_regs[i] && ! call_fixed_regs[i])
126 for (j = 1; j <= MOVE_MAX_WORDS; j++)
128 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j);
129 if (regno_save_mode[i][j] == VOIDmode && j == 1)
131 call_fixed_regs[i] = 1;
132 SET_HARD_REG_BIT (call_fixed_reg_set, i);
136 else
137 regno_save_mode[i][1] = VOIDmode;
140 /* The following code tries to approximate the conditions under which
141 we can easily save and restore a register without scratch registers or
142 other complexities. It will usually work, except under conditions where
143 the validity of an insn operand is dependent on the address offset.
144 No such cases are currently known.
146 We first find a typical offset from some BASE_REG_CLASS register.
147 This address is chosen by finding the first register in the class
148 and by finding the smallest power of two that is a valid offset from
149 that register in every mode we will use to save registers. */
151 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
152 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
153 break;
155 if (i == FIRST_PSEUDO_REGISTER)
156 abort ();
158 addr_reg = gen_rtx_REG (Pmode, i);
160 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
162 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
164 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
165 if (regno_save_mode[i][1] != VOIDmode
166 && ! strict_memory_address_p (regno_save_mode[i][1], address))
167 break;
169 if (i == FIRST_PSEUDO_REGISTER)
170 break;
173 /* If we didn't find a valid address, we must use register indirect. */
174 if (offset == 0)
175 address = addr_reg;
177 /* Next we try to form an insn to save and restore the register. We
178 see if such an insn is recognized and meets its constraints. */
180 start_sequence ();
182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
183 for (j = 1; j <= MOVE_MAX_WORDS; j++)
184 if (regno_save_mode[i][j] != VOIDmode)
186 rtx mem = gen_rtx_MEM (regno_save_mode[i][j], address);
187 rtx reg = gen_rtx_REG (regno_save_mode[i][j], i);
188 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
189 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
190 rtx saveinsn = emit_insn (savepat);
191 rtx restinsn = emit_insn (restpat);
192 int ok;
194 reg_save_code[i][j] = recog_memoized (saveinsn);
195 reg_restore_code[i][j] = recog_memoized (restinsn);
197 /* Now extract both insns and see if we can meet their
198 constraints. */
199 ok = (reg_save_code[i][j] != (enum insn_code)-1
200 && reg_restore_code[i][j] != (enum insn_code)-1);
201 if (ok)
203 extract_insn (saveinsn);
204 ok = constrain_operands (1);
205 extract_insn (restinsn);
206 ok &= constrain_operands (1);
209 if (! ok)
211 regno_save_mode[i][j] = VOIDmode;
212 if (j == 1)
214 call_fixed_regs[i] = 1;
215 SET_HARD_REG_BIT (call_fixed_reg_set, i);
220 end_sequence ();
222 obfree (first_obj);
225 /* Initialize save areas by showing that we haven't allocated any yet. */
227 void
228 init_save_areas ()
230 int i, j;
232 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
233 for (j = 1; j <= MOVE_MAX_WORDS; j++)
234 regno_save_mem[i][j] = 0;
237 /* Allocate save areas for any hard registers that might need saving.
238 We take a conservative approach here and look for call-clobbered hard
239 registers that are assigned to pseudos that cross calls. This may
240 overestimate slightly (especially if some of these registers are later
241 used as spill registers), but it should not be significant.
243 Future work:
245 In the fallback case we should iterate backwards across all possible
246 modes for the save, choosing the largest available one instead of
247 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
249 We do not try to use "move multiple" instructions that exist
250 on some machines (such as the 68k moveml). It could be a win to try
251 and use them when possible. The hard part is doing it in a way that is
252 machine independent since they might be saving non-consecutive
253 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
255 void
256 setup_save_areas ()
258 int i, j, k;
259 unsigned int r;
260 HARD_REG_SET hard_regs_used;
262 /* Allocate space in the save area for the largest multi-register
263 pseudos first, then work backwards to single register
264 pseudos. */
266 /* Find and record all call-used hard-registers in this function. */
267 CLEAR_HARD_REG_SET (hard_regs_used);
268 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
269 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
271 unsigned int regno = reg_renumber[i];
272 unsigned int endregno
273 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
275 for (r = regno; r < endregno; r++)
276 if (call_used_regs[r])
277 SET_HARD_REG_BIT (hard_regs_used, r);
280 /* Now run through all the call-used hard-registers and allocate
281 space for them in the caller-save area. Try to allocate space
282 in a manner which allows multi-register saves/restores to be done. */
284 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
285 for (j = MOVE_MAX_WORDS; j > 0; j--)
287 int do_save = 1;
289 /* If no mode exists for this size, try another. Also break out
290 if we have already saved this hard register. */
291 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
292 continue;
294 /* See if any register in this group has been saved. */
295 for (k = 0; k < j; k++)
296 if (regno_save_mem[i + k][1])
298 do_save = 0;
299 break;
301 if (! do_save)
302 continue;
304 for (k = 0; k < j; k++)
305 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
307 do_save = 0;
308 break;
310 if (! do_save)
311 continue;
313 /* We have found an acceptable mode to store in. */
314 regno_save_mem[i][j]
315 = assign_stack_local (regno_save_mode[i][j],
316 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
318 /* Setup single word save area just in case... */
319 for (k = 0; k < j; k++)
321 /* This should not depend on WORDS_BIG_ENDIAN.
322 The order of words in regs is the same as in memory. */
323 rtx temp = gen_rtx_MEM (regno_save_mode[i + k][1],
324 XEXP (regno_save_mem[i][j], 0));
326 regno_save_mem[i + k][1]
327 = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
331 /* Now loop again and set the alias set of any save areas we made to
332 the alias set used to represent frame objects. */
333 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
334 for (j = MOVE_MAX_WORDS; j > 0; j--)
335 if (regno_save_mem[i][j] != 0)
336 MEM_ALIAS_SET (regno_save_mem[i][j]) = get_frame_alias_set ();
339 /* Find the places where hard regs are live across calls and save them. */
341 void
342 save_call_clobbered_regs ()
344 struct insn_chain *chain, *next;
346 CLEAR_HARD_REG_SET (hard_regs_saved);
347 n_regs_saved = 0;
349 for (chain = reload_insn_chain; chain != 0; chain = next)
351 rtx insn = chain->insn;
352 enum rtx_code code = GET_CODE (insn);
354 next = chain->next;
356 if (chain->is_caller_save_insn)
357 abort ();
359 if (GET_RTX_CLASS (code) == 'i')
361 /* If some registers have been saved, see if INSN references
362 any of them. We must restore them before the insn if so. */
364 if (n_regs_saved)
366 int regno;
368 if (code == JUMP_INSN)
369 /* Restore all registers if this is a JUMP_INSN. */
370 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
371 else
373 CLEAR_HARD_REG_SET (referenced_regs);
374 mark_referenced_regs (PATTERN (insn));
375 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
378 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
379 if (TEST_HARD_REG_BIT (referenced_regs, regno))
380 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS);
383 if (code == CALL_INSN)
385 int regno;
386 HARD_REG_SET hard_regs_to_save;
388 /* Use the register life information in CHAIN to compute which
389 regs are live during the call. */
390 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
391 &chain->live_throughout);
392 compute_use_by_pseudos (&hard_regs_to_save,
393 &chain->live_throughout);
395 /* Record all registers set in this call insn. These don't need
396 to be saved. N.B. the call insn might set a subreg of a
397 multi-hard-reg pseudo; then the pseudo is considered live
398 during the call, but the subreg that is set isn't. */
399 CLEAR_HARD_REG_SET (this_insn_sets);
400 note_stores (PATTERN (insn), mark_set_regs, NULL);
402 /* Compute which hard regs must be saved before this call. */
403 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
404 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
405 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
406 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
408 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
409 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
410 regno += insert_save (chain, 1, regno, &hard_regs_to_save);
412 /* Must recompute n_regs_saved. */
413 n_regs_saved = 0;
414 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
415 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
416 n_regs_saved++;
420 if (chain->next == 0 || chain->next->block > chain->block)
422 int regno;
423 /* At the end of the basic block, we must restore any registers that
424 remain saved. If the last insn in the block is a JUMP_INSN, put
425 the restore before the insn, otherwise, put it after the insn. */
427 if (n_regs_saved)
428 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
429 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
430 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
431 regno, MOVE_MAX_WORDS);
436 /* Here from note_stores when an insn stores a value in a register.
437 Set the proper bit or bits in this_insn_sets. All pseudos that have
438 been assigned hard regs have had their register number changed already,
439 so we can ignore pseudos. */
440 static void
441 mark_set_regs (reg, setter, data)
442 rtx reg;
443 rtx setter ATTRIBUTE_UNUSED;
444 void *data ATTRIBUTE_UNUSED;
446 register int regno, endregno, i;
447 enum machine_mode mode = GET_MODE (reg);
448 int word = 0;
450 if (GET_CODE (reg) == SUBREG)
452 word = SUBREG_WORD (reg);
453 reg = SUBREG_REG (reg);
456 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
457 return;
459 regno = REGNO (reg) + word;
460 endregno = regno + HARD_REGNO_NREGS (regno, mode);
462 for (i = regno; i < endregno; i++)
463 SET_HARD_REG_BIT (this_insn_sets, i);
466 /* Here from note_stores when an insn stores a value in a register.
467 Set the proper bit or bits in the passed regset. All pseudos that have
468 been assigned hard regs have had their register number changed already,
469 so we can ignore pseudos. */
470 static void
471 add_stored_regs (reg, setter, data)
472 rtx reg;
473 rtx setter;
474 void *data;
476 register int regno, endregno, i;
477 enum machine_mode mode = GET_MODE (reg);
478 int word = 0;
480 if (GET_CODE (setter) == CLOBBER)
481 return;
483 while (GET_CODE (reg) == SUBREG)
485 word += SUBREG_WORD (reg);
486 reg = SUBREG_REG (reg);
489 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
490 return;
492 regno = REGNO (reg) + word;
493 endregno = regno + HARD_REGNO_NREGS (regno, mode);
495 for (i = regno; i < endregno; i++)
496 SET_REGNO_REG_SET ((regset) data, i);
499 /* Walk X and record all referenced registers in REFERENCED_REGS. */
500 static void
501 mark_referenced_regs (x)
502 rtx x;
504 enum rtx_code code = GET_CODE (x);
505 const char *fmt;
506 int i, j;
508 if (code == SET)
509 mark_referenced_regs (SET_SRC (x));
510 if (code == SET || code == CLOBBER)
512 x = SET_DEST (x);
513 code = GET_CODE (x);
514 if (code == REG || code == PC || code == CC0
515 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
516 /* If we're setting only part of a multi-word register,
517 we shall mark it as referenced, because the words
518 that are not being set should be restored. */
519 && ((GET_MODE_SIZE (GET_MODE (x))
520 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
521 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
522 <= UNITS_PER_WORD))))
523 return;
525 if (code == MEM || code == SUBREG)
527 x = XEXP (x, 0);
528 code = GET_CODE (x);
531 if (code == REG)
533 int regno = REGNO (x);
534 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
535 : reg_renumber[regno]);
537 if (hardregno >= 0)
539 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
540 while (nregs-- > 0)
541 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
543 /* If this is a pseudo that did not get a hard register, scan its
544 memory location, since it might involve the use of another
545 register, which might be saved. */
546 else if (reg_equiv_mem[regno] != 0)
547 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
548 else if (reg_equiv_address[regno] != 0)
549 mark_referenced_regs (reg_equiv_address[regno]);
550 return;
553 fmt = GET_RTX_FORMAT (code);
554 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
556 if (fmt[i] == 'e')
557 mark_referenced_regs (XEXP (x, i));
558 else if (fmt[i] == 'E')
559 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
560 mark_referenced_regs (XVECEXP (x, i, j));
564 /* Insert a sequence of insns to restore. Place these insns in front of
565 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
566 the maximum number of registers which should be restored during this call.
567 It should never be less than 1 since we only work with entire registers.
569 Note that we have verified in init_caller_save that we can do this
570 with a simple SET, so use it. Set INSN_CODE to what we save there
571 since the address might not be valid so the insn might not be recognized.
572 These insns will be reloaded and have register elimination done by
573 find_reload, so we need not worry about that here.
575 Return the extra number of registers saved. */
577 static int
578 insert_restore (chain, before_p, regno, maxrestore)
579 struct insn_chain *chain;
580 int before_p;
581 int regno;
582 int maxrestore;
584 int i, k;
585 rtx pat = NULL_RTX;
586 enum insn_code code = CODE_FOR_nothing;
587 int numregs = 0;
588 struct insn_chain *new;
590 /* A common failure mode if register status is not correct in the RTL
591 is for this routine to be called with a REGNO we didn't expect to
592 save. That will cause us to write an insn with a (nil) SET_DEST
593 or SET_SRC. Instead of doing so and causing a crash later, check
594 for this common case and abort here instead. This will remove one
595 step in debugging such problems. */
597 if (regno_save_mem[regno][1] == 0)
598 abort ();
600 /* Get the pattern to emit and update our status.
602 See if we can restore `maxrestore' registers at once. Work
603 backwards to the single register case. */
604 for (i = maxrestore; i > 0; i--)
606 int j;
607 int ok = 1;
609 if (regno_save_mem[regno][i] == 0)
610 continue;
612 for (j = 0; j < i; j++)
613 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
615 ok = 0;
616 break;
618 /* Must do this one restore at a time */
619 if (! ok)
620 continue;
622 numregs = i;
623 break;
626 pat = gen_rtx_SET (VOIDmode,
627 gen_rtx_REG (GET_MODE (regno_save_mem[regno][numregs]),
628 regno),
629 regno_save_mem[regno][numregs]);
630 code = reg_restore_code[regno][numregs];
631 new = insert_one_insn (chain, before_p, code, pat);
633 /* Clear status for all registers we restored. */
634 for (k = 0; k < i; k++)
636 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
637 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
638 n_regs_saved--;
643 /* Tell our callers how many extra registers we saved/restored */
644 return numregs - 1;
647 /* Like insert_restore above, but save registers instead. */
648 static int
649 insert_save (chain, before_p, regno, to_save)
650 struct insn_chain *chain;
651 int before_p;
652 int regno;
653 HARD_REG_SET *to_save;
655 int i, k;
656 rtx pat = NULL_RTX;
657 enum insn_code code = CODE_FOR_nothing;
658 int numregs = 0;
659 struct insn_chain *new;
661 /* A common failure mode if register status is not correct in the RTL
662 is for this routine to be called with a REGNO we didn't expect to
663 save. That will cause us to write an insn with a (nil) SET_DEST
664 or SET_SRC. Instead of doing so and causing a crash later, check
665 for this common case and abort here instead. This will remove one
666 step in debugging such problems. */
668 if (regno_save_mem[regno][1] == 0)
669 abort ();
671 /* Get the pattern to emit and update our status.
673 See if we can save several registers with a single instruction.
674 Work backwards to the single register case. */
675 for (i = MOVE_MAX_WORDS; i > 0; i--)
677 int j;
678 int ok = 1;
679 if (regno_save_mem[regno][i] == 0)
680 continue;
682 for (j = 0; j < i; j++)
683 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
685 ok = 0;
686 break;
688 /* Must do this one save at a time */
689 if (! ok)
690 continue;
692 numregs = i;
693 break;
696 pat = gen_rtx_SET (VOIDmode, regno_save_mem[regno][numregs],
697 gen_rtx_REG (GET_MODE (regno_save_mem[regno][numregs]),
698 regno));
699 code = reg_save_code[regno][numregs];
700 new = insert_one_insn (chain, before_p, code, pat);
702 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
703 for (k = 0; k < numregs; k++)
705 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
706 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
707 n_regs_saved++;
710 /* Tell our callers how many extra registers we saved/restored */
711 return numregs - 1;
714 /* Emit a new caller-save insn and set the code. */
715 static struct insn_chain *
716 insert_one_insn (chain, before_p, code, pat)
717 struct insn_chain *chain;
718 int before_p;
719 enum insn_code code;
720 rtx pat;
722 rtx insn = chain->insn;
723 struct insn_chain *new;
725 #ifdef HAVE_cc0
726 /* If INSN references CC0, put our insns in front of the insn that sets
727 CC0. This is always safe, since the only way we could be passed an
728 insn that references CC0 is for a restore, and doing a restore earlier
729 isn't a problem. We do, however, assume here that CALL_INSNs don't
730 reference CC0. Guard against non-INSN's like CODE_LABEL. */
732 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
733 && before_p
734 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
735 chain = chain->prev, insn = chain->insn;
736 #endif
738 new = new_insn_chain ();
739 if (before_p)
741 rtx link;
743 new->prev = chain->prev;
744 if (new->prev != 0)
745 new->prev->next = new;
746 else
747 reload_insn_chain = new;
749 chain->prev = new;
750 new->next = chain;
751 new->insn = emit_insn_before (pat, insn);
752 /* ??? It would be nice if we could exclude the already / still saved
753 registers from the live sets. */
754 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
755 /* Registers that die in CHAIN->INSN still live in the new insn. */
756 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
758 if (REG_NOTE_KIND (link) == REG_DEAD)
760 rtx reg = XEXP (link, 0);
761 int regno, i;
763 if (GET_CODE (reg) != REG)
764 abort ();
766 regno = REGNO (reg);
767 if (regno >= FIRST_PSEUDO_REGISTER)
768 regno = reg_renumber[regno];
769 if (regno < 0)
770 continue;
771 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
772 i >= 0; i--)
773 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
776 CLEAR_REG_SET (&new->dead_or_set);
777 if (chain->insn == BLOCK_HEAD (chain->block))
778 BLOCK_HEAD (chain->block) = new->insn;
780 else
782 new->next = chain->next;
783 if (new->next != 0)
784 new->next->prev = new;
785 chain->next = new;
786 new->prev = chain;
787 new->insn = emit_insn_after (pat, insn);
788 /* ??? It would be nice if we could exclude the already / still saved
789 registers from the live sets, and observe REG_UNUSED notes. */
790 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
791 /* Registers that are set in CHAIN->INSN live in the new insn.
792 (Unless there is a REG_UNUSED note for them, but we don't
793 look for them here.) */
794 note_stores (PATTERN (chain->insn), add_stored_regs,
795 &new->live_throughout);
796 CLEAR_REG_SET (&new->dead_or_set);
797 if (chain->insn == BLOCK_END (chain->block))
798 BLOCK_END (chain->block) = new->insn;
800 new->block = chain->block;
801 new->is_caller_save_insn = 1;
803 INSN_CODE (new->insn) = code;
804 return new;