gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
   3    Free Software Foundation, Inc.
   4    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   5                   Ulrich Weigand (uweigand@de.ibm.com).
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify it under
  10 the terms of the GNU General Public License as published by the Free
  11 Software Foundation; either version 2, or (at your option) any later
  12 version.
  13
  14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  17 for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to the Free
  21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
  22 02110-1301, USA.  */
  23
  24 #ifndef _S390_H
  25 #define _S390_H
  26
  27 /* Override the __fixdfdi etc. routines when building libgcc2.
  28    ??? This should be done in a cleaner way ...  */
  29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
  30 #include <config/s390/fixdfdi.h>
  31 #endif
  32
  33 /* Which processor to generate code or schedule for. The cpu attribute
  34    defines a list that mirrors this list, so changes to s390.md must be
  35    made at the same time.  */
  36
  37 enum processor_type
  38 {
  39   PROCESSOR_9672_G5,
  40   PROCESSOR_9672_G6,
  41   PROCESSOR_2064_Z900,
  42   PROCESSOR_2084_Z990,
  43   PROCESSOR_2094_Z9_109,
  44   PROCESSOR_max
  45 };
  46
  47 /* Optional architectural facilities supported by the processor.  */
  48
  49 enum processor_flags
  50 {
  51   PF_IEEE_FLOAT = 1,
  52   PF_ZARCH = 2,
  53   PF_LONG_DISPLACEMENT = 4,
  54   PF_EXTIMM = 8
  55 };
  56
  57 extern enum processor_type s390_tune;
  58 extern enum processor_flags s390_tune_flags;
  59
  60 extern enum processor_type s390_arch;
  61 extern enum processor_flags s390_arch_flags;
  62
  63 #define TARGET_CPU_IEEE_FLOAT \
  64         (s390_arch_flags & PF_IEEE_FLOAT)
  65 #define TARGET_CPU_ZARCH \
  66         (s390_arch_flags & PF_ZARCH)
  67 #define TARGET_CPU_LONG_DISPLACEMENT \
  68         (s390_arch_flags & PF_LONG_DISPLACEMENT)
  69 #define TARGET_CPU_EXTIMM \
  70         (s390_arch_flags & PF_EXTIMM)
  71
  72 #define TARGET_LONG_DISPLACEMENT \
  73        (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
  74 #define TARGET_EXTIMM \
  75        (TARGET_ZARCH && TARGET_CPU_EXTIMM)
  76
  77 /* Run-time target specification.  */
  78
  79 /* Defaults for option flags defined only on some subtargets.  */
  80 #ifndef TARGET_TPF_PROFILING
  81 #define TARGET_TPF_PROFILING 0
  82 #endif
  83
  84 /* This will be overridden by OS headers.  */
  85 #define TARGET_TPF 0
  86
  87 /* Target CPU builtins.  */
  88 #define TARGET_CPU_CPP_BUILTINS()                       \
  89   do                                                    \
  90     {                                                   \
  91       builtin_assert ("cpu=s390");                      \
  92       builtin_assert ("machine=s390");                  \
  93       builtin_define ("__s390__");                      \
  94       if (TARGET_64BIT)                                 \
  95         builtin_define ("__s390x__");                   \
  96     }                                                   \
  97   while (0)
  98
  99 /* ??? Once this actually works, it could be made a runtime option.  */
 100 #define TARGET_IBM_FLOAT           0
 101 #define TARGET_IEEE_FLOAT          1
 102
 103 #ifdef DEFAULT_TARGET_64BIT
 104 #define TARGET_DEFAULT             (MASK_64BIT | MASK_ZARCH | MASK_HARD_FLOAT)
 105 #else
 106 #define TARGET_DEFAULT             MASK_HARD_FLOAT
 107 #endif
 108
 109 /* Support for configure-time defaults.  */
 110 #define OPTION_DEFAULT_SPECS                                    \
 111   { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" },                 \
 112   { "arch", "%{!march=*:-march=%(VALUE)}" },                    \
 113   { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
 114
 115 /* Defaulting rules.  */
 116 #ifdef DEFAULT_TARGET_64BIT
 117 #define DRIVER_SELF_SPECS                                       \
 118   "%{!m31:%{!m64:-m64}}",                                       \
 119   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 120   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 121 #else
 122 #define DRIVER_SELF_SPECS                                       \
 123   "%{!m31:%{!m64:-m31}}",                                       \
 124   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 125   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 126 #endif
 127
 128 /* Target version string.  Overridden by the OS header.  */
 129 #ifdef DEFAULT_TARGET_64BIT
 130 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 131 #else
 132 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 133 #endif
 134
 135 /* Hooks to override options.  */
 136 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 137 #define OVERRIDE_OPTIONS override_options ()
 138
 139 /* Frame pointer is not used for debugging.  */
 140 #define CAN_DEBUG_WITHOUT_FP
 141
 142
 143 /* In libgcc2, determine target settings as compile-time constants.  */
 144 #ifdef IN_LIBGCC2
 145 #undef TARGET_64BIT
 146 #ifdef __s390x__
 147 #define TARGET_64BIT 1
 148 #else
 149 #define TARGET_64BIT 0
 150 #endif
 151 #endif
 152
 153
 154 /* Target machine storage layout.  */
 155
 156 /* Everything is big-endian.  */
 157 #define BITS_BIG_ENDIAN 1
 158 #define BYTES_BIG_ENDIAN 1
 159 #define WORDS_BIG_ENDIAN 1
 160
 161 /* Width of a word, in units (bytes).  */
 162 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 163 #ifndef IN_LIBGCC2
 164 #define MIN_UNITS_PER_WORD 4
 165 #endif
 166 #define MAX_BITS_PER_WORD 64
 167
 168 /* Function arguments and return values are promoted to word size.  */
 169 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)            \
 170 if (INTEGRAL_MODE_P (MODE) &&                           \
 171     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 172   (MODE) = Pmode;                                       \
 173           }
 174
 175 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 176 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 177
 178 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 179 #define STACK_BOUNDARY 64
 180
 181 /* Allocation boundary (in *bits*) for the code of a function.  */
 182 #define FUNCTION_BOUNDARY 32
 183
 184 /* There is no point aligning anything to a rounder boundary than this.  */
 185 #define BIGGEST_ALIGNMENT 64
 186
 187 /* Alignment of field after `int : 0' in a structure.  */
 188 #define EMPTY_FIELD_BOUNDARY 32
 189
 190 /* Alignment on even addresses for LARL instruction.  */
 191 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 192 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 193
 194 /* Alignment is not required by the hardware.  */
 195 #define STRICT_ALIGNMENT 0
 196
 197 /* Mode of stack savearea.
 198    FUNCTION is VOIDmode because calling convention maintains SP.
 199    BLOCK needs Pmode for SP.
 200    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 201 #define STACK_SAVEAREA_MODE(LEVEL)      \
 202   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 203   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
 204
 205 /* Define target floating point format.  */
 206 #define TARGET_FLOAT_FORMAT \
 207   (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
 208
 209
 210 /* Type layout.  */
 211
 212 /* Sizes in bits of the source language data types.  */
 213 #define SHORT_TYPE_SIZE 16
 214 #define INT_TYPE_SIZE 32
 215 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 216 #define LONG_LONG_TYPE_SIZE 64
 217 #define FLOAT_TYPE_SIZE 32
 218 #define DOUBLE_TYPE_SIZE 64
 219 #define LONG_DOUBLE_TYPE_SIZE 64  /* ??? Should support extended format.  */
 220
 221 /* We use "unsigned char" as default.  */
 222 #define DEFAULT_SIGNED_CHAR 0
 223
 224
 225 /* Register usage.  */
 226
 227 /* We have 16 general purpose registers (registers 0-15),
 228    and 16 floating point registers (registers 16-31).
 229    (On non-IEEE machines, we have only 4 fp registers.)
 230
 231    Amongst the general purpose registers, some are used
 232    for specific purposes:
 233    GPR 11: Hard frame pointer (if needed)
 234    GPR 12: Global offset table pointer (if needed)
 235    GPR 13: Literal pool base register
 236    GPR 14: Return address register
 237    GPR 15: Stack pointer
 238
 239    Registers 32-35 are 'fake' hard registers that do not
 240    correspond to actual hardware:
 241    Reg 32: Argument pointer
 242    Reg 33: Condition code
 243    Reg 34: Frame pointer
 244    Reg 35: Return address pointer
 245
 246    Registers 36 and 37 are mapped to access registers
 247    0 and 1, used to implement thread-local storage.  */
 248
 249 #define FIRST_PSEUDO_REGISTER 38
 250
 251 /* Standard register usage.  */
 252 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 253 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 254 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
 255 #define CC_REGNO_P(N)           ((N) == 33)
 256 #define FRAME_REGNO_P(N)        ((N) == 32 || (N) == 34 || (N) == 35)
 257 #define ACCESS_REGNO_P(N)       ((N) == 36 || (N) == 37)
 258
 259 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 260 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 261 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 262 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 263 #define FRAME_REG_P(X)          (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
 264 #define ACCESS_REG_P(X)         (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
 265
 266 /* Set up fixed registers and calling convention:
 267
 268    GPRs 0-5 are always call-clobbered,
 269    GPRs 6-15 are always call-saved.
 270    GPR 12 is fixed if used as GOT pointer.
 271    GPR 13 is always fixed (as literal pool pointer).
 272    GPR 14 is always fixed on S/390 machines (as return address).
 273    GPR 15 is always fixed (as stack pointer).
 274    The 'fake' hard registers are call-clobbered and fixed.
 275    The access registers are call-saved and fixed.
 276
 277    On 31-bit, FPRs 18-19 are call-clobbered;
 278    on 64-bit, FPRs 24-31 are call-clobbered.
 279    The remaining FPRs are call-saved.  */
 280
 281 #define FIXED_REGISTERS                         \
 282 { 0, 0, 0, 0,                                   \
 283   0, 0, 0, 0,                                   \
 284   0, 0, 0, 0,                                   \
 285   0, 1, 1, 1,                                   \
 286   0, 0, 0, 0,                                   \
 287   0, 0, 0, 0,                                   \
 288   0, 0, 0, 0,                                   \
 289   0, 0, 0, 0,                                   \
 290   1, 1, 1, 1,                                   \
 291   1, 1 }
 292
 293 #define CALL_USED_REGISTERS                     \
 294 { 1, 1, 1, 1,                                   \
 295   1, 1, 0, 0,                                   \
 296   0, 0, 0, 0,                                   \
 297   0, 1, 1, 1,                                   \
 298   1, 1, 1, 1,                                   \
 299   1, 1, 1, 1,                                   \
 300   1, 1, 1, 1,                                   \
 301   1, 1, 1, 1,                                   \
 302   1, 1, 1, 1,                                   \
 303   1, 1 }
 304
 305 #define CALL_REALLY_USED_REGISTERS              \
 306 { 1, 1, 1, 1,                                   \
 307   1, 1, 0, 0,                                   \
 308   0, 0, 0, 0,                                   \
 309   0, 0, 0, 0,                                   \
 310   1, 1, 1, 1,                                   \
 311   1, 1, 1, 1,                                   \
 312   1, 1, 1, 1,                                   \
 313   1, 1, 1, 1,                                   \
 314   1, 1, 1, 1,                                   \
 315   0, 0 }
 316
 317 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
 318
 319 /* Preferred register allocation order.  */
 320 #define REG_ALLOC_ORDER                                         \
 321 {  1, 2, 3, 4, 5, 0, 13, 12, 11, 10, 9, 8, 7, 6, 14,            \
 322    16, 17, 18, 19, 20, 21, 22, 23,                              \
 323    24, 25, 26, 27, 28, 29, 30, 31,                              \
 324    15, 32, 33, 34, 35, 36, 37 }
 325
 326
 327 /* Fitting values into registers.  */
 328
 329 /* Integer modes <= word size fit into any GPR.
 330    Integer modes > word size fit into successive GPRs, starting with
 331    an even-numbered register.
 332    SImode and DImode fit into FPRs as well.
 333
 334    Floating point modes <= word size fit into any FPR or GPR.
 335    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 336    into any FPR, or an even-odd GPR pair.
 337
 338    Complex floating point modes fit either into two FPRs, or into
 339    successive GPRs (again starting with an even number).
 340
 341    Condition code modes fit only into the CC register.  */
 342
 343 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 344   (FP_REGNO_P(REGNO)?                                           \
 345     (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :      \
 346    GENERAL_REGNO_P(REGNO)?                                      \
 347     ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
 348    ACCESS_REGNO_P(REGNO)?                                       \
 349     ((GET_MODE_SIZE(MODE)+4-1) / 4) :                           \
 350    1)
 351
 352 #define HARD_REGNO_MODE_OK(REGNO, MODE)                             \
 353   (FP_REGNO_P(REGNO)?                                               \
 354    ((MODE) == SImode || (MODE) == DImode ||                         \
 355     GET_MODE_CLASS(MODE) == MODE_FLOAT ||                           \
 356     GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) :                   \
 357    GENERAL_REGNO_P(REGNO)?                                          \
 358     (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) :        \
 359    CC_REGNO_P(REGNO)?                                               \
 360      GET_MODE_CLASS (MODE) == MODE_CC :                             \
 361    FRAME_REGNO_P(REGNO)?                                            \
 362      (enum machine_mode) (MODE) == Pmode :                          \
 363    ACCESS_REGNO_P(REGNO)?                                           \
 364      (((MODE) == SImode || ((enum machine_mode) (MODE) == Pmode))   \
 365       && (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))) :  \
 366    0)
 367
 368 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 369    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 370    == ((MODE2) == SFmode || (MODE2) == DFmode))
 371
 372 /* Maximum number of registers to represent a value of mode MODE
 373    in a register of class CLASS.  */
 374 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 375      ((CLASS) == FP_REGS ?                                              \
 376       (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :           \
 377       (CLASS) == ACCESS_REGS ?                                          \
 378       (GET_MODE_SIZE (MODE) + 4 - 1) / 4 :                              \
 379       (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 380
 381 /* If a 4-byte value is loaded into a FPR, it is placed into the
 382    *upper* half of the register, not the lower.  Therefore, we
 383    cannot use SUBREGs to switch between modes in FP registers.
 384    Likewise for access registers, since they have only half the
 385    word size on 64-bit.  */
 386 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)               \
 387   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)                   \
 388    ? reg_classes_intersect_p (FP_REGS, CLASS)                   \
 389      || reg_classes_intersect_p (ACCESS_REGS, CLASS) : 0)
 390
 391 /* Register classes.  */
 392
 393 /* We use the following register classes:
 394    GENERAL_REGS     All general purpose registers
 395    ADDR_REGS        All general purpose registers except %r0
 396                     (These registers can be used in address generation)
 397    FP_REGS          All floating point registers
 398    CC_REGS          The condition code register
 399    ACCESS_REGS      The access registers
 400
 401    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 402    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 403    GENERAL_CC_REGS  Union of GENERAL_REGS and CC_REGS
 404    ADDR_CC_REGS     Union of ADDR_REGS and CC_REGS
 405
 406    NO_REGS          No registers
 407    ALL_REGS         All registers
 408
 409    Note that the 'fake' frame pointer and argument pointer registers
 410    are included amongst the address registers here.  */
 411
 412 enum reg_class
 413 {
 414   NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
 415   ADDR_CC_REGS, GENERAL_CC_REGS,
 416   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 417   ALL_REGS, LIM_REG_CLASSES
 418 };
 419 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 420
 421 #define REG_CLASS_NAMES                                                 \
 422 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS",     \
 423   "ADDR_CC_REGS", "GENERAL_CC_REGS",                                    \
 424   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 425
 426 /* Class -> register mapping.  */
 427 #define REG_CLASS_CONTENTS \
 428 {                                                       \
 429   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 430   { 0x00000000, 0x00000002 },   /* CC_REGS */           \
 431   { 0x0000fffe, 0x0000000d },   /* ADDR_REGS */         \
 432   { 0x0000ffff, 0x0000000d },   /* GENERAL_REGS */      \
 433   { 0x00000000, 0x00000030 },   /* ACCESS_REGS */       \
 434   { 0x0000fffe, 0x0000000f },   /* ADDR_CC_REGS */      \
 435   { 0x0000ffff, 0x0000000f },   /* GENERAL_CC_REGS */   \
 436   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 437   { 0xfffffffe, 0x0000000d },   /* ADDR_FP_REGS */      \
 438   { 0xffffffff, 0x0000000d },   /* GENERAL_FP_REGS */   \
 439   { 0xffffffff, 0x0000003f },   /* ALL_REGS */          \
 440 }
 441
 442 /* Register -> class mapping.  */
 443 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 444 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 445
 446 /* ADDR_REGS can be used as base or index register.  */
 447 #define INDEX_REG_CLASS ADDR_REGS
 448 #define BASE_REG_CLASS ADDR_REGS
 449
 450 /* Check whether REGNO is a hard register of the suitable class
 451    or a pseudo register currently allocated to one such.  */
 452 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 453     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 454      && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                         \
 455     || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
 456 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 457
 458
 459 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 460    return the class of reg to actually use.  */
 461 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 462   s390_preferred_reload_class ((X), (CLASS))
 463
 464 /* We need a secondary reload when loading a PLUS which is
 465    not a valid operand for LOAD ADDRESS.  */
 466 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   \
 467   s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
 468
 469 /* We need a secondary reload when storing a double-word
 470    to a non-offsettable memory address.  */
 471 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
 472   s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
 473
 474 /* We need secondary memory to move data between GPRs and FPRs.  */
 475 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 476  ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
 477
 478 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 479    because the movsi and movsf patterns don't handle r/f moves.  */
 480 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 481  (GET_MODE_BITSIZE (MODE) < 32                          \
 482   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 483   : MODE)
 484
 485
 486 /* Define various machine-dependent constraint letters.  */
 487
 488 #define REG_CLASS_FROM_LETTER(C)                                        \
 489   ((C) == 'a' ? ADDR_REGS :                                             \
 490    (C) == 'd' ? GENERAL_REGS :                                          \
 491    (C) == 'f' ? FP_REGS :                                               \
 492    (C) == 'c' ? CC_REGS :                                               \
 493    (C) == 't' ? ACCESS_REGS : NO_REGS)
 494
 495 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
 496   s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
 497
 498 #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                 \
 499   s390_const_double_ok_for_constraint_p ((VALUE), (C), (STR))
 500
 501 #define EXTRA_CONSTRAINT_STR(OP, C, STR)                                \
 502   s390_extra_constraint_str ((OP), (C), (STR))
 503 #define EXTRA_MEMORY_CONSTRAINT(C, STR)                                 \
 504   ((C) == 'Q' || (C) == 'R' || (C) == 'S' || (C) == 'T' || (C) == 'A')
 505 #define EXTRA_ADDRESS_CONSTRAINT(C, STR)                                \
 506   ((C) == 'U' || (C) == 'W' || (C) == 'Y')
 507
 508 #define CONSTRAINT_LEN(C, STR)                                          \
 509   ((C) == 'N' ? 5 :                                                     \
 510    (C) == 'O' ? 2 :                                                     \
 511    (C) == 'A' ? 2 :                                                     \
 512    (C) == 'B' ? 2 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
 513
 514 /* Stack layout and calling conventions.  */
 515
 516 /* Our stack grows from higher to lower addresses.  However, local variables
 517    are accessed by positive offsets, and function arguments are stored at
 518    increasing addresses.  */
 519 #define STACK_GROWS_DOWNWARD
 520 #define FRAME_GROWS_DOWNWARD 1
 521 /* #undef ARGS_GROW_DOWNWARD */
 522
 523 /* The basic stack layout looks like this: the stack pointer points
 524    to the register save area for called functions.  Above that area
 525    is the location to place outgoing arguments.  Above those follow
 526    dynamic allocations (alloca), and finally the local variables.  */
 527
 528 /* Offset from stack-pointer to first location of outgoing args.  */
 529 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 530
 531 /* Offset within stack frame to start allocating local variables at.  */
 532 #define STARTING_FRAME_OFFSET 0
 533
 534 /* Offset from the stack pointer register to an item dynamically
 535    allocated on the stack, e.g., by `alloca'.  */
 536 extern int current_function_outgoing_args_size;
 537 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
 538   (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
 539
 540 /* Offset of first parameter from the argument pointer register value.
 541    We have a fake argument pointer register that points directly to
 542    the argument area.  */
 543 #define FIRST_PARM_OFFSET(FNDECL) 0
 544
 545 /* Defining this macro makes __builtin_frame_address(0) and
 546    __builtin_return_address(0) work with -fomit-frame-pointer.  */
 547 #define INITIAL_FRAME_ADDRESS_RTX                                             \
 548   (TARGET_PACKED_STACK ?                                                      \
 549    plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) :                         \
 550    plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 551
 552 /* The return address of the current frame is retrieved
 553    from the initial value of register RETURN_REGNUM.
 554    For frames farther back, we use the stack slot where
 555    the corresponding RETURN_REGNUM register was saved.  */
 556 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                          \
 557   (TARGET_PACKED_STACK ?                                                      \
 558    plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
 559
 560 #define RETURN_ADDR_RTX(COUNT, FRAME)                                         \
 561   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 562
 563 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 564 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
 565
 566
 567 /* Exception handling.  */
 568
 569 /* Describe calling conventions for DWARF-2 exception handling.  */
 570 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 571 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 572 #define DWARF_FRAME_RETURN_COLUMN  14
 573
 574 /* Describe how we implement __builtin_eh_return.  */
 575 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 576 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
 577
 578 /* Select a format to encode pointers in exception handling data.  */
 579 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 580   (flag_pic                                                                 \
 581     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 582    : DW_EH_PE_absptr)
 583
 584
 585 /* Frame registers.  */
 586
 587 #define STACK_POINTER_REGNUM 15
 588 #define FRAME_POINTER_REGNUM 34
 589 #define HARD_FRAME_POINTER_REGNUM 11
 590 #define ARG_POINTER_REGNUM 32
 591 #define RETURN_ADDRESS_POINTER_REGNUM 35
 592
 593 /* The static chain must be call-clobbered, but not used for
 594    function argument passing.  As register 1 is clobbered by
 595    the trampoline code, we only have one option.  */
 596 #define STATIC_CHAIN_REGNUM 0
 597
 598 /* Number of hardware registers that go into the DWARF-2 unwind info.
 599    To avoid ABI incompatibility, this number must not change even as
 600    'fake' hard registers are added or removed.  */
 601 #define DWARF_FRAME_REGISTERS 34
 602
 603
 604 /* Frame pointer and argument pointer elimination.  */
 605
 606 #define FRAME_POINTER_REQUIRED 0
 607
 608 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
 609
 610 #define ELIMINABLE_REGS                                      \
 611 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},              \
 612  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},         \
 613  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 614  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},           \
 615  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},     \
 616  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 617
 618 #define CAN_ELIMINATE(FROM, TO) \
 619   s390_can_eliminate ((FROM), (TO))
 620
 621 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 622   (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
 623
 624
 625 /* Stack arguments.  */
 626
 627 /* We need current_function_outgoing_args to be valid.  */
 628 #define ACCUMULATE_OUTGOING_ARGS 1
 629
 630 /* Return doesn't modify the stack.  */
 631 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 632
 633
 634 /* Register arguments.  */
 635
 636 typedef struct s390_arg_structure
 637 {
 638   int gprs;                     /* gpr so far */
 639   int fprs;                     /* fpr so far */
 640 }
 641 CUMULATIVE_ARGS;
 642
 643 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
 644   ((CUM).gprs=0, (CUM).fprs=0)
 645
 646 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 647   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 648
 649 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 650   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 651
 652 /* Arguments can be placed in general registers 2 to 6,
 653    or in floating point registers 0 and 2.  */
 654 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 655                                  (N) == 16 || (N) == 17)
 656
 657
 658 /* Scalar return values.  */
 659
 660 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 661   s390_function_value ((VALTYPE), VOIDmode)
 662
 663 #define LIBCALL_VALUE(MODE) \
 664   s390_function_value (NULL, (MODE))
 665
 666 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 667 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 668
 669
 670 /* Function entry and exit.  */
 671
 672 /* When returning from a function, the stack pointer does not matter.  */
 673 #define EXIT_IGNORE_STACK       1
 674
 675
 676 /* Profiling.  */
 677
 678 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 679   s390_function_profiler ((FILE), ((LABELNO)))
 680
 681 #define PROFILE_BEFORE_PROLOGUE 1
 682
 683
 684 /* Implementing the varargs macros.  */
 685
 686 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 687   s390_va_start (valist, nextarg)
 688
 689 /* Trampolines for nested functions.  */
 690
 691 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
 692
 693 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 694    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 695
 696 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 697    s390_trampoline_template (FILE)
 698
 699
 700 /* Addressing modes, and classification of registers for them.  */
 701
 702 /* Recognize any constant value that is a valid address.  */
 703 #define CONSTANT_ADDRESS_P(X) 0
 704
 705 /* Maximum number of registers that can appear in a valid memory address.  */
 706 #define MAX_REGS_PER_ADDRESS 2
 707
 708 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
 709    its validity for a certain class.  We have two alternate definitions
 710    for each of them.  The usual definition accepts all pseudo regs; the
 711    other rejects them all.  The symbol REG_OK_STRICT causes the latter
 712    definition to be used.
 713
 714    Most source files want to accept pseudo regs in the hope that they will
 715    get allocated to the class that the insn wants them to be in.
 716    Some source files that are used after register allocation
 717    need to be strict.  */
 718
 719 #define REG_OK_FOR_INDEX_NONSTRICT_P(X)         \
 720 ((GET_MODE (X) == Pmode) &&                     \
 721  ((REGNO (X) >= FIRST_PSEUDO_REGISTER)          \
 722   || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
 723
 724 #define REG_OK_FOR_BASE_NONSTRICT_P(X)    REG_OK_FOR_INDEX_NONSTRICT_P (X)
 725
 726 #define REG_OK_FOR_INDEX_STRICT_P(X)                            \
 727 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
 728
 729 #define REG_OK_FOR_BASE_STRICT_P(X)                             \
 730 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
 731
 732 #ifndef REG_OK_STRICT
 733 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_NONSTRICT_P(X)
 734 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P(X)
 735 #else
 736 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_STRICT_P(X)
 737 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_STRICT_P(X)
 738 #endif
 739
 740 /* S/390 has no mode dependent addresses.  */
 741 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
 742
 743 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 744    valid memory address for an instruction.
 745    The MODE argument is the machine mode for the MEM expression
 746    that wants to use this address.  */
 747 #ifdef REG_OK_STRICT
 748 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 749 {                                                                       \
 750   if (legitimate_address_p (MODE, X, 1))                                \
 751     goto ADDR;                                                          \
 752 }
 753 #else
 754 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 755 {                                                                       \
 756   if (legitimate_address_p (MODE, X, 0))                                \
 757     goto ADDR;                                                          \
 758 }
 759 #endif
 760
 761 /* Try machine-dependent ways of modifying an illegitimate address
 762    to be legitimate.  If we find one, return the new, valid address.
 763    This macro is used in only one place: `memory_address' in explow.c.  */
 764 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 765 {                                                                       \
 766   (X) = legitimize_address (X, OLDX, MODE);                             \
 767   if (memory_address_p (MODE, X))                                       \
 768     goto WIN;                                                           \
 769 }
 770
 771 /* Try a machine-dependent way of reloading an illegitimate address
 772    operand.  If we find one, push the reload and jump to WIN.  This
 773    macro is used in only one place: `find_reloads_address' in reload.c.  */
 774 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 775 do {                                                                    \
 776   rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE));   \
 777   if (new)                                                              \
 778     {                                                                   \
 779       (AD) = new;                                                       \
 780       goto WIN;                                                         \
 781     }                                                                   \
 782 } while (0)
 783
 784 /* Nonzero if the constant value X is a legitimate general operand.
 785    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 786 #define LEGITIMATE_CONSTANT_P(X) \
 787      legitimate_constant_p (X)
 788
 789 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 790 #define SYMBOLIC_CONST(X)       \
 791 (GET_CODE (X) == SYMBOL_REF                                             \
 792  || GET_CODE (X) == LABEL_REF                                           \
 793  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 794
 795 #define TLS_SYMBOLIC_CONST(X)   \
 796 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X))       \
 797  || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
 798
 799
 800 /* Condition codes.  */
 801
 802 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 803    return the mode to be used for the comparison.  */
 804 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 805
 806 /* Canonicalize a comparison from one we don't have to one we do have.  */
 807 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
 808   s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
 809
 810 /* Define the information needed to generate branch and scc insns.  This is
 811    stored from the compare operation.  Note that we can't use "rtx" here
 812    since it hasn't been defined!  */
 813 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
 814
 815
 816 /* Relative costs of operations.  */
 817
 818 /* On s390, copy between fprs and gprs is expensive.  */
 819 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 820   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 821         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 822     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 823         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 824
 825 /* A C expression for the cost of moving data of mode M between a
 826    register and memory.  A value of 2 is the default; this cost is
 827    relative to those in `REGISTER_MOVE_COST'.  */
 828 #define MEMORY_MOVE_COST(M, C, I) 1
 829
 830 /* A C expression for the cost of a branch instruction.  A value of 1
 831    is the default; other values are interpreted relative to that.  */
 832 #define BRANCH_COST 1
 833
 834 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 835 #define SLOW_BYTE_ACCESS 1
 836
 837 /* An integer expression for the size in bits of the largest integer machine
 838    mode that should actually be used.  We allow pairs of registers.  */
 839 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
 840
 841 /* The maximum number of bytes that a single instruction can move quickly
 842    between memory and registers or between two memory locations.  */
 843 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 844 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
 845 #define MAX_MOVE_MAX 16
 846
 847 /* Determine whether to use move_by_pieces or block move insn.  */
 848 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 849   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 850     || (TARGET_64BIT && (SIZE) == 8) )
 851
 852 /* Determine whether to use clear_by_pieces or block clear insn.  */
 853 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 854   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 855     || (TARGET_64BIT && (SIZE) == 8) )
 856
 857 /* This macro is used to determine whether store_by_pieces should be
 858    called to "memset" storage with byte values other than zero, or
 859    to "memcpy" storage when the source is a constant string.  */
 860 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
 861
 862 /* Don't perform CSE on function addresses.  */
 863 #define NO_FUNCTION_CSE
 864
 865
 866 /* Sections.  */
 867
 868 /* Output before read-only data.  */
 869 #define TEXT_SECTION_ASM_OP ".text"
 870
 871 /* Output before writable (initialized) data.  */
 872 #define DATA_SECTION_ASM_OP ".data"
 873
 874 /* Output before writable (uninitialized) data.  */
 875 #define BSS_SECTION_ASM_OP ".bss"
 876
 877 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 878    in where code resides.  We have to write it as asm code.  */
 879 #ifndef __s390x__
 880 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 881     asm (SECTION_OP "\n\
 882         bras\t%r2,1f\n\
 883 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 884 1:      l\t%r3,0(%r2)\n\
 885         bas\t%r14,0(%r3,%r2)\n\
 886         .previous");
 887 #endif
 888
 889
 890 /* Position independent code.  */
 891
 892 extern int flag_pic;
 893
 894 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 895
 896 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 897
 898
 899 /* Assembler file format.  */
 900
 901 /* Character to start a comment.  */
 902 #define ASM_COMMENT_START "#"
 903
 904 /* Declare an uninitialized external linkage data object.  */
 905 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 906   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 907
 908 /* Globalizing directive for a label.  */
 909 #define GLOBAL_ASM_OP ".globl "
 910
 911 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 912 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 913   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 914
 915 /* Advance the location counter by SIZE bytes.  */
 916 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 917   fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 918
 919 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 920 #define LOCAL_LABEL_PREFIX "."
 921
 922 /* How to refer to registers in assembler output.  This sequence is
 923    indexed by compiler's hard-register-number (see above).  */
 924 #define REGISTER_NAMES                                                  \
 925 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 926   "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",       \
 927   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 928   "%f8",  "%f10", "%f12", "%f14", "%f9",  "%f11", "%f13", "%f15",       \
 929   "%ap",  "%cc",  "%fp",  "%rp",  "%a0",  "%a1"                         \
 930 }
 931
 932 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 933 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 934 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 935
 936 /* Output machine-dependent UNSPECs in address constants.  */
 937 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)          \
 938 do {                                                    \
 939   if (!s390_output_addr_const_extra (FILE, (X)))        \
 940     goto FAIL;                                          \
 941 } while (0);
 942
 943 /* Output an element of a case-vector that is absolute.  */
 944 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 945 do {                                                                    \
 946   char buf[32];                                                         \
 947   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 948   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 949   assemble_name ((FILE), buf);                                          \
 950   fputc ('\n', (FILE));                                                 \
 951 } while (0)
 952
 953 /* Output an element of a case-vector that is relative.  */
 954 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
 955 do {                                                                    \
 956   char buf[32];                                                         \
 957   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 958   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 959   assemble_name ((FILE), buf);                                          \
 960   fputc ('-', (FILE));                                                  \
 961   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
 962   assemble_name ((FILE), buf);                                          \
 963   fputc ('\n', (FILE));                                                 \
 964 } while (0)
 965
 966
 967 /* Miscellaneous parameters.  */
 968
 969 /* Specify the machine mode that this machine uses for the index in the
 970    tablejump instruction.  */
 971 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
 972
 973 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 974    is done just by pretending it is already truncated.  */
 975 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 976
 977 /* Specify the machine mode that pointers have.
 978    After generation of rtl, the compiler makes no further distinction
 979    between pointers and any other objects of this machine mode.  */
 980 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
 981
 982 /* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
 983 #define POINTERS_EXTEND_UNSIGNED -1
 984
 985 /* A function address in a call instruction is a byte address (for
 986    indexing purposes) so give the MEM rtx a byte's mode.  */
 987 #define FUNCTION_MODE QImode
 988
 989 /* Specify the value which is used when clz operand is zero.  */
 990 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
 991
 992 /* Machine-specific symbol_ref flags.  */
 993 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
 994
 995 /* Check whether integer displacement is in range.  */
 996 #define DISP_IN_RANGE(d) \
 997   (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
 998                            : ((d) >= 0 && (d) <= 4095))
 999
1000 #endif