1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 /* The basic idea of common subexpression elimination is to go
39 through the code, keeping a record of expressions that would
40 have the same value at the current scan point, and replacing
41 expressions encountered with the cheapest equivalent expression.
43 It is too complicated to keep track of the different possibilities
44 when control paths merge; so, at each label, we forget all that is
45 known and start fresh. This can be described as processing each
46 basic block separately. Note, however, that these are not quite
47 the same as the basic blocks found by a later pass and used for
48 data flow analysis and register packing. We do not need to start fresh
49 after a conditional jump instruction if there is no label there.
51 We use two data structures to record the equivalent expressions:
52 a hash table for most expressions, and several vectors together
53 with "quantity numbers" to record equivalent (pseudo) registers.
55 The use of the special data structure for registers is desirable
56 because it is faster. It is possible because registers references
57 contain a fairly small number, the register number, taken from
58 a contiguously allocated series, and two register references are
59 identical if they have the same number. General expressions
60 do not have any such thing, so the only way to retrieve the
61 information recorded on an expression other than a register
62 is to keep it in a hash table.
64 Registers and "quantity numbers":
66 At the start of each basic block, all of the (hardware and pseudo)
67 registers used in the function are given distinct quantity
68 numbers to indicate their contents. During scan, when the code
69 copies one register into another, we copy the quantity number.
70 When a register is loaded in any other way, we allocate a new
71 quantity number to describe the value generated by this operation.
72 `reg_qty' records what quantity a register is currently thought
75 All real quantity numbers are greater than or equal to `max_reg'.
76 If register N has not been assigned a quantity, reg_qty[N] will equal N.
78 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
79 variables should be referenced with an index below `max_reg'.
81 We also maintain a bidirectional chain of registers for each
82 quantity number. `qty_first_reg', `qty_last_reg',
83 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
85 The first register in a chain is the one whose lifespan is least local.
86 Among equals, it is the one that was seen first.
87 We replace any equivalent register with that one.
89 If two registers have the same quantity number, it must be true that
90 REG expressions with `qty_mode' must be in the hash table for both
91 registers and must be in the same class.
93 The converse is not true. Since hard registers may be referenced in
94 any mode, two REG expressions might be equivalent in the hash table
95 but not have the same quantity number if the quantity number of one
96 of the registers is not the same mode as those expressions.
98 Constants and quantity numbers
100 When a quantity has a known constant value, that value is stored
101 in the appropriate element of qty_const. This is in addition to
102 putting the constant in the hash table as is usual for non-regs.
104 Whether a reg or a constant is preferred is determined by the configuration
105 macro CONST_COSTS and will often depend on the constant value. In any
106 event, expressions containing constants can be simplified, by fold_rtx.
108 When a quantity has a known nearly constant value (such as an address
109 of a stack slot), that value is stored in the appropriate element
112 Integer constants don't have a machine mode. However, cse
113 determines the intended machine mode from the destination
114 of the instruction that moves the constant. The machine mode
115 is recorded in the hash table along with the actual RTL
116 constant expression so that different modes are kept separate.
120 To record known equivalences among expressions in general
121 we use a hash table called `table'. It has a fixed number of buckets
122 that contain chains of `struct table_elt' elements for expressions.
123 These chains connect the elements whose expressions have the same
126 Other chains through the same elements connect the elements which
127 currently have equivalent values.
129 Register references in an expression are canonicalized before hashing
130 the expression. This is done using `reg_qty' and `qty_first_reg'.
131 The hash code of a register reference is computed using the quantity
132 number, not the register number.
134 When the value of an expression changes, it is necessary to remove from the
135 hash table not just that expression but all expressions whose values
136 could be different as a result.
138 1. If the value changing is in memory, except in special cases
139 ANYTHING referring to memory could be changed. That is because
140 nobody knows where a pointer does not point.
141 The function `invalidate_memory' removes what is necessary.
143 The special cases are when the address is constant or is
144 a constant plus a fixed register such as the frame pointer
145 or a static chain pointer. When such addresses are stored in,
146 we can tell exactly which other such addresses must be invalidated
147 due to overlap. `invalidate' does this.
148 All expressions that refer to non-constant
149 memory addresses are also invalidated. `invalidate_memory' does this.
151 2. If the value changing is a register, all expressions
152 containing references to that register, and only those,
155 Because searching the entire hash table for expressions that contain
156 a register is very slow, we try to figure out when it isn't necessary.
157 Precisely, this is necessary only when expressions have been
158 entered in the hash table using this register, and then the value has
159 changed, and then another expression wants to be added to refer to
160 the register's new value. This sequence of circumstances is rare
161 within any one basic block.
163 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
164 reg_tick[i] is incremented whenever a value is stored in register i.
165 reg_in_table[i] holds -1 if no references to register i have been
166 entered in the table; otherwise, it contains the value reg_tick[i] had
167 when the references were entered. If we want to enter a reference
168 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
169 Until we want to enter a new entry, the mere fact that the two vectors
170 don't match makes the entries be ignored if anyone tries to match them.
172 Registers themselves are entered in the hash table as well as in
173 the equivalent-register chains. However, the vectors `reg_tick'
174 and `reg_in_table' do not apply to expressions which are simple
175 register references. These expressions are removed from the table
176 immediately when they become invalid, and this can be done even if
177 we do not immediately search for all the expressions that refer to
180 A CLOBBER rtx in an instruction invalidates its operand for further
181 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
182 invalidates everything that resides in memory.
186 Constant expressions that differ only by an additive integer
187 are called related. When a constant expression is put in
188 the table, the related expression with no constant term
189 is also entered. These are made to point at each other
190 so that it is possible to find out if there exists any
191 register equivalent to an expression related to a given expression. */
193 /* One plus largest register number used in this function. */
197 /* One plus largest instruction UID used in this function at time of
200 static int max_insn_uid
;
202 /* Length of vectors indexed by quantity number.
203 We know in advance we will not need a quantity number this big. */
207 /* Next quantity number to be allocated.
208 This is 1 + the largest number needed so far. */
212 /* Indexed by quantity number, gives the first (or last) register
213 in the chain of registers that currently contain this quantity. */
215 static int *qty_first_reg
;
216 static int *qty_last_reg
;
218 /* Index by quantity number, gives the mode of the quantity. */
220 static enum machine_mode
*qty_mode
;
222 /* Indexed by quantity number, gives the rtx of the constant value of the
223 quantity, or zero if it does not have a known value.
224 A sum of the frame pointer (or arg pointer) plus a constant
225 can also be entered here. */
227 static rtx
*qty_const
;
229 /* Indexed by qty number, gives the insn that stored the constant value
230 recorded in `qty_const'. */
232 static rtx
*qty_const_insn
;
234 /* The next three variables are used to track when a comparison between a
235 quantity and some constant or register has been passed. In that case, we
236 know the results of the comparison in case we see it again. These variables
237 record a comparison that is known to be true. */
239 /* Indexed by qty number, gives the rtx code of a comparison with a known
240 result involving this quantity. If none, it is UNKNOWN. */
241 static enum rtx_code
*qty_comparison_code
;
243 /* Indexed by qty number, gives the constant being compared against in a
244 comparison of known result. If no such comparison, it is undefined.
245 If the comparison is not with a constant, it is zero. */
247 static rtx
*qty_comparison_const
;
249 /* Indexed by qty number, gives the quantity being compared against in a
250 comparison of known result. If no such comparison, if it undefined.
251 If the comparison is not with a register, it is -1. */
253 static int *qty_comparison_qty
;
256 /* For machines that have a CC0, we do not record its value in the hash
257 table since its use is guaranteed to be the insn immediately following
258 its definition and any other insn is presumed to invalidate it.
260 Instead, we store below the value last assigned to CC0. If it should
261 happen to be a constant, it is stored in preference to the actual
262 assigned value. In case it is a constant, we store the mode in which
263 the constant should be interpreted. */
265 static rtx prev_insn_cc0
;
266 static enum machine_mode prev_insn_cc0_mode
;
269 /* Previous actual insn. 0 if at first insn of basic block. */
271 static rtx prev_insn
;
273 /* Insn being scanned. */
275 static rtx this_insn
;
277 /* Index by register number, gives the quantity number
278 of the register's current contents. */
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
290 static int *reg_next_eqv
;
291 static int *reg_prev_eqv
;
293 /* Index by register number, gives the number of times
294 that register has been altered in the current basic block. */
296 static int *reg_tick
;
298 /* Index by register number, gives the reg_tick value at which
299 rtx's containing this register are valid in the hash table.
300 If this does not equal the current reg_tick value, such expressions
301 existing in the hash table are invalid.
302 If this is -1, no expressions containing this register have been
303 entered in the table. */
305 static int *reg_in_table
;
307 /* A HARD_REG_SET containing all the hard registers for which there is
308 currently a REG expression in the hash table. Note the difference
309 from the above variables, which indicate if the REG is mentioned in some
310 expression in the table. */
312 static HARD_REG_SET hard_regs_in_table
;
314 /* A HARD_REG_SET containing all the hard registers that are invalidated
317 static HARD_REG_SET regs_invalidated_by_call
;
319 /* Two vectors of ints:
320 one containing max_reg -1's; the other max_reg + 500 (an approximation
321 for max_qty) elements where element i contains i.
322 These are used to initialize various other vectors fast. */
324 static int *all_minus_one
;
325 static int *consec_ints
;
327 /* CUID of insn that starts the basic block currently being cse-processed. */
329 static int cse_basic_block_start
;
331 /* CUID of insn that ends the basic block currently being cse-processed. */
333 static int cse_basic_block_end
;
335 /* Vector mapping INSN_UIDs to cuids.
336 The cuids are like uids but increase monotonically always.
337 We use them to see whether a reg is used outside a given basic block. */
339 static int *uid_cuid
;
341 /* Highest UID in UID_CUID. */
344 /* Get the cuid of an insn. */
346 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
348 /* Nonzero if cse has altered conditional jump insns
349 in such a way that jump optimization should be redone. */
351 static int cse_jumps_altered
;
353 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
354 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
355 to put in the note. */
356 static int recorded_label_ref
;
358 /* canon_hash stores 1 in do_not_record
359 if it notices a reference to CC0, PC, or some other volatile
362 static int do_not_record
;
364 #ifdef LOAD_EXTEND_OP
366 /* Scratch rtl used when looking for load-extended copy of a MEM. */
367 static rtx memory_extend_rtx
;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory
;
375 /* canon_hash stores 1 in hash_arg_in_struct
376 if it notices a reference to memory that's part of a structure. */
378 static int hash_arg_in_struct
;
380 /* The hash table contains buckets which are chains of `struct table_elt's,
381 each recording one expression's information.
382 That expression is in the `exp' field.
384 Those elements with the same hash code are chained in both directions
385 through the `next_same_hash' and `prev_same_hash' fields.
387 Each set of expressions with equivalent values
388 are on a two-way chain through the `next_same_value'
389 and `prev_same_value' fields, and all point with
390 the `first_same_value' field at the first element in
391 that chain. The chain is in order of increasing cost.
392 Each element's cost value is in its `cost' field.
394 The `in_memory' field is nonzero for elements that
395 involve any reference to memory. These elements are removed
396 whenever a write is done to an unidentified location in memory.
397 To be safe, we assume that a memory address is unidentified unless
398 the address is either a symbol constant or a constant plus
399 the frame pointer or argument pointer.
401 The `in_struct' field is nonzero for elements that
402 involve any reference to memory inside a structure or array.
404 The `related_value' field is used to connect related expressions
405 (that differ by adding an integer).
406 The related expressions are chained in a circular fashion.
407 `related_value' is zero for expressions for which this
410 The `cost' field stores the cost of this element's expression.
412 The `is_const' flag is set if the element is a constant (including
415 The `flag' field is used as a temporary during some search routines.
417 The `mode' field is usually the same as GET_MODE (`exp'), but
418 if `exp' is a CONST_INT and has no machine mode then the `mode'
419 field is the mode it was being used as. Each constant is
420 recorded separately for each mode it is used with. */
426 struct table_elt
*next_same_hash
;
427 struct table_elt
*prev_same_hash
;
428 struct table_elt
*next_same_value
;
429 struct table_elt
*prev_same_value
;
430 struct table_elt
*first_same_value
;
431 struct table_elt
*related_value
;
433 enum machine_mode mode
;
440 /* We don't want a lot of buckets, because we rarely have very many
441 things stored in the hash table, and a lot of buckets slows
442 down a lot of loops that happen frequently. */
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
451 : canon_hash (X, M) % NBUCKETS)
453 /* Determine whether register number N is considered a fixed register for CSE.
454 It is desirable to replace other regs with fixed regs, to reduce need for
456 A reg wins if it is either the frame pointer or designated as fixed,
457 but not if it is an overlapping register. */
458 #ifdef OVERLAPPING_REGNO_P
459 #define FIXED_REGNO_P(N) \
460 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
461 || fixed_regs[N] || global_regs[N]) \
462 && ! OVERLAPPING_REGNO_P ((N)))
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
477 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
478 || ((N) < FIRST_PSEUDO_REGISTER \
479 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
481 /* A register is cheap if it is a user variable assigned to the register
482 or if its register number always corresponds to a cheap register. */
484 #define CHEAP_REG(N) \
485 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
486 || CHEAP_REGNO (REGNO (N)))
489 (GET_CODE (X) == REG \
490 ? (CHEAP_REG (X) ? 0 \
491 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
495 /* Determine if the quantity number for register X represents a valid index
496 into the `qty_...' variables. */
498 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
501 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
502 during CSE, such nodes are present. Using an ADDRESSOF node which
503 refers to the address of a REG is a good thing because we can then
504 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
505 #define CSE_ADDRESS_COST(RTX) \
506 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
507 ? -1 : ADDRESS_COST(RTX))
510 static struct table_elt
*table
[NBUCKETS
];
512 /* Chain of `struct table_elt's made so far for this function
513 but currently removed from the table. */
515 static struct table_elt
*free_element_chain
;
517 /* Number of `struct table_elt' structures made so far for this function. */
519 static int n_elements_made
;
521 /* Maximum value `n_elements_made' has had so far in this compilation
522 for functions previously processed. */
524 static int max_elements_made
;
526 /* Surviving equivalence class when two equivalence classes are merged
527 by recording the effects of a jump in the last insn. Zero if the
528 last insn was not a conditional jump. */
530 static struct table_elt
*last_jump_equiv_class
;
532 /* Set to the cost of a constant pool reference if one was found for a
533 symbolic constant. If this was found, it means we should try to
534 convert constants into constant pool entries if they don't fit in
537 static int constant_pool_entries_cost
;
539 /* Define maximum length of a branch path. */
541 #define PATHLENGTH 10
543 /* This data describes a block that will be processed by cse_basic_block. */
545 struct cse_basic_block_data
{
546 /* Lowest CUID value of insns in block. */
548 /* Highest CUID value of insns in block. */
550 /* Total number of SETs in block. */
552 /* Last insn in the block. */
554 /* Size of current branch path, if any. */
556 /* Current branch path, indicating which branches will be taken. */
558 /* The branch insn. */
560 /* Whether it should be taken or not. AROUND is the same as taken
561 except that it is used when the destination label is not preceded
563 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
567 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
568 virtual regs here because the simplify_*_operation routines are called
569 by integrate.c, which is called before virtual register instantiation. */
571 #define FIXED_BASE_PLUS_P(X) \
572 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
573 || (X) == arg_pointer_rtx \
574 || (X) == virtual_stack_vars_rtx \
575 || (X) == virtual_incoming_args_rtx \
576 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
577 && (XEXP (X, 0) == frame_pointer_rtx \
578 || XEXP (X, 0) == hard_frame_pointer_rtx \
579 || XEXP (X, 0) == arg_pointer_rtx \
580 || XEXP (X, 0) == virtual_stack_vars_rtx \
581 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
582 || GET_CODE (X) == ADDRESSOF)
584 /* Similar, but also allows reference to the stack pointer.
586 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
587 arg_pointer_rtx by itself is nonzero, because on at least one machine,
588 the i960, the arg pointer is zero when it is unused. */
590 #define NONZERO_BASE_PLUS_P(X) \
591 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
592 || (X) == virtual_stack_vars_rtx \
593 || (X) == virtual_incoming_args_rtx \
594 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
595 && (XEXP (X, 0) == frame_pointer_rtx \
596 || XEXP (X, 0) == hard_frame_pointer_rtx \
597 || XEXP (X, 0) == arg_pointer_rtx \
598 || XEXP (X, 0) == virtual_stack_vars_rtx \
599 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
600 || (X) == stack_pointer_rtx \
601 || (X) == virtual_stack_dynamic_rtx \
602 || (X) == virtual_outgoing_args_rtx \
603 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
604 && (XEXP (X, 0) == stack_pointer_rtx \
605 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
606 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
607 || GET_CODE (X) == ADDRESSOF)
609 static int notreg_cost
PROTO((rtx
));
610 static void new_basic_block
PROTO((void));
611 static void make_new_qty
PROTO((int));
612 static void make_regs_eqv
PROTO((int, int));
613 static void delete_reg_equiv
PROTO((int));
614 static int mention_regs
PROTO((rtx
));
615 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
616 static void free_element
PROTO((struct table_elt
*));
617 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
618 static struct table_elt
*get_element
PROTO((void));
619 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
620 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
621 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
622 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
624 static void merge_equiv_classes
PROTO((struct table_elt
*,
625 struct table_elt
*));
626 static void invalidate
PROTO((rtx
, enum machine_mode
));
627 static int cse_rtx_varies_p
PROTO((rtx
));
628 static void remove_invalid_refs
PROTO((int));
629 static void remove_invalid_subreg_refs
PROTO((int, int, enum machine_mode
));
630 static void rehash_using_reg
PROTO((rtx
));
631 static void invalidate_memory
PROTO((void));
632 static void invalidate_for_call
PROTO((void));
633 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
634 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
635 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
636 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
637 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
640 static int refers_to_p
PROTO((rtx
, rtx
));
641 static rtx canon_reg
PROTO((rtx
, rtx
));
642 static void find_best_addr
PROTO((rtx
, rtx
*));
643 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
645 enum machine_mode
*));
646 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
648 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
650 static rtx fold_rtx
PROTO((rtx
, rtx
));
651 static rtx equiv_constant
PROTO((rtx
));
652 static void record_jump_equiv
PROTO((rtx
, int));
653 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
655 static void cse_insn
PROTO((rtx
, rtx
));
656 static int note_mem_written
PROTO((rtx
));
657 static void invalidate_from_clobbers
PROTO((rtx
));
658 static rtx cse_process_notes
PROTO((rtx
, rtx
));
659 static void cse_around_loop
PROTO((rtx
));
660 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
661 static void invalidate_skipped_block
PROTO((rtx
));
662 static void cse_check_loop_start
PROTO((rtx
, rtx
));
663 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
664 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
665 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
667 extern int rtx_equal_function_value_matters
;
669 /* Return an estimate of the cost of computing rtx X.
670 One use is in cse, to decide which expression to keep in the hash table.
671 Another is in rtl generation, to pick the cheapest way to multiply.
672 Other uses like the latter are expected in the future. */
674 /* Internal function, to compute cost when X is not a register; called
675 from COST macro to keep it simple. */
681 return ((GET_CODE (x
) == SUBREG
682 && GET_CODE (SUBREG_REG (x
)) == REG
683 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
684 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
685 && (GET_MODE_SIZE (GET_MODE (x
))
686 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
687 && subreg_lowpart_p (x
)
688 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
689 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
690 ? (CHEAP_REG (SUBREG_REG (x
)) ? 0
691 : (REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
? 1
693 : rtx_cost (x
, SET
) * 2);
696 /* Return the right cost to give to an operation
697 to make the cost of the corresponding register-to-register instruction
698 N times that of a fast register-to-register instruction. */
700 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
703 rtx_cost (x
, outer_code
)
705 enum rtx_code outer_code
;
708 register enum rtx_code code
;
715 /* Compute the default costs of certain things.
716 Note that RTX_COSTS can override the defaults. */
722 /* Count multiplication by 2**n as a shift,
723 because if we are considering it, we would output it as a shift. */
724 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
725 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
728 total
= COSTS_N_INSNS (5);
734 total
= COSTS_N_INSNS (7);
737 /* Used in loop.c and combine.c as a marker. */
741 /* We don't want these to be used in substitutions because
742 we have no way of validating the resulting insn. So assign
743 anything containing an ASM_OPERANDS a very high cost. */
753 return ! CHEAP_REG (x
);
756 /* If we can't tie these modes, make this expensive. The larger
757 the mode, the more expensive it is. */
758 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
759 return COSTS_N_INSNS (2
760 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
763 RTX_COSTS (x
, code
, outer_code
);
766 CONST_COSTS (x
, code
, outer_code
);
770 #ifdef DEFAULT_RTX_COSTS
771 DEFAULT_RTX_COSTS(x
, code
, outer_code
);
776 /* Sum the costs of the sub-rtx's, plus cost of this operation,
777 which is already in total. */
779 fmt
= GET_RTX_FORMAT (code
);
780 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
782 total
+= rtx_cost (XEXP (x
, i
), code
);
783 else if (fmt
[i
] == 'E')
784 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
785 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
790 /* Clear the hash table and initialize each register with its own quantity,
791 for a new basic block. */
800 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
802 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
803 max_reg
* sizeof (int));
804 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
805 CLEAR_HARD_REG_SET (hard_regs_in_table
);
807 /* The per-quantity values used to be initialized here, but it is
808 much faster to initialize each as it is made in `make_new_qty'. */
810 for (i
= 0; i
< NBUCKETS
; i
++)
812 register struct table_elt
*this, *next
;
813 for (this = table
[i
]; this; this = next
)
815 next
= this->next_same_hash
;
820 bzero ((char *) table
, sizeof table
);
829 /* Say that register REG contains a quantity not in any register before
830 and initialize that quantity. */
838 if (next_qty
>= max_qty
)
841 q
= reg_qty
[reg
] = next_qty
++;
842 qty_first_reg
[q
] = reg
;
843 qty_last_reg
[q
] = reg
;
844 qty_const
[q
] = qty_const_insn
[q
] = 0;
845 qty_comparison_code
[q
] = UNKNOWN
;
847 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
850 /* Make reg NEW equivalent to reg OLD.
851 OLD is not changing; NEW is. */
854 make_regs_eqv (new, old
)
855 register int new, old
;
857 register int lastr
, firstr
;
858 register int q
= reg_qty
[old
];
860 /* Nothing should become eqv until it has a "non-invalid" qty number. */
861 if (! REGNO_QTY_VALID_P (old
))
865 firstr
= qty_first_reg
[q
];
866 lastr
= qty_last_reg
[q
];
868 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
869 hard regs. Among pseudos, if NEW will live longer than any other reg
870 of the same qty, and that is beyond the current basic block,
871 make it the new canonical replacement for this qty. */
872 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
873 /* Certain fixed registers might be of the class NO_REGS. This means
874 that not only can they not be allocated by the compiler, but
875 they cannot be used in substitutions or canonicalizations
877 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
878 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
879 || (new >= FIRST_PSEUDO_REGISTER
880 && (firstr
< FIRST_PSEUDO_REGISTER
881 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
882 || (uid_cuid
[REGNO_FIRST_UID (new)]
883 < cse_basic_block_start
))
884 && (uid_cuid
[REGNO_LAST_UID (new)]
885 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
887 reg_prev_eqv
[firstr
] = new;
888 reg_next_eqv
[new] = firstr
;
889 reg_prev_eqv
[new] = -1;
890 qty_first_reg
[q
] = new;
894 /* If NEW is a hard reg (known to be non-fixed), insert at end.
895 Otherwise, insert before any non-fixed hard regs that are at the
896 end. Registers of class NO_REGS cannot be used as an
897 equivalent for anything. */
898 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
899 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
900 && new >= FIRST_PSEUDO_REGISTER
)
901 lastr
= reg_prev_eqv
[lastr
];
902 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
903 if (reg_next_eqv
[lastr
] >= 0)
904 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
906 qty_last_reg
[q
] = new;
907 reg_next_eqv
[lastr
] = new;
908 reg_prev_eqv
[new] = lastr
;
912 /* Remove REG from its equivalence class. */
915 delete_reg_equiv (reg
)
918 register int q
= reg_qty
[reg
];
921 /* If invalid, do nothing. */
925 p
= reg_prev_eqv
[reg
];
926 n
= reg_next_eqv
[reg
];
935 qty_first_reg
[q
] = n
;
940 /* Remove any invalid expressions from the hash table
941 that refer to any of the registers contained in expression X.
943 Make sure that newly inserted references to those registers
944 as subexpressions will be considered valid.
946 mention_regs is not called when a register itself
947 is being stored in the table.
949 Return 1 if we have done something that may have changed the hash code
956 register enum rtx_code code
;
959 register int changed
= 0;
967 register int regno
= REGNO (x
);
968 register int endregno
969 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
970 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
973 for (i
= regno
; i
< endregno
; i
++)
975 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
976 remove_invalid_refs (i
);
978 reg_in_table
[i
] = reg_tick
[i
];
984 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
985 pseudo if they don't use overlapping words. We handle only pseudos
986 here for simplicity. */
987 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
988 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
990 int i
= REGNO (SUBREG_REG (x
));
992 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
994 /* If reg_tick has been incremented more than once since
995 reg_in_table was last set, that means that the entire
996 register has been set before, so discard anything memorized
997 for the entrire register, including all SUBREG expressions. */
998 if (reg_in_table
[i
] != reg_tick
[i
] - 1)
999 remove_invalid_refs (i
);
1001 remove_invalid_subreg_refs (i
, SUBREG_WORD (x
), GET_MODE (x
));
1004 reg_in_table
[i
] = reg_tick
[i
];
1008 /* If X is a comparison or a COMPARE and either operand is a register
1009 that does not have a quantity, give it one. This is so that a later
1010 call to record_jump_equiv won't cause X to be assigned a different
1011 hash code and not found in the table after that call.
1013 It is not necessary to do this here, since rehash_using_reg can
1014 fix up the table later, but doing this here eliminates the need to
1015 call that expensive function in the most common case where the only
1016 use of the register is in the comparison. */
1018 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
1020 if (GET_CODE (XEXP (x
, 0)) == REG
1021 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1022 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
1024 rehash_using_reg (XEXP (x
, 0));
1028 if (GET_CODE (XEXP (x
, 1)) == REG
1029 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1030 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
1032 rehash_using_reg (XEXP (x
, 1));
1037 fmt
= GET_RTX_FORMAT (code
);
1038 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1040 changed
|= mention_regs (XEXP (x
, i
));
1041 else if (fmt
[i
] == 'E')
1042 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1043 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1048 /* Update the register quantities for inserting X into the hash table
1049 with a value equivalent to CLASSP.
1050 (If the class does not contain a REG, it is irrelevant.)
1051 If MODIFIED is nonzero, X is a destination; it is being modified.
1052 Note that delete_reg_equiv should be called on a register
1053 before insert_regs is done on that register with MODIFIED != 0.
1055 Nonzero value means that elements of reg_qty have changed
1056 so X's hash code may be different. */
1059 insert_regs (x
, classp
, modified
)
1061 struct table_elt
*classp
;
1064 if (GET_CODE (x
) == REG
)
1066 register int regno
= REGNO (x
);
1068 /* If REGNO is in the equivalence table already but is of the
1069 wrong mode for that equivalence, don't do anything here. */
1071 if (REGNO_QTY_VALID_P (regno
)
1072 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1075 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1078 for (classp
= classp
->first_same_value
;
1080 classp
= classp
->next_same_value
)
1081 if (GET_CODE (classp
->exp
) == REG
1082 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1084 make_regs_eqv (regno
, REGNO (classp
->exp
));
1088 make_new_qty (regno
);
1089 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1096 /* If X is a SUBREG, we will likely be inserting the inner register in the
1097 table. If that register doesn't have an assigned quantity number at
1098 this point but does later, the insertion that we will be doing now will
1099 not be accessible because its hash code will have changed. So assign
1100 a quantity number now. */
1102 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1103 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1105 int regno
= REGNO (SUBREG_REG (x
));
1107 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1108 /* Mention_regs checks if REG_TICK is exactly one larger than
1109 REG_IN_TABLE to find out if there was only a single preceding
1110 invalidation - for the SUBREG - or another one, which would be
1111 for the full register. Since we don't invalidate the SUBREG
1112 here first, we might have to bump up REG_TICK so that mention_regs
1113 will do the right thing. */
1114 if (reg_in_table
[regno
] >= 0
1115 && reg_tick
[regno
] == reg_in_table
[regno
] + 1)
1121 return mention_regs (x
);
1124 /* Look in or update the hash table. */
1126 /* Put the element ELT on the list of free elements. */
1130 struct table_elt
*elt
;
1132 elt
->next_same_hash
= free_element_chain
;
1133 free_element_chain
= elt
;
1136 /* Return an element that is free for use. */
1138 static struct table_elt
*
1141 struct table_elt
*elt
= free_element_chain
;
1144 free_element_chain
= elt
->next_same_hash
;
1148 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1151 /* Remove table element ELT from use in the table.
1152 HASH is its hash code, made using the HASH macro.
1153 It's an argument because often that is known in advance
1154 and we save much time not recomputing it. */
1157 remove_from_table (elt
, hash
)
1158 register struct table_elt
*elt
;
1164 /* Mark this element as removed. See cse_insn. */
1165 elt
->first_same_value
= 0;
1167 /* Remove the table element from its equivalence class. */
1170 register struct table_elt
*prev
= elt
->prev_same_value
;
1171 register struct table_elt
*next
= elt
->next_same_value
;
1173 if (next
) next
->prev_same_value
= prev
;
1176 prev
->next_same_value
= next
;
1179 register struct table_elt
*newfirst
= next
;
1182 next
->first_same_value
= newfirst
;
1183 next
= next
->next_same_value
;
1188 /* Remove the table element from its hash bucket. */
1191 register struct table_elt
*prev
= elt
->prev_same_hash
;
1192 register struct table_elt
*next
= elt
->next_same_hash
;
1194 if (next
) next
->prev_same_hash
= prev
;
1197 prev
->next_same_hash
= next
;
1198 else if (table
[hash
] == elt
)
1202 /* This entry is not in the proper hash bucket. This can happen
1203 when two classes were merged by `merge_equiv_classes'. Search
1204 for the hash bucket that it heads. This happens only very
1205 rarely, so the cost is acceptable. */
1206 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1207 if (table
[hash
] == elt
)
1212 /* Remove the table element from its related-value circular chain. */
1214 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1216 register struct table_elt
*p
= elt
->related_value
;
1217 while (p
->related_value
!= elt
)
1218 p
= p
->related_value
;
1219 p
->related_value
= elt
->related_value
;
1220 if (p
->related_value
== p
)
1221 p
->related_value
= 0;
1227 /* Look up X in the hash table and return its table element,
1228 or 0 if X is not in the table.
1230 MODE is the machine-mode of X, or if X is an integer constant
1231 with VOIDmode then MODE is the mode with which X will be used.
1233 Here we are satisfied to find an expression whose tree structure
1236 static struct table_elt
*
1237 lookup (x
, hash
, mode
)
1240 enum machine_mode mode
;
1242 register struct table_elt
*p
;
1244 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1245 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1246 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1252 /* Like `lookup' but don't care whether the table element uses invalid regs.
1253 Also ignore discrepancies in the machine mode of a register. */
1255 static struct table_elt
*
1256 lookup_for_remove (x
, hash
, mode
)
1259 enum machine_mode mode
;
1261 register struct table_elt
*p
;
1263 if (GET_CODE (x
) == REG
)
1265 int regno
= REGNO (x
);
1266 /* Don't check the machine mode when comparing registers;
1267 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1268 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1269 if (GET_CODE (p
->exp
) == REG
1270 && REGNO (p
->exp
) == regno
)
1275 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1276 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1283 /* Look for an expression equivalent to X and with code CODE.
1284 If one is found, return that expression. */
1287 lookup_as_function (x
, code
)
1291 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1293 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1294 long as we are narrowing. So if we looked in vain for a mode narrower
1295 than word_mode before, look for word_mode now. */
1296 if (p
== 0 && code
== CONST_INT
1297 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1300 PUT_MODE (x
, word_mode
);
1301 p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
, word_mode
);
1307 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1309 if (GET_CODE (p
->exp
) == code
1310 /* Make sure this is a valid entry in the table. */
1311 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1318 /* Insert X in the hash table, assuming HASH is its hash code
1319 and CLASSP is an element of the class it should go in
1320 (or 0 if a new class should be made).
1321 It is inserted at the proper position to keep the class in
1322 the order cheapest first.
1324 MODE is the machine-mode of X, or if X is an integer constant
1325 with VOIDmode then MODE is the mode with which X will be used.
1327 For elements of equal cheapness, the most recent one
1328 goes in front, except that the first element in the list
1329 remains first unless a cheaper element is added. The order of
1330 pseudo-registers does not matter, as canon_reg will be called to
1331 find the cheapest when a register is retrieved from the table.
1333 The in_memory field in the hash table element is set to 0.
1334 The caller must set it nonzero if appropriate.
1336 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1337 and if insert_regs returns a nonzero value
1338 you must then recompute its hash code before calling here.
1340 If necessary, update table showing constant values of quantities. */
1342 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1344 static struct table_elt
*
1345 insert (x
, classp
, hash
, mode
)
1347 register struct table_elt
*classp
;
1349 enum machine_mode mode
;
1351 register struct table_elt
*elt
;
1353 /* If X is a register and we haven't made a quantity for it,
1354 something is wrong. */
1355 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1358 /* If X is a hard register, show it is being put in the table. */
1359 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1361 int regno
= REGNO (x
);
1362 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1365 for (i
= regno
; i
< endregno
; i
++)
1366 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1369 /* If X is a label, show we recorded it. */
1370 if (GET_CODE (x
) == LABEL_REF
1371 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1372 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1373 recorded_label_ref
= 1;
1375 /* Put an element for X into the right hash bucket. */
1377 elt
= get_element ();
1379 elt
->cost
= COST (x
);
1380 elt
->next_same_value
= 0;
1381 elt
->prev_same_value
= 0;
1382 elt
->next_same_hash
= table
[hash
];
1383 elt
->prev_same_hash
= 0;
1384 elt
->related_value
= 0;
1387 elt
->is_const
= (CONSTANT_P (x
)
1388 /* GNU C++ takes advantage of this for `this'
1389 (and other const values). */
1390 || (RTX_UNCHANGING_P (x
)
1391 && GET_CODE (x
) == REG
1392 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1393 || FIXED_BASE_PLUS_P (x
));
1396 table
[hash
]->prev_same_hash
= elt
;
1399 /* Put it into the proper value-class. */
1402 classp
= classp
->first_same_value
;
1403 if (CHEAPER (elt
, classp
))
1404 /* Insert at the head of the class */
1406 register struct table_elt
*p
;
1407 elt
->next_same_value
= classp
;
1408 classp
->prev_same_value
= elt
;
1409 elt
->first_same_value
= elt
;
1411 for (p
= classp
; p
; p
= p
->next_same_value
)
1412 p
->first_same_value
= elt
;
1416 /* Insert not at head of the class. */
1417 /* Put it after the last element cheaper than X. */
1418 register struct table_elt
*p
, *next
;
1419 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1421 /* Put it after P and before NEXT. */
1422 elt
->next_same_value
= next
;
1424 next
->prev_same_value
= elt
;
1425 elt
->prev_same_value
= p
;
1426 p
->next_same_value
= elt
;
1427 elt
->first_same_value
= classp
;
1431 elt
->first_same_value
= elt
;
1433 /* If this is a constant being set equivalent to a register or a register
1434 being set equivalent to a constant, note the constant equivalence.
1436 If this is a constant, it cannot be equivalent to a different constant,
1437 and a constant is the only thing that can be cheaper than a register. So
1438 we know the register is the head of the class (before the constant was
1441 If this is a register that is not already known equivalent to a
1442 constant, we must check the entire class.
1444 If this is a register that is already known equivalent to an insn,
1445 update `qty_const_insn' to show that `this_insn' is the latest
1446 insn making that quantity equivalent to the constant. */
1448 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1449 && GET_CODE (x
) != REG
)
1451 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1452 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1453 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1456 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]]
1459 register struct table_elt
*p
;
1461 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1463 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1465 qty_const
[reg_qty
[REGNO (x
)]]
1466 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1467 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1473 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1474 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1475 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1477 /* If this is a constant with symbolic value,
1478 and it has a term with an explicit integer value,
1479 link it up with related expressions. */
1480 if (GET_CODE (x
) == CONST
)
1482 rtx subexp
= get_related_value (x
);
1484 struct table_elt
*subelt
, *subelt_prev
;
1488 /* Get the integer-free subexpression in the hash table. */
1489 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1490 subelt
= lookup (subexp
, subhash
, mode
);
1492 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1493 /* Initialize SUBELT's circular chain if it has none. */
1494 if (subelt
->related_value
== 0)
1495 subelt
->related_value
= subelt
;
1496 /* Find the element in the circular chain that precedes SUBELT. */
1497 subelt_prev
= subelt
;
1498 while (subelt_prev
->related_value
!= subelt
)
1499 subelt_prev
= subelt_prev
->related_value
;
1500 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1501 This way the element that follows SUBELT is the oldest one. */
1502 elt
->related_value
= subelt_prev
->related_value
;
1503 subelt_prev
->related_value
= elt
;
1510 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1511 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1512 the two classes equivalent.
1514 CLASS1 will be the surviving class; CLASS2 should not be used after this
1517 Any invalid entries in CLASS2 will not be copied. */
1520 merge_equiv_classes (class1
, class2
)
1521 struct table_elt
*class1
, *class2
;
1523 struct table_elt
*elt
, *next
, *new;
1525 /* Ensure we start with the head of the classes. */
1526 class1
= class1
->first_same_value
;
1527 class2
= class2
->first_same_value
;
1529 /* If they were already equal, forget it. */
1530 if (class1
== class2
)
1533 for (elt
= class2
; elt
; elt
= next
)
1537 enum machine_mode mode
= elt
->mode
;
1539 next
= elt
->next_same_value
;
1541 /* Remove old entry, make a new one in CLASS1's class.
1542 Don't do this for invalid entries as we cannot find their
1543 hash code (it also isn't necessary). */
1544 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1546 hash_arg_in_memory
= 0;
1547 hash_arg_in_struct
= 0;
1548 hash
= HASH (exp
, mode
);
1550 if (GET_CODE (exp
) == REG
)
1551 delete_reg_equiv (REGNO (exp
));
1553 remove_from_table (elt
, hash
);
1555 if (insert_regs (exp
, class1
, 0))
1557 rehash_using_reg (exp
);
1558 hash
= HASH (exp
, mode
);
1560 new = insert (exp
, class1
, hash
, mode
);
1561 new->in_memory
= hash_arg_in_memory
;
1562 new->in_struct
= hash_arg_in_struct
;
1567 /* Remove from the hash table, or mark as invalid,
1568 all expressions whose values could be altered by storing in X.
1569 X is a register, a subreg, or a memory reference with nonvarying address
1570 (because, when a memory reference with a varying address is stored in,
1571 all memory references are removed by invalidate_memory
1572 so specific invalidation is superfluous).
1573 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1574 instead of just the amount indicated by the mode of X. This is only used
1575 for bitfield stores into memory.
1577 A nonvarying address may be just a register or just
1578 a symbol reference, or it may be either of those plus
1579 a numeric offset. */
1582 invalidate (x
, full_mode
)
1584 enum machine_mode full_mode
;
1587 register struct table_elt
*p
;
1589 /* If X is a register, dependencies on its contents
1590 are recorded through the qty number mechanism.
1591 Just change the qty number of the register,
1592 mark it as invalid for expressions that refer to it,
1593 and remove it itself. */
1595 if (GET_CODE (x
) == REG
)
1597 register int regno
= REGNO (x
);
1598 register unsigned hash
= HASH (x
, GET_MODE (x
));
1600 /* Remove REGNO from any quantity list it might be on and indicate
1601 that its value might have changed. If it is a pseudo, remove its
1602 entry from the hash table.
1604 For a hard register, we do the first two actions above for any
1605 additional hard registers corresponding to X. Then, if any of these
1606 registers are in the table, we must remove any REG entries that
1607 overlap these registers. */
1609 delete_reg_equiv (regno
);
1612 if (regno
>= FIRST_PSEUDO_REGISTER
)
1614 /* Because a register can be referenced in more than one mode,
1615 we might have to remove more than one table entry. */
1617 struct table_elt
*elt
;
1619 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1620 remove_from_table (elt
, hash
);
1624 HOST_WIDE_INT in_table
1625 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1626 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1627 int tregno
, tendregno
;
1628 register struct table_elt
*p
, *next
;
1630 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1632 for (i
= regno
+ 1; i
< endregno
; i
++)
1634 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1635 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1636 delete_reg_equiv (i
);
1641 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1642 for (p
= table
[hash
]; p
; p
= next
)
1644 next
= p
->next_same_hash
;
1646 if (GET_CODE (p
->exp
) != REG
1647 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1650 tregno
= REGNO (p
->exp
);
1652 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1653 if (tendregno
> regno
&& tregno
< endregno
)
1654 remove_from_table (p
, hash
);
1661 if (GET_CODE (x
) == SUBREG
)
1663 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1665 invalidate (SUBREG_REG (x
), VOIDmode
);
1669 /* If X is a parallel, invalidate all of its elements. */
1671 if (GET_CODE (x
) == PARALLEL
)
1673 for (i
= XVECLEN (x
, 0) - 1; i
>= 0 ; --i
)
1674 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1678 /* If X is an expr_list, this is part of a disjoint return value;
1679 extract the location in question ignoring the offset. */
1681 if (GET_CODE (x
) == EXPR_LIST
)
1683 invalidate (XEXP (x
, 0), VOIDmode
);
1687 /* X is not a register; it must be a memory reference with
1688 a nonvarying address. Remove all hash table elements
1689 that refer to overlapping pieces of memory. */
1691 if (GET_CODE (x
) != MEM
)
1694 if (full_mode
== VOIDmode
)
1695 full_mode
= GET_MODE (x
);
1697 for (i
= 0; i
< NBUCKETS
; i
++)
1699 register struct table_elt
*next
;
1700 for (p
= table
[i
]; p
; p
= next
)
1702 next
= p
->next_same_hash
;
1703 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1704 than checking all the aliases). */
1706 && (GET_CODE (p
->exp
) != MEM
1707 || true_dependence (x
, full_mode
, p
->exp
, cse_rtx_varies_p
)))
1708 remove_from_table (p
, i
);
1713 /* Remove all expressions that refer to register REGNO,
1714 since they are already invalid, and we are about to
1715 mark that register valid again and don't want the old
1716 expressions to reappear as valid. */
1719 remove_invalid_refs (regno
)
1723 register struct table_elt
*p
, *next
;
1725 for (i
= 0; i
< NBUCKETS
; i
++)
1726 for (p
= table
[i
]; p
; p
= next
)
1728 next
= p
->next_same_hash
;
1729 if (GET_CODE (p
->exp
) != REG
1730 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1731 remove_from_table (p
, i
);
1735 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1737 remove_invalid_subreg_refs (regno
, word
, mode
)
1740 enum machine_mode mode
;
1743 register struct table_elt
*p
, *next
;
1744 int end
= word
+ (GET_MODE_SIZE (mode
) - 1) / UNITS_PER_WORD
;
1746 for (i
= 0; i
< NBUCKETS
; i
++)
1747 for (p
= table
[i
]; p
; p
= next
)
1750 next
= p
->next_same_hash
;
1753 if (GET_CODE (p
->exp
) != REG
1754 && (GET_CODE (exp
) != SUBREG
1755 || GET_CODE (SUBREG_REG (exp
)) != REG
1756 || REGNO (SUBREG_REG (exp
)) != regno
1757 || (((SUBREG_WORD (exp
)
1758 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1) / UNITS_PER_WORD
)
1760 && SUBREG_WORD (exp
) <= end
))
1761 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1762 remove_from_table (p
, i
);
1766 /* Recompute the hash codes of any valid entries in the hash table that
1767 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1769 This is called when we make a jump equivalence. */
1772 rehash_using_reg (x
)
1776 struct table_elt
*p
, *next
;
1779 if (GET_CODE (x
) == SUBREG
)
1782 /* If X is not a register or if the register is known not to be in any
1783 valid entries in the table, we have no work to do. */
1785 if (GET_CODE (x
) != REG
1786 || reg_in_table
[REGNO (x
)] < 0
1787 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1790 /* Scan all hash chains looking for valid entries that mention X.
1791 If we find one and it is in the wrong hash chain, move it. We can skip
1792 objects that are registers, since they are handled specially. */
1794 for (i
= 0; i
< NBUCKETS
; i
++)
1795 for (p
= table
[i
]; p
; p
= next
)
1797 next
= p
->next_same_hash
;
1798 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1799 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1800 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1802 if (p
->next_same_hash
)
1803 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1805 if (p
->prev_same_hash
)
1806 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1808 table
[i
] = p
->next_same_hash
;
1810 p
->next_same_hash
= table
[hash
];
1811 p
->prev_same_hash
= 0;
1813 table
[hash
]->prev_same_hash
= p
;
1819 /* Remove from the hash table any expression that is a call-clobbered
1820 register. Also update their TICK values. */
1823 invalidate_for_call ()
1825 int regno
, endregno
;
1828 struct table_elt
*p
, *next
;
1831 /* Go through all the hard registers. For each that is clobbered in
1832 a CALL_INSN, remove the register from quantity chains and update
1833 reg_tick if defined. Also see if any of these registers is currently
1836 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1837 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1839 delete_reg_equiv (regno
);
1840 if (reg_tick
[regno
] >= 0)
1843 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1846 /* In the case where we have no call-clobbered hard registers in the
1847 table, we are done. Otherwise, scan the table and remove any
1848 entry that overlaps a call-clobbered register. */
1851 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1852 for (p
= table
[hash
]; p
; p
= next
)
1854 next
= p
->next_same_hash
;
1858 remove_from_table (p
, hash
);
1862 if (GET_CODE (p
->exp
) != REG
1863 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1866 regno
= REGNO (p
->exp
);
1867 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1869 for (i
= regno
; i
< endregno
; i
++)
1870 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1872 remove_from_table (p
, hash
);
1878 /* Given an expression X of type CONST,
1879 and ELT which is its table entry (or 0 if it
1880 is not in the hash table),
1881 return an alternate expression for X as a register plus integer.
1882 If none can be found, return 0. */
1885 use_related_value (x
, elt
)
1887 struct table_elt
*elt
;
1889 register struct table_elt
*relt
= 0;
1890 register struct table_elt
*p
, *q
;
1891 HOST_WIDE_INT offset
;
1893 /* First, is there anything related known?
1894 If we have a table element, we can tell from that.
1895 Otherwise, must look it up. */
1897 if (elt
!= 0 && elt
->related_value
!= 0)
1899 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1901 rtx subexp
= get_related_value (x
);
1903 relt
= lookup (subexp
,
1904 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1911 /* Search all related table entries for one that has an
1912 equivalent register. */
1917 /* This loop is strange in that it is executed in two different cases.
1918 The first is when X is already in the table. Then it is searching
1919 the RELATED_VALUE list of X's class (RELT). The second case is when
1920 X is not in the table. Then RELT points to a class for the related
1923 Ensure that, whatever case we are in, that we ignore classes that have
1924 the same value as X. */
1926 if (rtx_equal_p (x
, p
->exp
))
1929 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1930 if (GET_CODE (q
->exp
) == REG
)
1936 p
= p
->related_value
;
1938 /* We went all the way around, so there is nothing to be found.
1939 Alternatively, perhaps RELT was in the table for some other reason
1940 and it has no related values recorded. */
1941 if (p
== relt
|| p
== 0)
1948 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1949 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1950 return plus_constant (q
->exp
, offset
);
1953 /* Hash an rtx. We are careful to make sure the value is never negative.
1954 Equivalent registers hash identically.
1955 MODE is used in hashing for CONST_INTs only;
1956 otherwise the mode of X is used.
1958 Store 1 in do_not_record if any subexpression is volatile.
1960 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1961 which does not have the RTX_UNCHANGING_P bit set.
1962 In this case, also store 1 in hash_arg_in_struct
1963 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1965 Note that cse_insn knows that the hash code of a MEM expression
1966 is just (int) MEM plus the hash code of the address. */
1969 canon_hash (x
, mode
)
1971 enum machine_mode mode
;
1974 register unsigned hash
= 0;
1975 register enum rtx_code code
;
1978 /* repeat is used to turn tail-recursion into iteration. */
1983 code
= GET_CODE (x
);
1988 register int regno
= REGNO (x
);
1990 /* On some machines, we can't record any non-fixed hard register,
1991 because extending its life will cause reload problems. We
1992 consider ap, fp, and sp to be fixed for this purpose.
1993 On all machines, we can't record any global registers. */
1995 if (regno
< FIRST_PSEUDO_REGISTER
1996 && (global_regs
[regno
]
1997 || (SMALL_REGISTER_CLASSES
1998 && ! fixed_regs
[regno
]
1999 && regno
!= FRAME_POINTER_REGNUM
2000 && regno
!= HARD_FRAME_POINTER_REGNUM
2001 && regno
!= ARG_POINTER_REGNUM
2002 && regno
!= STACK_POINTER_REGNUM
)))
2007 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
2011 /* We handle SUBREG of a REG specially because the underlying
2012 reg changes its hash value with every value change; we don't
2013 want to have to forget unrelated subregs when one subreg changes. */
2016 if (GET_CODE (SUBREG_REG (x
)) == REG
)
2018 hash
+= (((unsigned) SUBREG
<< 7)
2019 + REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
));
2027 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
2028 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
2033 /* This is like the general case, except that it only counts
2034 the integers representing the constant. */
2035 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2036 if (GET_MODE (x
) != VOIDmode
)
2037 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
2039 unsigned tem
= XINT (x
, i
);
2043 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
2044 + (unsigned) CONST_DOUBLE_HIGH (x
));
2047 /* Assume there is only one rtx object for any given label. */
2050 += ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
2055 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
2059 if (MEM_VOLATILE_P (x
))
2064 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
2066 hash_arg_in_memory
= 1;
2067 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
2069 /* Now that we have already found this special case,
2070 might as well speed it up as much as possible. */
2071 hash
+= (unsigned) MEM
;
2082 case UNSPEC_VOLATILE
:
2087 if (MEM_VOLATILE_P (x
))
2098 i
= GET_RTX_LENGTH (code
) - 1;
2099 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2100 fmt
= GET_RTX_FORMAT (code
);
2105 rtx tem
= XEXP (x
, i
);
2107 /* If we are about to do the last recursive call
2108 needed at this level, change it into iteration.
2109 This function is called enough to be worth it. */
2115 hash
+= canon_hash (tem
, 0);
2117 else if (fmt
[i
] == 'E')
2118 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2119 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
2120 else if (fmt
[i
] == 's')
2122 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
2127 else if (fmt
[i
] == 'i')
2129 register unsigned tem
= XINT (x
, i
);
2132 else if (fmt
[i
] == '0')
2140 /* Like canon_hash but with no side effects. */
2145 enum machine_mode mode
;
2147 int save_do_not_record
= do_not_record
;
2148 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2149 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2150 unsigned hash
= canon_hash (x
, mode
);
2151 hash_arg_in_memory
= save_hash_arg_in_memory
;
2152 hash_arg_in_struct
= save_hash_arg_in_struct
;
2153 do_not_record
= save_do_not_record
;
2157 /* Return 1 iff X and Y would canonicalize into the same thing,
2158 without actually constructing the canonicalization of either one.
2159 If VALIDATE is nonzero,
2160 we assume X is an expression being processed from the rtl
2161 and Y was found in the hash table. We check register refs
2162 in Y for being marked as valid.
2164 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2165 that is known to be in the register. Ordinarily, we don't allow them
2166 to match, because letting them match would cause unpredictable results
2167 in all the places that search a hash table chain for an equivalent
2168 for a given value. A possible equivalent that has different structure
2169 has its hash code computed from different data. Whether the hash code
2170 is the same as that of the given value is pure luck. */
2173 exp_equiv_p (x
, y
, validate
, equal_values
)
2179 register enum rtx_code code
;
2182 /* Note: it is incorrect to assume an expression is equivalent to itself
2183 if VALIDATE is nonzero. */
2184 if (x
== y
&& !validate
)
2186 if (x
== 0 || y
== 0)
2189 code
= GET_CODE (x
);
2190 if (code
!= GET_CODE (y
))
2195 /* If X is a constant and Y is a register or vice versa, they may be
2196 equivalent. We only have to validate if Y is a register. */
2197 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2198 && REGNO_QTY_VALID_P (REGNO (y
))
2199 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2200 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2201 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2204 if (CONSTANT_P (y
) && code
== REG
2205 && REGNO_QTY_VALID_P (REGNO (x
))
2206 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2207 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2213 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2214 if (GET_MODE (x
) != GET_MODE (y
))
2224 return INTVAL (x
) == INTVAL (y
);
2227 return XEXP (x
, 0) == XEXP (y
, 0);
2230 return XSTR (x
, 0) == XSTR (y
, 0);
2234 int regno
= REGNO (y
);
2236 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2237 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2240 /* If the quantities are not the same, the expressions are not
2241 equivalent. If there are and we are not to validate, they
2242 are equivalent. Otherwise, ensure all regs are up-to-date. */
2244 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2250 for (i
= regno
; i
< endregno
; i
++)
2251 if (reg_in_table
[i
] != reg_tick
[i
])
2257 /* For commutative operations, check both orders. */
2265 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2266 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2267 validate
, equal_values
))
2268 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2269 validate
, equal_values
)
2270 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2271 validate
, equal_values
)));
2277 /* Compare the elements. If any pair of corresponding elements
2278 fail to match, return 0 for the whole things. */
2280 fmt
= GET_RTX_FORMAT (code
);
2281 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2286 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2291 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2293 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2294 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2295 validate
, equal_values
))
2300 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2305 if (XINT (x
, i
) != XINT (y
, i
))
2310 if (XWINT (x
, i
) != XWINT (y
, i
))
2325 /* Return 1 iff any subexpression of X matches Y.
2326 Here we do not require that X or Y be valid (for registers referred to)
2327 for being in the hash table. */
2334 register enum rtx_code code
;
2340 if (x
== 0 || y
== 0)
2343 code
= GET_CODE (x
);
2344 /* If X as a whole has the same code as Y, they may match.
2346 if (code
== GET_CODE (y
))
2348 if (exp_equiv_p (x
, y
, 0, 1))
2352 /* X does not match, so try its subexpressions. */
2354 fmt
= GET_RTX_FORMAT (code
);
2355 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2364 if (refers_to_p (XEXP (x
, i
), y
))
2367 else if (fmt
[i
] == 'E')
2370 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2371 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2378 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2379 set PBASE, PSTART, and PEND which correspond to the base of the address,
2380 the starting offset, and ending offset respectively.
2382 ADDR is known to be a nonvarying address. */
2384 /* ??? Despite what the comments say, this function is in fact frequently
2385 passed varying addresses. This does not appear to cause any problems. */
2388 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2392 HOST_WIDE_INT
*pstart
, *pend
;
2395 HOST_WIDE_INT start
, end
;
2401 if (flag_pic
&& GET_CODE (base
) == PLUS
2402 && XEXP (base
, 0) == pic_offset_table_rtx
)
2403 base
= XEXP (base
, 1);
2405 /* Registers with nonvarying addresses usually have constant equivalents;
2406 but the frame pointer register is also possible. */
2407 if (GET_CODE (base
) == REG
2409 && REGNO_QTY_VALID_P (REGNO (base
))
2410 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2411 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2412 base
= qty_const
[reg_qty
[REGNO (base
)]];
2413 else if (GET_CODE (base
) == PLUS
2414 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2415 && GET_CODE (XEXP (base
, 0)) == REG
2417 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2418 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2419 == GET_MODE (XEXP (base
, 0)))
2420 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2422 start
= INTVAL (XEXP (base
, 1));
2423 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2425 /* This can happen as the result of virtual register instantiation,
2426 if the initial offset is too large to be a valid address. */
2427 else if (GET_CODE (base
) == PLUS
2428 && GET_CODE (XEXP (base
, 0)) == REG
2429 && GET_CODE (XEXP (base
, 1)) == REG
2431 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2432 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2433 == GET_MODE (XEXP (base
, 0)))
2434 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2435 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2436 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2437 == GET_MODE (XEXP (base
, 1)))
2438 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2440 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2441 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2443 /* One of the two values must be a constant. */
2444 if (GET_CODE (base
) != CONST_INT
)
2446 if (GET_CODE (tem
) != CONST_INT
)
2448 start
= INTVAL (tem
);
2452 start
= INTVAL (base
);
2457 /* Handle everything that we can find inside an address that has been
2458 viewed as constant. */
2462 /* If no part of this switch does a "continue", the code outside
2463 will exit this loop. */
2465 switch (GET_CODE (base
))
2468 /* By definition, operand1 of a LO_SUM is the associated constant
2469 address. Use the associated constant address as the base
2471 base
= XEXP (base
, 1);
2475 /* Strip off CONST. */
2476 base
= XEXP (base
, 0);
2480 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2482 start
+= INTVAL (XEXP (base
, 1));
2483 base
= XEXP (base
, 0);
2489 /* Handle the case of an AND which is the negative of a power of
2490 two. This is used to represent unaligned memory operations. */
2491 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2492 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2494 set_nonvarying_address_components (XEXP (base
, 0), size
,
2495 pbase
, pstart
, pend
);
2497 /* Assume the worst misalignment. START is affected, but not
2498 END, so compensate but adjusting SIZE. Don't lose any
2499 constant we already had. */
2501 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2502 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2515 if (GET_CODE (base
) == CONST_INT
)
2517 start
+= INTVAL (base
);
2523 /* Set the return values. */
2529 /* Return 1 if X has a value that can vary even between two
2530 executions of the program. 0 means X can be compared reliably
2531 against certain constants or near-constants. */
2534 cse_rtx_varies_p (x
)
2537 /* We need not check for X and the equivalence class being of the same
2538 mode because if X is equivalent to a constant in some mode, it
2539 doesn't vary in any mode. */
2541 if (GET_CODE (x
) == REG
2542 && REGNO_QTY_VALID_P (REGNO (x
))
2543 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2544 && qty_const
[reg_qty
[REGNO (x
)]] != 0)
2547 if (GET_CODE (x
) == PLUS
2548 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2549 && GET_CODE (XEXP (x
, 0)) == REG
2550 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2551 && (GET_MODE (XEXP (x
, 0))
2552 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2553 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]])
2556 /* This can happen as the result of virtual register instantiation, if
2557 the initial constant is too large to be a valid address. This gives
2558 us a three instruction sequence, load large offset into a register,
2559 load fp minus a constant into a register, then a MEM which is the
2560 sum of the two `constant' registers. */
2561 if (GET_CODE (x
) == PLUS
2562 && GET_CODE (XEXP (x
, 0)) == REG
2563 && GET_CODE (XEXP (x
, 1)) == REG
2564 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2565 && (GET_MODE (XEXP (x
, 0))
2566 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2567 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]]
2568 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1)))
2569 && (GET_MODE (XEXP (x
, 1))
2570 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 1))]])
2571 && qty_const
[reg_qty
[REGNO (XEXP (x
, 1))]])
2574 return rtx_varies_p (x
);
2577 /* Canonicalize an expression:
2578 replace each register reference inside it
2579 with the "oldest" equivalent register.
2581 If INSN is non-zero and we are replacing a pseudo with a hard register
2582 or vice versa, validate_change is used to ensure that INSN remains valid
2583 after we make our substitution. The calls are made with IN_GROUP non-zero
2584 so apply_change_group must be called upon the outermost return from this
2585 function (unless INSN is zero). The result of apply_change_group can
2586 generally be discarded since the changes we are making are optional. */
2594 register enum rtx_code code
;
2600 code
= GET_CODE (x
);
2618 /* Never replace a hard reg, because hard regs can appear
2619 in more than one machine mode, and we must preserve the mode
2620 of each occurrence. Also, some hard regs appear in
2621 MEMs that are shared and mustn't be altered. Don't try to
2622 replace any reg that maps to a reg of class NO_REGS. */
2623 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2624 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2627 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2628 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2629 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2630 : gen_rtx_REG (qty_mode
[reg_qty
[REGNO (x
)]], first
));
2637 fmt
= GET_RTX_FORMAT (code
);
2638 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2644 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2647 /* If replacing pseudo with hard reg or vice versa, ensure the
2648 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2649 if (insn
!= 0 && new != 0
2650 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2651 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2652 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2653 || (insn_code
= recog_memoized (insn
)) < 0
2654 || insn_n_dups
[insn_code
] > 0))
2655 validate_change (insn
, &XEXP (x
, i
), new, 1);
2659 else if (fmt
[i
] == 'E')
2660 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2661 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2667 /* LOC is a location within INSN that is an operand address (the contents of
2668 a MEM). Find the best equivalent address to use that is valid for this
2671 On most CISC machines, complicated address modes are costly, and rtx_cost
2672 is a good approximation for that cost. However, most RISC machines have
2673 only a few (usually only one) memory reference formats. If an address is
2674 valid at all, it is often just as cheap as any other address. Hence, for
2675 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2676 costs of various addresses. For two addresses of equal cost, choose the one
2677 with the highest `rtx_cost' value as that has the potential of eliminating
2678 the most insns. For equal costs, we choose the first in the equivalence
2679 class. Note that we ignore the fact that pseudo registers are cheaper
2680 than hard registers here because we would also prefer the pseudo registers.
2684 find_best_addr (insn
, loc
)
2688 struct table_elt
*elt
;
2691 struct table_elt
*p
;
2692 int found_better
= 1;
2694 int save_do_not_record
= do_not_record
;
2695 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2696 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2701 /* Do not try to replace constant addresses or addresses of local and
2702 argument slots. These MEM expressions are made only once and inserted
2703 in many instructions, as well as being used to control symbol table
2704 output. It is not safe to clobber them.
2706 There are some uncommon cases where the address is already in a register
2707 for some reason, but we cannot take advantage of that because we have
2708 no easy way to unshare the MEM. In addition, looking up all stack
2709 addresses is costly. */
2710 if ((GET_CODE (addr
) == PLUS
2711 && GET_CODE (XEXP (addr
, 0)) == REG
2712 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2713 && (regno
= REGNO (XEXP (addr
, 0)),
2714 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2715 || regno
== ARG_POINTER_REGNUM
))
2716 || (GET_CODE (addr
) == REG
2717 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2718 || regno
== HARD_FRAME_POINTER_REGNUM
2719 || regno
== ARG_POINTER_REGNUM
))
2720 || GET_CODE (addr
) == ADDRESSOF
2721 || CONSTANT_ADDRESS_P (addr
))
2724 /* If this address is not simply a register, try to fold it. This will
2725 sometimes simplify the expression. Many simplifications
2726 will not be valid, but some, usually applying the associative rule, will
2727 be valid and produce better code. */
2728 if (GET_CODE (addr
) != REG
)
2730 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2734 && (CSE_ADDRESS_COST (folded
) < CSE_ADDRESS_COST (addr
)
2735 || (CSE_ADDRESS_COST (folded
) == CSE_ADDRESS_COST (addr
)
2736 && rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)))
2738 && rtx_cost (folded
, MEM
) < rtx_cost (addr
, MEM
)
2740 && validate_change (insn
, loc
, folded
, 0))
2744 /* If this address is not in the hash table, we can't look for equivalences
2745 of the whole address. Also, ignore if volatile. */
2748 hash
= HASH (addr
, Pmode
);
2749 addr_volatile
= do_not_record
;
2750 do_not_record
= save_do_not_record
;
2751 hash_arg_in_memory
= save_hash_arg_in_memory
;
2752 hash_arg_in_struct
= save_hash_arg_in_struct
;
2757 elt
= lookup (addr
, hash
, Pmode
);
2759 #ifndef ADDRESS_COST
2762 int our_cost
= elt
->cost
;
2764 /* Find the lowest cost below ours that works. */
2765 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2766 if (elt
->cost
< our_cost
2767 && (GET_CODE (elt
->exp
) == REG
2768 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2769 && validate_change (insn
, loc
,
2770 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2777 /* We need to find the best (under the criteria documented above) entry
2778 in the class that is valid. We use the `flag' field to indicate
2779 choices that were invalid and iterate until we can't find a better
2780 one that hasn't already been tried. */
2782 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2785 while (found_better
)
2787 int best_addr_cost
= CSE_ADDRESS_COST (*loc
);
2788 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2789 struct table_elt
*best_elt
= elt
;
2792 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2795 if ((GET_CODE (p
->exp
) == REG
2796 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2797 && (CSE_ADDRESS_COST (p
->exp
) < best_addr_cost
2798 || (CSE_ADDRESS_COST (p
->exp
) == best_addr_cost
2799 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2802 best_addr_cost
= CSE_ADDRESS_COST (p
->exp
);
2803 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2810 if (validate_change (insn
, loc
,
2811 canon_reg (copy_rtx (best_elt
->exp
),
2820 /* If the address is a binary operation with the first operand a register
2821 and the second a constant, do the same as above, but looking for
2822 equivalences of the register. Then try to simplify before checking for
2823 the best address to use. This catches a few cases: First is when we
2824 have REG+const and the register is another REG+const. We can often merge
2825 the constants and eliminate one insn and one register. It may also be
2826 that a machine has a cheap REG+REG+const. Finally, this improves the
2827 code on the Alpha for unaligned byte stores. */
2829 if (flag_expensive_optimizations
2830 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2831 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2832 && GET_CODE (XEXP (*loc
, 0)) == REG
2833 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2835 rtx c
= XEXP (*loc
, 1);
2838 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2839 do_not_record
= save_do_not_record
;
2840 hash_arg_in_memory
= save_hash_arg_in_memory
;
2841 hash_arg_in_struct
= save_hash_arg_in_struct
;
2843 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2847 /* We need to find the best (under the criteria documented above) entry
2848 in the class that is valid. We use the `flag' field to indicate
2849 choices that were invalid and iterate until we can't find a better
2850 one that hasn't already been tried. */
2852 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2855 while (found_better
)
2857 int best_addr_cost
= CSE_ADDRESS_COST (*loc
);
2858 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2859 struct table_elt
*best_elt
= elt
;
2860 rtx best_rtx
= *loc
;
2863 /* This is at worst case an O(n^2) algorithm, so limit our search
2864 to the first 32 elements on the list. This avoids trouble
2865 compiling code with very long basic blocks that can easily
2866 call cse_gen_binary so many times that we run out of memory. */
2869 for (p
= elt
->first_same_value
, count
= 0;
2871 p
= p
->next_same_value
, count
++)
2873 && (GET_CODE (p
->exp
) == REG
2874 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2876 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2878 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2879 || (CSE_ADDRESS_COST (new) == best_addr_cost
2880 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2883 best_addr_cost
= CSE_ADDRESS_COST (new);
2884 best_rtx_cost
= (COST (new) + 1) >> 1;
2892 if (validate_change (insn
, loc
,
2893 canon_reg (copy_rtx (best_rtx
),
2904 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2905 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2906 what values are being compared.
2908 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2909 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2910 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2911 compared to produce cc0.
2913 The return value is the comparison operator and is either the code of
2914 A or the code corresponding to the inverse of the comparison. */
2916 static enum rtx_code
2917 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2920 enum machine_mode
*pmode1
, *pmode2
;
2924 arg1
= *parg1
, arg2
= *parg2
;
2926 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2928 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2930 /* Set non-zero when we find something of interest. */
2932 int reverse_code
= 0;
2933 struct table_elt
*p
= 0;
2935 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2936 On machines with CC0, this is the only case that can occur, since
2937 fold_rtx will return the COMPARE or item being compared with zero
2940 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2943 /* If ARG1 is a comparison operator and CODE is testing for
2944 STORE_FLAG_VALUE, get the inner arguments. */
2946 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2949 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2950 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2951 #ifdef FLOAT_STORE_FLAG_VALUE
2952 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2953 && FLOAT_STORE_FLAG_VALUE
< 0)
2958 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2959 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2960 #ifdef FLOAT_STORE_FLAG_VALUE
2961 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2962 && FLOAT_STORE_FLAG_VALUE
< 0)
2965 x
= arg1
, reverse_code
= 1;
2968 /* ??? We could also check for
2970 (ne (and (eq (...) (const_int 1))) (const_int 0))
2972 and related forms, but let's wait until we see them occurring. */
2975 /* Look up ARG1 in the hash table and see if it has an equivalence
2976 that lets us see what is being compared. */
2977 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2979 if (p
) p
= p
->first_same_value
;
2981 for (; p
; p
= p
->next_same_value
)
2983 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2985 /* If the entry isn't valid, skip it. */
2986 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2989 if (GET_CODE (p
->exp
) == COMPARE
2990 /* Another possibility is that this machine has a compare insn
2991 that includes the comparison code. In that case, ARG1 would
2992 be equivalent to a comparison operation that would set ARG1 to
2993 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2994 ORIG_CODE is the actual comparison being done; if it is an EQ,
2995 we must reverse ORIG_CODE. On machine with a negative value
2996 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2999 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3000 && (GET_MODE_BITSIZE (inner_mode
)
3001 <= HOST_BITS_PER_WIDE_INT
)
3002 && (STORE_FLAG_VALUE
3003 & ((HOST_WIDE_INT
) 1
3004 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3005 #ifdef FLOAT_STORE_FLAG_VALUE
3007 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3008 && FLOAT_STORE_FLAG_VALUE
< 0)
3011 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
3016 else if ((code
== EQ
3018 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3019 && (GET_MODE_BITSIZE (inner_mode
)
3020 <= HOST_BITS_PER_WIDE_INT
)
3021 && (STORE_FLAG_VALUE
3022 & ((HOST_WIDE_INT
) 1
3023 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3024 #ifdef FLOAT_STORE_FLAG_VALUE
3026 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3027 && FLOAT_STORE_FLAG_VALUE
< 0)
3030 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
3037 /* If this is fp + constant, the equivalent is a better operand since
3038 it may let us predict the value of the comparison. */
3039 else if (NONZERO_BASE_PLUS_P (p
->exp
))
3046 /* If we didn't find a useful equivalence for ARG1, we are done.
3047 Otherwise, set up for the next iteration. */
3051 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3052 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
3053 code
= GET_CODE (x
);
3056 code
= reverse_condition (code
);
3059 /* Return our results. Return the modes from before fold_rtx
3060 because fold_rtx might produce const_int, and then it's too late. */
3061 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3062 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3067 /* Try to simplify a unary operation CODE whose output mode is to be
3068 MODE with input operand OP whose mode was originally OP_MODE.
3069 Return zero if no simplification can be made. */
3072 simplify_unary_operation (code
, mode
, op
, op_mode
)
3074 enum machine_mode mode
;
3076 enum machine_mode op_mode
;
3078 register int width
= GET_MODE_BITSIZE (mode
);
3080 /* The order of these tests is critical so that, for example, we don't
3081 check the wrong mode (input vs. output) for a conversion operation,
3082 such as FIX. At some point, this should be simplified. */
3084 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3086 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
3087 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3089 HOST_WIDE_INT hv
, lv
;
3092 if (GET_CODE (op
) == CONST_INT
)
3093 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3095 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3097 #ifdef REAL_ARITHMETIC
3098 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
3102 d
= (double) (~ hv
);
3103 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3104 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3105 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
3111 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3112 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3113 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3115 #endif /* REAL_ARITHMETIC */
3116 d
= real_value_truncate (mode
, d
);
3117 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3119 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
3120 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3122 HOST_WIDE_INT hv
, lv
;
3125 if (GET_CODE (op
) == CONST_INT
)
3126 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3128 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3130 if (op_mode
== VOIDmode
)
3132 /* We don't know how to interpret negative-looking numbers in
3133 this case, so don't try to fold those. */
3137 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3140 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3142 #ifdef REAL_ARITHMETIC
3143 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3146 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3147 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3148 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3149 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3150 #endif /* REAL_ARITHMETIC */
3151 d
= real_value_truncate (mode
, d
);
3152 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3156 if (GET_CODE (op
) == CONST_INT
3157 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3159 register HOST_WIDE_INT arg0
= INTVAL (op
);
3160 register HOST_WIDE_INT val
;
3173 val
= (arg0
>= 0 ? arg0
: - arg0
);
3177 /* Don't use ffs here. Instead, get low order bit and then its
3178 number. If arg0 is zero, this will return 0, as desired. */
3179 arg0
&= GET_MODE_MASK (mode
);
3180 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3188 if (op_mode
== VOIDmode
)
3190 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3192 /* If we were really extending the mode,
3193 we would have to distinguish between zero-extension
3194 and sign-extension. */
3195 if (width
!= GET_MODE_BITSIZE (op_mode
))
3199 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3200 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3206 if (op_mode
== VOIDmode
)
3208 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3210 /* If we were really extending the mode,
3211 we would have to distinguish between zero-extension
3212 and sign-extension. */
3213 if (width
!= GET_MODE_BITSIZE (op_mode
))
3217 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3220 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3222 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3223 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3236 /* Clear the bits that don't belong in our mode,
3237 unless they and our sign bit are all one.
3238 So we get either a reasonable negative value or a reasonable
3239 unsigned value for this mode. */
3240 if (width
< HOST_BITS_PER_WIDE_INT
3241 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3242 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3243 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3245 return GEN_INT (val
);
3248 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3249 for a DImode operation on a CONST_INT. */
3250 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3251 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3253 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3255 if (GET_CODE (op
) == CONST_DOUBLE
)
3256 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3258 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3268 neg_double (l1
, h1
, &lv
, &hv
);
3273 neg_double (l1
, h1
, &lv
, &hv
);
3281 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3283 lv
= exact_log2 (l1
& (-l1
)) + 1;
3287 /* This is just a change-of-mode, so do nothing. */
3292 if (op_mode
== VOIDmode
3293 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3297 lv
= l1
& GET_MODE_MASK (op_mode
);
3301 if (op_mode
== VOIDmode
3302 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3306 lv
= l1
& GET_MODE_MASK (op_mode
);
3307 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3308 && (lv
& ((HOST_WIDE_INT
) 1
3309 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3310 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3312 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3323 return immed_double_const (lv
, hv
, mode
);
3326 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3327 else if (GET_CODE (op
) == CONST_DOUBLE
3328 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3334 if (setjmp (handler
))
3335 /* There used to be a warning here, but that is inadvisable.
3336 People may want to cause traps, and the natural way
3337 to do it should not get a warning. */
3340 set_float_handler (handler
);
3342 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3347 d
= REAL_VALUE_NEGATE (d
);
3351 if (REAL_VALUE_NEGATIVE (d
))
3352 d
= REAL_VALUE_NEGATE (d
);
3355 case FLOAT_TRUNCATE
:
3356 d
= real_value_truncate (mode
, d
);
3360 /* All this does is change the mode. */
3364 d
= REAL_VALUE_RNDZINT (d
);
3368 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3378 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3379 set_float_handler (NULL_PTR
);
3383 else if (GET_CODE (op
) == CONST_DOUBLE
3384 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3385 && GET_MODE_CLASS (mode
) == MODE_INT
3386 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3392 if (setjmp (handler
))
3395 set_float_handler (handler
);
3397 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3402 val
= REAL_VALUE_FIX (d
);
3406 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3413 set_float_handler (NULL_PTR
);
3415 /* Clear the bits that don't belong in our mode,
3416 unless they and our sign bit are all one.
3417 So we get either a reasonable negative value or a reasonable
3418 unsigned value for this mode. */
3419 if (width
< HOST_BITS_PER_WIDE_INT
3420 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3421 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3422 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3424 /* If this would be an entire word for the target, but is not for
3425 the host, then sign-extend on the host so that the number will look
3426 the same way on the host that it would on the target.
3428 For example, when building a 64 bit alpha hosted 32 bit sparc
3429 targeted compiler, then we want the 32 bit unsigned value -1 to be
3430 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3431 The later confuses the sparc backend. */
3433 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3434 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3435 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3437 return GEN_INT (val
);
3440 /* This was formerly used only for non-IEEE float.
3441 eggert@twinsun.com says it is safe for IEEE also. */
3444 /* There are some simplifications we can do even if the operands
3450 /* (not (not X)) == X, similarly for NEG. */
3451 if (GET_CODE (op
) == code
)
3452 return XEXP (op
, 0);
3456 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3457 becomes just the MINUS if its mode is MODE. This allows
3458 folding switch statements on machines using casesi (such as
3460 if (GET_CODE (op
) == TRUNCATE
3461 && GET_MODE (XEXP (op
, 0)) == mode
3462 && GET_CODE (XEXP (op
, 0)) == MINUS
3463 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3464 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3465 return XEXP (op
, 0);
3467 #ifdef POINTERS_EXTEND_UNSIGNED
3468 if (! POINTERS_EXTEND_UNSIGNED
3469 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3471 return convert_memory_address (Pmode
, op
);
3475 #ifdef POINTERS_EXTEND_UNSIGNED
3477 if (POINTERS_EXTEND_UNSIGNED
3478 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3480 return convert_memory_address (Pmode
, op
);
3492 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3493 and OP1. Return 0 if no simplification is possible.
3495 Don't use this for relational operations such as EQ or LT.
3496 Use simplify_relational_operation instead. */
3499 simplify_binary_operation (code
, mode
, op0
, op1
)
3501 enum machine_mode mode
;
3504 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3506 int width
= GET_MODE_BITSIZE (mode
);
3509 /* Relational operations don't work here. We must know the mode
3510 of the operands in order to do the comparison correctly.
3511 Assuming a full word can give incorrect results.
3512 Consider comparing 128 with -128 in QImode. */
3514 if (GET_RTX_CLASS (code
) == '<')
3517 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3518 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3519 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3520 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3522 REAL_VALUE_TYPE f0
, f1
, value
;
3525 if (setjmp (handler
))
3528 set_float_handler (handler
);
3530 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3531 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3532 f0
= real_value_truncate (mode
, f0
);
3533 f1
= real_value_truncate (mode
, f1
);
3535 #ifdef REAL_ARITHMETIC
3536 #ifndef REAL_INFINITY
3537 if (code
== DIV
&& REAL_VALUES_EQUAL (f1
, dconst0
))
3540 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3554 #ifndef REAL_INFINITY
3561 value
= MIN (f0
, f1
);
3564 value
= MAX (f0
, f1
);
3571 value
= real_value_truncate (mode
, value
);
3572 set_float_handler (NULL_PTR
);
3573 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3575 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3577 /* We can fold some multi-word operations. */
3578 if (GET_MODE_CLASS (mode
) == MODE_INT
3579 && width
== HOST_BITS_PER_WIDE_INT
* 2
3580 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3581 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3583 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3585 if (GET_CODE (op0
) == CONST_DOUBLE
)
3586 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3588 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3590 if (GET_CODE (op1
) == CONST_DOUBLE
)
3591 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3593 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3598 /* A - B == A + (-B). */
3599 neg_double (l2
, h2
, &lv
, &hv
);
3602 /* .. fall through ... */
3605 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3609 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3612 case DIV
: case MOD
: case UDIV
: case UMOD
:
3613 /* We'd need to include tree.h to do this and it doesn't seem worth
3618 lv
= l1
& l2
, hv
= h1
& h2
;
3622 lv
= l1
| l2
, hv
= h1
| h2
;
3626 lv
= l1
^ l2
, hv
= h1
^ h2
;
3632 && ((unsigned HOST_WIDE_INT
) l1
3633 < (unsigned HOST_WIDE_INT
) l2
)))
3642 && ((unsigned HOST_WIDE_INT
) l1
3643 > (unsigned HOST_WIDE_INT
) l2
)))
3650 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3652 && ((unsigned HOST_WIDE_INT
) l1
3653 < (unsigned HOST_WIDE_INT
) l2
)))
3660 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3662 && ((unsigned HOST_WIDE_INT
) l1
3663 > (unsigned HOST_WIDE_INT
) l2
)))
3669 case LSHIFTRT
: case ASHIFTRT
:
3671 case ROTATE
: case ROTATERT
:
3672 #ifdef SHIFT_COUNT_TRUNCATED
3673 if (SHIFT_COUNT_TRUNCATED
)
3674 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3677 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3680 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3681 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3683 else if (code
== ASHIFT
)
3684 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3685 else if (code
== ROTATE
)
3686 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3687 else /* code == ROTATERT */
3688 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3695 return immed_double_const (lv
, hv
, mode
);
3698 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3699 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3701 /* Even if we can't compute a constant result,
3702 there are some cases worth simplifying. */
3707 /* In IEEE floating point, x+0 is not the same as x. Similarly
3708 for the other optimizations below. */
3709 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3710 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3713 if (op1
== CONST0_RTX (mode
))
3716 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3717 if (GET_CODE (op0
) == NEG
)
3718 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3719 else if (GET_CODE (op1
) == NEG
)
3720 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3722 /* Handle both-operands-constant cases. We can only add
3723 CONST_INTs to constants since the sum of relocatable symbols
3724 can't be handled by most assemblers. Don't add CONST_INT
3725 to CONST_INT since overflow won't be computed properly if wider
3726 than HOST_BITS_PER_WIDE_INT. */
3728 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3729 && GET_CODE (op1
) == CONST_INT
)
3730 return plus_constant (op0
, INTVAL (op1
));
3731 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3732 && GET_CODE (op0
) == CONST_INT
)
3733 return plus_constant (op1
, INTVAL (op0
));
3735 /* See if this is something like X * C - X or vice versa or
3736 if the multiplication is written as a shift. If so, we can
3737 distribute and make a new multiply, shift, or maybe just
3738 have X (if C is 2 in the example above). But don't make
3739 real multiply if we didn't have one before. */
3741 if (! FLOAT_MODE_P (mode
))
3743 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3744 rtx lhs
= op0
, rhs
= op1
;
3747 if (GET_CODE (lhs
) == NEG
)
3748 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3749 else if (GET_CODE (lhs
) == MULT
3750 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3752 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3755 else if (GET_CODE (lhs
) == ASHIFT
3756 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3757 && INTVAL (XEXP (lhs
, 1)) >= 0
3758 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3760 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3761 lhs
= XEXP (lhs
, 0);
3764 if (GET_CODE (rhs
) == NEG
)
3765 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3766 else if (GET_CODE (rhs
) == MULT
3767 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3769 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3772 else if (GET_CODE (rhs
) == ASHIFT
3773 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3774 && INTVAL (XEXP (rhs
, 1)) >= 0
3775 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3777 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3778 rhs
= XEXP (rhs
, 0);
3781 if (rtx_equal_p (lhs
, rhs
))
3783 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3784 GEN_INT (coeff0
+ coeff1
));
3785 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3789 /* If one of the operands is a PLUS or a MINUS, see if we can
3790 simplify this by the associative law.
3791 Don't use the associative law for floating point.
3792 The inaccuracy makes it nonassociative,
3793 and subtle programs can break if operations are associated. */
3795 if (INTEGRAL_MODE_P (mode
)
3796 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3797 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3798 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3804 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3805 using cc0, in which case we want to leave it as a COMPARE
3806 so we can distinguish it from a register-register-copy.
3808 In IEEE floating point, x-0 is not the same as x. */
3810 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3811 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3812 && op1
== CONST0_RTX (mode
))
3815 /* Do nothing here. */
3820 /* None of these optimizations can be done for IEEE
3822 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3823 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3826 /* We can't assume x-x is 0 even with non-IEEE floating point,
3827 but since it is zero except in very strange circumstances, we
3828 will treat it as zero with -ffast-math. */
3829 if (rtx_equal_p (op0
, op1
)
3830 && ! side_effects_p (op0
)
3831 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3832 return CONST0_RTX (mode
);
3834 /* Change subtraction from zero into negation. */
3835 if (op0
== CONST0_RTX (mode
))
3836 return gen_rtx_NEG (mode
, op1
);
3838 /* (-1 - a) is ~a. */
3839 if (op0
== constm1_rtx
)
3840 return gen_rtx_NOT (mode
, op1
);
3842 /* Subtracting 0 has no effect. */
3843 if (op1
== CONST0_RTX (mode
))
3846 /* See if this is something like X * C - X or vice versa or
3847 if the multiplication is written as a shift. If so, we can
3848 distribute and make a new multiply, shift, or maybe just
3849 have X (if C is 2 in the example above). But don't make
3850 real multiply if we didn't have one before. */
3852 if (! FLOAT_MODE_P (mode
))
3854 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3855 rtx lhs
= op0
, rhs
= op1
;
3858 if (GET_CODE (lhs
) == NEG
)
3859 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3860 else if (GET_CODE (lhs
) == MULT
3861 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3863 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3866 else if (GET_CODE (lhs
) == ASHIFT
3867 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3868 && INTVAL (XEXP (lhs
, 1)) >= 0
3869 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3871 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3872 lhs
= XEXP (lhs
, 0);
3875 if (GET_CODE (rhs
) == NEG
)
3876 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3877 else if (GET_CODE (rhs
) == MULT
3878 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3880 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3883 else if (GET_CODE (rhs
) == ASHIFT
3884 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3885 && INTVAL (XEXP (rhs
, 1)) >= 0
3886 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3888 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3889 rhs
= XEXP (rhs
, 0);
3892 if (rtx_equal_p (lhs
, rhs
))
3894 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3895 GEN_INT (coeff0
- coeff1
));
3896 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3900 /* (a - (-b)) -> (a + b). */
3901 if (GET_CODE (op1
) == NEG
)
3902 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3904 /* If one of the operands is a PLUS or a MINUS, see if we can
3905 simplify this by the associative law.
3906 Don't use the associative law for floating point.
3907 The inaccuracy makes it nonassociative,
3908 and subtle programs can break if operations are associated. */
3910 if (INTEGRAL_MODE_P (mode
)
3911 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3912 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3913 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3916 /* Don't let a relocatable value get a negative coeff. */
3917 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3918 return plus_constant (op0
, - INTVAL (op1
));
3920 /* (x - (x & y)) -> (x & ~y) */
3921 if (GET_CODE (op1
) == AND
)
3923 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3924 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 1)));
3925 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3926 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 0)));
3931 if (op1
== constm1_rtx
)
3933 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3935 return tem
? tem
: gen_rtx_NEG (mode
, op0
);
3938 /* In IEEE floating point, x*0 is not always 0. */
3939 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3940 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3941 && op1
== CONST0_RTX (mode
)
3942 && ! side_effects_p (op0
))
3945 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3946 However, ANSI says we can drop signals,
3947 so we can do this anyway. */
3948 if (op1
== CONST1_RTX (mode
))
3951 /* Convert multiply by constant power of two into shift unless
3952 we are still generating RTL. This test is a kludge. */
3953 if (GET_CODE (op1
) == CONST_INT
3954 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3955 /* If the mode is larger than the host word size, and the
3956 uppermost bit is set, then this isn't a power of two due
3957 to implicit sign extension. */
3958 && (width
<= HOST_BITS_PER_WIDE_INT
3959 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
3960 && ! rtx_equal_function_value_matters
)
3961 return gen_rtx_ASHIFT (mode
, op0
, GEN_INT (val
));
3963 if (GET_CODE (op1
) == CONST_DOUBLE
3964 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3968 int op1is2
, op1ism1
;
3970 if (setjmp (handler
))
3973 set_float_handler (handler
);
3974 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3975 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3976 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3977 set_float_handler (NULL_PTR
);
3979 /* x*2 is x+x and x*(-1) is -x */
3980 if (op1is2
&& GET_MODE (op0
) == mode
)
3981 return gen_rtx_PLUS (mode
, op0
, copy_rtx (op0
));
3983 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3984 return gen_rtx_NEG (mode
, op0
);
3989 if (op1
== const0_rtx
)
3991 if (GET_CODE (op1
) == CONST_INT
3992 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3994 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3996 /* A | (~A) -> -1 */
3997 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3998 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3999 && ! side_effects_p (op0
)
4000 && GET_MODE_CLASS (mode
) != MODE_CC
)
4005 if (op1
== const0_rtx
)
4007 if (GET_CODE (op1
) == CONST_INT
4008 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
4009 return gen_rtx_NOT (mode
, op0
);
4010 if (op0
== op1
&& ! side_effects_p (op0
)
4011 && GET_MODE_CLASS (mode
) != MODE_CC
)
4016 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4018 if (GET_CODE (op1
) == CONST_INT
4019 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
4021 if (op0
== op1
&& ! side_effects_p (op0
)
4022 && GET_MODE_CLASS (mode
) != MODE_CC
)
4025 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
4026 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
4027 && ! side_effects_p (op0
)
4028 && GET_MODE_CLASS (mode
) != MODE_CC
)
4033 /* Convert divide by power of two into shift (divide by 1 handled
4035 if (GET_CODE (op1
) == CONST_INT
4036 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
4037 return gen_rtx_LSHIFTRT (mode
, op0
, GEN_INT (arg1
));
4039 /* ... fall through ... */
4042 if (op1
== CONST1_RTX (mode
))
4045 /* In IEEE floating point, 0/x is not always 0. */
4046 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4047 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
4048 && op0
== CONST0_RTX (mode
)
4049 && ! side_effects_p (op1
))
4052 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4053 /* Change division by a constant into multiplication. Only do
4054 this with -ffast-math until an expert says it is safe in
4056 else if (GET_CODE (op1
) == CONST_DOUBLE
4057 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
4058 && op1
!= CONST0_RTX (mode
)
4062 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
4064 if (! REAL_VALUES_EQUAL (d
, dconst0
))
4066 #if defined (REAL_ARITHMETIC)
4067 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
4068 return gen_rtx_MULT (mode
, op0
,
4069 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
4071 return gen_rtx_MULT (mode
, op0
,
4072 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
4080 /* Handle modulus by power of two (mod with 1 handled below). */
4081 if (GET_CODE (op1
) == CONST_INT
4082 && exact_log2 (INTVAL (op1
)) > 0)
4083 return gen_rtx_AND (mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
4085 /* ... fall through ... */
4088 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
4089 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
4095 /* Rotating ~0 always results in ~0. */
4096 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
4097 && INTVAL (op0
) == GET_MODE_MASK (mode
)
4098 && ! side_effects_p (op1
))
4101 /* ... fall through ... */
4106 if (op1
== const0_rtx
)
4108 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
4113 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4114 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
4115 && ! side_effects_p (op0
))
4117 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4122 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4124 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
4125 && ! side_effects_p (op0
))
4127 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4132 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4134 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4139 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4141 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4152 /* Get the integer argument values in two forms:
4153 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4155 arg0
= INTVAL (op0
);
4156 arg1
= INTVAL (op1
);
4158 if (width
< HOST_BITS_PER_WIDE_INT
)
4160 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4161 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4164 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4165 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4168 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4169 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4177 /* Compute the value of the arithmetic. */
4182 val
= arg0s
+ arg1s
;
4186 val
= arg0s
- arg1s
;
4190 val
= arg0s
* arg1s
;
4196 val
= arg0s
/ arg1s
;
4202 val
= arg0s
% arg1s
;
4208 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4214 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4230 /* If shift count is undefined, don't fold it; let the machine do
4231 what it wants. But truncate it if the machine will do that. */
4235 #ifdef SHIFT_COUNT_TRUNCATED
4236 if (SHIFT_COUNT_TRUNCATED
)
4240 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4247 #ifdef SHIFT_COUNT_TRUNCATED
4248 if (SHIFT_COUNT_TRUNCATED
)
4252 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4259 #ifdef SHIFT_COUNT_TRUNCATED
4260 if (SHIFT_COUNT_TRUNCATED
)
4264 val
= arg0s
>> arg1
;
4266 /* Bootstrap compiler may not have sign extended the right shift.
4267 Manually extend the sign to insure bootstrap cc matches gcc. */
4268 if (arg0s
< 0 && arg1
> 0)
4269 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4278 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4279 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4287 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4288 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4292 /* Do nothing here. */
4296 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4300 val
= ((unsigned HOST_WIDE_INT
) arg0
4301 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4305 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4309 val
= ((unsigned HOST_WIDE_INT
) arg0
4310 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4317 /* Clear the bits that don't belong in our mode, unless they and our sign
4318 bit are all one. So we get either a reasonable negative value or a
4319 reasonable unsigned value for this mode. */
4320 if (width
< HOST_BITS_PER_WIDE_INT
4321 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4322 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4323 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4325 /* If this would be an entire word for the target, but is not for
4326 the host, then sign-extend on the host so that the number will look
4327 the same way on the host that it would on the target.
4329 For example, when building a 64 bit alpha hosted 32 bit sparc
4330 targeted compiler, then we want the 32 bit unsigned value -1 to be
4331 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4332 The later confuses the sparc backend. */
4334 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4335 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4336 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4338 return GEN_INT (val
);
4341 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4344 Rather than test for specific case, we do this by a brute-force method
4345 and do all possible simplifications until no more changes occur. Then
4346 we rebuild the operation. */
4349 simplify_plus_minus (code
, mode
, op0
, op1
)
4351 enum machine_mode mode
;
4357 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4358 int first
= 1, negate
= 0, changed
;
4361 bzero ((char *) ops
, sizeof ops
);
4363 /* Set up the two operands and then expand them until nothing has been
4364 changed. If we run out of room in our array, give up; this should
4365 almost never happen. */
4367 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4374 for (i
= 0; i
< n_ops
; i
++)
4375 switch (GET_CODE (ops
[i
]))
4382 ops
[n_ops
] = XEXP (ops
[i
], 1);
4383 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4384 ops
[i
] = XEXP (ops
[i
], 0);
4390 ops
[i
] = XEXP (ops
[i
], 0);
4391 negs
[i
] = ! negs
[i
];
4396 ops
[i
] = XEXP (ops
[i
], 0);
4402 /* ~a -> (-a - 1) */
4405 ops
[n_ops
] = constm1_rtx
;
4406 negs
[n_ops
++] = negs
[i
];
4407 ops
[i
] = XEXP (ops
[i
], 0);
4408 negs
[i
] = ! negs
[i
];
4415 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4423 /* If we only have two operands, we can't do anything. */
4427 /* Now simplify each pair of operands until nothing changes. The first
4428 time through just simplify constants against each other. */
4435 for (i
= 0; i
< n_ops
- 1; i
++)
4436 for (j
= i
+ 1; j
< n_ops
; j
++)
4437 if (ops
[i
] != 0 && ops
[j
] != 0
4438 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4440 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4441 enum rtx_code ncode
= PLUS
;
4443 if (negs
[i
] && ! negs
[j
])
4444 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4445 else if (! negs
[i
] && negs
[j
])
4448 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4451 ops
[i
] = tem
, ops
[j
] = 0;
4452 negs
[i
] = negs
[i
] && negs
[j
];
4453 if (GET_CODE (tem
) == NEG
)
4454 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4456 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4457 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4465 /* Pack all the operands to the lower-numbered entries and give up if
4466 we didn't reduce the number of operands we had. Make sure we
4467 count a CONST as two operands. If we have the same number of
4468 operands, but have made more CONSTs than we had, this is also
4469 an improvement, so accept it. */
4471 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4474 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4475 if (GET_CODE (ops
[j
]) == CONST
)
4479 if (i
+ n_consts
> input_ops
4480 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4485 /* If we have a CONST_INT, put it last. */
4486 for (i
= 0; i
< n_ops
- 1; i
++)
4487 if (GET_CODE (ops
[i
]) == CONST_INT
)
4489 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4490 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4493 /* Put a non-negated operand first. If there aren't any, make all
4494 operands positive and negate the whole thing later. */
4495 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4500 for (i
= 0; i
< n_ops
; i
++)
4506 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4507 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4510 /* Now make the result by performing the requested operations. */
4512 for (i
= 1; i
< n_ops
; i
++)
4513 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4515 return negate
? gen_rtx_NEG (mode
, result
) : result
;
4518 /* Make a binary operation by properly ordering the operands and
4519 seeing if the expression folds. */
4522 cse_gen_binary (code
, mode
, op0
, op1
)
4524 enum machine_mode mode
;
4529 /* Put complex operands first and constants second if commutative. */
4530 if (GET_RTX_CLASS (code
) == 'c'
4531 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4532 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4533 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4534 || (GET_CODE (op0
) == SUBREG
4535 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4536 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4537 tem
= op0
, op0
= op1
, op1
= tem
;
4539 /* If this simplifies, do it. */
4540 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4545 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4546 just form the operation. */
4548 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4549 && GET_MODE (op0
) != VOIDmode
)
4550 return plus_constant (op0
, INTVAL (op1
));
4551 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4552 && GET_MODE (op0
) != VOIDmode
)
4553 return plus_constant (op0
, - INTVAL (op1
));
4555 return gen_rtx_fmt_ee (code
, mode
, op0
, op1
);
4558 /* Like simplify_binary_operation except used for relational operators.
4559 MODE is the mode of the operands, not that of the result. If MODE
4560 is VOIDmode, both operands must also be VOIDmode and we compare the
4561 operands in "infinite precision".
4563 If no simplification is possible, this function returns zero. Otherwise,
4564 it returns either const_true_rtx or const0_rtx. */
4567 simplify_relational_operation (code
, mode
, op0
, op1
)
4569 enum machine_mode mode
;
4572 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4575 /* If op0 is a compare, extract the comparison arguments from it. */
4576 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4577 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4579 /* We can't simplify MODE_CC values since we don't know what the
4580 actual comparison is. */
4581 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4588 /* For integer comparisons of A and B maybe we can simplify A - B and can
4589 then simplify a comparison of that with zero. If A and B are both either
4590 a register or a CONST_INT, this can't help; testing for these cases will
4591 prevent infinite recursion here and speed things up.
4593 If CODE is an unsigned comparison, then we can never do this optimization,
4594 because it gives an incorrect result if the subtraction wraps around zero.
4595 ANSI C defines unsigned operations such that they never overflow, and
4596 thus such cases can not be ignored. */
4598 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4599 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4600 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4601 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4602 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4603 return simplify_relational_operation (signed_condition (code
),
4604 mode
, tem
, const0_rtx
);
4606 /* For non-IEEE floating-point, if the two operands are equal, we know the
4608 if (rtx_equal_p (op0
, op1
)
4609 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4610 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4611 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4613 /* If the operands are floating-point constants, see if we can fold
4615 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4616 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4617 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4619 REAL_VALUE_TYPE d0
, d1
;
4622 if (setjmp (handler
))
4625 set_float_handler (handler
);
4626 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4627 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4628 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4629 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4630 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4631 set_float_handler (NULL_PTR
);
4633 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4635 /* Otherwise, see if the operands are both integers. */
4636 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4637 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4638 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4640 int width
= GET_MODE_BITSIZE (mode
);
4641 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4642 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4644 /* Get the two words comprising each integer constant. */
4645 if (GET_CODE (op0
) == CONST_DOUBLE
)
4647 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4648 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4652 l0u
= l0s
= INTVAL (op0
);
4653 h0u
= h0s
= l0s
< 0 ? -1 : 0;
4656 if (GET_CODE (op1
) == CONST_DOUBLE
)
4658 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4659 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4663 l1u
= l1s
= INTVAL (op1
);
4664 h1u
= h1s
= l1s
< 0 ? -1 : 0;
4667 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4668 we have to sign or zero-extend the values. */
4669 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4670 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4672 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4674 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4675 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4677 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4678 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4680 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4681 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4684 equal
= (h0u
== h1u
&& l0u
== l1u
);
4685 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4686 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4687 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4688 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4691 /* Otherwise, there are some code-specific tests we can make. */
4697 /* References to the frame plus a constant or labels cannot
4698 be zero, but a SYMBOL_REF can due to #pragma weak. */
4699 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4700 || GET_CODE (op0
) == LABEL_REF
)
4701 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4702 /* On some machines, the ap reg can be 0 sometimes. */
4703 && op0
!= arg_pointer_rtx
4710 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4711 || GET_CODE (op0
) == LABEL_REF
)
4712 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4713 && op0
!= arg_pointer_rtx
4716 return const_true_rtx
;
4720 /* Unsigned values are never negative. */
4721 if (op1
== const0_rtx
)
4722 return const_true_rtx
;
4726 if (op1
== const0_rtx
)
4731 /* Unsigned values are never greater than the largest
4733 if (GET_CODE (op1
) == CONST_INT
4734 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4735 && INTEGRAL_MODE_P (mode
))
4736 return const_true_rtx
;
4740 if (GET_CODE (op1
) == CONST_INT
4741 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4742 && INTEGRAL_MODE_P (mode
))
4753 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4758 return equal
? const_true_rtx
: const0_rtx
;
4760 return ! equal
? const_true_rtx
: const0_rtx
;
4762 return op0lt
? const_true_rtx
: const0_rtx
;
4764 return op1lt
? const_true_rtx
: const0_rtx
;
4766 return op0ltu
? const_true_rtx
: const0_rtx
;
4768 return op1ltu
? const_true_rtx
: const0_rtx
;
4770 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4772 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4774 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4776 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4782 /* Simplify CODE, an operation with result mode MODE and three operands,
4783 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4784 a constant. Return 0 if no simplifications is possible. */
4787 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4789 enum machine_mode mode
, op0_mode
;
4792 int width
= GET_MODE_BITSIZE (mode
);
4794 /* VOIDmode means "infinite" precision. */
4796 width
= HOST_BITS_PER_WIDE_INT
;
4802 if (GET_CODE (op0
) == CONST_INT
4803 && GET_CODE (op1
) == CONST_INT
4804 && GET_CODE (op2
) == CONST_INT
4805 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4806 && width
<= HOST_BITS_PER_WIDE_INT
)
4808 /* Extracting a bit-field from a constant */
4809 HOST_WIDE_INT val
= INTVAL (op0
);
4811 if (BITS_BIG_ENDIAN
)
4812 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4813 - INTVAL (op2
) - INTVAL (op1
));
4815 val
>>= INTVAL (op2
);
4817 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4819 /* First zero-extend. */
4820 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4821 /* If desired, propagate sign bit. */
4822 if (code
== SIGN_EXTRACT
4823 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4824 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4827 /* Clear the bits that don't belong in our mode,
4828 unless they and our sign bit are all one.
4829 So we get either a reasonable negative value or a reasonable
4830 unsigned value for this mode. */
4831 if (width
< HOST_BITS_PER_WIDE_INT
4832 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4833 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4834 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4836 return GEN_INT (val
);
4841 if (GET_CODE (op0
) == CONST_INT
)
4842 return op0
!= const0_rtx
? op1
: op2
;
4844 /* Convert a == b ? b : a to "a". */
4845 if (GET_CODE (op0
) == NE
&& ! side_effects_p (op0
)
4846 && rtx_equal_p (XEXP (op0
, 0), op1
)
4847 && rtx_equal_p (XEXP (op0
, 1), op2
))
4849 else if (GET_CODE (op0
) == EQ
&& ! side_effects_p (op0
)
4850 && rtx_equal_p (XEXP (op0
, 1), op1
)
4851 && rtx_equal_p (XEXP (op0
, 0), op2
))
4853 else if (GET_RTX_CLASS (GET_CODE (op0
)) == '<' && ! side_effects_p (op0
))
4856 temp
= simplify_relational_operation (GET_CODE (op0
), op0_mode
,
4857 XEXP (op0
, 0), XEXP (op0
, 1));
4858 /* See if any simplifications were possible. */
4859 if (temp
== const0_rtx
)
4861 else if (temp
== const1_rtx
)
4873 /* If X is a nontrivial arithmetic operation on an argument
4874 for which a constant value can be determined, return
4875 the result of operating on that value, as a constant.
4876 Otherwise, return X, possibly with one or more operands
4877 modified by recursive calls to this function.
4879 If X is a register whose contents are known, we do NOT
4880 return those contents here. equiv_constant is called to
4883 INSN is the insn that we may be modifying. If it is 0, make a copy
4884 of X before modifying it. */
4891 register enum rtx_code code
;
4892 register enum machine_mode mode
;
4899 /* Folded equivalents of first two operands of X. */
4903 /* Constant equivalents of first three operands of X;
4904 0 when no such equivalent is known. */
4909 /* The mode of the first operand of X. We need this for sign and zero
4911 enum machine_mode mode_arg0
;
4916 mode
= GET_MODE (x
);
4917 code
= GET_CODE (x
);
4926 /* No use simplifying an EXPR_LIST
4927 since they are used only for lists of args
4928 in a function call's REG_EQUAL note. */
4930 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4931 want to (e.g.,) make (addressof (const_int 0)) just because
4932 the location is known to be zero. */
4938 return prev_insn_cc0
;
4942 /* If the next insn is a CODE_LABEL followed by a jump table,
4943 PC's value is a LABEL_REF pointing to that label. That
4944 lets us fold switch statements on the Vax. */
4945 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4947 rtx next
= next_nonnote_insn (insn
);
4949 if (next
&& GET_CODE (next
) == CODE_LABEL
4950 && NEXT_INSN (next
) != 0
4951 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4952 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4953 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4954 return gen_rtx_LABEL_REF (Pmode
, next
);
4959 /* See if we previously assigned a constant value to this SUBREG. */
4960 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4961 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4964 /* If this is a paradoxical SUBREG, we have no idea what value the
4965 extra bits would have. However, if the operand is equivalent
4966 to a SUBREG whose operand is the same as our mode, and all the
4967 modes are within a word, we can just use the inner operand
4968 because these SUBREGs just say how to treat the register.
4970 Similarly if we find an integer constant. */
4972 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4974 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4975 struct table_elt
*elt
;
4977 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4978 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4979 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4981 for (elt
= elt
->first_same_value
;
4982 elt
; elt
= elt
->next_same_value
)
4984 if (CONSTANT_P (elt
->exp
)
4985 && GET_MODE (elt
->exp
) == VOIDmode
)
4988 if (GET_CODE (elt
->exp
) == SUBREG
4989 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4990 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4991 return copy_rtx (SUBREG_REG (elt
->exp
));
4997 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4998 We might be able to if the SUBREG is extracting a single word in an
4999 integral mode or extracting the low part. */
5001 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
5002 const_arg0
= equiv_constant (folded_arg0
);
5004 folded_arg0
= const_arg0
;
5006 if (folded_arg0
!= SUBREG_REG (x
))
5010 if (GET_MODE_CLASS (mode
) == MODE_INT
5011 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5012 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
5013 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
5014 GET_MODE (SUBREG_REG (x
)));
5015 if (new == 0 && subreg_lowpart_p (x
))
5016 new = gen_lowpart_if_possible (mode
, folded_arg0
);
5021 /* If this is a narrowing SUBREG and our operand is a REG, see if
5022 we can find an equivalence for REG that is an arithmetic operation
5023 in a wider mode where both operands are paradoxical SUBREGs
5024 from objects of our result mode. In that case, we couldn't report
5025 an equivalent value for that operation, since we don't know what the
5026 extra bits will be. But we can find an equivalence for this SUBREG
5027 by folding that operation is the narrow mode. This allows us to
5028 fold arithmetic in narrow modes when the machine only supports
5029 word-sized arithmetic.
5031 Also look for a case where we have a SUBREG whose operand is the
5032 same as our result. If both modes are smaller than a word, we
5033 are simply interpreting a register in different modes and we
5034 can use the inner value. */
5036 if (GET_CODE (folded_arg0
) == REG
5037 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
5038 && subreg_lowpart_p (x
))
5040 struct table_elt
*elt
;
5042 /* We can use HASH here since we know that canon_hash won't be
5044 elt
= lookup (folded_arg0
,
5045 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
5046 GET_MODE (folded_arg0
));
5049 elt
= elt
->first_same_value
;
5051 for (; elt
; elt
= elt
->next_same_value
)
5053 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
5055 /* Just check for unary and binary operations. */
5056 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
5057 && GET_CODE (elt
->exp
) != SIGN_EXTEND
5058 && GET_CODE (elt
->exp
) != ZERO_EXTEND
5059 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
5060 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
5062 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
5064 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
5065 op0
= fold_rtx (op0
, NULL_RTX
);
5067 op0
= equiv_constant (op0
);
5069 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
5072 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
5073 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
5074 && eltcode
!= DIV
&& eltcode
!= MOD
5075 && eltcode
!= UDIV
&& eltcode
!= UMOD
5076 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
5077 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
5078 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
5079 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
5081 || CONSTANT_P (XEXP (elt
->exp
, 0)))
5082 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
5083 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
5085 || CONSTANT_P (XEXP (elt
->exp
, 1))))
5087 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
5088 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
5090 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
5091 op0
= fold_rtx (op0
, NULL_RTX
);
5094 op0
= equiv_constant (op0
);
5096 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
5097 op1
= fold_rtx (op1
, NULL_RTX
);
5100 op1
= equiv_constant (op1
);
5102 /* If we are looking for the low SImode part of
5103 (ashift:DI c (const_int 32)), it doesn't work
5104 to compute that in SImode, because a 32-bit shift
5105 in SImode is unpredictable. We know the value is 0. */
5107 && GET_CODE (elt
->exp
) == ASHIFT
5108 && GET_CODE (op1
) == CONST_INT
5109 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
5111 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
5113 /* If the count fits in the inner mode's width,
5114 but exceeds the outer mode's width,
5115 the value will get truncated to 0
5119 /* If the count exceeds even the inner mode's width,
5120 don't fold this expression. */
5123 else if (op0
&& op1
)
5124 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
5128 else if (GET_CODE (elt
->exp
) == SUBREG
5129 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
5130 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
5132 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5133 new = copy_rtx (SUBREG_REG (elt
->exp
));
5144 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5145 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5146 new = lookup_as_function (XEXP (x
, 0), code
);
5148 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5152 /* If we are not actually processing an insn, don't try to find the
5153 best address. Not only don't we care, but we could modify the
5154 MEM in an invalid way since we have no insn to validate against. */
5156 find_best_addr (insn
, &XEXP (x
, 0));
5159 /* Even if we don't fold in the insn itself,
5160 we can safely do so here, in hopes of getting a constant. */
5161 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5163 HOST_WIDE_INT offset
= 0;
5165 if (GET_CODE (addr
) == REG
5166 && REGNO_QTY_VALID_P (REGNO (addr
))
5167 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5168 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5169 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5171 /* If address is constant, split it into a base and integer offset. */
5172 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5174 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5175 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5177 base
= XEXP (XEXP (addr
, 0), 0);
5178 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5180 else if (GET_CODE (addr
) == LO_SUM
5181 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5182 base
= XEXP (addr
, 1);
5183 else if (GET_CODE (addr
) == ADDRESSOF
)
5184 return change_address (x
, VOIDmode
, addr
);
5186 /* If this is a constant pool reference, we can fold it into its
5187 constant to allow better value tracking. */
5188 if (base
&& GET_CODE (base
) == SYMBOL_REF
5189 && CONSTANT_POOL_ADDRESS_P (base
))
5191 rtx constant
= get_pool_constant (base
);
5192 enum machine_mode const_mode
= get_pool_mode (base
);
5195 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5196 constant_pool_entries_cost
= COST (constant
);
5198 /* If we are loading the full constant, we have an equivalence. */
5199 if (offset
== 0 && mode
== const_mode
)
5202 /* If this actually isn't a constant (weird!), we can't do
5203 anything. Otherwise, handle the two most common cases:
5204 extracting a word from a multi-word constant, and extracting
5205 the low-order bits. Other cases don't seem common enough to
5207 if (! CONSTANT_P (constant
))
5210 if (GET_MODE_CLASS (mode
) == MODE_INT
5211 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5212 && offset
% UNITS_PER_WORD
== 0
5213 && (new = operand_subword (constant
,
5214 offset
/ UNITS_PER_WORD
,
5215 0, const_mode
)) != 0)
5218 if (((BYTES_BIG_ENDIAN
5219 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5220 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5221 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5225 /* If this is a reference to a label at a known position in a jump
5226 table, we also know its value. */
5227 if (base
&& GET_CODE (base
) == LABEL_REF
)
5229 rtx label
= XEXP (base
, 0);
5230 rtx table_insn
= NEXT_INSN (label
);
5232 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5233 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5235 rtx table
= PATTERN (table_insn
);
5238 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5239 < XVECLEN (table
, 0)))
5240 return XVECEXP (table
, 0,
5241 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5243 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5244 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5246 rtx table
= PATTERN (table_insn
);
5249 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5250 < XVECLEN (table
, 1)))
5252 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5253 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
5256 if (GET_MODE (table
) != Pmode
)
5257 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
5259 /* Indicate this is a constant. This isn't a
5260 valid form of CONST, but it will only be used
5261 to fold the next insns and then discarded, so
5262 it should be safe. */
5263 return gen_rtx_CONST (GET_MODE (new), new);
5272 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5273 validate_change (insn
, &XVECEXP (x
, 3, i
),
5274 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5284 mode_arg0
= VOIDmode
;
5286 /* Try folding our operands.
5287 Then see which ones have constant values known. */
5289 fmt
= GET_RTX_FORMAT (code
);
5290 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5293 rtx arg
= XEXP (x
, i
);
5294 rtx folded_arg
= arg
, const_arg
= 0;
5295 enum machine_mode mode_arg
= GET_MODE (arg
);
5296 rtx cheap_arg
, expensive_arg
;
5297 rtx replacements
[2];
5300 /* Most arguments are cheap, so handle them specially. */
5301 switch (GET_CODE (arg
))
5304 /* This is the same as calling equiv_constant; it is duplicated
5306 if (REGNO_QTY_VALID_P (REGNO (arg
))
5307 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5308 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5309 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5311 = gen_lowpart_if_possible (GET_MODE (arg
),
5312 qty_const
[reg_qty
[REGNO (arg
)]]);
5325 folded_arg
= prev_insn_cc0
;
5326 mode_arg
= prev_insn_cc0_mode
;
5327 const_arg
= equiv_constant (folded_arg
);
5332 folded_arg
= fold_rtx (arg
, insn
);
5333 const_arg
= equiv_constant (folded_arg
);
5336 /* For the first three operands, see if the operand
5337 is constant or equivalent to a constant. */
5341 folded_arg0
= folded_arg
;
5342 const_arg0
= const_arg
;
5343 mode_arg0
= mode_arg
;
5346 folded_arg1
= folded_arg
;
5347 const_arg1
= const_arg
;
5350 const_arg2
= const_arg
;
5354 /* Pick the least expensive of the folded argument and an
5355 equivalent constant argument. */
5356 if (const_arg
== 0 || const_arg
== folded_arg
5357 || COST (const_arg
) > COST (folded_arg
))
5358 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5360 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5362 /* Try to replace the operand with the cheapest of the two
5363 possibilities. If it doesn't work and this is either of the first
5364 two operands of a commutative operation, try swapping them.
5365 If THAT fails, try the more expensive, provided it is cheaper
5366 than what is already there. */
5368 if (cheap_arg
== XEXP (x
, i
))
5371 if (insn
== 0 && ! copied
)
5377 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5379 j
< 2 && replacements
[j
]
5380 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5383 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5386 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5388 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5389 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5391 if (apply_change_group ())
5393 /* Swap them back to be invalid so that this loop can
5394 continue and flag them to be swapped back later. */
5397 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5409 /* Don't try to fold inside of a vector of expressions.
5410 Doing nothing is harmless. */
5414 /* If a commutative operation, place a constant integer as the second
5415 operand unless the first operand is also a constant integer. Otherwise,
5416 place any constant second unless the first operand is also a constant. */
5418 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5420 if (must_swap
|| (const_arg0
5422 || (GET_CODE (const_arg0
) == CONST_INT
5423 && GET_CODE (const_arg1
) != CONST_INT
))))
5425 register rtx tem
= XEXP (x
, 0);
5427 if (insn
== 0 && ! copied
)
5433 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5434 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5435 if (apply_change_group ())
5437 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5438 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5443 /* If X is an arithmetic operation, see if we can simplify it. */
5445 switch (GET_RTX_CLASS (code
))
5451 /* We can't simplify extension ops unless we know the
5453 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5454 && mode_arg0
== VOIDmode
)
5457 /* If we had a CONST, strip it off and put it back later if we
5459 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5460 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5462 new = simplify_unary_operation (code
, mode
,
5463 const_arg0
? const_arg0
: folded_arg0
,
5465 if (new != 0 && is_const
)
5466 new = gen_rtx_CONST (mode
, new);
5471 /* See what items are actually being compared and set FOLDED_ARG[01]
5472 to those values and CODE to the actual comparison code. If any are
5473 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5474 do anything if both operands are already known to be constant. */
5476 if (const_arg0
== 0 || const_arg1
== 0)
5478 struct table_elt
*p0
, *p1
;
5479 rtx
true = const_true_rtx
, false = const0_rtx
;
5480 enum machine_mode mode_arg1
;
5482 #ifdef FLOAT_STORE_FLAG_VALUE
5483 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5485 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5487 false = CONST0_RTX (mode
);
5491 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5492 &mode_arg0
, &mode_arg1
);
5493 const_arg0
= equiv_constant (folded_arg0
);
5494 const_arg1
= equiv_constant (folded_arg1
);
5496 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5497 what kinds of things are being compared, so we can't do
5498 anything with this comparison. */
5500 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5503 /* If we do not now have two constants being compared, see
5504 if we can nevertheless deduce some things about the
5506 if (const_arg0
== 0 || const_arg1
== 0)
5508 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5509 non-explicit constant? These aren't zero, but we
5510 don't know their sign. */
5511 if (const_arg1
== const0_rtx
5512 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5513 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5515 || GET_CODE (folded_arg0
) == SYMBOL_REF
5517 || GET_CODE (folded_arg0
) == LABEL_REF
5518 || GET_CODE (folded_arg0
) == CONST
))
5522 else if (code
== NE
)
5526 /* See if the two operands are the same. We don't do this
5527 for IEEE floating-point since we can't assume x == x
5528 since x might be a NaN. */
5530 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5531 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5532 && (folded_arg0
== folded_arg1
5533 || (GET_CODE (folded_arg0
) == REG
5534 && GET_CODE (folded_arg1
) == REG
5535 && (reg_qty
[REGNO (folded_arg0
)]
5536 == reg_qty
[REGNO (folded_arg1
)]))
5537 || ((p0
= lookup (folded_arg0
,
5538 (safe_hash (folded_arg0
, mode_arg0
)
5539 % NBUCKETS
), mode_arg0
))
5540 && (p1
= lookup (folded_arg1
,
5541 (safe_hash (folded_arg1
, mode_arg0
)
5542 % NBUCKETS
), mode_arg0
))
5543 && p0
->first_same_value
== p1
->first_same_value
)))
5544 return ((code
== EQ
|| code
== LE
|| code
== GE
5545 || code
== LEU
|| code
== GEU
)
5548 /* If FOLDED_ARG0 is a register, see if the comparison we are
5549 doing now is either the same as we did before or the reverse
5550 (we only check the reverse if not floating-point). */
5551 else if (GET_CODE (folded_arg0
) == REG
)
5553 int qty
= reg_qty
[REGNO (folded_arg0
)];
5555 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5556 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5557 || (comparison_dominates_p (qty_comparison_code
[qty
],
5558 reverse_condition (code
))
5559 && ! FLOAT_MODE_P (mode_arg0
)))
5560 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5562 && rtx_equal_p (qty_comparison_const
[qty
],
5564 || (GET_CODE (folded_arg1
) == REG
5565 && (reg_qty
[REGNO (folded_arg1
)]
5566 == qty_comparison_qty
[qty
]))))
5567 return (comparison_dominates_p (qty_comparison_code
[qty
],
5574 /* If we are comparing against zero, see if the first operand is
5575 equivalent to an IOR with a constant. If so, we may be able to
5576 determine the result of this comparison. */
5578 if (const_arg1
== const0_rtx
)
5580 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5584 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5585 && GET_CODE (inner_const
) == CONST_INT
5586 && INTVAL (inner_const
) != 0)
5588 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5589 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5590 && (INTVAL (inner_const
)
5591 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5592 rtx
true = const_true_rtx
, false = const0_rtx
;
5594 #ifdef FLOAT_STORE_FLAG_VALUE
5595 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5597 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5599 false = CONST0_RTX (mode
);
5623 new = simplify_relational_operation (code
, mode_arg0
,
5624 const_arg0
? const_arg0
: folded_arg0
,
5625 const_arg1
? const_arg1
: folded_arg1
);
5626 #ifdef FLOAT_STORE_FLAG_VALUE
5627 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5628 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5629 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5638 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5639 with that LABEL_REF as its second operand. If so, the result is
5640 the first operand of that MINUS. This handles switches with an
5641 ADDR_DIFF_VEC table. */
5642 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5645 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5646 : lookup_as_function (folded_arg0
, MINUS
);
5648 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5649 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5652 /* Now try for a CONST of a MINUS like the above. */
5653 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5654 : lookup_as_function (folded_arg0
, CONST
))) != 0
5655 && GET_CODE (XEXP (y
, 0)) == MINUS
5656 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5657 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5658 return XEXP (XEXP (y
, 0), 0);
5661 /* Likewise if the operands are in the other order. */
5662 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5665 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5666 : lookup_as_function (folded_arg1
, MINUS
);
5668 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5669 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5672 /* Now try for a CONST of a MINUS like the above. */
5673 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5674 : lookup_as_function (folded_arg1
, CONST
))) != 0
5675 && GET_CODE (XEXP (y
, 0)) == MINUS
5676 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5677 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5678 return XEXP (XEXP (y
, 0), 0);
5681 /* If second operand is a register equivalent to a negative
5682 CONST_INT, see if we can find a register equivalent to the
5683 positive constant. Make a MINUS if so. Don't do this for
5684 a non-negative constant since we might then alternate between
5685 chosing positive and negative constants. Having the positive
5686 constant previously-used is the more common case. Be sure
5687 the resulting constant is non-negative; if const_arg1 were
5688 the smallest negative number this would overflow: depending
5689 on the mode, this would either just be the same value (and
5690 hence not save anything) or be incorrect. */
5691 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
5692 && INTVAL (const_arg1
) < 0
5693 && - INTVAL (const_arg1
) >= 0
5694 && GET_CODE (folded_arg1
) == REG
)
5696 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5698 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5702 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5703 if (GET_CODE (p
->exp
) == REG
)
5704 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5705 canon_reg (p
->exp
, NULL_RTX
));
5710 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5711 If so, produce (PLUS Z C2-C). */
5712 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5714 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5715 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5716 return fold_rtx (plus_constant (copy_rtx (y
),
5717 -INTVAL (const_arg1
)),
5721 /* ... fall through ... */
5724 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5725 case IOR
: case AND
: case XOR
:
5726 case MULT
: case DIV
: case UDIV
:
5727 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5728 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5729 is known to be of similar form, we may be able to replace the
5730 operation with a combined operation. This may eliminate the
5731 intermediate operation if every use is simplified in this way.
5732 Note that the similar optimization done by combine.c only works
5733 if the intermediate operation's result has only one reference. */
5735 if (GET_CODE (folded_arg0
) == REG
5736 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5739 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5740 rtx y
= lookup_as_function (folded_arg0
, code
);
5742 enum rtx_code associate_code
;
5746 || 0 == (inner_const
5747 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5748 || GET_CODE (inner_const
) != CONST_INT
5749 /* If we have compiled a statement like
5750 "if (x == (x & mask1))", and now are looking at
5751 "x & mask2", we will have a case where the first operand
5752 of Y is the same as our first operand. Unless we detect
5753 this case, an infinite loop will result. */
5754 || XEXP (y
, 0) == folded_arg0
)
5757 /* Don't associate these operations if they are a PLUS with the
5758 same constant and it is a power of two. These might be doable
5759 with a pre- or post-increment. Similarly for two subtracts of
5760 identical powers of two with post decrement. */
5762 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5764 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5765 || exact_log2 (INTVAL (const_arg1
)) >= 0
5767 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5768 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5773 /* Compute the code used to compose the constants. For example,
5774 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5777 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5778 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5780 new_const
= simplify_binary_operation (associate_code
, mode
,
5781 const_arg1
, inner_const
);
5786 /* If we are associating shift operations, don't let this
5787 produce a shift of the size of the object or larger.
5788 This could occur when we follow a sign-extend by a right
5789 shift on a machine that does a sign-extend as a pair
5792 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5793 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5795 /* As an exception, we can turn an ASHIFTRT of this
5796 form into a shift of the number of bits - 1. */
5797 if (code
== ASHIFTRT
)
5798 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5803 y
= copy_rtx (XEXP (y
, 0));
5805 /* If Y contains our first operand (the most common way this
5806 can happen is if Y is a MEM), we would do into an infinite
5807 loop if we tried to fold it. So don't in that case. */
5809 if (! reg_mentioned_p (folded_arg0
, y
))
5810 y
= fold_rtx (y
, insn
);
5812 return cse_gen_binary (code
, mode
, y
, new_const
);
5820 new = simplify_binary_operation (code
, mode
,
5821 const_arg0
? const_arg0
: folded_arg0
,
5822 const_arg1
? const_arg1
: folded_arg1
);
5826 /* (lo_sum (high X) X) is simply X. */
5827 if (code
== LO_SUM
&& const_arg0
!= 0
5828 && GET_CODE (const_arg0
) == HIGH
5829 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5835 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5836 const_arg0
? const_arg0
: folded_arg0
,
5837 const_arg1
? const_arg1
: folded_arg1
,
5838 const_arg2
? const_arg2
: XEXP (x
, 2));
5842 /* Always eliminate CONSTANT_P_RTX at this stage. */
5843 if (code
== CONSTANT_P_RTX
)
5844 return (const_arg0
? const1_rtx
: const0_rtx
);
5848 return new ? new : x
;
5851 /* Return a constant value currently equivalent to X.
5852 Return 0 if we don't know one. */
5858 if (GET_CODE (x
) == REG
5859 && REGNO_QTY_VALID_P (REGNO (x
))
5860 && qty_const
[reg_qty
[REGNO (x
)]])
5861 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5863 if (x
!= 0 && CONSTANT_P (x
))
5866 /* If X is a MEM, try to fold it outside the context of any insn to see if
5867 it might be equivalent to a constant. That handles the case where it
5868 is a constant-pool reference. Then try to look it up in the hash table
5869 in case it is something whose value we have seen before. */
5871 if (GET_CODE (x
) == MEM
)
5873 struct table_elt
*elt
;
5875 x
= fold_rtx (x
, NULL_RTX
);
5879 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5883 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5884 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5891 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5892 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5893 least-significant part of X.
5894 MODE specifies how big a part of X to return.
5896 If the requested operation cannot be done, 0 is returned.
5898 This is similar to gen_lowpart in emit-rtl.c. */
5901 gen_lowpart_if_possible (mode
, x
)
5902 enum machine_mode mode
;
5905 rtx result
= gen_lowpart_common (mode
, x
);
5909 else if (GET_CODE (x
) == MEM
)
5911 /* This is the only other case we handle. */
5912 register int offset
= 0;
5915 if (WORDS_BIG_ENDIAN
)
5916 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5917 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5918 if (BYTES_BIG_ENDIAN
)
5919 /* Adjust the address so that the address-after-the-data is
5921 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5922 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5923 new = gen_rtx_MEM (mode
, plus_constant (XEXP (x
, 0), offset
));
5924 if (! memory_address_p (mode
, XEXP (new, 0)))
5926 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5927 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5928 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5935 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5936 branch. It will be zero if not.
5938 In certain cases, this can cause us to add an equivalence. For example,
5939 if we are following the taken case of
5941 we can add the fact that `i' and '2' are now equivalent.
5943 In any case, we can record that this comparison was passed. If the same
5944 comparison is seen later, we will know its value. */
5947 record_jump_equiv (insn
, taken
)
5951 int cond_known_true
;
5953 enum machine_mode mode
, mode0
, mode1
;
5954 int reversed_nonequality
= 0;
5957 /* Ensure this is the right kind of insn. */
5958 if (! condjump_p (insn
) || simplejump_p (insn
))
5961 /* See if this jump condition is known true or false. */
5963 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5965 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5967 /* Get the type of comparison being done and the operands being compared.
5968 If we had to reverse a non-equality condition, record that fact so we
5969 know that it isn't valid for floating-point. */
5970 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5971 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5972 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5974 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5975 if (! cond_known_true
)
5977 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5978 code
= reverse_condition (code
);
5981 /* The mode is the mode of the non-constant. */
5983 if (mode1
!= VOIDmode
)
5986 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5989 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5990 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5991 Make any useful entries we can with that information. Called from
5992 above function and called recursively. */
5995 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5997 enum machine_mode mode
;
5999 int reversed_nonequality
;
6001 unsigned op0_hash
, op1_hash
;
6002 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
6003 struct table_elt
*op0_elt
, *op1_elt
;
6005 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6006 we know that they are also equal in the smaller mode (this is also
6007 true for all smaller modes whether or not there is a SUBREG, but
6008 is not worth testing for with no SUBREG. */
6010 /* Note that GET_MODE (op0) may not equal MODE. */
6011 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
6012 && (GET_MODE_SIZE (GET_MODE (op0
))
6013 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
6015 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
6016 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
6018 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
6019 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
6020 reversed_nonequality
);
6023 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
6024 && (GET_MODE_SIZE (GET_MODE (op1
))
6025 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
6027 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
6028 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
6030 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
6031 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
6032 reversed_nonequality
);
6035 /* Similarly, if this is an NE comparison, and either is a SUBREG
6036 making a smaller mode, we know the whole thing is also NE. */
6038 /* Note that GET_MODE (op0) may not equal MODE;
6039 if we test MODE instead, we can get an infinite recursion
6040 alternating between two modes each wider than MODE. */
6042 if (code
== NE
&& GET_CODE (op0
) == SUBREG
6043 && subreg_lowpart_p (op0
)
6044 && (GET_MODE_SIZE (GET_MODE (op0
))
6045 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
6047 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
6048 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
6050 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
6051 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
6052 reversed_nonequality
);
6055 if (code
== NE
&& GET_CODE (op1
) == SUBREG
6056 && subreg_lowpart_p (op1
)
6057 && (GET_MODE_SIZE (GET_MODE (op1
))
6058 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
6060 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
6061 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
6063 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
6064 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
6065 reversed_nonequality
);
6068 /* Hash both operands. */
6071 hash_arg_in_memory
= 0;
6072 hash_arg_in_struct
= 0;
6073 op0_hash
= HASH (op0
, mode
);
6074 op0_in_memory
= hash_arg_in_memory
;
6075 op0_in_struct
= hash_arg_in_struct
;
6081 hash_arg_in_memory
= 0;
6082 hash_arg_in_struct
= 0;
6083 op1_hash
= HASH (op1
, mode
);
6084 op1_in_memory
= hash_arg_in_memory
;
6085 op1_in_struct
= hash_arg_in_struct
;
6090 /* Look up both operands. */
6091 op0_elt
= lookup (op0
, op0_hash
, mode
);
6092 op1_elt
= lookup (op1
, op1_hash
, mode
);
6094 /* If both operands are already equivalent or if they are not in the
6095 table but are identical, do nothing. */
6096 if ((op0_elt
!= 0 && op1_elt
!= 0
6097 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
6098 || op0
== op1
|| rtx_equal_p (op0
, op1
))
6101 /* If we aren't setting two things equal all we can do is save this
6102 comparison. Similarly if this is floating-point. In the latter
6103 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6104 If we record the equality, we might inadvertently delete code
6105 whose intent was to change -0 to +0. */
6107 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
6109 /* If we reversed a floating-point comparison, if OP0 is not a
6110 register, or if OP1 is neither a register or constant, we can't
6113 if (GET_CODE (op1
) != REG
)
6114 op1
= equiv_constant (op1
);
6116 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
6117 || GET_CODE (op0
) != REG
|| op1
== 0)
6120 /* Put OP0 in the hash table if it isn't already. This gives it a
6121 new quantity number. */
6124 if (insert_regs (op0
, NULL_PTR
, 0))
6126 rehash_using_reg (op0
);
6127 op0_hash
= HASH (op0
, mode
);
6129 /* If OP0 is contained in OP1, this changes its hash code
6130 as well. Faster to rehash than to check, except
6131 for the simple case of a constant. */
6132 if (! CONSTANT_P (op1
))
6133 op1_hash
= HASH (op1
,mode
);
6136 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6137 op0_elt
->in_memory
= op0_in_memory
;
6138 op0_elt
->in_struct
= op0_in_struct
;
6141 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
6142 if (GET_CODE (op1
) == REG
)
6144 /* Look it up again--in case op0 and op1 are the same. */
6145 op1_elt
= lookup (op1
, op1_hash
, mode
);
6147 /* Put OP1 in the hash table so it gets a new quantity number. */
6150 if (insert_regs (op1
, NULL_PTR
, 0))
6152 rehash_using_reg (op1
);
6153 op1_hash
= HASH (op1
, mode
);
6156 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6157 op1_elt
->in_memory
= op1_in_memory
;
6158 op1_elt
->in_struct
= op1_in_struct
;
6161 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
6162 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
6166 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
6167 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6173 /* If either side is still missing an equivalence, make it now,
6174 then merge the equivalences. */
6178 if (insert_regs (op0
, NULL_PTR
, 0))
6180 rehash_using_reg (op0
);
6181 op0_hash
= HASH (op0
, mode
);
6184 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6185 op0_elt
->in_memory
= op0_in_memory
;
6186 op0_elt
->in_struct
= op0_in_struct
;
6191 if (insert_regs (op1
, NULL_PTR
, 0))
6193 rehash_using_reg (op1
);
6194 op1_hash
= HASH (op1
, mode
);
6197 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6198 op1_elt
->in_memory
= op1_in_memory
;
6199 op1_elt
->in_struct
= op1_in_struct
;
6202 merge_equiv_classes (op0_elt
, op1_elt
);
6203 last_jump_equiv_class
= op0_elt
;
6206 /* CSE processing for one instruction.
6207 First simplify sources and addresses of all assignments
6208 in the instruction, using previously-computed equivalents values.
6209 Then install the new sources and destinations in the table
6210 of available values.
6212 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6213 the insn. It means that INSN is inside libcall block. In this
6214 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6216 /* Data on one SET contained in the instruction. */
6220 /* The SET rtx itself. */
6222 /* The SET_SRC of the rtx (the original value, if it is changing). */
6224 /* The hash-table element for the SET_SRC of the SET. */
6225 struct table_elt
*src_elt
;
6226 /* Hash value for the SET_SRC. */
6228 /* Hash value for the SET_DEST. */
6230 /* The SET_DEST, with SUBREG, etc., stripped. */
6232 /* Place where the pointer to the INNER_DEST was found. */
6233 rtx
*inner_dest_loc
;
6234 /* Nonzero if the SET_SRC is in memory. */
6236 /* Nonzero if the SET_SRC is in a structure. */
6238 /* Nonzero if the SET_SRC contains something
6239 whose value cannot be predicted and understood. */
6241 /* Original machine mode, in case it becomes a CONST_INT. */
6242 enum machine_mode mode
;
6243 /* A constant equivalent for SET_SRC, if any. */
6245 /* Hash value of constant equivalent for SET_SRC. */
6246 unsigned src_const_hash
;
6247 /* Table entry for constant equivalent for SET_SRC, if any. */
6248 struct table_elt
*src_const_elt
;
6252 cse_insn (insn
, libcall_insn
)
6256 register rtx x
= PATTERN (insn
);
6259 register int n_sets
= 0;
6262 /* Records what this insn does to set CC0. */
6263 rtx this_insn_cc0
= 0;
6264 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
6268 struct table_elt
*src_eqv_elt
= 0;
6269 int src_eqv_volatile
;
6270 int src_eqv_in_memory
;
6271 int src_eqv_in_struct
;
6272 unsigned src_eqv_hash
;
6278 /* Find all the SETs and CLOBBERs in this instruction.
6279 Record all the SETs in the array `set' and count them.
6280 Also determine whether there is a CLOBBER that invalidates
6281 all memory references, or all references at varying addresses. */
6283 if (GET_CODE (insn
) == CALL_INSN
)
6285 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6286 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6287 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6290 if (GET_CODE (x
) == SET
)
6292 sets
= (struct set
*) alloca (sizeof (struct set
));
6295 /* Ignore SETs that are unconditional jumps.
6296 They never need cse processing, so this does not hurt.
6297 The reason is not efficiency but rather
6298 so that we can test at the end for instructions
6299 that have been simplified to unconditional jumps
6300 and not be misled by unchanged instructions
6301 that were unconditional jumps to begin with. */
6302 if (SET_DEST (x
) == pc_rtx
6303 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6306 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6307 The hard function value register is used only once, to copy to
6308 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6309 Ensure we invalidate the destination register. On the 80386 no
6310 other code would invalidate it since it is a fixed_reg.
6311 We need not check the return of apply_change_group; see canon_reg. */
6313 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6315 canon_reg (SET_SRC (x
), insn
);
6316 apply_change_group ();
6317 fold_rtx (SET_SRC (x
), insn
);
6318 invalidate (SET_DEST (x
), VOIDmode
);
6323 else if (GET_CODE (x
) == PARALLEL
)
6325 register int lim
= XVECLEN (x
, 0);
6327 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6329 /* Find all regs explicitly clobbered in this insn,
6330 and ensure they are not replaced with any other regs
6331 elsewhere in this insn.
6332 When a reg that is clobbered is also used for input,
6333 we should presume that that is for a reason,
6334 and we should not substitute some other register
6335 which is not supposed to be clobbered.
6336 Therefore, this loop cannot be merged into the one below
6337 because a CALL may precede a CLOBBER and refer to the
6338 value clobbered. We must not let a canonicalization do
6339 anything in that case. */
6340 for (i
= 0; i
< lim
; i
++)
6342 register rtx y
= XVECEXP (x
, 0, i
);
6343 if (GET_CODE (y
) == CLOBBER
)
6345 rtx clobbered
= XEXP (y
, 0);
6347 if (GET_CODE (clobbered
) == REG
6348 || GET_CODE (clobbered
) == SUBREG
)
6349 invalidate (clobbered
, VOIDmode
);
6350 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6351 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6352 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6356 for (i
= 0; i
< lim
; i
++)
6358 register rtx y
= XVECEXP (x
, 0, i
);
6359 if (GET_CODE (y
) == SET
)
6361 /* As above, we ignore unconditional jumps and call-insns and
6362 ignore the result of apply_change_group. */
6363 if (GET_CODE (SET_SRC (y
)) == CALL
)
6365 canon_reg (SET_SRC (y
), insn
);
6366 apply_change_group ();
6367 fold_rtx (SET_SRC (y
), insn
);
6368 invalidate (SET_DEST (y
), VOIDmode
);
6370 else if (SET_DEST (y
) == pc_rtx
6371 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6374 sets
[n_sets
++].rtl
= y
;
6376 else if (GET_CODE (y
) == CLOBBER
)
6378 /* If we clobber memory, canon the address.
6379 This does nothing when a register is clobbered
6380 because we have already invalidated the reg. */
6381 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6382 canon_reg (XEXP (y
, 0), NULL_RTX
);
6384 else if (GET_CODE (y
) == USE
6385 && ! (GET_CODE (XEXP (y
, 0)) == REG
6386 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6387 canon_reg (y
, NULL_RTX
);
6388 else if (GET_CODE (y
) == CALL
)
6390 /* The result of apply_change_group can be ignored; see
6392 canon_reg (y
, insn
);
6393 apply_change_group ();
6398 else if (GET_CODE (x
) == CLOBBER
)
6400 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6401 canon_reg (XEXP (x
, 0), NULL_RTX
);
6404 /* Canonicalize a USE of a pseudo register or memory location. */
6405 else if (GET_CODE (x
) == USE
6406 && ! (GET_CODE (XEXP (x
, 0)) == REG
6407 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6408 canon_reg (XEXP (x
, 0), NULL_RTX
);
6409 else if (GET_CODE (x
) == CALL
)
6411 /* The result of apply_change_group can be ignored; see canon_reg. */
6412 canon_reg (x
, insn
);
6413 apply_change_group ();
6417 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6418 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6419 is handled specially for this case, and if it isn't set, then there will
6420 be no equivalence for the destination. */
6421 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6422 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6423 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6424 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6425 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6427 /* Canonicalize sources and addresses of destinations.
6428 We do this in a separate pass to avoid problems when a MATCH_DUP is
6429 present in the insn pattern. In that case, we want to ensure that
6430 we don't break the duplicate nature of the pattern. So we will replace
6431 both operands at the same time. Otherwise, we would fail to find an
6432 equivalent substitution in the loop calling validate_change below.
6434 We used to suppress canonicalization of DEST if it appears in SRC,
6435 but we don't do this any more. */
6437 for (i
= 0; i
< n_sets
; i
++)
6439 rtx dest
= SET_DEST (sets
[i
].rtl
);
6440 rtx src
= SET_SRC (sets
[i
].rtl
);
6441 rtx
new = canon_reg (src
, insn
);
6444 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6445 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6446 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6447 || (insn_code
= recog_memoized (insn
)) < 0
6448 || insn_n_dups
[insn_code
] > 0)
6449 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6451 SET_SRC (sets
[i
].rtl
) = new;
6453 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6455 validate_change (insn
, &XEXP (dest
, 1),
6456 canon_reg (XEXP (dest
, 1), insn
), 1);
6457 validate_change (insn
, &XEXP (dest
, 2),
6458 canon_reg (XEXP (dest
, 2), insn
), 1);
6461 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6462 || GET_CODE (dest
) == ZERO_EXTRACT
6463 || GET_CODE (dest
) == SIGN_EXTRACT
)
6464 dest
= XEXP (dest
, 0);
6466 if (GET_CODE (dest
) == MEM
)
6467 canon_reg (dest
, insn
);
6470 /* Now that we have done all the replacements, we can apply the change
6471 group and see if they all work. Note that this will cause some
6472 canonicalizations that would have worked individually not to be applied
6473 because some other canonicalization didn't work, but this should not
6476 The result of apply_change_group can be ignored; see canon_reg. */
6478 apply_change_group ();
6480 /* Set sets[i].src_elt to the class each source belongs to.
6481 Detect assignments from or to volatile things
6482 and set set[i] to zero so they will be ignored
6483 in the rest of this function.
6485 Nothing in this loop changes the hash table or the register chains. */
6487 for (i
= 0; i
< n_sets
; i
++)
6489 register rtx src
, dest
;
6490 register rtx src_folded
;
6491 register struct table_elt
*elt
= 0, *p
;
6492 enum machine_mode mode
;
6495 rtx src_related
= 0;
6496 struct table_elt
*src_const_elt
= 0;
6497 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6498 int src_related_cost
= 10000, src_elt_cost
= 10000;
6499 /* Set non-zero if we need to call force_const_mem on with the
6500 contents of src_folded before using it. */
6501 int src_folded_force_flag
= 0;
6503 dest
= SET_DEST (sets
[i
].rtl
);
6504 src
= SET_SRC (sets
[i
].rtl
);
6506 /* If SRC is a constant that has no machine mode,
6507 hash it with the destination's machine mode.
6508 This way we can keep different modes separate. */
6510 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6511 sets
[i
].mode
= mode
;
6515 enum machine_mode eqvmode
= mode
;
6516 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6517 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6519 hash_arg_in_memory
= 0;
6520 hash_arg_in_struct
= 0;
6521 src_eqv
= fold_rtx (src_eqv
, insn
);
6522 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6524 /* Find the equivalence class for the equivalent expression. */
6527 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6529 src_eqv_volatile
= do_not_record
;
6530 src_eqv_in_memory
= hash_arg_in_memory
;
6531 src_eqv_in_struct
= hash_arg_in_struct
;
6534 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6535 value of the INNER register, not the destination. So it is not
6536 a valid substitution for the source. But save it for later. */
6537 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6540 src_eqv_here
= src_eqv
;
6542 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6543 simplified result, which may not necessarily be valid. */
6544 src_folded
= fold_rtx (src
, insn
);
6547 /* ??? This caused bad code to be generated for the m68k port with -O2.
6548 Suppose src is (CONST_INT -1), and that after truncation src_folded
6549 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6550 At the end we will add src and src_const to the same equivalence
6551 class. We now have 3 and -1 on the same equivalence class. This
6552 causes later instructions to be mis-optimized. */
6553 /* If storing a constant in a bitfield, pre-truncate the constant
6554 so we will be able to record it later. */
6555 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6556 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6558 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6560 if (GET_CODE (src
) == CONST_INT
6561 && GET_CODE (width
) == CONST_INT
6562 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6563 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6565 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6566 << INTVAL (width
)) - 1));
6570 /* Compute SRC's hash code, and also notice if it
6571 should not be recorded at all. In that case,
6572 prevent any further processing of this assignment. */
6574 hash_arg_in_memory
= 0;
6575 hash_arg_in_struct
= 0;
6578 sets
[i
].src_hash
= HASH (src
, mode
);
6579 sets
[i
].src_volatile
= do_not_record
;
6580 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6581 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6583 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6584 a pseudo that is set more than once, do not record SRC. Using
6585 SRC as a replacement for anything else will be incorrect in that
6586 situation. Note that this usually occurs only for stack slots,
6587 in which case all the RTL would be referring to SRC, so we don't
6588 lose any optimization opportunities by not having SRC in the
6591 if (GET_CODE (src
) == MEM
6592 && find_reg_note (insn
, REG_EQUIV
, src
) != 0
6593 && GET_CODE (dest
) == REG
6594 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
6595 && REG_N_SETS (REGNO (dest
)) != 1)
6596 sets
[i
].src_volatile
= 1;
6599 /* It is no longer clear why we used to do this, but it doesn't
6600 appear to still be needed. So let's try without it since this
6601 code hurts cse'ing widened ops. */
6602 /* If source is a perverse subreg (such as QI treated as an SI),
6603 treat it as volatile. It may do the work of an SI in one context
6604 where the extra bits are not being used, but cannot replace an SI
6606 if (GET_CODE (src
) == SUBREG
6607 && (GET_MODE_SIZE (GET_MODE (src
))
6608 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6609 sets
[i
].src_volatile
= 1;
6612 /* Locate all possible equivalent forms for SRC. Try to replace
6613 SRC in the insn with each cheaper equivalent.
6615 We have the following types of equivalents: SRC itself, a folded
6616 version, a value given in a REG_EQUAL note, or a value related
6619 Each of these equivalents may be part of an additional class
6620 of equivalents (if more than one is in the table, they must be in
6621 the same class; we check for this).
6623 If the source is volatile, we don't do any table lookups.
6625 We note any constant equivalent for possible later use in a
6628 if (!sets
[i
].src_volatile
)
6629 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6631 sets
[i
].src_elt
= elt
;
6633 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6635 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6637 /* The REG_EQUAL is indicating that two formerly distinct
6638 classes are now equivalent. So merge them. */
6639 merge_equiv_classes (elt
, src_eqv_elt
);
6640 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6641 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6647 else if (src_eqv_elt
)
6650 /* Try to find a constant somewhere and record it in `src_const'.
6651 Record its table element, if any, in `src_const_elt'. Look in
6652 any known equivalences first. (If the constant is not in the
6653 table, also set `sets[i].src_const_hash'). */
6655 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6659 src_const_elt
= elt
;
6664 && (CONSTANT_P (src_folded
)
6665 /* Consider (minus (label_ref L1) (label_ref L2)) as
6666 "constant" here so we will record it. This allows us
6667 to fold switch statements when an ADDR_DIFF_VEC is used. */
6668 || (GET_CODE (src_folded
) == MINUS
6669 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6670 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6671 src_const
= src_folded
, src_const_elt
= elt
;
6672 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6673 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6675 /* If we don't know if the constant is in the table, get its
6676 hash code and look it up. */
6677 if (src_const
&& src_const_elt
== 0)
6679 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6680 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6683 sets
[i
].src_const
= src_const
;
6684 sets
[i
].src_const_elt
= src_const_elt
;
6686 /* If the constant and our source are both in the table, mark them as
6687 equivalent. Otherwise, if a constant is in the table but the source
6688 isn't, set ELT to it. */
6689 if (src_const_elt
&& elt
6690 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6691 merge_equiv_classes (elt
, src_const_elt
);
6692 else if (src_const_elt
&& elt
== 0)
6693 elt
= src_const_elt
;
6695 /* See if there is a register linearly related to a constant
6696 equivalent of SRC. */
6698 && (GET_CODE (src_const
) == CONST
6699 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6701 src_related
= use_related_value (src_const
, src_const_elt
);
6704 struct table_elt
*src_related_elt
6705 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6706 if (src_related_elt
&& elt
)
6708 if (elt
->first_same_value
6709 != src_related_elt
->first_same_value
)
6710 /* This can occur when we previously saw a CONST
6711 involving a SYMBOL_REF and then see the SYMBOL_REF
6712 twice. Merge the involved classes. */
6713 merge_equiv_classes (elt
, src_related_elt
);
6716 src_related_elt
= 0;
6718 else if (src_related_elt
&& elt
== 0)
6719 elt
= src_related_elt
;
6723 /* See if we have a CONST_INT that is already in a register in a
6726 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6727 && GET_MODE_CLASS (mode
) == MODE_INT
6728 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6730 enum machine_mode wider_mode
;
6732 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6733 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6734 && src_related
== 0;
6735 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6737 struct table_elt
*const_elt
6738 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6743 for (const_elt
= const_elt
->first_same_value
;
6744 const_elt
; const_elt
= const_elt
->next_same_value
)
6745 if (GET_CODE (const_elt
->exp
) == REG
)
6747 src_related
= gen_lowpart_if_possible (mode
,
6754 /* Another possibility is that we have an AND with a constant in
6755 a mode narrower than a word. If so, it might have been generated
6756 as part of an "if" which would narrow the AND. If we already
6757 have done the AND in a wider mode, we can use a SUBREG of that
6760 if (flag_expensive_optimizations
&& ! src_related
6761 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6762 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6764 enum machine_mode tmode
;
6765 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6767 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6768 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6769 tmode
= GET_MODE_WIDER_MODE (tmode
))
6771 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6772 struct table_elt
*larger_elt
;
6776 PUT_MODE (new_and
, tmode
);
6777 XEXP (new_and
, 0) = inner
;
6778 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6779 if (larger_elt
== 0)
6782 for (larger_elt
= larger_elt
->first_same_value
;
6783 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6784 if (GET_CODE (larger_elt
->exp
) == REG
)
6787 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6797 #ifdef LOAD_EXTEND_OP
6798 /* See if a MEM has already been loaded with a widening operation;
6799 if it has, we can use a subreg of that. Many CISC machines
6800 also have such operations, but this is only likely to be
6801 beneficial these machines. */
6803 if (flag_expensive_optimizations
&& src_related
== 0
6804 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6805 && GET_MODE_CLASS (mode
) == MODE_INT
6806 && GET_CODE (src
) == MEM
&& ! do_not_record
6807 && LOAD_EXTEND_OP (mode
) != NIL
)
6809 enum machine_mode tmode
;
6811 /* Set what we are trying to extend and the operation it might
6812 have been extended with. */
6813 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6814 XEXP (memory_extend_rtx
, 0) = src
;
6816 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6817 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6818 tmode
= GET_MODE_WIDER_MODE (tmode
))
6820 struct table_elt
*larger_elt
;
6822 PUT_MODE (memory_extend_rtx
, tmode
);
6823 larger_elt
= lookup (memory_extend_rtx
,
6824 HASH (memory_extend_rtx
, tmode
), tmode
);
6825 if (larger_elt
== 0)
6828 for (larger_elt
= larger_elt
->first_same_value
;
6829 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6830 if (GET_CODE (larger_elt
->exp
) == REG
)
6832 src_related
= gen_lowpart_if_possible (mode
,
6841 #endif /* LOAD_EXTEND_OP */
6843 if (src
== src_folded
)
6846 /* At this point, ELT, if non-zero, points to a class of expressions
6847 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6848 and SRC_RELATED, if non-zero, each contain additional equivalent
6849 expressions. Prune these latter expressions by deleting expressions
6850 already in the equivalence class.
6852 Check for an equivalent identical to the destination. If found,
6853 this is the preferred equivalent since it will likely lead to
6854 elimination of the insn. Indicate this by placing it in
6857 if (elt
) elt
= elt
->first_same_value
;
6858 for (p
= elt
; p
; p
= p
->next_same_value
)
6860 enum rtx_code code
= GET_CODE (p
->exp
);
6862 /* If the expression is not valid, ignore it. Then we do not
6863 have to check for validity below. In most cases, we can use
6864 `rtx_equal_p', since canonicalization has already been done. */
6865 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6868 /* Also skip paradoxical subregs, unless that's what we're
6871 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
6872 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
6874 && GET_CODE (src
) == SUBREG
6875 && GET_MODE (src
) == GET_MODE (p
->exp
)
6876 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6877 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
6880 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6882 else if (src_folded
&& GET_CODE (src_folded
) == code
6883 && rtx_equal_p (src_folded
, p
->exp
))
6885 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6886 && rtx_equal_p (src_eqv_here
, p
->exp
))
6888 else if (src_related
&& GET_CODE (src_related
) == code
6889 && rtx_equal_p (src_related
, p
->exp
))
6892 /* This is the same as the destination of the insns, we want
6893 to prefer it. Copy it to src_related. The code below will
6894 then give it a negative cost. */
6895 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6900 /* Find the cheapest valid equivalent, trying all the available
6901 possibilities. Prefer items not in the hash table to ones
6902 that are when they are equal cost. Note that we can never
6903 worsen an insn as the current contents will also succeed.
6904 If we find an equivalent identical to the destination, use it as best,
6905 since this insn will probably be eliminated in that case. */
6908 if (rtx_equal_p (src
, dest
))
6911 src_cost
= COST (src
);
6916 if (rtx_equal_p (src_eqv_here
, dest
))
6919 src_eqv_cost
= COST (src_eqv_here
);
6924 if (rtx_equal_p (src_folded
, dest
))
6925 src_folded_cost
= -1;
6927 src_folded_cost
= COST (src_folded
);
6932 if (rtx_equal_p (src_related
, dest
))
6933 src_related_cost
= -1;
6935 src_related_cost
= COST (src_related
);
6938 /* If this was an indirect jump insn, a known label will really be
6939 cheaper even though it looks more expensive. */
6940 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6941 src_folded
= src_const
, src_folded_cost
= -1;
6943 /* Terminate loop when replacement made. This must terminate since
6944 the current contents will be tested and will always be valid. */
6949 /* Skip invalid entries. */
6950 while (elt
&& GET_CODE (elt
->exp
) != REG
6951 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6952 elt
= elt
->next_same_value
;
6954 /* A paradoxical subreg would be bad here: it'll be the right
6955 size, but later may be adjusted so that the upper bits aren't
6956 what we want. So reject it. */
6958 && GET_CODE (elt
->exp
) == SUBREG
6959 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
6960 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
6961 /* It is okay, though, if the rtx we're trying to match
6962 will ignore any of the bits we can't predict. */
6964 && GET_CODE (src
) == SUBREG
6965 && GET_MODE (src
) == GET_MODE (elt
->exp
)
6966 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6967 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
6969 elt
= elt
->next_same_value
;
6973 if (elt
) src_elt_cost
= elt
->cost
;
6975 /* Find cheapest and skip it for the next time. For items
6976 of equal cost, use this order:
6977 src_folded, src, src_eqv, src_related and hash table entry. */
6978 if (src_folded_cost
<= src_cost
6979 && src_folded_cost
<= src_eqv_cost
6980 && src_folded_cost
<= src_related_cost
6981 && src_folded_cost
<= src_elt_cost
)
6983 trial
= src_folded
, src_folded_cost
= 10000;
6984 if (src_folded_force_flag
)
6985 trial
= force_const_mem (mode
, trial
);
6987 else if (src_cost
<= src_eqv_cost
6988 && src_cost
<= src_related_cost
6989 && src_cost
<= src_elt_cost
)
6990 trial
= src
, src_cost
= 10000;
6991 else if (src_eqv_cost
<= src_related_cost
6992 && src_eqv_cost
<= src_elt_cost
)
6993 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6994 else if (src_related_cost
<= src_elt_cost
)
6995 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6998 trial
= copy_rtx (elt
->exp
);
6999 elt
= elt
->next_same_value
;
7000 src_elt_cost
= 10000;
7003 /* We don't normally have an insn matching (set (pc) (pc)), so
7004 check for this separately here. We will delete such an
7007 Tablejump insns contain a USE of the table, so simply replacing
7008 the operand with the constant won't match. This is simply an
7009 unconditional branch, however, and is therefore valid. Just
7010 insert the substitution here and we will delete and re-emit
7013 /* Keep track of the original SET_SRC so that we can fix notes
7014 on libcall instructions. */
7015 old_src
= SET_SRC (sets
[i
].rtl
);
7017 if (n_sets
== 1 && dest
== pc_rtx
7019 || (GET_CODE (trial
) == LABEL_REF
7020 && ! condjump_p (insn
))))
7022 /* If TRIAL is a label in front of a jump table, we are
7023 really falling through the switch (this is how casesi
7024 insns work), so we must branch around the table. */
7025 if (GET_CODE (trial
) == CODE_LABEL
7026 && NEXT_INSN (trial
) != 0
7027 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
7028 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
7029 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
7031 trial
= gen_rtx_LABEL_REF (Pmode
, get_label_after (trial
));
7033 SET_SRC (sets
[i
].rtl
) = trial
;
7034 cse_jumps_altered
= 1;
7038 /* Look for a substitution that makes a valid insn. */
7039 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
7041 /* If we just made a substitution inside a libcall, then we
7042 need to make the same substitution in any notes attached
7043 to the RETVAL insn. */
7045 && (GET_CODE (old_src
) == REG
7046 || GET_CODE (old_src
) == SUBREG
7047 || GET_CODE (old_src
) == MEM
))
7048 replace_rtx (REG_NOTES (libcall_insn
), old_src
,
7049 canon_reg (SET_SRC (sets
[i
].rtl
), insn
));
7051 /* The result of apply_change_group can be ignored; see
7054 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
7055 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
7057 apply_change_group ();
7061 /* If we previously found constant pool entries for
7062 constants and this is a constant, try making a
7063 pool entry. Put it in src_folded unless we already have done
7064 this since that is where it likely came from. */
7066 else if (constant_pool_entries_cost
7067 && CONSTANT_P (trial
)
7068 && ! (GET_CODE (trial
) == CONST
7069 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
7071 || (GET_CODE (src_folded
) != MEM
7072 && ! src_folded_force_flag
))
7073 && GET_MODE_CLASS (mode
) != MODE_CC
7074 && mode
!= VOIDmode
)
7076 src_folded_force_flag
= 1;
7078 src_folded_cost
= constant_pool_entries_cost
;
7082 src
= SET_SRC (sets
[i
].rtl
);
7084 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7085 However, there is an important exception: If both are registers
7086 that are not the head of their equivalence class, replace SET_SRC
7087 with the head of the class. If we do not do this, we will have
7088 both registers live over a portion of the basic block. This way,
7089 their lifetimes will likely abut instead of overlapping. */
7090 if (GET_CODE (dest
) == REG
7091 && REGNO_QTY_VALID_P (REGNO (dest
))
7092 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
7093 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
7094 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
7095 /* Don't do this if the original insn had a hard reg as
7097 && (GET_CODE (sets
[i
].src
) != REG
7098 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
7099 /* We can't call canon_reg here because it won't do anything if
7100 SRC is a hard register. */
7102 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
7104 = (first
>= FIRST_PSEUDO_REGISTER
7105 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
7107 /* We must use validate-change even for this, because this
7108 might be a special no-op instruction, suitable only to
7110 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
7113 /* If we had a constant that is cheaper than what we are now
7114 setting SRC to, use that constant. We ignored it when we
7115 thought we could make this into a no-op. */
7116 if (src_const
&& COST (src_const
) < COST (src
)
7117 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
,
7123 /* If we made a change, recompute SRC values. */
7124 if (src
!= sets
[i
].src
)
7127 hash_arg_in_memory
= 0;
7128 hash_arg_in_struct
= 0;
7130 sets
[i
].src_hash
= HASH (src
, mode
);
7131 sets
[i
].src_volatile
= do_not_record
;
7132 sets
[i
].src_in_memory
= hash_arg_in_memory
;
7133 sets
[i
].src_in_struct
= hash_arg_in_struct
;
7134 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
7137 /* If this is a single SET, we are setting a register, and we have an
7138 equivalent constant, we want to add a REG_NOTE. We don't want
7139 to write a REG_EQUAL note for a constant pseudo since verifying that
7140 that pseudo hasn't been eliminated is a pain. Such a note also
7141 won't help anything. */
7142 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
7143 && GET_CODE (src_const
) != REG
)
7145 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7147 /* Record the actual constant value in a REG_EQUAL note, making
7148 a new one if one does not already exist. */
7150 XEXP (tem
, 0) = src_const
;
7152 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EQUAL
,
7153 src_const
, REG_NOTES (insn
));
7155 /* If storing a constant value in a register that
7156 previously held the constant value 0,
7157 record this fact with a REG_WAS_0 note on this insn.
7159 Note that the *register* is required to have previously held 0,
7160 not just any register in the quantity and we must point to the
7161 insn that set that register to zero.
7163 Rather than track each register individually, we just see if
7164 the last set for this quantity was for this register. */
7166 if (REGNO_QTY_VALID_P (REGNO (dest
))
7167 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
7169 /* See if we previously had a REG_WAS_0 note. */
7170 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7171 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
7173 if ((tem
= single_set (const_insn
)) != 0
7174 && rtx_equal_p (SET_DEST (tem
), dest
))
7177 XEXP (note
, 0) = const_insn
;
7179 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_WAS_0
,
7186 /* Now deal with the destination. */
7188 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
7190 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7191 to the MEM or REG within it. */
7192 while (GET_CODE (dest
) == SIGN_EXTRACT
7193 || GET_CODE (dest
) == ZERO_EXTRACT
7194 || GET_CODE (dest
) == SUBREG
7195 || GET_CODE (dest
) == STRICT_LOW_PART
)
7197 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7198 dest
= XEXP (dest
, 0);
7201 sets
[i
].inner_dest
= dest
;
7203 if (GET_CODE (dest
) == MEM
)
7205 #ifdef PUSH_ROUNDING
7206 /* Stack pushes invalidate the stack pointer. */
7207 rtx addr
= XEXP (dest
, 0);
7208 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7209 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7210 && XEXP (addr
, 0) == stack_pointer_rtx
)
7211 invalidate (stack_pointer_rtx
, Pmode
);
7213 dest
= fold_rtx (dest
, insn
);
7216 /* Compute the hash code of the destination now,
7217 before the effects of this instruction are recorded,
7218 since the register values used in the address computation
7219 are those before this instruction. */
7220 sets
[i
].dest_hash
= HASH (dest
, mode
);
7222 /* Don't enter a bit-field in the hash table
7223 because the value in it after the store
7224 may not equal what was stored, due to truncation. */
7226 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7227 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7229 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7231 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7232 && GET_CODE (width
) == CONST_INT
7233 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7234 && ! (INTVAL (src_const
)
7235 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7236 /* Exception: if the value is constant,
7237 and it won't be truncated, record it. */
7241 /* This is chosen so that the destination will be invalidated
7242 but no new value will be recorded.
7243 We must invalidate because sometimes constant
7244 values can be recorded for bitfields. */
7245 sets
[i
].src_elt
= 0;
7246 sets
[i
].src_volatile
= 1;
7252 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7254 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7256 PUT_CODE (insn
, NOTE
);
7257 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7258 NOTE_SOURCE_FILE (insn
) = 0;
7259 cse_jumps_altered
= 1;
7260 /* One less use of the label this insn used to jump to. */
7261 if (JUMP_LABEL (insn
) != 0)
7262 --LABEL_NUSES (JUMP_LABEL (insn
));
7263 /* No more processing for this set. */
7267 /* If this SET is now setting PC to a label, we know it used to
7268 be a conditional or computed branch. So we see if we can follow
7269 it. If it was a computed branch, delete it and re-emit. */
7270 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7274 /* If this is not in the format for a simple branch and
7275 we are the only SET in it, re-emit it. */
7276 if (! simplejump_p (insn
) && n_sets
== 1)
7278 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7279 JUMP_LABEL (new) = XEXP (src
, 0);
7280 LABEL_NUSES (XEXP (src
, 0))++;
7285 /* Otherwise, force rerecognition, since it probably had
7286 a different pattern before.
7287 This shouldn't really be necessary, since whatever
7288 changed the source value above should have done this.
7289 Until the right place is found, might as well do this here. */
7290 INSN_CODE (insn
) = -1;
7292 /* Now that we've converted this jump to an unconditional jump,
7293 there is dead code after it. Delete the dead code until we
7294 reach a BARRIER, the end of the function, or a label. Do
7295 not delete NOTEs except for NOTE_INSN_DELETED since later
7296 phases assume these notes are retained. */
7300 while (NEXT_INSN (p
) != 0
7301 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7302 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7304 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7305 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7306 delete_insn (NEXT_INSN (p
));
7311 /* If we don't have a BARRIER immediately after INSN, put one there.
7312 Much code assumes that there are no NOTEs between a JUMP_INSN and
7315 if (NEXT_INSN (insn
) == 0
7316 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7317 emit_barrier_before (NEXT_INSN (insn
));
7319 /* We might have two BARRIERs separated by notes. Delete the second
7322 if (p
!= insn
&& NEXT_INSN (p
) != 0
7323 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7324 delete_insn (NEXT_INSN (p
));
7326 cse_jumps_altered
= 1;
7330 /* If destination is volatile, invalidate it and then do no further
7331 processing for this assignment. */
7333 else if (do_not_record
)
7335 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7336 || GET_CODE (dest
) == MEM
)
7337 invalidate (dest
, VOIDmode
);
7338 else if (GET_CODE (dest
) == STRICT_LOW_PART
7339 || GET_CODE (dest
) == ZERO_EXTRACT
)
7340 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7344 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7345 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7348 /* If setting CC0, record what it was set to, or a constant, if it
7349 is equivalent to a constant. If it is being set to a floating-point
7350 value, make a COMPARE with the appropriate constant of 0. If we
7351 don't do this, later code can interpret this as a test against
7352 const0_rtx, which can cause problems if we try to put it into an
7353 insn as a floating-point operand. */
7354 if (dest
== cc0_rtx
)
7356 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7357 this_insn_cc0_mode
= mode
;
7358 if (FLOAT_MODE_P (mode
))
7359 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
7365 /* Now enter all non-volatile source expressions in the hash table
7366 if they are not already present.
7367 Record their equivalence classes in src_elt.
7368 This way we can insert the corresponding destinations into
7369 the same classes even if the actual sources are no longer in them
7370 (having been invalidated). */
7372 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7373 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7375 register struct table_elt
*elt
;
7376 register struct table_elt
*classp
= sets
[0].src_elt
;
7377 rtx dest
= SET_DEST (sets
[0].rtl
);
7378 enum machine_mode eqvmode
= GET_MODE (dest
);
7380 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7382 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7385 if (insert_regs (src_eqv
, classp
, 0))
7387 rehash_using_reg (src_eqv
);
7388 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7390 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7391 elt
->in_memory
= src_eqv_in_memory
;
7392 elt
->in_struct
= src_eqv_in_struct
;
7395 /* Check to see if src_eqv_elt is the same as a set source which
7396 does not yet have an elt, and if so set the elt of the set source
7398 for (i
= 0; i
< n_sets
; i
++)
7399 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7400 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7401 sets
[i
].src_elt
= src_eqv_elt
;
7404 for (i
= 0; i
< n_sets
; i
++)
7405 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7406 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7408 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7410 /* REG_EQUAL in setting a STRICT_LOW_PART
7411 gives an equivalent for the entire destination register,
7412 not just for the subreg being stored in now.
7413 This is a more interesting equivalence, so we arrange later
7414 to treat the entire reg as the destination. */
7415 sets
[i
].src_elt
= src_eqv_elt
;
7416 sets
[i
].src_hash
= src_eqv_hash
;
7420 /* Insert source and constant equivalent into hash table, if not
7422 register struct table_elt
*classp
= src_eqv_elt
;
7423 register rtx src
= sets
[i
].src
;
7424 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7425 enum machine_mode mode
7426 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7428 if (sets
[i
].src_elt
== 0)
7430 register struct table_elt
*elt
;
7432 /* Note that these insert_regs calls cannot remove
7433 any of the src_elt's, because they would have failed to
7434 match if not still valid. */
7435 if (insert_regs (src
, classp
, 0))
7437 rehash_using_reg (src
);
7438 sets
[i
].src_hash
= HASH (src
, mode
);
7440 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7441 elt
->in_memory
= sets
[i
].src_in_memory
;
7442 elt
->in_struct
= sets
[i
].src_in_struct
;
7443 sets
[i
].src_elt
= classp
= elt
;
7446 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7447 && src
!= sets
[i
].src_const
7448 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7449 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7450 sets
[i
].src_const_hash
, mode
);
7453 else if (sets
[i
].src_elt
== 0)
7454 /* If we did not insert the source into the hash table (e.g., it was
7455 volatile), note the equivalence class for the REG_EQUAL value, if any,
7456 so that the destination goes into that class. */
7457 sets
[i
].src_elt
= src_eqv_elt
;
7459 invalidate_from_clobbers (x
);
7461 /* Some registers are invalidated by subroutine calls. Memory is
7462 invalidated by non-constant calls. */
7464 if (GET_CODE (insn
) == CALL_INSN
)
7466 if (! CONST_CALL_P (insn
))
7467 invalidate_memory ();
7468 invalidate_for_call ();
7471 /* Now invalidate everything set by this instruction.
7472 If a SUBREG or other funny destination is being set,
7473 sets[i].rtl is still nonzero, so here we invalidate the reg
7474 a part of which is being set. */
7476 for (i
= 0; i
< n_sets
; i
++)
7479 /* We can't use the inner dest, because the mode associated with
7480 a ZERO_EXTRACT is significant. */
7481 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7483 /* Needed for registers to remove the register from its
7484 previous quantity's chain.
7485 Needed for memory if this is a nonvarying address, unless
7486 we have just done an invalidate_memory that covers even those. */
7487 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7488 || GET_CODE (dest
) == MEM
)
7489 invalidate (dest
, VOIDmode
);
7490 else if (GET_CODE (dest
) == STRICT_LOW_PART
7491 || GET_CODE (dest
) == ZERO_EXTRACT
)
7492 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7495 /* Make sure registers mentioned in destinations
7496 are safe for use in an expression to be inserted.
7497 This removes from the hash table
7498 any invalid entry that refers to one of these registers.
7500 We don't care about the return value from mention_regs because
7501 we are going to hash the SET_DEST values unconditionally. */
7503 for (i
= 0; i
< n_sets
; i
++)
7507 rtx x
= SET_DEST (sets
[i
].rtl
);
7509 if (GET_CODE (x
) != REG
)
7513 /* We used to rely on all references to a register becoming
7514 inaccessible when a register changes to a new quantity,
7515 since that changes the hash code. However, that is not
7516 safe, since after NBUCKETS new quantities we get a
7517 hash 'collision' of a register with its own invalid
7518 entries. And since SUBREGs have been changed not to
7519 change their hash code with the hash code of the register,
7520 it wouldn't work any longer at all. So we have to check
7521 for any invalid references lying around now.
7522 This code is similar to the REG case in mention_regs,
7523 but it knows that reg_tick has been incremented, and
7524 it leaves reg_in_table as -1 . */
7525 register int regno
= REGNO (x
);
7526 register int endregno
7527 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
7528 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
7531 for (i
= regno
; i
< endregno
; i
++)
7533 if (reg_in_table
[i
] >= 0)
7535 remove_invalid_refs (i
);
7536 reg_in_table
[i
] = -1;
7543 /* We may have just removed some of the src_elt's from the hash table.
7544 So replace each one with the current head of the same class. */
7546 for (i
= 0; i
< n_sets
; i
++)
7549 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7550 /* If elt was removed, find current head of same class,
7551 or 0 if nothing remains of that class. */
7553 register struct table_elt
*elt
= sets
[i
].src_elt
;
7555 while (elt
&& elt
->prev_same_value
)
7556 elt
= elt
->prev_same_value
;
7558 while (elt
&& elt
->first_same_value
== 0)
7559 elt
= elt
->next_same_value
;
7560 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7564 /* Now insert the destinations into their equivalence classes. */
7566 for (i
= 0; i
< n_sets
; i
++)
7569 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7570 rtx inner_dest
= sets
[i
].inner_dest
;
7571 register struct table_elt
*elt
;
7573 /* Don't record value if we are not supposed to risk allocating
7574 floating-point values in registers that might be wider than
7576 if ((flag_float_store
7577 && GET_CODE (dest
) == MEM
7578 && FLOAT_MODE_P (GET_MODE (dest
)))
7579 /* Don't record BLKmode values, because we don't know the
7580 size of it, and can't be sure that other BLKmode values
7581 have the same or smaller size. */
7582 || GET_MODE (dest
) == BLKmode
7583 /* Don't record values of destinations set inside a libcall block
7584 since we might delete the libcall. Things should have been set
7585 up so we won't want to reuse such a value, but we play it safe
7588 /* If we didn't put a REG_EQUAL value or a source into the hash
7589 table, there is no point is recording DEST. */
7590 || sets
[i
].src_elt
== 0
7591 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7592 or SIGN_EXTEND, don't record DEST since it can cause
7593 some tracking to be wrong.
7595 ??? Think about this more later. */
7596 || (GET_CODE (dest
) == SUBREG
7597 && (GET_MODE_SIZE (GET_MODE (dest
))
7598 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7599 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7600 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7603 /* STRICT_LOW_PART isn't part of the value BEING set,
7604 and neither is the SUBREG inside it.
7605 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7606 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7607 dest
= SUBREG_REG (XEXP (dest
, 0));
7609 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7610 /* Registers must also be inserted into chains for quantities. */
7611 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7613 /* If `insert_regs' changes something, the hash code must be
7615 rehash_using_reg (dest
);
7616 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7619 if (GET_CODE (inner_dest
) == MEM
7620 && GET_CODE (XEXP (inner_dest
, 0)) == ADDRESSOF
)
7621 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7622 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7623 Consider the case in which the address of the MEM is
7624 passed to a function, which alters the MEM. Then, if we
7625 later use Y instead of the MEM we'll miss the update. */
7626 elt
= insert (dest
, 0, sets
[i
].dest_hash
, GET_MODE (dest
));
7628 elt
= insert (dest
, sets
[i
].src_elt
,
7629 sets
[i
].dest_hash
, GET_MODE (dest
));
7631 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7632 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7633 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7638 /* This implicitly assumes a whole struct
7639 need not have MEM_IN_STRUCT_P.
7640 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7641 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7642 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7645 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7646 narrower than M2, and both M1 and M2 are the same number of words,
7647 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7648 make that equivalence as well.
7650 However, BAR may have equivalences for which gen_lowpart_if_possible
7651 will produce a simpler value than gen_lowpart_if_possible applied to
7652 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7653 BAR's equivalences. If we don't get a simplified form, make
7654 the SUBREG. It will not be used in an equivalence, but will
7655 cause two similar assignments to be detected.
7657 Note the loop below will find SUBREG_REG (DEST) since we have
7658 already entered SRC and DEST of the SET in the table. */
7660 if (GET_CODE (dest
) == SUBREG
7661 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7663 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7664 && (GET_MODE_SIZE (GET_MODE (dest
))
7665 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7666 && sets
[i
].src_elt
!= 0)
7668 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7669 struct table_elt
*elt
, *classp
= 0;
7671 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7672 elt
= elt
->next_same_value
)
7676 struct table_elt
*src_elt
;
7678 /* Ignore invalid entries. */
7679 if (GET_CODE (elt
->exp
) != REG
7680 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7683 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7685 new_src
= gen_rtx_SUBREG (new_mode
, elt
->exp
, 0);
7687 src_hash
= HASH (new_src
, new_mode
);
7688 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7690 /* Put the new source in the hash table is if isn't
7694 if (insert_regs (new_src
, classp
, 0))
7696 rehash_using_reg (new_src
);
7697 src_hash
= HASH (new_src
, new_mode
);
7699 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7700 src_elt
->in_memory
= elt
->in_memory
;
7701 src_elt
->in_struct
= elt
->in_struct
;
7703 else if (classp
&& classp
!= src_elt
->first_same_value
)
7704 /* Show that two things that we've seen before are
7705 actually the same. */
7706 merge_equiv_classes (src_elt
, classp
);
7708 classp
= src_elt
->first_same_value
;
7709 /* Ignore invalid entries. */
7711 && GET_CODE (classp
->exp
) != REG
7712 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
7713 classp
= classp
->next_same_value
;
7718 /* Special handling for (set REG0 REG1)
7719 where REG0 is the "cheapest", cheaper than REG1.
7720 After cse, REG1 will probably not be used in the sequel,
7721 so (if easily done) change this insn to (set REG1 REG0) and
7722 replace REG1 with REG0 in the previous insn that computed their value.
7723 Then REG1 will become a dead store and won't cloud the situation
7724 for later optimizations.
7726 Do not make this change if REG1 is a hard register, because it will
7727 then be used in the sequel and we may be changing a two-operand insn
7728 into a three-operand insn.
7730 Also do not do this if we are operating on a copy of INSN. */
7732 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7733 && NEXT_INSN (PREV_INSN (insn
)) == insn
7734 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7735 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7736 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7737 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7738 == REGNO (SET_DEST (sets
[0].rtl
))))
7740 rtx prev
= PREV_INSN (insn
);
7741 while (prev
&& GET_CODE (prev
) == NOTE
)
7742 prev
= PREV_INSN (prev
);
7744 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7745 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7747 rtx dest
= SET_DEST (sets
[0].rtl
);
7748 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7750 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7751 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7752 SET_SRC (sets
[0].rtl
), 1);
7753 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7754 apply_change_group ();
7756 /* If REG1 was equivalent to a constant, REG0 is not. */
7758 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7760 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7761 any REG_WAS_0 note on INSN to PREV. */
7762 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7764 remove_note (prev
, note
);
7766 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7769 remove_note (insn
, note
);
7770 XEXP (note
, 1) = REG_NOTES (prev
);
7771 REG_NOTES (prev
) = note
;
7774 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7775 then we must delete it, because the value in REG0 has changed. */
7776 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7777 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7778 remove_note (insn
, note
);
7782 /* If this is a conditional jump insn, record any known equivalences due to
7783 the condition being tested. */
7785 last_jump_equiv_class
= 0;
7786 if (GET_CODE (insn
) == JUMP_INSN
7787 && n_sets
== 1 && GET_CODE (x
) == SET
7788 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7789 record_jump_equiv (insn
, 0);
7792 /* If the previous insn set CC0 and this insn no longer references CC0,
7793 delete the previous insn. Here we use the fact that nothing expects CC0
7794 to be valid over an insn, which is true until the final pass. */
7795 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7796 && (tem
= single_set (prev_insn
)) != 0
7797 && SET_DEST (tem
) == cc0_rtx
7798 && ! reg_mentioned_p (cc0_rtx
, x
))
7800 PUT_CODE (prev_insn
, NOTE
);
7801 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7802 NOTE_SOURCE_FILE (prev_insn
) = 0;
7805 prev_insn_cc0
= this_insn_cc0
;
7806 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7812 /* Remove from the ahsh table all expressions that reference memory. */
7814 invalidate_memory ()
7817 register struct table_elt
*p
, *next
;
7819 for (i
= 0; i
< NBUCKETS
; i
++)
7820 for (p
= table
[i
]; p
; p
= next
)
7822 next
= p
->next_same_hash
;
7824 remove_from_table (p
, i
);
7828 /* XXX ??? The name of this function bears little resemblance to
7829 what this function actually does. FIXME. */
7831 note_mem_written (addr
)
7834 /* Pushing or popping the stack invalidates just the stack pointer. */
7835 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7836 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7837 && GET_CODE (XEXP (addr
, 0)) == REG
7838 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7840 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7841 reg_tick
[STACK_POINTER_REGNUM
]++;
7843 /* This should be *very* rare. */
7844 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7845 invalidate (stack_pointer_rtx
, VOIDmode
);
7851 /* Perform invalidation on the basis of everything about an insn
7852 except for invalidating the actual places that are SET in it.
7853 This includes the places CLOBBERed, and anything that might
7854 alias with something that is SET or CLOBBERed.
7856 X is the pattern of the insn. */
7859 invalidate_from_clobbers (x
)
7862 if (GET_CODE (x
) == CLOBBER
)
7864 rtx ref
= XEXP (x
, 0);
7867 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7868 || GET_CODE (ref
) == MEM
)
7869 invalidate (ref
, VOIDmode
);
7870 else if (GET_CODE (ref
) == STRICT_LOW_PART
7871 || GET_CODE (ref
) == ZERO_EXTRACT
)
7872 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7875 else if (GET_CODE (x
) == PARALLEL
)
7878 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7880 register rtx y
= XVECEXP (x
, 0, i
);
7881 if (GET_CODE (y
) == CLOBBER
)
7883 rtx ref
= XEXP (y
, 0);
7884 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7885 || GET_CODE (ref
) == MEM
)
7886 invalidate (ref
, VOIDmode
);
7887 else if (GET_CODE (ref
) == STRICT_LOW_PART
7888 || GET_CODE (ref
) == ZERO_EXTRACT
)
7889 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7895 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7896 and replace any registers in them with either an equivalent constant
7897 or the canonical form of the register. If we are inside an address,
7898 only do this if the address remains valid.
7900 OBJECT is 0 except when within a MEM in which case it is the MEM.
7902 Return the replacement for X. */
7905 cse_process_notes (x
, object
)
7909 enum rtx_code code
= GET_CODE (x
);
7910 char *fmt
= GET_RTX_FORMAT (code
);
7926 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7931 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7932 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7934 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7941 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7942 /* We don't substitute VOIDmode constants into these rtx,
7943 since they would impede folding. */
7944 if (GET_MODE (new) != VOIDmode
)
7945 validate_change (object
, &XEXP (x
, 0), new, 0);
7950 i
= reg_qty
[REGNO (x
)];
7952 /* Return a constant or a constant register. */
7953 if (REGNO_QTY_VALID_P (REGNO (x
))
7954 && qty_const
[i
] != 0
7955 && (CONSTANT_P (qty_const
[i
])
7956 || GET_CODE (qty_const
[i
]) == REG
))
7958 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7963 /* Otherwise, canonicalize this register. */
7964 return canon_reg (x
, NULL_RTX
);
7970 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7972 validate_change (object
, &XEXP (x
, i
),
7973 cse_process_notes (XEXP (x
, i
), object
), 0);
7978 /* Find common subexpressions between the end test of a loop and the beginning
7979 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7981 Often we have a loop where an expression in the exit test is used
7982 in the body of the loop. For example "while (*p) *q++ = *p++;".
7983 Because of the way we duplicate the loop exit test in front of the loop,
7984 however, we don't detect that common subexpression. This will be caught
7985 when global cse is implemented, but this is a quite common case.
7987 This function handles the most common cases of these common expressions.
7988 It is called after we have processed the basic block ending with the
7989 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7990 jumps to a label used only once. */
7993 cse_around_loop (loop_start
)
7998 struct table_elt
*p
;
8000 /* If the jump at the end of the loop doesn't go to the start, we don't
8002 for (insn
= PREV_INSN (loop_start
);
8003 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
8004 insn
= PREV_INSN (insn
))
8008 || GET_CODE (insn
) != NOTE
8009 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
8012 /* If the last insn of the loop (the end test) was an NE comparison,
8013 we will interpret it as an EQ comparison, since we fell through
8014 the loop. Any equivalences resulting from that comparison are
8015 therefore not valid and must be invalidated. */
8016 if (last_jump_equiv_class
)
8017 for (p
= last_jump_equiv_class
->first_same_value
; p
;
8018 p
= p
->next_same_value
)
8020 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
8021 || (GET_CODE (p
->exp
) == SUBREG
8022 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
8023 invalidate (p
->exp
, VOIDmode
);
8024 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
8025 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
8026 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
8029 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8030 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8032 The only thing we do with SET_DEST is invalidate entries, so we
8033 can safely process each SET in order. It is slightly less efficient
8034 to do so, but we only want to handle the most common cases.
8036 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8037 These pseudos won't have valid entries in any of the tables indexed
8038 by register number, such as reg_qty. We avoid out-of-range array
8039 accesses by not processing any instructions created after cse started. */
8041 for (insn
= NEXT_INSN (loop_start
);
8042 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
8043 && INSN_UID (insn
) < max_insn_uid
8044 && ! (GET_CODE (insn
) == NOTE
8045 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
8046 insn
= NEXT_INSN (insn
))
8048 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
8049 && (GET_CODE (PATTERN (insn
)) == SET
8050 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
8051 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
8052 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
8053 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
8054 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8055 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
8056 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
8057 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
8062 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8063 since they are done elsewhere. This function is called via note_stores. */
8066 invalidate_skipped_set (dest
, set
)
8070 enum rtx_code code
= GET_CODE (dest
);
8073 && ! note_mem_written (dest
) /* If this is not a stack push ... */
8074 /* There are times when an address can appear varying and be a PLUS
8075 during this scan when it would be a fixed address were we to know
8076 the proper equivalences. So invalidate all memory if there is
8077 a BLKmode or nonscalar memory reference or a reference to a
8078 variable address. */
8079 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
8080 || cse_rtx_varies_p (XEXP (dest
, 0))))
8082 invalidate_memory ();
8086 if (GET_CODE (set
) == CLOBBER
8093 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
8094 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
8095 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
8096 invalidate (dest
, VOIDmode
);
8099 /* Invalidate all insns from START up to the end of the function or the
8100 next label. This called when we wish to CSE around a block that is
8101 conditionally executed. */
8104 invalidate_skipped_block (start
)
8109 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
8110 insn
= NEXT_INSN (insn
))
8112 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
8115 if (GET_CODE (insn
) == CALL_INSN
)
8117 if (! CONST_CALL_P (insn
))
8118 invalidate_memory ();
8119 invalidate_for_call ();
8122 note_stores (PATTERN (insn
), invalidate_skipped_set
);
8126 /* Used for communication between the following two routines; contains a
8127 value to be checked for modification. */
8129 static rtx cse_check_loop_start_value
;
8131 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8132 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8135 cse_check_loop_start (x
, set
)
8137 rtx set ATTRIBUTE_UNUSED
;
8139 if (cse_check_loop_start_value
== 0
8140 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
8143 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
8144 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
8145 cse_check_loop_start_value
= 0;
8148 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8149 a loop that starts with the label at LOOP_START.
8151 If X is a SET, we see if its SET_SRC is currently in our hash table.
8152 If so, we see if it has a value equal to some register used only in the
8153 loop exit code (as marked by jump.c).
8155 If those two conditions are true, we search backwards from the start of
8156 the loop to see if that same value was loaded into a register that still
8157 retains its value at the start of the loop.
8159 If so, we insert an insn after the load to copy the destination of that
8160 load into the equivalent register and (try to) replace our SET_SRC with that
8163 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8166 cse_set_around_loop (x
, insn
, loop_start
)
8171 struct table_elt
*src_elt
;
8173 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8174 are setting PC or CC0 or whose SET_SRC is already a register. */
8175 if (GET_CODE (x
) == SET
8176 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
8177 && GET_CODE (SET_SRC (x
)) != REG
)
8179 src_elt
= lookup (SET_SRC (x
),
8180 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
8181 GET_MODE (SET_DEST (x
)));
8184 for (src_elt
= src_elt
->first_same_value
; src_elt
;
8185 src_elt
= src_elt
->next_same_value
)
8186 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
8187 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
8191 /* Look for an insn in front of LOOP_START that sets
8192 something in the desired mode to SET_SRC (x) before we hit
8193 a label or CALL_INSN. */
8195 for (p
= prev_nonnote_insn (loop_start
);
8196 p
&& GET_CODE (p
) != CALL_INSN
8197 && GET_CODE (p
) != CODE_LABEL
;
8198 p
= prev_nonnote_insn (p
))
8199 if ((set
= single_set (p
)) != 0
8200 && GET_CODE (SET_DEST (set
)) == REG
8201 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
8202 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
8204 /* We now have to ensure that nothing between P
8205 and LOOP_START modified anything referenced in
8206 SET_SRC (x). We know that nothing within the loop
8207 can modify it, or we would have invalidated it in
8211 cse_check_loop_start_value
= SET_SRC (x
);
8212 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
8213 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
8214 note_stores (PATTERN (q
), cse_check_loop_start
);
8216 /* If nothing was changed and we can replace our
8217 SET_SRC, add an insn after P to copy its destination
8218 to what we will be replacing SET_SRC with. */
8219 if (cse_check_loop_start_value
8220 && validate_change (insn
, &SET_SRC (x
),
8223 /* If this creates new pseudos, this is unsafe,
8224 because the regno of new pseudo is unsuitable
8225 to index into reg_qty when cse_insn processes
8226 the new insn. Therefore, if a new pseudo was
8227 created, discard this optimization. */
8228 int nregs
= max_reg_num ();
8230 = gen_move_insn (src_elt
->exp
, SET_DEST (set
));
8231 if (nregs
!= max_reg_num ())
8233 if (! validate_change (insn
, &SET_SRC (x
),
8238 emit_insn_after (move
, p
);
8245 /* Now invalidate anything modified by X. */
8246 note_mem_written (SET_DEST (x
));
8248 /* See comment on similar code in cse_insn for explanation of these tests. */
8249 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
8250 || GET_CODE (SET_DEST (x
)) == MEM
)
8251 invalidate (SET_DEST (x
), VOIDmode
);
8252 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
8253 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
8254 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
8257 /* Find the end of INSN's basic block and return its range,
8258 the total number of SETs in all the insns of the block, the last insn of the
8259 block, and the branch path.
8261 The branch path indicates which branches should be followed. If a non-zero
8262 path size is specified, the block should be rescanned and a different set
8263 of branches will be taken. The branch path is only used if
8264 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8266 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8267 used to describe the block. It is filled in with the information about
8268 the current block. The incoming structure's branch path, if any, is used
8269 to construct the output branch path. */
8272 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8274 struct cse_basic_block_data
*data
;
8281 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8282 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8283 int path_size
= data
->path_size
;
8287 /* Update the previous branch path, if any. If the last branch was
8288 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8289 shorten the path by one and look at the previous branch. We know that
8290 at least one branch must have been taken if PATH_SIZE is non-zero. */
8291 while (path_size
> 0)
8293 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8295 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8302 /* Scan to end of this basic block. */
8303 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8305 /* Don't cse out the end of a loop. This makes a difference
8306 only for the unusual loops that always execute at least once;
8307 all other loops have labels there so we will stop in any case.
8308 Cse'ing out the end of the loop is dangerous because it
8309 might cause an invariant expression inside the loop
8310 to be reused after the end of the loop. This would make it
8311 hard to move the expression out of the loop in loop.c,
8312 especially if it is one of several equivalent expressions
8313 and loop.c would like to eliminate it.
8315 If we are running after loop.c has finished, we can ignore
8316 the NOTE_INSN_LOOP_END. */
8318 if (! after_loop
&& GET_CODE (p
) == NOTE
8319 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8322 /* Don't cse over a call to setjmp; on some machines (eg vax)
8323 the regs restored by the longjmp come from
8324 a later time than the setjmp. */
8325 if (GET_CODE (p
) == NOTE
8326 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8329 /* A PARALLEL can have lots of SETs in it,
8330 especially if it is really an ASM_OPERANDS. */
8331 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8332 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8333 nsets
+= XVECLEN (PATTERN (p
), 0);
8334 else if (GET_CODE (p
) != NOTE
)
8337 /* Ignore insns made by CSE; they cannot affect the boundaries of
8340 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8341 high_cuid
= INSN_CUID (p
);
8342 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8343 low_cuid
= INSN_CUID (p
);
8345 /* See if this insn is in our branch path. If it is and we are to
8347 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8349 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8352 /* Point to next entry in path, if any. */
8356 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8357 was specified, we haven't reached our maximum path length, there are
8358 insns following the target of the jump, this is the only use of the
8359 jump label, and the target label is preceded by a BARRIER.
8361 Alternatively, we can follow the jump if it branches around a
8362 block of code and there are no other branches into the block.
8363 In this case invalidate_skipped_block will be called to invalidate any
8364 registers set in the block when following the jump. */
8366 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8367 && GET_CODE (p
) == JUMP_INSN
8368 && GET_CODE (PATTERN (p
)) == SET
8369 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8370 && JUMP_LABEL (p
) != 0
8371 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8372 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8374 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8375 if ((GET_CODE (q
) != NOTE
8376 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8377 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8378 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8381 /* If we ran into a BARRIER, this code is an extension of the
8382 basic block when the branch is taken. */
8383 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8385 /* Don't allow ourself to keep walking around an
8386 always-executed loop. */
8387 if (next_real_insn (q
) == next
)
8393 /* Similarly, don't put a branch in our path more than once. */
8394 for (i
= 0; i
< path_entry
; i
++)
8395 if (data
->path
[i
].branch
== p
)
8398 if (i
!= path_entry
)
8401 data
->path
[path_entry
].branch
= p
;
8402 data
->path
[path_entry
++].status
= TAKEN
;
8404 /* This branch now ends our path. It was possible that we
8405 didn't see this branch the last time around (when the
8406 insn in front of the target was a JUMP_INSN that was
8407 turned into a no-op). */
8408 path_size
= path_entry
;
8411 /* Mark block so we won't scan it again later. */
8412 PUT_MODE (NEXT_INSN (p
), QImode
);
8414 /* Detect a branch around a block of code. */
8415 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8419 if (next_real_insn (q
) == next
)
8425 for (i
= 0; i
< path_entry
; i
++)
8426 if (data
->path
[i
].branch
== p
)
8429 if (i
!= path_entry
)
8432 /* This is no_labels_between_p (p, q) with an added check for
8433 reaching the end of a function (in case Q precedes P). */
8434 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8435 if (GET_CODE (tmp
) == CODE_LABEL
)
8440 data
->path
[path_entry
].branch
= p
;
8441 data
->path
[path_entry
++].status
= AROUND
;
8443 path_size
= path_entry
;
8446 /* Mark block so we won't scan it again later. */
8447 PUT_MODE (NEXT_INSN (p
), QImode
);
8454 data
->low_cuid
= low_cuid
;
8455 data
->high_cuid
= high_cuid
;
8456 data
->nsets
= nsets
;
8459 /* If all jumps in the path are not taken, set our path length to zero
8460 so a rescan won't be done. */
8461 for (i
= path_size
- 1; i
>= 0; i
--)
8462 if (data
->path
[i
].status
!= NOT_TAKEN
)
8466 data
->path_size
= 0;
8468 data
->path_size
= path_size
;
8470 /* End the current branch path. */
8471 data
->path
[path_size
].branch
= 0;
8474 /* Perform cse on the instructions of a function.
8475 F is the first instruction.
8476 NREGS is one plus the highest pseudo-reg number used in the instruction.
8478 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8479 (only if -frerun-cse-after-loop).
8481 Returns 1 if jump_optimize should be redone due to simplifications
8482 in conditional jump instructions. */
8485 cse_main (f
, nregs
, after_loop
, file
)
8491 struct cse_basic_block_data val
;
8492 register rtx insn
= f
;
8495 cse_jumps_altered
= 0;
8496 recorded_label_ref
= 0;
8497 constant_pool_entries_cost
= 0;
8501 init_alias_analysis ();
8505 max_insn_uid
= get_max_uid ();
8507 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8508 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8510 for (i
= 0; i
< nregs
; i
++)
8512 all_minus_one
[i
] = -1;
8516 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8517 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8518 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8519 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8520 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8522 #ifdef LOAD_EXTEND_OP
8524 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8525 and change the code and mode as appropriate. */
8526 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
8529 /* Discard all the free elements of the previous function
8530 since they are allocated in the temporarily obstack. */
8531 bzero ((char *) table
, sizeof table
);
8532 free_element_chain
= 0;
8533 n_elements_made
= 0;
8535 /* Find the largest uid. */
8537 max_uid
= get_max_uid ();
8538 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8539 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8541 /* Compute the mapping from uids to cuids.
8542 CUIDs are numbers assigned to insns, like uids,
8543 except that cuids increase monotonically through the code.
8544 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8545 between two insns is not affected by -g. */
8547 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8549 if (GET_CODE (insn
) != NOTE
8550 || NOTE_LINE_NUMBER (insn
) < 0)
8551 INSN_CUID (insn
) = ++i
;
8553 /* Give a line number note the same cuid as preceding insn. */
8554 INSN_CUID (insn
) = i
;
8557 /* Initialize which registers are clobbered by calls. */
8559 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8561 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8562 if ((call_used_regs
[i
]
8563 /* Used to check !fixed_regs[i] here, but that isn't safe;
8564 fixed regs are still call-clobbered, and sched can get
8565 confused if they can "live across calls".
8567 The frame pointer is always preserved across calls. The arg
8568 pointer is if it is fixed. The stack pointer usually is, unless
8569 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8570 will be present. If we are generating PIC code, the PIC offset
8571 table register is preserved across calls. */
8573 && i
!= STACK_POINTER_REGNUM
8574 && i
!= FRAME_POINTER_REGNUM
8575 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8576 && i
!= HARD_FRAME_POINTER_REGNUM
8578 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8579 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8581 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8582 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8586 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8588 /* Loop over basic blocks.
8589 Compute the maximum number of qty's needed for each basic block
8590 (which is 2 for each SET). */
8594 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8595 flag_cse_skip_blocks
);
8597 /* If this basic block was already processed or has no sets, skip it. */
8598 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8600 PUT_MODE (insn
, VOIDmode
);
8601 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8606 cse_basic_block_start
= val
.low_cuid
;
8607 cse_basic_block_end
= val
.high_cuid
;
8608 max_qty
= val
.nsets
* 2;
8611 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8612 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8615 /* Make MAX_QTY bigger to give us room to optimize
8616 past the end of this basic block, if that should prove useful. */
8622 /* If this basic block is being extended by following certain jumps,
8623 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8624 Otherwise, we start after this basic block. */
8625 if (val
.path_size
> 0)
8626 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8629 int old_cse_jumps_altered
= cse_jumps_altered
;
8632 /* When cse changes a conditional jump to an unconditional
8633 jump, we want to reprocess the block, since it will give
8634 us a new branch path to investigate. */
8635 cse_jumps_altered
= 0;
8636 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8637 if (cse_jumps_altered
== 0
8638 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8641 cse_jumps_altered
|= old_cse_jumps_altered
;
8649 /* Tell refers_to_mem_p that qty_const info is not available. */
8652 if (max_elements_made
< n_elements_made
)
8653 max_elements_made
= n_elements_made
;
8655 return cse_jumps_altered
|| recorded_label_ref
;
8658 /* Process a single basic block. FROM and TO and the limits of the basic
8659 block. NEXT_BRANCH points to the branch path when following jumps or
8660 a null path when not following jumps.
8662 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8663 loop. This is true when we are being called for the last time on a
8664 block and this CSE pass is before loop.c. */
8667 cse_basic_block (from
, to
, next_branch
, around_loop
)
8668 register rtx from
, to
;
8669 struct branch_path
*next_branch
;
8674 rtx libcall_insn
= NULL_RTX
;
8677 /* Each of these arrays is undefined before max_reg, so only allocate
8678 the space actually needed and adjust the start below. */
8680 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8681 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8682 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8683 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8684 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8686 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8687 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8688 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8690 qty_first_reg
-= max_reg
;
8691 qty_last_reg
-= max_reg
;
8692 qty_mode
-= max_reg
;
8693 qty_const
-= max_reg
;
8694 qty_const_insn
-= max_reg
;
8695 qty_comparison_code
-= max_reg
;
8696 qty_comparison_qty
-= max_reg
;
8697 qty_comparison_const
-= max_reg
;
8701 /* TO might be a label. If so, protect it from being deleted. */
8702 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8705 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8707 register enum rtx_code code
= GET_CODE (insn
);
8709 struct table_elt
*p
, *next
;
8711 /* If we have processed 1,000 insns, flush the hash table to
8712 avoid extreme quadratic behavior. We must not include NOTEs
8713 in the count since there may be more or them when generating
8714 debugging information. If we clear the table at different
8715 times, code generated with -g -O might be different than code
8716 generated with -O but not -g.
8718 ??? This is a real kludge and needs to be done some other way.
8720 if (code
!= NOTE
&& num_insns
++ > 1000)
8722 for (i
= 0; i
< NBUCKETS
; i
++)
8723 for (p
= table
[i
]; p
; p
= next
)
8725 next
= p
->next_same_hash
;
8727 if (GET_CODE (p
->exp
) == REG
)
8728 invalidate (p
->exp
, p
->mode
);
8730 remove_from_table (p
, i
);
8736 /* See if this is a branch that is part of the path. If so, and it is
8737 to be taken, do so. */
8738 if (next_branch
->branch
== insn
)
8740 enum taken status
= next_branch
++->status
;
8741 if (status
!= NOT_TAKEN
)
8743 if (status
== TAKEN
)
8744 record_jump_equiv (insn
, 1);
8746 invalidate_skipped_block (NEXT_INSN (insn
));
8748 /* Set the last insn as the jump insn; it doesn't affect cc0.
8749 Then follow this branch. */
8754 insn
= JUMP_LABEL (insn
);
8759 if (GET_MODE (insn
) == QImode
)
8760 PUT_MODE (insn
, VOIDmode
);
8762 if (GET_RTX_CLASS (code
) == 'i')
8766 /* Process notes first so we have all notes in canonical forms when
8767 looking for duplicate operations. */
8769 if (REG_NOTES (insn
))
8770 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8772 /* Track when we are inside in LIBCALL block. Inside such a block,
8773 we do not want to record destinations. The last insn of a
8774 LIBCALL block is not considered to be part of the block, since
8775 its destination is the result of the block and hence should be
8778 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
8779 libcall_insn
= XEXP (p
, 0);
8780 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8781 libcall_insn
= NULL_RTX
;
8783 cse_insn (insn
, libcall_insn
);
8786 /* If INSN is now an unconditional jump, skip to the end of our
8787 basic block by pretending that we just did the last insn in the
8788 basic block. If we are jumping to the end of our block, show
8789 that we can have one usage of TO. */
8791 if (simplejump_p (insn
))
8796 if (JUMP_LABEL (insn
) == to
)
8799 /* Maybe TO was deleted because the jump is unconditional.
8800 If so, there is nothing left in this basic block. */
8801 /* ??? Perhaps it would be smarter to set TO
8802 to whatever follows this insn,
8803 and pretend the basic block had always ended here. */
8804 if (INSN_DELETED_P (to
))
8807 insn
= PREV_INSN (to
);
8810 /* See if it is ok to keep on going past the label
8811 which used to end our basic block. Remember that we incremented
8812 the count of that label, so we decrement it here. If we made
8813 a jump unconditional, TO_USAGE will be one; in that case, we don't
8814 want to count the use in that jump. */
8816 if (to
!= 0 && NEXT_INSN (insn
) == to
8817 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8819 struct cse_basic_block_data val
;
8822 insn
= NEXT_INSN (to
);
8824 if (LABEL_NUSES (to
) == 0)
8825 insn
= delete_insn (to
);
8827 /* If TO was the last insn in the function, we are done. */
8831 /* If TO was preceded by a BARRIER we are done with this block
8832 because it has no continuation. */
8833 prev
= prev_nonnote_insn (to
);
8834 if (prev
&& GET_CODE (prev
) == BARRIER
)
8837 /* Find the end of the following block. Note that we won't be
8838 following branches in this case. */
8841 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8843 /* If the tables we allocated have enough space left
8844 to handle all the SETs in the next basic block,
8845 continue through it. Otherwise, return,
8846 and that block will be scanned individually. */
8847 if (val
.nsets
* 2 + next_qty
> max_qty
)
8850 cse_basic_block_start
= val
.low_cuid
;
8851 cse_basic_block_end
= val
.high_cuid
;
8854 /* Prevent TO from being deleted if it is a label. */
8855 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8858 /* Back up so we process the first insn in the extension. */
8859 insn
= PREV_INSN (insn
);
8863 if (next_qty
> max_qty
)
8866 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8867 the previous insn is the only insn that branches to the head of a loop,
8868 we can cse into the loop. Don't do this if we changed the jump
8869 structure of a loop unless we aren't going to be following jumps. */
8871 if ((cse_jumps_altered
== 0
8872 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8873 && around_loop
&& to
!= 0
8874 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8875 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8876 && JUMP_LABEL (PREV_INSN (to
)) != 0
8877 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8878 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8880 return to
? NEXT_INSN (to
) : 0;
8883 /* Count the number of times registers are used (not set) in X.
8884 COUNTS is an array in which we accumulate the count, INCR is how much
8885 we count each register usage.
8887 Don't count a usage of DEST, which is the SET_DEST of a SET which
8888 contains X in its SET_SRC. This is because such a SET does not
8889 modify the liveness of DEST. */
8892 count_reg_usage (x
, counts
, dest
, incr
)
8905 switch (code
= GET_CODE (x
))
8909 counts
[REGNO (x
)] += incr
;
8922 /* If we are clobbering a MEM, mark any registers inside the address
8924 if (GET_CODE (XEXP (x
, 0)) == MEM
)
8925 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
8929 /* Unless we are setting a REG, count everything in SET_DEST. */
8930 if (GET_CODE (SET_DEST (x
)) != REG
)
8931 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8933 /* If SRC has side-effects, then we can't delete this insn, so the
8934 usage of SET_DEST inside SRC counts.
8936 ??? Strictly-speaking, we might be preserving this insn
8937 because some other SET has side-effects, but that's hard
8938 to do and can't happen now. */
8939 count_reg_usage (SET_SRC (x
), counts
,
8940 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8945 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8947 /* ... falls through ... */
8950 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8952 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8955 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8960 if (REG_NOTE_KIND (x
) == REG_EQUAL
8961 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
))
8962 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8963 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8970 fmt
= GET_RTX_FORMAT (code
);
8971 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8974 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8975 else if (fmt
[i
] == 'E')
8976 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8977 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8981 /* Scan all the insns and delete any that are dead; i.e., they store a register
8982 that is never used or they copy a register to itself.
8984 This is used to remove insns made obviously dead by cse, loop or other
8985 optimizations. It improves the heuristics in loop since it won't try to
8986 move dead invariants out of loops or make givs for dead quantities. The
8987 remaining passes of the compilation are also sped up. */
8990 delete_trivially_dead_insns (insns
, nreg
)
8994 int *counts
= (int *) alloca (nreg
* sizeof (int));
9000 int in_libcall
= 0, dead_libcall
= 0;
9002 /* First count the number of times each register is used. */
9003 bzero ((char *) counts
, sizeof (int) * nreg
);
9004 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
9005 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
9007 /* Go from the last insn to the first and delete insns that only set unused
9008 registers or copy a register to itself. As we delete an insn, remove
9009 usage counts for registers it uses. */
9010 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
9015 prev
= prev_real_insn (insn
);
9017 /* Don't delete any insns that are part of a libcall block unless
9018 we can delete the whole libcall block.
9020 Flow or loop might get confused if we did that. Remember
9021 that we are scanning backwards. */
9022 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
9028 /* See if there's a REG_EQUAL note on this insn and try to
9029 replace the source with the REG_EQUAL expression.
9031 We assume that insns with REG_RETVALs can only be reg->reg
9032 copies at this point. */
9033 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
9036 rtx set
= single_set (insn
);
9038 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
9041 find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
9046 else if (in_libcall
)
9047 live_insn
= ! dead_libcall
;
9048 else if (GET_CODE (PATTERN (insn
)) == SET
)
9050 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
9051 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
9055 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
9056 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
9057 && ((tem
= next_nonnote_insn (insn
)) == 0
9058 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
9059 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
9062 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
9063 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
9064 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
9065 || side_effects_p (SET_SRC (PATTERN (insn
))))
9068 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
9069 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
9071 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
9073 if (GET_CODE (elt
) == SET
)
9075 if (GET_CODE (SET_DEST (elt
)) == REG
9076 && SET_DEST (elt
) == SET_SRC (elt
))
9080 else if (GET_CODE (SET_DEST (elt
)) == CC0
9081 && ! side_effects_p (SET_SRC (elt
))
9082 && ((tem
= next_nonnote_insn (insn
)) == 0
9083 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
9084 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
9087 else if (GET_CODE (SET_DEST (elt
)) != REG
9088 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
9089 || counts
[REGNO (SET_DEST (elt
))] != 0
9090 || side_effects_p (SET_SRC (elt
)))
9093 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
9099 /* If this is a dead insn, delete it and show registers in it aren't
9104 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
9108 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))