1 /* Dummy data flow analysis for GNU compiler in nonoptimizing mode.
2 Copyright (C) 1987, 91, 94-96, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file performs stupid register allocation, which is used
23 when cc1 gets the -noreg switch (which is when cc does not get -O).
25 Stupid register allocation goes in place of the flow_analysis,
26 local_alloc and global_alloc passes. combine_instructions cannot
27 be done with stupid allocation because the data flow info that it needs
30 In stupid allocation, the only user-defined variables that can
31 go in registers are those declared "register". They are assumed
32 to have a life span equal to their scope. Other user variables
33 are given stack slots in the rtl-generation pass and are not
34 represented as pseudo regs. A compiler-generated temporary
35 is assumed to live from its first mention to its last mention.
37 Since each pseudo-reg's life span is just an interval, it can be
38 represented as a pair of numbers, each of which identifies an insn by
39 its position in the function (number of insns before it). The first
40 thing done for stupid allocation is to compute such a number for each
41 insn. It is called the suid. Then the life-interval of each
42 pseudo reg is computed. Then the pseudo regs are ordered by priority
43 and assigned hard regs in priority order. */
49 #include "hard-reg-set.h"
50 #include "basic-block.h"
53 #include "insn-config.h"
58 /* Vector mapping INSN_UIDs to suids.
59 The suids are like uids but increase monotonically always.
60 We use them to see whether a subroutine call came
61 between a variable's birth and its death. */
65 /* Get the suid of an insn. */
67 #define INSN_SUID(INSN) (uid_suid[INSN_UID (INSN)])
69 /* Record the suid of the last CALL_INSN
70 so we can tell whether a pseudo reg crosses any calls. */
72 static int last_call_suid
;
74 /* Record the suid of the last NOTE_INSN_SETJMP
75 so we can tell whether a pseudo reg crosses any setjmp. */
77 static int last_setjmp_suid
;
79 /* Element N is suid of insn where life span of pseudo reg N ends.
80 Element is 0 if register N has not been seen yet on backward scan. */
82 static int *reg_where_dead
;
84 /* Likewise, but point to the insn_chain structure of the insn at which
86 static struct insn_chain
**reg_where_dead_chain
;
88 /* Element N is suid of insn where life span of pseudo reg N begins. */
89 static int *reg_where_born_exact
;
91 /* Element N is 1 if the birth of pseudo reg N is due to a CLOBBER,
93 static int *reg_where_born_clobber
;
95 /* Return the suid of the insn where the register is born, or the suid
96 of the insn before if the birth is due to a CLOBBER. */
97 #define REG_WHERE_BORN(N) \
98 (reg_where_born_exact[(N)] - reg_where_born_clobber[(N)])
100 /* Numbers of pseudo-regs to be allocated, highest priority first. */
102 static int *reg_order
;
104 /* Indexed by reg number (hard or pseudo), nonzero if register is live
105 at the current point in the instruction stream. */
107 static char *regs_live
;
109 /* Indexed by reg number, nonzero if reg was used in a SUBREG that changes
112 static char *regs_change_size
;
114 /* Indexed by reg number, nonzero if reg crosses a setjmp. */
116 static char *regs_crosses_setjmp
;
118 /* Indexed by insn's suid, the set of hard regs live after that insn. */
120 static HARD_REG_SET
*after_insn_hard_regs
;
122 /* Record that hard reg REGNO is live after insn INSN. */
124 #define MARK_LIVE_AFTER(INSN,REGNO) \
125 SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (INSN)], (REGNO))
127 static int stupid_reg_compare
PROTO((const PTR
,const PTR
));
128 static int stupid_find_reg
PROTO((int, enum reg_class
, enum machine_mode
,
130 static void stupid_mark_refs
PROTO((rtx
, struct insn_chain
*));
131 static void find_clobbered_regs
PROTO((rtx
, rtx
));
133 /* For communication between stupid_life_analysis and find_clobbered_regs. */
134 static struct insn_chain
*current_chain
;
136 /* This function, called via note_stores, marks any hard registers that are
137 clobbered in an insn as being live in the live_after and live_before fields
138 of the appropriate insn_chain structure. */
141 find_clobbered_regs (reg
, setter
)
145 if (setter
== 0 || GET_CODE (setter
) != CLOBBER
)
148 if (GET_CODE (reg
) == SUBREG
)
149 reg
= SUBREG_REG (reg
);
151 if (GET_CODE (reg
) != REG
)
154 if (regno
>= FIRST_PSEUDO_REGISTER
)
157 if (GET_MODE (reg
) == VOIDmode
)
160 nregs
= HARD_REGNO_NREGS (regno
, GET_MODE (reg
));
163 SET_REGNO_REG_SET (current_chain
->live_after
, regno
);
164 SET_REGNO_REG_SET (current_chain
->live_before
, regno
++);
168 /* Stupid life analysis is for the case where only variables declared
169 `register' go in registers. For this case, we mark all
170 pseudo-registers that belong to register variables as
171 dying in the last instruction of the function, and all other
172 pseudo registers as dying in the last place they are referenced.
173 Hard registers are marked as dying in the last reference before
174 the end or before each store into them. */
177 stupid_life_analysis (f
, nregs
, file
)
183 register rtx last
, insn
;
184 int max_uid
, max_suid
;
186 current_function_has_computed_jump
= 0;
188 bzero (regs_ever_live
, sizeof regs_ever_live
);
190 regs_live
= (char *) xmalloc (nregs
);
192 /* First find the last real insn, and count the number of insns,
193 and assign insns their suids. */
195 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
196 if (INSN_UID (insn
) > i
)
200 uid_suid
= (int *) xmalloc ((i
+ 1) * sizeof (int));
202 /* Compute the mapping from uids to suids.
203 Suids are numbers assigned to insns, like uids,
204 except that suids increase monotonically through the code. */
206 last
= 0; /* In case of empty function body */
207 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
209 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
212 INSN_SUID (insn
) = ++i
;
215 last_call_suid
= i
+ 1;
216 last_setjmp_suid
= i
+ 1;
221 /* Allocate tables to record info about regs. */
223 reg_where_dead
= (int *) xcalloc (nregs
, sizeof (int));
224 reg_where_born_exact
= (int *) xcalloc (nregs
, sizeof (int));
225 reg_where_born_clobber
= (int *) xcalloc (nregs
, sizeof (int));
226 reg_where_dead_chain
= (struct insn_chain
**)
227 xcalloc (nregs
, sizeof (struct insn_chain
*));
228 reg_order
= (int *) xcalloc (nregs
, sizeof (int));
229 regs_change_size
= (char *) xcalloc (nregs
, sizeof (char));
230 regs_crosses_setjmp
= (char *) xcalloc (nregs
, sizeof (char));
232 /* Allocate the reg_renumber array */
233 allocate_reg_info (max_regno
, FALSE
, TRUE
);
234 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
237 after_insn_hard_regs
=
238 (HARD_REG_SET
*) xcalloc (max_suid
, sizeof (HARD_REG_SET
));
240 /* Allocate and zero out many data structures
241 that will record the data from lifetime analysis. */
243 allocate_reg_life_data ();
244 allocate_bb_life_data ();
246 for (i
= 0; i
< max_regno
; i
++)
247 REG_N_DEATHS (i
) = 1;
249 bzero (regs_live
, nregs
);
251 /* Find where each pseudo register is born and dies,
252 by scanning all insns from the end to the start
253 and noting all mentions of the registers.
255 Also find where each hard register is live
256 and record that info in after_insn_hard_regs.
257 regs_live[I] is 1 if hard reg I is live
258 at the current point in the scan.
260 Build reload_insn_chain while we're walking the insns. */
262 reload_insn_chain
= 0;
263 for (insn
= last
; insn
; insn
= PREV_INSN (insn
))
265 register HARD_REG_SET
*p
= after_insn_hard_regs
+ INSN_SUID (insn
);
266 struct insn_chain
*chain
;
268 /* Copy the info in regs_live into the element of after_insn_hard_regs
269 for the current position in the rtl code. */
271 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
273 SET_HARD_REG_BIT (*p
, i
);
275 if (GET_CODE (insn
) != NOTE
&& GET_CODE (insn
) != BARRIER
)
277 chain
= new_insn_chain ();
278 if (reload_insn_chain
)
279 reload_insn_chain
->prev
= chain
;
280 chain
->next
= reload_insn_chain
;
282 reload_insn_chain
= chain
;
285 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
287 SET_REGNO_REG_SET (chain
->live_before
, i
);
290 /* Update which hard regs are currently live
291 and also the birth and death suids of pseudo regs
292 based on the pattern of this insn. */
294 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
295 stupid_mark_refs (PATTERN (insn
), chain
);
297 if (GET_CODE (insn
) == NOTE
298 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_SETJMP
)
299 last_setjmp_suid
= INSN_SUID (insn
);
301 /* Mark all call-clobbered regs as dead after each call insn so that
302 a pseudo whose life span includes this insn will not go in one of
303 them. If the function contains a non-local goto, mark all hard
304 registers dead (except for stack related bits).
306 Then mark those regs as all dead for the continuing scan
307 of the insns before the call. */
309 if (GET_CODE (insn
) == CALL_INSN
)
311 last_call_suid
= INSN_SUID (insn
);
313 if (current_function_has_nonlocal_label
)
315 IOR_COMPL_HARD_REG_SET (after_insn_hard_regs
[last_call_suid
],
317 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
323 IOR_HARD_REG_SET (after_insn_hard_regs
[last_call_suid
],
325 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
326 if (call_used_regs
[i
])
330 /* It is important that this be done after processing the insn's
331 pattern because we want the function result register to still
332 be live if it's also used to pass arguments. */
333 stupid_mark_refs (CALL_INSN_FUNCTION_USAGE (insn
), chain
);
336 if (GET_CODE (insn
) != NOTE
&& GET_CODE (insn
) != BARRIER
)
338 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
340 SET_REGNO_REG_SET (chain
->live_after
, i
);
342 /* The regs_live array doesn't say anything about hard registers
343 clobbered by this insn. So we need an extra pass over the
345 current_chain
= chain
;
346 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
347 note_stores (PATTERN (insn
), find_clobbered_regs
);
350 if (GET_CODE (insn
) == JUMP_INSN
&& computed_jump_p (insn
))
351 current_function_has_computed_jump
= 1;
354 /* Now decide the order in which to allocate the pseudo registers. */
356 for (i
= LAST_VIRTUAL_REGISTER
+ 1; i
< max_regno
; i
++)
359 qsort (®_order
[LAST_VIRTUAL_REGISTER
+ 1],
360 max_regno
- LAST_VIRTUAL_REGISTER
- 1, sizeof (int),
363 /* Now, in that order, try to find hard registers for those pseudo regs. */
365 for (i
= LAST_VIRTUAL_REGISTER
+ 1; i
< max_regno
; i
++)
367 register int r
= reg_order
[i
];
369 /* Some regnos disappear from the rtl. Ignore them to avoid crash.
370 Also don't allocate registers that cross a setjmp, or live across
371 a call if this function receives a nonlocal goto.
372 Also ignore registers we didn't see during the scan. */
373 if (regno_reg_rtx
[r
] == 0 || regs_crosses_setjmp
[r
]
374 || (reg_where_born_exact
[r
] == 0 && reg_where_dead
[r
] == 0)
375 || (REG_N_CALLS_CROSSED (r
) > 0
376 && current_function_has_nonlocal_label
))
379 /* Now find the best hard-register class for this pseudo register */
380 if (N_REG_CLASSES
> 1)
381 reg_renumber
[r
] = stupid_find_reg (REG_N_CALLS_CROSSED (r
),
382 reg_preferred_class (r
),
383 PSEUDO_REGNO_MODE (r
),
386 regs_change_size
[r
]);
388 /* If no reg available in that class, try alternate class. */
389 if (reg_renumber
[r
] == -1 && reg_alternate_class (r
) != NO_REGS
)
390 reg_renumber
[r
] = stupid_find_reg (REG_N_CALLS_CROSSED (r
),
391 reg_alternate_class (r
),
392 PSEUDO_REGNO_MODE (r
),
395 regs_change_size
[r
]);
398 /* Fill in the pseudo reg life information into the insn chain. */
399 for (i
= LAST_VIRTUAL_REGISTER
+ 1; i
< max_regno
; i
++)
401 struct insn_chain
*chain
;
404 regno
= reg_renumber
[i
];
408 chain
= reg_where_dead_chain
[i
];
409 if (reg_where_dead
[i
] > INSN_SUID (chain
->insn
))
410 SET_REGNO_REG_SET (chain
->live_after
, i
);
412 while (INSN_SUID (chain
->insn
) > reg_where_born_exact
[i
])
414 SET_REGNO_REG_SET (chain
->live_before
, i
);
418 SET_REGNO_REG_SET (chain
->live_after
, i
);
421 if (INSN_SUID (chain
->insn
) == reg_where_born_exact
[i
]
422 && reg_where_born_clobber
[i
])
423 SET_REGNO_REG_SET (chain
->live_before
, i
);
427 dump_flow_info (file
);
431 free (reg_where_dead
);
432 free (reg_where_born_exact
);
433 free (reg_where_born_clobber
);
434 free (reg_where_dead_chain
);
436 free (regs_change_size
);
437 free (regs_crosses_setjmp
);
438 free (after_insn_hard_regs
);
441 /* Comparison function for qsort.
442 Returns -1 (1) if register *R1P is higher priority than *R2P. */
445 stupid_reg_compare (r1p
, r2p
)
449 register int r1
= *(int *)r1p
, r2
= *(int *)r2p
;
450 register int len1
= reg_where_dead
[r1
] - REG_WHERE_BORN (r1
);
451 register int len2
= reg_where_dead
[r2
] - REG_WHERE_BORN (r2
);
458 tem
= REG_N_REFS (r1
) - REG_N_REFS (r2
);
462 /* If regs are equally good, sort by regno,
463 so that the results of qsort leave nothing to chance. */
467 /* Find a block of SIZE words of hard registers in reg_class CLASS
468 that can hold a value of machine-mode MODE
469 (but actually we test only the first of the block for holding MODE)
470 currently free from after insn whose suid is BORN_INSN
471 through the insn whose suid is DEAD_INSN,
472 and return the number of the first of them.
473 Return -1 if such a block cannot be found.
475 If CALL_PRESERVED is nonzero, insist on registers preserved
476 over subroutine calls, and return -1 if cannot find such.
478 If CHANGES_SIZE is nonzero, it means this register was used as the
479 operand of a SUBREG that changes its size. */
482 stupid_find_reg (call_preserved
, class, mode
,
483 born_insn
, dead_insn
, changes_size
)
485 enum reg_class
class;
486 enum machine_mode mode
;
487 int born_insn
, dead_insn
;
488 int changes_size ATTRIBUTE_UNUSED
;
492 register /* Declare them register if they are scalars. */
494 HARD_REG_SET used
, this_reg
;
495 #ifdef ELIMINABLE_REGS
496 static struct {int from
, to
; } eliminables
[] = ELIMINABLE_REGS
;
499 /* If this register's life is more than 5,000 insns, we probably
500 can't allocate it, so don't waste the time trying. This avoids
501 quadratic behavior on programs that have regularly-occurring
503 if (dead_insn
> born_insn
+ 5000)
506 COPY_HARD_REG_SET (used
,
507 call_preserved
? call_used_reg_set
: fixed_reg_set
);
509 #ifdef ELIMINABLE_REGS
510 for (i
= 0; i
< (int)(sizeof eliminables
/ sizeof eliminables
[0]); i
++)
511 SET_HARD_REG_BIT (used
, eliminables
[i
].from
);
512 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
513 SET_HARD_REG_BIT (used
, HARD_FRAME_POINTER_REGNUM
);
516 SET_HARD_REG_BIT (used
, FRAME_POINTER_REGNUM
);
519 for (ins
= born_insn
; ins
< dead_insn
; ins
++)
520 IOR_HARD_REG_SET (used
, after_insn_hard_regs
[ins
]);
523 if (current_function_has_computed_jump
)
524 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
525 SET_HARD_REG_BIT (used
, i
);
528 IOR_COMPL_HARD_REG_SET (used
, reg_class_contents
[(int) class]);
530 #ifdef CLASS_CANNOT_CHANGE_SIZE
532 IOR_HARD_REG_SET (used
,
533 reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
]);
536 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
538 #ifdef REG_ALLOC_ORDER
539 int regno
= reg_alloc_order
[i
];
544 /* If a register has screwy overlap problems,
545 don't use it at all if not optimizing.
546 Actually this is only for the 387 stack register,
547 and it's because subsequent code won't work. */
548 #ifdef OVERLAPPING_REGNO_P
549 if (OVERLAPPING_REGNO_P (regno
))
553 if (! TEST_HARD_REG_BIT (used
, regno
)
554 && HARD_REGNO_MODE_OK (regno
, mode
))
557 register int size1
= HARD_REGNO_NREGS (regno
, mode
);
558 for (j
= 1; j
< size1
&& ! TEST_HARD_REG_BIT (used
, regno
+ j
); j
++);
561 CLEAR_HARD_REG_SET (this_reg
);
563 SET_HARD_REG_BIT (this_reg
, regno
+ j
);
564 for (ins
= born_insn
; ins
< dead_insn
; ins
++)
566 IOR_HARD_REG_SET (after_insn_hard_regs
[ins
], this_reg
);
570 #ifndef REG_ALLOC_ORDER
571 i
+= j
; /* Skip starting points we know will lose */
579 /* Walk X, noting all assignments and references to registers
580 and recording what they imply about life spans.
581 INSN is the current insn, supplied so we can find its suid. */
584 stupid_mark_refs (x
, chain
)
586 struct insn_chain
*chain
;
588 register RTX_CODE code
;
589 register const char *fmt
;
590 register int regno
, i
;
591 rtx insn
= chain
->insn
;
598 if (code
== SET
|| code
== CLOBBER
)
600 if (SET_DEST (x
) != 0
601 && (GET_CODE (SET_DEST (x
)) == REG
602 || (GET_CODE (SET_DEST (x
)) == SUBREG
603 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
604 && (REGNO (SUBREG_REG (SET_DEST (x
)))
605 >= FIRST_PSEUDO_REGISTER
))))
607 /* Register is being assigned. */
608 /* If setting a SUBREG, we treat the entire reg as being set. */
609 if (GET_CODE (SET_DEST (x
)) == SUBREG
)
610 regno
= REGNO (SUBREG_REG (SET_DEST (x
)));
612 regno
= REGNO (SET_DEST (x
));
614 /* For hard regs, update the where-live info. */
615 if (regno
< FIRST_PSEUDO_REGISTER
)
618 = HARD_REGNO_NREGS (regno
, GET_MODE (SET_DEST (x
)));
622 regs_ever_live
[regno
+j
] = 1;
623 regs_live
[regno
+j
] = 0;
625 /* The following line is for unused outputs;
626 they do get stored even though never used again. */
627 MARK_LIVE_AFTER (insn
, regno
+j
);
629 /* When a hard reg is clobbered, mark it in use
630 just before this insn, so it is live all through. */
631 if (code
== CLOBBER
&& INSN_SUID (insn
) > 0)
632 SET_HARD_REG_BIT (after_insn_hard_regs
[INSN_SUID (insn
) - 1],
636 /* For pseudo regs, record where born, where dead, number of
637 times used, and whether live across a call. */
640 /* Update the life-interval bounds of this pseudo reg. */
642 /* When a pseudo-reg is CLOBBERed, it is born just before
643 the clobbering insn. When setting, just after. */
644 int where_born
= INSN_SUID (insn
) - (code
== CLOBBER
);
646 reg_where_born_exact
[regno
] = INSN_SUID (insn
);
647 reg_where_born_clobber
[regno
] = (code
== CLOBBER
);
649 if (reg_where_dead_chain
[regno
] == 0)
650 reg_where_dead_chain
[regno
] = chain
;
652 /* The reg must live at least one insn even
653 in it is never again used--because it has to go
654 in SOME hard reg. Mark it as dying after the current
655 insn so that it will conflict with any other outputs of
657 if (reg_where_dead
[regno
] < where_born
+ 2)
659 reg_where_dead
[regno
] = where_born
+ 2;
660 regs_live
[regno
] = 1;
663 /* Count the refs of this reg. */
664 REG_N_REFS (regno
)++;
666 if (last_call_suid
< reg_where_dead
[regno
])
667 REG_N_CALLS_CROSSED (regno
) += 1;
669 if (last_setjmp_suid
< reg_where_dead
[regno
])
670 regs_crosses_setjmp
[regno
] = 1;
672 /* If this register is clobbered or it is only used in
673 this insn and is only set, mark it unused. We have
674 to do this even when not optimizing so that MD patterns
675 which count on this behavior (e.g., it not causing an
676 output reload on an insn setting CC) will operate
678 if (GET_CODE (SET_DEST (x
)) == REG
680 || (REGNO_FIRST_UID (regno
) == INSN_UID (insn
)
681 && REGNO_LAST_UID (regno
) == INSN_UID (insn
)
682 && ! reg_mentioned_p (SET_DEST (x
),
684 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_UNUSED
,
690 /* Record references from the value being set,
691 or from addresses in the place being set if that's not a reg.
692 If setting a SUBREG, we treat the entire reg as *used*. */
695 stupid_mark_refs (SET_SRC (x
), chain
);
696 if (GET_CODE (SET_DEST (x
)) != REG
)
697 stupid_mark_refs (SET_DEST (x
), chain
);
702 else if (code
== SUBREG
703 && GET_CODE (SUBREG_REG (x
)) == REG
704 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
705 && (GET_MODE_SIZE (GET_MODE (x
))
706 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
707 && (INTEGRAL_MODE_P (GET_MODE (x
))
708 || INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x
)))))
709 regs_change_size
[REGNO (SUBREG_REG (x
))] = 1;
711 /* Register value being used, not set. */
713 else if (code
== REG
)
716 if (regno
< FIRST_PSEUDO_REGISTER
)
718 /* Hard reg: mark it live for continuing scan of previous insns. */
719 register int j
= HARD_REGNO_NREGS (regno
, GET_MODE (x
));
722 regs_ever_live
[regno
+j
] = 1;
723 regs_live
[regno
+j
] = 1;
728 /* Pseudo reg: record first use, last use and number of uses. */
730 reg_where_born_exact
[regno
] = INSN_SUID (insn
);
731 reg_where_born_clobber
[regno
] = 0;
732 REG_N_REFS (regno
)++;
733 if (regs_live
[regno
] == 0)
735 regs_live
[regno
] = 1;
736 reg_where_dead
[regno
] = INSN_SUID (insn
);
737 reg_where_dead_chain
[regno
] = chain
;
743 /* Recursive scan of all other rtx's. */
745 fmt
= GET_RTX_FORMAT (code
);
746 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
749 stupid_mark_refs (XEXP (x
, i
), chain
);
753 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
754 stupid_mark_refs (XVECEXP (x
, i
, j
), chain
);