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2002-05-09 Hassan Aurag <aurag@cae.com>
[official-gcc.git] / gcc / config / i370 / i370.h
blobadcaca675d78b329d6d0df0acd4cb46025c78185
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* The sizes of the code and literals on the current page. */
32
33 extern int mvs_page_code, mvs_page_lit;
34
35 /* The current page number and the base page number for the function. */
36
37 extern int mvs_page_num, function_base_page;
38
39 /* The name of the current function. */
40
41 extern char *mvs_function_name;
42
43 /* The length of the function name malloc'd area. */
44
45 extern int mvs_function_name_length;
46
47 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
48 these are more than twice as fast as load-op-store.
49 On 3090 don't use this since load-op-store is much faster. */
50
51 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
52
53 /* Default target switches */
54
55 #define TARGET_DEFAULT 1
56
57 /* Macro to define tables used to set the flags. This is a list in braces
58 of pairs in braces, each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
61
62 #define TARGET_SWITCHES \
63 { { "char-instructions", 1, N_("Generate char instructions")}, \
64 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
65 { "", TARGET_DEFAULT, 0} }
66
67 /* To use IBM supplied macro function prologue and epilogue, define the
68 following to 1. Should only be needed if IBM changes the definition
69 of their prologue and epilogue. */
70
71 #define MACROPROLOGUE 0
72 #define MACROEPILOGUE 0
73
74 /* Target machine storage layout */
75
76 /* Define this if most significant bit is lowest numbered in instructions
77 that operate on numbered bit-fields. */
78
79 #define BITS_BIG_ENDIAN 1
80
81 /* Define this if most significant byte of a word is the lowest numbered. */
82
83 #define BYTES_BIG_ENDIAN 1
84
85 /* Define this if MS word of a multiword is the lowest numbered. */
86
87 #define WORDS_BIG_ENDIAN 1
88
89 /* Width of a word, in units (bytes). */
90
91 #define UNITS_PER_WORD 4
92
93 /* Allocation boundary (in *bits*) for storing pointers in memory. */
94
95 #define POINTER_BOUNDARY 32
96
97 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
98
99 #define PARM_BOUNDARY 32
100
101 /* Boundary (in *bits*) on which stack pointer should be aligned. */
102
103 #define STACK_BOUNDARY 32
104
105 /* Allocation boundary (in *bits*) for the code of a function. */
106
107 #define FUNCTION_BOUNDARY 32
108
109 /* There is no point aligning anything to a rounder boundary than this. */
110
111 #define BIGGEST_ALIGNMENT 64
112
113 /* Alignment of field after `int : 0' in a structure. */
114
115 #define EMPTY_FIELD_BOUNDARY 32
116
117 /* Define this if move instructions will actually fail to work when given
118 unaligned data. */
119
120 #define STRICT_ALIGNMENT 0
121
122 /* Define target floating point format. */
123
124 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
125
126 /* Define character mapping for cross-compiling. */
127 /* but only define it if really needed, since otherwise it will break builds */
128
129 #ifdef TARGET_EBCDIC
130 #ifdef HOST_EBCDIC
131 #define MAP_CHARACTER(c) ((char)(c))
132 #else
133 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
134 #endif
135 #endif
136
137 #ifdef TARGET_HLASM
138 /* HLASM requires #pragma map. */
139 #define REGISTER_TARGET_PRAGMAS(PFILE) \
140 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
141 #endif /* TARGET_HLASM */
142
143 /* Define maximum length of page minus page escape overhead. */
144
145 #define MAX_MVS_PAGE_LENGTH 4080
146
147 /* Define special register allocation order desired.
148 Don't fiddle with this. I did, and I got all sorts of register
149 spill errors when compiling even relatively simple programs...
150 I have no clue why ...
151 E.g. this one is bad:
152 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
153 */
154
155 #define REG_ALLOC_ORDER \
156 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
157
158 /* Standard register usage. */
159
160 /* Number of actual hardware registers. The hardware registers are
161 assigned numbers for the compiler from 0 to just below
162 FIRST_PSEUDO_REGISTER.
163 All registers that the compiler knows about must be given numbers,
164 even those that are not normally considered general registers.
165 For the 370, we give the data registers numbers 0-15,
166 and the floating point registers numbers 16-19. */
167
168 #define FIRST_PSEUDO_REGISTER 20
169
170 /* Define base and page registers. */
171
172 #define BASE_REGISTER 3
173 #define PAGE_REGISTER 4
174
175 #ifdef TARGET_HLASM
176 /* 1 for registers that have pervasive standard uses and are not available
177 for the register allocator. These are registers that must have fixed,
178 valid values stored in them for the entire length of the subroutine call,
179 and must not in any way be moved around, jiggered with, etc. That is,
180 they must never be clobbered, and, if clobbered, the register allocator
181 will never restore them back.
182
183 We use five registers in this special way:
184 -- R3 which is used as the base register
185 -- R4 the page origin table pointer used to load R3,
186 -- R11 the arg pointer.
187 -- R12 the TCA pointer
188 -- R13 the stack (DSA) pointer
189
190 A fifth register is also exceptional: R14 is used in many branch
191 instructions to hold the target of the branch. Technically, this
192 does not qualify R14 as a register with a long-term meaning; it should
193 be enough, theoretically, to note that these instructions clobber
194 R14, and let the compiler deal with that. In practice, however,
195 the "clobber" directive acts as a barrier to optimization, and the
196 optimizer appears to be unable to perform optimizations around branches.
197 Thus, a much better strategy appears to give R14 a pervasive use;
198 this eliminates it from the register pool witout hurting optimization.
199
200 There are other registers which have special meanings, but its OK
201 for them to get clobbered, since other allocator config below will
202 make sure that they always have the right value. These are for
203 example:
204 -- R1 the returned structure pointer.
205 -- R10 the static chain reg.
206 -- R15 holds the value a subroutine returns.
207
208 Notice that it is *almost* safe to mark R11 as available to the allocator.
209 By marking it as a call_used_register, in most cases, the compiler
210 can handle it being clobbered. However, there are a few rare
211 circumstances where the register allocator will allocate r11 and
212 also try to use it as the arg pointer ... thus it must be marked fixed.
213 I think this is a bug, but I can't track it down...
214 */
215
216 #define FIXED_REGISTERS \
217 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
218 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
219
220 /* 1 for registers not available across function calls. These must include
221 the FIXED_REGISTERS and also any registers that can be used without being
222 saved.
223 The latter must include the registers where values are returned
224 and the register where structure-value addresses are passed.
225 NOTE: all floating registers are undefined across calls.
226 */
227
228 #define CALL_USED_REGISTERS \
229 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
230 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
231
232 /* Return number of consecutive hard regs needed starting at reg REGNO
233 to hold something of mode MODE.
234 This is ordinarily the length in words of a value of mode MODE
235 but can be less for certain modes in special long registers.
236 Note that DCmode (complex double) needs two regs.
237 */
238 #endif /* TARGET_HLASM */
239
240 /* ================= */
241 #ifdef TARGET_ELF_ABI
242 /* The Linux/ELF ABI uses the same register layout as the
243 * the MVS/OE version, with the following exceptions:
244 * -- r12 (rtca) is not used.
245 */
246
247 #define FIXED_REGISTERS \
248 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
249 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
250
251 #define CALL_USED_REGISTERS \
252 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
253 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
254
255 #endif /* TARGET_ELF_ABI */
256 /* ================= */
257
258
259 #define HARD_REGNO_NREGS(REGNO, MODE) \
260 ((REGNO) > 15 ? \
261 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
262 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
263
264 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
265 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
266 even registers can hold DI. The floating point registers can hold
267 either SF, DF, SC or DC. */
268
269 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
270 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
271 (((MODE) != DImode) && ((MODE) != DFmode))) \
272 : ((MODE) == SFmode || (MODE) == DFmode) || \
273 (MODE) == SCmode || (MODE) == DCmode)
274
275 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
276 mode MODE1 and one has mode MODE2.
277 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
278 for any hard reg, then this must be 0 for correct output. */
279
280 #define MODES_TIEABLE_P(MODE1, MODE2) \
281 (((MODE1) == SFmode || (MODE1) == DFmode) \
282 == ((MODE2) == SFmode || (MODE2) == DFmode))
283
284 /* Mark external references. */
285
286 #define ENCODE_SECTION_INFO(decl, first) \
287 if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) \
288 SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1;
289
290 /* Specify the registers used for certain standard purposes.
291 The values of these macros are register numbers. */
292
293 /* 370 PC isn't overloaded on a register. */
294
295 /* #define PC_REGNUM */
296
297 /* Register to use for pushing function arguments. */
298
299 #define STACK_POINTER_REGNUM 13
300
301 /* Base register for access to local variables of the function. */
302
303 #define FRAME_POINTER_REGNUM 13
304
305 /* Value should be nonzero if functions must have frame pointers.
306 Zero means the frame pointer need not be set up (and parms may be
307 accessed via the stack pointer) in functions that seem suitable.
308 This is computed in `reload', in reload1.c. */
309
310 #define FRAME_POINTER_REQUIRED 1
311
312 /* Base register for access to arguments of the function. */
313
314 #define ARG_POINTER_REGNUM 11
315
316 /* R10 is register in which static-chain is passed to a function.
317 Static-chaining is done when a nested function references as a global
318 a stack variable of its parent: e.g.
319 int parent_func (int arg) {
320 int x; // x is in parents stack
321 void child_func (void) { x++: } // child references x as global var
322 ...
323 }
324 */
325
326 #define STATIC_CHAIN_REGNUM 10
327
328 /* R1 is register in which address to store a structure value is passed to
329 a function. This is used only when returning 64-bit long-long in a 32-bit arch
330 and when calling functions that return structs by value. e.g.
331 typedef struct A_s { int a,b,c; } A_t;
332 A_t fun_returns_value (void) {
333 A_t a; a.a=1; a.b=2 a.c=3;
334 return a;
335 }
336 In the above, the storage for the return value is in the callers stack, and
337 the R1 points at that mem location.
338 */
339
340 #define STRUCT_VALUE_REGNUM 1
341
342 /* Define the classes of registers for register constraints in the
343 machine description. Also define ranges of constants.
344
345 One of the classes must always be named ALL_REGS and include all hard regs.
346 If there is more than one class, another class must be named NO_REGS
347 and contain no registers.
348
349 The name GENERAL_REGS must be the name of a class (or an alias for
350 another name such as ALL_REGS). This is the class of registers
351 that is allowed by "g" or "r" in a register constraint.
352 Also, registers outside this class are allocated only when
353 instructions express preferences for them.
354
355 The classes must be numbered in nondecreasing order; that is,
356 a larger-numbered class must never be contained completely
357 in a smaller-numbered class.
358
359 For any two classes, it is very desirable that there be another
360 class that represents their union. */
361
362 enum reg_class
363 {
364 NO_REGS, ADDR_REGS, DATA_REGS,
365 FP_REGS, ALL_REGS, LIM_REG_CLASSES
366 };
367
368 #define GENERAL_REGS DATA_REGS
369 #define N_REG_CLASSES (int) LIM_REG_CLASSES
370
371 /* Give names of register classes as strings for dump file. */
372
373 #define REG_CLASS_NAMES \
374 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
375
376 /* Define which registers fit in which classes. This is an initializer for
377 a vector of HARD_REG_SET of length N_REG_CLASSES. */
378
379 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
380
381 /* The same information, inverted:
382 Return the class number of the smallest class containing
383 reg number REGNO. This could be a conditional expression
384 or could index an array. */
385
386 #define REGNO_REG_CLASS(REGNO) \
387 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
388
389 /* The class value for index registers, and the one for base regs. */
390
391 #define INDEX_REG_CLASS ADDR_REGS
392 #define BASE_REG_CLASS ADDR_REGS
393
394 /* Get reg_class from a letter such as appears in the machine description. */
395
396 #define REG_CLASS_FROM_LETTER(C) \
397 ((C) == 'a' ? ADDR_REGS : \
398 ((C) == 'd' ? DATA_REGS : \
399 ((C) == 'f' ? FP_REGS : NO_REGS)))
400
401 /* The letters I, J, K, L and M in a register constraint string can be used
402 to stand for particular ranges of immediate operands.
403 This macro defines what the ranges are.
404 C is the letter, and VALUE is a constant value.
405 Return 1 if VALUE is in the range specified by C. */
406
407 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
408 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
409 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
410 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
411
412 /* Similar, but for floating constants, and defining letters G and H.
413 Here VALUE is the CONST_DOUBLE rtx itself. */
414
415 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
416
417 /* see recog.c for details */
418 #define EXTRA_CONSTRAINT(OP,C) \
419 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
420 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
421
422 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
423 return the class of reg to actually use. In general this is just CLASS;
424 but on some machines in some cases it is preferable to use a more
425 restrictive class.
426
427 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
428 rare occasions when lots of egisters are spilled, reload() will try
429 to put a const int into r0 and then use r0 as an index register.
430 */
431
432 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
433 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
434 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
435 GET_CODE(X) == LABEL_REF || \
436 GET_CODE(X) == SYMBOL_REF || \
437 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
438
439 /* Return the maximum number of consecutive registers needed to represent
440 mode MODE in a register of class CLASS.
441 Note that DCmode (complex double) needs two regs.
442 */
443
444 #define CLASS_MAX_NREGS(CLASS, MODE) \
445 ((CLASS) == FP_REGS ? \
446 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
447 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
448
449 /* Stack layout; function entry, exit and calling. */
450
451 /* Define this if pushing a word on the stack makes the stack pointer a
452 smaller address. */
453 /* ------------------------------------------------------------------- */
454
455 /* ================= */
456 #ifdef TARGET_HLASM
457 /* #define STACK_GROWS_DOWNWARD */
458
459 /* Define this if the nominal address of the stack frame is at the
460 high-address end of the local variables; that is, each additional local
461 variable allocated goes at a more negative offset in the frame. */
462
463 /* #define FRAME_GROWS_DOWNWARD */
464
465 /* Offset within stack frame to start allocating local variables at.
466 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
467 first local allocated. Otherwise, it is the offset to the BEGINNING
468 of the first local allocated. */
469
470 #define STARTING_FRAME_OFFSET \
471 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
472
473 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
474
475 /* If we generate an insn to push BYTES bytes, this says how many the stack
476 pointer really advances by. On the 370, we have no push instruction. */
477
478 #endif /* TARGET_HLASM */
479
480 /* ================= */
481 #ifdef TARGET_ELF_ABI
482
483 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
484 But we want the compiler to generate posistive displacements from the
485 stack pointer, and so we make the frame lie above the stack. */
486
487 #define STACK_GROWS_DOWNWARD
488 /* #define FRAME_GROWS_DOWNWARD */
489
490 /* Offset within stack frame to start allocating local variables at.
491 This is the offset to the BEGINNING of the first local allocated. */
492
493 #define STARTING_FRAME_OFFSET \
494 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
495
496 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
497
498 #endif /* TARGET_ELF_ABI */
499 /* ================= */
500
501 /* #define PUSH_ROUNDING(BYTES) */
502
503 /* Accumulate the outgoing argument count so we can request the right
504 DSA size and determine stack offset. */
505
506 #define ACCUMULATE_OUTGOING_ARGS 1
507
508 /* Define offset from stack pointer, to location where a parm can be
509 pushed. */
510
511 #define STACK_POINTER_OFFSET 148
512
513 /* Offset of first parameter from the argument pointer register value. */
514
515 #define FIRST_PARM_OFFSET(FNDECL) 0
516
517 /* 1 if N is a possible register number for function argument passing.
518 On the 370, no registers are used in this way. */
519
520 #define FUNCTION_ARG_REGNO_P(N) 0
521
522 /* Define a data type for recording info about an argument list during
523 the scan of that argument list. This data type should hold all
524 necessary information about the function itself and about the args
525 processed so far, enough to enable macros such as FUNCTION_ARG to
526 determine where the next arg should go. */
527
528 #define CUMULATIVE_ARGS int
529
530 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
531 a function whose data type is FNTYPE.
532 For a library call, FNTYPE is 0. */
533
534 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
535
536 /* Update the data in CUM to advance over an argument of mode MODE and
537 data type TYPE. (TYPE is null for libcalls where that information
538 may not be available.) */
539
540 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
541 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
542 ? 256 \
543 : (MODE) != BLKmode \
544 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
545 : (int_size_in_bytes (TYPE) + 3) / 4))
546
547 /* Define where to put the arguments to a function. Value is zero to push
548 the argument on the stack, or a hard register in which to store the
549 argument. */
550
551 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
552
553 /* For an arg passed partly in registers and partly in memory, this is the
554 number of registers used. For args passed entirely in registers or
555 entirely in memory, zero. */
556
557 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
558
559 /* Define if returning from a function call automatically pops the
560 arguments described by the number-of-args field in the call. */
561
562 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
563
564 /* The FUNCTION_VALUE macro defines how to find the value returned by a
565 function. VALTYPE is the data type of the value (as a tree).
566 If the precise function being called is known, FUNC is its FUNCTION_DECL;
567 otherwise, FUNC is NULL.
568
569 On the 370 the return value is in R15 or R16. However,
570 DImode (64-bit ints) scalars need to get returned on the stack,
571 with r15 pointing to the location. To accomplish this, we define
572 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
573 and the DImode scalars.
574 */
575
576 #define RET_REG(MODE) \
577 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
578
579 #define FUNCTION_VALUE(VALTYPE, FUNC) \
580 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
581
582 #define RETURN_IN_MEMORY(VALTYPE) \
583 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
584
585 /* Define how to find the value returned by a library function assuming
586 the value has mode MODE. */
587
588 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
589
590 /* 1 if N is a possible register number for a function value.
591 On the 370 under C/370, R15 and R16 are thus used. */
592
593 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
594
595 /* This macro definition sets up a default value for `main' to return. */
596
597 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
598
599
600 /* Output assembler code for a block containing the constant parts of a
601 trampoline, leaving space for the variable parts.
602
603 On the 370, the trampoline contains these instructions:
604
605 BALR 14,0
606 USING *,14
607 L STATIC_CHAIN_REGISTER,X
608 L 15,Y
609 BR 15
610 X DS 0F
611 Y DS 0F */
612 /*
613 I am confused as to why this emitting raw binary, instead of instructions ...
614 see for example, rs6000/rs000.c for an example of a different way to
615 do this ... especially since BASR should probably be substituted for BALR.
616 */
617
618 #define TRAMPOLINE_TEMPLATE(FILE) \
619 { \
620 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
621 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
622 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
623 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
624 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
625 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
626 assemble_aligned_integer (2, const0_rtx); \
627 assemble_aligned_integer (2, const0_rtx); \
628 assemble_aligned_integer (2, const0_rtx); \
629 assemble_aligned_integer (2, const0_rtx); \
630 }
631
632 /* Length in units of the trampoline for entering a nested function. */
633
634 #define TRAMPOLINE_SIZE 20
635
636 /* Emit RTL insns to initialize the variable parts of a trampoline. */
637
638 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
639 { \
640 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
641 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
642 }
643
644 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
645 pointer does not matter (provided there is a frame pointer). */
646
647 #define EXIT_IGNORE_STACK 1
648
649 /* Addressing modes, and classification of registers for them. */
650
651 /* #define HAVE_POST_INCREMENT */
652 /* #define HAVE_POST_DECREMENT */
653
654 /* #define HAVE_PRE_DECREMENT */
655 /* #define HAVE_PRE_INCREMENT */
656
657 /* These assume that REGNO is a hard or pseudo reg number. They give
658 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
659 reg currently allocated to a suitable hard reg.
660 These definitions are NOT overridden anywhere. */
661
662 #define REGNO_OK_FOR_INDEX_P(REGNO) \
663 (((REGNO) > 0 && (REGNO) < 16) \
664 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
665
666 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
667
668 #define REGNO_OK_FOR_DATA_P(REGNO) \
669 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
670
671 #define REGNO_OK_FOR_FP_P(REGNO) \
672 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
673
674 /* Now macros that check whether X is a register and also,
675 strictly, whether it is in a specified class. */
676
677 /* 1 if X is a data register. */
678
679 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
680
681 /* 1 if X is an fp register. */
682
683 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
684
685 /* 1 if X is an address register. */
686
687 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
688
689 /* Maximum number of registers that can appear in a valid memory address. */
690
691 #define MAX_REGS_PER_ADDRESS 2
692
693 /* Recognize any constant value that is a valid address. */
694
695 #define CONSTANT_ADDRESS_P(X) \
696 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
697 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
698 || (GET_CODE (X) == CONST \
699 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
700 || (GET_CODE (X) == CONST \
701 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
702 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
703
704 /* Nonzero if the constant value X is a legitimate general operand.
705 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
706
707 #define LEGITIMATE_CONSTANT_P(X) 1
708
709 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
710 its validity for a certain class. We have two alternate definitions
711 for each of them. The usual definition accepts all pseudo regs; the
712 other rejects them all. The symbol REG_OK_STRICT causes the latter
713 definition to be used.
714
715 Most source files want to accept pseudo regs in the hope that they will
716 get allocated to the class that the insn wants them to be in.
717 Some source files that are used after register allocation
718 need to be strict. */
719
720 #ifndef REG_OK_STRICT
721
722 /* Nonzero if X is a hard reg that can be used as an index or if it is
723 a pseudo reg. */
724
725 #define REG_OK_FOR_INDEX_P(X) \
726 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
727
728 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
729 a pseudo reg. */
730
731 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
732
733 #else /* REG_OK_STRICT */
734
735 /* Nonzero if X is a hard reg that can be used as an index. */
736
737 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
738
739 /* Nonzero if X is a hard reg that can be used as a base reg. */
740
741 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
742
743 #endif /* REG_OK_STRICT */
744
745 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
746 valid memory address for an instruction.
747 The MODE argument is the machine mode for the MEM expression
748 that wants to use this address.
749
750 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
751 except for CONSTANT_ADDRESS_P which is actually machine-independent.
752 */
753
754 #define COUNT_REGS(X, REGS, FAIL) \
755 if (REG_P (X)) { \
756 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
757 else goto FAIL; \
758 } \
759 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
760 goto FAIL;
761
762 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
763 { \
764 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
765 goto ADDR; \
766 if (GET_CODE (X) == PLUS) \
767 { \
768 int regs = 0; \
769 rtx x0 = XEXP (X, 0); \
770 rtx x1 = XEXP (X, 1); \
771 if (GET_CODE (x0) == PLUS) \
772 { \
773 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
774 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
775 COUNT_REGS (x1, regs, FAIL); \
776 if (regs == 2) \
777 goto ADDR; \
778 } \
779 else if (GET_CODE (x1) == PLUS) \
780 { \
781 COUNT_REGS (x0, regs, FAIL); \
782 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
783 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
784 if (regs == 2) \
785 goto ADDR; \
786 } \
787 else \
788 { \
789 COUNT_REGS (x0, regs, FAIL); \
790 COUNT_REGS (x1, regs, FAIL); \
791 if (regs != 0) \
792 goto ADDR; \
793 } \
794 } \
795 FAIL: ; \
796 }
797
798 /* The 370 has no mode dependent addresses. */
799
800 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
801
802 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
803 Try machine-dependent ways of modifying an illegitimate address
804 to be legitimate. If we find one, return the new, valid address.
805 This macro is used in only one place: `memory_address' in explow.c.
806
807 Several comments:
808 (1) It's not obvious that this macro results in better code
809 than its omission does. For historical reasons we leave it in.
810
811 (2) This macro may be (???) implicated in the accidental promotion
812 or RS operand to RX operands, which bombs out any RS, SI, SS
813 instruction that was expecting a simple address. Note that
814 this occurs fairly rarely ...
815
816 (3) There is a bug somewhere that causes either r4 to be spilled,
817 or causes r0 to be used as a base register. Changeing the macro
818 below will make the bug move around, but will not make it go away
819 ... Note that this is a rare bug ...
820
821 */
822
823 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
824 { \
825 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
826 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
827 copy_to_mode_reg (SImode, XEXP (X, 1))); \
828 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
829 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
830 copy_to_mode_reg (SImode, XEXP (X, 0))); \
831 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
832 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
833 force_operand (XEXP (X, 0), 0)); \
834 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
835 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
836 force_operand (XEXP (X, 1), 0)); \
837 if (memory_address_p (MODE, X)) \
838 goto WIN; \
839 }
840
841 /* Specify the machine mode that this machine uses for the index in the
842 tablejump instruction. */
843
844 #define CASE_VECTOR_MODE SImode
845
846 /* Define this if the tablejump instruction expects the table to contain
847 offsets from the address of the table.
848 Do not define this if the table should contain absolute addresses. */
849
850 /* #define CASE_VECTOR_PC_RELATIVE */
851
852 /* Define this if fixuns_trunc is the same as fix_trunc. */
853
854 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
855
856 /* We use "unsigned char" as default. */
857
858 #define DEFAULT_SIGNED_CHAR 0
859
860 /* Max number of bytes we can move from memory to memory in one reasonably
861 fast instruction. */
862
863 #define MOVE_MAX 256
864
865 /* Nonzero if access to memory by bytes is slow and undesirable. */
866
867 #define SLOW_BYTE_ACCESS 1
868
869 /* Define if shifts truncate the shift count which implies one can omit
870 a sign-extension or zero-extension of a shift count. */
871
872 /* #define SHIFT_COUNT_TRUNCATED */
873
874 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
875 is done just by pretending it is already truncated. */
876
877 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
878
879 /* We assume that the store-condition-codes instructions store 0 for false
880 and some other value for true. This is the value stored for true. */
881
882 /* #define STORE_FLAG_VALUE (-1) */
883
884 /* When a prototype says `char' or `short', really pass an `int'. */
885
886 #define PROMOTE_PROTOTYPES 1
887
888 /* Don't perform CSE on function addresses. */
889
890 #define NO_FUNCTION_CSE
891
892 /* Specify the machine mode that pointers have.
893 After generation of rtl, the compiler makes no further distinction
894 between pointers and any other objects of this machine mode. */
895
896 #define Pmode SImode
897
898 /* A function address in a call instruction is a byte address (for
899 indexing purposes) so give the MEM rtx a byte's mode. */
900
901 #define FUNCTION_MODE QImode
902
903 /* Compute the cost of computing a constant rtl expression RTX whose
904 rtx-code is CODE. The body of this macro is a portion of a switch
905 statement. If the code is computed here, return it with a return
906 statement. Otherwise, break from the switch. */
907
908 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
909 case CONST_INT: \
910 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
911 case CONST: \
912 case LABEL_REF: \
913 case SYMBOL_REF: \
914 return 2; \
915 case CONST_DOUBLE: \
916 return 4;
917
918 /* A C statement (sans semicolon) to update the integer variable COST
919 based on the relationship between INSN that is dependent on
920 DEP_INSN through the dependence LINK. The default is to make no
921 adjustment to COST. This can be used for example to specify to
922 the scheduler that an output- or anti-dependence does not incur
923 the same cost as a data-dependence.
924
925 We will want to use this to indicate that there is a cost associated
926 with the loading, followed by use of base registers ...
927 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
928 */
929
930 /* Tell final.c how to eliminate redundant test instructions. */
931
932 /* Here we define machine-dependent flags and fields in cc_status
933 (see `conditions.h'). */
934
935 /* Store in cc_status the expressions that the condition codes will
936 describe after execution of an instruction whose pattern is EXP.
937 Do not alter them if the instruction would not alter the cc's.
938
939 On the 370, load insns do not alter the cc's. However, in some
940 cases these instructions can make it possibly invalid to use the
941 saved cc's. In those cases we clear out some or all of the saved
942 cc's so they won't be used.
943
944 Note that only some arith instructions set the CC. These include
945 add, subtract, complement, various shifts. Note that multiply
946 and divide do *not* set set the CC. Therefore, in the code below,
947 don't set the status for MUL, DIV, etc.
948
949 Note that the bitwise ops set the condition code, but not in a
950 way that we can make use of it. So we treat these as clobbering,
951 rather than setting the CC. These are clobbered in the individual
952 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
953 */
954
955 #define NOTICE_UPDATE_CC(EXP, INSN) \
956 { \
957 rtx exp = (EXP); \
958 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
959 exp = XVECEXP (exp, 0, 0); \
960 if (GET_CODE (exp) != SET) \
961 CC_STATUS_INIT; \
962 else \
963 { \
964 if (XEXP (exp, 0) == cc0_rtx) \
965 { \
966 cc_status.value1 = XEXP (exp, 0); \
967 cc_status.value2 = XEXP (exp, 1); \
968 cc_status.flags = 0; \
969 } \
970 else \
971 { \
972 if (cc_status.value1 \
973 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
974 cc_status.value1 = 0; \
975 if (cc_status.value2 \
976 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
977 cc_status.value2 = 0; \
978 switch (GET_CODE (XEXP (exp, 1))) \
979 { \
980 case PLUS: case MINUS: case NEG: \
981 case NOT: case ABS: \
982 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
983 \
984 /* mult and div don't set any cc codes !! */ \
985 case MULT: /* case UMULT: */ case DIV: case UDIV: \
986 /* and, or and xor set the cc's the wrong way !! */ \
987 case AND: case IOR: case XOR: \
988 /* some shifts set the CC some don't. */ \
989 case ASHIFT: case ASHIFTRT: \
990 do {} while (0); \
991 default: \
992 break; \
993 } \
994 } \
995 } \
996 }
997
998
999 #define CC_STATUS_SET(V1, V2) \
1000 { \
1001 cc_status.flags = 0; \
1002 cc_status.value1 = (V1); \
1003 cc_status.value2 = (V2); \
1004 if (cc_status.value1 \
1005 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1006 cc_status.value2 = 0; \
1007 }
1008
1009 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1010 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1011
1012 /* ------------------------------------------ */
1013 /* Control the assembler format that we output. */
1014
1015 /* Define standard character escape sequences for non-ASCII targets
1016 only. */
1017
1018 #ifdef TARGET_EBCDIC
1019 #define TARGET_ESC 39
1020 #define TARGET_BELL 47
1021 #define TARGET_BS 22
1022 #define TARGET_TAB 5
1023 #define TARGET_NEWLINE 21
1024 #define TARGET_VT 11
1025 #define TARGET_FF 12
1026 #define TARGET_CR 13
1027 #endif
1028
1029 /* ======================================================== */
1030
1031 #ifdef TARGET_HLASM
1032 #define TEXT_SECTION_ASM_OP "* Program text area"
1033 #define DATA_SECTION_ASM_OP "* Program data area"
1034 #define INIT_SECTION_ASM_OP "* Program initialization area"
1035 #define SHARED_SECTION_ASM_OP "* Program shared data"
1036 #define CTOR_LIST_BEGIN /* NO OP */
1037 #define CTOR_LIST_END /* NO OP */
1038 #define MAX_MVS_LABEL_SIZE 8
1039
1040 /* How to refer to registers in assembler output. This sequence is
1041 indexed by compiler's hard-register-number (see above). */
1042
1043 #define REGISTER_NAMES \
1044 { "0", "1", "2", "3", "4", "5", "6", "7", \
1045 "8", "9", "10", "11", "12", "13", "14", "15", \
1046 "0", "2", "4", "6" \
1047 }
1048
1049 #define ASM_FILE_START(FILE) \
1050 { fputs ("\tRMODE\tANY\n", FILE); \
1051 fputs ("\tCSECT\n", FILE); }
1052
1053 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1054 #define ASM_COMMENT_START "*"
1055 #define ASM_APP_OFF ""
1056 #define ASM_APP_ON ""
1057
1058 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1059 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1060
1061 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1062 { \
1063 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1064 if (mvs_check_alias (NAME, temp) == 2) \
1065 { \
1066 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1067 } \
1068 }
1069
1070 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1071 { \
1072 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1073 if (mvs_check_alias (NAME, temp) == 2) \
1074 { \
1075 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1076 } \
1077 fputs ("\tENTRY\t", FILE); \
1078 assemble_name (FILE, NAME); \
1079 fputs ("\n", FILE); \
1080 }
1081
1082 /* MVS externals are limited to 8 characters, upper case only.
1083 The '_' is mapped to '@', except for MVS functions, then '#'. */
1084
1085
1086 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1087 { \
1088 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1089 if (!mvs_get_alias (NAME, temp)) \
1090 strcpy (temp, NAME); \
1091 if (!strcmp (temp,"main")) \
1092 strcpy (temp,"gccmain"); \
1093 if (mvs_function_check (temp)) \
1094 ch = '#'; \
1095 else \
1096 ch = '@'; \
1097 for (bp = temp; *bp; bp++) \
1098 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1099 fprintf (FILE, "%s", temp); \
1100 }
1101
1102 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1103 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1104
1105 /* Generate internal label. Since we can branch here from off page, we
1106 must reload the base register. */
1107
1108 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1109 { \
1110 if (!strcmp (PREFIX,"L")) \
1111 { \
1112 mvs_add_label(NUM); \
1113 } \
1114 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1115 }
1116
1117 /* Generate case label. For HLASM we can change to the data CSECT
1118 and put the vectors out of the code body. The assembler just
1119 concatenates CSECTs with the same name. */
1120
1121 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1122 fprintf (FILE, "\tDS\t0F\n"); \
1123 fprintf (FILE,"\tCSECT\n"); \
1124 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1125
1126 /* Put the CSECT back to the code body */
1127
1128 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1129 assemble_name (FILE, mvs_function_name); \
1130 fputs ("\tCSECT\n", FILE);
1131
1132 /* This is how to output an element of a case-vector that is absolute. */
1133
1134 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1135 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1136
1137 /* This is how to output an element of a case-vector that is relative. */
1138
1139 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1140 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1141
1142 /* This is how to output an insn to push a register on the stack.
1143 It need not be very fast code.
1144 Right now, PUSH & POP are used only when profiling is enabled,
1145 and then, only to push the static chain reg and the function struct
1146 value reg, and only if those are used. Since profiling is not
1147 supported anyway, punt on this. */
1148
1149 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1150 mvs_check_page (FILE, 8, 4); \
1151 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1152 reg_names[REGNO], STACK_POINTER_OFFSET)
1153
1154 /* This is how to output an insn to pop a register from the stack.
1155 It need not be very fast code. */
1156
1157 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1158 mvs_check_page (FILE, 8, 0); \
1159 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1160 reg_names[REGNO], STACK_POINTER_OFFSET)
1161
1162 /* This outputs a text string. The string are chopped up to fit into
1163 an 80 byte record. Also, control and special characters, interpreted
1164 by the IBM assembler, are output numerically. */
1165
1166 #define MVS_ASCII_TEXT_LENGTH 48
1167
1168 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1169 { \
1170 size_t i, limit = (LEN); \
1171 int j; \
1172 for (j = 0, i = 0; i < limit; j++, i++) \
1173 { \
1174 int c = (PTR)[i]; \
1175 if (ISCNTRL (c) || c == '&') \
1176 { \
1177 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1178 fprintf (FILE, "'\n"); \
1179 j = -1; \
1180 if (c == '&') c = MAP_CHARACTER (c); \
1181 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1182 } \
1183 else \
1184 { \
1185 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1186 fprintf (FILE, "\tDC\tC'"); \
1187 if ( c == '\'' ) \
1188 fprintf (FILE, "%c%c", c, c); \
1189 else \
1190 fprintf (FILE, "%c", c); \
1191 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1192 fprintf (FILE, "'\n" ); \
1193 } \
1194 } \
1195 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1196 fprintf (FILE, "'\n"); \
1197 }
1198
1199 /* This is how to output an assembler line that says to advance the
1200 location counter to a multiple of 2**LOG bytes. */
1201
1202 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1203 if (LOG) \
1204 { \
1205 if ((LOG) == 1) \
1206 fprintf (FILE, "\tDS\t0H\n" ); \
1207 else \
1208 fprintf (FILE, "\tDS\t0F\n" ); \
1209 } \
1210
1211 /* The maximum length of memory that the IBM assembler will allow in one
1212 DS operation. */
1213
1214 #define MAX_CHUNK 32767
1215
1216 /* A C statement to output to the stdio stream FILE an assembler
1217 instruction to advance the location counter by SIZE bytes. Those
1218 bytes should be zero when loaded. */
1219
1220 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1221 { \
1222 int s, k; \
1223 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1224 { \
1225 if (s > MAX_CHUNK) \
1226 k = MAX_CHUNK; \
1227 else \
1228 k = s; \
1229 fprintf (FILE, "\tDS\tXL%d\n", k); \
1230 } \
1231 }
1232
1233 /* A C statement (sans semicolon) to output to the stdio stream
1234 FILE the assembler definition of a common-label named NAME whose
1235 size is SIZE bytes. The variable ROUNDED is the size rounded up
1236 to whatever alignment the caller wants. */
1237
1238 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1239 { \
1240 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1241 if (mvs_check_alias(NAME, temp) == 2) \
1242 { \
1243 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1244 } \
1245 fputs ("\tENTRY\t", FILE); \
1246 assemble_name (FILE, NAME); \
1247 fputs ("\n", FILE); \
1248 fprintf (FILE, "\tDS\t0F\n"); \
1249 ASM_OUTPUT_LABEL (FILE,NAME); \
1250 ASM_OUTPUT_SKIP (FILE,SIZE); \
1251 }
1252
1253 /* A C statement (sans semicolon) to output to the stdio stream
1254 FILE the assembler definition of a local-common-label named NAME
1255 whose size is SIZE bytes. The variable ROUNDED is the size
1256 rounded up to whatever alignment the caller wants. */
1257
1258 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1259 { \
1260 fprintf (FILE, "\tDS\t0F\n"); \
1261 ASM_OUTPUT_LABEL (FILE,NAME); \
1262 ASM_OUTPUT_SKIP (FILE,SIZE); \
1263 }
1264
1265 /* Store in OUTPUT a string (made with alloca) containing an
1266 assembler-name for a local static variable named NAME.
1267 LABELNO is an integer which is different for each call. */
1268
1269 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1270 { \
1271 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1272 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1273 }
1274
1275 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1276 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1277 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1278
1279 #define PRINT_OPERAND(FILE, XV, CODE) \
1280 { \
1281 switch (GET_CODE (XV)) \
1282 { \
1283 static char curreg[4]; \
1284 case REG: \
1285 if (CODE == 'N') \
1286 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1287 else \
1288 strcpy (curreg, reg_names[REGNO (XV)]); \
1289 fprintf (FILE, "%s", curreg); \
1290 break; \
1291 case MEM: \
1292 { \
1293 rtx addr = XEXP (XV, 0); \
1294 if (CODE == 'O') \
1295 { \
1296 if (GET_CODE (addr) == PLUS) \
1297 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1298 else \
1299 fprintf (FILE, "0"); \
1300 } \
1301 else if (CODE == 'R') \
1302 { \
1303 if (GET_CODE (addr) == PLUS) \
1304 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1305 else \
1306 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1307 } \
1308 else \
1309 output_address (XEXP (XV, 0)); \
1310 } \
1311 break; \
1312 case SYMBOL_REF: \
1313 case LABEL_REF: \
1314 mvs_page_lit += 4; \
1315 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1316 else fprintf (FILE, "=A("); \
1317 output_addr_const (FILE, XV); \
1318 fprintf (FILE, ")"); \
1319 break; \
1320 case CONST_INT: \
1321 if (CODE == 'B') \
1322 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1323 else if (CODE == 'X') \
1324 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1325 else if (CODE == 'h') \
1326 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1327 else if (CODE == 'H') \
1328 { \
1329 mvs_page_lit += 2; \
1330 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1331 } \
1332 else if (CODE == 'K') \
1333 { \
1334 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1335 mvs_page_lit += 4; \
1336 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1337 } \
1338 else if (CODE == 'W') \
1339 { \
1340 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1341 mvs_page_lit += 8; \
1342 if (0 <= INTVAL (XV)) { \
1343 fprintf (FILE, "=XL8'00000000"); \
1344 } else { \
1345 fprintf (FILE, "=XL8'FFFFFFFF"); \
1346 } \
1347 fprintf (FILE, "%08X'", INTVAL (XV)); \
1348 } \
1349 else \
1350 { \
1351 mvs_page_lit += 4; \
1352 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1353 } \
1354 break; \
1355 case CONST_DOUBLE: \
1356 if (GET_MODE (XV) == DImode) \
1357 { \
1358 if (CODE == 'M') \
1359 { \
1360 mvs_page_lit += 4; \
1361 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1362 } \
1363 else if (CODE == 'L') \
1364 { \
1365 mvs_page_lit += 4; \
1366 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1367 } \
1368 else \
1369 { \
1370 mvs_page_lit += 8; \
1371 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1372 CONST_DOUBLE_HIGH (XV)); \
1373 } \
1374 } \
1375 else \
1376 { \
1377 char buf[50]; \
1378 REAL_VALUE_TYPE rval; \
1379 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1380 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1381 if (GET_MODE (XV) == SFmode) \
1382 { \
1383 mvs_page_lit += 4; \
1384 fprintf (FILE, "=E'%s'", buf); \
1385 } \
1386 else \
1387 if (GET_MODE (XV) == DFmode) \
1388 { \
1389 mvs_page_lit += 8; \
1390 fprintf (FILE, "=D'%s'", buf); \
1391 } \
1392 else /* VOIDmode !?!? strange but true ... */ \
1393 { \
1394 mvs_page_lit += 8; \
1395 fprintf (FILE, "=XL8'%08X%08X'", \
1396 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1397 } \
1398 } \
1399 break; \
1400 case CONST: \
1401 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1402 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1403 { \
1404 mvs_page_lit += 4; \
1405 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1406 { \
1407 fprintf (FILE, "=V("); \
1408 ASM_OUTPUT_LABELREF (FILE, \
1409 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1410 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1411 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1412 } \
1413 else \
1414 { \
1415 fprintf (FILE, "=A("); \
1416 output_addr_const (FILE, XV); \
1417 fprintf (FILE, ")"); \
1418 } \
1419 } \
1420 else \
1421 { \
1422 mvs_page_lit += 4; \
1423 fprintf (FILE, "=F'"); \
1424 output_addr_const (FILE, XV); \
1425 fprintf (FILE, "'"); \
1426 } \
1427 break; \
1428 default: \
1429 abort(); \
1430 } \
1431 }
1432
1433 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1434 { \
1435 rtx breg, xreg, offset, plus; \
1436 \
1437 switch (GET_CODE (ADDR)) \
1438 { \
1439 case REG: \
1440 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1441 break; \
1442 case PLUS: \
1443 breg = 0; \
1444 xreg = 0; \
1445 offset = 0; \
1446 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1447 { \
1448 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1449 breg = XEXP (ADDR, 1); \
1450 else \
1451 offset = XEXP (ADDR, 1); \
1452 plus = XEXP (ADDR, 0); \
1453 } \
1454 else \
1455 { \
1456 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1457 breg = XEXP (ADDR, 0); \
1458 else \
1459 offset = XEXP (ADDR, 0); \
1460 plus = XEXP (ADDR, 1); \
1461 } \
1462 if (GET_CODE (plus) == PLUS) \
1463 { \
1464 if (GET_CODE (XEXP (plus, 0)) == REG) \
1465 { \
1466 if (breg) \
1467 xreg = XEXP (plus, 0); \
1468 else \
1469 breg = XEXP (plus, 0); \
1470 } \
1471 else \
1472 { \
1473 offset = XEXP (plus, 0); \
1474 } \
1475 if (GET_CODE (XEXP (plus, 1)) == REG) \
1476 { \
1477 if (breg) \
1478 xreg = XEXP (plus, 1); \
1479 else \
1480 breg = XEXP (plus, 1); \
1481 } \
1482 else \
1483 { \
1484 offset = XEXP (plus, 1); \
1485 } \
1486 } \
1487 else if (GET_CODE (plus) == REG) \
1488 { \
1489 if (breg) \
1490 xreg = plus; \
1491 else \
1492 breg = plus; \
1493 } \
1494 else \
1495 { \
1496 offset = plus; \
1497 } \
1498 if (offset) \
1499 { \
1500 if (GET_CODE (offset) == LABEL_REF) \
1501 fprintf (FILE, "L%d", \
1502 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1503 else \
1504 output_addr_const (FILE, offset); \
1505 } \
1506 else \
1507 fprintf (FILE, "0"); \
1508 if (xreg) \
1509 fprintf (FILE, "(%s,%s)", \
1510 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1511 else \
1512 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1513 break; \
1514 default: \
1515 mvs_page_lit += 4; \
1516 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1517 else fprintf (FILE, "=A("); \
1518 output_addr_const (FILE, ADDR); \
1519 fprintf (FILE, ")"); \
1520 break; \
1521 } \
1522 }
1523
1524 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1525 { \
1526 if (strlen (NAME) + 1 > mvs_function_name_length) \
1527 { \
1528 if (mvs_function_name) \
1529 free (mvs_function_name); \
1530 mvs_function_name = 0; \
1531 } \
1532 if (!mvs_function_name) \
1533 { \
1534 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1535 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1536 } \
1537 if (!strcmp (NAME, "main")) \
1538 strcpy (mvs_function_name, "gccmain"); \
1539 else \
1540 strcpy (mvs_function_name, NAME); \
1541 fprintf (FILE, "\tDS\t0F\n"); \
1542 assemble_name (FILE, mvs_function_name); \
1543 fputs ("\tRMODE\tANY\n", FILE); \
1544 assemble_name (FILE, mvs_function_name); \
1545 fputs ("\tCSECT\n", FILE); \
1546 }
1547
1548 /* Output assembler code to FILE to increment profiler label # LABELNO
1549 for profiling a function entry. */
1550
1551 #define FUNCTION_PROFILER(FILE, LABELNO) \
1552 fprintf (FILE, "Error: No profiling available.\n")
1553
1554 #endif /* TARGET_HLASM */
1555
1556 /* ======================================================== */
1557
1558 #ifdef TARGET_ELF_ABI
1559
1560 /* How to refer to registers in assembler output. This sequence is
1561 indexed by compiler's hard-register-number (see above). */
1562
1563 #define REGISTER_NAMES \
1564 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1565 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1566 "f0", "f2", "f4", "f6" \
1567 }
1568
1569 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1570 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1571 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1572
1573 #define PRINT_OPERAND(FILE, XV, CODE) \
1574 { \
1575 switch (GET_CODE (XV)) \
1576 { \
1577 static char curreg[4]; \
1578 case REG: \
1579 if (CODE == 'N') \
1580 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1581 else \
1582 strcpy (curreg, reg_names[REGNO (XV)]); \
1583 fprintf (FILE, "%s", curreg); \
1584 break; \
1585 case MEM: \
1586 { \
1587 rtx addr = XEXP (XV, 0); \
1588 if (CODE == 'O') \
1589 { \
1590 if (GET_CODE (addr) == PLUS) \
1591 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1592 else \
1593 fprintf (FILE, "0"); \
1594 } \
1595 else if (CODE == 'R') \
1596 { \
1597 if (GET_CODE (addr) == PLUS) \
1598 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1599 else \
1600 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1601 } \
1602 else \
1603 output_address (XEXP (XV, 0)); \
1604 } \
1605 break; \
1606 case SYMBOL_REF: \
1607 case LABEL_REF: \
1608 mvs_page_lit += 4; \
1609 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1610 else fprintf (FILE, "=A("); \
1611 output_addr_const (FILE, XV); \
1612 fprintf (FILE, ")"); \
1613 break; \
1614 case CONST_INT: \
1615 if (CODE == 'B') \
1616 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1617 else if (CODE == 'X') \
1618 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1619 else if (CODE == 'h') \
1620 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1621 else if (CODE == 'H') \
1622 { \
1623 mvs_page_lit += 2; \
1624 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1625 } \
1626 else if (CODE == 'K') \
1627 { \
1628 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1629 mvs_page_lit += 4; \
1630 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1631 } \
1632 else if (CODE == 'W') \
1633 { \
1634 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1635 mvs_page_lit += 8; \
1636 if (0 <= INTVAL (XV)) { \
1637 fprintf (FILE, "=XL8'00000000"); \
1638 } else { \
1639 fprintf (FILE, "=XL8'FFFFFFFF"); \
1640 } \
1641 fprintf (FILE, "%08X'", INTVAL (XV)); \
1642 } \
1643 else \
1644 { \
1645 mvs_page_lit += 4; \
1646 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1647 } \
1648 break; \
1649 case CONST_DOUBLE: \
1650 if (GET_MODE (XV) == DImode) \
1651 { \
1652 if (CODE == 'M') \
1653 { \
1654 mvs_page_lit += 4; \
1655 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1656 } \
1657 else if (CODE == 'L') \
1658 { \
1659 mvs_page_lit += 4; \
1660 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1661 } \
1662 else \
1663 { \
1664 mvs_page_lit += 8; \
1665 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1666 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1667 } \
1668 } \
1669 else \
1670 { \
1671 char buf[50]; \
1672 REAL_VALUE_TYPE rval; \
1673 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1674 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1675 if (GET_MODE (XV) == SFmode) \
1676 { \
1677 mvs_page_lit += 4; \
1678 fprintf (FILE, "=E'%s'", buf); \
1679 } \
1680 else \
1681 if (GET_MODE (XV) == DFmode) \
1682 { \
1683 mvs_page_lit += 8; \
1684 fprintf (FILE, "=D'%s'", buf); \
1685 } \
1686 else /* VOIDmode !?!? strange but true ... */ \
1687 { \
1688 mvs_page_lit += 8; \
1689 fprintf (FILE, "=XL8'%08X%08X'", \
1690 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1691 } \
1692 } \
1693 break; \
1694 case CONST: \
1695 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1696 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1697 { \
1698 mvs_page_lit += 4; \
1699 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1700 { \
1701 fprintf (FILE, "=V("); \
1702 ASM_OUTPUT_LABELREF (FILE, \
1703 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1704 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1705 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1706 } \
1707 else \
1708 { \
1709 fprintf (FILE, "=A("); \
1710 output_addr_const (FILE, XV); \
1711 fprintf (FILE, ")"); \
1712 } \
1713 } \
1714 else \
1715 { \
1716 mvs_page_lit += 4; \
1717 fprintf (FILE, "=bogus_bad_F'"); \
1718 output_addr_const (FILE, XV); \
1719 fprintf (FILE, "'"); \
1720 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1721 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1722 debug_rtx (XV); \
1723 abort(); \
1724 } \
1725 break; \
1726 default: \
1727 abort(); \
1728 } \
1729 }
1730
1731 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1732 { \
1733 rtx breg, xreg, offset, plus; \
1734 \
1735 switch (GET_CODE (ADDR)) \
1736 { \
1737 case REG: \
1738 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1739 break; \
1740 case PLUS: \
1741 breg = 0; \
1742 xreg = 0; \
1743 offset = 0; \
1744 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1745 { \
1746 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1747 breg = XEXP (ADDR, 1); \
1748 else \
1749 offset = XEXP (ADDR, 1); \
1750 plus = XEXP (ADDR, 0); \
1751 } \
1752 else \
1753 { \
1754 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1755 breg = XEXP (ADDR, 0); \
1756 else \
1757 offset = XEXP (ADDR, 0); \
1758 plus = XEXP (ADDR, 1); \
1759 } \
1760 if (GET_CODE (plus) == PLUS) \
1761 { \
1762 if (GET_CODE (XEXP (plus, 0)) == REG) \
1763 { \
1764 if (breg) \
1765 xreg = XEXP (plus, 0); \
1766 else \
1767 breg = XEXP (plus, 0); \
1768 } \
1769 else \
1770 { \
1771 offset = XEXP (plus, 0); \
1772 } \
1773 if (GET_CODE (XEXP (plus, 1)) == REG) \
1774 { \
1775 if (breg) \
1776 xreg = XEXP (plus, 1); \
1777 else \
1778 breg = XEXP (plus, 1); \
1779 } \
1780 else \
1781 { \
1782 offset = XEXP (plus, 1); \
1783 } \
1784 } \
1785 else if (GET_CODE (plus) == REG) \
1786 { \
1787 if (breg) \
1788 xreg = plus; \
1789 else \
1790 breg = plus; \
1791 } \
1792 else \
1793 { \
1794 offset = plus; \
1795 } \
1796 if (offset) \
1797 { \
1798 if (GET_CODE (offset) == LABEL_REF) \
1799 fprintf (FILE, "L%d", \
1800 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1801 else \
1802 output_addr_const (FILE, offset); \
1803 } \
1804 else \
1805 fprintf (FILE, "0"); \
1806 if (xreg) \
1807 fprintf (FILE, "(%s,%s)", \
1808 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1809 else \
1810 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1811 break; \
1812 default: \
1813 mvs_page_lit += 4; \
1814 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1815 else fprintf (FILE, "=A("); \
1816 output_addr_const (FILE, ADDR); \
1817 fprintf (FILE, ")"); \
1818 break; \
1819 } \
1820 }
1821
1822 /* Output assembler code to FILE to increment profiler label # LABELNO
1823 for profiling a function entry. */
1824 /* Make it a no-op for now, so we can at least compile glibc */
1825 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1826 mvs_check_page (FILE, 24, 4); \
1827 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1828 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1829 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1830 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1831 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1832 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1833 }
1834
1835 /* Don't bother to output .extern pseudo-ops. They are not needed by
1836 ELF assemblers. */
1837
1838 #undef ASM_OUTPUT_EXTERNAL
1839
1840 #define ASM_DOUBLE "\t.double"
1841
1842 /* This is how to output the definition of a user-level label named NAME,
1843 such as the label on a static function or variable NAME. */
1844 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1845 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1846
1847 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1848
1849 /* Generate internal label. Since we can branch here from off page, we
1850 must reload the base register. Note that internal labels are generated
1851 for loops, goto's and case labels. */
1852 #undef ASM_OUTPUT_INTERNAL_LABEL
1853 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1854 { \
1855 if (!strcmp (PREFIX,"L")) \
1856 { \
1857 mvs_add_label(NUM); \
1858 } \
1859 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1860 }
1861
1862 /* let config/svr4.h define this ...
1863 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1864 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1865 */
1866
1867 /* This is how to output an element of a case-vector that is absolute. */
1868 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1869 mvs_check_page (FILE, 4, 0); \
1870 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1871
1872 /* This is how to output an element of a case-vector that is relative. */
1873 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1874 mvs_check_page (FILE, 4, 0); \
1875 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1876
1877 /* Right now, PUSH & POP are used only when profiling is enabled,
1878 and then, only to push the static chain reg and the function struct
1879 value reg, and only if those are used by the function being profiled.
1880 We don't need this for profiling, so punt. */
1881 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1882 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1883
1884
1885 /* Indicate that jump tables go in the text section. This is
1886 necessary when compiling PIC code. */
1887 #define JUMP_TABLES_IN_TEXT_SECTION 1
1888
1889 /* Define macro used to output shift-double opcodes when the shift
1890 count is in %cl. Some assemblers require %cl as an argument;
1891 some don't.
1892
1893 GAS requires the %cl argument, so override i386/unix.h. */
1894
1895 #undef SHIFT_DOUBLE_OMITS_COUNT
1896 #define SHIFT_DOUBLE_OMITS_COUNT 0
1897
1898 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1899 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1900 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1901
1902 /* Allow #sccs in preprocessor. */
1903 #define SCCS_DIRECTIVE
1904
1905 /* Implicit library calls should use memcpy, not bcopy, etc. */
1906 #define TARGET_MEM_FUNCTIONS
1907
1908 /* Output before read-only data. */
1909 #define TEXT_SECTION_ASM_OP "\t.text"
1910
1911 /* Output before writable (initialized) data. */
1912 #define DATA_SECTION_ASM_OP "\t.data"
1913
1914 /* Output before writable (uninitialized) data. */
1915 #define BSS_SECTION_ASM_OP "\t.bss"
1916
1917 /* In the past there was confusion as to what the argument to .align was
1918 in GAS. For the last several years the rule has been this: for a.out
1919 file formats that argument is LOG, and for all other file formats the
1920 argument is 1<<LOG.
1921
1922 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1923 doubt or guess work, and since this file is used for both a.out and other
1924 file formats, we use one of them. */
1925
1926 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1927 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1928
1929 /* This is how to output a command to make the user-level label named NAME
1930 defined for reference from other files. */
1931
1932 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1933 (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
1934
1935 /* This says how to output an assembler line
1936 to define a global common symbol. */
1937
1938 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1939 ( fputs (".comm ", (FILE)), \
1940 assemble_name ((FILE), (NAME)), \
1941 fprintf ((FILE), ",%u\n", (ROUNDED)))
1942
1943 /* This says how to output an assembler line
1944 to define a local common symbol. */
1945
1946 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1947 ( fputs (".lcomm ", (FILE)), \
1948 assemble_name ((FILE), (NAME)), \
1949 fprintf ((FILE), ",%u\n", (ROUNDED)))
1950
1951 #endif /* TARGET_ELF_ABI */
1952 #endif /* ! GCC_I370_H */
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