| blob | 6f0c074a6ed826a0194e0e9e6f3539ba5ea03533 |
1 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
3 Backport from trunk r213376.
4 2014-07-31 Charles Baylis <charles.baylis@linaro.org>
6 PR target/61948
7 * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
8 constraints are satisfied.
9 (<shift>di3_neon): Likewise.
11 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
13 Backport from trunk r211270, r211271, r211273, r211275, r212943,
14 r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
15 r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
16 r213000.
17 2014-07-24 Jiong Wang <jiong.wang@arm.com>
19 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
20 (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
22 2014-07-24 Jiong Wang <jiong.wang@arm.com>
24 * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
25 (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
27 2014-07-24 Jiong Wang <jiong.wang@arm.com>
29 * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
30 (aarch64_save_callee_saves): New parameter "skip_wb".
31 (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
33 2014-07-24 Jiong Wang <jiong.wang@arm.com>
35 * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
36 "wb_candidate2".
37 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
39 2014-07-24 Jiong Wang <jiong.wang@arm.com>
41 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
42 subtract outgoing area size when restoring stack_pointer_rtx.
44 2014-07-23 Jiong Wang <jiong.wang@arm.com>
46 * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
47 (aarch64_gen_loadwb_pair): New helper function.
48 (aarch64_expand_epilogue): Simplify code using new helper functions.
49 * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
51 2014-07-23 Jiong Wang <jiong.wang@arm.com>
53 * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
54 (aarch64_gen_storewb_pair): New helper function.
55 (aarch64_expand_prologue): Simplify code using new helper functions.
56 * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
58 2014-07-23 Jiong Wang <jiong.wang@arm.com>
60 * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
61 Rename to aarch64_save_callee_saves, remove restore code.
62 (aarch64_restore_callee_saves): New function.
64 2014-07-23 Jiong Wang <jiong.wang@arm.com>
66 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
67 (aarch64_save_callee_saves): New function to handle reg save
68 for both core and vectore regs.
70 2014-07-23 Jiong Wang <jiong.wang@arm.com>
72 * config/aarch64/aarch64.c (aarch64_gen_load_pair)
73 (aarch64_gen_store_pair): New helper function.
74 (aarch64_save_or_restore_callee_save_registers)
75 (aarch64_save_or_restore_fprs): Use new helper functions.
77 2014-07-23 Jiong Wang <jiong.wang@arm.com>
79 * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
80 (aarch64_save_or_restore_callee_save_registers)
81 (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
83 2014-07-23 Jiong Wang <jiong.wang@arm.com>
85 * config/aarch64/aarch64.c
86 (aarch64_save_or_restore_callee_save_registers)
87 (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
89 2014-07-23 Jiong Wang <jiong.wang@arm.com>
91 * config/aarch64/aarch64.c
92 (aarch64_save_or_restore_callee_save_registers)
93 (aarch64_save_or_restore_fprs): Remove 'increment'.
95 2014-07-23 Jiong Wang <jiong.wang@arm.com>
97 * config/aarch64/aarch64.c
98 (aarch64_save_or_restore_callee_save_registers)
99 (aarch64_save_or_restore_fprs): Use register offset in
100 cfun->machine->frame.reg_offset.
102 2014-07-23 Jiong Wang <jiong.wang@arm.com>
104 * config/aarch64/aarch64.c
105 (aarch64_save_or_restore_callee_save_registers)
106 (aarch64_save_or_restore_fprs): Remove base_rtx.
108 2014-07-23 Jiong Wang <jiong.wang@arm.com>
110 * config/aarch64/aarch64.c
111 (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
112 to 'start_offset'. Remove local variable 'start_offset'.
114 2014-07-23 Jiong Wang <jiong.wang@arm.com>
116 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
117 type to HOST_WIDE_INT.
119 2014-07-23 Jiong Wang <jiong.wang@arm.com>
121 * config/aarch64/aarch64.c (aarch64_expand_prologue)
122 (aarch64_save_or_restore_fprs)
123 (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
125 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
127 * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
128 frame_size.
129 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
130 aarch64_frame hard_fp_offset and frame_size.
131 (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
132 frame_size; remove original_frame_size.
133 (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
134 (aarch64_initial_elimination_offset): Remove frame_size and
135 offset. Use aarch64_frame frame_size.
137 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
138 Jiong Wang <jiong.wang@arm.com>
140 * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
141 initialization of R30 offset. Update offset. Iterate core
142 regisers upto X30. Remove X29, X30 specific code.
144 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
145 Jiong Wang <jiong.wang@arm.com>
147 * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
148 (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
149 (aarch64_register_saved_on_entry): Adjust test.
151 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
153 * config/aarch64/aarch64.h (machine_function): Move
154 saved_varargs_size from here...
155 (aarch64_frameGTY): ... to here.
157 * config/aarch64/aarch64.c (aarch64_expand_prologue)
158 (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
159 (aarch64_initial_elimination_offset)
160 (aarch64_setup_incoming_varargs): Adjust location of
161 saved_varargs_size.
163 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
165 Backport from trunk r212753.
166 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
168 * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
169 (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
171 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
173 Backport from trunk r212752.
174 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
176 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
177 (vmlal_high_lane_s32): Likewise.
178 (vmlal_high_lane_u16): Likewise.
179 (vmlal_high_lane_u32): Likewise.
180 (vmlsl_high_lane_s16): Likewise.
181 (vmlsl_high_lane_s32): Likewise.
182 (vmlsl_high_lane_u16): Likewise.
183 (vmlsl_high_lane_u32): Likewise.
185 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
187 Backport from trunk r212512.
188 2014-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
190 * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
191 * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
192 * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
193 * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
194 * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
195 * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
196 * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
198 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
200 Backport from trunk r212358.
201 2014-07-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
203 * config/arm/arm.c (cortexa5_extra_costs): New table.
204 (arm_cortex_a5_tune): Use cortexa5_extra_costs.
206 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
208 Backport from trunk r212296.
209 2014-07-04 Tom de Vries <tom@codesourcery.com>
211 * config/aarch64/aarch64-simd.md
212 (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
214 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
216 Backport from trunk r212142, r212225.
217 2014-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
219 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
220 variable i.
222 2014-06-30 Alan Lawrence <alan.lawrence@arm.com>
224 * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
225 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
226 against bigendian and adjust indices.
228 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
230 Backport from trunk r211779.
231 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
233 * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
235 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
237 Backport from trunk r211503.
238 2014-06-12 Alan Lawrence <alan.lawrence@arm.com>
240 * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
241 vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
242 vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
243 vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
244 vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
245 vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
246 vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
247 not in the spec.
249 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
251 Backport from trunk r211140.
252 2014-06-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
254 * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
256 2014-07-29 Yvan Roux <yvan.roux@linaro.org>
258 * LINARO-VERSION: Bump version.
260 2014-07-24 Yvan Roux <yvan.roux@linaro.org>
262 GCC Linaro 4.9-2014.07-1 released.
263 * LINARO-VERSION: Update.
265 2014-07-20 Yvan Roux <yvan.roux@linaro.org>
267 Revert:
268 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
270 Backport from trunk r211129.
271 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
273 PR target/61154
274 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
275 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
276 with immediate_operand.
278 2014-07-19 Yvan Roux <yvan.roux@linaro.org>
280 * LINARO-VERSION: Bump version.
282 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
284 GCC Linaro 4.9-2014.07 released.
285 * LINARO-VERSION: Update.
287 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
289 Backport from trunk r211887, r211899.
290 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
292 * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
293 "yes" where needed.
295 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
297 * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
298 vector registers.
300 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
302 Backport from trunk r211440.
303 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
305 * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
306 * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
307 dependencies.
308 * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
309 (aarch64_crc_builtin_datum): New struct.
310 (aarch64_crc_builtin_data): New.
311 (aarch64_init_crc32_builtins): New function.
312 (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
313 (aarch64_crc32_expand_builtin): New.
314 (aarch64_expand_builtin): Add CRC32 builtin expansion case.
315 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
316 __ARM_FEATURE_CRC32 when appropriate.
317 (TARGET_CRC32): Define.
318 * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
319 UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
320 UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
321 (aarch64_<crc_variant>): New pattern.
322 * config/aarch64/arm_acle.h: New file.
323 * config/aarch64/iterators.md (CRC): New int iterator.
324 (crc_variant, crc_mode): New int attributes.
325 * doc/aarch64-acle-intrinsics.texi: New file.
326 * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
327 Include aarch64-acle-intrinsics.texi.
329 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
331 Backport from trunk r211174.
332 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
334 * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
335 New pattern.
336 * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
337 (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
338 * config/aarch64/iterators.md (REVERSE): New iterator.
339 (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
340 (rev_op): New int_attribute.
341 * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
342 vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
343 vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
344 vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
345 vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
346 vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
347 vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
348 Replace temporary __asm__ with __builtin_shuffle.
350 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
352 Backport from trunk r210216, r210218, r210219.
353 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
355 * config/arm/arm_neon.h: Update comment.
356 * config/arm/neon-docgen.ml: Delete.
357 * config/arm/neon-gen.ml: Delete.
358 * doc/arm-neon-intrinsics.texi: Update comment.
360 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
362 * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
363 and v4sf versions.
364 (vand, vorr, veor, vorn, vbic): Remove.
365 * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
366 iterator.
367 (neon_vsub_unspec): Likewise.
368 (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
370 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
372 * config/arm/arm_neon.h (vadd_s8): GNU C implementation
373 (vadd_s16): Likewise.
374 (vadd_s32): Likewise.
375 (vadd_f32): Likewise.
376 (vadd_u8): Likewise.
377 (vadd_u16): Likewise.
378 (vadd_u32): Likewise.
379 (vadd_s64): Likewise.
380 (vadd_u64): Likewise.
381 (vaddq_s8): Likewise.
382 (vaddq_s16): Likewise.
383 (vaddq_s32): Likewise.
384 (vaddq_s64): Likewise.
385 (vaddq_f32): Likewise.
386 (vaddq_u8): Likewise.
387 (vaddq_u16): Likewise.
388 (vaddq_u32): Likewise.
389 (vaddq_u64): Likewise.
390 (vmul_s8): Likewise.
391 (vmul_s16): Likewise.
392 (vmul_s32): Likewise.
393 (vmul_f32): Likewise.
394 (vmul_u8): Likewise.
395 (vmul_u16): Likewise.
396 (vmul_u32): Likewise.
397 (vmul_p8): Likewise.
398 (vmulq_s8): Likewise.
399 (vmulq_s16): Likewise.
400 (vmulq_s32): Likewise.
401 (vmulq_f32): Likewise.
402 (vmulq_u8): Likewise.
403 (vmulq_u16): Likewise.
404 (vmulq_u32): Likewise.
405 (vsub_s8): Likewise.
406 (vsub_s16): Likewise.
407 (vsub_s32): Likewise.
408 (vsub_f32): Likewise.
409 (vsub_u8): Likewise.
410 (vsub_u16): Likewise.
411 (vsub_u32): Likewise.
412 (vsub_s64): Likewise.
413 (vsub_u64): Likewise.
414 (vsubq_s8): Likewise.
415 (vsubq_s16): Likewise.
416 (vsubq_s32): Likewise.
417 (vsubq_s64): Likewise.
418 (vsubq_f32): Likewise.
419 (vsubq_u8): Likewise.
420 (vsubq_u16): Likewise.
421 (vsubq_u32): Likewise.
422 (vsubq_u64): Likewise.
423 (vand_s8): Likewise.
424 (vand_s16): Likewise.
425 (vand_s32): Likewise.
426 (vand_u8): Likewise.
427 (vand_u16): Likewise.
428 (vand_u32): Likewise.
429 (vand_s64): Likewise.
430 (vand_u64): Likewise.
431 (vandq_s8): Likewise.
432 (vandq_s16): Likewise.
433 (vandq_s32): Likewise.
434 (vandq_s64): Likewise.
435 (vandq_u8): Likewise.
436 (vandq_u16): Likewise.
437 (vandq_u32): Likewise.
438 (vandq_u64): Likewise.
439 (vorr_s8): Likewise.
440 (vorr_s16): Likewise.
441 (vorr_s32): Likewise.
442 (vorr_u8): Likewise.
443 (vorr_u16): Likewise.
444 (vorr_u32): Likewise.
445 (vorr_s64): Likewise.
446 (vorr_u64): Likewise.
447 (vorrq_s8): Likewise.
448 (vorrq_s16): Likewise.
449 (vorrq_s32): Likewise.
450 (vorrq_s64): Likewise.
451 (vorrq_u8): Likewise.
452 (vorrq_u16): Likewise.
453 (vorrq_u32): Likewise.
454 (vorrq_u64): Likewise.
455 (veor_s8): Likewise.
456 (veor_s16): Likewise.
457 (veor_s32): Likewise.
458 (veor_u8): Likewise.
459 (veor_u16): Likewise.
460 (veor_u32): Likewise.
461 (veor_s64): Likewise.
462 (veor_u64): Likewise.
463 (veorq_s8): Likewise.
464 (veorq_s16): Likewise.
465 (veorq_s32): Likewise.
466 (veorq_s64): Likewise.
467 (veorq_u8): Likewise.
468 (veorq_u16): Likewise.
469 (veorq_u32): Likewise.
470 (veorq_u64): Likewise.
471 (vbic_s8): Likewise.
472 (vbic_s16): Likewise.
473 (vbic_s32): Likewise.
474 (vbic_u8): Likewise.
475 (vbic_u16): Likewise.
476 (vbic_u32): Likewise.
477 (vbic_s64): Likewise.
478 (vbic_u64): Likewise.
479 (vbicq_s8): Likewise.
480 (vbicq_s16): Likewise.
481 (vbicq_s32): Likewise.
482 (vbicq_s64): Likewise.
483 (vbicq_u8): Likewise.
484 (vbicq_u16): Likewise.
485 (vbicq_u32): Likewise.
486 (vbicq_u64): Likewise.
487 (vorn_s8): Likewise.
488 (vorn_s16): Likewise.
489 (vorn_s32): Likewise.
490 (vorn_u8): Likewise.
491 (vorn_u16): Likewise.
492 (vorn_u32): Likewise.
493 (vorn_s64): Likewise.
494 (vorn_u64): Likewise.
495 (vornq_s8): Likewise.
496 (vornq_s16): Likewise.
497 (vornq_s32): Likewise.
498 (vornq_s64): Likewise.
499 (vornq_u8): Likewise.
500 (vornq_u16): Likewise.
501 (vornq_u32): Likewise.
502 (vornq_u64): Likewise.
504 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
506 Backport from trunk r210151.
507 2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
509 * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
510 vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
511 vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
512 vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
513 vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
514 vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
515 vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
516 vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
518 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
520 Backport from trunk r209794.
521 2014-04-25 Marek Polacek <polacek@redhat.com>
523 PR c/60114
524 * c-parser.c (c_parser_initelt): Pass input_location to
525 process_init_element.
526 (c_parser_initval): Pass loc to process_init_element.
527 * c-tree.h (process_init_element): Adjust declaration.
528 * c-typeck.c (push_init_level): Pass input_location to
529 process_init_element.
530 (pop_init_level): Likewise.
531 (set_designator): Likewise.
532 (output_init_element): Add location_t parameter. Pass loc to
533 digest_init.
534 (output_pending_init_elements): Pass input_location to
535 output_init_element.
536 (process_init_element): Add location_t parameter. Pass loc to
537 output_init_element.
539 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
541 Backport from trunk r211771.
542 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
544 * genattrtab.c (n_bypassed): New variable.
545 (process_bypasses): Initialise n_bypassed.
546 Count number of bypassed reservations.
547 (make_automaton_attrs): Allocate space for bypassed reservations
548 rather than number of bypasses.
550 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
552 Backport from trunk r210861.
553 2014-05-23 Jiong Wang <jiong.wang@arm.com>
555 * config/aarch64/predicates.md (aarch64_call_insn_operand): New
556 predicate.
557 * config/aarch64/constraints.md ("Ucs", "Usf"): New constraints.
558 * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
559 Adjust for tailcalling through registers.
560 * config/aarch64/aarch64.h (enum reg_class): New caller save
561 register class.
562 (REG_CLASS_NAMES): Likewise.
563 (REG_CLASS_CONTENTS): Likewise.
564 * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
565 Allow tailcalling without decls.
567 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
569 Backport from trunk r211314.
570 2014-06-06 James Greenhalgh <james.greenhalgh@arm.com>
572 * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
573 * config/aarch64/aarch64.c (aarch64_move_pointer): New.
574 (aarch64_progress_pointer): Likewise.
575 (aarch64_copy_one_part_and_move_pointers): Likewise.
576 (aarch64_expand_movmen): Likewise.
577 * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
578 * config/aarch64/aarch64.md (movmem<mode>): New.
580 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
582 Backport from trunk r211185, 211186.
583 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
585 * gcc/config/aarch64/aarch64-builtins.c
586 (aarch64_types_binop_uus_qualifiers,
587 aarch64_types_shift_to_unsigned_qualifiers,
588 aarch64_types_unsigned_shiftacc_qualifiers): Define.
589 * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
590 uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
591 sqshlu_n, uqshl_n): Update qualifiers.
592 * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
593 vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
594 vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
595 vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
596 vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
597 vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
598 vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
599 vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
600 vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
601 vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
602 vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
603 vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
604 vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
605 vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
606 vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
607 vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
608 vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
609 vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
610 vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
611 vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
612 vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
613 vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
614 vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
615 vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
616 vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
617 vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
618 vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
620 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
622 * gcc/config/aarch64/aarch64-builtins.c
623 (aarch64_types_binop_ssu_qualifiers): New static data.
624 (TYPES_BINOP_SSU): Define.
625 * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
626 urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
627 * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
628 vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
629 vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
630 vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
631 vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32, 52
632 vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64, 53
633 vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
634 suffix to builtin function name, remove cast. 55
635 (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
636 vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8, 57
637 vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
639 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
641 Backport from trunk r211408, 211416.
642 2014-06-10 Marcus Shawcroft <marcus.shawcroft@arm.com>
644 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
645 REG_CFA_RESTORE mode.
647 2014-06-10 Jiong Wang <jiong.wang@arm.com>
649 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
650 (aarch64_save_or_restore_callee_save_registers): Fix layout.
652 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
654 Backport from trunk r211418.
655 2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
657 * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
658 Change second alternative type to f_mcr.
659 * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
660 and 12th alternatives' types to f_mcr and f_mrc.
661 (*movdi_aarch64): Same for 12th and 13th alternatives.
662 (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
663 (aarch64_movtilow_tilow): Change type to fmov.
665 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
667 Backport from trunk r211371.
668 2014-06-09 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
670 * config/arm/arm-modes.def: Remove XFmode.
672 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
674 Backport from trunk r211268.
675 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
677 * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
678 layout comment.
680 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
682 Backport from trunk r211129.
683 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
685 PR target/61154
686 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
687 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
688 with immediate_operand.
690 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
692 Backport from trunk r211073.
693 2014-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
695 * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
696 to mov_imm.
697 * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
699 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
701 Backport from trunk r211050.
702 2014-05-29 Richard Earnshaw <rearnsha@arm.com>
703 Richard Sandiford <rdsandiford@googlemail.com>
705 * arm/iterators.md (shiftable_ops): New code iterator.
706 (t2_binop0, arith_shift_insn): New code attributes.
707 * arm/predicates.md (shift_nomul_operator): New predicate.
708 * arm/arm.md (insn_enabled): Delete.
709 (enabled): Remove insn_enabled test.
710 (*arith_shiftsi): Delete. Replace with ...
711 (*<arith_shift_insn>_multsi): ... new pattern.
712 (*<arith_shift_insn>_shiftsi): ... new pattern.
713 * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
715 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
717 Backport from trunk r210996.
718 2014-05-27 Andrew Pinski <apinski@cavium.com>
720 * config/aarch64/aarch64.md (stack_protect_set_<mode>):
721 Use <w> for the register in assembly template.
722 (stack_protect_test): Use the mode of operands[0] for the
723 result.
724 (stack_protect_test_<mode>): Use <w> for the register
725 in assembly template.
727 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
729 Backport from trunk r210967.
730 2014-05-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
732 * config/arm/neon.md (neon_bswap<mode>): New pattern.
733 * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
734 (arm_init_neon_builtins): Handle NEON_BSWAP.
735 Define required type nodes.
736 (arm_expand_neon_builtin): Handle NEON_BSWAP.
737 (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
738 * config/arm/arm_neon_builtins.def (bswap): Define builtins.
739 * config/arm/iterators.md (VDQHSD): New mode iterator.
741 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
743 Backport from trunk r210471.
744 2014-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
746 * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
747 enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
749 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
751 Backport from trunk r210369.
752 2014-05-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
754 * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
755 (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
756 Remove associated type declarations and initialisations.
757 (arm_expand_neon_builtin): Likewise.
758 (neon_emit_pair_result_insn): Delete.
759 * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
760 * config/arm/neon.md (neon_vtrn<mode>): Delete.
761 (neon_vzip<mode>): Likewise.
762 (neon_vuzp<mode>): Likewise.
764 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
766 Backport from trunk r211058, 211177.
767 2014-05-29 Alan Lawrence <alan.lawrence@arm.com>
769 * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
770 TYPES_BINOPV): New static data.
771 * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
772 * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
773 New patterns.
774 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
775 patterns for EXT.
776 (aarch64_evpc_ext): New function.
778 * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
780 * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
781 vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
782 vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
783 vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
784 vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
786 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
788 * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
789 location == 0.
791 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
793 Backport from trunk r209797.
794 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
796 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
797 Use HOST_WIDE_INT_C for mask literal.
798 (aarch_rev16_shleft_mask_imm_p): Likewise.
800 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
802 Backport from trunk r211148.
803 2014-06-02 Andrew Pinski <apinski@cavium.com>
805 * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
806 /lib/ld-linux32-aarch64.so.1 is used for ILP32.
807 (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
808 file whose name depends on -mabi= and -mbig-endian.
809 * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
810 better and handle ilp32 too.
811 (MULTILIB_OPTIONS): Delete.
812 (MULTILIB_DIRNAMES): Delete.
814 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
816 Backport from trunk r210828, r211103.
817 2014-05-31 Kugan Vivekanandarajah <kuganv@linaro.org>
819 * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
820 (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
821 (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
822 and __builtins_arm_get_fpscr.
823 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
824 __builtins_arm_get_fpscr.
825 (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
826 __builtins_arm_ldfpscr.
827 (arm_atomic_assign_expand_fenv): New function.
828 * config/arm/vfp.md (set_fpscr): New pattern.
829 (get_fpscr) : Likewise.
830 * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
831 VUNSPEC_SET_FPSCR.
832 * doc/extend.texi (AARCH64 Built-in Functions) : Document
833 __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
835 2014-05-23 Kugan Vivekanandarajah <kuganv@linaro.org>
837 * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
838 define.
839 * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
840 New function declaration.
841 * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
842 AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
843 AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
844 (aarch64_init_builtins) : Initialize builtins
845 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
846 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
847 (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
848 __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
849 and __builtins_aarch64_set_fpsr.
850 (aarch64_atomic_assign_expand_fenv): New function.
851 * config/aarch64/aarch64.md (set_fpcr): New pattern.
852 (get_fpcr) : Likewise.
853 (set_fpsr) : Likewise.
854 (get_fpsr) : Likewise.
855 (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
856 and UNSPECV_SET_FPSR.
857 * doc/extend.texi (AARCH64 Built-in Functions) : Document
858 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
859 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
861 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
863 Backport from trunk r210355.
864 2014-05-13 Ian Bolton <ian.bolton@arm.com>
866 * config/aarch64/aarch64-protos.h
867 (aarch64_hard_regno_caller_save_mode): New prototype.
868 * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
869 New function.
870 * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
872 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
874 Backport from trunk r209943.
875 2014-04-30 Alan Lawrence <alan.lawrence@arm.com>
877 * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
878 vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
879 vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
880 vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
881 vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
882 vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
883 vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
884 vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
886 2014-06-26 Yvan Roux <yvan.roux@linaro.org>
888 * LINARO-VERSION: Bump version.
890 2014-06-25 Yvan Roux <yvan.roux@linaro.org>
892 GCC Linaro 4.9-2014.06-1 released.
893 * LINARO-VERSION: Update.
895 2014-06-24 Yvan Roux <yvan.roux@linaro.org>
897 Revert:
898 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
900 Backport from trunk r209643.
901 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
903 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
905 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
907 Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
908 210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
909 210508, 210509, 210510, 210512, 211205, 211206.
910 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
912 * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
913 (cpu_addrcost_table): Use it.
914 * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
915 (aarch64_address_cost): Rewrite using aarch64_classify_address,
916 move it.
918 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
920 * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
921 (cortexa57_vector_cost): Likewise.
922 (cortexa57_tunings): Use them.
924 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
926 * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
927 (TARGET_RTX_COSTS): Call it.
929 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
930 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
932 * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
933 emit instructions, return number of instructions which would
934 be emitted.
935 (aarch64_add_constant): Update call to aarch64_build_constant.
936 (aarch64_output_mi_thunk): Likewise.
937 (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
938 a CONST_DOUBLE.
940 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
941 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
943 * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
944 to...
945 (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
946 well formed.
947 (aarch64_rtx_mult_cost): New.
948 (aarch64_rtx_costs): Use it, refactor as appropriate.
950 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
952 * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
954 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
955 Philip Tomsich <philipp.tomsich@theobroma-systems.com>
957 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
958 for SET RTX.
960 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
961 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
963 * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
964 costs when costing loads and stores to memory.
966 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
967 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
969 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
970 logical operations.
972 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
973 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
975 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
976 ZERO_EXTEND and SIGN_EXTEND better.
978 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
979 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
981 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
982 rotates and shifts.
984 2014-03-16 James Greenhalgh <james.greenhalgh@arm.com>
985 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
987 * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
988 (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
990 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
991 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
993 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
994 DIV/MOD.
996 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
997 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
999 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
1000 operators.
1002 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1003 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1005 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
1006 FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
1008 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1009 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1011 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
1013 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1015 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
1016 HIGH, LO_SUM.
1018 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1020 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
1021 where we were unable to cost an RTX.
1023 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1025 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
1027 2014-06-03 Andrew Pinski <apinski@cavium.com>
1029 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
1030 (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
1032 2014-06-03 Andrew Pinski <apinski@cavium.com>
1034 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
1035 comparisons for OP0.
1037 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
1039 * LINARO-VERSION: Bump version.
1041 2014-06-12 Yvan Roux <yvan.roux@linaro.org>
1043 GCC Linaro 4.9-2014.06 released.
1044 * LINARO-VERSION: Update.
1046 2014-06-04 Yvan Roux <yvan.roux@linaro.org>
1048 Backport from trunk r211211.
1049 2014-06-04 Bin Cheng <bin.cheng@arm.com>
1051 * config/aarch64/aarch64.c (aarch64_classify_address)
1052 (aarch64_legitimize_reload_address): Support full addressing modes
1053 for vector modes.
1054 * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
1055 (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
1057 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1059 Backport from trunk r209906.
1060 2014-04-29 Alan Lawrence <alan.lawrence@arm.com>
1062 * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
1063 vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
1064 vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
1065 vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
1066 vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
1067 vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
1068 vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
1069 vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
1071 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1073 Backport from trunk r209897.
1074 2014-04-29 James Greenhalgh <james.greenhalgh@arm.com>
1076 * calls.c (initialize_argument_information): Always treat
1077 PUSH_ARGS_REVERSED as 1, simplify code accordingly.
1078 (expand_call): Likewise.
1079 (emit_library_call_calue_1): Likewise.
1080 * expr.c (PUSH_ARGS_REVERSED): Do not define.
1081 (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
1082 code accordingly.
1084 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1086 Backport from trunk r209880.
1087 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
1089 * config/aarch64/aarch64-builtins.c
1090 (aarch64_types_storestruct_lane_qualifiers): New.
1091 (TYPES_STORESTRUCT_LANE): Likewise.
1092 * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
1093 (st3_lane): Likewise.
1094 (st4_lane): Likewise.
1095 * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
1096 (vec_store_lanesci_lane<mode>): Likewise.
1097 (vec_store_lanesxi_lane<mode>): Likewise.
1098 (aarch64_st2_lane<VQ:mode>): Likewise.
1099 (aarch64_st3_lane<VQ:mode>): Likewise.
1100 (aarch64_st4_lane<VQ:mode>): Likewise.
1101 * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
1102 * config/aarch64/arm_neon.h
1103 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
1104 use new macro arguments.
1105 (__ST3_LANE_FUNC): Likewise.
1106 (__ST4_LANE_FUNC): Likewise.
1107 * config/aarch64/iterators.md (V_TWO_ELEM): New.
1108 (V_THREE_ELEM): Likewise.
1109 (V_FOUR_ELEM): Likewise.
1111 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1113 Backport from trunk r209878.
1114 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
1116 * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
1117 * config/aarch64/aarch64.c
1118 (aarch64_cannot_change_mode_class): Weaken conditions.
1119 (aarch64_modes_tieable_p): New.
1120 * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
1122 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1124 Backport from trunk r209808.
1125 2014-04-25 Jiong Wang <jiong.wang@arm.com>
1127 * config/arm/predicates.md (call_insn_operand): Add long_call check.
1128 * config/arm/arm.md (sibcall, sibcall_value): Force the address to
1129 reg for long_call.
1130 * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
1131 restriction.
1133 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1135 Backport from trunk r209806.
1136 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1138 * config/arm/arm.c (arm_cortex_a8_tune): Initialise
1139 T16-related fields.
1141 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1143 Backport from trunk r209742, 209749.
1144 2014-04-24 Alan Lawrence <alan.lawrence@arm.com>
1146 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
1148 2014-04-24 Tejas Belagod <tejas.belagod@arm.com>
1150 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
1151 for big-endian.
1153 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1155 Backport from trunk r209736.
1156 2014-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1158 * config/aarch64/aarch64-builtins.c
1159 (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
1160 BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
1161 * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
1162 * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
1163 builtins.
1164 * config/aarch64/iterator.md (VDQHSD): New mode iterator.
1165 (Vrevsuff): New mode attribute.
1167 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1169 Backport from trunk r209712.
1170 2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
1172 * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
1173 (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
1174 machine descriptions for Stack Smashing Protector.
1176 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1178 Backport from trunk r209711.
1179 2014-04-23 Richard Earnshaw <rearnsha@arm.com>
1181 * aarch64.md (<optab>_rol<mode>3): New pattern.
1182 (<optab>_rolsi3_uxtw): Likewise.
1183 * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
1185 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1187 Backport from trunk r209710.
1188 2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
1190 * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
1191 (arm_cortex_a12_tune): Likewise.
1193 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1195 Backport from trunk r209706.
1196 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1198 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
1200 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1202 Backport from trunk r209701, 209702, 209703, 209704, 209705.
1203 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1205 * config/arm/arm.md (arm_rev16si2): New pattern.
1206 (arm_rev16si2_alt): Likewise.
1207 * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
1209 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1210 * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
1211 (rev16<mode>2_alt): Likewise.
1212 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
1213 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
1214 (aarch_rev16_shleft_mask_imm_p): Likewise.
1215 (aarch_rev16_p_1): Likewise.
1216 (aarch_rev16_p): Likewise.
1217 * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
1218 (aarch_rev16_shright_mask_imm_p): Likewise.
1219 (aarch_rev16_shleft_mask_imm_p): Likewise.
1221 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1223 * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
1224 * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
1225 rev cost.
1226 (cortex_a53_extra_costs): Likewise.
1227 (cortex_a57_extra_costs): Likewise.
1228 * config/arm/arm.c (cortexa9_extra_costs): Likewise.
1229 (cortexa7_extra_costs): Likewise.
1230 (cortexa8_extra_costs): Likewise.
1231 (cortexa12_extra_costs): Likewise.
1232 (cortexa15_extra_costs): Likewise.
1233 (v7m_extra_costs): Likewise.
1234 (arm_new_rtx_costs): Handle BSWAP.
1236 2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1238 * config/arm/arm.c (cortexa8_extra_costs): New table.
1239 (arm_cortex_a8_tune): New tuning struct.
1240 * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
1242 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1244 * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
1246 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1248 Backport from trunk r209659.
1249 2014-04-22 Richard Henderson <rth@redhat.com>
1251 * config/aarch64/aarch64 (addti3, subti3): New expanders.
1252 (add<GPI>3_compare0): Remove leading * from name.
1253 (add<GPI>3_carryin): Likewise.
1254 (sub<GPI>3_compare0): Likewise.
1255 (sub<GPI>3_carryin): Likewise.
1256 (<su_optab>mulditi3): New expander.
1257 (multi3): New expander.
1258 (madd<GPI>): Remove leading * from name.
1260 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1262 Backport from trunk r209645.
1263 2014-04-22 Andrew Pinski <apinski@cavium.com>
1265 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1266 Handle TLS for ILP32.
1267 * config/aarch64/aarch64.md (tlsie_small): Rename to ...
1268 (tlsie_small_<mode>): this and handle PTR.
1269 (tlsie_small_sidi): New pattern.
1270 (tlsle_small): Change to an expand to handle ILP32.
1271 (tlsle_small_<mode>): New pattern.
1272 (tlsdesc_small): Rename to ...
1273 (tlsdesc_small_<mode>): this and handle PTR.
1275 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1277 Backport from trunk r209643.
1278 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1280 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1282 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1284 Backport from trunk r209641, 209642.
1285 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1287 * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1288 (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
1289 (aarch64_types_signed_poly_qualifiers): Likewise.
1290 (aarch64_types_unsigned_signed_qualifiers): Likewise.
1291 (aarch64_types_poly_signed_qualifiers): Likewise.
1292 (TYPES_REINTERP_SS): Type macro added.
1293 (TYPES_REINTERP_SU): Likewise.
1294 (TYPES_REINTERP_SP): Likewise.
1295 (TYPES_REINTERP_US): Likewise.
1296 (TYPES_REINTERP_PS): Likewise.
1297 (aarch64_fold_builtin): New expression folding added.
1298 * config/aarch64/aarch64-simd-builtins.def (REINTERP):
1299 Declarations removed.
1300 (REINTERP_SS): Declarations added.
1301 (REINTERP_US): Likewise.
1302 (REINTERP_PS): Likewise.
1303 (REINTERP_SU): Likewise.
1304 (REINTERP_SP): Likewise.
1305 * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
1306 (vreinterpretq_p8_f64): Likewise.
1307 (vreinterpret_p16_f64): Likewise.
1308 (vreinterpretq_p16_f64): Likewise.
1309 (vreinterpret_f32_f64): Likewise.
1310 (vreinterpretq_f32_f64): Likewise.
1311 (vreinterpret_f64_f32): Likewise.
1312 (vreinterpret_f64_p8): Likewise.
1313 (vreinterpret_f64_p16): Likewise.
1314 (vreinterpret_f64_s8): Likewise.
1315 (vreinterpret_f64_s16): Likewise.
1316 (vreinterpret_f64_s32): Likewise.
1317 (vreinterpret_f64_s64): Likewise.
1318 (vreinterpret_f64_u8): Likewise.
1319 (vreinterpret_f64_u16): Likewise.
1320 (vreinterpret_f64_u32): Likewise.
1321 (vreinterpret_f64_u64): Likewise.
1322 (vreinterpretq_f64_f32): Likewise.
1323 (vreinterpretq_f64_p8): Likewise.
1324 (vreinterpretq_f64_p16): Likewise.
1325 (vreinterpretq_f64_s8): Likewise.
1326 (vreinterpretq_f64_s16): Likewise.
1327 (vreinterpretq_f64_s32): Likewise.
1328 (vreinterpretq_f64_s64): Likewise.
1329 (vreinterpretq_f64_u8): Likewise.
1330 (vreinterpretq_f64_u16): Likewise.
1331 (vreinterpretq_f64_u32): Likewise.
1332 (vreinterpretq_f64_u64): Likewise.
1333 (vreinterpret_s64_f64): Likewise.
1334 (vreinterpretq_s64_f64): Likewise.
1335 (vreinterpret_u64_f64): Likewise.
1336 (vreinterpretq_u64_f64): Likewise.
1337 (vreinterpret_s8_f64): Likewise.
1338 (vreinterpretq_s8_f64): Likewise.
1339 (vreinterpret_s16_f64): Likewise.
1340 (vreinterpretq_s16_f64): Likewise.
1341 (vreinterpret_s32_f64): Likewise.
1342 (vreinterpretq_s32_f64): Likewise.
1343 (vreinterpret_u8_f64): Likewise.
1344 (vreinterpretq_u8_f64): Likewise.
1345 (vreinterpret_u16_f64): Likewise.
1346 (vreinterpretq_u16_f64): Likewise.
1347 (vreinterpret_u32_f64): Likewise.
1348 (vreinterpretq_u32_f64): Likewise.
1350 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1352 * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1353 * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
1354 (vreinterpret_p8_s8): Likewise.
1355 * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
1356 (vreinterpret_p8_s16): Likewise.
1357 (vreinterpret_p8_s32): Likewise.
1358 (vreinterpret_p8_s64): Likewise.
1359 (vreinterpret_p8_f32): Likewise.
1360 (vreinterpret_p8_u8): Likewise.
1361 (vreinterpret_p8_u16): Likewise.
1362 (vreinterpret_p8_u32): Likewise.
1363 (vreinterpret_p8_u64): Likewise.
1364 (vreinterpret_p8_p16): Likewise.
1365 (vreinterpretq_p8_s8): Likewise.
1366 (vreinterpretq_p8_s16): Likewise.
1367 (vreinterpretq_p8_s32): Likewise.
1368 (vreinterpretq_p8_s64): Likewise.
1369 (vreinterpretq_p8_f32): Likewise.
1370 (vreinterpretq_p8_u8): Likewise.
1371 (vreinterpretq_p8_u16): Likewise.
1372 (vreinterpretq_p8_u32): Likewise.
1373 (vreinterpretq_p8_u64): Likewise.
1374 (vreinterpretq_p8_p16): Likewise.
1375 (vreinterpret_p16_s8): Likewise.
1376 (vreinterpret_p16_s16): Likewise.
1377 (vreinterpret_p16_s32): Likewise.
1378 (vreinterpret_p16_s64): Likewise.
1379 (vreinterpret_p16_f32): Likewise.
1380 (vreinterpret_p16_u8): Likewise.
1381 (vreinterpret_p16_u16): Likewise.
1382 (vreinterpret_p16_u32): Likewise.
1383 (vreinterpret_p16_u64): Likewise.
1384 (vreinterpret_p16_p8): Likewise.
1385 (vreinterpretq_p16_s8): Likewise.
1386 (vreinterpretq_p16_s16): Likewise.
1387 (vreinterpretq_p16_s32): Likewise.
1388 (vreinterpretq_p16_s64): Likewise.
1389 (vreinterpretq_p16_f32): Likewise.
1390 (vreinterpretq_p16_u8): Likewise.
1391 (vreinterpretq_p16_u16): Likewise.
1392 (vreinterpretq_p16_u32): Likewise.
1393 (vreinterpretq_p16_u64): Likewise.
1394 (vreinterpretq_p16_p8): Likewise.
1395 (vreinterpret_f32_s8): Likewise.
1396 (vreinterpret_f32_s16): Likewise.
1397 (vreinterpret_f32_s32): Likewise.
1398 (vreinterpret_f32_s64): Likewise.
1399 (vreinterpret_f32_u8): Likewise.
1400 (vreinterpret_f32_u16): Likewise.
1401 (vreinterpret_f32_u32): Likewise.
1402 (vreinterpret_f32_u64): Likewise.
1403 (vreinterpret_f32_p8): Likewise.
1404 (vreinterpret_f32_p16): Likewise.
1405 (vreinterpretq_f32_s8): Likewise.
1406 (vreinterpretq_f32_s16): Likewise.
1407 (vreinterpretq_f32_s32): Likewise.
1408 (vreinterpretq_f32_s64): Likewise.
1409 (vreinterpretq_f32_u8): Likewise.
1410 (vreinterpretq_f32_u16): Likewise.
1411 (vreinterpretq_f32_u32): Likewise.
1412 (vreinterpretq_f32_u64): Likewise.
1413 (vreinterpretq_f32_p8): Likewise.
1414 (vreinterpretq_f32_p16): Likewise.
1415 (vreinterpret_s64_s8): Likewise.
1416 (vreinterpret_s64_s16): Likewise.
1417 (vreinterpret_s64_s32): Likewise.
1418 (vreinterpret_s64_f32): Likewise.
1419 (vreinterpret_s64_u8): Likewise.
1420 (vreinterpret_s64_u16): Likewise.
1421 (vreinterpret_s64_u32): Likewise.
1422 (vreinterpret_s64_u64): Likewise.
1423 (vreinterpret_s64_p8): Likewise.
1424 (vreinterpret_s64_p16): Likewise.
1425 (vreinterpretq_s64_s8): Likewise.
1426 (vreinterpretq_s64_s16): Likewise.
1427 (vreinterpretq_s64_s32): Likewise.
1428 (vreinterpretq_s64_f32): Likewise.
1429 (vreinterpretq_s64_u8): Likewise.
1430 (vreinterpretq_s64_u16): Likewise.
1431 (vreinterpretq_s64_u32): Likewise.
1432 (vreinterpretq_s64_u64): Likewise.
1433 (vreinterpretq_s64_p8): Likewise.
1434 (vreinterpretq_s64_p16): Likewise.
1435 (vreinterpret_u64_s8): Likewise.
1436 (vreinterpret_u64_s16): Likewise.
1437 (vreinterpret_u64_s32): Likewise.
1438 (vreinterpret_u64_s64): Likewise.
1439 (vreinterpret_u64_f32): Likewise.
1440 (vreinterpret_u64_u8): Likewise.
1441 (vreinterpret_u64_u16): Likewise.
1442 (vreinterpret_u64_u32): Likewise.
1443 (vreinterpret_u64_p8): Likewise.
1444 (vreinterpret_u64_p16): Likewise.
1445 (vreinterpretq_u64_s8): Likewise.
1446 (vreinterpretq_u64_s16): Likewise.
1447 (vreinterpretq_u64_s32): Likewise.
1448 (vreinterpretq_u64_s64): Likewise.
1449 (vreinterpretq_u64_f32): Likewise.
1450 (vreinterpretq_u64_u8): Likewise.
1451 (vreinterpretq_u64_u16): Likewise.
1452 (vreinterpretq_u64_u32): Likewise.
1453 (vreinterpretq_u64_p8): Likewise.
1454 (vreinterpretq_u64_p16): Likewise.
1455 (vreinterpret_s8_s16): Likewise.
1456 (vreinterpret_s8_s32): Likewise.
1457 (vreinterpret_s8_s64): Likewise.
1458 (vreinterpret_s8_f32): Likewise.
1459 (vreinterpret_s8_u8): Likewise.
1460 (vreinterpret_s8_u16): Likewise.
1461 (vreinterpret_s8_u32): Likewise.
1462 (vreinterpret_s8_u64): Likewise.
1463 (vreinterpret_s8_p8): Likewise.
1464 (vreinterpret_s8_p16): Likewise.
1465 (vreinterpretq_s8_s16): Likewise.
1466 (vreinterpretq_s8_s32): Likewise.
1467 (vreinterpretq_s8_s64): Likewise.
1468 (vreinterpretq_s8_f32): Likewise.
1469 (vreinterpretq_s8_u8): Likewise.
1470 (vreinterpretq_s8_u16): Likewise.
1471 (vreinterpretq_s8_u32): Likewise.
1472 (vreinterpretq_s8_u64): Likewise.
1473 (vreinterpretq_s8_p8): Likewise.
1474 (vreinterpretq_s8_p16): Likewise.
1475 (vreinterpret_s16_s8): Likewise.
1476 (vreinterpret_s16_s32): Likewise.
1477 (vreinterpret_s16_s64): Likewise.
1478 (vreinterpret_s16_f32): Likewise.
1479 (vreinterpret_s16_u8): Likewise.
1480 (vreinterpret_s16_u16): Likewise.
1481 (vreinterpret_s16_u32): Likewise.
1482 (vreinterpret_s16_u64): Likewise.
1483 (vreinterpret_s16_p8): Likewise.
1484 (vreinterpret_s16_p16): Likewise.
1485 (vreinterpretq_s16_s8): Likewise.
1486 (vreinterpretq_s16_s32): Likewise.
1487 (vreinterpretq_s16_s64): Likewise.
1488 (vreinterpretq_s16_f32): Likewise.
1489 (vreinterpretq_s16_u8): Likewise.
1490 (vreinterpretq_s16_u16): Likewise.
1491 (vreinterpretq_s16_u32): Likewise.
1492 (vreinterpretq_s16_u64): Likewise.
1493 (vreinterpretq_s16_p8): Likewise.
1494 (vreinterpretq_s16_p16): Likewise.
1495 (vreinterpret_s32_s8): Likewise.
1496 (vreinterpret_s32_s16): Likewise.
1497 (vreinterpret_s32_s64): Likewise.
1498 (vreinterpret_s32_f32): Likewise.
1499 (vreinterpret_s32_u8): Likewise.
1500 (vreinterpret_s32_u16): Likewise.
1501 (vreinterpret_s32_u32): Likewise.
1502 (vreinterpret_s32_u64): Likewise.
1503 (vreinterpret_s32_p8): Likewise.
1504 (vreinterpret_s32_p16): Likewise.
1505 (vreinterpretq_s32_s8): Likewise.
1506 (vreinterpretq_s32_s16): Likewise.
1507 (vreinterpretq_s32_s64): Likewise.
1508 (vreinterpretq_s32_f32): Likewise.
1509 (vreinterpretq_s32_u8): Likewise.
1510 (vreinterpretq_s32_u16): Likewise.
1511 (vreinterpretq_s32_u32): Likewise.
1512 (vreinterpretq_s32_u64): Likewise.
1513 (vreinterpretq_s32_p8): Likewise.
1514 (vreinterpretq_s32_p16): Likewise.
1515 (vreinterpret_u8_s8): Likewise.
1516 (vreinterpret_u8_s16): Likewise.
1517 (vreinterpret_u8_s32): Likewise.
1518 (vreinterpret_u8_s64): Likewise.
1519 (vreinterpret_u8_f32): Likewise.
1520 (vreinterpret_u8_u16): Likewise.
1521 (vreinterpret_u8_u32): Likewise.
1522 (vreinterpret_u8_u64): Likewise.
1523 (vreinterpret_u8_p8): Likewise.
1524 (vreinterpret_u8_p16): Likewise.
1525 (vreinterpretq_u8_s8): Likewise.
1526 (vreinterpretq_u8_s16): Likewise.
1527 (vreinterpretq_u8_s32): Likewise.
1528 (vreinterpretq_u8_s64): Likewise.
1529 (vreinterpretq_u8_f32): Likewise.
1530 (vreinterpretq_u8_u16): Likewise.
1531 (vreinterpretq_u8_u32): Likewise.
1532 (vreinterpretq_u8_u64): Likewise.
1533 (vreinterpretq_u8_p8): Likewise.
1534 (vreinterpretq_u8_p16): Likewise.
1535 (vreinterpret_u16_s8): Likewise.
1536 (vreinterpret_u16_s16): Likewise.
1537 (vreinterpret_u16_s32): Likewise.
1538 (vreinterpret_u16_s64): Likewise.
1539 (vreinterpret_u16_f32): Likewise.
1540 (vreinterpret_u16_u8): Likewise.
1541 (vreinterpret_u16_u32): Likewise.
1542 (vreinterpret_u16_u64): Likewise.
1543 (vreinterpret_u16_p8): Likewise.
1544 (vreinterpret_u16_p16): Likewise.
1545 (vreinterpretq_u16_s8): Likewise.
1546 (vreinterpretq_u16_s16): Likewise.
1547 (vreinterpretq_u16_s32): Likewise.
1548 (vreinterpretq_u16_s64): Likewise.
1549 (vreinterpretq_u16_f32): Likewise.
1550 (vreinterpretq_u16_u8): Likewise.
1551 (vreinterpretq_u16_u32): Likewise.
1552 (vreinterpretq_u16_u64): Likewise.
1553 (vreinterpretq_u16_p8): Likewise.
1554 (vreinterpretq_u16_p16): Likewise.
1555 (vreinterpret_u32_s8): Likewise.
1556 (vreinterpret_u32_s16): Likewise.
1557 (vreinterpret_u32_s32): Likewise.
1558 (vreinterpret_u32_s64): Likewise.
1559 (vreinterpret_u32_f32): Likewise.
1560 (vreinterpret_u32_u8): Likewise.
1561 (vreinterpret_u32_u16): Likewise.
1562 (vreinterpret_u32_u64): Likewise.
1563 (vreinterpret_u32_p8): Likewise.
1564 (vreinterpret_u32_p16): Likewise.
1565 (vreinterpretq_u32_s8): Likewise.
1566 (vreinterpretq_u32_s16): Likewise.
1567 (vreinterpretq_u32_s32): Likewise.
1568 (vreinterpretq_u32_s64): Likewise.
1569 (vreinterpretq_u32_f32): Likewise.
1570 (vreinterpretq_u32_u8): Likewise.
1571 (vreinterpretq_u32_u16): Likewise.
1572 (vreinterpretq_u32_u64): Likewise.
1573 (vreinterpretq_u32_p8): Likewise.
1574 (vreinterpretq_u32_p16): Likewise.
1576 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1578 Backport from trunk r209640.
1579 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1581 * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
1582 Pattern extended.
1583 * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
1584 extended.
1585 (sqabs): Likewise.
1586 * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
1587 (vqnegd_s64): Likewise.
1588 (vqabs_s64): Likewise.
1589 (vqabsd_s64): Likewise.
1591 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1593 Backport from trunk r209627, 209636.
1594 2014-04-22 Renlin <renlin.li@arm.com>
1595 Jiong Wang <jiong.wang@arm.com>
1597 * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
1598 * config/aarch64/aarch64.c (aarch64_layout_frame)
1599 (aarch64_initial_elimination_offset): Likewise.
1601 2014-04-22 Marcus Shawcroft <marcus.shawcroft@arm.com>
1603 * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
1604 Fix indentation.
1606 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1608 Backport from trunk r209618.
1609 2014-04-22 Renlin Li <Renlin.Li@arm.com>
1611 * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
1612 the output asm format.
1614 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1616 Backport from trunk r209617.
1617 2014-04-22 James Greenhalgh <james.greenhalgh@arm.com>
1619 * config/aarch64/aarch64-simd.md
1620 (aarch64_cm<optab>di): Always split.
1621 (*aarch64_cm<optab>di): New.
1622 (aarch64_cmtstdi): Always split.
1623 (*aarch64_cmtstdi): New.
1625 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1627 Backport from trunk r209615.
1628 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1630 * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
1631 restrictions on core registers for DImode values in Thumb2.
1633 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1635 Backport from trunk r209613, r209614.
1636 2014-04-22 Ian Bolton <ian.bolton@arm.com>
1638 * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
1639 * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
1641 2014-04-22 Ian Bolton <ian.bolton@arm.com>
1643 * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
1644 (*iordi_notzesidi_di): Likewise.
1645 (*iordi_notsesidi_di): Likewise.
1647 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1649 Backport from trunk r209561.
1650 2014-04-22 Ian Bolton <ian.bolton@arm.com>
1652 * config/arm/arm-protos.h (tune_params): New struct members.
1653 * config/arm/arm.c: Initialise tune_params per processor.
1654 (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
1655 for speed, based on new tune_params.
1657 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1659 Backport from trunk r209559.
1660 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1662 * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
1663 added.
1664 * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
1665 macro.
1666 * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
1667 corrected.
1668 * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
1669 * config/aarch64/arm_neon.h (vrnd_f64): Added.
1670 (vrnda_f64): Likewise.
1671 (vrndi_f64): Likewise.
1672 (vrndm_f64): Likewise.
1673 (vrndn_f64): Likewise.
1674 (vrndp_f64): Likewise.
1675 (vrndx_f64): Likewise.
1677 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1679 Backport from trunk r209419.
1680 2014-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1682 PR rtl-optimization/60663
1683 * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
1684 avoid 0 cost.
1686 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1688 Backport from trunk r209457.
1689 2014-04-16 Andrew Pinski <apinski@cavium.com>
1691 * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
1692 definition.
1694 2014-05-19 Yvan Roux <yvan.roux@linaro.org>
1696 * LINARO-VERSION: Bump version.
1698 2014-05-14 Yvan Roux <yvan.roux@linaro.org>
1699 GCC Linaro 4.9-2014.05 released.
1700 * LINARO-VERSION: Update.
1702 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
1704 Backport from trunk r209889.
1705 2014-04-29 Zhenqiang Chen <zhenqiang.chen@linaro.org>
1707 * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
1709 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
1711 Backport from trunk r209556.
1712 2014-04-22 Zhenqiang Chen <zhenqiang.chen@linaro.org>
1714 * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
1715 GET_MODE_SIZE argument is enum machine_mode.
1717 2014-04-28 Yvan Roux <yvan.roux@linaro.org>
1719 * LINARO-VERSION: Bump version.
1721 2014-04-22 Yvan Roux <yvan.roux@linaro.org>
1723 GCC Linaro 4.9-2014.04 released.
1724 * LINARO-VERSION: New file.
1725 * configure.ac: Add Linaro version string.