1 /* Copyright (C
) 2011-2016 Free Software Foundation
, Inc.
2 Contributed by ARM Ltd.
4 This file is part of GCC.
6 GCC is free software
; you can redistribute it and
/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation
; either version
3, or (at your option
)
11 GCC is distributed in the hope that it will be useful
, but
12 WITHOUT ANY WARRANTY
; without even the implied warranty of
13 MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC
; see the file COPYING3. If not see
18 <http
://www.gnu.org
/licenses
/>.
*/
20 /* This is a list of cores that implement AArch64.
22 Before using #include to read this file
, define a macro
:
24 AARCH64_CORE(CORE_NAME
, CORE_IDENT
, SCHEDULER_IDENT
, ARCH_IDENT
, FLAGS
, COSTS
, IMP
, PART
)
26 The CORE_NAME is the name of the core
, represented as a string constant.
27 The CORE_IDENT is the name of the core
, represented as an identifier.
28 The SCHEDULER_IDENT is the name of the core for which scheduling decisions
29 will be made
, represented as an identifier.
30 ARCH_IDENT is the architecture implemented by the chip as specified in
32 FLAGS are the bitwise
-or of the traits that apply to that core.
33 This need not include flags implied by the architecture.
34 COSTS is the name of the rtx_costs routine to use.
35 IMP is the implementer ID of the CPU vendor. On a GNU
/Linux system it
36 can be found in
/proc
/cpuinfo. A partial list of implementer IDs is
37 given in the ARM Architecture Reference Manual ARMv8
, for
38 ARMv8
-A architecture profile.
39 PART is the part number of the CPU. On a GNU
/Linux system it can be
40 found in
/proc
/cpuinfo. For big.LITTLE systems this should use the
41 macro AARCH64_BIG_LITTLE where the big part number comes as the first
42 argument to the macro and little is the second.
*/
44 /* V8 Architecture Processors.
*/
46 /* ARM ('A') cores.
*/
47 AARCH64_CORE("cortex-a35", cortexa35
, cortexa53
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa35
, 0x41, 0xd04)
48 AARCH64_CORE("cortex-a53", cortexa53
, cortexa53
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa53
, 0x41, 0xd03)
49 AARCH64_CORE("cortex-a57", cortexa57
, cortexa57
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa57
, 0x41, 0xd07)
50 AARCH64_CORE("cortex-a72", cortexa72
, cortexa57
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa72
, 0x41, 0xd08)
51 AARCH64_CORE("cortex-a73", cortexa73
, cortexa57
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa73
, 0x41, 0xd09)
53 /* Samsung ('S') cores.
*/
54 AARCH64_CORE("exynos-m1", exynosm1
, exynosm1
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO
, exynosm1
, 0x53, 0x001)
56 /* Qualcomm ('Q') cores.
*/
57 AARCH64_CORE("qdf24xx", qdf24xx
, cortexa57
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO
, qdf24xx
, 0x51, 0x800)
59 /* Cavium ('C') cores.
*/
60 AARCH64_CORE("thunderx", thunderx
, thunderx
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO
, thunderx
, 0x43, 0x0a1)
62 /* APM ('P') cores.
*/
63 AARCH64_CORE("xgene1", xgene1
, xgene1
, 8A
, AARCH64_FL_FOR_ARCH8
, xgene1
, 0x50, 0x000)
65 /* V8.1 Architecture Processors.
*/
67 /* Broadcom ('B') cores.
*/
68 AARCH64_CORE("vulcan", vulcan
, cortexa57
, 8_1A
, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO
, vulcan
, 0x42, 0x516)
70 /* V8 big.LITTLE implementations.
*/
72 AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53
, cortexa53
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa57
, 0x41, AARCH64_BIG_LITTLE (0xd07, 0xd03))
73 AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53
, cortexa53
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa72
, 0x41, AARCH64_BIG_LITTLE (0xd08, 0xd03))
74 AARCH64_CORE("cortex-a73.cortex-a35", cortexa73cortexa35
, cortexa53
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa73
, 0x41, AARCH64_BIG_LITTLE (0xd09, 0xd04))
75 AARCH64_CORE("cortex-a73.cortex-a53", cortexa73cortexa53
, cortexa53
, 8A
, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC
, cortexa73
, 0x41, AARCH64_BIG_LITTLE (0xd09, 0xd03))