2012-11-19 Mans Rullgard <mans@mansr.com>
[official-gcc.git] / gcc / reg-stack.c
blob0f48000b5e148ef95a49ee440552a5252d4f3a13
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010, 2011, 2012
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
72 * Methodology:
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
78 * asm_operands:
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl-error.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "recog.h"
167 #include "basic-block.h"
168 #include "reload.h"
169 #include "ggc.h"
170 #include "tree-pass.h"
171 #include "target.h"
172 #include "df.h"
173 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
175 #ifdef STACK_REGS
177 /* We use this array to cache info about insns, because otherwise we
178 spend too much time in stack_regs_mentioned_p.
180 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
181 the insn uses stack registers, two indicates the insn does not use
182 stack registers. */
183 static vec<char> stack_regs_mentioned_data;
185 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
187 int regstack_completed = 0;
189 /* This is the basic stack record. TOP is an index into REG[] such
190 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
192 If TOP is -2, REG[] is not yet initialized. Stack initialization
193 consists of placing each live reg in array `reg' and setting `top'
194 appropriately.
196 REG_SET indicates which registers are live. */
198 typedef struct stack_def
200 int top; /* index to top stack element */
201 HARD_REG_SET reg_set; /* set of live registers */
202 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
203 } *stack_ptr;
205 /* This is used to carry information about basic blocks. It is
206 attached to the AUX field of the standard CFG block. */
208 typedef struct block_info_def
210 struct stack_def stack_in; /* Input stack configuration. */
211 struct stack_def stack_out; /* Output stack configuration. */
212 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
213 int done; /* True if block already converted. */
214 int predecessors; /* Number of predecessors that need
215 to be visited. */
216 } *block_info;
218 #define BLOCK_INFO(B) ((block_info) (B)->aux)
220 /* Passed to change_stack to indicate where to emit insns. */
221 enum emit_where
223 EMIT_AFTER,
224 EMIT_BEFORE
227 /* The block we're currently working on. */
228 static basic_block current_block;
230 /* In the current_block, whether we're processing the first register
231 stack or call instruction, i.e. the regstack is currently the
232 same as BLOCK_INFO(current_block)->stack_in. */
233 static bool starting_stack_p;
235 /* This is the register file for all register after conversion. */
236 static rtx
237 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
239 #define FP_MODE_REG(regno,mode) \
240 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
242 /* Used to initialize uninitialized registers. */
243 static rtx not_a_num;
245 /* Forward declarations */
247 static int stack_regs_mentioned_p (const_rtx pat);
248 static void pop_stack (stack_ptr, int);
249 static rtx *get_true_reg (rtx *);
251 static int check_asm_stack_operands (rtx);
252 static void get_asm_operands_in_out (rtx, int *, int *);
253 static rtx stack_result (tree);
254 static void replace_reg (rtx *, int);
255 static void remove_regno_note (rtx, enum reg_note, unsigned int);
256 static int get_hard_regnum (stack_ptr, rtx);
257 static rtx emit_pop_insn (rtx, stack_ptr, rtx, enum emit_where);
258 static void swap_to_top(rtx, stack_ptr, rtx, rtx);
259 static bool move_for_stack_reg (rtx, stack_ptr, rtx);
260 static bool move_nan_for_stack_reg (rtx, stack_ptr, rtx);
261 static int swap_rtx_condition_1 (rtx);
262 static int swap_rtx_condition (rtx);
263 static void compare_for_stack_reg (rtx, stack_ptr, rtx);
264 static bool subst_stack_regs_pat (rtx, stack_ptr, rtx);
265 static void subst_asm_stack_regs (rtx, stack_ptr);
266 static bool subst_stack_regs (rtx, stack_ptr);
267 static void change_stack (rtx, stack_ptr, stack_ptr, enum emit_where);
268 static void print_stack (FILE *, stack_ptr);
269 static rtx next_flags_user (rtx);
271 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
273 static int
274 stack_regs_mentioned_p (const_rtx pat)
276 const char *fmt;
277 int i;
279 if (STACK_REG_P (pat))
280 return 1;
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
285 if (fmt[i] == 'E')
287 int j;
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
291 return 1;
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
294 return 1;
297 return 0;
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303 stack_regs_mentioned (const_rtx insn)
305 unsigned int uid, max;
306 int test;
308 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
309 return 0;
311 uid = INSN_UID (insn);
312 max = stack_regs_mentioned_data.length ();
313 if (uid >= max)
315 /* Allocate some extra size to avoid too many reallocs, but
316 do not grow too quickly. */
317 max = uid + uid / 20 + 1;
318 stack_regs_mentioned_data.safe_grow_cleared (max);
321 test = stack_regs_mentioned_data[uid];
322 if (test == 0)
324 /* This insn has yet to be examined. Do so now. */
325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
326 stack_regs_mentioned_data[uid] = test;
329 return test == 1;
332 static rtx ix86_flags_rtx;
334 static rtx
335 next_flags_user (rtx insn)
337 /* Search forward looking for the first use of this value.
338 Stop at block boundaries. */
340 while (insn != BB_END (current_block))
342 insn = NEXT_INSN (insn);
344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
345 return insn;
347 if (CALL_P (insn))
348 return NULL_RTX;
350 return NULL_RTX;
353 /* Reorganize the stack into ascending numbers, before this insn. */
355 static void
356 straighten_stack (rtx insn, stack_ptr regstack)
358 struct stack_def temp_stack;
359 int top;
361 /* If there is only a single register on the stack, then the stack is
362 already in increasing order and no reorganization is needed.
364 Similarly if the stack is empty. */
365 if (regstack->top <= 0)
366 return;
368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
370 for (top = temp_stack.top = regstack->top; top >= 0; top--)
371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
373 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
376 /* Pop a register from the stack. */
378 static void
379 pop_stack (stack_ptr regstack, int regno)
381 int top = regstack->top;
383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
384 regstack->top--;
385 /* If regno was not at the top of stack then adjust stack. */
386 if (regstack->reg [top] != regno)
388 int i;
389 for (i = regstack->top; i >= 0; i--)
390 if (regstack->reg [i] == regno)
392 int j;
393 for (j = i; j < top; j++)
394 regstack->reg [j] = regstack->reg [j + 1];
395 break;
400 /* Return a pointer to the REG expression within PAT. If PAT is not a
401 REG, possible enclosed by a conversion rtx, return the inner part of
402 PAT that stopped the search. */
404 static rtx *
405 get_true_reg (rtx *pat)
407 for (;;)
408 switch (GET_CODE (*pat))
410 case SUBREG:
411 /* Eliminate FP subregister accesses in favor of the
412 actual FP register in use. */
414 rtx subreg;
415 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
417 int regno_off = subreg_regno_offset (REGNO (subreg),
418 GET_MODE (subreg),
419 SUBREG_BYTE (*pat),
420 GET_MODE (*pat));
421 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
422 GET_MODE (subreg));
423 return pat;
426 case FLOAT:
427 case FIX:
428 case FLOAT_EXTEND:
429 pat = & XEXP (*pat, 0);
430 break;
432 case UNSPEC:
433 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
434 || XINT (*pat, 1) == UNSPEC_LDA)
435 pat = & XVECEXP (*pat, 0, 0);
436 return pat;
438 case FLOAT_TRUNCATE:
439 if (!flag_unsafe_math_optimizations)
440 return pat;
441 pat = & XEXP (*pat, 0);
442 break;
444 default:
445 return pat;
449 /* Set if we find any malformed asms in a block. */
450 static bool any_malformed_asm;
452 /* There are many rules that an asm statement for stack-like regs must
453 follow. Those rules are explained at the top of this file: the rule
454 numbers below refer to that explanation. */
456 static int
457 check_asm_stack_operands (rtx insn)
459 int i;
460 int n_clobbers;
461 int malformed_asm = 0;
462 rtx body = PATTERN (insn);
464 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
465 char implicitly_dies[FIRST_PSEUDO_REGISTER];
466 int alt;
468 rtx *clobber_reg = 0;
469 int n_inputs, n_outputs;
471 /* Find out what the constraints require. If no constraint
472 alternative matches, this asm is malformed. */
473 extract_insn (insn);
474 constrain_operands (1);
475 alt = which_alternative;
477 preprocess_constraints ();
479 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
481 if (alt < 0)
483 malformed_asm = 1;
484 /* Avoid further trouble with this insn. */
485 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
486 return 0;
489 /* Strip SUBREGs here to make the following code simpler. */
490 for (i = 0; i < recog_data.n_operands; i++)
491 if (GET_CODE (recog_data.operand[i]) == SUBREG
492 && REG_P (SUBREG_REG (recog_data.operand[i])))
493 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
495 /* Set up CLOBBER_REG. */
497 n_clobbers = 0;
499 if (GET_CODE (body) == PARALLEL)
501 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
503 for (i = 0; i < XVECLEN (body, 0); i++)
504 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
506 rtx clobber = XVECEXP (body, 0, i);
507 rtx reg = XEXP (clobber, 0);
509 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
510 reg = SUBREG_REG (reg);
512 if (STACK_REG_P (reg))
514 clobber_reg[n_clobbers] = reg;
515 n_clobbers++;
520 /* Enforce rule #4: Output operands must specifically indicate which
521 reg an output appears in after an asm. "=f" is not allowed: the
522 operand constraints must select a class with a single reg.
524 Also enforce rule #5: Output operands must start at the top of
525 the reg-stack: output operands may not "skip" a reg. */
527 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
528 for (i = 0; i < n_outputs; i++)
529 if (STACK_REG_P (recog_data.operand[i]))
531 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
533 error_for_asm (insn, "output constraint %d must specify a single register", i);
534 malformed_asm = 1;
536 else
538 int j;
540 for (j = 0; j < n_clobbers; j++)
541 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
543 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
544 i, reg_names [REGNO (clobber_reg[j])]);
545 malformed_asm = 1;
546 break;
548 if (j == n_clobbers)
549 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
554 /* Search for first non-popped reg. */
555 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
556 if (! reg_used_as_output[i])
557 break;
559 /* If there are any other popped regs, that's an error. */
560 for (; i < LAST_STACK_REG + 1; i++)
561 if (reg_used_as_output[i])
562 break;
564 if (i != LAST_STACK_REG + 1)
566 error_for_asm (insn, "output regs must be grouped at top of stack");
567 malformed_asm = 1;
570 /* Enforce rule #2: All implicitly popped input regs must be closer
571 to the top of the reg-stack than any input that is not implicitly
572 popped. */
574 memset (implicitly_dies, 0, sizeof (implicitly_dies));
575 for (i = n_outputs; i < n_outputs + n_inputs; i++)
576 if (STACK_REG_P (recog_data.operand[i]))
578 /* An input reg is implicitly popped if it is tied to an
579 output, or if there is a CLOBBER for it. */
580 int j;
582 for (j = 0; j < n_clobbers; j++)
583 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
584 break;
586 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
587 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
590 /* Search for first non-popped reg. */
591 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
592 if (! implicitly_dies[i])
593 break;
595 /* If there are any other popped regs, that's an error. */
596 for (; i < LAST_STACK_REG + 1; i++)
597 if (implicitly_dies[i])
598 break;
600 if (i != LAST_STACK_REG + 1)
602 error_for_asm (insn,
603 "implicitly popped regs must be grouped at top of stack");
604 malformed_asm = 1;
607 /* Enforce rule #3: If any input operand uses the "f" constraint, all
608 output constraints must use the "&" earlyclobber.
610 ??? Detect this more deterministically by having constrain_asm_operands
611 record any earlyclobber. */
613 for (i = n_outputs; i < n_outputs + n_inputs; i++)
614 if (recog_op_alt[i][alt].matches == -1)
616 int j;
618 for (j = 0; j < n_outputs; j++)
619 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
621 error_for_asm (insn,
622 "output operand %d must use %<&%> constraint", j);
623 malformed_asm = 1;
627 if (malformed_asm)
629 /* Avoid further trouble with this insn. */
630 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
631 any_malformed_asm = true;
632 return 0;
635 return 1;
638 /* Calculate the number of inputs and outputs in BODY, an
639 asm_operands. N_OPERANDS is the total number of operands, and
640 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
641 placed. */
643 static void
644 get_asm_operands_in_out (rtx body, int *pout, int *pin)
646 rtx asmop = extract_asm_operands (body);
648 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
649 *pout = (recog_data.n_operands
650 - ASM_OPERANDS_INPUT_LENGTH (asmop)
651 - ASM_OPERANDS_LABEL_LENGTH (asmop));
654 /* If current function returns its result in an fp stack register,
655 return the REG. Otherwise, return 0. */
657 static rtx
658 stack_result (tree decl)
660 rtx result;
662 /* If the value is supposed to be returned in memory, then clearly
663 it is not returned in a stack register. */
664 if (aggregate_value_p (DECL_RESULT (decl), decl))
665 return 0;
667 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
668 if (result != 0)
669 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
670 decl, true);
672 return result != 0 && STACK_REG_P (result) ? result : 0;
677 * This section deals with stack register substitution, and forms the second
678 * pass over the RTL.
681 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
682 the desired hard REGNO. */
684 static void
685 replace_reg (rtx *reg, int regno)
687 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
688 gcc_assert (STACK_REG_P (*reg));
690 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
691 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
693 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
696 /* Remove a note of type NOTE, which must be found, for register
697 number REGNO from INSN. Remove only one such note. */
699 static void
700 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
702 rtx *note_link, this_rtx;
704 note_link = &REG_NOTES (insn);
705 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
706 if (REG_NOTE_KIND (this_rtx) == note
707 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
709 *note_link = XEXP (this_rtx, 1);
710 return;
712 else
713 note_link = &XEXP (this_rtx, 1);
715 gcc_unreachable ();
718 /* Find the hard register number of virtual register REG in REGSTACK.
719 The hard register number is relative to the top of the stack. -1 is
720 returned if the register is not found. */
722 static int
723 get_hard_regnum (stack_ptr regstack, rtx reg)
725 int i;
727 gcc_assert (STACK_REG_P (reg));
729 for (i = regstack->top; i >= 0; i--)
730 if (regstack->reg[i] == REGNO (reg))
731 break;
733 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
736 /* Emit an insn to pop virtual register REG before or after INSN.
737 REGSTACK is the stack state after INSN and is updated to reflect this
738 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
739 is represented as a SET whose destination is the register to be popped
740 and source is the top of stack. A death note for the top of stack
741 cases the movdf pattern to pop. */
743 static rtx
744 emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where)
746 rtx pop_insn, pop_rtx;
747 int hard_regno;
749 /* For complex types take care to pop both halves. These may survive in
750 CLOBBER and USE expressions. */
751 if (COMPLEX_MODE_P (GET_MODE (reg)))
753 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
754 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
756 pop_insn = NULL_RTX;
757 if (get_hard_regnum (regstack, reg1) >= 0)
758 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
759 if (get_hard_regnum (regstack, reg2) >= 0)
760 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
761 gcc_assert (pop_insn);
762 return pop_insn;
765 hard_regno = get_hard_regnum (regstack, reg);
767 gcc_assert (hard_regno >= FIRST_STACK_REG);
769 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
770 FP_MODE_REG (FIRST_STACK_REG, DFmode));
772 if (where == EMIT_AFTER)
773 pop_insn = emit_insn_after (pop_rtx, insn);
774 else
775 pop_insn = emit_insn_before (pop_rtx, insn);
777 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
779 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
780 = regstack->reg[regstack->top];
781 regstack->top -= 1;
782 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
784 return pop_insn;
787 /* Emit an insn before or after INSN to swap virtual register REG with
788 the top of stack. REGSTACK is the stack state before the swap, and
789 is updated to reflect the swap. A swap insn is represented as a
790 PARALLEL of two patterns: each pattern moves one reg to the other.
792 If REG is already at the top of the stack, no insn is emitted. */
794 static void
795 emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg)
797 int hard_regno;
798 rtx swap_rtx;
799 int tmp, other_reg; /* swap regno temps */
800 rtx i1; /* the stack-reg insn prior to INSN */
801 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
803 hard_regno = get_hard_regnum (regstack, reg);
805 if (hard_regno == FIRST_STACK_REG)
806 return;
807 if (hard_regno == -1)
809 /* Something failed if the register wasn't on the stack. If we had
810 malformed asms, we zapped the instruction itself, but that didn't
811 produce the same pattern of register sets as before. To prevent
812 further failure, adjust REGSTACK to include REG at TOP. */
813 gcc_assert (any_malformed_asm);
814 regstack->reg[++regstack->top] = REGNO (reg);
815 return;
817 gcc_assert (hard_regno >= FIRST_STACK_REG);
819 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
821 tmp = regstack->reg[other_reg];
822 regstack->reg[other_reg] = regstack->reg[regstack->top];
823 regstack->reg[regstack->top] = tmp;
825 /* Find the previous insn involving stack regs, but don't pass a
826 block boundary. */
827 i1 = NULL;
828 if (current_block && insn != BB_HEAD (current_block))
830 rtx tmp = PREV_INSN (insn);
831 rtx limit = PREV_INSN (BB_HEAD (current_block));
832 while (tmp != limit)
834 if (LABEL_P (tmp)
835 || CALL_P (tmp)
836 || NOTE_INSN_BASIC_BLOCK_P (tmp)
837 || (NONJUMP_INSN_P (tmp)
838 && stack_regs_mentioned (tmp)))
840 i1 = tmp;
841 break;
843 tmp = PREV_INSN (tmp);
847 if (i1 != NULL_RTX
848 && (i1set = single_set (i1)) != NULL_RTX)
850 rtx i1src = *get_true_reg (&SET_SRC (i1set));
851 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
853 /* If the previous register stack push was from the reg we are to
854 swap with, omit the swap. */
856 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
857 && REG_P (i1src)
858 && REGNO (i1src) == (unsigned) hard_regno - 1
859 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
860 return;
862 /* If the previous insn wrote to the reg we are to swap with,
863 omit the swap. */
865 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
866 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
867 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
868 return;
871 /* Avoid emitting the swap if this is the first register stack insn
872 of the current_block. Instead update the current_block's stack_in
873 and let compensate edges take care of this for us. */
874 if (current_block && starting_stack_p)
876 BLOCK_INFO (current_block)->stack_in = *regstack;
877 starting_stack_p = false;
878 return;
881 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
882 FP_MODE_REG (FIRST_STACK_REG, XFmode));
884 if (i1)
885 emit_insn_after (swap_rtx, i1);
886 else if (current_block)
887 emit_insn_before (swap_rtx, BB_HEAD (current_block));
888 else
889 emit_insn_before (swap_rtx, insn);
892 /* Emit an insns before INSN to swap virtual register SRC1 with
893 the top of stack and virtual register SRC2 with second stack
894 slot. REGSTACK is the stack state before the swaps, and
895 is updated to reflect the swaps. A swap insn is represented as a
896 PARALLEL of two patterns: each pattern moves one reg to the other.
898 If SRC1 and/or SRC2 are already at the right place, no swap insn
899 is emitted. */
901 static void
902 swap_to_top (rtx insn, stack_ptr regstack, rtx src1, rtx src2)
904 struct stack_def temp_stack;
905 int regno, j, k, temp;
907 temp_stack = *regstack;
909 /* Place operand 1 at the top of stack. */
910 regno = get_hard_regnum (&temp_stack, src1);
911 gcc_assert (regno >= 0);
912 if (regno != FIRST_STACK_REG)
914 k = temp_stack.top - (regno - FIRST_STACK_REG);
915 j = temp_stack.top;
917 temp = temp_stack.reg[k];
918 temp_stack.reg[k] = temp_stack.reg[j];
919 temp_stack.reg[j] = temp;
922 /* Place operand 2 next on the stack. */
923 regno = get_hard_regnum (&temp_stack, src2);
924 gcc_assert (regno >= 0);
925 if (regno != FIRST_STACK_REG + 1)
927 k = temp_stack.top - (regno - FIRST_STACK_REG);
928 j = temp_stack.top - 1;
930 temp = temp_stack.reg[k];
931 temp_stack.reg[k] = temp_stack.reg[j];
932 temp_stack.reg[j] = temp;
935 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
938 /* Handle a move to or from a stack register in PAT, which is in INSN.
939 REGSTACK is the current stack. Return whether a control flow insn
940 was deleted in the process. */
942 static bool
943 move_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat)
945 rtx *psrc = get_true_reg (&SET_SRC (pat));
946 rtx *pdest = get_true_reg (&SET_DEST (pat));
947 rtx src, dest;
948 rtx note;
949 bool control_flow_insn_deleted = false;
951 src = *psrc; dest = *pdest;
953 if (STACK_REG_P (src) && STACK_REG_P (dest))
955 /* Write from one stack reg to another. If SRC dies here, then
956 just change the register mapping and delete the insn. */
958 note = find_regno_note (insn, REG_DEAD, REGNO (src));
959 if (note)
961 int i;
963 /* If this is a no-op move, there must not be a REG_DEAD note. */
964 gcc_assert (REGNO (src) != REGNO (dest));
966 for (i = regstack->top; i >= 0; i--)
967 if (regstack->reg[i] == REGNO (src))
968 break;
970 /* The destination must be dead, or life analysis is borked. */
971 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
973 /* If the source is not live, this is yet another case of
974 uninitialized variables. Load up a NaN instead. */
975 if (i < 0)
976 return move_nan_for_stack_reg (insn, regstack, dest);
978 /* It is possible that the dest is unused after this insn.
979 If so, just pop the src. */
981 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
982 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
983 else
985 regstack->reg[i] = REGNO (dest);
986 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
987 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
990 control_flow_insn_deleted |= control_flow_insn_p (insn);
991 delete_insn (insn);
992 return control_flow_insn_deleted;
995 /* The source reg does not die. */
997 /* If this appears to be a no-op move, delete it, or else it
998 will confuse the machine description output patterns. But if
999 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1000 for REG_UNUSED will not work for deleted insns. */
1002 if (REGNO (src) == REGNO (dest))
1004 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1005 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1007 control_flow_insn_deleted |= control_flow_insn_p (insn);
1008 delete_insn (insn);
1009 return control_flow_insn_deleted;
1012 /* The destination ought to be dead. */
1013 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1015 replace_reg (psrc, get_hard_regnum (regstack, src));
1017 regstack->reg[++regstack->top] = REGNO (dest);
1018 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1019 replace_reg (pdest, FIRST_STACK_REG);
1021 else if (STACK_REG_P (src))
1023 /* Save from a stack reg to MEM, or possibly integer reg. Since
1024 only top of stack may be saved, emit an exchange first if
1025 needs be. */
1027 emit_swap_insn (insn, regstack, src);
1029 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1030 if (note)
1032 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1033 regstack->top--;
1034 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1036 else if ((GET_MODE (src) == XFmode)
1037 && regstack->top < REG_STACK_SIZE - 1)
1039 /* A 387 cannot write an XFmode value to a MEM without
1040 clobbering the source reg. The output code can handle
1041 this by reading back the value from the MEM.
1042 But it is more efficient to use a temp register if one is
1043 available. Push the source value here if the register
1044 stack is not full, and then write the value to memory via
1045 a pop. */
1046 rtx push_rtx;
1047 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1049 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1050 emit_insn_before (push_rtx, insn);
1051 add_reg_note (insn, REG_DEAD, top_stack_reg);
1054 replace_reg (psrc, FIRST_STACK_REG);
1056 else
1058 rtx pat = PATTERN (insn);
1060 gcc_assert (STACK_REG_P (dest));
1062 /* Load from MEM, or possibly integer REG or constant, into the
1063 stack regs. The actual target is always the top of the
1064 stack. The stack mapping is changed to reflect that DEST is
1065 now at top of stack. */
1067 /* The destination ought to be dead. However, there is a
1068 special case with i387 UNSPEC_TAN, where destination is live
1069 (an argument to fptan) but inherent load of 1.0 is modelled
1070 as a load from a constant. */
1071 if (GET_CODE (pat) == PARALLEL
1072 && XVECLEN (pat, 0) == 2
1073 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1074 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1075 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1076 emit_swap_insn (insn, regstack, dest);
1077 else
1078 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1080 gcc_assert (regstack->top < REG_STACK_SIZE);
1082 regstack->reg[++regstack->top] = REGNO (dest);
1083 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1084 replace_reg (pdest, FIRST_STACK_REG);
1087 return control_flow_insn_deleted;
1090 /* A helper function which replaces INSN with a pattern that loads up
1091 a NaN into DEST, then invokes move_for_stack_reg. */
1093 static bool
1094 move_nan_for_stack_reg (rtx insn, stack_ptr regstack, rtx dest)
1096 rtx pat;
1098 dest = FP_MODE_REG (REGNO (dest), SFmode);
1099 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1100 PATTERN (insn) = pat;
1101 INSN_CODE (insn) = -1;
1103 return move_for_stack_reg (insn, regstack, pat);
1106 /* Swap the condition on a branch, if there is one. Return true if we
1107 found a condition to swap. False if the condition was not used as
1108 such. */
1110 static int
1111 swap_rtx_condition_1 (rtx pat)
1113 const char *fmt;
1114 int i, r = 0;
1116 if (COMPARISON_P (pat))
1118 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1119 r = 1;
1121 else
1123 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1124 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1126 if (fmt[i] == 'E')
1128 int j;
1130 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1131 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1133 else if (fmt[i] == 'e')
1134 r |= swap_rtx_condition_1 (XEXP (pat, i));
1138 return r;
1141 static int
1142 swap_rtx_condition (rtx insn)
1144 rtx pat = PATTERN (insn);
1146 /* We're looking for a single set to cc0 or an HImode temporary. */
1148 if (GET_CODE (pat) == SET
1149 && REG_P (SET_DEST (pat))
1150 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1152 insn = next_flags_user (insn);
1153 if (insn == NULL_RTX)
1154 return 0;
1155 pat = PATTERN (insn);
1158 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1159 with the cc value right now. We may be able to search for one
1160 though. */
1162 if (GET_CODE (pat) == SET
1163 && GET_CODE (SET_SRC (pat)) == UNSPEC
1164 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1166 rtx dest = SET_DEST (pat);
1168 /* Search forward looking for the first use of this value.
1169 Stop at block boundaries. */
1170 while (insn != BB_END (current_block))
1172 insn = NEXT_INSN (insn);
1173 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1174 break;
1175 if (CALL_P (insn))
1176 return 0;
1179 /* We haven't found it. */
1180 if (insn == BB_END (current_block))
1181 return 0;
1183 /* So we've found the insn using this value. If it is anything
1184 other than sahf or the value does not die (meaning we'd have
1185 to search further), then we must give up. */
1186 pat = PATTERN (insn);
1187 if (GET_CODE (pat) != SET
1188 || GET_CODE (SET_SRC (pat)) != UNSPEC
1189 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1190 || ! dead_or_set_p (insn, dest))
1191 return 0;
1193 /* Now we are prepared to handle this as a normal cc0 setter. */
1194 insn = next_flags_user (insn);
1195 if (insn == NULL_RTX)
1196 return 0;
1197 pat = PATTERN (insn);
1200 if (swap_rtx_condition_1 (pat))
1202 int fail = 0;
1203 INSN_CODE (insn) = -1;
1204 if (recog_memoized (insn) == -1)
1205 fail = 1;
1206 /* In case the flags don't die here, recurse to try fix
1207 following user too. */
1208 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1210 insn = next_flags_user (insn);
1211 if (!insn || !swap_rtx_condition (insn))
1212 fail = 1;
1214 if (fail)
1216 swap_rtx_condition_1 (pat);
1217 return 0;
1219 return 1;
1221 return 0;
1224 /* Handle a comparison. Special care needs to be taken to avoid
1225 causing comparisons that a 387 cannot do correctly, such as EQ.
1227 Also, a pop insn may need to be emitted. The 387 does have an
1228 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1229 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1230 set up. */
1232 static void
1233 compare_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat_src)
1235 rtx *src1, *src2;
1236 rtx src1_note, src2_note;
1238 src1 = get_true_reg (&XEXP (pat_src, 0));
1239 src2 = get_true_reg (&XEXP (pat_src, 1));
1241 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1242 registers that die in this insn - move those to stack top first. */
1243 if ((! STACK_REG_P (*src1)
1244 || (STACK_REG_P (*src2)
1245 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1246 && swap_rtx_condition (insn))
1248 rtx temp;
1249 temp = XEXP (pat_src, 0);
1250 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1251 XEXP (pat_src, 1) = temp;
1253 src1 = get_true_reg (&XEXP (pat_src, 0));
1254 src2 = get_true_reg (&XEXP (pat_src, 1));
1256 INSN_CODE (insn) = -1;
1259 /* We will fix any death note later. */
1261 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1263 if (STACK_REG_P (*src2))
1264 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1265 else
1266 src2_note = NULL_RTX;
1268 emit_swap_insn (insn, regstack, *src1);
1270 replace_reg (src1, FIRST_STACK_REG);
1272 if (STACK_REG_P (*src2))
1273 replace_reg (src2, get_hard_regnum (regstack, *src2));
1275 if (src1_note)
1277 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1278 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1281 /* If the second operand dies, handle that. But if the operands are
1282 the same stack register, don't bother, because only one death is
1283 needed, and it was just handled. */
1285 if (src2_note
1286 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1287 && REGNO (*src1) == REGNO (*src2)))
1289 /* As a special case, two regs may die in this insn if src2 is
1290 next to top of stack and the top of stack also dies. Since
1291 we have already popped src1, "next to top of stack" is really
1292 at top (FIRST_STACK_REG) now. */
1294 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1295 && src1_note)
1297 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1298 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1300 else
1302 /* The 386 can only represent death of the first operand in
1303 the case handled above. In all other cases, emit a separate
1304 pop and remove the death note from here. */
1306 /* link_cc0_insns (insn); */
1308 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1310 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1311 EMIT_AFTER);
1316 /* Substitute new registers in LOC, which is part of a debug insn.
1317 REGSTACK is the current register layout. */
1319 static int
1320 subst_stack_regs_in_debug_insn (rtx *loc, void *data)
1322 stack_ptr regstack = (stack_ptr)data;
1323 int hard_regno;
1325 if (!STACK_REG_P (*loc))
1326 return 0;
1328 hard_regno = get_hard_regnum (regstack, *loc);
1330 /* If we can't find an active register, reset this debug insn. */
1331 if (hard_regno == -1)
1332 return 1;
1334 gcc_assert (hard_regno >= FIRST_STACK_REG);
1336 replace_reg (loc, hard_regno);
1338 return -1;
1341 /* Substitute hardware stack regs in debug insn INSN, using stack
1342 layout REGSTACK. If we can't find a hardware stack reg for any of
1343 the REGs in it, reset the debug insn. */
1345 static void
1346 subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack)
1348 int ret = for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
1349 subst_stack_regs_in_debug_insn,
1350 regstack);
1352 if (ret == 1)
1353 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1354 else
1355 gcc_checking_assert (ret == 0);
1358 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1359 is the current register layout. Return whether a control flow insn
1360 was deleted in the process. */
1362 static bool
1363 subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
1365 rtx *dest, *src;
1366 bool control_flow_insn_deleted = false;
1368 switch (GET_CODE (pat))
1370 case USE:
1371 /* Deaths in USE insns can happen in non optimizing compilation.
1372 Handle them by popping the dying register. */
1373 src = get_true_reg (&XEXP (pat, 0));
1374 if (STACK_REG_P (*src)
1375 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1377 /* USEs are ignored for liveness information so USEs of dead
1378 register might happen. */
1379 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1380 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1381 return control_flow_insn_deleted;
1383 /* Uninitialized USE might happen for functions returning uninitialized
1384 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1385 so it is safe to ignore the use here. This is consistent with behavior
1386 of dataflow analyzer that ignores USE too. (This also imply that
1387 forcibly initializing the register to NaN here would lead to ICE later,
1388 since the REG_DEAD notes are not issued.) */
1389 break;
1391 case VAR_LOCATION:
1392 gcc_unreachable ();
1394 case CLOBBER:
1396 rtx note;
1398 dest = get_true_reg (&XEXP (pat, 0));
1399 if (STACK_REG_P (*dest))
1401 note = find_reg_note (insn, REG_DEAD, *dest);
1403 if (pat != PATTERN (insn))
1405 /* The fix_truncdi_1 pattern wants to be able to
1406 allocate its own scratch register. It does this by
1407 clobbering an fp reg so that it is assured of an
1408 empty reg-stack register. If the register is live,
1409 kill it now. Remove the DEAD/UNUSED note so we
1410 don't try to kill it later too.
1412 In reality the UNUSED note can be absent in some
1413 complicated cases when the register is reused for
1414 partially set variable. */
1416 if (note)
1417 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1418 else
1419 note = find_reg_note (insn, REG_UNUSED, *dest);
1420 if (note)
1421 remove_note (insn, note);
1422 replace_reg (dest, FIRST_STACK_REG + 1);
1424 else
1426 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1427 indicates an uninitialized value. Because reload removed
1428 all other clobbers, this must be due to a function
1429 returning without a value. Load up a NaN. */
1431 if (!note)
1433 rtx t = *dest;
1434 if (COMPLEX_MODE_P (GET_MODE (t)))
1436 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1437 if (get_hard_regnum (regstack, u) == -1)
1439 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1440 rtx insn2 = emit_insn_before (pat2, insn);
1441 control_flow_insn_deleted
1442 |= move_nan_for_stack_reg (insn2, regstack, u);
1445 if (get_hard_regnum (regstack, t) == -1)
1446 control_flow_insn_deleted
1447 |= move_nan_for_stack_reg (insn, regstack, t);
1451 break;
1454 case SET:
1456 rtx *src1 = (rtx *) 0, *src2;
1457 rtx src1_note, src2_note;
1458 rtx pat_src;
1460 dest = get_true_reg (&SET_DEST (pat));
1461 src = get_true_reg (&SET_SRC (pat));
1462 pat_src = SET_SRC (pat);
1464 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1465 if (STACK_REG_P (*src)
1466 || (STACK_REG_P (*dest)
1467 && (REG_P (*src) || MEM_P (*src)
1468 || CONST_DOUBLE_P (*src))))
1470 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1471 break;
1474 switch (GET_CODE (pat_src))
1476 case COMPARE:
1477 compare_for_stack_reg (insn, regstack, pat_src);
1478 break;
1480 case CALL:
1482 int count;
1483 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1484 --count >= 0;)
1486 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1487 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1490 replace_reg (dest, FIRST_STACK_REG);
1491 break;
1493 case REG:
1494 /* This is a `tstM2' case. */
1495 gcc_assert (*dest == cc0_rtx);
1496 src1 = src;
1498 /* Fall through. */
1500 case FLOAT_TRUNCATE:
1501 case SQRT:
1502 case ABS:
1503 case NEG:
1504 /* These insns only operate on the top of the stack. DEST might
1505 be cc0_rtx if we're processing a tstM pattern. Also, it's
1506 possible that the tstM case results in a REG_DEAD note on the
1507 source. */
1509 if (src1 == 0)
1510 src1 = get_true_reg (&XEXP (pat_src, 0));
1512 emit_swap_insn (insn, regstack, *src1);
1514 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1516 if (STACK_REG_P (*dest))
1517 replace_reg (dest, FIRST_STACK_REG);
1519 if (src1_note)
1521 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1522 regstack->top--;
1523 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1526 replace_reg (src1, FIRST_STACK_REG);
1527 break;
1529 case MINUS:
1530 case DIV:
1531 /* On i386, reversed forms of subM3 and divM3 exist for
1532 MODE_FLOAT, so the same code that works for addM3 and mulM3
1533 can be used. */
1534 case MULT:
1535 case PLUS:
1536 /* These insns can accept the top of stack as a destination
1537 from a stack reg or mem, or can use the top of stack as a
1538 source and some other stack register (possibly top of stack)
1539 as a destination. */
1541 src1 = get_true_reg (&XEXP (pat_src, 0));
1542 src2 = get_true_reg (&XEXP (pat_src, 1));
1544 /* We will fix any death note later. */
1546 if (STACK_REG_P (*src1))
1547 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1548 else
1549 src1_note = NULL_RTX;
1550 if (STACK_REG_P (*src2))
1551 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1552 else
1553 src2_note = NULL_RTX;
1555 /* If either operand is not a stack register, then the dest
1556 must be top of stack. */
1558 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1559 emit_swap_insn (insn, regstack, *dest);
1560 else
1562 /* Both operands are REG. If neither operand is already
1563 at the top of stack, choose to make the one that is the
1564 dest the new top of stack. */
1566 int src1_hard_regnum, src2_hard_regnum;
1568 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1569 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1571 /* If the source is not live, this is yet another case of
1572 uninitialized variables. Load up a NaN instead. */
1573 if (src1_hard_regnum == -1)
1575 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1576 rtx insn2 = emit_insn_before (pat2, insn);
1577 control_flow_insn_deleted
1578 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1580 if (src2_hard_regnum == -1)
1582 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1583 rtx insn2 = emit_insn_before (pat2, insn);
1584 control_flow_insn_deleted
1585 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1588 if (src1_hard_regnum != FIRST_STACK_REG
1589 && src2_hard_regnum != FIRST_STACK_REG)
1590 emit_swap_insn (insn, regstack, *dest);
1593 if (STACK_REG_P (*src1))
1594 replace_reg (src1, get_hard_regnum (regstack, *src1));
1595 if (STACK_REG_P (*src2))
1596 replace_reg (src2, get_hard_regnum (regstack, *src2));
1598 if (src1_note)
1600 rtx src1_reg = XEXP (src1_note, 0);
1602 /* If the register that dies is at the top of stack, then
1603 the destination is somewhere else - merely substitute it.
1604 But if the reg that dies is not at top of stack, then
1605 move the top of stack to the dead reg, as though we had
1606 done the insn and then a store-with-pop. */
1608 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1610 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1611 replace_reg (dest, get_hard_regnum (regstack, *dest));
1613 else
1615 int regno = get_hard_regnum (regstack, src1_reg);
1617 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1618 replace_reg (dest, regno);
1620 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1621 = regstack->reg[regstack->top];
1624 CLEAR_HARD_REG_BIT (regstack->reg_set,
1625 REGNO (XEXP (src1_note, 0)));
1626 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1627 regstack->top--;
1629 else if (src2_note)
1631 rtx src2_reg = XEXP (src2_note, 0);
1632 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1634 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1635 replace_reg (dest, get_hard_regnum (regstack, *dest));
1637 else
1639 int regno = get_hard_regnum (regstack, src2_reg);
1641 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1642 replace_reg (dest, regno);
1644 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1645 = regstack->reg[regstack->top];
1648 CLEAR_HARD_REG_BIT (regstack->reg_set,
1649 REGNO (XEXP (src2_note, 0)));
1650 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1651 regstack->top--;
1653 else
1655 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1656 replace_reg (dest, get_hard_regnum (regstack, *dest));
1659 /* Keep operand 1 matching with destination. */
1660 if (COMMUTATIVE_ARITH_P (pat_src)
1661 && REG_P (*src1) && REG_P (*src2)
1662 && REGNO (*src1) != REGNO (*dest))
1664 int tmp = REGNO (*src1);
1665 replace_reg (src1, REGNO (*src2));
1666 replace_reg (src2, tmp);
1668 break;
1670 case UNSPEC:
1671 switch (XINT (pat_src, 1))
1673 case UNSPEC_STA:
1674 case UNSPEC_FIST:
1676 case UNSPEC_FIST_FLOOR:
1677 case UNSPEC_FIST_CEIL:
1679 /* These insns only operate on the top of the stack. */
1681 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1682 emit_swap_insn (insn, regstack, *src1);
1684 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1686 if (STACK_REG_P (*dest))
1687 replace_reg (dest, FIRST_STACK_REG);
1689 if (src1_note)
1691 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1692 regstack->top--;
1693 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1696 replace_reg (src1, FIRST_STACK_REG);
1697 break;
1699 case UNSPEC_FXAM:
1701 /* This insn only operate on the top of the stack. */
1703 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1704 emit_swap_insn (insn, regstack, *src1);
1706 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1708 replace_reg (src1, FIRST_STACK_REG);
1710 if (src1_note)
1712 remove_regno_note (insn, REG_DEAD,
1713 REGNO (XEXP (src1_note, 0)));
1714 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1715 EMIT_AFTER);
1718 break;
1720 case UNSPEC_SIN:
1721 case UNSPEC_COS:
1722 case UNSPEC_FRNDINT:
1723 case UNSPEC_F2XM1:
1725 case UNSPEC_FRNDINT_FLOOR:
1726 case UNSPEC_FRNDINT_CEIL:
1727 case UNSPEC_FRNDINT_TRUNC:
1728 case UNSPEC_FRNDINT_MASK_PM:
1730 /* Above insns operate on the top of the stack. */
1732 case UNSPEC_SINCOS_COS:
1733 case UNSPEC_XTRACT_FRACT:
1735 /* Above insns operate on the top two stack slots,
1736 first part of one input, double output insn. */
1738 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1740 emit_swap_insn (insn, regstack, *src1);
1742 /* Input should never die, it is replaced with output. */
1743 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1744 gcc_assert (!src1_note);
1746 if (STACK_REG_P (*dest))
1747 replace_reg (dest, FIRST_STACK_REG);
1749 replace_reg (src1, FIRST_STACK_REG);
1750 break;
1752 case UNSPEC_SINCOS_SIN:
1753 case UNSPEC_XTRACT_EXP:
1755 /* These insns operate on the top two stack slots,
1756 second part of one input, double output insn. */
1758 regstack->top++;
1759 /* FALLTHRU */
1761 case UNSPEC_TAN:
1763 /* For UNSPEC_TAN, regstack->top is already increased
1764 by inherent load of constant 1.0. */
1766 /* Output value is generated in the second stack slot.
1767 Move current value from second slot to the top. */
1768 regstack->reg[regstack->top]
1769 = regstack->reg[regstack->top - 1];
1771 gcc_assert (STACK_REG_P (*dest));
1773 regstack->reg[regstack->top - 1] = REGNO (*dest);
1774 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1775 replace_reg (dest, FIRST_STACK_REG + 1);
1777 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1779 replace_reg (src1, FIRST_STACK_REG);
1780 break;
1782 case UNSPEC_FPATAN:
1783 case UNSPEC_FYL2X:
1784 case UNSPEC_FYL2XP1:
1785 /* These insns operate on the top two stack slots. */
1787 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1788 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1790 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1791 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1793 swap_to_top (insn, regstack, *src1, *src2);
1795 replace_reg (src1, FIRST_STACK_REG);
1796 replace_reg (src2, FIRST_STACK_REG + 1);
1798 if (src1_note)
1799 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1800 if (src2_note)
1801 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1803 /* Pop both input operands from the stack. */
1804 CLEAR_HARD_REG_BIT (regstack->reg_set,
1805 regstack->reg[regstack->top]);
1806 CLEAR_HARD_REG_BIT (regstack->reg_set,
1807 regstack->reg[regstack->top - 1]);
1808 regstack->top -= 2;
1810 /* Push the result back onto the stack. */
1811 regstack->reg[++regstack->top] = REGNO (*dest);
1812 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1813 replace_reg (dest, FIRST_STACK_REG);
1814 break;
1816 case UNSPEC_FSCALE_FRACT:
1817 case UNSPEC_FPREM_F:
1818 case UNSPEC_FPREM1_F:
1819 /* These insns operate on the top two stack slots,
1820 first part of double input, double output insn. */
1822 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1823 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1825 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1826 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1828 /* Inputs should never die, they are
1829 replaced with outputs. */
1830 gcc_assert (!src1_note);
1831 gcc_assert (!src2_note);
1833 swap_to_top (insn, regstack, *src1, *src2);
1835 /* Push the result back onto stack. Empty stack slot
1836 will be filled in second part of insn. */
1837 if (STACK_REG_P (*dest))
1839 regstack->reg[regstack->top] = REGNO (*dest);
1840 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1841 replace_reg (dest, FIRST_STACK_REG);
1844 replace_reg (src1, FIRST_STACK_REG);
1845 replace_reg (src2, FIRST_STACK_REG + 1);
1846 break;
1848 case UNSPEC_FSCALE_EXP:
1849 case UNSPEC_FPREM_U:
1850 case UNSPEC_FPREM1_U:
1851 /* These insns operate on the top two stack slots,
1852 second part of double input, double output insn. */
1854 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1855 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1857 /* Push the result back onto stack. Fill empty slot from
1858 first part of insn and fix top of stack pointer. */
1859 if (STACK_REG_P (*dest))
1861 regstack->reg[regstack->top - 1] = REGNO (*dest);
1862 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1863 replace_reg (dest, FIRST_STACK_REG + 1);
1866 replace_reg (src1, FIRST_STACK_REG);
1867 replace_reg (src2, FIRST_STACK_REG + 1);
1868 break;
1870 case UNSPEC_C2_FLAG:
1871 /* This insn operates on the top two stack slots,
1872 third part of C2 setting double input insn. */
1874 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1875 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1877 replace_reg (src1, FIRST_STACK_REG);
1878 replace_reg (src2, FIRST_STACK_REG + 1);
1879 break;
1881 case UNSPEC_SAHF:
1882 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1883 The combination matches the PPRO fcomi instruction. */
1885 pat_src = XVECEXP (pat_src, 0, 0);
1886 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1887 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1888 /* Fall through. */
1890 case UNSPEC_FNSTSW:
1891 /* Combined fcomp+fnstsw generated for doing well with
1892 CSE. When optimizing this would have been broken
1893 up before now. */
1895 pat_src = XVECEXP (pat_src, 0, 0);
1896 gcc_assert (GET_CODE (pat_src) == COMPARE);
1898 compare_for_stack_reg (insn, regstack, pat_src);
1899 break;
1901 default:
1902 gcc_unreachable ();
1904 break;
1906 case IF_THEN_ELSE:
1907 /* This insn requires the top of stack to be the destination. */
1909 src1 = get_true_reg (&XEXP (pat_src, 1));
1910 src2 = get_true_reg (&XEXP (pat_src, 2));
1912 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1913 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1915 /* If the comparison operator is an FP comparison operator,
1916 it is handled correctly by compare_for_stack_reg () who
1917 will move the destination to the top of stack. But if the
1918 comparison operator is not an FP comparison operator, we
1919 have to handle it here. */
1920 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1921 && REGNO (*dest) != regstack->reg[regstack->top])
1923 /* In case one of operands is the top of stack and the operands
1924 dies, it is safe to make it the destination operand by
1925 reversing the direction of cmove and avoid fxch. */
1926 if ((REGNO (*src1) == regstack->reg[regstack->top]
1927 && src1_note)
1928 || (REGNO (*src2) == regstack->reg[regstack->top]
1929 && src2_note))
1931 int idx1 = (get_hard_regnum (regstack, *src1)
1932 - FIRST_STACK_REG);
1933 int idx2 = (get_hard_regnum (regstack, *src2)
1934 - FIRST_STACK_REG);
1936 /* Make reg-stack believe that the operands are already
1937 swapped on the stack */
1938 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1939 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1941 /* Reverse condition to compensate the operand swap.
1942 i386 do have comparison always reversible. */
1943 PUT_CODE (XEXP (pat_src, 0),
1944 reversed_comparison_code (XEXP (pat_src, 0), insn));
1946 else
1947 emit_swap_insn (insn, regstack, *dest);
1951 rtx src_note [3];
1952 int i;
1954 src_note[0] = 0;
1955 src_note[1] = src1_note;
1956 src_note[2] = src2_note;
1958 if (STACK_REG_P (*src1))
1959 replace_reg (src1, get_hard_regnum (regstack, *src1));
1960 if (STACK_REG_P (*src2))
1961 replace_reg (src2, get_hard_regnum (regstack, *src2));
1963 for (i = 1; i <= 2; i++)
1964 if (src_note [i])
1966 int regno = REGNO (XEXP (src_note[i], 0));
1968 /* If the register that dies is not at the top of
1969 stack, then move the top of stack to the dead reg.
1970 Top of stack should never die, as it is the
1971 destination. */
1972 gcc_assert (regno != regstack->reg[regstack->top]);
1973 remove_regno_note (insn, REG_DEAD, regno);
1974 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1975 EMIT_AFTER);
1979 /* Make dest the top of stack. Add dest to regstack if
1980 not present. */
1981 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1982 regstack->reg[++regstack->top] = REGNO (*dest);
1983 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1984 replace_reg (dest, FIRST_STACK_REG);
1985 break;
1987 default:
1988 gcc_unreachable ();
1990 break;
1993 default:
1994 break;
1997 return control_flow_insn_deleted;
2000 /* Substitute hard regnums for any stack regs in INSN, which has
2001 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2002 before the insn, and is updated with changes made here.
2004 There are several requirements and assumptions about the use of
2005 stack-like regs in asm statements. These rules are enforced by
2006 record_asm_stack_regs; see comments there for details. Any
2007 asm_operands left in the RTL at this point may be assume to meet the
2008 requirements, since record_asm_stack_regs removes any problem asm. */
2010 static void
2011 subst_asm_stack_regs (rtx insn, stack_ptr regstack)
2013 rtx body = PATTERN (insn);
2014 int alt;
2016 rtx *note_reg; /* Array of note contents */
2017 rtx **note_loc; /* Address of REG field of each note */
2018 enum reg_note *note_kind; /* The type of each note */
2020 rtx *clobber_reg = 0;
2021 rtx **clobber_loc = 0;
2023 struct stack_def temp_stack;
2024 int n_notes;
2025 int n_clobbers;
2026 rtx note;
2027 int i;
2028 int n_inputs, n_outputs;
2030 if (! check_asm_stack_operands (insn))
2031 return;
2033 /* Find out what the constraints required. If no constraint
2034 alternative matches, that is a compiler bug: we should have caught
2035 such an insn in check_asm_stack_operands. */
2036 extract_insn (insn);
2037 constrain_operands (1);
2038 alt = which_alternative;
2040 preprocess_constraints ();
2042 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2044 gcc_assert (alt >= 0);
2046 /* Strip SUBREGs here to make the following code simpler. */
2047 for (i = 0; i < recog_data.n_operands; i++)
2048 if (GET_CODE (recog_data.operand[i]) == SUBREG
2049 && REG_P (SUBREG_REG (recog_data.operand[i])))
2051 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2052 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2055 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2057 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2058 i++;
2060 note_reg = XALLOCAVEC (rtx, i);
2061 note_loc = XALLOCAVEC (rtx *, i);
2062 note_kind = XALLOCAVEC (enum reg_note, i);
2064 n_notes = 0;
2065 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2067 rtx reg = XEXP (note, 0);
2068 rtx *loc = & XEXP (note, 0);
2070 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2072 loc = & SUBREG_REG (reg);
2073 reg = SUBREG_REG (reg);
2076 if (STACK_REG_P (reg)
2077 && (REG_NOTE_KIND (note) == REG_DEAD
2078 || REG_NOTE_KIND (note) == REG_UNUSED))
2080 note_reg[n_notes] = reg;
2081 note_loc[n_notes] = loc;
2082 note_kind[n_notes] = REG_NOTE_KIND (note);
2083 n_notes++;
2087 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2089 n_clobbers = 0;
2091 if (GET_CODE (body) == PARALLEL)
2093 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2094 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2096 for (i = 0; i < XVECLEN (body, 0); i++)
2097 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2099 rtx clobber = XVECEXP (body, 0, i);
2100 rtx reg = XEXP (clobber, 0);
2101 rtx *loc = & XEXP (clobber, 0);
2103 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2105 loc = & SUBREG_REG (reg);
2106 reg = SUBREG_REG (reg);
2109 if (STACK_REG_P (reg))
2111 clobber_reg[n_clobbers] = reg;
2112 clobber_loc[n_clobbers] = loc;
2113 n_clobbers++;
2118 temp_stack = *regstack;
2120 /* Put the input regs into the desired place in TEMP_STACK. */
2122 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2123 if (STACK_REG_P (recog_data.operand[i])
2124 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2125 FLOAT_REGS)
2126 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2128 /* If an operand needs to be in a particular reg in
2129 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2130 these constraints are for single register classes, and
2131 reload guaranteed that operand[i] is already in that class,
2132 we can just use REGNO (recog_data.operand[i]) to know which
2133 actual reg this operand needs to be in. */
2135 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2137 gcc_assert (regno >= 0);
2139 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2141 /* recog_data.operand[i] is not in the right place. Find
2142 it and swap it with whatever is already in I's place.
2143 K is where recog_data.operand[i] is now. J is where it
2144 should be. */
2145 int j, k, temp;
2147 k = temp_stack.top - (regno - FIRST_STACK_REG);
2148 j = (temp_stack.top
2149 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2151 temp = temp_stack.reg[k];
2152 temp_stack.reg[k] = temp_stack.reg[j];
2153 temp_stack.reg[j] = temp;
2157 /* Emit insns before INSN to make sure the reg-stack is in the right
2158 order. */
2160 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2162 /* Make the needed input register substitutions. Do death notes and
2163 clobbers too, because these are for inputs, not outputs. */
2165 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2166 if (STACK_REG_P (recog_data.operand[i]))
2168 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2170 gcc_assert (regnum >= 0);
2172 replace_reg (recog_data.operand_loc[i], regnum);
2175 for (i = 0; i < n_notes; i++)
2176 if (note_kind[i] == REG_DEAD)
2178 int regnum = get_hard_regnum (regstack, note_reg[i]);
2180 gcc_assert (regnum >= 0);
2182 replace_reg (note_loc[i], regnum);
2185 for (i = 0; i < n_clobbers; i++)
2187 /* It's OK for a CLOBBER to reference a reg that is not live.
2188 Don't try to replace it in that case. */
2189 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2191 if (regnum >= 0)
2193 /* Sigh - clobbers always have QImode. But replace_reg knows
2194 that these regs can't be MODE_INT and will assert. Just put
2195 the right reg there without calling replace_reg. */
2197 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2201 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2203 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2204 if (STACK_REG_P (recog_data.operand[i]))
2206 /* An input reg is implicitly popped if it is tied to an
2207 output, or if there is a CLOBBER for it. */
2208 int j;
2210 for (j = 0; j < n_clobbers; j++)
2211 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2212 break;
2214 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2216 /* recog_data.operand[i] might not be at the top of stack.
2217 But that's OK, because all we need to do is pop the
2218 right number of regs off of the top of the reg-stack.
2219 record_asm_stack_regs guaranteed that all implicitly
2220 popped regs were grouped at the top of the reg-stack. */
2222 CLEAR_HARD_REG_BIT (regstack->reg_set,
2223 regstack->reg[regstack->top]);
2224 regstack->top--;
2228 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2229 Note that there isn't any need to substitute register numbers.
2230 ??? Explain why this is true. */
2232 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2234 /* See if there is an output for this hard reg. */
2235 int j;
2237 for (j = 0; j < n_outputs; j++)
2238 if (STACK_REG_P (recog_data.operand[j])
2239 && REGNO (recog_data.operand[j]) == (unsigned) i)
2241 regstack->reg[++regstack->top] = i;
2242 SET_HARD_REG_BIT (regstack->reg_set, i);
2243 break;
2247 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2248 input that the asm didn't implicitly pop. If the asm didn't
2249 implicitly pop an input reg, that reg will still be live.
2251 Note that we can't use find_regno_note here: the register numbers
2252 in the death notes have already been substituted. */
2254 for (i = 0; i < n_outputs; i++)
2255 if (STACK_REG_P (recog_data.operand[i]))
2257 int j;
2259 for (j = 0; j < n_notes; j++)
2260 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2261 && note_kind[j] == REG_UNUSED)
2263 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2264 EMIT_AFTER);
2265 break;
2269 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2270 if (STACK_REG_P (recog_data.operand[i]))
2272 int j;
2274 for (j = 0; j < n_notes; j++)
2275 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2276 && note_kind[j] == REG_DEAD
2277 && TEST_HARD_REG_BIT (regstack->reg_set,
2278 REGNO (recog_data.operand[i])))
2280 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2281 EMIT_AFTER);
2282 break;
2287 /* Substitute stack hard reg numbers for stack virtual registers in
2288 INSN. Non-stack register numbers are not changed. REGSTACK is the
2289 current stack content. Insns may be emitted as needed to arrange the
2290 stack for the 387 based on the contents of the insn. Return whether
2291 a control flow insn was deleted in the process. */
2293 static bool
2294 subst_stack_regs (rtx insn, stack_ptr regstack)
2296 rtx *note_link, note;
2297 bool control_flow_insn_deleted = false;
2298 int i;
2300 if (CALL_P (insn))
2302 int top = regstack->top;
2304 /* If there are any floating point parameters to be passed in
2305 registers for this call, make sure they are in the right
2306 order. */
2308 if (top >= 0)
2310 straighten_stack (insn, regstack);
2312 /* Now mark the arguments as dead after the call. */
2314 while (regstack->top >= 0)
2316 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2317 regstack->top--;
2322 /* Do the actual substitution if any stack regs are mentioned.
2323 Since we only record whether entire insn mentions stack regs, and
2324 subst_stack_regs_pat only works for patterns that contain stack regs,
2325 we must check each pattern in a parallel here. A call_value_pop could
2326 fail otherwise. */
2328 if (stack_regs_mentioned (insn))
2330 int n_operands = asm_noperands (PATTERN (insn));
2331 if (n_operands >= 0)
2333 /* This insn is an `asm' with operands. Decode the operands,
2334 decide how many are inputs, and do register substitution.
2335 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2337 subst_asm_stack_regs (insn, regstack);
2338 return control_flow_insn_deleted;
2341 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2342 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2344 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2346 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2347 XVECEXP (PATTERN (insn), 0, i)
2348 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2349 control_flow_insn_deleted
2350 |= subst_stack_regs_pat (insn, regstack,
2351 XVECEXP (PATTERN (insn), 0, i));
2354 else
2355 control_flow_insn_deleted
2356 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2359 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2360 REG_UNUSED will already have been dealt with, so just return. */
2362 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2363 return control_flow_insn_deleted;
2365 /* If this a noreturn call, we can't insert pop insns after it.
2366 Instead, reset the stack state to empty. */
2367 if (CALL_P (insn)
2368 && find_reg_note (insn, REG_NORETURN, NULL))
2370 regstack->top = -1;
2371 CLEAR_HARD_REG_SET (regstack->reg_set);
2372 return control_flow_insn_deleted;
2375 /* If there is a REG_UNUSED note on a stack register on this insn,
2376 the indicated reg must be popped. The REG_UNUSED note is removed,
2377 since the form of the newly emitted pop insn references the reg,
2378 making it no longer `unset'. */
2380 note_link = &REG_NOTES (insn);
2381 for (note = *note_link; note; note = XEXP (note, 1))
2382 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2384 *note_link = XEXP (note, 1);
2385 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2387 else
2388 note_link = &XEXP (note, 1);
2390 return control_flow_insn_deleted;
2393 /* Change the organization of the stack so that it fits a new basic
2394 block. Some registers might have to be popped, but there can never be
2395 a register live in the new block that is not now live.
2397 Insert any needed insns before or after INSN, as indicated by
2398 WHERE. OLD is the original stack layout, and NEW is the desired
2399 form. OLD is updated to reflect the code emitted, i.e., it will be
2400 the same as NEW upon return.
2402 This function will not preserve block_end[]. But that information
2403 is no longer needed once this has executed. */
2405 static void
2406 change_stack (rtx insn, stack_ptr old, stack_ptr new_stack, enum emit_where where)
2408 int reg;
2409 int update_end = 0;
2410 int i;
2412 /* Stack adjustments for the first insn in a block update the
2413 current_block's stack_in instead of inserting insns directly.
2414 compensate_edges will add the necessary code later. */
2415 if (current_block
2416 && starting_stack_p
2417 && where == EMIT_BEFORE)
2419 BLOCK_INFO (current_block)->stack_in = *new_stack;
2420 starting_stack_p = false;
2421 *old = *new_stack;
2422 return;
2425 /* We will be inserting new insns "backwards". If we are to insert
2426 after INSN, find the next insn, and insert before it. */
2428 if (where == EMIT_AFTER)
2430 if (current_block && BB_END (current_block) == insn)
2431 update_end = 1;
2432 insn = NEXT_INSN (insn);
2435 /* Initialize partially dead variables. */
2436 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2437 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2438 && !TEST_HARD_REG_BIT (old->reg_set, i))
2440 old->reg[++old->top] = i;
2441 SET_HARD_REG_BIT (old->reg_set, i);
2442 emit_insn_before (gen_rtx_SET (VOIDmode,
2443 FP_MODE_REG (i, SFmode), not_a_num), insn);
2446 /* Pop any registers that are not needed in the new block. */
2448 /* If the destination block's stack already has a specified layout
2449 and contains two or more registers, use a more intelligent algorithm
2450 to pop registers that minimizes the number number of fxchs below. */
2451 if (new_stack->top > 0)
2453 bool slots[REG_STACK_SIZE];
2454 int pops[REG_STACK_SIZE];
2455 int next, dest, topsrc;
2457 /* First pass to determine the free slots. */
2458 for (reg = 0; reg <= new_stack->top; reg++)
2459 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2461 /* Second pass to allocate preferred slots. */
2462 topsrc = -1;
2463 for (reg = old->top; reg > new_stack->top; reg--)
2464 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2466 dest = -1;
2467 for (next = 0; next <= new_stack->top; next++)
2468 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2470 /* If this is a preference for the new top of stack, record
2471 the fact by remembering it's old->reg in topsrc. */
2472 if (next == new_stack->top)
2473 topsrc = reg;
2474 slots[next] = true;
2475 dest = next;
2476 break;
2478 pops[reg] = dest;
2480 else
2481 pops[reg] = reg;
2483 /* Intentionally, avoid placing the top of stack in it's correct
2484 location, if we still need to permute the stack below and we
2485 can usefully place it somewhere else. This is the case if any
2486 slot is still unallocated, in which case we should place the
2487 top of stack there. */
2488 if (topsrc != -1)
2489 for (reg = 0; reg < new_stack->top; reg++)
2490 if (!slots[reg])
2492 pops[topsrc] = reg;
2493 slots[new_stack->top] = false;
2494 slots[reg] = true;
2495 break;
2498 /* Third pass allocates remaining slots and emits pop insns. */
2499 next = new_stack->top;
2500 for (reg = old->top; reg > new_stack->top; reg--)
2502 dest = pops[reg];
2503 if (dest == -1)
2505 /* Find next free slot. */
2506 while (slots[next])
2507 next--;
2508 dest = next--;
2510 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2511 EMIT_BEFORE);
2514 else
2516 /* The following loop attempts to maximize the number of times we
2517 pop the top of the stack, as this permits the use of the faster
2518 ffreep instruction on platforms that support it. */
2519 int live, next;
2521 live = 0;
2522 for (reg = 0; reg <= old->top; reg++)
2523 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2524 live++;
2526 next = live;
2527 while (old->top >= live)
2528 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2530 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2531 next--;
2532 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2533 EMIT_BEFORE);
2535 else
2536 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2537 EMIT_BEFORE);
2540 if (new_stack->top == -2)
2542 /* If the new block has never been processed, then it can inherit
2543 the old stack order. */
2545 new_stack->top = old->top;
2546 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2548 else
2550 /* This block has been entered before, and we must match the
2551 previously selected stack order. */
2553 /* By now, the only difference should be the order of the stack,
2554 not their depth or liveliness. */
2556 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2557 gcc_assert (old->top == new_stack->top);
2559 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2560 swaps until the stack is correct.
2562 The worst case number of swaps emitted is N + 2, where N is the
2563 depth of the stack. In some cases, the reg at the top of
2564 stack may be correct, but swapped anyway in order to fix
2565 other regs. But since we never swap any other reg away from
2566 its correct slot, this algorithm will converge. */
2568 if (new_stack->top != -1)
2571 /* Swap the reg at top of stack into the position it is
2572 supposed to be in, until the correct top of stack appears. */
2574 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2576 for (reg = new_stack->top; reg >= 0; reg--)
2577 if (new_stack->reg[reg] == old->reg[old->top])
2578 break;
2580 gcc_assert (reg != -1);
2582 emit_swap_insn (insn, old,
2583 FP_MODE_REG (old->reg[reg], DFmode));
2586 /* See if any regs remain incorrect. If so, bring an
2587 incorrect reg to the top of stack, and let the while loop
2588 above fix it. */
2590 for (reg = new_stack->top; reg >= 0; reg--)
2591 if (new_stack->reg[reg] != old->reg[reg])
2593 emit_swap_insn (insn, old,
2594 FP_MODE_REG (old->reg[reg], DFmode));
2595 break;
2597 } while (reg >= 0);
2599 /* At this point there must be no differences. */
2601 for (reg = old->top; reg >= 0; reg--)
2602 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2605 if (update_end)
2606 BB_END (current_block) = PREV_INSN (insn);
2609 /* Print stack configuration. */
2611 static void
2612 print_stack (FILE *file, stack_ptr s)
2614 if (! file)
2615 return;
2617 if (s->top == -2)
2618 fprintf (file, "uninitialized\n");
2619 else if (s->top == -1)
2620 fprintf (file, "empty\n");
2621 else
2623 int i;
2624 fputs ("[ ", file);
2625 for (i = 0; i <= s->top; ++i)
2626 fprintf (file, "%d ", s->reg[i]);
2627 fputs ("]\n", file);
2631 /* This function was doing life analysis. We now let the regular live
2632 code do it's job, so we only need to check some extra invariants
2633 that reg-stack expects. Primary among these being that all registers
2634 are initialized before use.
2636 The function returns true when code was emitted to CFG edges and
2637 commit_edge_insertions needs to be called. */
2639 static int
2640 convert_regs_entry (void)
2642 int inserted = 0;
2643 edge e;
2644 edge_iterator ei;
2646 /* Load something into each stack register live at function entry.
2647 Such live registers can be caused by uninitialized variables or
2648 functions not returning values on all paths. In order to keep
2649 the push/pop code happy, and to not scrog the register stack, we
2650 must put something in these registers. Use a QNaN.
2652 Note that we are inserting converted code here. This code is
2653 never seen by the convert_regs pass. */
2655 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2657 basic_block block = e->dest;
2658 block_info bi = BLOCK_INFO (block);
2659 int reg, top = -1;
2661 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2662 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2664 rtx init;
2666 bi->stack_in.reg[++top] = reg;
2668 init = gen_rtx_SET (VOIDmode,
2669 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2670 not_a_num);
2671 insert_insn_on_edge (init, e);
2672 inserted = 1;
2675 bi->stack_in.top = top;
2678 return inserted;
2681 /* Construct the desired stack for function exit. This will either
2682 be `empty', or the function return value at top-of-stack. */
2684 static void
2685 convert_regs_exit (void)
2687 int value_reg_low, value_reg_high;
2688 stack_ptr output_stack;
2689 rtx retvalue;
2691 retvalue = stack_result (current_function_decl);
2692 value_reg_low = value_reg_high = -1;
2693 if (retvalue)
2695 value_reg_low = REGNO (retvalue);
2696 value_reg_high = END_HARD_REGNO (retvalue) - 1;
2699 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2700 if (value_reg_low == -1)
2701 output_stack->top = -1;
2702 else
2704 int reg;
2706 output_stack->top = value_reg_high - value_reg_low;
2707 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2709 output_stack->reg[value_reg_high - reg] = reg;
2710 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2715 /* Copy the stack info from the end of edge E's source block to the
2716 start of E's destination block. */
2718 static void
2719 propagate_stack (edge e)
2721 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2722 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2723 int reg;
2725 /* Preserve the order of the original stack, but check whether
2726 any pops are needed. */
2727 dest_stack->top = -1;
2728 for (reg = 0; reg <= src_stack->top; ++reg)
2729 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2730 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2732 /* Push in any partially dead values. */
2733 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2734 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2735 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2736 dest_stack->reg[++dest_stack->top] = reg;
2740 /* Adjust the stack of edge E's source block on exit to match the stack
2741 of it's target block upon input. The stack layouts of both blocks
2742 should have been defined by now. */
2744 static bool
2745 compensate_edge (edge e)
2747 basic_block source = e->src, target = e->dest;
2748 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2749 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2750 struct stack_def regstack;
2751 int reg;
2753 if (dump_file)
2754 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2756 gcc_assert (target_stack->top != -2);
2758 /* Check whether stacks are identical. */
2759 if (target_stack->top == source_stack->top)
2761 for (reg = target_stack->top; reg >= 0; --reg)
2762 if (target_stack->reg[reg] != source_stack->reg[reg])
2763 break;
2765 if (reg == -1)
2767 if (dump_file)
2768 fprintf (dump_file, "no changes needed\n");
2769 return false;
2773 if (dump_file)
2775 fprintf (dump_file, "correcting stack to ");
2776 print_stack (dump_file, target_stack);
2779 /* Abnormal calls may appear to have values live in st(0), but the
2780 abnormal return path will not have actually loaded the values. */
2781 if (e->flags & EDGE_ABNORMAL_CALL)
2783 /* Assert that the lifetimes are as we expect -- one value
2784 live at st(0) on the end of the source block, and no
2785 values live at the beginning of the destination block.
2786 For complex return values, we may have st(1) live as well. */
2787 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2788 gcc_assert (target_stack->top == -1);
2789 return false;
2792 /* Handle non-call EH edges specially. The normal return path have
2793 values in registers. These will be popped en masse by the unwind
2794 library. */
2795 if (e->flags & EDGE_EH)
2797 gcc_assert (target_stack->top == -1);
2798 return false;
2801 /* We don't support abnormal edges. Global takes care to
2802 avoid any live register across them, so we should never
2803 have to insert instructions on such edges. */
2804 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2806 /* Make a copy of source_stack as change_stack is destructive. */
2807 regstack = *source_stack;
2809 /* It is better to output directly to the end of the block
2810 instead of to the edge, because emit_swap can do minimal
2811 insn scheduling. We can do this when there is only one
2812 edge out, and it is not abnormal. */
2813 if (EDGE_COUNT (source->succs) == 1)
2815 current_block = source;
2816 change_stack (BB_END (source), &regstack, target_stack,
2817 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2819 else
2821 rtx seq, after;
2823 current_block = NULL;
2824 start_sequence ();
2826 /* ??? change_stack needs some point to emit insns after. */
2827 after = emit_note (NOTE_INSN_DELETED);
2829 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2831 seq = get_insns ();
2832 end_sequence ();
2834 insert_insn_on_edge (seq, e);
2835 return true;
2837 return false;
2840 /* Traverse all non-entry edges in the CFG, and emit the necessary
2841 edge compensation code to change the stack from stack_out of the
2842 source block to the stack_in of the destination block. */
2844 static bool
2845 compensate_edges (void)
2847 bool inserted = false;
2848 basic_block bb;
2850 starting_stack_p = false;
2852 FOR_EACH_BB (bb)
2853 if (bb != ENTRY_BLOCK_PTR)
2855 edge e;
2856 edge_iterator ei;
2858 FOR_EACH_EDGE (e, ei, bb->succs)
2859 inserted |= compensate_edge (e);
2861 return inserted;
2864 /* Select the better of two edges E1 and E2 to use to determine the
2865 stack layout for their shared destination basic block. This is
2866 typically the more frequently executed. The edge E1 may be NULL
2867 (in which case E2 is returned), but E2 is always non-NULL. */
2869 static edge
2870 better_edge (edge e1, edge e2)
2872 if (!e1)
2873 return e2;
2875 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2876 return e1;
2877 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2878 return e2;
2880 if (e1->count > e2->count)
2881 return e1;
2882 if (e1->count < e2->count)
2883 return e2;
2885 /* Prefer critical edges to minimize inserting compensation code on
2886 critical edges. */
2888 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2889 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2891 /* Avoid non-deterministic behavior. */
2892 return (e1->src->index < e2->src->index) ? e1 : e2;
2895 /* Convert stack register references in one block. Return true if the CFG
2896 has been modified in the process. */
2898 static bool
2899 convert_regs_1 (basic_block block)
2901 struct stack_def regstack;
2902 block_info bi = BLOCK_INFO (block);
2903 int reg;
2904 rtx insn, next;
2905 bool control_flow_insn_deleted = false;
2906 bool cfg_altered = false;
2907 int debug_insns_with_starting_stack = 0;
2909 any_malformed_asm = false;
2911 /* Choose an initial stack layout, if one hasn't already been chosen. */
2912 if (bi->stack_in.top == -2)
2914 edge e, beste = NULL;
2915 edge_iterator ei;
2917 /* Select the best incoming edge (typically the most frequent) to
2918 use as a template for this basic block. */
2919 FOR_EACH_EDGE (e, ei, block->preds)
2920 if (BLOCK_INFO (e->src)->done)
2921 beste = better_edge (beste, e);
2923 if (beste)
2924 propagate_stack (beste);
2925 else
2927 /* No predecessors. Create an arbitrary input stack. */
2928 bi->stack_in.top = -1;
2929 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2930 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2931 bi->stack_in.reg[++bi->stack_in.top] = reg;
2935 if (dump_file)
2937 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2938 print_stack (dump_file, &bi->stack_in);
2941 /* Process all insns in this block. Keep track of NEXT so that we
2942 don't process insns emitted while substituting in INSN. */
2943 current_block = block;
2944 next = BB_HEAD (block);
2945 regstack = bi->stack_in;
2946 starting_stack_p = true;
2950 insn = next;
2951 next = NEXT_INSN (insn);
2953 /* Ensure we have not missed a block boundary. */
2954 gcc_assert (next);
2955 if (insn == BB_END (block))
2956 next = NULL;
2958 /* Don't bother processing unless there is a stack reg
2959 mentioned or if it's a CALL_INSN. */
2960 if (DEBUG_INSN_P (insn))
2962 if (starting_stack_p)
2963 debug_insns_with_starting_stack++;
2964 else
2966 subst_all_stack_regs_in_debug_insn (insn, &regstack);
2968 /* Nothing must ever die at a debug insn. If something
2969 is referenced in it that becomes dead, it should have
2970 died before and the reference in the debug insn
2971 should have been removed so as to avoid changing code
2972 generation. */
2973 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2976 else if (stack_regs_mentioned (insn)
2977 || CALL_P (insn))
2979 if (dump_file)
2981 fprintf (dump_file, " insn %d input stack: ",
2982 INSN_UID (insn));
2983 print_stack (dump_file, &regstack);
2985 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2986 starting_stack_p = false;
2989 while (next);
2991 if (debug_insns_with_starting_stack)
2993 /* Since it's the first non-debug instruction that determines
2994 the stack requirements of the current basic block, we refrain
2995 from updating debug insns before it in the loop above, and
2996 fix them up here. */
2997 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2998 insn = NEXT_INSN (insn))
3000 if (!DEBUG_INSN_P (insn))
3001 continue;
3003 debug_insns_with_starting_stack--;
3004 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
3008 if (dump_file)
3010 fprintf (dump_file, "Expected live registers [");
3011 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3012 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
3013 fprintf (dump_file, " %d", reg);
3014 fprintf (dump_file, " ]\nOutput stack: ");
3015 print_stack (dump_file, &regstack);
3018 insn = BB_END (block);
3019 if (JUMP_P (insn))
3020 insn = PREV_INSN (insn);
3022 /* If the function is declared to return a value, but it returns one
3023 in only some cases, some registers might come live here. Emit
3024 necessary moves for them. */
3026 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3028 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3029 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3031 rtx set;
3033 if (dump_file)
3034 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3036 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
3037 insn = emit_insn_after (set, insn);
3038 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3042 /* Amongst the insns possibly deleted during the substitution process above,
3043 might have been the only trapping insn in the block. We purge the now
3044 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3045 called at the end of convert_regs. The order in which we process the
3046 blocks ensures that we never delete an already processed edge.
3048 Note that, at this point, the CFG may have been damaged by the emission
3049 of instructions after an abnormal call, which moves the basic block end
3050 (and is the reason why we call fixup_abnormal_edges later). So we must
3051 be sure that the trapping insn has been deleted before trying to purge
3052 dead edges, otherwise we risk purging valid edges.
3054 ??? We are normally supposed not to delete trapping insns, so we pretend
3055 that the insns deleted above don't actually trap. It would have been
3056 better to detect this earlier and avoid creating the EH edge in the first
3057 place, still, but we don't have enough information at that time. */
3059 if (control_flow_insn_deleted)
3060 cfg_altered |= purge_dead_edges (block);
3062 /* Something failed if the stack lives don't match. If we had malformed
3063 asms, we zapped the instruction itself, but that didn't produce the
3064 same pattern of register kills as before. */
3066 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3067 || any_malformed_asm);
3068 bi->stack_out = regstack;
3069 bi->done = true;
3071 return cfg_altered;
3074 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3075 CFG has been modified in the process. */
3077 static bool
3078 convert_regs_2 (basic_block block)
3080 basic_block *stack, *sp;
3081 bool cfg_altered = false;
3083 /* We process the blocks in a top-down manner, in a way such that one block
3084 is only processed after all its predecessors. The number of predecessors
3085 of every block has already been computed. */
3087 stack = XNEWVEC (basic_block, n_basic_blocks);
3088 sp = stack;
3090 *sp++ = block;
3094 edge e;
3095 edge_iterator ei;
3097 block = *--sp;
3099 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3100 some dead EH outgoing edge after the deletion of the trapping
3101 insn inside the block. Since the number of predecessors of
3102 BLOCK's successors was computed based on the initial edge set,
3103 we check the necessity to process some of these successors
3104 before such an edge deletion may happen. However, there is
3105 a pitfall: if BLOCK is the only predecessor of a successor and
3106 the edge between them happens to be deleted, the successor
3107 becomes unreachable and should not be processed. The problem
3108 is that there is no way to preventively detect this case so we
3109 stack the successor in all cases and hand over the task of
3110 fixing up the discrepancy to convert_regs_1. */
3112 FOR_EACH_EDGE (e, ei, block->succs)
3113 if (! (e->flags & EDGE_DFS_BACK))
3115 BLOCK_INFO (e->dest)->predecessors--;
3116 if (!BLOCK_INFO (e->dest)->predecessors)
3117 *sp++ = e->dest;
3120 cfg_altered |= convert_regs_1 (block);
3122 while (sp != stack);
3124 free (stack);
3126 return cfg_altered;
3129 /* Traverse all basic blocks in a function, converting the register
3130 references in each insn from the "flat" register file that gcc uses,
3131 to the stack-like registers the 387 uses. */
3133 static void
3134 convert_regs (void)
3136 bool cfg_altered = false;
3137 int inserted;
3138 basic_block b;
3139 edge e;
3140 edge_iterator ei;
3142 /* Initialize uninitialized registers on function entry. */
3143 inserted = convert_regs_entry ();
3145 /* Construct the desired stack for function exit. */
3146 convert_regs_exit ();
3147 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3149 /* ??? Future: process inner loops first, and give them arbitrary
3150 initial stacks which emit_swap_insn can modify. This ought to
3151 prevent double fxch that often appears at the head of a loop. */
3153 /* Process all blocks reachable from all entry points. */
3154 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3155 cfg_altered |= convert_regs_2 (e->dest);
3157 /* ??? Process all unreachable blocks. Though there's no excuse
3158 for keeping these even when not optimizing. */
3159 FOR_EACH_BB (b)
3161 block_info bi = BLOCK_INFO (b);
3163 if (! bi->done)
3164 cfg_altered |= convert_regs_2 (b);
3167 /* We must fix up abnormal edges before inserting compensation code
3168 because both mechanisms insert insns on edges. */
3169 inserted |= fixup_abnormal_edges ();
3171 inserted |= compensate_edges ();
3173 clear_aux_for_blocks ();
3175 if (inserted)
3176 commit_edge_insertions ();
3178 if (cfg_altered)
3179 cleanup_cfg (0);
3181 if (dump_file)
3182 fputc ('\n', dump_file);
3185 /* Convert register usage from "flat" register file usage to a "stack
3186 register file. FILE is the dump file, if used.
3188 Construct a CFG and run life analysis. Then convert each insn one
3189 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3190 code duplication created when the converter inserts pop insns on
3191 the edges. */
3193 static bool
3194 reg_to_stack (void)
3196 basic_block bb;
3197 int i;
3198 int max_uid;
3200 /* Clean up previous run. */
3201 stack_regs_mentioned_data.release ();
3203 /* See if there is something to do. Flow analysis is quite
3204 expensive so we might save some compilation time. */
3205 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3206 if (df_regs_ever_live_p (i))
3207 break;
3208 if (i > LAST_STACK_REG)
3209 return false;
3211 df_note_add_problem ();
3212 df_analyze ();
3214 mark_dfs_back_edges ();
3216 /* Set up block info for each basic block. */
3217 alloc_aux_for_blocks (sizeof (struct block_info_def));
3218 FOR_EACH_BB (bb)
3220 block_info bi = BLOCK_INFO (bb);
3221 edge_iterator ei;
3222 edge e;
3223 int reg;
3225 FOR_EACH_EDGE (e, ei, bb->preds)
3226 if (!(e->flags & EDGE_DFS_BACK)
3227 && e->src != ENTRY_BLOCK_PTR)
3228 bi->predecessors++;
3230 /* Set current register status at last instruction `uninitialized'. */
3231 bi->stack_in.top = -2;
3233 /* Copy live_at_end and live_at_start into temporaries. */
3234 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3236 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3237 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3238 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3239 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3243 /* Create the replacement registers up front. */
3244 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3246 enum machine_mode mode;
3247 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3248 mode != VOIDmode;
3249 mode = GET_MODE_WIDER_MODE (mode))
3250 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3251 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3252 mode != VOIDmode;
3253 mode = GET_MODE_WIDER_MODE (mode))
3254 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3257 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3259 /* A QNaN for initializing uninitialized variables.
3261 ??? We can't load from constant memory in PIC mode, because
3262 we're inserting these instructions before the prologue and
3263 the PIC register hasn't been set up. In that case, fall back
3264 on zero, which we can get from `fldz'. */
3266 if ((flag_pic && !TARGET_64BIT)
3267 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3268 not_a_num = CONST0_RTX (SFmode);
3269 else
3271 REAL_VALUE_TYPE r;
3273 real_nan (&r, "", 1, SFmode);
3274 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3275 not_a_num = force_const_mem (SFmode, not_a_num);
3278 /* Allocate a cache for stack_regs_mentioned. */
3279 max_uid = get_max_uid ();
3280 stack_regs_mentioned_data.create (max_uid + 1);
3281 memset (stack_regs_mentioned_data.address (),
3282 0, sizeof (char) * (max_uid + 1));
3284 convert_regs ();
3286 free_aux_for_blocks ();
3287 return true;
3289 #endif /* STACK_REGS */
3291 static bool
3292 gate_handle_stack_regs (void)
3294 #ifdef STACK_REGS
3295 return 1;
3296 #else
3297 return 0;
3298 #endif
3301 struct rtl_opt_pass pass_stack_regs =
3304 RTL_PASS,
3305 "*stack_regs", /* name */
3306 OPTGROUP_NONE, /* optinfo_flags */
3307 gate_handle_stack_regs, /* gate */
3308 NULL, /* execute */
3309 NULL, /* sub */
3310 NULL, /* next */
3311 0, /* static_pass_number */
3312 TV_REG_STACK, /* tv_id */
3313 0, /* properties_required */
3314 0, /* properties_provided */
3315 0, /* properties_destroyed */
3316 0, /* todo_flags_start */
3317 0 /* todo_flags_finish */
3321 /* Convert register usage from flat register file usage to a stack
3322 register file. */
3323 static unsigned int
3324 rest_of_handle_stack_regs (void)
3326 #ifdef STACK_REGS
3327 reg_to_stack ();
3328 regstack_completed = 1;
3329 #endif
3330 return 0;
3333 struct rtl_opt_pass pass_stack_regs_run =
3336 RTL_PASS,
3337 "stack", /* name */
3338 OPTGROUP_NONE, /* optinfo_flags */
3339 NULL, /* gate */
3340 rest_of_handle_stack_regs, /* execute */
3341 NULL, /* sub */
3342 NULL, /* next */
3343 0, /* static_pass_number */
3344 TV_REG_STACK, /* tv_id */
3345 0, /* properties_required */
3346 0, /* properties_provided */
3347 0, /* properties_destroyed */
3348 0, /* todo_flags_start */
3349 TODO_df_finish | TODO_verify_rtl_sharing |
3350 TODO_ggc_collect /* todo_flags_finish */