aarch64: PR target/108840 Simplify register shift RTX costs and eliminate shift amoun...
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / pr108840.c
blob804c1cd915675ed3f4ad8e668548c885574fb18a
1 /* PR target/108840. Check that the explicit &31 is eliminated. */
2 /* { dg-do compile } */
3 /* { dg-options "-O" } */
5 int
6 foo (int x, int y)
8 return x << (y & 31);
11 void
12 bar (int x[3], int y)
14 x[0] <<= (y & 31);
15 x[1] <<= (y & 31);
16 x[2] <<= (y & 31);
19 void
20 baz (int x[3], int y)
22 y &= 31;
23 x[0] <<= y;
24 x[1] <<= y;
25 x[2] <<= y;
28 void corge (int, int, int);
30 void
31 qux (int x, int y, int z, int n)
33 n &= 31;
34 corge (x << n, y << n, z >> n);
37 /* { dg-final { scan-assembler-not {and\tw[0-9]+, w[0-9]+, 31} } } */