gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
   3    Free Software Foundation, Inc.
   4    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   5                   Ulrich Weigand (uweigand@de.ibm.com).
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify it under
  10 the terms of the GNU General Public License as published by the Free
  11 Software Foundation; either version 2, or (at your option) any later
  12 version.
  13
  14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  17 for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to the Free
  21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
  22 02110-1301, USA.  */
  23
  24 #ifndef _S390_H
  25 #define _S390_H
  26
  27 /* Override the __fixdfdi etc. routines when building libgcc2.
  28    ??? This should be done in a cleaner way ...  */
  29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
  30 #include <config/s390/fixdfdi.h>
  31 #endif
  32
  33 /* Which processor to generate code or schedule for. The cpu attribute
  34    defines a list that mirrors this list, so changes to s390.md must be
  35    made at the same time.  */
  36
  37 enum processor_type
  38 {
  39   PROCESSOR_9672_G5,
  40   PROCESSOR_9672_G6,
  41   PROCESSOR_2064_Z900,
  42   PROCESSOR_2084_Z990,
  43   PROCESSOR_max
  44 };
  45
  46 /* Optional architectural facilities supported by the processor.  */
  47
  48 enum processor_flags
  49 {
  50   PF_IEEE_FLOAT = 1,
  51   PF_ZARCH = 2,
  52   PF_LONG_DISPLACEMENT = 4
  53 };
  54
  55 extern enum processor_type s390_tune;
  56 extern enum processor_flags s390_tune_flags;
  57
  58 extern enum processor_type s390_arch;
  59 extern enum processor_flags s390_arch_flags;
  60
  61 #define TARGET_CPU_IEEE_FLOAT \
  62         (s390_arch_flags & PF_IEEE_FLOAT)
  63 #define TARGET_CPU_ZARCH \
  64         (s390_arch_flags & PF_ZARCH)
  65 #define TARGET_CPU_LONG_DISPLACEMENT \
  66         (s390_arch_flags & PF_LONG_DISPLACEMENT)
  67
  68 #define TARGET_LONG_DISPLACEMENT \
  69        (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
  70
  71
  72 /* Run-time target specification.  */
  73
  74 /* This will be overridden by OS headers.  */
  75 #define TARGET_TPF 0
  76
  77 /* Target CPU builtins.  */
  78 #define TARGET_CPU_CPP_BUILTINS()                       \
  79   do                                                    \
  80     {                                                   \
  81       builtin_assert ("cpu=s390");                      \
  82       builtin_assert ("machine=s390");                  \
  83       builtin_define ("__s390__");                      \
  84       if (TARGET_64BIT)                                 \
  85         builtin_define ("__s390x__");                   \
  86     }                                                   \
  87   while (0)
  88
  89 /* ??? Once this actually works, it could be made a runtime option.  */
  90 #define TARGET_IBM_FLOAT           0
  91 #define TARGET_IEEE_FLOAT          1
  92
  93 #ifdef DEFAULT_TARGET_64BIT
  94 #define TARGET_DEFAULT             (MASK_64BIT | MASK_ZARCH | MASK_HARD_FLOAT)
  95 #else
  96 #define TARGET_DEFAULT             MASK_HARD_FLOAT
  97 #endif
  98
  99 /* Support for configure-time defaults.  */
 100 #define OPTION_DEFAULT_SPECS                                    \
 101   { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" },                 \
 102   { "arch", "%{!march=*:-march=%(VALUE)}" },                    \
 103   { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
 104
 105 /* Defaulting rules.  */
 106 #ifdef DEFAULT_TARGET_64BIT
 107 #define DRIVER_SELF_SPECS                                       \
 108   "%{!m31:%{!m64:-m64}}",                                       \
 109   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 110   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 111 #else
 112 #define DRIVER_SELF_SPECS                                       \
 113   "%{!m31:%{!m64:-m31}}",                                       \
 114   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 115   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 116 #endif
 117
 118 /* Target version string.  Overridden by the OS header.  */
 119 #ifdef DEFAULT_TARGET_64BIT
 120 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 121 #else
 122 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 123 #endif
 124
 125 /* Hooks to override options.  */
 126 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 127 #define OVERRIDE_OPTIONS override_options ()
 128
 129 /* Frame pointer is not used for debugging.  */
 130 #define CAN_DEBUG_WITHOUT_FP
 131
 132
 133 /* In libgcc2, determine target settings as compile-time constants.  */
 134 #ifdef IN_LIBGCC2
 135 #undef TARGET_64BIT
 136 #ifdef __s390x__
 137 #define TARGET_64BIT 1
 138 #else
 139 #define TARGET_64BIT 0
 140 #endif
 141 #endif
 142
 143
 144 /* Target machine storage layout.  */
 145
 146 /* Everything is big-endian.  */
 147 #define BITS_BIG_ENDIAN 1
 148 #define BYTES_BIG_ENDIAN 1
 149 #define WORDS_BIG_ENDIAN 1
 150
 151 /* Width of a word, in units (bytes).  */
 152 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 153 #ifndef IN_LIBGCC2
 154 #define MIN_UNITS_PER_WORD 4
 155 #endif
 156 #define MAX_BITS_PER_WORD 64
 157
 158 /* Function arguments and return values are promoted to word size.  */
 159 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)            \
 160 if (INTEGRAL_MODE_P (MODE) &&                           \
 161     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 162   (MODE) = Pmode;                                       \
 163           }
 164
 165 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 166 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 167
 168 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 169 #define STACK_BOUNDARY 64
 170
 171 /* Allocation boundary (in *bits*) for the code of a function.  */
 172 #define FUNCTION_BOUNDARY 32
 173
 174 /* There is no point aligning anything to a rounder boundary than this.  */
 175 #define BIGGEST_ALIGNMENT 64
 176
 177 /* Alignment of field after `int : 0' in a structure.  */
 178 #define EMPTY_FIELD_BOUNDARY 32
 179
 180 /* Alignment on even addresses for LARL instruction.  */
 181 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 182 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 183
 184 /* Alignment is not required by the hardware.  */
 185 #define STRICT_ALIGNMENT 0
 186
 187 /* Mode of stack savearea.
 188    FUNCTION is VOIDmode because calling convention maintains SP.
 189    BLOCK needs Pmode for SP.
 190    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 191 #define STACK_SAVEAREA_MODE(LEVEL)      \
 192   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 193   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
 194
 195 /* Define target floating point format.  */
 196 #define TARGET_FLOAT_FORMAT \
 197   (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
 198
 199
 200 /* Type layout.  */
 201
 202 /* Sizes in bits of the source language data types.  */
 203 #define SHORT_TYPE_SIZE 16
 204 #define INT_TYPE_SIZE 32
 205 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 206 #define LONG_LONG_TYPE_SIZE 64
 207 #define FLOAT_TYPE_SIZE 32
 208 #define DOUBLE_TYPE_SIZE 64
 209 #define LONG_DOUBLE_TYPE_SIZE 64  /* ??? Should support extended format.  */
 210
 211 /* We use "unsigned char" as default.  */
 212 #define DEFAULT_SIGNED_CHAR 0
 213
 214
 215 /* Register usage.  */
 216
 217 /* We have 16 general purpose registers (registers 0-15),
 218    and 16 floating point registers (registers 16-31).
 219    (On non-IEEE machines, we have only 4 fp registers.)
 220
 221    Amongst the general purpose registers, some are used
 222    for specific purposes:
 223    GPR 11: Hard frame pointer (if needed)
 224    GPR 12: Global offset table pointer (if needed)
 225    GPR 13: Literal pool base register
 226    GPR 14: Return address register
 227    GPR 15: Stack pointer
 228
 229    Registers 32-35 are 'fake' hard registers that do not
 230    correspond to actual hardware:
 231    Reg 32: Argument pointer
 232    Reg 33: Condition code
 233    Reg 34: Frame pointer
 234    Reg 35: Return address pointer
 235
 236    Registers 36 and 37 are mapped to access registers
 237    0 and 1, used to implement thread-local storage.  */
 238
 239 #define FIRST_PSEUDO_REGISTER 38
 240
 241 /* Standard register usage.  */
 242 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 243 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 244 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
 245 #define CC_REGNO_P(N)           ((N) == 33)
 246 #define FRAME_REGNO_P(N)        ((N) == 32 || (N) == 34 || (N) == 35)
 247 #define ACCESS_REGNO_P(N)       ((N) == 36 || (N) == 37)
 248
 249 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 250 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 251 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 252 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 253 #define FRAME_REG_P(X)          (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
 254 #define ACCESS_REG_P(X)         (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
 255
 256 /* Set up fixed registers and calling convention:
 257
 258    GPRs 0-5 are always call-clobbered,
 259    GPRs 6-15 are always call-saved.
 260    GPR 12 is fixed if used as GOT pointer.
 261    GPR 13 is always fixed (as literal pool pointer).
 262    GPR 14 is always fixed on S/390 machines (as return address).
 263    GPR 15 is always fixed (as stack pointer).
 264    The 'fake' hard registers are call-clobbered and fixed.
 265    The access registers are call-saved and fixed.
 266
 267    On 31-bit, FPRs 18-19 are call-clobbered;
 268    on 64-bit, FPRs 24-31 are call-clobbered.
 269    The remaining FPRs are call-saved.  */
 270
 271 #define FIXED_REGISTERS                         \
 272 { 0, 0, 0, 0,                                   \
 273   0, 0, 0, 0,                                   \
 274   0, 0, 0, 0,                                   \
 275   0, 1, 1, 1,                                   \
 276   0, 0, 0, 0,                                   \
 277   0, 0, 0, 0,                                   \
 278   0, 0, 0, 0,                                   \
 279   0, 0, 0, 0,                                   \
 280   1, 1, 1, 1,                                   \
 281   1, 1 }
 282
 283 #define CALL_USED_REGISTERS                     \
 284 { 1, 1, 1, 1,                                   \
 285   1, 1, 0, 0,                                   \
 286   0, 0, 0, 0,                                   \
 287   0, 1, 1, 1,                                   \
 288   1, 1, 1, 1,                                   \
 289   1, 1, 1, 1,                                   \
 290   1, 1, 1, 1,                                   \
 291   1, 1, 1, 1,                                   \
 292   1, 1, 1, 1,                                   \
 293   1, 1 }
 294
 295 #define CALL_REALLY_USED_REGISTERS              \
 296 { 1, 1, 1, 1,                                   \
 297   1, 1, 0, 0,                                   \
 298   0, 0, 0, 0,                                   \
 299   0, 0, 0, 0,                                   \
 300   1, 1, 1, 1,                                   \
 301   1, 1, 1, 1,                                   \
 302   1, 1, 1, 1,                                   \
 303   1, 1, 1, 1,                                   \
 304   1, 1, 1, 1,                                   \
 305   0, 0 }
 306
 307 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
 308
 309 /* Preferred register allocation order.  */
 310 #define REG_ALLOC_ORDER                                         \
 311 {  1, 2, 3, 4, 5, 0, 13, 12, 11, 10, 9, 8, 7, 6, 14,            \
 312    16, 17, 18, 19, 20, 21, 22, 23,                              \
 313    24, 25, 26, 27, 28, 29, 30, 31,                              \
 314    15, 32, 33, 34, 35, 36, 37 }
 315
 316
 317 /* Fitting values into registers.  */
 318
 319 /* Integer modes <= word size fit into any GPR.
 320    Integer modes > word size fit into successive GPRs, starting with
 321    an even-numbered register.
 322    SImode and DImode fit into FPRs as well.
 323
 324    Floating point modes <= word size fit into any FPR or GPR.
 325    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 326    into any FPR, or an even-odd GPR pair.
 327
 328    Complex floating point modes fit either into two FPRs, or into
 329    successive GPRs (again starting with an even number).
 330
 331    Condition code modes fit only into the CC register.  */
 332
 333 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 334   (FP_REGNO_P(REGNO)?                                           \
 335     (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :      \
 336    GENERAL_REGNO_P(REGNO)?                                      \
 337     ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
 338    ACCESS_REGNO_P(REGNO)?                                       \
 339     ((GET_MODE_SIZE(MODE)+4-1) / 4) :                           \
 340    1)
 341
 342 #define HARD_REGNO_MODE_OK(REGNO, MODE)                             \
 343   (FP_REGNO_P(REGNO)?                                               \
 344    ((MODE) == SImode || (MODE) == DImode ||                         \
 345     GET_MODE_CLASS(MODE) == MODE_FLOAT ||                           \
 346     GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) :                   \
 347    GENERAL_REGNO_P(REGNO)?                                          \
 348     (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) :        \
 349    CC_REGNO_P(REGNO)?                                               \
 350      GET_MODE_CLASS (MODE) == MODE_CC :                             \
 351    FRAME_REGNO_P(REGNO)?                                            \
 352      (enum machine_mode) (MODE) == Pmode :                          \
 353    ACCESS_REGNO_P(REGNO)?                                           \
 354      (((MODE) == SImode || ((enum machine_mode) (MODE) == Pmode))   \
 355       && (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))) :  \
 356    0)
 357
 358 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 359    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 360    == ((MODE2) == SFmode || (MODE2) == DFmode))
 361
 362 /* Maximum number of registers to represent a value of mode MODE
 363    in a register of class CLASS.  */
 364 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 365      ((CLASS) == FP_REGS ?                                              \
 366       (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :           \
 367       (CLASS) == ACCESS_REGS ?                                          \
 368       (GET_MODE_SIZE (MODE) + 4 - 1) / 4 :                              \
 369       (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 370
 371 /* If a 4-byte value is loaded into a FPR, it is placed into the
 372    *upper* half of the register, not the lower.  Therefore, we
 373    cannot use SUBREGs to switch between modes in FP registers.
 374    Likewise for access registers, since they have only half the
 375    word size on 64-bit.  */
 376 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)               \
 377   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)                   \
 378    ? reg_classes_intersect_p (FP_REGS, CLASS)                   \
 379      || reg_classes_intersect_p (ACCESS_REGS, CLASS) : 0)
 380
 381 /* Register classes.  */
 382
 383 /* We use the following register classes:
 384    GENERAL_REGS     All general purpose registers
 385    ADDR_REGS        All general purpose registers except %r0
 386                     (These registers can be used in address generation)
 387    FP_REGS          All floating point registers
 388    CC_REGS          The condition code register
 389    ACCESS_REGS      The access registers
 390
 391    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 392    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 393    GENERAL_CC_REGS  Union of GENERAL_REGS and CC_REGS
 394    ADDR_CC_REGS     Union of ADDR_REGS and CC_REGS
 395
 396    NO_REGS          No registers
 397    ALL_REGS         All registers
 398
 399    Note that the 'fake' frame pointer and argument pointer registers
 400    are included amongst the address registers here.  */
 401
 402 enum reg_class
 403 {
 404   NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
 405   ADDR_CC_REGS, GENERAL_CC_REGS,
 406   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 407   ALL_REGS, LIM_REG_CLASSES
 408 };
 409 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 410
 411 #define REG_CLASS_NAMES                                                 \
 412 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS",     \
 413   "ADDR_CC_REGS", "GENERAL_CC_REGS",                                    \
 414   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 415
 416 /* Class -> register mapping.  */
 417 #define REG_CLASS_CONTENTS \
 418 {                                                       \
 419   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 420   { 0x00000000, 0x00000002 },   /* CC_REGS */           \
 421   { 0x0000fffe, 0x0000000d },   /* ADDR_REGS */         \
 422   { 0x0000ffff, 0x0000000d },   /* GENERAL_REGS */      \
 423   { 0x00000000, 0x00000030 },   /* ACCESS_REGS */       \
 424   { 0x0000fffe, 0x0000000f },   /* ADDR_CC_REGS */      \
 425   { 0x0000ffff, 0x0000000f },   /* GENERAL_CC_REGS */   \
 426   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 427   { 0xfffffffe, 0x0000000d },   /* ADDR_FP_REGS */      \
 428   { 0xffffffff, 0x0000000d },   /* GENERAL_FP_REGS */   \
 429   { 0xffffffff, 0x0000003f },   /* ALL_REGS */          \
 430 }
 431
 432 /* Register -> class mapping.  */
 433 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 434 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 435
 436 /* ADDR_REGS can be used as base or index register.  */
 437 #define INDEX_REG_CLASS ADDR_REGS
 438 #define BASE_REG_CLASS ADDR_REGS
 439
 440 /* Check whether REGNO is a hard register of the suitable class
 441    or a pseudo register currently allocated to one such.  */
 442 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 443     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 444      && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                         \
 445     || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
 446 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 447
 448
 449 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 450    return the class of reg to actually use.  */
 451 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 452   s390_preferred_reload_class ((X), (CLASS))
 453
 454 /* We need a secondary reload when loading a PLUS which is
 455    not a valid operand for LOAD ADDRESS.  */
 456 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   \
 457   s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
 458
 459 /* We need a secondary reload when storing a double-word
 460    to a non-offsettable memory address.  */
 461 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
 462   s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
 463
 464 /* We need secondary memory to move data between GPRs and FPRs.  */
 465 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 466  ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
 467
 468 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 469    because the movsi and movsf patterns don't handle r/f moves.  */
 470 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 471  (GET_MODE_BITSIZE (MODE) < 32                          \
 472   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 473   : MODE)
 474
 475
 476 /* Define various machine-dependent constraint letters.  */
 477
 478 #define REG_CLASS_FROM_LETTER(C)                                        \
 479   ((C) == 'a' ? ADDR_REGS :                                             \
 480    (C) == 'd' ? GENERAL_REGS :                                          \
 481    (C) == 'f' ? FP_REGS :                                               \
 482    (C) == 'c' ? CC_REGS :                                               \
 483    (C) == 't' ? ACCESS_REGS : NO_REGS)
 484
 485 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
 486   s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
 487
 488 #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                 \
 489   s390_const_double_ok_for_constraint_p ((VALUE), (C), (STR))
 490
 491 #define EXTRA_CONSTRAINT_STR(OP, C, STR)                                \
 492   s390_extra_constraint_str ((OP), (C), (STR))
 493 #define EXTRA_MEMORY_CONSTRAINT(C, STR)                                 \
 494   ((C) == 'Q' || (C) == 'R' || (C) == 'S' || (C) == 'T' || (C) == 'A')
 495 #define EXTRA_ADDRESS_CONSTRAINT(C, STR)                                \
 496   ((C) == 'U' || (C) == 'W' || (C) == 'Y')
 497
 498 #define CONSTRAINT_LEN(C, STR)                                          \
 499   ((C) == 'N' ? 5 :                                                     \
 500    (C) == 'A' ? 2 :                                                     \
 501    (C) == 'B' ? 2 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
 502
 503 /* Stack layout and calling conventions.  */
 504
 505 /* Our stack grows from higher to lower addresses.  However, local variables
 506    are accessed by positive offsets, and function arguments are stored at
 507    increasing addresses.  */
 508 #define STACK_GROWS_DOWNWARD
 509 #define FRAME_GROWS_DOWNWARD 1
 510 /* #undef ARGS_GROW_DOWNWARD */
 511
 512 /* The basic stack layout looks like this: the stack pointer points
 513    to the register save area for called functions.  Above that area
 514    is the location to place outgoing arguments.  Above those follow
 515    dynamic allocations (alloca), and finally the local variables.  */
 516
 517 /* Offset from stack-pointer to first location of outgoing args.  */
 518 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 519
 520 /* Offset within stack frame to start allocating local variables at.  */
 521 #define STARTING_FRAME_OFFSET 0
 522
 523 /* Offset from the stack pointer register to an item dynamically
 524    allocated on the stack, e.g., by `alloca'.  */
 525 extern int current_function_outgoing_args_size;
 526 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
 527   (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
 528
 529 /* Offset of first parameter from the argument pointer register value.
 530    We have a fake argument pointer register that points directly to
 531    the argument area.  */
 532 #define FIRST_PARM_OFFSET(FNDECL) 0
 533
 534 /* Defining this macro makes __builtin_frame_address(0) and
 535    __builtin_return_address(0) work with -fomit-frame-pointer.  */
 536 #define INITIAL_FRAME_ADDRESS_RTX                                             \
 537   (TARGET_PACKED_STACK ?                                                      \
 538    plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) :                         \
 539    plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 540
 541 /* The return address of the current frame is retrieved
 542    from the initial value of register RETURN_REGNUM.
 543    For frames farther back, we use the stack slot where
 544    the corresponding RETURN_REGNUM register was saved.  */
 545 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                          \
 546   (TARGET_PACKED_STACK ?                                                      \
 547    plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
 548
 549 #define RETURN_ADDR_RTX(COUNT, FRAME)                                         \
 550   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 551
 552 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 553 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
 554
 555
 556 /* Exception handling.  */
 557
 558 /* Describe calling conventions for DWARF-2 exception handling.  */
 559 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 560 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 561 #define DWARF_FRAME_RETURN_COLUMN  14
 562
 563 /* Describe how we implement __builtin_eh_return.  */
 564 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 565 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
 566
 567 /* Select a format to encode pointers in exception handling data.  */
 568 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 569   (flag_pic                                                                 \
 570     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 571    : DW_EH_PE_absptr)
 572
 573
 574 /* Frame registers.  */
 575
 576 #define STACK_POINTER_REGNUM 15
 577 #define FRAME_POINTER_REGNUM 34
 578 #define HARD_FRAME_POINTER_REGNUM 11
 579 #define ARG_POINTER_REGNUM 32
 580 #define RETURN_ADDRESS_POINTER_REGNUM 35
 581
 582 /* The static chain must be call-clobbered, but not used for
 583    function argument passing.  As register 1 is clobbered by
 584    the trampoline code, we only have one option.  */
 585 #define STATIC_CHAIN_REGNUM 0
 586
 587 /* Number of hardware registers that go into the DWARF-2 unwind info.
 588    To avoid ABI incompatibility, this number must not change even as
 589    'fake' hard registers are added or removed.  */
 590 #define DWARF_FRAME_REGISTERS 34
 591
 592
 593 /* Frame pointer and argument pointer elimination.  */
 594
 595 #define FRAME_POINTER_REQUIRED 0
 596
 597 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
 598
 599 #define ELIMINABLE_REGS                                      \
 600 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},              \
 601  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},         \
 602  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 603  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},           \
 604  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},     \
 605  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 606
 607 #define CAN_ELIMINATE(FROM, TO) \
 608   s390_can_eliminate ((FROM), (TO))
 609
 610 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 611   (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
 612
 613
 614 /* Stack arguments.  */
 615
 616 /* We need current_function_outgoing_args to be valid.  */
 617 #define ACCUMULATE_OUTGOING_ARGS 1
 618
 619 /* Return doesn't modify the stack.  */
 620 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 621
 622
 623 /* Register arguments.  */
 624
 625 typedef struct s390_arg_structure
 626 {
 627   int gprs;                     /* gpr so far */
 628   int fprs;                     /* fpr so far */
 629 }
 630 CUMULATIVE_ARGS;
 631
 632 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
 633   ((CUM).gprs=0, (CUM).fprs=0)
 634
 635 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 636   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 637
 638 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 639   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 640
 641 /* Arguments can be placed in general registers 2 to 6,
 642    or in floating point registers 0 and 2.  */
 643 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 644                                  (N) == 16 || (N) == 17)
 645
 646
 647 /* Scalar return values.  */
 648
 649 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 650   s390_function_value ((VALTYPE), VOIDmode)
 651
 652 #define LIBCALL_VALUE(MODE) \
 653   s390_function_value (NULL, (MODE))
 654
 655 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 656 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 657
 658
 659 /* Function entry and exit.  */
 660
 661 /* When returning from a function, the stack pointer does not matter.  */
 662 #define EXIT_IGNORE_STACK       1
 663
 664
 665 /* Profiling.  */
 666
 667 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 668   s390_function_profiler ((FILE), ((LABELNO)))
 669
 670 #define PROFILE_BEFORE_PROLOGUE 1
 671
 672
 673 /* Implementing the varargs macros.  */
 674
 675 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 676   s390_va_start (valist, nextarg)
 677
 678 /* Trampolines for nested functions.  */
 679
 680 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
 681
 682 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 683    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 684
 685 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 686    s390_trampoline_template (FILE)
 687
 688
 689 /* Addressing modes, and classification of registers for them.  */
 690
 691 /* Recognize any constant value that is a valid address.  */
 692 #define CONSTANT_ADDRESS_P(X) 0
 693
 694 /* Maximum number of registers that can appear in a valid memory address.  */
 695 #define MAX_REGS_PER_ADDRESS 2
 696
 697 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
 698    its validity for a certain class.  We have two alternate definitions
 699    for each of them.  The usual definition accepts all pseudo regs; the
 700    other rejects them all.  The symbol REG_OK_STRICT causes the latter
 701    definition to be used.
 702
 703    Most source files want to accept pseudo regs in the hope that they will
 704    get allocated to the class that the insn wants them to be in.
 705    Some source files that are used after register allocation
 706    need to be strict.  */
 707
 708 #define REG_OK_FOR_INDEX_NONSTRICT_P(X)         \
 709 ((GET_MODE (X) == Pmode) &&                     \
 710  ((REGNO (X) >= FIRST_PSEUDO_REGISTER)          \
 711   || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
 712
 713 #define REG_OK_FOR_BASE_NONSTRICT_P(X)    REG_OK_FOR_INDEX_NONSTRICT_P (X)
 714
 715 #define REG_OK_FOR_INDEX_STRICT_P(X)                            \
 716 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
 717
 718 #define REG_OK_FOR_BASE_STRICT_P(X)                             \
 719 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
 720
 721 #ifndef REG_OK_STRICT
 722 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_NONSTRICT_P(X)
 723 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P(X)
 724 #else
 725 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_STRICT_P(X)
 726 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_STRICT_P(X)
 727 #endif
 728
 729 /* S/390 has no mode dependent addresses.  */
 730 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
 731
 732 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 733    valid memory address for an instruction.
 734    The MODE argument is the machine mode for the MEM expression
 735    that wants to use this address.  */
 736 #ifdef REG_OK_STRICT
 737 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 738 {                                                                       \
 739   if (legitimate_address_p (MODE, X, 1))                                \
 740     goto ADDR;                                                          \
 741 }
 742 #else
 743 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 744 {                                                                       \
 745   if (legitimate_address_p (MODE, X, 0))                                \
 746     goto ADDR;                                                          \
 747 }
 748 #endif
 749
 750 /* Try machine-dependent ways of modifying an illegitimate address
 751    to be legitimate.  If we find one, return the new, valid address.
 752    This macro is used in only one place: `memory_address' in explow.c.  */
 753 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 754 {                                                                       \
 755   (X) = legitimize_address (X, OLDX, MODE);                             \
 756   if (memory_address_p (MODE, X))                                       \
 757     goto WIN;                                                           \
 758 }
 759
 760 /* Try a machine-dependent way of reloading an illegitimate address
 761    operand.  If we find one, push the reload and jump to WIN.  This
 762    macro is used in only one place: `find_reloads_address' in reload.c.  */
 763 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 764 do {                                                                    \
 765   rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE));   \
 766   if (new)                                                              \
 767     {                                                                   \
 768       (AD) = new;                                                       \
 769       goto WIN;                                                         \
 770     }                                                                   \
 771 } while (0)
 772
 773 /* Nonzero if the constant value X is a legitimate general operand.
 774    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 775 #define LEGITIMATE_CONSTANT_P(X) \
 776      legitimate_constant_p (X)
 777
 778 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 779 #define SYMBOLIC_CONST(X)       \
 780 (GET_CODE (X) == SYMBOL_REF                                             \
 781  || GET_CODE (X) == LABEL_REF                                           \
 782  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 783
 784 #define TLS_SYMBOLIC_CONST(X)   \
 785 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X))       \
 786  || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
 787
 788
 789 /* Condition codes.  */
 790
 791 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 792    return the mode to be used for the comparison.  */
 793 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 794
 795 /* Canonicalize a comparison from one we don't have to one we do have.  */
 796 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
 797   s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
 798
 799 /* Define the information needed to generate branch and scc insns.  This is
 800    stored from the compare operation.  Note that we can't use "rtx" here
 801    since it hasn't been defined!  */
 802 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
 803
 804
 805 /* Relative costs of operations.  */
 806
 807 /* On s390, copy between fprs and gprs is expensive.  */
 808 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 809   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 810         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 811     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 812         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 813
 814 /* A C expression for the cost of moving data of mode M between a
 815    register and memory.  A value of 2 is the default; this cost is
 816    relative to those in `REGISTER_MOVE_COST'.  */
 817 #define MEMORY_MOVE_COST(M, C, I) 1
 818
 819 /* A C expression for the cost of a branch instruction.  A value of 1
 820    is the default; other values are interpreted relative to that.  */
 821 #define BRANCH_COST 1
 822
 823 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 824 #define SLOW_BYTE_ACCESS 1
 825
 826 /* An integer expression for the size in bits of the largest integer machine
 827    mode that should actually be used.  We allow pairs of registers.  */
 828 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
 829
 830 /* The maximum number of bytes that a single instruction can move quickly
 831    between memory and registers or between two memory locations.  */
 832 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 833 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
 834 #define MAX_MOVE_MAX 16
 835
 836 /* Determine whether to use move_by_pieces or block move insn.  */
 837 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 838   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 839     || (TARGET_64BIT && (SIZE) == 8) )
 840
 841 /* Determine whether to use clear_by_pieces or block clear insn.  */
 842 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 843   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 844     || (TARGET_64BIT && (SIZE) == 8) )
 845
 846 /* This macro is used to determine whether store_by_pieces should be
 847    called to "memset" storage with byte values other than zero, or
 848    to "memcpy" storage when the source is a constant string.  */
 849 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
 850
 851 /* Don't perform CSE on function addresses.  */
 852 #define NO_FUNCTION_CSE
 853
 854
 855 /* Sections.  */
 856
 857 /* Output before read-only data.  */
 858 #define TEXT_SECTION_ASM_OP ".text"
 859
 860 /* Output before writable (initialized) data.  */
 861 #define DATA_SECTION_ASM_OP ".data"
 862
 863 /* Output before writable (uninitialized) data.  */
 864 #define BSS_SECTION_ASM_OP ".bss"
 865
 866 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 867    in where code resides.  We have to write it as asm code.  */
 868 #ifndef __s390x__
 869 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 870     asm (SECTION_OP "\n\
 871         bras\t%r2,1f\n\
 872 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 873 1:      l\t%r3,0(%r2)\n\
 874         bas\t%r14,0(%r3,%r2)\n\
 875         .previous");
 876 #endif
 877
 878
 879 /* Position independent code.  */
 880
 881 extern int flag_pic;
 882
 883 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 884
 885 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 886
 887
 888 /* Assembler file format.  */
 889
 890 /* Character to start a comment.  */
 891 #define ASM_COMMENT_START "#"
 892
 893 /* Declare an uninitialized external linkage data object.  */
 894 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 895   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 896
 897 /* Globalizing directive for a label.  */
 898 #define GLOBAL_ASM_OP ".globl "
 899
 900 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 901 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 902   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 903
 904 /* Advance the location counter by SIZE bytes.  */
 905 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 906   fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 907
 908 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 909 #define LOCAL_LABEL_PREFIX "."
 910
 911 /* How to refer to registers in assembler output.  This sequence is
 912    indexed by compiler's hard-register-number (see above).  */
 913 #define REGISTER_NAMES                                                  \
 914 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 915   "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",       \
 916   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 917   "%f8",  "%f10", "%f12", "%f14", "%f9",  "%f11", "%f13", "%f15",       \
 918   "%ap",  "%cc",  "%fp",  "%rp",  "%a0",  "%a1"                         \
 919 }
 920
 921 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 922 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 923 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 924
 925 /* Output machine-dependent UNSPECs in address constants.  */
 926 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)          \
 927 do {                                                    \
 928   if (!s390_output_addr_const_extra (FILE, (X)))        \
 929     goto FAIL;                                          \
 930 } while (0);
 931
 932 /* Output an element of a case-vector that is absolute.  */
 933 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 934 do {                                                                    \
 935   char buf[32];                                                         \
 936   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 937   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 938   assemble_name ((FILE), buf);                                          \
 939   fputc ('\n', (FILE));                                                 \
 940 } while (0)
 941
 942 /* Output an element of a case-vector that is relative.  */
 943 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
 944 do {                                                                    \
 945   char buf[32];                                                         \
 946   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 947   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 948   assemble_name ((FILE), buf);                                          \
 949   fputc ('-', (FILE));                                                  \
 950   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
 951   assemble_name ((FILE), buf);                                          \
 952   fputc ('\n', (FILE));                                                 \
 953 } while (0)
 954
 955
 956 /* Miscellaneous parameters.  */
 957
 958 /* Specify the machine mode that this machine uses for the index in the
 959    tablejump instruction.  */
 960 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
 961
 962 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 963    is done just by pretending it is already truncated.  */
 964 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 965
 966 /* Specify the machine mode that pointers have.
 967    After generation of rtl, the compiler makes no further distinction
 968    between pointers and any other objects of this machine mode.  */
 969 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
 970
 971 /* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
 972 #define POINTERS_EXTEND_UNSIGNED -1
 973
 974 /* A function address in a call instruction is a byte address (for
 975    indexing purposes) so give the MEM rtx a byte's mode.  */
 976 #define FUNCTION_MODE QImode
 977
 978 /* Machine-specific symbol_ref flags.  */
 979 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
 980
 981 /* Check whether integer displacement is in range.  */
 982 #define DISP_IN_RANGE(d) \
 983   (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
 984                            : ((d) >= 0 && (d) <= 4095))
 985
 986 #endif