1 2018-01-16 Richard Biener <rguenther@suse.de>
3 PR tree-optimization/83867
4 * tree-vect-stmts.c (vect_transform_stmt): Precompute
5 nested_in_vect_loop_p since the scalar stmt may get invalidated.
7 2018-01-16 Jakub Jelinek <jakub@redhat.com>
10 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
11 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
12 If off is not INTEGER_CST, issue a may not be aligned warning
13 rather than isn't aligned. Use isn%'t rather than isn't.
14 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
16 <case MULT_EXPR>: Improve the case when bottom and one of the
17 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
18 operand, in that case check if the other operand is multiple of
19 bottom divided by the INTEGER_CST operand.
21 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
24 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
25 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
26 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
27 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
28 * config/pa/pa.c (pa_function_arg_advance): Likewise.
29 (pa_function_arg, pa_arg_partial_bytes): Likewise.
30 (pa_function_arg_size): New function.
32 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
34 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
35 in a separate statement.
37 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
39 PR tree-optimization/83847
40 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
41 group gathers and scatters.
43 2018-01-16 Jakub Jelinek <jakub@redhat.com>
45 PR rtl-optimization/86620
46 * params.def (max-sched-ready-insns): Bump minimum value to 1.
48 PR rtl-optimization/83213
49 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
50 to last if both are JUMP_INSNs.
52 PR tree-optimization/83843
53 * gimple-ssa-store-merging.c
54 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
55 store_immediate_info for bswap/nop orig_stores.
57 2018-01-15 Andrew Waterman <andrew@sifive.com>
59 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
61 <UDIV>: Increase cost if !TARGET_DIV.
63 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
65 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
66 (define_attr "cr_logical_3op"): New.
67 (cceq_ior_compare): Adjust.
68 (cceq_ior_compare_complement): Adjust.
69 (*cceq_rev_compare): Adjust.
70 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
71 (is_cracked_insn): Adjust.
72 (insn_must_be_first_in_group): Adjust.
73 * config/rs6000/40x.md: Adjust.
74 * config/rs6000/440.md: Adjust.
75 * config/rs6000/476.md: Adjust.
76 * config/rs6000/601.md: Adjust.
77 * config/rs6000/603.md: Adjust.
78 * config/rs6000/6xx.md: Adjust.
79 * config/rs6000/7450.md: Adjust.
80 * config/rs6000/7xx.md: Adjust.
81 * config/rs6000/8540.md: Adjust.
82 * config/rs6000/cell.md: Adjust.
83 * config/rs6000/e300c2c3.md: Adjust.
84 * config/rs6000/e500mc.md: Adjust.
85 * config/rs6000/e500mc64.md: Adjust.
86 * config/rs6000/e5500.md: Adjust.
87 * config/rs6000/e6500.md: Adjust.
88 * config/rs6000/mpc.md: Adjust.
89 * config/rs6000/power4.md: Adjust.
90 * config/rs6000/power5.md: Adjust.
91 * config/rs6000/power6.md: Adjust.
92 * config/rs6000/power7.md: Adjust.
93 * config/rs6000/power8.md: Adjust.
94 * config/rs6000/power9.md: Adjust.
95 * config/rs6000/rs64.md: Adjust.
96 * config/rs6000/titan.md: Adjust.
98 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
100 * config/i386/predicates.md (indirect_branch_operand): Rewrite
101 ix86_indirect_branch_register logic.
103 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
105 * config/i386/constraints.md (Bs): Update
106 ix86_indirect_branch_register check. Don't check
107 ix86_indirect_branch_register with GOT_memory_operand.
109 * config/i386/predicates.md (GOT_memory_operand): Don't check
110 ix86_indirect_branch_register here.
111 (GOT32_symbol_operand): Likewise.
113 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
115 * config/i386/predicates.md (constant_call_address_operand):
116 Rewrite ix86_indirect_branch_register logic.
117 (sibcall_insn_operand): Likewise.
119 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
121 * config/i386/constraints.md (Bs): Replace
122 ix86_indirect_branch_thunk_register with
123 ix86_indirect_branch_register.
125 * config/i386/i386.md (indirect_jump): Likewise.
126 (tablejump): Likewise.
127 (*sibcall_memory): Likewise.
128 (*sibcall_value_memory): Likewise.
129 Peepholes of indirect call and jump via memory: Likewise.
130 * config/i386/i386.opt: Likewise.
131 * config/i386/predicates.md (indirect_branch_operand): Likewise.
132 (GOT_memory_operand): Likewise.
133 (call_insn_operand): Likewise.
134 (sibcall_insn_operand): Likewise.
135 (GOT32_symbol_operand): Likewise.
137 2018-01-15 Jakub Jelinek <jakub@redhat.com>
140 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
141 type rather than type addr's type points to.
142 (expand_omp_atomic_mutex): Likewise.
143 (expand_omp_atomic): Likewise.
145 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
148 * config/i386/i386.c (output_indirect_thunk_function): Use
149 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
150 for __x86_return_thunk.
152 2018-01-15 Richard Biener <rguenther@suse.de>
155 * expmed.c (extract_bit_field_1): Fix typo.
157 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
160 * config/arm/iterators.md (VF): New mode iterator.
161 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
162 Remove integer-related logic from pattern.
163 (neon_vabd<mode>_3): Likewise.
165 2018-01-15 Jakub Jelinek <jakub@redhat.com>
168 * common.opt (fstrict-overflow): No longer an alias.
169 (fwrapv-pointer): New option.
170 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
171 also for pointer types based on flag_wrapv_pointer.
172 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
173 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
174 opts->x_flag_wrapv got set.
175 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
176 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
177 POINTER_TYPE_OVERFLOW_UNDEFINED.
178 * match.pd: Likewise in address comparison pattern.
179 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
181 2018-01-15 Richard Biener <rguenther@suse.de>
184 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
185 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
186 Reset type names to their identifier if their TYPE_DECL doesn't
187 have linkage (and thus is used for ODR and devirt).
188 (save_debug_info_for_decl): Remove.
189 (save_debug_info_for_type): Likewise.
190 (add_tree_to_fld_list): Adjust.
191 * tree-pretty-print.c (dump_generic_node): Make dumping of
192 type names more robust.
194 2018-01-15 Richard Biener <rguenther@suse.de>
196 * BASE-VER: Bump to 8.0.1.
198 2018-01-14 Martin Sebor <msebor@redhat.com>
201 * builtins.c (check_access): Avoid warning when the no-warning bit
204 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
206 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
207 * ira-color (allocno_hard_regs_compare): Likewise.
209 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
212 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
213 Use .pushsection/.popsection.
215 2018-01-14 Martin Sebor <msebor@redhat.com>
218 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
220 2018-01-14 Jakub Jelinek <jakub@redhat.com>
222 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
223 entry from extra_headers.
224 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
225 extra_headers, make the list bitwise identical to the i?86-*-* one.
227 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
229 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
230 -mcmodel=large with -mindirect-branch=thunk,
231 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
232 -mfunction-return=thunk-extern.
233 * doc/invoke.texi: Document -mcmodel=large is incompatible with
234 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
235 -mfunction-return=thunk and -mfunction-return=thunk-extern.
237 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
239 * config/i386/i386.c (print_reg): Print the name of the full
240 integer register without '%'.
241 (ix86_print_operand): Handle 'V'.
242 * doc/extend.texi: Document 'V' modifier.
244 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
246 * config/i386/constraints.md (Bs): Disallow memory operand for
247 -mindirect-branch-register.
249 * config/i386/predicates.md (indirect_branch_operand): Likewise.
250 (GOT_memory_operand): Likewise.
251 (call_insn_operand): Likewise.
252 (sibcall_insn_operand): Likewise.
253 (GOT32_symbol_operand): Likewise.
254 * config/i386/i386.md (indirect_jump): Call convert_memory_address
255 for -mindirect-branch-register.
256 (tablejump): Likewise.
257 (*sibcall_memory): Likewise.
258 (*sibcall_value_memory): Likewise.
259 Disallow peepholes of indirect call and jump via memory for
260 -mindirect-branch-register.
261 (*call_pop): Replace m with Bw.
262 (*call_value_pop): Likewise.
263 (*sibcall_pop_memory): Replace m with Bs.
264 * config/i386/i386.opt (mindirect-branch-register): New option.
265 * doc/invoke.texi: Document -mindirect-branch-register option.
267 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
269 * config/i386/i386-protos.h (ix86_output_function_return): New.
270 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
271 set function_return_type.
272 (indirect_thunk_name): Add ret_p to indicate thunk for function
274 (output_indirect_thunk_function): Pass false to
276 (ix86_output_indirect_branch_via_reg): Likewise.
277 (ix86_output_indirect_branch_via_push): Likewise.
278 (output_indirect_thunk_function): Create alias for function
279 return thunk if regno < 0.
280 (ix86_output_function_return): New function.
281 (ix86_handle_fndecl_attribute): Handle function_return.
282 (ix86_attribute_table): Add function_return.
283 * config/i386/i386.h (machine_function): Add
284 function_return_type.
285 * config/i386/i386.md (simple_return_internal): Use
286 ix86_output_function_return.
287 (simple_return_internal_long): Likewise.
288 * config/i386/i386.opt (mfunction-return=): New option.
289 (indirect_branch): Mention -mfunction-return=.
290 * doc/extend.texi: Document function_return function attribute.
291 * doc/invoke.texi: Document -mfunction-return= option.
293 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
295 * config/i386/i386-opts.h (indirect_branch): New.
296 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
297 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
298 with local indirect jump when converting indirect call and jump.
299 (ix86_set_indirect_branch_type): New.
300 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
301 (indirectlabelno): New.
302 (indirect_thunk_needed): Likewise.
303 (indirect_thunk_bnd_needed): Likewise.
304 (indirect_thunks_used): Likewise.
305 (indirect_thunks_bnd_used): Likewise.
306 (INDIRECT_LABEL): Likewise.
307 (indirect_thunk_name): Likewise.
308 (output_indirect_thunk): Likewise.
309 (output_indirect_thunk_function): Likewise.
310 (ix86_output_indirect_branch_via_reg): Likewise.
311 (ix86_output_indirect_branch_via_push): Likewise.
312 (ix86_output_indirect_branch): Likewise.
313 (ix86_output_indirect_jmp): Likewise.
314 (ix86_code_end): Call output_indirect_thunk_function if needed.
315 (ix86_output_call_insn): Call ix86_output_indirect_branch if
317 (ix86_handle_fndecl_attribute): Handle indirect_branch.
318 (ix86_attribute_table): Add indirect_branch.
319 * config/i386/i386.h (machine_function): Add indirect_branch_type
320 and has_local_indirect_jump.
321 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
323 (tablejump): Likewise.
324 (*indirect_jump): Use ix86_output_indirect_jmp.
325 (*tablejump_1): Likewise.
326 (simple_return_indirect_internal): Likewise.
327 * config/i386/i386.opt (mindirect-branch=): New option.
328 (indirect_branch): New.
331 (thunk-inline): Likewise.
332 (thunk-extern): Likewise.
333 * doc/extend.texi: Document indirect_branch function attribute.
334 * doc/invoke.texi: Document -mindirect-branch= option.
336 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
339 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
341 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
343 * ipa-inline.c (want_inline_small_function_p): Return false if
344 inlining has already failed with CIF_FINAL_ERROR.
345 (update_caller_keys): Call want_inline_small_function_p before
347 (update_callee_keys): Likewise.
349 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
351 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
353 (rs6000_quadword_masked_address_p): Likewise.
354 (quad_aligned_load_p): Likewise.
355 (quad_aligned_store_p): Likewise.
356 (const_load_sequence_p): Add comment to describe the outer-most loop.
357 (mimic_memory_attributes_and_flags): New function.
358 (rs6000_gen_stvx): Likewise.
359 (replace_swapped_aligned_store): Likewise.
360 (rs6000_gen_lvx): Likewise.
361 (replace_swapped_aligned_load): Likewise.
362 (replace_swapped_load_constant): Capitalize argument name in
363 comment describing this function.
364 (rs6000_analyze_swaps): Add a third pass to search for vector loads
365 and stores that access quad-word aligned addresses and replace
366 with stvx or lvx instructions when appropriate.
367 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
368 New function prototype.
369 (rs6000_quadword_masked_address_p): Likewise.
370 (rs6000_gen_lvx): Likewise.
371 (rs6000_gen_stvx): Likewise.
372 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
373 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
374 when memory address is aligned.
375 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
376 this split to select lvx instruction when memory address is aligned.
377 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
378 instruction when memory address is aligned.
379 (*vsx_le_perm_load_v16qi): Likewise.
380 (four unnamed splitters): Modify to select the stvx instruction
381 when memory is aligned.
383 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
385 * predict.c (determine_unlikely_bbs): Handle correctly BBs
386 which appears in the queue multiple times.
388 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
389 Alan Hayward <alan.hayward@arm.com>
390 David Sherwood <david.sherwood@arm.com>
392 * tree-vectorizer.h (vec_lower_bound): New structure.
393 (_loop_vec_info): Add check_nonzero and lower_bounds.
394 (LOOP_VINFO_CHECK_NONZERO): New macro.
395 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
396 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
397 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
398 fields. Make seg_len the distance travelled, not including the
400 (dr_direction_indicator): Declare.
401 (dr_zero_step_indicator): Likewise.
402 (dr_known_forward_stride_p): Likewise.
403 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
405 (runtime_alias_check_p): Allow runtime alias checks with
407 (operator ==): Compare access_size and align.
408 (prune_runtime_alias_test_list): Rework for new distinction between
409 the access_size and seg_len.
410 (create_intersect_range_checks_index): Likewise. Cope with polynomial
412 (get_segment_min_max): New function.
413 (create_intersect_range_checks): Use it.
414 (dr_step_indicator): New function.
415 (dr_direction_indicator): Likewise.
416 (dr_zero_step_indicator): Likewise.
417 (dr_known_forward_stride_p): Likewise.
418 * tree-loop-distribution.c (data_ref_segment_size): Return
419 DR_STEP * (niters - 1).
420 (compute_alias_check_pairs): Update call to the dr_with_seg_len
422 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
423 (vect_preserves_scalar_order_p): New function, split out from...
424 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
425 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
426 (vect_vfa_access_size): New function.
427 (vect_vfa_align): Likewise.
428 (vect_compile_time_alias): Take access_size_a and access_b arguments.
429 (dump_lower_bound): New function.
430 (vect_check_lower_bound): Likewise.
431 (vect_small_gap_p): Likewise.
432 (vectorizable_with_step_bound_p): Likewise.
433 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
434 depencies if the vectorization factor is 1. Convert the checks
435 for nonzero steps into checks on the bounds of DR_STEP. Try using
436 a bunds check for variable steps if the minimum required step is
437 relatively small. Update calls to the dr_with_seg_len
438 constructor and to vect_compile_time_alias.
439 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
441 (vect_loop_versioning): Call it.
442 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
444 (vect_estimate_min_profitable_iters): Account for any bounds checks.
446 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
447 Alan Hayward <alan.hayward@arm.com>
448 David Sherwood <david.sherwood@arm.com>
450 * doc/sourcebuild.texi (vect_scatter_store): Document.
451 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
453 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
455 * genopinit.c (main): Add supports_vec_scatter_store and
456 supports_vec_scatter_store_cached to target_optabs.
457 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
458 IFN_MASK_SCATTER_STORE.
459 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
461 * internal-fn.h (internal_store_fn_p): Declare.
462 (internal_fn_stored_value_index): Likewise.
463 * internal-fn.c (scatter_store_direct): New macro.
464 (expand_scatter_store_optab_fn): New function.
465 (direct_scatter_store_optab_supported_p): New macro.
466 (internal_store_fn_p): New function.
467 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
468 IFN_MASK_SCATTER_STORE.
469 (internal_fn_mask_index): Likewise.
470 (internal_fn_stored_value_index): New function.
471 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
473 * optabs-query.h (supports_vec_scatter_store_p): Declare.
474 * optabs-query.c (supports_vec_scatter_store_p): New function.
475 * tree-vectorizer.h (vect_get_store_rhs): Declare.
476 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
477 true for scatter stores.
478 (vect_gather_scatter_fn_p): Handle scatter stores too.
479 (vect_check_gather_scatter): Consider using scatter stores if
480 supports_vec_scatter_store_p.
481 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
483 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
484 internal_fn_stored_value_index.
485 (check_load_store_masking): Handle scatter stores too.
486 (vect_get_store_rhs): Make public.
487 (vectorizable_call): Use internal_store_fn_p.
488 (vectorizable_store): Handle scatter store internal functions.
489 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
490 when deciding whether the end of the group has been reached.
491 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
492 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
493 (mask_scatter_store<mode>): New insns.
495 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
496 Alan Hayward <alan.hayward@arm.com>
497 David Sherwood <david.sherwood@arm.com>
499 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
500 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
501 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
503 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
504 Use vect_truncate_gather_scatter_offset if we can't treat the
505 operation as a normal gather load or scatter store.
506 (get_group_load_store_type): Take the gather_scatter_info
507 as argument. Try using a gather load or scatter store for
508 single-element groups.
509 (get_load_store_type): Update calls to get_group_load_store_type
510 and vect_use_strided_gather_scatters_p.
512 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
513 Alan Hayward <alan.hayward@arm.com>
514 David Sherwood <david.sherwood@arm.com>
516 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
517 optional tree argument.
518 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
520 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
521 but continue to use the current value as a fallback.
522 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
523 to compare the updates.
524 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
525 (get_load_store_type): Use it when handling a strided access.
526 (vect_get_strided_load_store_ops): New function.
527 (vect_get_data_ptr_increment): Likewise.
528 (vectorizable_load): Handle strided gather loads. Always pass
529 a step to vect_create_data_ref_ptr and bump_vector_ptr.
531 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
532 Alan Hayward <alan.hayward@arm.com>
533 David Sherwood <david.sherwood@arm.com>
535 * doc/md.texi (gather_load@var{m}): Document.
536 (mask_gather_load@var{m}): Likewise.
537 * genopinit.c (main): Add supports_vec_gather_load and
538 supports_vec_gather_load_cached to target_optabs.
539 * optabs-tree.c (init_tree_optimization_optabs): Use
540 ggc_cleared_alloc to allocate target_optabs.
541 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
542 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
544 * internal-fn.h (internal_load_fn_p): Declare.
545 (internal_gather_scatter_fn_p): Likewise.
546 (internal_fn_mask_index): Likewise.
547 (internal_gather_scatter_fn_supported_p): Likewise.
548 * internal-fn.c (gather_load_direct): New macro.
549 (expand_gather_load_optab_fn): New function.
550 (direct_gather_load_optab_supported_p): New macro.
551 (direct_internal_fn_optab): New function.
552 (internal_load_fn_p): Likewise.
553 (internal_gather_scatter_fn_p): Likewise.
554 (internal_fn_mask_index): Likewise.
555 (internal_gather_scatter_fn_supported_p): Likewise.
556 * optabs-query.c (supports_at_least_one_mode_p): New function.
557 (supports_vec_gather_load_p): Likewise.
558 * optabs-query.h (supports_vec_gather_load_p): Declare.
559 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
560 and memory_type field.
561 (NUM_PATTERNS): Bump to 15.
562 * tree-vect-data-refs.c: Include internal-fn.h.
563 (vect_gather_scatter_fn_p): New function.
564 (vect_describe_gather_scatter_call): Likewise.
565 (vect_check_gather_scatter): Try using internal functions for
566 gather loads. Recognize existing calls to a gather load function.
567 (vect_analyze_data_refs): Consider using gather loads if
568 supports_vec_gather_load_p.
569 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
570 (vect_get_gather_scatter_offset_type): Likewise.
571 (vect_convert_mask_for_vectype): Likewise.
572 (vect_add_conversion_to_patterm): Likewise.
573 (vect_try_gather_scatter_pattern): Likewise.
574 (vect_recog_gather_scatter_pattern): New pattern recognizer.
575 (vect_vect_recog_func_ptrs): Add it.
576 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
577 internal_fn_mask_index and internal_gather_scatter_fn_p.
578 (check_load_store_masking): Take the gather_scatter_info as an
579 argument and handle gather loads.
580 (vect_get_gather_scatter_ops): New function.
581 (vectorizable_call): Check internal_load_fn_p.
582 (vectorizable_load): Likewise. Handle gather load internal
584 (vectorizable_store): Update call to check_load_store_masking.
585 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
586 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
587 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
588 (aarch64_gather_scale_operand_d): New predicates.
589 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
590 (mask_gather_load<mode>): New insns.
592 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
593 Alan Hayward <alan.hayward@arm.com>
594 David Sherwood <david.sherwood@arm.com>
596 * optabs.def (fold_left_plus_optab): New optab.
597 * doc/md.texi (fold_left_plus_@var{m}): Document.
598 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
599 * internal-fn.c (fold_left_direct): Define.
600 (expand_fold_left_optab_fn): Likewise.
601 (direct_fold_left_optab_supported_p): Likewise.
602 * fold-const-call.c (fold_const_fold_left): New function.
603 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
604 * tree-parloops.c (valid_reduction_p): New function.
605 (gather_scalar_reductions): Use it.
606 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
607 (vect_finish_replace_stmt): Declare.
608 * tree-vect-loop.c (fold_left_reduction_fn): New function.
609 (needs_fold_left_reduction_p): New function, split out from...
610 (vect_is_simple_reduction): ...here. Accept reductions that
611 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
612 (vect_force_simple_reduction): Also store the reduction type in
613 the assignment's STMT_VINFO_REDUC_TYPE.
614 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
615 (merge_with_identity): New function.
616 (vect_expand_fold_left): Likewise.
617 (vectorize_fold_left_reduction): Likewise.
618 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
619 scalar phi in place for it. Check for target support and reject
620 cases that would reassociate the operation. Defer the transform
621 phase to vectorize_fold_left_reduction.
622 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
623 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
624 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
626 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
628 * tree-if-conv.c (predicate_mem_writes): Remove redundant
629 call to ifc_temp_var.
631 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
632 Alan Hayward <alan.hayward@arm.com>
633 David Sherwood <david.sherwood@arm.com>
635 * target.def (legitimize_address_displacement): Take the original
636 offset as a poly_int.
637 * targhooks.h (default_legitimize_address_displacement): Update
639 * targhooks.c (default_legitimize_address_displacement): Likewise.
640 * doc/tm.texi: Regenerate.
641 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
642 as an argument, moving assert of ad->disp == ad->disp_term to...
643 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
644 Try calling targetm.legitimize_address_displacement before expanding
645 the address rather than afterwards, and adjust for the new interface.
646 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
647 Match the new hook interface. Handle SVE addresses.
648 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
651 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
653 * Makefile.in (OBJS): Add early-remat.o.
654 * target.def (select_early_remat_modes): New hook.
655 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
656 * doc/tm.texi: Regenerate.
657 * targhooks.h (default_select_early_remat_modes): Declare.
658 * targhooks.c (default_select_early_remat_modes): New function.
659 * timevar.def (TV_EARLY_REMAT): New timevar.
660 * passes.def (pass_early_remat): New pass.
661 * tree-pass.h (make_pass_early_remat): Declare.
662 * early-remat.c: New file.
663 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
665 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
667 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
668 Alan Hayward <alan.hayward@arm.com>
669 David Sherwood <david.sherwood@arm.com>
671 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
672 vfm1 with a bound_epilog parameter.
673 (vect_do_peeling): Update calls accordingly, and move the prologue
674 call earlier in the function. Treat the base bound_epilog as 0 for
675 fully-masked loops and retain vf - 1 for other loops. Add 1 to
676 this base when peeling for gaps.
677 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
678 with fully-masked loops.
679 (vect_estimate_min_profitable_iters): Handle the single peeled
680 iteration in that case.
682 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
683 Alan Hayward <alan.hayward@arm.com>
684 David Sherwood <david.sherwood@arm.com>
686 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
687 single-element interleaving even if the size is not a power of 2.
688 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
689 accesses for single-element interleaving if the group size is
692 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
693 Alan Hayward <alan.hayward@arm.com>
694 David Sherwood <david.sherwood@arm.com>
696 * doc/md.texi (fold_extract_last_@var{m}): Document.
697 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
698 * optabs.def (fold_extract_last_optab): New optab.
699 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
700 * internal-fn.c (fold_extract_direct): New macro.
701 (expand_fold_extract_optab_fn): Likewise.
702 (direct_fold_extract_optab_supported_p): Likewise.
703 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
704 * tree-vect-loop.c (vect_model_reduction_cost): Handle
705 EXTRACT_LAST_REDUCTION.
706 (get_initial_def_for_reduction): Do not create an initial vector
707 for EXTRACT_LAST_REDUCTION reductions.
708 (vectorizable_reduction): Leave the scalar phi in place for
709 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
710 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
711 epilogue code for EXTRACT_LAST_REDUCTION and defer the
712 transform phase to vectorizable_condition.
713 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
715 (vect_finish_stmt_generation): ...here.
716 (vect_finish_replace_stmt): New function.
717 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
718 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
720 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
722 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
723 Alan Hayward <alan.hayward@arm.com>
724 David Sherwood <david.sherwood@arm.com>
726 * doc/md.texi (extract_last_@var{m}): Document.
727 * optabs.def (extract_last_optab): New optab.
728 * internal-fn.def (EXTRACT_LAST): New internal function.
729 * internal-fn.c (cond_unary_direct): New macro.
730 (expand_cond_unary_optab_fn): Likewise.
731 (direct_cond_unary_optab_supported_p): Likewise.
732 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
733 loops using EXTRACT_LAST.
734 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
735 (extract_last_<mode>): ...this optab.
736 (vec_extract<mode><Vel>): Update accordingly.
738 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
739 Alan Hayward <alan.hayward@arm.com>
740 David Sherwood <david.sherwood@arm.com>
742 * target.def (empty_mask_is_expensive): New hook.
743 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
744 * doc/tm.texi: Regenerate.
745 * targhooks.h (default_empty_mask_is_expensive): Declare.
746 * targhooks.c (default_empty_mask_is_expensive): New function.
747 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
748 if the target says that empty masks are expensive.
749 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
751 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
753 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
754 Alan Hayward <alan.hayward@arm.com>
755 David Sherwood <david.sherwood@arm.com>
757 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
758 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
759 (vect_use_loop_mask_for_alignment_p): New function.
760 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
761 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
762 niters_skip argument. Make sure that the first niters_skip elements
763 of the first iteration are inactive.
764 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
765 Update call to vect_set_loop_masks_directly.
766 (get_misalign_in_elems): New function, split out from...
767 (vect_gen_prolog_loop_niters): ...here.
768 (vect_update_init_of_dr): Take a code argument that specifies whether
769 the adjustment should be added or subtracted.
770 (vect_update_init_of_drs): Likewise.
771 (vect_prepare_for_masked_peels): New function.
772 (vect_do_peeling): Skip prologue peeling if we're using a mask
773 instead. Update call to vect_update_inits_of_drs.
774 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
776 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
777 alignment. Do not include the number of peeled iterations in
778 the minimum threshold in that case.
779 (vectorizable_induction): Adjust the start value down by
780 LOOP_VINFO_MASK_SKIP_NITERS iterations.
781 (vect_transform_loop): Call vect_prepare_for_masked_peels.
782 Take the number of skipped iterations into account when calculating
784 * tree-vect-stmts.c (vect_gen_while_not): New function.
786 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
787 Alan Hayward <alan.hayward@arm.com>
788 David Sherwood <david.sherwood@arm.com>
790 * doc/sourcebuild.texi (vect_fully_masked): Document.
791 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
793 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
795 (vect_analyze_loop_2): ...here. Don't check the vectorization
796 factor against the number of loop iterations if the loop is
799 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
800 Alan Hayward <alan.hayward@arm.com>
801 David Sherwood <david.sherwood@arm.com>
803 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
804 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
805 (dump_groups): Update accordingly.
806 (iv_use::mem_type): New member variable.
807 (address_p): New function.
808 (record_use): Add a mem_type argument and initialize the new
810 (record_group_use): Add a mem_type argument. Use address_p.
811 Remove obsolete null checks of base_object. Update call to record_use.
812 (find_interesting_uses_op): Update call to record_group_use.
813 (find_interesting_uses_cond): Likewise.
814 (find_interesting_uses_address): Likewise.
815 (get_mem_type_for_internal_fn): New function.
816 (find_address_like_use): Likewise.
817 (find_interesting_uses_stmt): Try find_address_like_use before
818 calling find_interesting_uses_op.
819 (addr_offset_valid_p): Use the iv mem_type field as the type
820 of the addressed memory.
821 (add_autoinc_candidates): Likewise.
822 (get_address_cost): Likewise.
823 (split_small_address_groups_p): Use address_p.
824 (split_address_groups): Likewise.
825 (add_iv_candidate_for_use): Likewise.
826 (autoinc_possible_for_pair): Likewise.
827 (rewrite_groups): Likewise.
828 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
829 (determine_group_iv_cost): Update after split of USE_ADDRESS.
830 (get_alias_ptr_type_for_ptr_address): New function.
831 (rewrite_use_address): Rewrite address uses in calls that were
832 identified by find_address_like_use.
834 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
835 Alan Hayward <alan.hayward@arm.com>
836 David Sherwood <david.sherwood@arm.com>
838 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
840 * gimple-expr.h (is_gimple_addressable: Likewise.
841 * gimple-expr.c (is_gimple_address): Likewise.
842 * internal-fn.c (expand_call_mem_ref): New function.
843 (expand_mask_load_optab_fn): Use it.
844 (expand_mask_store_optab_fn): Likewise.
846 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
847 Alan Hayward <alan.hayward@arm.com>
848 David Sherwood <david.sherwood@arm.com>
850 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
851 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
852 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
853 (cond_umax@var{mode}): Document.
854 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
855 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
856 (cond_umin_optab, cond_umax_optab): New optabs.
857 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
858 (COND_IOR, COND_XOR): New internal functions.
859 * internal-fn.h (get_conditional_internal_fn): Declare.
860 * internal-fn.c (cond_binary_direct): New macro.
861 (expand_cond_binary_optab_fn): Likewise.
862 (direct_cond_binary_optab_supported_p): Likewise.
863 (get_conditional_internal_fn): New function.
864 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
865 Cope with reduction statements that are vectorized as calls rather
867 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
868 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
869 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
870 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
871 (UNSPEC_COND_EOR): New unspecs.
872 (optab): Add mappings for them.
873 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
874 (sve_int_op, sve_fp_op): New int attributes.
876 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
877 Alan Hayward <alan.hayward@arm.com>
878 David Sherwood <david.sherwood@arm.com>
880 * optabs.def (while_ult_optab): New optab.
881 * doc/md.texi (while_ult@var{m}@var{n}): Document.
882 * internal-fn.def (WHILE_ULT): New internal function.
883 * internal-fn.h (direct_internal_fn_supported_p): New override
884 that takes two types as argument.
885 * internal-fn.c (while_direct): New macro.
886 (expand_while_optab_fn): New function.
887 (convert_optab_supported_p): Likewise.
888 (direct_while_optab_supported_p): New macro.
889 * wide-int.h (wi::udiv_ceil): New function.
890 * tree-vectorizer.h (rgroup_masks): New structure.
891 (vec_loop_masks): New typedef.
892 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
894 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
895 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
896 (vect_max_vf): New function.
897 (slpeel_make_loop_iterate_ntimes): Delete.
898 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
899 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
900 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
901 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
902 internal-fn.h, stor-layout.h and optabs-query.h.
903 (vect_set_loop_mask): New function.
904 (add_preheader_seq): Likewise.
905 (add_header_seq): Likewise.
906 (interleave_supported_p): Likewise.
907 (vect_maybe_permute_loop_masks): Likewise.
908 (vect_set_loop_masks_directly): Likewise.
909 (vect_set_loop_condition_masked): Likewise.
910 (vect_set_loop_condition_unmasked): New function, split out from
911 slpeel_make_loop_iterate_ntimes.
912 (slpeel_make_loop_iterate_ntimes): Rename to..
913 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
914 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
915 (vect_do_peeling): Update call accordingly.
916 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
918 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
919 mask_compare_type, can_fully_mask_p and fully_masked_p.
920 (release_vec_loop_masks): New function.
921 (_loop_vec_info): Use it to free the loop masks.
922 (can_produce_all_loop_masks_p): New function.
923 (vect_get_max_nscalars_per_iter): Likewise.
924 (vect_verify_full_masking): Likewise.
925 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
926 retries, and free the mask rgroups before retrying. Check loop-wide
927 reasons for disallowing fully-masked loops. Make the final decision
928 about whether use a fully-masked loop or not.
929 (vect_estimate_min_profitable_iters): Do not assume that peeling
930 for the number of iterations will be needed for fully-masked loops.
931 (vectorizable_reduction): Disable fully-masked loops.
932 (vectorizable_live_operation): Likewise.
933 (vect_halve_mask_nunits): New function.
934 (vect_double_mask_nunits): Likewise.
935 (vect_record_loop_mask): Likewise.
936 (vect_get_loop_mask): Likewise.
937 (vect_transform_loop): Handle the case in which the final loop
938 iteration might handle a partial vector. Call vect_set_loop_condition
939 instead of slpeel_make_loop_iterate_ntimes.
940 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
941 (check_load_store_masking): New function.
942 (prepare_load_store_mask): Likewise.
943 (vectorizable_store): Handle fully-masked loops.
944 (vectorizable_load): Likewise.
945 (supportable_widening_operation): Use vect_halve_mask_nunits for
947 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
948 (vect_gen_while): New function.
949 * config/aarch64/aarch64.md (umax<mode>3): New expander.
950 (aarch64_uqdec<mode>): New insn.
952 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
953 Alan Hayward <alan.hayward@arm.com>
954 David Sherwood <david.sherwood@arm.com>
956 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
957 (reduc_xor_scal_optab): New optabs.
958 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
959 (reduc_xor_scal_@var{m}): Document.
960 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
961 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
963 * fold-const-call.c (fold_const_call): Handle them.
964 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
965 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
966 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
967 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
968 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
969 (UNSPEC_XORV): New unspecs.
970 (optab): Add entries for them.
971 (BITWISEV): New int iterator.
972 (bit_reduc_op): New int attributes.
974 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
975 Alan Hayward <alan.hayward@arm.com>
976 David Sherwood <david.sherwood@arm.com>
978 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
979 * internal-fn.def (VEC_SHL_INSERT): New internal function.
980 * optabs.def (vec_shl_insert_optab): New optab.
981 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
982 (duplicate_and_interleave): Likewise.
983 * tree-vect-loop.c: Include internal-fn.h.
984 (neutral_op_for_slp_reduction): New function, split out from
985 get_initial_defs_for_reduction.
986 (get_initial_def_for_reduction): Handle option 2 for variable-length
987 vectors by loading the neutral value into a vector and then shifting
988 the initial value into element 0.
989 (get_initial_defs_for_reduction): Replace the code argument with
990 the neutral value calculated by neutral_op_for_slp_reduction.
991 Use gimple_build_vector for constant-length vectors.
992 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
993 but the first group_size elements have a neutral value.
994 Use duplicate_and_interleave otherwise.
995 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
996 Update call to get_initial_defs_for_reduction. Handle SLP
997 reductions for variable-length vectors by creating one vector
998 result for each scalar result, with the elements associated
999 with other scalar results stubbed out with the neutral value.
1000 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1001 Require IFN_VEC_SHL_INSERT for double reductions on
1002 variable-length vectors, or SLP reductions that have
1003 a neutral value. Require can_duplicate_and_interleave_p
1004 support for variable-length unchained SLP reductions if there
1005 is no neutral value, such as for MIN/MAX reductions. Also require
1006 the number of vector elements to be a multiple of the number of
1007 SLP statements when doing variable-length unchained SLP reductions.
1008 Update call to vect_create_epilog_for_reduction.
1009 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1010 and remove initial values.
1011 (duplicate_and_interleave): Make public.
1012 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1013 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1015 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1016 Alan Hayward <alan.hayward@arm.com>
1017 David Sherwood <david.sherwood@arm.com>
1019 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1020 (can_duplicate_and_interleave_p): New function.
1021 (vect_get_and_check_slp_defs): Take the vector of statements
1022 rather than just the current one. Remove excess parentheses.
1023 Restriction rejectinon of vect_constant_def and vect_external_def
1024 for variable-length vectors to boolean types, or types for which
1025 can_duplicate_and_interleave_p is false.
1026 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1027 (duplicate_and_interleave): New function.
1028 (vect_get_constant_vectors): Use gimple_build_vector for
1029 constant-length vectors and suitable variable-length constant
1030 vectors. Use duplicate_and_interleave for other variable-length
1031 vectors. Don't defer the update when inserting new statements.
1033 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1034 Alan Hayward <alan.hayward@arm.com>
1035 David Sherwood <david.sherwood@arm.com>
1037 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1038 min_profitable_iters doesn't go negative.
1040 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1041 Alan Hayward <alan.hayward@arm.com>
1042 David Sherwood <david.sherwood@arm.com>
1044 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1045 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1046 * optabs.def (vec_mask_load_lanes_optab): New optab.
1047 (vec_mask_store_lanes_optab): Likewise.
1048 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1049 (MASK_STORE_LANES): Likewise.
1050 * internal-fn.c (mask_load_lanes_direct): New macro.
1051 (mask_store_lanes_direct): Likewise.
1052 (expand_mask_load_optab_fn): Handle masked operations.
1053 (expand_mask_load_lanes_optab_fn): New macro.
1054 (expand_mask_store_optab_fn): Handle masked operations.
1055 (expand_mask_store_lanes_optab_fn): New macro.
1056 (direct_mask_load_lanes_optab_supported_p): Likewise.
1057 (direct_mask_store_lanes_optab_supported_p): Likewise.
1058 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1060 (vect_load_lanes_supported): Likewise.
1061 * tree-vect-data-refs.c (strip_conversion): New function.
1062 (can_group_stmts_p): Likewise.
1063 (vect_analyze_data_ref_accesses): Use it instead of checking
1064 for a pair of assignments.
1065 (vect_store_lanes_supported): Take a masked_p parameter.
1066 (vect_load_lanes_supported): Likewise.
1067 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1068 vect_store_lanes_supported and vect_load_lanes_supported.
1069 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1070 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1071 parameter. Don't allow gaps for masked accesses.
1072 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1073 and vect_load_lanes_supported.
1074 (get_load_store_type): Take a masked_p parameter and update
1075 call to get_group_load_store_type.
1076 (vectorizable_store): Update call to get_load_store_type.
1077 Handle IFN_MASK_STORE_LANES.
1078 (vectorizable_load): Update call to get_load_store_type.
1079 Handle IFN_MASK_LOAD_LANES.
1081 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1082 Alan Hayward <alan.hayward@arm.com>
1083 David Sherwood <david.sherwood@arm.com>
1085 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1087 * config/aarch64/aarch64-protos.h
1088 (aarch64_sve_struct_memory_operand_p): Declare.
1089 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1090 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1091 (VPRED, vpred): Handle SVE structure modes.
1092 * config/aarch64/constraints.md (Utx): New constraint.
1093 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1094 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1095 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1096 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1097 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1098 structure modes. Split into pieces after RA.
1099 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1100 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1102 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1103 SVE structure modes.
1104 (aarch64_classify_address): Likewise.
1105 (sizetochar): Move earlier in file.
1106 (aarch64_print_operand): Handle SVE register lists.
1107 (aarch64_array_mode): New function.
1108 (aarch64_sve_struct_memory_operand_p): Likewise.
1109 (TARGET_ARRAY_MODE): Redefine.
1111 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1112 Alan Hayward <alan.hayward@arm.com>
1113 David Sherwood <david.sherwood@arm.com>
1115 * target.def (array_mode): New target hook.
1116 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1117 * doc/tm.texi: Regenerate.
1118 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1119 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1120 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1122 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1125 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1126 Alan Hayward <alan.hayward@arm.com>
1127 David Sherwood <david.sherwood@arm.com>
1129 * fold-const.c (fold_binary_loc): Check the argument types
1130 rather than the result type when testing for a vector operation.
1132 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1134 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1135 * doc/tm.texi: Regenerate.
1137 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1138 Alan Hayward <alan.hayward@arm.com>
1139 David Sherwood <david.sherwood@arm.com>
1141 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1142 (sve): Document new AArch64 extension.
1143 * doc/md.texi (w): Extend the description of the AArch64
1144 constraint to include SVE vectors.
1145 (Upl, Upa): Document new AArch64 predicate constraints.
1146 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1148 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1149 (msve-vector-bits=): New option.
1150 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1151 SVE when these are disabled.
1152 (sve): New extension.
1153 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1154 modes. Adjust their number of units based on aarch64_sve_vg.
1155 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1156 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1157 aarch64_addr_query_type.
1158 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1159 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1160 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1161 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1162 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1163 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1164 (aarch64_simd_imm_zero_p): Delete.
1165 (aarch64_check_zero_based_sve_index_immediate): Declare.
1166 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1167 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1168 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1169 (aarch64_sve_float_mul_immediate_p): Likewise.
1170 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1172 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1173 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1174 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1175 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1176 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1177 (aarch64_regmode_natural_size): Likewise.
1178 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1179 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1181 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1182 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1183 for VG and the SVE predicate registers.
1184 (V_ALIASES): Add a "z"-prefixed alias.
1185 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1186 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1187 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1188 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1189 (REG_CLASS_NAMES): Add entries for them.
1190 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1191 and the predicate registers.
1192 (aarch64_sve_vg): Declare.
1193 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1194 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1195 (REGMODE_NATURAL_SIZE): Define.
1196 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1198 * config/aarch64/aarch64.c: Include cfgrtl.h.
1199 (simd_immediate_info): Add a constructor for series vectors,
1200 and an associated step field.
1201 (aarch64_sve_vg): New variable.
1202 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1203 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1204 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1205 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1206 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1207 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1208 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1209 (aarch64_get_mask_mode): New functions.
1210 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1211 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1212 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1213 predicate modes and predicate registers. Explicitly restrict
1214 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1215 to store a vector mode if it is recognized by
1216 aarch64_classify_vector_mode.
1217 (aarch64_regmode_natural_size): New function.
1218 (aarch64_hard_regno_caller_save_mode): Return the original mode
1220 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1221 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1222 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1223 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1225 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1226 does not overlap dest if the function is frame-related. Handle
1228 (aarch64_split_add_offset): New function.
1229 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1230 them aarch64_add_offset.
1231 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1232 and update call to aarch64_sub_sp.
1233 (aarch64_add_cfa_expression): New function.
1234 (aarch64_expand_prologue): Pass extra temporary registers to the
1235 functions above. Handle the case in which we need to emit new
1236 DW_CFA_expressions for registers that were originally saved
1237 relative to the stack pointer, but now have to be expressed
1238 relative to the frame pointer.
1239 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1241 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1242 IP0 and IP1 values for SVE frames.
1243 (aarch64_expand_vec_series): New function.
1244 (aarch64_expand_sve_widened_duplicate): Likewise.
1245 (aarch64_expand_sve_const_vector): Likewise.
1246 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1247 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1248 into the register, rather than emitting a SET directly.
1249 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1250 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1251 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1252 (offset_9bit_signed_scaled_p): New functions.
1253 (aarch64_replicate_bitmask_imm): New function.
1254 (aarch64_bitmask_imm): Use it.
1255 (aarch64_cannot_force_const_mem): Reject expressions involving
1256 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1257 (aarch64_classify_index): Handle SVE indices, by requiring
1258 a plain register index with a scale that matches the element size.
1259 (aarch64_classify_address): Handle SVE addresses. Assert that
1260 the mode of the address is VOIDmode or an integer mode.
1261 Update call to aarch64_classify_symbol.
1262 (aarch64_classify_symbolic_expression): Update call to
1263 aarch64_classify_symbol.
1264 (aarch64_const_vec_all_in_range_p): New function.
1265 (aarch64_print_vector_float_operand): Likewise.
1266 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1267 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1268 and the FP immediates 1.0 and 0.5.
1269 (aarch64_print_address_internal): Handle SVE addresses.
1270 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1271 (aarch64_regno_regclass): Handle predicate registers.
1272 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1274 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1275 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1276 (aarch64_convert_sve_vector_bits): New function.
1277 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1278 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1280 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1281 Handle SVE vector and predicate modes. Accept VL-based constants
1282 that need only one temporary register, and VL offsets that require
1283 no temporary registers.
1284 (aarch64_conditional_register_usage): Mark the predicate registers
1285 as fixed if SVE isn't available.
1286 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1287 Return true for SVE vector and predicate modes.
1288 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1289 rather than an unsigned int. Handle SVE modes.
1290 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1292 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1294 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1295 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1296 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1297 (aarch64_sve_float_mul_immediate_p): New functions.
1298 (aarch64_sve_valid_immediate): New function.
1299 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1300 Explicitly reject structure modes. Check for INDEX constants.
1301 Handle PTRUE and PFALSE constants.
1302 (aarch64_check_zero_based_sve_index_immediate): New function.
1303 (aarch64_simd_imm_zero_p): Delete.
1304 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1305 vector modes. Accept constants in the range of CNT[BHWD].
1306 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1307 ask for an Advanced SIMD mode.
1308 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1309 (aarch64_simd_vector_alignment): Handle SVE predicates.
1310 (aarch64_vectorize_preferred_vector_alignment): New function.
1311 (aarch64_simd_vector_alignment_reachable): Use it instead of
1313 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1314 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1316 (MAX_VECT_LEN): Delete.
1317 (expand_vec_perm_d): Add a vec_flags field.
1318 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1319 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1320 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1322 (aarch64_evpc_rev): Rename to...
1323 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1324 (aarch64_evpc_rev_global): New function.
1325 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1326 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1328 (aarch64_evpc_sve_tbl): New function.
1329 (aarch64_expand_vec_perm_const_1): Update after rename of
1330 aarch64_evpc_rev. Handle SVE permutes too, trying
1331 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1332 than aarch64_evpc_tbl.
1333 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1334 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1335 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1336 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1337 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1338 (aarch64_expand_sve_vcond): New functions.
1339 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1340 of aarch64_vector_mode_p.
1341 (aarch64_dwarf_poly_indeterminate_value): New function.
1342 (aarch64_compute_pressure_classes): Likewise.
1343 (aarch64_can_change_mode_class): Likewise.
1344 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1345 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1346 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1347 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1348 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1349 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1350 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1351 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1353 (Dn, Dl, Dr): Accept const as well as const_vector.
1354 (Dz): Likewise. Compare against CONST0_RTX.
1355 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1356 of "vector" where appropriate.
1357 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1358 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1359 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1360 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1361 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1362 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1363 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1364 (v_int_equiv): Extend to SVE modes.
1365 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1367 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1368 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1369 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1370 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1371 (SVE_COND_FP_CMP): New int iterators.
1372 (perm_hilo): Handle the new unpack unspecs.
1373 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1375 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1376 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1377 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1378 (aarch64_equality_operator, aarch64_constant_vector_operand)
1379 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1380 (aarch64_sve_nonimmediate_operand): Likewise.
1381 (aarch64_sve_general_operand): Likewise.
1382 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1383 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1384 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1385 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1386 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1387 (aarch64_sve_float_arith_immediate): Likewise.
1388 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1389 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1390 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1391 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1392 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1393 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1394 (aarch64_sve_float_arith_operand): Likewise.
1395 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1396 (aarch64_sve_float_mul_operand): Likewise.
1397 (aarch64_sve_vec_perm_operand): Likewise.
1398 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1399 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1400 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1401 as well as const_vector.
1402 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1403 in file. Use CONST0_RTX and CONSTM1_RTX.
1404 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1405 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1406 Use aarch64_simd_imm_zero.
1407 * config/aarch64/aarch64-sve.md: New file.
1408 * config/aarch64/aarch64.md: Include it.
1409 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1410 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1411 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1412 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1413 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1414 (sve): New attribute.
1415 (enabled): Disable instructions with the sve attribute unless
1417 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1418 aarch64_expand_mov_immediate.
1419 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1420 CNT[BHSD] immediates.
1421 (movti): Split CONST_POLY_INT moves into two halves.
1422 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1423 Split additions that need a temporary here if the destination
1424 is the stack pointer.
1425 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1426 (*add<mode>3_poly_1): New instruction.
1427 (set_clobber_cc): New expander.
1429 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1431 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1432 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1433 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1434 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1435 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1436 Change innermode from fixed_mode_size to machine_mode.
1437 (simplify_subreg): Update call accordingly. Handle a constant-sized
1438 subreg of a variable-length CONST_VECTOR.
1440 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1441 Alan Hayward <alan.hayward@arm.com>
1442 David Sherwood <david.sherwood@arm.com>
1444 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1445 (add_offset_to_base): New function, split out from...
1446 (create_mem_ref): ...here. When handling a scale other than 1,
1447 check first whether the address is valid without the offset.
1448 Add it into the base if so, leaving the index and scale as-is.
1450 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1453 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1454 fold_for_warn before checking if arg2 is INTEGER_CST.
1456 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1458 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1459 (store_multiple_operation): Delete.
1460 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1461 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1462 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1463 guarded by TARGET_STRING.
1464 (rs6000_output_load_multiple): Delete.
1465 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1466 OPTION_MASK_STRING / TARGET_STRING handling.
1467 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1468 (const rs6000_opt_masks) <"string">: Change mask to 0.
1469 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1470 (MASK_STRING): Delete.
1471 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1473 (load_multiple): Delete.
1480 (store_multiple): Delete.
1487 (movmemsi_8reg): Delete.
1488 (corresponding unnamed define_insn): Delete.
1489 (movmemsi_6reg): Delete.
1490 (corresponding unnamed define_insn): Delete.
1491 (movmemsi_4reg): Delete.
1492 (corresponding unnamed define_insn): Delete.
1493 (movmemsi_2reg): Delete.
1494 (corresponding unnamed define_insn): Delete.
1495 (movmemsi_1reg): Delete.
1496 (corresponding unnamed define_insn): Delete.
1497 * config/rs6000/rs6000.opt (mno-string): New.
1498 (mstring): Replace by deprecation warning stub.
1499 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1501 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1503 * regrename.c (regrename_do_replace): If replacing the same
1504 reg multiple times, try to reuse last created gen_raw_REG.
1507 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1508 main to workaround a bug in GDB.
1510 2018-01-12 Tom de Vries <tom@codesourcery.com>
1513 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1515 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1517 PR rtl-optimization/80481
1518 * ira-color.c (get_cap_member): New function.
1519 (allocnos_conflict_by_live_ranges_p): Use it.
1520 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1521 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1523 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1526 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1527 (*saddl_se_1): Ditto.
1529 (*saddl_se_1): Ditto.
1531 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1533 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1534 rather than wi::to_widest for DR_INITs.
1535 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1536 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1537 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1539 (vect_analyze_group_access_1): Note that here.
1541 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1543 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1544 polynomial type sizes.
1546 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1548 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1549 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1550 (gimple_add_tmp_var): Likewise.
1552 2018-01-12 Martin Liska <mliska@suse.cz>
1554 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1555 (gimple_alloc_sizes): Likewise.
1556 (dump_gimple_statistics): Use PRIu64 in printf format.
1557 * gimple.h: Change uint64_t to int.
1559 2018-01-12 Martin Liska <mliska@suse.cz>
1561 * tree-core.h: Use uint64_t instead of int.
1562 * tree.c (tree_node_counts): Likewise.
1563 (tree_node_sizes): Likewise.
1564 (dump_tree_statistics): Use PRIu64 in printf format.
1566 2018-01-12 Martin Liska <mliska@suse.cz>
1568 * Makefile.in: As qsort_chk is implemented in vec.c, add
1569 vec.o to linkage of gencfn-macros.
1570 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1571 passing the info to record_node_allocation_statistics.
1572 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1574 * ggc-common.c (struct ggc_usage): Add operator== and use
1575 it in operator< and compare function.
1576 * mem-stats.h (struct mem_usage): Likewise.
1577 * vec.c (struct vec_usage): Remove operator< and compare
1578 function. Can be simply inherited.
1580 2018-01-12 Martin Jambor <mjambor@suse.cz>
1583 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1584 * tree-ssa-math-opts.c: Include domwalk.h.
1585 (convert_mult_to_fma_1): New function.
1586 (fma_transformation_info): New type.
1587 (fma_deferring_state): Likewise.
1588 (cancel_fma_deferring): New function.
1589 (result_of_phi): Likewise.
1590 (last_fma_candidate_feeds_initial_phi): Likewise.
1591 (convert_mult_to_fma): Added deferring logic, split actual
1592 transformation to convert_mult_to_fma_1.
1593 (math_opts_dom_walker): New type.
1594 (math_opts_dom_walker::after_dom_children): New method, body moved
1595 here from pass_optimize_widening_mul::execute, added deferring logic
1597 (pass_optimize_widening_mul::execute): Moved most of code to
1598 math_opts_dom_walker::after_dom_children.
1599 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1600 * config/i386/i386.c (ix86_option_override_internal): Added
1601 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1603 2018-01-12 Richard Biener <rguenther@suse.de>
1606 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1607 inline instance vars.
1609 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1612 * config/rx/rx.c (rx_is_restricted_memory_address):
1615 2018-01-12 Richard Biener <rguenther@suse.de>
1617 PR tree-optimization/80846
1618 * target.def (split_reduction): New target hook.
1619 * targhooks.c (default_split_reduction): New function.
1620 * targhooks.h (default_split_reduction): Declare.
1621 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1622 target requests first reduce vectors by combining low and high
1624 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1625 (get_vectype_for_scalar_type_and_size): Export.
1626 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1627 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1628 * doc/tm.texi: Regenerate.
1629 * config/i386/i386.c (ix86_split_reduction): Implement
1630 TARGET_VECTORIZE_SPLIT_REDUCTION.
1632 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1635 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1636 in PIC mode except for TARGET_VXWORKS_RTP.
1637 * config/sparc/sparc.c: Include cfgrtl.h.
1638 (TARGET_INIT_PIC_REG): Define.
1639 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1640 (sparc_pic_register_p): New predicate.
1641 (sparc_legitimate_address_p): Use it.
1642 (sparc_legitimize_pic_address): Likewise.
1643 (sparc_delegitimize_address): Likewise.
1644 (sparc_mode_dependent_address_p): Likewise.
1645 (gen_load_pcrel_sym): Remove 4th parameter.
1646 (load_got_register): Adjust call to above. Remove obsolete stuff.
1647 (sparc_expand_prologue): Do not call load_got_register here.
1648 (sparc_flat_expand_prologue): Likewise.
1649 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1650 (sparc_use_pseudo_pic_reg): New function.
1651 (sparc_init_pic_reg): Likewise.
1652 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1653 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1655 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1657 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1658 Add item for branch_cost.
1660 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1662 PR rtl-optimization/83565
1663 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1664 not extend the result to a larger mode for rotate operations.
1665 (num_sign_bit_copies1): Likewise.
1667 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1670 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1672 Use values-Xc.o for -pedantic.
1673 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1675 2018-01-12 Martin Liska <mliska@suse.cz>
1678 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1680 (possible_polymorphic_call_targets): Use it.
1681 (ipa_devirt): Likewise.
1683 2018-01-12 Martin Liska <mliska@suse.cz>
1685 * profile-count.h (enum profile_quality): Use 0 as invalid
1686 enum value of profile_quality.
1688 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1690 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1691 -mext-string options.
1693 2018-01-12 Richard Biener <rguenther@suse.de>
1695 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1696 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1697 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1699 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1701 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1703 * configure.ac (--with-long-double-format): Add support for the
1704 configuration option to change the default long double format on
1706 * config.gcc (powerpc*-linux*-*): Likewise.
1707 * configure: Regenerate.
1708 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1709 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1710 used without modification.
1712 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1714 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1715 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1716 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1717 MISC_BUILTIN_SPEC_BARRIER.
1718 (rs6000_init_builtins): Likewise.
1719 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1721 (speculation_barrier): New define_insn.
1722 * doc/extend.texi: Document __builtin_speculation_barrier.
1724 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1727 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1728 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1729 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1731 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1732 integral modes instead of "ss" and "sd".
1733 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1734 vectors with 32-bit and 64-bit elements.
1735 (vecdupssescalarmodesuffix): New mode attribute.
1736 (vec_dup<mode>): Use it.
1738 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1741 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1742 frame if argument is passed on stack.
1744 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1747 * ree.c (combine_reaching_defs): Optimize also
1748 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1749 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1751 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1754 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1756 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1759 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1760 after they are computed.
1762 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1764 PR tree-optimization/83695
1765 * gimple-loop-linterchange.cc
1766 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1767 reset cached scev information after interchange.
1768 (pass_linterchange::execute): Remove call to scev_reset_htab.
1770 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1772 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1773 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1774 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1775 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1776 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1777 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1778 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1779 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1780 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1781 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1782 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1783 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1784 (V_lane_reg): Likewise.
1785 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1787 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1788 (vfmal_lane_low<mode>_intrinsic,
1789 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1790 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1791 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1792 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1793 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1794 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1796 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1798 * config/arm/arm-cpus.in (fp16fml): New feature.
1799 (ALL_SIMD): Add fp16fml.
1800 (armv8.2-a): Add fp16fml as an option.
1801 (armv8.3-a): Likewise.
1802 (armv8.4-a): Add fp16fml as part of fp16.
1803 * config/arm/arm.h (TARGET_FP16FML): Define.
1804 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1806 * config/arm/arm-modes.def (V2HF): Define.
1807 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1808 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1809 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1810 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1811 vfmsl_low, vfmsl_high): New set of builtins.
1812 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1813 (vfml_op): New code attribute.
1814 (VFMLHALVES): New int iterator.
1815 (VFML, VFMLSEL): New mode attributes.
1816 (V_reg): Define mapping for V2HF.
1817 (V_hi, V_lo): New mode attributes.
1818 (VF_constraint): Likewise.
1819 (vfml_half, vfml_half_selector): New int attributes.
1820 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1822 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1823 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1825 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1826 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1827 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1828 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1830 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1831 Document new effective target and option set.
1833 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1835 * config/arm/arm-cpus.in (armv8_4): New feature.
1836 (ARMv8_4a): New fgroup.
1837 (armv8.4-a): New arch.
1838 * config/arm/arm-tables.opt: Regenerate.
1839 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1840 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1841 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1842 Add matching rules for -march=armv8.4-a and extensions.
1843 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1845 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1848 * config/rx/rx.md (BW): New mode attribute.
1849 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1851 2018-01-11 Richard Biener <rguenther@suse.de>
1853 PR tree-optimization/83435
1854 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1855 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1856 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1858 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1859 Alan Hayward <alan.hayward@arm.com>
1860 David Sherwood <david.sherwood@arm.com>
1862 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1864 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1865 (aarch64_print_address_internal): Use it to check for a zero offset.
1867 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1868 Alan Hayward <alan.hayward@arm.com>
1869 David Sherwood <david.sherwood@arm.com>
1871 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1872 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1873 Return a poly_int64 rather than a HOST_WIDE_INT.
1874 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1875 rather than a HOST_WIDE_INT.
1876 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1877 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1878 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1879 final_offset from HOST_WIDE_INT to poly_int64.
1880 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1881 to_constant when getting the number of units in an Advanced SIMD
1883 (aarch64_builtin_vectorized_function): Check for a constant number
1885 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1887 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1888 attribute instead of GET_MODE_NUNITS.
1889 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1890 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1891 GET_MODE_SIZE for fixed-size registers.
1892 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1893 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1894 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1895 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1896 (aarch64_print_operand, aarch64_print_address_internal)
1897 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1898 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1899 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1900 Handle polynomial GET_MODE_SIZE.
1901 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1902 wider than SImode without modification.
1903 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1904 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1905 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1906 passing and returning SVE modes.
1907 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1908 rather than GEN_INT.
1909 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1910 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1911 (aarch64_allocate_and_probe_stack_space): Likewise.
1912 (aarch64_layout_frame): Cope with polynomial offsets.
1913 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1914 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1916 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1917 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1918 poly_int64 rather than a HOST_WIDE_INT.
1919 (aarch64_get_separate_components, aarch64_process_components)
1920 (aarch64_expand_prologue, aarch64_expand_epilogue)
1921 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1922 (aarch64_anchor_offset): New function, split out from...
1923 (aarch64_legitimize_address): ...here.
1924 (aarch64_builtin_vectorization_cost): Handle polynomial
1925 TYPE_VECTOR_SUBPARTS.
1926 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1928 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1929 number of elements from the PARALLEL rather than the mode.
1930 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1931 rather than GET_MODE_BITSIZE.
1932 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1933 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1934 (aarch64_expand_vec_perm_const_1): Handle polynomial
1935 d->perm.length () and d->perm elements.
1936 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1937 Apply to_constant to d->perm elements.
1938 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1939 polynomial CONST_VECTOR_NUNITS.
1940 (aarch64_move_pointer): Take amount as a poly_int64 rather
1942 (aarch64_progress_pointer): Avoid temporary variable.
1943 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1944 the mode attribute instead of GET_MODE.
1946 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1947 Alan Hayward <alan.hayward@arm.com>
1948 David Sherwood <david.sherwood@arm.com>
1950 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1951 x exists before using it.
1952 (aarch64_add_constant_internal): Rename to...
1953 (aarch64_add_offset_1): ...this. Replace regnum with separate
1954 src and dest rtxes. Handle the case in which they're different,
1955 including when the offset is zero. Replace scratchreg with an rtx.
1956 Use 2 additions if there is no spare register into which we can
1957 move a 16-bit constant.
1958 (aarch64_add_constant): Delete.
1959 (aarch64_add_offset): Replace reg with separate src and dest
1960 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1961 Use aarch64_add_offset_1.
1962 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1963 an rtx rather than an int. Take the delta as a poly_int64
1964 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1965 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1966 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1967 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1968 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1970 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1971 aarch64_add_constant.
1973 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1975 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1976 Use scalar_float_mode.
1978 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1980 * config/aarch64/aarch64-simd.md
1981 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1982 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1983 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1984 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1985 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1986 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1987 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1988 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1989 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1990 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1992 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1995 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1996 targ_options->x_arm_arch_string is non NULL.
1998 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2000 * config/aarch64/aarch64.h
2001 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2003 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2006 * expmed.c (emit_store_flag_force): Swap if const op0
2007 and change VOIDmode to mode of op0.
2009 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2011 PR rtl-optimization/83761
2012 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2013 than bytes to mode_for_size.
2015 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2018 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2019 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2022 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2025 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2026 when in layout mode.
2027 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2028 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2031 2018-01-10 Michael Collison <michael.collison@arm.com>
2033 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2034 * config/aarch64/aarch64-option-extension.def: Add
2035 AARCH64_OPT_EXTENSION of 'fp16fml'.
2036 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2037 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2038 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2039 * config/aarch64/constraints.md (Ui7): New constraint.
2040 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2041 (VFMLA_SEL_W): Ditto.
2044 (VFMLA16_LOW): New int iterator.
2045 (VFMLA16_HIGH): Ditto.
2046 (UNSPEC_FMLAL): New unspec.
2047 (UNSPEC_FMLSL): Ditto.
2048 (UNSPEC_FMLAL2): Ditto.
2049 (UNSPEC_FMLSL2): Ditto.
2050 (f16mac): New code attribute.
2051 * config/aarch64/aarch64-simd-builtins.def
2052 (aarch64_fmlal_lowv2sf): Ditto.
2053 (aarch64_fmlsl_lowv2sf): Ditto.
2054 (aarch64_fmlalq_lowv4sf): Ditto.
2055 (aarch64_fmlslq_lowv4sf): Ditto.
2056 (aarch64_fmlal_highv2sf): Ditto.
2057 (aarch64_fmlsl_highv2sf): Ditto.
2058 (aarch64_fmlalq_highv4sf): Ditto.
2059 (aarch64_fmlslq_highv4sf): Ditto.
2060 (aarch64_fmlal_lane_lowv2sf): Ditto.
2061 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2062 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2063 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2064 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2065 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2066 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2067 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2068 (aarch64_fmlal_lane_highv2sf): Ditto.
2069 (aarch64_fmlsl_lane_highv2sf): Ditto.
2070 (aarch64_fmlal_laneq_highv2sf): Ditto.
2071 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2072 (aarch64_fmlalq_lane_highv4sf): Ditto.
2073 (aarch64_fmlsl_lane_highv4sf): Ditto.
2074 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2075 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2076 * config/aarch64/aarch64-simd.md:
2077 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2078 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2079 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2080 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2081 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2082 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2083 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2084 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2085 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2086 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2087 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2088 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2089 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2090 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2091 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2092 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2093 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2094 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2095 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2096 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2097 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2098 (vfmlsl_low_u32): Ditto.
2099 (vfmlalq_low_u32): Ditto.
2100 (vfmlslq_low_u32): Ditto.
2101 (vfmlal_high_u32): Ditto.
2102 (vfmlsl_high_u32): Ditto.
2103 (vfmlalq_high_u32): Ditto.
2104 (vfmlslq_high_u32): Ditto.
2105 (vfmlal_lane_low_u32): Ditto.
2106 (vfmlsl_lane_low_u32): Ditto.
2107 (vfmlal_laneq_low_u32): Ditto.
2108 (vfmlsl_laneq_low_u32): Ditto.
2109 (vfmlalq_lane_low_u32): Ditto.
2110 (vfmlslq_lane_low_u32): Ditto.
2111 (vfmlalq_laneq_low_u32): Ditto.
2112 (vfmlslq_laneq_low_u32): Ditto.
2113 (vfmlal_lane_high_u32): Ditto.
2114 (vfmlsl_lane_high_u32): Ditto.
2115 (vfmlal_laneq_high_u32): Ditto.
2116 (vfmlsl_laneq_high_u32): Ditto.
2117 (vfmlalq_lane_high_u32): Ditto.
2118 (vfmlslq_lane_high_u32): Ditto.
2119 (vfmlalq_laneq_high_u32): Ditto.
2120 (vfmlslq_laneq_high_u32): Ditto.
2121 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2122 (AARCH64_FL_FOR_ARCH8_4): New.
2123 (AARCH64_ISA_F16FML): New ISA flag.
2124 (TARGET_F16FML): New feature flag for fp16fml.
2125 (doc/invoke.texi): Document new fp16fml option.
2127 2018-01-10 Michael Collison <michael.collison@arm.com>
2129 * config/aarch64/aarch64-builtins.c:
2130 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2131 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2132 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2133 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2134 (AARCH64_ISA_SHA3): New ISA flag.
2135 (TARGET_SHA3): New feature flag for sha3.
2136 * config/aarch64/iterators.md (sha512_op): New int attribute.
2137 (CRYPTO_SHA512): New int iterator.
2138 (UNSPEC_SHA512H): New unspec.
2139 (UNSPEC_SHA512H2): Ditto.
2140 (UNSPEC_SHA512SU0): Ditto.
2141 (UNSPEC_SHA512SU1): Ditto.
2142 * config/aarch64/aarch64-simd-builtins.def
2143 (aarch64_crypto_sha512hqv2di): New builtin.
2144 (aarch64_crypto_sha512h2qv2di): Ditto.
2145 (aarch64_crypto_sha512su0qv2di): Ditto.
2146 (aarch64_crypto_sha512su1qv2di): Ditto.
2147 (aarch64_eor3qv8hi): Ditto.
2148 (aarch64_rax1qv2di): Ditto.
2149 (aarch64_xarqv2di): Ditto.
2150 (aarch64_bcaxqv8hi): Ditto.
2151 * config/aarch64/aarch64-simd.md:
2152 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2153 (aarch64_crypto_sha512su0qv2di): Ditto.
2154 (aarch64_crypto_sha512su1qv2di): Ditto.
2155 (aarch64_eor3qv8hi): Ditto.
2156 (aarch64_rax1qv2di): Ditto.
2157 (aarch64_xarqv2di): Ditto.
2158 (aarch64_bcaxqv8hi): Ditto.
2159 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2160 (vsha512h2q_u64): Ditto.
2161 (vsha512su0q_u64): Ditto.
2162 (vsha512su1q_u64): Ditto.
2163 (veor3q_u16): Ditto.
2164 (vrax1q_u64): Ditto.
2166 (vbcaxq_u16): Ditto.
2167 * config/arm/types.md (crypto_sha512): New type attribute.
2168 (crypto_sha3): Ditto.
2169 (doc/invoke.texi): Document new sha3 option.
2171 2018-01-10 Michael Collison <michael.collison@arm.com>
2173 * config/aarch64/aarch64-builtins.c:
2174 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2175 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2176 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2177 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2178 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2179 (AARCH64_ISA_SM4): New ISA flag.
2180 (TARGET_SM4): New feature flag for sm4.
2181 * config/aarch64/aarch64-simd-builtins.def
2182 (aarch64_sm3ss1qv4si): Ditto.
2183 (aarch64_sm3tt1aq4si): Ditto.
2184 (aarch64_sm3tt1bq4si): Ditto.
2185 (aarch64_sm3tt2aq4si): Ditto.
2186 (aarch64_sm3tt2bq4si): Ditto.
2187 (aarch64_sm3partw1qv4si): Ditto.
2188 (aarch64_sm3partw2qv4si): Ditto.
2189 (aarch64_sm4eqv4si): Ditto.
2190 (aarch64_sm4ekeyqv4si): Ditto.
2191 * config/aarch64/aarch64-simd.md:
2192 (aarch64_sm3ss1qv4si): Ditto.
2193 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2194 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2195 (aarch64_sm4eqv4si): Ditto.
2196 (aarch64_sm4ekeyqv4si): Ditto.
2197 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2198 (sm3part_op): Ditto.
2199 (CRYPTO_SM3TT): Ditto.
2200 (CRYPTO_SM3PART): Ditto.
2201 (UNSPEC_SM3SS1): New unspec.
2202 (UNSPEC_SM3TT1A): Ditto.
2203 (UNSPEC_SM3TT1B): Ditto.
2204 (UNSPEC_SM3TT2A): Ditto.
2205 (UNSPEC_SM3TT2B): Ditto.
2206 (UNSPEC_SM3PARTW1): Ditto.
2207 (UNSPEC_SM3PARTW2): Ditto.
2208 (UNSPEC_SM4E): Ditto.
2209 (UNSPEC_SM4EKEY): Ditto.
2210 * config/aarch64/constraints.md (Ui2): New constraint.
2211 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2212 * config/arm/types.md (crypto_sm3): New type attribute.
2213 (crypto_sm4): Ditto.
2214 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2215 (vsm3tt1aq_u32): Ditto.
2216 (vsm3tt1bq_u32): Ditto.
2217 (vsm3tt2aq_u32): Ditto.
2218 (vsm3tt2bq_u32): Ditto.
2219 (vsm3partw1q_u32): Ditto.
2220 (vsm3partw2q_u32): Ditto.
2221 (vsm4eq_u32): Ditto.
2222 (vsm4ekeyq_u32): Ditto.
2223 (doc/invoke.texi): Document new sm4 option.
2225 2018-01-10 Michael Collison <michael.collison@arm.com>
2227 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2228 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2229 (AARCH64_FL_FOR_ARCH8_4): New.
2230 (AARCH64_FL_V8_4): New flag.
2231 (doc/invoke.texi): Document new armv8.4-a option.
2233 2018-01-10 Michael Collison <michael.collison@arm.com>
2235 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2236 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2237 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2238 * config/aarch64/aarch64-option-extension.def: Add
2239 AARCH64_OPT_EXTENSION of 'sha2'.
2240 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2241 (crypto): Disable sha2 and aes if crypto disabled.
2242 (crypto): Enable aes and sha2 if enabled.
2243 (simd): Disable sha2 and aes if simd disabled.
2244 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2246 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2247 (TARGET_SHA2): New feature flag for sha2.
2248 (TARGET_AES): New feature flag for aes.
2249 * config/aarch64/aarch64-simd.md:
2250 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2251 conditional on TARGET_AES.
2252 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2253 (aarch64_crypto_sha1hsi): Make pattern conditional
2255 (aarch64_crypto_sha1hv4si): Ditto.
2256 (aarch64_be_crypto_sha1hv4si): Ditto.
2257 (aarch64_crypto_sha1su1v4si): Ditto.
2258 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2259 (aarch64_crypto_sha1su0v4si): Ditto.
2260 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2261 (aarch64_crypto_sha256su0v4si): Ditto.
2262 (aarch64_crypto_sha256su1v4si): Ditto.
2263 (doc/invoke.texi): Document new aes and sha2 options.
2265 2018-01-10 Martin Sebor <msebor@redhat.com>
2267 PR tree-optimization/83781
2268 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2271 2018-01-11 Martin Sebor <msebor@gmail.com>
2272 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2274 PR tree-optimization/83501
2275 PR tree-optimization/81703
2277 * tree-ssa-strlen.c (get_string_cst): Rename...
2278 (get_string_len): ...to this. Handle global constants.
2279 (handle_char_store): Adjust.
2281 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2282 Jim Wilson <jimw@sifive.com>
2284 * config/riscv/riscv-protos.h (riscv_output_return): New.
2285 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2286 (riscv_attribute_table, riscv_output_return),
2287 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2288 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2289 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2291 (riscv_expand_prologue): Add early return for naked function.
2292 (riscv_expand_epilogue): Likewise.
2293 (riscv_function_ok_for_sibcall): Return false for naked function.
2294 (riscv_set_current_function): New.
2295 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2296 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2297 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2298 * doc/extend.texi (RISC-V Function Attributes): New.
2300 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2302 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2303 check for 128-bit long double before checking TCmode.
2304 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2305 128-bit long doubles before checking TFmode or TCmode.
2306 (FLOAT128_IBM_P): Likewise.
2308 2018-01-10 Martin Sebor <msebor@redhat.com>
2310 PR tree-optimization/83671
2311 * builtins.c (c_strlen): Unconditionally return zero for the empty
2313 Use -Warray-bounds for warnings.
2314 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2315 for non-constant array indices with COMPONENT_REF, arrays of
2316 arrays, and pointers to arrays.
2317 (gimple_fold_builtin_strlen): Determine and set length range for
2318 non-constant character arrays.
2320 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2323 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2326 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2328 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2330 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2333 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2334 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2335 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2336 indexed_or_indirect_operand predicate.
2337 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2338 (*vsx_le_perm_load_v8hi): Likewise.
2339 (*vsx_le_perm_load_v16qi): Likewise.
2340 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2341 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2342 (*vsx_le_perm_store_v8hi): Likewise.
2343 (*vsx_le_perm_store_v16qi): Likewise.
2344 (eight unnamed splitters): Likewise.
2346 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2348 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2349 * config/rs6000/emmintrin.h: Likewise.
2350 * config/rs6000/mmintrin.h: Likewise.
2351 * config/rs6000/xmmintrin.h: Likewise.
2353 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2356 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2358 * tree.c (tree_nop_conversion): Return true for location wrapper
2360 (maybe_wrap_with_location): New function.
2361 (selftest::check_strip_nops): New function.
2362 (selftest::test_location_wrappers): New function.
2363 (selftest::tree_c_tests): Call it.
2364 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2365 (maybe_wrap_with_location): New decl.
2366 (EXPR_LOCATION_WRAPPER_P): New macro.
2367 (location_wrapper_p): New inline function.
2368 (tree_strip_any_location_wrapper): New inline function.
2370 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2373 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2374 stack_realign_offset for the largest alignment of stack slot
2376 (ix86_find_max_used_stack_alignment): New function.
2377 (ix86_finalize_stack_frame_flags): Use it. Set
2378 max_used_stack_alignment if we don't realign stack.
2379 * config/i386/i386.h (machine_function): Add
2380 max_used_stack_alignment.
2382 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2384 * config/arm/arm.opt (-mbranch-cost): New option.
2385 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2388 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2391 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2392 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2394 2018-01-10 Richard Biener <rguenther@suse.de>
2397 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2398 early out so it also covers the case where we have a non-NULL
2401 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2403 PR tree-optimization/83753
2404 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2405 for non-strided grouped accesses if the number of elements is 1.
2407 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2410 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2411 * i386.h (TARGET_USE_GATHER): Define.
2412 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2414 2018-01-10 Martin Liska <mliska@suse.cz>
2417 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2418 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2420 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2421 CLEANUP_NO_PARTITIONING is not set.
2423 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2425 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2426 for vectors, as a partial revert of r254296.
2427 * rtl.h (const_vec_p): Delete.
2428 (const_vec_duplicate_p): Don't test for vector CONSTs.
2429 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2430 * expmed.c (make_tree): Likewise.
2433 * common.md (E, F): Use CONSTANT_P instead of checking for
2435 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2436 checking for CONST_VECTOR.
2438 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2441 * predict.c (force_edge_cold): Handle in more sane way edges
2444 2018-01-09 Carl Love <cel@us.ibm.com>
2446 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2448 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2449 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2450 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2451 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2452 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2453 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2454 * config/rs6000/rs6000-protos.h: Add extern defition for
2455 rs6000_generate_float2_double_code.
2456 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2458 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2459 (float2_v2df): Add define_expand.
2461 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2464 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2465 op_mode in the force_to_mode call.
2467 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2469 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2470 instead of checking each element individually.
2471 (aarch64_evpc_uzp): Likewise.
2472 (aarch64_evpc_zip): Likewise.
2473 (aarch64_evpc_ext): Likewise.
2474 (aarch64_evpc_rev): Likewise.
2475 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2476 instead of checking each element individually. Return true without
2478 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2479 whether all selected elements come from the same input, instead of
2480 checking each element individually. Remove calls to gen_rtx_REG,
2481 start_sequence and end_sequence and instead assert that no rtl is
2484 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2486 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2487 order of HIGH and CONST checks.
2489 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2491 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2492 if the destination isn't an SSA_NAME.
2494 2018-01-09 Richard Biener <rguenther@suse.de>
2496 PR tree-optimization/83668
2497 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2499 (canonicalize_loop_form): ... here, renamed from ...
2500 (canonicalize_loop_closed_ssa_form): ... this and amended to
2501 swap successor edges for loop exit blocks to make us use
2502 the RPO order we need for initial schedule generation.
2504 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2506 PR tree-optimization/64811
2507 * match.pd: When optimizing comparisons with Inf, avoid
2508 introducing or losing exceptions from comparisons with NaN.
2510 2018-01-09 Martin Liska <mliska@suse.cz>
2513 * asan.c (shadow_mem_size): Add gcc_assert.
2515 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2517 Don't save registers in main().
2520 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2521 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2522 * config/avr/avr.c (avr_set_current_function): Don't error if
2523 naked, OS_task or OS_main are specified at the same time.
2524 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2526 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2528 * common/config/avr/avr-common.c (avr_option_optimization_table):
2529 Switch on -mmain-is-OS_task for optimizing compilations.
2531 2018-01-09 Richard Biener <rguenther@suse.de>
2533 PR tree-optimization/83572
2534 * graphite.c: Include cfganal.h.
2535 (graphite_transform_loops): Connect infinite loops to exit
2536 and remove fake edges at the end.
2538 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2540 * ipa-inline.c (edge_badness): Revert accidental checkin.
2542 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2545 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2546 symbols; not inline clones.
2548 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2551 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2552 hard registers. Formatting fixes.
2554 PR preprocessor/83722
2555 * gcc.c (try_generate_repro): Pass
2556 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2557 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2560 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2561 Kito Cheng <kito.cheng@gmail.com>
2563 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2564 (riscv_leaf_function_p): Delete.
2565 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2567 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2569 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2571 (do_ifelse): New function.
2572 (do_isel): New function.
2573 (do_sub3): New function.
2574 (do_add3): New function.
2575 (do_load_mask_compare): New function.
2576 (do_overlap_load_compare): New function.
2577 (expand_compare_loop): New function.
2578 (expand_block_compare): Call expand_compare_loop() when appropriate.
2579 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2581 (-mblock-compare-inline-loop-limit): New option.
2583 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2586 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2587 Reverse order of second and third operands in first alternative.
2588 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2589 of first and second elements in UNSPEC_VPERMR vector.
2590 (altivec_expand_vec_perm_le): Likewise.
2592 2017-01-08 Jeff Law <law@redhat.com>
2594 PR rtl-optimizatin/81308
2595 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2596 (process_switch): If group_case_labels makes a change, then set
2598 (pass_convert_switch::execute): If a switch is converted, then
2599 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2601 PR rtl-optimization/81308
2602 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2605 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2607 PR target/83663 - Revert r255946
2608 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2609 generation for cases where splatting a value is not useful.
2610 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2611 across a vec_duplicate and a paradoxical subreg forming a vector
2612 mode to a vec_concat.
2614 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2616 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2617 -march=armv8.3-a variants.
2618 * config/arm/t-multilib: Likewise.
2619 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2621 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2623 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2625 (cceq_ior_compare_complement): Give it a name so I can use it, and
2626 change boolean_or_operator predicate to boolean_operator so it can
2627 be used to generate a crand.
2628 (eqne): New code iterator.
2629 (bd/bd_neg): New code_attrs.
2630 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2631 a single define_insn.
2632 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2633 decrement (bdnzt/bdnzf/bdzt/bdzf).
2634 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2635 with the new names of the branch decrement patterns, and added the
2636 names of the branch decrement conditional patterns.
2638 2018-01-08 Richard Biener <rguenther@suse.de>
2640 PR tree-optimization/83563
2641 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2644 2018-01-08 Richard Biener <rguenther@suse.de>
2647 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2649 2018-01-08 Richard Biener <rguenther@suse.de>
2651 PR tree-optimization/83685
2652 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2653 references to abnormals.
2655 2018-01-08 Richard Biener <rguenther@suse.de>
2658 * dwarf2out.c (output_indirect_strings): Handle empty
2659 skeleton_debug_str_hash.
2660 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2662 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2664 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2665 (emit_store_direct): Likewise.
2666 (arc_trampoline_adjust_address): Likewise.
2667 (arc_asm_trampoline_template): New function.
2668 (arc_initialize_trampoline): Use asm_trampoline_template.
2669 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2670 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2671 * config/arc/arc.md (flush_icache): Delete pattern.
2673 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2675 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2676 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2679 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2682 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2683 by not USED_FOR_TARGET.
2684 (make_pass_resolve_sw_modes): Likewise.
2686 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2688 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2691 2018-01-08 Richard Biener <rguenther@suse.de>
2694 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2696 2018-01-08 Richard Biener <rguenther@suse.de>
2699 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2701 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2704 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2705 basic blocks with a small number of successors.
2706 (convert_control_dep_chain_into_preds): Improve handling of
2708 (dump_predicates): Split apart into...
2709 (dump_pred_chain): ...here...
2710 (dump_pred_info): ...and here.
2711 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2712 (can_chain_union_be_invalidated_p): Improve check for invalidation
2714 (uninit_uses_cannot_happen): Avoid unnecessary if
2715 convert_control_dep_chain_into_preds yielded nothing.
2717 2018-01-06 Martin Sebor <msebor@redhat.com>
2719 PR tree-optimization/83640
2720 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2721 subtracting negative offset from size.
2722 (builtin_access::overlap): Adjust offset bounds of the access to fall
2723 within the size of the object if possible.
2725 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2727 PR rtl-optimization/83699
2728 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2729 extract_bit_field_as_subreg to cases in which the extracted
2730 value is also a vector.
2732 * lra-constraints.c (process_alt_operands): Test for the equivalence
2733 substitutions when detecting a possible reload cycle.
2735 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2738 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2739 by default if flag_selective_schedling{,2}. Formatting fixes.
2741 PR rtl-optimization/83682
2742 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2743 if it has non-VECTOR_MODE element mode.
2744 (vec_duplicate_p): Likewise.
2747 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2748 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2750 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2753 * config/i386/i386-builtin.def
2754 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2755 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2756 Require also OPTION_MASK_ISA_AVX512F in addition to
2757 OPTION_MASK_ISA_GFNI.
2758 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2759 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2760 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2761 to OPTION_MASK_ISA_GFNI.
2762 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2763 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2764 OPTION_MASK_ISA_AVX512BW.
2765 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2766 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2767 addition to OPTION_MASK_ISA_GFNI.
2768 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2769 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2770 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2771 to OPTION_MASK_ISA_GFNI.
2772 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2773 a requirement for all ISAs rather than any of them with a few
2775 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2777 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2778 bitmasks to be enabled with 3 exceptions, instead of requiring any
2779 enabled ISA with lots of exceptions.
2780 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2781 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2782 Change avx512bw in isa attribute to avx512f.
2783 * config/i386/sgxintrin.h: Add license boilerplate.
2784 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2785 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2786 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2787 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2789 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2790 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2791 temporarily sse2 rather than sse if not enabled already.
2794 * config/i386/sse.md (VI248_VLBW): Rename to ...
2795 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2796 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2797 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2798 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2799 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2800 mode iterator instead of VI248_VLBW.
2802 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2804 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2805 (record_modified): Skip clobbers; add debug output.
2806 (param_change_prob): Use sreal frequencies.
2808 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2810 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2811 punt for user-aligned variables.
2813 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2815 * tree-chrec.c (chrec_contains_symbols): Return true for
2818 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2821 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2822 of (x|y) == x for BICS pattern.
2824 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2826 PR tree-optimization/83605
2827 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2828 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2831 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2833 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2834 * config/epiphany/rtems.h: New file.
2836 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2837 Uros Bizjak <ubizjak@gmail.com>
2840 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2841 QIreg_operand instead of register_operand predicate.
2842 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2843 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2844 comments instead of -fmitigate[-_]rop.
2846 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2849 * cgraphunit.c (symbol_table::compile): Switch to text_section
2850 before calling assembly_start debug hook.
2851 * run-rtl-passes.c (run_rtl_passes): Likewise.
2854 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2856 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2857 range_int_cst_p rather than !symbolic_range_p before calling
2858 extract_range_from_multiplicative_op_1.
2860 2017-01-04 Jeff Law <law@redhat.com>
2862 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2863 redundant test in assertion.
2865 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2867 * doc/rtl.texi: Document machine_mode wrapper classes.
2869 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2871 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2874 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2876 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2877 the VEC_PERM_EXPR fold to fail.
2879 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2882 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2883 to switched_sections.
2885 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2888 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2891 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2894 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2895 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2897 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2900 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2901 is BLKmode and bitpos not zero or mode change is needed.
2903 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2906 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2909 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2912 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2913 instead of MULT rtx. Update all corresponding splitters.
2915 (*ssub<modesuffix>): Ditto.
2917 (*cmp_sadd_di): Update split patterns.
2918 (*cmp_sadd_si): Ditto.
2919 (*cmp_sadd_sidi): Ditto.
2920 (*cmp_ssub_di): Ditto.
2921 (*cmp_ssub_si): Ditto.
2922 (*cmp_ssub_sidi): Ditto.
2923 * config/alpha/predicates.md (const23_operand): New predicate.
2924 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2925 Look for ASHIFT, not MULT inner operand.
2926 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2928 2018-01-04 Martin Liska <mliska@suse.cz>
2930 PR gcov-profile/83669
2931 * gcov.c (output_intermediate_file): Add version to intermediate
2933 * doc/gcov.texi: Document new field 'version' in intermediate
2934 file format. Fix location of '-k' option of gcov command.
2936 2018-01-04 Martin Liska <mliska@suse.cz>
2939 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2941 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2943 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2945 2018-01-03 Martin Sebor <msebor@redhat.com>
2947 PR tree-optimization/83655
2948 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2949 checking calls with invalid arguments.
2951 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2953 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2954 (vectorizable_mask_load_store): Delete.
2955 (vectorizable_call): Return false for masked loads and stores.
2956 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2957 instead of gimple_assign_rhs1.
2958 (vectorizable_load): Handle IFN_MASK_LOAD.
2959 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2961 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2963 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2965 (vectorizable_mask_load_store): ...here.
2966 (vectorizable_load): ...and here.
2968 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2970 * tree-vect-stmts.c (vect_build_all_ones_mask)
2971 (vect_build_zero_merge_argument): New functions, split out from...
2972 (vectorizable_load): ...here.
2974 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2976 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2978 (vectorizable_mask_load_store): ...here.
2979 (vectorizable_store): ...and here.
2981 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2983 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2985 (vectorizable_mask_load_store): ...here.
2987 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2989 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2990 (vect_model_store_cost): Take a vec_load_store_type instead of a
2992 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2993 (vect_model_store_cost): Take a vec_load_store_type instead of a
2995 (vectorizable_mask_load_store): Update accordingly.
2996 (vectorizable_store): Likewise.
2997 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2999 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3001 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3002 IFN_MASK_LOAD calls here rather than...
3003 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3005 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3006 Alan Hayward <alan.hayward@arm.com>
3007 David Sherwood <david.sherwood@arm.com>
3009 * expmed.c (extract_bit_field_1): For vector extracts,
3010 fall back to extract_bit_field_as_subreg if vec_extract
3013 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3014 Alan Hayward <alan.hayward@arm.com>
3015 David Sherwood <david.sherwood@arm.com>
3017 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3018 they are variable or constant sized.
3019 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3020 slots for constant-sized data.
3022 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3023 Alan Hayward <alan.hayward@arm.com>
3024 David Sherwood <david.sherwood@arm.com>
3026 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3027 handling COND_EXPRs with boolean comparisons, try to find a better
3028 basis for the mask type than the boolean itself.
3030 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3032 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3033 is calculated and how it can be overridden.
3034 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3035 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3037 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3040 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3041 Alan Hayward <alan.hayward@arm.com>
3042 David Sherwood <david.sherwood@arm.com>
3044 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3045 Remove the mode argument.
3046 (aarch64_simd_valid_immediate): Remove the mode and inverse
3048 * config/aarch64/iterators.md (bitsize): New iterator.
3049 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3050 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3051 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3052 aarch64_simd_valid_immediate.
3053 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3054 (aarch64_reg_or_bic_imm): Likewise.
3055 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3056 with an insn_type enum and msl with a modifier_type enum.
3057 Replace element_width with a scalar_mode. Change the shift
3058 to unsigned int. Add constructors for scalar_float_mode and
3059 scalar_int_mode elements.
3060 (aarch64_vect_float_const_representable_p): Delete.
3061 (aarch64_can_const_movi_rtx_p)
3062 (aarch64_simd_scalar_immediate_valid_for_move)
3063 (aarch64_simd_make_constant): Update call to
3064 aarch64_simd_valid_immediate.
3065 (aarch64_advsimd_valid_immediate_hs): New function.
3066 (aarch64_advsimd_valid_immediate): Likewise.
3067 (aarch64_simd_valid_immediate): Remove mode and inverse
3068 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3069 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3070 and aarch64_float_const_representable_p on the result.
3071 (aarch64_output_simd_mov_immediate): Remove mode argument.
3072 Update call to aarch64_simd_valid_immediate and use of
3073 simd_immediate_info.
3074 (aarch64_output_scalar_simd_mov_immediate): Update call
3077 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3078 Alan Hayward <alan.hayward@arm.com>
3079 David Sherwood <david.sherwood@arm.com>
3081 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3082 (mode_nunits): Likewise CONST_MODE_NUNITS.
3083 * machmode.def (ADJUST_NUNITS): Document.
3084 * genmodes.c (mode_data::need_nunits_adj): New field.
3085 (blank_mode): Update accordingly.
3086 (adj_nunits): New variable.
3087 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3089 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3090 listed in adj_nunits.
3091 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3092 listed in adj_nunits. Don't emit case statements for such modes.
3093 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3094 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3095 nothing if adj_nunits is nonnull.
3096 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3097 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3098 (emit_mode_fbit): Update use of print_maybe_const_decl.
3099 (emit_move_size): Likewise. Treat the array as non-const
3101 (emit_mode_adjustments): Handle adj_nunits.
3103 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3105 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3106 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3107 (VECTOR_MODES): Use it.
3108 (make_vector_modes): Take the prefix as an argument.
3110 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3111 Alan Hayward <alan.hayward@arm.com>
3112 David Sherwood <david.sherwood@arm.com>
3114 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3115 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3116 for MODE_VECTOR_BOOL.
3117 * machmode.def (VECTOR_BOOL_MODE): Document.
3118 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3119 (make_vector_bool_mode): New function.
3120 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3122 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3123 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3125 * stor-layout.c (int_mode_for_mode): Likewise.
3126 * tree.c (build_vector_type_for_mode): Likewise.
3127 * varasm.c (output_constant_pool_2): Likewise.
3128 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3129 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3130 for MODE_VECTOR_BOOL.
3131 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3132 of mode class checks.
3133 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3134 instead of a list of mode class checks.
3135 (expand_vector_scalar_condition): Likewise.
3136 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3138 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3139 Alan Hayward <alan.hayward@arm.com>
3140 David Sherwood <david.sherwood@arm.com>
3142 * machmode.h (mode_size): Change from unsigned short to
3144 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3145 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3146 or if measurement_type is not polynomial.
3147 (fixed_size_mode::includes_p): Check for constant-sized modes.
3148 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3149 return a poly_uint16 rather than an unsigned short.
3150 (emit_mode_size): Change the type of mode_size from unsigned short
3151 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3152 (emit_mode_adjustments): Cope with polynomial vector sizes.
3153 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3155 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3157 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3158 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3159 * caller-save.c (setup_save_areas): Likewise.
3160 (replace_reg_with_saved_mem): Likewise.
3161 * calls.c (emit_library_call_value_1): Likewise.
3162 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3163 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3164 (gen_lowpart_for_combine): Likewise.
3165 * convert.c (convert_to_integer_1): Likewise.
3166 * cse.c (equiv_constant, cse_insn): Likewise.
3167 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3168 (cselib_subst_to_values): Likewise.
3169 * dce.c (word_dce_process_block): Likewise.
3170 * df-problems.c (df_word_lr_mark_ref): Likewise.
3171 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3172 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3173 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3174 (rtl_for_decl_location): Likewise.
3175 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3176 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3177 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3178 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3179 (expand_expr_real_1): Likewise.
3180 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3181 (pad_below): Likewise.
3182 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3183 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3184 * ira.c (get_subreg_tracking_sizes): Likewise.
3185 * ira-build.c (ira_create_allocno_objects): Likewise.
3186 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3187 (ira_sort_regnos_for_alter_reg): Likewise.
3188 * ira-costs.c (record_operand_costs): Likewise.
3189 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3190 (resolve_simple_move): Likewise.
3191 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3192 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3193 (lra_constraints): Likewise.
3194 (CONST_POOL_OK_P): Reject variable-sized modes.
3195 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3196 (add_pseudo_to_slot, lra_spill): Likewise.
3197 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3198 * optabs-query.c (get_best_extraction_insn): Likewise.
3199 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3200 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3201 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3202 * recog.c (offsettable_address_addr_space_p): Likewise.
3203 * regcprop.c (maybe_mode_change): Likewise.
3204 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3205 * regrename.c (build_def_use): Likewise.
3206 * regstat.c (dump_reg_info): Likewise.
3207 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3208 (find_reloads, find_reloads_subreg_address): Likewise.
3209 * reload1.c (eliminate_regs_1): Likewise.
3210 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3211 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3212 (simplify_binary_operation_1, simplify_subreg): Likewise.
3213 * targhooks.c (default_function_arg_padding): Likewise.
3214 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3215 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3216 (verify_gimple_assign_ternary): Likewise.
3217 * tree-inline.c (estimate_move_cost): Likewise.
3218 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3219 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3220 (get_address_cost_ainc): Likewise.
3221 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3222 (vect_supportable_dr_alignment): Likewise.
3223 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3224 (vectorizable_reduction): Likewise.
3225 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3226 (vectorizable_operation, vectorizable_load): Likewise.
3227 * tree.c (build_same_sized_truth_vector_type): Likewise.
3228 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3229 * var-tracking.c (emit_note_insn_var_location): Likewise.
3230 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3231 (ADDR_VEC_ALIGN): Likewise.
3233 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3234 Alan Hayward <alan.hayward@arm.com>
3235 David Sherwood <david.sherwood@arm.com>
3237 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3239 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3240 or if measurement_type is polynomial.
3241 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3242 * combine.c (make_extraction): Likewise.
3243 * dse.c (find_shift_sequence): Likewise.
3244 * dwarf2out.c (mem_loc_descriptor): Likewise.
3245 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3246 (extract_bit_field, extract_low_bits): Likewise.
3247 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3248 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3249 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3250 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3251 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3252 * reload.c (find_reloads): Likewise.
3253 * reload1.c (alter_reg): Likewise.
3254 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3255 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3256 * tree-if-conv.c (predicate_mem_writes): Likewise.
3257 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3258 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3259 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3260 * valtrack.c (dead_debug_insert_temp): Likewise.
3261 * varasm.c (mergeable_constant_section): Likewise.
3262 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3264 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3265 Alan Hayward <alan.hayward@arm.com>
3266 David Sherwood <david.sherwood@arm.com>
3268 * expr.c (expand_assignment): Cope with polynomial mode sizes
3269 when assigning to a CONCAT.
3271 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3272 Alan Hayward <alan.hayward@arm.com>
3273 David Sherwood <david.sherwood@arm.com>
3275 * machmode.h (mode_precision): Change from unsigned short to
3277 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3279 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3280 or if measurement_type is not polynomial.
3281 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3282 in which the mode is already known to be a scalar_int_mode.
3283 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3284 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3286 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3287 for GET_MODE_PRECISION.
3288 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3289 for GET_MODE_PRECISION.
3290 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3292 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3293 (expand_field_assignment, make_extraction): Likewise.
3294 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3295 (get_last_value): Likewise.
3296 * convert.c (convert_to_integer_1): Likewise.
3297 * cse.c (cse_insn): Likewise.
3298 * expr.c (expand_expr_real_1): Likewise.
3299 * lra-constraints.c (simplify_operand_subreg): Likewise.
3300 * optabs-query.c (can_atomic_load_p): Likewise.
3301 * optabs.c (expand_atomic_load): Likewise.
3302 (expand_atomic_store): Likewise.
3303 * ree.c (combine_reaching_defs): Likewise.
3304 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3305 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3306 * tree.h (type_has_mode_precision_p): Likewise.
3307 * ubsan.c (instrument_si_overflow): Likewise.
3309 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3310 Alan Hayward <alan.hayward@arm.com>
3311 David Sherwood <david.sherwood@arm.com>
3313 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3314 polynomial numbers of units.
3315 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3316 (valid_vector_subparts_p): New function.
3317 (build_vector_type): Remove temporary shim and take the number
3318 of units as a poly_uint64 rather than an int.
3319 (build_opaque_vector_type): Take the number of units as a
3320 poly_uint64 rather than an int.
3321 * tree.c (build_vector_from_ctor): Handle polynomial
3322 TYPE_VECTOR_SUBPARTS.
3323 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3324 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3325 (build_vector_from_val): If the number of units is variable,
3326 use build_vec_duplicate_cst for constant operands and
3327 VEC_DUPLICATE_EXPR otherwise.
3328 (make_vector_type): Remove temporary is_constant ().
3329 (build_vector_type, build_opaque_vector_type): Take the number of
3330 units as a poly_uint64 rather than an int.
3331 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3333 * cfgexpand.c (expand_debug_expr): Likewise.
3334 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3335 (store_constructor, expand_expr_real_1): Likewise.
3336 (const_scalar_mask_from_tree): Likewise.
3337 * fold-const-call.c (fold_const_reduction): Likewise.
3338 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3339 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3340 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3341 (fold_relational_const): Likewise.
3342 (native_interpret_vector): Likewise. Change the size from an
3343 int to an unsigned int.
3344 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3345 TYPE_VECTOR_SUBPARTS.
3346 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3347 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3348 duplicating a non-constant operand into a variable-length vector.
3349 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3350 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3351 * ipa-icf.c (sem_variable::equals): Likewise.
3352 * match.pd: Likewise.
3353 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3354 * print-tree.c (print_node): Likewise.
3355 * stor-layout.c (layout_type): Likewise.
3356 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3357 * tree-cfg.c (verify_gimple_comparison): Likewise.
3358 (verify_gimple_assign_binary): Likewise.
3359 (verify_gimple_assign_ternary): Likewise.
3360 (verify_gimple_assign_single): Likewise.
3361 * tree-pretty-print.c (dump_generic_node): Likewise.
3362 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3363 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3364 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3365 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3366 (vect_shift_permute_load_chain): Likewise.
3367 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3368 (expand_vector_condition, optimize_vector_constructor): Likewise.
3369 (lower_vec_perm, get_compute_type): Likewise.
3370 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3371 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3372 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3373 (vect_recog_mask_conversion_pattern): Likewise.
3374 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3375 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3376 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3377 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3378 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3379 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3380 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3381 (supportable_widening_operation): Likewise.
3382 (supportable_narrowing_operation): Likewise.
3383 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3385 * varasm.c (output_constant): Likewise.
3387 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3388 Alan Hayward <alan.hayward@arm.com>
3389 David Sherwood <david.sherwood@arm.com>
3391 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3392 so that both the length == 3 and length != 3 cases set up their
3393 own permute vectors. Add comments explaining why we know the
3394 number of elements is constant.
3395 (vect_permute_load_chain): Likewise.
3397 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3398 Alan Hayward <alan.hayward@arm.com>
3399 David Sherwood <david.sherwood@arm.com>
3401 * machmode.h (mode_nunits): Change from unsigned char to
3403 (ONLY_FIXED_SIZE_MODES): New macro.
3404 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3405 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3406 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3408 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3409 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3410 or if measurement_type is not polynomial.
3411 * genmodes.c (ZERO_COEFFS): New macro.
3412 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3414 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3415 Use ZERO_COEFFS when emitting initializers.
3416 * data-streamer.h (bp_pack_poly_value): New function.
3417 (bp_unpack_poly_value): Likewise.
3418 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3419 for GET_MODE_NUNITS.
3420 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3421 for GET_MODE_NUNITS.
3422 * tree.c (make_vector_type): Remove temporary shim and make
3423 the real function take the number of units as a poly_uint64
3425 (build_vector_type_for_mode): Handle polynomial nunits.
3426 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3427 * emit-rtl.c (const_vec_series_p_1): Likewise.
3428 (gen_rtx_CONST_VECTOR): Likewise.
3429 * fold-const.c (test_vec_duplicate_folding): Likewise.
3430 * genrecog.c (validate_pattern): Likewise.
3431 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3432 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3433 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3434 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3435 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3436 * rtlanal.c (subreg_get_info): Likewise.
3437 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3438 (vect_grouped_load_supported): Likewise.
3439 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3440 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3441 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3442 (simplify_const_unary_operation, simplify_binary_operation_1)
3443 (simplify_const_binary_operation, simplify_ternary_operation)
3444 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3445 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3446 instead of CONST_VECTOR_NUNITS.
3447 * varasm.c (output_constant_pool_2): Likewise.
3448 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3449 explicit-encoded elements in the XVEC for variable-length vectors.
3451 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3453 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3455 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3456 Alan Hayward <alan.hayward@arm.com>
3457 David Sherwood <david.sherwood@arm.com>
3459 * coretypes.h (fixed_size_mode): Declare.
3460 (fixed_size_mode_pod): New typedef.
3461 * builtins.h (target_builtins::x_apply_args_mode)
3462 (target_builtins::x_apply_result_mode): Change type to
3463 fixed_size_mode_pod.
3464 * builtins.c (apply_args_size, apply_result_size, result_vector)
3465 (expand_builtin_apply_args_1, expand_builtin_apply)
3466 (expand_builtin_return): Update accordingly.
3468 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3470 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3471 * cselib.c (cselib_hash_rtx): Likewise.
3472 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3473 CONST_VECTOR encoding.
3475 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3476 Jeff Law <law@redhat.com>
3479 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3480 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3481 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3482 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3485 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3486 explicitly probe *sp in a noreturn function if there were any callee
3487 register saves or frame pointer is needed.
3489 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3492 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3493 BLKmode for ternary, binary or unary expressions.
3496 * var-tracking.c (delete_vta_debug_insn): New inline function.
3497 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3498 insns from get_insns () to NULL instead of each bb separately.
3499 Use delete_vta_debug_insn. No longer static.
3500 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3501 delete_vta_debug_insns callers.
3502 * rtl.h (delete_vta_debug_insns): Declare.
3503 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3504 instead of variable_tracking_main.
3506 2018-01-03 Martin Sebor <msebor@redhat.com>
3508 PR tree-optimization/83603
3509 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3510 arguments past the endof the argument list in functions declared
3511 without a prototype.
3512 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3513 Avoid checking when arguments are null.
3515 2018-01-03 Martin Sebor <msebor@redhat.com>
3518 * doc/extend.texi (attribute const): Fix a typo.
3519 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3520 issuing -Wsuggest-attribute for void functions.
3522 2018-01-03 Martin Sebor <msebor@redhat.com>
3524 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3525 offset_int::from instead of wide_int::to_shwi.
3526 (maybe_diag_overlap): Remove assertion.
3527 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3528 * gimple-ssa-sprintf.c (format_directive): Same.
3529 (parse_directive): Same.
3530 (sprintf_dom_walker::compute_format_length): Same.
3531 (try_substitute_return_value): Same.
3533 2017-01-03 Jeff Law <law@redhat.com>
3536 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3537 non-constant residual for zero at runtime and avoid probing in
3538 that case. Reorganize code for trailing problem to mirror handling
3541 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3543 PR tree-optimization/83501
3544 * tree-ssa-strlen.c (get_string_cst): New.
3545 (handle_char_store): Call get_string_cst.
3547 2018-01-03 Martin Liska <mliska@suse.cz>
3549 PR tree-optimization/83593
3550 * tree-ssa-strlen.c: Include tree-cfg.h.
3551 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3552 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3553 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3555 (strlen_dom_walker::before_dom_children): Call
3556 gimple_purge_dead_eh_edges. Dump tranformation with details
3558 (strlen_dom_walker::before_dom_children): Update call by adding
3559 new argument cleanup_eh.
3560 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3562 2018-01-03 Martin Liska <mliska@suse.cz>
3565 * cif-code.def (VARIADIC_THUNK): New enum value.
3566 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3569 2018-01-03 Jan Beulich <jbeulich@suse.com>
3571 * sse.md (mov<mode>_internal): Tighten condition for when to use
3572 vmovdqu<ssescalarsize> for TI and OI modes.
3574 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3576 Update copyright years.
3578 2018-01-03 Martin Liska <mliska@suse.cz>
3581 * ipa-visibility.c (function_and_variable_visibility): Skip
3582 functions with noipa attribure.
3584 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3586 * gcc.c (process_command): Update copyright notice dates.
3587 * gcov-dump.c (print_version): Ditto.
3588 * gcov.c (print_version): Ditto.
3589 * gcov-tool.c (print_version): Ditto.
3590 * gengtype.c (create_file): Ditto.
3591 * doc/cpp.texi: Bump @copying's copyright year.
3592 * doc/cppinternals.texi: Ditto.
3593 * doc/gcc.texi: Ditto.
3594 * doc/gccint.texi: Ditto.
3595 * doc/gcov.texi: Ditto.
3596 * doc/install.texi: Ditto.
3597 * doc/invoke.texi: Ditto.
3599 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3601 * vector-builder.h (vector_builder::m_full_nelts): Change from
3602 unsigned int to poly_uint64.
3603 (vector_builder::full_nelts): Update prototype accordingly.
3604 (vector_builder::new_vector): Likewise.
3605 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3606 (vector_builder::operator ==): Likewise.
3607 (vector_builder::finalize): Likewise.
3608 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3609 Take the number of elements as a poly_uint64 rather than an
3611 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3612 from unsigned int to poly_uint64.
3613 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3614 (vec_perm_indices::new_vector): Likewise.
3615 (vec_perm_indices::length): Likewise.
3616 (vec_perm_indices::nelts_per_input): Likewise.
3617 (vec_perm_indices::input_nelts): Likewise.
3618 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3619 number of elements per input as a poly_uint64 rather than an
3620 unsigned int. Use the original encoding for variable-length
3621 vectors, rather than clamping each individual element.
3622 For the second and subsequent elements in each pattern,
3623 clamp the step and base before clamping their sum.
3624 (vec_perm_indices::series_p): Handle polynomial element counts.
3625 (vec_perm_indices::all_in_range_p): Likewise.
3626 (vec_perm_indices_to_tree): Likewise.
3627 (vec_perm_indices_to_rtx): Likewise.
3628 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3629 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3630 (tree_vector_builder::new_binary_operation): Handle polynomial
3631 element counts. Return false if we need to know the number
3632 of elements at compile time.
3633 * fold-const.c (fold_vec_perm): Punt if the number of elements
3634 isn't known at compile time.
3636 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3638 * vec-perm-indices.h (vec_perm_builder): Change element type
3639 from HOST_WIDE_INT to poly_int64.
3640 (vec_perm_indices::element_type): Update accordingly.
3641 (vec_perm_indices::clamp): Handle polynomial element_types.
3642 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3643 (vec_perm_indices::all_in_range_p): Likewise.
3644 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3646 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3647 polynomial vec_perm_indices element types.
3648 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3649 * fold-const.c (fold_vec_perm): Likewise.
3650 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3651 * tree-vect-generic.c (lower_vec_perm): Likewise.
3652 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3653 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3654 element type to HOST_WIDE_INT.
3656 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3657 Alan Hayward <alan.hayward@arm.com>
3658 David Sherwood <david.sherwood@arm.com>
3660 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3661 rather than an int. Use plus_constant.
3662 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3663 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3665 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3666 Alan Hayward <alan.hayward@arm.com>
3667 David Sherwood <david.sherwood@arm.com>
3669 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3670 a HOST_WIDE_INT to a poly_int64.
3672 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3673 Alan Hayward <alan.hayward@arm.com>
3674 David Sherwood <david.sherwood@arm.com>
3676 * calls.c (load_register_parameters): Cope with polynomial
3677 mode sizes. Require a constant size for BLKmode parameters
3678 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3679 forces a parameter to be padded at the lsb end in order to
3680 fill a complete number of words, require the parameter size
3681 to be ordered wrt UNITS_PER_WORD.
3683 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3684 Alan Hayward <alan.hayward@arm.com>
3685 David Sherwood <david.sherwood@arm.com>
3687 * reload1.c (spill_stack_slot_width): Change element type
3688 from unsigned int to poly_uint64_pod.
3689 (alter_reg): Treat mode sizes as polynomial.
3691 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3692 Alan Hayward <alan.hayward@arm.com>
3693 David Sherwood <david.sherwood@arm.com>
3695 * reload.c (complex_word_subreg_p): New function.
3696 (reload_inner_reg_of_subreg, push_reload): Use it.
3698 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3699 Alan Hayward <alan.hayward@arm.com>
3700 David Sherwood <david.sherwood@arm.com>
3702 * lra-constraints.c (process_alt_operands): Reject matched
3703 operands whose sizes aren't ordered.
3704 (match_reload): Refer to this check here.
3706 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3707 Alan Hayward <alan.hayward@arm.com>
3708 David Sherwood <david.sherwood@arm.com>
3710 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3711 that the mode size is in the set {1, 2, 4, 8, 16}.
3713 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3714 Alan Hayward <alan.hayward@arm.com>
3715 David Sherwood <david.sherwood@arm.com>
3717 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3718 Use plus_constant instead of gen_rtx_PLUS.
3720 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3721 Alan Hayward <alan.hayward@arm.com>
3722 David Sherwood <david.sherwood@arm.com>
3724 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3725 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3726 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3727 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3728 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3729 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3730 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3731 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3732 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3733 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3735 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3736 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3737 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3738 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3739 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3740 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3741 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3742 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3743 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3744 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3746 * expr.c (emit_move_resolve_push): Treat the input and result
3747 of PUSH_ROUNDING as a poly_int64.
3748 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3749 (emit_push_insn): Likewise.
3750 * lra-eliminations.c (mark_not_eliminable): Likewise.
3751 * recog.c (push_operand): Likewise.
3752 * reload1.c (elimination_effects): Likewise.
3753 * rtlanal.c (nonzero_bits1): Likewise.
3754 * calls.c (store_one_arg): Likewise. Require the padding to be
3755 known at compile time.
3757 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3758 Alan Hayward <alan.hayward@arm.com>
3759 David Sherwood <david.sherwood@arm.com>
3761 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3762 Use plus_constant instead of gen_rtx_PLUS.
3764 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3765 Alan Hayward <alan.hayward@arm.com>
3766 David Sherwood <david.sherwood@arm.com>
3768 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3771 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3772 Alan Hayward <alan.hayward@arm.com>
3773 David Sherwood <david.sherwood@arm.com>
3775 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3776 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3777 via stack temporaries. Treat the mode size as polynomial too.
3779 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3780 Alan Hayward <alan.hayward@arm.com>
3781 David Sherwood <david.sherwood@arm.com>
3783 * expr.c (expand_expr_real_2): When handling conversions involving
3784 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3785 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3786 as a poly_uint64 too.
3788 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3789 Alan Hayward <alan.hayward@arm.com>
3790 David Sherwood <david.sherwood@arm.com>
3792 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3794 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3795 Alan Hayward <alan.hayward@arm.com>
3796 David Sherwood <david.sherwood@arm.com>
3798 * combine.c (can_change_dest_mode): Handle polynomial
3799 REGMODE_NATURAL_SIZE.
3800 * expmed.c (store_bit_field_1): Likewise.
3801 * expr.c (store_constructor): Likewise.
3802 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3803 and polynomial REGMODE_NATURAL_SIZE.
3804 (gen_lowpart_common): Likewise.
3805 * reginfo.c (record_subregs_of_mode): Likewise.
3806 * rtlanal.c (read_modify_subreg_p): Likewise.
3808 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3809 Alan Hayward <alan.hayward@arm.com>
3810 David Sherwood <david.sherwood@arm.com>
3812 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3813 numbers of elements.
3815 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3816 Alan Hayward <alan.hayward@arm.com>
3817 David Sherwood <david.sherwood@arm.com>
3819 * match.pd: Cope with polynomial numbers of vector elements.
3821 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3822 Alan Hayward <alan.hayward@arm.com>
3823 David Sherwood <david.sherwood@arm.com>
3825 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3826 in a POINTER_PLUS_EXPR.
3828 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3829 Alan Hayward <alan.hayward@arm.com>
3830 David Sherwood <david.sherwood@arm.com>
3832 * omp-simd-clone.c (simd_clone_subparts): New function.
3833 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3834 (ipa_simd_modify_function_body): Likewise.
3836 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3837 Alan Hayward <alan.hayward@arm.com>
3838 David Sherwood <david.sherwood@arm.com>
3840 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3841 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3842 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3843 (expand_vector_condition, vector_element): Likewise.
3844 (subparts_gt): New function.
3845 (get_compute_type): Use subparts_gt.
3846 (count_type_subparts): Delete.
3847 (expand_vector_operations_1): Use subparts_gt instead of
3848 count_type_subparts.
3850 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3851 Alan Hayward <alan.hayward@arm.com>
3852 David Sherwood <david.sherwood@arm.com>
3854 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3855 (vect_compile_time_alias): ...this new function. Do the calculation
3856 on poly_ints rather than trees.
3857 (vect_prune_runtime_alias_test_list): Update call accordingly.
3859 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3860 Alan Hayward <alan.hayward@arm.com>
3861 David Sherwood <david.sherwood@arm.com>
3863 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3865 (vect_schedule_slp_instance): Likewise.
3867 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3868 Alan Hayward <alan.hayward@arm.com>
3869 David Sherwood <david.sherwood@arm.com>
3871 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3872 constant and extern definitions for variable-length vectors.
3873 (vect_get_constant_vectors): Note that the number of units
3874 is known to be constant.
3876 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3877 Alan Hayward <alan.hayward@arm.com>
3878 David Sherwood <david.sherwood@arm.com>
3880 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3881 of units as polynomial. Choose between WIDE and NARROW based
3884 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3885 Alan Hayward <alan.hayward@arm.com>
3886 David Sherwood <david.sherwood@arm.com>
3888 * tree-vect-stmts.c (simd_clone_subparts): New function.
3889 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3891 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3892 Alan Hayward <alan.hayward@arm.com>
3893 David Sherwood <david.sherwood@arm.com>
3895 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3896 vectors as polynomial. Use build_index_vector for
3899 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3900 Alan Hayward <alan.hayward@arm.com>
3901 David Sherwood <david.sherwood@arm.com>
3903 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3904 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3905 for variable-length vectors.
3906 (vectorizable_mask_load_store): Treat the number of units as
3907 polynomial, asserting that it is constant if the condition has
3908 already been enforced.
3909 (vectorizable_store, vectorizable_load): Likewise.
3911 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3912 Alan Hayward <alan.hayward@arm.com>
3913 David Sherwood <david.sherwood@arm.com>
3915 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3916 of units as polynomial. Punt if we can't tell at compile time
3917 which vector contains the final result.
3919 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3920 Alan Hayward <alan.hayward@arm.com>
3921 David Sherwood <david.sherwood@arm.com>
3923 * tree-vect-loop.c (vectorizable_induction): Treat the number
3924 of units as polynomial. Punt on SLP inductions. Use an integer
3925 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3926 cast of such a series for variable-length floating-point
3929 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3930 Alan Hayward <alan.hayward@arm.com>
3931 David Sherwood <david.sherwood@arm.com>
3933 * tree.h (build_index_vector): Declare.
3934 * tree.c (build_index_vector): New function.
3935 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3936 of units as polynomial, forcibly converting it to a constant if
3937 vectorizable_reduction has already enforced the condition.
3938 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3939 to create a {1,2,3,...} vector.
3940 (vectorizable_reduction): Treat the number of units as polynomial.
3941 Choose vectype_in based on the largest scalar element size rather
3942 than the smallest number of units. Enforce the restrictions
3945 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3946 Alan Hayward <alan.hayward@arm.com>
3947 David Sherwood <david.sherwood@arm.com>
3949 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3950 number of units as polynomial.
3952 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3953 Alan Hayward <alan.hayward@arm.com>
3954 David Sherwood <david.sherwood@arm.com>
3956 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3957 * target.def (autovectorize_vector_sizes): Return the vector sizes
3958 by pointer, using vector_sizes rather than a bitmask.
3959 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3960 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3961 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3963 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3964 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3965 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3966 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3967 * omp-general.c (omp_max_vf): Likewise.
3968 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3969 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3970 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3971 * tree-vect-slp.c (vect_slp_bb): Likewise.
3972 * doc/tm.texi: Regenerate.
3973 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3975 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3976 the vector size as a poly_uint64 rather than an unsigned int.
3977 (current_vector_size): Change from an unsigned int to a poly_uint64.
3978 (get_vectype_for_scalar_type): Update accordingly.
3979 * tree.h (build_truth_vector_type): Take the size and number of
3980 units as a poly_uint64 rather than an unsigned int.
3981 (build_vector_type): Add a temporary overload that takes
3982 the number of units as a poly_uint64 rather than an unsigned int.
3983 * tree.c (make_vector_type): Likewise.
3984 (build_truth_vector_type): Take the number of units as a poly_uint64
3985 rather than an unsigned int.
3987 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3988 Alan Hayward <alan.hayward@arm.com>
3989 David Sherwood <david.sherwood@arm.com>
3991 * target.def (get_mask_mode): Take the number of units and length
3992 as poly_uint64s rather than unsigned ints.
3993 * targhooks.h (default_get_mask_mode): Update accordingly.
3994 * targhooks.c (default_get_mask_mode): Likewise.
3995 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3996 * doc/tm.texi: Regenerate.
3998 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3999 Alan Hayward <alan.hayward@arm.com>
4000 David Sherwood <david.sherwood@arm.com>
4002 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4003 * omp-general.c (omp_max_vf): Likewise.
4004 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4005 (expand_omp_simd): Handle polynomial safelen.
4006 * omp-low.c (omplow_simd_context): Add a default constructor.
4007 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4008 (lower_rec_simd_input_clauses): Update accordingly.
4009 (lower_rec_input_clauses): Likewise.
4011 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4012 Alan Hayward <alan.hayward@arm.com>
4013 David Sherwood <david.sherwood@arm.com>
4015 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4016 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4017 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4018 (vect_analyze_slp_cost): Likewise.
4019 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4020 (vect_model_load_cost): Likewise.
4022 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4023 Alan Hayward <alan.hayward@arm.com>
4024 David Sherwood <david.sherwood@arm.com>
4026 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4027 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4028 from an unsigned int * to a poly_uint64_pod *.
4029 (calculate_unrolling_factor): New function.
4030 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4032 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4033 Alan Hayward <alan.hayward@arm.com>
4034 David Sherwood <david.sherwood@arm.com>
4036 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4037 from an unsigned int to a poly_uint64.
4038 (_loop_vec_info::slp_unrolling_factor): Likewise.
4039 (_loop_vec_info::vectorization_factor): Change from an int
4041 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4042 (vect_get_num_vectors): New function.
4043 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4044 (vect_get_num_copies): Use vect_get_num_vectors.
4045 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4046 to an unsigned int *.
4047 (vect_analyze_data_refs): Change min_vf from an int * to a
4049 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4050 than an unsigned HOST_WIDE_INT.
4051 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4052 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4053 to an unsigned int *.
4054 (vect_analyze_data_ref_dependences): Likewise.
4055 (vect_compute_data_ref_alignment): Handle polynomial vf.
4056 (vect_enhance_data_refs_alignment): Likewise.
4057 (vect_prune_runtime_alias_test_list): Likewise.
4058 (vect_shift_permute_load_chain): Likewise.
4059 (vect_supportable_dr_alignment): Likewise.
4060 (dependence_distance_ge_vf): Take the vectorization factor as a
4061 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4062 (vect_analyze_data_refs): Change min_vf from an int * to a
4064 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4065 vfm1 as a poly_uint64 rather than an int. Make the same change
4066 for the returned bound_scalar.
4067 (vect_gen_vector_loop_niters): Handle polynomial vf.
4068 (vect_do_peeling): Likewise. Update call to
4069 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4070 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4072 * tree-vect-loop.c (vect_determine_vectorization_factor)
4073 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4074 (vect_get_known_peeling_cost): Likewise.
4075 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4076 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4077 (vect_transform_loop): Likewise. Use the lowest possible VF when
4078 updating the upper bounds of the loop.
4079 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4081 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4082 polynomial unroll factors.
4083 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4084 (vect_make_slp_decision): Likewise.
4085 (vect_supported_load_permutation_p): Likewise, and polynomial
4087 (vect_analyze_slp_cost): Handle polynomial vf.
4088 (vect_slp_analyze_node_operations): Likewise.
4089 (vect_slp_analyze_bb_1): Likewise.
4090 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4091 than an unsigned HOST_WIDE_INT.
4092 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4093 (vectorizable_load): Handle polynomial vf.
4094 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4096 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4098 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4099 Alan Hayward <alan.hayward@arm.com>
4100 David Sherwood <david.sherwood@arm.com>
4102 * match.pd: Handle bit operations involving three constants
4103 and try to fold one pair.
4105 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4107 * tree-vect-loop-manip.c: Include gimple-fold.h.
4108 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4109 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4110 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4111 Add a path that uses a step of VF instead of 1, but disable it
4113 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4114 and niters_no_overflow parameters. Update calls to
4115 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4116 Create a new SSA name if the latter choses to use a ste other
4117 than zero, and return it via niters_vector_mult_vf_var.
4118 * tree-vect-loop.c (vect_transform_loop): Update calls to
4119 vect_do_peeling, vect_gen_vector_loop_niters and
4120 slpeel_make_loop_iterate_ntimes.
4121 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4122 (vect_gen_vector_loop_niters): Update declarations after above changes.
4124 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4126 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4127 128-bit round to integer instructions.
4128 (ceil<mode>2): Likewise.
4129 (btrunc<mode>2): Likewise.
4130 (round<mode>2): Likewise.
4132 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4134 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4135 unaligned VSX load/store on P8/P9.
4136 (expand_block_clear): Allow the use of unaligned VSX
4137 load/store on P8/P9.
4139 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4141 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4143 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4144 swap associated with both a load and a store.
4146 2018-01-02 Andrew Waterman <andrew@sifive.com>
4148 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4149 * config/riscv/riscv.md (clear_cache): Use it.
4151 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4153 * web.c: Remove out-of-date comment.
4155 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4157 * expr.c (fixup_args_size_notes): Check that any existing
4158 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4159 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4160 (emit_single_push_insn): ...here.
4162 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4164 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4165 (const_vector_encoded_nelts): New function.
4166 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4167 (const_vector_int_elt, const_vector_elt): Declare.
4168 * emit-rtl.c (const_vector_int_elt_1): New function.
4169 (const_vector_elt): Likewise.
4170 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4171 of CONST_VECTOR_ELT.
4173 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4175 * expr.c: Include rtx-vector-builder.h.
4176 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4177 directly on the tree encoding.
4178 (const_vector_from_tree): Likewise.
4179 * optabs.c: Include rtx-vector-builder.h.
4180 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4181 sequence of "u" values.
4182 * vec-perm-indices.c: Include rtx-vector-builder.h.
4183 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4184 directly on the vec_perm_indices encoding.
4186 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4188 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4189 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4190 * rtx-vector-builder.h: New file.
4191 * rtx-vector-builder.c: Likewise.
4192 * rtl.h (rtx_def::u2): Add a const_vector field.
4193 (CONST_VECTOR_NPATTERNS): New macro.
4194 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4195 (CONST_VECTOR_DUPLICATE_P): Likewise.
4196 (CONST_VECTOR_STEPPED_P): Likewise.
4197 (CONST_VECTOR_ENCODED_ELT): Likewise.
4198 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4199 (unwrap_const_vec_duplicate): Likewise.
4200 (const_vec_series_p): Check for a non-duplicated vector encoding.
4201 Say that the function only returns true for integer vectors.
4202 * emit-rtl.c: Include rtx-vector-builder.h.
4203 (gen_const_vec_duplicate_1): Delete.
4204 (gen_const_vector): Call gen_const_vec_duplicate instead of
4205 gen_const_vec_duplicate_1.
4206 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4207 (gen_const_vec_duplicate): Use rtx_vector_builder.
4208 (gen_const_vec_series): Likewise.
4209 (gen_rtx_CONST_VECTOR): Likewise.
4210 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4211 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4212 Build a new vector rather than modifying a CONST_VECTOR in-place.
4213 (handle_special_swappables): Update call accordingly.
4214 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4215 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4216 Build a new vector rather than modifying a CONST_VECTOR in-place.
4217 (handle_special_swappables): Update call accordingly.
4219 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4221 * simplify-rtx.c (simplify_const_binary_operation): Use
4222 CONST_VECTOR_ELT instead of XVECEXP.
4224 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4226 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4227 the selector elements to be different from the data elements
4228 if the selector is a VECTOR_CST.
4229 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4230 ssizetype for the selector.
4232 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4234 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4235 before testing each element individually.
4236 * tree-vect-generic.c (lower_vec_perm): Likewise.
4238 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4240 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4241 * selftest-run-tests.c (selftest::run_tests): Call it.
4242 * vector-builder.h (vector_builder::operator ==): New function.
4243 (vector_builder::operator !=): Likewise.
4244 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4245 (vec_perm_indices::all_from_input_p): New function.
4246 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4247 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4248 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4249 instead of reading the VECTOR_CST directly. Detect whether both
4250 vector inputs are the same before constructing the vec_perm_indices,
4251 and update the number of inputs argument accordingly. Use the
4252 utility functions added above. Only construct sel2 if we need to.
4254 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4256 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4257 the broadcast of the low byte.
4258 (expand_mult_highpart): Use an explicit encoding for the permutes.
4259 * optabs-query.c (can_mult_highpart_p): Likewise.
4260 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4261 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4262 (vectorizable_bswap): Likewise.
4263 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4264 explicit encoding for the power-of-2 permutes.
4265 (vect_permute_store_chain): Likewise.
4266 (vect_grouped_load_supported): Likewise.
4267 (vect_permute_load_chain): Likewise.
4269 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4271 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4272 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4273 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4274 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4275 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4276 (vect_gen_perm_mask_any): Likewise.
4278 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4280 * int-vector-builder.h: New file.
4281 * vec-perm-indices.h: Include int-vector-builder.h.
4282 (vec_perm_indices): Redefine as an int_vector_builder.
4283 (auto_vec_perm_indices): Delete.
4284 (vec_perm_builder): Redefine as a stand-alone class.
4285 (vec_perm_indices::vec_perm_indices): New function.
4286 (vec_perm_indices::clamp): Likewise.
4287 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4288 (vec_perm_indices::new_vector): New function.
4289 (vec_perm_indices::new_expanded_vector): Update for new
4290 vec_perm_indices class.
4291 (vec_perm_indices::rotate_inputs): New function.
4292 (vec_perm_indices::all_in_range_p): Operate directly on the
4293 encoded form, without computing elided elements.
4294 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4295 encoding. Update for new vec_perm_indices class.
4296 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4297 the given vec_perm_builder.
4298 (expand_vec_perm_var): Update vec_perm_builder constructor.
4299 (expand_mult_highpart): Use vec_perm_builder instead of
4300 auto_vec_perm_indices.
4301 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4302 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4303 or double series encoding as appropriate.
4304 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4305 vec_perm_indices instead of auto_vec_perm_indices.
4306 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4307 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4308 (vect_permute_store_chain): Likewise.
4309 (vect_grouped_load_supported): Likewise.
4310 (vect_permute_load_chain): Likewise.
4311 (vect_shift_permute_load_chain): Likewise.
4312 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4313 (vect_transform_slp_perm_load): Likewise.
4314 (vect_schedule_slp_instance): Likewise.
4315 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4316 (vectorizable_mask_load_store): Likewise.
4317 (vectorizable_bswap): Likewise.
4318 (vectorizable_store): Likewise.
4319 (vectorizable_load): Likewise.
4320 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4321 vec_perm_indices instead of auto_vec_perm_indices. Use
4322 tree_to_vec_perm_builder to read the vector from a tree.
4323 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4324 vec_perm_builder instead of a vec_perm_indices.
4325 (have_whole_vector_shift): Use vec_perm_builder and
4326 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4327 truncation to calc_vec_perm_mask_for_shift.
4328 (vect_create_epilog_for_reduction): Likewise.
4329 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4330 from auto_vec_perm_indices to vec_perm_indices.
4331 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4332 instead of changing individual elements.
4333 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4334 the vector in d.perm.
4335 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4336 from auto_vec_perm_indices to vec_perm_indices.
4337 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4338 instead of changing individual elements.
4339 (arm_vectorize_vec_perm_const): Use new_vector to install
4340 the vector in d.perm.
4341 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4342 Update vec_perm_builder constructor.
4343 (rs6000_expand_interleave): Likewise.
4344 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4345 (rs6000_expand_interleave): Likewise.
4347 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4349 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4350 to qimode could truncate the indices.
4351 * optabs.c (expand_vec_perm_var): Likewise.
4353 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4355 * Makefile.in (OBJS): Add vec-perm-indices.o.
4356 * vec-perm-indices.h: New file.
4357 * vec-perm-indices.c: Likewise.
4358 * target.h (vec_perm_indices): Replace with a forward class
4360 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4361 * optabs.h: Include vec-perm-indices.h.
4362 (expand_vec_perm): Delete.
4363 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4364 (expand_vec_perm_const): Declare.
4365 * target.def (vec_perm_const_ok): Replace with...
4366 (vec_perm_const): ...this new hook.
4367 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4368 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4369 * doc/tm.texi: Regenerate.
4370 * optabs.def (vec_perm_const): Delete.
4371 * doc/md.texi (vec_perm_const): Likewise.
4372 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4373 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4374 expand_vec_perm for constant permutation vectors. Assert that
4375 the mode of variable permutation vectors is the integer equivalent
4376 of the mode that is being permuted.
4377 * optabs-query.h (selector_fits_mode_p): Declare.
4378 * optabs-query.c: Include vec-perm-indices.h.
4379 (selector_fits_mode_p): New function.
4380 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4381 is defined, instead of checking whether the vec_perm_const_optab
4382 exists. Use targetm.vectorize.vec_perm_const instead of
4383 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4384 fit in the vector mode before using a variable permute.
4385 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4386 vec_perm_indices instead of an rtx.
4387 (expand_vec_perm): Replace with...
4388 (expand_vec_perm_const): ...this new function. Take the selector
4389 as a vec_perm_indices rather than an rtx. Also take the mode of
4390 the selector. Update call to shift_amt_for_vec_perm_mask.
4391 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4392 Use vec_perm_indices::new_expanded_vector to expand the original
4393 selector into bytes. Check whether the indices fit in the vector
4394 mode before using a variable permute.
4395 (expand_vec_perm_var): Make global.
4396 (expand_mult_highpart): Use expand_vec_perm_const.
4397 * fold-const.c: Includes vec-perm-indices.h.
4398 * tree-ssa-forwprop.c: Likewise.
4399 * tree-vect-data-refs.c: Likewise.
4400 * tree-vect-generic.c: Likewise.
4401 * tree-vect-loop.c: Likewise.
4402 * tree-vect-slp.c: Likewise.
4403 * tree-vect-stmts.c: Likewise.
4404 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4406 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4407 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4408 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4409 (aarch64_vectorize_vec_perm_const): ...this new function.
4410 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4411 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4412 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4413 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4414 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4415 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4416 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4418 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4419 check for NEON modes.
4420 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4421 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4422 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4423 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4425 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4426 the old VEC_PERM_CONST conditions.
4427 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4428 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4429 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4430 (ia64_vectorize_vec_perm_const_ok): Merge into...
4431 (ia64_vectorize_vec_perm_const): ...this new function.
4432 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4433 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4434 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4435 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4436 * config/mips/mips.c (mips_expand_vec_perm_const)
4437 (mips_vectorize_vec_perm_const_ok): Merge into...
4438 (mips_vectorize_vec_perm_const): ...this new function.
4439 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4440 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4441 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4442 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4443 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4444 (rs6000_expand_vec_perm_const): Delete.
4445 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4447 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4448 (altivec_expand_vec_perm_const_le): Take each operand individually.
4449 Operate on constant selectors rather than rtxes.
4450 (altivec_expand_vec_perm_const): Likewise. Update call to
4451 altivec_expand_vec_perm_const_le.
4452 (rs6000_expand_vec_perm_const): Delete.
4453 (rs6000_vectorize_vec_perm_const_ok): Delete.
4454 (rs6000_vectorize_vec_perm_const): New function.
4455 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4456 an element count and rtx array.
4457 (rs6000_expand_extract_even): Update call accordingly.
4458 (rs6000_expand_interleave): Likewise.
4459 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4460 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4461 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4462 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4463 (rs6000_expand_vec_perm_const): Delete.
4464 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4465 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4466 (altivec_expand_vec_perm_const_le): Take each operand individually.
4467 Operate on constant selectors rather than rtxes.
4468 (altivec_expand_vec_perm_const): Likewise. Update call to
4469 altivec_expand_vec_perm_const_le.
4470 (rs6000_expand_vec_perm_const): Delete.
4471 (rs6000_vectorize_vec_perm_const_ok): Delete.
4472 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4473 reference to the SPE evmerge intructions.
4474 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4475 an element count and rtx array.
4476 (rs6000_expand_extract_even): Update call accordingly.
4477 (rs6000_expand_interleave): Likewise.
4478 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4479 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4481 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4483 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4485 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4486 vector mode and that that mode matches the mode of the data
4488 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4489 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4490 directly using expand_vec_perm_1 when forcing selectors into
4492 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4494 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4496 * optabs-query.h (can_vec_perm_p): Delete.
4497 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4498 * optabs-query.c (can_vec_perm_p): Split into...
4499 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4500 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4501 particular selector is valid.
4502 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4503 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4504 (vect_grouped_load_supported): Likewise.
4505 (vect_shift_permute_load_chain): Likewise.
4506 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4507 (vect_transform_slp_perm_load): Likewise.
4508 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4509 (vectorizable_bswap): Likewise.
4510 (vect_gen_perm_mask_checked): Likewise.
4511 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4512 implementations of variable permutation vectors into account
4513 when deciding which selector to use.
4514 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4515 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4516 with a false third argument.
4517 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4518 to test whether the constant selector is valid and can_vec_perm_var_p
4519 to test whether a variable selector is valid.
4521 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4523 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4524 * optabs-query.c (can_vec_perm_p): Likewise.
4525 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4526 instead of vec_perm_indices.
4527 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4528 (vect_gen_perm_mask_checked): Likewise,
4529 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4530 (vect_gen_perm_mask_checked): Likewise,
4532 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4534 * optabs-query.h (qimode_for_vec_perm): Declare.
4535 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4536 (qimode_for_vec_perm): ...this new function.
4537 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4539 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4541 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4542 does not have a conditional at the top.
4544 2018-01-02 Richard Biener <rguenther@suse.de>
4546 * ipa-inline.c (big_speedup_p): Fix expression.
4548 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4551 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4554 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4558 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4559 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4560 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4561 cond_taken_branch_cost 3->4.
4563 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4565 PR tree-optimization/83581
4566 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4567 TODO_cleanup_cfg if any changes have been made.
4570 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4571 convert_modes if target mode has the right side, but different mode
4575 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4576 last argument when extracting from CONCAT. If either from_real or
4577 from_imag is NULL, use expansion through memory. If result is not
4578 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4579 the parts directly to inner mode, if even that fails, use expansion
4583 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4584 check for bswap in mode rather than HImode and use that in expand_unop
4587 Copyright (C) 2018 Free Software Foundation, Inc.
4589 Copying and distribution of this file, with or without modification,
4590 are permitted in any medium without royalty provided the copyright
4591 notice and this notice are preserved.