1 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
4 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
6 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
9 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
12 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
13 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
14 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
16 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
19 2023-09-28 Pan Li <pan2.li@intel.com>
22 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
24 * config/riscv/vector-iterators.md: New iterator.
26 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
28 * rtl.h (lra_in_progress): Change type to bool.
29 (ira_in_progress): Add new extern.
30 * ira.cc (ira_in_progress): New global.
31 (pass_ira::execute): Set up ira_in_progress.
32 * lra.cc: (lra_in_progress): Change type to bool and initialize.
33 (lra): Use bool values for lra_in_progress.
34 * lra-eliminations.cc (init_elim_table): Ditto.
36 2023-09-28 Richard Biener <rguenther@suse.de>
39 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
40 Use a heap allocated worklist for CFG traversal instead of
43 2023-09-28 Jakub Jelinek <jakub@redhat.com>
44 Jonathan Wakely <jwakely@redhat.com>
46 * vec.h: Mention in file comment limited support for non-POD types
48 (vec_destruct): New function template.
49 (release): Use it for non-trivially destructible T.
51 (quick_push): Perform a placement new into slot
52 instead of assignment.
53 (pop): For non-trivially destructible T return void
54 rather than T & and destruct the popped element.
55 (quick_insert, ordered_remove): Note that they aren't suitable
56 for non-trivially copyable types. Add static_asserts for that.
57 (block_remove): Assert T is trivially copyable.
58 (vec_detail::is_trivially_copyable_or_pair): New trait.
59 (qsort, sort, stablesort): Assert T is trivially copyable or
60 std::pair with both trivally copyable types.
61 (quick_grow): Add assert T is trivially default constructible,
62 for now commented out.
63 (quick_grow_cleared): Don't call quick_grow, instead inline it
64 by hand except for the new static_assert.
65 (gt_ggc_mx): Assert T is trivially destructable.
66 (auto_vec::operator=): Formatting fixes.
67 (auto_vec::auto_vec): Likewise.
68 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
69 it manually and call quick_grow_cleared method rather than quick_grow.
70 (safe_grow_cleared): Likewise.
71 * edit-context.cc (class line_event): Move definition earlier.
72 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
74 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
75 safe_grow_cleared instead of safe_grow followed by placement new
76 constructing the elements.
78 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
80 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
81 * tree-affine.cc (expr_to_aff_combination): Likewise.
83 2023-09-28 Richard Biener <rguenther@suse.de>
85 PR tree-optimization/111614
86 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
87 convert the first vector when required.
89 2023-09-28 xuli <xuli1@eswincomputing.com>
92 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
93 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
95 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
97 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
99 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
102 * configure: Regenerate.
103 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
105 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
106 Philipp Tomsich <philipp.tomsich@vrull.eu>
107 Manolis Tsamis <manolis.tsamis@vrull.eu>
109 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
111 (enum aarch64_stp_policy): New enum type.
112 * config/aarch64/aarch64-protos.h (struct tune_params): Add
113 appropriate enums for the policies.
114 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
115 * config/aarch64/aarch64-tuning-flags.def
116 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
118 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
119 function to parse ldp-policy parameter.
120 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
121 (aarch64_override_options_internal): Call parsing functions.
122 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
123 (aarch64_operands_ok_for_ldpstp): Add call to
124 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
125 check and alignment check and remove superseded ones.
126 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
127 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
128 check and alignment check and remove superseded ones.
129 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
130 (aarch64-stp-policy): New param.
131 * doc/invoke.texi: Document the parameters accordingly.
133 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
135 * tree-data-ref.cc (include calls.h): Add new include.
136 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
138 2023-09-27 Richard Biener <rguenther@suse.de>
140 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
142 2023-09-27 Jakub Jelinek <jakub@redhat.com>
145 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
146 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
148 * function.cc (assign_parm_find_data_types): Likewise.
150 2023-09-27 Pan Li <pan2.li@intel.com>
152 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
153 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
154 (enum insn_type): Ditto.
155 (expand_vec_roundeven): New func decl.
156 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
158 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
161 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
163 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
165 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
167 2023-09-27 Pan Li <pan2.li@intel.com>
169 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
170 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
171 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
172 (expand_vec_trunc): Ditto.
174 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
178 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
179 Handle failure from expand_builtin_atomic_test_and_set.
180 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
181 generate atomic code through target support, return NULL
182 instead of emitting non-atomic code. Also, for code handling
183 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
184 from calling emit_store_flag_force instead of returning NULL.
186 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
188 PR tree-optimization/111599
189 * value-relation.cc (relation_oracle::valid_equivs): Ensure
192 2023-09-26 Andrew Pinski <apinski@marvell.com>
194 PR tree-optimization/106164
195 PR tree-optimization/111456
196 * match.pd (`(A ==/!= B) & (A CMP C)`):
197 Support an optional cast on the second A.
198 (`(A ==/!= B) | (A CMP C)`): Likewise.
200 2023-09-26 Andrew Pinski <apinski@marvell.com>
202 PR tree-optimization/111469
203 * tree-ssa-phiopt.cc (minmax_replacement): Fix
204 the assumption for the `non-diamond` handling cases
207 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
209 * match.pd: Optimize COND_ADD reduction pattern.
211 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
213 PR tree-optimization/111594
214 PR tree-optimization/110660
215 * match.pd: Optimize COND_LEN_ADD reduction.
217 2023-09-26 Pan Li <pan2.li@intel.com>
219 * config/riscv/autovec.md (round<mode>2): New pattern.
220 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
221 (enum insn_type): Ditto.
222 (expand_vec_round): New function decl.
223 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
225 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
227 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
229 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
232 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
233 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
235 2023-09-26 Pan Li <pan2.li@intel.com>
237 * config/riscv/autovec.md (rint<mode>2): New pattern.
238 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
239 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
241 2023-09-26 Pan Li <pan2.li@intel.com>
243 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
244 * config/riscv/riscv-protos.h (enum insn_type): New enum.
245 (expand_vec_nearbyint): New function decl.
246 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
248 2023-09-26 Pan Li <pan2.li@intel.com>
250 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
251 (get_fp_rounding_coefficient): Rename.
252 (gen_floor_const_fp): Remove.
253 (expand_vec_ceil): Take renamed func.
254 (expand_vec_floor): Ditto.
256 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
259 * lra-constraints.cc (lra_constraints): Copy substituted
261 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
263 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
265 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
266 return statement in the varying case.
268 2023-09-25 Xi Ruoyao <xry111@xry111.site>
270 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
272 2023-09-25 Andrew Pinski <apinski@marvell.com>
274 PR tree-optimization/110386
275 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
277 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
280 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
282 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
285 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
288 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
291 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
292 target_option_default_node when the callee has no option
293 attributes, also simplify the existing code accordingly.
295 2023-09-25 Guo Jie <guojie@loongson.cn>
297 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
298 pattern for vector construction.
299 (vec_set<mode>_internal): Ditto.
300 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
301 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
302 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
303 Optimized the implementation of vector construction.
304 (loongarch_expand_vector_init_same): New function.
305 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
306 pattern for vector construction.
307 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
309 (vec_concatv2df): Ditto.
310 (vec_concatv4sf): Ditto.
312 2023-09-24 Pan Li <pan2.li@intel.com>
315 * config/riscv/riscv-v.cc
316 (expand_vector_init_merge_repeating_sequence): Bugfix
318 2023-09-24 Andrew Pinski <apinski@marvell.com>
320 PR tree-optimization/111543
321 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
323 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
325 * config/riscv/autovec-opt.md: Extend VLS modes
326 * config/riscv/vector-iterators.md: Ditto.
328 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
330 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
332 2023-09-23 Pan Li <pan2.li@intel.com>
334 * config/riscv/autovec.md (floor<mode>2): New pattern.
335 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
336 (enum insn_type): Ditto.
337 (expand_vec_floor): New function decl.
338 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
339 (expand_vec_floor): Ditto.
341 2023-09-22 Pan Li <pan2.li@intel.com>
343 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
344 (emit_vec_float_cmp_mask): Rename.
345 (expand_vec_copysign): Ditto.
346 (emit_vec_copysign): Ditto.
347 (emit_vec_abs): New function impl.
348 (emit_vec_cvt_x_f): Ditto.
349 (emit_vec_cvt_f_x): Ditto.
350 (expand_vec_ceil): Ditto.
352 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
354 * config/riscv/vector-iterators.md: Extend VLS modes.
356 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
358 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
359 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
360 (vec_duplicate<mode>): Ditto.
362 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
364 * config/riscv/autovec.md: Add VLS conditional patterns.
365 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
366 (expand_cond_binop): Ditto.
367 (expand_cond_ternop): Ditto.
368 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
369 (expand_cond_binop): Ditto.
370 (expand_cond_ternop): Ditto.
372 2023-09-22 xuli <xuli1@eswincomputing.com>
375 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
376 into vrgatherei16.vv.
378 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
380 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
381 New combine patterns.
382 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
384 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
386 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
387 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
389 2023-09-22 Pan Li <pan2.li@intel.com>
391 * config/riscv/autovec.md (ceil<mode>2): New pattern.
392 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
393 (enum insn_type): Ditto.
394 (expand_vec_ceil): New function decl.
395 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
396 (expand_vec_float_cmp_mask): Ditto.
397 (expand_vec_copysign): Ditto.
398 (expand_vec_ceil): Ditto.
399 * config/riscv/vector.md: Add VLS mode support.
401 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
403 * config/riscv/autovec.md: Extend VLS modes.
405 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
407 * config/riscv/vector-iterators.md: Extend VLS modes.
409 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
410 Robin Dapp <rdapp.gcc@gmail.com>
412 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
413 (emit_nonvlmax_insn): Adjust comments.
414 (emit_vlmax_insn_lra): Adjust comments.
416 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
418 * config.gcc (*linux*): Set rust target_objs, and
419 target_has_targetrustm,
420 * config/t-linux (linux-rust.o): New rule.
421 * config/linux-rust.cc: New file.
423 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
425 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
426 rust_target_objs and target_has_targetrustm.
427 * config/t-winnt (winnt-rust.o): New rule.
428 * config/winnt-rust.cc: New file.
430 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
432 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
433 and target_has_targetrustm.
434 * config/fuchsia-rust.cc: New file.
435 * config/t-fuchsia: New file.
437 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
439 * config.gcc (*-*-vxworks*): Set rust_target_objs and
440 target_has_targetrustm.
441 * config/t-vxworks (vxworks-rust.o): New rule.
442 * config/vxworks-rust.cc: New file.
444 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
446 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
447 target_has_targetrustm.
448 * config/t-dragonfly (dragonfly-rust.o): New rule.
449 * config/dragonfly-rust.cc: New file.
451 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
453 * config.gcc (*-*-solaris2*): Set rust_target_objs and
454 target_has_targetrustm.
455 * config/t-sol2 (sol2-rust.o): New rule.
456 * config/sol2-rust.cc: New file.
458 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
460 * config.gcc (*-*-openbsd*): Set rust_target_objs and
461 target_has_targetrustm.
462 * config/t-openbsd (openbsd-rust.o): New rule.
463 * config/openbsd-rust.cc: New file.
465 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
467 * config.gcc (*-*-netbsd*): Set rust_target_objs and
468 target_has_targetrustm.
469 * config/t-netbsd (netbsd-rust.o): New rule.
470 * config/netbsd-rust.cc: New file.
472 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
474 * config.gcc (*-*-freebsd*): Set rust_target_objs and
475 target_has_targetrustm.
476 * config/t-freebsd (freebsd-rust.o): New rule.
477 * config/freebsd-rust.cc: New file.
479 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
481 * config.gcc (*-*-darwin*): Set rust_target_objs and
482 target_has_targetrustm.
483 * config/t-darwin (darwin-rust.o): New rule.
484 * config/darwin-rust.cc: New file.
486 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
488 * config/i386/t-i386 (i386-rust.o): New rule.
489 * config/i386/i386-rust.cc: New file.
490 * config/i386/i386-rust.h: New file.
492 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
494 * doc/tm.texi: Regenerate.
495 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
497 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
499 * doc/tm.texi: Regenerate.
500 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
501 TARGET_RUST_CPU_INFO.
503 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
505 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
506 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
507 (tm_rust.h, cs-tm_rust.h, default-rust.o,
508 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
509 (s-tm-texi): Also check timestamp on rust-target.def.
510 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
511 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
512 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
514 * configure: Regenerate.
515 * configure.ac (tm_rust_file_list, tm_rust_include_list,
516 rust_target_objs): Add substitutes.
517 * doc/tm.texi: Regenerate.
518 * doc/tm.texi.in (targetrustm): Document.
519 (target_has_targetrustm): Document.
520 * genhooks.cc: Include rust/rust-target.def.
521 * config/default-rust.cc: New file.
523 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
526 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
527 * config/riscv/predicates.md (autovec_else_operand): New predicate.
528 * config/riscv/riscv-v.cc (get_else_operand): New function.
529 (expand_cond_len_unop): Adapt ELSE value.
530 (expand_cond_len_binop): Ditto.
531 (expand_cond_len_ternop): Ditto.
532 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
533 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
535 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
538 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
540 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
542 PR tree-optimization/111355
543 * match.pd ((X + C) / N): Update pattern.
545 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
547 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
549 2023-09-21 xuli <xuli1@eswincomputing.com>
552 * config/riscv/constraints.md (c01): const_int 1.
556 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
557 (vector_eew16_stride_operand): Ditto.
558 (vector_eew32_stride_operand): Ditto.
559 (vector_eew64_stride_operand): Ditto.
560 * config/riscv/vector-iterators.md: New iterator for stride operand.
561 * config/riscv/vector.md: Add stride = element width constraint.
563 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
565 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
566 (const_1_or_4_operand): Ditto.
567 (vector_gs_scale_operand_16): Ditto.
568 (vector_gs_scale_operand_32): Ditto.
569 * config/riscv/vector-iterators.md: Adjust.
571 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
573 * config/riscv/autovec.md: Extend VLS modes.
574 * config/riscv/vector-iterators.md: Ditto.
575 * config/riscv/vector.md: Ditto.
577 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
579 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
581 (ssa_cache::dump): Don't print GLOBAL RANGE header.
582 (ssa_lazy_cache::merge_range): Adjust return value meaning.
583 (ranger_cache::dump): Print GLOBAL RANGE header.
585 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
587 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
589 (foperator_unordered_gt::fold_range): Same.
590 (foperator_unordered_lt::fold_range): Same.
591 (foperator_unordered_le::fold_range): Same.
593 2023-09-20 Jakub Jelinek <jakub@redhat.com>
595 * builtins.h (type_to_class): Declare.
596 * builtins.cc (type_to_class): No longer static. Return
597 int rather than enum.
598 * doc/extend.texi (__builtin_classify_type): Document.
600 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
603 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
604 * optabs.cc (maybe_legitimize_operand): Ditto.
605 (can_reuse_operands_p): Ditto.
606 * optabs.h (enum expand_operand_type): Ditto.
607 (create_undefined_input_operand): Ditto.
609 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
611 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
612 'omp allocate' variables; move stack cleanup after other
614 (omp_notice_variable): Process original decl when decl
615 of the value-expression for a 'omp allocate' variable is passed.
616 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
618 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
620 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
621 support simplifying vector int not only scalar int.
623 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
625 * config/riscv/vector-iterators.md: Extend VLS floating-point.
627 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
629 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
631 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
634 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
635 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
637 2023-09-20 Richard Biener <rguenther@suse.de>
639 PR tree-optimization/111489
640 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
642 2023-09-20 Richard Biener <rguenther@suse.de>
644 PR tree-optimization/111489
645 * doc/invoke.texi (--param uninit-max-chain-len): Document.
646 (--param uninit-max-num-chains): Likewise.
647 * params.opt (-param=uninit-max-chain-len=): New.
648 (-param=uninit-max-num-chains=): Likewise.
649 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
650 param_uninit_max_num_chains.
651 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
652 (uninit_analysis::init_use_preds): Avoid VLA.
653 (uninit_analysis::init_from_phi_def): Likewise.
654 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
657 2023-09-20 Jakub Jelinek <jakub@redhat.com>
659 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
660 GET_MODE_PRECISION of TImode or DImode depending on whether
661 TImode is supported scalar mode.
662 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
663 * expr.cc (expand_expr_real_1): Likewise.
664 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
665 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
667 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
669 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
670 (*n<optab><mode>): Ditto.
671 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
672 (*<any_shiftrt:optab>trunc<mode>): Ditto.
673 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
674 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
675 (*single_widen_mult<any_extend:su><mode>): Ditto.
676 (*single_widen_mul<any_extend:su><mode>): Ditto.
677 (*single_widen_mult<mode>): Ditto.
678 (*single_widen_mul<mode>): Ditto.
679 (*dual_widen_fma<mode>): Ditto.
680 (*dual_widen_fma<su><mode>): Ditto.
681 (*single_widen_fma<mode>): Ditto.
682 (*single_widen_fma<su><mode>): Ditto.
683 (*dual_fma<mode>): Ditto.
684 (*single_fma<mode>): Ditto.
685 (*dual_fnma<mode>): Ditto.
686 (*dual_widen_fnma<mode>): Ditto.
687 (*single_fnma<mode>): Ditto.
688 (*single_widen_fnma<mode>): Ditto.
689 (*dual_fms<mode>): Ditto.
690 (*dual_widen_fms<mode>): Ditto.
691 (*single_fms<mode>): Ditto.
692 (*single_widen_fms<mode>): Ditto.
693 (*dual_fnms<mode>): Ditto.
694 (*dual_widen_fnms<mode>): Ditto.
695 (*single_fnms<mode>): Ditto.
696 (*single_widen_fnms<mode>): Ditto.
698 2023-09-20 Jakub Jelinek <jakub@redhat.com>
701 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
702 on vars or function decls if -fopenmp or -fopenmp-simd.
704 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
707 * config/riscv/autovec-opt.md: Add missed operand.
709 2023-09-20 Omar Sandoval <osandov@osandov.com>
712 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
713 dwarf_split_debug_info.
715 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
717 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
718 (vectorize_related_mode): Add VLS related modes.
719 * config/riscv/vector-iterators.md: Extend VLS modes.
721 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
723 PR rtl-optimization/110071
724 * ira-color.cc (improve_allocation): Consider cost of callee
727 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
728 Xi Ruoyao <xry111@xry111.site>
730 * configure: Regenerate.
731 * configure.ac: Checking assembler for -mno-relax support.
732 Disable relaxation when probing leb128 support.
734 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
736 * config.in: Regenerate.
737 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
738 mrelax. And set the initial value of explicit-relocs according to the
740 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
741 --no-relax option to the linker.
742 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
743 -mno-relax, pass the -mno-relax option to the assembler.
744 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
745 * config/loongarch/loongarch.opt: Regenerate.
746 * configure: Regenerate.
747 * configure.ac: Add detection of support for binutils relax function.
749 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
751 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
752 -fdeps-target= flags.
753 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
754 only -fdeps-format= is specified.
755 * json.h: Add a TODO item to refactor out to share with
758 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
759 Jason Merrill <jason@redhat.com>
761 * gcc.cc (join_spec_func): Add a spec function to join all
764 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
766 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
767 src_op_0 var to avoid rtl check error.
769 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
771 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
773 (operator_not_equal::fold_range): Handle VREL_EQ.
774 (operator_lt::fold_range): Remove special casing for VREL_EQ.
775 (operator_gt::fold_range): Same.
776 (foperator_unordered_equal::fold_range): Same.
778 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
780 * doc/extend.texi: Document attributes hot, cold on C++ types.
782 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
784 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
785 modulo instruction is disabled.
786 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
787 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
788 (define_expand umod<mode>3): New.
789 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
790 instruction is disabled.
791 (umodti3, modti3): Check if the modulo instruction is disabled.
793 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
795 * doc/gm2.texi (fdebug-builtins): Correct description.
797 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
799 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
800 * config/iq2000/iq2000.md (rotrsi3): Use it.
802 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
804 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
805 (operator_lt::op2_range): Same.
806 (operator_le::op1_range): Same.
807 (operator_le::op2_range): Same.
808 (operator_gt::op1_range): Same.
809 (operator_gt::op2_range): Same.
810 (operator_ge::op1_range): Same.
811 (operator_ge::op2_range): Same.
812 (foperator_unordered_lt::op1_range): Same.
813 (foperator_unordered_lt::op2_range): Same.
814 (foperator_unordered_le::op1_range): Same.
815 (foperator_unordered_le::op2_range): Same.
816 (foperator_unordered_gt::op1_range): Same.
817 (foperator_unordered_gt::op2_range): Same.
818 (foperator_unordered_ge::op1_range): Same.
819 (foperator_unordered_ge::op2_range): Same.
821 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
823 * value-range.h (frange::update_nan): New.
825 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
827 * range-op-float.cc (operator_not_equal::op2_range): New.
828 * range-op-mixed.h: Add operator_not_equal::op2_range.
830 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
832 PR tree-optimization/110080
833 PR tree-optimization/110249
834 * tree-vrp.cc (remove_unreachable::final_p): New.
835 (remove_unreachable::maybe_register): Rename from
836 maybe_register_block and call early or final routine.
837 (fully_replaceable): New.
838 (remove_unreachable::handle_early): New.
839 (remove_unreachable::remove_and_update_globals): Remove
840 non-final processing.
841 (rvrp_folder::rvrp_folder): Add final flag to constructor.
842 (rvrp_folder::post_fold_bb): Remove unreachable registration.
843 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
844 (execute_ranger_vrp): Adjust some call parameters.
846 2023-09-19 Richard Biener <rguenther@suse.de>
849 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
851 * tree-pretty-print.cc (op_symbol): Likewise.
852 (op_symbol_code): Print TDF_GIMPLE variant if requested.
853 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
855 (dump_gimple_cond): Likewise.
857 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
858 Pan Li <pan2.li@intel.com>
860 * tree-streamer.h (bp_unpack_machine_mode): If
861 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
863 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
865 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
867 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
869 * config/riscv/autovec.md: Extend VLS modes.
870 * config/riscv/vector.md: Ditto.
872 2023-09-19 Richard Biener <rguenther@suse.de>
874 PR tree-optimization/111465
875 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
876 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
878 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
880 * config/riscv/autovec.md: Extend VLS floating-point modes.
881 * config/riscv/vector.md: Ditto.
883 2023-09-19 Jakub Jelinek <jakub@redhat.com>
885 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
886 nor check type_has_mode_precision_p for width larger than [TD]Imode
888 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
889 to type. Use boolean_true_node instead of
890 constant_boolean_node (true, boolean_type_node). Formatting fixes.
892 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
894 * config/riscv/autovec.md: Add VLS modes.
895 * config/riscv/vector.md: Ditto.
897 2023-09-19 Jakub Jelinek <jakub@redhat.com>
899 * tree.cc (build_bitint_type): Assert precision is not 0, or
901 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
902 of unsigned _BitInt(1).
904 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
906 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
907 Removed old combine patterns.
908 (*single_<optab>mult_plus<mode>): Ditto.
909 (*double_<optab>mult_plus<mode>): Ditto.
910 (*sign_zero_extend_fma): Ditto.
911 (*zero_sign_extend_fma): Ditto.
912 (*double_widen_fma<mode>): Ditto.
913 (*single_widen_fma<mode>): Ditto.
914 (*double_widen_fnma<mode>): Ditto.
915 (*single_widen_fnma<mode>): Ditto.
916 (*double_widen_fms<mode>): Ditto.
917 (*single_widen_fms<mode>): Ditto.
918 (*double_widen_fnms<mode>): Ditto.
919 (*single_widen_fnms<mode>): Ditto.
920 (*reduc_plus_scal_<mode>): Adjust name.
921 (*widen_reduc_plus_scal_<mode>): Adjust name.
922 (*dual_widen_fma<mode>): New combine pattern.
923 (*dual_widen_fmasu<mode>): Ditto.
924 (*dual_widen_fmaus<mode>): Ditto.
925 (*dual_fma<mode>): Ditto.
926 (*single_fma<mode>): Ditto.
927 (*dual_fnma<mode>): Ditto.
928 (*single_fnma<mode>): Ditto.
929 (*dual_fms<mode>): Ditto.
930 (*single_fms<mode>): Ditto.
931 (*dual_fnms<mode>): Ditto.
932 (*single_fnms<mode>): Ditto.
933 * config/riscv/autovec.md (fma<mode>4):
934 Reafctor fma pattern.
935 (*fma<VI:mode><P:mode>): Removed.
936 (fnma<mode>4): Reafctor.
937 (*fnma<VI:mode><P:mode>): Removed.
938 (*fma<VF:mode><P:mode>): Removed.
939 (*fnma<VF:mode><P:mode>): Removed.
940 (fms<mode>4): Reafctor.
941 (*fms<VF:mode><P:mode>): Removed.
942 (fnms<mode>4): Reafctor.
943 (*fnms<VF:mode><P:mode>): Removed.
944 * config/riscv/riscv-protos.h (prepare_ternary_operands):
946 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
947 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
948 (*pred_mul_plus<mode>): Removed.
949 (*pred_mul_plus<mode>_scalar): Removed.
950 (*pred_mul_plus<mode>_extended_scalar): Removed.
951 (*pred_minus_mul<mode>_undef): New pattern.
952 (*pred_minus_mul<mode>): Removed.
953 (*pred_minus_mul<mode>_scalar): Removed.
954 (*pred_minus_mul<mode>_extended_scalar): Removed.
955 (*pred_mul_<optab><mode>_undef): New pattern.
956 (*pred_mul_<optab><mode>): Removed.
957 (*pred_mul_<optab><mode>_scalar): Removed.
958 (*pred_mul_neg_<optab><mode>_undef): New pattern.
959 (*pred_mul_neg_<optab><mode>): Removed.
960 (*pred_mul_neg_<optab><mode>_scalar): Removed.
962 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
964 * config/riscv/riscv-vector-builtins.cc
965 (builtin_decl, expand_builtin): Replace SVE with RVV.
967 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
969 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
970 riscv-cmo.def and riscv-scalar-crypto.def.
972 2023-09-18 Pan Li <pan2.li@intel.com>
974 * config/riscv/autovec.md: Extend to vls mode.
976 2023-09-18 Pan Li <pan2.li@intel.com>
978 * config/riscv/autovec.md: Bugfix.
979 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
981 2023-09-18 Andrew Pinski <apinski@marvell.com>
983 PR tree-optimization/111442
984 * match.pd (zero_one_valued_p): Have the bit_and match not be
987 2023-09-18 Andrew Pinski <apinski@marvell.com>
989 PR tree-optimization/111435
990 * match.pd (zero_one_valued_p): Don't do recursion
993 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
995 * config/darwin-protos.h (enum darwin_external_toolchain): New.
996 * config/darwin.cc (DSYMUTIL_VERSION): New.
997 (darwin_override_options): Choose the default debug DWARF version
998 depending on the configured dsymutil version.
1000 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
1002 * configure: Regenerate.
1003 * configure.ac: Handle explict disable of stdlib option, set
1004 defaults for Darwin.
1006 2023-09-18 Andrew Pinski <apinski@marvell.com>
1008 PR tree-optimization/111431
1009 * match.pd (`(a == CST) & a`): New pattern.
1011 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1013 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
1014 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
1016 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
1019 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
1020 Add support for immediates using shifted ORR/BIC.
1021 (aarch64_split_dimode_const_store): Apply if we save one instruction.
1022 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
1023 Make pattern global.
1025 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
1027 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
1028 (neoverse-v1): Place before zeus.
1029 (neoverse-v2): Place before demeter.
1030 * config/aarch64/aarch64-tune.md: Regenerate.
1032 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1034 * config/riscv/autovec.md: Add VLS modes.
1035 * config/riscv/vector-iterators.md: Ditto.
1036 * config/riscv/vector.md: Ditto.
1038 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1040 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
1041 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
1043 2023-09-18 Richard Biener <rguenther@suse.de>
1045 PR tree-optimization/111294
1046 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
1048 (back_threader::find_paths_to_names): Adjust.
1049 (back_threader::maybe_thread_block): Likewise.
1050 (back_threader_profitability::possibly_profitable_path_p): Remove
1051 code applying extra costs to copies PHIs.
1053 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1055 * config/riscv/autovec.md: Extend VLS modes.
1056 * config/riscv/vector.md: Ditto.
1058 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1060 * config/riscv/vector.md (mov<mode>): New pattern.
1061 (*mov<mode>_mem_to_mem): Ditto.
1062 (*mov<mode>): Ditto.
1063 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
1064 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
1065 (*mov<mode>_vls): Ditto.
1066 (movmisalign<mode>): Ditto.
1067 (@vec_duplicate<mode>): Ditto.
1068 * config/riscv/autovec-vls.md: Removed.
1070 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1073 * config/riscv/autovec.md: Add VLS modes.
1075 2023-09-18 Jason Merrill <jason@redhat.com>
1077 * doc/gty.texi: Add discussion of cache vs. deletable.
1079 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1081 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
1082 (copysign<mode>3): Ditto.
1083 (xorsign<mode>3): Ditto.
1084 (<optab><mode>2): Ditto.
1085 * config/riscv/autovec.md: Extend VLS modes.
1087 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
1089 PR middle-end/111303
1090 * match.pd ((t * 2) / 2): Update pattern.
1092 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
1094 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
1096 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1099 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
1100 (vec_extract<mode><vel>): Ditto.
1101 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
1102 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
1103 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
1105 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
1107 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
1108 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
1109 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
1110 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
1111 new insn/expansions.
1112 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
1113 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
1114 (*riscv_<sha256_op>_si): New raw instruction for RV32.
1115 (*riscv_<sm3_op>_si): Ditto.
1116 (*riscv_<sm4_op>_si): Ditto.
1117 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
1118 (riscv_<sm3_op>_di_extended): Ditto.
1119 (riscv_<sm4_op>_di_extended): Ditto.
1120 (riscv_<sha256_op>_si): New common instruction expansion.
1121 (riscv_<sm3_op>_si): Ditto.
1122 (riscv_<sm4_op>_si): Ditto.
1123 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
1124 "crypto_zksh" and "crypto_zksed". Remove availability
1125 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
1126 * config/riscv/riscv-ftypes.def: Remove unused function type.
1127 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
1128 intrinsics to operate on uint32_t.
1130 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
1132 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
1133 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
1134 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
1135 Removed as no longer used.
1136 (RISCV_ATYPE_UDI): New for uint64_t.
1137 * config/riscv/riscv-cmo.def: Make types unsigned for not working
1138 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
1139 argument/return types.
1140 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
1141 number and shift amount types unsigned.
1142 * config/riscv/riscv-scalar-crypto.def: Ditto.
1144 2023-09-16 Pan Li <pan2.li@intel.com>
1146 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
1148 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
1150 * config/riscv/predicates.md: Restrict predicate
1151 to allow 'reg' only.
1153 2023-09-15 Andrew Pinski <apinski@marvell.com>
1155 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
1156 Also match `a & zero_one_valued_p` too.
1158 2023-09-15 Andrew Pinski <apinski@marvell.com>
1160 PR tree-optimization/111414
1161 * match.pd (`(1 >> X) != 0`): Check to see if
1162 the integer_onep was an integral type (not a vector type).
1164 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
1166 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
1167 run phi analysis, and do it before loop analysis.
1169 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
1171 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
1174 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
1176 PR tree-optimization/111407
1177 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
1178 when one of the operands is subject to abnormal coalescing.
1180 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
1182 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
1183 (enum insn_type): Ditto.
1184 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
1185 (emit_vlmax_insn): Adjust.
1186 (emit_nonvlmax_insn): Adjust.
1187 (emit_vlmax_insn_lra): Adjust.
1189 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
1191 * config/riscv/autovec-opt.md: Adjust.
1192 * config/riscv/autovec.md: Ditto.
1193 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
1194 (expand_reduction): Adjust expand_reduction prototype.
1195 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
1196 (expand_reduction): Refactor expand_reduction.
1198 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
1201 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
1202 the lower memory access to a mem-pair operand.
1204 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
1206 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
1207 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
1208 before the driver canonicalization routines.
1209 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
1210 to loongarch-driver.h
1211 * config/loongarch/t-linux: Move multilib-related definitions to
1213 * config/loongarch/t-multilib: New file. Inject library build
1214 options obtained from --with-multilib-list.
1215 * config/loongarch/t-loongarch: Same.
1217 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
1220 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
1221 New combine pattern.
1222 (*fold_left_widen_plus_<mode>): Ditto.
1223 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
1224 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
1225 Change from define_expand to define_insn_and_split.
1226 (fold_left_plus_<mode>): Ditto.
1227 (mask_len_fold_left_plus_<mode>): Ditto.
1228 * config/riscv/riscv-v.cc (expand_reduction):
1229 Support widen reduction.
1230 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
1231 Add new iterators and attrs.
1233 2023-09-14 David Malcolm <dmalcolm@redhat.com>
1235 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
1236 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
1237 (sarif_thread_flow::sarif_thread_flow): New.
1238 (sarif_builder::make_code_flow_object): Reimplement, creating
1239 per-thread threadFlow objects, populating them with the relevant
1241 (sarif_builder::make_thread_flow_object): Delete, moving the
1242 code into sarif_builder::make_code_flow_object.
1243 (sarif_builder::make_thread_flow_location_object): Add
1244 "path_event_idx" param. Use it to set "executionOrder"
1246 * diagnostic-path.h (diagnostic_event::get_thread_id): New
1248 (class diagnostic_thread): New.
1249 (diagnostic_path::num_threads): New pure-virtual vfunc.
1250 (diagnostic_path::get_thread): New pure-virtual vfunc.
1251 (diagnostic_path::multithreaded_p): New decl.
1252 (simple_diagnostic_event::simple_diagnostic_event): Add optional
1254 (simple_diagnostic_event::get_thread_id): New accessor.
1255 (simple_diagnostic_event::m_thread_id): New.
1256 (class simple_diagnostic_thread): New.
1257 (simple_diagnostic_path::simple_diagnostic_path): Move definition
1259 (simple_diagnostic_path::num_threads): New.
1260 (simple_diagnostic_path::get_thread): New.
1261 (simple_diagnostic_path::add_thread): New.
1262 (simple_diagnostic_path::add_thread_event): New.
1263 (simple_diagnostic_path::m_threads): New.
1264 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
1265 param for overriding the context's printer.
1266 (diagnostic_show_locus): Likwise.
1267 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
1268 Move here from diagnostic-path.h. Add main thread.
1269 (simple_diagnostic_path::num_threads): New.
1270 (simple_diagnostic_path::get_thread): New.
1271 (simple_diagnostic_path::add_thread): New.
1272 (simple_diagnostic_path::add_thread_event): New.
1273 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
1274 param and use it to initialize m_thread_id. Reformat.
1275 * diagnostic.h: Add pretty_printer param for overriding the
1277 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
1278 (can_consolidate_events): Compare thread ids.
1279 (class per_thread_summary): New.
1280 (event_range::event_range): Add per_thread_summary arg.
1281 (event_range::print): Add "pp" param and use it rather than dc's
1283 (event_range::m_thread_id): New field.
1284 (event_range::m_per_thread_summary): New field.
1285 (path_summary::multithreaded_p): New.
1286 (path_summary::get_events_for_thread_id): New.
1287 (path_summary::m_per_thread_summary): New field.
1288 (path_summary::m_thread_id_to_events): New field.
1289 (path_summary::get_or_create_events_for_thread_id): New.
1290 (path_summary::path_summary): Create per_thread_summary instances
1291 as needed and associate the event_range instances with them.
1292 (base_indent): Move here from print_path_summary_as_text.
1293 (per_frame_indent): Likewise.
1294 (class thread_event_printer): New, adapted from parts of
1295 print_path_summary_as_text.
1296 (print_path_summary_as_text): Make static. Reimplement to
1297 moving most of existing code to class thread_event_printer,
1298 capturing state as per-thread as appropriate.
1299 (default_tree_diagnostic_path_printer): Add missing 'break' on
1302 2023-09-14 David Malcolm <dmalcolm@redhat.com>
1304 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
1305 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
1306 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
1307 clearing the deletable gcc_root_tab_t.
1308 (ggc_common_finalize): New.
1309 * ggc.h (ggc_common_finalize): New decl.
1310 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
1311 ggc_common_finalize.
1313 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
1315 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
1316 unsigned comparisons.
1317 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
1318 generation of salt/saltu instructions.
1319 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
1320 * config/xtensa/xtensa.md (salt, saltu): New instruction
1323 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
1325 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
1328 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
1330 * config/riscv/autovec.md: Change rtx code to unspec.
1331 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
1332 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
1333 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
1335 (class widen_freducop): Removed.
1336 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
1337 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
1338 (@pred_<reduc_op><mode>): New name.
1339 (@pred_widen_reduc_plus<v_su><mode>): Change name.
1340 (@pred_reduc_plus<order><mode>): Change name.
1341 (@pred_widen_reduc_plus<order><mode>): Change name.
1343 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
1345 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
1346 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
1347 * config/riscv/vector-iterators.md: New iterators and attrs.
1348 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
1350 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
1351 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
1352 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
1353 (@pred_reduc_<reduc><mode>): Added.
1354 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
1355 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
1356 (@pred_widen_reduc_plus<v_su><mode>): Added.
1357 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
1358 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
1359 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
1360 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
1361 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
1362 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
1363 (@pred_reduc_plus<order><mode>): Added.
1364 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
1365 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
1366 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
1367 (@pred_widen_reduc_plus<order><mode>): Added.
1369 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
1371 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
1372 Move WHILELO handling to...
1373 (aarch64_vector_costs::finish_cost): ...here. Check whether the
1374 vectorizer has decided to use a predicated loop.
1376 2023-09-14 Andrew Pinski <apinski@marvell.com>
1378 PR tree-optimization/106164
1379 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
1380 Expand to support constants that are off by one.
1382 2023-09-14 Andrew Pinski <apinski@marvell.com>
1384 * genmatch.cc (parser::parse_result): For an else clause
1385 of an if statement inside a switch, error out explictly.
1387 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1389 * config/riscv/autovec-opt.md: Add VLS mask modes.
1390 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
1391 (vcond_mask_<mode><vm>): Add VLS mask modes.
1392 * config/riscv/vector.md: Ditto.
1394 2023-09-14 Richard Biener <rguenther@suse.de>
1396 PR tree-optimization/111294
1397 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
1398 operands that eventually become dead and use simple_dce_from_worklist
1399 to remove their definitions if they did so.
1401 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
1403 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
1404 Accept all nonimmediate_operands, but keep the existing constraints.
1405 If the instruction is split before RA, load invalid addresses into
1406 a temporary register.
1407 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
1409 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1412 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
1413 (vector_insn_info::global_merge): Ditto.
1414 (vector_insn_info::get_avl_or_vl_reg): Ditto.
1416 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1418 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
1420 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
1422 * config/loongarch/loongarch-def.c: Modify the default value of
1425 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
1427 * config/xtensa/xtensa.cc (xtensa_expand_scc):
1428 Revert the changes from the last patch, as the work in the RTL
1429 expansion pass is too far to determine the physical registers.
1430 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
1431 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
1433 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
1436 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
1438 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1440 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
1441 (@vec_extract<mode><vel>): Ditto.
1442 * config/riscv/vector.md: Ditto
1444 2023-09-13 Andrew Pinski <apinski@marvell.com>
1446 * match.pd (`X <= MAX(X, Y)`):
1447 Move before `MIN (X, C1) < C2` pattern.
1449 2023-09-13 Andrew Pinski <apinski@marvell.com>
1451 PR tree-optimization/111364
1452 * match.pd (`MIN (X, Y) == X`): Extend
1453 to min/lt, min/ge, max/gt, max/le.
1455 2023-09-13 Andrew Pinski <apinski@marvell.com>
1457 PR tree-optimization/111345
1458 * match.pd (`Y > (X % Y)`): Merge
1460 (`(X % Y) < Y`): Pattern by adding `:c`
1463 2023-09-13 Richard Biener <rguenther@suse.de>
1465 PR tree-optimization/111387
1466 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
1467 EDGE_DFS_BACK when doing BB vectorization.
1468 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
1469 to compute RPO and mark backedges.
1471 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1473 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
1474 New combine pattern.
1475 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
1476 (<mulh_table><mode>3_highpart): Merged pattern.
1477 (umul<mode>3_highpart): Mrege smul and umul.
1478 * config/riscv/vector-iterators.md (umul): New iterators.
1479 (UNSPEC_VMULHU): New iterators.
1481 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1483 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
1484 New combine pattern.
1485 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
1487 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1489 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
1490 (*cond_copysign<mode>): New combine pattern.
1491 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
1493 2023-09-13 Richard Biener <rguenther@suse.de>
1495 PR tree-optimization/111397
1496 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
1497 argument to specify whether the PHI destination doesn't flow in
1498 from an abnormal PHI.
1499 (propagate_value): Adjust.
1500 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
1502 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
1504 (process_bb): Likewise.
1506 2023-09-13 Pan Li <pan2.li@intel.com>
1509 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
1511 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
1513 PR tree-optimization/111303
1514 * match.pd ((X - N * M) / N): Add undefined_p checking.
1515 ((X + N * M) / N): Likewise.
1516 ((X + C) div_rshift N): Likewise.
1518 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1521 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
1523 2023-09-12 Martin Jambor <mjambor@suse.cz>
1525 * dbgcnt.def (form_fma): New.
1526 * tree-ssa-math-opts.cc: Include dbgcnt.h.
1527 (convert_mult_to_fma): Bail out if the debug counter say so.
1529 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
1531 * config/riscv/autovec-opt.md: Update type
1532 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
1534 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1536 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
1538 (aarch64_layout_frame): Use it to decide whether locals should
1539 go above or below the saved registers.
1540 (aarch64_expand_prologue): Update stack layout comment.
1541 Emit a stack tie after the final adjustment.
1543 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1545 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
1546 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
1547 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
1549 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1551 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
1552 (aarch64_frame::hard_fp_save_and_probe): New fields.
1553 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
1554 Rather than asserting that a leaf function saves LR, instead assert
1555 that a leaf function saves something.
1556 (aarch64_get_separate_components): Prevent the chosen probe
1557 registers from being individually shrink-wrapped.
1558 (aarch64_allocate_and_probe_stack_space): Remove workaround for
1559 probe registers that aren't at the bottom of the previous allocation.
1561 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1563 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
1564 Always probe the residual allocation at offset 1024, asserting
1565 that that is in range.
1567 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1569 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
1570 the LR save slot is in the first 16 bytes of the register save area.
1571 Only form STP/LDP push/pop candidates if both registers are valid.
1572 (aarch64_allocate_and_probe_stack_space): Remove workaround for
1573 when LR was not in the first 16 bytes.
1575 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1577 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
1578 Don't probe final allocations that are exactly 1KiB in size (after
1579 unprobed space above the final allocation has been deducted).
1581 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1583 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
1584 calculation of initial_adjust for frames in which all saves
1587 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1589 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
1590 the allocation of the top of the frame.
1592 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1594 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
1596 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
1597 from the bottom of the frame, rather than the bottom of the saved
1598 register area. Measure reg_offset from the bottom of the frame
1599 rather than the bottom of the saved register area.
1600 (aarch64_save_callee_saves): Update accordingly.
1601 (aarch64_restore_callee_saves): Likewise.
1602 (aarch64_get_separate_components): Likewise.
1603 (aarch64_process_components): Likewise.
1605 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1607 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
1609 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1611 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
1613 (aarch64_frame::bytes_above_hard_fp): ...this.
1614 * config/aarch64/aarch64.cc (aarch64_layout_frame)
1615 (aarch64_expand_prologue): Update accordingly.
1616 (aarch64_initial_elimination_offset): Likewise.
1618 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1620 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
1621 (aarch64_frame::bytes_above_locals): ...this.
1622 * config/aarch64/aarch64.cc (aarch64_layout_frame)
1623 (aarch64_initial_elimination_offset): Update accordingly.
1625 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1627 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
1628 calculation of chain_offset into the emit_frame_chain block.
1630 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1632 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
1633 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
1634 callee_offset handling.
1635 (aarch64_save_callee_saves): Replace the start_offset parameter
1636 with a bytes_below_sp parameter.
1637 (aarch64_restore_callee_saves): Likewise.
1638 (aarch64_expand_prologue): Update accordingly.
1639 (aarch64_expand_epilogue): Likewise.
1641 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1643 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
1645 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
1646 (aarch64_expand_epilogue): Use it instead of
1647 below_hard_fp_saved_regs_size.
1649 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1651 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
1653 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
1654 and use it instead of crtl->outgoing_args_size.
1655 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
1656 of outgoing_args_size.
1657 (aarch64_process_components): Likewise.
1659 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1661 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
1662 allocate the frame in one go if there are no saved registers.
1664 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1666 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
1667 chain_offset rather than callee_offset.
1669 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1671 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
1672 a local shorthand for cfun->machine->frame.
1673 (aarch64_restore_callee_saves, aarch64_get_separate_components):
1674 (aarch64_process_components): Likewise.
1675 (aarch64_allocate_and_probe_stack_space): Likewise.
1676 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
1677 (aarch64_layout_frame): Use existing shorthand for one more case.
1679 2023-09-12 Andrew Pinski <apinski@marvell.com>
1681 PR tree-optimization/107881
1682 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
1683 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
1685 2023-09-12 Pan Li <pan2.li@intel.com>
1687 * config/riscv/riscv-vector-costs.h (struct range): Removed.
1689 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1691 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
1692 (compute_nregs_for_mode): Ditto.
1693 (live_range_conflict_p): Ditto.
1694 (max_number_of_live_regs): Ditto.
1695 (compute_lmul): Ditto.
1696 (costs::prefer_new_lmul_p): Ditto.
1697 (costs::better_main_loop_than_p): Ditto.
1698 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
1699 (struct var_live_range): Ditto.
1700 (struct autovec_info): Ditto.
1701 * config/riscv/t-riscv: Update makefile for COST model.
1703 2023-09-12 Jakub Jelinek <jakub@redhat.com>
1705 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
1708 2023-09-12 Jakub Jelinek <jakub@redhat.com>
1710 PR middle-end/111338
1711 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
1713 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
1714 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
1715 optimization if type's precision is too large for
1716 vn_walk_cb_data::bufsize.
1718 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
1720 * doc/gm2.texi (Compiler options): Document new option
1723 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1725 * doc/sourcebuild.texi (stack_size): Update.
1727 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
1729 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
1730 (<optab>_not<mode>3): Likewise.
1731 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
1733 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
1735 (GEN_EMIT_HELPER2): Likewise.
1736 (emit_strcmp_scalar_compare_byte): New function.
1737 (emit_strcmp_scalar_compare_subword): Likewise.
1738 (emit_strcmp_scalar_compare_word): Likewise.
1739 (emit_strcmp_scalar_load_and_compare): Likewise.
1740 (emit_strcmp_scalar_call_to_libc): Likewise.
1741 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
1742 (emit_strcmp_scalar_result_calculation): Likewise.
1743 (riscv_expand_strcmp_scalar): Likewise.
1744 (riscv_expand_strcmp): Likewise.
1745 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
1747 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
1748 (cmpstrnsi): Invoke expansion function for str(n)cmp.
1749 (cmpstrsi): Likewise.
1750 * config/riscv/riscv.opt: Add new parameter
1751 '-mstring-compare-inline-limit'.
1752 * doc/invoke.texi: Document new parameter
1753 '-mstring-compare-inline-limit'.
1755 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
1757 * config.gcc: Add new object riscv-string.o.
1759 * config/riscv/riscv-protos.h (riscv_expand_strlen):
1761 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
1762 * config/riscv/riscv.opt: New flag 'minline-strlen'.
1763 * config/riscv/t-riscv: Add new object riscv-string.o.
1764 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
1765 (th_rev<mode>2): Likewise.
1766 (th_tstnbz<mode>2): New INSN.
1767 * doc/invoke.texi: Document '-minline-strlen'.
1768 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
1769 (emit_unlikely_jump_insn): Likewise.
1770 * rtl.h (emit_likely_jump_insn): New prototype.
1771 (emit_unlikely_jump_insn): Likewise.
1772 * config/riscv/riscv-string.cc: New file.
1774 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1776 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
1777 (TARGET_SUPPORTS_ALIASES): Define.
1779 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1781 * doc/sourcebuild.texi (check-function-bodies): Update.
1783 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
1785 * gimplify.cc (gimplify_bind_expr): Check for
1786 insertion after variable cleanup. Convert 'omp allocate'
1787 var-decl attribute to GOMP_alloc/GOMP_free calls.
1789 2023-09-12 xuli <xuli1@eswincomputing.com>
1791 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
1792 parameter e and replace NULL_RTX with gcc_unreachable.
1794 2023-09-12 xuli <xuli1@eswincomputing.com>
1796 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
1798 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1799 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
1800 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
1802 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
1803 * config/riscv/riscv-vector-builtins.cc: Add args type.
1805 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
1807 * config/riscv/riscv.cc
1808 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
1809 riscv_avoid_shrink_wrapping_separate.
1810 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
1812 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
1814 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
1816 * shrink-wrap.cc (try_shrink_wrapping_separate):call
1817 use_shrink_wrapping_separate.
1818 (use_shrink_wrapping_separate): wrap the condition
1819 check in use_shrink_wrapping_separate.
1820 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
1822 2023-09-11 Andrew Pinski <apinski@marvell.com>
1824 PR tree-optimization/111348
1825 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
1826 the cmp part of the pattern.
1828 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
1831 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
1832 Call output_addr_const for CASE_CONST_SCALAR_INT.
1834 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1836 * config/riscv/thead.md: Update types
1838 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1840 * config/riscv/riscv.md: Update types
1842 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1844 * config/riscv/riscv.md: Add "zicond" type
1845 * config/riscv/zicond.md: Update types
1847 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1849 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
1850 * config/riscv/zc.md: Update types
1852 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1854 * config/riscv/autovec-opt.md: Update types
1855 * config/riscv/autovec.md: likewise
1857 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1859 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
1861 (s390_vec_unsigned_flt): Ditto.
1862 (s390_vec_revb_flt): Ditto.
1863 (s390_vec_reve_flt): Ditto.
1864 (s390_vclfnhs): Fix operand flags.
1865 (s390_vclfnls): Ditto.
1866 (s390_vcrnfs): Ditto.
1870 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1872 * config/s390/s390-builtins.def (O_U64): New.
1877 (O_M12): Change bit position.
1888 (OB_DEF_VAR): Add operand constraints.
1890 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
1893 2023-09-11 Andrew Pinski <apinski@marvell.com>
1895 PR tree-optimization/111349
1896 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
1897 the cmp part of the pattern.
1899 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1902 * config/riscv/riscv.opt: Set default as scalable vectorization.
1904 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1906 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
1907 (get_all_successors): Ditto.
1908 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
1909 (get_all_successors): Ditto.
1911 2023-09-11 Jakub Jelinek <jakub@redhat.com>
1913 PR middle-end/111329
1914 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
1915 function. For printing values which don't fit into digit_buffer
1916 use out-of-line function.
1917 * wide-int-print.h (pp_wide_int_large): Declare.
1918 * wide-int-print.cc: Include pretty-print.h.
1919 (pp_wide_int_large): Define.
1921 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1923 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
1924 Use dominance analysis.
1925 (pass_vsetvl::init): Ditto.
1926 (pass_vsetvl::done): Ditto.
1928 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1931 * config/riscv/autovec.md: Add VLS modes.
1932 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
1933 (cmp_lmul_gt_one): Ditto.
1934 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
1935 (cmp_lmul_gt_one): Ditto.
1936 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
1937 (riscv_vectorize_vec_perm_const): Ditto.
1938 * config/riscv/vector-iterators.md: Ditto.
1939 * config/riscv/vector.md: Ditto.
1941 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1943 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
1944 * config/riscv/vector-iterators.md: New iterator
1946 2023-09-11 Andrew Pinski <apinski@marvell.com>
1948 PR tree-optimization/111346
1949 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
1952 2023-09-11 liuhongt <hongtao.liu@intel.com>
1956 * config/i386/sse.md (int_comm): New int_attr.
1957 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
1958 Remove % for Complex conjugate operations since they're not
1960 (fma_<complexpairopname>_<mode>_pair): Ditto.
1961 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
1962 (cmul<conj_op><mode>3): Ditto.
1964 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1966 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
1967 fixed-vlmax/vls vector permutation.
1969 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1971 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
1973 2023-09-10 Andrew Pinski <apinski@marvell.com>
1975 PR tree-optimization/111331
1976 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
1977 Fix the LE/GE comparison to the correct value.
1978 * tree-ssa-phiopt.cc (minmax_replacement):
1979 Fix the LE/GE comparison for the
1980 `(a CMP CST1) ? max<a,CST2> : a` optimization.
1982 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
1984 * config/darwin.cc (darwin_function_section): Place unlikely
1985 executed global init code into the standard cold section.
1987 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1990 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
1991 (pass_vsetvl::pre_vsetvl): Ditto.
1992 (pass_vsetvl::init): Ditto.
1993 (pass_vsetvl::lazy_vsetvl): Ditto.
1995 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
1997 * config/loongarch/loongarch.md (mulsidi3_64bit):
1998 Field unsigned extension support.
1999 (<u>muldi3_highpart): Modify template name.
2000 (<u>mulsi3_highpart): Likewise.
2001 (<u>mulsidi3_64bit): Field unsigned extension support.
2002 (<su>muldi3_highpart): Modify muldi3_highpart to
2004 (<su>mulsi3_highpart): Modify mulsi3_highpart to
2007 2023-09-09 Xi Ruoyao <xry111@xry111.site>
2009 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
2010 Check precondition (delta must be a power of 2) and use
2011 popcount_hwi instead of a homebrew loop.
2013 2023-09-09 Xi Ruoyao <xry111@xry111.site>
2015 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
2016 Define to the maximum amount of bytes able to be loaded or
2017 stored with one machine instruction.
2018 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
2019 New static function.
2020 (loongarch_block_move_straight): Call
2021 loongarch_mode_for_move_size for machine_mode to be moved.
2022 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
2023 instead of UNITS_PER_WORD.
2025 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2027 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
2029 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
2031 * fold-const.cc (can_min_p): New function.
2032 (poly_int_binop): Try fold MIN_EXPR.
2034 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
2036 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
2037 case VREL_EQ nor call frelop_early_resolve.
2039 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
2041 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
2043 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
2044 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
2046 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
2048 * config/riscv/thead.md: Use more appropriate mode attributes
2051 2023-09-08 Guo Jie <guojie@loongson.cn>
2053 * common/config/loongarch/loongarch-common.cc:
2054 (default_options loongarch_option_optimization_table):
2055 Default to -fsched-pressure.
2057 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
2059 * config.gcc: remove non-POSIX syntax "<<<".
2061 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
2063 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
2064 Rename postfix to _bitmanip.
2065 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
2066 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
2068 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2070 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
2072 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2074 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
2076 2023-09-07 liuhongt <hongtao.liu@intel.com>
2078 * config/i386/sse.md
2079 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
2080 (VHFBF_AVX512VL): New mode iterator.
2081 (VI2HFBF_AVX512VL): New mode iterator.
2083 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
2085 * value-range.h (contains_zero_p): Return false for undefined ranges.
2086 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
2087 contains_zero_p change above.
2088 (operator_ge::op1_op2_relation): Same.
2089 (operator_equal::op1_op2_relation): Same.
2090 (operator_not_equal::op1_op2_relation): Same.
2091 (operator_lt::op1_op2_relation): Same.
2092 (operator_le::op1_op2_relation): Same.
2093 (operator_ge::op1_op2_relation): Same.
2094 * range-op.cc (operator_equal::op1_op2_relation): Same.
2095 (operator_not_equal::op1_op2_relation): Same.
2096 (operator_lt::op1_op2_relation): Same.
2097 (operator_le::op1_op2_relation): Same.
2098 (operator_cast::op1_range): Same.
2099 (set_nonzero_range_from_mask): Same.
2100 (operator_bitwise_xor::op1_range): Same.
2101 (operator_addr_expr::fold_range): Same.
2102 (operator_addr_expr::op1_range): Same.
2104 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
2106 PR tree-optimization/110875
2107 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
2108 cache-prefilling routine when the ssa-name has no global value.
2110 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
2113 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
2114 (process_alt_operands): Set up the flag. Clear flag for chosen
2115 alternative with special memory constraints.
2116 (process_alt_operands): Set up used insn alternative depending on the flag.
2118 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2120 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
2121 * config/riscv/riscv.md: Ditto.
2122 * config/riscv/vector-iterators.md: Ditto.
2123 * config/riscv/vector.md: Ditto.
2125 2023-09-07 David Malcolm <dmalcolm@redhat.com>
2127 * diagnostic-core.h (error_meta): New decl.
2128 * diagnostic.cc (error_meta): New.
2130 2023-09-07 Jakub Jelinek <jakub@redhat.com>
2133 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
2134 inside gcc_assert, as later code relies on it filling info variable.
2135 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
2136 clear_padding_type): Likewise.
2137 * varasm.cc (output_constant): Likewise.
2138 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
2139 * stor-layout.cc (finish_bitfield_representative, layout_type):
2141 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
2143 2023-09-07 Xi Ruoyao <xry111@xry111.site>
2146 * config/loongarch/loongarch-protos.h
2147 (loongarch_pre_reload_split): Declare new function.
2148 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
2149 * config/loongarch/loongarch.cc
2150 (loongarch_pre_reload_split): Implement.
2151 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
2152 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
2154 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
2155 New define_insn_and_split.
2156 (bstrins_<mode>_for_ior_mask): Likewise.
2157 (define_peephole2): Further optimize code sequence produced by
2158 bstrins_<mode>_for_ior_mask if possible.
2160 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
2162 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
2163 rather than gen_rtx_PLUS.
2165 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2168 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
2169 (pass_vsetvl::df_post_optimization): Remove incorrect function.
2171 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
2173 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
2174 Parse 'XVentanaCondOps' extension.
2175 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
2176 (TARGET_XVENTANACONDOPS): Ditto.
2177 (TARGET_ZICOND_LIKE): New to represent targets with conditional
2178 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
2179 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
2180 with TARGET_ZICOND_LIKE.
2181 (riscv_expand_conditional_move): Ditto.
2182 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
2184 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
2185 * config/riscv/zicond.md: Modify description.
2186 (eqz_ventana): New to match corresponding czero instructions.
2187 (nez_ventana): Ditto.
2188 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
2189 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
2190 (*czero.<eqz>.<GPR><X>): Ditto.
2191 (*czero.eqz.<GPR><X>.opt1): Ditto.
2192 (*czero.nez.<GPR><X>.opt2): Ditto.
2194 2023-09-06 Ian Lance Taylor <iant@golang.org>
2197 * godump.cc (go_format_type): Handle BITINT_TYPE.
2199 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2202 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
2205 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2208 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
2209 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
2210 rather than make_edge, initialize bb->count.
2212 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2215 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
2216 Document general rules for _BitInt support library functions
2217 and document __mulbitint3 and __divmodbitint4.
2218 (Conversion functions): Document __fix{s,d,x,t}fbitint,
2219 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
2220 __bid_floatbitint{s,d,t}d.
2222 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2225 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
2228 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2231 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
2232 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
2233 check if all padding bits up to mode precision are zeros or sign
2234 bit copies and if not, jump to DO_ERROR.
2235 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
2236 Adjust expand_ubsan_result_store callers.
2237 * ubsan.cc: Include target.h and langhooks.h.
2238 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
2239 size converted to pointer sized integer, pass BITINT_TYPE values
2240 which fit into TImode (if supported) or DImode as those integer types
2241 or otherwise for now punt (pass 0).
2242 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
2243 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
2244 TImode/DImode precision rather than TK_Unknown used otherwise for
2245 large/huge BITINT_TYPEs.
2246 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
2247 they don't have mode precision.
2248 * ubsan.h (enum ubsan_print_style): New enumerator.
2250 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2253 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
2254 (ix86_bitint_type_info): New function.
2255 (TARGET_C_BITINT_TYPE_INFO): Redefine.
2257 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2260 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
2261 * passes.def: Add pass_lower_bitint after pass_lower_complex and
2262 pass_lower_bitint_O0 after pass_lower_complex_O0.
2263 * tree-pass.h (PROP_gimple_lbitint): Define.
2264 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
2265 * gimple-lower-bitint.h: New file.
2266 * tree-ssa-live.h (struct _var_map): Add bitint member.
2267 (init_var_map): Adjust declaration.
2268 (region_contains_p): Handle map->bitint like map->outofssa_p.
2269 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
2270 map->bitint and set map->outofssa_p to false if it is non-NULL.
2271 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
2272 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
2274 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
2275 not in that bitmap, and allow res without default def.
2276 (compute_optimized_partition_bases): In map->bitint mode try hard to
2277 coalesce any SSA_NAMEs with the same size.
2278 (coalesce_bitint): New function.
2279 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
2280 used_in_copies and call coalesce_bitint.
2281 * gimple-lower-bitint.cc: New file.
2283 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2286 * tree.def (BITINT_TYPE): New type.
2287 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
2288 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
2290 (BITINT_TYPE_P): Define.
2291 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
2292 they have BITINT_TYPE type.
2293 (tree_check6, tree_not_check6): New inline functions.
2294 (any_integral_type_check): Include BITINT_TYPE.
2295 (build_bitint_type): Declare.
2296 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
2297 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
2298 type_hash_canon): Handle BITINT_TYPE.
2299 (bitint_type_cache): New variable.
2300 (build_bitint_type): New function.
2301 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
2303 (tree_cc_finalize): Free bitint_type_cache.
2304 * builtins.cc (type_to_class): Handle BITINT_TYPE.
2305 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
2306 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
2308 * convert.cc (convert_to_pointer_1, convert_to_real_1,
2309 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
2310 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
2311 GET_MODE_PRECISION (TYPE_MODE (type)).
2312 * doc/generic.texi (BITINT_TYPE): Document.
2313 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
2314 * doc/tm.texi: Regenerated.
2315 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
2316 gen_type_die_with_usage): Handle BITINT_TYPE.
2317 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
2318 handle those which fit into shwi.
2319 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
2320 to bitfield precision reads from BITINT_TYPE vars, parameters or
2321 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
2323 * fold-const.cc (fold_convert_loc, make_range_step): Handle
2325 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
2326 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
2327 (native_encode_int, native_interpret_int, native_interpret_expr):
2329 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
2330 to some other integral type or vice versa conversions non-useless.
2331 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
2332 (clear_padding_unit): Mention in comment that _BitInt types don't need
2334 (clear_padding_bitint_needs_padding_p): New function.
2335 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
2336 (clear_padding_type): Likewise.
2337 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
2338 precision operands force pos_neg? to 1.
2339 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
2340 expand_BITINTTOFLOAT): New functions.
2341 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
2342 BITINTTOFLOAT): New internal functions.
2343 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
2344 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
2345 * match.pd (non-equality compare simplifications from fold_binary):
2346 Punt if TYPE_MODE (arg1_type) is BLKmode.
2347 * pretty-print.h (pp_wide_int): Handle printing of large precision
2348 wide_ints which would buffer overflow digit_buffer.
2349 * stor-layout.cc (finish_bitfield_representative): For bit-fields
2350 with BITINT_TYPE, prefer representatives with precisions in
2351 multiple of limb precision.
2352 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
2353 element type and assert it is BITINT_TYPE.
2354 * target.def (bitint_type_info): New C target hook.
2355 * target.h (struct bitint_info): New type.
2356 * targhooks.cc (default_bitint_type_info): New function.
2357 * targhooks.h (default_bitint_type_info): Declare.
2358 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
2359 Handle printing large wide_ints which would buffer overflow
2361 * tree-ssa-sccvn.cc: Include target.h.
2362 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
2364 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
2365 64-bit BITINT_TYPE subtract low bound from expression and cast to
2366 64-bit integer type both the controlling expression and case labels.
2367 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
2368 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
2369 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
2371 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
2372 unsigned_type_for rather than build_nonstandard_integer_type.
2374 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2377 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
2378 tieable for RVV modes.
2380 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2383 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
2385 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2387 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
2389 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
2391 * config/xtensa/xtensa.cc (xtensa_expand_scc):
2392 Add code for particular constants (only 0 and INT_MIN for now)
2393 for EQ/NE boolean evaluation in SImode.
2394 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
2395 implementation has been integrated into the above.
2397 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2400 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
2402 (*pred_widen_mulsu<mode>): Delete.
2403 (*pred_single_widen_mul<mode>): Delete.
2404 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
2405 Add new combine patterns.
2406 (*single_widen_sub<any_extend:su><mode>): Ditto.
2407 (*single_widen_add<any_extend:su><mode>): Ditto.
2408 (*single_widen_mult<any_extend:su><mode>): Ditto.
2409 (*dual_widen_mulsu<mode>): Ditto.
2410 (*dual_widen_mulus<mode>): Ditto.
2411 (*dual_widen_<optab><mode>): Ditto.
2412 (*single_widen_add<mode>): Ditto.
2413 (*single_widen_sub<mode>): Ditto.
2414 (*single_widen_mult<mode>): Ditto.
2415 * config/riscv/autovec.md (<optab><mode>3):
2416 Change define_expand to define_insn_and_split.
2417 (<optab><mode>2): Ditto.
2418 (abs<mode>2): Ditto.
2419 (smul<mode>3_highpart): Ditto.
2420 (umul<mode>3_highpart): Ditto.
2422 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2424 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
2425 (riscv_asm_output_alias): Ditto.
2426 (riscv_asm_output_external): Ditto.
2427 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
2428 Output .variant_cc directive for vector function.
2429 (riscv_declare_function_name): Ditto.
2430 (riscv_asm_output_alias): Ditto.
2431 (riscv_asm_output_external): Ditto.
2432 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
2433 Implement ASM_DECLARE_FUNCTION_NAME.
2434 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
2435 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
2437 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2439 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
2440 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
2441 (riscv_frame_info::reset): Reset new fileds.
2442 (riscv_call_tls_get_addr): Pass riscv_cc.
2443 (riscv_function_arg): Return riscv_cc for call patterm.
2444 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
2445 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
2446 (riscv_save_reg_p): Add vector callee-saved check.
2447 (riscv_stack_align): Add vector save area comment.
2448 (riscv_compute_frame_info): Ditto.
2449 (riscv_restore_reg): Update for type change.
2450 (riscv_for_each_saved_v_reg): New function save vector registers.
2451 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
2452 (riscv_expand_prologue): Ditto.
2453 (riscv_expand_epilogue): Ditto.
2454 (riscv_output_mi_thunk): Pass riscv_cc.
2455 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
2456 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
2457 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
2459 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2461 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
2462 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
2463 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
2464 (riscv_init_cumulative_args): Setup variant_cc field.
2465 (riscv_vector_type_p): New function for checking vector type.
2466 (riscv_hard_regno_nregs): Hoist declare.
2467 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
2468 (riscv_get_arg_info): Support vector cc.
2469 (riscv_function_arg_advance): Update cum.
2470 (riscv_pass_by_reference): Handle vector args.
2471 (riscv_v_abi): New function return vector abi.
2472 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
2473 (riscv_arguments_is_vector_type_p): New function for check vector returns.
2474 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
2475 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
2476 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
2477 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
2478 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
2479 (V_ARG_FIRST): Ditto.
2480 (V_ARG_LAST): Ditto.
2481 (enum riscv_cc): Define all RISCV_CC variants.
2482 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
2484 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2486 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
2487 Add sqrt + vcond_mask combine pattern.
2488 * config/riscv/autovec.md (<optab><mode>2):
2489 Change define_expand to define_insn_and_split.
2491 2023-09-06 Jason Merrill <jason@redhat.com>
2493 * common.opt: Update -fabi-version=19.
2495 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
2497 * config/riscv/zicond.md: Add closing parent to a comment.
2499 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
2501 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
2502 large constant cons/alt into a register.
2504 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
2506 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
2507 require one zero bit in the upper 32 bits for LI+RORI synthesis.
2509 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
2511 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
2513 2023-09-05 Andrew Pinski <apinski@marvell.com>
2515 PR tree-optimization/98710
2516 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
2517 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
2519 2023-09-05 Andrew Pinski <apinski@marvell.com>
2521 PR tree-optimization/103536
2522 * match.pd (`(x | y) & (x & z)`,
2523 `(x & y) | (x | z)`): New patterns.
2525 2023-09-05 Andrew Pinski <apinski@marvell.com>
2527 PR tree-optimization/107137
2528 * match.pd (`(nop_convert)-(convert)a`): New pattern.
2530 2023-09-05 Andrew Pinski <apinski@marvell.com>
2532 PR tree-optimization/96694
2533 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
2535 2023-09-05 Andrew Pinski <apinski@marvell.com>
2537 PR tree-optimization/105832
2538 * match.pd (`(1 >> X) != 0`): New pattern
2540 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
2542 * config/riscv/riscv.md: Update/Add types
2544 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
2546 * config/riscv/pic.md: Update types
2548 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
2550 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
2551 synthesis with rotate-right for XTheadBb.
2553 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
2555 * config/riscv/zicond.md: Fix op2 pattern.
2557 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
2559 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
2561 2023-09-05 Xi Ruoyao <xry111@xry111.site>
2563 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
2564 Define to 0 if not defined yet.
2566 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
2568 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
2569 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
2571 2023-09-05 Pan Li <pan2.li@intel.com>
2573 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
2574 * config/riscv/vector.md: Extend iterator for VLS.
2576 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2578 * config.gcc: Export the header file lasxintrin.h.
2579 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
2580 Add Loongson ASX builtin functions support.
2582 (LASX_BUILTIN): Ditto.
2583 (LASX_NO_TARGET_BUILTIN): Ditto.
2584 (LASX_BUILTIN_TEST_BRANCH): Ditto.
2585 (CODE_FOR_lasx_xvsadd_b): Ditto.
2586 (CODE_FOR_lasx_xvsadd_h): Ditto.
2587 (CODE_FOR_lasx_xvsadd_w): Ditto.
2588 (CODE_FOR_lasx_xvsadd_d): Ditto.
2589 (CODE_FOR_lasx_xvsadd_bu): Ditto.
2590 (CODE_FOR_lasx_xvsadd_hu): Ditto.
2591 (CODE_FOR_lasx_xvsadd_wu): Ditto.
2592 (CODE_FOR_lasx_xvsadd_du): Ditto.
2593 (CODE_FOR_lasx_xvadd_b): Ditto.
2594 (CODE_FOR_lasx_xvadd_h): Ditto.
2595 (CODE_FOR_lasx_xvadd_w): Ditto.
2596 (CODE_FOR_lasx_xvadd_d): Ditto.
2597 (CODE_FOR_lasx_xvaddi_bu): Ditto.
2598 (CODE_FOR_lasx_xvaddi_hu): Ditto.
2599 (CODE_FOR_lasx_xvaddi_wu): Ditto.
2600 (CODE_FOR_lasx_xvaddi_du): Ditto.
2601 (CODE_FOR_lasx_xvand_v): Ditto.
2602 (CODE_FOR_lasx_xvandi_b): Ditto.
2603 (CODE_FOR_lasx_xvbitsel_v): Ditto.
2604 (CODE_FOR_lasx_xvseqi_b): Ditto.
2605 (CODE_FOR_lasx_xvseqi_h): Ditto.
2606 (CODE_FOR_lasx_xvseqi_w): Ditto.
2607 (CODE_FOR_lasx_xvseqi_d): Ditto.
2608 (CODE_FOR_lasx_xvslti_b): Ditto.
2609 (CODE_FOR_lasx_xvslti_h): Ditto.
2610 (CODE_FOR_lasx_xvslti_w): Ditto.
2611 (CODE_FOR_lasx_xvslti_d): Ditto.
2612 (CODE_FOR_lasx_xvslti_bu): Ditto.
2613 (CODE_FOR_lasx_xvslti_hu): Ditto.
2614 (CODE_FOR_lasx_xvslti_wu): Ditto.
2615 (CODE_FOR_lasx_xvslti_du): Ditto.
2616 (CODE_FOR_lasx_xvslei_b): Ditto.
2617 (CODE_FOR_lasx_xvslei_h): Ditto.
2618 (CODE_FOR_lasx_xvslei_w): Ditto.
2619 (CODE_FOR_lasx_xvslei_d): Ditto.
2620 (CODE_FOR_lasx_xvslei_bu): Ditto.
2621 (CODE_FOR_lasx_xvslei_hu): Ditto.
2622 (CODE_FOR_lasx_xvslei_wu): Ditto.
2623 (CODE_FOR_lasx_xvslei_du): Ditto.
2624 (CODE_FOR_lasx_xvdiv_b): Ditto.
2625 (CODE_FOR_lasx_xvdiv_h): Ditto.
2626 (CODE_FOR_lasx_xvdiv_w): Ditto.
2627 (CODE_FOR_lasx_xvdiv_d): Ditto.
2628 (CODE_FOR_lasx_xvdiv_bu): Ditto.
2629 (CODE_FOR_lasx_xvdiv_hu): Ditto.
2630 (CODE_FOR_lasx_xvdiv_wu): Ditto.
2631 (CODE_FOR_lasx_xvdiv_du): Ditto.
2632 (CODE_FOR_lasx_xvfadd_s): Ditto.
2633 (CODE_FOR_lasx_xvfadd_d): Ditto.
2634 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
2635 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
2636 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
2637 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
2638 (CODE_FOR_lasx_xvffint_s_w): Ditto.
2639 (CODE_FOR_lasx_xvffint_d_l): Ditto.
2640 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
2641 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
2642 (CODE_FOR_lasx_xvfsub_s): Ditto.
2643 (CODE_FOR_lasx_xvfsub_d): Ditto.
2644 (CODE_FOR_lasx_xvfmul_s): Ditto.
2645 (CODE_FOR_lasx_xvfmul_d): Ditto.
2646 (CODE_FOR_lasx_xvfdiv_s): Ditto.
2647 (CODE_FOR_lasx_xvfdiv_d): Ditto.
2648 (CODE_FOR_lasx_xvfmax_s): Ditto.
2649 (CODE_FOR_lasx_xvfmax_d): Ditto.
2650 (CODE_FOR_lasx_xvfmin_s): Ditto.
2651 (CODE_FOR_lasx_xvfmin_d): Ditto.
2652 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
2653 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
2654 (CODE_FOR_lasx_xvflogb_s): Ditto.
2655 (CODE_FOR_lasx_xvflogb_d): Ditto.
2656 (CODE_FOR_lasx_xvmax_b): Ditto.
2657 (CODE_FOR_lasx_xvmax_h): Ditto.
2658 (CODE_FOR_lasx_xvmax_w): Ditto.
2659 (CODE_FOR_lasx_xvmax_d): Ditto.
2660 (CODE_FOR_lasx_xvmaxi_b): Ditto.
2661 (CODE_FOR_lasx_xvmaxi_h): Ditto.
2662 (CODE_FOR_lasx_xvmaxi_w): Ditto.
2663 (CODE_FOR_lasx_xvmaxi_d): Ditto.
2664 (CODE_FOR_lasx_xvmax_bu): Ditto.
2665 (CODE_FOR_lasx_xvmax_hu): Ditto.
2666 (CODE_FOR_lasx_xvmax_wu): Ditto.
2667 (CODE_FOR_lasx_xvmax_du): Ditto.
2668 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
2669 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
2670 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
2671 (CODE_FOR_lasx_xvmaxi_du): Ditto.
2672 (CODE_FOR_lasx_xvmin_b): Ditto.
2673 (CODE_FOR_lasx_xvmin_h): Ditto.
2674 (CODE_FOR_lasx_xvmin_w): Ditto.
2675 (CODE_FOR_lasx_xvmin_d): Ditto.
2676 (CODE_FOR_lasx_xvmini_b): Ditto.
2677 (CODE_FOR_lasx_xvmini_h): Ditto.
2678 (CODE_FOR_lasx_xvmini_w): Ditto.
2679 (CODE_FOR_lasx_xvmini_d): Ditto.
2680 (CODE_FOR_lasx_xvmin_bu): Ditto.
2681 (CODE_FOR_lasx_xvmin_hu): Ditto.
2682 (CODE_FOR_lasx_xvmin_wu): Ditto.
2683 (CODE_FOR_lasx_xvmin_du): Ditto.
2684 (CODE_FOR_lasx_xvmini_bu): Ditto.
2685 (CODE_FOR_lasx_xvmini_hu): Ditto.
2686 (CODE_FOR_lasx_xvmini_wu): Ditto.
2687 (CODE_FOR_lasx_xvmini_du): Ditto.
2688 (CODE_FOR_lasx_xvmod_b): Ditto.
2689 (CODE_FOR_lasx_xvmod_h): Ditto.
2690 (CODE_FOR_lasx_xvmod_w): Ditto.
2691 (CODE_FOR_lasx_xvmod_d): Ditto.
2692 (CODE_FOR_lasx_xvmod_bu): Ditto.
2693 (CODE_FOR_lasx_xvmod_hu): Ditto.
2694 (CODE_FOR_lasx_xvmod_wu): Ditto.
2695 (CODE_FOR_lasx_xvmod_du): Ditto.
2696 (CODE_FOR_lasx_xvmul_b): Ditto.
2697 (CODE_FOR_lasx_xvmul_h): Ditto.
2698 (CODE_FOR_lasx_xvmul_w): Ditto.
2699 (CODE_FOR_lasx_xvmul_d): Ditto.
2700 (CODE_FOR_lasx_xvclz_b): Ditto.
2701 (CODE_FOR_lasx_xvclz_h): Ditto.
2702 (CODE_FOR_lasx_xvclz_w): Ditto.
2703 (CODE_FOR_lasx_xvclz_d): Ditto.
2704 (CODE_FOR_lasx_xvnor_v): Ditto.
2705 (CODE_FOR_lasx_xvor_v): Ditto.
2706 (CODE_FOR_lasx_xvori_b): Ditto.
2707 (CODE_FOR_lasx_xvnori_b): Ditto.
2708 (CODE_FOR_lasx_xvpcnt_b): Ditto.
2709 (CODE_FOR_lasx_xvpcnt_h): Ditto.
2710 (CODE_FOR_lasx_xvpcnt_w): Ditto.
2711 (CODE_FOR_lasx_xvpcnt_d): Ditto.
2712 (CODE_FOR_lasx_xvxor_v): Ditto.
2713 (CODE_FOR_lasx_xvxori_b): Ditto.
2714 (CODE_FOR_lasx_xvsll_b): Ditto.
2715 (CODE_FOR_lasx_xvsll_h): Ditto.
2716 (CODE_FOR_lasx_xvsll_w): Ditto.
2717 (CODE_FOR_lasx_xvsll_d): Ditto.
2718 (CODE_FOR_lasx_xvslli_b): Ditto.
2719 (CODE_FOR_lasx_xvslli_h): Ditto.
2720 (CODE_FOR_lasx_xvslli_w): Ditto.
2721 (CODE_FOR_lasx_xvslli_d): Ditto.
2722 (CODE_FOR_lasx_xvsra_b): Ditto.
2723 (CODE_FOR_lasx_xvsra_h): Ditto.
2724 (CODE_FOR_lasx_xvsra_w): Ditto.
2725 (CODE_FOR_lasx_xvsra_d): Ditto.
2726 (CODE_FOR_lasx_xvsrai_b): Ditto.
2727 (CODE_FOR_lasx_xvsrai_h): Ditto.
2728 (CODE_FOR_lasx_xvsrai_w): Ditto.
2729 (CODE_FOR_lasx_xvsrai_d): Ditto.
2730 (CODE_FOR_lasx_xvsrl_b): Ditto.
2731 (CODE_FOR_lasx_xvsrl_h): Ditto.
2732 (CODE_FOR_lasx_xvsrl_w): Ditto.
2733 (CODE_FOR_lasx_xvsrl_d): Ditto.
2734 (CODE_FOR_lasx_xvsrli_b): Ditto.
2735 (CODE_FOR_lasx_xvsrli_h): Ditto.
2736 (CODE_FOR_lasx_xvsrli_w): Ditto.
2737 (CODE_FOR_lasx_xvsrli_d): Ditto.
2738 (CODE_FOR_lasx_xvsub_b): Ditto.
2739 (CODE_FOR_lasx_xvsub_h): Ditto.
2740 (CODE_FOR_lasx_xvsub_w): Ditto.
2741 (CODE_FOR_lasx_xvsub_d): Ditto.
2742 (CODE_FOR_lasx_xvsubi_bu): Ditto.
2743 (CODE_FOR_lasx_xvsubi_hu): Ditto.
2744 (CODE_FOR_lasx_xvsubi_wu): Ditto.
2745 (CODE_FOR_lasx_xvsubi_du): Ditto.
2746 (CODE_FOR_lasx_xvpackod_d): Ditto.
2747 (CODE_FOR_lasx_xvpackev_d): Ditto.
2748 (CODE_FOR_lasx_xvpickod_d): Ditto.
2749 (CODE_FOR_lasx_xvpickev_d): Ditto.
2750 (CODE_FOR_lasx_xvrepli_b): Ditto.
2751 (CODE_FOR_lasx_xvrepli_h): Ditto.
2752 (CODE_FOR_lasx_xvrepli_w): Ditto.
2753 (CODE_FOR_lasx_xvrepli_d): Ditto.
2754 (CODE_FOR_lasx_xvandn_v): Ditto.
2755 (CODE_FOR_lasx_xvorn_v): Ditto.
2756 (CODE_FOR_lasx_xvneg_b): Ditto.
2757 (CODE_FOR_lasx_xvneg_h): Ditto.
2758 (CODE_FOR_lasx_xvneg_w): Ditto.
2759 (CODE_FOR_lasx_xvneg_d): Ditto.
2760 (CODE_FOR_lasx_xvbsrl_v): Ditto.
2761 (CODE_FOR_lasx_xvbsll_v): Ditto.
2762 (CODE_FOR_lasx_xvfmadd_s): Ditto.
2763 (CODE_FOR_lasx_xvfmadd_d): Ditto.
2764 (CODE_FOR_lasx_xvfmsub_s): Ditto.
2765 (CODE_FOR_lasx_xvfmsub_d): Ditto.
2766 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
2767 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
2768 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
2769 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
2770 (CODE_FOR_lasx_xvpermi_q): Ditto.
2771 (CODE_FOR_lasx_xvpermi_d): Ditto.
2772 (CODE_FOR_lasx_xbnz_v): Ditto.
2773 (CODE_FOR_lasx_xbz_v): Ditto.
2774 (CODE_FOR_lasx_xvssub_b): Ditto.
2775 (CODE_FOR_lasx_xvssub_h): Ditto.
2776 (CODE_FOR_lasx_xvssub_w): Ditto.
2777 (CODE_FOR_lasx_xvssub_d): Ditto.
2778 (CODE_FOR_lasx_xvssub_bu): Ditto.
2779 (CODE_FOR_lasx_xvssub_hu): Ditto.
2780 (CODE_FOR_lasx_xvssub_wu): Ditto.
2781 (CODE_FOR_lasx_xvssub_du): Ditto.
2782 (CODE_FOR_lasx_xvabsd_b): Ditto.
2783 (CODE_FOR_lasx_xvabsd_h): Ditto.
2784 (CODE_FOR_lasx_xvabsd_w): Ditto.
2785 (CODE_FOR_lasx_xvabsd_d): Ditto.
2786 (CODE_FOR_lasx_xvabsd_bu): Ditto.
2787 (CODE_FOR_lasx_xvabsd_hu): Ditto.
2788 (CODE_FOR_lasx_xvabsd_wu): Ditto.
2789 (CODE_FOR_lasx_xvabsd_du): Ditto.
2790 (CODE_FOR_lasx_xvavg_b): Ditto.
2791 (CODE_FOR_lasx_xvavg_h): Ditto.
2792 (CODE_FOR_lasx_xvavg_w): Ditto.
2793 (CODE_FOR_lasx_xvavg_d): Ditto.
2794 (CODE_FOR_lasx_xvavg_bu): Ditto.
2795 (CODE_FOR_lasx_xvavg_hu): Ditto.
2796 (CODE_FOR_lasx_xvavg_wu): Ditto.
2797 (CODE_FOR_lasx_xvavg_du): Ditto.
2798 (CODE_FOR_lasx_xvavgr_b): Ditto.
2799 (CODE_FOR_lasx_xvavgr_h): Ditto.
2800 (CODE_FOR_lasx_xvavgr_w): Ditto.
2801 (CODE_FOR_lasx_xvavgr_d): Ditto.
2802 (CODE_FOR_lasx_xvavgr_bu): Ditto.
2803 (CODE_FOR_lasx_xvavgr_hu): Ditto.
2804 (CODE_FOR_lasx_xvavgr_wu): Ditto.
2805 (CODE_FOR_lasx_xvavgr_du): Ditto.
2806 (CODE_FOR_lasx_xvmuh_b): Ditto.
2807 (CODE_FOR_lasx_xvmuh_h): Ditto.
2808 (CODE_FOR_lasx_xvmuh_w): Ditto.
2809 (CODE_FOR_lasx_xvmuh_d): Ditto.
2810 (CODE_FOR_lasx_xvmuh_bu): Ditto.
2811 (CODE_FOR_lasx_xvmuh_hu): Ditto.
2812 (CODE_FOR_lasx_xvmuh_wu): Ditto.
2813 (CODE_FOR_lasx_xvmuh_du): Ditto.
2814 (CODE_FOR_lasx_xvssran_b_h): Ditto.
2815 (CODE_FOR_lasx_xvssran_h_w): Ditto.
2816 (CODE_FOR_lasx_xvssran_w_d): Ditto.
2817 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
2818 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
2819 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
2820 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
2821 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
2822 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
2823 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
2824 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
2825 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
2826 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
2827 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
2828 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
2829 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
2830 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
2831 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
2832 (CODE_FOR_lasx_xvftint_w_s): Ditto.
2833 (CODE_FOR_lasx_xvftint_l_d): Ditto.
2834 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
2835 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
2836 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
2837 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
2838 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
2839 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
2840 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
2841 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
2842 (CODE_FOR_lasx_xvsat_b): Ditto.
2843 (CODE_FOR_lasx_xvsat_h): Ditto.
2844 (CODE_FOR_lasx_xvsat_w): Ditto.
2845 (CODE_FOR_lasx_xvsat_d): Ditto.
2846 (CODE_FOR_lasx_xvsat_bu): Ditto.
2847 (CODE_FOR_lasx_xvsat_hu): Ditto.
2848 (CODE_FOR_lasx_xvsat_wu): Ditto.
2849 (CODE_FOR_lasx_xvsat_du): Ditto.
2850 (loongarch_builtin_vectorized_function): Ditto.
2851 (loongarch_expand_builtin_insn): Ditto.
2852 (loongarch_expand_builtin): Ditto.
2853 * config/loongarch/loongarch-ftypes.def (1): Ditto.
2857 * config/loongarch/lasxintrin.h: New file.
2859 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2861 * config/loongarch/loongarch-modes.def
2862 (VECTOR_MODES): Add Loongson ASX instruction support.
2863 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
2864 (loongarch_split_256bit_move_p): Ditto.
2865 (loongarch_expand_vector_group_init): Ditto.
2866 (loongarch_expand_vec_perm_1): Ditto.
2867 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
2868 (loongarch_valid_offset_p): Ditto.
2869 (loongarch_address_insns): Ditto.
2870 (loongarch_const_insns): Ditto.
2871 (loongarch_legitimize_move): Ditto.
2872 (loongarch_builtin_vectorization_cost): Ditto.
2873 (loongarch_split_move_p): Ditto.
2874 (loongarch_split_move): Ditto.
2875 (loongarch_output_move_index_float): Ditto.
2876 (loongarch_split_256bit_move_p): Ditto.
2877 (loongarch_split_256bit_move): Ditto.
2878 (loongarch_output_move): Ditto.
2879 (loongarch_print_operand_reloc): Ditto.
2880 (loongarch_print_operand): Ditto.
2881 (loongarch_hard_regno_mode_ok_uncached): Ditto.
2882 (loongarch_hard_regno_nregs): Ditto.
2883 (loongarch_class_max_nregs): Ditto.
2884 (loongarch_can_change_mode_class): Ditto.
2885 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
2886 (loongarch_vector_mode_supported_p): Ditto.
2887 (loongarch_preferred_simd_mode): Ditto.
2888 (loongarch_autovectorize_vector_modes): Ditto.
2889 (loongarch_lsx_output_division): Ditto.
2890 (loongarch_expand_lsx_shuffle): Ditto.
2891 (loongarch_expand_vec_perm): Ditto.
2892 (loongarch_expand_vec_perm_interleave): Ditto.
2893 (loongarch_try_expand_lsx_vshuf_const): Ditto.
2894 (loongarch_expand_vec_perm_even_odd_1): Ditto.
2895 (loongarch_expand_vec_perm_even_odd): Ditto.
2896 (loongarch_expand_vec_perm_1): Ditto.
2897 (loongarch_expand_vec_perm_const_2): Ditto.
2898 (loongarch_is_quad_duplicate): Ditto.
2899 (loongarch_is_double_duplicate): Ditto.
2900 (loongarch_is_odd_extraction): Ditto.
2901 (loongarch_is_even_extraction): Ditto.
2902 (loongarch_is_extraction_permutation): Ditto.
2903 (loongarch_is_center_extraction): Ditto.
2904 (loongarch_is_reversing_permutation): Ditto.
2905 (loongarch_is_di_misalign_extract): Ditto.
2906 (loongarch_is_si_misalign_extract): Ditto.
2907 (loongarch_is_lasx_lowpart_interleave): Ditto.
2908 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
2909 (COMPARE_SELECTOR): Ditto.
2910 (loongarch_is_lasx_lowpart_extract): Ditto.
2911 (loongarch_is_lasx_highpart_interleave): Ditto.
2912 (loongarch_is_lasx_highpart_interleave_2): Ditto.
2913 (loongarch_is_elem_duplicate): Ditto.
2914 (loongarch_is_op_reverse_perm): Ditto.
2915 (loongarch_is_single_op_perm): Ditto.
2916 (loongarch_is_divisible_perm): Ditto.
2917 (loongarch_is_triple_stride_extract): Ditto.
2918 (loongarch_vectorize_vec_perm_const): Ditto.
2919 (loongarch_cpu_sched_reassociation_width): Ditto.
2920 (loongarch_expand_vector_extract): Ditto.
2921 (emit_reduc_half): Ditto.
2922 (loongarch_expand_vec_unpack): Ditto.
2923 (loongarch_expand_vector_group_init): Ditto.
2924 (loongarch_expand_vector_init): Ditto.
2925 (loongarch_expand_lsx_cmp): Ditto.
2926 (loongarch_builtin_support_vector_misalignment): Ditto.
2927 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
2928 (BITS_PER_LASX_REG): Ditto.
2929 (STRUCTURE_SIZE_BOUNDARY): Ditto.
2930 (LASX_REG_FIRST): Ditto.
2931 (LASX_REG_LAST): Ditto.
2932 (LASX_REG_NUM): Ditto.
2933 (LASX_REG_P): Ditto.
2934 (LASX_REG_RTX_P): Ditto.
2935 (LASX_SUPPORTED_MODE_P): Ditto.
2936 * config/loongarch/loongarch.md: Ditto.
2937 * config/loongarch/lasx.md: New file.
2939 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2941 * config.gcc: Export the header file lsxintrin.h.
2942 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
2943 (enum loongarch_builtin_type): Ditto.
2945 (LARCH_BUILTIN): Ditto.
2946 (LSX_BUILTIN): Ditto.
2947 (LSX_BUILTIN_TEST_BRANCH): Ditto.
2948 (LSX_NO_TARGET_BUILTIN): Ditto.
2949 (CODE_FOR_lsx_vsadd_b): Ditto.
2950 (CODE_FOR_lsx_vsadd_h): Ditto.
2951 (CODE_FOR_lsx_vsadd_w): Ditto.
2952 (CODE_FOR_lsx_vsadd_d): Ditto.
2953 (CODE_FOR_lsx_vsadd_bu): Ditto.
2954 (CODE_FOR_lsx_vsadd_hu): Ditto.
2955 (CODE_FOR_lsx_vsadd_wu): Ditto.
2956 (CODE_FOR_lsx_vsadd_du): Ditto.
2957 (CODE_FOR_lsx_vadd_b): Ditto.
2958 (CODE_FOR_lsx_vadd_h): Ditto.
2959 (CODE_FOR_lsx_vadd_w): Ditto.
2960 (CODE_FOR_lsx_vadd_d): Ditto.
2961 (CODE_FOR_lsx_vaddi_bu): Ditto.
2962 (CODE_FOR_lsx_vaddi_hu): Ditto.
2963 (CODE_FOR_lsx_vaddi_wu): Ditto.
2964 (CODE_FOR_lsx_vaddi_du): Ditto.
2965 (CODE_FOR_lsx_vand_v): Ditto.
2966 (CODE_FOR_lsx_vandi_b): Ditto.
2967 (CODE_FOR_lsx_bnz_v): Ditto.
2968 (CODE_FOR_lsx_bz_v): Ditto.
2969 (CODE_FOR_lsx_vbitsel_v): Ditto.
2970 (CODE_FOR_lsx_vseqi_b): Ditto.
2971 (CODE_FOR_lsx_vseqi_h): Ditto.
2972 (CODE_FOR_lsx_vseqi_w): Ditto.
2973 (CODE_FOR_lsx_vseqi_d): Ditto.
2974 (CODE_FOR_lsx_vslti_b): Ditto.
2975 (CODE_FOR_lsx_vslti_h): Ditto.
2976 (CODE_FOR_lsx_vslti_w): Ditto.
2977 (CODE_FOR_lsx_vslti_d): Ditto.
2978 (CODE_FOR_lsx_vslti_bu): Ditto.
2979 (CODE_FOR_lsx_vslti_hu): Ditto.
2980 (CODE_FOR_lsx_vslti_wu): Ditto.
2981 (CODE_FOR_lsx_vslti_du): Ditto.
2982 (CODE_FOR_lsx_vslei_b): Ditto.
2983 (CODE_FOR_lsx_vslei_h): Ditto.
2984 (CODE_FOR_lsx_vslei_w): Ditto.
2985 (CODE_FOR_lsx_vslei_d): Ditto.
2986 (CODE_FOR_lsx_vslei_bu): Ditto.
2987 (CODE_FOR_lsx_vslei_hu): Ditto.
2988 (CODE_FOR_lsx_vslei_wu): Ditto.
2989 (CODE_FOR_lsx_vslei_du): Ditto.
2990 (CODE_FOR_lsx_vdiv_b): Ditto.
2991 (CODE_FOR_lsx_vdiv_h): Ditto.
2992 (CODE_FOR_lsx_vdiv_w): Ditto.
2993 (CODE_FOR_lsx_vdiv_d): Ditto.
2994 (CODE_FOR_lsx_vdiv_bu): Ditto.
2995 (CODE_FOR_lsx_vdiv_hu): Ditto.
2996 (CODE_FOR_lsx_vdiv_wu): Ditto.
2997 (CODE_FOR_lsx_vdiv_du): Ditto.
2998 (CODE_FOR_lsx_vfadd_s): Ditto.
2999 (CODE_FOR_lsx_vfadd_d): Ditto.
3000 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
3001 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
3002 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
3003 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
3004 (CODE_FOR_lsx_vffint_s_w): Ditto.
3005 (CODE_FOR_lsx_vffint_d_l): Ditto.
3006 (CODE_FOR_lsx_vffint_s_wu): Ditto.
3007 (CODE_FOR_lsx_vffint_d_lu): Ditto.
3008 (CODE_FOR_lsx_vfsub_s): Ditto.
3009 (CODE_FOR_lsx_vfsub_d): Ditto.
3010 (CODE_FOR_lsx_vfmul_s): Ditto.
3011 (CODE_FOR_lsx_vfmul_d): Ditto.
3012 (CODE_FOR_lsx_vfdiv_s): Ditto.
3013 (CODE_FOR_lsx_vfdiv_d): Ditto.
3014 (CODE_FOR_lsx_vfmax_s): Ditto.
3015 (CODE_FOR_lsx_vfmax_d): Ditto.
3016 (CODE_FOR_lsx_vfmin_s): Ditto.
3017 (CODE_FOR_lsx_vfmin_d): Ditto.
3018 (CODE_FOR_lsx_vfsqrt_s): Ditto.
3019 (CODE_FOR_lsx_vfsqrt_d): Ditto.
3020 (CODE_FOR_lsx_vflogb_s): Ditto.
3021 (CODE_FOR_lsx_vflogb_d): Ditto.
3022 (CODE_FOR_lsx_vmax_b): Ditto.
3023 (CODE_FOR_lsx_vmax_h): Ditto.
3024 (CODE_FOR_lsx_vmax_w): Ditto.
3025 (CODE_FOR_lsx_vmax_d): Ditto.
3026 (CODE_FOR_lsx_vmaxi_b): Ditto.
3027 (CODE_FOR_lsx_vmaxi_h): Ditto.
3028 (CODE_FOR_lsx_vmaxi_w): Ditto.
3029 (CODE_FOR_lsx_vmaxi_d): Ditto.
3030 (CODE_FOR_lsx_vmax_bu): Ditto.
3031 (CODE_FOR_lsx_vmax_hu): Ditto.
3032 (CODE_FOR_lsx_vmax_wu): Ditto.
3033 (CODE_FOR_lsx_vmax_du): Ditto.
3034 (CODE_FOR_lsx_vmaxi_bu): Ditto.
3035 (CODE_FOR_lsx_vmaxi_hu): Ditto.
3036 (CODE_FOR_lsx_vmaxi_wu): Ditto.
3037 (CODE_FOR_lsx_vmaxi_du): Ditto.
3038 (CODE_FOR_lsx_vmin_b): Ditto.
3039 (CODE_FOR_lsx_vmin_h): Ditto.
3040 (CODE_FOR_lsx_vmin_w): Ditto.
3041 (CODE_FOR_lsx_vmin_d): Ditto.
3042 (CODE_FOR_lsx_vmini_b): Ditto.
3043 (CODE_FOR_lsx_vmini_h): Ditto.
3044 (CODE_FOR_lsx_vmini_w): Ditto.
3045 (CODE_FOR_lsx_vmini_d): Ditto.
3046 (CODE_FOR_lsx_vmin_bu): Ditto.
3047 (CODE_FOR_lsx_vmin_hu): Ditto.
3048 (CODE_FOR_lsx_vmin_wu): Ditto.
3049 (CODE_FOR_lsx_vmin_du): Ditto.
3050 (CODE_FOR_lsx_vmini_bu): Ditto.
3051 (CODE_FOR_lsx_vmini_hu): Ditto.
3052 (CODE_FOR_lsx_vmini_wu): Ditto.
3053 (CODE_FOR_lsx_vmini_du): Ditto.
3054 (CODE_FOR_lsx_vmod_b): Ditto.
3055 (CODE_FOR_lsx_vmod_h): Ditto.
3056 (CODE_FOR_lsx_vmod_w): Ditto.
3057 (CODE_FOR_lsx_vmod_d): Ditto.
3058 (CODE_FOR_lsx_vmod_bu): Ditto.
3059 (CODE_FOR_lsx_vmod_hu): Ditto.
3060 (CODE_FOR_lsx_vmod_wu): Ditto.
3061 (CODE_FOR_lsx_vmod_du): Ditto.
3062 (CODE_FOR_lsx_vmul_b): Ditto.
3063 (CODE_FOR_lsx_vmul_h): Ditto.
3064 (CODE_FOR_lsx_vmul_w): Ditto.
3065 (CODE_FOR_lsx_vmul_d): Ditto.
3066 (CODE_FOR_lsx_vclz_b): Ditto.
3067 (CODE_FOR_lsx_vclz_h): Ditto.
3068 (CODE_FOR_lsx_vclz_w): Ditto.
3069 (CODE_FOR_lsx_vclz_d): Ditto.
3070 (CODE_FOR_lsx_vnor_v): Ditto.
3071 (CODE_FOR_lsx_vor_v): Ditto.
3072 (CODE_FOR_lsx_vori_b): Ditto.
3073 (CODE_FOR_lsx_vnori_b): Ditto.
3074 (CODE_FOR_lsx_vpcnt_b): Ditto.
3075 (CODE_FOR_lsx_vpcnt_h): Ditto.
3076 (CODE_FOR_lsx_vpcnt_w): Ditto.
3077 (CODE_FOR_lsx_vpcnt_d): Ditto.
3078 (CODE_FOR_lsx_vxor_v): Ditto.
3079 (CODE_FOR_lsx_vxori_b): Ditto.
3080 (CODE_FOR_lsx_vsll_b): Ditto.
3081 (CODE_FOR_lsx_vsll_h): Ditto.
3082 (CODE_FOR_lsx_vsll_w): Ditto.
3083 (CODE_FOR_lsx_vsll_d): Ditto.
3084 (CODE_FOR_lsx_vslli_b): Ditto.
3085 (CODE_FOR_lsx_vslli_h): Ditto.
3086 (CODE_FOR_lsx_vslli_w): Ditto.
3087 (CODE_FOR_lsx_vslli_d): Ditto.
3088 (CODE_FOR_lsx_vsra_b): Ditto.
3089 (CODE_FOR_lsx_vsra_h): Ditto.
3090 (CODE_FOR_lsx_vsra_w): Ditto.
3091 (CODE_FOR_lsx_vsra_d): Ditto.
3092 (CODE_FOR_lsx_vsrai_b): Ditto.
3093 (CODE_FOR_lsx_vsrai_h): Ditto.
3094 (CODE_FOR_lsx_vsrai_w): Ditto.
3095 (CODE_FOR_lsx_vsrai_d): Ditto.
3096 (CODE_FOR_lsx_vsrl_b): Ditto.
3097 (CODE_FOR_lsx_vsrl_h): Ditto.
3098 (CODE_FOR_lsx_vsrl_w): Ditto.
3099 (CODE_FOR_lsx_vsrl_d): Ditto.
3100 (CODE_FOR_lsx_vsrli_b): Ditto.
3101 (CODE_FOR_lsx_vsrli_h): Ditto.
3102 (CODE_FOR_lsx_vsrli_w): Ditto.
3103 (CODE_FOR_lsx_vsrli_d): Ditto.
3104 (CODE_FOR_lsx_vsub_b): Ditto.
3105 (CODE_FOR_lsx_vsub_h): Ditto.
3106 (CODE_FOR_lsx_vsub_w): Ditto.
3107 (CODE_FOR_lsx_vsub_d): Ditto.
3108 (CODE_FOR_lsx_vsubi_bu): Ditto.
3109 (CODE_FOR_lsx_vsubi_hu): Ditto.
3110 (CODE_FOR_lsx_vsubi_wu): Ditto.
3111 (CODE_FOR_lsx_vsubi_du): Ditto.
3112 (CODE_FOR_lsx_vpackod_d): Ditto.
3113 (CODE_FOR_lsx_vpackev_d): Ditto.
3114 (CODE_FOR_lsx_vpickod_d): Ditto.
3115 (CODE_FOR_lsx_vpickev_d): Ditto.
3116 (CODE_FOR_lsx_vrepli_b): Ditto.
3117 (CODE_FOR_lsx_vrepli_h): Ditto.
3118 (CODE_FOR_lsx_vrepli_w): Ditto.
3119 (CODE_FOR_lsx_vrepli_d): Ditto.
3120 (CODE_FOR_lsx_vsat_b): Ditto.
3121 (CODE_FOR_lsx_vsat_h): Ditto.
3122 (CODE_FOR_lsx_vsat_w): Ditto.
3123 (CODE_FOR_lsx_vsat_d): Ditto.
3124 (CODE_FOR_lsx_vsat_bu): Ditto.
3125 (CODE_FOR_lsx_vsat_hu): Ditto.
3126 (CODE_FOR_lsx_vsat_wu): Ditto.
3127 (CODE_FOR_lsx_vsat_du): Ditto.
3128 (CODE_FOR_lsx_vavg_b): Ditto.
3129 (CODE_FOR_lsx_vavg_h): Ditto.
3130 (CODE_FOR_lsx_vavg_w): Ditto.
3131 (CODE_FOR_lsx_vavg_d): Ditto.
3132 (CODE_FOR_lsx_vavg_bu): Ditto.
3133 (CODE_FOR_lsx_vavg_hu): Ditto.
3134 (CODE_FOR_lsx_vavg_wu): Ditto.
3135 (CODE_FOR_lsx_vavg_du): Ditto.
3136 (CODE_FOR_lsx_vavgr_b): Ditto.
3137 (CODE_FOR_lsx_vavgr_h): Ditto.
3138 (CODE_FOR_lsx_vavgr_w): Ditto.
3139 (CODE_FOR_lsx_vavgr_d): Ditto.
3140 (CODE_FOR_lsx_vavgr_bu): Ditto.
3141 (CODE_FOR_lsx_vavgr_hu): Ditto.
3142 (CODE_FOR_lsx_vavgr_wu): Ditto.
3143 (CODE_FOR_lsx_vavgr_du): Ditto.
3144 (CODE_FOR_lsx_vssub_b): Ditto.
3145 (CODE_FOR_lsx_vssub_h): Ditto.
3146 (CODE_FOR_lsx_vssub_w): Ditto.
3147 (CODE_FOR_lsx_vssub_d): Ditto.
3148 (CODE_FOR_lsx_vssub_bu): Ditto.
3149 (CODE_FOR_lsx_vssub_hu): Ditto.
3150 (CODE_FOR_lsx_vssub_wu): Ditto.
3151 (CODE_FOR_lsx_vssub_du): Ditto.
3152 (CODE_FOR_lsx_vabsd_b): Ditto.
3153 (CODE_FOR_lsx_vabsd_h): Ditto.
3154 (CODE_FOR_lsx_vabsd_w): Ditto.
3155 (CODE_FOR_lsx_vabsd_d): Ditto.
3156 (CODE_FOR_lsx_vabsd_bu): Ditto.
3157 (CODE_FOR_lsx_vabsd_hu): Ditto.
3158 (CODE_FOR_lsx_vabsd_wu): Ditto.
3159 (CODE_FOR_lsx_vabsd_du): Ditto.
3160 (CODE_FOR_lsx_vftint_w_s): Ditto.
3161 (CODE_FOR_lsx_vftint_l_d): Ditto.
3162 (CODE_FOR_lsx_vftint_wu_s): Ditto.
3163 (CODE_FOR_lsx_vftint_lu_d): Ditto.
3164 (CODE_FOR_lsx_vandn_v): Ditto.
3165 (CODE_FOR_lsx_vorn_v): Ditto.
3166 (CODE_FOR_lsx_vneg_b): Ditto.
3167 (CODE_FOR_lsx_vneg_h): Ditto.
3168 (CODE_FOR_lsx_vneg_w): Ditto.
3169 (CODE_FOR_lsx_vneg_d): Ditto.
3170 (CODE_FOR_lsx_vshuf4i_d): Ditto.
3171 (CODE_FOR_lsx_vbsrl_v): Ditto.
3172 (CODE_FOR_lsx_vbsll_v): Ditto.
3173 (CODE_FOR_lsx_vfmadd_s): Ditto.
3174 (CODE_FOR_lsx_vfmadd_d): Ditto.
3175 (CODE_FOR_lsx_vfmsub_s): Ditto.
3176 (CODE_FOR_lsx_vfmsub_d): Ditto.
3177 (CODE_FOR_lsx_vfnmadd_s): Ditto.
3178 (CODE_FOR_lsx_vfnmadd_d): Ditto.
3179 (CODE_FOR_lsx_vfnmsub_s): Ditto.
3180 (CODE_FOR_lsx_vfnmsub_d): Ditto.
3181 (CODE_FOR_lsx_vmuh_b): Ditto.
3182 (CODE_FOR_lsx_vmuh_h): Ditto.
3183 (CODE_FOR_lsx_vmuh_w): Ditto.
3184 (CODE_FOR_lsx_vmuh_d): Ditto.
3185 (CODE_FOR_lsx_vmuh_bu): Ditto.
3186 (CODE_FOR_lsx_vmuh_hu): Ditto.
3187 (CODE_FOR_lsx_vmuh_wu): Ditto.
3188 (CODE_FOR_lsx_vmuh_du): Ditto.
3189 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
3190 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
3191 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
3192 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
3193 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
3194 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
3195 (CODE_FOR_lsx_vssran_b_h): Ditto.
3196 (CODE_FOR_lsx_vssran_h_w): Ditto.
3197 (CODE_FOR_lsx_vssran_w_d): Ditto.
3198 (CODE_FOR_lsx_vssran_bu_h): Ditto.
3199 (CODE_FOR_lsx_vssran_hu_w): Ditto.
3200 (CODE_FOR_lsx_vssran_wu_d): Ditto.
3201 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
3202 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
3203 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
3204 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
3205 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
3206 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
3207 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
3208 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
3209 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
3210 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
3211 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
3212 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
3213 (loongarch_builtin_vector_type): Ditto.
3214 (loongarch_build_cvpointer_type): Ditto.
3215 (LARCH_ATYPE_CVPOINTER): Ditto.
3216 (LARCH_ATYPE_BOOLEAN): Ditto.
3217 (LARCH_ATYPE_V2SF): Ditto.
3218 (LARCH_ATYPE_V2HI): Ditto.
3219 (LARCH_ATYPE_V2SI): Ditto.
3220 (LARCH_ATYPE_V4QI): Ditto.
3221 (LARCH_ATYPE_V4HI): Ditto.
3222 (LARCH_ATYPE_V8QI): Ditto.
3223 (LARCH_ATYPE_V2DI): Ditto.
3224 (LARCH_ATYPE_V4SI): Ditto.
3225 (LARCH_ATYPE_V8HI): Ditto.
3226 (LARCH_ATYPE_V16QI): Ditto.
3227 (LARCH_ATYPE_V2DF): Ditto.
3228 (LARCH_ATYPE_V4SF): Ditto.
3229 (LARCH_ATYPE_V4DI): Ditto.
3230 (LARCH_ATYPE_V8SI): Ditto.
3231 (LARCH_ATYPE_V16HI): Ditto.
3232 (LARCH_ATYPE_V32QI): Ditto.
3233 (LARCH_ATYPE_V4DF): Ditto.
3234 (LARCH_ATYPE_V8SF): Ditto.
3235 (LARCH_ATYPE_UV2DI): Ditto.
3236 (LARCH_ATYPE_UV4SI): Ditto.
3237 (LARCH_ATYPE_UV8HI): Ditto.
3238 (LARCH_ATYPE_UV16QI): Ditto.
3239 (LARCH_ATYPE_UV4DI): Ditto.
3240 (LARCH_ATYPE_UV8SI): Ditto.
3241 (LARCH_ATYPE_UV16HI): Ditto.
3242 (LARCH_ATYPE_UV32QI): Ditto.
3243 (LARCH_ATYPE_UV2SI): Ditto.
3244 (LARCH_ATYPE_UV4HI): Ditto.
3245 (LARCH_ATYPE_UV8QI): Ditto.
3246 (loongarch_builtin_vectorized_function): Ditto.
3247 (LARCH_GET_BUILTIN): Ditto.
3248 (loongarch_expand_builtin_insn): Ditto.
3249 (loongarch_expand_builtin_lsx_test_branch): Ditto.
3250 (loongarch_expand_builtin): Ditto.
3251 * config/loongarch/loongarch-ftypes.def (1): Ditto.
3255 * config/loongarch/lsxintrin.h: New file.
3257 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3259 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
3279 * config/loongarch/genopts/loongarch.opt.in: Ditto.
3280 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
3281 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
3282 (VECTOR_MODE): Ditto.
3284 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
3285 (loongarch_split_move_insn): Ditto.
3286 (loongarch_split_128bit_move): Ditto.
3287 (loongarch_split_128bit_move_p): Ditto.
3288 (loongarch_split_lsx_copy_d): Ditto.
3289 (loongarch_split_lsx_insert_d): Ditto.
3290 (loongarch_split_lsx_fill_d): Ditto.
3291 (loongarch_expand_vec_cmp): Ditto.
3292 (loongarch_const_vector_same_val_p): Ditto.
3293 (loongarch_const_vector_same_bytes_p): Ditto.
3294 (loongarch_const_vector_same_int_p): Ditto.
3295 (loongarch_const_vector_shuffle_set_p): Ditto.
3296 (loongarch_const_vector_bitimm_set_p): Ditto.
3297 (loongarch_const_vector_bitimm_clr_p): Ditto.
3298 (loongarch_lsx_vec_parallel_const_half): Ditto.
3299 (loongarch_gen_const_int_vector): Ditto.
3300 (loongarch_lsx_output_division): Ditto.
3301 (loongarch_expand_vector_init): Ditto.
3302 (loongarch_expand_vec_unpack): Ditto.
3303 (loongarch_expand_vec_perm): Ditto.
3304 (loongarch_expand_vector_extract): Ditto.
3305 (loongarch_expand_vector_reduc): Ditto.
3306 (loongarch_ldst_scaled_shift): Ditto.
3307 (loongarch_expand_vec_cond_expr): Ditto.
3308 (loongarch_expand_vec_cond_mask_expr): Ditto.
3309 (loongarch_builtin_vectorized_function): Ditto.
3310 (loongarch_gen_const_int_vector_shuffle): Ditto.
3311 (loongarch_build_signbit_mask): Ditto.
3312 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
3313 (loongarch_setup_incoming_varargs): Ditto.
3314 (loongarch_emit_move): Ditto.
3315 (loongarch_const_vector_bitimm_set_p): Ditto.
3316 (loongarch_const_vector_bitimm_clr_p): Ditto.
3317 (loongarch_const_vector_same_val_p): Ditto.
3318 (loongarch_const_vector_same_bytes_p): Ditto.
3319 (loongarch_const_vector_same_int_p): Ditto.
3320 (loongarch_const_vector_shuffle_set_p): Ditto.
3321 (loongarch_symbol_insns): Ditto.
3322 (loongarch_cannot_force_const_mem): Ditto.
3323 (loongarch_valid_offset_p): Ditto.
3324 (loongarch_valid_index_p): Ditto.
3325 (loongarch_classify_address): Ditto.
3326 (loongarch_address_insns): Ditto.
3327 (loongarch_ldst_scaled_shift): Ditto.
3328 (loongarch_const_insns): Ditto.
3329 (loongarch_split_move_insn_p): Ditto.
3330 (loongarch_subword_at_byte): Ditto.
3331 (loongarch_legitimize_move): Ditto.
3332 (loongarch_builtin_vectorization_cost): Ditto.
3333 (loongarch_split_move_p): Ditto.
3334 (loongarch_split_move): Ditto.
3335 (loongarch_split_move_insn): Ditto.
3336 (loongarch_output_move_index_float): Ditto.
3337 (loongarch_split_128bit_move_p): Ditto.
3338 (loongarch_split_128bit_move): Ditto.
3339 (loongarch_split_lsx_copy_d): Ditto.
3340 (loongarch_split_lsx_insert_d): Ditto.
3341 (loongarch_split_lsx_fill_d): Ditto.
3342 (loongarch_output_move): Ditto.
3343 (loongarch_extend_comparands): Ditto.
3344 (loongarch_print_operand_reloc): Ditto.
3345 (loongarch_print_operand): Ditto.
3346 (loongarch_hard_regno_mode_ok_uncached): Ditto.
3347 (loongarch_hard_regno_call_part_clobbered): Ditto.
3348 (loongarch_hard_regno_nregs): Ditto.
3349 (loongarch_class_max_nregs): Ditto.
3350 (loongarch_can_change_mode_class): Ditto.
3351 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
3352 (loongarch_secondary_reload): Ditto.
3353 (loongarch_vector_mode_supported_p): Ditto.
3354 (loongarch_preferred_simd_mode): Ditto.
3355 (loongarch_autovectorize_vector_modes): Ditto.
3356 (loongarch_lsx_output_division): Ditto.
3357 (loongarch_option_override_internal): Ditto.
3358 (loongarch_hard_regno_caller_save_mode): Ditto.
3359 (MAX_VECT_LEN): Ditto.
3360 (loongarch_spill_class): Ditto.
3361 (struct expand_vec_perm_d): Ditto.
3362 (loongarch_promote_function_mode): Ditto.
3363 (loongarch_expand_vselect): Ditto.
3364 (loongarch_starting_frame_offset): Ditto.
3365 (loongarch_expand_vselect_vconcat): Ditto.
3366 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
3367 (TARGET_OPTION_OVERRIDE): Ditto.
3368 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
3369 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
3370 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
3371 (loongarch_expand_lsx_shuffle): Ditto.
3372 (TARGET_SCHED_INIT): Ditto.
3373 (TARGET_SCHED_REORDER): Ditto.
3374 (TARGET_SCHED_REORDER2): Ditto.
3375 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
3376 (TARGET_SCHED_ADJUST_COST): Ditto.
3377 (TARGET_SCHED_ISSUE_RATE): Ditto.
3378 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
3379 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
3380 (TARGET_VALID_POINTER_MODE): Ditto.
3381 (TARGET_REGISTER_MOVE_COST): Ditto.
3382 (TARGET_MEMORY_MOVE_COST): Ditto.
3383 (TARGET_RTX_COSTS): Ditto.
3384 (TARGET_ADDRESS_COST): Ditto.
3385 (TARGET_IN_SMALL_DATA_P): Ditto.
3386 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
3387 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
3388 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
3389 (loongarch_expand_vec_perm): Ditto.
3390 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
3391 (TARGET_RETURN_IN_MEMORY): Ditto.
3392 (TARGET_FUNCTION_VALUE): Ditto.
3393 (TARGET_LIBCALL_VALUE): Ditto.
3394 (loongarch_try_expand_lsx_vshuf_const): Ditto.
3395 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
3396 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
3397 (TARGET_PRINT_OPERAND): Ditto.
3398 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
3399 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
3400 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
3401 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
3402 (TARGET_MUST_PASS_IN_STACK): Ditto.
3403 (TARGET_PASS_BY_REFERENCE): Ditto.
3404 (TARGET_ARG_PARTIAL_BYTES): Ditto.
3405 (TARGET_FUNCTION_ARG): Ditto.
3406 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
3407 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
3408 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
3409 (TARGET_INIT_BUILTINS): Ditto.
3410 (loongarch_expand_vec_perm_const_1): Ditto.
3411 (loongarch_expand_vec_perm_const_2): Ditto.
3412 (loongarch_vectorize_vec_perm_const): Ditto.
3413 (loongarch_cpu_sched_reassociation_width): Ditto.
3414 (loongarch_sched_reassociation_width): Ditto.
3415 (loongarch_expand_vector_extract): Ditto.
3416 (emit_reduc_half): Ditto.
3417 (loongarch_expand_vector_reduc): Ditto.
3418 (loongarch_expand_vec_unpack): Ditto.
3419 (loongarch_lsx_vec_parallel_const_half): Ditto.
3420 (loongarch_constant_elt_p): Ditto.
3421 (loongarch_gen_const_int_vector_shuffle): Ditto.
3422 (loongarch_expand_vector_init): Ditto.
3423 (loongarch_expand_lsx_cmp): Ditto.
3424 (loongarch_expand_vec_cond_expr): Ditto.
3425 (loongarch_expand_vec_cond_mask_expr): Ditto.
3426 (loongarch_expand_vec_cmp): Ditto.
3427 (loongarch_case_values_threshold): Ditto.
3428 (loongarch_build_const_vector): Ditto.
3429 (loongarch_build_signbit_mask): Ditto.
3430 (loongarch_builtin_support_vector_misalignment): Ditto.
3431 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
3432 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
3433 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
3434 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
3435 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
3436 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
3437 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
3438 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
3439 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
3440 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
3441 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
3442 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
3443 (UNITS_PER_LSX_REG): Ditto.
3444 (BITS_PER_LSX_REG): Ditto.
3445 (BIGGEST_ALIGNMENT): Ditto.
3446 (LSX_REG_FIRST): Ditto.
3447 (LSX_REG_LAST): Ditto.
3448 (LSX_REG_NUM): Ditto.
3450 (LSX_REG_RTX_P): Ditto.
3451 (IMM13_OPERAND): Ditto.
3452 (LSX_SUPPORTED_MODE_P): Ditto.
3453 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
3454 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
3455 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
3462 * config/loongarch/loongarch.opt: Ditto.
3463 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
3464 (const_uimm3_operand): Ditto.
3465 (const_8_to_11_operand): Ditto.
3466 (const_12_to_15_operand): Ditto.
3467 (const_uimm4_operand): Ditto.
3468 (const_uimm6_operand): Ditto.
3469 (const_uimm7_operand): Ditto.
3470 (const_uimm8_operand): Ditto.
3471 (const_imm5_operand): Ditto.
3472 (const_imm10_operand): Ditto.
3473 (const_imm13_operand): Ditto.
3474 (reg_imm10_operand): Ditto.
3475 (aq8b_operand): Ditto.
3476 (aq8h_operand): Ditto.
3477 (aq8w_operand): Ditto.
3478 (aq8d_operand): Ditto.
3479 (aq10b_operand): Ditto.
3480 (aq10h_operand): Ditto.
3481 (aq10w_operand): Ditto.
3482 (aq10d_operand): Ditto.
3483 (aq12b_operand): Ditto.
3484 (aq12h_operand): Ditto.
3485 (aq12w_operand): Ditto.
3486 (aq12d_operand): Ditto.
3487 (const_m1_operand): Ditto.
3488 (reg_or_m1_operand): Ditto.
3489 (const_exp_2_operand): Ditto.
3490 (const_exp_4_operand): Ditto.
3491 (const_exp_8_operand): Ditto.
3492 (const_exp_16_operand): Ditto.
3493 (const_exp_32_operand): Ditto.
3494 (const_0_or_1_operand): Ditto.
3495 (const_0_to_3_operand): Ditto.
3496 (const_0_to_7_operand): Ditto.
3497 (const_2_or_3_operand): Ditto.
3498 (const_4_to_7_operand): Ditto.
3499 (const_8_to_15_operand): Ditto.
3500 (const_16_to_31_operand): Ditto.
3501 (qi_mask_operand): Ditto.
3502 (hi_mask_operand): Ditto.
3503 (si_mask_operand): Ditto.
3505 (db4_operand): Ditto.
3506 (db7_operand): Ditto.
3507 (db8_operand): Ditto.
3508 (ib3_operand): Ditto.
3509 (sb4_operand): Ditto.
3510 (sb5_operand): Ditto.
3511 (sb8_operand): Ditto.
3512 (sd8_operand): Ditto.
3513 (ub4_operand): Ditto.
3514 (ub8_operand): Ditto.
3515 (uh4_operand): Ditto.
3516 (uw4_operand): Ditto.
3517 (uw5_operand): Ditto.
3518 (uw6_operand): Ditto.
3519 (uw8_operand): Ditto.
3520 (addiur2_operand): Ditto.
3521 (addiusp_operand): Ditto.
3522 (andi16_operand): Ditto.
3523 (movep_src_register): Ditto.
3524 (movep_src_operand): Ditto.
3525 (fcc_reload_operand): Ditto.
3526 (muldiv_target_operand): Ditto.
3527 (const_vector_same_val_operand): Ditto.
3528 (const_vector_same_simm5_operand): Ditto.
3529 (const_vector_same_uimm5_operand): Ditto.
3530 (const_vector_same_ximm5_operand): Ditto.
3531 (const_vector_same_uimm6_operand): Ditto.
3532 (par_const_vector_shf_set_operand): Ditto.
3533 (reg_or_vector_same_val_operand): Ditto.
3534 (reg_or_vector_same_simm5_operand): Ditto.
3535 (reg_or_vector_same_uimm5_operand): Ditto.
3536 (reg_or_vector_same_ximm5_operand): Ditto.
3537 (reg_or_vector_same_uimm6_operand): Ditto.
3538 * doc/md.texi: Ditto.
3539 * config/loongarch/lsx.md: New file.
3541 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3543 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
3544 (get_all_predecessors): New function.
3545 (get_all_successors): Ditto.
3546 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
3547 (get_all_successors): Ditto.
3548 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
3549 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
3551 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
3553 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
3554 (split_addsi): Likewise.
3555 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
3556 'N', 'x', and 'J' code letters.
3557 (arc_output_addsi): Make it static.
3558 (split_addsi): Remove it.
3559 * config/arc/arc.h (UNSIGNED_INT*): New defines.
3560 (SINNED_INT*): Likewise.
3561 * config/arc/arc.md (type): Add add, sub, bxor types.
3562 (tst_movb): Change code letter from 's' to 'x'.
3563 (andsi3_i): Likewise.
3564 (addsi3_mixed): Refurbish the pattern.
3565 (call_i): Change code letter from 'S' to 'J'.
3566 * config/arc/arc700.md: Add newly introduced types.
3567 * config/arc/arcHS.md: Likewsie.
3568 * config/arc/arcHS4x.md: Likewise.
3569 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
3570 (CM4): Update description.
3571 (CP4, C6u, C6n, CIs, C4p): New constraint.
3573 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
3575 * common/config/arc/arc-common.cc (arc_option_optimization_table):
3576 Remove mbbit_peephole.
3577 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
3578 (store_direct): Likewise.
3579 (BBIT peephole2): Likewise.
3580 * config/arc/arc.opt (mbbit-peephole): Ignore option.
3581 * doc/invoke.texi (mbbit-peephole): Update document.
3583 2023-09-05 Jakub Jelinek <jakub@redhat.com>
3585 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
3588 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3590 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
3591 options passed from driver to gnat1 as explicit for multilib.
3593 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3595 * config.gcc: add loongarch*-elf target.
3596 * config/loongarch/elf.h: New file.
3597 Link against newlib by default.
3599 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3601 * config.gcc: use -mstrict-align for building libraries
3602 if --with-strict-align-lib is given.
3603 * doc/install.texi: likewise.
3605 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3607 * config/loongarch/loongarch-c.cc: Export macros
3608 "__loongarch_{arch,tune}" in the preprocessor.
3610 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3612 * config.gcc: Make --with-abi= obsolete, decide the default ABI
3613 with target triplet. Allow specifying multilib library build
3614 options with --with-multilib-list and --with-multilib-default.
3615 * config/loongarch/t-linux: Likewise.
3616 * config/loongarch/genopts/loongarch-strings: Likewise.
3617 * config/loongarch/loongarch-str.h: Likewise.
3618 * doc/install.texi: Likewise.
3619 * config/loongarch/genopts/loongarch.opt.in: Introduce
3620 -m[no-]l[a]sx options. Only process -m*-float and
3621 -m[no-]l[a]sx in the GCC driver.
3622 * config/loongarch/loongarch.opt: Likewise.
3623 * config/loongarch/la464.md: Likewise.
3624 * config/loongarch/loongarch-c.cc: Likewise.
3625 * config/loongarch/loongarch-cpu.cc: Likewise.
3626 * config/loongarch/loongarch-cpu.h: Likewise.
3627 * config/loongarch/loongarch-def.c: Likewise.
3628 * config/loongarch/loongarch-def.h: Likewise.
3629 * config/loongarch/loongarch-driver.cc: Likewise.
3630 * config/loongarch/loongarch-driver.h: Likewise.
3631 * config/loongarch/loongarch-opts.cc: Likewise.
3632 * config/loongarch/loongarch-opts.h: Likewise.
3633 * config/loongarch/loongarch.cc: Likewise.
3634 * doc/invoke.texi: Likewise.
3636 2023-09-05 liuhongt <hongtao.liu@intel.com>
3638 * config/i386/sse.md: (V8BFH_128): Renamed to ..
3639 (VHFBF_128): .. this.
3640 (V16BFH_256): Renamed to ..
3641 (VHFBF_256): .. this.
3642 (avx512f_mov<mode>): Extend to V_128.
3643 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
3644 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
3645 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
3646 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
3647 * config/i386/i386-expand.cc (expand_vec_perm_blend):
3648 Canonicalize vec_merge.
3650 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3652 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
3653 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
3654 (autovectorize_vector_modes): Ditto.
3655 (vectorize_related_mode): Ditto.
3657 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3659 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
3660 all 32b Darwin PowerPC cases.
3662 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3664 * config/darwin-sections.def (static_init_section): Add the
3665 __TEXT,__StaticInit section.
3666 * config/darwin.cc (darwin_function_section): Use the static init
3667 section for global initializers, to match other platform toolchains.
3669 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3671 * config/darwin-sections.def (darwin_exception_section): Move to
3673 * config/darwin.cc (darwin_emit_except_table_label): Align before
3674 the exception table label.
3675 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
3676 relative 4byte relocs.
3678 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3680 * config/darwin.cc (dump_machopic_symref_flags): New.
3681 (debug_machopic_symref_flags): New.
3683 2023-09-04 Pan Li <pan2.li@intel.com>
3685 * config/riscv/riscv-vector-builtins-types.def
3686 (vfloat16mf4_t): Add FP16 intrinsic def.
3687 (vfloat16mf2_t): Ditto.
3688 (vfloat16m1_t): Ditto.
3689 (vfloat16m2_t): Ditto.
3690 (vfloat16m4_t): Ditto.
3691 (vfloat16m8_t): Ditto.
3693 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
3695 PR tree-optimization/108757
3696 * match.pd ((X - N * M) / N): New pattern.
3697 ((X + N * M) / N): New pattern.
3698 ((X + C) div_rshift N): New pattern.
3700 2023-09-04 Guo Jie <guojie@loongson.cn>
3702 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
3703 movsf_hardfloat and movdf_hardfloat.
3705 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
3707 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
3708 In unsigned QImode test, check for sign extended subreg and/or
3709 constant operands, and do a sign extension in that case.
3710 * config/loongarch/loongarch.md (TARGET_64BIT): Define
3711 template cbranchqi4.
3713 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
3715 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
3716 from memory into floating-point registers.
3718 2023-09-03 Pan Li <pan2.li@intel.com>
3720 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
3722 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
3724 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
3726 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
3727 pointer before overwriting it.
3729 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
3731 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
3732 Associate the __float128 type to float128_type_node so that it can
3733 be recognized by the compiler.
3734 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
3735 Add the flag "FLOAT128_TYPE" to gcc and associate a function
3736 with the suffix "q" to "f128".
3737 * doc/extend.texi:Added support for 128-bit floating-point functions on
3738 the LoongArch architecture.
3740 2023-09-01 Jakub Jelinek <jakub@redhat.com>
3743 * common.opt (fabi-version=): Document version 19.
3744 * doc/invoke.texi (-fabi-version=): Likewise.
3746 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3748 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
3749 New combine pattern.
3750 (*cond_<float_cvt><vconvert><mode>): Ditto.
3751 (*cond_<optab><vnconvert><mode>): Ditto.
3752 (*cond_<float_cvt><vnconvert><mode>): Ditto.
3753 (*cond_<optab><mode><vnconvert>): Ditto.
3754 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
3755 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
3756 (<float_cvt><vconvert><mode>2): Adjust.
3757 (<optab><vnconvert><mode>2): Adjust.
3758 (<float_cvt><vnconvert><mode>2): Adjust.
3759 (<optab><mode><vnconvert>2): Adjust.
3760 (<float_cvt><mode><vnconvert>2): Adjust.
3761 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
3763 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3765 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
3766 New combine pattern.
3767 (*cond_trunc<mode><v_double_trunc>): Ditto.
3768 * config/riscv/autovec.md: Adjust.
3769 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
3771 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3773 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
3774 New combine pattern.
3775 (*cond_<optab><v_quad_trunc><mode>): Ditto.
3776 (*cond_<optab><v_oct_trunc><mode>): Ditto.
3777 (*cond_trunc<mode><v_double_trunc>): Ditto.
3778 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
3779 (<optab><v_oct_trunc><mode>2): Ditto.
3781 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3783 * config/riscv/autovec.md: Adjust.
3784 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
3785 (expand_cond_len_binop): Ditto.
3786 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
3787 (expand_cond_len_op): Ditto.
3788 (expand_cond_len_unop): Ditto.
3789 (expand_cond_len_binop): Ditto.
3790 (expand_cond_len_ternop): Ditto.
3792 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3794 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
3795 VECT_COMPARE_COSTS by default.
3797 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
3799 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
3801 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3803 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
3805 * config/riscv/riscv.opt: Add dynamic compile option.
3807 2023-09-01 Pan Li <pan2.li@intel.com>
3809 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
3810 vls floating-point autovec.
3811 * config/riscv/vector-iterators.md: New iterator for
3812 floating-point V and VLS.
3813 * config/riscv/vector.md: Add VLS to floating-point binop.
3815 2023-09-01 Andrew Pinski <apinski@marvell.com>
3817 PR tree-optimization/19832
3818 * match.pd: Add pattern to optimize
3819 `(a != b) ? a OP b : c`.
3821 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
3822 Guo Jie <guojie@loongson.cn>
3825 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
3826 frame_pointer_needed to determine whether to use the $fp register.
3828 2023-08-31 Andrew Pinski <apinski@marvell.com>
3830 PR tree-optimization/110915
3831 * match.pd (min_value, max_value): Extend to vector constants.
3833 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
3835 * config.in: Regenerate.
3836 * config/darwin-c.cc: Change spelling to macOS.
3837 * config/darwin-driver.cc: Likewise.
3838 * config/darwin.h: Likewise.
3839 * configure.ac: Likewise.
3840 * doc/contrib.texi: Likewise.
3841 * doc/extend.texi: Likewise.
3842 * doc/invoke.texi: Likewise.
3843 * doc/plugins.texi: Likewise.
3844 * doc/tm.texi: Regenerate.
3845 * doc/tm.texi.in: Change spelling to macOS.
3846 * plugin.cc: Likewise.
3848 2023-08-31 Pan Li <pan2.li@intel.com>
3850 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
3851 * config/riscv/autovec.md: Ditto.
3853 2023-08-31 Pan Li <pan2.li@intel.com>
3855 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
3856 * config/riscv/autovec.md: Ditto.
3858 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
3860 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
3861 rather than a call. List each possible destination register
3862 in the call pattern.
3864 2023-08-31 Pan Li <pan2.li@intel.com>
3866 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
3867 * config/riscv/autovec.md: Ditto.
3869 2023-08-31 Pan Li <pan2.li@intel.com>
3870 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3872 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
3873 * config/riscv/autovec.md: Ditto.
3874 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
3876 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
3878 * config/riscv/autovec.md (shifts): Use
3879 vector_scalar_shift_operand.
3880 * config/riscv/predicates.md (vector_scalar_shift_operand): New
3883 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3885 * config.gcc: Add vector cost model framework for RVV.
3886 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
3887 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
3888 * config/riscv/t-riscv: Ditto.
3889 * config/riscv/riscv-vector-costs.cc: New file.
3890 * config/riscv/riscv-vector-costs.h: New file.
3892 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
3895 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
3896 AltiVec address operands.
3897 (define_insn_and_split movxo): Likewise.
3898 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
3899 redundant mode size check.
3901 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3903 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
3904 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
3905 Change to default policy.
3906 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
3907 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
3908 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
3910 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3912 * config/riscv/autovec-opt.md: Adjust.
3913 * config/riscv/autovec-vls.md: Ditto.
3914 * config/riscv/autovec.md: Ditto.
3915 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
3916 (enum insn_flags): Add insn flags.
3917 (emit_vlmax_insn): Adjust.
3918 (emit_vlmax_fp_insn): Delete.
3919 (emit_vlmax_ternary_insn): Delete.
3920 (emit_vlmax_fp_ternary_insn): Delete.
3921 (emit_nonvlmax_insn): Adjust.
3922 (emit_vlmax_slide_insn): Delete.
3923 (emit_nonvlmax_slide_tu_insn): Delete.
3924 (emit_vlmax_merge_insn): Delete.
3925 (emit_vlmax_cmp_insn): Delete.
3926 (emit_vlmax_cmp_mu_insn): Delete.
3927 (emit_vlmax_masked_mu_insn): Delete.
3928 (emit_scalar_move_insn): Delete.
3929 (emit_nonvlmax_integer_move_insn): Delete.
3930 (emit_vlmax_insn_lra): Add.
3931 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
3932 (emit_vlmax_insn): Adjust.
3933 (emit_nonvlmax_insn): Adjust.
3934 (emit_vlmax_insn_lra): Add.
3935 (emit_vlmax_fp_insn): Delete.
3936 (emit_vlmax_ternary_insn): Delete.
3937 (emit_vlmax_fp_ternary_insn): Delete.
3938 (emit_vlmax_slide_insn): Delete.
3939 (emit_nonvlmax_slide_tu_insn): Delete.
3940 (emit_nonvlmax_slide_insn): Delete.
3941 (emit_vlmax_merge_insn): Delete.
3942 (emit_vlmax_cmp_insn): Delete.
3943 (emit_vlmax_cmp_mu_insn): Delete.
3944 (emit_vlmax_masked_insn): Delete.
3945 (emit_nonvlmax_masked_insn): Delete.
3946 (emit_vlmax_masked_store_insn): Delete.
3947 (emit_nonvlmax_masked_store_insn): Delete.
3948 (emit_vlmax_masked_mu_insn): Delete.
3949 (emit_vlmax_masked_fp_mu_insn): Delete.
3950 (emit_nonvlmax_tu_insn): Delete.
3951 (emit_nonvlmax_fp_tu_insn): Delete.
3952 (emit_nonvlmax_tumu_insn): Delete.
3953 (emit_nonvlmax_fp_tumu_insn): Delete.
3954 (emit_scalar_move_insn): Delete.
3955 (emit_cpop_insn): Delete.
3956 (emit_vlmax_integer_move_insn): Delete.
3957 (emit_nonvlmax_integer_move_insn): Delete.
3958 (emit_vlmax_gather_insn): Delete.
3959 (emit_vlmax_masked_gather_mu_insn): Delete.
3960 (emit_vlmax_compress_insn): Delete.
3961 (emit_nonvlmax_compress_insn): Delete.
3962 (emit_vlmax_reduction_insn): Delete.
3963 (emit_vlmax_fp_reduction_insn): Delete.
3964 (emit_nonvlmax_fp_reduction_insn): Delete.
3965 (expand_vec_series): Adjust.
3966 (expand_const_vector): Adjust.
3967 (legitimize_move): Adjust.
3968 (sew64_scalar_helper): Adjust.
3969 (expand_tuple_move): Adjust.
3970 (expand_vector_init_insert_elems): Adjust.
3971 (expand_vector_init_merge_repeating_sequence): Adjust.
3972 (expand_vec_cmp): Adjust.
3973 (expand_vec_cmp_float): Adjust.
3974 (expand_vec_perm): Adjust.
3975 (shuffle_merge_patterns): Adjust.
3976 (shuffle_compress_patterns): Adjust.
3977 (shuffle_decompress_patterns): Adjust.
3978 (expand_load_store): Adjust.
3979 (expand_cond_len_op): Adjust.
3980 (expand_cond_len_unop): Adjust.
3981 (expand_cond_len_binop): Adjust.
3982 (expand_gather_scatter): Adjust.
3983 (expand_cond_len_ternop): Adjust.
3984 (expand_reduction): Adjust.
3985 (expand_lanes_load_store): Adjust.
3986 (expand_fold_extract_last): Adjust.
3987 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
3988 * config/riscv/vector.md: Adjust.
3990 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
3993 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
3994 load/store with length only on 64-bit Power10.
3996 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
3998 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
3999 SWAP option is enabled.
4000 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
4002 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
4004 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
4005 Use common insn for signed and unsigned front-end definitions.
4006 * config/arm/arm_mve_builtins.def
4007 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
4008 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
4009 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
4012 (mve_rot): Likewise.
4014 (VxCADDQ_M): Likewise.
4015 * config/arm/unspecs.md (unspec): Likewise.
4016 * config/arm/mve.md: Fix minor typo.
4018 2023-08-31 liuhongt <hongtao.liu@intel.com>
4020 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
4021 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
4022 (VF_AVX512HFBF16): Renamed to VHFBF.
4023 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
4024 (VF_AVX512FP16): Removed.
4025 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
4026 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
4027 (rsqrt<mode>2): Ditto.
4028 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
4029 (vcond<mode><code>): Ditto.
4030 (vcond<sseintvecmodelower><mode>): Ditto.
4031 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
4032 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
4033 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
4034 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
4035 (cmla<conj_op><mode>4): Ditto.
4036 (fma_<mode>_fadd_fmul): Ditto.
4037 (fma_<mode>_fadd_fcmul): Ditto.
4038 (fma_<complexopname>_<mode>_fma_zero): Ditto.
4039 (fma_<mode>_fmaddc_bcst): Ditto.
4040 (fma_<mode>_fcmaddc_bcst): Ditto.
4041 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
4042 (cmul<conj_op><mode>3): Ditto.
4043 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
4045 (vec_unpacks_lo_<mode>): Ditto.
4046 (vec_unpacks_hi_<mode>): Ditto.
4047 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
4048 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
4049 (*vec_extract<mode>_0): Ditto.
4050 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
4052 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
4055 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
4057 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
4059 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
4060 (operator_minus::overflow_free_p): New declare.
4061 (operator_mult::overflow_free_p): New declare.
4062 * range-op.cc (range_op_handler::overflow_free_p): New function.
4063 (range_operator::overflow_free_p): New default function.
4064 (operator_plus::overflow_free_p): New function.
4065 (operator_minus::overflow_free_p): New function.
4066 (operator_mult::overflow_free_p): New function.
4067 * range-op.h (range_op_handler::overflow_free_p): New declare.
4068 (range_operator::overflow_free_p): New declare.
4069 * value-range.cc (irange::nonnegative_p): New function.
4070 (irange::nonpositive_p): New function.
4071 * value-range.h (irange::nonnegative_p): New declare.
4072 (irange::nonpositive_p): New declare.
4074 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
4077 * config/pru/predicates.md (const_0_operand): New predicate.
4078 (pru_cstore_comparison_operator): Ditto.
4079 * config/pru/pru.md (cstore<mode>4): New pattern.
4082 2023-08-30 Richard Biener <rguenther@suse.de>
4084 PR tree-optimization/111228
4085 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
4086 New simplifications.
4088 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4090 * config/riscv/autovec.md (movmisalign<mode>): Delete.
4092 2023-08-30 Die Li <lidie@eswincomputing.com>
4093 Fei Gao <gaofei@eswincomputing.com>
4095 * config/riscv/peephole.md: New pattern.
4096 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
4097 (zcmp_mv_sreg_operand): New predicate.
4098 * config/riscv/riscv.md: New predicate.
4099 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
4100 (*mvsa01<X:mode>): New pattern.
4102 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
4104 * config/riscv/riscv.cc
4105 (riscv_zcmp_can_use_popretz): true if popretz can be used
4106 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
4107 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
4108 * config/riscv/riscv.md: define A0_REGNUM
4109 * config/riscv/zc.md
4110 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
4111 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
4112 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
4113 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
4114 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
4115 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
4116 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
4117 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
4118 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
4119 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
4120 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
4121 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
4123 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
4125 * config/riscv/iterators.md
4126 (slot0_offset): slot 0 offset in stack GPRs area in bytes
4127 (slot1_offset): slot 1 offset in stack GPRs area in bytes
4128 (slot2_offset): likewise
4129 (slot3_offset): likewise
4130 (slot4_offset): likewise
4131 (slot5_offset): likewise
4132 (slot6_offset): likewise
4133 (slot7_offset): likewise
4134 (slot8_offset): likewise
4135 (slot9_offset): likewise
4136 (slot10_offset): likewise
4137 (slot11_offset): likewise
4138 (slot12_offset): likewise
4139 * config/riscv/predicates.md
4140 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
4141 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
4142 (stack_push_up_to_s1_operand): likewise
4143 (stack_push_up_to_s2_operand): likewise
4144 (stack_push_up_to_s3_operand): likewise
4145 (stack_push_up_to_s4_operand): likewise
4146 (stack_push_up_to_s5_operand): likewise
4147 (stack_push_up_to_s6_operand): likewise
4148 (stack_push_up_to_s7_operand): likewise
4149 (stack_push_up_to_s8_operand): likewise
4150 (stack_push_up_to_s9_operand): likewise
4151 (stack_push_up_to_s11_operand): likewise
4152 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
4153 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
4154 (stack_pop_up_to_s1_operand): likewise
4155 (stack_pop_up_to_s2_operand): likewise
4156 (stack_pop_up_to_s3_operand): likewise
4157 (stack_pop_up_to_s4_operand): likewise
4158 (stack_pop_up_to_s5_operand): likewise
4159 (stack_pop_up_to_s6_operand): likewise
4160 (stack_pop_up_to_s7_operand): likewise
4161 (stack_pop_up_to_s8_operand): likewise
4162 (stack_pop_up_to_s9_operand): likewise
4163 (stack_pop_up_to_s11_operand): likewise
4164 * config/riscv/riscv-protos.h
4165 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
4166 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
4167 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
4168 (riscv_use_multi_push): true if multi push is used
4169 (riscv_multi_push_sregs_count): num of sregs in multi-push
4170 (riscv_multi_push_regs_count): num of regs in multi-push
4171 (riscv_16bytes_align): align to 16 bytes
4172 (riscv_stack_align): moved to a better place
4173 (riscv_save_libcall_count): no functional change
4174 (riscv_compute_frame_info): add zcmp frame info
4175 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
4176 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
4177 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
4178 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
4179 (riscv_expand_prologue): allocate stack by cm.push
4180 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
4181 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
4182 (zcmp_base_adj): calculate stack adjustment base size
4183 (zcmp_additional_adj): calculate stack adjustment additional size
4184 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
4185 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
4196 (S10_MASK): likewise
4197 (S11_MASK): likewise
4198 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
4199 (ZCMP_MAX_SPIMM): max spimm value
4200 (ZCMP_SP_INC_STEP): zcmp sp increment step
4201 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
4202 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
4203 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
4204 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
4205 * config/riscv/riscv.md: include zc.md
4206 * config/riscv/zc.md: New file. machine description for zcmp
4208 2023-08-30 Jakub Jelinek <jakub@redhat.com>
4210 PR tree-optimization/110914
4211 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
4212 adjust_last_stmt unless len is known constant.
4214 2023-08-30 Jakub Jelinek <jakub@redhat.com>
4216 PR tree-optimization/111015
4217 * gimple-ssa-store-merging.cc
4218 (imm_store_chain_info::output_merged_store): Use wi::mask and
4219 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
4220 build_int_cst to build BIT_AND_EXPR mask.
4222 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4224 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
4225 (call_may_clobber_ref_p_1): Ditto.
4226 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
4227 (get_alias_ptr_type_for_ptr_address): Ditto.
4229 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4231 * config/riscv/riscv-vsetvl.cc
4232 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
4234 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4236 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
4237 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
4240 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
4242 * config/riscv/zicond.md: New splitters to rewrite single bit
4243 sign extension as the condition to a czero in the desired form.
4245 2023-08-29 David Malcolm <dmalcolm@redhat.com>
4248 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
4250 2023-08-29 David Malcolm <dmalcolm@redhat.com>
4253 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
4255 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
4257 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
4258 zvfh can generate zfa extended instruction fli.h, just like zfh.
4260 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
4261 Vineet Gupta <vineetg@rivosinc.com>
4263 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
4264 __riscv_unaligned_avoid with value 1 or
4265 __riscv_unaligned_slow with value 1 or
4266 __riscv_unaligned_fast with value 1
4267 * config/riscv/riscv.cc (riscv_option_override): Define
4268 riscv_user_wants_strict_align. Set
4269 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
4270 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
4272 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
4274 * config/riscv/autovec-vls.md: Update types
4275 * config/riscv/riscv.md: Add vector placeholder type
4276 * config/riscv/vector.md: Update types
4278 2023-08-29 Carl Love <cel@us.ibm.com>
4280 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
4281 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
4282 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
4283 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
4284 New buit-in definitions.
4285 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
4286 overloaded definition.
4287 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
4289 2023-08-29 Pan Li <pan2.li@intel.com>
4290 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4292 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
4293 (riscv_legitimize_const_move): Handle ref plus const poly.
4295 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4297 * common/config/riscv/riscv-common.cc
4298 (riscv_implied_info): Add implications from unprivileged extensions.
4299 (riscv_ext_version_table): Add stub support for all unprivileged
4300 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
4302 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4304 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4305 Add stub support for all vendor extensions supported by Binutils.
4307 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4309 * common/config/riscv/riscv-common.cc
4310 (riscv_implied_info): Add implications from privileged extensions.
4311 (riscv_ext_version_table): Add stub support for all privileged
4312 extensions supported by Binutils.
4314 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
4316 * config/riscv/autovec.md: Adjust
4317 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
4318 (get_vlmax_rtx): Exported.
4319 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
4320 (emit_vlmax_masked_gather_mu_insn): Adjust.
4321 (get_vlmax_rtx): New func.
4322 (expand_load_store): Adjust.
4323 (expand_cond_len_unop): Call expand_cond_len_op.
4324 (expand_cond_len_op): New subroutine.
4325 (expand_cond_len_binop): Call expand_cond_len_op.
4326 (expand_cond_len_ternop): Call expand_cond_len_op.
4327 (expand_lanes_load_store): Adjust.
4329 2023-08-29 Jakub Jelinek <jakub@redhat.com>
4332 PR middle-end/111209
4333 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
4334 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
4335 carry-out on higher limb. Don't match it though if it could be
4336 matched later on 4 argument addition/subtraction.
4338 2023-08-29 Andrew Pinski <apinski@marvell.com>
4340 PR tree-optimization/111147
4341 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
4342 instead of matching bit_not.
4344 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
4346 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
4349 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4351 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
4352 (pass_vsetvl::compute_local_properties): Fix bug.
4353 (pass_vsetvl::commit_vsetvls): Ditto.
4354 * config/riscv/riscv-vsetvl.h: New function.
4356 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
4359 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
4361 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
4362 force_reg mem target operand.
4363 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
4364 (*pred_mov<mode>): Remove imm -> reg pattern.
4365 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
4367 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
4369 * common/config/loongarch/loongarch-common.cc:
4370 Enable '-free' on O2 and above.
4371 * doc/invoke.texi: Modify the description information
4372 of the '-free' compilation option and add the LoongArch
4375 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
4377 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
4379 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
4381 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4382 Implement the 'Zihintpause' extension, version 2.0.
4383 (riscv_ext_flag_table) Add 'Zihintpause' handling.
4384 * config/riscv/riscv-builtins.cc: Remove availability predicate
4385 "always" and add "hint_pause".
4386 (riscv_builtins) : Add "pause" extension.
4387 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
4388 * config/riscv/riscv.md (riscv_pause): Adjust output based on
4391 2023-08-28 Andrew Pinski <apinski@marvell.com>
4393 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
4394 instead of specifically checking for ~X.
4396 2023-08-28 Andrew Pinski <apinski@marvell.com>
4398 PR tree-optimization/111146
4399 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
4402 2023-08-28 Andrew Pinski <apinski@marvell.com>
4404 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
4405 when resimplify returns true.
4406 (match_simplify_replacement): Print only if accepted the match-and-simplify
4407 result rather than the full sequence.
4409 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4411 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
4413 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
4415 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4417 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
4419 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4421 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
4422 (vmulltq_poly): New.
4423 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
4424 (vmulltq_poly): New.
4425 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
4426 (vmulltq_poly): New.
4427 * config/arm/arm_mve.h (vmulltq_poly): Remove.
4428 (vmullbq_poly): Remove.
4429 (vmullbq_poly_m): Remove.
4430 (vmulltq_poly_m): Remove.
4431 (vmullbq_poly_x): Remove.
4432 (vmulltq_poly_x): Remove.
4433 (vmulltq_poly_p8): Remove.
4434 (vmullbq_poly_p8): Remove.
4435 (vmulltq_poly_p16): Remove.
4436 (vmullbq_poly_p16): Remove.
4437 (vmullbq_poly_m_p8): Remove.
4438 (vmullbq_poly_m_p16): Remove.
4439 (vmulltq_poly_m_p8): Remove.
4440 (vmulltq_poly_m_p16): Remove.
4441 (vmullbq_poly_x_p8): Remove.
4442 (vmullbq_poly_x_p16): Remove.
4443 (vmulltq_poly_x_p8): Remove.
4444 (vmulltq_poly_x_p16): Remove.
4445 (__arm_vmulltq_poly_p8): Remove.
4446 (__arm_vmullbq_poly_p8): Remove.
4447 (__arm_vmulltq_poly_p16): Remove.
4448 (__arm_vmullbq_poly_p16): Remove.
4449 (__arm_vmullbq_poly_m_p8): Remove.
4450 (__arm_vmullbq_poly_m_p16): Remove.
4451 (__arm_vmulltq_poly_m_p8): Remove.
4452 (__arm_vmulltq_poly_m_p16): Remove.
4453 (__arm_vmullbq_poly_x_p8): Remove.
4454 (__arm_vmullbq_poly_x_p16): Remove.
4455 (__arm_vmulltq_poly_x_p8): Remove.
4456 (__arm_vmulltq_poly_x_p16): Remove.
4457 (__arm_vmulltq_poly): Remove.
4458 (__arm_vmullbq_poly): Remove.
4459 (__arm_vmullbq_poly_m): Remove.
4460 (__arm_vmulltq_poly_m): Remove.
4461 (__arm_vmullbq_poly_x): Remove.
4462 (__arm_vmulltq_poly_x): Remove.
4464 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4466 * config/arm/arm-mve-builtins-functions.h (class
4467 unspec_mve_function_exact_insn_vmull_poly): New.
4469 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4471 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
4472 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
4474 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4476 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
4477 support for 'U' and 'p' format specifiers.
4479 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4481 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
4483 (TYPES_poly_8_16): New.
4485 * config/arm/arm-mve-builtins.def (p8): New type suffix.
4487 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
4489 (struct type_suffix_info): Add poly_p field.
4491 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4493 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
4495 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
4497 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
4499 * config/arm/arm_mve.h (vmulltq_int): Remove.
4500 (vmullbq_int): Remove.
4501 (vmullbq_int_m): Remove.
4502 (vmulltq_int_m): Remove.
4503 (vmullbq_int_x): Remove.
4504 (vmulltq_int_x): Remove.
4505 (vmulltq_int_u8): Remove.
4506 (vmullbq_int_u8): Remove.
4507 (vmulltq_int_s8): Remove.
4508 (vmullbq_int_s8): Remove.
4509 (vmulltq_int_u16): Remove.
4510 (vmullbq_int_u16): Remove.
4511 (vmulltq_int_s16): Remove.
4512 (vmullbq_int_s16): Remove.
4513 (vmulltq_int_u32): Remove.
4514 (vmullbq_int_u32): Remove.
4515 (vmulltq_int_s32): Remove.
4516 (vmullbq_int_s32): Remove.
4517 (vmullbq_int_m_s8): Remove.
4518 (vmullbq_int_m_s32): Remove.
4519 (vmullbq_int_m_s16): Remove.
4520 (vmullbq_int_m_u8): Remove.
4521 (vmullbq_int_m_u32): Remove.
4522 (vmullbq_int_m_u16): Remove.
4523 (vmulltq_int_m_s8): Remove.
4524 (vmulltq_int_m_s32): Remove.
4525 (vmulltq_int_m_s16): Remove.
4526 (vmulltq_int_m_u8): Remove.
4527 (vmulltq_int_m_u32): Remove.
4528 (vmulltq_int_m_u16): Remove.
4529 (vmullbq_int_x_s8): Remove.
4530 (vmullbq_int_x_s16): Remove.
4531 (vmullbq_int_x_s32): Remove.
4532 (vmullbq_int_x_u8): Remove.
4533 (vmullbq_int_x_u16): Remove.
4534 (vmullbq_int_x_u32): Remove.
4535 (vmulltq_int_x_s8): Remove.
4536 (vmulltq_int_x_s16): Remove.
4537 (vmulltq_int_x_s32): Remove.
4538 (vmulltq_int_x_u8): Remove.
4539 (vmulltq_int_x_u16): Remove.
4540 (vmulltq_int_x_u32): Remove.
4541 (__arm_vmulltq_int_u8): Remove.
4542 (__arm_vmullbq_int_u8): Remove.
4543 (__arm_vmulltq_int_s8): Remove.
4544 (__arm_vmullbq_int_s8): Remove.
4545 (__arm_vmulltq_int_u16): Remove.
4546 (__arm_vmullbq_int_u16): Remove.
4547 (__arm_vmulltq_int_s16): Remove.
4548 (__arm_vmullbq_int_s16): Remove.
4549 (__arm_vmulltq_int_u32): Remove.
4550 (__arm_vmullbq_int_u32): Remove.
4551 (__arm_vmulltq_int_s32): Remove.
4552 (__arm_vmullbq_int_s32): Remove.
4553 (__arm_vmullbq_int_m_s8): Remove.
4554 (__arm_vmullbq_int_m_s32): Remove.
4555 (__arm_vmullbq_int_m_s16): Remove.
4556 (__arm_vmullbq_int_m_u8): Remove.
4557 (__arm_vmullbq_int_m_u32): Remove.
4558 (__arm_vmullbq_int_m_u16): Remove.
4559 (__arm_vmulltq_int_m_s8): Remove.
4560 (__arm_vmulltq_int_m_s32): Remove.
4561 (__arm_vmulltq_int_m_s16): Remove.
4562 (__arm_vmulltq_int_m_u8): Remove.
4563 (__arm_vmulltq_int_m_u32): Remove.
4564 (__arm_vmulltq_int_m_u16): Remove.
4565 (__arm_vmullbq_int_x_s8): Remove.
4566 (__arm_vmullbq_int_x_s16): Remove.
4567 (__arm_vmullbq_int_x_s32): Remove.
4568 (__arm_vmullbq_int_x_u8): Remove.
4569 (__arm_vmullbq_int_x_u16): Remove.
4570 (__arm_vmullbq_int_x_u32): Remove.
4571 (__arm_vmulltq_int_x_s8): Remove.
4572 (__arm_vmulltq_int_x_s16): Remove.
4573 (__arm_vmulltq_int_x_s32): Remove.
4574 (__arm_vmulltq_int_x_u8): Remove.
4575 (__arm_vmulltq_int_x_u16): Remove.
4576 (__arm_vmulltq_int_x_u32): Remove.
4577 (__arm_vmulltq_int): Remove.
4578 (__arm_vmullbq_int): Remove.
4579 (__arm_vmullbq_int_m): Remove.
4580 (__arm_vmulltq_int_m): Remove.
4581 (__arm_vmullbq_int_x): Remove.
4582 (__arm_vmulltq_int_x): Remove.
4584 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4586 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
4587 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
4589 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4591 * config/arm/arm-mve-builtins-functions.h (class
4592 unspec_mve_function_exact_insn_vmull): New.
4594 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4596 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
4597 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
4599 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
4601 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
4602 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
4603 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
4604 (mve_vmulltq_int_<supf><mode>): Merge into ...
4605 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
4606 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
4607 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
4608 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
4609 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
4610 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
4611 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
4613 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4615 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
4618 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4620 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
4621 (binary_acca_int64): Likewise.
4623 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
4625 * range-op-float.cc (fold_range): Handle relations.
4627 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
4629 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
4630 Optimize the function implementation.
4632 2023-08-28 liuhongt <hongtao.liu@intel.com>
4635 * config/i386/sse.md (V48_AVX2): Rename to ..
4636 (V48_128_256): .. this.
4637 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
4638 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
4639 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
4640 integral modes when TARGET_AVX2 is not available.
4641 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
4642 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
4644 (maskstore<mode><sseintvecmodelower>): Ditto.
4646 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4648 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
4650 (after_or_same_p): Ditto.
4651 (find_reg_killed_by): Delete.
4652 (has_vsetvl_killed_avl_p): Ditto.
4653 (anticipatable_occurrence_p): Refactor.
4654 (any_set_in_bb_p): Delete.
4655 (count_regno_occurrences): Ditto.
4656 (backward_propagate_worthwhile_p): Ditto.
4657 (demands_can_be_fused_p): Ditto.
4658 (earliest_pred_can_be_fused_p): New function.
4659 (vsetvl_dominated_by_p): Ditto.
4660 (vector_insn_info::parse_insn): Refactor.
4661 (vector_insn_info::merge): Refactor.
4662 (vector_insn_info::dump): Refactor.
4663 (vector_infos_manager::vector_infos_manager): Refactor.
4664 (vector_infos_manager::all_empty_predecessor_p): Delete.
4665 (vector_infos_manager::all_same_avl_p): Ditto.
4666 (vector_infos_manager::create_bitmap_vectors): Refactor.
4667 (vector_infos_manager::free_bitmap_vectors): Refactor.
4668 (vector_infos_manager::dump): Refactor.
4669 (pass_vsetvl::update_block_info): New function.
4670 (enum fusion_type): Ditto.
4671 (pass_vsetvl::get_backward_fusion_type): Delete.
4672 (pass_vsetvl::hard_empty_block_p): Ditto.
4673 (pass_vsetvl::backward_demand_fusion): Ditto.
4674 (pass_vsetvl::forward_demand_fusion): Ditto.
4675 (pass_vsetvl::demand_fusion): Ditto.
4676 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
4677 (pass_vsetvl::compute_local_properties): Ditto.
4678 (pass_vsetvl::earliest_fusion): New function.
4679 (pass_vsetvl::vsetvl_fusion): Ditto.
4680 (pass_vsetvl::commit_vsetvls): Refactor.
4681 (get_first_vsetvl_before_rvv_insns): Ditto.
4682 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
4683 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
4684 (pass_vsetvl::df_post_optimization): Refactor.
4685 (pass_vsetvl::lazy_vsetvl): Ditto.
4686 * config/riscv/riscv-vsetvl.h: Ditto.
4688 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4690 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
4691 * config/riscv/riscv-protos.h (enum insn_type): New enum.
4692 (expand_fold_extract_last): New function.
4693 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
4694 (emit_cpop_insn): Ditto.
4695 (emit_nonvlmax_compress_insn): Ditto.
4696 (expand_fold_extract_last): Ditto.
4697 * config/riscv/vector.md: Fix vcpop.m ratio demand.
4699 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
4701 * config/riscv/sync-rvwmo.md: updated types to "multi" or
4702 "atomic" based on number of assembly lines generated
4703 * config/riscv/sync-ztso.md: likewise
4704 * config/riscv/sync.md: likewise
4706 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
4708 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
4710 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
4711 instructions FLI.H/S/D can load.
4712 * config/riscv/iterators.md (ceil): New.
4713 * config/riscv/riscv-opts.h (MASK_ZFA): New.
4715 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
4716 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
4717 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
4719 (riscv_const_insns): Likewise.
4720 (riscv_legitimize_const_move): Likewise.
4721 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
4723 (riscv_split_doubleword_move): Likewise.
4724 (riscv_output_move): Output the mov instructions in zfa extension.
4725 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
4727 (riscv_secondary_memory_needed): Likewise.
4728 * config/riscv/riscv.md (fminm<mode>3): New.
4729 (fmaxm<mode>3): New.
4730 (movsidf2_low_rv32): New.
4731 (movsidf2_high_rv32): New.
4732 (movdfsisi3_rv32): New.
4733 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
4734 * config/riscv/riscv.opt: New.
4736 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
4739 * omp-general.cc (omp_runtime_api_procname): New.
4740 (omp_runtime_api_call): Moved here from omp-low.cc, and make
4742 * omp-general.h: Include omp-api.h.
4743 * omp-low.cc (omp_runtime_api_call): Delete this copy.
4745 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
4747 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
4748 * doc/gimple.texi (GIMPLE instruction set): Add
4749 GIMPLE_OMP_STRUCTURED_BLOCK.
4750 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
4751 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
4752 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
4753 GIMPLE_OMP_STRUCTURED_BLOCK.
4754 (pp_gimple_stmt_1): Likewise.
4755 * gimple-walk.cc (walk_gimple_stmt): Likewise.
4756 * gimple.cc (gimple_build_omp_structured_block): New.
4757 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
4758 * gimple.h (gimple_build_omp_structured_block): Declare.
4759 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
4760 (CASE_GIMPLE_OMP): Likewise.
4761 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
4762 (gimplify_expr): Likewise.
4763 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
4764 GIMPLE_OMP_STRUCTURED_BLOCK.
4765 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
4766 (lower_omp_1): Likewise.
4767 (diagnose_sb_1): Likewise.
4768 (diagnose_sb_2): Likewise.
4769 * tree-inline.cc (remap_gimple_stmt): Handle
4770 GIMPLE_OMP_STRUCTURED_BLOCK.
4771 (estimate_num_insns): Likewise.
4772 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
4773 (convert_local_reference_stmt): Likewise.
4774 (convert_gimple_call): Likewise.
4775 * tree-pretty-print.cc (dump_generic_node): Handle
4776 OMP_STRUCTURED_BLOCK.
4777 * tree.def (OMP_STRUCTURED_BLOCK): New.
4778 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
4780 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
4782 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
4783 cost. Add some comments about different constants handling.
4785 2023-08-25 Andrew Pinski <apinski@marvell.com>
4787 * match.pd (`a ? one_zero : one_zero`): Move
4788 below detection of minmax.
4790 2023-08-25 Andrew Pinski <apinski@marvell.com>
4792 * match.pd (`a | C -> C`): New pattern.
4794 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
4796 * caller-save.cc (new_saved_hard_reg):
4797 Rename TRUE/FALSE to true/false.
4798 (setup_save_areas): Ditto.
4799 * gcc.cc (set_collect_gcc_options): Ditto.
4800 (driver::build_multilib_strings): Ditto.
4801 (print_multilib_info): Ditto.
4802 * genautomata.cc (gen_cpu_unit): Ditto.
4803 (gen_query_cpu_unit): Ditto.
4804 (gen_bypass): Ditto.
4805 (gen_excl_set): Ditto.
4806 (gen_presence_absence_set): Ditto.
4807 (gen_presence_set): Ditto.
4808 (gen_final_presence_set): Ditto.
4809 (gen_absence_set): Ditto.
4810 (gen_final_absence_set): Ditto.
4811 (gen_automaton): Ditto.
4812 (gen_regexp_repeat): Ditto.
4813 (gen_regexp_allof): Ditto.
4814 (gen_regexp_oneof): Ditto.
4815 (gen_regexp_sequence): Ditto.
4816 (process_decls): Ditto.
4817 (reserv_sets_are_intersected): Ditto.
4818 (initiate_excl_sets): Ditto.
4819 (form_reserv_sets_list): Ditto.
4820 (check_presence_pattern_sets): Ditto.
4821 (check_absence_pattern_sets): Ditto.
4822 (check_regexp_units_distribution): Ditto.
4823 (check_unit_distributions_to_automata): Ditto.
4824 (create_ainsns): Ditto.
4825 (output_insn_code_cases): Ditto.
4826 (output_internal_dead_lock_func): Ditto.
4827 (form_important_insn_automata_lists): Ditto.
4828 * gengtype-state.cc (read_state_files_list): Ditto.
4829 * gengtype.cc (main): Ditto.
4830 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
4832 * gimple.cc (gimple_build_call_from_tree): Ditto.
4833 (preprocess_case_label_vec_for_gimple): Ditto.
4834 * gimplify.cc (gimplify_call_expr): Ditto.
4835 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
4837 2023-08-25 Richard Biener <rguenther@suse.de>
4839 PR tree-optimization/111137
4840 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
4841 Properly handle grouped stores from other SLP instances.
4843 2023-08-25 Richard Biener <rguenther@suse.de>
4845 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
4846 Split out from vect_slp_analyze_node_dependences, remove
4848 (vect_slp_analyze_load_dependences): Split out from
4849 vect_slp_analyze_node_dependences, adjust comments. Process
4850 queued stores before any disambiguation.
4851 (vect_slp_analyze_node_dependences): Remove.
4852 (vect_slp_analyze_instance_dependence): Adjust.
4854 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
4856 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
4858 (operator_not_equal::fold_range): Adjust for relations.
4859 (operator_lt::fold_range): Same.
4860 (operator_gt::fold_range): Same.
4861 (foperator_unordered_equal::fold_range): Same.
4862 (foperator_unordered_lt::fold_range): Same.
4863 (foperator_unordered_le::fold_range): Same.
4864 (foperator_unordered_gt::fold_range): Same.
4865 (foperator_unordered_ge::fold_range): Same.
4867 2023-08-25 Richard Biener <rguenther@suse.de>
4869 PR tree-optimization/111136
4870 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
4871 stores force STMT_VINFO_STRIDED_P and also duplicate that
4874 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4876 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
4879 2023-08-25 liuhongt <hongtao.liu@intel.com>
4881 * config/i386/sse.md (vec_set<mode>): Removed.
4882 (V_128H): Merge into ..
4884 (V_256H): Merge into ..
4886 (V_512): Add V32HF, V32BF.
4887 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
4889 (vcond<mode><sseintvecmodelower>): Removed
4890 (vcondu<mode><sseintvecmodelower>): Removed.
4891 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
4893 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
4896 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
4897 Adjust paramter order.
4899 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
4902 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
4904 2023-08-24 David Malcolm <dmalcolm@redhat.com>
4907 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
4908 list of functions known to the analyzer.
4910 2023-08-24 Richard Biener <rguenther@suse.de>
4912 PR tree-optimization/111123
4913 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
4914 remove indirect clobbers here ...
4915 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
4916 (remove_indirect_clobbers): New function.
4918 2023-08-24 Jan Hubicka <jh@suse.cz>
4920 * cfg.h (struct control_flow_graph): New field full_profile.
4921 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
4922 * cfg.cc (init_flow): Set full_profile to false.
4923 * graphite.cc (graphite_transform_loops): Set full_profile to false.
4924 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
4925 * predict.cc (pass_profile::execute): Set full_profile to true.
4926 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
4927 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
4928 if full_profile is set.
4929 * tree-inline.cc (initialize_cfun): Initialize full_profile.
4930 (expand_call_inline): Combine full_profile.
4932 2023-08-24 Richard Biener <rguenther@suse.de>
4934 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
4935 load_p to ldst_p, fix mistakes and rely on
4936 STMT_VINFO_DATA_REF.
4938 2023-08-24 Jan Hubicka <jh@suse.cz>
4940 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
4941 of newly build trap bb.
4943 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4945 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
4946 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
4947 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
4949 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
4951 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
4952 * config/riscv/riscv.cc (riscv_option_override): Set sched
4955 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
4957 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
4959 2023-08-24 Richard Biener <rguenther@suse.de>
4961 PR tree-optimization/111125
4962 * tree-vect-slp.cc (vect_slp_function): Split at novector
4963 loop entry, do not push blocks in novector loops.
4965 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
4967 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
4969 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4971 * genmatch.cc (decision_tree::gen): Support
4972 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
4973 * gimple-match-exports.cc (gimple_simplify): Ditto.
4974 (gimple_resimplify6): New function.
4975 (gimple_resimplify7): New function.
4976 (gimple_match_op::resimplify): Support
4977 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
4978 (convert_conditional_op): Ditto.
4979 (build_call_internal): Ditto.
4980 (try_conditional_simplification): Ditto.
4981 (gimple_extract): Ditto.
4982 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
4983 * internal-fn.cc (CASE): Ditto.
4985 2023-08-24 Richard Biener <rguenther@suse.de>
4987 PR tree-optimization/111115
4988 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
4989 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
4991 * tree-vect-slp.cc (arg3_arg2_map): New.
4992 (vect_get_operand_map): Handle IFN_MASK_STORE.
4993 (vect_slp_child_index_for_operand): New function.
4994 (vect_build_slp_tree_1): Handle statements with no LHS,
4996 (vect_remove_slp_scalar_calls): Likewise.
4997 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
4998 SLP child corresponding to the ifn value index.
4999 (vectorizable_store): Likewise for the mask index. Support
5001 (vectorizable_load): Lookup the SLP child corresponding to the
5004 2023-08-24 Richard Biener <rguenther@suse.de>
5006 PR tree-optimization/111125
5007 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
5008 for the remain_defs processing.
5010 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
5012 * config/aarch64/aarch64.cc: Include ssa.h.
5013 (aarch64_multiply_add_p): Require the second operand of an
5014 Advanced SIMD subtraction to be a multiplication. Assume that
5015 such an operation won't be fused if the second operand is used
5016 multiple times and if the first operand is also a multiplication.
5018 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5020 * tree-vect-loop.cc (vectorizable_reduction): Apply
5021 LEN_FOLD_EXTRACT_LAST.
5022 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
5024 2023-08-24 Richard Biener <rguenther@suse.de>
5026 PR tree-optimization/111128
5027 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5028 Emit external shift operand inline if we promoted it with
5029 another pattern stmt.
5031 2023-08-24 Pan Li <pan2.li@intel.com>
5033 * config/riscv/autovec.md: Fix typo.
5035 2023-08-24 Pan Li <pan2.li@intel.com>
5037 * config/riscv/riscv-vector-builtins-bases.cc
5038 (class binop_frm): Removed.
5039 (class reverse_binop_frm): Ditto.
5040 (class widen_binop_frm): Ditto.
5041 (class vfmacc_frm): Ditto.
5042 (class vfnmacc_frm): Ditto.
5043 (class vfmsac_frm): Ditto.
5044 (class vfnmsac_frm): Ditto.
5045 (class vfmadd_frm): Ditto.
5046 (class vfnmadd_frm): Ditto.
5047 (class vfmsub_frm): Ditto.
5048 (class vfnmsub_frm): Ditto.
5049 (class vfwmacc_frm): Ditto.
5050 (class vfwnmacc_frm): Ditto.
5051 (class vfwmsac_frm): Ditto.
5052 (class vfwnmsac_frm): Ditto.
5053 (class unop_frm): Ditto.
5054 (class vfrec7_frm): Ditto.
5055 (class binop): Add frm_op_type template arg.
5056 (class unop): Ditto.
5057 (class widen_binop): Ditto.
5058 (class widen_binop_fp): Ditto.
5059 (class reverse_binop): Ditto.
5060 (class vfmacc): Ditto.
5061 (class vfnmsac): Ditto.
5062 (class vfmadd): Ditto.
5063 (class vfnmsub): Ditto.
5064 (class vfnmacc): Ditto.
5065 (class vfmsac): Ditto.
5066 (class vfnmadd): Ditto.
5067 (class vfmsub): Ditto.
5068 (class vfwmacc): Ditto.
5069 (class vfwnmacc): Ditto.
5070 (class vfwmsac): Ditto.
5071 (class vfwnmsac): Ditto.
5072 (class float_misc): Ditto.
5074 2023-08-24 Andrew Pinski <apinski@marvell.com>
5076 PR tree-optimization/111109
5077 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
5078 Add check to make sure cmp and icmp are inverse.
5080 2023-08-24 Andrew Pinski <apinski@marvell.com>
5082 PR tree-optimization/95929
5083 * match.pd (convert?(-a)): New pattern
5084 for 1bit integer types.
5086 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5089 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5091 * common/config/i386/cpuinfo.h (get_available_features):
5092 Add avx10_set and version and detect avx10.1.
5093 (cpu_indicator_init): Handle avx10.1-512.
5094 * common/config/i386/i386-common.cc
5095 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
5096 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
5097 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
5098 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
5099 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
5100 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
5102 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5103 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
5104 FEATURE_AVX10_512BIT.
5105 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5106 AVX10_512BIT, AVX10_1 and AVX10_1_512.
5107 * config/i386/constraints.md (Yk): Add AVX10_1.
5110 * config/i386/cpuid.h (bit_AVX10): New.
5111 (bit_AVX10_256): Ditto.
5112 (bit_AVX10_512): Ditto.
5113 * config/i386/i386-c.cc (ix86_target_macros_internal):
5114 Define AVX10_512BIT and AVX10_1.
5115 * config/i386/i386-isa.def
5116 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
5117 (AVX10_1): Add DEF_PTA(AVX10_1).
5118 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
5119 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
5121 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
5122 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
5123 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
5124 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
5125 (ix86_conditional_register_usage): Ditto.
5126 (ix86_hard_regno_mode_ok): Ditto.
5127 (ix86_rtx_costs): Ditto.
5128 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
5129 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
5131 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
5132 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
5133 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
5136 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5139 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5141 * common/config/i386/i386-common.cc
5142 (ix86_check_avx10): New function to check isa_flags and
5143 isa_flags_explicit to emit warning when AVX10 is enabled
5145 (ix86_check_avx512): New function to check isa_flags and
5146 isa_flags_explicit to emit warning when AVX512 is enabled
5148 (ix86_handle_option): Do not change the flags when warning
5150 * config/i386/driver-i386.cc (host_detect_local_cpu):
5151 Do not append -mno-avx10.1 for -march=native.
5153 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5156 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5158 * common/config/i386/i386-common.cc
5159 (ix86_check_avx10_vector_width): New function to check isa_flags
5160 to emit a warning when there is a conflict in AVX10 options for
5162 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
5163 * config/i386/driver-i386.cc (host_detect_local_cpu):
5164 Do not append -mno-avx10-max-512bit for -march=native.
5166 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5169 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5171 * config/i386/avx512vldqintrin.h: Remove target attribute.
5172 * config/i386/i386-builtin.def (BDESC):
5173 Add OPTION_MASK_ISA2_AVX10_1.
5174 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
5175 * config/i386/i386-expand.cc
5176 (ix86_check_builtin_isa_match): Ditto.
5177 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
5178 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
5179 and avx10_1_or_avx512vl.
5180 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
5181 (VF1_128_256VLDQ_AVX10_1): Ditto.
5182 (VI8_AVX512VLDQ_AVX10_1): Ditto.
5183 (<sse>_andnot<mode>3<mask_name>):
5184 Add TARGET_AVX10_1 and change isa attr from avx512dq to
5185 avx10_1_or_avx512dq.
5186 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
5187 avx512vl to avx10_1_or_avx512vl.
5188 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
5189 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5190 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5192 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5194 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
5195 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5196 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5198 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5199 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
5200 Remove target check.
5201 (avx512dq_mul<mode>3<mask_name>): Ditto.
5202 (*avx512dq_mul<mode>3<mask_name>): Ditto.
5203 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5204 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
5205 Remove target check.
5206 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5207 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
5208 Remove target check.
5209 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
5210 (mask_avx512vl_condition): Ditto.
5213 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5216 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5218 * config/i386/avx512vldqintrin.h: Remove target attribute.
5219 * config/i386/i386-builtin.def (BDESC):
5220 Add OPTION_MASK_ISA2_AVX10_1.
5221 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
5222 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
5223 (VI48_AVX512VLDQ_AVX10_1): Ditto.
5224 (VF2_AVX512VL): Remove.
5225 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
5227 (*<code><mode>3<mask_name>): Change isa attribute to
5228 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
5229 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
5230 to avx10_1_or_avx512vl.
5231 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
5232 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5233 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
5235 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
5236 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5237 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
5239 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
5240 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5241 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
5242 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5243 (float<floatunssuffix>v4div4sf2<mask_name>):
5245 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5246 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5247 (float<floatunssuffix>v2div2sf2): Ditto.
5248 (float<floatunssuffix>v2div2sf2_mask): Ditto.
5249 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
5250 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
5251 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
5252 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
5253 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
5254 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
5255 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
5256 Change when constraint is enabled.
5258 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5261 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5263 * config/i386/avx512vldqintrin.h: Remove target attribute.
5264 * config/i386/i386-builtin.def (BDESC):
5265 Add OPTION_MASK_ISA2_AVX10_1.
5266 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
5267 (VFH_AVX512VLDQ_AVX10_1): Ditto.
5268 (VF1_AVX512VLDQ_AVX10_1): Ditto.
5269 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
5270 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5271 (vec_pack<floatprefix>_float_<mode>): Change iterator to
5272 VI8_AVX512VLDQ_AVX10_1. Remove target check.
5273 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
5274 VF1_AVX512VLDQ_AVX10_1. Remove target check.
5275 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5276 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
5277 (avx512vl_vextractf128<mode>): Change iterator to
5278 VI48F_256_DQVL_AVX10_1. Remove target check.
5279 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
5280 (vec_extract_hi_<mode>): Ditto.
5281 (avx512vl_vinsert<mode>): Ditto.
5282 (vec_set_lo_<mode><mask_name>): Ditto.
5283 (vec_set_hi_<mode><mask_name>): Ditto.
5284 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
5285 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
5286 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
5287 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5288 * config/i386/subst.md (mask_avx512dq_condition): Add
5290 (mask_scalar_merge): Ditto.
5292 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5295 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
5298 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
5301 2023-08-24 Richard Biener <rguenther@suse.de>
5304 * dwarf2out.cc (prune_unused_types_walk): Handle
5305 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
5306 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
5307 and DW_TAG_dynamic_type as to only output them when referenced.
5309 2023-08-24 liuhongt <hongtao.liu@intel.com>
5311 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
5314 2023-08-24 liuhongt <hongtao.liu@intel.com>
5316 * common/config/i386/i386-common.cc (processor_names): Add new
5317 member graniterapids-s and arrowlake-s.
5318 * config/i386/i386-options.cc (processor_alias_table): Update
5319 table with PROCESSOR_ARROWLAKE_S and
5320 PROCESSOR_GRANITERAPIDS_D.
5321 (m_GRANITERAPID_D): New macro.
5322 (m_ARROWLAKE_S): Ditto.
5323 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
5324 (processor_cost_table): Add icelake_cost for
5325 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
5326 PROCESSOR_ARROWLAKE_S.
5327 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
5329 * config/i386/i386.h (enum processor_type): Add new member
5330 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
5331 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
5332 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
5334 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
5336 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
5337 to help simplify code further.
5339 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
5341 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
5342 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
5343 Initialize using a range instead of value and edge.
5344 (phi_group::calculate_using_modifier): Use initializer value and
5345 process for relations after trying for iteration convergence.
5346 (phi_group::refine_using_relation): Use initializer range.
5347 (phi_group::dump): Rework the dump output.
5348 (phi_analyzer::process_phi): Allow multiple constant initilizers.
5349 Dump groups immediately as created.
5350 (phi_analyzer::dump): Tweak output.
5351 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
5352 (phi_group::initial_value): Delete.
5353 (phi_group::refine_using_relation): Adjust prototype.
5354 (phi_group::m_initial_value): Delete.
5355 (phi_group::m_initial_edge): Delete.
5356 (phi_group::m_vr): Use int_range_max.
5357 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
5359 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
5361 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
5362 no group was created.
5363 (phi_analyzer::process_phi): Do not create groups of one phi node.
5365 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
5367 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
5368 CODE, CMP_CODE and BIT_CODE arguments.
5369 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
5370 (aarch64_gen_ccmp_next): Likewise.
5371 * doc/tm.texi: Regenerated.
5373 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
5375 * coretypes.h (rtx_code): Add forward declaration.
5376 * rtl.h (rtx_code): Make compatible with forward declaration.
5378 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
5381 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
5382 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
5383 DWIH mode iterator. Disable (=&r,m,m) alternative for
5385 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
5386 alternative for 32-bit targets.
5388 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
5390 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
5391 appropriate type attribute.
5393 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
5395 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
5396 (*copysign<mode>_neg): Ditto.
5397 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
5398 (<optab><mode>2): Ditto.
5399 (cond_<optab><mode>): New.
5400 (cond_len_<optab><mode>): Ditto.
5401 * config/riscv/riscv-protos.h (enum insn_type): New.
5402 (expand_cond_len_unop): New helper func.
5403 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
5404 (expand_cond_len_unop): New helper func.
5406 2023-08-23 Jan Hubicka <jh@suse.cz>
5408 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
5409 (should_duplicate_loop_header_p): Fix return value for static exits.
5410 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
5412 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5414 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
5415 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
5416 and update the final nest accordingly.
5418 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5420 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
5421 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
5422 and update the final nest accordingly.
5424 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5426 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
5427 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
5428 gvec_oprnds with auto_delete_vec.
5430 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5432 * config/riscv/riscv-vsetvl.cc
5433 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
5435 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5437 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
5439 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
5441 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5443 * config/riscv/vector.md: Add attribute.
5445 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5447 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
5448 (vector_infos_manager::all_same_ratio_p): Ditto.
5449 (vector_infos_manager::all_same_avl_p): Ditto.
5450 (pass_vsetvl::refine_vsetvls): Ditto.
5451 (pass_vsetvl::cleanup_vsetvls): Ditto.
5452 (pass_vsetvl::commit_vsetvls): Ditto.
5453 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
5454 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
5455 (pass_vsetvl::compute_probabilities): Ditto.
5457 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5459 * config/riscv/t-riscv: Add riscv-vsetvl.def
5461 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
5463 * config/riscv/riscv.opt: Add --param names
5464 riscv-autovec-preference and riscv-autovec-lmul
5466 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
5468 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
5470 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
5472 * tree-core.h (enum omp_clause_defaultmap_kind): Add
5473 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
5474 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
5475 * tree-pretty-print.cc (dump_omp_clause): Likewise.
5477 2023-08-22 Jakub Jelinek <jakub@redhat.com>
5480 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
5481 types aren't supported in C++.
5483 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5485 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
5486 * internal-fn.cc (fold_len_extract_direct): Ditto.
5487 (expand_fold_len_extract_optab_fn): Ditto.
5488 (direct_fold_len_extract_optab_supported_p): Ditto.
5489 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
5490 * optabs.def (OPTAB_D): Ditto.
5492 2023-08-22 Richard Biener <rguenther@suse.de>
5494 * tree-vect-stmts.cc (vectorizable_store): Do not bump
5495 DR_GROUP_STORE_COUNT here. Remove early out.
5496 (vect_transform_stmt): Only call vectorizable_store on
5497 the last element of an interleaving chain.
5499 2023-08-22 Richard Biener <rguenther@suse.de>
5501 PR tree-optimization/94864
5502 PR tree-optimization/94865
5503 PR tree-optimization/93080
5504 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
5505 for vector insertion from vector extraction.
5507 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5508 Kewen.Lin <linkw@linux.ibm.com>
5510 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
5511 (vectorizable_live_operation): Add live vectorization for length loop
5514 2023-08-22 David Malcolm <dmalcolm@redhat.com>
5517 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
5519 2023-08-22 Pan Li <pan2.li@intel.com>
5521 * config/riscv/riscv-vector-builtins-bases.cc
5522 (vfwredusum_frm_obj): New declaration.
5524 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5525 * config/riscv/riscv-vector-builtins-functions.def
5526 (vfwredusum_frm): New intrinsic function def.
5528 2023-08-21 David Faust <david.faust@oracle.com>
5530 * config/bpf/bpf.md (neg): Second operand must be a register.
5532 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
5534 * config/riscv/bitmanip.md: Added bitmanip type to insns
5535 that are missing types.
5537 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
5539 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
5542 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5544 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
5545 Fix format specifier.
5547 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
5549 * value-range.cc (frange::union_nans): Return false if nothing
5551 (range_tests_floats): New test.
5553 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
5555 PR tree-optimization/111048
5556 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
5558 (fold_vec_perm_cst): Remove workaround and again call
5559 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
5560 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
5562 2023-08-21 Richard Biener <rguenther@suse.de>
5564 PR tree-optimization/111082
5565 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
5566 pun operations that can overflow.
5568 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5570 * lcm.cc (compute_antinout_edge): Export as global use.
5571 (compute_earliest): Ditto.
5572 (compute_rev_insert_delete): Ditto.
5573 * lcm.h (compute_antinout_edge): Ditto.
5574 (compute_earliest): Ditto.
5576 2023-08-21 Richard Biener <rguenther@suse.de>
5578 PR tree-optimization/111070
5579 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
5580 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
5582 2023-08-21 Andrew Pinski <apinski@marvell.com>
5584 PR tree-optimization/111002
5585 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
5587 2023-08-21 liuhongt <hongtao.liu@intel.com>
5589 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
5591 * common/config/i386/i386-common.cc (alias_table): Support
5592 -march=gracemont as an alias of -march=alderlake.
5594 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
5596 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
5597 instead of src in the call to ix86_expand_sse_cmp.
5598 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
5599 force operands[1] to a register.
5600 (<any_extend:insn>v4hiv4si2): Ditto.
5601 (<any_extend:insn>v2siv2di2): Ditto.
5603 2023-08-20 Andrew Pinski <apinski@marvell.com>
5605 PR tree-optimization/111006
5606 PR tree-optimization/110986
5607 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
5609 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
5612 * Makefile.in: improve error message when /usr/include is
5615 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
5617 PR middle-end/111017
5618 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
5619 to expand_omp_build_cond for 'factor != 0' condition, resulting
5620 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
5622 2023-08-19 Guo Jie <guojie@loongson.cn>
5623 Lulu Cheng <chenglulu@loongson.cn>
5625 * config/loongarch/t-loongarch: Add loongarch-driver.h into
5626 TM_H. Add loongarch-def.h and loongarch-tune.h into
5629 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
5632 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
5633 Also handle V2QImode.
5634 (ix86_expand_sse_extend): New function.
5635 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
5636 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
5637 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
5638 (<any_extend:insn>v2hiv2si2): Ditto.
5639 (<any_extend:insn>v2qiv2hi2): Ditto.
5640 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
5641 (<any_extend:insn>v4hiv4si2): Ditto.
5642 (<any_extend:insn>v2siv2di2): Ditto.
5644 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
5647 * value-range.cc (irange::union_bitmask): Return FALSE if updated
5648 bitmask is semantically equivalent to the original mask.
5649 (irange::intersect_bitmask): Same.
5650 (irange::get_bitmask): Add comment.
5652 2023-08-18 Richard Biener <rguenther@suse.de>
5654 PR tree-optimization/111019
5655 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
5656 also scrap base and offset in case the ref is indirect.
5658 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
5660 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
5662 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
5665 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
5667 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
5669 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
5671 (vectorizable_store): ... here.
5673 2023-08-18 Richard Biener <rguenther@suse.de>
5675 PR tree-optimization/111048
5676 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
5679 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
5682 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
5685 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
5687 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
5688 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
5689 and update the final nest accordingly.
5691 2023-08-18 Andrew Pinski <apinski@marvell.com>
5693 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
5694 cond_len_neg and cond_len_one_cmpl.
5696 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
5698 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
5699 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
5700 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
5701 (*local_pic_load_32d<ANYF:mode>): Ditto.
5702 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
5703 (*local_pic_store<ANYF:mode>): Ditto.
5704 (*local_pic_store<ANYLSF:mode>): Ditto.
5705 (*local_pic_store_32d<ANYF:mode>): Ditto.
5706 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
5708 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
5709 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
5711 * config/riscv/predicates.md (vector_const_0_operand): New.
5712 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
5714 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
5716 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
5719 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
5721 PR tree-optimization/111009
5722 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
5724 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
5726 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
5727 slots_num initialization from here ...
5728 (lra_spill): ... to here before the 1st call of
5729 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
5732 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
5735 * doc/invoke.texi (Option Summary): Mention
5736 -Wcompare-distinct-pointer-types under `Warning Options'.
5737 (Warning Options): Document -Wcompare-distinct-pointer-types.
5739 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
5741 * recog.cc (memory_address_addr_space_p): Mark possibly unused
5744 2023-08-17 Richard Biener <rguenther@suse.de>
5746 PR tree-optimization/111039
5747 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
5748 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
5750 2023-08-17 Alex Coplan <alex.coplan@arm.com>
5752 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
5754 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
5757 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
5758 `naked' function attribute.
5759 (bpf_warn_func_return): New function.
5760 (TARGET_WARN_FUNC_RETURN): Define.
5761 (bpf_expand_prologue): Add preventive comment.
5762 (bpf_expand_epilogue): Likewise.
5763 * doc/extend.texi (BPF Function Attributes): Document the `naked'
5766 2023-08-17 Richard Biener <rguenther@suse.de>
5768 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
5769 !needs_fold_left_reduction_p to decide whether we can
5770 handle the reduction with association.
5771 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
5772 reductions perform all arithmetic in an unsigned type.
5774 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5776 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
5778 * configure: Regenerate.
5780 2023-08-17 Pan Li <pan2.li@intel.com>
5782 * config/riscv/riscv-vector-builtins-bases.cc
5783 (widen_freducop): Add frm_opt_type template arg.
5784 (vfwredosum_frm_obj): New declaration.
5786 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5787 * config/riscv/riscv-vector-builtins-functions.def
5788 (vfwredosum_frm): New intrinsic function def.
5790 2023-08-17 Pan Li <pan2.li@intel.com>
5792 * config/riscv/riscv-vector-builtins-bases.cc
5793 (vfredosum_frm_obj): New declaration.
5795 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5796 * config/riscv/riscv-vector-builtins-functions.def
5797 (vfredosum_frm): New intrinsic function def.
5799 2023-08-17 Pan Li <pan2.li@intel.com>
5801 * config/riscv/riscv-vector-builtins-bases.cc
5802 (class freducop): Add frm_op_type template arg.
5803 (vfredusum_frm_obj): New declaration.
5805 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5806 * config/riscv/riscv-vector-builtins-functions.def
5807 (vfredusum_frm): New intrinsic function def.
5808 * config/riscv/riscv-vector-builtins-shapes.cc
5809 (struct reduc_alu_frm_def): New class for frm shape.
5810 (SHAPE): New declaration.
5811 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5813 2023-08-17 Pan Li <pan2.li@intel.com>
5815 * config/riscv/riscv-vector-builtins-bases.cc
5816 (class vfncvt_f): Add frm_op_type template arg.
5817 (vfncvt_f_frm_obj): New declaration.
5819 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5820 * config/riscv/riscv-vector-builtins-functions.def
5821 (vfncvt_f_frm): New intrinsic function def.
5823 2023-08-17 Pan Li <pan2.li@intel.com>
5825 * config/riscv/riscv-vector-builtins-bases.cc
5826 (vfncvt_xu_frm_obj): New declaration.
5828 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5829 * config/riscv/riscv-vector-builtins-functions.def
5830 (vfncvt_xu_frm): New intrinsic function def.
5832 2023-08-17 Pan Li <pan2.li@intel.com>
5834 * config/riscv/riscv-vector-builtins-bases.cc
5835 (class vfncvt_x): Add frm_op_type template arg.
5836 (BASE): New declaration.
5837 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5838 * config/riscv/riscv-vector-builtins-functions.def
5839 (vfncvt_x_frm): New intrinsic function def.
5840 * config/riscv/riscv-vector-builtins-shapes.cc
5841 (struct narrow_alu_frm_def): New shape function for frm.
5842 (SHAPE): New declaration.
5843 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5845 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5847 * config/i386/avx512vldqintrin.h: Remove target attribute.
5848 * config/i386/i386-builtin.def (BDESC):
5849 Add OPTION_MASK_ISA2_AVX10_1.
5850 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
5851 (VFH_AVX512VLDQ_AVX10_1): Ditto.
5852 (VF1_AVX512VLDQ_AVX10_1): Ditto.
5853 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
5854 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5855 (vec_pack<floatprefix>_float_<mode>): Change iterator to
5856 VI8_AVX512VLDQ_AVX10_1. Remove target check.
5857 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
5858 VF1_AVX512VLDQ_AVX10_1. Remove target check.
5859 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5860 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
5861 (avx512vl_vextractf128<mode>): Change iterator to
5862 VI48F_256_DQVL_AVX10_1. Remove target check.
5863 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
5864 (vec_extract_hi_<mode>): Ditto.
5865 (avx512vl_vinsert<mode>): Ditto.
5866 (vec_set_lo_<mode><mask_name>): Ditto.
5867 (vec_set_hi_<mode><mask_name>): Ditto.
5868 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
5869 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
5870 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
5871 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5872 * config/i386/subst.md (mask_avx512dq_condition): Add
5874 (mask_scalar_merge): Ditto.
5876 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5878 * config/i386/avx512vldqintrin.h: Remove target attribute.
5879 * config/i386/i386-builtin.def (BDESC):
5880 Add OPTION_MASK_ISA2_AVX10_1.
5881 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
5882 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
5883 (VI48_AVX512VLDQ_AVX10_1): Ditto.
5884 (VF2_AVX512VL): Remove.
5885 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
5887 (*<code><mode>3<mask_name>): Change isa attribute to
5888 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
5889 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
5890 to avx10_1_or_avx512vl.
5891 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
5892 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5893 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
5895 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
5896 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5897 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
5899 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
5900 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5901 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
5902 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5903 (float<floatunssuffix>v4div4sf2<mask_name>):
5905 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5906 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5907 (float<floatunssuffix>v2div2sf2): Ditto.
5908 (float<floatunssuffix>v2div2sf2_mask): Ditto.
5909 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
5910 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
5911 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
5912 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
5913 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
5914 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
5915 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
5916 Change when constraint is enabled.
5918 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5921 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
5922 (second_sew_less_than_first_sew_p): Fix bug.
5923 (first_sew_less_than_second_sew_p): Ditto.
5925 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5927 * config/i386/avx512vldqintrin.h: Remove target attribute.
5928 * config/i386/i386-builtin.def (BDESC):
5929 Add OPTION_MASK_ISA2_AVX10_1.
5930 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
5931 * config/i386/i386-expand.cc
5932 (ix86_check_builtin_isa_match): Ditto.
5933 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
5934 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
5935 and avx10_1_or_avx512vl.
5936 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
5937 (VF1_128_256VLDQ_AVX10_1): Ditto.
5938 (VI8_AVX512VLDQ_AVX10_1): Ditto.
5939 (<sse>_andnot<mode>3<mask_name>):
5940 Add TARGET_AVX10_1 and change isa attr from avx512dq to
5941 avx10_1_or_avx512dq.
5942 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
5943 avx512vl to avx10_1_or_avx512vl.
5944 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
5945 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5946 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5948 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5950 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
5951 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5952 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5954 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5955 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
5956 Remove target check.
5957 (avx512dq_mul<mode>3<mask_name>): Ditto.
5958 (*avx512dq_mul<mode>3<mask_name>): Ditto.
5959 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5960 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
5961 Remove target check.
5962 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5963 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
5964 Remove target check.
5965 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
5966 (mask_avx512vl_condition): Ditto.
5969 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5971 * common/config/i386/i386-common.cc
5972 (ix86_check_avx10_vector_width): New function to check isa_flags
5973 to emit a warning when there is a conflict in AVX10 options for
5975 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
5976 * config/i386/driver-i386.cc (host_detect_local_cpu):
5977 Do not append -mno-avx10-max-512bit for -march=native.
5979 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5981 * common/config/i386/i386-common.cc
5982 (ix86_check_avx10): New function to check isa_flags and
5983 isa_flags_explicit to emit warning when AVX10 is enabled
5985 (ix86_check_avx512): New function to check isa_flags and
5986 isa_flags_explicit to emit warning when AVX512 is enabled
5988 (ix86_handle_option): Do not change the flags when warning
5990 * config/i386/driver-i386.cc (host_detect_local_cpu):
5991 Do not append -mno-avx10.1 for -march=native.
5993 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5995 * common/config/i386/cpuinfo.h (get_available_features):
5996 Add avx10_set and version and detect avx10.1.
5997 (cpu_indicator_init): Handle avx10.1-512.
5998 * common/config/i386/i386-common.cc
5999 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
6000 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
6001 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
6002 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
6003 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
6004 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
6006 * common/config/i386/i386-cpuinfo.h (enum processor_features):
6007 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
6008 FEATURE_AVX10_512BIT.
6009 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
6010 AVX10_512BIT, AVX10_1 and AVX10_1_512.
6011 * config/i386/constraints.md (Yk): Add AVX10_1.
6014 * config/i386/cpuid.h (bit_AVX10): New.
6015 (bit_AVX10_256): Ditto.
6016 (bit_AVX10_512): Ditto.
6017 * config/i386/i386-c.cc (ix86_target_macros_internal):
6018 Define AVX10_512BIT and AVX10_1.
6019 * config/i386/i386-isa.def
6020 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
6021 (AVX10_1): Add DEF_PTA(AVX10_1).
6022 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
6023 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
6025 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
6026 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
6027 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
6028 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
6029 (ix86_conditional_register_usage): Ditto.
6030 (ix86_hard_regno_mode_ok): Ditto.
6031 (ix86_rtx_costs): Ditto.
6032 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
6033 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
6035 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
6036 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
6037 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
6040 2023-08-17 Sergei Trofimovich <siarheit@google.com>
6042 * flag-types.h (vrp_mode): Remove unused.
6044 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
6046 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
6049 2023-08-17 Andrew Pinski <apinski@marvell.com>
6051 * internal-fn.def (COND_NOT): New internal function.
6052 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
6054 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
6055 into conditional not.
6056 * optabs.def (cond_one_cmpl): New optab.
6057 (cond_len_one_cmpl): Likewise.
6059 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
6061 PR rtl-optimization/110254
6062 * ira-color.cc (improve_allocation): Update array
6063 allocated_hard_reg_p.
6065 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
6067 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
6068 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
6069 (lra_update_fp2sp_elimination): Ditto.
6070 (update_reg_eliminate): Adjust spill_pseudos call.
6071 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
6072 in lra_update_fp2sp_elimination.
6074 2023-08-16 Richard Ball <richard.ball@arm.com>
6076 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
6077 * config/aarch64/aarch64-tune.md: Regenerate.
6078 * doc/invoke.texi: Document Cortex-A720 CPU.
6080 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
6082 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
6084 (<u>avg<v_double_trunc>3_ceil): Ditto.
6085 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
6088 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
6090 * internal-fn.cc (vec_extract_direct): Change type argument
6092 (expand_vec_extract_optab_fn): Call convert_optab_fn.
6093 (direct_vec_extract_optab_supported_p): Use
6094 convert_optab_supported_p.
6096 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6097 Richard Sandiford <richard.sandiford@arm.com>
6099 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
6100 (valid_mask_for_fold_vec_perm_cst_p): New function.
6101 (fold_vec_perm_cst): Likewise.
6102 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
6103 (test_fold_vec_perm_cst): New namespace.
6104 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
6105 (test_fold_vec_perm_cst::validate_res): Likewise.
6106 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
6107 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
6108 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
6109 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
6110 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
6111 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
6112 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
6113 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
6114 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
6115 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
6116 (test_fold_vec_perm_cst::test): Likewise.
6117 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
6119 2023-08-16 Pan Li <pan2.li@intel.com>
6121 * config/riscv/riscv-vector-builtins-bases.cc
6122 (BASE): New declaration.
6123 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6124 * config/riscv/riscv-vector-builtins-functions.def
6125 (vfwcvt_xu_frm): New intrinsic function def.
6127 2023-08-16 Pan Li <pan2.li@intel.com>
6129 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
6131 2023-08-16 Pan Li <pan2.li@intel.com>
6133 * config/riscv/riscv-vector-builtins-bases.cc
6134 (BASE): New declaration.
6135 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6136 * config/riscv/riscv-vector-builtins-functions.def
6137 (vfwcvt_x_frm): New intrinsic function def.
6139 2023-08-16 Pan Li <pan2.li@intel.com>
6141 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
6142 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6143 * config/riscv/riscv-vector-builtins-functions.def
6144 (vfcvt_f_frm): New intrinsic function def.
6146 2023-08-16 Pan Li <pan2.li@intel.com>
6148 * config/riscv/riscv-vector-builtins-bases.cc
6149 (BASE): New declaration.
6150 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6151 * config/riscv/riscv-vector-builtins-functions.def
6152 (vfcvt_xu_frm): New intrinsic function def..
6154 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
6157 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
6158 extract when the element is 7 on BE while 8 on LE for byte or 3 on
6159 BE while 4 on LE for halfword.
6161 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
6164 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
6166 (vsx_extract_v4si): New expand for V4SI extraction.
6167 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
6168 word 1 from BE order.
6169 (*mfvsrwz): New insn pattern for mfvsrwz.
6170 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
6171 word 1 from BE order.
6172 (*vsx_extract_si): Remove.
6173 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
6176 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6178 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
6180 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
6181 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
6182 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
6183 (expand_lanes_load_store): New function.
6184 * config/riscv/vector-iterators.md: New iterator.
6186 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6188 * internal-fn.cc (internal_load_fn_p): Apply
6189 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
6190 (internal_store_fn_p): Ditto.
6191 (internal_fn_len_index): Ditto.
6192 (internal_fn_mask_index): Ditto.
6193 (internal_fn_stored_value_index): Ditto.
6194 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
6195 (vect_load_lanes_supported): Ditto.
6196 * tree-vect-loop.cc: Ditto.
6197 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
6198 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
6199 (get_group_load_store_type): Ditto.
6200 (vectorizable_store): Ditto.
6201 (vectorizable_load): Ditto.
6202 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
6203 (vect_load_lanes_supported): Ditto.
6205 2023-08-16 Pan Li <pan2.li@intel.com>
6207 * config/riscv/riscv-vector-builtins-bases.cc
6208 (enum frm_op_type): New type for frm.
6209 (BASE): New declaration.
6210 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6211 * config/riscv/riscv-vector-builtins-functions.def
6212 (vfcvt_x_frm): New intrinsic function def.
6214 2023-08-16 liuhongt <hongtao.liu@intel.com>
6216 * config/i386/i386-builtins.cc
6217 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
6218 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
6219 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
6220 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
6221 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
6222 for use_scatter_8parts
6223 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
6224 (TARGET_USE_GATHER_8PARTS): .. this.
6225 (TARGET_USE_SCATTER): Rename to ..
6226 (TARGET_USE_SCATTER_8PARTS): .. this.
6227 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
6228 (X86_TUNE_USE_GATHER_8PARTS): .. this.
6229 (X86_TUNE_USE_SCATTER): Rename to
6230 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
6231 * config/i386/i386.opt: Add new options mgather, mscatter.
6233 2023-08-16 liuhongt <hongtao.liu@intel.com>
6235 * config/i386/i386-options.cc (m_GDS): New macro.
6236 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
6238 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
6239 (X86_TUNE_USE_GATHER): Ditto.
6241 2023-08-16 liuhongt <hongtao.liu@intel.com>
6243 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
6244 vmovsd when moving DFmode between SSE_REGS.
6245 (movhi_internal): Generate vmovdqa instead of vmovsh when
6246 moving HImode between SSE_REGS.
6247 (mov<mode>_internal): Use vmovaps instead of vmovsh when
6248 moving HF/BFmode between SSE_REGS.
6250 2023-08-15 David Faust <david.faust@oracle.com>
6252 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
6254 2023-08-15 David Faust <david.faust@oracle.com>
6257 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
6258 for any mode 32-bits or smaller, not just SImode.
6260 2023-08-15 Martin Jambor <mjambor@suse.cz>
6264 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
6265 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
6266 (ipcp_transform_function): Do not deallocate transformation info.
6267 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
6269 (vn_reference_lookup_2): When hitting default-def vuse, query
6270 IPA-CP transformation info for any known constants.
6272 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
6273 Thomas Schwinge <thomas@codesourcery.com>
6275 * gimplify.cc (oacc_region_type_name): New function.
6276 (oacc_default_clause): If no 'default' clause appears on this
6277 compute construct, see if one appears on a lexically containing
6279 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
6280 ctx->oacc_default_clause_ctx to current context.
6282 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6285 * config/riscv/predicates.md: Fix predicate.
6287 2023-08-15 Richard Biener <rguenther@suse.de>
6289 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
6290 slp_inst_kind_ctor handling.
6291 (vect_analyze_slp): Simplify.
6292 (vect_build_slp_instance): Dump when we analyze a CTOR.
6293 (vect_slp_check_for_constructors): Rename to ...
6294 (vect_slp_check_for_roots): ... this. Register a
6295 slp_root for CONSTRUCTORs instead of shoving them to
6296 the set of grouped stores.
6297 (vect_slp_analyze_bb_1): Adjust.
6299 2023-08-15 Richard Biener <rguenther@suse.de>
6301 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
6303 (_slp_instance::remain_defs): ... this.
6304 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
6305 (SLP_INSTANCE_REMAIN_DEFS): ... this.
6306 (slp_root::remain): New.
6307 (slp_root::slp_root): Adjust.
6308 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
6309 (vect_build_slp_instance): Get extra remain parameter,
6310 adjust former handling of a cut off stmt.
6311 (vect_analyze_slp_instance): Adjust.
6312 (vect_analyze_slp): Likewise.
6313 (_bb_vec_info::~_bb_vec_info): Likewise.
6314 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
6315 (vect_slp_check_for_constructors): Handle non-internal
6316 defs as remain defs of a reduction.
6317 (vectorize_slp_instance_root_stmt): Adjust.
6319 2023-08-15 Richard Biener <rguenther@suse.de>
6321 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
6322 (canonicalize_loop_induction_variables): Use find_loop_location.
6324 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
6327 * config/cris/cris-protos.h: Revert recent change.
6328 * config/cris/cris.cc (cris_legitimate_address_p): Remove
6329 code_helper unused parameter.
6330 (cris_legitimate_address_p_hook): New wrapper function.
6331 (TARGET_LEGITIMATE_ADDRESS_P): Change to
6332 cris_legitimate_address_p_hook.
6334 2023-08-15 Richard Biener <rguenther@suse.de>
6336 PR tree-optimization/110963
6337 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
6338 a PHI node when the expression is available on all edges
6339 and we insert at most one copy from a constant.
6341 2023-08-15 Richard Biener <rguenther@suse.de>
6343 PR tree-optimization/110991
6344 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
6345 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
6346 that will end up constant.
6348 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6351 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
6353 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6355 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
6356 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
6357 and update the final nest accordingly.
6359 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6361 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
6364 2023-08-15 Pan Li <pan2.li@intel.com>
6366 * mode-switching.cc (create_pre_exit): Add SET insn check.
6368 2023-08-15 Pan Li <pan2.li@intel.com>
6370 * config/riscv/riscv-vector-builtins-bases.cc
6371 (class vfrec7_frm): New class for frm.
6372 (vfrec7_frm_obj): New declaration.
6374 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6375 * config/riscv/riscv-vector-builtins-functions.def
6376 (vfrec7_frm): New intrinsic function definition.
6377 * config/riscv/vector-iterators.md
6378 (VFMISC): Remove VFREC7.
6380 (float_insn_type): Ditto.
6381 (VFMISC_FRM): New int iterator.
6382 (misc_frm_op): New op for frm.
6383 (float_frm_insn_type): New type for frm.
6384 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
6385 New pattern for misc frm.
6387 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
6389 * lra-constraints.cc (curr_insn_transform): Process output stack
6390 pointer reloads before emitting reload insns.
6392 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
6395 * doc/invoke.texi: Add documentation of
6396 fanalyzer-show-events-in-system-headers
6398 2023-08-14 Jan Hubicka <jh@suse.cz>
6400 PR gcov-profile/110988
6401 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
6403 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
6405 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
6406 Enable compressed builtins when ZC* extensions enabled.
6407 * config/riscv/riscv-shorten-memrefs.cc:
6408 Enable shorten_memrefs pass when ZC* extensions enabled.
6409 * config/riscv/riscv.cc (riscv_compressed_reg_p):
6410 Enable compressible registers when ZC* extensions enabled.
6411 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
6412 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
6413 (riscv_first_stack_step): Allow compression of the register saves
6414 without adding extra instructions.
6415 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
6416 to 16 bits when ZC* extensions enabled.
6418 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
6420 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
6421 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
6428 (TARGET_ZCA): New target.
6429 (TARGET_ZCB): Ditto.
6430 (TARGET_ZCE): Ditto.
6431 (TARGET_ZCF): Ditto.
6432 (TARGET_ZCD): Ditto.
6433 (TARGET_ZCMP): Ditto.
6434 (TARGET_ZCMT): Ditto.
6435 * config/riscv/riscv.opt: New target variable.
6437 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6440 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
6442 * genrecog.cc (print_nonbool_test): Fix type error of
6443 switch (SUBREG_BYTE (op))'.
6445 2023-08-14 Richard Biener <rguenther@suse.de>
6447 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
6449 2023-08-14 Pan Li <pan2.li@intel.com>
6451 * config/riscv/riscv-vector-builtins-bases.cc
6452 (class unop_frm): New class for frm.
6453 (vfsqrt_frm_obj): New declaration.
6455 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6456 * config/riscv/riscv-vector-builtins-functions.def
6457 (vfsqrt_frm): New intrinsic function definition.
6459 2023-08-14 Pan Li <pan2.li@intel.com>
6461 * config/riscv/riscv-vector-builtins-bases.cc
6462 (class vfwnmsac_frm): New class for frm.
6463 (vfwnmsac_frm_obj): New declaration.
6465 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6466 * config/riscv/riscv-vector-builtins-functions.def
6467 (vfwnmsac_frm): New intrinsic function definition.
6469 2023-08-14 Pan Li <pan2.li@intel.com>
6471 * config/riscv/riscv-vector-builtins-bases.cc
6472 (class vfwmsac_frm): New class for frm.
6473 (vfwmsac_frm_obj): New declaration.
6475 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6476 * config/riscv/riscv-vector-builtins-functions.def
6477 (vfwmsac_frm): New intrinsic function definition.
6479 2023-08-14 Pan Li <pan2.li@intel.com>
6481 * config/riscv/riscv-vector-builtins-bases.cc
6482 (class vfwnmacc_frm): New class for frm.
6483 (vfwnmacc_frm_obj): New declaration.
6485 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6486 * config/riscv/riscv-vector-builtins-functions.def
6487 (vfwnmacc_frm): New intrinsic function definition.
6489 2023-08-14 Cui, Lili <lili.cui@intel.com>
6491 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
6494 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6496 * config/mmix/predicates.md (mmix_address_operand): Use
6497 lra_in_progress, not reload_in_progress.
6499 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6501 * config/mmix/mmix.cc: Re-enable LRA.
6503 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6505 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
6506 when lra_in_progress.
6508 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6510 * config/mmix/mmix.cc: Disable LRA for MMIX.
6512 2023-08-14 Pan Li <pan2.li@intel.com>
6514 * config/riscv/riscv-vector-builtins-bases.cc
6515 (class vfwmacc_frm): New class for vfwmacc frm.
6516 (vfwmacc_frm_obj): New declaration.
6518 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6519 * config/riscv/riscv-vector-builtins-functions.def
6520 (vfwmacc_frm): Function definition for vfwmacc.
6521 * config/riscv/riscv-vector-builtins.cc
6522 (function_expander::use_widen_ternop_insn): Add frm support.
6524 2023-08-14 Pan Li <pan2.li@intel.com>
6526 * config/riscv/riscv-vector-builtins-bases.cc
6527 (class vfnmsub_frm): New class for vfnmsub frm.
6528 (vfnmsub_frm): New declaration.
6530 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6531 * config/riscv/riscv-vector-builtins-functions.def
6532 (vfnmsub_frm): New function declaration.
6534 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
6536 * lra-constraints.cc (curr_insn_transform): Set done_p up and
6537 check it on true after processing output stack pointer reload.
6539 2023-08-12 Jakub Jelinek <jakub@redhat.com>
6541 * Makefile.in (USER_H): Add stdckdint.h.
6542 * ginclude/stdckdint.h: New file.
6544 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6547 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
6549 2023-08-12 Patrick Palka <ppalka@redhat.com>
6551 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
6552 Delimit output with braces.
6554 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6557 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
6559 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6561 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
6562 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
6563 * config/riscv/vector.md: Ditto.
6565 2023-08-11 David Malcolm <dmalcolm@redhat.com>
6568 * doc/analyzer.texi (__analyzer_get_strlen): New.
6569 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
6571 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
6573 * config/rx/rx.md (subdi3): Fix test for borrow.
6575 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6577 PR middle-end/110989
6578 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
6579 (vectorizable_load): Ditto.
6581 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
6583 * config/bpf/bpf.md (allocate_stack): Define.
6584 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
6585 stack pointer register.
6586 (FIXED_REGISTERS): Adjust accordingly.
6587 (CALL_USED_REGISTERS): Likewise.
6588 (REG_CLASS_CONTENTS): Likewise.
6589 (REGISTER_NAMES): Likewise.
6590 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
6591 space for callee-saved registers.
6592 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
6593 (bpf_expand_epilogue): Do not restore callee-saved registers in
6596 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
6598 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
6599 about too many arguments if function is always inlined.
6601 2023-08-11 Patrick Palka <ppalka@redhat.com>
6603 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
6604 Don't call component_ref_field_offset if the RHS isn't a decl.
6606 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
6609 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
6611 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
6613 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
6614 (process_alt_operands): Set the flag.
6615 (curr_insn_transform): Modify stack pointer offsets if output
6616 stack pointer reload is generated.
6618 2023-08-11 Joseph Myers <joseph@codesourcery.com>
6620 * configure: Regenerate.
6622 2023-08-11 Richard Biener <rguenther@suse.de>
6624 PR tree-optimization/110979
6625 * tree-vect-loop.cc (vectorizable_reduction): For
6626 FOLD_LEFT_REDUCTION without target support make sure
6627 we don't need to honor signed zeros and sign dependent rounding.
6629 2023-08-11 Richard Biener <rguenther@suse.de>
6631 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
6632 subgraph entries. Dump the used vector size based on the
6633 SLP subgraph entry root vector type.
6635 2023-08-11 Pan Li <pan2.li@intel.com>
6637 * config/riscv/riscv-vector-builtins-bases.cc
6638 (class vfmsub_frm): New class for vfmsub frm.
6639 (vfmsub_frm): New declaration.
6641 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6642 * config/riscv/riscv-vector-builtins-functions.def
6643 (vfmsub_frm): New function declaration.
6645 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6647 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
6648 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
6649 (expand_partial_store_optab_fn): Ditto.
6650 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
6651 (MASK_LEN_STORE_LANES): Ditto.
6652 * optabs.def (OPTAB_CD): Ditto.
6654 2023-08-11 Pan Li <pan2.li@intel.com>
6656 * config/riscv/riscv-vector-builtins-bases.cc
6657 (class vfnmadd_frm): New class for vfnmadd frm.
6658 (vfnmadd_frm): New declaration.
6660 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6661 * config/riscv/riscv-vector-builtins-functions.def
6662 (vfnmadd_frm): New function declaration.
6664 2023-08-11 Drew Ross <drross@redhat.com>
6665 Jakub Jelinek <jakub@redhat.com>
6667 PR tree-optimization/109938
6668 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
6670 2023-08-11 Pan Li <pan2.li@intel.com>
6672 * config/riscv/riscv-vector-builtins-bases.cc
6673 (class vfmadd_frm): New class for vfmadd frm.
6674 (vfmadd_frm_obj): New declaration.
6676 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6677 * config/riscv/riscv-vector-builtins-functions.def
6678 (vfmadd_frm): New function definition.
6680 2023-08-11 Pan Li <pan2.li@intel.com>
6682 * config/riscv/riscv-vector-builtins-bases.cc
6683 (class vfnmsac_frm): New class for vfnmsac frm.
6684 (vfnmsac_frm_obj): New declaration.
6686 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6687 * config/riscv/riscv-vector-builtins-functions.def
6688 (vfnmsac_frm): New function definition.
6690 2023-08-11 Jakub Jelinek <jakub@redhat.com>
6692 * doc/extend.texi (Typeof): Document typeof_unqual
6693 and __typeof_unqual__.
6695 2023-08-11 Andrew Pinski <apinski@marvell.com>
6697 PR tree-optimization/110954
6698 * generic-match-head.cc (bitwise_inverted_equal_p): Add
6699 wascmp argument and set it accordingly.
6700 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
6701 wascmp argument to the macro.
6702 (gimple_bitwise_inverted_equal_p): Add
6703 wascmp argument and set it accordingly.
6704 * match.pd (`a & ~a`, `a ^| ~a`): Update call
6705 to bitwise_inverted_equal_p and handle wascmp case.
6706 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
6707 call to bitwise_inverted_equal_p and check to see
6708 if was !wascmp or if precision was 1.
6710 2023-08-11 Martin Uecker <uecker@tugraz.at>
6713 * doc/invoke.texi: Update.
6715 2023-08-11 Pan Li <pan2.li@intel.com>
6717 * config/riscv/riscv-vector-builtins-bases.cc
6718 (class vfmsac_frm): New class for vfmsac frm.
6719 (vfmsac_frm_obj): New declaration.
6721 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6722 * config/riscv/riscv-vector-builtins-functions.def
6723 (vfmsac_frm): New function definition
6725 2023-08-10 Jan Hubicka <jh@suse.cz>
6727 PR middle-end/110923
6728 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
6730 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
6732 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
6733 dependent on 'a' extension.
6734 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
6735 (TARGET_ZTSO): New target.
6736 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
6738 (riscv_memmodel_needs_amo_release): Add Ztso case.
6739 (riscv_print_operand): Add Ztso case for LR/SC annotations.
6740 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
6741 * config/riscv/riscv.opt: Add Ztso target variable.
6742 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
6744 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
6745 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
6746 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
6747 specific load/store/fence mappings.
6748 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
6749 specific load/store/fence mappings.
6751 2023-08-10 Jan Hubicka <jh@suse.cz>
6753 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
6756 2023-08-10 Jan Hubicka <jh@suse.cz>
6758 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
6760 2023-08-10 Jan Hubicka <jh@suse.cz>
6762 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
6763 handling of undefined values.
6765 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6768 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
6769 return virtual phis and return NULL if there is a virtual phi
6770 where the arguments from E0 and E1 edges aren't equal.
6772 2023-08-10 Richard Biener <rguenther@suse.de>
6774 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
6775 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
6777 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6780 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
6782 2023-08-10 Pan Li <pan2.li@intel.com>
6784 * config/riscv/riscv-vector-builtins-bases.cc
6785 (class vfnmacc_frm): New class for vfnmacc.
6786 (vfnmacc_frm_obj): New declaration.
6788 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6789 * config/riscv/riscv-vector-builtins-functions.def
6790 (vfnmacc_frm): New function definition.
6792 2023-08-10 Pan Li <pan2.li@intel.com>
6794 * config/riscv/riscv-vector-builtins-bases.cc
6795 (class vfmacc_frm): New class for vfmacc frm.
6796 (vfmacc_frm_obj): New declaration.
6798 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6799 * config/riscv/riscv-vector-builtins-functions.def
6800 (vfmacc_frm): New function definition.
6802 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6805 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
6807 2023-08-10 Richard Biener <rguenther@suse.de>
6809 * tree-vectorizer.h (vectorizable_live_operation): Remove
6810 gimple_stmt_iterator * argument.
6811 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
6812 Adjust plumbing around vect_get_loop_mask.
6813 (vect_analyze_loop_operations): Adjust.
6814 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
6815 (vect_bb_slp_mark_live_stmts): Likewise.
6816 (vect_schedule_slp_node): Likewise.
6817 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
6818 Remove gimple_stmt_iterator * argument.
6819 (vect_transform_stmt): Adjust.
6821 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6823 * config/riscv/vector-iterators.md: Add missing modes.
6825 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6828 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
6829 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
6831 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6834 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
6835 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
6838 2023-08-10 liuhongt <hongtao.liu@intel.com>
6841 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
6842 sanitize upper part of V4HFmode register with
6844 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
6846 (<insn>v2hf3): Ditto.
6848 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
6849 register with -fno-trapping-math.
6851 2023-08-10 Pan Li <pan2.li@intel.com>
6852 Kito Cheng <kito.cheng@sifive.com>
6854 * config/riscv/riscv-protos.h
6855 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
6856 (get_frm_mode): New declaration.
6857 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
6858 * config/riscv/riscv-vector-builtins.cc
6859 (function_expander::use_ternop_insn): Take care of frm reg.
6860 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
6861 (riscv_emit_frm_mode_set): Ditto.
6862 (riscv_emit_mode_set): Ditto.
6863 (riscv_frm_adjust_mode_after_call): Ditto.
6864 (riscv_frm_mode_needed): Ditto.
6865 (riscv_frm_mode_after): Ditto.
6866 (riscv_mode_entry): Ditto.
6867 (riscv_mode_exit): Ditto.
6868 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
6869 * config/riscv/vector.md
6870 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
6871 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
6873 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6875 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
6876 incorrect anticipate info.
6878 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
6880 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
6881 Remove 'Zve32d' from the version list.
6883 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
6885 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
6886 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
6887 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
6888 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6890 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
6892 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
6893 (mem_shadd_or_shadd_rtx_p): New function.
6895 2023-08-09 Andrew Pinski <apinski@marvell.com>
6897 PR tree-optimization/110937
6898 PR tree-optimization/100798
6899 * match.pd (`a ? ~b : b`): Handle this
6902 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
6904 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
6906 2023-08-09 Richard Ball <richard.ball@arm.com>
6908 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
6909 * config/aarch64/aarch64-tune.md: Regenerate.
6910 * doc/invoke.texi: Document Cortex-A520 CPU.
6912 2023-08-09 Carl Love <cel@us.ibm.com>
6914 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
6915 Move definitions to Altivec stanza.
6916 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
6919 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6922 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
6923 stepped vector support.
6925 2023-08-09 liuhongt <hongtao.liu@intel.com>
6927 * common/config/i386/cpuinfo.h (get_available_features):
6928 Rename local variable subleaf_level to max_subleaf_level.
6930 2023-08-09 Richard Biener <rguenther@suse.de>
6932 PR rtl-optimization/110587
6933 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
6935 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6937 PR tree-optimization/110248
6938 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
6939 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
6940 legitimate when outer code is PLUS.
6942 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6944 PR tree-optimization/110248
6945 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
6946 type code_helper and pass it to targetm.addr_space.legitimate_address_p
6947 instead of ERROR_MARK.
6948 (offsettable_address_addr_space_p): Update one function pointer with
6949 one more argument of type code_helper as its assignees
6950 memory_address_addr_space_p and strict_memory_address_addr_space_p
6951 have been adjusted, and adjust some call sites with ERROR_MARK.
6952 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
6953 (memory_address_addr_space_p): Adjust with one more unnamed argument
6954 of type code_helper with default ERROR_MARK.
6955 (strict_memory_address_addr_space_p): Likewise.
6956 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
6957 argument of type code_helper.
6958 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
6959 type code_helper and pass it to memory_address_addr_space_p.
6960 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
6961 one more unnamed argument of type code_helper with default value
6963 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
6964 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
6965 pass it to all valid_mem_ref_p calls.
6967 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6969 PR tree-optimization/110248
6970 * coretypes.h (class code_helper): Add forward declaration.
6971 * doc/tm.texi: Regenerate.
6972 * lra-constraints.cc (valid_address_p): Call target hook
6973 targetm.addr_space.legitimate_address_p with an extra parameter
6974 ERROR_MARK as its prototype changes.
6975 * recog.cc (memory_address_addr_space_p): Likewise.
6976 * reload.cc (strict_memory_address_addr_space_p): Likewise.
6977 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
6978 Extend with one more argument of type code_helper, update the
6979 documentation accordingly.
6980 * targhooks.cc (default_legitimate_address_p): Adjust for the
6981 new code_helper argument.
6982 (default_addr_space_legitimate_address_p): Likewise.
6983 * targhooks.h (default_legitimate_address_p): Likewise.
6984 (default_addr_space_legitimate_address_p): Likewise.
6985 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
6986 with extra unnamed code_helper argument with default ERROR_MARK.
6987 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
6988 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
6989 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
6990 (tree.h): New include for tree_code ERROR_MARK.
6991 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
6992 unnamed code_helper argument with default ERROR_MARK.
6993 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
6994 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
6995 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
6996 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
6997 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
6998 (tree.h): New include for tree_code ERROR_MARK.
6999 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
7000 unnamed code_helper argument with default ERROR_MARK.
7001 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
7002 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
7004 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
7005 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
7006 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
7007 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
7008 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
7009 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
7010 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
7011 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
7012 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
7014 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
7015 (m32c_addr_space_legitimate_address_p): Likewise.
7016 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
7017 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
7018 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
7019 * config/microblaze/microblaze-protos.h (tree.h): New include for
7020 tree_code ERROR_MARK.
7021 (microblaze_legitimate_address_p): Adjust with extra unnamed
7022 code_helper argument with default ERROR_MARK.
7023 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
7025 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
7026 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
7027 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
7028 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
7029 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
7030 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
7031 argument with default ERROR_MARK and adjust the call to function
7032 msp430_legitimate_address_p.
7033 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
7034 unnamed code_helper argument with default ERROR_MARK.
7035 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
7036 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
7037 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
7038 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
7039 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
7040 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
7041 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
7042 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
7043 (tree.h): New include for tree_code ERROR_MARK.
7044 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
7045 extra unnamed code_helper argument with default ERROR_MARK.
7046 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
7047 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
7048 argument and adjust the call to function rs6000_legitimate_address_p.
7049 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
7050 unnamed code_helper argument with default ERROR_MARK.
7051 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
7052 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
7053 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
7054 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
7055 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
7056 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
7057 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
7058 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
7060 (tree.h): New include for tree_code ERROR_MARK.
7061 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
7062 Adjust with extra unnamed code_helper argument with default
7065 2023-08-09 liuhongt <hongtao.liu@intel.com>
7067 * common/config/i386/cpuinfo.h (get_available_features): Check
7068 EAX for valid subleaf before use CPUID.
7070 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
7072 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
7073 for the temporary when canonicalizing the condition.
7075 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
7077 * config/bpf/core-builtins.cc: Cleaned include headers.
7078 (struct cr_builtins): Added GTY.
7079 (cr_builtins_ref): Created.
7080 (builtins_data) Changed to GC root.
7081 (allocate_builtin_data): Changed.
7082 Included gt-core-builtins.h.
7083 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
7084 (bpf_core_extra_ref): Created.
7085 (bpf_comment_info): Changed to GC root.
7086 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
7088 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
7091 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
7092 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
7093 upper part of V2SFmode register with -fno-trapping-math.
7094 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
7096 (<smaxmin:code>v2sf3): Ditto.
7098 (*mmx_haddv2sf3_low): Ditto.
7099 (*mmx_hsubv2sf3_low): Ditto.
7100 (vec_addsubv2sf3): Ditto.
7101 (vec_cmpv2sfv2si): Ditto.
7102 (vcond<V2FI:mode>v2sf): Ditto.
7107 (fix_truncv2sfv2si2): Ditto.
7108 (fixuns_truncv2sfv2si2): Ditto.
7109 (floatv2siv2sf2): Ditto.
7110 (floatunsv2siv2sf2): Ditto.
7111 (nearbyintv2sf2): Ditto.
7113 (lrintv2sfv2si2): Ditto.
7115 (lceilv2sfv2si2): Ditto.
7116 (floorv2sf2): Ditto.
7117 (lfloorv2sfv2si2): Ditto.
7118 (btruncv2sf2): Ditto.
7119 (roundv2sf2): Ditto.
7120 (lroundv2sfv2si2): Ditto.
7121 * doc/invoke.texi (x86 Options): Document
7122 -mpartial-vector-fp-math option.
7124 2023-08-08 Andrew Pinski <apinski@marvell.com>
7126 PR tree-optimization/103281
7127 PR tree-optimization/28794
7128 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
7130 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
7131 (simplify_using_ranges::simplify_casted_cond): Rename to ...
7132 (simplify_using_ranges::simplify_casted_compare): This
7133 and change arguments to take op0 and op1.
7134 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
7135 (simplify_using_ranges::simplify): For tcc_comparison assignments call
7136 simplify_compare_assign_using_ranges_1.
7137 * vr-values.h (simplify_using_ranges): Add
7138 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
7139 Rename simplify_casted_cond and simplify_casted_compare and
7140 update argument types.
7142 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
7144 * genmatch.cc: Log line numbers indirectly.
7146 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
7148 * genmatch.cc: Make sinfo map ordered.
7149 * Makefile.in: Require the ordered map header for genmatch.o.
7151 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
7153 * ordered-hash-map.h: Add get_or_insert.
7154 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
7156 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7158 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
7159 (cond_len_<optab><mode>): Ditto.
7160 (cond_fma<mode>): Ditto.
7161 (cond_len_fma<mode>): Ditto.
7162 (cond_fnma<mode>): Ditto.
7163 (cond_len_fnma<mode>): Ditto.
7164 (cond_fms<mode>): Ditto.
7165 (cond_len_fms<mode>): Ditto.
7166 (cond_fnms<mode>): Ditto.
7167 (cond_len_fnms<mode>): Ditto.
7168 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
7170 (enum insn_type): Add new enum type.
7171 (prepare_ternary_operands): New function.
7172 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
7173 (emit_nonvlmax_tumu_insn): Ditto.
7174 (emit_nonvlmax_fp_tumu_insn): Ditto.
7175 (expand_cond_len_binop): Add condtional operations.
7176 (expand_cond_len_ternop): Ditto.
7177 (prepare_ternary_operands): New function.
7178 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
7179 riscv_get_v_regno_alignment as global scope.
7180 * config/riscv/vector.md: Fix ternary bugs.
7182 2023-08-08 Richard Biener <rguenther@suse.de>
7184 PR tree-optimization/49955
7185 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
7186 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
7187 * tree-vect-slp.cc (vect_free_slp_instance): Release
7188 SLP_INSTANCE_REMAIN_STMTS.
7189 (vect_build_slp_instance): Make the number of lanes of
7190 a BB reduction even.
7191 (vectorize_slp_instance_root_stmt): Handle unvectorized
7192 defs of a BB reduction.
7194 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7196 * internal-fn.cc (get_len_internal_fn): New function.
7197 (DEF_INTERNAL_COND_FN): Ditto.
7198 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
7199 * internal-fn.h (get_len_internal_fn): Ditto.
7200 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
7202 2023-08-08 Richard Biener <rguenther@suse.de>
7204 PR tree-optimization/110924
7205 * tree-ssa-live.h (virtual_operand_live): Update comment.
7206 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
7207 optimization, look at each predecessor.
7208 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
7210 2023-08-08 yulong <shiyulong@iscas.ac.cn>
7212 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
7214 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7216 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
7217 * config/riscv/vector.md: Ditto.
7219 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7221 * config/riscv/autovec.md: Add VLS shift.
7223 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7225 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
7226 * config/riscv/vector-iterators.md: Ditto.
7227 * config/riscv/vector.md: Ditto.
7229 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
7231 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
7233 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7235 * configure: Regenerate.
7237 2023-08-07 John Ericson <git@JohnEricson.me>
7239 * configure: Regenerate.
7241 2023-08-07 Alan Modra <amodra@gmail.com>
7243 * configure: Regenerate.
7245 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
7247 * configure: Regenerate.
7249 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7251 * configure: Regenerate.
7253 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7255 * configure: Regenerate.
7257 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
7259 * configure: Regenerate.
7261 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
7263 * configure: Regenerate.
7265 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
7267 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
7268 VOIDmode operands to conditional before canonicalization.
7270 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
7272 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
7273 (find_oldest_value_reg): Inline stack_pointer_rtx check.
7274 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
7276 2023-08-07 Martin Jambor <mjambor@suse.cz>
7279 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
7280 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
7281 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
7282 (ptr_parm_has_nonarg_uses): Likewise.
7283 * ipa-param-manipulation.cc
7284 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
7285 (ipa_param_body_adjustments::mark_dead_statements): Move initial
7286 checks to get_ddef_if_exists_and_is_used.
7287 (ipa_param_body_adjustments::mark_clobbers_dead): New.
7288 (ipa_param_body_adjustments::common_initialization): Call
7289 mark_clobbers_dead when splitting.
7291 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
7293 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
7294 as an argument and pass it to riscv_emit_int_order_test.
7295 (riscv_expand_conditional_move): Handle cases where the condition
7296 is not EQ/NE or the second argument to the conditional is not
7298 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
7299 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7301 2023-08-07 Andrew Pinski <apinski@marvell.com>
7303 PR tree-optimization/109959
7304 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
7307 2023-08-07 Richard Biener <rguenther@suse.de>
7309 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
7310 calculate post-dominators. Calculate RPO on the inverted
7311 graph and process blocks in that order.
7313 2023-08-07 liuhongt <hongtao.liu@intel.com>
7316 * config/i386/i386-protos.h
7317 (vpternlog_redundant_operand_mask): Adjust parameter type.
7318 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
7319 INTVAL instead of XINT, also adjust parameter type from rtx*
7320 to rtx since the function only needs operands[4] in vpternlog
7322 (substitute_vpternlog_operands): Pass operands[4] instead of
7323 operands to vpternlog_redundant_operand_mask.
7324 * config/i386/sse.md: Ditto.
7326 2023-08-07 Richard Biener <rguenther@suse.de>
7328 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
7329 around dumping code.
7331 2023-08-07 liuhongt <hongtao.liu@intel.com>
7334 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
7335 to define_expand and break into ..
7336 (<insn>v4hf3): .. this.
7337 (divv4hf3): .. this.
7338 (<insn>v2hf3): .. this.
7339 (divv2hf3): .. this.
7340 (movd_v2hf_to_sse): New define_expand.
7341 (movq_<mode>_to_sse): Extend to V4HFmode.
7342 (mmxdoublevecmode): Ditto.
7343 (V2FI_V4HF): New mode iterator.
7344 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
7345 by using mode iterator V4SF_V8HF, renamed to ..
7346 (*vec_concat<mode>): .. this.
7347 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
7348 iterator V4SF_V8HF, renamed to ..
7349 (*vec_concat<mode>_0): .. this.
7350 (*vec_concatv8hf_movss): New define_insn.
7351 (V4SF_V8HF): New mode iterator.
7353 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7355 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
7357 2023-08-07 Jan Beulich <jbeulich@suse.com>
7359 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
7360 (*mmx_pinsrb): Likewise.
7361 (*mmx_pextrb): Likewise.
7362 (*mmx_pextrb_zext): Likewise.
7363 (mmx_pshufbv8qi3): Likewise.
7364 (mmx_pshufbv4qi3): Likewise.
7365 (mmx_pswapdv2si2): Likewise.
7366 (*pinsrb): Likewise.
7367 (*pextrb): Likewise.
7368 (*pextrb_zext): Likewise.
7369 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
7370 (*sse2_eq<mode>3): Likewise.
7371 (*sse2_gt<mode>3): Likewise.
7372 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
7373 (*vec_extract<mode>): Likewise.
7374 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
7375 (*vec_extractv16qi_zext): Likewise.
7376 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
7377 (ssse3_pmaddubsw128): Likewise.
7378 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
7379 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
7380 (<ssse3_avx2>_psign<mode>3): Likewise.
7381 (<ssse3_avx2>_palignr<mode>): Likewise.
7382 (*abs<mode>2): Likewise.
7383 (sse4_2_pcmpestr): Likewise.
7384 (sse4_2_pcmpestri): Likewise.
7385 (sse4_2_pcmpestrm): Likewise.
7386 (sse4_2_pcmpestr_cconly): Likewise.
7387 (sse4_2_pcmpistr): Likewise.
7388 (sse4_2_pcmpistri): Likewise.
7389 (sse4_2_pcmpistrm): Likewise.
7390 (sse4_2_pcmpistr_cconly): Likewise.
7391 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
7392 (vgf2p8affineqb_<mode><mask_name>): Likewise.
7393 (vgf2p8mulb_<mode><mask_name>): Likewise.
7394 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
7396 (*<code>v16qi3 [umaxmin]): Likewise.
7398 2023-08-07 Jan Beulich <jbeulich@suse.com>
7400 * config/i386/i386.md (sse4_1_round<mode>2): Make
7401 "length_immediate" uniformly 1.
7402 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
7403 (mmx_pblendvb_<mode>): Likewise.
7405 2023-08-07 Jan Beulich <jbeulich@suse.com>
7407 * config/i386/sse.md
7408 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
7410 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
7413 2023-08-07 Jan Beulich <jbeulich@suse.com>
7415 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
7416 "prefix_extra", and "mode" attributes.
7417 (xop_phadd<u>bd): Likewise.
7418 (xop_phadd<u>bq): Likewise.
7419 (xop_phadd<u>wd): Likewise.
7420 (xop_phadd<u>wq): Likewise.
7421 (xop_phadd<u>dq): Likewise.
7422 (xop_phsubbw): Likewise.
7423 (xop_phsubwd): Likewise.
7424 (xop_phsubdq): Likewise.
7425 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
7426 (xop_rotr<mode>3): Likewise.
7427 (xop_frcz<mode>2): Likewise.
7428 (*xop_vmfrcz<mode>2): Likewise.
7429 (xop_vrotl<mode>3): Add "prefix" attribute. Change
7430 "prefix_extra" to 1.
7431 (xop_sha<mode>3): Likewise.
7432 (xop_shl<mode>3): Likewise.
7434 2023-08-07 Jan Beulich <jbeulich@suse.com>
7436 * config/i386/sse.md
7437 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
7439 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
7440 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
7441 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
7442 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
7443 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
7444 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
7445 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
7446 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
7447 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
7448 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
7449 (vec_extract_lo_v64qi): Likewise.
7450 (vec_extract_hi_v64qi): Likewise.
7451 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
7452 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
7453 (*avx512f_<code><mode>3<mask_name>): Likewise.
7454 (*vec_extractv4ti): Likewise.
7455 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
7456 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
7457 Add "length_immediate".
7459 2023-08-07 Jan Beulich <jbeulich@suse.com>
7461 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
7463 (@rdseed<mode>): Likewise.
7464 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
7465 Adjust "prefix_extra".
7466 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
7467 (*sse4_1_<code><mode>3<mask_name>): Likewise.
7468 (*avx2_eq<mode>3): Likewise.
7469 (avx2_gt<mode>3): Likewise.
7470 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
7471 (*vec_extract<mode>): Likewise.
7472 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
7474 2023-08-07 Jan Beulich <jbeulich@suse.com>
7476 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
7477 "prefix_rep". Drop "prefix_extra".
7478 (wr<fsgs>base<mode>): Likewise.
7479 (ptwrite<mode>): Likewise.
7481 2023-08-07 Jan Beulich <jbeulich@suse.com>
7483 * config/i386/i386.md (isa): Move up.
7484 (length_immediate): Handle "fma4".
7485 (prefix): Handle "ssemuladd".
7486 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
7487 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
7489 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
7490 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
7491 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
7493 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
7494 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
7495 (*fma_fnmadd_<mode>): Likewise.
7496 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
7498 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
7499 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
7500 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
7502 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
7503 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
7504 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
7506 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
7507 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
7508 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
7510 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
7511 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
7512 (*fmai_fmadd_<mode>): Likewise.
7513 (*fmai_fmsub_<mode>): Likewise.
7514 (*fmai_fnmadd_<mode><round_name>): Likewise.
7515 (*fmai_fnmsub_<mode><round_name>): Likewise.
7516 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
7517 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
7518 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
7519 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
7520 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
7521 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
7522 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
7523 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
7524 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
7525 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
7526 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
7527 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
7528 (*fma4i_vmfmadd_<mode>): Likewise.
7529 (*fma4i_vmfmsub_<mode>): Likewise.
7530 (*fma4i_vmfnmadd_<mode>): Likewise.
7531 (*fma4i_vmfnmsub_<mode>): Likewise.
7532 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
7533 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
7534 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
7536 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
7537 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
7538 (xop_p<macs>dql): Likewise.
7539 (xop_p<macs>dqh): Likewise.
7540 (xop_p<macs>wd): Likewise.
7541 (xop_p<madcs>wd): Likewise.
7542 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
7544 2023-08-07 Jan Beulich <jbeulich@suse.com>
7546 * config/i386/i386.md (length_immediate): Handle "sse4arg".
7548 (*xop_pcmov_<mode>): Add "mode" attribute.
7549 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
7550 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
7551 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
7552 (*xop_pcmov_<mode>): Add "mode" attribute.
7553 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
7555 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
7556 "prefix_extra", and "length_immediate" attributes.
7557 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
7558 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
7559 and "length_immediate" attributes. Switch "type" to "sse4arg".
7560 (xop_pcom_tf<mode>3): Likewise.
7561 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
7563 2023-08-07 Jan Beulich <jbeulich@suse.com>
7565 * config/i386/i386.md (prefix_extra): Correct comment. Fold
7566 cases yielding 2 into ones yielding 1.
7568 2023-08-07 Jan Hubicka <jh@suse.cz>
7570 PR tree-optimization/106293
7571 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
7572 * tree-vect-loop.cc (vect_transform_loop): Likewise.
7574 2023-08-07 Andrew Pinski <apinski@marvell.com>
7576 PR tree-optimization/96695
7577 * match.pd (min_value, max_value): Extend to
7580 2023-08-06 Jan Hubicka <jh@suse.cz>
7582 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
7583 __builtin_expect that CPU likely supports cpuid.
7585 2023-08-06 Jan Hubicka <jh@suse.cz>
7587 * tree-loop-distribution.cc (loop_distribution::execute): Disable
7588 distribution for loops with estimated iterations 0.
7590 2023-08-06 Jan Hubicka <jh@suse.cz>
7592 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
7594 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
7596 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
7597 more Zicond patterns. Fix whitespace typo.
7598 (riscv_rtx_costs): Remove accidental code duplication.
7599 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7601 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
7604 * config/i386/i386-protos.h
7605 (vpternlog_redundant_operand_mask): Declare.
7606 (substitute_vpternlog_operands): Declare.
7607 * config/i386/i386.cc
7608 (vpternlog_redundant_operand_mask): New helper.
7609 (substitute_vpternlog_operands): New function. Use them...
7610 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
7612 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
7614 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
7615 value of -1 is equivalent to don't care.
7616 (extract_integral_bit_field): Indicate that we don't require
7617 the most significant word to be zero extended, if we're about
7619 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
7620 of -1 is equivalent to don't care. Don't clear the most
7621 significant bits with AND mask when UNSIGNEDP is -1.
7623 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
7625 * config/i386/sse.md (define_split): Convert highpart:DF extract
7626 from V2DFmode register into a sse2_storehpd instruction.
7627 (define_split): Likewise, convert lowpart:DF extract from V2DF
7628 register into a sse2_storelpd instruction.
7630 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
7632 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
7635 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
7637 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
7638 against early clobber hard regs.
7640 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7642 * doc/extend.texi: Document it.
7644 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7647 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
7648 vec_widen_<sur>shiftl_hi_<mode>): Remove.
7649 (aarch64_<sur>shll<mode>_internal): Renamed to...
7650 (aarch64_<su>shll<mode>): .. This.
7651 (aarch64_<sur>shll2<mode>_internal): Renamed to...
7652 (aarch64_<su>shll2<mode>): .. This.
7653 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
7655 * config/aarch64/constraints.md (D2, DL): New.
7656 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
7658 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7660 * gensupport.cc (conlist): Support length 0 attribute.
7662 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7664 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
7665 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
7667 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7669 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
7671 (aarch64_adjust_stmt_cost): Use it.
7672 (aarch64_vector_costs::count_ops): Likewise.
7673 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
7674 aarch64_adjust_stmt_cost.
7676 2023-08-04 Richard Biener <rguenther@suse.de>
7678 PR tree-optimization/110838
7679 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
7680 Fix right-shift value sanitizing. Properly emit external
7681 def mangling in the preheader rather than in the pattern
7682 def sequence where it will fail vectorizing.
7684 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
7686 PR middle-end/110316
7688 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
7689 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
7690 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
7691 (timer::validate_phases): Use integral arithmetic to check
7693 (timer::print_row, timer::print): Convert from integral
7694 nanoseconds to floating point seconds before printing.
7695 (timer::all_zero): Change limit to nanosec count instead of
7696 fractional count of seconds.
7697 (make_json_for_timevar_time_def): Convert from integral
7698 nanoseconds to floating point seconds before recording.
7699 * timevar.h (struct timevar_time_def): Update all measurements
7700 to use uint64_t nanoseconds rather than seconds stored in a
7703 2023-08-04 Richard Biener <rguenther@suse.de>
7705 PR tree-optimization/110838
7706 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
7707 the arithmetic right-shift case to non-negative operands.
7709 2023-08-04 Pan Li <pan2.li@intel.com>
7712 2023-08-04 Pan Li <pan2.li@intel.com>
7714 * config/riscv/riscv-vector-builtins-bases.cc
7715 (class vfmacc_frm): New class for vfmacc frm.
7716 (vfmacc_frm_obj): New declaration.
7718 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7719 * config/riscv/riscv-vector-builtins-functions.def
7720 (vfmacc_frm): New function definition.
7721 * config/riscv/riscv-vector-builtins.cc
7722 (function_expander::use_ternop_insn): Add frm operand support.
7723 * config/riscv/vector.md: Add vfmuladd to frm_mode.
7725 2023-08-04 Pan Li <pan2.li@intel.com>
7728 2023-08-04 Pan Li <pan2.li@intel.com>
7730 * config/riscv/riscv-vector-builtins-bases.cc
7731 (class vfnmacc_frm): New class for vfnmacc.
7732 (vfnmacc_frm_obj): New declaration.
7734 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7735 * config/riscv/riscv-vector-builtins-functions.def
7736 (vfnmacc_frm): New function definition.
7738 2023-08-04 Pan Li <pan2.li@intel.com>
7741 2023-08-04 Pan Li <pan2.li@intel.com>
7743 * config/riscv/riscv-vector-builtins-bases.cc
7744 (class vfmsac_frm): New class for vfmsac frm.
7745 (vfmsac_frm_obj): New declaration.
7747 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7748 * config/riscv/riscv-vector-builtins-functions.def
7749 (vfmsac_frm): New function definition.
7751 2023-08-04 Pan Li <pan2.li@intel.com>
7754 2023-08-04 Pan Li <pan2.li@intel.com>
7756 * config/riscv/riscv-vector-builtins-bases.cc
7757 (class vfnmsac_frm): New class for vfnmsac frm.
7758 (vfnmsac_frm_obj): New declaration.
7760 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7761 * config/riscv/riscv-vector-builtins-functions.def
7762 (vfnmsac_frm): New function definition.
7764 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
7766 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
7767 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
7768 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
7769 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
7770 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
7771 (attiny102, attiny104): New devices.
7772 * doc/avr-mmcu.texi: Regenerate.
7774 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
7776 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
7777 and PM_OFFSET entries.
7779 2023-08-04 Andrew Pinski <apinski@marvell.com>
7781 PR tree-optimization/110874
7782 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
7783 (gimple_maybe_cmp): Likewise.
7784 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
7785 and gimple_maybe_cmp instead of being recursive.
7786 * match.pd (bit_not_with_nop): New match pattern.
7787 (maybe_cmp): Likewise.
7789 2023-08-04 Drew Ross <drross@redhat.com>
7791 PR middle-end/101955
7792 * match.pd ((signed x << c) >> c): New canonicalization.
7794 2023-08-04 Pan Li <pan2.li@intel.com>
7796 * config/riscv/riscv-vector-builtins-bases.cc
7797 (class vfnmsac_frm): New class for vfnmsac frm.
7798 (vfnmsac_frm_obj): New declaration.
7800 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7801 * config/riscv/riscv-vector-builtins-functions.def
7802 (vfnmsac_frm): New function definition.
7804 2023-08-04 Pan Li <pan2.li@intel.com>
7806 * config/riscv/riscv-vector-builtins-bases.cc
7807 (class vfmsac_frm): New class for vfmsac frm.
7808 (vfmsac_frm_obj): New declaration.
7810 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7811 * config/riscv/riscv-vector-builtins-functions.def
7812 (vfmsac_frm): New function definition.
7814 2023-08-04 Pan Li <pan2.li@intel.com>
7816 * config/riscv/riscv-vector-builtins-bases.cc
7817 (class vfnmacc_frm): New class for vfnmacc.
7818 (vfnmacc_frm_obj): New declaration.
7820 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7821 * config/riscv/riscv-vector-builtins-functions.def
7822 (vfnmacc_frm): New function definition.
7824 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
7827 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
7828 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
7830 2023-08-04 Pan Li <pan2.li@intel.com>
7832 * config/riscv/riscv-vector-builtins-bases.cc
7833 (class vfmacc_frm): New class for vfmacc frm.
7834 (vfmacc_frm_obj): New declaration.
7836 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7837 * config/riscv/riscv-vector-builtins-functions.def
7838 (vfmacc_frm): New function definition.
7839 * config/riscv/riscv-vector-builtins.cc
7840 (function_expander::use_ternop_insn): Add frm operand support.
7841 * config/riscv/vector.md: Add vfmuladd to frm_mode.
7843 2023-08-04 Pan Li <pan2.li@intel.com>
7845 * config/riscv/riscv-vector-builtins-bases.cc
7846 (vfwmul_frm_obj): New declaration.
7847 (vfwmul_frm): Ditto.
7848 * config/riscv/riscv-vector-builtins-bases.h:
7849 (vfwmul_frm): Ditto.
7850 * config/riscv/riscv-vector-builtins-functions.def
7851 (vfwmul_frm): New function definition.
7852 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
7854 2023-08-04 Pan Li <pan2.li@intel.com>
7856 * config/riscv/riscv-vector-builtins-bases.cc
7857 (binop_frm): New declaration.
7858 (reverse_binop_frm): Likewise.
7860 * config/riscv/riscv-vector-builtins-bases.h:
7861 (vfdiv_frm): New extern declaration.
7862 (vfrdiv_frm): Likewise.
7863 * config/riscv/riscv-vector-builtins-functions.def
7864 (vfdiv_frm): New function definition.
7865 (vfrdiv_frm): Likewise.
7866 * config/riscv/vector.md: Add vfdiv to frm_mode.
7868 2023-08-03 Jan Hubicka <jh@suse.cz>
7870 * tree-cfg.cc (print_loop_info): Print entry count.
7872 2023-08-03 Jan Hubicka <jh@suse.cz>
7874 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
7876 2023-08-03 Jan Hubicka <jh@suse.cz>
7879 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
7880 unadjusted_exit_count.
7882 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
7884 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
7887 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
7889 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
7890 various Zicond patterns.
7891 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
7892 sfb_alu_operand for both arms of the conditional move.
7893 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7895 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
7901 * config.gcc: Added core-builtins.cc and .o files.
7902 * config/bpf/bpf-passes.def: Removed file.
7903 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
7904 bpf_replace_core_move_operands): New prototypes.
7905 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
7906 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
7907 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
7908 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
7909 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
7911 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
7912 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
7913 (mov_reloc_core<mode>): Added.
7914 * config/bpf/core-builtins.cc (struct cr_builtin, enum
7915 cr_decision struct cr_local, struct cr_final, struct
7916 core_builtin_helpers, enum bpf_plugin_states): Added types.
7917 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
7919 (allocate_builtin_data, get_builtin-data, search_builtin_data,
7920 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
7921 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
7922 bpf_core_get_index, compute_field_expr,
7923 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
7924 process_field_expr, pack_enum_value, process_enum_value, pack_type,
7925 process_type, bpf_require_core_support, make_core_relo, read_kind,
7926 kind_access_index, kind_preserve_field_info, kind_enum_value,
7927 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
7928 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
7929 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
7930 bpf_expand_core_builtin, bpf_add_core_reloc,
7931 bpf_replace_core_move_operands): Added functions.
7932 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
7933 (bpf_init_core_builtins, bpf_expand_core_builtin,
7934 bpf_resolve_overloaded_core_builtin): Added functions.
7935 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
7936 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
7937 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
7938 * config/bpf/t-bpf: Added core-builtins.o.
7939 * doc/extend.texi: Added documentation for new BPF builtins.
7941 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7943 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
7944 ranges to the call to relation_fold_and_or.
7945 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
7946 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
7947 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
7948 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
7949 a varying op1 and op2 to call.
7950 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
7951 (operator_equal::op1_op2_relation): New float version.
7952 (operator_not_equal::op1_op2_relation): Ditto.
7953 (operator_lt::op1_op2_relation): Ditto.
7954 (operator_le::op1_op2_relation): Ditto.
7955 (operator_gt::op1_op2_relation): Ditto.
7956 (operator_ge::op1_op2_relation) Ditto.
7957 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
7959 (operator_not_equal::op1_op2_relation): Ditto.
7960 (operator_lt::op1_op2_relation): Ditto.
7961 (operator_le::op1_op2_relation): Ditto.
7962 (operator_gt::op1_op2_relation): Ditto.
7963 (operator_ge::op1_op2_relation): Ditto.
7964 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
7966 (range_operator::op1_op2_relation): Add extra params.
7967 (operator_equal::op1_op2_relation): Ditto.
7968 (operator_not_equal::op1_op2_relation): Ditto.
7969 (operator_lt::op1_op2_relation): Ditto.
7970 (operator_le::op1_op2_relation): Ditto.
7971 (operator_gt::op1_op2_relation): Ditto.
7972 (operator_ge::op1_op2_relation): Ditto.
7973 * range-op.h (range_operator): New prototypes.
7974 (range_op_handler): Ditto.
7976 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7978 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
7979 Use identity relation.
7980 (gori_compute::compute_operand2_range): Ditto.
7981 * value-relation.cc (get_identity_relation): New.
7982 * value-relation.h (get_identity_relation): New prototype.
7984 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7986 * value-range.h (Value_Range::set_varying): Set the type.
7987 (Value_Range::set_zero): Ditto.
7988 (Value_Range::set_nonzero): Ditto.
7990 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
7992 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
7995 2023-08-03 Pan Li <pan2.li@intel.com>
7997 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
7999 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
8001 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
8003 2023-08-03 Richard Biener <rguenther@suse.de>
8005 PR tree-optimization/110838
8006 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8007 Adjust the shift operand of RSHIFT_EXPRs.
8009 2023-08-03 Richard Biener <rguenther@suse.de>
8011 PR tree-optimization/110702
8012 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
8013 we created a NULL pointer based access rewrite that to
8016 2023-08-03 Richard Biener <rguenther@suse.de>
8018 * tree-ssa-sink.cc: Include tree-ssa-live.h.
8019 (pass_sink_code::execute): Instantiate virtual_operand_live
8021 (sink_code_in_bb): Pass down virtual_operand_live.
8022 (statement_sink_location): Get virtual_operand_live and
8023 verify we are not sinking loads across stores by looking up
8024 the live virtual operand at the sink location.
8026 2023-08-03 Richard Biener <rguenther@suse.de>
8028 * tree-ssa-live.h (class virtual_operand_live): New.
8029 * tree-ssa-live.cc (virtual_operand_live::init): New.
8030 (virtual_operand_live::get_live_in): Likewise.
8031 (virtual_operand_live::get_live_out): Likewise.
8033 2023-08-03 Richard Biener <rguenther@suse.de>
8035 * passes.def: Exchange loop splitting and final value
8038 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8040 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
8041 New function which handles bswap patterns for vec_perm_const.
8042 (vectorize_vec_perm_const_1): Call new function.
8043 * config/s390/vector.md (*bswap<mode>): Fix operands in output
8045 (*vstbr<mode>): New insn.
8047 2023-08-03 Alexandre Oliva <oliva@adacore.com>
8049 * config/vxworks-smp.opt: New. Introduce -msmp.
8050 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
8051 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
8052 lib_smp when -msmp is present in the command line.
8053 * doc/invoke.texi: Document it.
8055 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
8057 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
8058 when enabling -mno-omit-leaf-frame-pointer
8059 (riscv_option_override): Override omit-frame-pointer.
8060 (riscv_frame_pointer_required): Save s0 for non-leaf function
8061 (TARGET_FRAME_POINTER_REQUIRED): Override defination
8062 * config/riscv/riscv.opt: Add option support.
8064 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
8067 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
8068 place operand in a register before gen_<insn>64ti2_doubleword.
8069 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
8070 operand in a register before gen_<insn>32di2_doubleword.
8071 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
8072 (<any_rotate>64ti2_doubleword): Likewise.
8074 2023-08-03 Pan Li <pan2.li@intel.com>
8076 * config/riscv/riscv-vector-builtins-bases.cc
8077 (vfmul_frm_obj): New declaration.
8079 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
8080 * config/riscv/riscv-vector-builtins-functions.def
8081 (vfmul_frm): New function definition.
8082 * config/riscv/vector.md: Add vfmul to frm_mode.
8084 2023-08-03 Andrew Pinski <apinski@marvell.com>
8086 * match.pd (`~X & X`): Check that the types match.
8087 (`~x | x`, `~x ^ x`): Likewise.
8089 2023-08-03 Pan Li <pan2.li@intel.com>
8091 * config/riscv/riscv-vector-builtins-bases.h: Remove
8092 redudant declaration.
8094 2023-08-03 Pan Li <pan2.li@intel.com>
8096 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
8098 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
8099 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
8100 Add vfwsub function definitions.
8102 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8104 PR rtl-optimization/110867
8105 * combine.cc (simplify_compare_const): Try the optimization only
8106 in case the constant fits into the comparison mode.
8108 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
8110 * config/riscv/zicond.md: Remove incorrect zicond patterns and
8111 renumber/rename them.
8112 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
8114 2023-08-02 Richard Biener <rguenther@suse.de>
8116 * tree-phinodes.h (add_phi_node_to_bb): Remove.
8117 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
8119 2023-08-02 Jan Beulich <jbeulich@suse.com>
8121 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
8122 two of the alternatives.
8124 2023-08-02 Richard Biener <rguenther@suse.de>
8126 PR tree-optimization/92335
8127 * tree-ssa-sink.cc (select_best_block): Before loop
8128 optimizations avoid sinking unconditional loads/stores
8129 in innermost loops to conditional executed places.
8131 2023-08-02 Andrew Pinski <apinski@marvell.com>
8133 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
8134 the comparison operands before comparing them.
8136 2023-08-02 Andrew Pinski <apinski@marvell.com>
8138 * match.pd (`~X & X`, `~X | X`): Move over to
8139 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
8140 handles that already.
8141 Remove range test simplifications to true/false as they
8142 are now handled by these patterns.
8144 2023-08-02 Andrew Pinski <apinski@marvell.com>
8146 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
8147 statement's lhs and rhs to check if trivial dead.
8148 Rename inserted_exprs to exprs_maybe_dce; also move it so
8149 bitmap is not allocated if not needed.
8151 2023-08-02 Pan Li <pan2.li@intel.com>
8153 * config/riscv/riscv-vector-builtins-bases.cc
8154 (class widen_binop_frm): New class for binop frm.
8155 (BASE): Add vfwadd_frm.
8156 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
8157 * config/riscv/riscv-vector-builtins-functions.def
8158 (vfwadd_frm): New function definition.
8159 * config/riscv/riscv-vector-builtins-shapes.cc
8160 (BASE_NAME_MAX_LEN): New macro.
8161 (struct alu_frm_def): Leverage new base class.
8162 (struct build_frm_base): New build base for frm.
8163 (struct widen_alu_frm_def): New struct for widen alu frm.
8164 (SHAPE): Add widen_alu_frm shape.
8165 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
8166 * config/riscv/vector.md (frm_mode): Add vfwalu type.
8168 2023-08-02 Jan Hubicka <jh@suse.cz>
8170 * cfgloop.h (loop_count_in): Declare.
8171 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
8172 (loop_count_in): Move here from ...
8173 * cfgloopmanip.cc (loop_count_in): ... here.
8174 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
8176 2023-08-02 Jan Hubicka <jh@suse.cz>
8178 * cfg.cc (scale_strictly_dominated_blocks): New function.
8179 * cfg.h (scale_strictly_dominated_blocks): Declare.
8180 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
8182 2023-08-02 Richard Biener <rguenther@suse.de>
8184 PR rtl-optimization/110587
8185 * lra-spills.cc (return_regno_p): Remove.
8186 (regno_in_use_p): Likewise.
8187 (lra_final_code_change): Do not remove noop moves
8188 between hard registers.
8190 2023-08-02 liuhongt <hongtao.liu@intel.com>
8193 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
8194 HFmode, use mode iterator VFH instead.
8195 (vec_fmsubadd<mode>4): Ditto.
8196 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
8197 Remove scalar mode from iterator, use VFH_AVX512VL instead.
8198 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
8201 2023-08-02 liuhongt <hongtao.liu@intel.com>
8203 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
8204 pre_reload define_insn_and_split.
8206 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
8208 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
8209 using Zicond to implement some conditional moves.
8211 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
8213 * config/riscv/zicond.md: Use the X iterator instead of ANYI
8214 on the comparison input operands.
8216 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
8218 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
8220 (case SET): For INSNs that just set a REG, take the cost from the
8222 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8224 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
8226 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
8227 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
8228 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
8229 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
8230 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
8231 (OPTION_MASK_ISA_ABM_SET):
8232 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
8234 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
8236 * config/s390/s390.cc (s390_encode_section_info): Assume external
8237 symbols without explicit alignment to be unaligned if
8238 -munaligned-symbols has been specified.
8239 * config/s390/s390.opt (-munaligned-symbols): New option.
8241 2023-08-01 Richard Ball <richard.ball@arm.com>
8243 * gimple-fold.cc (fold_ctor_reference):
8244 Add support for poly_int.
8246 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
8249 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
8250 LABEL_NUSES of new conditional branch instruction.
8252 2023-08-01 Jan Hubicka <jh@suse.cz>
8254 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
8255 constant prologue peeling.
8257 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
8259 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
8261 2023-08-01 Pan Li <pan2.li@intel.com>
8262 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8264 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
8265 (STATIC_FRM_P): Ditto.
8266 (struct mode_switching_info): New struct for mode switching.
8267 (struct machine_function): Add new field mode switching.
8268 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
8269 (riscv_frm_adjust_mode_after_call): New function for call mode.
8270 (riscv_frm_emit_after_call_in_bb_end): New function for emit
8271 insn when call as the end of bb.
8272 (riscv_frm_mode_needed): New function for frm mode needed.
8273 (frm_unknown_dynamic_p): Remove call check.
8274 (riscv_mode_needed): Extrac function for frm.
8275 (riscv_frm_mode_after): Add DYN_CALL after.
8276 (riscv_mode_entry): Remove backup rtl initialization.
8277 * config/riscv/vector.md (frm_mode): Add dyn_call.
8278 (fsrmsi_restore_exit): Rename to _volatile.
8279 (fsrmsi_restore_volatile): Likewise.
8281 2023-08-01 Pan Li <pan2.li@intel.com>
8283 * config/riscv/riscv-vector-builtins-bases.cc
8284 (class reverse_binop_frm): Add new template for reversed frm.
8285 (vfsub_frm_obj): New obj.
8286 (vfrsub_frm_obj): Likewise.
8287 * config/riscv/riscv-vector-builtins-bases.h:
8288 (vfsub_frm): New declaration.
8289 (vfrsub_frm): Likewise.
8290 * config/riscv/riscv-vector-builtins-functions.def
8291 (vfsub_frm): New function define.
8292 (vfrsub_frm): Likewise.
8294 2023-08-01 Andrew Pinski <apinski@marvell.com>
8296 PR tree-optimization/93044
8297 * match.pd (nested int casts): A truncation (to the same size or smaller)
8298 can always remove the inner cast.
8300 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
8303 * doc/invoke.texi (-Wmissing-variable-declarations): Document
8306 2023-07-31 Andrew Pinski <apinski@marvell.com>
8308 PR tree-optimization/106164
8309 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
8310 `a == b | a < b`, `a == b | a > b`): Handle these cases
8313 2023-07-31 Andrew Pinski <apinski@marvell.com>
8315 PR tree-optimization/106164
8316 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
8317 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
8319 2023-07-31 Andrew Pinski <apinski@marvell.com>
8321 PR tree-optimization/100864
8322 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
8323 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
8324 (gimple_bitwise_inverted_equal_p): New function.
8325 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
8326 instead of direct matching bit_not.
8328 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
8331 * gcc-ar.cc (main): Expand argv and use
8332 temporary response file to call ar if any
8333 expansions were made.
8335 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
8337 PR tree-optimization/110582
8338 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
8339 range vector for non-ssa names.
8341 2023-07-31 David Malcolm <dmalcolm@redhat.com>
8344 * diagnostic-client-data-hooks.h (class sarif_object): New forward
8346 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
8348 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
8349 (class sarif_invocation): Inherit from sarif_object rather than
8351 (class sarif_result): Likewise.
8352 (class sarif_ice_notification): Likewise.
8353 (sarif_object::get_or_create_properties): New.
8354 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
8355 to call the context's add_sarif_invocation_properties hook.
8356 (sarif_builder::flush_to_file): Pass m_context to
8357 sarif_invocation::prepare_to_flush.
8358 * diagnostic-format-sarif.h: New header.
8359 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
8360 writes to stderr. Document that if SARIF diagnostic output is
8361 requested then any timing information is written in JSON form as
8362 part of the SARIF output, rather than to stderr.
8363 * timevar.cc: Include "json.h".
8364 (timer::named_items::m_hash_map): Split out type into...
8365 (timer::named_items::hash_map_t): ...this new typedef.
8366 (timer::named_items::make_json): New function.
8367 (timevar_diff): New function.
8368 (make_json_for_timevar_time_def): New function.
8369 (timer::timevar_def::make_json): New function.
8370 (timer::make_json): New function.
8371 * timevar.h (class json::value): New forward decl.
8372 (timer::make_json): New decl.
8373 (timer::timevar_def::make_json): New decl.
8374 * tree-diagnostic-client-data-hooks.cc: Include
8375 "diagnostic-format-sarif.h" and "timevar.h".
8376 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
8379 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8381 * combine.cc (simplify_compare_const): Narrow comparison of
8382 memory and constant.
8383 (try_combine): Adapt new function signature.
8384 (simplify_comparison): Adapt new function signature.
8386 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
8388 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
8390 (expand_vector_init_insert_elems): Ditto.
8392 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
8395 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
8396 single_defuse_cycle while counting reduction_latency.
8398 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8400 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
8401 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
8422 (COND_LEN_ADD): Ditto.
8423 (COND_LEN_SUB): Ditto.
8424 (COND_LEN_MUL): Ditto.
8425 (COND_LEN_DIV): Ditto.
8426 (COND_LEN_MOD): Ditto.
8427 (COND_LEN_RDIV): Ditto.
8428 (COND_LEN_MIN): Ditto.
8429 (COND_LEN_MAX): Ditto.
8430 (COND_LEN_FMIN): Ditto.
8431 (COND_LEN_FMAX): Ditto.
8432 (COND_LEN_AND): Ditto.
8433 (COND_LEN_IOR): Ditto.
8434 (COND_LEN_XOR): Ditto.
8435 (COND_LEN_SHL): Ditto.
8436 (COND_LEN_SHR): Ditto.
8437 (COND_LEN_FMA): Ditto.
8438 (COND_LEN_FMS): Ditto.
8439 (COND_LEN_FNMA): Ditto.
8440 (COND_LEN_FNMS): Ditto.
8441 (COND_LEN_NEG): Ditto.
8442 (ADD): New macro define.
8463 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
8466 * config/i386/i386-features.cc (compute_convert_gain): Check
8467 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
8468 and V4SImode rotates in STV.
8469 (general_scalar_chain::convert_rotate): Likewise.
8471 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
8473 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
8474 * config/riscv/riscv-protos.h (get_mask_mode): Update return
8476 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
8478 (emit_vlmax_insn): Ditto.
8479 (emit_vlmax_fp_insn): Ditto.
8480 (emit_vlmax_ternary_insn): Ditto.
8481 (emit_vlmax_fp_ternary_insn): Ditto.
8482 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
8483 (emit_nonvlmax_insn): Ditto.
8484 (emit_vlmax_slide_insn): Ditto.
8485 (emit_nonvlmax_slide_tu_insn): Ditto.
8486 (emit_vlmax_merge_insn): Ditto.
8487 (emit_vlmax_masked_insn): Ditto.
8488 (emit_nonvlmax_masked_insn): Ditto.
8489 (emit_vlmax_masked_store_insn): Ditto.
8490 (emit_nonvlmax_masked_store_insn): Ditto.
8491 (emit_vlmax_masked_mu_insn): Ditto.
8492 (emit_nonvlmax_tu_insn): Ditto.
8493 (emit_nonvlmax_fp_tu_insn): Ditto.
8494 (emit_scalar_move_insn): Ditto.
8495 (emit_vlmax_compress_insn): Ditto.
8496 (emit_vlmax_reduction_insn): Ditto.
8497 (emit_vlmax_fp_reduction_insn): Ditto.
8498 (emit_nonvlmax_fp_reduction_insn): Ditto.
8499 (expand_vec_series): Ditto.
8500 (expand_vector_init_merge_repeating_sequence): Ditto.
8501 (expand_vec_perm): Ditto.
8502 (shuffle_merge_patterns): Ditto.
8503 (shuffle_compress_patterns): Ditto.
8504 (shuffle_decompress_patterns): Ditto.
8505 (expand_reduction): Ditto.
8506 (get_mask_mode): Update return type.
8507 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
8508 is valid, and use new get_mask_mode interface.
8510 2023-07-31 Pan Li <pan2.li@intel.com>
8512 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
8513 Move rm suffix before mask.
8515 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8517 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
8518 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
8521 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
8524 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
8525 (extzv<mode>): Likewise.
8526 (insv<mode>): Likewise.
8527 (*testqi_ext_3): Likewise.
8528 (*btr<mode>_2): Likewise.
8529 (define_split): Likewise.
8530 (*btsq_imm): Likewise.
8531 (*btrq_imm): Likewise.
8532 (*btcq_imm): Likewise.
8533 (define_peephole2 x3): Likewise.
8534 (*bt<mode>): Likewise
8535 (*bt<mode>_mask): New define_insn_and_split.
8536 (*jcc_bt<mode>): Use QImode for offsets.
8537 (*jcc_bt<mode>_1): Delete obsolete pattern.
8538 (*jcc_bt<mode>_mask): Use QImode offsets.
8539 (*jcc_bt<mode>_mask_1): Likewise.
8540 (define_split): Likewise.
8541 (*bt<mode>_setcqi): Likewise.
8542 (*bt<mode>_setncqi): Likewise.
8543 (*bt<mode>_setnc<mode>): Likewise.
8544 (*bt<mode>_setncqi_2): Likewise.
8545 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
8546 (bmi2_bzhi_<mode>3): Use QImode offsets.
8547 (*bmi2_bzhi_<mode>3): Likewise.
8548 (*bmi2_bzhi_<mode>3_1): Likewise.
8549 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
8550 (@tbm_bextri_<mode>): Likewise.
8552 2023-07-29 Jan Hubicka <jh@suse.cz>
8554 * profile-count.cc (profile_probability::sqrt): New member function.
8555 (profile_probability::pow): Likewise.
8556 * profile-count.h: (profile_probability::sqrt): Declare
8557 (profile_probability::pow): Likewise.
8558 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
8560 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8562 * gimple-range-cache.cc (ssa_cache::merge_range): New.
8563 (ssa_lazy_cache::merge_range): New.
8564 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
8565 (class ssa_lazy_cache): Ditto.
8566 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
8568 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8570 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
8571 Move from value-query.cc.
8572 (substitute_and_fold_engine::value_of_stmt): Ditto.
8573 (substitute_and_fold_engine::range_of_expr): New.
8574 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
8575 range_query. New prototypes.
8576 * value-query.cc (value_query::value_on_edge): Relocate.
8577 (value_query::value_of_stmt): Ditto.
8578 * value-query.h (class value_query): Remove.
8579 (class range_query): Remove base class. Adjust prototypes.
8581 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8583 PR tree-optimization/110205
8584 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
8585 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
8587 * range-op.cc (operator_lshift): Add missing final overrides.
8588 (operator_rshift): Ditto.
8590 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
8592 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
8593 optimizations in BPF target.
8595 2023-07-28 Honza <jh@ryzen4.suse.cz>
8597 * cfgloopmanip.cc (loop_count_in): Break out from ...
8598 (loop_exit_for_scaling): Break out from ...
8599 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
8600 add more sanity check and debug info.
8601 (scale_loop_profile): ... here.
8602 (create_empty_loop_on_edge): Fix whitespac.
8603 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
8604 * loop-unroll.cc (unroll_loop_constant_iterations): Use
8605 update_loop_exit_probability_scale_dom_bbs.
8606 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
8607 (tree_transform_and_unroll_loop): Use
8608 update_loop_exit_probability_scale_dom_bbs.
8609 * tree-ssa-loop-split.cc (split_loop): Use
8610 update_loop_exit_probability_scale_dom_bbs.
8612 2023-07-28 Jan Hubicka <jh@suse.cz>
8615 * tree-ssa-loop-split.cc: Include value-query.h.
8616 (split_at_bb_p): Analyze cases where EQ/NE can be turned
8617 into LT/LE/GT/GE; return updated guard code.
8618 (split_loop): Use guard code.
8620 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
8621 Richard Biener <rguenther@suse.de>
8624 PR rtl-optimization/110587
8625 * expr.cc (emit_group_load_1): Simplify logic for calling
8626 force_reg on ORIG_SRC, to avoid making a copy if the source
8627 is already in a pseudo register.
8629 2023-07-28 Jan Hubicka <jh@suse.cz>
8631 PR middle-end/106923
8632 * tree-ssa-loop-split.cc (connect_loops): Change probability
8633 of the test preconditioning second loop to very_likely.
8634 (fix_loop_bb_probability): Handle correctly case where
8635 on of the arms of the conditional is empty.
8636 (split_loop): Fold the test guarding first condition to
8637 see if it is constant true; Set correct entry block
8638 probabilities of the split loops; determine correct loop
8641 2023-07-28 xuli <xuli1@eswincomputing.com>
8643 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
8644 vsadd[u] and vssub[u].
8645 * config/riscv/vector.md: Ditto.
8647 2023-07-28 Jan Hubicka <jh@suse.cz>
8649 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
8650 loops when IV test is not overflowing.
8652 2023-07-28 liuhongt <hongtao.liu@intel.com>
8655 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
8657 (avx512cd_maskw_vec_dup<mode>): Ditto.
8659 2023-07-27 David Faust <david.faust@oracle.com>
8663 * config/bpf/bpf.opt (msmov): New option.
8664 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
8665 * config/bpf/bpf.md (*extendsidi2): New.
8671 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
8672 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
8673 also enables -msmov.
8675 2023-07-27 David Faust <david.faust@oracle.com>
8677 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
8678 Add -mbswap and -msdiv eBPF options.
8679 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
8680 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
8683 2023-07-27 David Faust <david.faust@oracle.com>
8685 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
8686 in pseudo-C dialect output template.
8687 (sub<AM:mode>3): Likewise.
8689 2023-07-27 Jan Hubicka <jh@suse.cz>
8691 * tree-vect-loop.cc (optimize_mask_stores): Make store
8694 2023-07-27 Jan Hubicka <jh@suse.cz>
8696 * cfgloop.h (single_dom_exit): Declare.
8697 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
8698 * cfgrtl.cc (struct cfg_hooks): Fix comment.
8699 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
8700 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
8701 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
8703 (tree_transform_and_unroll_loop): ... here;
8705 2023-07-27 Jan Hubicka <jh@suse.cz>
8707 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
8708 tree-ssa-loop-manip.cc and avoid recursion.
8709 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
8710 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
8712 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
8713 (scale_dominated_blocks_in_loop): Declare.
8714 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
8715 (change_edge_frequency): Remove.
8716 * predict.h (change_edge_frequency): Remove.
8717 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
8719 (niter_for_unrolled_loop): Remove.
8720 (tree_transform_and_unroll_loop): Fix profile update.
8722 2023-07-27 Jan Hubicka <jh@suse.cz>
8724 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
8725 to guessed; fix count of new_bb.
8727 2023-07-27 Jan Hubicka <jh@suse.cz>
8729 * profile-count.h (profile_count::apply_probability): Fix
8730 handling of uninitialized probabilities, optimize scaling
8733 2023-07-27 Richard Biener <rguenther@suse.de>
8735 PR tree-optimization/91838
8736 * gimple-match-head.cc: Include attribs.h and asan.h.
8737 * generic-match-head.cc: Likewise.
8738 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
8740 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8742 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
8743 (ADJUST_ALIGNMENT): Ditto.
8744 (ADJUST_PRECISION): Ditto.
8746 (VECTOR_MODE_WITH_PREFIX): Ditto.
8747 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
8748 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
8749 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
8750 (legitimize_move): Enable basic VLS modes support.
8753 (get_vector_mode): Ditto.
8754 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
8755 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
8756 (VLS_ENTRY): New macro.
8757 (riscv_v_ext_mode_p): Add vls modes.
8758 (riscv_get_v_regno_alignment): New function.
8759 (riscv_print_operand): Add vls modes.
8760 (riscv_hard_regno_nregs): Ditto.
8761 (riscv_hard_regno_mode_ok): Ditto.
8762 (riscv_regmode_natural_size): Ditto.
8763 (riscv_vectorize_preferred_vector_alignment): Ditto.
8764 * config/riscv/riscv.md: Ditto.
8765 * config/riscv/vector-iterators.md: Ditto.
8766 * config/riscv/vector.md: Ditto.
8767 * config/riscv/autovec-vls.md: New file.
8769 2023-07-27 Pan Li <pan2.li@intel.com>
8771 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
8773 (vwrite_csr): Ditto.
8775 2023-07-27 demin.han <demin.han@starfivetech.com>
8777 * config/riscv/autovec.md: Delete which_alternative use in split
8779 2023-07-27 Richard Biener <rguenther@suse.de>
8781 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
8783 (pass_sink_code::execute): ... in the caller.
8785 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
8786 Richard Biener <rguenther@suse.de>
8788 PR tree-optimization/110776
8789 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
8792 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
8794 * config/riscv/riscv.md: Include zicond.md
8795 * config/riscv/zicond.md: New file.
8797 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
8799 * common/config/riscv/riscv-common.cc: New extension.
8800 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
8801 (TARGET_ZICOND): New target.
8803 2023-07-26 Carl Love <cel@us.ibm.com>
8805 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
8806 specifies the number of built-in arguments to check.
8807 (altivec_resolve_overloaded_builtin): Update calls to find_instance
8808 to pass the number of built-in arguments to be checked.
8810 2023-07-26 David Faust <david.faust@oracle.com>
8812 * config/bpf/bpf.opt (mv3-atomics): New option.
8813 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
8814 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
8815 (REG_CLASS_NAMES): Likewise.
8816 (REG_CLASS_CONTENTS): Likewise.
8817 (REGNO_REG_CLASS): Handle R0.
8818 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
8819 (UNSPEC_AAND): New unspec.
8820 (UNSPEC_AOR): Likewise.
8821 (UNSPEC_AXOR): Likewise.
8822 (UNSPEC_AFADD): Likewise.
8823 (UNSPEC_AFAND): Likewise.
8824 (UNSPEC_AFOR): Likewise.
8825 (UNSPEC_AFXOR): Likewise.
8826 (UNSPEC_AXCHG): Likewise.
8827 (UNSPEC_ACMPX): Likewise.
8828 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
8830 * config/bpf/atomic.md: ...Here. New file.
8831 * config/bpf/constraints.md (t): New constraint for R0.
8832 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
8834 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
8836 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
8839 2023-07-26 Carl Love <cel@us.ibm.com>
8841 * config/rs6000/rs6000-builtins.def: Rename
8842 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
8843 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
8844 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
8845 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
8846 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
8847 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
8848 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
8849 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
8850 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
8851 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
8852 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
8853 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
8854 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
8855 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
8856 * config/rs6000/rs6000-c.cc (find_instance): Add case
8857 RS6000_OVLD_VEC_REPLACE_UN.
8858 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
8859 Fix first argument type. Rename VREPLACE_UN_UV4SI as
8860 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
8861 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
8862 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
8863 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
8864 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
8865 REPLACE_ELT_V for vector modes.
8866 (REPLACE_ELT): New scalar mode iterator.
8867 (REPLACE_ELT_char): Add scalar attributes.
8868 (vreplace_un_<mode>): Change iterator and mode attribute.
8870 2023-07-26 David Malcolm <dmalcolm@redhat.com>
8873 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
8875 2023-07-26 Richard Biener <rguenther@suse.de>
8877 PR tree-optimization/106081
8878 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
8879 Assign layout -1 to splats.
8881 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8883 * range-op-mixed.h (class operator_cast): Add update_bitmask.
8884 * range-op.cc (operator_cast::update_bitmask): New.
8885 (operator_cast::fold_range): Call update_bitmask.
8887 2023-07-26 Li Xu <xuli1@eswincomputing.com>
8889 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
8890 scalar type to float16, eliminate warning.
8891 (vfloat16mf4x3_t): Ditto.
8892 (vfloat16mf4x4_t): Ditto.
8893 (vfloat16mf4x5_t): Ditto.
8894 (vfloat16mf4x6_t): Ditto.
8895 (vfloat16mf4x7_t): Ditto.
8896 (vfloat16mf4x8_t): Ditto.
8897 (vfloat16mf2x2_t): Ditto.
8898 (vfloat16mf2x3_t): Ditto.
8899 (vfloat16mf2x4_t): Ditto.
8900 (vfloat16mf2x5_t): Ditto.
8901 (vfloat16mf2x6_t): Ditto.
8902 (vfloat16mf2x7_t): Ditto.
8903 (vfloat16mf2x8_t): Ditto.
8904 (vfloat16m1x2_t): Ditto.
8905 (vfloat16m1x3_t): Ditto.
8906 (vfloat16m1x4_t): Ditto.
8907 (vfloat16m1x5_t): Ditto.
8908 (vfloat16m1x6_t): Ditto.
8909 (vfloat16m1x7_t): Ditto.
8910 (vfloat16m1x8_t): Ditto.
8911 (vfloat16m2x2_t): Ditto.
8912 (vfloat16m2x3_t): Ditto.
8913 (vfloat16m2x4_t): Ditto.
8914 (vfloat16m4x2_t): Ditto.
8915 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
8916 * config/riscv/vector.md: add tuple mode in attr sew.
8918 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
8921 * config/i386/i386.md (plusminusmult): New code iterator.
8922 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
8923 (movq_<mode>_to_sse): New expander.
8924 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
8925 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
8926 as a wrapper around V4SFmode operation.
8927 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
8928 nonimmediate_operand.
8929 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
8930 operand 2 predicates to nonimmediate_operand.
8931 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
8932 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
8933 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
8934 operand 2 predicates to nonimmediate_operand.
8935 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
8936 nonimmediate_operand.
8937 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
8938 operand 2 predicates to nonimmediate_operand.
8939 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
8940 (<smaxmin:code>v2sf3): Ditto.
8941 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
8942 predicates to nonimmediate_operand.
8943 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
8944 operand 1 and operand 2 predicates to nonimmediate_operand.
8945 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8946 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
8947 (*mmx_haddv2sf3_low): Ditto.
8948 (*mmx_hsubv2sf3_low): Ditto.
8949 (vec_addsubv2sf3): Ditto.
8950 (*mmx_maskcmpv2sf3_comm): Remove.
8951 (*mmx_maskcmpv2sf3): Remove.
8952 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
8953 (vcond<V2FI:mode>v2sf): Ditto.
8958 (fix_truncv2sfv2si2): Ditto.
8959 (fixuns_truncv2sfv2si2): Ditto.
8960 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
8961 Change operand 1 predicate to nonimmediate_operand.
8962 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
8963 (floatunsv2siv2sf2): Ditto.
8964 (mmx_floatv2siv2sf2): Remove SSE alternatives.
8965 Change operand 1 predicate to nonimmediate_operand.
8966 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
8968 (lrintv2sfv2si2): Ditto.
8970 (lceilv2sfv2si2): Ditto.
8971 (floorv2sf2): Ditto.
8972 (lfloorv2sfv2si2): Ditto.
8973 (btruncv2sf2): Ditto.
8974 (roundv2sf2): Ditto.
8975 (lroundv2sfv2si2): Ditto.
8976 (*mmx_roundv2sf2): Remove.
8978 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
8980 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
8982 2023-07-26 Richard Biener <rguenther@suse.de>
8984 PR tree-optimization/110799
8985 * tree-ssa-pre.cc (compute_avail): More thoroughly match
8986 up TBAA behavior of redundant loads.
8988 2023-07-26 Jakub Jelinek <jakub@redhat.com>
8990 PR tree-optimization/110755
8991 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
8992 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
8993 it is exact op1 + (-op1) or op1 - op1.
8995 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
8998 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
8999 operands output with "x".
9001 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9003 * range-op.cc (class operator_absu): Add update_bitmask.
9004 (operator_absu::update_bitmask): New.
9006 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9008 * range-op-mixed.h (class operator_abs): Add update_bitmask.
9009 * range-op.cc (operator_abs::update_bitmask): New.
9011 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9013 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
9014 * range-op.cc (operator_bitwise_not::update_bitmask): New.
9016 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9018 * range-op.cc (update_known_bitmask): Handle unary operators.
9020 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9022 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
9024 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
9026 * config/riscv/riscv.md: Likewise.
9028 2023-07-26 Jan Hubicka <jh@suse.cz>
9030 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
9031 if we divide by zero.
9033 2023-07-25 David Faust <david.faust@oracle.com>
9035 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
9036 enclosing parentheses for pseudo-C dialect.
9037 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
9038 operands of pseudo-C dialect output templates where needed.
9039 (zero_extendqidi2): Likewise.
9040 (zero_extendsidi2): Likewise.
9041 (*mov<MM:mode>): Likewise.
9043 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
9045 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
9046 (bit_value_mult_const): Same.
9047 (get_individual_bits): Same.
9049 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
9052 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
9053 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
9054 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
9055 (minmax_op): New int attribute.
9056 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
9057 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
9058 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
9060 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
9062 2023-07-24 David Faust <david.faust@oracle.com>
9064 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
9066 2023-07-24 Drew Ross <drross@redhat.com>
9067 Jakub Jelinek <jakub@redhat.com>
9069 PR middle-end/109986
9070 * generic-match-head.cc (bitwise_equal_p): New macro.
9071 * gimple-match-head.cc (bitwise_equal_p): New macro.
9072 (gimple_nop_convert): Declare.
9073 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
9074 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
9076 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
9078 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
9079 single quote rather than backquote in diagnostic.
9081 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9084 * config/bpf/bpf.opt: New command-line option -msdiv.
9085 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
9086 * config/bpf/bpf.cc (bpf_option_override): Initialize
9088 * doc/invoke.texi (eBPF Options): Document -msdiv.
9090 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
9092 * config/riscv/riscv.cc (riscv_option_override): Spell out
9093 greater than and use cannot in diagnostic string.
9095 2023-07-24 Richard Biener <rguenther@suse.de>
9097 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
9098 (_slp_tree::vec_stmts): Remove.
9099 (SLP_TREE_VEC_STMTS): Remove.
9100 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
9101 (_slp_tree::_slp_tree): Adjust.
9102 (_slp_tree::~_slp_tree): Likewise.
9103 (vect_get_slp_vect_def): Simplify.
9104 (vect_get_slp_defs): Likewise.
9105 (vect_transform_slp_perm_load_1): Adjust.
9106 (vect_add_slp_permutation): Likewise.
9107 (vect_schedule_slp_node): Likewise.
9108 (vectorize_slp_instance_root_stmt): Likewise.
9109 (vect_schedule_scc): Likewise.
9110 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
9111 (vectorizable_call): Likewise.
9112 (vectorizable_call): Likewise.
9113 (vect_create_vectorized_demotion_stmts): Likewise.
9114 (vectorizable_conversion): Likewise.
9115 (vectorizable_assignment): Likewise.
9116 (vectorizable_shift): Likewise.
9117 (vectorizable_operation): Likewise.
9118 (vectorizable_load): Likewise.
9119 (vectorizable_condition): Likewise.
9120 (vectorizable_comparison): Likewise.
9121 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
9122 (vectorize_fold_left_reduction): Use push_vec_def.
9123 (vect_transform_reduction): Likewise.
9124 (vect_transform_cycle_phi): Likewise.
9125 (vectorizable_lc_phi): Likewise.
9126 (vectorizable_phi): Likewise.
9127 (vectorizable_recurr): Likewise.
9128 (vectorizable_induction): Likewise.
9129 (vectorizable_live_operation): Likewise.
9131 2023-07-24 Richard Biener <rguenther@suse.de>
9133 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
9135 2023-07-24 Richard Biener <rguenther@suse.de>
9137 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
9138 * config/i386/i386-expand.cc: Likewise.
9139 * config/i386/i386-features.cc: Likewise.
9140 * config/i386/i386-options.cc: Likewise.
9142 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
9144 * tree-vect-stmts.cc (vectorizable_conversion): Handle
9145 more demotion/promotion for modifier == NONE.
9147 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
9152 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
9153 (extzv<mode>): Likewise.
9154 (insv<mode>): Likewise.
9155 (*testqi_ext_3): Likewise.
9156 (*btr<mode>_2): Likewise.
9157 (define_split): Likewise.
9158 (*btsq_imm): Likewise.
9159 (*btrq_imm): Likewise.
9160 (*btcq_imm): Likewise.
9161 (define_peephole2 x3): Likewise.
9162 (*bt<mode>): Likewise
9163 (*bt<mode>_mask): New define_insn_and_split.
9164 (*jcc_bt<mode>): Use QImode for offsets.
9165 (*jcc_bt<mode>_1): Delete obsolete pattern.
9166 (*jcc_bt<mode>_mask): Use QImode offsets.
9167 (*jcc_bt<mode>_mask_1): Likewise.
9168 (define_split): Likewise.
9169 (*bt<mode>_setcqi): Likewise.
9170 (*bt<mode>_setncqi): Likewise.
9171 (*bt<mode>_setnc<mode>): Likewise.
9172 (*bt<mode>_setncqi_2): Likewise.
9173 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
9174 (bmi2_bzhi_<mode>3): Use QImode offsets.
9175 (*bmi2_bzhi_<mode>3): Likewise.
9176 (*bmi2_bzhi_<mode>3_1): Likewise.
9177 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
9178 (@tbm_bextri_<mode>): Likewise.
9180 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9182 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
9183 * config/bpf/bpf.opt (mkernel): Remove option.
9184 * config/bpf/bpf.cc (bpf_target_macros): Do not define
9185 BPF_KERNEL_VERSION_CODE.
9187 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9190 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
9191 (mbswap): New option.
9192 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
9193 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
9194 * config/bpf/bpf.md: Use bswap instructions if available for
9195 bswap* insn, and fix constraint.
9196 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
9198 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9200 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
9201 (mask_len_fold_left_plus_<mode>): Ditto.
9202 * config/riscv/riscv-protos.h (enum insn_type): New enum.
9203 (enum reduction_type): Ditto.
9204 (expand_reduction): Add in-order reduction.
9205 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
9206 (expand_reduction): Add in-order reduction.
9208 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9210 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
9211 (vectorize_fold_left_reduction): Ditto.
9212 (vectorizable_reduction): Ditto.
9213 (vect_transform_reduction): Ditto.
9215 2023-07-24 Richard Biener <rguenther@suse.de>
9217 PR tree-optimization/110777
9218 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
9219 Avoid propagating abnormals.
9221 2023-07-24 Richard Biener <rguenther@suse.de>
9223 PR tree-optimization/110766
9224 * tree-scalar-evolution.cc
9225 (analyze_and_compute_bitwise_induction_effect): Check the PHI
9226 is defined in the loop header.
9228 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
9230 PR tree-optimization/110740
9231 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
9232 loop with a single scalar iteration.
9234 2023-07-24 Pan Li <pan2.li@intel.com>
9236 * config/riscv/riscv-vector-builtins-shapes.cc
9237 (struct alu_frm_def): Take range check.
9239 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
9242 * config/riscv/predicates.md (const_0_operand): Add back
9245 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
9247 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
9248 64-bit insertions into TImode optimizations with -O0, unless
9249 the function has the "naked" attribute (for PR target/110533).
9251 2023-07-22 Andrew Pinski <apinski@marvell.com>
9254 * rtl.h (extended_count): Change last argument type
9257 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
9259 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
9260 (extzv<mode>): Likewise.
9261 (insv<mode>): Likewise.
9262 (*testqi_ext_3): Likewise.
9263 (*btr<mode>_2): Likewise.
9264 (define_split): Likewise.
9265 (*btsq_imm): Likewise.
9266 (*btrq_imm): Likewise.
9267 (*btcq_imm): Likewise.
9268 (define_peephole2 x3): Likewise.
9269 (*bt<mode>): Likewise
9270 (*bt<mode>_mask): New define_insn_and_split.
9271 (*jcc_bt<mode>): Use QImode for offsets.
9272 (*jcc_bt<mode>_1): Delete obsolete pattern.
9273 (*jcc_bt<mode>_mask): Use QImode offsets.
9274 (*jcc_bt<mode>_mask_1): Likewise.
9275 (define_split): Likewise.
9276 (*bt<mode>_setcqi): Likewise.
9277 (*bt<mode>_setncqi): Likewise.
9278 (*bt<mode>_setnc<mode>): Likewise.
9279 (*bt<mode>_setncqi_2): Likewise.
9280 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
9281 (bmi2_bzhi_<mode>3): Use QImode offsets.
9282 (*bmi2_bzhi_<mode>3): Likewise.
9283 (*bmi2_bzhi_<mode>3_1): Likewise.
9284 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
9285 (@tbm_bextri_<mode>): Likewise.
9287 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
9289 * config/bfin/bfin.md (ones): Fix length computation.
9291 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
9293 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
9294 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
9295 instead of FRAME_POINTER_REGNUM to spill pseudos.
9297 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
9298 Richard Biener <rguenther@suse.de>
9301 * gimplify.cc (gimplify_compound_lval): If the array's type
9302 is error_mark_node then return GS_ERROR.
9304 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
9307 * config/bpf/bpf.opt: Added option -masm=<dialect>.
9308 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
9309 * config/bpf/bpf.cc (bpf_print_register): New function.
9310 (bpf_print_register): Support pseudo-c syntax for registers.
9311 (bpf_print_operand_address): Likewise.
9312 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
9313 (ASSEMBLER_DIALECT): Define.
9314 * config/bpf/bpf.md: Added pseudo-c templates.
9315 * doc/invoke.texi (-masm=): New eBPF option item.
9317 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
9319 * config/bpf/bpf.md: fixed template for neg instruction.
9321 2023-07-21 Jan Hubicka <jh@suse.cz>
9324 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
9325 profiles by vectorization factor.
9326 (vect_transform_loop): Check for flat profiles.
9328 2023-07-21 Jan Hubicka <jh@suse.cz>
9330 * cfgloop.h (maybe_flat_loop_profile): Declare
9331 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
9332 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
9334 2023-07-21 Jan Hubicka <jh@suse.cz>
9336 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
9337 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
9338 * predict.cc (estimate_bb_frequencies): Likewise.
9339 * profile.cc (branch_prob): Likewise.
9340 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
9342 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
9344 * config.in: Regenerate.
9345 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
9346 (LINK_COMMAND_SPEC_A): Add demangle handling.
9347 * configure: Regenerate.
9348 * configure.ac: Detect linker support for '-demangle'.
9350 2023-07-21 Jan Hubicka <jh@suse.cz>
9352 * sreal.cc (sreal::to_nearest_int): New.
9353 (sreal_verify_basics): Verify also to_nearest_int.
9354 (verify_aritmetics): Likewise.
9355 (sreal_verify_conversions): New.
9356 (sreal_cc_tests): Call sreal_verify_conversions.
9357 * sreal.h: (sreal::to_nearest_int): Declare
9359 2023-07-21 Jan Hubicka <jh@suse.cz>
9361 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
9362 (should_duplicate_loop_header_p): Return info on profitability.
9363 (do_while_loop_p): Watch for constant conditionals.
9364 (update_profile_after_ch): Do not sanity check that all
9365 static exits are taken.
9366 (ch_base::copy_headers): Run on all loops.
9367 (pass_ch::process_loop_p): Improve heuristics by handling also
9368 do_while loop and duplicating shortest sequence containing all
9371 2023-07-21 Jan Hubicka <jh@suse.cz>
9373 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
9374 tests first; update finite_p flag.
9376 2023-07-21 Jan Hubicka <jh@suse.cz>
9378 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
9379 * cfgloop.h (print_loop_info): Declare.
9380 * tree-cfg.cc (print_loop_info): Break out from ...; add
9381 printing of missing fields and profile
9382 (print_loop): ... here.
9384 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9386 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
9388 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9390 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
9391 (vectorizable_operation): Ditto.
9393 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9395 * config/riscv/autovec.md: Align order of mask and len.
9396 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
9397 (expand_gather_scatter): Ditto.
9398 * doc/md.texi: Ditto.
9399 * internal-fn.cc (add_len_and_mask_args): Ditto.
9400 (add_mask_and_len_args): Ditto.
9401 (expand_partial_load_optab_fn): Ditto.
9402 (expand_partial_store_optab_fn): Ditto.
9403 (expand_scatter_store_optab_fn): Ditto.
9404 (expand_gather_load_optab_fn): Ditto.
9405 (internal_fn_len_index): Ditto.
9406 (internal_fn_mask_index): Ditto.
9407 (internal_len_load_store_bias): Ditto.
9408 * tree-vect-stmts.cc (vectorizable_store): Ditto.
9409 (vectorizable_load): Ditto.
9411 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9413 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
9414 (mask_len_load<mode><vm>): Ditto.
9415 (len_maskstore<mode><vm>): Ditto.
9416 (mask_len_store<mode><vm>): Ditto.
9417 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
9418 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
9419 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
9420 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
9421 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
9422 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
9423 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
9424 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
9425 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
9426 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
9427 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
9428 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
9429 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
9430 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
9431 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
9432 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
9433 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
9434 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
9435 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
9436 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
9437 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
9438 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
9439 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
9440 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
9441 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
9442 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
9443 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
9444 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
9445 * doc/md.texi: Ditto.
9446 * genopinit.cc (main): Ditto.
9447 (CMP_NAME): Ditto. Ditto.
9448 * gimple-fold.cc (arith_overflowed_p): Ditto.
9449 (gimple_fold_partial_load_store_mem_ref): Ditto.
9450 (gimple_fold_call): Ditto.
9451 * internal-fn.cc (len_maskload_direct): Ditto.
9452 (mask_len_load_direct): Ditto.
9453 (len_maskstore_direct): Ditto.
9454 (mask_len_store_direct): Ditto.
9455 (expand_call_mem_ref): Ditto.
9456 (expand_len_maskload_optab_fn): Ditto.
9457 (expand_mask_len_load_optab_fn): Ditto.
9458 (expand_len_maskstore_optab_fn): Ditto.
9459 (expand_mask_len_store_optab_fn): Ditto.
9460 (direct_len_maskload_optab_supported_p): Ditto.
9461 (direct_mask_len_load_optab_supported_p): Ditto.
9462 (direct_len_maskstore_optab_supported_p): Ditto.
9463 (direct_mask_len_store_optab_supported_p): Ditto.
9464 (internal_load_fn_p): Ditto.
9465 (internal_store_fn_p): Ditto.
9466 (internal_gather_scatter_fn_p): Ditto.
9467 (internal_fn_len_index): Ditto.
9468 (internal_fn_mask_index): Ditto.
9469 (internal_fn_stored_value_index): Ditto.
9470 (internal_len_load_store_bias): Ditto.
9471 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
9472 (MASK_LEN_GATHER_LOAD): Ditto.
9473 (LEN_MASK_LOAD): Ditto.
9474 (MASK_LEN_LOAD): Ditto.
9475 (LEN_MASK_SCATTER_STORE): Ditto.
9476 (MASK_LEN_SCATTER_STORE): Ditto.
9477 (LEN_MASK_STORE): Ditto.
9478 (MASK_LEN_STORE): Ditto.
9479 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
9480 (supports_vec_scatter_store_p): Ditto.
9481 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
9482 (target_supports_len_load_store_p): Ditto.
9483 * optabs.def (OPTAB_CD): Ditto.
9484 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
9485 (call_may_clobber_ref_p_1): Ditto.
9486 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
9487 (dse_optimize_stmt): Ditto.
9488 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
9489 (get_alias_ptr_type_for_ptr_address): Ditto.
9490 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
9491 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
9492 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9493 (vect_get_strided_load_store_ops): Ditto.
9494 (vectorizable_store): Ditto.
9495 (vectorizable_load): Ditto.
9497 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
9499 * config/i386/i386.opt: Fix a typo.
9501 2023-07-21 Richard Biener <rguenther@suse.de>
9503 PR tree-optimization/88540
9504 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
9505 with NaNs but handle the simple case by if-converting to a
9508 2023-07-21 Andrew Pinski <apinski@marvell.com>
9510 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
9513 2023-07-21 Richard Biener <rguenther@suse.de>
9515 PR tree-optimization/110742
9516 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
9517 Do not materialize an edge permutation in an external node with
9519 (vect_slp_analyze_node_operations_1): Guard purely internal
9522 2023-07-21 Jan Hubicka <jh@suse.cz>
9524 * cfgloop.cc: Include sreal.h.
9525 (flow_loop_dump): Dump sreal iteration exsitmate.
9526 (get_estimated_loop_iterations): Update.
9527 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
9528 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
9529 (expected_loop_iterations_unbounded): Use new API.
9530 * cfgloopmanip.cc (scale_loop_profile): Use
9531 expected_loop_iterations_by_profile
9532 * predict.cc (pass_profile::execute): Likewise.
9533 * profile.cc (branch_prob): Likewise.
9534 * tree-ssa-loop-niter.cc: Include sreal.h.
9535 (estimate_numbers_of_iterations): Likewise
9537 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
9539 PR tree-optimization/110744
9540 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
9541 operand for ifn IFN_LEN_STORE.
9543 2023-07-21 liuhongt <hongtao.liu@intel.com>
9546 * common.opt: (fcf-protection=): Add EnumSet attribute to
9547 support combination of params.
9549 2023-07-21 David Malcolm <dmalcolm@redhat.com>
9551 PR middle-end/110612
9552 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
9554 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
9555 (table_geometry::table_y_to_canvas_y): Likewise.
9556 * text-art/table.h (table_geometry::m_table): Drop unused field.
9557 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
9560 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
9563 * config/i386/i386-features.cc
9564 (general_scalar_chain::compute_convert_gain): Calculate gain
9565 for extend higpart case.
9566 (general_scalar_chain::convert_op): Handle
9567 ASHIFTRT/ASHIFT combined RTX.
9568 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
9569 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
9570 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
9571 New define_insn_and_split pattern.
9572 (*extendv2di2_highpart_stv): Ditto.
9574 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
9576 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
9579 2023-07-20 Andrew Pinski <apinski@marvell.com>
9581 * combine.cc (dump_combine_stats): Remove.
9582 (dump_combine_total_stats): Remove.
9583 (total_attempts, total_merges, total_extras,
9584 total_successes): Remove.
9585 (combine_instructions): Don't increment total stats
9586 instead use statistics_counter_event.
9587 * dumpfile.cc (print_combine_total_stats): Remove.
9588 * dumpfile.h (print_combine_total_stats): Remove.
9589 (dump_combine_total_stats): Remove.
9590 * passes.cc (finish_optimization_passes):
9591 Don't call print_combine_total_stats.
9592 * rtl.h (dump_combine_total_stats): Remove.
9593 (dump_combine_stats): Remove.
9595 2023-07-20 Jan Hubicka <jh@suse.cz>
9597 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
9600 2023-07-20 Martin Jambor <mjambor@suse.cz>
9602 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
9603 (analyzer-text-art-ideal-canvas-width): Likewise.
9604 (analyzer-text-art-string-ellipsis-head-len): Likewise.
9605 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
9607 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9609 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
9610 Refine code structure.
9612 2023-07-20 Jan Hubicka <jh@suse.cz>
9614 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
9615 (get_range_query): ... this one; do
9616 (static_loop_exit): Add query parametr, turn ranger to reference.
9617 (loop_static_stmt_p): New function.
9618 (loop_static_op_p): New function.
9619 (loop_iv_derived_p): Remove.
9620 (loop_combined_static_and_iv_p): New function.
9621 (should_duplicate_loop_header_p): Discover combined onditionals;
9622 do not track iv derived; improve dumps.
9623 (pass_ch::execute): Fix whitespace.
9625 2023-07-20 Richard Biener <rguenther@suse.de>
9627 PR tree-optimization/110204
9628 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
9629 Look through copies generated by PRE.
9631 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
9633 * tree-vect-stmts.cc (get_group_load_store_type): Account for
9634 `gap` when checking if need to peel twice.
9636 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
9639 * doc/extend.texi: Document iseqsig builtin.
9640 * builtins.cc (fold_builtin_iseqsig): New function.
9641 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
9642 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
9643 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
9645 2023-07-20 Pan Li <pan2.li@intel.com>
9647 * config/riscv/vector.md: Fix incorrect match_operand.
9649 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
9651 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
9652 force_reg, to use SUBREG rather than create a new pseudo when
9653 inserting DFmode fields into TImode with insvti_{high,low}part.
9654 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
9655 define_insn_and_split...
9656 (*concatditi3_3): 64-bit implementation. Provide alternative
9657 that allows register allocation to use SSE registers that is
9658 split into vec_concatv2di after reload.
9659 (*concatsidi3_3): 32-bit implementation.
9661 2023-07-20 Richard Biener <rguenther@suse.de>
9664 * internal-fn.cc (expand_vec_cond_optab_fn): When the
9665 value operands are equal to the original comparison operands
9666 preserve that equality by re-using the comparison expansion.
9667 * optabs.cc (emit_conditional_move): When the value operands
9668 are equal to the comparison operands and would be forced to
9669 a register by prepare_cmp_insn do so earlier, preserving the
9672 2023-07-20 Pan Li <pan2.li@intel.com>
9674 * config/riscv/vector.md: Align pattern format.
9676 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
9678 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
9679 Granite Rapids{, D} from documentation.
9681 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9683 * config/riscv/autovec.md
9684 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
9685 Refactor RVV machine modes.
9686 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9687 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9688 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9689 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9690 (len_mask_gather_load<mode><mode>): Ditto.
9691 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9692 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9693 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9694 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9695 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9696 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9697 (len_mask_scatter_store<mode><mode>): Ditto.
9698 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9699 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
9700 (ADJUST_NUNITS): Ditto.
9701 (ADJUST_ALIGNMENT): Ditto.
9702 (ADJUST_BYTESIZE): Ditto.
9703 (ADJUST_PRECISION): Ditto.
9705 (RVV_WHOLE_MODES): Ditto.
9706 (RVV_FRACT_MODE): Ditto.
9707 (RVV_NF8_MODES): Ditto.
9708 (RVV_NF4_MODES): Ditto.
9709 (VECTOR_MODES_WITH_PREFIX): Ditto.
9710 (VECTOR_MODE_WITH_PREFIX): Ditto.
9711 (RVV_TUPLE_MODES): Ditto.
9712 (RVV_NF2_MODES): Ditto.
9713 (RVV_TUPLE_PARTIAL_MODES): Ditto.
9714 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
9716 (TUPLE_ENTRY): Ditto.
9720 (preferred_simd_mode): Ditto.
9721 (autovectorize_vector_modes): Ditto.
9722 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
9723 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
9731 (vint8mf8_t): Ditto.
9732 (vuint8mf8_t): Ditto.
9733 (vint8mf4_t): Ditto.
9734 (vuint8mf4_t): Ditto.
9735 (vint8mf2_t): Ditto.
9736 (vuint8mf2_t): Ditto.
9738 (vuint8m1_t): Ditto.
9740 (vuint8m2_t): Ditto.
9742 (vuint8m4_t): Ditto.
9744 (vuint8m8_t): Ditto.
9745 (vint16mf4_t): Ditto.
9746 (vuint16mf4_t): Ditto.
9747 (vint16mf2_t): Ditto.
9748 (vuint16mf2_t): Ditto.
9749 (vint16m1_t): Ditto.
9750 (vuint16m1_t): Ditto.
9751 (vint16m2_t): Ditto.
9752 (vuint16m2_t): Ditto.
9753 (vint16m4_t): Ditto.
9754 (vuint16m4_t): Ditto.
9755 (vint16m8_t): Ditto.
9756 (vuint16m8_t): Ditto.
9757 (vint32mf2_t): Ditto.
9758 (vuint32mf2_t): Ditto.
9759 (vint32m1_t): Ditto.
9760 (vuint32m1_t): Ditto.
9761 (vint32m2_t): Ditto.
9762 (vuint32m2_t): Ditto.
9763 (vint32m4_t): Ditto.
9764 (vuint32m4_t): Ditto.
9765 (vint32m8_t): Ditto.
9766 (vuint32m8_t): Ditto.
9767 (vint64m1_t): Ditto.
9768 (vuint64m1_t): Ditto.
9769 (vint64m2_t): Ditto.
9770 (vuint64m2_t): Ditto.
9771 (vint64m4_t): Ditto.
9772 (vuint64m4_t): Ditto.
9773 (vint64m8_t): Ditto.
9774 (vuint64m8_t): Ditto.
9775 (vfloat16mf4_t): Ditto.
9776 (vfloat16mf2_t): Ditto.
9777 (vfloat16m1_t): Ditto.
9778 (vfloat16m2_t): Ditto.
9779 (vfloat16m4_t): Ditto.
9780 (vfloat16m8_t): Ditto.
9781 (vfloat32mf2_t): Ditto.
9782 (vfloat32m1_t): Ditto.
9783 (vfloat32m2_t): Ditto.
9784 (vfloat32m4_t): Ditto.
9785 (vfloat32m8_t): Ditto.
9786 (vfloat64m1_t): Ditto.
9787 (vfloat64m2_t): Ditto.
9788 (vfloat64m4_t): Ditto.
9789 (vfloat64m8_t): Ditto.
9790 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
9791 (TUPLE_ENTRY): Ditto.
9792 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
9793 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
9794 (riscv_v_adjust_nunits): Ditto.
9795 (riscv_v_adjust_bytesize): Ditto.
9796 (riscv_v_adjust_precision): Ditto.
9797 (riscv_convert_vector_bits): Ditto.
9798 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
9799 * config/riscv/riscv.md: Ditto.
9800 * config/riscv/vector-iterators.md: Ditto.
9801 * config/riscv/vector.md
9802 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9803 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9804 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9805 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9806 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9807 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9808 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
9809 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
9810 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
9811 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
9812 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
9813 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
9814 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
9815 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
9816 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
9817 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
9818 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
9819 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
9820 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
9821 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
9822 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
9823 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
9824 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
9825 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
9826 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
9827 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
9828 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
9829 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
9830 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
9831 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
9832 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
9833 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
9834 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
9836 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
9838 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
9839 (lra_asm_insn_error): New prototype.
9840 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
9842 (lra_spill): Call lra_update_fp2sp_elimination.
9843 * lra-eliminations.cc: Remove trailing spaces.
9844 (elimination_fp2sp_occured_p): New static flag.
9845 (lra_eliminate_regs_1): Set the flag up.
9846 (update_reg_eliminate): Modify the assert for stack to frame
9847 pointer elimination.
9848 (lra_update_fp2sp_elimination): New function.
9849 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
9851 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
9853 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
9855 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
9856 dependencies from target pragmas.
9857 * config/aarch64/arm_fp16.h (target): Likewise.
9858 * config/aarch64/arm_neon.h (target): Likewise.
9860 2023-07-19 Andrew Pinski <apinski@marvell.com>
9862 PR tree-optimization/110252
9863 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
9864 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
9865 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
9866 (match_simplify_replacement): Temporarily
9867 remove the flow sensitive info on the two statements that might
9870 2023-07-19 Andrew Pinski <apinski@marvell.com>
9872 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
9873 with flow_sensitive_info_storage.
9874 (follow_outer_ssa_edges): Update how to save off the flow
9876 (maybe_fold_comparisons_from_match_pd): Update restoring
9877 of flow sensitive info.
9878 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
9879 (flow_sensitive_info_storage::restore): New method.
9880 (flow_sensitive_info_storage::save_and_clear): New method.
9881 (flow_sensitive_info_storage::clear_storage): New method.
9882 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
9884 2023-07-19 Andrew Pinski <apinski@marvell.com>
9886 PR tree-optimization/110726
9887 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
9888 Add checks to make sure the type was one bit precision
9891 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9893 * doc/md.texi: Add mask_len_fold_left_plus.
9894 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
9895 (expand_mask_len_fold_left_optab_fn): Ditto.
9896 (direct_mask_len_fold_left_optab_supported_p): Ditto.
9897 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
9898 * optabs.def (OPTAB_D): Ditto.
9900 2023-07-19 Jakub Jelinek <jakub@redhat.com>
9902 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
9904 2023-07-19 Jakub Jelinek <jakub@redhat.com>
9906 PR tree-optimization/110731
9907 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
9908 divisor as UNSIGNED regardless of sgn.
9910 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
9912 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
9913 (standard_extensions_p): Add check.
9914 (riscv_subset_list::add): Just return NULL if it failed before.
9915 (riscv_subset_list::parse_std_ext): Continue parse when find a error
9916 (riscv_subset_list::parse): Just return NULL if it failed before.
9917 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
9919 2023-07-19 Jan Beulich <jbeulich@suse.com>
9921 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
9923 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
9925 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
9926 gen_vec_interleave_low. Rename local variable.
9928 2023-07-19 Jan Beulich <jbeulich@suse.com>
9930 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
9931 alternative. Move AVX512VL part of condition to new "enabled"
9934 2023-07-19 liuhongt <hongtao.liu@intel.com>
9937 * config/i386/i386-builtins.cc
9938 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
9939 (ix86_register_bf16_builtin_type): Ditto.
9940 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
9941 isn't available, undef the macros which are used to check the
9942 backend support of the _Float16/__bf16 types when building
9943 libstdc++ and libgcc.
9944 * config/i386/i386.cc (construct_container): Issue errors for
9945 HFmode/BFmode when TARGET_SSE2 is not available.
9946 (function_value_32): Ditto.
9947 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
9948 (ix86_libgcc_floating_mode_supported_p): Ditto.
9949 (ix86_emit_support_tinfos): Adjust codes.
9950 (ix86_invalid_conversion): Return diagnostic message string
9951 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
9952 (ix86_invalid_unary_op): New function.
9953 (ix86_invalid_binary_op): Ditto.
9954 (TARGET_INVALID_UNARY_OP): Define.
9955 (TARGET_INVALID_BINARY_OP): Define.
9956 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
9957 related instrinsics header files.
9958 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
9960 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
9962 * dwarf2asm.cc: Change FALSE to false.
9963 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
9964 * dwarf2out.cc (matches_main_base): Change return type from
9965 int to bool. Change "last_match" variable to bool.
9966 (dump_struct_debug): Change return type from int to bool.
9967 Change "matches" and "result" function arguments to bool.
9968 (is_pseudo_reg): Change return type from int to bool.
9969 (is_tagged_type): Ditto.
9970 (same_loc_p): Ditto.
9971 (same_dw_val_p): Change return type from int to bool and adjust
9972 function body accordingly.
9973 (same_attr_p): Ditto.
9974 (same_die_p): Ditto.
9975 (is_type_die): Ditto.
9976 (is_declaration_die): Ditto.
9977 (should_move_die_to_comdat): Ditto.
9978 (is_base_type): Ditto.
9979 (is_based_loc): Ditto.
9980 (local_scope_p): Ditto.
9981 (class_scope_p): Ditto.
9982 (class_or_namespace_scope_p): Ditto.
9983 (is_tagged_type): Ditto.
9984 (is_rust): Use void argument.
9985 (is_nested_in_subprogram): Change return type from int to bool.
9986 (contains_subprogram_definition): Ditto.
9987 (gen_struct_or_union_type_die): Change "nested", "complete"
9988 and "ns_decl" variables to bool.
9989 (is_naming_typedef_decl): Change FALSE to false.
9991 2023-07-18 Jan Hubicka <jh@suse.cz>
9993 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
9994 for queries not in headers.
9995 (static_loop_exit): Add basic blck parameter; update use of
9997 (should_duplicate_loop_header_p): Add ranger and static_exits
9998 parameter. Do not account statements that will be optimized
9999 out after duplicaiton in overall size. Add ranger query to
10001 (update_profile_after_ch): Take static_exits has set instead of
10002 single eliminated_edge.
10003 (ch_base::copy_headers): Do all analysis in the first pass;
10004 remember invariant_exits and static_exits.
10006 2023-07-18 Jason Merrill <jason@redhat.com>
10008 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
10010 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
10012 * doc/gm2.texi (Semantic checking): Change example testwithptr
10015 2023-07-18 Richard Biener <rguenther@suse.de>
10017 PR middle-end/105715
10018 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
10019 (pass_gimple_isel::execute): ... this. Duplicate
10020 comparison defs of COND_EXPRs.
10022 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10024 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
10025 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
10026 (riscv_convert_vector_bits): Ditto.
10028 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10030 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
10031 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
10033 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
10035 * config/s390/vx-builtins.md: New vsel pattern.
10037 2023-07-18 liuhongt <hongtao.liu@intel.com>
10040 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
10041 Remove # from assemble output.
10043 2023-07-18 liuhongt <hongtao.liu@intel.com>
10046 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
10047 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
10048 3 define_peephole2 after the pattern.
10050 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10052 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
10054 2023-07-18 Pan Li <pan2.li@intel.com>
10055 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10057 * config/riscv/riscv.cc (struct machine_function): Add new field.
10058 (riscv_static_frm_mode_p): New function.
10059 (riscv_emit_frm_mode_set): New function for emit FRM.
10060 (riscv_emit_mode_set): Extract function for FRM.
10061 (riscv_mode_needed): Fix the TODO.
10062 (riscv_mode_entry): Initial dynamic frm RTL.
10063 (riscv_mode_exit): Return DYN_EXIT.
10064 * config/riscv/riscv.md: Add rdfrm.
10065 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
10066 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
10068 (fsrmsi_backup): New pattern for swap.
10069 (fsrmsi_restore): New pattern for restore.
10070 (fsrmsi_restore_exit): New pattern for restore exit.
10071 (frrmsi): New pattern for backup.
10073 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
10075 * doc/extend.texi: Add @cindex on __auto_type.
10077 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
10079 * combine-stack-adj.cc (stack_memref_p): Change return type from
10080 int to bool and adjust function body accordingly.
10081 (rest_of_handle_stack_adjustments): Change return type to void.
10083 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
10085 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
10086 (cant_combine_insn_p): Change return type from int to bool and adjust
10087 function body accordingly.
10088 (can_combine_p): Ditto.
10089 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
10090 function arguments from int to bool.
10091 (contains_muldiv): Change return type from int to bool and adjust
10092 function body accordingly.
10093 (try_combine): Ditto. Change "new_direct_jump" pointer function
10094 argument from int to bool. Change "substed_i2", "substed_i1",
10095 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
10096 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
10097 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
10098 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
10099 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
10100 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
10102 (subst): Change "in_dest", "in_cond" and "unique_copy" function
10103 arguments from int to bool.
10104 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
10105 arguments from int to bool.
10106 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
10107 function argument from int to bool.
10108 (force_int_to_mode): Change "just_select" function argument
10109 from int to bool. Change "next_select" variable to bool.
10110 (rtx_equal_for_field_assignment_p): Change return type from
10111 int to bool and adjust function body accordingly.
10112 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
10113 argument from int to bool.
10114 (get_last_value_validate): Change return type from int to bool
10115 and adjust function body accordingly.
10116 (reg_dead_at_p): Ditto.
10117 (reg_bitfield_target_p): Ditto.
10118 (combine_instructions): Ditto. Change "new_direct_jump"
10120 (can_combine_p): Change return type from int to bool
10121 and adjust function body accordingly.
10122 (likely_spilled_retval_p): Ditto.
10123 (can_change_dest_mode): Change "added_sets" function argument
10125 (find_split_point): Change "unsignedp" variable to bool.
10126 (simplify_if_then_else): Change "comparison_p" and "swapped"
10128 (simplify_set): Change "other_changed" variable to bool.
10129 (expand_compound_operation): Change "unsignedp" variable to bool.
10130 (force_to_mode): Change "just_select" function argument
10131 from int to bool. Change "next_select" variable to bool.
10132 (extended_count): Change "unsignedp" function argument to bool.
10133 (simplify_shift_const_1): Change "complement_p" variable to bool.
10134 (simplify_comparison): Change "changed" variable to bool.
10135 (rest_of_handle_combine): Change return type to void.
10137 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10140 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
10142 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
10144 * ira.cc (setup_reg_class_relations): Continue
10145 if regclass cl3 is hard_reg_set_empty_p.
10147 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10149 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
10151 2023-07-17 Martin Jambor <mjambor@suse.cz>
10153 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
10156 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10158 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
10160 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
10163 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
10164 recur add all implied extensions.
10165 (riscv_subset_list::check_implied_ext): Add new method.
10166 (riscv_subset_list::parse): Call checker check_implied_ext.
10167 * config/riscv/riscv-subset.h: Add new method.
10169 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10171 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
10172 (reduc_smax_scal_<mode>): Ditto.
10173 (reduc_umax_scal_<mode>): Ditto.
10174 (reduc_smin_scal_<mode>): Ditto.
10175 (reduc_umin_scal_<mode>): Ditto.
10176 (reduc_and_scal_<mode>): Ditto.
10177 (reduc_ior_scal_<mode>): Ditto.
10178 (reduc_xor_scal_<mode>): Ditto.
10179 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
10180 (expand_reduction): New function.
10181 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
10182 (emit_vlmax_fp_reduction_insn): Ditto.
10183 (get_m1_mode): Ditto.
10184 (expand_cond_len_binop): Fix name.
10185 (expand_reduction): New function
10186 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
10187 (validate_change_or_fail): New function.
10188 (change_insn): Fix VSETVL BUG.
10189 (change_vsetvl_insn): Ditto.
10190 (pass_vsetvl::backward_demand_fusion): Ditto.
10191 (pass_vsetvl::df_post_optimization): Ditto.
10193 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10195 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
10197 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
10199 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
10200 Remove parameter name from declaration of unused parameter.
10202 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
10204 PR tree-optimization/110652
10205 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
10208 2023-07-17 Richard Biener <rguenther@suse.de>
10210 PR tree-optimization/110669
10211 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
10212 Check we matched a header PHI.
10214 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10216 * tree-ssanames.cc (set_bitmask): New.
10217 * tree-ssanames.h (set_bitmask): New.
10219 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10221 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
10223 * value-range.h (irange_bitmask::union_): Normalize beforehand.
10224 (irange_bitmask::intersect): Same.
10226 2023-07-17 Andrew Pinski <apinski@marvell.com>
10228 PR tree-optimization/95923
10229 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
10231 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
10233 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
10234 to the std::sort comparison lambda function const.
10236 2023-07-17 Andrew Pinski <apinski@marvell.com>
10238 PR tree-optimization/110666
10239 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
10241 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
10243 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
10244 Arrow Lake and Arrow Lake S.
10245 * common/config/i386/i386-common.cc:
10246 (processor_name): Add arrowlake.
10247 (processor_alias_table): Add arrow lake, arrow lake s and lunar
10249 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
10250 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
10251 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
10252 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
10254 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
10256 * config/i386/i386-options.cc (m_ARROWLAKE): New.
10257 (processor_cost_table): Add arrowlake.
10258 * config/i386/i386.h (enum processor_type):
10259 Add PROCESSOR_ARROWLAKE.
10260 * config/i386/x86-tune.def: Add m_ARROWLAKE.
10261 * doc/extend.texi: Add arrowlake and arrowlake-s.
10262 * doc/invoke.texi: Ditto.
10264 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10266 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
10267 have the same iterator. Also renaming all the occurence to
10269 (usdot_prod<mode>): New define_expand.
10270 (udot_prod<mode>): Ditto.
10272 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10274 * common/config/i386/cpuinfo.h (get_available_features):
10276 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
10277 OPTION_MASK_ISA2_SM4_UNSET): New.
10278 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
10279 (ix86_handle_option): Handle -msm4.
10280 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10282 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10284 * config.gcc: Add sm4intrin.h.
10285 * config/i386/cpuid.h (bit_SM4): New.
10286 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10287 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10289 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
10290 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
10291 (ix86_valid_target_attribute_inner_p): Handle sm4.
10292 * config/i386/i386.opt: Add option -msm4.
10293 * config/i386/immintrin.h: Include sm4intrin.h
10294 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
10295 (vsm4rnds4_<mode>): Ditto.
10296 * doc/extend.texi: Document sm4.
10297 * doc/invoke.texi: Document -msm4.
10298 * doc/sourcebuild.texi: Document target sm4.
10299 * config/i386/sm4intrin.h: New file.
10301 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10303 * common/config/i386/cpuinfo.h (get_available_features):
10305 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
10306 OPTION_MASK_ISA2_SHA512_UNSET): New.
10307 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
10308 (ix86_handle_option): Handle -msha512.
10309 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10310 Add FEATURE_SHA512.
10311 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10313 * config.gcc: Add sha512intrin.h.
10314 * config/i386/cpuid.h (bit_SHA512): New.
10315 * config/i386/i386-builtin-types.def:
10316 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
10317 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10318 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10320 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
10321 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
10322 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
10323 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
10324 (ix86_valid_target_attribute_inner_p): Handle sha512.
10325 * config/i386/i386.opt: Add option -msha512.
10326 * config/i386/immintrin.h: Include sha512intrin.h.
10327 * config/i386/sse.md (vsha512msg1): New define insn.
10328 (vsha512msg2): Ditto.
10329 (vsha512rnds2): Ditto.
10330 * doc/extend.texi: Document sha512.
10331 * doc/invoke.texi: Document -msha512.
10332 * doc/sourcebuild.texi: Document target sha512.
10333 * config/i386/sha512intrin.h: New file.
10335 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10337 * common/config/i386/cpuinfo.h (get_available_features):
10339 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
10340 OPTION_MASK_ISA2_SM3_UNSET): New.
10341 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
10342 (ix86_handle_option): Handle -msm3.
10343 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10345 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10347 * config.gcc: Add sm3intrin.h
10348 * config/i386/cpuid.h (bit_SM3): New.
10349 * config/i386/i386-builtin-types.def:
10350 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
10351 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10352 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10354 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
10355 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
10356 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
10357 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
10358 (ix86_valid_target_attribute_inner_p): Handle sm3.
10359 * config/i386/i386.opt: Add option -msm3.
10360 * config/i386/immintrin.h: Include sm3intrin.h.
10361 * config/i386/sse.md (vsm3msg1): New define insn.
10363 (vsm3rnds2): Ditto.
10364 * doc/extend.texi: Document sm3.
10365 * doc/invoke.texi: Document -msm3.
10366 * doc/sourcebuild.texi: Document target sm3.
10367 * config/i386/sm3intrin.h: New file.
10369 2023-07-17 Kong Lingling <lingling.kong@intel.com>
10370 Haochen Jiang <haochen.jiang@intel.com>
10372 * common/config/i386/cpuinfo.h (get_available_features): Detect
10374 * common/config/i386/i386-common.cc
10375 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
10376 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
10377 (ix86_handle_option): Handle -mavxvnniint16.
10378 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10379 Add FEATURE_AVXVNNIINT16.
10380 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10382 * config.gcc: Add avxvnniint16.h.
10383 * config/i386/avxvnniint16intrin.h: New file.
10384 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
10385 * config/i386/i386-builtin.def: Add new builtins.
10386 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10388 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
10389 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
10390 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
10391 * config/i386/i386.opt: Add option -mavxvnniint16.
10392 * config/i386/immintrin.h: Include avxvnniint16.h.
10393 * config/i386/sse.md
10394 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
10395 * doc/extend.texi: Document avxvnniint16.
10396 * doc/invoke.texi: Document -mavxvnniint16.
10397 * doc/sourcebuild.texi: Document target avxvnniint16.
10399 2023-07-16 Jan Hubicka <jh@suse.cz>
10401 PR middle-end/110649
10402 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
10403 (vect_transform_loop): Move scale_profile_for_vect_loop after
10404 upper bound updates.
10406 2023-07-16 Jan Hubicka <jh@suse.cz>
10408 PR tree-optimization/110649
10409 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
10410 probability of the if-then-else construct.
10412 2023-07-16 Jan Hubicka <jh@suse.cz>
10414 PR middle-end/110649
10415 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
10417 2023-07-15 Andrew Pinski <apinski@marvell.com>
10419 * doc/contrib.texi: Update my entry.
10421 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
10423 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
10425 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
10426 (tld_load): Likewise.
10427 (tgd_load_pic): Change to expander.
10428 (tld_load_pic, tld_offset_load, tp_load): Likewise.
10429 (tie_load_pic, tle_load): Likewise.
10430 (tgd_load_picsi, tgd_load_picdi): New.
10431 (tld_load_picsi, tld_load_picdi): New.
10432 (tld_offset_load<P:mode>): New.
10433 (tp_load<P:mode>): New.
10434 (tie_load_picsi, tie_load_picdi): New.
10435 (tle_load<P:mode>): New.
10437 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10439 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
10440 (vcmlaq_rot180, vcmlaq_rot270): New.
10441 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
10442 (vcmlaq_rot180, vcmlaq_rot270): New.
10443 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
10444 (vcmlaq_rot180, vcmlaq_rot270): New.
10445 * config/arm/arm-mve-builtins.cc
10446 (function_instance::has_inactive_argument): Handle vcmlaq,
10447 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
10448 * config/arm/arm_mve.h (vcmlaq): Delete.
10449 (vcmlaq_rot180): Delete.
10450 (vcmlaq_rot270): Delete.
10451 (vcmlaq_rot90): Delete.
10452 (vcmlaq_m): Delete.
10453 (vcmlaq_rot180_m): Delete.
10454 (vcmlaq_rot270_m): Delete.
10455 (vcmlaq_rot90_m): Delete.
10456 (vcmlaq_f16): Delete.
10457 (vcmlaq_rot180_f16): Delete.
10458 (vcmlaq_rot270_f16): Delete.
10459 (vcmlaq_rot90_f16): Delete.
10460 (vcmlaq_f32): Delete.
10461 (vcmlaq_rot180_f32): Delete.
10462 (vcmlaq_rot270_f32): Delete.
10463 (vcmlaq_rot90_f32): Delete.
10464 (vcmlaq_m_f32): Delete.
10465 (vcmlaq_m_f16): Delete.
10466 (vcmlaq_rot180_m_f32): Delete.
10467 (vcmlaq_rot180_m_f16): Delete.
10468 (vcmlaq_rot270_m_f32): Delete.
10469 (vcmlaq_rot270_m_f16): Delete.
10470 (vcmlaq_rot90_m_f32): Delete.
10471 (vcmlaq_rot90_m_f16): Delete.
10472 (__arm_vcmlaq_f16): Delete.
10473 (__arm_vcmlaq_rot180_f16): Delete.
10474 (__arm_vcmlaq_rot270_f16): Delete.
10475 (__arm_vcmlaq_rot90_f16): Delete.
10476 (__arm_vcmlaq_f32): Delete.
10477 (__arm_vcmlaq_rot180_f32): Delete.
10478 (__arm_vcmlaq_rot270_f32): Delete.
10479 (__arm_vcmlaq_rot90_f32): Delete.
10480 (__arm_vcmlaq_m_f32): Delete.
10481 (__arm_vcmlaq_m_f16): Delete.
10482 (__arm_vcmlaq_rot180_m_f32): Delete.
10483 (__arm_vcmlaq_rot180_m_f16): Delete.
10484 (__arm_vcmlaq_rot270_m_f32): Delete.
10485 (__arm_vcmlaq_rot270_m_f16): Delete.
10486 (__arm_vcmlaq_rot90_m_f32): Delete.
10487 (__arm_vcmlaq_rot90_m_f16): Delete.
10488 (__arm_vcmlaq): Delete.
10489 (__arm_vcmlaq_rot180): Delete.
10490 (__arm_vcmlaq_rot270): Delete.
10491 (__arm_vcmlaq_rot90): Delete.
10492 (__arm_vcmlaq_m): Delete.
10493 (__arm_vcmlaq_rot180_m): Delete.
10494 (__arm_vcmlaq_rot270_m): Delete.
10495 (__arm_vcmlaq_rot90_m): Delete.
10497 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10499 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
10500 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
10501 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
10502 (mve_insn): Add vcmla.
10503 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
10505 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
10507 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
10508 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
10509 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
10510 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
10512 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
10514 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10516 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
10517 (vcmulq_rot180, vcmulq_rot270): New.
10518 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
10519 (vcmulq_rot180, vcmulq_rot270): New.
10520 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
10521 (vcmulq_rot180, vcmulq_rot270): New.
10522 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
10523 (vcmulq_rot270): Delete.
10524 (vcmulq_rot180): Delete.
10526 (vcmulq_m): Delete.
10527 (vcmulq_rot180_m): Delete.
10528 (vcmulq_rot270_m): Delete.
10529 (vcmulq_rot90_m): Delete.
10530 (vcmulq_x): Delete.
10531 (vcmulq_rot90_x): Delete.
10532 (vcmulq_rot180_x): Delete.
10533 (vcmulq_rot270_x): Delete.
10534 (vcmulq_rot90_f16): Delete.
10535 (vcmulq_rot270_f16): Delete.
10536 (vcmulq_rot180_f16): Delete.
10537 (vcmulq_f16): Delete.
10538 (vcmulq_rot90_f32): Delete.
10539 (vcmulq_rot270_f32): Delete.
10540 (vcmulq_rot180_f32): Delete.
10541 (vcmulq_f32): Delete.
10542 (vcmulq_m_f32): Delete.
10543 (vcmulq_m_f16): Delete.
10544 (vcmulq_rot180_m_f32): Delete.
10545 (vcmulq_rot180_m_f16): Delete.
10546 (vcmulq_rot270_m_f32): Delete.
10547 (vcmulq_rot270_m_f16): Delete.
10548 (vcmulq_rot90_m_f32): Delete.
10549 (vcmulq_rot90_m_f16): Delete.
10550 (vcmulq_x_f16): Delete.
10551 (vcmulq_x_f32): Delete.
10552 (vcmulq_rot90_x_f16): Delete.
10553 (vcmulq_rot90_x_f32): Delete.
10554 (vcmulq_rot180_x_f16): Delete.
10555 (vcmulq_rot180_x_f32): Delete.
10556 (vcmulq_rot270_x_f16): Delete.
10557 (vcmulq_rot270_x_f32): Delete.
10558 (__arm_vcmulq_rot90_f16): Delete.
10559 (__arm_vcmulq_rot270_f16): Delete.
10560 (__arm_vcmulq_rot180_f16): Delete.
10561 (__arm_vcmulq_f16): Delete.
10562 (__arm_vcmulq_rot90_f32): Delete.
10563 (__arm_vcmulq_rot270_f32): Delete.
10564 (__arm_vcmulq_rot180_f32): Delete.
10565 (__arm_vcmulq_f32): Delete.
10566 (__arm_vcmulq_m_f32): Delete.
10567 (__arm_vcmulq_m_f16): Delete.
10568 (__arm_vcmulq_rot180_m_f32): Delete.
10569 (__arm_vcmulq_rot180_m_f16): Delete.
10570 (__arm_vcmulq_rot270_m_f32): Delete.
10571 (__arm_vcmulq_rot270_m_f16): Delete.
10572 (__arm_vcmulq_rot90_m_f32): Delete.
10573 (__arm_vcmulq_rot90_m_f16): Delete.
10574 (__arm_vcmulq_x_f16): Delete.
10575 (__arm_vcmulq_x_f32): Delete.
10576 (__arm_vcmulq_rot90_x_f16): Delete.
10577 (__arm_vcmulq_rot90_x_f32): Delete.
10578 (__arm_vcmulq_rot180_x_f16): Delete.
10579 (__arm_vcmulq_rot180_x_f32): Delete.
10580 (__arm_vcmulq_rot270_x_f16): Delete.
10581 (__arm_vcmulq_rot270_x_f32): Delete.
10582 (__arm_vcmulq_rot90): Delete.
10583 (__arm_vcmulq_rot270): Delete.
10584 (__arm_vcmulq_rot180): Delete.
10585 (__arm_vcmulq): Delete.
10586 (__arm_vcmulq_m): Delete.
10587 (__arm_vcmulq_rot180_m): Delete.
10588 (__arm_vcmulq_rot270_m): Delete.
10589 (__arm_vcmulq_rot90_m): Delete.
10590 (__arm_vcmulq_x): Delete.
10591 (__arm_vcmulq_rot90_x): Delete.
10592 (__arm_vcmulq_rot180_x): Delete.
10593 (__arm_vcmulq_rot270_x): Delete.
10595 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10597 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
10598 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
10599 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
10600 (MVE_VCADDQ_VCMULQ_M): New.
10601 (mve_insn): Add vcmul.
10602 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
10605 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
10607 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
10608 @mve_<mve_insn>q<mve_rot>_f<mode>.
10609 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
10610 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
10611 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
10613 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10615 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
10616 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
10617 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
10618 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
10619 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
10620 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
10621 * config/arm/arm-mve-builtins-functions.h (class
10622 unspec_mve_function_exact_insn_rot): New.
10623 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
10624 (vcaddq_rot270): Delete.
10625 (vhcaddq_rot90): Delete.
10626 (vhcaddq_rot270): Delete.
10627 (vcaddq_rot270_m): Delete.
10628 (vcaddq_rot90_m): Delete.
10629 (vhcaddq_rot270_m): Delete.
10630 (vhcaddq_rot90_m): Delete.
10631 (vcaddq_rot90_x): Delete.
10632 (vcaddq_rot270_x): Delete.
10633 (vhcaddq_rot90_x): Delete.
10634 (vhcaddq_rot270_x): Delete.
10635 (vcaddq_rot90_u8): Delete.
10636 (vcaddq_rot270_u8): Delete.
10637 (vhcaddq_rot90_s8): Delete.
10638 (vhcaddq_rot270_s8): Delete.
10639 (vcaddq_rot90_s8): Delete.
10640 (vcaddq_rot270_s8): Delete.
10641 (vcaddq_rot90_u16): Delete.
10642 (vcaddq_rot270_u16): Delete.
10643 (vhcaddq_rot90_s16): Delete.
10644 (vhcaddq_rot270_s16): Delete.
10645 (vcaddq_rot90_s16): Delete.
10646 (vcaddq_rot270_s16): Delete.
10647 (vcaddq_rot90_u32): Delete.
10648 (vcaddq_rot270_u32): Delete.
10649 (vhcaddq_rot90_s32): Delete.
10650 (vhcaddq_rot270_s32): Delete.
10651 (vcaddq_rot90_s32): Delete.
10652 (vcaddq_rot270_s32): Delete.
10653 (vcaddq_rot90_f16): Delete.
10654 (vcaddq_rot270_f16): Delete.
10655 (vcaddq_rot90_f32): Delete.
10656 (vcaddq_rot270_f32): Delete.
10657 (vcaddq_rot270_m_s8): Delete.
10658 (vcaddq_rot270_m_s32): Delete.
10659 (vcaddq_rot270_m_s16): Delete.
10660 (vcaddq_rot270_m_u8): Delete.
10661 (vcaddq_rot270_m_u32): Delete.
10662 (vcaddq_rot270_m_u16): Delete.
10663 (vcaddq_rot90_m_s8): Delete.
10664 (vcaddq_rot90_m_s32): Delete.
10665 (vcaddq_rot90_m_s16): Delete.
10666 (vcaddq_rot90_m_u8): Delete.
10667 (vcaddq_rot90_m_u32): Delete.
10668 (vcaddq_rot90_m_u16): Delete.
10669 (vhcaddq_rot270_m_s8): Delete.
10670 (vhcaddq_rot270_m_s32): Delete.
10671 (vhcaddq_rot270_m_s16): Delete.
10672 (vhcaddq_rot90_m_s8): Delete.
10673 (vhcaddq_rot90_m_s32): Delete.
10674 (vhcaddq_rot90_m_s16): Delete.
10675 (vcaddq_rot270_m_f32): Delete.
10676 (vcaddq_rot270_m_f16): Delete.
10677 (vcaddq_rot90_m_f32): Delete.
10678 (vcaddq_rot90_m_f16): Delete.
10679 (vcaddq_rot90_x_s8): Delete.
10680 (vcaddq_rot90_x_s16): Delete.
10681 (vcaddq_rot90_x_s32): Delete.
10682 (vcaddq_rot90_x_u8): Delete.
10683 (vcaddq_rot90_x_u16): Delete.
10684 (vcaddq_rot90_x_u32): Delete.
10685 (vcaddq_rot270_x_s8): Delete.
10686 (vcaddq_rot270_x_s16): Delete.
10687 (vcaddq_rot270_x_s32): Delete.
10688 (vcaddq_rot270_x_u8): Delete.
10689 (vcaddq_rot270_x_u16): Delete.
10690 (vcaddq_rot270_x_u32): Delete.
10691 (vhcaddq_rot90_x_s8): Delete.
10692 (vhcaddq_rot90_x_s16): Delete.
10693 (vhcaddq_rot90_x_s32): Delete.
10694 (vhcaddq_rot270_x_s8): Delete.
10695 (vhcaddq_rot270_x_s16): Delete.
10696 (vhcaddq_rot270_x_s32): Delete.
10697 (vcaddq_rot90_x_f16): Delete.
10698 (vcaddq_rot90_x_f32): Delete.
10699 (vcaddq_rot270_x_f16): Delete.
10700 (vcaddq_rot270_x_f32): Delete.
10701 (__arm_vcaddq_rot90_u8): Delete.
10702 (__arm_vcaddq_rot270_u8): Delete.
10703 (__arm_vhcaddq_rot90_s8): Delete.
10704 (__arm_vhcaddq_rot270_s8): Delete.
10705 (__arm_vcaddq_rot90_s8): Delete.
10706 (__arm_vcaddq_rot270_s8): Delete.
10707 (__arm_vcaddq_rot90_u16): Delete.
10708 (__arm_vcaddq_rot270_u16): Delete.
10709 (__arm_vhcaddq_rot90_s16): Delete.
10710 (__arm_vhcaddq_rot270_s16): Delete.
10711 (__arm_vcaddq_rot90_s16): Delete.
10712 (__arm_vcaddq_rot270_s16): Delete.
10713 (__arm_vcaddq_rot90_u32): Delete.
10714 (__arm_vcaddq_rot270_u32): Delete.
10715 (__arm_vhcaddq_rot90_s32): Delete.
10716 (__arm_vhcaddq_rot270_s32): Delete.
10717 (__arm_vcaddq_rot90_s32): Delete.
10718 (__arm_vcaddq_rot270_s32): Delete.
10719 (__arm_vcaddq_rot270_m_s8): Delete.
10720 (__arm_vcaddq_rot270_m_s32): Delete.
10721 (__arm_vcaddq_rot270_m_s16): Delete.
10722 (__arm_vcaddq_rot270_m_u8): Delete.
10723 (__arm_vcaddq_rot270_m_u32): Delete.
10724 (__arm_vcaddq_rot270_m_u16): Delete.
10725 (__arm_vcaddq_rot90_m_s8): Delete.
10726 (__arm_vcaddq_rot90_m_s32): Delete.
10727 (__arm_vcaddq_rot90_m_s16): Delete.
10728 (__arm_vcaddq_rot90_m_u8): Delete.
10729 (__arm_vcaddq_rot90_m_u32): Delete.
10730 (__arm_vcaddq_rot90_m_u16): Delete.
10731 (__arm_vhcaddq_rot270_m_s8): Delete.
10732 (__arm_vhcaddq_rot270_m_s32): Delete.
10733 (__arm_vhcaddq_rot270_m_s16): Delete.
10734 (__arm_vhcaddq_rot90_m_s8): Delete.
10735 (__arm_vhcaddq_rot90_m_s32): Delete.
10736 (__arm_vhcaddq_rot90_m_s16): Delete.
10737 (__arm_vcaddq_rot90_x_s8): Delete.
10738 (__arm_vcaddq_rot90_x_s16): Delete.
10739 (__arm_vcaddq_rot90_x_s32): Delete.
10740 (__arm_vcaddq_rot90_x_u8): Delete.
10741 (__arm_vcaddq_rot90_x_u16): Delete.
10742 (__arm_vcaddq_rot90_x_u32): Delete.
10743 (__arm_vcaddq_rot270_x_s8): Delete.
10744 (__arm_vcaddq_rot270_x_s16): Delete.
10745 (__arm_vcaddq_rot270_x_s32): Delete.
10746 (__arm_vcaddq_rot270_x_u8): Delete.
10747 (__arm_vcaddq_rot270_x_u16): Delete.
10748 (__arm_vcaddq_rot270_x_u32): Delete.
10749 (__arm_vhcaddq_rot90_x_s8): Delete.
10750 (__arm_vhcaddq_rot90_x_s16): Delete.
10751 (__arm_vhcaddq_rot90_x_s32): Delete.
10752 (__arm_vhcaddq_rot270_x_s8): Delete.
10753 (__arm_vhcaddq_rot270_x_s16): Delete.
10754 (__arm_vhcaddq_rot270_x_s32): Delete.
10755 (__arm_vcaddq_rot90_f16): Delete.
10756 (__arm_vcaddq_rot270_f16): Delete.
10757 (__arm_vcaddq_rot90_f32): Delete.
10758 (__arm_vcaddq_rot270_f32): Delete.
10759 (__arm_vcaddq_rot270_m_f32): Delete.
10760 (__arm_vcaddq_rot270_m_f16): Delete.
10761 (__arm_vcaddq_rot90_m_f32): Delete.
10762 (__arm_vcaddq_rot90_m_f16): Delete.
10763 (__arm_vcaddq_rot90_x_f16): Delete.
10764 (__arm_vcaddq_rot90_x_f32): Delete.
10765 (__arm_vcaddq_rot270_x_f16): Delete.
10766 (__arm_vcaddq_rot270_x_f32): Delete.
10767 (__arm_vcaddq_rot90): Delete.
10768 (__arm_vcaddq_rot270): Delete.
10769 (__arm_vhcaddq_rot90): Delete.
10770 (__arm_vhcaddq_rot270): Delete.
10771 (__arm_vcaddq_rot270_m): Delete.
10772 (__arm_vcaddq_rot90_m): Delete.
10773 (__arm_vhcaddq_rot270_m): Delete.
10774 (__arm_vhcaddq_rot90_m): Delete.
10775 (__arm_vcaddq_rot90_x): Delete.
10776 (__arm_vcaddq_rot270_x): Delete.
10777 (__arm_vhcaddq_rot90_x): Delete.
10778 (__arm_vhcaddq_rot270_x): Delete.
10780 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10782 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
10783 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
10784 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
10785 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
10786 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
10787 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
10789 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
10790 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
10791 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
10792 VHCADDQ_ROT270_M_S.
10793 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
10794 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
10795 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
10796 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
10797 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
10798 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
10800 (VCADDQ_ROT270_M): Delete.
10801 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
10802 (VCADDQ_ROT90_M): Delete.
10803 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
10804 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
10806 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
10807 (mve_vcaddq<mve_rot><mode>): Rename into ...
10808 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
10809 (mve_vcaddq_rot270_m_<supf><mode>)
10810 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
10811 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
10812 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
10813 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
10815 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
10817 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
10820 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
10821 preparation statement over braces for a single statement.
10822 (*bt<mode>_setncqi): Likewise.
10823 (*bt<mode>_setncqi_2): New define_insn_and_split.
10825 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
10827 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
10828 case inserting of 64-bit values into a TImode register, to handle
10829 both DImode and DFmode using either *insvti_lowpart_1
10830 or *isnvti_highpart_1.
10832 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
10835 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
10836 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
10837 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
10838 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
10839 when the original source contains a paradoxical subreg.
10841 2023-07-14 Jan Hubicka <jh@suse.cz>
10843 * passes.cc (execute_function_todo): Remove
10844 TODO_rebuild_frequencies
10845 * passes.def: Add rebuild_frequencies pass.
10846 * predict.cc (estimate_bb_frequencies): Drop
10848 (tree_estimate_probability): Update call of
10849 estimate_bb_frequencies.
10850 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
10851 first and do not rebuild if not necessary.
10852 (class pass_rebuild_frequencies): New.
10853 (make_pass_rebuild_frequencies): New.
10854 * profile-count.h: Add profile_count::very_large_p.
10855 * tree-inline.cc (optimize_inline_calls): Do not return
10856 TODO_rebuild_frequencies
10857 * tree-pass.h (TODO_rebuild_frequencies): Remove.
10858 (make_pass_rebuild_frequencies): Declare.
10860 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10862 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
10863 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10864 (expand_cond_len_ternop): New function.
10865 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
10866 (expand_cond_len_ternop): Ditto.
10868 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
10871 * config/bpf/bpf.md: Enable instruction scheduling.
10873 2023-07-14 Tamar Christina <tamar.christina@arm.com>
10875 PR tree-optimization/109154
10876 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
10877 (struct bb_predicate): Add no_predicate_stmts.
10878 (set_bb_predicate): Increase predicate count.
10879 (set_bb_predicate_gimplified_stmts): Conditionally initialize
10880 no_predicate_stmts.
10881 (get_bb_num_predicate_stmts): New.
10882 (init_bb_predicate): Initialzie no_predicate_stmts.
10883 (release_bb_predicate): Cleanup no_predicate_stmts.
10884 (insert_gimplified_predicates): Preserve no_predicate_stmts.
10886 2023-07-14 Tamar Christina <tamar.christina@arm.com>
10888 PR tree-optimization/109154
10889 * tree-if-conv.cc (gen_simplified_condition,
10890 gen_phi_nest_statement): New.
10891 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
10893 2023-07-14 Richard Biener <rguenther@suse.de>
10895 * gimple.h (gimple_phi_arg): New const overload.
10896 (gimple_phi_arg_def): Make gimple arg const.
10897 (gimple_phi_arg_def_from_edge): New inline function.
10898 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
10900 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
10901 new inline function.
10902 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
10904 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
10906 * common/config/riscv/riscv-common.cc:
10907 (riscv_implied_info): Add zihintntl item.
10908 (riscv_ext_version_table): Ditto.
10909 (riscv_ext_flag_table): Ditto.
10910 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
10911 (TARGET_ZIHINTNTL): Ditto.
10913 2023-07-14 Die Li <lidie@eswincomputing.com>
10915 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
10917 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
10920 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
10921 used by the address of the following memory operand.
10923 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
10926 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
10927 deallocate alloca-only frame.
10929 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
10932 * config/darwin.h (DARWIN_PLATFORM_ID): New.
10933 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
10934 and SDK data to the static linker.
10936 2023-07-13 Carl Love <cel@us.ibm.com>
10938 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
10939 built-in definition return type.
10940 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
10941 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
10942 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
10943 argument to return FPSCR fields.
10944 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
10945 the return value. Add description for
10946 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
10948 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
10951 * config/alpha/alpha.cc (alpha_emit_set_long_const):
10952 Always use DImode when constructing long const.
10954 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
10956 * haifa-sched.cc: Change TRUE/FALSE to true/false.
10958 * lra-assigns.cc: Ditto.
10959 * lra-constraints.cc: Ditto.
10960 * sel-sched.cc: Ditto.
10962 2023-07-13 Andrew Pinski <apinski@marvell.com>
10964 PR tree-optimization/110293
10965 PR tree-optimization/110539
10966 * match.pd: Expand the `x != (typeof x)(x == 0)`
10967 pattern to handle where the inner and outer comparsions
10968 are either `!=` or `==` and handle other constants
10971 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
10973 PR middle-end/109520
10974 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
10975 (lra_asm_insn_error): New prototype.
10976 * lra.cc: Include rtl_error.h.
10977 (lra_set_insn_recog_data): Initialize asm_reloads_num.
10978 (lra_asm_insn_error): New func whose code is taken from ...
10979 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
10980 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
10982 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10984 * genmatch.cc (commutative_op): Add COND_LEN_*
10985 * internal-fn.cc (first_commutative_argument): Ditto.
10987 (get_unconditional_internal_fn): Ditto.
10988 (can_interpret_as_conditional_op_p): Ditto.
10989 (internal_fn_len_index): Ditto.
10990 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
10991 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
10992 (convert_mult_to_fma): Ditto.
10993 (math_opts_dom_walker::after_dom_children): Ditto.
10995 2023-07-13 Pan Li <pan2.li@intel.com>
10997 * config/riscv/riscv.cc (vxrm_rtx): New static var.
10999 (global_state_unknown_p): Removed.
11000 (riscv_entity_mode_after): Removed.
11001 (asm_insn_p): New function.
11002 (vxrm_unknown_p): New function for fixed-point.
11003 (riscv_vxrm_mode_after): Ditto.
11004 (frm_unknown_dynamic_p): New function for floating-point.
11005 (riscv_frm_mode_after): Ditto.
11006 (riscv_mode_after): Leverage new functions.
11008 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11010 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
11011 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
11012 calling vect_model_load_cost.
11014 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11016 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
11017 handle memory_access_type VMAT_CONTIGUOUS, remove some
11018 VMAT_CONTIGUOUS_PERMUTE related handlings.
11019 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
11020 without calling vect_model_load_cost.
11022 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11024 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
11025 VMAT_CONTIGUOUS_REVERSE any more.
11026 (vectorizable_load): Adjust the costing handling on
11027 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
11029 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11031 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
11032 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
11033 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
11034 assert it will never get VMAT_LOAD_STORE_LANES.
11036 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11038 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
11039 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
11040 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
11041 remove VMAT_GATHER_SCATTER related handlings and the related parameter
11044 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11046 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
11047 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
11048 vect_model_load_cost.
11049 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
11050 VMAT_STRIDED_SLP any more, and remove their related handlings.
11052 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11054 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
11055 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
11056 hoisting decision and without calling vect_model_load_cost.
11057 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
11058 and remove VMAT_INVARIANT related handlings.
11060 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11062 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
11063 on costing with one extra argument cost_vec.
11064 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
11065 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
11066 gs_info.decl set any more.
11068 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11070 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
11071 to vect_model_load_cost down to some different transform paths
11072 according to the handlings of different vect_memory_access_types.
11074 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11076 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
11078 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11080 * config/riscv/autovec.md
11081 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
11082 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
11083 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
11084 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
11085 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
11086 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
11087 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
11088 (len_mask_gather_load<mode><mode>): Ditto.
11089 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
11090 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
11091 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
11092 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
11093 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
11094 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
11095 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
11096 (len_mask_scatter_store<mode><mode>): Ditto.
11097 * config/riscv/predicates.md (const_1_operand): New predicate.
11098 (vector_gs_scale_operand_16): Ditto.
11099 (vector_gs_scale_operand_32): Ditto.
11100 (vector_gs_scale_operand_64): Ditto.
11101 (vector_gs_extension_operand): Ditto.
11102 (vector_gs_scale_operand_16_rv32): Ditto.
11103 (vector_gs_scale_operand_32_rv32): Ditto.
11104 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
11105 (expand_gather_scatter): New function.
11106 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
11107 (emit_vlmax_masked_store_insn): New function.
11108 (emit_nonvlmax_masked_store_insn): Ditto.
11109 (modulo_sel_indices): Ditto.
11110 (expand_vec_perm): Fix SLP for gather/scatter.
11111 (prepare_gather_scatter): New function.
11112 (expand_gather_scatter): Ditto.
11113 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
11114 (subreg:SI (DI CONST_POLY_INT)).
11115 * config/riscv/vector-iterators.md: Add gather/scatter.
11116 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
11117 (@vec_duplicate<mode>): Ditto.
11118 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
11120 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
11122 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11124 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
11125 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11126 (expand_cond_len_binop): New function.
11127 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
11128 (emit_nonvlmax_fp_tu_insn): Ditto.
11129 (need_fp_rounding_p): Ditto.
11130 (expand_cond_len_binop): Ditto.
11131 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
11132 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
11134 2023-07-12 Jan Hubicka <jh@suse.cz>
11136 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
11137 (gimple_duplicate_seme_region): ... this; break out profile updating
11139 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
11140 (ch_base::copy_headers): Update.
11141 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
11142 (gimple_duplicate_seme_region): ... this.
11144 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
11146 PR tree-optimization/107043
11147 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
11149 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
11151 PR tree-optimization/107053
11152 * gimple-range-op.cc (cfn_popcount): Use known set bits.
11154 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
11156 * ira.cc (equiv_init_varies_p): Change return type from int to bool
11157 and adjust function body accordingly.
11158 (equiv_init_movable_p): Ditto.
11159 (memref_used_between_p): Ditto.
11160 * lra-constraints.cc (valid_address_p): Ditto.
11162 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
11164 * range-op.cc (irange_to_masked_value): Remove.
11165 (update_known_bitmask): Update irange value/mask pair instead of
11166 only updating nonzero bits.
11168 2023-07-12 Jan Hubicka <jh@suse.cz>
11170 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
11171 parameter and rewrite profile updating code to handle edges elimination.
11172 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
11173 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
11174 (loop_iv_derived_p): New function.
11175 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
11176 of PHIs and propagation of IV derived variables.
11177 (ch_base::copy_headers): Pass around the invariant edges hash set.
11179 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
11181 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
11182 (last_active_insn): Change "skip_use_p" function argument to bool.
11183 (noce_operand_ok): Change return type from int to bool.
11184 (find_cond_trap): Ditto.
11185 (block_jumps_and_fallthru_p): Change "fallthru_p" and
11186 "jump_p" variables to bool.
11187 (noce_find_if_block): Change return type from int to bool.
11188 (cond_exec_find_if_block): Ditto.
11189 (find_if_case_1): Ditto.
11190 (find_if_case_2): Ditto.
11191 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
11192 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
11193 (cond_exec_process_insns): Change return type from int to bool.
11194 Change "mod_ok" function arg to bool.
11195 (cond_exec_process_if_block): Change return type from int to bool.
11196 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
11198 (noce_emit_store_flag): Change return type from int to bool.
11199 Change "reversep" function arg to bool. Change "cond_complex"
11201 (noce_try_move): Change return type from int to bool.
11202 (noce_try_ifelse_collapse): Ditto.
11203 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
11204 (noce_try_addcc): Change return type from int to bool. Change
11205 "subtract" variable to bool.
11206 (noce_try_store_flag_constants): Change return type from int to bool.
11207 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
11208 (noce_try_cmove): Change return type from int to bool.
11209 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
11210 (noce_try_minmax): Change return type from int to bool. Change
11211 "unsignedp" variable to bool.
11212 (noce_try_abs): Change return type from int to bool. Change
11213 "negate" variable to bool.
11214 (noce_try_sign_mask): Change return type from int to bool.
11215 (noce_try_move): Ditto.
11216 (noce_try_store_flag_constants): Ditto.
11217 (noce_try_cmove): Ditto.
11218 (noce_try_cmove_arith): Ditto.
11219 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
11220 (noce_try_bitop): Change return type from int to bool.
11221 (noce_operand_ok): Ditto.
11222 (noce_convert_multiple_sets): Ditto.
11223 (noce_convert_multiple_sets_1): Ditto.
11224 (noce_process_if_block): Ditto.
11225 (check_cond_move_block): Ditto.
11226 (cond_move_process_if_block): Ditto. Change "success_p"
11228 (rest_of_handle_if_conversion): Change return type to void.
11230 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11232 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
11234 (get_conditional_len_internal_fn): New function.
11235 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
11236 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
11239 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11242 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
11244 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11247 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
11248 define_insn_and_split derived from *add<dwi>3_doubleword_concat
11249 and *add<dwi>3_doubleword_zext.
11251 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11254 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
11255 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
11256 (peephole2): Simplify rega = 0; rega op= rega cases.
11258 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11260 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
11261 testing a TImode SUBREG of a 128-bit vector register against
11262 zero, use a PTEST instruction instead of first moving it to
11263 a pair of scalar registers.
11265 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
11267 * genopinit.cc (main): Adjust maximal number of optabs and
11269 * gensupport.cc (find_optab): Shift optab by 20 and mode by
11271 * optabs-query.h (optab_handler): Ditto.
11272 (convert_optab_handler): Ditto.
11274 2023-07-12 Richard Biener <rguenther@suse.de>
11276 PR tree-optimization/110630
11277 * tree-vect-slp.cc (vect_add_slp_permutation): New
11278 offset parameter, honor that for the extract code generation.
11279 (vectorizable_slp_permutation_1): Handle offsetted identities.
11281 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11283 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
11284 (umul<mode>3_highpart): Ditto.
11286 2023-07-12 Jan Beulich <jbeulich@suse.com>
11288 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
11289 alternative. Adjust original last alternative's "prefix"
11290 attribute to maybe_evex.
11292 2023-07-12 Jan Beulich <jbeulich@suse.com>
11294 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
11295 vbroadcastss for AVX2. New AVX512F alternative.
11296 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
11297 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
11299 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11301 * config/riscv/peephole.md: Remove XThead* peephole passes.
11302 * config/riscv/thead.md: Include thead-peephole.md.
11303 * config/riscv/thead-peephole.md: New file.
11305 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11307 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
11309 (riscv_index_reg_class): Likewise.
11310 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
11311 (riscv_index_reg_class): New function.
11312 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
11313 riscv_index_reg_class().
11314 (REGNO_OK_FOR_INDEX_P): Call new function
11315 riscv_regno_ok_for_index_p().
11317 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11319 * config/riscv/riscv-protos.h (enum riscv_address_type):
11320 New location of type definition.
11321 (struct riscv_address_info): Likewise.
11322 * config/riscv/riscv.cc (enum riscv_address_type):
11323 Old location of type definition.
11324 (struct riscv_address_info): Likewise.
11326 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11328 * config/riscv/riscv.h (Xmode): New macro.
11330 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11332 * config/riscv/riscv.cc (riscv_print_operand_address): Use
11333 output_addr_const rather than riscv_print_operand.
11335 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11337 * config/riscv/thead.md: Adjust constraints of th_addsl.
11339 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11341 * config/riscv/thead.cc (th_mempair_operands_p):
11342 Fix documentation of th_mempair_order_operands().
11344 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11346 * config/riscv/thead.cc (th_mempair_save_regs):
11347 Emit REG_FRAME_RELATED_EXPR notes in prologue.
11349 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11351 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
11352 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
11353 New XThead extension INSN.
11354 (*zero_extendsidi2_th_extu): New XThead extension INSN.
11355 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
11357 2023-07-12 liuhongt <hongtao.liu@intel.com>
11361 * config/i386/predicates.md
11362 (int_float_vector_all_ones_operand): New predicate.
11363 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
11365 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
11367 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
11369 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
11370 define_insn_and_split to avoid false dependence.
11371 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
11372 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
11373 of operands 1 to '0' to avoid false dependence.
11374 (*andnot<mode>3): Ditto.
11375 (iornot<mode>3): Ditto.
11376 (*<nlogic><mode>3): Ditto.
11378 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
11380 * common/config/i386/cpuinfo.h
11381 (get_intel_cpu): Handle Granite Rapids D.
11382 * common/config/i386/i386-common.cc:
11383 (processor_alias_table): Add graniterapids-d.
11384 * common/config/i386/i386-cpuinfo.h
11385 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
11386 * config.gcc: Add -march=graniterapids-d.
11387 * config/i386/driver-i386.cc (host_detect_local_cpu):
11388 Handle graniterapids-d.
11389 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
11390 * doc/extend.texi: Add graniterapids-d.
11391 * doc/invoke.texi: Ditto.
11393 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
11395 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
11396 Add OPTION_MASK_ISA_AVX512VL.
11397 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
11400 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11402 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
11403 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
11404 (shuffle_compress_patterns): Ditto.
11405 (expand_vec_perm_const_1): Ditto.
11407 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
11409 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
11410 * cfghooks.h (struct cfg_hooks): Change return type of
11411 verify_flow_info from integer to bool.
11412 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
11413 (can_delete_label_p): Ditto.
11414 (rtl_verify_flow_info): Change return type from int to bool
11415 and adjust function body accordingly. Change "err" variable to bool.
11416 (rtl_verify_flow_info_1): Ditto.
11417 (free_bb_for_insn): Change return type to void.
11418 (rtl_merge_blocks): Change "b_empty" variable to bool.
11419 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
11420 (verify_hot_cold_block_grouping): Change return type from int to bool.
11421 Change "err" variable to bool.
11422 (rtl_verify_edges): Ditto.
11423 (rtl_verify_bb_insns): Ditto.
11424 (rtl_verify_bb_pointers): Ditto.
11425 (rtl_verify_bb_insn_chain): Ditto.
11426 (rtl_verify_fallthru): Ditto.
11427 (rtl_verify_bb_layout): Ditto.
11428 (purge_all_dead_edges): Change "purged" variable to bool.
11429 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
11430 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
11431 (load_killed_in_block_p): Change return type from int to bool
11432 and adjust function body accordingly.
11433 (oprs_unchanged_p): Return true/false.
11434 (rest_of_handle_gcse2): Change return type to void.
11435 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
11436 int to bool. Change "err" variable to bool.
11438 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
11440 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
11442 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11444 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
11445 * internal-fn.cc (cond_len_unary_direct): Ditto.
11446 (cond_len_binary_direct): Ditto.
11447 (cond_len_ternary_direct): Ditto.
11448 (expand_cond_len_unary_optab_fn): Ditto.
11449 (expand_cond_len_binary_optab_fn): Ditto.
11450 (expand_cond_len_ternary_optab_fn): Ditto.
11451 (direct_cond_len_unary_optab_supported_p): Ditto.
11452 (direct_cond_len_binary_optab_supported_p): Ditto.
11453 (direct_cond_len_ternary_optab_supported_p): Ditto.
11454 * internal-fn.def (COND_LEN_ADD): Ditto.
11455 (COND_LEN_SUB): Ditto.
11456 (COND_LEN_MUL): Ditto.
11457 (COND_LEN_DIV): Ditto.
11458 (COND_LEN_MOD): Ditto.
11459 (COND_LEN_RDIV): Ditto.
11460 (COND_LEN_MIN): Ditto.
11461 (COND_LEN_MAX): Ditto.
11462 (COND_LEN_FMIN): Ditto.
11463 (COND_LEN_FMAX): Ditto.
11464 (COND_LEN_AND): Ditto.
11465 (COND_LEN_IOR): Ditto.
11466 (COND_LEN_XOR): Ditto.
11467 (COND_LEN_SHL): Ditto.
11468 (COND_LEN_SHR): Ditto.
11469 (COND_LEN_FMA): Ditto.
11470 (COND_LEN_FMS): Ditto.
11471 (COND_LEN_FNMA): Ditto.
11472 (COND_LEN_FNMS): Ditto.
11473 (COND_LEN_NEG): Ditto.
11474 * optabs.def (OPTAB_D): Ditto.
11476 2023-07-11 Richard Biener <rguenther@suse.de>
11478 PR tree-optimization/110614
11479 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
11480 SLP splats are not suitable for re-align ops.
11482 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
11484 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
11486 (vsx_quad_dform_memory_operand): Likewise.
11488 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
11490 * reorg.cc (stop_search_p): Change return type from int to bool
11491 and adjust function body accordingly.
11492 (resource_conflicts_p): Ditto.
11493 (insn_references_resource_p): Change return type from int to bool.
11494 (insn_sets_resource_p): Ditto.
11495 (redirect_with_delay_slots_safe_p): Ditto.
11496 (condition_dominates_p): Change return type from int to bool
11497 and adjust function body accordingly.
11498 (redirect_with_delay_list_safe_p): Ditto.
11499 (check_annul_list_true_false): Ditto. Change "annul_true_p"
11500 function argument to bool.
11501 (steal_delay_list_from_target): Change "pannul_p" function
11502 argument to bool pointer. Change "must_annul" and "used_annul"
11503 variables from int to bool.
11504 (steal_delay_list_from_fallthrough): Ditto.
11505 (own_thread_p): Change return type from int to bool and adjust
11506 function body accordingly. Change "allow_fallthrough" function
11508 (reorg_redirect_jump): Change return type from int to bool.
11509 (fill_simple_delay_slots): Change "non_jumps_p" function
11510 argument from int to bool. Change "maybe_never" varible to bool.
11511 (fill_slots_from_thread): Change "likely", "thread_if_true" and
11512 "own_thread" function arguments to bool. Change "lose" and
11513 "must_annul" variables to bool.
11514 (delete_from_delay_slot): Change "had_barrier" variable to bool.
11515 (try_merge_delay_insns): Change "annul_p" variable to bool.
11516 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
11518 (rest_of_handle_delay_slots): Change return type from int to void
11519 and adjust function body accordingly.
11521 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
11523 * doc/extend.texi (RISC-V Operand Modifiers): New.
11525 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11527 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
11528 (insert_insn_end_basic_block): Ditto.
11529 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
11530 * gcse.cc (insert_insn_end_basic_block): Export as global function.
11531 * gcse.h (insert_insn_end_basic_block): Ditto.
11533 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
11536 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
11537 (arm_builtin_decl): Hahndle MVE builtins.
11538 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
11539 (add_unique_function): Fix handling of
11540 __ARM_MVE_PRESERVE_USER_NAMESPACE.
11541 (add_overloaded_function): Likewise.
11542 * config/arm/arm-protos.h (builtin_decl): New declaration.
11544 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
11546 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
11548 2023-07-10 Xi Ruoyao <xry111@xry111.site>
11550 PR tree-optimization/110557
11551 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
11552 Ensure the output sign-extended if necessary.
11554 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
11556 * config/i386/i386.md (peephole2): Transform xchg insn with a
11557 REG_UNUSED note to a (simple) move.
11558 (*insvti_lowpart_1): New define_insn_and_split.
11559 (*insvdi_lowpart_1): Likewise.
11561 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
11563 * config/i386/i386-features.cc (compute_convert_gain): Tweak
11564 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
11565 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
11566 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
11568 2023-07-10 liuhongt <hongtao.liu@intel.com>
11571 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
11572 splitter to detect fp max pattern.
11573 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
11575 2023-07-09 Jan Hubicka <jh@suse.cz>
11577 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
11578 (dump_edge_info): Likewise.
11579 (dump_bb_info): Likewise.
11580 * profile-count.cc (profile_count::dump): Add comma between quality and
11583 2023-07-08 Jan Hubicka <jh@suse.cz>
11585 PR tree-optimization/110600
11586 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
11588 2023-07-08 Jan Hubicka <jh@suse.cz>
11590 PR middle-end/110590
11591 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
11592 inner loops and be more careful about inconsistent profiles.
11593 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
11594 exit is followed by other exit.
11596 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
11598 * cprop.cc (reg_available_p): Change return type from int to bool.
11599 (reg_not_set_p): Ditto.
11600 (try_replace_reg): Ditto. Change "success" variable to bool.
11601 (cprop_jump): Change return type from int to void
11602 and adjust function body accordingly.
11603 (constprop_register): Ditto.
11604 (cprop_insn): Ditto. Change "changed" variable to bool.
11605 (local_cprop_pass): Change return type from int to void
11606 and adjust function body accordingly.
11607 (bypass_block): Ditto. Change "change", "may_be_loop_header"
11608 and "removed_p" variables to bool.
11609 (bypass_conditional_jumps): Change return type from int to void
11610 and adjust function body accordingly. Change "changed"
11612 (one_cprop_pass): Ditto.
11614 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
11616 * gcse.cc (expr_equiv_p): Change return type from int to bool.
11617 (oprs_unchanged_p): Change return type from int to void
11618 and adjust function body accordingly.
11619 (oprs_anticipatable_p): Ditto.
11620 (oprs_available_p): Ditto.
11621 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
11622 arguments to bool. Change "found" variable to bool.
11623 (load_killed_in_block_p): Change return type from int to void and
11624 adjust function body accordingly. Change "avail_p" argument to bool.
11625 (pre_expr_reaches_here_p): Change return type from int to void
11626 and adjust function body accordingly.
11627 (pre_delete): Ditto. Change "changed" variable to bool.
11628 (pre_gcse): Change return type from int to void
11629 and adjust function body accordingly. Change "did_insert" and
11630 "changed" variables to bool.
11631 (one_pre_gcse_pass): Change return type from int to void
11632 and adjust function body accordingly. Change "changed" variable
11634 (should_hoist_expr_to_dom): Change return type from int to void
11635 and adjust function body accordingly. Change
11636 "visited_allocated_locally" variable to bool.
11637 (hoist_code): Change return type from int to void and adjust
11638 function body accordingly. Change "changed" variable to bool.
11639 (one_code_hoisting_pass): Ditto.
11640 (pre_edge_insert): Change return type from int to void and adjust
11641 function body accordingly. Change "did_insert" variable to bool.
11642 (pre_expr_reaches_here_p_work): Change return type from int to void
11643 and adjust function body accordingly.
11644 (simple_mem): Ditto.
11645 (want_to_gcse_p): Change return type from int to void
11646 and adjust function body accordingly.
11647 (can_assign_to_reg_without_clobbers_p): Update function body
11648 for bool return type.
11649 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
11650 (pre_insert_copies): Change "added_copy" variable to bool.
11652 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
11656 * doc/invoke.texi (Warning Options): Fix typos.
11658 2023-07-07 Jan Hubicka <jh@suse.cz>
11660 * profile-count.cc (profile_count::dump): Add FUN
11661 parameter; print relative frequency.
11662 (profile_count::debug): Update.
11663 * profile-count.h (profile_count::dump): Update
11666 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
11670 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
11671 TImode destinations from paradoxical SUBREGs (setting the lowpart)
11672 into explicit zero extensions. Use *insvti_highpart_1 instruction
11673 to set the highpart of a TImode destination.
11675 2023-07-07 Jan Hubicka <jh@suse.cz>
11677 * predict.cc (force_edge_cold): Use
11678 set_edge_probability_and_rescale_others; improve dumps.
11680 2023-07-07 Jan Hubicka <jh@suse.cz>
11682 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
11684 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
11687 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
11689 * config/s390/s390.cc (vec_init): Fix default case
11691 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
11693 * lra-assigns.cc (assign_by_spills): Add reload insns involving
11694 reload pseudos with non-refined class to be processed on the next
11696 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
11697 (in_class_p): Use it.
11698 (print_curr_insn_alt): New func.
11699 (process_alt_operands): Use it. Improve debug info.
11700 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
11701 pseudo class if it is not refined yet.
11703 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
11705 * value-range.cc (irange::get_bitmask_from_range): Return all the
11706 known bits for a singleton.
11707 (irange::set_range_from_bitmask): Set a range of a singleton when
11708 all bits are known.
11710 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
11712 * value-range.cc (irange::intersect): Leave normalization to
11715 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
11717 * data-streamer-in.cc (streamer_read_value_range): Adjust for
11719 * data-streamer-out.cc (streamer_write_vrange): Same.
11720 * range-op.cc (operator_cast::fold_range): Same.
11721 * value-range-pretty-print.cc
11722 (vrange_printer::print_irange_bitmasks): Same.
11723 * value-range-storage.cc (irange_storage::write_lengths_address):
11725 (irange_storage::set_irange): Same.
11726 (irange_storage::get_irange): Same.
11727 (irange_storage::size): Same.
11728 (irange_storage::dump): Same.
11729 * value-range-storage.h: Same.
11730 * value-range.cc (debug): New.
11731 (irange_bitmask::dump): New.
11732 (add_vrange): Adjust for value/mask.
11733 (irange::operator=): Same.
11734 (irange::set): Same.
11735 (irange::verify_range): Same.
11736 (irange::operator==): Same.
11737 (irange::contains_p): Same.
11738 (irange::irange_single_pair_union): Same.
11739 (irange::union_): Same.
11740 (irange::intersect): Same.
11741 (irange::invert): Same.
11742 (irange::get_nonzero_bits_from_range): Rename to...
11743 (irange::get_bitmask_from_range): ...this.
11744 (irange::set_range_from_nonzero_bits): Rename to...
11745 (irange::set_range_from_bitmask): ...this.
11746 (irange::set_nonzero_bits): Rename to...
11747 (irange::update_bitmask): ...this.
11748 (irange::get_nonzero_bits): Rename to...
11749 (irange::get_bitmask): ...this.
11750 (irange::intersect_nonzero_bits): Rename to...
11751 (irange::intersect_bitmask): ...this.
11752 (irange::union_nonzero_bits): Rename to...
11753 (irange::union_bitmask): ...this.
11754 (irange_bitmask::verify_mask): New.
11755 * value-range.h (class irange_bitmask): New.
11756 (irange_bitmask::set_unknown): New.
11757 (irange_bitmask::unknown_p): New.
11758 (irange_bitmask::irange_bitmask): New.
11759 (irange_bitmask::get_precision): New.
11760 (irange_bitmask::get_nonzero_bits): New.
11761 (irange_bitmask::set_nonzero_bits): New.
11762 (irange_bitmask::operator==): New.
11763 (irange_bitmask::union_): New.
11764 (irange_bitmask::intersect): New.
11765 (class irange): Friend vrange_printer.
11766 (irange::varying_compatible_p): Adjust for bitmask.
11767 (irange::set_varying): Same.
11768 (irange::set_nonzero): Same.
11770 2023-07-07 Jan Beulich <jbeulich@suse.com>
11772 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
11774 2023-07-07 Jan Beulich <jbeulich@suse.com>
11776 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
11777 alternative. Switch new last alternative's "isa" attribute to
11779 (vec_extract_hi_v32qi): Likewise.
11781 2023-07-07 Pan Li <pan2.li@intel.com>
11782 Robin Dapp <rdapp@ventanamicro.com>
11784 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
11786 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
11787 (riscv_mode_exit): Likewise for exit mode.
11788 (riscv_mode_needed): Likewise for needed mode.
11789 (riscv_mode_after): Likewise for after mode.
11791 2023-07-07 Pan Li <pan2.li@intel.com>
11793 * config/riscv/vector.md: Fix typo.
11795 2023-07-06 Jan Hubicka <jh@suse.cz>
11797 PR middle-end/25623
11798 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
11799 of iterations determined.
11800 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
11802 2023-07-06 Jan Hubicka <jh@suse.cz>
11804 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
11805 probability update to be safe on loops with subloops.
11806 Make bound parameter to be iteration bound.
11807 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
11808 of scale_loop_profile.
11809 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
11811 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
11813 PR tree-optimization/110449
11814 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
11815 vec_loop for the unrolled loop.
11817 2023-07-06 Jan Hubicka <jh@suse.cz>
11819 * cfg.cc (set_edge_probability_and_rescale_others): New function.
11820 (update_bb_profile_for_threading): Use it; simplify the rest.
11821 * cfg.h (set_edge_probability_and_rescale_others): Declare.
11822 * profile-count.h (profile_probability::apply_scale): New.
11824 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
11826 * doc/extend.texi (ARC Built-in Functions): Update documentation
11827 with missing builtins.
11829 2023-07-06 Richard Biener <rguenther@suse.de>
11831 PR tree-optimization/110556
11832 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
11833 assign code and all operands of non-stores.
11835 2023-07-06 Richard Biener <rguenther@suse.de>
11837 PR tree-optimization/110563
11838 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
11839 Remove second argument.
11840 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
11841 Remove for_epilogue_p argument. Merge assert ...
11842 (vect_analyze_loop_2): ... with check done before determining
11843 partial vectors by moving it after.
11844 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
11846 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11848 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
11849 few things re 'reorder' option and strings.
11850 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
11852 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11854 * gengtype-parse.cc: Clean up obsolete parametrized structs
11856 * gengtype.cc: Likewise.
11857 * gengtype.h: Likewise.
11859 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11861 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
11864 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11866 * gengtype-parse.cc (token_names): Add '"user"'.
11867 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
11868 'FIRST_TOKEN_WITH_VALUE'.
11870 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11872 * doc/gty.texi (GTY Options) <string_length>: Enhance.
11874 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11876 * gengtype.cc (write_root, write_roots): Explicitly reject
11877 'string_length' option.
11878 * doc/gty.texi (GTY Options) <string_length>: Document.
11880 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11882 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
11883 (ggc_pch_write_object): Remove 'bool is_string' argument.
11884 * ggc-common.cc: Adjust.
11885 * ggc-page.cc: Likewise.
11887 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
11889 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
11891 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
11893 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
11894 and add description for inling of function with arch and tune
11897 2023-07-06 Richard Biener <rguenther@suse.de>
11899 PR tree-optimization/110515
11900 * tree-ssa-pre.cc (compute_avail): Make code dealing
11901 with hoisting loads with different alias-sets more
11904 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11906 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
11908 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
11910 * config/i386/i386.cc (ix86_can_inline_p): If callee has
11911 default arch=x86-64 and tune=generic, do not block the
11912 inlining to its caller. Also allow callee with different
11913 arch= to be inlined if it has always_inline attribute and
11914 it's ISA is subset of caller's.
11916 2023-07-06 liuhongt <hongtao.liu@intel.com>
11918 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
11919 DF/SFmode AND/IOR/XOR/ANDN operations.
11921 2023-07-06 Andrew Pinski <apinski@marvell.com>
11923 PR middle-end/110554
11924 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
11925 just build using boolean_type_node instead of the cond_type.
11926 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
11927 that will feed into the COND_EXPR.
11929 2023-07-06 liuhongt <hongtao.liu@intel.com>
11932 * config/i386/i386.md (movdf_internal): Disparage slightly for
11933 2 alternatives (r,v) and (v,r) by adding constraint modifier
11936 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
11939 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
11940 initialization of new_addr.
11942 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
11944 PR tree-optimization/110474
11945 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
11946 unroll factor while selecting the epilog vect loop VF.
11948 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11950 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
11953 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11955 * gimple-range-gori.cc (compute_operand_range): After calling
11956 compute_operand2_range, recursively call self if needed.
11957 (compute_operand2_range): Turn into a leaf function.
11958 (gori_compute::compute_operand1_and_operand2_range): Finish
11959 operand2 calculation.
11960 * gimple-range-gori.h (compute_operand2_range): Remove name param.
11962 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11964 * gimple-range-gori.cc (compute_operand_range): After calling
11965 compute_operand1_range, recursively call self if needed.
11966 (compute_operand1_range): Turn into a leaf function.
11967 (gori_compute::compute_operand1_and_operand2_range): Finish
11968 operand1 calculation.
11969 * gimple-range-gori.h (compute_operand1_range): Remove name param.
11971 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11973 * gimple-range-gori.cc (compute_operand_range): Check for
11974 operand interdependence when both op1 and op2 are computed.
11975 (compute_operand1_and_operand2_range): No checks required now.
11977 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11979 * gimple-range-gori.cc (compute_operand_range): Check for
11980 a relation between op1 and op2 and use that instead.
11981 (compute_operand1_range): Don't look for a relation override.
11982 (compute_operand2_range): Ditto.
11984 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
11986 * doc/contrib.texi (Contributors): Update my entry.
11988 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
11990 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
11993 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
11995 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
11996 scehdule_more_p and contributes_to_priority indirect frunction
11997 type from int to bool.
11998 (no_real_insns_p): Change return type from int to bool.
11999 (contributes_to_priority): Ditto.
12000 * haifa-sched.cc (no_real_insns_p): Change return type from
12001 int to bool and adjust function body accordingly.
12002 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
12003 variable type from int to bool.
12004 (ps_insn_advance_column): Change return type from int to bool.
12005 (ps_has_conflicts): Ditto. Change "has_conflicts"
12006 variable type from int to bool.
12007 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
12008 (conditions_mutex_p): Ditto.
12009 * sched-ebb.cc (schedule_more_p): Ditto.
12010 (ebb_contributes_to_priority): Change return type from
12011 int to bool and adjust function body accordingly.
12012 * sched-rgn.cc (is_cfg_nonregular): Ditto.
12013 (check_live_1): Ditto.
12015 (find_conditional_protection): Ditto.
12016 (is_conditionally_protected): Ditto.
12017 (is_prisky): Ditto.
12018 (is_exception_free): Ditto.
12019 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
12020 variables from int to bool.
12021 (extend_rgns): Change "rescan" variable from int to bool.
12022 (check_live): Change return type from
12023 int to bool and adjust function body accordingly.
12024 (can_schedule_ready_p): Ditto.
12025 (schedule_more_p): Ditto.
12026 (contributes_to_priority): Ditto.
12028 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12030 * doc/md.texi: Document that vec_set and vec_extract must not
12032 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
12033 (gimple_expand_vec_set_extract_expr): ...to this.
12034 (gimple_expand_vec_exprs): Call renamed function.
12035 * internal-fn.cc (vec_extract_direct): Add.
12036 (expand_vec_extract_optab_fn): New function to expand
12038 (direct_vec_extract_optab_supported_p): Add.
12039 * internal-fn.def (VEC_EXTRACT): Add.
12040 * optabs.cc (can_vec_extract_var_idx_p): New function.
12041 * optabs.h (can_vec_extract_var_idx_p): Declare.
12043 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12045 * config/riscv/autovec.md: Add gen_lowpart.
12047 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12049 * config/riscv/autovec.md: Allow register index operand.
12051 2023-07-05 Pan Li <pan2.li@intel.com>
12053 * config/riscv/riscv-vector-builtins.cc
12054 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
12056 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12058 * config/riscv/autovec.md: Use float_truncate.
12060 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12062 * internal-fn.cc (internal_fn_len_index): Apply
12063 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
12064 (internal_fn_mask_index): Ditto.
12065 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
12066 (supports_vec_scatter_store_p): Ditto.
12067 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
12068 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
12069 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
12070 (vect_get_strided_load_store_ops): Ditto.
12071 (vectorizable_store): Ditto.
12072 (vectorizable_load): Ditto.
12074 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12075 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12077 * simplify-rtx.cc (native_encode_rtx): Ditto.
12078 (native_decode_vector_rtx): Ditto.
12079 (simplify_const_vector_byte_offset): Ditto.
12080 (simplify_const_vector_subreg): Ditto.
12081 * tree.cc (build_truth_vector_type_for_mode): Ditto.
12082 * varasm.cc (output_constant_pool_2): Ditto.
12084 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
12086 * config/mips/mips.cc (mips_expand_block_move): don't expand for
12087 r6 with -mno-unaligned-access option if one or both of src and
12088 dest are unaligned. restruct: return directly if length is not const.
12089 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
12091 2023-07-05 Jan Beulich <jbeulich@suse.com>
12094 * config/i386/sse.md: New splitters to simplify
12095 not;vec_duplicate as a singular vpternlog.
12096 (one_cmpl<mode>2): Allow broadcast for operand 1.
12097 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
12099 2023-07-05 Jan Beulich <jbeulich@suse.com>
12102 * config/i386/sse.md: New splitters to simplify
12103 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
12105 2023-07-05 Jan Beulich <jbeulich@suse.com>
12108 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
12109 form of splitter for PR target/100711.
12111 2023-07-05 Richard Biener <rguenther@suse.de>
12113 PR middle-end/110541
12114 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
12117 2023-07-05 Jan Beulich <jbeulich@suse.com>
12120 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
12121 for memory form operand 1.
12123 2023-07-05 Jan Beulich <jbeulich@suse.com>
12126 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
12127 bitwise vector operations.
12128 * config/i386/sse.md (*iornot<mode>3): New insn.
12129 (*xnor<mode>3): Likewise.
12130 (*<nlogic><mode>3): Likewise.
12131 (andor): New code iterator.
12132 (nlogic): New code attribute.
12133 (ternlog_nlogic): Likewise.
12135 2023-07-05 Richard Biener <rguenther@suse.de>
12137 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
12139 2023-07-05 yulong <shiyulong@iscas.ac.cn>
12141 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
12143 2023-07-05 yulong <shiyulong@iscas.ac.cn>
12145 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
12146 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
12147 (ADJUST_ALIGNMENT): Ditto.
12148 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12149 (ADJUST_NUNITS): Ditto.
12150 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
12152 (vfloat16mf4x3_t): Ditto.
12153 (vfloat16mf4x4_t): Ditto.
12154 (vfloat16mf4x5_t): Ditto.
12155 (vfloat16mf4x6_t): Ditto.
12156 (vfloat16mf4x7_t): Ditto.
12157 (vfloat16mf4x8_t): Ditto.
12158 (vfloat16mf2x2_t): Ditto.
12159 (vfloat16mf2x3_t): Ditto.
12160 (vfloat16mf2x4_t): Ditto.
12161 (vfloat16mf2x5_t): Ditto.
12162 (vfloat16mf2x6_t): Ditto.
12163 (vfloat16mf2x7_t): Ditto.
12164 (vfloat16mf2x8_t): Ditto.
12165 (vfloat16m1x2_t): Ditto.
12166 (vfloat16m1x3_t): Ditto.
12167 (vfloat16m1x4_t): Ditto.
12168 (vfloat16m1x5_t): Ditto.
12169 (vfloat16m1x6_t): Ditto.
12170 (vfloat16m1x7_t): Ditto.
12171 (vfloat16m1x8_t): Ditto.
12172 (vfloat16m2x2_t): Ditto.
12173 (vfloat16m2x3_t): Ditto.
12174 (vfloat16m2x4_t): Ditto.
12175 (vfloat16m4x2_t): Ditto.
12176 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
12177 (vfloat16mf4x3_t): Ditto.
12178 (vfloat16mf4x4_t): Ditto.
12179 (vfloat16mf4x5_t): Ditto.
12180 (vfloat16mf4x6_t): Ditto.
12181 (vfloat16mf4x7_t): Ditto.
12182 (vfloat16mf4x8_t): Ditto.
12183 (vfloat16mf2x2_t): Ditto.
12184 (vfloat16mf2x3_t): Ditto.
12185 (vfloat16mf2x4_t): Ditto.
12186 (vfloat16mf2x5_t): Ditto.
12187 (vfloat16mf2x6_t): Ditto.
12188 (vfloat16mf2x7_t): Ditto.
12189 (vfloat16mf2x8_t): Ditto.
12190 (vfloat16m1x2_t): Ditto.
12191 (vfloat16m1x3_t): Ditto.
12192 (vfloat16m1x4_t): Ditto.
12193 (vfloat16m1x5_t): Ditto.
12194 (vfloat16m1x6_t): Ditto.
12195 (vfloat16m1x7_t): Ditto.
12196 (vfloat16m1x8_t): Ditto.
12197 (vfloat16m2x2_t): Ditto.
12198 (vfloat16m2x3_t): Ditto.
12199 (vfloat16m2x4_t): Ditto.
12200 (vfloat16m4x2_t): Ditto.
12201 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
12202 * config/riscv/riscv.md: New.
12203 * config/riscv/vector-iterators.md: New.
12205 2023-07-04 Andrew Pinski <apinski@marvell.com>
12207 PR tree-optimization/110487
12208 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
12209 build a nonstandard integer and use that.
12211 2023-07-04 Andrew Pinski <apinski@marvell.com>
12213 * match.pd (a?-1:0): Cast type an integer type
12214 rather the type before the negative.
12215 (a?0:-1): Likewise.
12217 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12219 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
12220 Change to use HARD_REG_BIT and its macros.
12221 * config/xtensa/xtensa.md
12222 (peephole2: regmove elimination during DFmode input reload):
12225 2023-07-04 Richard Biener <rguenther@suse.de>
12227 PR tree-optimization/110491
12228 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
12229 whether the PHI args are possibly undefined before folding
12232 2023-07-04 Pan Li <pan2.li@intel.com>
12233 Thomas Schwinge <thomas@codesourcery.com>
12235 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
12236 bits for machine mode table.
12237 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
12238 HOST machine mode bits.
12239 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
12240 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
12242 * tree-streamer.h (streamer_mode_table): Ditto.
12243 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
12244 as the packing limit.
12245 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
12247 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
12249 * lto-streamer.h (class lto_input_block): Capture
12250 'lto_file_decl_data *file_data' instead of just
12251 'unsigned char *mode_table'.
12252 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
12253 * ipa-fnsummary.cc (inline_read_section): Likewise.
12254 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
12255 * ipa-modref.cc (read_section): Likewise.
12256 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
12258 * ipa-sra.cc (isra_read_summary_section): Likewise.
12259 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
12260 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
12261 * lto-streamer-in.cc (lto_read_body_or_constructor)
12262 (lto_input_toplevel_asms): Likewise.
12263 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
12265 2023-07-04 Richard Biener <rguenther@suse.de>
12267 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
12268 (empty_bb_or_one_feeding_into_p): Check for them.
12269 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
12270 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
12272 2023-07-04 Richard Biener <rguenther@suse.de>
12274 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
12275 check guarding scalar_niter underflow.
12277 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
12279 PR tree-optimization/110531
12280 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
12281 slp_done_for_suggested_uf to false.
12283 2023-07-04 Richard Biener <rguenther@suse.de>
12285 PR tree-optimization/110228
12286 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
12287 Mark SSA may-undefs.
12288 (bb_no_side_effects_p): Check stmt uses for undefs.
12290 2023-07-04 Richard Biener <rguenther@suse.de>
12292 PR tree-optimization/110436
12293 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
12294 force live but not relevant pattern stmts relevant.
12296 2023-07-04 Lili Cui <lili.cui@intel.com>
12298 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
12299 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
12301 2023-07-04 Richard Biener <rguenther@suse.de>
12303 PR middle-end/110495
12304 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
12305 since we do not set TREE_OVERFLOW on those since the
12306 introduction of VL vectors.
12307 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
12308 at TREE_OVERFLOW to determine validity of association.
12310 2023-07-04 Richard Biener <rguenther@suse.de>
12312 PR tree-optimization/110310
12313 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
12314 Move costing part ...
12315 (vect_analyze_loop_costing): ... here. Integrate better
12316 estimate for epilogues from ...
12317 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
12318 with actual epilogue status.
12319 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
12320 avoid cancelling epilogue vectorization.
12321 (vect_update_epilogue_niters): Remove. No longer update
12322 epilogue LOOP_VINFO_NITERS.
12324 2023-07-04 Pan Li <pan2.li@intel.com>
12327 2023-07-03 Pan Li <pan2.li@intel.com>
12329 * config/riscv/vector.md: Fix typo.
12331 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12333 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
12334 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
12335 (expand_gather_load_optab_fn): Ditto.
12336 (internal_load_fn_p): Ditto.
12337 (internal_store_fn_p): Ditto.
12338 (internal_gather_scatter_fn_p): Ditto.
12339 (internal_fn_len_index): Ditto.
12340 (internal_fn_mask_index): Ditto.
12341 (internal_fn_stored_value_index): Ditto.
12342 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
12343 (LEN_MASK_SCATTER_STORE): Ditto.
12344 * optabs.def (OPTAB_CD): Ditto.
12346 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12348 * config/riscv/riscv-vsetvl.cc
12349 (vector_insn_info::parse_insn): Add early break.
12351 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
12353 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
12354 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
12356 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
12358 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
12360 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
12362 * common/config/riscv/riscv-common.cc: Add support for zvbb,
12363 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
12364 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
12365 * config/riscv/arch-canonicalize: Add canonicalization info for
12366 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
12367 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
12368 (MASK_ZVBC): Likewise.
12369 (TARGET_ZVBB): Likewise.
12370 (TARGET_ZVBC): Likewise.
12371 (MASK_ZVKG): Likewise.
12372 (MASK_ZVKNED): Likewise.
12373 (MASK_ZVKNHA): Likewise.
12374 (MASK_ZVKNHB): Likewise.
12375 (MASK_ZVKSED): Likewise.
12376 (MASK_ZVKSH): Likewise.
12377 (MASK_ZVKN): Likewise.
12378 (MASK_ZVKNC): Likewise.
12379 (MASK_ZVKNG): Likewise.
12380 (MASK_ZVKS): Likewise.
12381 (MASK_ZVKSC): Likewise.
12382 (MASK_ZVKSG): Likewise.
12383 (MASK_ZVKT): Likewise.
12384 (TARGET_ZVKG): Likewise.
12385 (TARGET_ZVKNED): Likewise.
12386 (TARGET_ZVKNHA): Likewise.
12387 (TARGET_ZVKNHB): Likewise.
12388 (TARGET_ZVKSED): Likewise.
12389 (TARGET_ZVKSH): Likewise.
12390 (TARGET_ZVKN): Likewise.
12391 (TARGET_ZVKNC): Likewise.
12392 (TARGET_ZVKNG): Likewise.
12393 (TARGET_ZVKS): Likewise.
12394 (TARGET_ZVKSC): Likewise.
12395 (TARGET_ZVKSG): Likewise.
12396 (TARGET_ZVKT): Likewise.
12397 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
12399 2023-07-03 Andrew Pinski <apinski@marvell.com>
12401 PR middle-end/110510
12402 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
12404 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
12406 * config/darwin.h: Avoid duplicate multiply_defined specs on
12407 earlier Darwin versions with shared libgcc.
12409 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
12411 * tree.h (tree_int_cst_equal): Change return type from int to bool.
12412 (operand_equal_for_phi_arg_p): Ditto.
12413 (tree_map_base_marked_p): Ditto.
12414 * tree.cc (contains_placeholder_p): Update function body
12415 for bool return type.
12416 (type_cache_hasher::equal): Ditto.
12417 (tree_map_base_hash): Change return type
12418 from int to void and adjust function body accordingly.
12419 (tree_int_cst_equal): Ditto.
12420 (operand_equal_for_phi_arg_p): Ditto.
12421 (get_narrower): Change "first" variable to bool.
12422 (cl_option_hasher::equal): Update function body for bool return type.
12423 * ggc.h (ggc_set_mark): Change return type from int to bool.
12424 (ggc_marked_p): Ditto.
12425 * ggc-page.cc (gt_ggc_mx): Change return type
12426 from int to void and adjust function body accordingly.
12427 (ggc_set_mark): Ditto.
12429 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12431 * config/riscv/autovec.md: Change order of
12432 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12433 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
12434 * doc/md.texi: Ditto.
12435 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
12436 * internal-fn.cc (len_maskload_direct): Ditto.
12437 (len_maskstore_direct): Ditto.
12438 (add_len_and_mask_args): New function.
12439 (expand_partial_load_optab_fn): Change order of
12440 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12441 (expand_partial_store_optab_fn): Ditto.
12442 (internal_fn_len_index): New function.
12443 (internal_fn_mask_index): Change order of
12444 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12445 (internal_fn_stored_value_index): Ditto.
12446 (internal_len_load_store_bias): Ditto.
12447 * internal-fn.h (internal_fn_len_index): New function.
12448 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
12449 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12450 * tree-vect-stmts.cc (vectorizable_store): Ditto.
12451 (vectorizable_load): Ditto.
12453 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
12456 * doc/gm2.texi (Semantic checking): Include examples using
12457 -Wuninit-variable-checking.
12459 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12461 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12462 (*single_widen_fnma<mode>): Ditto.
12463 (*double_widen_fms<mode>): Ditto.
12464 (*single_widen_fms<mode>): Ditto.
12465 (*double_widen_fnms<mode>): Ditto.
12466 (*single_widen_fnms<mode>): Ditto.
12468 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12470 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
12471 into "*" in pattern name which simplifies build files.
12472 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
12473 (*pred_single_widen_mul<mode>): New pattern.
12475 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
12477 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
12478 the index to be 0 or 1.
12480 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
12483 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12485 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12486 (*single_widen_fnma<mode>): Ditto.
12487 (*double_widen_fms<mode>): Ditto.
12488 (*single_widen_fms<mode>): Ditto.
12489 (*double_widen_fnms<mode>): Ditto.
12490 (*single_widen_fnms<mode>): Ditto.
12492 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12494 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12495 (*single_widen_fnma<mode>): Ditto.
12496 (*double_widen_fms<mode>): Ditto.
12497 (*single_widen_fms<mode>): Ditto.
12498 (*double_widen_fnms<mode>): Ditto.
12499 (*single_widen_fnms<mode>): Ditto.
12501 2023-07-03 Pan Li <pan2.li@intel.com>
12503 * config/riscv/vector.md: Fix typo.
12505 2023-07-03 Richard Biener <rguenther@suse.de>
12507 PR tree-optimization/110506
12508 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
12509 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
12511 2023-07-03 Richard Biener <rguenther@suse.de>
12513 PR tree-optimization/110506
12514 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
12515 type before relying on TYPE_PRECISION to produce a nonzero mask.
12517 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12519 * config/mips/mips.md(*and<mode>3_mips16): Generates
12520 ZEB/ZEH instructions.
12522 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12524 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
12525 address register to M16_REGS for MIPS16.
12526 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
12527 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
12528 (AVAIL_NON_MIPS16 (cache..)): Update to
12529 AVAIL_MIPS16E2_OR_NON_MIPS16.
12530 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
12531 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
12533 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12535 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
12536 for ISA_HAS_MIPS16E2.
12537 (ISA_HAS_SYNC): Same as above.
12538 (ISA_HAS_LL_SC): Same as above.
12540 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12542 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
12543 Add logics for generating instruction.
12544 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
12545 * config/mips/mips.md(mov_<load>l): Generates instructions.
12546 (mov_<load>r): Same as above.
12547 (mov_<store>l): Adjusted for the conditions above.
12548 (mov_<store>r): Same as above.
12549 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
12550 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
12552 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12554 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
12555 (mips_const_insns): Same as above.
12556 (mips_output_move): Same as above.
12557 (mips_output_function_prologue): Same as above.
12558 * config/mips/mips.md: Same as above
12560 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12562 * config/mips/constraints.md(Yz): New constraints for mips16e2.
12563 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
12564 (mips_bit_clear_info): Same as above.
12565 * config/mips/mips.cc(mips_bit_clear_info): New function for
12566 generating instructions.
12567 (mips_bit_clear_p): Same as above.
12568 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
12569 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
12570 (*and<mode>3): Generates INS instruction.
12571 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
12572 (ior<mode>3): Add logics for ORI instruction.
12573 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
12574 (*ior<mode>3_mips16): Add logics for XORI instruction.
12575 (*xor<mode>3_mips16): Generates XORI instrucion.
12576 (*extzv<mode>): Add logics for EXT instruction.
12577 (*insv<mode>): Add logics for INS instruction.
12578 * config/mips/predicates.md(bit_clear_operand): New predicate for
12579 generating bitwise instructions.
12580 (and_reg_operand): Add logics for generating bitwise instructions.
12582 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12584 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
12585 that uses global pointer register.
12586 (mips16_unextended_reference_p): Same as above.
12587 (mips_pic_base_register): Same as above.
12588 (mips_init_relocs): Same as above.
12589 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
12590 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
12591 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
12592 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
12594 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12596 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
12597 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
12598 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
12599 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
12600 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
12601 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
12603 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12605 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
12607 * config/mips/mips.h(__mips_mips16e2): Defined a new
12609 (ISA_HAS_MIPS16E2): Defined a new macro.
12610 (ASM_SPEC): Pass mmips16e2 to the assembler.
12611 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
12612 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
12613 * doc/invoke.texi: Add -m(no-)mips16e2 option..
12615 2023-07-02 Jakub Jelinek <jakub@redhat.com>
12617 PR tree-optimization/110508
12618 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
12619 REALPART_EXPR opf nlhs if re2 is non-NULL.
12621 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12623 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
12625 * config/xtensa/xtensa.md (*xtensa_clamps):
12626 Add TARGET_MINMAX to the condition.
12628 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12630 * config/xtensa/xtensa.md (*eqne_INT_MIN):
12631 Add missing ":SI" to the match_operator.
12633 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
12636 * config/darwin.opt: Add fconstant-cfstrings alias to
12637 mconstant-cfstrings.
12638 * doc/invoke.texi: Amend invocation descriptions to reflect
12639 that the fconstant-cfstrings is a target-option alias and to
12640 add the missing mconstant-cfstrings option description to the
12643 2023-07-01 Jan Hubicka <jh@suse.cz>
12645 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
12646 parmaeter; update profile.
12647 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
12648 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
12649 (static_loop_exit): ... this; return the edge to be elliminated.
12650 (ch_base::copy_headers): Handle profile updating for eliminated exits.
12652 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
12654 * config/i386/i386-features.cc (compute_convert_gain): Provide
12655 gains/costs for ROTATE and ROTATERT (by an integer constant).
12656 (general_scalar_chain::convert_rotate): New helper function to
12657 convert a DImode or SImode rotation by an integer constant into
12659 (general_scalar_chain::convert_insn): Call the new convert_rotate
12660 for ROTATE and ROTATERT.
12661 (general_scalar_to_vector_candidate_p): Consider ROTATE and
12662 ROTATERT to be candidates if the second operand is an integer
12663 constant, valid for a rotation (or shift) in the given mode.
12664 * config/i386/i386-features.h (general_scalar_chain): Add new
12665 helper method convert_rotate.
12667 2023-07-01 Jan Hubicka <jh@suse.cz>
12669 PR tree-optimization/103680
12670 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
12671 make message clearer.
12673 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
12675 PR tree-optimization/101832
12676 * tree-object-size.cc (addr_object_size): Handle structure/union type
12677 when it has flexible size.
12679 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
12681 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
12682 (fold_nonarray_ctor_reference): Likewise. Specifically deal
12683 with integral bit-fields.
12684 (fold_ctor_reference): Make sure that the constructor uses the
12685 native storage order.
12687 2023-06-30 Jan Hubicka <jh@suse.cz>
12689 PR middle-end/109849
12690 * predict.cc (estimate_bb_frequencies): Turn to static function.
12691 (expr_expected_value_1): Fix handling of binary expressions with
12693 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
12694 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
12696 * predict.h (estimate_bb_frequencies): No longer declare it.
12698 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
12700 * fold-const.h (multiple_of_p): Change return type from int to bool.
12701 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
12702 neg_conp_p and neg_var_p variables to bool.
12703 (const_binop): Change sat_p variable to bool.
12704 (merge_ranges): Change no_overlap variable to bool.
12705 (extract_muldiv_1): Change same_p variable to bool.
12706 (tree_swap_operands_p): Update function body for bool return type.
12707 (fold_truth_andor): Change commutative variable to bool.
12708 (multiple_of_p): Change return type
12709 from int to void and adjust function body accordingly.
12710 * optabs.h (expand_twoval_unop): Change return type from int to bool.
12711 (expand_twoval_binop): Ditto.
12712 (can_compare_p): Ditto.
12713 (have_add2_insn): Ditto.
12714 (have_addptr3_insn): Ditto.
12715 (have_sub2_insn): Ditto.
12716 (have_insn_for): Ditto.
12717 * optabs.cc (add_equal_note): Ditto.
12718 (widen_operand): Change no_extend argument from int to bool.
12719 (expand_binop): Ditto.
12720 (expand_twoval_unop): Change return type
12721 from int to void and adjust function body accordingly.
12722 (expand_twoval_binop): Ditto.
12723 (can_compare_p): Ditto.
12724 (have_add2_insn): Ditto.
12725 (have_addptr3_insn): Ditto.
12726 (have_sub2_insn): Ditto.
12727 (have_insn_for): Ditto.
12729 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
12731 * config/aarch64/aarch64-simd.md
12732 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
12733 Expansions for abd vec widen optabs.
12734 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
12735 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
12736 that give the appropriate extend RTL for the max RTL.
12738 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
12740 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
12741 * optabs.def (vec_widen_sabd_optab,
12742 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
12743 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
12744 vec_widen_uabd_optab,
12745 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
12746 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
12748 * doc/md.texi: Document them.
12749 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
12750 to build a VEC_WIDEN_ABD call if the input precision is smaller
12751 than the precision of the output.
12752 (vect_recog_widen_abd_pattern): Should an ABD expression be
12753 found preceeding an extension, replace the two with a
12756 2023-06-30 Pan Li <pan2.li@intel.com>
12758 * config/riscv/vector.md: Refactor the common condition.
12760 2023-06-30 Richard Biener <rguenther@suse.de>
12762 PR tree-optimization/110496
12763 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
12764 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
12766 2023-06-30 Richard Biener <rguenther@suse.de>
12768 PR middle-end/110489
12769 * statistics.cc (curr_statistics_hash): Add argument
12770 indicating whether we should allocate the hash.
12771 (statistics_fini_pass): If the hash isn't allocated
12772 only print the summary header.
12774 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
12775 Thomas Schwinge <thomas@codesourcery.com>
12777 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
12779 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
12782 * config/mips/mips.cc (mips_function_arg_alignment): Returns
12783 the alignment of function argument. In case of typedef type,
12784 it returns the aligment of the aliased type.
12785 (mips_function_arg_boundary): Relocated calculation of the
12786 aligment of function arguments.
12788 2023-06-29 Jan Hubicka <jh@suse.cz>
12790 PR tree-optimization/109849
12791 * ipa-fnsummary.cc (decompose_param_expr): Skip
12792 functions returning its parameter.
12793 (set_cond_stmt_execution_predicate): Return early
12794 if predicate was constructed.
12796 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
12799 * doc/extend.texi: Document GCC extension on a structure containing
12800 a flexible array member to be a member of another structure.
12802 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
12804 * print-tree.cc (print_node): Print new bit type_include_flexarray.
12805 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
12806 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
12807 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
12808 in bit no_named_args_stdarg_p properly for its corresponding type.
12809 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
12810 out bit no_named_args_stdarg_p properly for its corresponding type.
12811 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
12813 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
12815 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
12816 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
12817 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
12819 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
12821 * value-range.cc (frange::set): Do not call verify_range.
12822 (frange::normalize_kind): Verify range.
12823 (frange::union_nans): Do not call verify_range.
12824 (frange::union_): Same.
12825 (frange::intersect): Same.
12826 (irange::irange_single_pair_union): Call normalize_kind if
12828 (irange::union_): Same.
12829 (irange::intersect): Same.
12830 (irange::set_range_from_nonzero_bits): Verify range.
12831 (irange::set_nonzero_bits): Call normalize_kind if necessary.
12832 (irange::get_nonzero_bits): Tweak comment.
12833 (irange::intersect_nonzero_bits): Call normalize_kind if
12835 (irange::union_nonzero_bits): Same.
12836 * value-range.h (irange::normalize_kind): Verify range.
12838 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
12840 * cselib.h (rtx_equal_for_cselib_1):
12841 Change return type from int to bool.
12842 (references_value_p): Ditto.
12843 (rtx_equal_for_cselib_p): Ditto.
12844 * expr.h (can_store_by_pieces): Ditto.
12845 (try_casesi): Ditto.
12846 (try_tablejump): Ditto.
12847 (safe_from_p): Ditto.
12848 * sbitmap.h (bitmap_equal_p): Ditto.
12849 * cselib.cc (references_value_p): Change return type
12850 from int to void and adjust function body accordingly.
12851 (rtx_equal_for_cselib_1): Ditto.
12852 * expr.cc (is_aligning_offset): Ditto.
12853 (can_store_by_pieces): Ditto.
12854 (mostly_zeros_p): Ditto.
12855 (all_zeros_p): Ditto.
12856 (safe_from_p): Ditto.
12857 (is_aligning_offset): Ditto.
12858 (try_casesi): Ditto.
12859 (try_tablejump): Ditto.
12860 (store_constructor): Change "need_to_clear" and
12861 "const_bounds_p" variables to bool.
12862 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
12864 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
12866 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
12869 2023-06-29 Richard Biener <rguenther@suse.de>
12871 PR tree-optimization/110460
12872 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
12873 Only allow integral, pointer and scalar float type scalar_type.
12875 2023-06-29 Lili Cui <lili.cui@intel.com>
12877 PR tree-optimization/110148
12878 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
12879 ops in this function.
12881 2023-06-29 Richard Biener <rguenther@suse.de>
12883 PR middle-end/110452
12884 * expr.cc (store_constructor): Handle uniform boolean
12885 vectors with integer mode specially.
12887 2023-06-29 Richard Biener <rguenther@suse.de>
12889 PR middle-end/110461
12890 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
12893 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
12895 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
12896 (array_slice): Relax va_gc constructor to handle all vectors
12897 with a vl_embed layout.
12899 2023-06-29 Pan Li <pan2.li@intel.com>
12901 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
12902 (riscv_mode_needed): Likewise.
12903 (riscv_entity_mode_after): Likewise.
12904 (riscv_mode_after): Likewise.
12905 (riscv_mode_entry): Likewise.
12906 (riscv_mode_exit): Likewise.
12907 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
12909 * config/riscv/riscv.md: Add FRM register.
12910 * config/riscv/vector-iterators.md: Add FRM type.
12911 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
12912 (fsrm): Define new insn for fsrm instruction.
12914 2023-06-29 Pan Li <pan2.li@intel.com>
12916 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
12917 Add macro for static frm min and max.
12918 * config/riscv/riscv-vector-builtins-bases.cc
12919 (class binop_frm): New class for floating-point with frm.
12920 (BASE): Add vfadd for frm.
12921 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
12922 * config/riscv/riscv-vector-builtins-functions.def
12923 (vfadd_frm): Likewise.
12924 * config/riscv/riscv-vector-builtins-shapes.cc
12925 (struct alu_frm_def): New struct for alu with frm.
12926 (SHAPE): Add alu with frm.
12927 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
12928 * config/riscv/riscv-vector-builtins.cc
12929 (function_checker::report_out_of_range_and_not): New function
12930 for report out of range and not val.
12931 (function_checker::require_immediate_range_or): New function
12932 for checking in range or one val.
12933 * config/riscv/riscv-vector-builtins.h: Add function decl.
12935 2023-06-29 Cui, Lili <lili.cui@intel.com>
12937 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
12938 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
12940 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
12943 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
12944 to insn before validating it.
12946 2023-06-28 Jan Hubicka <jh@suse.cz>
12948 PR middle-end/110334
12949 * ipa-fnsummary.h (ipa_fn_summary): Add
12950 safe_to_inline_to_always_inline.
12951 * ipa-inline.cc (can_early_inline_edge_p): ICE
12952 if SSA is not built; do cycle checking for
12953 always_inline functions.
12954 (inline_always_inline_functions): Be recrusive;
12955 watch for cycles; do not updat overall summary.
12956 (early_inliner): Do not give up on always_inlines.
12957 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
12960 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
12962 * output.h (leaf_function_p): Change return type from int to bool.
12963 (final_forward_branch_p): Ditto.
12964 (only_leaf_regs_used): Ditto.
12965 (maybe_assemble_visibility): Ditto.
12966 * varasm.h (supports_one_only): Ditto.
12967 * rtl.h (compute_alignments): Change return type from int to void.
12968 * final.cc (app_on): Change return type from int to bool.
12969 (compute_alignments): Change return type from int to void
12970 and adjust function body accordingly.
12971 (shorten_branches): Change "something_changed" variable
12972 type from int to bool.
12973 (leaf_function_p): Change return type from int to bool
12974 and adjust function body accordingly.
12975 (final_forward_branch_p): Ditto.
12976 (only_leaf_regs_used): Ditto.
12977 * varasm.cc (contains_pointers_p): Change return type from
12978 int to bool and adjust function body accordingly.
12979 (compare_constant): Ditto.
12980 (maybe_assemble_visibility): Ditto.
12981 (supports_one_only): Ditto.
12983 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
12986 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
12987 (maybe_copy_reg_attrs): New function.
12988 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
12989 (copyprop_hardreg_forward_1): Ditto.
12991 2023-06-28 Richard Biener <rguenther@suse.de>
12993 PR tree-optimization/110434
12994 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
12995 VAR we replace with <retval>.
12997 2023-06-28 Richard Biener <rguenther@suse.de>
12999 PR tree-optimization/110451
13000 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
13001 tcc_comparison are expensive.
13003 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
13005 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
13006 for TImode comparisons on 32-bit architectures.
13007 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
13008 SWIM1248x to exclude/avoid TImode being conditional on -m64.
13009 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
13010 and/or with TARGET_SSE4_1.
13011 * config/i386/predicates.md (ix86_timode_comparison_operator):
13012 New predicate that depends upon TARGET_64BIT.
13013 (ix86_timode_comparison_operand): Likewise.
13015 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
13018 * config/i386/i386-features.cc (compute_convert_gain): Provide
13019 more accurate gains for conversion of scalar comparisons to
13022 2023-06-28 Richard Biener <rguenther@suse.de>
13024 PR tree-optimization/110443
13025 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
13028 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
13030 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
13031 (peephole2 for move_and_compare): New.
13032 (mode_iterator WORD): New. Set the mode to SI/DImode by
13034 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
13035 (split pattern for compare_and_move): Likewise.
13037 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13039 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
13040 (*single_widen_fma<mode>): Ditto.
13042 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
13045 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
13047 (altivec_vupkhs<VU_char>_direct): ...this.
13048 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
13049 predicate to test if a constant can be loaded with vspltisw and
13051 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
13052 a vector constant can be synthesized with a vspltisw and a vupkhsw.
13053 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
13055 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
13056 function to return true if OP mode is V2DI and can be synthesized
13057 with vupkhsw and vspltisw.
13058 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
13059 constants with vspltisw and vupkhsw.
13061 2023-06-28 Jan Hubicka <jh@suse.cz>
13063 PR tree-optimization/110377
13064 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
13066 (ipa_analyze_node): Enable ranger.
13068 2023-06-28 Richard Biener <rguenther@suse.de>
13070 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
13071 (TYPE_PRECISION_RAW): Provide raw access to the precision
13073 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
13074 (gimple_canonical_types_compatible_p): Likewise.
13075 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
13076 Stream TYPE_PRECISION_RAW.
13077 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
13079 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
13081 2023-06-28 Alexandre Oliva <oliva@adacore.com>
13083 * doc/extend.texi (zero-call-used-regs): Document leafy and
13085 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
13086 LEAFY and variants.
13087 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
13088 functions in leafy mode.
13089 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
13091 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13093 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
13094 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
13096 (@pred_single_widen_add<mode>): New pattern.
13097 (@pred_single_widen_sub<mode>): New pattern.
13099 2023-06-28 liuhongt <hongtao.liu@intel.com>
13101 * config/i386/i386.cc (ix86_invalid_conversion): New function.
13102 (TARGET_INVALID_CONVERSION): Define as
13103 ix86_invalid_conversion.
13105 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13107 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
13109 (<float_cvt><vnconvert><mode>2): Ditto.
13110 (<optab><mode><vnconvert>2): Ditto.
13111 (<float_cvt><mode><vnconvert>2): Ditto.
13112 * config/riscv/vector-iterators.md: Add vnconvert.
13114 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13116 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
13118 (extend<v_quad_trunc><mode>2): Ditto.
13119 (trunc<mode><v_double_trunc>2): Ditto.
13120 (trunc<mode><v_quad_trunc>2): Ditto.
13121 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
13122 V_QUAD_TRUNC and v_quad_trunc.
13124 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13126 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
13129 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13131 * config/riscv/autovec.md (copysign<mode>3): Add expander.
13132 (xorsign<mode>3): Ditto.
13133 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
13135 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
13139 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
13140 (@pred_ncopysign<mode>_scalar): Ditto.
13142 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13144 * config/riscv/autovec.md: VF_AUTO -> VF.
13145 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
13146 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
13148 * config/riscv/vector.md: Use new iterators.
13150 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13152 * match.pd: Use element_mode and check if target supports
13153 operation with new type.
13155 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13157 * config/aarch64/aarch64-sve-builtins-base.cc
13158 (svdupq_impl::fold_nonconst_dupq): New method.
13159 (svdupq_impl::fold): Call fold_nonconst_dupq.
13161 2023-06-27 Andrew Pinski <apinski@marvell.com>
13163 PR middle-end/110420
13164 PR middle-end/103979
13165 PR middle-end/98619
13166 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
13168 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
13170 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
13171 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
13173 (set_switch_stmt_execution_predicate): Same.
13174 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
13176 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
13178 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
13179 ipa_vr instead of value_range.
13182 (ipa_get_value_range): Same.
13183 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
13187 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
13189 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
13190 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
13191 (ipa_set_jfunc_vr): Take a range.
13192 (ipa_compute_jump_functions_for_edge): Pass range to
13194 (ipa_write_jump_function): Call streamer write helper.
13195 (ipa_read_jump_function): Call streamer read helper.
13196 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
13198 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
13200 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
13201 as a probable initializer rather than a probable complete statement.
13203 2023-06-27 Richard Biener <rguenther@suse.de>
13205 PR tree-optimization/96208
13206 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
13207 a non-grouped load if it is the same for all lanes.
13208 (vect_build_slp_tree_2): Handle not grouped loads.
13209 (vect_optimize_slp_pass::remove_redundant_permutations):
13211 (vect_transform_slp_perm_load_1): Likewise.
13212 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
13213 (get_group_load_store_type): Likewise. Handle
13214 invariant accesses.
13215 (vectorizable_load): Likewise.
13217 2023-06-27 liuhongt <hongtao.liu@intel.com>
13219 PR rtl-optimization/110237
13220 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
13222 (maskstore<mode><avx512fmaskmodelower): Ditto.
13223 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
13224 from original <avx512>_store<mode>_mask.
13226 2023-06-27 liuhongt <hongtao.liu@intel.com>
13228 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
13229 Move flag_expensive_optimizations && !optimize_size to ..
13230 * config/i386/i386-options.cc (ix86_option_override_internal):
13231 .. this, it makes -mvzeroupper independent of optimization
13232 level, but still keeps the behavior of architecture
13233 tuning(emit_vzeroupper) unchanged.
13235 2023-06-27 liuhongt <hongtao.liu@intel.com>
13238 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
13239 vzeroupper for vzeroupper call_insn.
13241 2023-06-27 Andrew Pinski <apinski@marvell.com>
13243 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
13246 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13248 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
13251 2023-06-26 Andrew Pinski <apinski@marvell.com>
13253 * doc/extend.texi (access attribute): Add
13255 (interrupt/interrupt_handler attribute):
13258 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13260 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
13261 Use <DWI> instead of <V2XWIDE>.
13262 (aarch64_sqrshrun_n<mode>): Likewise.
13264 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13266 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
13268 (aarch64_rnd_imm_p): ... This.
13269 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
13271 (aarch64_int_rnd_operand): ... This.
13272 (aarch64_simd_rshrn_imm_vec): Delete.
13273 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
13274 Adjust for the above.
13275 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
13276 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
13277 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
13278 (aarch64_sqrshrun_n<mode>_insn): Likewise.
13279 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
13280 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
13281 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
13282 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
13283 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
13285 (aarch64_rnd_imm_p): ... This.
13287 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
13289 * config/s390/s390.cc (s390_encode_section_info): Set
13290 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
13293 2023-06-26 Jan Hubicka <jh@suse.cz>
13295 PR tree-optimization/109849
13296 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
13297 count of newly constructed forwarder block.
13299 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
13301 * doc/optinfo.texi: Fix "steam" -> "stream".
13303 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13305 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
13307 (dse_optimize_stmt): Add LEN_MASK_STORE.
13309 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13311 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
13312 fold of LOAD/STORE with length.
13314 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
13316 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
13317 Check for interdependence between operands 1 and 2.
13319 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
13321 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
13322 into account when costing non-widening/truncating conversions.
13324 2023-06-26 Richard Biener <rguenther@suse.de>
13326 PR tree-optimization/110381
13327 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
13328 Materialize permutes before fold-left reductions.
13330 2023-06-26 Pan Li <pan2.li@intel.com>
13332 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
13334 2023-06-26 Richard Biener <rguenther@suse.de>
13336 * varasm.cc (initializer_constant_valid_p_1): Also
13337 constrain the type of value to be scalar integral
13338 before dispatching to narrowing_initializer_constant_valid_p.
13340 2023-06-26 Richard Biener <rguenther@suse.de>
13342 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
13343 Use element_precision.
13345 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13347 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
13349 (vcondu<V:mode><VI:mode>): Ditto.
13350 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
13351 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
13353 2023-06-26 Richard Biener <rguenther@suse.de>
13355 PR tree-optimization/110392
13356 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
13357 Do early exits on true/false predicate only after normalization.
13359 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13361 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
13364 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
13366 * config/i386/i386.md (peephole2): Simplify zeroing a register
13367 followed by an IOR, XOR or PLUS operation on it, into a move.
13368 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
13369 eliminate (and hide from reload) unnecessary word to doubleword
13370 extensions that are followed by left shifts by sufficiently large,
13371 but valid, bit counts.
13373 2023-06-26 liuhongt <hongtao.liu@intel.com>
13375 PR tree-optimization/110371
13376 PR tree-optimization/110018
13377 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
13378 save intermediate type operand instead of "subtle" vec_dest
13381 2023-06-26 liuhongt <hongtao.liu@intel.com>
13383 PR tree-optimization/110371
13384 PR tree-optimization/110018
13385 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
13386 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
13388 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
13390 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
13391 Override tune_string with arch_string if tune_string is not
13392 explicitly specified.
13394 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13396 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
13398 * config/riscv/riscv-vsetvl.h: New function.
13400 2023-06-25 Li Xu <xuli1@eswincomputing.com>
13402 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
13405 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13407 * config/riscv/autovec.md (len_load_<mode>): Remove.
13408 (len_maskload<mode><vm>): Remove.
13409 (len_store_<mode>): New pattern.
13410 (len_maskstore<mode><vm>): New pattern.
13411 * config/riscv/predicates.md (autovec_length_operand): New predicate.
13412 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13413 (expand_load_store): New function.
13414 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
13415 (emit_nonvlmax_masked_insn): Ditto.
13416 (expand_load_store): Ditto.
13417 * config/riscv/riscv-vector-builtins.cc
13418 (function_expander::use_contiguous_store_insn): Add avl_type operand
13420 * config/riscv/vector.md: Ditto.
13422 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13424 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
13427 2023-06-25 Pan Li <pan2.li@intel.com>
13429 * config/riscv/vector.md: Revert.
13431 2023-06-25 Pan Li <pan2.li@intel.com>
13433 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
13434 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
13435 (ADJUST_ALIGNMENT): Ditto.
13436 (RVV_TUPLE_PARTIAL_MODES): Ditto.
13437 (ADJUST_NUNITS): Ditto.
13438 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
13439 (vfloat16mf4x3_t): Ditto.
13440 (vfloat16mf4x4_t): Ditto.
13441 (vfloat16mf4x5_t): Ditto.
13442 (vfloat16mf4x6_t): Ditto.
13443 (vfloat16mf4x7_t): Ditto.
13444 (vfloat16mf4x8_t): Ditto.
13445 (vfloat16mf2x2_t): Ditto.
13446 (vfloat16mf2x3_t): Ditto.
13447 (vfloat16mf2x4_t): Ditto.
13448 (vfloat16mf2x5_t): Ditto.
13449 (vfloat16mf2x6_t): Ditto.
13450 (vfloat16mf2x7_t): Ditto.
13451 (vfloat16mf2x8_t): Ditto.
13452 (vfloat16m1x2_t): Ditto.
13453 (vfloat16m1x3_t): Ditto.
13454 (vfloat16m1x4_t): Ditto.
13455 (vfloat16m1x5_t): Ditto.
13456 (vfloat16m1x6_t): Ditto.
13457 (vfloat16m1x7_t): Ditto.
13458 (vfloat16m1x8_t): Ditto.
13459 (vfloat16m2x2_t): Ditto.
13460 (vfloat16m2x3_t): Diito.
13461 (vfloat16m2x4_t): Diito.
13462 (vfloat16m4x2_t): Diito.
13463 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
13464 (vfloat16mf4x3_t): Ditto.
13465 (vfloat16mf4x4_t): Ditto.
13466 (vfloat16mf4x5_t): Ditto.
13467 (vfloat16mf4x6_t): Ditto.
13468 (vfloat16mf4x7_t): Ditto.
13469 (vfloat16mf4x8_t): Ditto.
13470 (vfloat16mf2x2_t): Ditto.
13471 (vfloat16mf2x3_t): Ditto.
13472 (vfloat16mf2x4_t): Ditto.
13473 (vfloat16mf2x5_t): Ditto.
13474 (vfloat16mf2x6_t): Ditto.
13475 (vfloat16mf2x7_t): Ditto.
13476 (vfloat16mf2x8_t): Ditto.
13477 (vfloat16m1x2_t): Ditto.
13478 (vfloat16m1x3_t): Ditto.
13479 (vfloat16m1x4_t): Ditto.
13480 (vfloat16m1x5_t): Ditto.
13481 (vfloat16m1x6_t): Ditto.
13482 (vfloat16m1x7_t): Ditto.
13483 (vfloat16m1x8_t): Ditto.
13484 (vfloat16m2x2_t): Ditto.
13485 (vfloat16m2x3_t): Ditto.
13486 (vfloat16m2x4_t): Ditto.
13487 (vfloat16m4x2_t): Ditto.
13488 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
13489 * config/riscv/riscv.md: Ditto.
13490 * config/riscv/vector-iterators.md: Ditto.
13492 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13494 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
13495 (gimple_fold_partial_load_store_mem_ref): Ditto.
13496 (gimple_fold_partial_store): Ditto.
13497 (gimple_fold_call): Ditto.
13499 2023-06-25 liuhongt <hongtao.liu@intel.com>
13502 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
13503 Refine pattern with UNSPEC_MASKLOAD.
13504 (maskload<mode><avx512fmaskmodelower>): Ditto.
13505 (*<avx512>_load<mode>_mask): Extend mode iterator to
13507 (*<avx512>_load<mode>): Ditto.
13509 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13511 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
13513 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13515 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
13516 LEN_MASK_{LOAD,STORE}
13518 2023-06-25 yulong <shiyulong@iscas.ac.cn>
13520 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
13522 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
13524 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
13526 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13528 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
13529 (*fma<VI:mode><P:mode>): Ditto.
13530 (*fnma<mode>): Ditto.
13531 (*fnma<VI:mode><P:mode>): Ditto.
13533 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13535 * config/riscv/autovec.md (fma<mode>4): New pattern.
13536 (*fma<mode>): Ditto.
13537 (fnma<mode>4): Ditto.
13538 (*fnma<mode>): Ditto.
13539 (fms<mode>4): Ditto.
13540 (*fms<mode>): Ditto.
13541 (fnms<mode>4): Ditto.
13542 (*fnms<mode>): Ditto.
13543 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
13545 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
13546 * config/riscv/vector.md: Fix attribute bug.
13548 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13550 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
13551 Apply LEN_MASK_{LOAD,STORE}.
13553 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13555 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
13556 Add LEN_MASK_{LOAD,STORE}.
13558 2023-06-24 David Malcolm <dmalcolm@redhat.com>
13560 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
13561 * diagnostic.cc: Likewise.
13562 * text-art/box-drawing.cc: Likewise.
13563 * text-art/canvas.cc: Likewise.
13564 * text-art/ruler.cc: Likewise.
13565 * text-art/selftests.cc: Likewise.
13566 * text-art/selftests.h (text_art::canvas): New forward decl.
13567 * text-art/style.cc: Add #define INCLUDE_VECTOR.
13568 * text-art/styled-string.cc: Likewise.
13569 * text-art/table.cc: Likewise.
13570 * text-art/table.h: Remove #include <vector>.
13571 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
13572 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
13573 Remove #include of <vector> and <string>.
13574 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
13575 * text-art/widget.h: Remove #include <vector>.
13577 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13579 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
13580 (internal_load_fn_p): Add LEN_MASK_LOAD.
13581 (internal_store_fn_p): Add LEN_MASK_STORE.
13582 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
13583 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
13584 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
13585 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
13586 (get_len_load_store_mode): Ditto.
13587 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
13588 (get_len_load_store_mode): Ditto.
13589 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
13590 (get_all_ones_mask): New function.
13591 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
13592 (vectorizable_load): Ditto.
13594 2023-06-23 Marek Polacek <polacek@redhat.com>
13596 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
13597 -std=gnu++26. Document that for C++23, its value is 202302L.
13598 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
13599 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
13600 (gen_compile_unit_die): Likewise.
13602 2023-06-23 Jan Hubicka <jh@suse.cz>
13604 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
13606 (pass_phiprop::execute): Do not compute it here; return
13607 update_ssa_only_virtuals if something changed.
13608 (pass_data_phiprop): Remove TODO_update_ssa from todos.
13610 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
13611 Aaron Sawdey <acsawdey@linux.ibm.com>
13614 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
13615 allowed prefixed lwa to be generated.
13616 * config/rs6000/fusion.md: Regenerate.
13617 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
13618 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
13619 plus compare immediate fused insns.
13620 (maybe_prefixed): Likewise.
13622 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
13624 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
13625 of ASHIFT to const0_rtx with sufficiently large shift count.
13626 Optimize highpart SUBREGs of ASHIFT as the shift operand when
13627 the shift count is the correct offset. Optimize SUBREGs of
13628 multi-word logic operations if the SUBREGs of both operands
13631 2023-06-23 Richard Biener <rguenther@suse.de>
13633 * varasm.cc (initializer_constant_valid_p_1): Only
13634 allow conversions between scalar floating point types.
13636 2023-06-23 Richard Biener <rguenther@suse.de>
13638 * tree-vect-stmts.cc (vectorizable_assignment):
13639 Properly handle non-integral operands when analyzing
13642 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13644 PR tree-optimization/110280
13645 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
13646 using build_vector_from_val with the element of input operand, and
13647 mask's type if operand and mask's types don't match.
13649 2023-06-23 Richard Biener <rguenther@suse.de>
13651 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
13652 the truth_value_p case with !VECTOR_TYPE_P.
13654 2023-06-23 Richard Biener <rguenther@suse.de>
13656 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
13657 Exit early when the type isn't scalar integral.
13659 2023-06-23 Richard Biener <rguenther@suse.de>
13661 * match.pd ((outertype)((innertype0)a+(innertype1)b)
13662 -> ((newtype)a+(newtype)b)): Use element_precision
13665 2023-06-23 Richard Biener <rguenther@suse.de>
13667 * fold-const.cc (fold_binary_loc): Use element_precision
13668 when trying (double)float1 CMP (double)float2 to
13669 float1 CMP float2 simplification.
13670 * match.pd: Likewise.
13672 2023-06-23 Richard Biener <rguenther@suse.de>
13674 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
13675 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
13677 2023-06-23 Richard Biener <rguenther@suse.de>
13679 * tree-vect-stmts.cc (vector_vector_composition_type):
13680 Handle composition of a vector from a number of elements that
13681 happens to match its number of lanes.
13683 2023-06-22 Marek Polacek <polacek@redhat.com>
13685 * configure.ac (--enable-host-bind-now): New check. Add
13686 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
13687 * configure: Regenerate.
13688 * doc/install.texi: Document --enable-host-bind-now.
13690 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
13692 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
13694 2023-06-22 Richard Biener <rguenther@suse.de>
13696 PR tree-optimization/110332
13697 * tree-ssa-phiprop.cc (propagate_with_phi): Always
13698 check aliasing with edge inserted loads.
13700 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
13701 Uros Bizjak <ubizjak@gmail.com>
13703 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
13704 expansion of ptestc with equal operands as producing const1_rtx.
13705 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
13706 estimates of UNSPEC_PTEST, where the ptest performs the PAND
13707 or PAND of its operands.
13708 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
13709 of reg_equal_p operands into an x86_stc instruction.
13710 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
13711 (define_split): Similar to above for strict_low_part destinations.
13712 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
13714 2023-06-22 David Malcolm <dmalcolm@redhat.com>
13717 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
13718 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
13720 (fanalyzer-debug-text-art): New.
13722 2023-06-22 David Malcolm <dmalcolm@redhat.com>
13724 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
13725 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
13726 text-art/style.o, text-art/styled-string.o, text-art/table.o,
13727 text-art/theme.o, and text-art/widget.o.
13728 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
13729 (COLOR_FG_BRIGHT_RED): New.
13730 (COLOR_FG_BRIGHT_GREEN): New.
13731 (COLOR_FG_BRIGHT_YELLOW): New.
13732 (COLOR_FG_BRIGHT_BLUE): New.
13733 (COLOR_FG_BRIGHT_MAGENTA): New.
13734 (COLOR_FG_BRIGHT_CYAN): New.
13735 (COLOR_FG_BRIGHT_WHITE): New.
13736 (COLOR_BG_BRIGHT_BLACK): New.
13737 (COLOR_BG_BRIGHT_RED): New.
13738 (COLOR_BG_BRIGHT_GREEN): New.
13739 (COLOR_BG_BRIGHT_YELLOW): New.
13740 (COLOR_BG_BRIGHT_BLUE): New.
13741 (COLOR_BG_BRIGHT_MAGENTA): New.
13742 (COLOR_BG_BRIGHT_CYAN): New.
13743 (COLOR_BG_BRIGHT_WHITE): New.
13744 * common.opt (fdiagnostics-text-art-charset=): New option.
13745 (diagnostic-text-art.h): New SourceInclude.
13746 (diagnostic_text_art_charset) New Enum and EnumValues.
13747 * configure: Regenerate.
13748 * configure.ac (gccdepdir): Add text-art to loop.
13749 * diagnostic-diagram.h: New file.
13750 * diagnostic-format-json.cc (json_emit_diagram): New.
13751 (diagnostic_output_format_init_json): Wire it up to
13752 context->m_diagrams.m_emission_cb.
13753 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
13754 "text-art/canvas.h".
13755 (sarif_result::on_nested_diagnostic): Move code to...
13756 (sarif_result::add_related_location): ...this new function.
13757 (sarif_result::on_diagram): New.
13758 (sarif_builder::emit_diagram): New.
13759 (sarif_builder::make_message_object_for_diagram): New.
13760 (sarif_emit_diagram): New.
13761 (diagnostic_output_format_init_sarif): Set
13762 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
13763 * diagnostic-text-art.h: New file.
13764 * diagnostic.cc: Include "diagnostic-text-art.h",
13765 "diagnostic-diagram.h", and "text-art/theme.h".
13766 (diagnostic_initialize): Initialize context->m_diagrams and
13767 call diagnostics_text_art_charset_init.
13768 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
13769 (diagnostic_emit_diagram): New.
13770 (diagnostics_text_art_charset_init): New.
13771 * diagnostic.h (text_art::theme): New forward decl.
13772 (class diagnostic_diagram): Likewise.
13773 (diagnostic_context::m_diagrams): New field.
13774 (diagnostic_emit_diagram): New decl.
13775 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
13776 -fdiagnostics-text-art-charset=.
13777 (-fdiagnostics-plain-output): Add
13778 -fdiagnostics-text-art-charset=none.
13779 * gcc.cc: Include "diagnostic-text-art.h".
13780 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
13781 * opts-common.cc (decode_cmdline_options_to_array): Add
13782 "-fdiagnostics-text-art-charset=none" to expanded_args for
13783 -fdiagnostics-plain-output.
13784 * opts.cc: Include "diagnostic-text-art.h".
13785 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
13786 * pretty-print.cc (pp_unicode_character): New.
13787 * pretty-print.h (pp_unicode_character): New decl.
13788 * selftest-run-tests.cc: Include "text-art/selftests.h".
13789 (selftest::run_tests): Call text_art_tests.
13790 * text-art/box-drawing-chars.inc: New file, generated by
13791 contrib/unicode/gen-box-drawing-chars.py.
13792 * text-art/box-drawing.cc: New file.
13793 * text-art/box-drawing.h: New file.
13794 * text-art/canvas.cc: New file.
13795 * text-art/canvas.h: New file.
13796 * text-art/ruler.cc: New file.
13797 * text-art/ruler.h: New file.
13798 * text-art/selftests.cc: New file.
13799 * text-art/selftests.h: New file.
13800 * text-art/style.cc: New file.
13801 * text-art/styled-string.cc: New file.
13802 * text-art/table.cc: New file.
13803 * text-art/table.h: New file.
13804 * text-art/theme.cc: New file.
13805 * text-art/theme.h: New file.
13806 * text-art/types.h: New file.
13807 * text-art/widget.cc: New file.
13808 * text-art/widget.h: New file.
13810 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
13812 * function.h (emit_initial_value_sets):
13813 Change return type from int to void.
13814 (aggregate_value_p): Change return type from int to bool.
13815 (prologue_contains): Ditto.
13816 (epilogue_contains): Ditto.
13817 (prologue_epilogue_contains): Ditto.
13818 * function.cc (temp_slot): Make "in_use" variable bool.
13819 (make_slot_available): Update for changed "in_use" variable.
13820 (assign_stack_temp_for_type): Ditto.
13821 (emit_initial_value_sets): Change return type from int to void
13822 and update function body accordingly.
13823 (instantiate_virtual_regs): Ditto.
13824 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
13825 (safe_insn_predicate): Change return type from int to bool.
13826 (aggregate_value_p): Change return type from int to bool
13827 and update function body accordingly.
13828 (prologue_contains): Change return type from int to bool.
13829 (prologue_epilogue_contains): Ditto.
13831 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
13833 * common.opt (fp_contract_mode) [on]: Remove fallback.
13834 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
13835 * doc/invoke.texi (-ffp-contract): Update.
13836 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
13838 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13840 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13841 Add alternatives to prefer to avoid same input and output Z register.
13842 (mask_gather_load<mode><v_int_container>): Likewise.
13843 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13844 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13845 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13846 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13848 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13850 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13851 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13852 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13853 <SVE_2BHSI:mode>_sxtw): Likewise.
13854 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13855 <SVE_2BHSI:mode>_uxtw): Likewise.
13856 (@aarch64_ldff1_gather<mode>): Likewise.
13857 (@aarch64_ldff1_gather<mode>): Likewise.
13858 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13859 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13860 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13861 <VNx4_NARROW:mode>): Likewise.
13862 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13863 <VNx2_NARROW:mode>): Likewise.
13864 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13865 <VNx2_NARROW:mode>_sxtw): Likewise.
13866 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13867 <VNx2_NARROW:mode>_uxtw): Likewise.
13868 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13869 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13870 <SVE_PARTIAL_I:mode>): Likewise.
13872 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13874 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13875 Convert to compact alternatives syntax.
13876 (mask_gather_load<mode><v_int_container>): Likewise.
13877 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13878 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13879 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13880 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13882 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13884 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13885 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13886 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13887 <SVE_2BHSI:mode>_sxtw): Likewise.
13888 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13889 <SVE_2BHSI:mode>_uxtw): Likewise.
13890 (@aarch64_ldff1_gather<mode>): Likewise.
13891 (@aarch64_ldff1_gather<mode>): Likewise.
13892 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13893 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13894 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13895 <VNx4_NARROW:mode>): Likewise.
13896 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13897 <VNx2_NARROW:mode>): Likewise.
13898 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13899 <VNx2_NARROW:mode>_sxtw): Likewise.
13900 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13901 <VNx2_NARROW:mode>_uxtw): Likewise.
13902 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13903 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13904 <SVE_PARTIAL_I:mode>): Likewise.
13906 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13909 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13911 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13912 Convert to compact alternatives syntax.
13913 (mask_gather_load<mode><v_int_container>): Likewise.
13914 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13915 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13916 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13917 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13919 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13921 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13922 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13923 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13924 <SVE_2BHSI:mode>_sxtw): Likewise.
13925 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13926 <SVE_2BHSI:mode>_uxtw): Likewise.
13927 (@aarch64_ldff1_gather<mode>): Likewise.
13928 (@aarch64_ldff1_gather<mode>): Likewise.
13929 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13930 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13931 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13932 <VNx4_NARROW:mode>): Likewise.
13933 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13934 <VNx2_NARROW:mode>): Likewise.
13935 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13936 <VNx2_NARROW:mode>_sxtw): Likewise.
13937 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13938 <VNx2_NARROW:mode>_uxtw): Likewise.
13939 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13940 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13941 <SVE_PARTIAL_I:mode>): Likewise.
13943 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13945 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
13946 (get_len_load_store_mode): Ditto.
13947 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
13948 (get_len_load_store_mode): Ditto.
13949 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
13950 (get_len_load_store_mode): Ditto.
13951 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
13952 (get_len_load_store_mode): Ditto.
13953 * tree-if-conv.cc: include optabs-tree instead of optabs-query
13955 2023-06-21 Richard Biener <rguenther@suse.de>
13957 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
13958 split_constant_offset for the POINTER_PLUS_EXPR case.
13960 2023-06-21 Richard Biener <rguenther@suse.de>
13962 * tree-ssa-loop-ivopts.cc (record_group_use): Use
13963 split_constant_offset.
13965 2023-06-21 Richard Biener <rguenther@suse.de>
13967 * tree-loop-distribution.cc (classify_builtin_st): Use
13968 split_constant_offset.
13969 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
13970 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
13972 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13974 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13975 Convert to compact alternatives syntax.
13976 (mask_gather_load<mode><v_int_container>): Likewise.
13977 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13978 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13979 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13980 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13982 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13984 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13985 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13986 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13987 <SVE_2BHSI:mode>_sxtw): Likewise.
13988 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13989 <SVE_2BHSI:mode>_uxtw): Likewise.
13990 (@aarch64_ldff1_gather<mode>): Likewise.
13991 (@aarch64_ldff1_gather<mode>): Likewise.
13992 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13993 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13994 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13995 <VNx4_NARROW:mode>): Likewise.
13996 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13997 <VNx2_NARROW:mode>): Likewise.
13998 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13999 <VNx2_NARROW:mode>_sxtw): Likewise.
14000 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14001 <VNx2_NARROW:mode>_uxtw): Likewise.
14002 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14003 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14004 <SVE_PARTIAL_I:mode>): Likewise.
14006 2023-06-21 Tamar Christina <tamar.christina@arm.com>
14009 * doc/md.texi: Replace backslashchar.
14011 2023-06-21 Richard Biener <rguenther@suse.de>
14013 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
14014 Overload. For masked main loops make sure the vectorization
14015 factor isn't more than double the number of iterations.
14017 2023-06-21 Jan Beulich <jbeulich@suse.com>
14019 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
14020 value duplication by ix86_build_signbit_mask() when AVX512F and
14022 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
14023 2-alternative form. Adjust "mode" attribute. Add "enabled"
14025 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
14026 && !TARGET_PREFER_AVX256.
14027 (*<avx512>_vpternlog<mode>_2): Likewise.
14028 (*<avx512>_vpternlog<mode>_3): Likewise.
14030 2023-06-21 liuhongt <hongtao.liu@intel.com>
14033 * tree-vect-stmts.cc (vectorizable_conversion): Use
14034 intermiediate integer type for float_expr/fix_trunc_expr when
14035 direct optab is not existed.
14037 2023-06-20 Tamar Christina <tamar.christina@arm.com>
14039 PR bootstrap/110324
14040 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
14042 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
14044 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
14045 register operand to the stack pointer. Require the second register
14046 operand to have the number specified in a separate const_int operand.
14047 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
14048 (aarch64_allocate_and_probe_stack_space): Use it.
14049 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
14050 (aarch64_expand_epilogue): Likewise.
14052 2023-06-20 Jakub Jelinek <jakub@redhat.com>
14054 PR middle-end/79173
14055 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
14056 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
14059 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
14061 * calls.h (setjmp_call_p): Change return type from int to bool.
14062 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
14063 (store_one_arg): Change return type from int to bool
14064 and adjust function body accordingly. Change "sibcall_failure"
14066 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
14067 argument to bool. Change "partial_seen" variable to bool.
14068 (load_register_parameters): Change *sibcall_failure
14069 pointer argument to bool.
14070 (check_sibcall_argument_overlap_1): Change return type from int to bool
14071 and adjust function body accordingly.
14072 (check_sibcall_argument_overlap): Ditto. Change
14073 "mark_stored_args_map" argument to bool.
14074 (emit_call_1): Change "already_popped" variable to bool.
14075 (setjmp_call_p): Change return type from int to bool
14076 and adjust function body accordingly.
14077 (initialize_argument_information): Change *must_preallocate
14078 pointer argument to bool.
14079 (expand_call): Change "pcc_struct_value", "must_preallocate"
14080 and "sibcall_failure" variables to bool.
14081 (emit_library_call_value_1): Change "pcc_struct_value"
14084 2023-06-20 Martin Jambor <mjambor@suse.cz>
14087 * ipa-sra.cc (struct caller_issues): New field there_is_one.
14088 (check_for_caller_issues): Set it.
14089 (check_all_callers_for_issues): Check it.
14091 2023-06-20 Martin Jambor <mjambor@suse.cz>
14093 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
14094 (struct ipcp_transformation): Rearrange members according to
14095 C++ class coding convention, add m_uid_to_idx,
14096 get_param_index and maybe_create_parm_idx_map.
14097 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
14098 (compare_uids): Likewise.
14099 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
14100 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
14101 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
14102 (ipcp_update_vr): Likewise.
14103 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
14104 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
14106 2023-06-20 Carl Love <cel@us.ibm.com>
14108 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
14109 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
14110 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
14111 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
14112 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
14113 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
14114 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
14115 * config/rs6000/rs6000-builtins.def
14116 (__builtin_vsx_scalar_extract_exp_to_vec,
14117 __builtin_vsx_scalar_extract_sig_to_vec,
14118 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
14119 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
14120 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
14121 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
14122 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
14123 overloaded instance. Update comments.
14124 * config/rs6000/rs6000-overload.def
14125 (__builtin_vec_scalar_insert_exp): Add new overload definition with
14127 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
14128 overloaded definitions.
14129 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
14130 (DI_to_TI): New mode attribute.
14131 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
14132 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
14133 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
14134 * doc/extend.texi (scalar_extract_exp_to_vec,
14135 scalar_extract_sig_to_vec): Add documentation for new builtins.
14136 (scalar_insert_exp): Add new overloaded builtin definition.
14138 2023-06-20 Li Xu <xuli1@eswincomputing.com>
14140 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
14141 size of vector mask mode to one rvv register.
14143 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14145 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
14147 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
14149 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
14152 2023-06-20 Richard Biener <rguenther@suse.de>
14154 * tree-ssa-dse.cc (dse_classify_store): When we found
14155 no defs and the basic-block with the original definition
14156 ends in __builtin_unreachable[_trap] the store is dead.
14158 2023-06-20 Richard Biener <rguenther@suse.de>
14160 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
14161 keep the virtual SSA form up-to-date.
14163 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14165 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
14166 New define_insn_and_split.
14168 2023-06-20 Tamar Christina <tamar.christina@arm.com>
14170 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
14172 2023-06-20 Jan Beulich <jbeulich@suse.com>
14174 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
14175 constraint. Add new AVX512F alternative.
14177 2023-06-20 Richard Biener <rguenther@suse.de>
14180 * dwarf2out.cc (process_scope_var): Continue processing
14181 the decl after setting a parent in case the existing DIE
14184 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
14186 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
14187 (riscv_arg_has_vector): Simplify.
14188 (riscv_pass_in_vector_p): Adjust warning message.
14190 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
14192 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
14193 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
14194 * config/riscv/riscv.md (riscv_frcsr): New patterns.
14195 (riscv_fscsr): Likewise.
14197 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
14199 PR rtl-optimization/110305
14200 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
14201 Handle HONOR_SNANS for x + 0.0.
14203 2023-06-19 Jan Hubicka <jh@suse.cz>
14205 PR tree-optimization/109811
14206 PR tree-optimization/109849
14207 * passes.def: Add phiprop to early optimization passes.
14208 * tree-ssa-phiprop.cc: Allow clonning.
14210 2023-06-19 Tamar Christina <tamar.christina@arm.com>
14212 * config/aarch64/aarch64.md (arches): Add nosimd.
14213 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
14216 2023-06-19 Tamar Christina <tamar.christina@arm.com>
14217 Omar Tahir <Omar.Tahir2@arm.com>
14219 * gensupport.cc (class conlist, add_constraints, add_attributes,
14220 skip_spaces, expect_char, preprocess_compact_syntax,
14221 parse_section_layout, parse_section, convert_syntax): New.
14222 (process_rtx): Check for conversion.
14223 * genoutput.cc (process_template): Check for unresolved iterators.
14224 (class data): Add compact_syntax_p.
14225 (gen_insn): Use it.
14226 * gensupport.h (compact_syntax): New.
14227 (hash-set.h): Include.
14228 * doc/md.texi: Document it.
14230 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
14232 * recog.h (check_asm_operands): Change return type from int to bool.
14233 (insn_invalid_p): Ditto.
14234 (verify_changes): Ditto.
14235 (apply_change_group): Ditto.
14236 (constrain_operands): Ditto.
14237 (constrain_operands_cached): Ditto.
14238 (validate_replace_rtx_subexp): Ditto.
14239 (validate_replace_rtx): Ditto.
14240 (validate_replace_rtx_part): Ditto.
14241 (validate_replace_rtx_part_nosimplify): Ditto.
14242 (added_clobbers_hard_reg_p): Ditto.
14243 (peep2_regno_dead_p): Ditto.
14244 (peep2_reg_dead_p): Ditto.
14245 (store_data_bypass_p): Ditto.
14246 (if_test_bypass_p): Ditto.
14247 * rtl.h (split_all_insns_noflow): Change
14248 return type from unsigned int to void.
14249 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
14250 of generated added_clobbers_hard_reg_p from int to bool and adjust
14251 function body accordingly. Change "used" variable type from
14253 * recog.cc (check_asm_operands): Change return type
14254 from int to bool and adjust function body accordingly.
14255 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
14256 (verify_changes): Change return type from int to bool.
14257 (apply_change_group): Change return type from int to bool
14258 and adjust function body accordingly.
14259 (validate_replace_rtx_subexp): Change return type from int to bool.
14260 (validate_replace_rtx): Ditto.
14261 (validate_replace_rtx_part): Ditto.
14262 (validate_replace_rtx_part_nosimplify): Ditto.
14263 (constrain_operands_cached): Ditto.
14264 (constrain_operands): Ditto. Change "lose" and "win"
14265 variables type from int to bool.
14266 (split_all_insns_noflow): Change return type from unsigned int
14267 to void and adjust function body accordingly.
14268 (peep2_regno_dead_p): Change return type from int to bool.
14269 (peep2_reg_dead_p): Ditto.
14270 (peep2_find_free_register): Change "success"
14271 variable type from int to bool
14272 (store_data_bypass_p_1): Change return type from int to bool.
14273 (store_data_bypass_p): Ditto.
14275 2023-06-19 Li Xu <xuli1@eswincomputing.com>
14277 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
14280 2023-06-19 Pan Li <pan2.li@intel.com>
14283 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
14285 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
14286 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
14287 VF_ZVE63 and VF_ZVE32.
14288 * config/riscv/vector.md
14289 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
14290 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
14291 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
14292 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
14293 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
14294 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
14295 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
14296 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
14297 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
14298 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
14300 2023-06-19 Pan Li <pan2.li@intel.com>
14303 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
14305 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
14306 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
14307 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
14308 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
14309 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
14310 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
14311 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
14312 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
14313 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
14314 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
14315 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
14316 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
14317 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
14318 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
14320 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14322 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
14323 (gcn_init_libfuncs): Add div and mod functions for all modes.
14324 Add placeholders for divmod functions.
14325 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
14327 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14329 * tree-vect-generic.cc: Include optabs-libfuncs.h.
14330 (get_compute_type): Check optab_libfunc.
14331 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
14332 (vectorizable_operation): Check optab_libfunc.
14334 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14336 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
14337 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
14338 (V_MOV, V_MOV_ALT): Likewise.
14339 (scalar_mode, SCALAR_MODE): Add TImode.
14340 (vnsi, VnSI, vndi, VnDI): Likewise.
14341 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
14342 (mov<mode>, mov<mode>_unspec): Use V_MOV.
14343 (*mov<mode>_4reg): New insn.
14344 (mov<mode>_exec): New 4reg variant.
14345 (mov<mode>_sgprbase): Likewise.
14346 (reload_in<mode>, reload_out<mode>): Use V_MOV.
14347 (vec_set<mode>): Likewise.
14348 (vec_duplicate<mode><exec>): New 4reg variant.
14349 (vec_extract<mode><scalar_mode>): Likewise.
14350 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
14351 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
14352 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
14353 (fold_extract_last_<mode>): Use V_MOV.
14354 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
14355 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
14356 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
14357 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
14358 gather<mode>_insn_2offsets<exec>): Use V_MOV.
14359 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
14360 scatter<mode>_insn_1offset<exec_scatter>,
14361 scatter<mode>_insn_1offset_ds<exec_scatter>,
14362 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
14363 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
14364 mask_scatter_store<mode><vnsi>): Likewise.
14365 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
14366 (gcn_hard_regno_mode_ok): Likewise.
14367 (GEN_VNM): Add TImode support.
14368 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
14369 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
14370 V8TImode, and V2TImode.
14371 (print_operand): Add 'J' and 'K' print codes.
14373 2023-06-19 Richard Biener <rguenther@suse.de>
14375 PR tree-optimization/110298
14376 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
14377 Clear number of iterations info before cleaning up the CFG.
14379 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14381 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
14382 Simplify vec_concat of lowpart subreg and high part vec_select.
14384 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
14386 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
14388 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
14390 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
14391 Handle null niters_skip.
14393 2023-06-19 Richard Biener <rguenther@suse.de>
14395 * config/aarch64/aarch64.cc
14396 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
14397 to LOOP_VINFO_MASKS.
14399 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
14402 * common/config/avr/avr-common.cc: Remove setting
14403 of OPT_fdelete_null_pointer_checks.
14404 * config/avr/avr.cc (avr_option_override): Clear
14405 flag_delete_null_pointer_checks if zero_address_valid.
14406 (avr_addr_space_zero_address_valid): New function.
14407 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
14410 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14411 Robin Dapp <rdapp.gcc@gmail.com>
14413 * doc/md.texi: Add len_mask{load,store}.
14414 * genopinit.cc (main): Ditto.
14416 * internal-fn.cc (len_maskload_direct): Ditto.
14417 (len_maskstore_direct): Ditto.
14418 (expand_call_mem_ref): Ditto.
14419 (expand_partial_load_optab_fn): Ditto.
14420 (expand_len_maskload_optab_fn): Ditto.
14421 (expand_partial_store_optab_fn): Ditto.
14422 (expand_len_maskstore_optab_fn): Ditto.
14423 (direct_len_maskload_optab_supported_p): Ditto.
14424 (direct_len_maskstore_optab_supported_p): Ditto.
14425 * internal-fn.def (LEN_MASK_LOAD): Ditto.
14426 (LEN_MASK_STORE): Ditto.
14427 * optabs.def (OPTAB_CD): Ditto.
14429 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14431 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
14433 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14435 * config/riscv/autovec.md (<optab><mode>3): Implement binop
14437 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
14438 (enum vxrm_field_enum): Rename this...
14439 (enum fixed_point_rounding_mode): ...to this.
14440 (enum frm_field_enum): Rename this...
14441 (enum floating_point_rounding_mode): ...to this.
14442 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
14443 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
14445 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
14446 (riscv_excess_precision): Do not convert to float for ZVFH.
14447 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
14449 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14451 * config/riscv/vector-iterators.md: Add VI_QH iterator.
14452 * config/riscv/autovec-opt.md
14453 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
14454 that includes sign extension.
14455 (@pred_extract_first_sextsi<mode>): Dito for SImode.
14457 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14459 * config/riscv/autovec.md (vec_set<mode>): Implement.
14460 (vec_extract<mode><vel>): Implement.
14461 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
14462 (emit_vlmax_slide_insn): Declare.
14463 (emit_nonvlmax_slide_tu_insn): Declare.
14464 (emit_scalar_move_insn): Export.
14465 (emit_nonvlmax_integer_move_insn): Export.
14466 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
14467 (emit_nonvlmax_slide_tu_insn): New function.
14468 (emit_vlmax_masked_mu_insn): No change.
14469 (emit_vlmax_integer_move_insn): Export.
14471 2023-06-19 Richard Biener <rguenther@suse.de>
14473 * tree-vectorizer.h (enum vect_partial_vector_style): New.
14474 (_loop_vec_info::partial_vector_style): Likewise.
14475 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
14476 (rgroup_controls::compare_type): Add.
14477 (vec_loop_masks): Change from a typedef to auto_vec<>
14479 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
14480 Adjust. Convert niters_skip to compare_type.
14481 (vect_set_loop_condition_partial_vectors_avx512): New function
14482 implementing the AVX512 partial vector codegen.
14483 (vect_set_loop_condition): Dispatch to the correct
14484 vect_set_loop_condition_partial_vectors_* function based on
14485 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
14486 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
14487 in the original niter type.
14488 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
14489 partial_vector_style.
14490 (can_produce_all_loop_masks_p): Adjust.
14491 (vect_verify_full_masking): Produce the rgroup_controls vector
14492 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
14493 (vect_verify_full_masking_avx512): New function implementing
14494 verification of AVX512 style masking.
14495 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
14496 (vect_analyze_loop_2): Also try AVX512 style masking.
14498 (vect_estimate_min_profitable_iters): Implement AVX512 style
14499 mask producing cost.
14500 (vect_record_loop_mask): Do not build the rgroup_controls
14501 vector here but record masks in a hash-set.
14502 (vect_get_loop_mask): Implement AVX512 style mask query,
14503 complementing the existing while_ult style.
14505 2023-06-19 Richard Biener <rguenther@suse.de>
14507 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
14509 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
14510 (vectorize_fold_left_reduction): Adjust.
14511 (vect_transform_reduction): Likewise.
14512 (vectorizable_live_operation): Likewise.
14513 * tree-vect-stmts.cc (vectorizable_call): Likewise.
14514 (vectorizable_operation): Likewise.
14515 (vectorizable_store): Likewise.
14516 (vectorizable_load): Likewise.
14517 (vectorizable_condition): Likewise.
14519 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
14522 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
14523 Add Optimization option property.
14525 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14527 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
14528 Add new pattern for the abovementioned case.
14530 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14532 * config/xtensa/xtensa.cc
14533 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
14535 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
14537 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
14539 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
14541 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
14543 2023-06-19 liuhongt <hongtao.liu@intel.com>
14546 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
14548 (sse2_packsswb<mask_name>): .. this, ..
14549 (avx2_packsswb<mask_name>): .. this and ..
14550 (avx512bw_packsswb<mask_name>): .. this.
14551 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
14552 (sse2_packssdw<mask_name>): .. this, ..
14553 (avx2_packssdw<mask_name>): .. this and ..
14554 (avx512bw_packssdw<mask_name>): .. this.
14556 2023-06-19 liuhongt <hongtao.liu@intel.com>
14559 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
14560 UNSPEC_US_TRUNCATE instead of original us_truncate for
14562 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
14564 (mmx_packsswb): .. this and ..
14565 (mmx_packuswb): .. this.
14566 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
14568 (s_trunsuffix): Removed code iterator.
14569 (any_s_truncate): Ditto.
14570 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
14571 UNSPEC_US_TRUNCATE instead of original us_truncate.
14572 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
14573 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
14575 2023-06-18 Pan Li <pan2.li@intel.com>
14577 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
14579 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
14581 * rtl.h (*rtx_equal_p_callback_function):
14582 Change return type from int to bool.
14583 (rtx_equal_p): Ditto.
14584 (*hash_rtx_callback_function): Ditto.
14585 * rtl.cc (rtx_equal_p): Change return type from int to bool
14586 and adjust function body accordingly.
14587 * early-remat.cc (scratch_equal): Ditto.
14588 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
14589 (hash_with_unspec_callback): Ditto.
14591 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
14593 * config/arc/arc.md (movqi_insn): Allow certain constants to
14594 be stored into memory in the pattern's condition.
14595 (movsf_insn): Similarly.
14597 2023-06-18 Honza <jh@ryzen3.suse.cz>
14599 PR tree-optimization/109849
14600 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
14601 ES; handle ipa_predicate::not_sra_candidate.
14602 (evaluate_properties_for_edge): Pass es to
14603 evaluate_conditions_for_known_args.
14604 (ipa_fn_summary_t::duplicate): Handle sra candidates.
14605 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
14606 (load_or_store_of_ptr_parameter): New function.
14607 (points_to_possible_sra_candidate_p): New function.
14608 (analyze_function_body): Initialize points_to_possible_sra_candidate;
14609 determine sra predicates.
14610 (estimate_ipcp_clone_size_and_time): Update call of
14611 evaluate_conditions_for_known_args.
14612 (remap_edge_params): Update points_to_possible_sra_candidate.
14613 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
14614 (write_ipa_call_summary): Likewise.
14615 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
14616 (dump_condition): Dump it.
14617 * ipa-predicate.h (struct inline_param_summary): Add
14618 points_to_possible_sra_candidate.
14620 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
14622 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
14623 function for setting the carry flag.
14624 (ix86_expand_builtin) <handlecarry>: Use it here.
14625 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
14626 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
14627 (usubc<mode>5): Likewise.
14629 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
14631 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
14632 for the immediate constant shift count.
14633 (*concat<mode><dwi>3_2): Likewise.
14634 (*concat<mode><dwi>3_3): Likewise.
14635 (*concat<mode><dwi>3_4): Likewise.
14636 (*concat<mode><dwi>3_5): Likewise.
14637 (*concat<mode><dwi>3_6): Likewise.
14639 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
14641 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
14642 (hash_rtx): Remove.
14643 * early-remat.cc (remat_candidate_hasher::equal): Update
14644 to call rtx_equal_p with rtx_equal_p_callback_function argument.
14645 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
14646 (rtx_equal_p): Remove.
14647 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
14648 argument with NULL default value.
14649 (rtx_equal_p_cb): Remove function declaration.
14650 (hash_rtx_cb): Ditto.
14651 (hash_rtx): Add hash_rtx_callback_function argument
14652 with NULL default value.
14653 * sel-sched-ir.cc (free_nop_pool): Update function comment.
14654 (skip_unspecs_callback): Ditto.
14655 (vinsn_init): Update to call hash_rtx with
14656 hash_rtx_callback_function argument.
14657 (vinsn_equal_p): Ditto.
14659 2023-06-18 yulong <shiyulong@iscas.ac.cn>
14661 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
14662 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
14663 (ADJUST_ALIGNMENT): Ditto.
14664 (RVV_TUPLE_PARTIAL_MODES): Ditto.
14665 (ADJUST_NUNITS): Ditto.
14666 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
14668 (vfloat16mf4x3_t): Ditto.
14669 (vfloat16mf4x4_t): Ditto.
14670 (vfloat16mf4x5_t): Ditto.
14671 (vfloat16mf4x6_t): Ditto.
14672 (vfloat16mf4x7_t): Ditto.
14673 (vfloat16mf4x8_t): Ditto.
14674 (vfloat16mf2x2_t): Ditto.
14675 (vfloat16mf2x3_t): Ditto.
14676 (vfloat16mf2x4_t): Ditto.
14677 (vfloat16mf2x5_t): Ditto.
14678 (vfloat16mf2x6_t): Ditto.
14679 (vfloat16mf2x7_t): Ditto.
14680 (vfloat16mf2x8_t): Ditto.
14681 (vfloat16m1x2_t): Ditto.
14682 (vfloat16m1x3_t): Ditto.
14683 (vfloat16m1x4_t): Ditto.
14684 (vfloat16m1x5_t): Ditto.
14685 (vfloat16m1x6_t): Ditto.
14686 (vfloat16m1x7_t): Ditto.
14687 (vfloat16m1x8_t): Ditto.
14688 (vfloat16m2x2_t): Ditto.
14689 (vfloat16m2x3_t): Ditto.
14690 (vfloat16m2x4_t): Ditto.
14691 (vfloat16m4x2_t): Ditto.
14692 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
14693 (vfloat16mf4x3_t): Ditto.
14694 (vfloat16mf4x4_t): Ditto.
14695 (vfloat16mf4x5_t): Ditto.
14696 (vfloat16mf4x6_t): Ditto.
14697 (vfloat16mf4x7_t): Ditto.
14698 (vfloat16mf4x8_t): Ditto.
14699 (vfloat16mf2x2_t): Ditto.
14700 (vfloat16mf2x3_t): Ditto.
14701 (vfloat16mf2x4_t): Ditto.
14702 (vfloat16mf2x5_t): Ditto.
14703 (vfloat16mf2x6_t): Ditto.
14704 (vfloat16mf2x7_t): Ditto.
14705 (vfloat16mf2x8_t): Ditto.
14706 (vfloat16m1x2_t): Ditto.
14707 (vfloat16m1x3_t): Ditto.
14708 (vfloat16m1x4_t): Ditto.
14709 (vfloat16m1x5_t): Ditto.
14710 (vfloat16m1x6_t): Ditto.
14711 (vfloat16m1x7_t): Ditto.
14712 (vfloat16m1x8_t): Ditto.
14713 (vfloat16m2x2_t): Ditto.
14714 (vfloat16m2x3_t): Ditto.
14715 (vfloat16m2x4_t): Ditto.
14716 (vfloat16m4x2_t): Ditto.
14717 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
14718 * config/riscv/riscv.md: New.
14719 * config/riscv/vector-iterators.md: New.
14721 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
14723 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
14724 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
14725 Generalize special case for converting TImode to V1TImode to handle
14726 all 128-bit vector conversions.
14728 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
14730 * gcc-ar.cc (main): Refactor to slightly reduce code
14731 duplication. Avoid unnecessary elements in nargv.
14733 2023-06-16 Pan Li <pan2.li@intel.com>
14736 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
14737 integer reduction expand.
14738 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
14739 and the LMUL1 attr respectively.
14740 * config/riscv/vector.md
14741 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
14742 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
14743 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
14744 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
14745 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
14746 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
14747 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
14749 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14752 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
14754 2023-06-16 Jakub Jelinek <jakub@redhat.com>
14756 PR middle-end/79173
14757 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
14758 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
14759 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
14761 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
14762 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
14763 * builtins.cc (fold_builtin_addc_subc): New function.
14764 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
14765 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
14767 2023-06-16 Jakub Jelinek <jakub@redhat.com>
14769 PR tree-optimization/110271
14770 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
14771 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
14772 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
14774 2023-06-16 Martin Jambor <mjambor@suse.cz>
14776 * configure: Regenerate.
14778 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
14779 Uros Bizjak <ubizjak@gmail.com>
14782 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
14783 define_insn_and_split combine *add<dwi>3_doubleword with
14784 a *concat<mode><dwi>3 for more efficient lowering after reload.
14786 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
14788 * ira-lives.cc: Include except.h.
14789 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
14790 when the pseudo does not live at the exception landing pad.
14792 2023-06-16 Alex Coplan <alex.coplan@arm.com>
14794 * doc/invoke.texi: Document -Welaborated-enum-base.
14796 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14798 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
14799 (ushrn2_n): ... This.
14800 (sqshrn2_n): Rename builtins to...
14801 (ssqshrn2_n): ... This.
14802 (uqshrn2_n): Rename builtins to...
14803 (uqushrn2_n): ... This.
14804 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
14805 (vqshrn_high_n_s32): Likewise.
14806 (vqshrn_high_n_s64): Likewise.
14807 (vqshrn_high_n_u16): Likewise.
14808 (vqshrn_high_n_u32): Likewise.
14809 (vqshrn_high_n_u64): Likewise.
14810 (vshrn_high_n_s16): Likewise.
14811 (vshrn_high_n_s32): Likewise.
14812 (vshrn_high_n_s64): Likewise.
14813 (vshrn_high_n_u16): Likewise.
14814 (vshrn_high_n_u32): Likewise.
14815 (vshrn_high_n_u64): Likewise.
14816 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
14818 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
14819 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
14820 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
14821 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
14822 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
14823 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
14824 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
14825 Update expander for the above.
14827 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14829 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
14830 (shrn2_n): ... This.
14831 (rshrn2): Rename builtins to...
14832 (rshrn2_n): ... This.
14833 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
14834 (vrshrn_high_n_s32): Likewise.
14835 (vrshrn_high_n_s64): Likewise.
14836 (vrshrn_high_n_u16): Likewise.
14837 (vrshrn_high_n_u32): Likewise.
14838 (vrshrn_high_n_u64): Likewise.
14839 (vshrn_high_n_s16): Likewise.
14840 (vshrn_high_n_s32): Likewise.
14841 (vshrn_high_n_s64): Likewise.
14842 (vshrn_high_n_u16): Likewise.
14843 (vshrn_high_n_u32): Likewise.
14844 (vshrn_high_n_u64): Likewise.
14845 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
14847 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
14848 (aarch64_shrn2<mode>_insn_le): Likewise.
14849 (aarch64_shrn2<mode>_insn_be): Likewise.
14850 (aarch64_shrn2<mode>): Likewise.
14851 (aarch64_rshrn2<mode>_insn_le): Likewise.
14852 (aarch64_rshrn2<mode>_insn_be): Likewise.
14853 (aarch64_rshrn2<mode>): Likewise.
14854 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
14855 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
14856 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
14857 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
14858 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
14859 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
14860 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
14861 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
14862 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
14863 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
14864 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
14865 (aarch64_sqshrun2_n<mode>): New define_expand.
14866 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
14867 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
14868 (aarch64_sqrshrun2_n<mode>): New define_expand.
14869 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
14870 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
14871 Delete unspec values.
14872 (VQSHRN_N): Delete int iterator.
14874 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14876 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
14877 * config/aarch64/aarch64-simd.md
14878 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
14879 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
14880 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
14881 * config/aarch64/iterators.md (shrn_s): New code attribute.
14883 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14885 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
14887 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
14888 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
14889 (aarch64_sqrshrun_n<mode>_insn): Likewise.
14890 (aarch64_sqshrun_n<mode>_insn): Likewise.
14891 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
14892 (aarch64_sqshrun_n<mode>): Likewise.
14893 (aarch64_sqrshrun_n<mode>): Likewise.
14894 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
14896 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14898 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
14899 (shrn_n): ... This.
14900 (rshrn): Rename builtins to...
14901 (rshrn_n): ... This.
14902 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
14903 (vshrn_n_s32): Likewise.
14904 (vshrn_n_s64): Likewise.
14905 (vshrn_n_u16): Likewise.
14906 (vshrn_n_u32): Likewise.
14907 (vshrn_n_u64): Likewise.
14908 (vrshrn_n_s16): Likewise.
14909 (vrshrn_n_s32): Likewise.
14910 (vrshrn_n_s64): Likewise.
14911 (vrshrn_n_u16): Likewise.
14912 (vrshrn_n_u32): Likewise.
14913 (vrshrn_n_u64): Likewise.
14914 * config/aarch64/aarch64-simd.md
14915 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
14916 (aarch64_shrn<mode>): Likewise.
14917 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
14918 (aarch64_rshrn<mode>): Likewise.
14919 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
14920 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
14921 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
14922 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
14923 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14924 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14925 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
14926 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
14927 (aarch64_sqshrun_n<mode>): Likewise.
14928 (aarch64_sqrshrun_n<mode>): Likewise.
14929 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
14930 (TRUNCEXTEND): New code attribute.
14931 (TRUNC_SHIFT): Likewise.
14932 (shrn_op): Likewise.
14933 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
14936 2023-06-16 Pan Li <pan2.li@intel.com>
14938 * config/riscv/riscv-vsetvl.cc
14939 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
14941 2023-06-16 Richard Biener <rguenther@suse.de>
14943 PR tree-optimization/110278
14944 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
14945 (x != (typeof x)(x == 0) -> true): Likewise.
14947 2023-06-16 Pali Rohár <pali@kernel.org>
14949 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
14950 (REAL_LIBGCC_SPEC): New define.
14951 * config/i386/mingw.opt: Add mcrtdll=
14952 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
14953 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
14954 (STARTFILE_SPEC): Adjust for -mcrtdll=.
14955 * doc/invoke.texi: Add mcrtdll= documentation.
14957 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
14959 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
14960 (mips_handle_code_readable_attr):New static function.
14961 (mips_get_code_readable_attr):New static enum function.
14962 (mips_set_current_function):Set the code_readable mode.
14963 (mips_option_override):Same as above.
14964 * doc/extend.texi:Document code_readable.
14966 2023-06-16 Richard Biener <rguenther@suse.de>
14968 PR tree-optimization/110269
14969 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
14970 with tree_expr_nonzero_p ...
14971 * match.pd (cmp (convert? addr@0) integer_zerop): With this
14974 2023-06-15 Marek Polacek <polacek@redhat.com>
14976 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
14977 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
14978 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
14979 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
14980 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
14982 * configure: Regenerate.
14983 * doc/install.texi: Document --enable-host-pie.
14985 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
14987 * regcprop.cc (maybe_mode_change): Enable stack pointer
14990 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
14992 PR tree-optimization/110266
14993 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
14995 (adjust_realpart_expr): Ditto.
14997 2023-06-15 Jan Beulich <jbeulich@suse.com>
14999 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
15002 2023-06-15 Jan Beulich <jbeulich@suse.com>
15004 * config/i386/constraints.md: Mention k and r for B.
15006 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
15007 Andrew Pinski <apinski@marvell.com>
15010 * config/loongarch/loongarch.md: Modify the register constraints for template
15011 "jumptable" and "indirect_jump" from "r" to "e".
15013 2023-06-15 Xi Ruoyao <xry111@xry111.site>
15015 * config/loongarch/loongarch-tune.h (loongarch_align): New
15017 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
15019 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
15021 * config/loongarch/loongarch.cc
15022 (loongarch_option_override_internal): Set the value of
15023 -falign-functions= if -falign-functions is enabled but no value
15024 is given. Likewise for -falign-labels=.
15026 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15028 PR middle-end/79173
15029 * internal-fn.def (UADDC, USUBC): New internal functions.
15030 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
15031 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
15032 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
15033 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
15034 match_uaddc_usubc): New functions.
15035 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
15036 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
15037 other optimizations have been successful for those.
15038 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
15039 * fold-const-call.cc (fold_const_call): Likewise.
15040 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
15041 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
15042 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
15044 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
15045 define_expand patterns.
15046 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
15047 into NOTE_INSN_DELETED note rather than nop instruction.
15048 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
15051 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15053 PR middle-end/79173
15054 * config/i386/i386.md (subborrow<mode>): Add alternative with
15055 memory destination and add for it define_peephole2
15056 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
15057 destination in these patterns.
15059 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15061 PR middle-end/79173
15062 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
15063 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
15064 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
15065 using memory destination in these patterns.
15067 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15069 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
15070 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
15071 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
15072 * fold-const-call.cc (fold_const_call): ... here.
15074 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15076 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
15077 Rename to <su>abd<mode>3.
15078 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
15081 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15083 * doc/md.texi (sabd, uabd): Document them.
15084 * internal-fn.def (ABD): Use new optab.
15085 * optabs.def (sabd_optab, uabd_optab): New optabs,
15086 * tree-vect-patterns.cc (vect_recog_absolute_difference):
15087 Recognize the following idiom abs (a - b).
15088 (vect_recog_sad_pattern): Refactor to use
15089 vect_recog_absolute_difference.
15090 (vect_recog_abd_pattern): Use patterns found by
15091 vect_recog_absolute_difference to build a new ABD
15094 2023-06-15 chenxiaolong <chenxl04200420@163.com>
15096 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
15097 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
15099 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15101 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
15102 (expand_vec_perm_const_1): Add merge optmization.
15104 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
15107 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
15108 (riscv_pass_by_reference): Return true for vector mode
15110 2023-06-15 Pan Li <pan2.li@intel.com>
15112 * config/riscv/autovec-opt.md: Align the predictor sytle.
15113 * config/riscv/autovec.md: Ditto.
15115 2023-06-15 Pan Li <pan2.li@intel.com>
15117 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
15118 Take elen instead of scalar BITS_PER_WORD.
15119 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
15120 instead of scaler BITS_PER_WORD.
15122 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15124 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
15126 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15128 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
15129 Fix signed comparison warning in loop from npats to enelts.
15131 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
15133 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
15134 to offloading compilation.
15135 * config/gcn/mkoffload.cc (main): Adjust.
15136 * config/nvptx/mkoffload.cc (main): Likewise.
15137 * doc/invoke.texi (foffload-options): Update example.
15139 2023-06-14 liuhongt <hongtao.liu@intel.com>
15142 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
15143 for alternative 2 since there's no evex version for vpcmpeqd
15146 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
15148 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
15150 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
15152 * config/sh/divtab.cc: Remove.
15154 2023-06-13 Jakub Jelinek <jakub@redhat.com>
15156 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
15157 superfluous spaces around \t for vpcmpeqd.
15159 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
15161 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
15162 clearing vectors with only a single element. Set CLEARED if the
15163 vector was initialized to zero.
15165 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
15167 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
15170 (TUPLE_ENTRY): Undef.
15172 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15174 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
15175 (shuffle_generic_patterns): Ditto.
15176 (expand_vec_perm_const_1): Ditto.
15178 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15180 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
15181 (shuffle_decompress_patterns): Ditto.
15183 2023-06-13 Richard Biener <rguenther@suse.de>
15185 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
15187 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
15188 Kito Cheng <kito.cheng@sifive.com>
15190 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
15191 warning flag if func is not builtin
15192 * config/riscv/riscv.cc
15193 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
15194 (riscv_arg_has_vector): Determine whether the arg is vector type.
15195 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
15196 (riscv_init_cumulative_args): The same as header.
15197 (riscv_get_arg_info): Add the checking.
15198 (riscv_function_value): Check the func return and set warning flag
15199 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
15200 determine whether warning psabi or not.
15202 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15204 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
15205 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
15206 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
15207 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
15209 (arm_output_load_tpidr): Define.
15210 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
15211 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
15213 (reload_tp_hard): Likewise.
15214 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
15216 * doc/invoke.texi (Arm Options, mtp): Document new values.
15218 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15221 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
15222 AARCH64_TPIDRRO_EL0 value.
15223 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
15224 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
15225 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
15226 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
15228 2023-06-13 Alexandre Oliva <oliva@adacore.com>
15230 * range-op-float.cc (frange_nextafter): Drop inline.
15231 (frelop_early_resolve): Add static.
15232 (frange_float): Likewise.
15234 2023-06-13 Richard Biener <rguenther@suse.de>
15236 PR middle-end/110232
15237 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
15238 to check whether the buffer covers the whole vector.
15240 2023-06-13 Richard Biener <rguenther@suse.de>
15242 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
15243 .MASK_LOAD and friends set the size of the access to unknown.
15245 2023-06-13 Tejas Belagod <tbelagod@arm.com>
15248 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
15249 calls that have a constant input predicate vector.
15250 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
15251 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
15252 (svlast_impl::vect_all_same): Check if all vector elements are equal.
15254 2023-06-13 Andi Kleen <ak@linux.intel.com>
15256 * config/i386/gcc-auto-profile: Regenerate.
15258 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15260 * config/riscv/vector-iterators.md: Fix requirement.
15262 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15264 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
15265 (shuffle_decompress_patterns): New function.
15266 (expand_vec_perm_const_1): Add decompress optimization.
15268 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
15270 PR rtl-optimization/101188
15271 * postreload.cc (reload_cse_move2add_invalidate): New function,
15273 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
15275 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15277 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
15278 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
15279 and if maxv == 1, use constant element for duplicating into register.
15281 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
15283 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
15284 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
15285 (gimplify_adjust_omp_clauses): Change
15286 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
15287 GOMP_MAP_FORCE_PRESENT.
15288 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
15289 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
15290 to/from clauses with present modifier.
15292 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15294 PR tree-optimization/110205
15295 * range-op-float.cc (range_operator::fold_range): Add default FII
15297 * range-op-mixed.h (class operator_gt): Add missing final overrides.
15298 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
15299 (operator_lshift ::update_bitmask): Add final override.
15300 (operator_rshift ::update_bitmask): Add final override.
15301 * range-op.h (range_operator::fold_range): Add FII prototype.
15303 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15305 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
15306 Use range_op_handler directly.
15307 * range-op.cc (range_op_handler::range_op_handler): Unsigned
15308 param instead of tree-code.
15309 (ptr_op_widen_plus_signed): Delete.
15310 (ptr_op_widen_plus_unsigned): Delete.
15311 (ptr_op_widen_mult_signed): Delete.
15312 (ptr_op_widen_mult_unsigned): Delete.
15313 (range_op_table::initialize_integral_ops): Add new opcodes.
15314 * range-op.h (range_op_handler): Use unsigned.
15315 (OP_WIDEN_MULT_SIGNED): New.
15316 (OP_WIDEN_MULT_UNSIGNED): New.
15317 (OP_WIDEN_PLUS_SIGNED): New.
15318 (OP_WIDEN_PLUS_UNSIGNED): New.
15319 (RANGE_OP_TABLE_SIZE): New.
15320 (range_op_table::operator []): Use unsigned.
15321 (range_op_table::set): Use unsigned.
15322 (m_range_tree): Make unsigned.
15323 (ptr_op_widen_mult_signed): Remove.
15324 (ptr_op_widen_mult_unsigned): Remove.
15325 (ptr_op_widen_plus_signed): Remove.
15326 (ptr_op_widen_plus_unsigned): Remove.
15328 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15330 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
15331 manually as there is no access to the default operator.
15332 (cfn_copysign::fold_range): Don't check for validity.
15333 (cfn_ubsan::fold_range): Ditto.
15334 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
15335 * range-op.cc (default_operator): New.
15336 (range_op_handler::range_op_handler): Use default_operator
15338 (range_op_handler::operator bool): Move from header, compare
15339 against default operator.
15340 (range_op_handler::range_op): New.
15341 * range-op.h (range_op_handler::operator bool): Move.
15343 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15345 * range-op.cc (unified_table): Delete.
15346 (range_op_table operator_table): Instantiate.
15347 (range_op_table::range_op_table): Rename from unified_table.
15348 (range_op_handler::range_op_handler): Use range_op_table.
15349 * range-op.h (range_op_table::operator []): Inline.
15350 (range_op_table::set): Inline.
15352 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15354 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
15356 * gimple-range-op.cc (get_code): Rename from get_code_and_type
15358 (gimple_range_op_handler::supported_p): No need for type.
15359 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
15360 (cfn_copysign::fold_range): Ditto.
15361 (cfn_ubsan::fold_range): Ditto.
15362 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
15363 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
15364 * range-op-float.cc (operator_plus::op1_range): Ditto.
15365 (operator_mult::op1_range): Ditto.
15366 (range_op_float_tests): Ditto.
15367 * range-op.cc (get_op_handler): Remove.
15368 (range_op_handler::set_op_handler): Remove.
15369 (operator_plus::op1_range): No need for type.
15370 (operator_minus::op1_range): Ditto.
15371 (operator_mult::op1_range): Ditto.
15372 (operator_exact_divide::op1_range): Ditto.
15373 (operator_cast::op1_range): Ditto.
15374 (perator_bitwise_not::fold_range): Ditto.
15375 (operator_negate::fold_range): Ditto.
15376 * range-op.h (range_op_handler::range_op_handler): Remove type param.
15377 (range_cast): No need for type.
15378 (range_op_table::operator[]): Check for enum_code >= 0.
15379 * tree-data-ref.cc (compute_distributive_range): No need for type.
15380 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
15381 * value-query.cc (range_query::get_tree_range): Ditto.
15382 * value-relation.cc (relation_oracle::validate_relation): Ditto.
15383 * vr-values.cc (range_of_var_in_loop): Ditto.
15384 (simplify_using_ranges::fold_cond_with_ops): Ditto.
15386 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15388 * range-op-mixed.h (operator_max): Remove final.
15389 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
15390 (pointer_table::pointer_table): Remove.
15391 (class hybrid_max_operator): New.
15392 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
15393 * range-op.cc (pointer_tree_table): Remove.
15394 (unified_table::unified_table): Comment out MAX_EXPR.
15395 (get_op_handler): Remove check of pointer table.
15396 * range-op.h (class pointer_table): Remove.
15398 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15400 * range-op-mixed.h (operator_min): Remove final.
15401 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
15402 (class hybrid_min_operator): New.
15403 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
15404 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
15406 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15408 * range-op-mixed.h (operator_bitwise_or): Remove final.
15409 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
15410 (class hybrid_or_operator): New.
15411 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
15412 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
15414 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15416 * range-op-mixed.h (operator_bitwise_and): Remove final.
15417 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
15418 (class hybrid_and_operator): New.
15419 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
15420 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
15422 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15424 * Makefile.in (OBJS): Add range-op-ptr.o.
15425 * range-op-mixed.h (update_known_bitmask): Move prototype here.
15426 (minus_op1_op2_relation_effect): Move prototype here.
15427 (wi_includes_zero_p): Move function to here.
15428 (wi_zero_p): Ditto.
15429 * range-op.cc (update_known_bitmask): Remove static.
15430 (wi_includes_zero_p): Move to header.
15431 (wi_zero_p): Move to header.
15432 (minus_op1_op2_relation_effect): Remove static.
15433 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
15434 (pointer_plus_operator): Ditto.
15435 (pointer_min_max_operator): Ditto.
15436 (pointer_and_operator): Ditto.
15437 (pointer_or_operator): Ditto.
15438 (pointer_table): Ditto.
15439 (range_op_table::initialize_pointer_ops): Ditto.
15440 * range-op-ptr.cc: New.
15442 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15444 * range-op-mixed.h (class operator_max): Move from...
15445 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
15446 (get_op_handler): Remove the integral table.
15447 (class operator_max): Move from here.
15448 (integral_table::integral_table): Delete.
15449 * range-op.h (class integral_table): Delete.
15451 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15453 * range-op-mixed.h (class operator_min): Move from...
15454 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
15455 (class operator_min): Move from here.
15456 (integral_table::integral_table): Remove MIN_EXPR.
15458 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15460 * range-op-mixed.h (class operator_bitwise_or): Move from...
15461 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
15462 (class operator_bitwise_or): Move from here.
15463 (integral_table::integral_table): Remove BIT_IOR_EXPR.
15465 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15467 * range-op-mixed.h (class operator_bitwise_and): Move from...
15468 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
15469 (get_op_handler): Check for a pointer table entry first.
15470 (class operator_bitwise_and): Move from here.
15471 (integral_table::integral_table): Remove BIT_AND_EXPR.
15473 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15475 * range-op-mixed.h (class operator_bitwise_xor): Move from...
15476 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
15477 (class operator_bitwise_xor): Move from here.
15478 (integral_table::integral_table): Remove BIT_XOR_EXPR.
15479 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
15481 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15483 * range-op-mixed.h (class operator_bitwise_not): Move from...
15484 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
15485 (class operator_bitwise_not): Move from here.
15486 (integral_table::integral_table): Remove BIT_NOT_EXPR.
15487 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
15489 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15491 * range-op-mixed.h (class operator_addr_expr): Move from...
15492 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
15493 (class operator_addr_expr): Move from here.
15494 (integral_table::integral_table): Remove ADDR_EXPR.
15495 (pointer_table::pointer_table): Remove ADDR_EXPR.
15497 2023-06-12 Pan Li <pan2.li@intel.com>
15499 * config/riscv/riscv-vector-builtins-types.def
15500 (vfloat16m1_t): Add type to lmul1 ops.
15501 (vfloat16m2_t): Likewise.
15502 (vfloat16m4_t): Likewise.
15504 2023-06-12 Richard Biener <rguenther@suse.de>
15506 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
15507 .MASK_STORE and friend set the size of the access to
15510 2023-06-12 Tamar Christina <tamar.christina@arm.com>
15512 * config.in: Regenerate.
15513 * configure: Regenerate.
15514 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
15516 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15518 * config/riscv/autovec-opt.md
15519 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
15520 (*<any_shiftrt:optab>trunc<mode>): Ditto.
15521 * config/riscv/autovec.md (<optab><mode>3): Change to
15522 define_insn_and_split.
15523 (v<optab><mode>3): Ditto.
15524 (trunc<mode><v_double_trunc>2): Ditto.
15526 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15528 * simplify-rtx.cc (simplify_const_unary_operation):
15529 Handle US_TRUNCATE, SS_TRUNCATE.
15531 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
15534 * doc/gm2.texi (Standard procedures): Fix Next link.
15536 2023-06-12 Tamar Christina <tamar.christina@arm.com>
15538 * config.in: Regenerate.
15540 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
15542 PR middle-end/110142
15543 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
15544 subtype to vect_widened_op_tree and remove subtype parameter, also
15545 remove superfluous overloaded function definition.
15546 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
15547 to call to vect_recog_widen_op_pattern.
15548 (vect_recog_widen_minus_pattern): Likewise.
15550 2023-06-12 liuhongt <hongtao.liu@intel.com>
15552 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
15553 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
15554 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
15555 (vec_unpacks_lo_<mode>): Ditto.
15556 (vec_unpacks_hi_<mode>): Ditto.
15557 (sse_movlhps_<mode>): New define_insn.
15558 (ssse3_palignr<mode>_perm): Extend to V_128H.
15559 (V_128H): New mode iterator.
15560 (ssepackPHmode): New mode attribute.
15561 (vunpck_extract_mode): Ditto.
15562 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
15563 (vpckfloat_temp_mode): Ditto.
15564 (vpckfloat_op_mode): Ditto.
15565 (vunpckfixt_mode): Extend to VxHF.
15566 (vunpckfixt_model): Ditto.
15567 (vunpckfixt_extract_mode): Ditto.
15569 2023-06-12 Richard Biener <rguenther@suse.de>
15571 PR middle-end/110200
15572 * genmatch.cc (expr::gen_transform): Put braces around
15573 the if arm for the (convert ...) short-cut.
15575 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
15578 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
15579 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
15581 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
15584 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
15585 floating constant itself for real_to_target call.
15587 2023-06-12 Pan Li <pan2.li@intel.com>
15589 * config/riscv/riscv-vector-builtins-types.def
15590 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
15591 (vfloat16mf2_t): Ditto.
15592 (vfloat16m1_t): Ditto.
15593 (vfloat16m2_t): Ditto.
15594 (vfloat16m4_t): Ditto.
15596 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
15598 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
15599 Do not require a stack frame when debugging is enabled for AIX.
15601 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
15603 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
15604 Remove attribute values.
15605 (insv_notbit): New post-reload insn.
15606 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
15607 (*insv.not-bit.0_split, *insv.not-bit.7_split)
15608 (*insv.xor-extract_split): Split to insv_notbit.
15609 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
15610 (*insv.xor-extract): Remove post-reload insns.
15611 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
15612 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
15613 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
15614 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
15616 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
15619 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
15620 (MSB, SIZE): New mode attributes.
15621 (any_shift): New code iterator.
15622 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
15623 (*lshr<mode>3_const_split): Add constraint alternative for
15624 the case of shift-offset = MSB. Ditch "length" attribute.
15625 (extzv<mode): New. replaces extzv. Adjust following patterns.
15626 Use avr_out_extr, avr_out_extr_not to print asm.
15627 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
15628 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
15629 * config/avr/constraints.md (C15, C23, C31, Yil): New
15630 * config/avr/predicates.md (reg_or_low_io_operand)
15631 (const7_operand, reg_or_low_io_operand)
15632 (const15_operand, const_0_to_15_operand)
15633 (const23_operand, const_0_to_23_operand)
15634 (const31_operand, const_0_to_31_operand): New.
15635 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
15636 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
15637 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
15638 MSB case to new insn constraint "r" for operands[1].
15639 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
15640 Handle these cases.
15641 (avr_rtx_costs_1): Adjust cost for a new pattern.
15643 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15645 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
15646 (vector_insn_info::parse_insn): Add rtx_insn parse.
15647 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
15648 (get_first_vsetvl): New function.
15649 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
15650 (pass_vsetvl::cleanup_insns): Remove it.
15651 (pass_vsetvl::ssa_post_optimization): New function.
15652 (has_no_uses): Ditto.
15653 (pass_vsetvl::propagate_avl): Remove it.
15654 (pass_vsetvl::df_post_optimization): New function.
15655 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
15656 * config/riscv/riscv-vsetvl.h: Adapt declaration.
15658 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
15660 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
15661 (ipcp_vr_lattice::print): Call dump method.
15662 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
15664 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
15665 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
15667 (initialize_node_lattices): Pass type when appropriate.
15668 (ipa_vr_operation_and_type_effects): Make type agnostic.
15669 (ipa_value_range_from_jfunc): Same.
15670 (propagate_vr_across_jump_function): Same.
15671 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
15672 (evaluate_properties_for_edge): Same.
15673 * ipa-prop.cc (ipa_vr::get_vrange): Same.
15674 (ipcp_update_vr): Same.
15675 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
15676 (ipa_range_set_and_normalize): Same.
15678 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
15682 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
15683 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
15684 (avr_pass_data_ifelse): New pass_data for it.
15685 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
15686 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
15687 (avr_out_cmp_ext): New functions.
15688 (compare_condtition): Make sure REG_CC dies in the branch insn.
15689 (avr_rtx_costs_1): Add computation of cbranch costs.
15690 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
15691 [ADJUST_LEN_CMP_SEXT]Handle them.
15692 (TARGET_CANONICALIZE_COMPARISON): New define.
15693 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
15694 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
15695 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
15696 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
15697 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
15698 (avr_out_cmp_zext): New Protos
15699 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
15700 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
15701 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
15702 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
15703 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
15704 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
15705 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
15706 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
15707 (adjust_len) [add_set_ZN, cmp_zext]: New.
15708 (QIPSI): New mode iterator.
15709 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
15710 (gelt): New code iterator.
15711 (gelt_eqne): New code attribute.
15712 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
15713 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
15714 (*cmpqi_sign_extend): Remove insns.
15715 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
15716 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
15717 * config/avr/predicates.md (scratch_or_d_register_operand): New.
15718 * config/avr/constraints.md (Yxx): New constraint.
15720 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15722 * config/riscv/autovec.md (select_vl<mode>): New pattern.
15723 * config/riscv/riscv-protos.h (expand_select_vl): New function.
15724 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
15726 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15728 * range-op-float.cc (foperator_mult_div_base): Delete.
15729 (foperator_mult_div_base::find_range): Make static local function.
15730 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
15731 (operator_mult::op1_range): Rename from foperator_mult.
15732 (operator_mult::op2_range): Ditto.
15733 (operator_mult::rv_fold): Ditto.
15734 (float_table::float_table): Remove MULT_EXPR.
15735 (class foperator_div): Inherit from range_operator.
15736 (float_table::float_table): Delete.
15737 * range-op-mixed.h (class operator_mult): Combined from integer
15739 * range-op.cc (float_tree_table): Delete.
15740 (op_mult): New object.
15741 (unified_table::unified_table): Add MULT_EXPR.
15742 (get_op_handler): Do not check float table any longer.
15743 (class cross_product_operator): Move to range-op-mixed.h.
15744 (class operator_mult): Move to range-op-mixed.h.
15745 (integral_table::integral_table): Remove MULT_EXPR.
15746 (pointer_table::pointer_table): Remove MULT_EXPR.
15747 * range-op.h (float_table): Remove.
15749 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15751 * range-op-float.cc (foperator_negate): Remove. Move prototypes
15752 to range-op-mixed.h
15753 (operator_negate::fold_range): Rename from foperator_negate.
15754 (operator_negate::op1_range): Ditto.
15755 (float_table::float_table): Remove NEGATE_EXPR.
15756 * range-op-mixed.h (class operator_negate): Combined from integer
15758 * range-op.cc (op_negate): New object.
15759 (unified_table::unified_table): Add NEGATE_EXPR.
15760 (class operator_negate): Move to range-op-mixed.h.
15761 (integral_table::integral_table): Remove NEGATE_EXPR.
15762 (pointer_table::pointer_table): Remove NEGATE_EXPR.
15764 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15766 * range-op-float.cc (foperator_minus): Remove. Move prototypes
15767 to range-op-mixed.h
15768 (operator_minus::fold_range): Rename from foperator_minus.
15769 (operator_minus::op1_range): Ditto.
15770 (operator_minus::op2_range): Ditto.
15771 (operator_minus::rv_fold): Ditto.
15772 (float_table::float_table): Remove MINUS_EXPR.
15773 * range-op-mixed.h (class operator_minus): Combined from integer
15775 * range-op.cc (op_minus): New object.
15776 (unified_table::unified_table): Add MINUS_EXPR.
15777 (class operator_minus): Move to range-op-mixed.h.
15778 (integral_table::integral_table): Remove MINUS_EXPR.
15779 (pointer_table::pointer_table): Remove MINUS_EXPR.
15781 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15783 * range-op-float.cc (foperator_abs): Remove. Move prototypes
15784 to range-op-mixed.h
15785 (operator_abs::fold_range): Rename from foperator_abs.
15786 (operator_abs::op1_range): Ditto.
15787 (float_table::float_table): Remove ABS_EXPR.
15788 * range-op-mixed.h (class operator_abs): Combined from integer
15790 * range-op.cc (op_abs): New object.
15791 (unified_table::unified_table): Add ABS_EXPR.
15792 (class operator_abs): Move to range-op-mixed.h.
15793 (integral_table::integral_table): Remove ABS_EXPR.
15794 (pointer_table::pointer_table): Remove ABS_EXPR.
15796 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15798 * range-op-float.cc (foperator_plus): Remove. Move prototypes
15799 to range-op-mixed.h
15800 (operator_plus::fold_range): Rename from foperator_plus.
15801 (operator_plus::op1_range): Ditto.
15802 (operator_plus::op2_range): Ditto.
15803 (operator_plus::rv_fold): Ditto.
15804 (float_table::float_table): Remove PLUS_EXPR.
15805 * range-op-mixed.h (class operator_plus): Combined from integer
15807 * range-op.cc (op_plus): New object.
15808 (unified_table::unified_table): Add PLUS_EXPR.
15809 (class operator_plus): Move to range-op-mixed.h.
15810 (integral_table::integral_table): Remove PLUS_EXPR.
15811 (pointer_table::pointer_table): Remove PLUS_EXPR.
15813 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15815 * range-op-mixed.h (class operator_cast): Combined from integer
15817 * range-op.cc (op_cast): New object.
15818 (unified_table::unified_table): Add op_cast
15819 (class operator_cast): Move to range-op-mixed.h.
15820 (integral_table::integral_table): Remove op_cast
15821 (pointer_table::pointer_table): Remove op_cast.
15823 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15825 * range-op-float.cc (operator_cst::fold_range): New.
15826 * range-op-mixed.h (class operator_cst): Move from integer file.
15827 * range-op.cc (op_cst): New object.
15828 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
15829 (class operator_cst): Move to range-op-mixed.h.
15830 (integral_table::integral_table): Remove op_cst.
15831 (pointer_table::pointer_table): Remove op_cst.
15833 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15835 * range-op-float.cc (foperator_identity): Remove. Move prototypes
15836 to range-op-mixed.h
15837 (operator_identity::fold_range): Rename from foperator_identity.
15838 (operator_identity::op1_range): Ditto.
15839 (float_table::float_table): Remove fop_identity.
15840 * range-op-mixed.h (class operator_identity): Combined from integer
15842 * range-op.cc (op_identity): New object.
15843 (unified_table::unified_table): Add op_identity.
15844 (class operator_identity): Move to range-op-mixed.h.
15845 (integral_table::integral_table): Remove identity.
15846 (pointer_table::pointer_table): Remove identity.
15848 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15850 * range-op-float.cc (foperator_ge): Remove. Move prototypes
15851 to range-op-mixed.h
15852 (operator_ge::fold_range): Rename from foperator_ge.
15853 (operator_ge::op1_range): Ditto.
15854 (float_table::float_table): Remove GE_EXPR.
15855 * range-op-mixed.h (class operator_ge): Combined from integer
15857 * range-op.cc (op_ge): New object.
15858 (unified_table::unified_table): Add GE_EXPR.
15859 (class operator_ge): Move to range-op-mixed.h.
15860 (ge_op1_op2_relation): Fold into
15861 operator_ge::op1_op2_relation.
15862 (integral_table::integral_table): Remove GE_EXPR.
15863 (pointer_table::pointer_table): Remove GE_EXPR.
15864 * range-op.h (ge_op1_op2_relation): Delete.
15866 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15868 * range-op-float.cc (foperator_gt): Remove. Move prototypes
15869 to range-op-mixed.h
15870 (operator_gt::fold_range): Rename from foperator_gt.
15871 (operator_gt::op1_range): Ditto.
15872 (float_table::float_table): Remove GT_EXPR.
15873 * range-op-mixed.h (class operator_gt): Combined from integer
15875 * range-op.cc (op_gt): New object.
15876 (unified_table::unified_table): Add GT_EXPR.
15877 (class operator_gt): Move to range-op-mixed.h.
15878 (gt_op1_op2_relation): Fold into
15879 operator_gt::op1_op2_relation.
15880 (integral_table::integral_table): Remove GT_EXPR.
15881 (pointer_table::pointer_table): Remove GT_EXPR.
15882 * range-op.h (gt_op1_op2_relation): Delete.
15884 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15886 * range-op-float.cc (foperator_le): Remove. Move prototypes
15887 to range-op-mixed.h
15888 (operator_le::fold_range): Rename from foperator_le.
15889 (operator_le::op1_range): Ditto.
15890 (float_table::float_table): Remove LE_EXPR.
15891 * range-op-mixed.h (class operator_le): Combined from integer
15893 * range-op.cc (op_le): New object.
15894 (unified_table::unified_table): Add LE_EXPR.
15895 (class operator_le): Move to range-op-mixed.h.
15896 (le_op1_op2_relation): Fold into
15897 operator_le::op1_op2_relation.
15898 (integral_table::integral_table): Remove LE_EXPR.
15899 (pointer_table::pointer_table): Remove LE_EXPR.
15900 * range-op.h (le_op1_op2_relation): Delete.
15902 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15904 * range-op-float.cc (foperator_lt): Remove. Move prototypes
15905 to range-op-mixed.h
15906 (operator_lt::fold_range): Rename from foperator_lt.
15907 (operator_lt::op1_range): Ditto.
15908 (float_table::float_table): Remove LT_EXPR.
15909 * range-op-mixed.h (class operator_lt): Combined from integer
15911 * range-op.cc (op_lt): New object.
15912 (unified_table::unified_table): Add LT_EXPR.
15913 (class operator_lt): Move to range-op-mixed.h.
15914 (lt_op1_op2_relation): Fold into
15915 operator_lt::op1_op2_relation.
15916 (integral_table::integral_table): Remove LT_EXPR.
15917 (pointer_table::pointer_table): Remove LT_EXPR.
15918 * range-op.h (lt_op1_op2_relation): Delete.
15920 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15922 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
15923 to range-op-mixed.h
15924 (operator_equal::fold_range): Rename from foperator_not_equal.
15925 (operator_equal::op1_range): Ditto.
15926 (float_table::float_table): Remove NE_EXPR.
15927 * range-op-mixed.h (class operator_not_equal): Combined from integer
15929 * range-op.cc (op_equal): New object.
15930 (unified_table::unified_table): Add NE_EXPR.
15931 (class operator_not_equal): Move to range-op-mixed.h.
15932 (not_equal_op1_op2_relation): Fold into
15933 operator_not_equal::op1_op2_relation.
15934 (integral_table::integral_table): Remove NE_EXPR.
15935 (pointer_table::pointer_table): Remove NE_EXPR.
15936 * range-op.h (not_equal_op1_op2_relation): Delete.
15938 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15940 * range-op-float.cc (foperator_equal): Remove. Move prototypes
15941 to range-op-mixed.h
15942 (operator_equal::fold_range): Rename from foperator_equal.
15943 (operator_equal::op1_range): Ditto.
15944 (float_table::float_table): Remove EQ_EXPR.
15945 * range-op-mixed.h (class operator_equal): Combined from integer
15947 * range-op.cc (op_equal): New object.
15948 (unified_table::unified_table): Add EQ_EXPR.
15949 (class operator_equal): Move to range-op-mixed.h.
15950 (equal_op1_op2_relation): Fold into
15951 operator_equal::op1_op2_relation.
15952 (integral_table::integral_table): Remove EQ_EXPR.
15953 (pointer_table::pointer_table): Remove EQ_EXPR.
15954 * range-op.h (equal_op1_op2_relation): Delete.
15956 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15958 * range-op-float.cc (class float_table): Move to header.
15959 (float_table::float_table): Move float only operators to...
15960 (range_op_table::initialize_float_ops): Here.
15961 * range-op-mixed.h: New.
15962 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
15964 (float_tree_table): Moved from range-op-float.cc.
15965 (unified_tree_table): New.
15966 (unified_table::unified_table): New. Call initialize routines.
15967 (get_op_handler): Check unified table first.
15968 (range_op_handler::range_op_handler): Handle no type constructor.
15969 (integral_table::integral_table): Move integral only operators to...
15970 (range_op_table::initialize_integral_ops): Here.
15971 (pointer_table::pointer_table): Move pointer only operators to...
15972 (range_op_table::initialize_pointer_ops): Here.
15973 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
15974 (get_bool_state): Ditto.
15975 (empty_range_varying): Ditto.
15976 (relop_early_resolve): Ditto.
15977 (class range_op_table): Add new init methods for range types.
15978 (class integral_table): Move declaration to here.
15979 (class pointer_table): Move declaration to here.
15980 (class float_table): Move declaration to here.
15982 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15983 Richard Sandiford <richard.sandiford@arm.com>
15984 Richard Biener <rguenther@suse.de>
15986 * doc/md.texi: Add SELECT_VL support.
15987 * internal-fn.def (SELECT_VL): Ditto.
15988 * optabs.def (OPTAB_D): Ditto.
15989 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
15990 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
15991 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
15992 (vectorizable_store): Ditto.
15993 (vectorizable_load): Ditto.
15994 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
15996 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
15999 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
16002 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
16004 * range-op.cc (range_cast): Move to...
16005 * range-op.h (range_cast): Here and add generic a version.
16007 2023-06-09 Marek Polacek <polacek@redhat.com>
16011 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
16012 warn about designated initializers in C only.
16014 2023-06-09 Andrew Pinski <apinski@marvell.com>
16016 PR tree-optimization/97711
16017 PR tree-optimization/110155
16018 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
16019 ((zero_one != 0) ? z <op> y : y): Likewise.
16021 2023-06-09 Andrew Pinski <apinski@marvell.com>
16023 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
16024 multiply rather than negation/bit_and.
16026 2023-06-09 Andrew Pinski <apinski@marvell.com>
16028 * match.pd (`X & -Y -> X * Y`): Allow for truncation
16029 and the same type for unsigned types.
16031 2023-06-09 Andrew Pinski <apinski@marvell.com>
16033 PR tree-optimization/110165
16034 PR tree-optimization/110166
16035 * match.pd (zero_one_valued_p): Don't accept
16036 signed 1-bit integers.
16038 2023-06-09 Richard Biener <rguenther@suse.de>
16040 * match.pd (two conversions in a row): Use element_precision
16041 to DTRT for VECTOR_TYPE.
16043 2023-06-09 Pan Li <pan2.li@intel.com>
16045 * config/riscv/riscv.md (enabled): Move to another place, and
16046 add fp_vector_disabled to the cond.
16047 (fp_vector_disabled): New attr defined for disabling fp.
16048 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
16050 2023-06-09 Pan Li <pan2.li@intel.com>
16052 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
16055 2023-06-09 liuhongt <hongtao.liu@intel.com>
16058 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
16059 view_convert_expr mask to signed type when folding pblendvb
16062 2023-06-09 liuhongt <hongtao.liu@intel.com>
16065 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
16066 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
16067 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
16069 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
16070 real codename for __builtin_ia32_pabs{b,w,d}.
16072 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16074 * gimple-range-op.cc
16075 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
16076 (gimple_range_op_handler::maybe_builtin_call): Adjust.
16077 * gimple-range-op.h (operand1, operand2): Use m_operator.
16078 * range-op.cc (integral_table, pointer_table): Relocate.
16079 (get_op_handler): Rename from get_handler and handle all types.
16080 (range_op_handler::range_op_handler): Relocate.
16081 (range_op_handler::set_op_handler): Relocate and adjust.
16082 (range_op_handler::range_op_handler): Relocate.
16083 (dispatch_trio): New.
16084 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
16085 (range_op_handler::dispatch_kind): New.
16086 (range_op_handler::fold_range): Relocate and Use new dispatch value.
16087 (range_op_handler::op1_range): Ditto.
16088 (range_op_handler::op2_range): Ditto.
16089 (range_op_handler::lhs_op1_relation): Ditto.
16090 (range_op_handler::lhs_op2_relation): Ditto.
16091 (range_op_handler::op1_op2_relation): Ditto.
16092 (range_op_handler::set_op_handler): Use m_operator member.
16093 * range-op.h (range_op_handler::operator bool): Use m_operator.
16094 (range_op_handler::dispatch_kind): New.
16095 (range_op_handler::m_valid): Delete.
16096 (range_op_handler::m_int): Delete
16097 (range_op_handler::m_float): Delete
16098 (range_op_handler::m_operator): New.
16099 (range_op_table::operator[]): Relocate from .cc file.
16100 (range_op_table::set): Ditto.
16101 * value-range.h (class vrange): Make range_op_handler a friend.
16103 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16105 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
16106 (cfn_pass_through_arg1): Adjust using statemenmt.
16107 (cfn_signbit): Change base class, adjust using statement.
16108 (cfn_copysign): Ditto.
16110 (cfn_sincos): Ditto.
16111 * range-op-float.cc (fold_range): Change class to range_operator.
16115 (lhs_op1_relation): Ditto.
16116 (lhs_op2_relation): Ditto.
16117 (op1_op2_relation): Ditto.
16118 (foperator_*): Ditto.
16119 (class float_table): New. Inherit from range_op_table.
16120 (floating_tree_table) Change to range_op_table pointer.
16121 (class floating_op_table): Delete.
16122 * range-op.cc (operator_equal): Adjust using statement.
16123 (operator_not_equal): Ditto.
16124 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
16125 (operator_minus, operator_cast): Ditto.
16126 (operator_bitwise_and, pointer_plus_operator): Ditto.
16127 (get_float_handle): Change return type.
16128 * range-op.h (range_operator_float): Delete. Relocate all methods
16129 into class range_operator.
16130 (range_op_handler::m_float): Change type to range_operator.
16131 (floating_op_table): Delete.
16132 (floating_tree_table): Change type.
16134 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16136 * range-op.cc (range_operator::fold_range): Call virtual routine.
16137 (range_operator::update_bitmask): New.
16138 (operator_equal::update_bitmask): New.
16139 (operator_not_equal::update_bitmask): New.
16140 (operator_lt::update_bitmask): New.
16141 (operator_le::update_bitmask): New.
16142 (operator_gt::update_bitmask): New.
16143 (operator_ge::update_bitmask): New.
16144 (operator_ge::update_bitmask): New.
16145 (operator_plus::update_bitmask): New.
16146 (operator_minus::update_bitmask): New.
16147 (operator_pointer_diff::update_bitmask): New.
16148 (operator_min::update_bitmask): New.
16149 (operator_max::update_bitmask): New.
16150 (operator_mult::update_bitmask): New.
16151 (operator_div:operator_div):New.
16152 (operator_div::update_bitmask): New.
16153 (operator_div::m_code): New member.
16154 (operator_exact_divide::operator_exact_divide): New constructor.
16155 (operator_lshift::update_bitmask): New.
16156 (operator_rshift::update_bitmask): New.
16157 (operator_bitwise_and::update_bitmask): New.
16158 (operator_bitwise_or::update_bitmask): New.
16159 (operator_bitwise_xor::update_bitmask): New.
16160 (operator_trunc_mod::update_bitmask): New.
16161 (op_ident, op_unknown, op_ptr_min_max): New.
16162 (op_nop, op_convert): Delete.
16163 (op_ssa, op_paren, op_obj_type): Delete.
16164 (op_realpart, op_imagpart): Delete.
16165 (op_ptr_min, op_ptr_max): Delete.
16166 (pointer_plus_operator:update_bitmask): New.
16167 (range_op_table::set): Do not use m_code.
16168 (integral_table::integral_table): Adjust to single instances.
16169 * range-op.h (range_operator::range_operator): Delete.
16170 (range_operator::m_code): Delete.
16171 (range_operator::update_bitmask): New.
16173 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16175 * range-op-float.cc (range_operator_float::fold_range): Return
16176 NAN of the result type.
16178 2023-06-08 Jakub Jelinek <jakub@redhat.com>
16180 * optabs.cc (expand_ffs): Add forward declaration.
16181 (expand_doubleword_clz): Rename to ...
16182 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
16183 handle also doubleword CTZ and FFS in addition to CLZ.
16184 (expand_unop): Adjust caller. Also call it for doubleword
16185 ctz_optab and ffs_optab.
16187 2023-06-08 Jakub Jelinek <jakub@redhat.com>
16190 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
16191 n_words == 2 recurse with mmx_ok as first argument rather than false.
16193 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
16195 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
16196 avoid sign extension/undefined behaviour when setting each bit.
16198 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
16199 Uros Bizjak <ubizjak@gmail.com>
16201 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
16202 Use new x86_stc instruction when the carry flag must be set.
16203 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
16204 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
16205 * config/i386/i386.h (TARGET_SLOW_STC): New define.
16206 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
16207 (x86_stc): New define_insn.
16208 (define_peephole2): Convert x86_stc into alternate implementation
16209 on pentium4 without -Os when a QImode register is available.
16210 (*x86_cmc): New define_insn.
16211 (define_peephole2): Convert *x86_cmc into alternate implementation
16212 on pentium4 without -Os when a QImode register is available.
16213 (*setccc): New define_insn_and_split for a no-op CCCmode move.
16214 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
16215 recognize (and eliminate) the carry flag being copied to itself.
16216 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
16217 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
16219 2023-06-07 Andrew Pinski <apinski@marvell.com>
16221 * match.pd: Fix comment for the
16222 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
16224 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
16225 Jeff Law <jlaw@ventanamicro.com>
16227 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
16228 (rotrsi3_sext): Expose generator.
16229 (rotlsi3 pattern): Hide generator.
16230 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
16232 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
16233 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
16234 (mulsi3, <optab>si3): Likewise.
16235 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
16236 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
16237 (<u>mulsidi3): Likewise.
16238 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
16239 (mulsi3_extended, <optab>si3_extended): Likewise.
16240 (splitter for shadd feeding divison): Update RTL pattern to account
16241 for changes in how 32 bit ops are expanded for TARGET_64BIT.
16242 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
16244 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
16247 * config/riscv/riscv.cc (riscv_print_operand): Calculate
16248 memmodel only when it is valid.
16250 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
16252 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
16253 for constant element of a vector.
16255 2023-06-07 Jakub Jelinek <jakub@redhat.com>
16257 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
16258 instead compare tree_nonzero_bits <= 1U rather than just == 1.
16260 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16263 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
16265 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
16266 names for builtins.
16267 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
16268 setup if in_lto_p, just like we do for SVE.
16269 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
16270 (__arm_st64b): Delete.
16271 (__arm_st64bv): Delete.
16272 (__arm_st64bv0): Delete.
16274 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16277 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
16278 Use input operand for the destination address.
16279 * config/aarch64/aarch64.md (st64b): Fix constraint on address
16282 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16285 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
16286 Replace eight consecutive spaces with tabs.
16287 (aarch64_init_ls64_builtins): Likewise.
16288 (aarch64_expand_builtin_ls64): Likewise.
16289 * config/aarch64/aarch64.md (ld64b): Likewise.
16292 (st64bv0): Likewise.
16294 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
16296 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
16297 offset table pseudo to a general reg subset.
16299 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16301 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
16303 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
16305 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
16306 (aarch64_sqxtun2<mode>_le): Likewise.
16307 (aarch64_sqxtun2<mode>_be): Likewise.
16308 (aarch64_sqxtun2<mode>): Adjust for the above.
16309 (aarch64_sqmovun<mode>): New define_expand.
16310 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
16311 (half_mask): New mode attribute.
16312 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
16315 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16317 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
16319 (aarch64_addp<mode>_insn): ... This...
16320 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
16321 (aarch64_addp<mode>): New define_expand.
16323 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16325 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
16326 * config/riscv/riscv-v.cc
16327 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
16329 (rvv_builder::single_step_npatterns_p): New function.
16330 (rvv_builder::npatterns_all_equal_p): Ditto.
16331 (const_vec_all_in_range_p): Support POLY handling.
16332 (gen_const_vector_dup): Ditto.
16333 (emit_vlmax_gather_insn): Add vrgatherei16.
16334 (emit_vlmax_masked_gather_mu_insn): Ditto.
16335 (expand_const_vector): Add VLA SLP const vector support.
16336 (expand_vec_perm): Support POLY.
16337 (struct expand_vec_perm_d): New struct.
16338 (shuffle_generic_patterns): New function.
16339 (expand_vec_perm_const_1): Ditto.
16340 (expand_vec_perm_const): Ditto.
16341 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
16342 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
16344 2023-06-07 Andrew Pinski <apinski@marvell.com>
16346 PR middle-end/110117
16347 * expr.cc (expand_single_bit_test): Handle
16348 const_int from expand_expr.
16350 2023-06-07 Andrew Pinski <apinski@marvell.com>
16352 * expr.cc (do_store_flag): Rearrange the
16353 TER code so that it overrides the nonzero bits
16354 info if we had `a & POW2`.
16356 2023-06-07 Andrew Pinski <apinski@marvell.com>
16358 PR tree-optimization/110134
16359 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
16361 (-A CMP CST -> B CMP (-CST)): Likewise.
16363 2023-06-07 Andrew Pinski <apinski@marvell.com>
16365 PR tree-optimization/89263
16366 PR tree-optimization/99069
16367 PR tree-optimization/20083
16368 PR tree-optimization/94898
16369 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
16370 one of the operands are constant.
16372 2023-06-07 Andrew Pinski <apinski@marvell.com>
16374 * match.pd (zero_one_valued_p): Match 0 integer constant
16377 2023-06-07 Pan Li <pan2.li@intel.com>
16379 * config/riscv/riscv-vector-builtins-types.def
16380 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
16381 (vfloat32m1_t): Ditto.
16382 (vfloat32m2_t): Ditto.
16383 (vfloat32m4_t): Ditto.
16384 (vfloat32m8_t): Ditto.
16385 (vint16mf4_t): Ditto.
16386 (vint16mf2_t): Ditto.
16387 (vint16m1_t): Ditto.
16388 (vint16m2_t): Ditto.
16389 (vint16m4_t): Ditto.
16390 (vint16m8_t): Ditto.
16391 (vuint16mf4_t): Ditto.
16392 (vuint16mf2_t): Ditto.
16393 (vuint16m1_t): Ditto.
16394 (vuint16m2_t): Ditto.
16395 (vuint16m4_t): Ditto.
16396 (vuint16m8_t): Ditto.
16397 (vint32mf2_t): Ditto.
16398 (vint32m1_t): Ditto.
16399 (vint32m2_t): Ditto.
16400 (vint32m4_t): Ditto.
16401 (vint32m8_t): Ditto.
16402 (vuint32mf2_t): Ditto.
16403 (vuint32m1_t): Ditto.
16404 (vuint32m2_t): Ditto.
16405 (vuint32m4_t): Ditto.
16406 (vuint32m8_t): Ditto.
16408 2023-06-07 Jason Merrill <jason@redhat.com>
16411 * doc/invoke.texi: Document it.
16413 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
16415 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
16416 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
16417 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
16418 NOT (BITREVERSE x) as BITREVERSE (NOT x).
16419 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
16420 Optimize PARITY (BITREVERSE x) as PARITY x.
16421 Optimize BITREVERSE (BITREVERSE x) as x.
16422 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
16423 BITREVERSE of a constant integer at compile-time.
16424 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
16425 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
16426 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
16427 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
16428 Optimize COPYSIGN (x, ABS y) as ABS x.
16429 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
16430 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
16431 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
16432 arguments at compile-time.
16434 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
16436 * rtl.h (function_invariant_p): Change return type from int to bool.
16437 * reload1.cc (function_invariant_p): Change return type from
16438 int to bool and adjust function body accordingly.
16440 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16442 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
16443 (*single_<optab>mult_plus<mode>): Ditto.
16444 (*double_<optab>mult_plus<mode>): Ditto.
16445 (*sign_zero_extend_fma): Ditto.
16446 (*zero_sign_extend_fma): Ditto.
16447 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16449 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
16450 Tobias Burnus <tobias@codesourcery.com>
16452 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
16453 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
16455 (omp_get_attachment): Handle map clauses with 'present' modifier.
16456 (omp_group_base): Likewise.
16457 (gimplify_scan_omp_clauses): Reorder present maps to come first.
16458 Set GOVD flags for present defaultmaps.
16459 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
16460 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
16462 (lower_omp_target): Handle map clauses with 'present' modifier.
16463 Handle 'to' and 'from' clauses with 'present'.
16464 * tree-core.h (enum omp_clause_defaultmap_kind): Add
16465 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
16466 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
16467 'from' clauses with 'present' modifier. Handle present defaultmap.
16468 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
16470 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
16472 * config/rs6000/genfusion.pl: Delete some dead code.
16474 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
16476 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
16478 (gen_ld_cmpi_p10): ... this.
16480 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
16483 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
16484 duplicate expression.
16486 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16488 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
16489 Handle unsigned reduc_plus_scal_ builtins.
16490 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
16491 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
16492 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
16493 __builtin_aarch64_reduc_plus_scal_v2di.
16494 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
16496 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16498 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
16499 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
16500 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
16502 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16504 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
16505 (aarch64_shrn<mode>_insn_be): Delete.
16506 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
16507 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
16508 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
16509 (aarch64_rshrn<mode>_insn_le): Delete.
16510 (aarch64_rshrn<mode>_insn_be): Delete.
16511 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
16512 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
16514 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16516 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
16518 (aarch64_pars_overlap_p): Likewise.
16519 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
16520 Express in terms of UNSPEC_ADDV.
16521 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
16522 (*aarch64_<su>addlv<mode>_reduction): Define.
16523 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
16524 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
16525 (aarch64_pars_overlap_p): Likewise.
16526 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
16527 (VQUADW): New mode attribute.
16528 (VWIDE2X_S): Likewise.
16530 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
16531 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
16533 2023-06-06 Richard Biener <rguenther@suse.de>
16535 PR middle-end/110055
16536 * gimplify.cc (gimplify_target_expr): Do not emit
16537 CLOBBERs for variables which have static storage duration
16538 after gimplifying their initializers.
16540 2023-06-06 Richard Biener <rguenther@suse.de>
16542 PR tree-optimization/109143
16543 * tree-ssa-structalias.cc (solution_set_expand): Avoid
16544 one bitmap iteration and optimize bit range setting.
16546 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
16548 PR bootstrap/110120
16549 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
16550 XVECEXP, not XEXP, to access first item of a PARALLEL.
16552 2023-06-06 Pan Li <pan2.li@intel.com>
16554 * config/riscv/riscv-vector-builtins-types.def
16555 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
16556 (vfloat16mf2_t): Likewise.
16557 (vfloat16m1_t): Likewise.
16558 (vfloat16m2_t): Likewise.
16559 (vfloat16m4_t): Likewise.
16560 (vfloat16m8_t): Likewise.
16561 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
16562 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
16564 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
16566 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
16567 for cfi reg/mem machmode
16568 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
16570 2023-06-06 Li Xu <xuli1@eswincomputing.com>
16572 * config/riscv/vector-iterators.md:
16573 Fix 'REQUIREMENT' for machine_mode 'MODE'.
16574 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
16575 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
16576 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
16578 2023-06-06 Pan Li <pan2.li@intel.com>
16580 * config/riscv/vector-iterators.md: Fix typo in mode attr.
16582 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16583 Joel Hutton <joel.hutton@arm.com>
16585 * doc/generic.texi: Remove old tree codes.
16586 * expr.cc (expand_expr_real_2): Remove old tree code cases.
16587 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
16588 * optabs-tree.cc (optab_for_tree_code): Likewise.
16589 (supportable_half_widening_operation): Likewise.
16590 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
16591 * tree-inline.cc (estimate_operator_cost): Likewise.
16592 (op_symbol_code): Likewise.
16593 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
16594 (vect_analyze_data_ref_accesses): Likewise.
16595 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
16596 * cfgexpand.cc (expand_debug_expr): Likewise.
16597 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
16598 (supportable_widening_operation): Likewise.
16599 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
16601 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
16602 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
16603 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
16604 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
16605 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
16606 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
16607 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
16608 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
16610 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16611 Joel Hutton <joel.hutton@arm.com>
16612 Tamar Christina <tamar.christina@arm.com>
16614 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
16616 (vec_widen_<su>add_lo_<mode>): ... to this.
16617 (vec_widen_<su>addl_hi_<mode>): Rename this ...
16618 (vec_widen_<su>add_hi_<mode>): ... to this.
16619 (vec_widen_<su>subl_lo_<mode>): Rename this ...
16620 (vec_widen_<su>sub_lo_<mode>): ... to this.
16621 (vec_widen_<su>subl_hi_<mode>): Rename this ...
16622 (vec_widen_<su>sub_hi_<mode>): ...to this.
16623 * doc/generic.texi: Document new IFN codes.
16624 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
16625 (commutative_binary_fn_p): Add widen_plus fn's.
16626 (widening_fn_p): New function.
16627 (narrowing_fn_p): New function.
16628 (direct_internal_fn_optab): Change visibility.
16629 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
16630 internal_fn that expands into multiple internal_fns for widening.
16631 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
16632 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
16633 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
16634 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
16635 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
16636 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
16637 (lookup_hilo_internal_fn): Likewise.
16638 (widening_fn_p): Likewise.
16639 (Narrowing_fn_p): Likewise.
16640 * optabs.cc (commutative_optab_p): Add widening plus optabs.
16641 * optabs.def (OPTAB_D): Define widen add, sub optabs.
16642 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
16643 patterns with a hi/lo or even/odd split.
16644 (vect_recog_sad_pattern): Refactor to use new IFN codes.
16645 (vect_recog_widen_plus_pattern): Likewise.
16646 (vect_recog_widen_minus_pattern): Likewise.
16647 (vect_recog_average_pattern): Likewise.
16648 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
16650 (supportable_widening_operation): Likewise.
16651 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
16653 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16654 Joel Hutton <joel.hutton@arm.com>
16656 * tree-vect-patterns.cc: Add include for gimple-iterator.
16657 (vect_recog_widen_op_pattern): Refactor to use code_helper.
16658 (vect_gimple_build): New function.
16659 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
16661 (vectorizable_call): Likewise.
16662 (vect_gen_widened_results_half): Likewise.
16663 (vect_create_vectorized_demotion_stmts): Likewise.
16664 (vect_create_vectorized_promotion_stmts): Likewise.
16665 (vect_create_half_widening_stmts): Likewise.
16666 (vectorizable_conversion): Likewise.
16667 (supportable_widening_operation): Likewise.
16668 (supportable_narrowing_operation): Likewise.
16669 * tree-vectorizer.h (supportable_widening_operation): Change
16670 prototype to use code_helper.
16671 (supportable_narrowing_operation): Likewise.
16672 (vect_gimple_build): New function prototype.
16673 * tree.h (code_helper::safe_as_tree_code): New function.
16674 (code_helper::safe_as_fn_code): New function.
16676 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
16678 * wide-int.cc (wi::bitreverse_large): New function implementing
16679 bit reversal of an integer.
16680 * wide-int.h (wi::bitreverse): New (template) function prototype.
16681 (bitreverse_large): Prototype helper function/implementation.
16682 (wi::bitreverse): New template wrapper around bitreverse_large.
16684 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
16686 * rtl.h (print_rtl_single): Change return type from int to void.
16687 (print_rtl_single_with_indent): Ditto.
16688 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
16689 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
16690 (rtx_writer::print_rtx_operand_code_0): Ditto.
16691 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
16692 (rtx_writer::print_rtx_operand_code_i): Ditto.
16693 (rtx_writer::print_rtx_operand_code_u): Ditto.
16694 (rtx_writer::print_rtx_operand): Ditto.
16695 (rtx_writer::print_rtx): Ditto.
16696 (rtx_writer::finish_directive): Ditto.
16697 (print_rtl_single): Change return type from int to void
16698 and adjust function body accordingly.
16699 (rtx_writer::print_rtl_single_with_indent): Ditto.
16701 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
16703 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
16704 (reg_class_subset_p): Ditto.
16705 * reginfo.cc (reg_classes_intersect_p): Ditto.
16706 (reg_class_subset_p): Ditto.
16708 2023-06-05 Pan Li <pan2.li@intel.com>
16710 * config/riscv/riscv-vector-builtins-types.def
16711 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
16712 (vfloat32m1_t): Ditto.
16713 (vfloat32m2_t): Ditto.
16714 (vfloat32m4_t): Ditto.
16715 (vfloat32m8_t): Ditto.
16716 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
16717 (vint16mf2_t): Ditto.
16718 (vint16m1_t): Ditto.
16719 (vint16m2_t): Ditto.
16720 (vint16m4_t): Ditto.
16721 (vint16m8_t): Ditto.
16722 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
16723 (vuint16mf2_t): Ditto.
16724 (vuint16m1_t): Ditto.
16725 (vuint16m2_t): Ditto.
16726 (vuint16m4_t): Ditto.
16727 (vuint16m8_t): Ditto.
16728 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
16729 (vint32m1_t): Ditto.
16730 (vint32m2_t): Ditto.
16731 (vint32m4_t): Ditto.
16732 (vint32m8_t): Ditto.
16733 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
16734 (vuint32m1_t): Ditto.
16735 (vuint32m2_t): Ditto.
16736 (vuint32m4_t): Ditto.
16737 (vuint32m8_t): Ditto.
16738 * config/riscv/vector-iterators.md: Add FP=16 support for V,
16739 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
16741 2023-06-05 Andrew Pinski <apinski@marvell.com>
16743 PR bootstrap/110085
16744 * Makefile.in (clean): Remove the removing of
16745 MULTILIB_DIR/MULTILIB_OPTIONS directories.
16747 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
16749 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
16751 * config/mips/mips.cc (speculation_barrier_libfunc): New static
16753 (mips_init_libfuncs): Initialize it.
16754 (mips_emit_speculation_barrier): New function.
16755 * config/mips/mips.md (speculation_barrier): Call
16756 mips_emit_speculation_barrier.
16758 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16760 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
16761 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
16762 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
16763 (rvv_builder::get_merged_repeating_sequence): Ditto.
16764 (rvv_builder::get_merge_scalar_mask): Ditto.
16765 (emit_scalar_move_insn): Ditto.
16766 (emit_vlmax_integer_move_insn): Ditto.
16767 (emit_nonvlmax_integer_move_insn): Ditto.
16768 (emit_vlmax_gather_insn): Ditto.
16769 (emit_vlmax_masked_gather_mu_insn): Ditto.
16770 (get_repeating_sequence_dup_machine_mode): Ditto.
16772 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16774 * config/riscv/autovec.md: Split arguments.
16775 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
16776 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
16778 2023-06-04 Andrew Pinski <apinski@marvell.com>
16780 * expr.cc (do_store_flag): Improve for single bit testing
16781 not against zero but against that single bit.
16783 2023-06-04 Andrew Pinski <apinski@marvell.com>
16785 * expr.cc (do_store_flag): Extend the one bit checking case
16786 to handle the case where we don't have an and but rather still
16787 one bit is known to be non-zero.
16789 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
16791 * config/h8300/constraints.md (Zz): Make this a normal
16793 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
16794 * config/h8300/logical.md (H8/SX bit patterns): Remove.
16796 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16798 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
16799 New insn_and_split patterns.
16801 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16804 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
16805 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
16806 (@vlmul_extx4<mode>): Ditto.
16807 (@vlmul_extx8<mode>): Ditto.
16808 (@vlmul_extx16<mode>): Ditto.
16809 (@vlmul_extx32<mode>): Ditto.
16810 (@vlmul_extx64<mode>): Ditto.
16811 (*vlmul_extx2<mode>): Ditto.
16812 (*vlmul_extx4<mode>): Ditto.
16813 (*vlmul_extx8<mode>): Ditto.
16814 (*vlmul_extx16<mode>): Ditto.
16815 (*vlmul_extx32<mode>): Ditto.
16816 (*vlmul_extx64<mode>): Ditto.
16818 2023-06-04 Pan Li <pan2.li@intel.com>
16820 * config/riscv/riscv-vector-builtins-types.def
16821 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
16822 (vfloat32m1_t): Likewise.
16823 (vfloat32m2_t): Likewise.
16824 (vfloat32m4_t): Likewise.
16825 (vfloat32m8_t): Likewise.
16826 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
16827 * config/riscv/vector-iterators.md: Add single to half machine
16830 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16832 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
16833 (*n<optab><mode>): Ditto.
16834 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
16835 (*n<optab><mode>): Ditto.
16836 * config/riscv/vector.md: Ditto.
16838 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
16841 * config/i386/i386-features.cc (scalar_chain::convert_compare):
16842 Update or delete REG_EQUAL notes, converting CONST_INT and
16843 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
16845 2023-06-04 Jason Merrill <jason@redhat.com>
16848 * tree-eh.cc (lower_resx): Pass the exception pointer to the
16850 * except.h: Tweak comment.
16852 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
16854 * postreload.cc (move2add_use_add2_insn): Handle
16855 trivial single_sets. Rename variable PAT to SET.
16856 (move2add_use_add3_insn, reload_cse_move2add): Similar.
16858 2023-06-04 Pan Li <pan2.li@intel.com>
16860 * config/riscv/riscv-vector-builtins-types.def
16861 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
16862 (vfloat16mf2_t): Likewise.
16863 (vfloat16m1_t): Likewise.
16864 (vfloat16m2_t): Likewise.
16865 (vfloat16m4_t): Likewise.
16866 (vfloat16m8_t): Likewise.
16867 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
16868 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
16869 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
16870 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
16873 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
16875 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
16878 2023-06-03 Die Li <lidie@eswincomputing.com>
16880 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
16882 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16884 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
16886 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16888 * config/riscv/vector.md: Add vector-opt.md.
16889 * config/riscv/autovec-opt.md: New file.
16891 2023-06-03 liuhongt <hongtao.liu@intel.com>
16893 PR tree-optimization/110067
16894 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
16895 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
16897 2023-06-03 liuhongt <hongtao.liu@intel.com>
16900 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
16901 (truncv2si<mode>2): Ditto.
16903 2023-06-02 Andrew Pinski <apinski@marvell.com>
16905 PR rtl-optimization/102733
16906 * dse.cc (store_info): Add addrspace field.
16907 (record_store): Record the address space
16908 and check to make sure they are the same.
16910 2023-06-02 Andrew Pinski <apinski@marvell.com>
16912 PR rtl-optimization/110042
16913 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
16914 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
16916 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
16919 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
16920 Make sure that we do not have a cap on field alignment before altering
16921 the struct layout based on the type alignment of the first entry.
16923 2023-06-02 David Faust <david.faust@oracle.com>
16926 * btfout.cc (btf_absolute_func_id): New function.
16927 (btf_asm_func_type): Call it here. Change index parameter from
16928 size_t to ctf_id_t. Use PRIu64 formatter.
16930 2023-06-02 Alex Coplan <alex.coplan@arm.com>
16932 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
16933 (btf_asm_datasec_type): Likewise.
16935 2023-06-02 Carl Love <cel@us.ibm.com>
16937 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
16938 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
16940 2023-06-02 Jason Merrill <jason@redhat.com>
16944 * tree.h (DECL_MERGEABLE): New.
16945 * tree-core.h (struct tree_decl_common): Mention it.
16946 * gimplify.cc (gimplify_init_constructor): Check it.
16947 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
16948 * varasm.cc (categorize_decl_for_section): Likewise.
16950 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
16952 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
16953 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
16954 (stack_regs_mentioned_p): Change return type from int to bool
16955 and adjust function body accordingly.
16956 (stack_regs_mentioned): Ditto.
16957 (check_asm_stack_operands): Ditto. Change "malformed_asm"
16959 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
16960 (swap_rtx_condition_1): Change return type from int to bool
16961 and adjust function body accordingly. Change "r" variable to bool.
16962 (swap_rtx_condition): Change return type from int to bool
16963 and adjust function body accordingly.
16964 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
16965 (subst_stack_regs): Ditto.
16966 (convert_regs_entry): Change return type from int to bool and adjust
16967 function body accordingly. Change "inserted" variable to bool.
16968 (convert_regs_1): Recode handling of control_flow_insn_deleted.
16969 (convert_regs_2): Recode handling of cfg_altered.
16970 (convert_regs): Ditto. Change "inserted" variable to bool.
16972 2023-06-02 Jason Merrill <jason@redhat.com>
16975 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
16976 (initializer_constant_valid_p_1): Compare float precision.
16978 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
16980 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
16983 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16985 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
16986 (vect_set_loop_condition_partial_vectors): Ditto.
16988 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
16991 * config/avr/avr.md: Add an RTL peephole to optimize operations on
16992 non-LD_REGS after a move from LD_REGS.
16993 (piaop): New code iterator.
16995 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
16998 * doc/install.texi: Document (optional) Perl usage for parallel
16999 testing of libgomp.
17001 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
17004 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
17007 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17008 KuanLin Chen <best124612@gmail.com>
17010 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
17011 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
17013 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17015 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
17017 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17019 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
17021 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17023 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
17025 (DEF_RVV_FRM_ENUM): Ditto.
17027 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17029 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
17030 intrinsic API expander
17031 * config/riscv/vector.md
17032 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
17033 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
17034 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
17036 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17038 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
17039 * config/riscv/predicates.md (vector_perm_operand): New predicate.
17040 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17041 (expand_vec_perm): New function.
17042 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
17043 (gen_const_vector_dup): Ditto.
17044 (emit_vlmax_gather_insn): Ditto.
17045 (emit_vlmax_masked_gather_mu_insn): Ditto.
17046 (expand_vec_perm): Ditto.
17048 2023-06-01 Jason Merrill <jason@redhat.com>
17050 * doc/invoke.texi (-Wpedantic): Improve clarity.
17052 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
17054 * rtl.h (exp_equiv_p): Change return type from int to bool.
17055 * cse.cc (mention_regs): Change return type from int to bool
17056 and adjust function body accordingly.
17057 (exp_equiv_p): Ditto.
17058 (insert_regs): Ditto. Change "modified" function argument to bool
17059 and update usage accordingly.
17060 (record_jump_cond): Remove always zero "reversed_nonequality"
17061 function argument and update usage accordingly.
17062 (fold_rtx): Change "changed" variable to bool.
17063 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
17064 (is_dead_reg): Change return type from int to bool.
17066 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17068 * config/xtensa/xtensa.md (adddi3, subdi3):
17069 New RTL generation patterns implemented according to the instruc-
17070 tion idioms described in the Xtensa ISA reference manual (p. 600).
17072 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
17073 Uros Bizjak <ubizjak@gmail.com>
17076 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
17077 CODE_for_sse4_1_ptestzv2di.
17078 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
17079 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
17080 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
17081 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
17082 when expanding UNSPEC_PTEST to compare against zero.
17083 * config/i386/i386-features.cc (scalar_chain::convert_compare):
17084 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
17085 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
17086 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
17087 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
17088 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
17089 check for suitable matching modes for the UNSPEC_PTEST pattern.
17090 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
17091 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
17092 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
17093 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
17094 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
17095 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
17096 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
17098 (*ptest<mode>_and): Specify CCZ to only perform this optimization
17099 when only the Z flag is required.
17101 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
17104 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
17106 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17108 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
17109 Add =r,m and =r,m alternatives.
17110 (load_pair<DREG:mode><DREG2:mode>): Likewise.
17111 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
17113 2023-06-01 Pan Li <pan2.li@intel.com>
17115 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
17117 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
17118 (main): Disable FP16 tuple.
17119 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
17120 (TARGET_VECTOR_ELEN_FP_16): Ditto.
17121 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
17123 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
17124 (vfloat16mf2_t): Ditto.
17125 (vfloat16m1_t): Ditto.
17126 (vfloat16m2_t): Ditto.
17127 (vfloat16m4_t): Ditto.
17128 (vfloat16m8_t): Ditto.
17129 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
17131 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
17132 machine mode based on TARGET_VECTOR_ELEN_FP_16.
17134 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17136 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
17137 (DEF_RVV_FRM_ENUM): New macro.
17138 (handle_pragma_vector): Add FRM enum
17139 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
17146 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
17147 Richard Sandiford <richard.sandiford@arm.com>
17149 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
17150 Update call to wi::bswap.
17151 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
17152 Update call to wi::bswap.
17153 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
17154 Update calls to wi::bswap.
17155 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
17156 (wi::bswap_large): New function, with revised API.
17157 * wide-int.h (wi::bswap): New (template) function prototype.
17158 (wide_int_storage::bswap): Remove method.
17159 (sext_large, zext_large): Consistent indentation/line wrapping.
17160 (bswap_large): Prototype helper function containing implementation.
17161 (wi::bswap): New template wrapper around bswap_large.
17163 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17166 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
17167 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
17168 (usdot_prod<vsi2qi>): Rename to...
17169 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
17170 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
17171 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
17172 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
17173 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
17174 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
17175 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
17178 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17181 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
17182 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
17183 (aarch64_sq<r>dmulh_n<mode>): Rename to...
17184 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
17185 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
17186 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
17187 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
17188 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
17189 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
17190 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
17191 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
17192 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
17193 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
17194 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
17196 2023-05-31 David Faust <david.faust@oracle.com>
17198 * btfout.cc (btf_kind_names): New.
17199 (btf_kind_name): New.
17200 (btf_absolute_var_id): New utility function.
17201 (btf_relative_var_id): Likewise.
17202 (btf_relative_func_id): Likewise.
17203 (btf_absolute_datasec_id): Likewise.
17204 (btf_asm_type_ref): New.
17205 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
17206 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
17207 (btf_asm_varent): Likewise.
17208 (btf_asm_func_arg): Likewise.
17209 (btf_asm_datasec_entry): Likewise.
17210 (btf_asm_datasec_type): Likewise.
17211 (btf_asm_func_type): Likewise. Add index parameter.
17212 (btf_asm_enum_const): Likewise.
17213 (btf_asm_sou_member): Likewise.
17214 (output_btf_vars): Update btf_asm_* call accordingly.
17215 (output_asm_btf_sou_fields): Likewise.
17216 (output_asm_btf_enum_list): Likewise.
17217 (output_asm_btf_func_args_list): Likewise.
17218 (output_asm_btf_vlen_bytes): Likewise.
17219 (output_btf_func_types): Add ctf_container_ref parameter.
17220 Pass it to btf_asm_func_type.
17221 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
17222 (btf_output): Update output_btf_func_types call similarly.
17224 2023-05-31 David Faust <david.faust@oracle.com>
17226 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
17227 and BTF_KIND_FWD which do not use the size/type field at all.
17229 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
17231 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
17232 (active_insn_p): Ditto.
17233 (in_sequence_p): Ditto.
17234 (unshare_all_rtl): Change return type from int to void.
17235 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
17236 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
17237 and adjust function body accordingly.
17238 (mem_expr_equal_p): Ditto.
17239 (unshare_all_rtl): Change return type from int to void
17240 and adjust function body accordingly.
17241 (verify_rtx_sharing): Remove unneeded return.
17242 (active_insn_p): Change return type from int to bool
17243 and adjust function body accordingly.
17244 (in_sequence_p): Ditto.
17246 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
17248 * rtl.h (true_dependence): Change return type from int to bool.
17249 (canon_true_dependence): Ditto.
17250 (read_dependence): Ditto.
17251 (anti_dependence): Ditto.
17252 (canon_anti_dependence): Ditto.
17253 (output_dependence): Ditto.
17254 (canon_output_dependence): Ditto.
17255 (may_alias_p): Ditto.
17256 * alias.h (alias_sets_conflict_p): Ditto.
17257 (alias_sets_must_conflict_p): Ditto.
17258 (objects_must_conflict_p): Ditto.
17259 (nonoverlapping_memrefs_p): Ditto.
17260 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
17261 (record_set): Ditto.
17262 (base_alias_check): Ditto.
17263 (find_base_value): Ditto.
17264 (mems_in_disjoint_alias_sets_p): Ditto.
17265 (get_alias_set_entry): Ditto.
17266 (decl_for_component_ref): Ditto.
17267 (write_dependence_p): Ditto.
17268 (memory_modified_1): Ditto.
17269 (mems_in_disjoint_alias_set_p): Change return type from int to bool
17270 and adjust function body accordingly.
17271 (alias_sets_conflict_p): Ditto.
17272 (alias_sets_must_conflict_p): Ditto.
17273 (objects_must_conflict_p): Ditto.
17274 (rtx_equal_for_memref_p): Ditto.
17275 (base_alias_check): Ditto.
17276 (read_dependence): Ditto.
17277 (nonoverlapping_memrefs_p): Ditto.
17278 (true_dependence_1): Ditto.
17279 (true_dependence): Ditto.
17280 (canon_true_dependence): Ditto.
17281 (write_dependence_p): Ditto.
17282 (anti_dependence): Ditto.
17283 (canon_anti_dependence): Ditto.
17284 (output_dependence): Ditto.
17285 (canon_output_dependence): Ditto.
17286 (may_alias_p): Ditto.
17287 (init_alias_analysis): Change "changed" variable to bool.
17289 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17291 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
17292 expand into define_insn_and_split.
17294 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17296 * config/riscv/vector.md: Remove FRM.
17298 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17300 * config/riscv/vector.md: Remove FRM.
17302 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17304 * config/riscv/vector.md: Remove FRM.
17306 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
17309 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
17312 2023-05-31 Richard Biener <rguenther@suse.de>
17315 PR tree-optimization/109143
17316 * tree-ssa-structalias.cc (struct topo_info): Remove.
17317 (init_topo_info): Likewise.
17318 (free_topo_info): Likewise.
17319 (compute_topo_order): Simplify API, put the component
17320 with ESCAPED last so it's processed first.
17321 (topo_visit): Adjust.
17322 (solve_graph): Likewise.
17324 2023-05-31 Richard Biener <rguenther@suse.de>
17326 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
17328 (add_graph_edge): Count redundant edges we avoid to create.
17329 (dump_sa_stats): Dump them.
17330 (ipa_pta_execute): Do not dump generating constraints when
17331 we are not dumping them.
17333 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17335 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
17336 output template to avoid explicit switch on which_alternative.
17337 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
17338 (and<mode>3): Likewise.
17339 (ior<mode>3): Likewise.
17340 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
17342 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17344 * config/xtensa/predicates.md (xtensa_bit_join_operator):
17346 * config/xtensa/xtensa.md (ior_op): Remove.
17347 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
17348 insn_and_split pattern of the same name to express and capture
17349 the bit-combining operation with both sides swapped.
17350 In addition, replace use of code iterator with new operator
17352 (*shlrd_const, *shlrd_per_byte):
17353 Likewise regarding the code iterator.
17355 2023-05-31 Cui, Lili <lili.cui@intel.com>
17357 PR tree-optimization/110038
17358 * params.opt: Add a limit on tree-reassoc-width.
17359 * tree-ssa-reassoc.cc
17360 (rewrite_expr_tree_parallel): Add width limit.
17362 2023-05-31 Pan Li <pan2.li@intel.com>
17364 * common/config/riscv/riscv-common.cc:
17365 (riscv_implied_info): Add zvfh item.
17366 (riscv_ext_version_table): Ditto.
17367 (riscv_ext_flag_table): Ditto.
17368 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
17369 (TARGET_ZVFH): Ditto.
17371 2023-05-30 liuhongt <hongtao.liu@intel.com>
17373 PR tree-optimization/108804
17374 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
17375 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
17376 Add new parameter narrow_src_p.
17377 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
17378 vectorization by truncating to lower precision.
17379 * tree-vectorizer.h (vect_get_range_info): New declare.
17381 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
17383 * lra-int.h (lra_update_sp_offset): Add the prototype.
17384 * lra.cc (setup_sp_offset): Change the return type. Use
17385 lra_update_sp_offset.
17386 * lra-eliminations.cc (lra_update_sp_offset): New function.
17387 (lra_process_new_insns): Push the current insn to reprocess if the
17388 input reload changes sp offset.
17390 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17393 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17394 Fix misleading identation.
17396 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17398 * rtl.h (comparison_dominates_p): Change return type from int to bool.
17399 (condjump_p): Ditto.
17400 (any_condjump_p): Ditto.
17401 (any_uncondjump_p): Ditto.
17402 (simplejump_p): Ditto.
17403 (returnjump_p): Ditto.
17404 (eh_returnjump_p): Ditto.
17405 (onlyjump_p): Ditto.
17406 (invert_jump_1): Ditto.
17407 (invert_jump): Ditto.
17408 (rtx_renumbered_equal_p): Ditto.
17409 (redirect_jump_1): Ditto.
17410 (redirect_jump): Ditto.
17411 (condjump_in_parallel_p): Ditto.
17412 * jump.cc (invert_exp_1): Adjust forward declaration.
17413 (comparison_dominates_p): Change return type from int to bool
17414 and adjust function body accordingly.
17415 (simplejump_p): Ditto.
17416 (condjump_p): Ditto.
17417 (condjump_in_parallel_p): Ditto.
17418 (any_uncondjump_p): Ditto.
17419 (any_condjump_p): Ditto.
17420 (returnjump_p): Ditto.
17421 (eh_returnjump_p): Ditto.
17422 (onlyjump_p): Ditto.
17423 (redirect_jump_1): Ditto.
17424 (redirect_jump): Ditto.
17425 (invert_exp_1): Ditto.
17426 (invert_jump_1): Ditto.
17427 (invert_jump): Ditto.
17428 (rtx_renumbered_equal_p): Ditto.
17430 2023-05-30 Andrew Pinski <apinski@marvell.com>
17432 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
17433 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
17434 Add ne as a possible cmp.
17435 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
17437 2023-05-30 Andrew Pinski <apinski@marvell.com>
17439 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
17442 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
17444 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
17445 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
17446 (and (extend X) C) as (zero_extend (and X C)), to also optimize
17447 modes wider than HOST_WIDE_INT.
17449 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
17452 * simplify-rtx.cc (simplify_const_relational_operation): Return
17453 early if we have a MODE_CC comparison that isn't a COMPARE against
17456 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
17458 * config/riscv/riscv.cc (riscv_const_insns): Allow
17459 const_vec_duplicates.
17461 2023-05-30 liuhongt <hongtao.liu@intel.com>
17463 PR middle-end/108938
17464 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
17465 function, cut from original find_bswap_or_nop function.
17466 (find_bswap_or_nop): Add a new parameter, detect bswap +
17467 rotate and save rotate result in the new parameter.
17468 (bswap_replace): Add a new parameter to indicate rotate and
17469 generate rotate stmt if needed.
17470 (maybe_optimize_vector_constructor): Adjust for new rotate
17471 parameter in the upper 2 functions.
17472 (pass_optimize_bswap::execute): Ditto.
17473 (imm_store_chain_info::output_merged_store): Ditto.
17475 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17477 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
17478 (aarch64_<su>adalp<mode>): New define_expand.
17479 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
17480 (aarch64_<su>addlp<mode>): Convert to define_expand.
17481 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
17482 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
17484 (USADDLP): Likewise.
17485 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
17487 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17489 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
17490 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
17491 srhadd, urhadd builtin codes for standard optab ones.
17492 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
17493 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
17495 (<u>avg<mode>3_ceil): Rename to...
17496 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
17498 (aarch64_<su>hsub<mode>): New define_expand.
17499 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
17500 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
17501 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
17503 2023-05-30 Andreas Schwab <schwab@suse.de>
17506 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
17507 match libsanitizer.
17509 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17511 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
17512 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
17514 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
17515 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
17516 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
17517 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
17518 (aarch64_<sra_op>sra_n<mode>): New define_expand.
17519 (aarch64_<sra_op>rsra_n<mode>): Likewise.
17520 (aarch64_<sur>sra_n<mode>): Rename to...
17521 (aarch64_<sur>sra_ndi): ... This.
17522 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
17523 any_target_p argument.
17524 (aarch64_extract_vec_duplicate_wide_int): Define.
17525 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
17526 (aarch64_const_vec_rnd_cst_p): Likewise.
17527 (aarch64_vector_mode_supported_any_target_p): Likewise.
17528 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
17529 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
17530 (VSRA): Adjust for the above.
17532 (V2XWIDE): New mode_attr.
17533 (vec_or_offset): Likewise.
17534 (SHIFTEXTEND): Likewise.
17535 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
17537 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
17538 clarify that it applies to current target options.
17539 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
17540 * doc/tm.texi.in: Regenerate.
17541 * stor-layout.cc (mode_for_vector): Check
17542 vector_mode_supported_any_target_p when iterating through vector modes.
17543 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
17544 clarify that it applies to current target options.
17545 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
17547 2023-05-30 Lili Cui <lili.cui@intel.com>
17549 PR tree-optimization/98350
17550 * tree-ssa-reassoc.cc
17551 (rewrite_expr_tree_parallel): Rewrite this function.
17552 (rank_ops_for_fma): New.
17553 (reassociate_bb): Handle new function.
17555 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17557 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
17558 (rtx_unstable_p): Ditto.
17559 (reg_mentioned_p): Ditto.
17560 (reg_referenced_p): Ditto.
17561 (reg_used_between_p): Ditto.
17562 (reg_set_between_p): Ditto.
17563 (modified_between_p): Ditto.
17564 (no_labels_between_p): Ditto.
17565 (modified_in_p): Ditto.
17566 (reg_set_p): Ditto.
17567 (multiple_sets): Ditto.
17568 (set_noop_p): Ditto.
17569 (noop_move_p): Ditto.
17570 (reg_overlap_mentioned_p): Ditto.
17571 (dead_or_set_p): Ditto.
17572 (dead_or_set_regno_p): Ditto.
17573 (find_reg_fusage): Ditto.
17574 (find_regno_fusage): Ditto.
17575 (side_effects_p): Ditto.
17576 (volatile_refs_p): Ditto.
17577 (volatile_insn_p): Ditto.
17578 (may_trap_p_1): Ditto.
17579 (may_trap_p): Ditto.
17580 (may_trap_or_fault_p): Ditto.
17581 (computed_jump_p): Ditto.
17582 (auto_inc_p): Ditto.
17583 (loc_mentioned_in_p): Ditto.
17584 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
17585 (rtx_unstable_p): Change return type from int to bool
17586 and adjust function body accordingly.
17587 (rtx_addr_can_trap_p): Ditto.
17588 (reg_mentioned_p): Ditto.
17589 (no_labels_between_p): Ditto.
17590 (reg_used_between_p): Ditto.
17591 (reg_referenced_p): Ditto.
17592 (reg_set_between_p): Ditto.
17593 (reg_set_p): Ditto.
17594 (modified_between_p): Ditto.
17595 (modified_in_p): Ditto.
17596 (multiple_sets): Ditto.
17597 (set_noop_p): Ditto.
17598 (noop_move_p): Ditto.
17599 (reg_overlap_mentioned_p): Ditto.
17600 (dead_or_set_p): Ditto.
17601 (dead_or_set_regno_p): Ditto.
17602 (find_reg_fusage): Ditto.
17603 (find_regno_fusage): Ditto.
17604 (remove_node_from_insn_list): Ditto.
17605 (volatile_insn_p): Ditto.
17606 (volatile_refs_p): Ditto.
17607 (side_effects_p): Ditto.
17608 (may_trap_p_1): Ditto.
17609 (may_trap_p): Ditto.
17610 (may_trap_or_fault_p): Ditto.
17611 (computed_jump_p): Ditto.
17612 (auto_inc_p): Ditto.
17613 (loc_mentioned_in_p): Ditto.
17614 * combine.cc (can_combine_p): Update indirect function.
17616 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17618 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
17619 * config/riscv/iterators.md: New attribute.
17620 * config/riscv/vector-iterators.md: New attribute.
17622 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
17624 * config/riscv/riscv.md: Fix signed and unsigned comparison
17627 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17629 * config/riscv/autovec.md (fnma<mode>4): New pattern.
17630 (*fnma<mode>): Ditto.
17632 2023-05-29 Die Li <lidie@eswincomputing.com>
17634 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
17636 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
17637 process for TARGET_XTHEADCONDMOV
17639 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
17642 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
17643 TARGET_AVX512BW to generate truncv16hiv16qi2.
17645 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
17647 * config/riscv/riscv.md (and<mode>3): New expander.
17648 (*and<mode>3) New pattern.
17649 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
17652 2023-05-29 Pan Li <pan2.li@intel.com>
17654 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
17655 comments and rename local variables.
17656 (emit_nonvlmax_insn): Diito.
17657 (emit_vlmax_merge_insn): Ditto.
17658 (emit_vlmax_cmp_insn): Ditto.
17659 (emit_vlmax_cmp_mu_insn): Ditto.
17660 (emit_scalar_move_insn): Ditto.
17662 2023-05-29 Pan Li <pan2.li@intel.com>
17664 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
17666 (emit_nonvlmax_insn): Ditto.
17667 (emit_vlmax_merge_insn): Ditto.
17668 (emit_vlmax_cmp_insn): Ditto.
17669 (emit_vlmax_cmp_mu_insn): Ditto.
17670 (expand_vec_series): Ditto.
17672 2023-05-29 Pan Li <pan2.li@intel.com>
17674 * config/riscv/riscv-protos.h (enum insn_type): New type.
17675 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
17676 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
17678 (rvv_builder::get_merged_repeating_sequence): Ditto.
17679 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
17680 to evaluate the optimization cost.
17681 (rvv_builder::get_merge_scalar_mask): New function to get the merge
17683 (emit_scalar_move_insn): New function to emit vmv.s.x.
17684 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
17685 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
17687 (get_repeating_sequence_dup_machine_mode): New function to get the dup
17689 (expand_vector_init_merge_repeating_sequence): New function to perform
17691 (expand_vec_init): Add this vector init optimization.
17692 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
17694 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
17696 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
17697 put onto the increment when it is inserted after the position.
17699 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
17701 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
17704 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17706 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
17708 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17710 * config/riscv/autovec.md (fma<mode>4): New pattern.
17711 (*fma<mode>): Ditto.
17712 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17713 (emit_vlmax_ternary_insn): New function.
17714 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
17716 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17718 * config/riscv/vector.md: Fix vimuladd instruction bug.
17720 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17722 * config/riscv/riscv.cc (global_state_unknown_p): New function.
17723 (riscv_mode_after): Fix incorrect VXM.
17725 2023-05-29 Pan Li <pan2.li@intel.com>
17727 * common/config/riscv/riscv-common.cc:
17728 (riscv_implied_info): Add zvfhmin item.
17729 (riscv_ext_version_table): Ditto.
17730 (riscv_ext_flag_table): Ditto.
17731 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
17732 (TARGET_ZFHMIN): Align indent.
17733 (TARGET_ZFH): Ditto.
17734 (TARGET_ZVFHMIN): New macro.
17736 2023-05-27 liuhongt <hongtao.liu@intel.com>
17739 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
17740 to VI_AVX2 to cover more modes.
17742 2023-05-27 liuhongt <hongtao.liu@intel.com>
17744 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
17745 Remove ATOM and ICELAKE(and later) core processors.
17747 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
17749 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
17751 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
17753 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
17756 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
17757 Juzhe Zhong <juzhe.zhong@rivai.ai>
17759 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
17761 (<optab><v_quad_trunc><mode>2): Dito.
17762 (<optab><v_oct_trunc><mode>2): Dito.
17763 (trunc<mode><v_double_trunc>2): Dito.
17764 (trunc<mode><v_quad_trunc>2): Dito.
17765 (trunc<mode><v_oct_trunc>2): Dito.
17766 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
17767 (autovectorize_vector_modes): Define.
17768 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
17770 (autovectorize_vector_modes): Implement hook.
17771 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
17772 Implement target hook.
17773 (riscv_vectorize_related_mode): Implement target hook.
17774 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
17775 (TARGET_VECTORIZE_RELATED_MODE): Define.
17776 * config/riscv/vector-iterators.md: Add lowercase versions of
17777 mode_attr iterators.
17779 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
17780 Tobias Burnus <tobias@codesourcery.com>
17782 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
17783 (ASM_SPEC): Use XNACKOPT.
17784 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
17785 (enum hsaco_attr_type): ... this, and generalize the names.
17786 (TARGET_XNACK): New macro.
17787 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
17789 (output_file_start): Update xnack handling.
17790 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
17791 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
17792 (sram_ecc_type): Rename to ...
17793 (hsaco_attr_type: ... this.)
17794 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
17795 (TEST_XNACK): Delete.
17796 (TEST_XNACK_ANY): New macro.
17797 (TEST_XNACK_ON): New macro.
17798 (main): Support the new -mxnack=on/off/any syntax.
17799 * doc/invoke.texi (-mxnack): Update for new syntax.
17801 2023-05-26 Andrew Pinski <apinski@marvell.com>
17803 * genmatch.cc (emit_debug_printf): New function.
17804 (dt_simplify::gen_1): Emit printf into the code
17805 before the `return true` or returning the folded result
17806 instead of emitting it always.
17808 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17810 * config/xtensa/xtensa-protos.h
17811 (xtensa_expand_block_set_unrolled_loop,
17812 xtensa_expand_block_set_small_loop): Remove.
17813 (xtensa_expand_block_set): New prototype.
17814 * config/xtensa/xtensa.cc
17815 (xtensa_expand_block_set_libcall): New subfunction.
17816 (xtensa_expand_block_set_unrolled_loop,
17817 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
17818 (xtensa_expand_block_set): New function that calls the above
17820 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
17821 xtensa_expand_block_set().
17823 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17825 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
17827 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
17829 * config/xtensa/constraints.md (O):
17830 Change to use the above function.
17831 * config/xtensa/xtensa.md (*subsi3_from_const):
17832 New insn_and_split pattern.
17834 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17836 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
17837 Retract excessive line folding, and correct the value of
17838 the "length" insn attribute related to TARGET_DENSITY.
17839 (*extzvsi-1bit_addsubx): Ditto.
17841 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
17843 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
17844 Do not disable call to ix86_expand_vecop_qihi2.
17846 2023-05-26 liuhongt <hongtao.liu@intel.com>
17850 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
17851 calculation when !hard_regno_mode_ok for GENERAL_REGS and
17852 mode, otherwise still use GENERAL_REGS.
17854 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17856 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
17857 explict VL and drop VL in ops.
17859 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
17861 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
17862 in different BB blocks.
17864 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
17866 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17867 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
17868 instructions when available. Emulate truncation via
17869 ix86_expand_vec_perm_const_1 when native truncate insn
17871 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
17872 when available. Trivially rename some variables.
17873 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
17874 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
17875 calculation of V*QImode emulations to account for generation of
17876 2x-wider mode instructions.
17877 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
17878 emulations to account for generation of 2x-wider mode instructions.
17880 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
17883 * config/avr/avr.cc (avr_can_inline_p): New static function.
17884 (TARGET_CAN_INLINE_P): Define to that function.
17886 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
17889 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
17890 Handle any bit position and use mode QISI.
17891 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
17892 of 2 insns for bit-transfer of respective style.
17894 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
17896 * config/arm/iterators.md (MVE_6): Remove.
17897 * config/arm/mve.md: Replace MVE_6 with MVE_5.
17899 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17900 Richard Sandiford <richard.sandiford@arm.com>
17902 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
17904 (vect_set_loop_controls_directly): Add decrement IV support.
17905 (vect_set_loop_condition_partial_vectors): Ditto.
17906 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
17908 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
17911 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17914 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
17915 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
17916 Fix canonicalization of PLUS operands.
17917 (aarch64_fcmla<rot><mode>): Rename to...
17918 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
17919 Fix canonicalization of PLUS operands.
17920 (aarch64_fcmla_lane<rot><mode>): Rename to...
17921 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
17922 Fix canonicalization of PLUS operands.
17923 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
17924 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
17925 Fix canonicalization of PLUS operands.
17926 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
17928 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
17930 * config/arm/arm.md (rbitsi2): Rename to...
17931 (arm_rbit): ... This.
17932 (ctzsi2): Adjust for the above.
17933 (arm_rev16si2): Convert to define_expand.
17934 (arm_rev16si2_alt1): New pattern.
17935 (arm_rev16si2_alt): Rename to...
17936 (*arm_rev16si2_alt2): ... This.
17937 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
17938 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
17939 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
17940 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
17942 2023-05-25 Alex Coplan <alex.coplan@arm.com>
17945 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
17947 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
17948 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
17949 DFmode as an rvalue.
17951 2023-05-25 Richard Biener <rguenther@suse.de>
17954 * tree-vect-stmts.cc (vectorizable_condition): For
17955 embedded comparisons also handle the case when the target
17956 only provides vec_cmp and vcond_mask.
17958 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
17960 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
17963 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17965 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
17966 (seq_cost_ignoring_scalar_moves): Likewise.
17967 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
17969 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17971 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
17972 (vcage_f32): Likewise.
17973 (vcages_f32): Likewise.
17974 (vcageq_f32): Likewise.
17975 (vcaged_f64): Likewise.
17976 (vcageq_f64): Likewise.
17977 (vcagts_f32): Likewise.
17978 (vcagt_f32): Likewise.
17979 (vcagt_f64): Likewise.
17980 (vcagtq_f32): Likewise.
17981 (vcagtd_f64): Likewise.
17982 (vcagtq_f64): Likewise.
17983 (vcale_f32): Likewise.
17984 (vcale_f64): Likewise.
17985 (vcaled_f64): Likewise.
17986 (vcales_f32): Likewise.
17987 (vcaleq_f32): Likewise.
17988 (vcaleq_f64): Likewise.
17989 (vcalt_f32): Likewise.
17990 (vcalt_f64): Likewise.
17991 (vcaltd_f64): Likewise.
17992 (vcaltq_f32): Likewise.
17993 (vcaltq_f64): Likewise.
17994 (vcalts_f32): Likewise.
17996 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
18000 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
18001 int to const int or const int to const unsigned int.
18002 (_mm512_mask_srli_epi16): Ditto.
18003 (_mm512_slli_epi16): Ditto.
18004 (_mm512_mask_slli_epi16): Ditto.
18005 (_mm512_maskz_slli_epi16): Ditto.
18006 (_mm512_srai_epi16): Ditto.
18007 (_mm512_mask_srai_epi16): Ditto.
18008 (_mm512_maskz_srai_epi16): Ditto.
18009 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
18010 (_mm512_mask_slli_epi64): Ditto.
18011 (_mm512_maskz_slli_epi64): Ditto.
18012 (_mm512_srli_epi64): Ditto.
18013 (_mm512_mask_srli_epi64): Ditto.
18014 (_mm512_maskz_srli_epi64): Ditto.
18015 (_mm512_srai_epi64): Ditto.
18016 (_mm512_mask_srai_epi64): Ditto.
18017 (_mm512_maskz_srai_epi64): Ditto.
18018 (_mm512_slli_epi32): Ditto.
18019 (_mm512_mask_slli_epi32): Ditto.
18020 (_mm512_maskz_slli_epi32): Ditto.
18021 (_mm512_srli_epi32): Ditto.
18022 (_mm512_mask_srli_epi32): Ditto.
18023 (_mm512_maskz_srli_epi32): Ditto.
18024 (_mm512_srai_epi32): Ditto.
18025 (_mm512_mask_srai_epi32): Ditto.
18026 (_mm512_maskz_srai_epi32): Ditto.
18027 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
18028 (_mm256_maskz_srai_epi16): Ditto.
18029 (_mm_mask_srai_epi16): Ditto.
18030 (_mm_maskz_srai_epi16): Ditto.
18031 (_mm256_mask_slli_epi16): Ditto.
18032 (_mm256_maskz_slli_epi16): Ditto.
18033 (_mm_mask_slli_epi16): Ditto.
18034 (_mm_maskz_slli_epi16): Ditto.
18035 (_mm_maskz_srli_epi16): Ditto.
18036 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
18037 (_mm256_maskz_srli_epi32): Ditto.
18038 (_mm_mask_srli_epi32): Ditto.
18039 (_mm_maskz_srli_epi32): Ditto.
18040 (_mm256_mask_srli_epi64): Ditto.
18041 (_mm256_maskz_srli_epi64): Ditto.
18042 (_mm_mask_srli_epi64): Ditto.
18043 (_mm_maskz_srli_epi64): Ditto.
18044 (_mm256_mask_srai_epi32): Ditto.
18045 (_mm256_maskz_srai_epi32): Ditto.
18046 (_mm_mask_srai_epi32): Ditto.
18047 (_mm_maskz_srai_epi32): Ditto.
18048 (_mm256_srai_epi64): Ditto.
18049 (_mm256_mask_srai_epi64): Ditto.
18050 (_mm256_maskz_srai_epi64): Ditto.
18051 (_mm_srai_epi64): Ditto.
18052 (_mm_mask_srai_epi64): Ditto.
18053 (_mm_maskz_srai_epi64): Ditto.
18054 (_mm_mask_slli_epi32): Ditto.
18055 (_mm_maskz_slli_epi32): Ditto.
18056 (_mm_mask_slli_epi64): Ditto.
18057 (_mm_maskz_slli_epi64): Ditto.
18058 (_mm256_mask_slli_epi32): Ditto.
18059 (_mm256_maskz_slli_epi32): Ditto.
18060 (_mm256_mask_slli_epi64): Ditto.
18061 (_mm256_maskz_slli_epi64): Ditto.
18063 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18065 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
18068 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18070 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
18071 * data-streamer-out.cc (streamer_write_vrange): Same.
18072 * value-range.h (class vrange): Make streamer_write_vrange a friend.
18074 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18076 * value-query.cc (range_query::get_tree_range): Set NAN directly
18078 * value-range.cc (frange::set): Assert that bounds are not NAN.
18080 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18082 * value-range.cc (add_vrange): Handle known NANs.
18084 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18086 * value-range.h (frange::set_nan): New.
18088 2023-05-25 Alexandre Oliva <oliva@adacore.com>
18091 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
18092 requires stricter alignment than MEM's.
18094 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18096 PR tree-optimization/107822
18097 PR tree-optimization/107986
18098 * Makefile.in (OBJS): Add gimple-range-phi.o.
18099 * gimple-range-cache.h (ranger_cache::m_estimate): New
18100 phi_analyzer pointer member.
18101 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
18102 phi_analyzer if no loop info is available.
18103 * gimple-range-phi.cc: New file.
18104 * gimple-range-phi.h: New file.
18105 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
18107 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18109 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
18111 (fold_range): Add range_query parameter.
18112 (fur_relation::fur_relation): New.
18113 (fur_relation::trio): New.
18114 (fur_relation::register_relation): New.
18115 (fold_relations): New.
18116 * gimple-range-fold.h (fold_range): Adjust prototypes.
18117 (fold_relations): New.
18119 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18121 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
18122 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
18123 (ranger_cache::const_query): New.
18124 * gimple-range.cc (gimple_ranger::const_query): New.
18125 * gimple-range.h (gimple_ranger::const_query): New prototype.
18127 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18129 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
18130 (ssa_cache::dump_range_query): Delete.
18131 (ssa_lazy_cache::dump_range_query): Delete.
18132 (ssa_lazy_cache::get_range): Move from header file.
18133 (ssa_lazy_cache::clear_range): ditto.
18134 (ssa_lazy_cache::clear): Ditto.
18135 * gimple-range-cache.h (class ssa_cache): Virtualize.
18136 (class ssa_lazy_cache): Inherit and virtualize.
18138 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
18140 * value-range.h (vrange::kind): Remove.
18142 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
18144 PR middle-end/109840
18145 * match.pd <popcount optimizations>: Preserve zero-extension when
18146 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
18147 popcount((T)x), so the popcount's argument keeps the same type.
18148 <parity optimizations>: Likewise preserve extensions when
18149 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
18150 parity((T)x), so that the parity's argument type is the same.
18152 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
18154 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
18155 (ipcp_store_vr_results): Same.
18156 * ipa-prop.cc (ipa_vr::ipa_vr): New.
18157 (ipa_vr::get_vrange): New.
18158 (ipa_vr::set_unknown): New.
18159 (ipa_vr::streamer_read): New.
18160 (ipa_vr::streamer_write): New.
18161 (write_ipcp_transformation_info): Use new ipa_vr API.
18162 (read_ipcp_transformation_info): Same.
18163 (ipa_vr::nonzero_p): Delete.
18164 (ipcp_update_vr): Use new ipa_vr API.
18165 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
18166 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
18168 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
18170 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
18171 silence overflow warnings later on.
18173 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
18175 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
18176 Remove handling of V8QImode.
18177 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
18178 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
18179 (v<insn>v4qi3): Ditto.
18180 * config/i386/sse.md (v<insn>v8qi3): Remove.
18182 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18185 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
18186 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
18187 (aarch64_simd_ashr<mode>): Rename to...
18188 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
18189 (aarch64_simd_imm_shl<mode>): Rename to...
18190 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
18191 (aarch64_simd_reg_sshl<mode>): Rename to...
18192 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
18193 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
18194 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
18195 (aarch64_simd_reg_shl<mode>_signed): Rename to...
18196 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
18197 (vec_shr_<mode>): Rename to...
18198 (vec_shr_<mode><vczle><vczbe>): ... This.
18199 (aarch64_<sur>shl<mode>): Rename to...
18200 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
18201 (aarch64_<sur>q<r>shl<mode>): Rename to...
18202 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
18204 2023-05-24 Richard Biener <rguenther@suse.de>
18207 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
18208 Perform final vector composition using
18209 ix86_expand_vector_init_general instead of setting
18210 the highpart and lowpart which causes spilling.
18212 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18214 PR tree-optimization/109695
18215 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
18217 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
18218 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
18219 flag to set_global_range.
18220 (gimple_ranger::prefill_stmt_dependencies): Ditto.
18222 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18224 PR tree-optimization/109695
18225 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
18227 (temporal_cache::current_p): Check always_current method.
18228 (temporal_cache::set_always_current): Add param and set value
18230 (temporal_cache::always_current_p): New.
18231 (ranger_cache::get_global_range): Adjust.
18232 (ranger_cache::set_global_range): set always current first.
18234 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18236 PR tree-optimization/109695
18237 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
18238 fold_range with global query to choose an initial value.
18240 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18242 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
18245 2023-05-24 Richard Biener <rguenther@suse.de>
18247 PR tree-optimization/109849
18248 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
18249 expressions but take the first sets.
18251 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
18254 * doc/gm2.texi (High procedure function): New node.
18255 (Using): New menu entry for High procedure function.
18257 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
18259 PR rtl-optimization/109940
18260 * early-remat.cc (postorder_index): Rename to...
18261 (rpo_index): ...this.
18262 (compare_candidates): Sort by decreasing rpo_index rather than
18263 increasing postorder_index.
18264 (early_remat::sort_candidates): Calculate the forward RPO from
18266 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
18267 rather than DF_BACKWARD in reverse.
18269 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18272 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
18273 qualifier_none for the return operand.
18275 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18277 * config/riscv/autovec.md (<optab><mode>3): New pattern.
18278 (one_cmpl<mode>2): Ditto.
18279 (*<optab>not<mode>): Ditto.
18280 (*n<optab><mode>): Ditto.
18281 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
18284 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
18286 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
18287 calculation on n_perms by considering nvectors_per_build.
18289 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18290 Richard Sandiford <richard.sandiford@arm.com>
18292 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
18293 (vec_cmp<mode><vm>): New pattern.
18294 (vec_cmpu<mode><vm>): New pattern.
18295 (vcond<V:mode><VI:mode>): New pattern.
18296 (vcondu<V:mode><VI:mode>): New pattern.
18297 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
18298 (emit_vlmax_merge_insn): New function.
18299 (emit_vlmax_cmp_insn): Ditto.
18300 (emit_vlmax_cmp_mu_insn): Ditto.
18301 (expand_vec_cmp): Ditto.
18302 (expand_vec_cmp_float): Ditto.
18303 (expand_vcond): Ditto.
18304 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
18305 (emit_vlmax_cmp_insn): Ditto.
18306 (emit_vlmax_cmp_mu_insn): Ditto.
18307 (get_cmp_insn_code): Ditto.
18308 (expand_vec_cmp): Ditto.
18309 (expand_vec_cmp_float): Ditto.
18310 (expand_vcond): Ditto.
18312 2023-05-24 Pan Li <pan2.li@intel.com>
18314 * config/riscv/genrvv-type-indexer.cc (main): Add
18315 unsigned_eew*_lmul1_interpret for indexer.
18316 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18317 Register vuint*m1_t interpret function.
18318 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
18319 New macro for vuint8m1_t.
18320 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18321 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18322 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18323 (vbool1_t): Add to unsigned_eew*_interpret_ops.
18324 (vbool2_t): Likewise.
18325 (vbool4_t): Likewise.
18326 (vbool8_t): Likewise.
18327 (vbool16_t): Likewise.
18328 (vbool32_t): Likewise.
18329 (vbool64_t): Likewise.
18330 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
18331 New macro for vuint*m1_t.
18332 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18333 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18334 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18335 (required_extensions_p): Add vuint*m1_t interpret case.
18336 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
18337 Add vuint*m1_t interpret to base type.
18338 (unsigned_eew16_lmul1_interpret): Likewise.
18339 (unsigned_eew32_lmul1_interpret): Likewise.
18340 (unsigned_eew64_lmul1_interpret): Likewise.
18342 2023-05-24 Pan Li <pan2.li@intel.com>
18344 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
18345 for the eew size list.
18346 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
18347 (main): Add signed_eew*_lmul1_interpret for indexer.
18348 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18349 Register vint*m1_t interpret function.
18350 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
18351 New macro for vint8m1_t.
18352 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18353 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18354 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18355 (vbool1_t): Add to signed_eew*_interpret_ops.
18356 (vbool2_t): Likewise.
18357 (vbool4_t): Likewise.
18358 (vbool8_t): Likewise.
18359 (vbool16_t): Likewise.
18360 (vbool32_t): Likewise.
18361 (vbool64_t): Likewise.
18362 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
18363 New macro for vint*m1_t.
18364 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18365 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18366 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18367 (required_extensions_p): Add vint8m1_t interpret case.
18368 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
18369 Add vint*m1_t interpret to base type.
18370 (signed_eew16_lmul1_interpret): Likewise.
18371 (signed_eew32_lmul1_interpret): Likewise.
18372 (signed_eew64_lmul1_interpret): Likewise.
18374 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18376 * config/riscv/autovec.md: Adjust for new interface.
18377 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
18378 (emit_nonvlmax_insn): Add AVL operand.
18379 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
18380 (emit_nonvlmax_insn): Add AVL operand.
18381 (sew64_scalar_helper): Adjust for new interface.
18382 (expand_tuple_move): Ditto.
18383 * config/riscv/vector.md: Ditto.
18385 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18387 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
18388 (expand_const_vector): Ditto.
18389 (legitimize_move): Ditto.
18390 (sew64_scalar_helper): Ditto.
18391 (expand_tuple_move): Ditto.
18392 (expand_vector_init_insert_elems): Ditto.
18393 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
18395 2023-05-24 liuhongt <hongtao.liu@intel.com>
18398 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
18399 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
18400 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
18401 (ix86_masked_all_ones): Handle 64-bit mask.
18402 * config/i386/i386-builtin.def: Replace icode of related
18403 non-mask simd abs builtins with CODE_FOR_nothing.
18405 2023-05-23 Martin Uecker <uecker@tugraz.at>
18408 * function.cc (gimplify_parm_type): Remove function.
18409 (gimplify_parameters): Call gimplify_type_sizes.
18411 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18413 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
18414 and change to also accept '*subx' pattern.
18417 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18419 * config/xtensa/predicates.md (addsub_operator): New.
18420 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
18421 *extzvsi-1bit_addsubx): New insn_and_split patterns.
18422 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
18423 Add a special case about ifcvt 'noce_try_cmove()' to handle
18424 constant loads that do not fit into signed 12 bits in the
18425 patterns added above.
18427 2023-05-23 Richard Biener <rguenther@suse.de>
18429 PR tree-optimization/109747
18430 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
18431 the SLP node only once to the cost hook.
18433 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
18435 * config/avr/avr.cc (avr_insn_cost): New static function.
18436 (TARGET_INSN_COST): Define to that function.
18438 2023-05-23 Richard Biener <rguenther@suse.de>
18441 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
18442 For vector construction or splats apply GPR->XMM move
18443 costing. QImode memory can be handled directly only
18444 with SSE4.1 pinsrb.
18446 2023-05-23 Richard Biener <rguenther@suse.de>
18448 PR tree-optimization/108752
18449 * tree-vect-stmts.cc (vectorizable_operation): For bit
18450 operations with generic word_mode vectors do not cost
18451 an extra stmt. For plus, minus and negate also cost the
18452 constant materialization.
18454 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
18456 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
18457 Call ix86_expand_vec_shift_qihi_constant for shifts
18458 with constant count operand.
18459 * config/i386/i386.cc (ix86_shift_rotate_cost):
18460 Handle V4QImode and V8QImode.
18461 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
18462 (<insn>v4qi3): Ditto.
18464 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18466 * config/riscv/vector.md: Add mode.
18468 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
18470 PR tree-optimization/109934
18471 * value-range.cc (irange::invert): Remove buggy special case.
18473 2023-05-23 Richard Biener <rguenther@suse.de>
18475 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
18478 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
18481 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
18482 subregs between any scalars that are 64 bits or smaller.
18483 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
18484 (bits_etype): New int attribute.
18485 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
18486 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
18487 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
18489 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
18491 * doc/md.texi: Document that <FOO> can be used to refer to the
18492 numerical value of an int iterator FOO. Tweak other parts of
18493 the int iterator documentation.
18494 * read-rtl.cc (iterator_group::has_self_attr): New field.
18495 (map_attr_string): When has_self_attr is true, make <FOO>
18496 expand to the current value of iterator FOO.
18497 (initialize_iterators): Set has_self_attr for int iterators.
18499 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18501 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
18502 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
18503 (RVV_UNOP_NUM): New macro.
18504 (RVV_BINOP_NUM): Ditto.
18505 (legitimize_move): Refactor the framework of RVV auto-vectorization.
18506 (emit_vlmax_op): Ditto.
18507 (emit_vlmax_reg_op): Ditto.
18508 (emit_len_op): Ditto.
18509 (emit_len_binop): Ditto.
18510 (emit_vlmax_tany_many): Ditto.
18511 (emit_nonvlmax_tany_many): Ditto.
18512 (sew64_scalar_helper): Ditto.
18513 (expand_tuple_move): Ditto.
18514 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
18515 (emit_pred_binop): Ditto.
18516 (emit_vlmax_op): Ditto.
18517 (emit_vlmax_tany_many): New function.
18518 (emit_len_op): Remove.
18519 (emit_nonvlmax_tany_many): New function.
18520 (emit_vlmax_reg_op): Remove.
18521 (emit_len_binop): Ditto.
18522 (emit_index_op): Ditto.
18523 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
18524 (expand_const_vector): Ditto.
18525 (legitimize_move): Ditto.
18526 (sew64_scalar_helper): Ditto.
18527 (expand_tuple_move): Ditto.
18528 (expand_vector_init_insert_elems): Ditto.
18529 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
18530 * config/riscv/vector.md: Ditto.
18532 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18535 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
18536 and constraint for operand 0.
18537 (add_vec_concat_subst_be): Likewise.
18539 2023-05-23 Richard Biener <rguenther@suse.de>
18541 PR tree-optimization/109849
18542 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
18543 and use that to determine what to hoist.
18545 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
18547 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
18548 specific treatment for bit-fields only if they have an integral type
18549 and filter out non-integral bit-fields that do not start and end on
18552 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
18554 PR tree-optimization/109920
18555 * value-range.h (RESIZABLE>::~int_range): Use delete[].
18557 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
18559 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
18560 calcuation of integer vector mode costs to reflect generated
18561 instruction sequences of different integer vector modes and
18562 different target ABIs. Remove "speed" function argument.
18563 (ix86_rtx_costs): Update call for removed function argument.
18564 (ix86_vector_costs::add_stmt_cost): Ditto.
18566 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
18568 * value-range.h (class Value_Range): Implement set_zero,
18569 set_nonzero, and nonzero_p.
18571 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
18573 * config/i386/i386.cc (ix86_multiplication_cost): Add
18574 the cost of a memory read to the cost of V?QImode sequences.
18576 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18578 * config/riscv/riscv-v.cc: Add "m_" prefix.
18580 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18582 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
18583 multiple-rgroup of length.
18584 * tree-vect-stmts.cc (vectorizable_store): Ditto.
18585 (vectorizable_load): Ditto.
18586 * tree-vectorizer.h (vect_get_loop_len): Ditto.
18588 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18590 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
18593 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
18595 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
18596 handling for the case index == count.
18598 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
18601 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
18602 Don't fold to XOR / AND / XOR if just one bit is copied to the
18605 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
18607 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
18608 builtin for bit reversal using brev instruction.
18609 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
18610 NVPTX_BUILTIN_BREVLL.
18611 (nvptx_init_builtins): Define "brev" and "brevll".
18612 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
18613 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
18614 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
18615 section, document __builtin_nvptx_brev{,ll}.
18617 2023-05-21 Jakub Jelinek <jakub@redhat.com>
18619 PR tree-optimization/109505
18620 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
18621 Combine successive equal operations with constants,
18622 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
18623 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
18626 2023-05-21 Andrew Pinski <apinski@marvell.com>
18628 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
18630 2023-05-21 Pan Li <pan2.li@intel.com>
18632 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
18633 rest bool size, aka 2, 4, 8, 16, 32, 64.
18634 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18635 Register vbool[2|4|8|16|32|64] interpret function.
18636 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
18637 New macro for vbool2_t.
18638 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
18639 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
18640 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
18641 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
18642 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
18643 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
18644 (vint16m1_t): Likewise.
18645 (vint32m1_t): Likewise.
18646 (vint64m1_t): Likewise.
18647 (vuint8m1_t): Likewise.
18648 (vuint16m1_t): Likewise.
18649 (vuint32m1_t): Likewise.
18650 (vuint64m1_t): Likewise.
18651 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
18652 New macro for vbool2_t.
18653 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
18654 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
18655 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
18656 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
18657 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
18658 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
18659 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
18660 vbool2_t interprect to base type.
18661 (bool4_interpret): Likewise.
18662 (bool8_interpret): Likewise.
18663 (bool16_interpret): Likewise.
18664 (bool32_interpret): Likewise.
18665 (bool64_interpret): Likewise.
18667 2023-05-21 Andrew Pinski <apinski@marvell.com>
18669 PR middle-end/109919
18670 * expr.cc (expand_single_bit_test): Don't use the
18671 target for expand_expr.
18673 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
18675 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
18678 2023-05-20 Pan Li <pan2.li@intel.com>
18680 * mode-switching.cc (entity_map): Initialize the array to zero.
18683 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
18686 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
18687 Remove superfluous "parallel" in insn pattern.
18688 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
18689 printing error text to assembly.
18691 2023-05-20 Andrew Pinski <apinski@marvell.com>
18693 * expr.cc (fold_single_bit_test): Rename to ...
18694 (expand_single_bit_test): This and expand directly.
18695 (do_store_flag): Update for the rename function.
18697 2023-05-20 Andrew Pinski <apinski@marvell.com>
18699 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
18700 instead of shift/and.
18702 2023-05-20 Andrew Pinski <apinski@marvell.com>
18704 * expr.cc (fold_single_bit_test): Add an assert
18705 and simplify based on code being NE_EXPR or EQ_EXPR.
18707 2023-05-20 Andrew Pinski <apinski@marvell.com>
18709 * expr.cc (fold_single_bit_test): Take inner and bitnum
18710 instead of arg0 and arg1. Update the code.
18711 (do_store_flag): Don't create a tree when calling
18712 fold_single_bit_test instead just call it with the bitnum
18713 and the inner tree.
18715 2023-05-20 Andrew Pinski <apinski@marvell.com>
18717 * expr.cc (fold_single_bit_test): Use get_def_for_expr
18718 instead of checking the inner's code.
18720 2023-05-20 Andrew Pinski <apinski@marvell.com>
18722 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
18723 (fold_single_bit_test): This and simplify.
18725 2023-05-20 Andrew Pinski <apinski@marvell.com>
18727 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
18729 (fold_single_bit_test): Likewise.
18730 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
18731 (fold_single_bit_test): Likewise and make static.
18732 * fold-const.h (fold_single_bit_test): Remove declaration.
18734 2023-05-20 Die Li <lidie@eswincomputing.com>
18736 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
18739 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
18741 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
18743 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
18746 * config/riscv/bitmanip.md
18747 (<bitmanip_optab>disi2): Match with any_extend.
18748 (<bitmanip_optab>disi2_sext): New pattern to match
18749 with sign extend using an ANDI instruction.
18751 2023-05-19 Nathan Sidwell <nathan@acm.org>
18754 * opts.h (handle_deferred_dump_options): Declare.
18755 * opts-global.cc (handle_common_deferred_options): Do not handle
18757 (handle_deferred_dump_options): New.
18758 * toplev.cc (toplev::main): Call it after plugin init.
18760 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
18762 * config/riscv/constraints.md (DsS, DsD): Restore agreement
18763 with shiftm1 mode attribute.
18765 2023-05-19 Andrew Pinski <apinski@marvell.com>
18768 * gcc.cc (default_compilers["@c-header"]): Add %w
18769 after the --output-pch.
18771 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
18773 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
18774 to hival, ASHIFT the corresponding regs.
18776 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
18778 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
18780 2023-05-19 Jakub Jelinek <jakub@redhat.com>
18782 PR tree-optimization/105776
18783 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
18784 non-NULL, allow division statement to have a cast as single imm use
18785 rather than comparison/condition.
18786 (match_arith_overflow): In that case remove the cast stmt in addition
18787 to the division statement.
18789 2023-05-19 Jakub Jelinek <jakub@redhat.com>
18791 PR tree-optimization/101856
18792 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
18793 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
18794 support it but umul_highpart_optab does.
18796 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
18798 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
18799 of tree_to_shwi on array indices. Minor tweaks.
18801 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18803 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
18804 * attribs.cc (diag_attr_exclusions): Ditto.
18805 (decl_attributes): Ditto.
18806 (build_type_attribute_qual_variant): Ditto.
18807 * builtins.cc (fold_builtin_carg): Ditto.
18808 (fold_builtin_next_arg): Ditto.
18809 (do_mpc_arg2): Ditto.
18810 * cfgexpand.cc (expand_return): Ditto.
18811 * cgraph.h (decl_in_symtab_p): Ditto.
18812 (symtab_node::get_create): Ditto.
18813 * dwarf2out.cc (base_type_die): Ditto.
18814 (implicit_ptr_descriptor): Ditto.
18815 (gen_array_type_die): Ditto.
18816 (gen_type_die_with_usage): Ditto.
18817 (optimize_location_into_implicit_ptr): Ditto.
18818 * expr.cc (do_store_flag): Ditto.
18819 * fold-const.cc (negate_expr_p): Ditto.
18820 (fold_negate_expr_1): Ditto.
18821 (fold_convert_const): Ditto.
18822 (fold_convert_loc): Ditto.
18823 (constant_boolean_node): Ditto.
18824 (fold_binary_op_with_conditional_arg): Ditto.
18825 (build_fold_addr_expr_with_type_loc): Ditto.
18826 (fold_comparison): Ditto.
18827 (fold_checksum_tree): Ditto.
18828 (tree_unary_nonnegative_warnv_p): Ditto.
18829 (integer_valued_real_unary_p): Ditto.
18830 (fold_read_from_constant_string): Ditto.
18831 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
18832 * gimple-expr.cc (useless_type_conversion_p): Ditto.
18833 (is_gimple_reg): Ditto.
18834 (is_gimple_asm_val): Ditto.
18835 (mark_addressable): Ditto.
18836 * gimple-expr.h (is_gimple_variable): Ditto.
18837 (virtual_operand_p): Ditto.
18838 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
18839 * gimplify.cc (gimplify_bind_expr): Ditto.
18840 (gimplify_return_expr): Ditto.
18841 (gimple_add_padding_init_for_auto_var): Ditto.
18842 (gimplify_addr_expr): Ditto.
18843 (omp_add_variable): Ditto.
18844 (omp_notice_variable): Ditto.
18845 (omp_get_base_pointer): Ditto.
18846 (omp_strip_components_and_deref): Ditto.
18847 (omp_strip_indirections): Ditto.
18848 (omp_accumulate_sibling_list): Ditto.
18849 (omp_build_struct_sibling_lists): Ditto.
18850 (gimplify_adjust_omp_clauses_1): Ditto.
18851 (gimplify_adjust_omp_clauses): Ditto.
18852 (gimplify_omp_for): Ditto.
18853 (goa_lhs_expr_p): Ditto.
18854 (gimplify_one_sizepos): Ditto.
18855 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
18856 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
18857 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
18858 (propagate_controlled_uses): Ditto.
18859 * ipa-sra.cc (type_prevails_p): Ditto.
18860 (scan_expr_access): Ditto.
18861 * optabs-tree.cc (optab_for_tree_code): Ditto.
18862 * toplev.cc (wrapup_global_declaration_1): Ditto.
18863 * trans-mem.cc (transaction_invariant_address_p): Ditto.
18864 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
18865 (verify_gimple_comparison): Ditto.
18866 (verify_gimple_assign_binary): Ditto.
18867 (verify_gimple_assign_single): Ditto.
18868 * tree-complex.cc (get_component_ssa_name): Ditto.
18869 * tree-emutls.cc (lower_emutls_2): Ditto.
18870 * tree-inline.cc (copy_tree_body_r): Ditto.
18871 (estimate_move_cost): Ditto.
18872 (copy_decl_for_dup_finish): Ditto.
18873 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
18874 (note_nonlocal_vla_type): Ditto.
18875 (convert_local_omp_clauses): Ditto.
18876 (remap_vla_decls): Ditto.
18877 (fixup_vla_decls): Ditto.
18878 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
18879 * tree-pretty-print.cc (print_declaration): Ditto.
18880 (print_call_name): Ditto.
18881 * tree-sra.cc (compare_access_positions): Ditto.
18882 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
18883 * tree-ssa-ccp.cc (get_default_value): Ditto.
18884 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
18885 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
18886 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
18887 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
18888 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
18889 * tree-ssa-sink.cc (statement_sink_location): Ditto.
18890 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
18891 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
18892 * tree-ssa-uninit.cc (warn_uninit): Ditto.
18893 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
18894 (non_rewritable_mem_ref_base): Ditto.
18895 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
18896 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
18897 * tree-vect-generic.cc (do_binop): Ditto.
18899 * tree-vect-stmts.cc (vect_init_vector): Ditto.
18900 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
18901 * tree.cc (sign_mask_for): Ditto.
18902 (verify_type_variant): Ditto.
18903 (gimple_canonical_types_compatible_p): Ditto.
18904 (verify_type): Ditto.
18905 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
18906 * var-tracking.cc (prepare_call_arguments): Ditto.
18907 (vt_add_function_parameters): Ditto.
18908 * varasm.cc (decode_addr_const): Ditto.
18910 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18912 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
18913 (lower_reduction_clauses): Ditto.
18914 (lower_send_clauses): Ditto.
18915 (lower_omp_task_reductions): Ditto.
18916 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
18917 (worker_single_copy): Ditto.
18918 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
18919 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
18921 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18923 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
18925 (lto_read_body_or_constructor): Ditto.
18926 * lto-streamer-out.cc (tree_is_indexable): Ditto.
18927 (lto_output_var_decl_ref): Ditto.
18928 (DFS::DFS_write_tree_body): Ditto.
18929 (wrap_refs): Ditto.
18930 (write_symbol_extension_info): Ditto.
18932 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18934 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
18935 defines from tree.h.
18936 (aarch64_mangle_type): Ditto.
18937 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
18938 (alpha_gimplify_va_arg_1): Ditto.
18939 * config/arc/arc.cc (arc_encode_section_info): Ditto.
18940 (arc_is_aux_reg_p): Ditto.
18941 (arc_is_uncached_mem_p): Ditto.
18942 (arc_handle_aux_attribute): Ditto.
18943 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
18944 (arm_handle_cmse_nonsecure_call): Ditto.
18945 (arm_set_default_type_attributes): Ditto.
18946 (arm_is_segment_info_known): Ditto.
18947 (arm_mangle_type): Ditto.
18948 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
18949 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
18950 (avr_decl_absdata_p): Ditto.
18951 (avr_insert_attributes): Ditto.
18952 (avr_section_type_flags): Ditto.
18953 (avr_encode_section_info): Ditto.
18954 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
18955 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
18956 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
18957 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
18958 (csky_mangle_type): Ditto.
18959 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
18960 * config/darwin.cc (is_objc_metadata): Ditto.
18961 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
18962 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
18963 * config/frv/frv.cc (frv_emit_movsi): Ditto.
18964 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
18965 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
18966 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
18967 * config/i386/i386-expand.cc: Ditto.
18968 * config/i386/i386.cc (type_natural_mode): Ditto.
18969 (ix86_function_arg): Ditto.
18970 (ix86_data_alignment): Ditto.
18971 (ix86_local_alignment): Ditto.
18972 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
18973 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
18974 (i386_pe_type_dllexport_p): Ditto.
18975 (i386_pe_adjust_class_at_definition): Ditto.
18976 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
18977 (i386_pe_binds_local_p): Ditto.
18978 (i386_pe_section_type_flags): Ditto.
18979 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
18980 (ia64_gimplify_va_arg): Ditto.
18981 (ia64_in_small_data_p): Ditto.
18982 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
18983 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
18984 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
18985 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
18986 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
18987 (mcore_encode_section_info): Ditto.
18988 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
18989 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
18990 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
18991 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
18992 (pass_in_memory): Ditto.
18993 (nvptx_generate_vector_shuffle): Ditto.
18994 (nvptx_lockless_update): Ditto.
18995 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
18996 (pa_function_value): Ditto.
18997 (pa_function_arg): Ditto.
18998 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
18999 (TEXT_SPACE_P): Ditto.
19000 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
19001 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
19002 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
19003 (riscv_mangle_type): Ditto.
19004 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
19005 (rl78_addsi3_internal): Ditto.
19006 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
19007 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
19008 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
19009 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
19010 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
19011 (rs6000_function_arg_advance_1): Ditto.
19012 (rs6000_function_arg): Ditto.
19013 (rs6000_pass_by_reference): Ditto.
19014 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
19015 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
19016 (rs6000_set_default_type_attributes): Ditto.
19017 (rs6000_elf_in_small_data_p): Ditto.
19018 (IN_NAMED_SECTION): Ditto.
19019 (rs6000_xcoff_encode_section_info): Ditto.
19020 (rs6000_function_value): Ditto.
19021 (invalid_arg_for_unprototyped_fn): Ditto.
19022 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
19023 (s390_vec_n_elem): Ditto.
19024 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
19025 (s390_function_arg_integer): Ditto.
19026 (s390_return_in_memory): Ditto.
19027 (s390_encode_section_info): Ditto.
19028 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
19029 (sh_function_value): Ditto.
19030 * config/sol2.cc (solaris_insert_attributes): Ditto.
19031 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
19032 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
19033 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
19034 (xstormy16_handle_below100_attribute): Ditto.
19035 * config/v850/v850.cc (v850_encode_section_info): Ditto.
19036 (v850_insert_attributes): Ditto.
19037 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
19038 (visium_return_in_memory): Ditto.
19039 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
19041 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
19043 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
19044 (ix86_expand_vecop_qihi): Add op2vec bool variable.
19045 Do not set REG_EQUAL note.
19046 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
19048 * config/i386/i386.cc (ix86_multiplication_cost): Handle
19049 V4QImode and V8QImode.
19050 * config/i386/mmx.md (mulv8qi3): New expander.
19052 * config/i386/sse.md (mulv8qi3): Remove.
19054 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
19056 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
19058 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
19060 PR bootstrap/105831
19061 * config.gcc: Use = operator instead of ==.
19063 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
19065 PR bootstrap/105831
19066 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
19067 * configure.ac: Likewise.
19068 * configure: Regenerate.
19070 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19072 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
19073 (__ARM_mve_coerce1): Remove.
19074 (__ARM_mve_coerce2): Remove.
19075 (__ARM_mve_coerce3): Remove.
19076 (__ARM_mve_coerce_i_scalar): New.
19077 (__ARM_mve_coerce_s8_ptr): New.
19078 (__ARM_mve_coerce_u8_ptr): New.
19079 (__ARM_mve_coerce_s16_ptr): New.
19080 (__ARM_mve_coerce_u16_ptr): New.
19081 (__ARM_mve_coerce_s32_ptr): New.
19082 (__ARM_mve_coerce_u32_ptr): New.
19083 (__ARM_mve_coerce_s64_ptr): New.
19084 (__ARM_mve_coerce_u64_ptr): New.
19085 (__ARM_mve_coerce_f_scalar): New.
19086 (__ARM_mve_coerce_f16_ptr): New.
19087 (__ARM_mve_coerce_f32_ptr): New.
19088 (__arm_vst4q): Change _coerce_ overloads.
19089 (__arm_vbicq): Change _coerce_ overloads.
19090 (__arm_vld1q): Change _coerce_ overloads.
19091 (__arm_vld1q_z): Change _coerce_ overloads.
19092 (__arm_vld2q): Change _coerce_ overloads.
19093 (__arm_vld4q): Change _coerce_ overloads.
19094 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
19095 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
19096 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
19097 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
19098 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
19099 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
19100 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
19101 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
19102 (__arm_vst1q_p): Change _coerce_ overloads.
19103 (__arm_vst2q): Change _coerce_ overloads.
19104 (__arm_vst1q): Change _coerce_ overloads.
19105 (__arm_vstrhq): Change _coerce_ overloads.
19106 (__arm_vstrhq_p): Change _coerce_ overloads.
19107 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
19108 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
19109 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
19110 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
19111 (__arm_vstrwq_p): Change _coerce_ overloads.
19112 (__arm_vstrwq): Change _coerce_ overloads.
19113 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
19114 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
19115 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
19116 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
19117 (__arm_vsetq_lane): Change _coerce_ overloads.
19118 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
19119 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
19120 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
19121 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
19122 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
19123 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
19124 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
19125 (__arm_vidupq_x_u8): Change _coerce_ overloads.
19126 (__arm_vddupq_x_u8): Change _coerce_ overloads.
19127 (__arm_vidupq_x_u16): Change _coerce_ overloads.
19128 (__arm_vddupq_x_u16): Change _coerce_ overloads.
19129 (__arm_vidupq_x_u32): Change _coerce_ overloads.
19130 (__arm_vddupq_x_u32): Change _coerce_ overloads.
19131 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
19132 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
19133 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
19134 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
19135 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
19136 (__arm_vidupq_u16): Change _coerce_ overloads.
19137 (__arm_vidupq_u32): Change _coerce_ overloads.
19138 (__arm_vidupq_u8): Change _coerce_ overloads.
19139 (__arm_vddupq_u16): Change _coerce_ overloads.
19140 (__arm_vddupq_u32): Change _coerce_ overloads.
19141 (__arm_vddupq_u8): Change _coerce_ overloads.
19142 (__arm_viwdupq_m): Change _coerce_ overloads.
19143 (__arm_viwdupq_u16): Change _coerce_ overloads.
19144 (__arm_viwdupq_u32): Change _coerce_ overloads.
19145 (__arm_viwdupq_u8): Change _coerce_ overloads.
19146 (__arm_vdwdupq_m): Change _coerce_ overloads.
19147 (__arm_vdwdupq_u16): Change _coerce_ overloads.
19148 (__arm_vdwdupq_u32): Change _coerce_ overloads.
19149 (__arm_vdwdupq_u8): Change _coerce_ overloads.
19150 (__arm_vstrbq): Change _coerce_ overloads.
19151 (__arm_vstrbq_p): Change _coerce_ overloads.
19152 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
19153 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
19154 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
19155 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
19156 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
19158 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19160 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
19163 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19165 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
19166 (__arm_vadcq_u32): Likewise.
19167 (__arm_vadcq_m_s32): Likewise.
19168 (__arm_vadcq_m_u32): Likewise.
19169 (__arm_vsbcq_s32): Likewise.
19170 (__arm_vsbcq_u32): Likewise.
19171 (__arm_vsbcq_m_s32): Likewise.
19172 (__arm_vsbcq_m_u32): Likewise.
19173 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
19175 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
19177 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
19178 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
19179 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
19180 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
19181 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
19182 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
19183 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
19184 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
19185 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
19186 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
19187 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
19188 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
19189 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
19190 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
19191 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
19192 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
19193 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
19194 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
19195 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
19196 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
19197 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
19198 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
19199 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
19200 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
19201 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
19202 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
19203 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
19204 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
19205 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
19206 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
19207 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
19208 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
19209 (mve_vorrq_m_f<mode>)
19210 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
19211 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
19212 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
19213 capitalization in the emitted asm.
19215 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
19217 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
19219 (Ri): Move constraint definition from predicates.md.
19220 (Rl): Define new constraint.
19221 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
19222 missing constraint.
19223 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
19224 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
19225 op 2. Fix asm output spacing.
19226 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
19227 * config/arm/predicates.md (Ri) Move constraint to constraints.md
19228 (mve_vldrd_immediate): Move it from
19230 (mve_vstrw_immediate): New predicate.
19232 2023-05-18 Pan Li <pan2.li@intel.com>
19233 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19234 Kito Cheng <kito.cheng@sifive.com>
19235 Richard Biener <rguenther@suse.de>
19236 Richard Sandiford <richard.sandiford@arm.com>
19238 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
19239 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
19240 (struct table_elt): Extend machine_mode to 16 bits.
19241 (struct set): Ditto.
19242 * genmodes.cc (emit_mode_wider): Extend type from char to short.
19243 (emit_mode_complex): Ditto.
19244 (emit_mode_inner): Ditto.
19245 (emit_class_narrowest_mode): Ditto.
19246 * genopinit.cc (main): Extend the machine_mode limit.
19247 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
19248 re-ordered the struct fields for padding.
19249 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
19250 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
19251 (get_mode_alignment): Extend type from char to short.
19252 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
19253 removed the ATTRIBUTE_PACKED.
19254 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
19255 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
19256 m_kind to 2 bits and remove m_spare.
19257 * rtl.h (RTX_CODE_BITSIZE): New macro.
19258 (struct rtx_def): Swap both the bit size and location between the
19259 rtx_code and the machine_mode.
19260 (subreg_shape::unique_id): Extend the machine_mode limit.
19261 * rtlanal.h: Extend machine_mode to 16 bits.
19262 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
19263 bits and re-ordered the struct fields for padding.
19264 (struct tree_decl_common): Extend machine_mode to 16 bits.
19266 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
19268 * genrecog.cc (print_nonbool_test): Fix type error of
19269 switch (SUBREG_BYTE (op))'.
19271 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
19273 * common/config/riscv/riscv-common.cc: Remove
19274 trailing spaces on lines.
19275 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
19276 * config/riscv/riscv.h (enum reg_class): Likewise.
19277 * config/riscv/riscv.md: Likewise.
19279 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
19281 * config/pa/pa.md (clear_cache): New.
19283 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
19285 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
19286 parenthesis. Fix misnamed index entry.
19287 <concept>: Fix misnamed index entry.
19289 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
19291 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
19293 (*<optab>si3_mask, *<optab>di3_mask): Here.
19294 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
19295 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
19297 (*<bitmanip_optab>si3_sext_mask): Likewise.
19298 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
19299 and const_di_mask_operand.
19300 (bitmanip_rotate): New iterator.
19301 (bitmanip_optab): Add rotates.
19302 * config/riscv/predicates.md (const_si_mask_operand): Renamed
19303 from const31_operand. Generalize to handle more mask constants.
19304 (const_di_mask_operand): Similarly.
19306 2023-05-17 Jakub Jelinek <jakub@redhat.com>
19309 * config/i386/i386-builtin-types.def (FLOAT128): Use
19310 float128t_type_node rather than float128_type_node.
19312 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
19314 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
19315 FP_CONTRACT_FAST (no functional change).
19317 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
19319 * config/i386/i386.cc (ix86_multiplication_cost): Correct
19320 calcuation of integer vector mode costs to reflect generated
19321 instruction sequences of different integer vector modes and
19322 different target ABIs.
19324 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19326 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
19327 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
19328 (riscv_mode_needed): Ditto.
19329 (riscv_mode_after): Ditto.
19330 (riscv_mode_entry): Ditto.
19331 (riscv_mode_exit): Ditto.
19332 (riscv_mode_priority): Ditto.
19333 (TARGET_MODE_EMIT): New target hook.
19334 (TARGET_MODE_NEEDED): Ditto.
19335 (TARGET_MODE_AFTER): Ditto.
19336 (TARGET_MODE_ENTRY): Ditto.
19337 (TARGET_MODE_EXIT): Ditto.
19338 (TARGET_MODE_PRIORITY): Ditto.
19339 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
19340 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
19341 * config/riscv/riscv.md: Add csrwvxrm.
19342 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
19343 (vxrmsi): New pattern.
19345 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19347 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
19348 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
19349 (struct narrow_alu_def): Ditto.
19350 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
19351 (function_expander::use_exact_insn): Ditto.
19352 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
19353 (function_base::has_rounding_mode_operand_p): New function.
19355 2023-05-17 Andrew Pinski <apinski@marvell.com>
19357 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
19358 against 0 instead of calling integer_zerop.
19360 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19362 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
19363 (DEF_RVV_VXRM_ENUM): New macro.
19364 (handle_pragma_vector): Add vxrm enum register.
19365 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
19371 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19373 * value-range.h (Value_Range::operator=): New.
19375 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19377 * value-range.cc (vrange::operator=): Add a stub to copy
19378 unsupported ranges.
19379 * value-range.h (is_a <unsupported_range>): New.
19380 (Value_Range::operator=): Support copying unsupported ranges.
19382 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19384 * data-streamer-in.cc (streamer_read_real_value): New.
19385 (streamer_read_value_range): New.
19386 * data-streamer-out.cc (streamer_write_real_value): New.
19387 (streamer_write_vrange): New.
19388 * data-streamer.h (streamer_write_vrange): New.
19389 (streamer_read_value_range): New.
19391 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
19394 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
19395 is ignored for a fixed underlying type.
19396 (C++ Dialect Options): Likewise for -fstrict-enums.
19398 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
19400 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
19403 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19405 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
19407 (s390_atomic_align_for_mode): New.
19409 2023-05-17 Jakub Jelinek <jakub@redhat.com>
19411 * wide-int.cc (wi::from_array): Add missing closing paren in function
19414 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
19416 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
19417 suggested unroll factor once the previous analysis fails.
19419 2023-05-17 Pan Li <pan2.li@intel.com>
19421 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
19423 (main): Add bool1 to the type indexer.
19424 * config/riscv/riscv-vector-builtins-functions.def
19425 (vreinterpret): Register vbool1 interpret function.
19426 * config/riscv/riscv-vector-builtins-types.def
19427 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
19428 (vint8m1_t): Add the type to bool1_interpret_ops.
19429 (vint16m1_t): Ditto.
19430 (vint32m1_t): Ditto.
19431 (vint64m1_t): Ditto.
19432 (vuint8m1_t): Ditto.
19433 (vuint16m1_t): Ditto.
19434 (vuint32m1_t): Ditto.
19435 (vuint64m1_t): Ditto.
19436 * config/riscv/riscv-vector-builtins.cc
19437 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
19438 (required_extensions_p): Add bool1 interpret case.
19439 * config/riscv/riscv-vector-builtins.def
19440 (bool1_interpret): Add bool1 interpret to base type.
19441 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
19442 with VB dest for vreinterpret.
19444 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
19447 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
19448 constants through "lis; xoris".
19450 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
19452 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
19453 default rs6000 target pass for O2 and above.
19454 * doc/invoke.texi: Document -free
19456 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
19458 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
19459 Fix wrong select_kind...
19461 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19463 * config/s390/s390-protos.h (s390_expand_setmem): Change
19464 function signature.
19465 * config/s390/s390.cc (s390_expand_setmem): For memset's less
19466 than or equal to 256 byte do not perform a libc call.
19467 * config/s390/s390.md: Change expander into a version which
19470 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19472 * config/s390/s390-protos.h (s390_expand_movmem): New.
19473 * config/s390/s390.cc (s390_expand_movmem): New.
19474 * config/s390/s390.md (movmem<mode>): New.
19478 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19480 * config/s390/s390-protos.h (s390_expand_cpymem): Change
19481 function signature.
19482 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
19483 than or equal to 256 byte do not perform a libc call.
19484 (s390_expand_insv): Adapt new function signature of
19485 s390_expand_cpymem.
19486 * config/s390/s390.md: Change expander into a version which
19489 2023-05-16 Andrew Pinski <apinski@marvell.com>
19491 PR tree-optimization/109424
19492 * match.pd: Add patterns for min/max of zero_one_valued
19495 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19497 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
19498 * config/riscv/riscv-vector-builtins.cc
19499 (function_expander::use_ternop_insn): Add default rounding mode.
19500 (function_expander::use_widen_ternop_insn): Ditto.
19501 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
19502 (riscv_hard_regno_mode_ok): Ditto.
19503 (riscv_conditional_register_usage): Ditto.
19504 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
19505 (FRM_REG_P): Ditto.
19506 (RISCV_DWARF_FRM): Ditto.
19507 * config/riscv/riscv.md: Ditto.
19508 * config/riscv/vector-iterators.md: split no frm and has frm operations.
19509 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
19510 (@pred_<optab><mode>): Ditto.
19512 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
19514 PR tree-optimization/109695
19515 * value-range.cc (irange::operator=): Resize range.
19516 (irange::union_): Same.
19517 (irange::intersect): Same.
19518 (irange::invert): Same.
19519 (int_range_max): Default to 3 sub-ranges and resize as needed.
19520 * value-range.h (irange::maybe_resize): New.
19522 (int_range::int_range): Adjust for resizing.
19523 (int_range::operator=): Same.
19525 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
19527 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
19529 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
19530 when range changed.
19532 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19534 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
19535 * config/riscv/riscv-vector-builtins.cc
19536 (function_expander::use_exact_insn): Add default rounding mode operand.
19537 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
19538 (riscv_hard_regno_mode_ok): Ditto.
19539 (riscv_conditional_register_usage): Ditto.
19540 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
19541 (VXRM_REG_P): Ditto.
19542 (RISCV_DWARF_VXRM): Ditto.
19543 * config/riscv/riscv.md: Ditto.
19544 * config/riscv/vector.md: Ditto
19546 2023-05-15 Pan Li <pan2.li@intel.com>
19548 * optabs.cc (maybe_gen_insn): Add case to generate instruction
19549 that has 11 operands.
19551 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19553 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
19554 logic for vector modes.
19556 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19559 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
19560 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
19561 (aarch64_cmtst<mode>): Rename to...
19562 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
19563 (*aarch64_cmtst_same_<mode>): Rename to...
19564 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
19565 (*aarch64_cmtstdi): Rename to...
19566 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
19567 (aarch64_fac<optab><mode>): Rename to...
19568 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
19570 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19573 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
19574 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
19576 2023-05-15 Pan Li <pan2.li@intel.com>
19577 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19578 kito-cheng <kito.cheng@sifive.com>
19580 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
19581 deciding the mode is constant or not.
19582 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
19584 2023-05-15 Richard Biener <rguenther@suse.de>
19586 PR tree-optimization/109848
19587 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
19588 TARGET_MEM_REF address preparation before the store, not
19591 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19593 * config/riscv/riscv.cc
19594 (riscv_vectorize_preferred_vector_alignment): New function.
19595 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
19597 2023-05-14 Andrew Pinski <apinski@marvell.com>
19599 PR tree-optimization/109829
19600 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
19602 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
19605 * config/i386/i386.cc: Revert the 2023-05-11 change.
19606 (ix86_widen_mult_cost): Return high value instead of
19607 ICEing for unsupported modes.
19609 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
19611 * config/i386/i386.cc (x86_function_profiler): Take
19612 ix86_direct_extern_access into account when generating calls
19615 2023-05-14 Pan Li <pan2.li@intel.com>
19617 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
19618 Refactor the or pattern to switch cases.
19620 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
19622 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
19623 aarch64_expand_vector_init to this, and remove interleaving case.
19624 Recursively call aarch64_expand_vector_init_fallback, instead of
19625 aarch64_expand_vector_init.
19626 (aarch64_unzip_vector_init): New function.
19627 (aarch64_expand_vector_init): Likewise.
19629 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
19631 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
19632 Pull out function call from the gcc_assert.
19634 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
19636 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
19637 (policy_to_str): New.
19638 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
19640 2023-05-13 Andrew Pinski <apinski@marvell.com>
19642 PR tree-optimization/109834
19643 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
19644 (popcount(rotate(x,y))->popcount(x)): Likewise.
19646 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
19648 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
19649 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
19650 gen_extend_insn to generate zero/sign extension instructions.
19652 (ix86_expand_vecop_qihi): Initialize interleave functions
19653 for MULT code only. Fix comments.
19655 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
19658 * config/i386/mmx.md (mulv2si3): Remove expander.
19659 (mulv2si3): Rename insn pattern from *mulv2si.
19661 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
19663 PR libstdc++/109816
19664 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
19665 '!lto_stream_offload_p'.
19667 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
19668 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19671 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
19672 (local_avl_compatible_p): New.
19673 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
19674 for LCM, rewrite as a backward algorithm.
19675 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
19676 interface, handle a BB at once.
19678 2023-05-12 Richard Biener <rguenther@suse.de>
19680 PR tree-optimization/64731
19681 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
19682 handle TARGET_MEM_REF destinations of stores from vector
19685 2023-05-12 Richard Biener <rguenther@suse.de>
19687 PR tree-optimization/109791
19688 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
19690 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
19693 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19695 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
19696 * config/arm/arm-mve-builtins-base.def (vsriq): New.
19697 * config/arm/arm-mve-builtins-base.h (vsriq): New.
19698 * config/arm/arm-mve-builtins.cc
19699 (function_instance::has_inactive_argument): Handle vsriq.
19700 * config/arm/arm_mve.h (vsriq): Remove.
19702 (vsriq_n_u8): Remove.
19703 (vsriq_n_s8): Remove.
19704 (vsriq_n_u16): Remove.
19705 (vsriq_n_s16): Remove.
19706 (vsriq_n_u32): Remove.
19707 (vsriq_n_s32): Remove.
19708 (vsriq_m_n_s8): Remove.
19709 (vsriq_m_n_u8): Remove.
19710 (vsriq_m_n_s16): Remove.
19711 (vsriq_m_n_u16): Remove.
19712 (vsriq_m_n_s32): Remove.
19713 (vsriq_m_n_u32): Remove.
19714 (__arm_vsriq_n_u8): Remove.
19715 (__arm_vsriq_n_s8): Remove.
19716 (__arm_vsriq_n_u16): Remove.
19717 (__arm_vsriq_n_s16): Remove.
19718 (__arm_vsriq_n_u32): Remove.
19719 (__arm_vsriq_n_s32): Remove.
19720 (__arm_vsriq_m_n_s8): Remove.
19721 (__arm_vsriq_m_n_u8): Remove.
19722 (__arm_vsriq_m_n_s16): Remove.
19723 (__arm_vsriq_m_n_u16): Remove.
19724 (__arm_vsriq_m_n_s32): Remove.
19725 (__arm_vsriq_m_n_u32): Remove.
19726 (__arm_vsriq): Remove.
19727 (__arm_vsriq_m): Remove.
19729 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19731 * config/arm/iterators.md (mve_insn): Add vsri.
19732 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
19733 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
19734 (mve_vsriq_m_n_<supf><mode>): Rename into ...
19735 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19737 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19739 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
19740 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
19742 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19744 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
19745 * config/arm/arm-mve-builtins-base.def (vsliq): New.
19746 * config/arm/arm-mve-builtins-base.h (vsliq): New.
19747 * config/arm/arm-mve-builtins.cc
19748 (function_instance::has_inactive_argument): Handle vsliq.
19749 * config/arm/arm_mve.h (vsliq): Remove.
19751 (vsliq_n_u8): Remove.
19752 (vsliq_n_s8): Remove.
19753 (vsliq_n_u16): Remove.
19754 (vsliq_n_s16): Remove.
19755 (vsliq_n_u32): Remove.
19756 (vsliq_n_s32): Remove.
19757 (vsliq_m_n_s8): Remove.
19758 (vsliq_m_n_s32): Remove.
19759 (vsliq_m_n_s16): Remove.
19760 (vsliq_m_n_u8): Remove.
19761 (vsliq_m_n_u32): Remove.
19762 (vsliq_m_n_u16): Remove.
19763 (__arm_vsliq_n_u8): Remove.
19764 (__arm_vsliq_n_s8): Remove.
19765 (__arm_vsliq_n_u16): Remove.
19766 (__arm_vsliq_n_s16): Remove.
19767 (__arm_vsliq_n_u32): Remove.
19768 (__arm_vsliq_n_s32): Remove.
19769 (__arm_vsliq_m_n_s8): Remove.
19770 (__arm_vsliq_m_n_s32): Remove.
19771 (__arm_vsliq_m_n_s16): Remove.
19772 (__arm_vsliq_m_n_u8): Remove.
19773 (__arm_vsliq_m_n_u32): Remove.
19774 (__arm_vsliq_m_n_u16): Remove.
19775 (__arm_vsliq): Remove.
19776 (__arm_vsliq_m): Remove.
19778 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19780 * config/arm/iterators.md (mve_insn>): Add vsli.
19781 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
19782 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19783 (mve_vsliq_m_n_<supf><mode>): Rename into ...
19784 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19786 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19788 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
19789 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
19791 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19793 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
19794 * config/arm/arm-mve-builtins-base.def (vpselq): New.
19795 * config/arm/arm-mve-builtins-base.h (vpselq): New.
19796 * config/arm/arm_mve.h (vpselq): Remove.
19797 (vpselq_u8): Remove.
19798 (vpselq_s8): Remove.
19799 (vpselq_u16): Remove.
19800 (vpselq_s16): Remove.
19801 (vpselq_u32): Remove.
19802 (vpselq_s32): Remove.
19803 (vpselq_u64): Remove.
19804 (vpselq_s64): Remove.
19805 (vpselq_f16): Remove.
19806 (vpselq_f32): Remove.
19807 (__arm_vpselq_u8): Remove.
19808 (__arm_vpselq_s8): Remove.
19809 (__arm_vpselq_u16): Remove.
19810 (__arm_vpselq_s16): Remove.
19811 (__arm_vpselq_u32): Remove.
19812 (__arm_vpselq_s32): Remove.
19813 (__arm_vpselq_u64): Remove.
19814 (__arm_vpselq_s64): Remove.
19815 (__arm_vpselq_f16): Remove.
19816 (__arm_vpselq_f32): Remove.
19817 (__arm_vpselq): Remove.
19819 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19821 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
19822 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
19824 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19826 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
19828 * config/arm/iterators.md (MVE_VPSELQ_F): New.
19829 (mve_insn): Add vpsel.
19830 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
19831 (@mve_<mve_insn>q_<supf><mode>): ... this.
19832 (@mve_vpselq_f<mode>): Rename into ...
19833 (@mve_<mve_insn>q_f<mode>): ... this.
19835 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19837 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
19838 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
19839 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
19840 * config/arm/arm-mve-builtins.cc
19841 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
19843 * config/arm/arm_mve.h (vfmaq): Remove.
19847 (vfmasq_m): Remove.
19849 (vfmaq_f16): Remove.
19850 (vfmaq_n_f16): Remove.
19851 (vfmasq_n_f16): Remove.
19852 (vfmsq_f16): Remove.
19853 (vfmaq_f32): Remove.
19854 (vfmaq_n_f32): Remove.
19855 (vfmasq_n_f32): Remove.
19856 (vfmsq_f32): Remove.
19857 (vfmaq_m_f32): Remove.
19858 (vfmaq_m_f16): Remove.
19859 (vfmaq_m_n_f32): Remove.
19860 (vfmaq_m_n_f16): Remove.
19861 (vfmasq_m_n_f32): Remove.
19862 (vfmasq_m_n_f16): Remove.
19863 (vfmsq_m_f32): Remove.
19864 (vfmsq_m_f16): Remove.
19865 (__arm_vfmaq_f16): Remove.
19866 (__arm_vfmaq_n_f16): Remove.
19867 (__arm_vfmasq_n_f16): Remove.
19868 (__arm_vfmsq_f16): Remove.
19869 (__arm_vfmaq_f32): Remove.
19870 (__arm_vfmaq_n_f32): Remove.
19871 (__arm_vfmasq_n_f32): Remove.
19872 (__arm_vfmsq_f32): Remove.
19873 (__arm_vfmaq_m_f32): Remove.
19874 (__arm_vfmaq_m_f16): Remove.
19875 (__arm_vfmaq_m_n_f32): Remove.
19876 (__arm_vfmaq_m_n_f16): Remove.
19877 (__arm_vfmasq_m_n_f32): Remove.
19878 (__arm_vfmasq_m_n_f16): Remove.
19879 (__arm_vfmsq_m_f32): Remove.
19880 (__arm_vfmsq_m_f16): Remove.
19881 (__arm_vfmaq): Remove.
19882 (__arm_vfmasq): Remove.
19883 (__arm_vfmsq): Remove.
19884 (__arm_vfmaq_m): Remove.
19885 (__arm_vfmasq_m): Remove.
19886 (__arm_vfmsq_m): Remove.
19888 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19890 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
19892 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
19893 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
19894 (mve_insn): Add vfma, vfmas, vfms.
19895 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
19897 (@mve_<mve_insn>q_f<mode>): ... this.
19898 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
19899 (@mve_<mve_insn>q_n_f<mode>): ... this.
19900 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
19901 @mve_<mve_insn>q_m_f<mode>.
19902 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
19903 @mve_<mve_insn>q_m_n_f<mode>.
19905 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19907 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
19908 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
19910 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19912 * config/arm/arm-mve-builtins-base.cc
19913 (FUNCTION_WITH_RTX_M_N_NO_F): New.
19915 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
19916 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
19917 * config/arm/arm_mve.h (vmvnq): Remove.
19920 (vmvnq_s8): Remove.
19921 (vmvnq_s16): Remove.
19922 (vmvnq_s32): Remove.
19923 (vmvnq_n_s16): Remove.
19924 (vmvnq_n_s32): Remove.
19925 (vmvnq_u8): Remove.
19926 (vmvnq_u16): Remove.
19927 (vmvnq_u32): Remove.
19928 (vmvnq_n_u16): Remove.
19929 (vmvnq_n_u32): Remove.
19930 (vmvnq_m_u8): Remove.
19931 (vmvnq_m_s8): Remove.
19932 (vmvnq_m_u16): Remove.
19933 (vmvnq_m_s16): Remove.
19934 (vmvnq_m_u32): Remove.
19935 (vmvnq_m_s32): Remove.
19936 (vmvnq_m_n_s16): Remove.
19937 (vmvnq_m_n_u16): Remove.
19938 (vmvnq_m_n_s32): Remove.
19939 (vmvnq_m_n_u32): Remove.
19940 (vmvnq_x_s8): Remove.
19941 (vmvnq_x_s16): Remove.
19942 (vmvnq_x_s32): Remove.
19943 (vmvnq_x_u8): Remove.
19944 (vmvnq_x_u16): Remove.
19945 (vmvnq_x_u32): Remove.
19946 (vmvnq_x_n_s16): Remove.
19947 (vmvnq_x_n_s32): Remove.
19948 (vmvnq_x_n_u16): Remove.
19949 (vmvnq_x_n_u32): Remove.
19950 (__arm_vmvnq_s8): Remove.
19951 (__arm_vmvnq_s16): Remove.
19952 (__arm_vmvnq_s32): Remove.
19953 (__arm_vmvnq_n_s16): Remove.
19954 (__arm_vmvnq_n_s32): Remove.
19955 (__arm_vmvnq_u8): Remove.
19956 (__arm_vmvnq_u16): Remove.
19957 (__arm_vmvnq_u32): Remove.
19958 (__arm_vmvnq_n_u16): Remove.
19959 (__arm_vmvnq_n_u32): Remove.
19960 (__arm_vmvnq_m_u8): Remove.
19961 (__arm_vmvnq_m_s8): Remove.
19962 (__arm_vmvnq_m_u16): Remove.
19963 (__arm_vmvnq_m_s16): Remove.
19964 (__arm_vmvnq_m_u32): Remove.
19965 (__arm_vmvnq_m_s32): Remove.
19966 (__arm_vmvnq_m_n_s16): Remove.
19967 (__arm_vmvnq_m_n_u16): Remove.
19968 (__arm_vmvnq_m_n_s32): Remove.
19969 (__arm_vmvnq_m_n_u32): Remove.
19970 (__arm_vmvnq_x_s8): Remove.
19971 (__arm_vmvnq_x_s16): Remove.
19972 (__arm_vmvnq_x_s32): Remove.
19973 (__arm_vmvnq_x_u8): Remove.
19974 (__arm_vmvnq_x_u16): Remove.
19975 (__arm_vmvnq_x_u32): Remove.
19976 (__arm_vmvnq_x_n_s16): Remove.
19977 (__arm_vmvnq_x_n_s32): Remove.
19978 (__arm_vmvnq_x_n_u16): Remove.
19979 (__arm_vmvnq_x_n_u32): Remove.
19980 (__arm_vmvnq): Remove.
19981 (__arm_vmvnq_m): Remove.
19982 (__arm_vmvnq_x): Remove.
19984 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19986 * config/arm/iterators.md (mve_insn): Add vmvn.
19987 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
19988 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19989 (mve_vmvnq_m_<supf><mode>): Rename into ...
19990 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19991 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
19992 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19994 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19996 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
19997 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
19999 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20001 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
20002 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
20003 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
20004 * config/arm/arm_mve.h (vbrsrq): Remove.
20005 (vbrsrq_m): Remove.
20006 (vbrsrq_x): Remove.
20007 (vbrsrq_n_f16): Remove.
20008 (vbrsrq_n_f32): Remove.
20009 (vbrsrq_n_u8): Remove.
20010 (vbrsrq_n_s8): Remove.
20011 (vbrsrq_n_u16): Remove.
20012 (vbrsrq_n_s16): Remove.
20013 (vbrsrq_n_u32): Remove.
20014 (vbrsrq_n_s32): Remove.
20015 (vbrsrq_m_n_s8): Remove.
20016 (vbrsrq_m_n_s32): Remove.
20017 (vbrsrq_m_n_s16): Remove.
20018 (vbrsrq_m_n_u8): Remove.
20019 (vbrsrq_m_n_u32): Remove.
20020 (vbrsrq_m_n_u16): Remove.
20021 (vbrsrq_m_n_f32): Remove.
20022 (vbrsrq_m_n_f16): Remove.
20023 (vbrsrq_x_n_s8): Remove.
20024 (vbrsrq_x_n_s16): Remove.
20025 (vbrsrq_x_n_s32): Remove.
20026 (vbrsrq_x_n_u8): Remove.
20027 (vbrsrq_x_n_u16): Remove.
20028 (vbrsrq_x_n_u32): Remove.
20029 (vbrsrq_x_n_f16): Remove.
20030 (vbrsrq_x_n_f32): Remove.
20031 (__arm_vbrsrq_n_u8): Remove.
20032 (__arm_vbrsrq_n_s8): Remove.
20033 (__arm_vbrsrq_n_u16): Remove.
20034 (__arm_vbrsrq_n_s16): Remove.
20035 (__arm_vbrsrq_n_u32): Remove.
20036 (__arm_vbrsrq_n_s32): Remove.
20037 (__arm_vbrsrq_m_n_s8): Remove.
20038 (__arm_vbrsrq_m_n_s32): Remove.
20039 (__arm_vbrsrq_m_n_s16): Remove.
20040 (__arm_vbrsrq_m_n_u8): Remove.
20041 (__arm_vbrsrq_m_n_u32): Remove.
20042 (__arm_vbrsrq_m_n_u16): Remove.
20043 (__arm_vbrsrq_x_n_s8): Remove.
20044 (__arm_vbrsrq_x_n_s16): Remove.
20045 (__arm_vbrsrq_x_n_s32): Remove.
20046 (__arm_vbrsrq_x_n_u8): Remove.
20047 (__arm_vbrsrq_x_n_u16): Remove.
20048 (__arm_vbrsrq_x_n_u32): Remove.
20049 (__arm_vbrsrq_n_f16): Remove.
20050 (__arm_vbrsrq_n_f32): Remove.
20051 (__arm_vbrsrq_m_n_f32): Remove.
20052 (__arm_vbrsrq_m_n_f16): Remove.
20053 (__arm_vbrsrq_x_n_f16): Remove.
20054 (__arm_vbrsrq_x_n_f32): Remove.
20055 (__arm_vbrsrq): Remove.
20056 (__arm_vbrsrq_m): Remove.
20057 (__arm_vbrsrq_x): Remove.
20059 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20061 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
20062 (mve_insn): Add vbrsr.
20063 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
20064 (@mve_<mve_insn>q_n_f<mode>): ... this.
20065 (mve_vbrsrq_n_<supf><mode>): Rename into ...
20066 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20067 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
20068 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20069 (mve_vbrsrq_m_n_f<mode>): Rename into ...
20070 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
20072 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20074 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
20075 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
20077 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20079 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
20080 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
20081 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
20082 * config/arm/arm_mve.h (vqshluq): Remove.
20083 (vqshluq_m): Remove.
20084 (vqshluq_n_s8): Remove.
20085 (vqshluq_n_s16): Remove.
20086 (vqshluq_n_s32): Remove.
20087 (vqshluq_m_n_s8): Remove.
20088 (vqshluq_m_n_s16): Remove.
20089 (vqshluq_m_n_s32): Remove.
20090 (__arm_vqshluq_n_s8): Remove.
20091 (__arm_vqshluq_n_s16): Remove.
20092 (__arm_vqshluq_n_s32): Remove.
20093 (__arm_vqshluq_m_n_s8): Remove.
20094 (__arm_vqshluq_m_n_s16): Remove.
20095 (__arm_vqshluq_m_n_s32): Remove.
20096 (__arm_vqshluq): Remove.
20097 (__arm_vqshluq_m): Remove.
20099 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20101 * config/arm/iterators.md (mve_insn): Add vqshlu.
20102 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
20103 (VQSHLUQ_M_N, VQSHLUQ_N): New.
20104 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
20105 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20106 (mve_vqshluq_m_n_s<mode>): Change name into ...
20107 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20109 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20111 * config/arm/arm-mve-builtins-shapes.cc
20112 (binary_lshift_unsigned): New.
20113 * config/arm/arm-mve-builtins-shapes.h
20114 (binary_lshift_unsigned): New.
20116 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20118 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
20119 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
20120 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
20121 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
20122 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
20123 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
20124 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
20125 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
20126 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
20127 (vrmlaldavhaxq): Remove.
20128 (vrmlsldavhaq): Remove.
20129 (vrmlsldavhaxq): Remove.
20130 (vrmlaldavhaq_p): Remove.
20131 (vrmlaldavhaxq_p): Remove.
20132 (vrmlsldavhaq_p): Remove.
20133 (vrmlsldavhaxq_p): Remove.
20134 (vrmlaldavhaq_s32): Remove.
20135 (vrmlaldavhaq_u32): Remove.
20136 (vrmlaldavhaxq_s32): Remove.
20137 (vrmlsldavhaq_s32): Remove.
20138 (vrmlsldavhaxq_s32): Remove.
20139 (vrmlaldavhaq_p_s32): Remove.
20140 (vrmlaldavhaq_p_u32): Remove.
20141 (vrmlaldavhaxq_p_s32): Remove.
20142 (vrmlsldavhaq_p_s32): Remove.
20143 (vrmlsldavhaxq_p_s32): Remove.
20144 (__arm_vrmlaldavhaq_s32): Remove.
20145 (__arm_vrmlaldavhaq_u32): Remove.
20146 (__arm_vrmlaldavhaxq_s32): Remove.
20147 (__arm_vrmlsldavhaq_s32): Remove.
20148 (__arm_vrmlsldavhaxq_s32): Remove.
20149 (__arm_vrmlaldavhaq_p_s32): Remove.
20150 (__arm_vrmlaldavhaq_p_u32): Remove.
20151 (__arm_vrmlaldavhaxq_p_s32): Remove.
20152 (__arm_vrmlsldavhaq_p_s32): Remove.
20153 (__arm_vrmlsldavhaxq_p_s32): Remove.
20154 (__arm_vrmlaldavhaq): Remove.
20155 (__arm_vrmlaldavhaxq): Remove.
20156 (__arm_vrmlsldavhaq): Remove.
20157 (__arm_vrmlsldavhaxq): Remove.
20158 (__arm_vrmlaldavhaq_p): Remove.
20159 (__arm_vrmlaldavhaxq_p): Remove.
20160 (__arm_vrmlsldavhaq_p): Remove.
20161 (__arm_vrmlsldavhaxq_p): Remove.
20163 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20165 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
20166 (MVE_VRMLxLDAVHAxQ_P): New.
20167 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
20169 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
20170 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
20172 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
20173 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
20174 (mve_vrmlsldavhaq_sv4si): Merge into ...
20175 (@mve_<mve_insn>q_<supf>v4si): ... this.
20176 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
20177 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
20178 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
20179 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20181 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20183 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
20184 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
20186 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
20187 * config/arm/arm_mve.h (vqdmulltq): Remove.
20188 (vqdmullbq): Remove.
20189 (vqdmullbq_m): Remove.
20190 (vqdmulltq_m): Remove.
20191 (vqdmulltq_s16): Remove.
20192 (vqdmulltq_n_s16): Remove.
20193 (vqdmullbq_s16): Remove.
20194 (vqdmullbq_n_s16): Remove.
20195 (vqdmulltq_s32): Remove.
20196 (vqdmulltq_n_s32): Remove.
20197 (vqdmullbq_s32): Remove.
20198 (vqdmullbq_n_s32): Remove.
20199 (vqdmullbq_m_n_s32): Remove.
20200 (vqdmullbq_m_n_s16): Remove.
20201 (vqdmullbq_m_s32): Remove.
20202 (vqdmullbq_m_s16): Remove.
20203 (vqdmulltq_m_n_s32): Remove.
20204 (vqdmulltq_m_n_s16): Remove.
20205 (vqdmulltq_m_s32): Remove.
20206 (vqdmulltq_m_s16): Remove.
20207 (__arm_vqdmulltq_s16): Remove.
20208 (__arm_vqdmulltq_n_s16): Remove.
20209 (__arm_vqdmullbq_s16): Remove.
20210 (__arm_vqdmullbq_n_s16): Remove.
20211 (__arm_vqdmulltq_s32): Remove.
20212 (__arm_vqdmulltq_n_s32): Remove.
20213 (__arm_vqdmullbq_s32): Remove.
20214 (__arm_vqdmullbq_n_s32): Remove.
20215 (__arm_vqdmullbq_m_n_s32): Remove.
20216 (__arm_vqdmullbq_m_n_s16): Remove.
20217 (__arm_vqdmullbq_m_s32): Remove.
20218 (__arm_vqdmullbq_m_s16): Remove.
20219 (__arm_vqdmulltq_m_n_s32): Remove.
20220 (__arm_vqdmulltq_m_n_s16): Remove.
20221 (__arm_vqdmulltq_m_s32): Remove.
20222 (__arm_vqdmulltq_m_s16): Remove.
20223 (__arm_vqdmulltq): Remove.
20224 (__arm_vqdmullbq): Remove.
20225 (__arm_vqdmullbq_m): Remove.
20226 (__arm_vqdmulltq_m): Remove.
20228 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20230 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
20231 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
20232 (mve_insn): Add vqdmullb, vqdmullt.
20233 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
20234 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
20236 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
20237 (mve_vqdmulltq_n_s<mode>): Merge into ...
20238 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20239 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
20240 (@mve_<mve_insn>q_<supf><mode>): ... this.
20241 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
20243 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20244 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
20245 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20247 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20249 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
20250 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
20252 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
20254 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
20255 Drop unused parameter.
20256 (riscv_select_multilib): Ditto.
20257 (riscv_compute_multilib): Update call site of
20258 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
20260 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
20262 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
20263 * config/riscv/riscv-protos.h (expand_vec_init): New function.
20264 * config/riscv/riscv-v.cc (class rvv_builder): New class.
20265 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
20266 (rvv_builder::get_merged_repeating_sequence): Ditto.
20267 (expand_vector_init_insert_elems): Ditto.
20268 (expand_vec_init): Ditto.
20269 * config/riscv/vector-iterators.md: New attribute.
20271 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20273 * config/rs6000/rs6000-builtins.def
20274 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
20276 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
20277 xsiexpdpf to xsiexpdpf_di.
20278 * config/rs6000/vsx.md (xsiexpdp): Rename to...
20279 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
20280 replace TARGET_64BIT with TARGET_POWERPC64.
20281 (xsiexpdpf): Rename to...
20282 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
20283 replace TARGET_64BIT with TARGET_POWERPC64.
20285 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20287 * config/rs6000/rs6000-builtins.def
20288 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
20290 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
20293 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20295 * config/rs6000/rs6000-builtins.def
20296 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
20297 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
20299 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
20300 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
20301 TARGET_64BIT check.
20302 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
20303 requirement when it has a 64-bit argument.
20305 2023-05-12 Pan Li <pan2.li@intel.com>
20306 Richard Sandiford <richard.sandiford@arm.com>
20307 Richard Biener <rguenther@suse.de>
20308 Jakub Jelinek <jakub@redhat.com>
20310 * mux-utils.h: Add overload operator == and != for pointer_mux.
20311 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
20312 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
20313 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
20314 (dv_as_decl): Ditto.
20315 (dv_as_opaque): Removed due to unnecessary.
20316 (struct variable_hasher): Take decl_or_value as compare_type.
20317 (variable_hasher::equal): Diito.
20318 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
20319 (dv_from_value): Ditto.
20320 (attrs_list_member): Ditto.
20321 (vars_copy): Ditto.
20322 (var_reg_decl_set): Ditto.
20323 (var_reg_delete_and_set): Ditto.
20324 (find_loc_in_1pdv): Ditto.
20325 (canonicalize_values_star): Ditto.
20326 (variable_post_merge_new_vals): Ditto.
20327 (dump_onepart_variable_differences): Ditto.
20328 (variable_different_p): Ditto.
20329 (set_slot_part): Ditto.
20330 (clobber_slot_part): Ditto.
20331 (clobber_variable_part): Ditto.
20333 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
20335 * match.pd: simplify vector shift + bit_and + multiply.
20337 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20339 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
20340 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20341 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
20342 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20343 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
20344 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20345 * config/arm/arm-mve-builtins.cc
20346 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
20347 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
20348 * config/arm/arm_mve.h (vqrdmlashq): Remove.
20349 (vqrdmlahq): Remove.
20350 (vqdmlashq): Remove.
20351 (vqdmlahq): Remove.
20355 (vmlasq_m): Remove.
20356 (vqdmlashq_m): Remove.
20357 (vqdmlahq_m): Remove.
20358 (vqrdmlahq_m): Remove.
20359 (vqrdmlashq_m): Remove.
20360 (vmlasq_n_u8): Remove.
20361 (vmlaq_n_u8): Remove.
20362 (vqrdmlashq_n_s8): Remove.
20363 (vqrdmlahq_n_s8): Remove.
20364 (vqdmlahq_n_s8): Remove.
20365 (vqdmlashq_n_s8): Remove.
20366 (vmlasq_n_s8): Remove.
20367 (vmlaq_n_s8): Remove.
20368 (vmlasq_n_u16): Remove.
20369 (vmlaq_n_u16): Remove.
20370 (vqrdmlashq_n_s16): Remove.
20371 (vqrdmlahq_n_s16): Remove.
20372 (vqdmlashq_n_s16): Remove.
20373 (vqdmlahq_n_s16): Remove.
20374 (vmlasq_n_s16): Remove.
20375 (vmlaq_n_s16): Remove.
20376 (vmlasq_n_u32): Remove.
20377 (vmlaq_n_u32): Remove.
20378 (vqrdmlashq_n_s32): Remove.
20379 (vqrdmlahq_n_s32): Remove.
20380 (vqdmlashq_n_s32): Remove.
20381 (vqdmlahq_n_s32): Remove.
20382 (vmlasq_n_s32): Remove.
20383 (vmlaq_n_s32): Remove.
20384 (vmlaq_m_n_s8): Remove.
20385 (vmlaq_m_n_s32): Remove.
20386 (vmlaq_m_n_s16): Remove.
20387 (vmlaq_m_n_u8): Remove.
20388 (vmlaq_m_n_u32): Remove.
20389 (vmlaq_m_n_u16): Remove.
20390 (vmlasq_m_n_s8): Remove.
20391 (vmlasq_m_n_s32): Remove.
20392 (vmlasq_m_n_s16): Remove.
20393 (vmlasq_m_n_u8): Remove.
20394 (vmlasq_m_n_u32): Remove.
20395 (vmlasq_m_n_u16): Remove.
20396 (vqdmlashq_m_n_s8): Remove.
20397 (vqdmlashq_m_n_s32): Remove.
20398 (vqdmlashq_m_n_s16): Remove.
20399 (vqdmlahq_m_n_s8): Remove.
20400 (vqdmlahq_m_n_s32): Remove.
20401 (vqdmlahq_m_n_s16): Remove.
20402 (vqrdmlahq_m_n_s8): Remove.
20403 (vqrdmlahq_m_n_s32): Remove.
20404 (vqrdmlahq_m_n_s16): Remove.
20405 (vqrdmlashq_m_n_s8): Remove.
20406 (vqrdmlashq_m_n_s32): Remove.
20407 (vqrdmlashq_m_n_s16): Remove.
20408 (__arm_vmlasq_n_u8): Remove.
20409 (__arm_vmlaq_n_u8): Remove.
20410 (__arm_vqrdmlashq_n_s8): Remove.
20411 (__arm_vqdmlashq_n_s8): Remove.
20412 (__arm_vqrdmlahq_n_s8): Remove.
20413 (__arm_vqdmlahq_n_s8): Remove.
20414 (__arm_vmlasq_n_s8): Remove.
20415 (__arm_vmlaq_n_s8): Remove.
20416 (__arm_vmlasq_n_u16): Remove.
20417 (__arm_vmlaq_n_u16): Remove.
20418 (__arm_vqrdmlashq_n_s16): Remove.
20419 (__arm_vqdmlashq_n_s16): Remove.
20420 (__arm_vqrdmlahq_n_s16): Remove.
20421 (__arm_vqdmlahq_n_s16): Remove.
20422 (__arm_vmlasq_n_s16): Remove.
20423 (__arm_vmlaq_n_s16): Remove.
20424 (__arm_vmlasq_n_u32): Remove.
20425 (__arm_vmlaq_n_u32): Remove.
20426 (__arm_vqrdmlashq_n_s32): Remove.
20427 (__arm_vqdmlashq_n_s32): Remove.
20428 (__arm_vqrdmlahq_n_s32): Remove.
20429 (__arm_vqdmlahq_n_s32): Remove.
20430 (__arm_vmlasq_n_s32): Remove.
20431 (__arm_vmlaq_n_s32): Remove.
20432 (__arm_vmlaq_m_n_s8): Remove.
20433 (__arm_vmlaq_m_n_s32): Remove.
20434 (__arm_vmlaq_m_n_s16): Remove.
20435 (__arm_vmlaq_m_n_u8): Remove.
20436 (__arm_vmlaq_m_n_u32): Remove.
20437 (__arm_vmlaq_m_n_u16): Remove.
20438 (__arm_vmlasq_m_n_s8): Remove.
20439 (__arm_vmlasq_m_n_s32): Remove.
20440 (__arm_vmlasq_m_n_s16): Remove.
20441 (__arm_vmlasq_m_n_u8): Remove.
20442 (__arm_vmlasq_m_n_u32): Remove.
20443 (__arm_vmlasq_m_n_u16): Remove.
20444 (__arm_vqdmlahq_m_n_s8): Remove.
20445 (__arm_vqdmlahq_m_n_s32): Remove.
20446 (__arm_vqdmlahq_m_n_s16): Remove.
20447 (__arm_vqrdmlahq_m_n_s8): Remove.
20448 (__arm_vqrdmlahq_m_n_s32): Remove.
20449 (__arm_vqrdmlahq_m_n_s16): Remove.
20450 (__arm_vqrdmlashq_m_n_s8): Remove.
20451 (__arm_vqrdmlashq_m_n_s32): Remove.
20452 (__arm_vqrdmlashq_m_n_s16): Remove.
20453 (__arm_vqdmlashq_m_n_s8): Remove.
20454 (__arm_vqdmlashq_m_n_s16): Remove.
20455 (__arm_vqdmlashq_m_n_s32): Remove.
20456 (__arm_vmlasq): Remove.
20457 (__arm_vmlaq): Remove.
20458 (__arm_vqrdmlashq): Remove.
20459 (__arm_vqdmlashq): Remove.
20460 (__arm_vqrdmlahq): Remove.
20461 (__arm_vqdmlahq): Remove.
20462 (__arm_vmlaq_m): Remove.
20463 (__arm_vmlasq_m): Remove.
20464 (__arm_vqdmlahq_m): Remove.
20465 (__arm_vqrdmlahq_m): Remove.
20466 (__arm_vqrdmlashq_m): Remove.
20467 (__arm_vqdmlashq_m): Remove.
20469 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20471 * config/arm/iterators.md (MVE_VMLxQ_N): New.
20472 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
20474 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
20476 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
20477 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
20478 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
20479 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
20480 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20482 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20484 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
20485 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
20487 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20489 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
20490 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20491 (vqrdmlsdhxq): New.
20492 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
20493 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20494 (vqrdmlsdhxq): New.
20495 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
20496 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20497 (vqrdmlsdhxq): New.
20498 * config/arm/arm-mve-builtins.cc
20499 (function_instance::has_inactive_argument): Handle vqrdmladhq,
20500 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
20501 vqdmlsdhq, vqdmlsdhxq.
20502 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
20503 (vqrdmlsdhq): Remove.
20504 (vqrdmladhxq): Remove.
20505 (vqrdmladhq): Remove.
20506 (vqdmlsdhxq): Remove.
20507 (vqdmlsdhq): Remove.
20508 (vqdmladhxq): Remove.
20509 (vqdmladhq): Remove.
20510 (vqdmladhq_m): Remove.
20511 (vqdmladhxq_m): Remove.
20512 (vqdmlsdhq_m): Remove.
20513 (vqdmlsdhxq_m): Remove.
20514 (vqrdmladhq_m): Remove.
20515 (vqrdmladhxq_m): Remove.
20516 (vqrdmlsdhq_m): Remove.
20517 (vqrdmlsdhxq_m): Remove.
20518 (vqrdmlsdhxq_s8): Remove.
20519 (vqrdmlsdhq_s8): Remove.
20520 (vqrdmladhxq_s8): Remove.
20521 (vqrdmladhq_s8): Remove.
20522 (vqdmlsdhxq_s8): Remove.
20523 (vqdmlsdhq_s8): Remove.
20524 (vqdmladhxq_s8): Remove.
20525 (vqdmladhq_s8): Remove.
20526 (vqrdmlsdhxq_s16): Remove.
20527 (vqrdmlsdhq_s16): Remove.
20528 (vqrdmladhxq_s16): Remove.
20529 (vqrdmladhq_s16): Remove.
20530 (vqdmlsdhxq_s16): Remove.
20531 (vqdmlsdhq_s16): Remove.
20532 (vqdmladhxq_s16): Remove.
20533 (vqdmladhq_s16): Remove.
20534 (vqrdmlsdhxq_s32): Remove.
20535 (vqrdmlsdhq_s32): Remove.
20536 (vqrdmladhxq_s32): Remove.
20537 (vqrdmladhq_s32): Remove.
20538 (vqdmlsdhxq_s32): Remove.
20539 (vqdmlsdhq_s32): Remove.
20540 (vqdmladhxq_s32): Remove.
20541 (vqdmladhq_s32): Remove.
20542 (vqdmladhq_m_s8): Remove.
20543 (vqdmladhq_m_s32): Remove.
20544 (vqdmladhq_m_s16): Remove.
20545 (vqdmladhxq_m_s8): Remove.
20546 (vqdmladhxq_m_s32): Remove.
20547 (vqdmladhxq_m_s16): Remove.
20548 (vqdmlsdhq_m_s8): Remove.
20549 (vqdmlsdhq_m_s32): Remove.
20550 (vqdmlsdhq_m_s16): Remove.
20551 (vqdmlsdhxq_m_s8): Remove.
20552 (vqdmlsdhxq_m_s32): Remove.
20553 (vqdmlsdhxq_m_s16): Remove.
20554 (vqrdmladhq_m_s8): Remove.
20555 (vqrdmladhq_m_s32): Remove.
20556 (vqrdmladhq_m_s16): Remove.
20557 (vqrdmladhxq_m_s8): Remove.
20558 (vqrdmladhxq_m_s32): Remove.
20559 (vqrdmladhxq_m_s16): Remove.
20560 (vqrdmlsdhq_m_s8): Remove.
20561 (vqrdmlsdhq_m_s32): Remove.
20562 (vqrdmlsdhq_m_s16): Remove.
20563 (vqrdmlsdhxq_m_s8): Remove.
20564 (vqrdmlsdhxq_m_s32): Remove.
20565 (vqrdmlsdhxq_m_s16): Remove.
20566 (__arm_vqrdmlsdhxq_s8): Remove.
20567 (__arm_vqrdmlsdhq_s8): Remove.
20568 (__arm_vqrdmladhxq_s8): Remove.
20569 (__arm_vqrdmladhq_s8): Remove.
20570 (__arm_vqdmlsdhxq_s8): Remove.
20571 (__arm_vqdmlsdhq_s8): Remove.
20572 (__arm_vqdmladhxq_s8): Remove.
20573 (__arm_vqdmladhq_s8): Remove.
20574 (__arm_vqrdmlsdhxq_s16): Remove.
20575 (__arm_vqrdmlsdhq_s16): Remove.
20576 (__arm_vqrdmladhxq_s16): Remove.
20577 (__arm_vqrdmladhq_s16): Remove.
20578 (__arm_vqdmlsdhxq_s16): Remove.
20579 (__arm_vqdmlsdhq_s16): Remove.
20580 (__arm_vqdmladhxq_s16): Remove.
20581 (__arm_vqdmladhq_s16): Remove.
20582 (__arm_vqrdmlsdhxq_s32): Remove.
20583 (__arm_vqrdmlsdhq_s32): Remove.
20584 (__arm_vqrdmladhxq_s32): Remove.
20585 (__arm_vqrdmladhq_s32): Remove.
20586 (__arm_vqdmlsdhxq_s32): Remove.
20587 (__arm_vqdmlsdhq_s32): Remove.
20588 (__arm_vqdmladhxq_s32): Remove.
20589 (__arm_vqdmladhq_s32): Remove.
20590 (__arm_vqdmladhq_m_s8): Remove.
20591 (__arm_vqdmladhq_m_s32): Remove.
20592 (__arm_vqdmladhq_m_s16): Remove.
20593 (__arm_vqdmladhxq_m_s8): Remove.
20594 (__arm_vqdmladhxq_m_s32): Remove.
20595 (__arm_vqdmladhxq_m_s16): Remove.
20596 (__arm_vqdmlsdhq_m_s8): Remove.
20597 (__arm_vqdmlsdhq_m_s32): Remove.
20598 (__arm_vqdmlsdhq_m_s16): Remove.
20599 (__arm_vqdmlsdhxq_m_s8): Remove.
20600 (__arm_vqdmlsdhxq_m_s32): Remove.
20601 (__arm_vqdmlsdhxq_m_s16): Remove.
20602 (__arm_vqrdmladhq_m_s8): Remove.
20603 (__arm_vqrdmladhq_m_s32): Remove.
20604 (__arm_vqrdmladhq_m_s16): Remove.
20605 (__arm_vqrdmladhxq_m_s8): Remove.
20606 (__arm_vqrdmladhxq_m_s32): Remove.
20607 (__arm_vqrdmladhxq_m_s16): Remove.
20608 (__arm_vqrdmlsdhq_m_s8): Remove.
20609 (__arm_vqrdmlsdhq_m_s32): Remove.
20610 (__arm_vqrdmlsdhq_m_s16): Remove.
20611 (__arm_vqrdmlsdhxq_m_s8): Remove.
20612 (__arm_vqrdmlsdhxq_m_s32): Remove.
20613 (__arm_vqrdmlsdhxq_m_s16): Remove.
20614 (__arm_vqrdmlsdhxq): Remove.
20615 (__arm_vqrdmlsdhq): Remove.
20616 (__arm_vqrdmladhxq): Remove.
20617 (__arm_vqrdmladhq): Remove.
20618 (__arm_vqdmlsdhxq): Remove.
20619 (__arm_vqdmlsdhq): Remove.
20620 (__arm_vqdmladhxq): Remove.
20621 (__arm_vqdmladhq): Remove.
20622 (__arm_vqdmladhq_m): Remove.
20623 (__arm_vqdmladhxq_m): Remove.
20624 (__arm_vqdmlsdhq_m): Remove.
20625 (__arm_vqdmlsdhxq_m): Remove.
20626 (__arm_vqrdmladhq_m): Remove.
20627 (__arm_vqrdmladhxq_m): Remove.
20628 (__arm_vqrdmlsdhq_m): Remove.
20629 (__arm_vqrdmlsdhxq_m): Remove.
20631 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20633 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
20634 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
20635 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
20636 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
20637 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
20638 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
20639 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
20640 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
20641 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
20642 (mve_vqdmladhq_s<mode>): Merge into ...
20643 (@mve_<mve_insn>q_<supf><mode>): ... this.
20645 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20647 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
20648 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
20650 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20652 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
20653 (vmlsldavaq, vmlsldavaxq): New.
20654 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
20655 (vmlsldavaq, vmlsldavaxq): New.
20656 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
20657 (vmlsldavaq, vmlsldavaxq): New.
20658 * config/arm/arm_mve.h (vmlaldavaq): Remove.
20659 (vmlaldavaxq): Remove.
20660 (vmlsldavaq): Remove.
20661 (vmlsldavaxq): Remove.
20662 (vmlaldavaq_p): Remove.
20663 (vmlaldavaxq_p): Remove.
20664 (vmlsldavaq_p): Remove.
20665 (vmlsldavaxq_p): Remove.
20666 (vmlaldavaq_s16): Remove.
20667 (vmlaldavaxq_s16): Remove.
20668 (vmlsldavaq_s16): Remove.
20669 (vmlsldavaxq_s16): Remove.
20670 (vmlaldavaq_u16): Remove.
20671 (vmlaldavaq_s32): Remove.
20672 (vmlaldavaxq_s32): Remove.
20673 (vmlsldavaq_s32): Remove.
20674 (vmlsldavaxq_s32): Remove.
20675 (vmlaldavaq_u32): Remove.
20676 (vmlaldavaq_p_s32): Remove.
20677 (vmlaldavaq_p_s16): Remove.
20678 (vmlaldavaq_p_u32): Remove.
20679 (vmlaldavaq_p_u16): Remove.
20680 (vmlaldavaxq_p_s32): Remove.
20681 (vmlaldavaxq_p_s16): Remove.
20682 (vmlsldavaq_p_s32): Remove.
20683 (vmlsldavaq_p_s16): Remove.
20684 (vmlsldavaxq_p_s32): Remove.
20685 (vmlsldavaxq_p_s16): Remove.
20686 (__arm_vmlaldavaq_s16): Remove.
20687 (__arm_vmlaldavaxq_s16): Remove.
20688 (__arm_vmlsldavaq_s16): Remove.
20689 (__arm_vmlsldavaxq_s16): Remove.
20690 (__arm_vmlaldavaq_u16): Remove.
20691 (__arm_vmlaldavaq_s32): Remove.
20692 (__arm_vmlaldavaxq_s32): Remove.
20693 (__arm_vmlsldavaq_s32): Remove.
20694 (__arm_vmlsldavaxq_s32): Remove.
20695 (__arm_vmlaldavaq_u32): Remove.
20696 (__arm_vmlaldavaq_p_s32): Remove.
20697 (__arm_vmlaldavaq_p_s16): Remove.
20698 (__arm_vmlaldavaq_p_u32): Remove.
20699 (__arm_vmlaldavaq_p_u16): Remove.
20700 (__arm_vmlaldavaxq_p_s32): Remove.
20701 (__arm_vmlaldavaxq_p_s16): Remove.
20702 (__arm_vmlsldavaq_p_s32): Remove.
20703 (__arm_vmlsldavaq_p_s16): Remove.
20704 (__arm_vmlsldavaxq_p_s32): Remove.
20705 (__arm_vmlsldavaxq_p_s16): Remove.
20706 (__arm_vmlaldavaq): Remove.
20707 (__arm_vmlaldavaxq): Remove.
20708 (__arm_vmlsldavaq): Remove.
20709 (__arm_vmlsldavaxq): Remove.
20710 (__arm_vmlaldavaq_p): Remove.
20711 (__arm_vmlaldavaxq_p): Remove.
20712 (__arm_vmlsldavaq_p): Remove.
20713 (__arm_vmlsldavaxq_p): Remove.
20715 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20717 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
20719 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
20720 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
20721 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
20722 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
20723 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
20724 (mve_vmlaldavaxq_s<mode>): Merge into ...
20725 (@mve_<mve_insn>q_<supf><mode>): ... this.
20726 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
20727 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
20729 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20731 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20733 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
20734 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
20736 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20738 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
20739 (vrmlsldavhq, vrmlsldavhxq): New.
20740 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
20741 (vrmlsldavhq, vrmlsldavhxq): New.
20742 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
20743 (vrmlsldavhq, vrmlsldavhxq): New.
20744 * config/arm/arm-mve-builtins-functions.h
20745 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
20746 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
20747 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
20748 (vrmlsldavhxq): Remove.
20749 (vrmlsldavhq): Remove.
20750 (vrmlaldavhxq): Remove.
20751 (vrmlaldavhq_p): Remove.
20752 (vrmlaldavhxq_p): Remove.
20753 (vrmlsldavhq_p): Remove.
20754 (vrmlsldavhxq_p): Remove.
20755 (vrmlaldavhq_u32): Remove.
20756 (vrmlsldavhxq_s32): Remove.
20757 (vrmlsldavhq_s32): Remove.
20758 (vrmlaldavhxq_s32): Remove.
20759 (vrmlaldavhq_s32): Remove.
20760 (vrmlaldavhq_p_s32): Remove.
20761 (vrmlaldavhxq_p_s32): Remove.
20762 (vrmlsldavhq_p_s32): Remove.
20763 (vrmlsldavhxq_p_s32): Remove.
20764 (vrmlaldavhq_p_u32): Remove.
20765 (__arm_vrmlaldavhq_u32): Remove.
20766 (__arm_vrmlsldavhxq_s32): Remove.
20767 (__arm_vrmlsldavhq_s32): Remove.
20768 (__arm_vrmlaldavhxq_s32): Remove.
20769 (__arm_vrmlaldavhq_s32): Remove.
20770 (__arm_vrmlaldavhq_p_s32): Remove.
20771 (__arm_vrmlaldavhxq_p_s32): Remove.
20772 (__arm_vrmlsldavhq_p_s32): Remove.
20773 (__arm_vrmlsldavhxq_p_s32): Remove.
20774 (__arm_vrmlaldavhq_p_u32): Remove.
20775 (__arm_vrmlaldavhq): Remove.
20776 (__arm_vrmlsldavhxq): Remove.
20777 (__arm_vrmlsldavhq): Remove.
20778 (__arm_vrmlaldavhxq): Remove.
20779 (__arm_vrmlaldavhq_p): Remove.
20780 (__arm_vrmlaldavhxq_p): Remove.
20781 (__arm_vrmlsldavhq_p): Remove.
20782 (__arm_vrmlsldavhxq_p): Remove.
20784 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20786 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
20788 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
20789 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
20790 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
20791 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
20792 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
20793 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
20794 (@mve_<mve_insn>q_<supf>v4si): ... this.
20795 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
20796 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
20798 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20800 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20802 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
20803 (vmlsldavq, vmlsldavxq): New.
20804 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
20805 (vmlsldavq, vmlsldavxq): New.
20806 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
20807 (vmlsldavq, vmlsldavxq): New.
20808 * config/arm/arm_mve.h (vmlaldavq): Remove.
20809 (vmlsldavxq): Remove.
20810 (vmlsldavq): Remove.
20811 (vmlaldavxq): Remove.
20812 (vmlaldavq_p): Remove.
20813 (vmlaldavxq_p): Remove.
20814 (vmlsldavq_p): Remove.
20815 (vmlsldavxq_p): Remove.
20816 (vmlaldavq_u16): Remove.
20817 (vmlsldavxq_s16): Remove.
20818 (vmlsldavq_s16): Remove.
20819 (vmlaldavxq_s16): Remove.
20820 (vmlaldavq_s16): Remove.
20821 (vmlaldavq_u32): Remove.
20822 (vmlsldavxq_s32): Remove.
20823 (vmlsldavq_s32): Remove.
20824 (vmlaldavxq_s32): Remove.
20825 (vmlaldavq_s32): Remove.
20826 (vmlaldavq_p_s16): Remove.
20827 (vmlaldavxq_p_s16): Remove.
20828 (vmlsldavq_p_s16): Remove.
20829 (vmlsldavxq_p_s16): Remove.
20830 (vmlaldavq_p_u16): Remove.
20831 (vmlaldavq_p_s32): Remove.
20832 (vmlaldavxq_p_s32): Remove.
20833 (vmlsldavq_p_s32): Remove.
20834 (vmlsldavxq_p_s32): Remove.
20835 (vmlaldavq_p_u32): Remove.
20836 (__arm_vmlaldavq_u16): Remove.
20837 (__arm_vmlsldavxq_s16): Remove.
20838 (__arm_vmlsldavq_s16): Remove.
20839 (__arm_vmlaldavxq_s16): Remove.
20840 (__arm_vmlaldavq_s16): Remove.
20841 (__arm_vmlaldavq_u32): Remove.
20842 (__arm_vmlsldavxq_s32): Remove.
20843 (__arm_vmlsldavq_s32): Remove.
20844 (__arm_vmlaldavxq_s32): Remove.
20845 (__arm_vmlaldavq_s32): Remove.
20846 (__arm_vmlaldavq_p_s16): Remove.
20847 (__arm_vmlaldavxq_p_s16): Remove.
20848 (__arm_vmlsldavq_p_s16): Remove.
20849 (__arm_vmlsldavxq_p_s16): Remove.
20850 (__arm_vmlaldavq_p_u16): Remove.
20851 (__arm_vmlaldavq_p_s32): Remove.
20852 (__arm_vmlaldavxq_p_s32): Remove.
20853 (__arm_vmlsldavq_p_s32): Remove.
20854 (__arm_vmlsldavxq_p_s32): Remove.
20855 (__arm_vmlaldavq_p_u32): Remove.
20856 (__arm_vmlaldavq): Remove.
20857 (__arm_vmlsldavxq): Remove.
20858 (__arm_vmlsldavq): Remove.
20859 (__arm_vmlaldavxq): Remove.
20860 (__arm_vmlaldavq_p): Remove.
20861 (__arm_vmlaldavxq_p): Remove.
20862 (__arm_vmlsldavq_p): Remove.
20863 (__arm_vmlsldavxq_p): Remove.
20865 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20867 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
20868 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
20869 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
20870 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
20871 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
20872 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
20873 (mve_vmlsldavxq_s<mode>): Merge into ...
20874 (@mve_<mve_insn>q_<supf><mode>): ... this.
20875 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
20876 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
20878 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20880 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20882 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
20883 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
20885 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20887 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
20888 * config/arm/arm-mve-builtins-base.def (vabavq): New.
20889 * config/arm/arm-mve-builtins-base.h (vabavq): New.
20890 * config/arm/arm_mve.h (vabavq): Remove.
20891 (vabavq_p): Remove.
20892 (vabavq_s8): Remove.
20893 (vabavq_s16): Remove.
20894 (vabavq_s32): Remove.
20895 (vabavq_u8): Remove.
20896 (vabavq_u16): Remove.
20897 (vabavq_u32): Remove.
20898 (vabavq_p_s8): Remove.
20899 (vabavq_p_u8): Remove.
20900 (vabavq_p_s16): Remove.
20901 (vabavq_p_u16): Remove.
20902 (vabavq_p_s32): Remove.
20903 (vabavq_p_u32): Remove.
20904 (__arm_vabavq_s8): Remove.
20905 (__arm_vabavq_s16): Remove.
20906 (__arm_vabavq_s32): Remove.
20907 (__arm_vabavq_u8): Remove.
20908 (__arm_vabavq_u16): Remove.
20909 (__arm_vabavq_u32): Remove.
20910 (__arm_vabavq_p_s8): Remove.
20911 (__arm_vabavq_p_u8): Remove.
20912 (__arm_vabavq_p_s16): Remove.
20913 (__arm_vabavq_p_u16): Remove.
20914 (__arm_vabavq_p_s32): Remove.
20915 (__arm_vabavq_p_u32): Remove.
20916 (__arm_vabavq): Remove.
20917 (__arm_vabavq_p): Remove.
20919 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20921 * config/arm/iterators.md (mve_insn): Add vabav.
20922 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
20923 (@mve_<mve_insn>q_<supf><mode>): ... this,.
20924 (mve_vabavq_p_<supf><mode>): Rename into ...
20925 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
20927 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20929 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
20930 (vmlsdavaq, vmlsdavaxq): New.
20931 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
20932 (vmlsdavaq, vmlsdavaxq): New.
20933 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
20934 (vmlsdavaq, vmlsdavaxq): New.
20935 * config/arm/arm_mve.h (vmladavaq): Remove.
20936 (vmlsdavaxq): Remove.
20937 (vmlsdavaq): Remove.
20938 (vmladavaxq): Remove.
20939 (vmladavaq_p): Remove.
20940 (vmladavaxq_p): Remove.
20941 (vmlsdavaq_p): Remove.
20942 (vmlsdavaxq_p): Remove.
20943 (vmladavaq_u8): Remove.
20944 (vmlsdavaxq_s8): Remove.
20945 (vmlsdavaq_s8): Remove.
20946 (vmladavaxq_s8): Remove.
20947 (vmladavaq_s8): Remove.
20948 (vmladavaq_u16): Remove.
20949 (vmlsdavaxq_s16): Remove.
20950 (vmlsdavaq_s16): Remove.
20951 (vmladavaxq_s16): Remove.
20952 (vmladavaq_s16): Remove.
20953 (vmladavaq_u32): Remove.
20954 (vmlsdavaxq_s32): Remove.
20955 (vmlsdavaq_s32): Remove.
20956 (vmladavaxq_s32): Remove.
20957 (vmladavaq_s32): Remove.
20958 (vmladavaq_p_s8): Remove.
20959 (vmladavaq_p_s32): Remove.
20960 (vmladavaq_p_s16): Remove.
20961 (vmladavaq_p_u8): Remove.
20962 (vmladavaq_p_u32): Remove.
20963 (vmladavaq_p_u16): Remove.
20964 (vmladavaxq_p_s8): Remove.
20965 (vmladavaxq_p_s32): Remove.
20966 (vmladavaxq_p_s16): Remove.
20967 (vmlsdavaq_p_s8): Remove.
20968 (vmlsdavaq_p_s32): Remove.
20969 (vmlsdavaq_p_s16): Remove.
20970 (vmlsdavaxq_p_s8): Remove.
20971 (vmlsdavaxq_p_s32): Remove.
20972 (vmlsdavaxq_p_s16): Remove.
20973 (__arm_vmladavaq_u8): Remove.
20974 (__arm_vmlsdavaxq_s8): Remove.
20975 (__arm_vmlsdavaq_s8): Remove.
20976 (__arm_vmladavaxq_s8): Remove.
20977 (__arm_vmladavaq_s8): Remove.
20978 (__arm_vmladavaq_u16): Remove.
20979 (__arm_vmlsdavaxq_s16): Remove.
20980 (__arm_vmlsdavaq_s16): Remove.
20981 (__arm_vmladavaxq_s16): Remove.
20982 (__arm_vmladavaq_s16): Remove.
20983 (__arm_vmladavaq_u32): Remove.
20984 (__arm_vmlsdavaxq_s32): Remove.
20985 (__arm_vmlsdavaq_s32): Remove.
20986 (__arm_vmladavaxq_s32): Remove.
20987 (__arm_vmladavaq_s32): Remove.
20988 (__arm_vmladavaq_p_s8): Remove.
20989 (__arm_vmladavaq_p_s32): Remove.
20990 (__arm_vmladavaq_p_s16): Remove.
20991 (__arm_vmladavaq_p_u8): Remove.
20992 (__arm_vmladavaq_p_u32): Remove.
20993 (__arm_vmladavaq_p_u16): Remove.
20994 (__arm_vmladavaxq_p_s8): Remove.
20995 (__arm_vmladavaxq_p_s32): Remove.
20996 (__arm_vmladavaxq_p_s16): Remove.
20997 (__arm_vmlsdavaq_p_s8): Remove.
20998 (__arm_vmlsdavaq_p_s32): Remove.
20999 (__arm_vmlsdavaq_p_s16): Remove.
21000 (__arm_vmlsdavaxq_p_s8): Remove.
21001 (__arm_vmlsdavaxq_p_s32): Remove.
21002 (__arm_vmlsdavaxq_p_s16): Remove.
21003 (__arm_vmladavaq): Remove.
21004 (__arm_vmlsdavaxq): Remove.
21005 (__arm_vmlsdavaq): Remove.
21006 (__arm_vmladavaxq): Remove.
21007 (__arm_vmladavaq_p): Remove.
21008 (__arm_vmladavaxq_p): Remove.
21009 (__arm_vmlsdavaq_p): Remove.
21010 (__arm_vmlsdavaxq_p): Remove.
21012 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21014 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
21015 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
21017 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21019 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
21020 (vmlsdavq, vmlsdavxq): New.
21021 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
21022 (vmlsdavq, vmlsdavxq): New.
21023 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
21024 (vmlsdavq, vmlsdavxq): New.
21025 * config/arm/arm_mve.h (vmladavq): Remove.
21026 (vmlsdavxq): Remove.
21027 (vmlsdavq): Remove.
21028 (vmladavxq): Remove.
21029 (vmladavq_p): Remove.
21030 (vmlsdavxq_p): Remove.
21031 (vmlsdavq_p): Remove.
21032 (vmladavxq_p): Remove.
21033 (vmladavq_u8): Remove.
21034 (vmlsdavxq_s8): Remove.
21035 (vmlsdavq_s8): Remove.
21036 (vmladavxq_s8): Remove.
21037 (vmladavq_s8): Remove.
21038 (vmladavq_u16): Remove.
21039 (vmlsdavxq_s16): Remove.
21040 (vmlsdavq_s16): Remove.
21041 (vmladavxq_s16): Remove.
21042 (vmladavq_s16): Remove.
21043 (vmladavq_u32): Remove.
21044 (vmlsdavxq_s32): Remove.
21045 (vmlsdavq_s32): Remove.
21046 (vmladavxq_s32): Remove.
21047 (vmladavq_s32): Remove.
21048 (vmladavq_p_u8): Remove.
21049 (vmlsdavxq_p_s8): Remove.
21050 (vmlsdavq_p_s8): Remove.
21051 (vmladavxq_p_s8): Remove.
21052 (vmladavq_p_s8): Remove.
21053 (vmladavq_p_u16): Remove.
21054 (vmlsdavxq_p_s16): Remove.
21055 (vmlsdavq_p_s16): Remove.
21056 (vmladavxq_p_s16): Remove.
21057 (vmladavq_p_s16): Remove.
21058 (vmladavq_p_u32): Remove.
21059 (vmlsdavxq_p_s32): Remove.
21060 (vmlsdavq_p_s32): Remove.
21061 (vmladavxq_p_s32): Remove.
21062 (vmladavq_p_s32): Remove.
21063 (__arm_vmladavq_u8): Remove.
21064 (__arm_vmlsdavxq_s8): Remove.
21065 (__arm_vmlsdavq_s8): Remove.
21066 (__arm_vmladavxq_s8): Remove.
21067 (__arm_vmladavq_s8): Remove.
21068 (__arm_vmladavq_u16): Remove.
21069 (__arm_vmlsdavxq_s16): Remove.
21070 (__arm_vmlsdavq_s16): Remove.
21071 (__arm_vmladavxq_s16): Remove.
21072 (__arm_vmladavq_s16): Remove.
21073 (__arm_vmladavq_u32): Remove.
21074 (__arm_vmlsdavxq_s32): Remove.
21075 (__arm_vmlsdavq_s32): Remove.
21076 (__arm_vmladavxq_s32): Remove.
21077 (__arm_vmladavq_s32): Remove.
21078 (__arm_vmladavq_p_u8): Remove.
21079 (__arm_vmlsdavxq_p_s8): Remove.
21080 (__arm_vmlsdavq_p_s8): Remove.
21081 (__arm_vmladavxq_p_s8): Remove.
21082 (__arm_vmladavq_p_s8): Remove.
21083 (__arm_vmladavq_p_u16): Remove.
21084 (__arm_vmlsdavxq_p_s16): Remove.
21085 (__arm_vmlsdavq_p_s16): Remove.
21086 (__arm_vmladavxq_p_s16): Remove.
21087 (__arm_vmladavq_p_s16): Remove.
21088 (__arm_vmladavq_p_u32): Remove.
21089 (__arm_vmlsdavxq_p_s32): Remove.
21090 (__arm_vmlsdavq_p_s32): Remove.
21091 (__arm_vmladavxq_p_s32): Remove.
21092 (__arm_vmladavq_p_s32): Remove.
21093 (__arm_vmladavq): Remove.
21094 (__arm_vmlsdavxq): Remove.
21095 (__arm_vmlsdavq): Remove.
21096 (__arm_vmladavxq): Remove.
21097 (__arm_vmladavq_p): Remove.
21098 (__arm_vmlsdavxq_p): Remove.
21099 (__arm_vmlsdavq_p): Remove.
21100 (__arm_vmladavxq_p): Remove.
21102 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21104 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
21105 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
21106 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
21107 vmlsdavax, vmlsdav, vmlsdavx.
21108 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
21109 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
21110 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
21112 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
21113 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
21114 (mve_vmlsdavxq_s<mode>): Merge into ...
21115 (@mve_<mve_insn>q_<supf><mode>): ... this.
21116 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
21117 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
21119 (@mve_<mve_insn>q_<supf><mode>): ... this.
21120 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
21121 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
21122 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21123 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
21124 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
21126 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21128 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21130 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
21131 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
21133 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21135 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
21136 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
21137 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
21138 * config/arm/arm_mve.h (vaddlvaq): Remove.
21139 (vaddlvaq_p): Remove.
21140 (vaddlvaq_u32): Remove.
21141 (vaddlvaq_s32): Remove.
21142 (vaddlvaq_p_s32): Remove.
21143 (vaddlvaq_p_u32): Remove.
21144 (__arm_vaddlvaq_u32): Remove.
21145 (__arm_vaddlvaq_s32): Remove.
21146 (__arm_vaddlvaq_p_s32): Remove.
21147 (__arm_vaddlvaq_p_u32): Remove.
21148 (__arm_vaddlvaq): Remove.
21149 (__arm_vaddlvaq_p): Remove.
21151 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21153 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
21154 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
21156 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21158 * config/arm/iterators.md (mve_insn): Add vaddlva.
21159 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
21160 (@mve_<mve_insn>q_<supf>v4si): ... this.
21161 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
21162 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21164 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
21167 * config/i386/i386.cc (ix86_widen_mult_cost):
21168 Handle V4HImode and V2SImode.
21170 2023-05-11 Andrew Pinski <apinski@marvell.com>
21172 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
21173 defined by a phi node with more than one uses, allow for the
21174 only uses are in that same defining statement.
21176 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21178 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
21181 2023-05-11 Pan Li <pan2.li@intel.com>
21183 * config/riscv/vector.md: Add comments for simplifying to vmset.
21185 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21187 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
21189 (v<optab><mode>3): Add vector shift pattern.
21190 * config/riscv/vector-iterators.md: New iterator.
21192 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21194 * config/riscv/autovec.md: Use renamed functions.
21195 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
21196 (emit_vlmax_reg_op): To this.
21197 (emit_nonvlmax_op): Rename.
21198 (emit_len_op): To this.
21199 (emit_nonvlmax_binop): Rename.
21200 (emit_len_binop): To this.
21201 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
21202 (emit_pred_binop): Remove vlmax_p.
21203 (emit_vlmax_op): Rename.
21204 (emit_vlmax_reg_op): To this.
21205 (emit_nonvlmax_op): Rename.
21206 (emit_len_op): To this.
21207 (emit_nonvlmax_binop): Rename.
21208 (emit_len_binop): To this.
21209 (sew64_scalar_helper): Use renamed functions.
21210 (expand_tuple_move): Use renamed functions.
21211 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
21213 * config/riscv/vector.md: Use renamed functions.
21215 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21216 Michael Collison <collison@rivosinc.com>
21218 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
21219 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
21220 * config/riscv/riscv-v.cc (emit_pred_op): New function.
21221 (set_expander_dest_and_mask): New function.
21222 (emit_pred_binop): New function.
21223 (emit_nonvlmax_binop): New function.
21225 2023-05-11 Pan Li <pan2.li@intel.com>
21227 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
21228 * gimple-loop-interchange.cc
21229 (tree_loop_interchange::map_inductions_to_loop): Ditto.
21230 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
21231 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
21232 * tree-ssa-loop-manip.cc (create_iv): Ditto.
21233 (tree_transform_and_unroll_loop): Ditto.
21234 (canonicalize_loop_ivs): Ditto.
21235 * tree-ssa-loop-manip.h (create_iv): Ditto.
21236 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
21237 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
21239 (vect_set_loop_condition_normal): Ditto.
21240 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
21241 * tree-vect-stmts.cc (vectorizable_store): Ditto.
21242 (vectorizable_load): Ditto.
21244 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21246 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
21247 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
21248 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
21249 * config/arm/arm_mve.h (vmovlbq): Remove.
21251 (vmovlbq_m): Remove.
21252 (vmovltq_m): Remove.
21253 (vmovlbq_x): Remove.
21254 (vmovltq_x): Remove.
21255 (vmovlbq_s8): Remove.
21256 (vmovlbq_s16): Remove.
21257 (vmovltq_s8): Remove.
21258 (vmovltq_s16): Remove.
21259 (vmovltq_u8): Remove.
21260 (vmovltq_u16): Remove.
21261 (vmovlbq_u8): Remove.
21262 (vmovlbq_u16): Remove.
21263 (vmovlbq_m_s8): Remove.
21264 (vmovltq_m_s8): Remove.
21265 (vmovlbq_m_u8): Remove.
21266 (vmovltq_m_u8): Remove.
21267 (vmovlbq_m_s16): Remove.
21268 (vmovltq_m_s16): Remove.
21269 (vmovlbq_m_u16): Remove.
21270 (vmovltq_m_u16): Remove.
21271 (vmovlbq_x_s8): Remove.
21272 (vmovlbq_x_s16): Remove.
21273 (vmovlbq_x_u8): Remove.
21274 (vmovlbq_x_u16): Remove.
21275 (vmovltq_x_s8): Remove.
21276 (vmovltq_x_s16): Remove.
21277 (vmovltq_x_u8): Remove.
21278 (vmovltq_x_u16): Remove.
21279 (__arm_vmovlbq_s8): Remove.
21280 (__arm_vmovlbq_s16): Remove.
21281 (__arm_vmovltq_s8): Remove.
21282 (__arm_vmovltq_s16): Remove.
21283 (__arm_vmovltq_u8): Remove.
21284 (__arm_vmovltq_u16): Remove.
21285 (__arm_vmovlbq_u8): Remove.
21286 (__arm_vmovlbq_u16): Remove.
21287 (__arm_vmovlbq_m_s8): Remove.
21288 (__arm_vmovltq_m_s8): Remove.
21289 (__arm_vmovlbq_m_u8): Remove.
21290 (__arm_vmovltq_m_u8): Remove.
21291 (__arm_vmovlbq_m_s16): Remove.
21292 (__arm_vmovltq_m_s16): Remove.
21293 (__arm_vmovlbq_m_u16): Remove.
21294 (__arm_vmovltq_m_u16): Remove.
21295 (__arm_vmovlbq_x_s8): Remove.
21296 (__arm_vmovlbq_x_s16): Remove.
21297 (__arm_vmovlbq_x_u8): Remove.
21298 (__arm_vmovlbq_x_u16): Remove.
21299 (__arm_vmovltq_x_s8): Remove.
21300 (__arm_vmovltq_x_s16): Remove.
21301 (__arm_vmovltq_x_u8): Remove.
21302 (__arm_vmovltq_x_u16): Remove.
21303 (__arm_vmovlbq): Remove.
21304 (__arm_vmovltq): Remove.
21305 (__arm_vmovlbq_m): Remove.
21306 (__arm_vmovltq_m): Remove.
21307 (__arm_vmovlbq_x): Remove.
21308 (__arm_vmovltq_x): Remove.
21310 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21312 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
21313 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
21315 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21317 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
21318 (VMOVLBQ, VMOVLTQ): Merge into ...
21319 (VMOVLxQ): ... this.
21320 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
21321 (VMOVLxQ_M): ... this.
21322 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
21323 (mve_vmovlbq_<supf><mode>): Merge into ...
21324 (@mve_<mve_insn>q_<supf><mode>): ... this.
21325 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
21327 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
21329 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21331 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
21332 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
21333 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
21334 * config/arm/arm-mve-builtins-functions.h
21335 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
21336 * config/arm/arm_mve.h (vaddlvq): Remove.
21337 (vaddlvq_p): Remove.
21338 (vaddlvq_s32): Remove.
21339 (vaddlvq_u32): Remove.
21340 (vaddlvq_p_s32): Remove.
21341 (vaddlvq_p_u32): Remove.
21342 (__arm_vaddlvq_s32): Remove.
21343 (__arm_vaddlvq_u32): Remove.
21344 (__arm_vaddlvq_p_s32): Remove.
21345 (__arm_vaddlvq_p_u32): Remove.
21346 (__arm_vaddlvq): Remove.
21347 (__arm_vaddlvq_p): Remove.
21349 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21351 * config/arm/iterators.md (mve_insn): Add vaddlv.
21352 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
21353 (@mve_<mve_insn>q_<supf>v4si): ... this.
21354 (mve_vaddlvq_p_<supf>v4si): Rename into ...
21355 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21357 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21359 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
21360 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
21362 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21364 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
21365 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
21366 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
21367 * config/arm/arm_mve.h (vaddvaq): Remove.
21368 (vaddvaq_p): Remove.
21369 (vaddvaq_u8): Remove.
21370 (vaddvaq_s8): Remove.
21371 (vaddvaq_u16): Remove.
21372 (vaddvaq_s16): Remove.
21373 (vaddvaq_u32): Remove.
21374 (vaddvaq_s32): Remove.
21375 (vaddvaq_p_u8): Remove.
21376 (vaddvaq_p_s8): Remove.
21377 (vaddvaq_p_u16): Remove.
21378 (vaddvaq_p_s16): Remove.
21379 (vaddvaq_p_u32): Remove.
21380 (vaddvaq_p_s32): Remove.
21381 (__arm_vaddvaq_u8): Remove.
21382 (__arm_vaddvaq_s8): Remove.
21383 (__arm_vaddvaq_u16): Remove.
21384 (__arm_vaddvaq_s16): Remove.
21385 (__arm_vaddvaq_u32): Remove.
21386 (__arm_vaddvaq_s32): Remove.
21387 (__arm_vaddvaq_p_u8): Remove.
21388 (__arm_vaddvaq_p_s8): Remove.
21389 (__arm_vaddvaq_p_u16): Remove.
21390 (__arm_vaddvaq_p_s16): Remove.
21391 (__arm_vaddvaq_p_u32): Remove.
21392 (__arm_vaddvaq_p_s32): Remove.
21393 (__arm_vaddvaq): Remove.
21394 (__arm_vaddvaq_p): Remove.
21396 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21398 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
21399 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
21401 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21403 * config/arm/iterators.md (mve_insn): Add vaddva.
21404 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
21405 (@mve_<mve_insn>q_<supf><mode>): ... this.
21406 (mve_vaddvaq_p_<supf><mode>): Rename into ...
21407 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21409 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21411 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
21412 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
21413 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
21414 * config/arm/arm_mve.h (vaddvq): Remove.
21415 (vaddvq_p): Remove.
21416 (vaddvq_s8): Remove.
21417 (vaddvq_s16): Remove.
21418 (vaddvq_s32): Remove.
21419 (vaddvq_u8): Remove.
21420 (vaddvq_u16): Remove.
21421 (vaddvq_u32): Remove.
21422 (vaddvq_p_u8): Remove.
21423 (vaddvq_p_s8): Remove.
21424 (vaddvq_p_u16): Remove.
21425 (vaddvq_p_s16): Remove.
21426 (vaddvq_p_u32): Remove.
21427 (vaddvq_p_s32): Remove.
21428 (__arm_vaddvq_s8): Remove.
21429 (__arm_vaddvq_s16): Remove.
21430 (__arm_vaddvq_s32): Remove.
21431 (__arm_vaddvq_u8): Remove.
21432 (__arm_vaddvq_u16): Remove.
21433 (__arm_vaddvq_u32): Remove.
21434 (__arm_vaddvq_p_u8): Remove.
21435 (__arm_vaddvq_p_s8): Remove.
21436 (__arm_vaddvq_p_u16): Remove.
21437 (__arm_vaddvq_p_s16): Remove.
21438 (__arm_vaddvq_p_u32): Remove.
21439 (__arm_vaddvq_p_s32): Remove.
21440 (__arm_vaddvq): Remove.
21441 (__arm_vaddvq_p): Remove.
21443 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21445 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
21446 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
21448 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21450 * config/arm/iterators.md (mve_insn): Add vaddv.
21451 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
21452 (@mve_<mve_insn>q_<supf><mode>): ... this.
21453 (mve_vaddvq_p_<supf><mode>): Rename into ...
21454 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21455 * config/arm/vec-common.md: Use gen_mve_q instead of
21458 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21460 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
21462 * config/arm/arm-mve-builtins-base.def (vdupq): New.
21463 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
21464 * config/arm/arm_mve.h (vdupq_n): Remove.
21466 (vdupq_n_f16): Remove.
21467 (vdupq_n_f32): Remove.
21468 (vdupq_n_s8): Remove.
21469 (vdupq_n_s16): Remove.
21470 (vdupq_n_s32): Remove.
21471 (vdupq_n_u8): Remove.
21472 (vdupq_n_u16): Remove.
21473 (vdupq_n_u32): Remove.
21474 (vdupq_m_n_u8): Remove.
21475 (vdupq_m_n_s8): Remove.
21476 (vdupq_m_n_u16): Remove.
21477 (vdupq_m_n_s16): Remove.
21478 (vdupq_m_n_u32): Remove.
21479 (vdupq_m_n_s32): Remove.
21480 (vdupq_m_n_f16): Remove.
21481 (vdupq_m_n_f32): Remove.
21482 (vdupq_x_n_s8): Remove.
21483 (vdupq_x_n_s16): Remove.
21484 (vdupq_x_n_s32): Remove.
21485 (vdupq_x_n_u8): Remove.
21486 (vdupq_x_n_u16): Remove.
21487 (vdupq_x_n_u32): Remove.
21488 (vdupq_x_n_f16): Remove.
21489 (vdupq_x_n_f32): Remove.
21490 (__arm_vdupq_n_s8): Remove.
21491 (__arm_vdupq_n_s16): Remove.
21492 (__arm_vdupq_n_s32): Remove.
21493 (__arm_vdupq_n_u8): Remove.
21494 (__arm_vdupq_n_u16): Remove.
21495 (__arm_vdupq_n_u32): Remove.
21496 (__arm_vdupq_m_n_u8): Remove.
21497 (__arm_vdupq_m_n_s8): Remove.
21498 (__arm_vdupq_m_n_u16): Remove.
21499 (__arm_vdupq_m_n_s16): Remove.
21500 (__arm_vdupq_m_n_u32): Remove.
21501 (__arm_vdupq_m_n_s32): Remove.
21502 (__arm_vdupq_x_n_s8): Remove.
21503 (__arm_vdupq_x_n_s16): Remove.
21504 (__arm_vdupq_x_n_s32): Remove.
21505 (__arm_vdupq_x_n_u8): Remove.
21506 (__arm_vdupq_x_n_u16): Remove.
21507 (__arm_vdupq_x_n_u32): Remove.
21508 (__arm_vdupq_n_f16): Remove.
21509 (__arm_vdupq_n_f32): Remove.
21510 (__arm_vdupq_m_n_f16): Remove.
21511 (__arm_vdupq_m_n_f32): Remove.
21512 (__arm_vdupq_x_n_f16): Remove.
21513 (__arm_vdupq_x_n_f32): Remove.
21514 (__arm_vdupq_n): Remove.
21515 (__arm_vdupq_m): Remove.
21517 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21519 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
21520 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
21522 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21524 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
21525 (MVE_FP_N_VDUPQ_ONLY): New.
21526 (mve_insn): Add vdupq.
21527 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
21528 (@mve_<mve_insn>q_n_f<mode>): ... this.
21529 (mve_vdupq_n_<supf><mode>): Rename into ...
21530 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21531 (mve_vdupq_m_n_<supf><mode>): Rename into ...
21532 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21533 (mve_vdupq_m_n_f<mode>): Rename into ...
21534 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
21536 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21538 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
21540 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
21542 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
21544 * config/arm/arm_mve.h (vrev16q): Remove.
21547 (vrev64q_m): Remove.
21548 (vrev16q_m): Remove.
21549 (vrev32q_m): Remove.
21550 (vrev16q_x): Remove.
21551 (vrev32q_x): Remove.
21552 (vrev64q_x): Remove.
21553 (vrev64q_f16): Remove.
21554 (vrev64q_f32): Remove.
21555 (vrev32q_f16): Remove.
21556 (vrev16q_s8): Remove.
21557 (vrev32q_s8): Remove.
21558 (vrev32q_s16): Remove.
21559 (vrev64q_s8): Remove.
21560 (vrev64q_s16): Remove.
21561 (vrev64q_s32): Remove.
21562 (vrev64q_u8): Remove.
21563 (vrev64q_u16): Remove.
21564 (vrev64q_u32): Remove.
21565 (vrev32q_u8): Remove.
21566 (vrev32q_u16): Remove.
21567 (vrev16q_u8): Remove.
21568 (vrev64q_m_u8): Remove.
21569 (vrev64q_m_s8): Remove.
21570 (vrev64q_m_u16): Remove.
21571 (vrev64q_m_s16): Remove.
21572 (vrev64q_m_u32): Remove.
21573 (vrev64q_m_s32): Remove.
21574 (vrev16q_m_s8): Remove.
21575 (vrev32q_m_f16): Remove.
21576 (vrev16q_m_u8): Remove.
21577 (vrev32q_m_s8): Remove.
21578 (vrev64q_m_f16): Remove.
21579 (vrev32q_m_u8): Remove.
21580 (vrev32q_m_s16): Remove.
21581 (vrev64q_m_f32): Remove.
21582 (vrev32q_m_u16): Remove.
21583 (vrev16q_x_s8): Remove.
21584 (vrev16q_x_u8): Remove.
21585 (vrev32q_x_s8): Remove.
21586 (vrev32q_x_s16): Remove.
21587 (vrev32q_x_u8): Remove.
21588 (vrev32q_x_u16): Remove.
21589 (vrev64q_x_s8): Remove.
21590 (vrev64q_x_s16): Remove.
21591 (vrev64q_x_s32): Remove.
21592 (vrev64q_x_u8): Remove.
21593 (vrev64q_x_u16): Remove.
21594 (vrev64q_x_u32): Remove.
21595 (vrev32q_x_f16): Remove.
21596 (vrev64q_x_f16): Remove.
21597 (vrev64q_x_f32): Remove.
21598 (__arm_vrev16q_s8): Remove.
21599 (__arm_vrev32q_s8): Remove.
21600 (__arm_vrev32q_s16): Remove.
21601 (__arm_vrev64q_s8): Remove.
21602 (__arm_vrev64q_s16): Remove.
21603 (__arm_vrev64q_s32): Remove.
21604 (__arm_vrev64q_u8): Remove.
21605 (__arm_vrev64q_u16): Remove.
21606 (__arm_vrev64q_u32): Remove.
21607 (__arm_vrev32q_u8): Remove.
21608 (__arm_vrev32q_u16): Remove.
21609 (__arm_vrev16q_u8): Remove.
21610 (__arm_vrev64q_m_u8): Remove.
21611 (__arm_vrev64q_m_s8): Remove.
21612 (__arm_vrev64q_m_u16): Remove.
21613 (__arm_vrev64q_m_s16): Remove.
21614 (__arm_vrev64q_m_u32): Remove.
21615 (__arm_vrev64q_m_s32): Remove.
21616 (__arm_vrev16q_m_s8): Remove.
21617 (__arm_vrev16q_m_u8): Remove.
21618 (__arm_vrev32q_m_s8): Remove.
21619 (__arm_vrev32q_m_u8): Remove.
21620 (__arm_vrev32q_m_s16): Remove.
21621 (__arm_vrev32q_m_u16): Remove.
21622 (__arm_vrev16q_x_s8): Remove.
21623 (__arm_vrev16q_x_u8): Remove.
21624 (__arm_vrev32q_x_s8): Remove.
21625 (__arm_vrev32q_x_s16): Remove.
21626 (__arm_vrev32q_x_u8): Remove.
21627 (__arm_vrev32q_x_u16): Remove.
21628 (__arm_vrev64q_x_s8): Remove.
21629 (__arm_vrev64q_x_s16): Remove.
21630 (__arm_vrev64q_x_s32): Remove.
21631 (__arm_vrev64q_x_u8): Remove.
21632 (__arm_vrev64q_x_u16): Remove.
21633 (__arm_vrev64q_x_u32): Remove.
21634 (__arm_vrev64q_f16): Remove.
21635 (__arm_vrev64q_f32): Remove.
21636 (__arm_vrev32q_f16): Remove.
21637 (__arm_vrev32q_m_f16): Remove.
21638 (__arm_vrev64q_m_f16): Remove.
21639 (__arm_vrev64q_m_f32): Remove.
21640 (__arm_vrev32q_x_f16): Remove.
21641 (__arm_vrev64q_x_f16): Remove.
21642 (__arm_vrev64q_x_f32): Remove.
21643 (__arm_vrev16q): Remove.
21644 (__arm_vrev32q): Remove.
21645 (__arm_vrev64q): Remove.
21646 (__arm_vrev64q_m): Remove.
21647 (__arm_vrev16q_m): Remove.
21648 (__arm_vrev32q_m): Remove.
21649 (__arm_vrev16q_x): Remove.
21650 (__arm_vrev32q_x): Remove.
21651 (__arm_vrev64q_x): Remove.
21653 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21655 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
21656 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
21657 (MVE_FP_M_VREV32Q_ONLY): New iterators.
21658 (mve_insn): Add vrev16q, vrev32q, vrev64q.
21659 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
21660 (@mve_<mve_insn>q_f<mode>): ... this
21661 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
21662 (mve_vrev64q_<supf><mode>): Rename into ...
21663 (@mve_<mve_insn>q_<supf><mode>): ... this.
21664 (mve_vrev32q_<supf><mode>): Rename into
21665 @mve_<mve_insn>q_<supf><mode>.
21666 (mve_vrev16q_<supf>v16qi): Rename into
21667 @mve_<mve_insn>q_<supf><mode>.
21668 (mve_vrev64q_m_<supf><mode>): Rename into
21669 @mve_<mve_insn>q_m_<supf><mode>.
21670 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
21671 (mve_vrev32q_m_<supf><mode>): Rename into
21672 @mve_<mve_insn>q_m_<supf><mode>.
21673 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
21674 (mve_vrev16q_m_<supf>v16qi): Rename into
21675 @mve_<mve_insn>q_m_<supf><mode>.
21677 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21679 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
21680 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
21681 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
21682 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
21683 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
21684 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
21685 * config/arm/arm-mve-builtins-functions.h (class
21686 unspec_based_mve_function_exact_insn_vcmp): New.
21687 * config/arm/arm-mve-builtins.cc
21688 (function_instance::has_inactive_argument): Handle vcmp.
21689 * config/arm/arm_mve.h (vcmpneq): Remove.
21697 (vcmpneq_m): Remove.
21698 (vcmphiq_m): Remove.
21699 (vcmpeqq_m): Remove.
21700 (vcmpcsq_m): Remove.
21701 (vcmpcsq_m_n): Remove.
21702 (vcmpltq_m): Remove.
21703 (vcmpleq_m): Remove.
21704 (vcmpgtq_m): Remove.
21705 (vcmpgeq_m): Remove.
21706 (vcmpneq_s8): Remove.
21707 (vcmpneq_s16): Remove.
21708 (vcmpneq_s32): Remove.
21709 (vcmpneq_u8): Remove.
21710 (vcmpneq_u16): Remove.
21711 (vcmpneq_u32): Remove.
21712 (vcmpneq_n_u8): Remove.
21713 (vcmphiq_u8): Remove.
21714 (vcmphiq_n_u8): Remove.
21715 (vcmpeqq_u8): Remove.
21716 (vcmpeqq_n_u8): Remove.
21717 (vcmpcsq_u8): Remove.
21718 (vcmpcsq_n_u8): Remove.
21719 (vcmpneq_n_s8): Remove.
21720 (vcmpltq_s8): Remove.
21721 (vcmpltq_n_s8): Remove.
21722 (vcmpleq_s8): Remove.
21723 (vcmpleq_n_s8): Remove.
21724 (vcmpgtq_s8): Remove.
21725 (vcmpgtq_n_s8): Remove.
21726 (vcmpgeq_s8): Remove.
21727 (vcmpgeq_n_s8): Remove.
21728 (vcmpeqq_s8): Remove.
21729 (vcmpeqq_n_s8): Remove.
21730 (vcmpneq_n_u16): Remove.
21731 (vcmphiq_u16): Remove.
21732 (vcmphiq_n_u16): Remove.
21733 (vcmpeqq_u16): Remove.
21734 (vcmpeqq_n_u16): Remove.
21735 (vcmpcsq_u16): Remove.
21736 (vcmpcsq_n_u16): Remove.
21737 (vcmpneq_n_s16): Remove.
21738 (vcmpltq_s16): Remove.
21739 (vcmpltq_n_s16): Remove.
21740 (vcmpleq_s16): Remove.
21741 (vcmpleq_n_s16): Remove.
21742 (vcmpgtq_s16): Remove.
21743 (vcmpgtq_n_s16): Remove.
21744 (vcmpgeq_s16): Remove.
21745 (vcmpgeq_n_s16): Remove.
21746 (vcmpeqq_s16): Remove.
21747 (vcmpeqq_n_s16): Remove.
21748 (vcmpneq_n_u32): Remove.
21749 (vcmphiq_u32): Remove.
21750 (vcmphiq_n_u32): Remove.
21751 (vcmpeqq_u32): Remove.
21752 (vcmpeqq_n_u32): Remove.
21753 (vcmpcsq_u32): Remove.
21754 (vcmpcsq_n_u32): Remove.
21755 (vcmpneq_n_s32): Remove.
21756 (vcmpltq_s32): Remove.
21757 (vcmpltq_n_s32): Remove.
21758 (vcmpleq_s32): Remove.
21759 (vcmpleq_n_s32): Remove.
21760 (vcmpgtq_s32): Remove.
21761 (vcmpgtq_n_s32): Remove.
21762 (vcmpgeq_s32): Remove.
21763 (vcmpgeq_n_s32): Remove.
21764 (vcmpeqq_s32): Remove.
21765 (vcmpeqq_n_s32): Remove.
21766 (vcmpneq_n_f16): Remove.
21767 (vcmpneq_f16): Remove.
21768 (vcmpltq_n_f16): Remove.
21769 (vcmpltq_f16): Remove.
21770 (vcmpleq_n_f16): Remove.
21771 (vcmpleq_f16): Remove.
21772 (vcmpgtq_n_f16): Remove.
21773 (vcmpgtq_f16): Remove.
21774 (vcmpgeq_n_f16): Remove.
21775 (vcmpgeq_f16): Remove.
21776 (vcmpeqq_n_f16): Remove.
21777 (vcmpeqq_f16): Remove.
21778 (vcmpneq_n_f32): Remove.
21779 (vcmpneq_f32): Remove.
21780 (vcmpltq_n_f32): Remove.
21781 (vcmpltq_f32): Remove.
21782 (vcmpleq_n_f32): Remove.
21783 (vcmpleq_f32): Remove.
21784 (vcmpgtq_n_f32): Remove.
21785 (vcmpgtq_f32): Remove.
21786 (vcmpgeq_n_f32): Remove.
21787 (vcmpgeq_f32): Remove.
21788 (vcmpeqq_n_f32): Remove.
21789 (vcmpeqq_f32): Remove.
21790 (vcmpeqq_m_f16): Remove.
21791 (vcmpeqq_m_f32): Remove.
21792 (vcmpneq_m_u8): Remove.
21793 (vcmpneq_m_n_u8): Remove.
21794 (vcmphiq_m_u8): Remove.
21795 (vcmphiq_m_n_u8): Remove.
21796 (vcmpeqq_m_u8): Remove.
21797 (vcmpeqq_m_n_u8): Remove.
21798 (vcmpcsq_m_u8): Remove.
21799 (vcmpcsq_m_n_u8): Remove.
21800 (vcmpneq_m_s8): Remove.
21801 (vcmpneq_m_n_s8): Remove.
21802 (vcmpltq_m_s8): Remove.
21803 (vcmpltq_m_n_s8): Remove.
21804 (vcmpleq_m_s8): Remove.
21805 (vcmpleq_m_n_s8): Remove.
21806 (vcmpgtq_m_s8): Remove.
21807 (vcmpgtq_m_n_s8): Remove.
21808 (vcmpgeq_m_s8): Remove.
21809 (vcmpgeq_m_n_s8): Remove.
21810 (vcmpeqq_m_s8): Remove.
21811 (vcmpeqq_m_n_s8): Remove.
21812 (vcmpneq_m_u16): Remove.
21813 (vcmpneq_m_n_u16): Remove.
21814 (vcmphiq_m_u16): Remove.
21815 (vcmphiq_m_n_u16): Remove.
21816 (vcmpeqq_m_u16): Remove.
21817 (vcmpeqq_m_n_u16): Remove.
21818 (vcmpcsq_m_u16): Remove.
21819 (vcmpcsq_m_n_u16): Remove.
21820 (vcmpneq_m_s16): Remove.
21821 (vcmpneq_m_n_s16): Remove.
21822 (vcmpltq_m_s16): Remove.
21823 (vcmpltq_m_n_s16): Remove.
21824 (vcmpleq_m_s16): Remove.
21825 (vcmpleq_m_n_s16): Remove.
21826 (vcmpgtq_m_s16): Remove.
21827 (vcmpgtq_m_n_s16): Remove.
21828 (vcmpgeq_m_s16): Remove.
21829 (vcmpgeq_m_n_s16): Remove.
21830 (vcmpeqq_m_s16): Remove.
21831 (vcmpeqq_m_n_s16): Remove.
21832 (vcmpneq_m_u32): Remove.
21833 (vcmpneq_m_n_u32): Remove.
21834 (vcmphiq_m_u32): Remove.
21835 (vcmphiq_m_n_u32): Remove.
21836 (vcmpeqq_m_u32): Remove.
21837 (vcmpeqq_m_n_u32): Remove.
21838 (vcmpcsq_m_u32): Remove.
21839 (vcmpcsq_m_n_u32): Remove.
21840 (vcmpneq_m_s32): Remove.
21841 (vcmpneq_m_n_s32): Remove.
21842 (vcmpltq_m_s32): Remove.
21843 (vcmpltq_m_n_s32): Remove.
21844 (vcmpleq_m_s32): Remove.
21845 (vcmpleq_m_n_s32): Remove.
21846 (vcmpgtq_m_s32): Remove.
21847 (vcmpgtq_m_n_s32): Remove.
21848 (vcmpgeq_m_s32): Remove.
21849 (vcmpgeq_m_n_s32): Remove.
21850 (vcmpeqq_m_s32): Remove.
21851 (vcmpeqq_m_n_s32): Remove.
21852 (vcmpeqq_m_n_f16): Remove.
21853 (vcmpgeq_m_f16): Remove.
21854 (vcmpgeq_m_n_f16): Remove.
21855 (vcmpgtq_m_f16): Remove.
21856 (vcmpgtq_m_n_f16): Remove.
21857 (vcmpleq_m_f16): Remove.
21858 (vcmpleq_m_n_f16): Remove.
21859 (vcmpltq_m_f16): Remove.
21860 (vcmpltq_m_n_f16): Remove.
21861 (vcmpneq_m_f16): Remove.
21862 (vcmpneq_m_n_f16): Remove.
21863 (vcmpeqq_m_n_f32): Remove.
21864 (vcmpgeq_m_f32): Remove.
21865 (vcmpgeq_m_n_f32): Remove.
21866 (vcmpgtq_m_f32): Remove.
21867 (vcmpgtq_m_n_f32): Remove.
21868 (vcmpleq_m_f32): Remove.
21869 (vcmpleq_m_n_f32): Remove.
21870 (vcmpltq_m_f32): Remove.
21871 (vcmpltq_m_n_f32): Remove.
21872 (vcmpneq_m_f32): Remove.
21873 (vcmpneq_m_n_f32): Remove.
21874 (__arm_vcmpneq_s8): Remove.
21875 (__arm_vcmpneq_s16): Remove.
21876 (__arm_vcmpneq_s32): Remove.
21877 (__arm_vcmpneq_u8): Remove.
21878 (__arm_vcmpneq_u16): Remove.
21879 (__arm_vcmpneq_u32): Remove.
21880 (__arm_vcmpneq_n_u8): Remove.
21881 (__arm_vcmphiq_u8): Remove.
21882 (__arm_vcmphiq_n_u8): Remove.
21883 (__arm_vcmpeqq_u8): Remove.
21884 (__arm_vcmpeqq_n_u8): Remove.
21885 (__arm_vcmpcsq_u8): Remove.
21886 (__arm_vcmpcsq_n_u8): Remove.
21887 (__arm_vcmpneq_n_s8): Remove.
21888 (__arm_vcmpltq_s8): Remove.
21889 (__arm_vcmpltq_n_s8): Remove.
21890 (__arm_vcmpleq_s8): Remove.
21891 (__arm_vcmpleq_n_s8): Remove.
21892 (__arm_vcmpgtq_s8): Remove.
21893 (__arm_vcmpgtq_n_s8): Remove.
21894 (__arm_vcmpgeq_s8): Remove.
21895 (__arm_vcmpgeq_n_s8): Remove.
21896 (__arm_vcmpeqq_s8): Remove.
21897 (__arm_vcmpeqq_n_s8): Remove.
21898 (__arm_vcmpneq_n_u16): Remove.
21899 (__arm_vcmphiq_u16): Remove.
21900 (__arm_vcmphiq_n_u16): Remove.
21901 (__arm_vcmpeqq_u16): Remove.
21902 (__arm_vcmpeqq_n_u16): Remove.
21903 (__arm_vcmpcsq_u16): Remove.
21904 (__arm_vcmpcsq_n_u16): Remove.
21905 (__arm_vcmpneq_n_s16): Remove.
21906 (__arm_vcmpltq_s16): Remove.
21907 (__arm_vcmpltq_n_s16): Remove.
21908 (__arm_vcmpleq_s16): Remove.
21909 (__arm_vcmpleq_n_s16): Remove.
21910 (__arm_vcmpgtq_s16): Remove.
21911 (__arm_vcmpgtq_n_s16): Remove.
21912 (__arm_vcmpgeq_s16): Remove.
21913 (__arm_vcmpgeq_n_s16): Remove.
21914 (__arm_vcmpeqq_s16): Remove.
21915 (__arm_vcmpeqq_n_s16): Remove.
21916 (__arm_vcmpneq_n_u32): Remove.
21917 (__arm_vcmphiq_u32): Remove.
21918 (__arm_vcmphiq_n_u32): Remove.
21919 (__arm_vcmpeqq_u32): Remove.
21920 (__arm_vcmpeqq_n_u32): Remove.
21921 (__arm_vcmpcsq_u32): Remove.
21922 (__arm_vcmpcsq_n_u32): Remove.
21923 (__arm_vcmpneq_n_s32): Remove.
21924 (__arm_vcmpltq_s32): Remove.
21925 (__arm_vcmpltq_n_s32): Remove.
21926 (__arm_vcmpleq_s32): Remove.
21927 (__arm_vcmpleq_n_s32): Remove.
21928 (__arm_vcmpgtq_s32): Remove.
21929 (__arm_vcmpgtq_n_s32): Remove.
21930 (__arm_vcmpgeq_s32): Remove.
21931 (__arm_vcmpgeq_n_s32): Remove.
21932 (__arm_vcmpeqq_s32): Remove.
21933 (__arm_vcmpeqq_n_s32): Remove.
21934 (__arm_vcmpneq_m_u8): Remove.
21935 (__arm_vcmpneq_m_n_u8): Remove.
21936 (__arm_vcmphiq_m_u8): Remove.
21937 (__arm_vcmphiq_m_n_u8): Remove.
21938 (__arm_vcmpeqq_m_u8): Remove.
21939 (__arm_vcmpeqq_m_n_u8): Remove.
21940 (__arm_vcmpcsq_m_u8): Remove.
21941 (__arm_vcmpcsq_m_n_u8): Remove.
21942 (__arm_vcmpneq_m_s8): Remove.
21943 (__arm_vcmpneq_m_n_s8): Remove.
21944 (__arm_vcmpltq_m_s8): Remove.
21945 (__arm_vcmpltq_m_n_s8): Remove.
21946 (__arm_vcmpleq_m_s8): Remove.
21947 (__arm_vcmpleq_m_n_s8): Remove.
21948 (__arm_vcmpgtq_m_s8): Remove.
21949 (__arm_vcmpgtq_m_n_s8): Remove.
21950 (__arm_vcmpgeq_m_s8): Remove.
21951 (__arm_vcmpgeq_m_n_s8): Remove.
21952 (__arm_vcmpeqq_m_s8): Remove.
21953 (__arm_vcmpeqq_m_n_s8): Remove.
21954 (__arm_vcmpneq_m_u16): Remove.
21955 (__arm_vcmpneq_m_n_u16): Remove.
21956 (__arm_vcmphiq_m_u16): Remove.
21957 (__arm_vcmphiq_m_n_u16): Remove.
21958 (__arm_vcmpeqq_m_u16): Remove.
21959 (__arm_vcmpeqq_m_n_u16): Remove.
21960 (__arm_vcmpcsq_m_u16): Remove.
21961 (__arm_vcmpcsq_m_n_u16): Remove.
21962 (__arm_vcmpneq_m_s16): Remove.
21963 (__arm_vcmpneq_m_n_s16): Remove.
21964 (__arm_vcmpltq_m_s16): Remove.
21965 (__arm_vcmpltq_m_n_s16): Remove.
21966 (__arm_vcmpleq_m_s16): Remove.
21967 (__arm_vcmpleq_m_n_s16): Remove.
21968 (__arm_vcmpgtq_m_s16): Remove.
21969 (__arm_vcmpgtq_m_n_s16): Remove.
21970 (__arm_vcmpgeq_m_s16): Remove.
21971 (__arm_vcmpgeq_m_n_s16): Remove.
21972 (__arm_vcmpeqq_m_s16): Remove.
21973 (__arm_vcmpeqq_m_n_s16): Remove.
21974 (__arm_vcmpneq_m_u32): Remove.
21975 (__arm_vcmpneq_m_n_u32): Remove.
21976 (__arm_vcmphiq_m_u32): Remove.
21977 (__arm_vcmphiq_m_n_u32): Remove.
21978 (__arm_vcmpeqq_m_u32): Remove.
21979 (__arm_vcmpeqq_m_n_u32): Remove.
21980 (__arm_vcmpcsq_m_u32): Remove.
21981 (__arm_vcmpcsq_m_n_u32): Remove.
21982 (__arm_vcmpneq_m_s32): Remove.
21983 (__arm_vcmpneq_m_n_s32): Remove.
21984 (__arm_vcmpltq_m_s32): Remove.
21985 (__arm_vcmpltq_m_n_s32): Remove.
21986 (__arm_vcmpleq_m_s32): Remove.
21987 (__arm_vcmpleq_m_n_s32): Remove.
21988 (__arm_vcmpgtq_m_s32): Remove.
21989 (__arm_vcmpgtq_m_n_s32): Remove.
21990 (__arm_vcmpgeq_m_s32): Remove.
21991 (__arm_vcmpgeq_m_n_s32): Remove.
21992 (__arm_vcmpeqq_m_s32): Remove.
21993 (__arm_vcmpeqq_m_n_s32): Remove.
21994 (__arm_vcmpneq_n_f16): Remove.
21995 (__arm_vcmpneq_f16): Remove.
21996 (__arm_vcmpltq_n_f16): Remove.
21997 (__arm_vcmpltq_f16): Remove.
21998 (__arm_vcmpleq_n_f16): Remove.
21999 (__arm_vcmpleq_f16): Remove.
22000 (__arm_vcmpgtq_n_f16): Remove.
22001 (__arm_vcmpgtq_f16): Remove.
22002 (__arm_vcmpgeq_n_f16): Remove.
22003 (__arm_vcmpgeq_f16): Remove.
22004 (__arm_vcmpeqq_n_f16): Remove.
22005 (__arm_vcmpeqq_f16): Remove.
22006 (__arm_vcmpneq_n_f32): Remove.
22007 (__arm_vcmpneq_f32): Remove.
22008 (__arm_vcmpltq_n_f32): Remove.
22009 (__arm_vcmpltq_f32): Remove.
22010 (__arm_vcmpleq_n_f32): Remove.
22011 (__arm_vcmpleq_f32): Remove.
22012 (__arm_vcmpgtq_n_f32): Remove.
22013 (__arm_vcmpgtq_f32): Remove.
22014 (__arm_vcmpgeq_n_f32): Remove.
22015 (__arm_vcmpgeq_f32): Remove.
22016 (__arm_vcmpeqq_n_f32): Remove.
22017 (__arm_vcmpeqq_f32): Remove.
22018 (__arm_vcmpeqq_m_f16): Remove.
22019 (__arm_vcmpeqq_m_f32): Remove.
22020 (__arm_vcmpeqq_m_n_f16): Remove.
22021 (__arm_vcmpgeq_m_f16): Remove.
22022 (__arm_vcmpgeq_m_n_f16): Remove.
22023 (__arm_vcmpgtq_m_f16): Remove.
22024 (__arm_vcmpgtq_m_n_f16): Remove.
22025 (__arm_vcmpleq_m_f16): Remove.
22026 (__arm_vcmpleq_m_n_f16): Remove.
22027 (__arm_vcmpltq_m_f16): Remove.
22028 (__arm_vcmpltq_m_n_f16): Remove.
22029 (__arm_vcmpneq_m_f16): Remove.
22030 (__arm_vcmpneq_m_n_f16): Remove.
22031 (__arm_vcmpeqq_m_n_f32): Remove.
22032 (__arm_vcmpgeq_m_f32): Remove.
22033 (__arm_vcmpgeq_m_n_f32): Remove.
22034 (__arm_vcmpgtq_m_f32): Remove.
22035 (__arm_vcmpgtq_m_n_f32): Remove.
22036 (__arm_vcmpleq_m_f32): Remove.
22037 (__arm_vcmpleq_m_n_f32): Remove.
22038 (__arm_vcmpltq_m_f32): Remove.
22039 (__arm_vcmpltq_m_n_f32): Remove.
22040 (__arm_vcmpneq_m_f32): Remove.
22041 (__arm_vcmpneq_m_n_f32): Remove.
22042 (__arm_vcmpneq): Remove.
22043 (__arm_vcmphiq): Remove.
22044 (__arm_vcmpeqq): Remove.
22045 (__arm_vcmpcsq): Remove.
22046 (__arm_vcmpltq): Remove.
22047 (__arm_vcmpleq): Remove.
22048 (__arm_vcmpgtq): Remove.
22049 (__arm_vcmpgeq): Remove.
22050 (__arm_vcmpneq_m): Remove.
22051 (__arm_vcmphiq_m): Remove.
22052 (__arm_vcmpeqq_m): Remove.
22053 (__arm_vcmpcsq_m): Remove.
22054 (__arm_vcmpltq_m): Remove.
22055 (__arm_vcmpleq_m): Remove.
22056 (__arm_vcmpgtq_m): Remove.
22057 (__arm_vcmpgeq_m): Remove.
22059 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22061 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
22062 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
22064 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22066 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
22067 (MVE_CMP_M_N_F, mve_cmp_op1): New.
22070 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
22071 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
22072 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
22073 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
22074 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
22075 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
22076 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
22077 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
22078 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
22079 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
22081 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
22082 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
22083 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
22084 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
22085 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
22087 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
22088 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
22089 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
22090 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
22091 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
22093 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
22095 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
22096 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
22097 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
22100 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
22102 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
22103 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
22104 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
22105 Simplify parity(rotate(x,y)) as parity(x).
22107 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22109 * config/riscv/autovec.md (@vec_series<mode>): New pattern
22110 * config/riscv/riscv-protos.h (expand_vec_series): New function.
22111 * config/riscv/riscv-v.cc (emit_binop): Ditto.
22112 (emit_index_op): Ditto.
22113 (expand_vec_series): Ditto.
22114 (expand_const_vector): Add series vector handling.
22115 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
22117 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
22119 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
22120 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
22121 (*concat<mode><dwi>3_2): Likewise.
22122 (*concat<mode><dwi>3_3): Likewise.
22123 (*concat<mode><dwi>3_4): Likewise.
22124 (*concat<mode><dwi>3_5): Likewise.
22125 (*concat<mode><dwi>3_6): Likewise.
22126 (*concat<mode><dwi>3_7): Likewise.
22128 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
22131 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
22132 (<insn>v4qiv4hi2): New expander.
22133 (<insn>v2hiv2si2): Ditto.
22134 (<insn>v2qiv2si2): Ditto.
22135 (<insn>v2qiv2hi2): Ditto.
22137 2023-05-10 Jeff Law <jlaw@ventanamicro>
22139 * config/h8300/constraints.md (Q): Make this a special memory
22143 2023-05-10 Jakub Jelinek <jakub@redhat.com>
22146 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
22147 if t is void_list_node.
22149 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22151 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
22152 (aarch64_sqmovun<mode>_insn_be): Delete.
22153 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
22154 (aarch64_sqmovun<mode>): Delete expander.
22156 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22159 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
22161 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
22162 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
22163 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
22165 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22168 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
22170 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
22171 (aarch64_<sur>qadd<mode>): Rename to...
22172 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
22174 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22176 * config/aarch64/aarch64-simd.md
22177 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
22178 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
22179 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
22180 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
22182 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22185 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
22186 (aarch64_xtn<mode>_insn_be): Likewise.
22187 (trunc<mode><Vnarrowq>2): Rename to...
22188 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
22189 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
22190 (aarch64_<su>qmovn<mode>): Likewise.
22191 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
22192 (aarch64_<su>qmovn<mode>_insn_le): Delete.
22193 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
22195 2023-05-10 Li Xu <xuli1@eswincomputing.com>
22197 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
22198 intruction replace null avl with (const_int 0).
22200 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22202 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
22205 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22208 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
22209 (source_equal_p): Fix dead loop in vsetvl avl checking.
22211 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
22213 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
22214 of modeadjusted_dccr.
22216 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22218 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
22219 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
22220 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
22221 * config/arm/arm-mve-builtins.cc
22222 (function_instance::has_inactive_argument): Handle vmaxaq and
22224 * config/arm/arm_mve.h (vminaq): Remove.
22226 (vminaq_m): Remove.
22227 (vmaxaq_m): Remove.
22228 (vminaq_s8): Remove.
22229 (vmaxaq_s8): Remove.
22230 (vminaq_s16): Remove.
22231 (vmaxaq_s16): Remove.
22232 (vminaq_s32): Remove.
22233 (vmaxaq_s32): Remove.
22234 (vminaq_m_s8): Remove.
22235 (vmaxaq_m_s8): Remove.
22236 (vminaq_m_s16): Remove.
22237 (vmaxaq_m_s16): Remove.
22238 (vminaq_m_s32): Remove.
22239 (vmaxaq_m_s32): Remove.
22240 (__arm_vminaq_s8): Remove.
22241 (__arm_vmaxaq_s8): Remove.
22242 (__arm_vminaq_s16): Remove.
22243 (__arm_vmaxaq_s16): Remove.
22244 (__arm_vminaq_s32): Remove.
22245 (__arm_vmaxaq_s32): Remove.
22246 (__arm_vminaq_m_s8): Remove.
22247 (__arm_vmaxaq_m_s8): Remove.
22248 (__arm_vminaq_m_s16): Remove.
22249 (__arm_vmaxaq_m_s16): Remove.
22250 (__arm_vminaq_m_s32): Remove.
22251 (__arm_vmaxaq_m_s32): Remove.
22252 (__arm_vminaq): Remove.
22253 (__arm_vmaxaq): Remove.
22254 (__arm_vminaq_m): Remove.
22255 (__arm_vmaxaq_m): Remove.
22257 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22259 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
22261 (mve_insn): Add vmaxa, vmina.
22262 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
22263 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
22265 (@mve_<mve_insn>q_<supf><mode>): ... this.
22266 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
22267 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22269 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22271 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
22272 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
22274 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22276 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
22277 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
22278 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
22279 * config/arm/arm-mve-builtins.cc
22280 (function_instance::has_inactive_argument): Handle vmaxnmaq and
22282 * config/arm/arm_mve.h (vminnmaq): Remove.
22283 (vmaxnmaq): Remove.
22284 (vmaxnmaq_m): Remove.
22285 (vminnmaq_m): Remove.
22286 (vminnmaq_f16): Remove.
22287 (vmaxnmaq_f16): Remove.
22288 (vminnmaq_f32): Remove.
22289 (vmaxnmaq_f32): Remove.
22290 (vmaxnmaq_m_f16): Remove.
22291 (vminnmaq_m_f16): Remove.
22292 (vmaxnmaq_m_f32): Remove.
22293 (vminnmaq_m_f32): Remove.
22294 (__arm_vminnmaq_f16): Remove.
22295 (__arm_vmaxnmaq_f16): Remove.
22296 (__arm_vminnmaq_f32): Remove.
22297 (__arm_vmaxnmaq_f32): Remove.
22298 (__arm_vmaxnmaq_m_f16): Remove.
22299 (__arm_vminnmaq_m_f16): Remove.
22300 (__arm_vmaxnmaq_m_f32): Remove.
22301 (__arm_vminnmaq_m_f32): Remove.
22302 (__arm_vminnmaq): Remove.
22303 (__arm_vmaxnmaq): Remove.
22304 (__arm_vmaxnmaq_m): Remove.
22305 (__arm_vminnmaq_m): Remove.
22307 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22309 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
22310 (MVE_VMAXNMA_VMINNMAQ_M): New.
22311 (mve_insn): Add vmaxnma, vminnma.
22312 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
22314 (@mve_<mve_insn>q_f<mode>): ... this.
22315 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
22316 (@mve_<mve_insn>q_m_f<mode>): ... this.
22318 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22320 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
22321 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
22322 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
22323 (vminnmavq, vminnmvq): New.
22324 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
22325 (vminnmavq, vminnmvq): New.
22326 * config/arm/arm_mve.h (vminnmvq): Remove.
22327 (vminnmavq): Remove.
22328 (vmaxnmvq): Remove.
22329 (vmaxnmavq): Remove.
22330 (vmaxnmavq_p): Remove.
22331 (vmaxnmvq_p): Remove.
22332 (vminnmavq_p): Remove.
22333 (vminnmvq_p): Remove.
22334 (vminnmvq_f16): Remove.
22335 (vminnmavq_f16): Remove.
22336 (vmaxnmvq_f16): Remove.
22337 (vmaxnmavq_f16): Remove.
22338 (vminnmvq_f32): Remove.
22339 (vminnmavq_f32): Remove.
22340 (vmaxnmvq_f32): Remove.
22341 (vmaxnmavq_f32): Remove.
22342 (vmaxnmavq_p_f16): Remove.
22343 (vmaxnmvq_p_f16): Remove.
22344 (vminnmavq_p_f16): Remove.
22345 (vminnmvq_p_f16): Remove.
22346 (vmaxnmavq_p_f32): Remove.
22347 (vmaxnmvq_p_f32): Remove.
22348 (vminnmavq_p_f32): Remove.
22349 (vminnmvq_p_f32): Remove.
22350 (__arm_vminnmvq_f16): Remove.
22351 (__arm_vminnmavq_f16): Remove.
22352 (__arm_vmaxnmvq_f16): Remove.
22353 (__arm_vmaxnmavq_f16): Remove.
22354 (__arm_vminnmvq_f32): Remove.
22355 (__arm_vminnmavq_f32): Remove.
22356 (__arm_vmaxnmvq_f32): Remove.
22357 (__arm_vmaxnmavq_f32): Remove.
22358 (__arm_vmaxnmavq_p_f16): Remove.
22359 (__arm_vmaxnmvq_p_f16): Remove.
22360 (__arm_vminnmavq_p_f16): Remove.
22361 (__arm_vminnmvq_p_f16): Remove.
22362 (__arm_vmaxnmavq_p_f32): Remove.
22363 (__arm_vmaxnmvq_p_f32): Remove.
22364 (__arm_vminnmavq_p_f32): Remove.
22365 (__arm_vminnmvq_p_f32): Remove.
22366 (__arm_vminnmvq): Remove.
22367 (__arm_vminnmavq): Remove.
22368 (__arm_vmaxnmvq): Remove.
22369 (__arm_vmaxnmavq): Remove.
22370 (__arm_vmaxnmavq_p): Remove.
22371 (__arm_vmaxnmvq_p): Remove.
22372 (__arm_vminnmavq_p): Remove.
22373 (__arm_vminnmvq_p): Remove.
22374 (__arm_vmaxnmavq_m): Remove.
22375 (__arm_vmaxnmvq_m): Remove.
22377 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22379 * config/arm/arm-mve-builtins-functions.h
22380 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
22382 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22384 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
22385 (MVE_VMAXNMxV_MINNMxVQ_P): New.
22386 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
22387 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
22388 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
22389 (@mve_<mve_insn>q_f<mode>): ... this.
22390 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
22391 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
22392 (@mve_<mve_insn>q_p_f<mode>): ... this.
22394 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22396 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
22397 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
22398 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
22399 * config/arm/arm_mve.h (vminnmq): Remove.
22401 (vmaxnmq_m): Remove.
22402 (vminnmq_m): Remove.
22403 (vminnmq_x): Remove.
22404 (vmaxnmq_x): Remove.
22405 (vminnmq_f16): Remove.
22406 (vmaxnmq_f16): Remove.
22407 (vminnmq_f32): Remove.
22408 (vmaxnmq_f32): Remove.
22409 (vmaxnmq_m_f32): Remove.
22410 (vmaxnmq_m_f16): Remove.
22411 (vminnmq_m_f32): Remove.
22412 (vminnmq_m_f16): Remove.
22413 (vminnmq_x_f16): Remove.
22414 (vminnmq_x_f32): Remove.
22415 (vmaxnmq_x_f16): Remove.
22416 (vmaxnmq_x_f32): Remove.
22417 (__arm_vminnmq_f16): Remove.
22418 (__arm_vmaxnmq_f16): Remove.
22419 (__arm_vminnmq_f32): Remove.
22420 (__arm_vmaxnmq_f32): Remove.
22421 (__arm_vmaxnmq_m_f32): Remove.
22422 (__arm_vmaxnmq_m_f16): Remove.
22423 (__arm_vminnmq_m_f32): Remove.
22424 (__arm_vminnmq_m_f16): Remove.
22425 (__arm_vminnmq_x_f16): Remove.
22426 (__arm_vminnmq_x_f32): Remove.
22427 (__arm_vmaxnmq_x_f16): Remove.
22428 (__arm_vmaxnmq_x_f32): Remove.
22429 (__arm_vminnmq): Remove.
22430 (__arm_vmaxnmq): Remove.
22431 (__arm_vmaxnmq_m): Remove.
22432 (__arm_vminnmq_m): Remove.
22433 (__arm_vminnmq_x): Remove.
22434 (__arm_vmaxnmq_x): Remove.
22436 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22438 * config/arm/iterators.md (MAX_MIN_F): New.
22439 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
22440 (mve_insn): Add vmaxnm, vminnm.
22441 (max_min_f_str): New.
22442 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
22444 (@mve_<max_min_f_str>q_f<mode>): ... this.
22445 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
22446 (@mve_<mve_insn>q_m_f<mode>): ... this.
22448 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22450 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
22451 (smax<mode>3): Likewise.
22453 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22455 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
22456 (FUNCTION_PRED_P_S): New.
22457 (vmaxavq, vminavq, vmaxvq, vminvq): New.
22458 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
22460 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
22462 * config/arm/arm_mve.h (vminvq): Remove.
22464 (vminvq_p): Remove.
22465 (vmaxvq_p): Remove.
22466 (vminvq_u8): Remove.
22467 (vmaxvq_u8): Remove.
22468 (vminvq_s8): Remove.
22469 (vmaxvq_s8): Remove.
22470 (vminvq_u16): Remove.
22471 (vmaxvq_u16): Remove.
22472 (vminvq_s16): Remove.
22473 (vmaxvq_s16): Remove.
22474 (vminvq_u32): Remove.
22475 (vmaxvq_u32): Remove.
22476 (vminvq_s32): Remove.
22477 (vmaxvq_s32): Remove.
22478 (vminvq_p_u8): Remove.
22479 (vmaxvq_p_u8): Remove.
22480 (vminvq_p_s8): Remove.
22481 (vmaxvq_p_s8): Remove.
22482 (vminvq_p_u16): Remove.
22483 (vmaxvq_p_u16): Remove.
22484 (vminvq_p_s16): Remove.
22485 (vmaxvq_p_s16): Remove.
22486 (vminvq_p_u32): Remove.
22487 (vmaxvq_p_u32): Remove.
22488 (vminvq_p_s32): Remove.
22489 (vmaxvq_p_s32): Remove.
22490 (__arm_vminvq_u8): Remove.
22491 (__arm_vmaxvq_u8): Remove.
22492 (__arm_vminvq_s8): Remove.
22493 (__arm_vmaxvq_s8): Remove.
22494 (__arm_vminvq_u16): Remove.
22495 (__arm_vmaxvq_u16): Remove.
22496 (__arm_vminvq_s16): Remove.
22497 (__arm_vmaxvq_s16): Remove.
22498 (__arm_vminvq_u32): Remove.
22499 (__arm_vmaxvq_u32): Remove.
22500 (__arm_vminvq_s32): Remove.
22501 (__arm_vmaxvq_s32): Remove.
22502 (__arm_vminvq_p_u8): Remove.
22503 (__arm_vmaxvq_p_u8): Remove.
22504 (__arm_vminvq_p_s8): Remove.
22505 (__arm_vmaxvq_p_s8): Remove.
22506 (__arm_vminvq_p_u16): Remove.
22507 (__arm_vmaxvq_p_u16): Remove.
22508 (__arm_vminvq_p_s16): Remove.
22509 (__arm_vmaxvq_p_s16): Remove.
22510 (__arm_vminvq_p_u32): Remove.
22511 (__arm_vmaxvq_p_u32): Remove.
22512 (__arm_vminvq_p_s32): Remove.
22513 (__arm_vmaxvq_p_s32): Remove.
22514 (__arm_vminvq): Remove.
22515 (__arm_vmaxvq): Remove.
22516 (__arm_vminvq_p): Remove.
22517 (__arm_vmaxvq_p): Remove.
22520 (vminavq_p): Remove.
22521 (vmaxavq_p): Remove.
22522 (vminavq_s8): Remove.
22523 (vmaxavq_s8): Remove.
22524 (vminavq_s16): Remove.
22525 (vmaxavq_s16): Remove.
22526 (vminavq_s32): Remove.
22527 (vmaxavq_s32): Remove.
22528 (vminavq_p_s8): Remove.
22529 (vmaxavq_p_s8): Remove.
22530 (vminavq_p_s16): Remove.
22531 (vmaxavq_p_s16): Remove.
22532 (vminavq_p_s32): Remove.
22533 (vmaxavq_p_s32): Remove.
22534 (__arm_vminavq_s8): Remove.
22535 (__arm_vmaxavq_s8): Remove.
22536 (__arm_vminavq_s16): Remove.
22537 (__arm_vmaxavq_s16): Remove.
22538 (__arm_vminavq_s32): Remove.
22539 (__arm_vmaxavq_s32): Remove.
22540 (__arm_vminavq_p_s8): Remove.
22541 (__arm_vmaxavq_p_s8): Remove.
22542 (__arm_vminavq_p_s16): Remove.
22543 (__arm_vmaxavq_p_s16): Remove.
22544 (__arm_vminavq_p_s32): Remove.
22545 (__arm_vmaxavq_p_s32): Remove.
22546 (__arm_vminavq): Remove.
22547 (__arm_vmaxavq): Remove.
22548 (__arm_vminavq_p): Remove.
22549 (__arm_vmaxavq_p): Remove.
22551 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22553 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
22554 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
22555 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
22556 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
22557 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
22558 (@mve_<mve_insn>q_<supf><mode>): ... this.
22559 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
22560 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
22561 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22563 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22565 * config/arm/arm-mve-builtins-functions.h (class
22566 unspec_mve_function_exact_insn_pred_p): New.
22568 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22570 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
22571 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
22573 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22575 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
22576 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
22578 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
22580 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
22582 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
22583 (ADJUST_REG_ALLOC_ORDER): Likewise.
22584 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
22586 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
22587 Upa rather than Upl for unpredicated movprfx alternatives.
22589 2023-05-09 Jeff Law <jlaw@ventanamicro>
22591 * config/h8300/testcompare.md: Add peephole2 which uses a memory
22592 load to set flags, thus eliminating a compare against zero.
22594 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22596 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
22597 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
22598 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
22599 * config/arm/arm_mve.h (vshlltq): Remove.
22601 (vshllbq_m): Remove.
22602 (vshlltq_m): Remove.
22603 (vshllbq_x): Remove.
22604 (vshlltq_x): Remove.
22605 (vshlltq_n_u8): Remove.
22606 (vshllbq_n_u8): Remove.
22607 (vshlltq_n_s8): Remove.
22608 (vshllbq_n_s8): Remove.
22609 (vshlltq_n_u16): Remove.
22610 (vshllbq_n_u16): Remove.
22611 (vshlltq_n_s16): Remove.
22612 (vshllbq_n_s16): Remove.
22613 (vshllbq_m_n_s8): Remove.
22614 (vshllbq_m_n_s16): Remove.
22615 (vshllbq_m_n_u8): Remove.
22616 (vshllbq_m_n_u16): Remove.
22617 (vshlltq_m_n_s8): Remove.
22618 (vshlltq_m_n_s16): Remove.
22619 (vshlltq_m_n_u8): Remove.
22620 (vshlltq_m_n_u16): Remove.
22621 (vshllbq_x_n_s8): Remove.
22622 (vshllbq_x_n_s16): Remove.
22623 (vshllbq_x_n_u8): Remove.
22624 (vshllbq_x_n_u16): Remove.
22625 (vshlltq_x_n_s8): Remove.
22626 (vshlltq_x_n_s16): Remove.
22627 (vshlltq_x_n_u8): Remove.
22628 (vshlltq_x_n_u16): Remove.
22629 (__arm_vshlltq_n_u8): Remove.
22630 (__arm_vshllbq_n_u8): Remove.
22631 (__arm_vshlltq_n_s8): Remove.
22632 (__arm_vshllbq_n_s8): Remove.
22633 (__arm_vshlltq_n_u16): Remove.
22634 (__arm_vshllbq_n_u16): Remove.
22635 (__arm_vshlltq_n_s16): Remove.
22636 (__arm_vshllbq_n_s16): Remove.
22637 (__arm_vshllbq_m_n_s8): Remove.
22638 (__arm_vshllbq_m_n_s16): Remove.
22639 (__arm_vshllbq_m_n_u8): Remove.
22640 (__arm_vshllbq_m_n_u16): Remove.
22641 (__arm_vshlltq_m_n_s8): Remove.
22642 (__arm_vshlltq_m_n_s16): Remove.
22643 (__arm_vshlltq_m_n_u8): Remove.
22644 (__arm_vshlltq_m_n_u16): Remove.
22645 (__arm_vshllbq_x_n_s8): Remove.
22646 (__arm_vshllbq_x_n_s16): Remove.
22647 (__arm_vshllbq_x_n_u8): Remove.
22648 (__arm_vshllbq_x_n_u16): Remove.
22649 (__arm_vshlltq_x_n_s8): Remove.
22650 (__arm_vshlltq_x_n_s16): Remove.
22651 (__arm_vshlltq_x_n_u8): Remove.
22652 (__arm_vshlltq_x_n_u16): Remove.
22653 (__arm_vshlltq): Remove.
22654 (__arm_vshllbq): Remove.
22655 (__arm_vshllbq_m): Remove.
22656 (__arm_vshlltq_m): Remove.
22657 (__arm_vshllbq_x): Remove.
22658 (__arm_vshlltq_x): Remove.
22660 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22662 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
22663 (VSHLLBQ_N, VSHLLTQ_N): Remove.
22665 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
22666 (VSHLLxQ_M_N): New.
22667 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
22668 (mve_vshlltq_n_<supf><mode>): Merge into ...
22669 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22670 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
22672 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22674 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22676 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
22677 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
22679 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22681 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
22682 (vqmovntq, vqmovunbq, vqmovuntq): New.
22683 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
22684 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
22685 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
22686 (vqmovntq, vqmovunbq, vqmovuntq): New.
22687 * config/arm/arm-mve-builtins.cc
22688 (function_instance::has_inactive_argument): Handle vmovnbq,
22689 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
22690 * config/arm/arm_mve.h (vqmovntq): Remove.
22691 (vqmovnbq): Remove.
22692 (vqmovnbq_m): Remove.
22693 (vqmovntq_m): Remove.
22694 (vqmovntq_u16): Remove.
22695 (vqmovnbq_u16): Remove.
22696 (vqmovntq_s16): Remove.
22697 (vqmovnbq_s16): Remove.
22698 (vqmovntq_u32): Remove.
22699 (vqmovnbq_u32): Remove.
22700 (vqmovntq_s32): Remove.
22701 (vqmovnbq_s32): Remove.
22702 (vqmovnbq_m_s16): Remove.
22703 (vqmovntq_m_s16): Remove.
22704 (vqmovnbq_m_u16): Remove.
22705 (vqmovntq_m_u16): Remove.
22706 (vqmovnbq_m_s32): Remove.
22707 (vqmovntq_m_s32): Remove.
22708 (vqmovnbq_m_u32): Remove.
22709 (vqmovntq_m_u32): Remove.
22710 (__arm_vqmovntq_u16): Remove.
22711 (__arm_vqmovnbq_u16): Remove.
22712 (__arm_vqmovntq_s16): Remove.
22713 (__arm_vqmovnbq_s16): Remove.
22714 (__arm_vqmovntq_u32): Remove.
22715 (__arm_vqmovnbq_u32): Remove.
22716 (__arm_vqmovntq_s32): Remove.
22717 (__arm_vqmovnbq_s32): Remove.
22718 (__arm_vqmovnbq_m_s16): Remove.
22719 (__arm_vqmovntq_m_s16): Remove.
22720 (__arm_vqmovnbq_m_u16): Remove.
22721 (__arm_vqmovntq_m_u16): Remove.
22722 (__arm_vqmovnbq_m_s32): Remove.
22723 (__arm_vqmovntq_m_s32): Remove.
22724 (__arm_vqmovnbq_m_u32): Remove.
22725 (__arm_vqmovntq_m_u32): Remove.
22726 (__arm_vqmovntq): Remove.
22727 (__arm_vqmovnbq): Remove.
22728 (__arm_vqmovnbq_m): Remove.
22729 (__arm_vqmovntq_m): Remove.
22732 (vmovnbq_m): Remove.
22733 (vmovntq_m): Remove.
22734 (vmovntq_u16): Remove.
22735 (vmovnbq_u16): Remove.
22736 (vmovntq_s16): Remove.
22737 (vmovnbq_s16): Remove.
22738 (vmovntq_u32): Remove.
22739 (vmovnbq_u32): Remove.
22740 (vmovntq_s32): Remove.
22741 (vmovnbq_s32): Remove.
22742 (vmovnbq_m_s16): Remove.
22743 (vmovntq_m_s16): Remove.
22744 (vmovnbq_m_u16): Remove.
22745 (vmovntq_m_u16): Remove.
22746 (vmovnbq_m_s32): Remove.
22747 (vmovntq_m_s32): Remove.
22748 (vmovnbq_m_u32): Remove.
22749 (vmovntq_m_u32): Remove.
22750 (__arm_vmovntq_u16): Remove.
22751 (__arm_vmovnbq_u16): Remove.
22752 (__arm_vmovntq_s16): Remove.
22753 (__arm_vmovnbq_s16): Remove.
22754 (__arm_vmovntq_u32): Remove.
22755 (__arm_vmovnbq_u32): Remove.
22756 (__arm_vmovntq_s32): Remove.
22757 (__arm_vmovnbq_s32): Remove.
22758 (__arm_vmovnbq_m_s16): Remove.
22759 (__arm_vmovntq_m_s16): Remove.
22760 (__arm_vmovnbq_m_u16): Remove.
22761 (__arm_vmovntq_m_u16): Remove.
22762 (__arm_vmovnbq_m_s32): Remove.
22763 (__arm_vmovntq_m_s32): Remove.
22764 (__arm_vmovnbq_m_u32): Remove.
22765 (__arm_vmovntq_m_u32): Remove.
22766 (__arm_vmovntq): Remove.
22767 (__arm_vmovnbq): Remove.
22768 (__arm_vmovnbq_m): Remove.
22769 (__arm_vmovntq_m): Remove.
22770 (vqmovuntq): Remove.
22771 (vqmovunbq): Remove.
22772 (vqmovunbq_m): Remove.
22773 (vqmovuntq_m): Remove.
22774 (vqmovuntq_s16): Remove.
22775 (vqmovunbq_s16): Remove.
22776 (vqmovuntq_s32): Remove.
22777 (vqmovunbq_s32): Remove.
22778 (vqmovunbq_m_s16): Remove.
22779 (vqmovuntq_m_s16): Remove.
22780 (vqmovunbq_m_s32): Remove.
22781 (vqmovuntq_m_s32): Remove.
22782 (__arm_vqmovuntq_s16): Remove.
22783 (__arm_vqmovunbq_s16): Remove.
22784 (__arm_vqmovuntq_s32): Remove.
22785 (__arm_vqmovunbq_s32): Remove.
22786 (__arm_vqmovunbq_m_s16): Remove.
22787 (__arm_vqmovuntq_m_s16): Remove.
22788 (__arm_vqmovunbq_m_s32): Remove.
22789 (__arm_vqmovuntq_m_s32): Remove.
22790 (__arm_vqmovuntq): Remove.
22791 (__arm_vqmovunbq): Remove.
22792 (__arm_vqmovunbq_m): Remove.
22793 (__arm_vqmovuntq_m): Remove.
22795 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22797 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
22798 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
22801 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
22803 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
22804 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
22805 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
22806 (mve_vqmovuntq_s<mode>): Merge into ...
22807 (@mve_<mve_insn>q_<supf><mode>): ... this.
22808 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
22809 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
22810 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
22811 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22813 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22815 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
22816 (binary_move_narrow_unsigned): New.
22817 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
22818 (binary_move_narrow_unsigned): New.
22820 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22822 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
22823 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
22824 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
22825 (vrndpq, vrndq, vrndxq): New.
22826 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
22827 (vrndpq, vrndq, vrndxq): New.
22828 * config/arm/arm_mve.h (vrndxq): Remove.
22834 (vrndaq_m): Remove.
22835 (vrndmq_m): Remove.
22836 (vrndnq_m): Remove.
22837 (vrndpq_m): Remove.
22839 (vrndxq_m): Remove.
22841 (vrndnq_x): Remove.
22842 (vrndmq_x): Remove.
22843 (vrndpq_x): Remove.
22844 (vrndaq_x): Remove.
22845 (vrndxq_x): Remove.
22846 (vrndxq_f16): Remove.
22847 (vrndxq_f32): Remove.
22848 (vrndq_f16): Remove.
22849 (vrndq_f32): Remove.
22850 (vrndpq_f16): Remove.
22851 (vrndpq_f32): Remove.
22852 (vrndnq_f16): Remove.
22853 (vrndnq_f32): Remove.
22854 (vrndmq_f16): Remove.
22855 (vrndmq_f32): Remove.
22856 (vrndaq_f16): Remove.
22857 (vrndaq_f32): Remove.
22858 (vrndaq_m_f16): Remove.
22859 (vrndmq_m_f16): Remove.
22860 (vrndnq_m_f16): Remove.
22861 (vrndpq_m_f16): Remove.
22862 (vrndq_m_f16): Remove.
22863 (vrndxq_m_f16): Remove.
22864 (vrndaq_m_f32): Remove.
22865 (vrndmq_m_f32): Remove.
22866 (vrndnq_m_f32): Remove.
22867 (vrndpq_m_f32): Remove.
22868 (vrndq_m_f32): Remove.
22869 (vrndxq_m_f32): Remove.
22870 (vrndq_x_f16): Remove.
22871 (vrndq_x_f32): Remove.
22872 (vrndnq_x_f16): Remove.
22873 (vrndnq_x_f32): Remove.
22874 (vrndmq_x_f16): Remove.
22875 (vrndmq_x_f32): Remove.
22876 (vrndpq_x_f16): Remove.
22877 (vrndpq_x_f32): Remove.
22878 (vrndaq_x_f16): Remove.
22879 (vrndaq_x_f32): Remove.
22880 (vrndxq_x_f16): Remove.
22881 (vrndxq_x_f32): Remove.
22882 (__arm_vrndxq_f16): Remove.
22883 (__arm_vrndxq_f32): Remove.
22884 (__arm_vrndq_f16): Remove.
22885 (__arm_vrndq_f32): Remove.
22886 (__arm_vrndpq_f16): Remove.
22887 (__arm_vrndpq_f32): Remove.
22888 (__arm_vrndnq_f16): Remove.
22889 (__arm_vrndnq_f32): Remove.
22890 (__arm_vrndmq_f16): Remove.
22891 (__arm_vrndmq_f32): Remove.
22892 (__arm_vrndaq_f16): Remove.
22893 (__arm_vrndaq_f32): Remove.
22894 (__arm_vrndaq_m_f16): Remove.
22895 (__arm_vrndmq_m_f16): Remove.
22896 (__arm_vrndnq_m_f16): Remove.
22897 (__arm_vrndpq_m_f16): Remove.
22898 (__arm_vrndq_m_f16): Remove.
22899 (__arm_vrndxq_m_f16): Remove.
22900 (__arm_vrndaq_m_f32): Remove.
22901 (__arm_vrndmq_m_f32): Remove.
22902 (__arm_vrndnq_m_f32): Remove.
22903 (__arm_vrndpq_m_f32): Remove.
22904 (__arm_vrndq_m_f32): Remove.
22905 (__arm_vrndxq_m_f32): Remove.
22906 (__arm_vrndq_x_f16): Remove.
22907 (__arm_vrndq_x_f32): Remove.
22908 (__arm_vrndnq_x_f16): Remove.
22909 (__arm_vrndnq_x_f32): Remove.
22910 (__arm_vrndmq_x_f16): Remove.
22911 (__arm_vrndmq_x_f32): Remove.
22912 (__arm_vrndpq_x_f16): Remove.
22913 (__arm_vrndpq_x_f32): Remove.
22914 (__arm_vrndaq_x_f16): Remove.
22915 (__arm_vrndaq_x_f32): Remove.
22916 (__arm_vrndxq_x_f16): Remove.
22917 (__arm_vrndxq_x_f32): Remove.
22918 (__arm_vrndxq): Remove.
22919 (__arm_vrndq): Remove.
22920 (__arm_vrndpq): Remove.
22921 (__arm_vrndnq): Remove.
22922 (__arm_vrndmq): Remove.
22923 (__arm_vrndaq): Remove.
22924 (__arm_vrndaq_m): Remove.
22925 (__arm_vrndmq_m): Remove.
22926 (__arm_vrndnq_m): Remove.
22927 (__arm_vrndpq_m): Remove.
22928 (__arm_vrndq_m): Remove.
22929 (__arm_vrndxq_m): Remove.
22930 (__arm_vrndq_x): Remove.
22931 (__arm_vrndnq_x): Remove.
22932 (__arm_vrndmq_x): Remove.
22933 (__arm_vrndpq_x): Remove.
22934 (__arm_vrndaq_x): Remove.
22935 (__arm_vrndxq_x): Remove.
22937 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22939 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
22940 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
22941 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
22942 (vclzq, vqabsq, vqnegq): New.
22943 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
22944 (vqabsq, vqnegq): New.
22945 * config/arm/arm_mve.h (vabsq): Remove.
22948 (vabsq_f16): Remove.
22949 (vabsq_f32): Remove.
22950 (vabsq_s8): Remove.
22951 (vabsq_s16): Remove.
22952 (vabsq_s32): Remove.
22953 (vabsq_m_s8): Remove.
22954 (vabsq_m_s16): Remove.
22955 (vabsq_m_s32): Remove.
22956 (vabsq_m_f16): Remove.
22957 (vabsq_m_f32): Remove.
22958 (vabsq_x_s8): Remove.
22959 (vabsq_x_s16): Remove.
22960 (vabsq_x_s32): Remove.
22961 (vabsq_x_f16): Remove.
22962 (vabsq_x_f32): Remove.
22963 (__arm_vabsq_s8): Remove.
22964 (__arm_vabsq_s16): Remove.
22965 (__arm_vabsq_s32): Remove.
22966 (__arm_vabsq_m_s8): Remove.
22967 (__arm_vabsq_m_s16): Remove.
22968 (__arm_vabsq_m_s32): Remove.
22969 (__arm_vabsq_x_s8): Remove.
22970 (__arm_vabsq_x_s16): Remove.
22971 (__arm_vabsq_x_s32): Remove.
22972 (__arm_vabsq_f16): Remove.
22973 (__arm_vabsq_f32): Remove.
22974 (__arm_vabsq_m_f16): Remove.
22975 (__arm_vabsq_m_f32): Remove.
22976 (__arm_vabsq_x_f16): Remove.
22977 (__arm_vabsq_x_f32): Remove.
22978 (__arm_vabsq): Remove.
22979 (__arm_vabsq_m): Remove.
22980 (__arm_vabsq_x): Remove.
22984 (vnegq_f16): Remove.
22985 (vnegq_f32): Remove.
22986 (vnegq_s8): Remove.
22987 (vnegq_s16): Remove.
22988 (vnegq_s32): Remove.
22989 (vnegq_m_s8): Remove.
22990 (vnegq_m_s16): Remove.
22991 (vnegq_m_s32): Remove.
22992 (vnegq_m_f16): Remove.
22993 (vnegq_m_f32): Remove.
22994 (vnegq_x_s8): Remove.
22995 (vnegq_x_s16): Remove.
22996 (vnegq_x_s32): Remove.
22997 (vnegq_x_f16): Remove.
22998 (vnegq_x_f32): Remove.
22999 (__arm_vnegq_s8): Remove.
23000 (__arm_vnegq_s16): Remove.
23001 (__arm_vnegq_s32): Remove.
23002 (__arm_vnegq_m_s8): Remove.
23003 (__arm_vnegq_m_s16): Remove.
23004 (__arm_vnegq_m_s32): Remove.
23005 (__arm_vnegq_x_s8): Remove.
23006 (__arm_vnegq_x_s16): Remove.
23007 (__arm_vnegq_x_s32): Remove.
23008 (__arm_vnegq_f16): Remove.
23009 (__arm_vnegq_f32): Remove.
23010 (__arm_vnegq_m_f16): Remove.
23011 (__arm_vnegq_m_f32): Remove.
23012 (__arm_vnegq_x_f16): Remove.
23013 (__arm_vnegq_x_f32): Remove.
23014 (__arm_vnegq): Remove.
23015 (__arm_vnegq_m): Remove.
23016 (__arm_vnegq_x): Remove.
23020 (vclsq_s8): Remove.
23021 (vclsq_s16): Remove.
23022 (vclsq_s32): Remove.
23023 (vclsq_m_s8): Remove.
23024 (vclsq_m_s16): Remove.
23025 (vclsq_m_s32): Remove.
23026 (vclsq_x_s8): Remove.
23027 (vclsq_x_s16): Remove.
23028 (vclsq_x_s32): Remove.
23029 (__arm_vclsq_s8): Remove.
23030 (__arm_vclsq_s16): Remove.
23031 (__arm_vclsq_s32): Remove.
23032 (__arm_vclsq_m_s8): Remove.
23033 (__arm_vclsq_m_s16): Remove.
23034 (__arm_vclsq_m_s32): Remove.
23035 (__arm_vclsq_x_s8): Remove.
23036 (__arm_vclsq_x_s16): Remove.
23037 (__arm_vclsq_x_s32): Remove.
23038 (__arm_vclsq): Remove.
23039 (__arm_vclsq_m): Remove.
23040 (__arm_vclsq_x): Remove.
23044 (vclzq_s8): Remove.
23045 (vclzq_s16): Remove.
23046 (vclzq_s32): Remove.
23047 (vclzq_u8): Remove.
23048 (vclzq_u16): Remove.
23049 (vclzq_u32): Remove.
23050 (vclzq_m_u8): Remove.
23051 (vclzq_m_s8): Remove.
23052 (vclzq_m_u16): Remove.
23053 (vclzq_m_s16): Remove.
23054 (vclzq_m_u32): Remove.
23055 (vclzq_m_s32): Remove.
23056 (vclzq_x_s8): Remove.
23057 (vclzq_x_s16): Remove.
23058 (vclzq_x_s32): Remove.
23059 (vclzq_x_u8): Remove.
23060 (vclzq_x_u16): Remove.
23061 (vclzq_x_u32): Remove.
23062 (__arm_vclzq_s8): Remove.
23063 (__arm_vclzq_s16): Remove.
23064 (__arm_vclzq_s32): Remove.
23065 (__arm_vclzq_u8): Remove.
23066 (__arm_vclzq_u16): Remove.
23067 (__arm_vclzq_u32): Remove.
23068 (__arm_vclzq_m_u8): Remove.
23069 (__arm_vclzq_m_s8): Remove.
23070 (__arm_vclzq_m_u16): Remove.
23071 (__arm_vclzq_m_s16): Remove.
23072 (__arm_vclzq_m_u32): Remove.
23073 (__arm_vclzq_m_s32): Remove.
23074 (__arm_vclzq_x_s8): Remove.
23075 (__arm_vclzq_x_s16): Remove.
23076 (__arm_vclzq_x_s32): Remove.
23077 (__arm_vclzq_x_u8): Remove.
23078 (__arm_vclzq_x_u16): Remove.
23079 (__arm_vclzq_x_u32): Remove.
23080 (__arm_vclzq): Remove.
23081 (__arm_vclzq_m): Remove.
23082 (__arm_vclzq_x): Remove.
23085 (vqnegq_m): Remove.
23086 (vqabsq_m): Remove.
23087 (vqabsq_s8): Remove.
23088 (vqabsq_s16): Remove.
23089 (vqabsq_s32): Remove.
23090 (vqnegq_s8): Remove.
23091 (vqnegq_s16): Remove.
23092 (vqnegq_s32): Remove.
23093 (vqnegq_m_s8): Remove.
23094 (vqabsq_m_s8): Remove.
23095 (vqnegq_m_s16): Remove.
23096 (vqabsq_m_s16): Remove.
23097 (vqnegq_m_s32): Remove.
23098 (vqabsq_m_s32): Remove.
23099 (__arm_vqabsq_s8): Remove.
23100 (__arm_vqabsq_s16): Remove.
23101 (__arm_vqabsq_s32): Remove.
23102 (__arm_vqnegq_s8): Remove.
23103 (__arm_vqnegq_s16): Remove.
23104 (__arm_vqnegq_s32): Remove.
23105 (__arm_vqnegq_m_s8): Remove.
23106 (__arm_vqabsq_m_s8): Remove.
23107 (__arm_vqnegq_m_s16): Remove.
23108 (__arm_vqabsq_m_s16): Remove.
23109 (__arm_vqnegq_m_s32): Remove.
23110 (__arm_vqabsq_m_s32): Remove.
23111 (__arm_vqabsq): Remove.
23112 (__arm_vqnegq): Remove.
23113 (__arm_vqnegq_m): Remove.
23114 (__arm_vqabsq_m): Remove.
23116 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23118 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
23119 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
23120 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
23121 vrndm, vrndn, vrndp, vrnd, vrndx.
23122 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
23123 VQABSQ_M_S, VQNEGQ_M_S.
23125 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
23126 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
23127 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
23128 (@mve_<mve_insn>q_f<mode>): ... this.
23129 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
23130 (mve_v<absneg_str>q_f<mode>): ... this.
23131 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
23132 (mve_v<absneg_str>q_s<mode>): ... this.
23133 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
23134 (@mve_<mve_insn>q_<supf><mode>): ... this.
23135 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
23136 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
23137 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
23138 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23139 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
23140 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
23141 (mve_vrndxq_m_f<mode>): Merge into ...
23142 (@mve_<mve_insn>q_m_f<mode>): ... this.
23144 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23146 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
23147 * config/arm/arm-mve-builtins-shapes.h (unary): New.
23149 2023-05-09 Jakub Jelinek <jakub@redhat.com>
23151 * mux-utils.h: Fix comment typo, avoides -> avoids.
23153 2023-05-09 Jakub Jelinek <jakub@redhat.com>
23155 PR tree-optimization/109778
23156 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
23157 wi::zext (x, width) rather than x if width != precision, rather
23158 than using wi::zext (right, width) after the shift.
23159 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
23160 of wi::lrotate or wi::rrotate.
23162 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
23164 * genmatch.cc (get_out_file): Make static and rename to ...
23165 (choose_output): ... this. Reimplement. Update all uses ...
23166 (decision_tree::gen): ... here and ...
23169 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
23171 * genmatch.cc (showUsage): Reimplement as ...
23172 (usage): ...this. Adjust all uses.
23173 (main): Print usage when no arguments. Add missing 'return 1'.
23175 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
23177 * genmatch.cc (header_file): Make static.
23178 (emit_func): Rename to...
23179 (fp_decl): ... this. Adjust all uses.
23180 (fp_decl_done): New function. Use it...
23181 (decision_tree::gen): ... here and...
23182 (write_predicate): ... here.
23185 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
23187 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
23190 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
23191 Uros Bizjak <ubizjak@gmail.com>
23193 * config/i386/i386.md (any_or_plus): Move definition earlier.
23194 (*insvti_highpart_1): New define_insn_and_split to overwrite
23195 (insv) the highpart of a TImode register/memory.
23197 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
23199 * auto-profile.cc (auto_profile): Check todo from early_inline
23200 to see if cleanup_tree_vfg needs to be called.
23201 (early_inline): Return todo from early_inliner.
23203 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
23205 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
23207 (pass_vsetvl::get_block_info): New.
23208 (pass_vsetvl::update_vector_info): New.
23209 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
23210 (pass_vsetvl::compute_local_backward_infos): Ditto.
23211 (pass_vsetvl::transfer_before): Ditto.
23212 (pass_vsetvl::transfer_after): Ditto.
23213 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
23214 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
23215 (pass_vsetvl::cleanup_insns): Ditto.
23216 (pass_vsetvl::compute_local_backward_infos): Use
23217 update_vector_info.
23219 2023-05-08 Jeff Law <jlaw@ventanamicro>
23221 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
23223 2023-05-08 Richard Biener <rguenther@suse.de>
23224 Michael Meissner <meissner@linux.ibm.com>
23226 PR middle-end/108623
23227 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
23228 Align bit fields > 1 bit to at least an 8-bit boundary.
23230 2023-05-08 Andrew Pinski <apinski@marvell.com>
23232 PR tree-optimization/109424
23233 PR tree-optimization/59424
23234 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
23235 (factor_out_conditional_operation): This and add support for all unary
23237 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
23238 to call factor_out_conditional_operation instead.
23240 2023-05-08 Andrew Pinski <apinski@marvell.com>
23242 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
23243 over factor_out_conditional_conversion.
23245 2023-05-08 Andrew Pinski <apinski@marvell.com>
23247 PR tree-optimization/49959
23248 PR tree-optimization/103771
23249 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
23250 Diamond shapped bb form for factor_out_conditional_conversion.
23252 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23254 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
23255 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
23256 (riscv_vector_get_mask_mode): Ditto.
23257 (get_mask_policy_no_pred): Ditto.
23258 (get_tail_policy_no_pred): Ditto.
23259 (get_mask_mode): New function.
23260 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
23261 (get_tail_policy_no_pred): Ditto.
23262 (riscv_vector_mask_mode_p): Ditto.
23263 (riscv_vector_get_mask_mode): Ditto.
23264 (get_mask_mode): New function.
23265 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
23267 (get_tail_policy_for_pred): Ditto.
23268 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
23269 (get_mask_policy_for_pred): Ditto
23270 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
23272 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
23274 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
23275 (riscv_select_multilib): New.
23276 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
23277 also handle select_by_abi.
23278 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
23279 to select_by_abi_arch_cmodel from 1.
23280 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
23281 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
23283 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
23285 * Makefile.in: (gimple-match-head.o-warn): Remove.
23286 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
23287 gimple-match-exports.cc.
23288 (gimple-match-auto.h): Only depend on s-gimple-match.
23289 (generic-match-auto.h): Likewise.
23291 2023-05-08 Andrew Pinski <apinski@marvell.com>
23293 PR tree-optimization/109691
23294 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
23296 If the removed statement can throw, have need_eh_cleanup
23297 include the bb of that statement.
23298 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
23299 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
23301 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
23302 Initialize dceworklist instead of stmts_to_remove.
23303 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
23304 Destore dceworklist instead of stmts_to_remove.
23305 (substitute_and_fold_dom_walker::before_dom_children):
23306 Set dceworklist instead of adding to stmts_to_remove.
23307 (substitute_and_fold_engine::substitute_and_fold):
23308 Call simple_dce_from_worklist instead of poping
23310 Don't update the stat on removal statements.
23312 2023-05-07 Andrew Pinski <apinski@marvell.com>
23315 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
23316 Change argument type to aarch64_feature_flags.
23317 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
23318 constructor argument type to aarch64_feature_flags.
23319 Change m_old_asm_isa_flags to be aarch64_feature_flags.
23321 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
23323 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
23324 more parallel code if can_create_pseudo_p.
23326 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
23329 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
23330 immediately before moving a multi-word register by parts.
23332 2023-05-06 Jeff Law <jlaw@ventanamicro>
23334 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
23336 2023-05-06 Michael Collison <collison@rivosinc.com>
23338 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
23339 Check that GET_MODE_NUNITS is a multiple of 2.
23341 2023-05-06 Michael Collison <collison@rivosinc.com>
23343 * config/riscv/riscv.cc
23344 (riscv_estimated_poly_value): Implement
23345 TARGET_ESTIMATED_POLY_VALUE.
23346 (riscv_preferred_simd_mode): Implement
23347 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
23348 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
23349 (riscv_empty_mask_is_expensive): Implement
23350 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
23351 (riscv_vectorize_create_costs): Implement
23352 TARGET_VECTORIZE_CREATE_COSTS.
23353 (riscv_support_vector_misalignment): Implement
23354 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
23355 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
23356 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
23357 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
23358 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
23360 2023-05-06 Jeff Law <jlaw@ventanamicro>
23362 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
23363 duplicate definition.
23365 2023-05-06 Michael Collison <collison@rivosinc.com>
23367 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
23368 (riscv_vector_preferred_simd_mode): Ditto.
23369 (get_mask_policy_no_pred): Ditto.
23370 (get_tail_policy_no_pred): Ditto.
23371 (riscv_vector_mask_mode_p): Ditto.
23372 (riscv_vector_get_mask_mode): Ditto.
23374 2023-05-06 Michael Collison <collison@rivosinc.com>
23376 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
23377 Remove static declaration to to make externally visible.
23378 (get_mask_policy_for_pred): Ditto.
23379 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
23380 New external declaration.
23381 (get_mask_policy_for_pred): Ditto.
23383 2023-05-06 Michael Collison <collison@rivosinc.com>
23385 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
23386 (riscv_vector_get_mask_mode): Ditto.
23387 (get_mask_policy_no_pred): Ditto.
23388 (get_tail_policy_no_pred): Ditto.
23390 2023-05-06 Xi Ruoyao <xry111@xry111.site>
23392 * config/loongarch/loongarch.h (struct machine_function): Add
23393 reg_is_wrapped_separately array for register wrapping
23395 * config/loongarch/loongarch.cc
23396 (loongarch_get_separate_components): New function.
23397 (loongarch_components_for_bb): Likewise.
23398 (loongarch_disqualify_components): Likewise.
23399 (loongarch_process_components): Likewise.
23400 (loongarch_emit_prologue_components): Likewise.
23401 (loongarch_emit_epilogue_components): Likewise.
23402 (loongarch_set_handled_components): Likewise.
23403 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
23404 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
23405 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
23406 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
23407 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
23408 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
23409 (loongarch_for_each_saved_reg): Skip registers that are wrapped
23412 2023-05-06 Xi Ruoyao <xry111@xry111.site>
23415 * Makefile.in (s-macro_list): Pass -nostdinc to
23418 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23420 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
23421 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
23422 (preferred_simd_mode): Ditto.
23423 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
23424 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
23425 (riscv_preferred_simd_mode): New function.
23426 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
23427 * config/riscv/vector.md: Add autovec.md.
23428 * config/riscv/autovec.md: New file.
23430 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23432 * real.h (dconst_pi): Define.
23433 (dconst_e_ptr): Formatting fix.
23434 (dconst_pi_ptr): Declare.
23435 * real.cc (dconst_pi_ptr): New function.
23436 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
23437 boundaries range with range computed from sin/cos of the particular
23438 bounds if the argument range is shorter than 2*pi.
23439 (cfn_sincos::op1_range): Take bulps into account when determining
23440 which result ranges are always invalid or behave like known NAN.
23442 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
23444 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
23445 pass type to vrange_storage::equal_p.
23446 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
23447 (irange_storage::equal_p): Same.
23448 (frange_storage::equal_p): Same.
23449 * value-range-storage.h (class frange_storage): Same.
23451 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23454 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
23455 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
23457 2023-05-06 liuhongt <hongtao.liu@intel.com>
23459 * combine.cc (maybe_swap_commutative_operands): Canonicalize
23460 vec_merge when mask is constant.
23461 * doc/md.texi: Document vec_merge canonicalization.
23463 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23465 * value-range.h (frange_arithmetic): Declare.
23466 * range-op-float.cc (frange_arithmetic): No longer static.
23467 * gimple-range-op.cc (frange_mpfr_arg1): New function.
23468 (cfn_sqrt::fold_range): Intersect the generic boundaries range
23469 with range computed from sqrt of the particular bounds.
23470 (cfn_sqrt::op1_range): Intersect the generic boundaries range
23471 with range computed from squared particular bounds.
23473 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23475 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
23476 earlier with helper variables also renamed.
23477 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
23478 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
23479 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
23481 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
23483 * config/cris/cris.md (splitop): Add PLUS.
23484 * config/cris/cris.cc (cris_split_constant): Also handle
23485 PLUS when a split into two insns may be useful.
23487 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23489 * config/cris/cris.md (movandsplit1): New define_peephole2.
23491 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23493 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
23495 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23497 * doc/md.texi (define_peephole2): Document order of scanning.
23499 2023-05-05 Pan Li <pan2.li@intel.com>
23500 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23502 * config/riscv/vector.md: Allow const as the operand of RVV
23503 indexed load/store.
23505 2023-05-05 Pan Li <pan2.li@intel.com>
23507 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
23508 consumed by simplify_rtx.
23510 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23512 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
23513 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
23514 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
23515 * config/arm/arm_mve.h (vshrq): Remove.
23517 (vrshrq_m): Remove.
23519 (vrshrq_x): Remove.
23521 (vshrq_n_s8): Remove.
23522 (vshrq_n_s16): Remove.
23523 (vshrq_n_s32): Remove.
23524 (vshrq_n_u8): Remove.
23525 (vshrq_n_u16): Remove.
23526 (vshrq_n_u32): Remove.
23527 (vrshrq_n_u8): Remove.
23528 (vrshrq_n_s8): Remove.
23529 (vrshrq_n_u16): Remove.
23530 (vrshrq_n_s16): Remove.
23531 (vrshrq_n_u32): Remove.
23532 (vrshrq_n_s32): Remove.
23533 (vrshrq_m_n_s8): Remove.
23534 (vrshrq_m_n_s32): Remove.
23535 (vrshrq_m_n_s16): Remove.
23536 (vrshrq_m_n_u8): Remove.
23537 (vrshrq_m_n_u32): Remove.
23538 (vrshrq_m_n_u16): Remove.
23539 (vshrq_m_n_s8): Remove.
23540 (vshrq_m_n_s32): Remove.
23541 (vshrq_m_n_s16): Remove.
23542 (vshrq_m_n_u8): Remove.
23543 (vshrq_m_n_u32): Remove.
23544 (vshrq_m_n_u16): Remove.
23545 (vrshrq_x_n_s8): Remove.
23546 (vrshrq_x_n_s16): Remove.
23547 (vrshrq_x_n_s32): Remove.
23548 (vrshrq_x_n_u8): Remove.
23549 (vrshrq_x_n_u16): Remove.
23550 (vrshrq_x_n_u32): Remove.
23551 (vshrq_x_n_s8): Remove.
23552 (vshrq_x_n_s16): Remove.
23553 (vshrq_x_n_s32): Remove.
23554 (vshrq_x_n_u8): Remove.
23555 (vshrq_x_n_u16): Remove.
23556 (vshrq_x_n_u32): Remove.
23557 (__arm_vshrq_n_s8): Remove.
23558 (__arm_vshrq_n_s16): Remove.
23559 (__arm_vshrq_n_s32): Remove.
23560 (__arm_vshrq_n_u8): Remove.
23561 (__arm_vshrq_n_u16): Remove.
23562 (__arm_vshrq_n_u32): Remove.
23563 (__arm_vrshrq_n_u8): Remove.
23564 (__arm_vrshrq_n_s8): Remove.
23565 (__arm_vrshrq_n_u16): Remove.
23566 (__arm_vrshrq_n_s16): Remove.
23567 (__arm_vrshrq_n_u32): Remove.
23568 (__arm_vrshrq_n_s32): Remove.
23569 (__arm_vrshrq_m_n_s8): Remove.
23570 (__arm_vrshrq_m_n_s32): Remove.
23571 (__arm_vrshrq_m_n_s16): Remove.
23572 (__arm_vrshrq_m_n_u8): Remove.
23573 (__arm_vrshrq_m_n_u32): Remove.
23574 (__arm_vrshrq_m_n_u16): Remove.
23575 (__arm_vshrq_m_n_s8): Remove.
23576 (__arm_vshrq_m_n_s32): Remove.
23577 (__arm_vshrq_m_n_s16): Remove.
23578 (__arm_vshrq_m_n_u8): Remove.
23579 (__arm_vshrq_m_n_u32): Remove.
23580 (__arm_vshrq_m_n_u16): Remove.
23581 (__arm_vrshrq_x_n_s8): Remove.
23582 (__arm_vrshrq_x_n_s16): Remove.
23583 (__arm_vrshrq_x_n_s32): Remove.
23584 (__arm_vrshrq_x_n_u8): Remove.
23585 (__arm_vrshrq_x_n_u16): Remove.
23586 (__arm_vrshrq_x_n_u32): Remove.
23587 (__arm_vshrq_x_n_s8): Remove.
23588 (__arm_vshrq_x_n_s16): Remove.
23589 (__arm_vshrq_x_n_s32): Remove.
23590 (__arm_vshrq_x_n_u8): Remove.
23591 (__arm_vshrq_x_n_u16): Remove.
23592 (__arm_vshrq_x_n_u32): Remove.
23593 (__arm_vshrq): Remove.
23594 (__arm_vrshrq): Remove.
23595 (__arm_vrshrq_m): Remove.
23596 (__arm_vshrq_m): Remove.
23597 (__arm_vrshrq_x): Remove.
23598 (__arm_vshrq_x): Remove.
23600 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23602 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
23603 (mve_insn): Add vrshr, vshr.
23604 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
23605 (mve_vrshrq_n_<supf><mode>): Merge into ...
23606 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23607 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
23609 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23611 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23613 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
23614 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
23616 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23618 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
23619 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
23620 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
23621 (vqrshrunbq, vqrshruntq): New.
23622 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
23623 (vqrshrunbq, vqrshruntq): New.
23624 * config/arm/arm-mve-builtins.cc
23625 (function_instance::has_inactive_argument): Handle vqshrunbq,
23626 vqshruntq, vqrshrunbq, vqrshruntq.
23627 * config/arm/arm_mve.h (vqrshrunbq): Remove.
23628 (vqrshruntq): Remove.
23629 (vqrshrunbq_m): Remove.
23630 (vqrshruntq_m): Remove.
23631 (vqrshrunbq_n_s16): Remove.
23632 (vqrshrunbq_n_s32): Remove.
23633 (vqrshruntq_n_s16): Remove.
23634 (vqrshruntq_n_s32): Remove.
23635 (vqrshrunbq_m_n_s32): Remove.
23636 (vqrshrunbq_m_n_s16): Remove.
23637 (vqrshruntq_m_n_s32): Remove.
23638 (vqrshruntq_m_n_s16): Remove.
23639 (__arm_vqrshrunbq_n_s16): Remove.
23640 (__arm_vqrshrunbq_n_s32): Remove.
23641 (__arm_vqrshruntq_n_s16): Remove.
23642 (__arm_vqrshruntq_n_s32): Remove.
23643 (__arm_vqrshrunbq_m_n_s32): Remove.
23644 (__arm_vqrshrunbq_m_n_s16): Remove.
23645 (__arm_vqrshruntq_m_n_s32): Remove.
23646 (__arm_vqrshruntq_m_n_s16): Remove.
23647 (__arm_vqrshrunbq): Remove.
23648 (__arm_vqrshruntq): Remove.
23649 (__arm_vqrshrunbq_m): Remove.
23650 (__arm_vqrshruntq_m): Remove.
23651 (vqshrunbq): Remove.
23652 (vqshruntq): Remove.
23653 (vqshrunbq_m): Remove.
23654 (vqshruntq_m): Remove.
23655 (vqshrunbq_n_s16): Remove.
23656 (vqshruntq_n_s16): Remove.
23657 (vqshrunbq_n_s32): Remove.
23658 (vqshruntq_n_s32): Remove.
23659 (vqshrunbq_m_n_s32): Remove.
23660 (vqshrunbq_m_n_s16): Remove.
23661 (vqshruntq_m_n_s32): Remove.
23662 (vqshruntq_m_n_s16): Remove.
23663 (__arm_vqshrunbq_n_s16): Remove.
23664 (__arm_vqshruntq_n_s16): Remove.
23665 (__arm_vqshrunbq_n_s32): Remove.
23666 (__arm_vqshruntq_n_s32): Remove.
23667 (__arm_vqshrunbq_m_n_s32): Remove.
23668 (__arm_vqshrunbq_m_n_s16): Remove.
23669 (__arm_vqshruntq_m_n_s32): Remove.
23670 (__arm_vqshruntq_m_n_s16): Remove.
23671 (__arm_vqshrunbq): Remove.
23672 (__arm_vqshruntq): Remove.
23673 (__arm_vqshrunbq_m): Remove.
23674 (__arm_vqshruntq_m): Remove.
23676 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23678 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
23679 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
23680 (MVE_SHRN_M_N): Likewise.
23681 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
23682 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
23684 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
23685 (mve_vqrshruntq_n_s<mode>): Remove.
23686 (mve_vqshrunbq_n_s<mode>): Remove.
23687 (mve_vqshruntq_n_s<mode>): Remove.
23688 (mve_vqrshrunbq_m_n_s<mode>): Remove.
23689 (mve_vqrshruntq_m_n_s<mode>): Remove.
23690 (mve_vqshrunbq_m_n_s<mode>): Remove.
23691 (mve_vqshruntq_m_n_s<mode>): Remove.
23693 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23695 * config/arm/arm-mve-builtins-shapes.cc
23696 (binary_rshift_narrow_unsigned): New.
23697 * config/arm/arm-mve-builtins-shapes.h
23698 (binary_rshift_narrow_unsigned): New.
23700 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23702 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
23703 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
23704 (vqrshrnbq, vqrshrntq): New.
23705 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
23706 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
23708 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
23709 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
23710 * config/arm/arm-mve-builtins.cc
23711 (function_instance::has_inactive_argument): Handle vshrnbq,
23712 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
23714 * config/arm/arm_mve.h (vshrnbq): Remove.
23716 (vshrnbq_m): Remove.
23717 (vshrntq_m): Remove.
23718 (vshrnbq_n_s16): Remove.
23719 (vshrntq_n_s16): Remove.
23720 (vshrnbq_n_u16): Remove.
23721 (vshrntq_n_u16): Remove.
23722 (vshrnbq_n_s32): Remove.
23723 (vshrntq_n_s32): Remove.
23724 (vshrnbq_n_u32): Remove.
23725 (vshrntq_n_u32): Remove.
23726 (vshrnbq_m_n_s32): Remove.
23727 (vshrnbq_m_n_s16): Remove.
23728 (vshrnbq_m_n_u32): Remove.
23729 (vshrnbq_m_n_u16): Remove.
23730 (vshrntq_m_n_s32): Remove.
23731 (vshrntq_m_n_s16): Remove.
23732 (vshrntq_m_n_u32): Remove.
23733 (vshrntq_m_n_u16): Remove.
23734 (__arm_vshrnbq_n_s16): Remove.
23735 (__arm_vshrntq_n_s16): Remove.
23736 (__arm_vshrnbq_n_u16): Remove.
23737 (__arm_vshrntq_n_u16): Remove.
23738 (__arm_vshrnbq_n_s32): Remove.
23739 (__arm_vshrntq_n_s32): Remove.
23740 (__arm_vshrnbq_n_u32): Remove.
23741 (__arm_vshrntq_n_u32): Remove.
23742 (__arm_vshrnbq_m_n_s32): Remove.
23743 (__arm_vshrnbq_m_n_s16): Remove.
23744 (__arm_vshrnbq_m_n_u32): Remove.
23745 (__arm_vshrnbq_m_n_u16): Remove.
23746 (__arm_vshrntq_m_n_s32): Remove.
23747 (__arm_vshrntq_m_n_s16): Remove.
23748 (__arm_vshrntq_m_n_u32): Remove.
23749 (__arm_vshrntq_m_n_u16): Remove.
23750 (__arm_vshrnbq): Remove.
23751 (__arm_vshrntq): Remove.
23752 (__arm_vshrnbq_m): Remove.
23753 (__arm_vshrntq_m): Remove.
23754 (vrshrnbq): Remove.
23755 (vrshrntq): Remove.
23756 (vrshrnbq_m): Remove.
23757 (vrshrntq_m): Remove.
23758 (vrshrnbq_n_s16): Remove.
23759 (vrshrntq_n_s16): Remove.
23760 (vrshrnbq_n_u16): Remove.
23761 (vrshrntq_n_u16): Remove.
23762 (vrshrnbq_n_s32): Remove.
23763 (vrshrntq_n_s32): Remove.
23764 (vrshrnbq_n_u32): Remove.
23765 (vrshrntq_n_u32): Remove.
23766 (vrshrnbq_m_n_s32): Remove.
23767 (vrshrnbq_m_n_s16): Remove.
23768 (vrshrnbq_m_n_u32): Remove.
23769 (vrshrnbq_m_n_u16): Remove.
23770 (vrshrntq_m_n_s32): Remove.
23771 (vrshrntq_m_n_s16): Remove.
23772 (vrshrntq_m_n_u32): Remove.
23773 (vrshrntq_m_n_u16): Remove.
23774 (__arm_vrshrnbq_n_s16): Remove.
23775 (__arm_vrshrntq_n_s16): Remove.
23776 (__arm_vrshrnbq_n_u16): Remove.
23777 (__arm_vrshrntq_n_u16): Remove.
23778 (__arm_vrshrnbq_n_s32): Remove.
23779 (__arm_vrshrntq_n_s32): Remove.
23780 (__arm_vrshrnbq_n_u32): Remove.
23781 (__arm_vrshrntq_n_u32): Remove.
23782 (__arm_vrshrnbq_m_n_s32): Remove.
23783 (__arm_vrshrnbq_m_n_s16): Remove.
23784 (__arm_vrshrnbq_m_n_u32): Remove.
23785 (__arm_vrshrnbq_m_n_u16): Remove.
23786 (__arm_vrshrntq_m_n_s32): Remove.
23787 (__arm_vrshrntq_m_n_s16): Remove.
23788 (__arm_vrshrntq_m_n_u32): Remove.
23789 (__arm_vrshrntq_m_n_u16): Remove.
23790 (__arm_vrshrnbq): Remove.
23791 (__arm_vrshrntq): Remove.
23792 (__arm_vrshrnbq_m): Remove.
23793 (__arm_vrshrntq_m): Remove.
23794 (vqshrnbq): Remove.
23795 (vqshrntq): Remove.
23796 (vqshrnbq_m): Remove.
23797 (vqshrntq_m): Remove.
23798 (vqshrnbq_n_s16): Remove.
23799 (vqshrntq_n_s16): Remove.
23800 (vqshrnbq_n_u16): Remove.
23801 (vqshrntq_n_u16): Remove.
23802 (vqshrnbq_n_s32): Remove.
23803 (vqshrntq_n_s32): Remove.
23804 (vqshrnbq_n_u32): Remove.
23805 (vqshrntq_n_u32): Remove.
23806 (vqshrnbq_m_n_s32): Remove.
23807 (vqshrnbq_m_n_s16): Remove.
23808 (vqshrnbq_m_n_u32): Remove.
23809 (vqshrnbq_m_n_u16): Remove.
23810 (vqshrntq_m_n_s32): Remove.
23811 (vqshrntq_m_n_s16): Remove.
23812 (vqshrntq_m_n_u32): Remove.
23813 (vqshrntq_m_n_u16): Remove.
23814 (__arm_vqshrnbq_n_s16): Remove.
23815 (__arm_vqshrntq_n_s16): Remove.
23816 (__arm_vqshrnbq_n_u16): Remove.
23817 (__arm_vqshrntq_n_u16): Remove.
23818 (__arm_vqshrnbq_n_s32): Remove.
23819 (__arm_vqshrntq_n_s32): Remove.
23820 (__arm_vqshrnbq_n_u32): Remove.
23821 (__arm_vqshrntq_n_u32): Remove.
23822 (__arm_vqshrnbq_m_n_s32): Remove.
23823 (__arm_vqshrnbq_m_n_s16): Remove.
23824 (__arm_vqshrnbq_m_n_u32): Remove.
23825 (__arm_vqshrnbq_m_n_u16): Remove.
23826 (__arm_vqshrntq_m_n_s32): Remove.
23827 (__arm_vqshrntq_m_n_s16): Remove.
23828 (__arm_vqshrntq_m_n_u32): Remove.
23829 (__arm_vqshrntq_m_n_u16): Remove.
23830 (__arm_vqshrnbq): Remove.
23831 (__arm_vqshrntq): Remove.
23832 (__arm_vqshrnbq_m): Remove.
23833 (__arm_vqshrntq_m): Remove.
23834 (vqrshrnbq): Remove.
23835 (vqrshrntq): Remove.
23836 (vqrshrnbq_m): Remove.
23837 (vqrshrntq_m): Remove.
23838 (vqrshrnbq_n_s16): Remove.
23839 (vqrshrnbq_n_u16): Remove.
23840 (vqrshrnbq_n_s32): Remove.
23841 (vqrshrnbq_n_u32): Remove.
23842 (vqrshrntq_n_s16): Remove.
23843 (vqrshrntq_n_u16): Remove.
23844 (vqrshrntq_n_s32): Remove.
23845 (vqrshrntq_n_u32): Remove.
23846 (vqrshrnbq_m_n_s32): Remove.
23847 (vqrshrnbq_m_n_s16): Remove.
23848 (vqrshrnbq_m_n_u32): Remove.
23849 (vqrshrnbq_m_n_u16): Remove.
23850 (vqrshrntq_m_n_s32): Remove.
23851 (vqrshrntq_m_n_s16): Remove.
23852 (vqrshrntq_m_n_u32): Remove.
23853 (vqrshrntq_m_n_u16): Remove.
23854 (__arm_vqrshrnbq_n_s16): Remove.
23855 (__arm_vqrshrnbq_n_u16): Remove.
23856 (__arm_vqrshrnbq_n_s32): Remove.
23857 (__arm_vqrshrnbq_n_u32): Remove.
23858 (__arm_vqrshrntq_n_s16): Remove.
23859 (__arm_vqrshrntq_n_u16): Remove.
23860 (__arm_vqrshrntq_n_s32): Remove.
23861 (__arm_vqrshrntq_n_u32): Remove.
23862 (__arm_vqrshrnbq_m_n_s32): Remove.
23863 (__arm_vqrshrnbq_m_n_s16): Remove.
23864 (__arm_vqrshrnbq_m_n_u32): Remove.
23865 (__arm_vqrshrnbq_m_n_u16): Remove.
23866 (__arm_vqrshrntq_m_n_s32): Remove.
23867 (__arm_vqrshrntq_m_n_s16): Remove.
23868 (__arm_vqrshrntq_m_n_u32): Remove.
23869 (__arm_vqrshrntq_m_n_u16): Remove.
23870 (__arm_vqrshrnbq): Remove.
23871 (__arm_vqrshrntq): Remove.
23872 (__arm_vqrshrnbq_m): Remove.
23873 (__arm_vqrshrntq_m): Remove.
23875 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23877 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
23878 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
23879 vrshrnt, vshrnb, vshrnt.
23881 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
23882 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
23883 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
23884 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
23885 (mve_vshrntq_n_<supf><mode>): Merge into ...
23886 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23887 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
23888 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
23889 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
23890 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
23892 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23894 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23896 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
23898 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
23900 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23902 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
23903 (vmaxq, vminq): New.
23904 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
23905 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
23906 * config/arm/arm_mve.h (vminq): Remove.
23912 (vminq_u8): Remove.
23913 (vmaxq_u8): Remove.
23914 (vminq_s8): Remove.
23915 (vmaxq_s8): Remove.
23916 (vminq_u16): Remove.
23917 (vmaxq_u16): Remove.
23918 (vminq_s16): Remove.
23919 (vmaxq_s16): Remove.
23920 (vminq_u32): Remove.
23921 (vmaxq_u32): Remove.
23922 (vminq_s32): Remove.
23923 (vmaxq_s32): Remove.
23924 (vmaxq_m_s8): Remove.
23925 (vmaxq_m_s32): Remove.
23926 (vmaxq_m_s16): Remove.
23927 (vmaxq_m_u8): Remove.
23928 (vmaxq_m_u32): Remove.
23929 (vmaxq_m_u16): Remove.
23930 (vminq_m_s8): Remove.
23931 (vminq_m_s32): Remove.
23932 (vminq_m_s16): Remove.
23933 (vminq_m_u8): Remove.
23934 (vminq_m_u32): Remove.
23935 (vminq_m_u16): Remove.
23936 (vminq_x_s8): Remove.
23937 (vminq_x_s16): Remove.
23938 (vminq_x_s32): Remove.
23939 (vminq_x_u8): Remove.
23940 (vminq_x_u16): Remove.
23941 (vminq_x_u32): Remove.
23942 (vmaxq_x_s8): Remove.
23943 (vmaxq_x_s16): Remove.
23944 (vmaxq_x_s32): Remove.
23945 (vmaxq_x_u8): Remove.
23946 (vmaxq_x_u16): Remove.
23947 (vmaxq_x_u32): Remove.
23948 (__arm_vminq_u8): Remove.
23949 (__arm_vmaxq_u8): Remove.
23950 (__arm_vminq_s8): Remove.
23951 (__arm_vmaxq_s8): Remove.
23952 (__arm_vminq_u16): Remove.
23953 (__arm_vmaxq_u16): Remove.
23954 (__arm_vminq_s16): Remove.
23955 (__arm_vmaxq_s16): Remove.
23956 (__arm_vminq_u32): Remove.
23957 (__arm_vmaxq_u32): Remove.
23958 (__arm_vminq_s32): Remove.
23959 (__arm_vmaxq_s32): Remove.
23960 (__arm_vmaxq_m_s8): Remove.
23961 (__arm_vmaxq_m_s32): Remove.
23962 (__arm_vmaxq_m_s16): Remove.
23963 (__arm_vmaxq_m_u8): Remove.
23964 (__arm_vmaxq_m_u32): Remove.
23965 (__arm_vmaxq_m_u16): Remove.
23966 (__arm_vminq_m_s8): Remove.
23967 (__arm_vminq_m_s32): Remove.
23968 (__arm_vminq_m_s16): Remove.
23969 (__arm_vminq_m_u8): Remove.
23970 (__arm_vminq_m_u32): Remove.
23971 (__arm_vminq_m_u16): Remove.
23972 (__arm_vminq_x_s8): Remove.
23973 (__arm_vminq_x_s16): Remove.
23974 (__arm_vminq_x_s32): Remove.
23975 (__arm_vminq_x_u8): Remove.
23976 (__arm_vminq_x_u16): Remove.
23977 (__arm_vminq_x_u32): Remove.
23978 (__arm_vmaxq_x_s8): Remove.
23979 (__arm_vmaxq_x_s16): Remove.
23980 (__arm_vmaxq_x_s32): Remove.
23981 (__arm_vmaxq_x_u8): Remove.
23982 (__arm_vmaxq_x_u16): Remove.
23983 (__arm_vmaxq_x_u32): Remove.
23984 (__arm_vminq): Remove.
23985 (__arm_vmaxq): Remove.
23986 (__arm_vmaxq_m): Remove.
23987 (__arm_vminq_m): Remove.
23988 (__arm_vminq_x): Remove.
23989 (__arm_vmaxq_x): Remove.
23991 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23993 * config/arm/iterators.md (MAX_MIN_SU): New.
23994 (max_min_su_str): New.
23995 (max_min_supf): New.
23996 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
23997 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
23998 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
24000 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24002 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
24003 (vqshlq, vshlq): New.
24004 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
24005 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
24006 * config/arm/arm_mve.h (vshlq): Remove.
24009 (vshlq_m_r): Remove.
24011 (vshlq_m_n): Remove.
24013 (vshlq_x_n): Remove.
24014 (vshlq_s8): Remove.
24015 (vshlq_s16): Remove.
24016 (vshlq_s32): Remove.
24017 (vshlq_u8): Remove.
24018 (vshlq_u16): Remove.
24019 (vshlq_u32): Remove.
24020 (vshlq_r_u8): Remove.
24021 (vshlq_n_u8): Remove.
24022 (vshlq_r_s8): Remove.
24023 (vshlq_n_s8): Remove.
24024 (vshlq_r_u16): Remove.
24025 (vshlq_n_u16): Remove.
24026 (vshlq_r_s16): Remove.
24027 (vshlq_n_s16): Remove.
24028 (vshlq_r_u32): Remove.
24029 (vshlq_n_u32): Remove.
24030 (vshlq_r_s32): Remove.
24031 (vshlq_n_s32): Remove.
24032 (vshlq_m_r_u8): Remove.
24033 (vshlq_m_r_s8): Remove.
24034 (vshlq_m_r_u16): Remove.
24035 (vshlq_m_r_s16): Remove.
24036 (vshlq_m_r_u32): Remove.
24037 (vshlq_m_r_s32): Remove.
24038 (vshlq_m_u8): Remove.
24039 (vshlq_m_s8): Remove.
24040 (vshlq_m_u16): Remove.
24041 (vshlq_m_s16): Remove.
24042 (vshlq_m_u32): Remove.
24043 (vshlq_m_s32): Remove.
24044 (vshlq_m_n_s8): Remove.
24045 (vshlq_m_n_s32): Remove.
24046 (vshlq_m_n_s16): Remove.
24047 (vshlq_m_n_u8): Remove.
24048 (vshlq_m_n_u32): Remove.
24049 (vshlq_m_n_u16): Remove.
24050 (vshlq_x_s8): Remove.
24051 (vshlq_x_s16): Remove.
24052 (vshlq_x_s32): Remove.
24053 (vshlq_x_u8): Remove.
24054 (vshlq_x_u16): Remove.
24055 (vshlq_x_u32): Remove.
24056 (vshlq_x_n_s8): Remove.
24057 (vshlq_x_n_s16): Remove.
24058 (vshlq_x_n_s32): Remove.
24059 (vshlq_x_n_u8): Remove.
24060 (vshlq_x_n_u16): Remove.
24061 (vshlq_x_n_u32): Remove.
24062 (__arm_vshlq_s8): Remove.
24063 (__arm_vshlq_s16): Remove.
24064 (__arm_vshlq_s32): Remove.
24065 (__arm_vshlq_u8): Remove.
24066 (__arm_vshlq_u16): Remove.
24067 (__arm_vshlq_u32): Remove.
24068 (__arm_vshlq_r_u8): Remove.
24069 (__arm_vshlq_n_u8): Remove.
24070 (__arm_vshlq_r_s8): Remove.
24071 (__arm_vshlq_n_s8): Remove.
24072 (__arm_vshlq_r_u16): Remove.
24073 (__arm_vshlq_n_u16): Remove.
24074 (__arm_vshlq_r_s16): Remove.
24075 (__arm_vshlq_n_s16): Remove.
24076 (__arm_vshlq_r_u32): Remove.
24077 (__arm_vshlq_n_u32): Remove.
24078 (__arm_vshlq_r_s32): Remove.
24079 (__arm_vshlq_n_s32): Remove.
24080 (__arm_vshlq_m_r_u8): Remove.
24081 (__arm_vshlq_m_r_s8): Remove.
24082 (__arm_vshlq_m_r_u16): Remove.
24083 (__arm_vshlq_m_r_s16): Remove.
24084 (__arm_vshlq_m_r_u32): Remove.
24085 (__arm_vshlq_m_r_s32): Remove.
24086 (__arm_vshlq_m_u8): Remove.
24087 (__arm_vshlq_m_s8): Remove.
24088 (__arm_vshlq_m_u16): Remove.
24089 (__arm_vshlq_m_s16): Remove.
24090 (__arm_vshlq_m_u32): Remove.
24091 (__arm_vshlq_m_s32): Remove.
24092 (__arm_vshlq_m_n_s8): Remove.
24093 (__arm_vshlq_m_n_s32): Remove.
24094 (__arm_vshlq_m_n_s16): Remove.
24095 (__arm_vshlq_m_n_u8): Remove.
24096 (__arm_vshlq_m_n_u32): Remove.
24097 (__arm_vshlq_m_n_u16): Remove.
24098 (__arm_vshlq_x_s8): Remove.
24099 (__arm_vshlq_x_s16): Remove.
24100 (__arm_vshlq_x_s32): Remove.
24101 (__arm_vshlq_x_u8): Remove.
24102 (__arm_vshlq_x_u16): Remove.
24103 (__arm_vshlq_x_u32): Remove.
24104 (__arm_vshlq_x_n_s8): Remove.
24105 (__arm_vshlq_x_n_s16): Remove.
24106 (__arm_vshlq_x_n_s32): Remove.
24107 (__arm_vshlq_x_n_u8): Remove.
24108 (__arm_vshlq_x_n_u16): Remove.
24109 (__arm_vshlq_x_n_u32): Remove.
24110 (__arm_vshlq): Remove.
24111 (__arm_vshlq_r): Remove.
24112 (__arm_vshlq_n): Remove.
24113 (__arm_vshlq_m_r): Remove.
24114 (__arm_vshlq_m): Remove.
24115 (__arm_vshlq_m_n): Remove.
24116 (__arm_vshlq_x): Remove.
24117 (__arm_vshlq_x_n): Remove.
24119 (vqshlq_r): Remove.
24120 (vqshlq_n): Remove.
24121 (vqshlq_m_r): Remove.
24122 (vqshlq_m_n): Remove.
24123 (vqshlq_m): Remove.
24124 (vqshlq_u8): Remove.
24125 (vqshlq_r_u8): Remove.
24126 (vqshlq_n_u8): Remove.
24127 (vqshlq_s8): Remove.
24128 (vqshlq_r_s8): Remove.
24129 (vqshlq_n_s8): Remove.
24130 (vqshlq_u16): Remove.
24131 (vqshlq_r_u16): Remove.
24132 (vqshlq_n_u16): Remove.
24133 (vqshlq_s16): Remove.
24134 (vqshlq_r_s16): Remove.
24135 (vqshlq_n_s16): Remove.
24136 (vqshlq_u32): Remove.
24137 (vqshlq_r_u32): Remove.
24138 (vqshlq_n_u32): Remove.
24139 (vqshlq_s32): Remove.
24140 (vqshlq_r_s32): Remove.
24141 (vqshlq_n_s32): Remove.
24142 (vqshlq_m_r_u8): Remove.
24143 (vqshlq_m_r_s8): Remove.
24144 (vqshlq_m_r_u16): Remove.
24145 (vqshlq_m_r_s16): Remove.
24146 (vqshlq_m_r_u32): Remove.
24147 (vqshlq_m_r_s32): Remove.
24148 (vqshlq_m_n_s8): Remove.
24149 (vqshlq_m_n_s32): Remove.
24150 (vqshlq_m_n_s16): Remove.
24151 (vqshlq_m_n_u8): Remove.
24152 (vqshlq_m_n_u32): Remove.
24153 (vqshlq_m_n_u16): Remove.
24154 (vqshlq_m_s8): Remove.
24155 (vqshlq_m_s32): Remove.
24156 (vqshlq_m_s16): Remove.
24157 (vqshlq_m_u8): Remove.
24158 (vqshlq_m_u32): Remove.
24159 (vqshlq_m_u16): Remove.
24160 (__arm_vqshlq_u8): Remove.
24161 (__arm_vqshlq_r_u8): Remove.
24162 (__arm_vqshlq_n_u8): Remove.
24163 (__arm_vqshlq_s8): Remove.
24164 (__arm_vqshlq_r_s8): Remove.
24165 (__arm_vqshlq_n_s8): Remove.
24166 (__arm_vqshlq_u16): Remove.
24167 (__arm_vqshlq_r_u16): Remove.
24168 (__arm_vqshlq_n_u16): Remove.
24169 (__arm_vqshlq_s16): Remove.
24170 (__arm_vqshlq_r_s16): Remove.
24171 (__arm_vqshlq_n_s16): Remove.
24172 (__arm_vqshlq_u32): Remove.
24173 (__arm_vqshlq_r_u32): Remove.
24174 (__arm_vqshlq_n_u32): Remove.
24175 (__arm_vqshlq_s32): Remove.
24176 (__arm_vqshlq_r_s32): Remove.
24177 (__arm_vqshlq_n_s32): Remove.
24178 (__arm_vqshlq_m_r_u8): Remove.
24179 (__arm_vqshlq_m_r_s8): Remove.
24180 (__arm_vqshlq_m_r_u16): Remove.
24181 (__arm_vqshlq_m_r_s16): Remove.
24182 (__arm_vqshlq_m_r_u32): Remove.
24183 (__arm_vqshlq_m_r_s32): Remove.
24184 (__arm_vqshlq_m_n_s8): Remove.
24185 (__arm_vqshlq_m_n_s32): Remove.
24186 (__arm_vqshlq_m_n_s16): Remove.
24187 (__arm_vqshlq_m_n_u8): Remove.
24188 (__arm_vqshlq_m_n_u32): Remove.
24189 (__arm_vqshlq_m_n_u16): Remove.
24190 (__arm_vqshlq_m_s8): Remove.
24191 (__arm_vqshlq_m_s32): Remove.
24192 (__arm_vqshlq_m_s16): Remove.
24193 (__arm_vqshlq_m_u8): Remove.
24194 (__arm_vqshlq_m_u32): Remove.
24195 (__arm_vqshlq_m_u16): Remove.
24196 (__arm_vqshlq): Remove.
24197 (__arm_vqshlq_r): Remove.
24198 (__arm_vqshlq_n): Remove.
24199 (__arm_vqshlq_m_r): Remove.
24200 (__arm_vqshlq_m_n): Remove.
24201 (__arm_vqshlq_m): Remove.
24203 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24205 * config/arm/arm-mve-builtins-functions.h (class
24206 unspec_mve_function_exact_insn_vshl): New.
24208 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24210 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
24211 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
24213 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24215 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
24216 (finish_opt_n_resolution): Handle MODE_r.
24217 * config/arm/arm-mve-builtins.def (r): New mode.
24219 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24221 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
24222 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
24224 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24226 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
24228 * config/arm/arm-mve-builtins-base.def (vabdq): New.
24229 * config/arm/arm-mve-builtins-base.h (vabdq): New.
24230 * config/arm/arm_mve.h (vabdq): Remove.
24233 (vabdq_u8): Remove.
24234 (vabdq_s8): Remove.
24235 (vabdq_u16): Remove.
24236 (vabdq_s16): Remove.
24237 (vabdq_u32): Remove.
24238 (vabdq_s32): Remove.
24239 (vabdq_f16): Remove.
24240 (vabdq_f32): Remove.
24241 (vabdq_m_s8): Remove.
24242 (vabdq_m_s32): Remove.
24243 (vabdq_m_s16): Remove.
24244 (vabdq_m_u8): Remove.
24245 (vabdq_m_u32): Remove.
24246 (vabdq_m_u16): Remove.
24247 (vabdq_m_f32): Remove.
24248 (vabdq_m_f16): Remove.
24249 (vabdq_x_s8): Remove.
24250 (vabdq_x_s16): Remove.
24251 (vabdq_x_s32): Remove.
24252 (vabdq_x_u8): Remove.
24253 (vabdq_x_u16): Remove.
24254 (vabdq_x_u32): Remove.
24255 (vabdq_x_f16): Remove.
24256 (vabdq_x_f32): Remove.
24257 (__arm_vabdq_u8): Remove.
24258 (__arm_vabdq_s8): Remove.
24259 (__arm_vabdq_u16): Remove.
24260 (__arm_vabdq_s16): Remove.
24261 (__arm_vabdq_u32): Remove.
24262 (__arm_vabdq_s32): Remove.
24263 (__arm_vabdq_m_s8): Remove.
24264 (__arm_vabdq_m_s32): Remove.
24265 (__arm_vabdq_m_s16): Remove.
24266 (__arm_vabdq_m_u8): Remove.
24267 (__arm_vabdq_m_u32): Remove.
24268 (__arm_vabdq_m_u16): Remove.
24269 (__arm_vabdq_x_s8): Remove.
24270 (__arm_vabdq_x_s16): Remove.
24271 (__arm_vabdq_x_s32): Remove.
24272 (__arm_vabdq_x_u8): Remove.
24273 (__arm_vabdq_x_u16): Remove.
24274 (__arm_vabdq_x_u32): Remove.
24275 (__arm_vabdq_f16): Remove.
24276 (__arm_vabdq_f32): Remove.
24277 (__arm_vabdq_m_f32): Remove.
24278 (__arm_vabdq_m_f16): Remove.
24279 (__arm_vabdq_x_f16): Remove.
24280 (__arm_vabdq_x_f32): Remove.
24281 (__arm_vabdq): Remove.
24282 (__arm_vabdq_m): Remove.
24283 (__arm_vabdq_x): Remove.
24285 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24287 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
24288 (MVE_FP_VABDQ_ONLY): New.
24289 (mve_insn): Add vabd.
24290 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
24291 (@mve_<mve_insn>q_f<mode>): ... this.
24292 (mve_vabdq_m_f<mode>): Remove.
24294 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24296 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
24297 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
24298 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
24299 * config/arm/arm_mve.h (vqrdmulhq): Remove.
24300 (vqrdmulhq_m): Remove.
24301 (vqrdmulhq_s8): Remove.
24302 (vqrdmulhq_n_s8): Remove.
24303 (vqrdmulhq_s16): Remove.
24304 (vqrdmulhq_n_s16): Remove.
24305 (vqrdmulhq_s32): Remove.
24306 (vqrdmulhq_n_s32): Remove.
24307 (vqrdmulhq_m_n_s8): Remove.
24308 (vqrdmulhq_m_n_s32): Remove.
24309 (vqrdmulhq_m_n_s16): Remove.
24310 (vqrdmulhq_m_s8): Remove.
24311 (vqrdmulhq_m_s32): Remove.
24312 (vqrdmulhq_m_s16): Remove.
24313 (__arm_vqrdmulhq_s8): Remove.
24314 (__arm_vqrdmulhq_n_s8): Remove.
24315 (__arm_vqrdmulhq_s16): Remove.
24316 (__arm_vqrdmulhq_n_s16): Remove.
24317 (__arm_vqrdmulhq_s32): Remove.
24318 (__arm_vqrdmulhq_n_s32): Remove.
24319 (__arm_vqrdmulhq_m_n_s8): Remove.
24320 (__arm_vqrdmulhq_m_n_s32): Remove.
24321 (__arm_vqrdmulhq_m_n_s16): Remove.
24322 (__arm_vqrdmulhq_m_s8): Remove.
24323 (__arm_vqrdmulhq_m_s32): Remove.
24324 (__arm_vqrdmulhq_m_s16): Remove.
24325 (__arm_vqrdmulhq): Remove.
24326 (__arm_vqrdmulhq_m): Remove.
24328 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24330 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
24331 (MVE_SHIFT_N, MVE_SHIFT_R): New.
24332 (mve_insn): Add vqshl, vshl.
24333 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
24334 (mve_vshlq_n_<supf><mode>): Merge into ...
24335 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24336 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
24338 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
24339 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
24341 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
24342 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
24344 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24345 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
24347 (@mve_<mve_insn>q_<supf><mode>): ... this.
24349 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24351 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
24352 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
24353 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
24354 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
24356 * config/arm/arm_mve.h (vrshlq): Remove.
24357 (vrshlq_m_n): Remove.
24358 (vrshlq_m): Remove.
24359 (vrshlq_x): Remove.
24360 (vrshlq_u8): Remove.
24361 (vrshlq_n_u8): Remove.
24362 (vrshlq_s8): Remove.
24363 (vrshlq_n_s8): Remove.
24364 (vrshlq_u16): Remove.
24365 (vrshlq_n_u16): Remove.
24366 (vrshlq_s16): Remove.
24367 (vrshlq_n_s16): Remove.
24368 (vrshlq_u32): Remove.
24369 (vrshlq_n_u32): Remove.
24370 (vrshlq_s32): Remove.
24371 (vrshlq_n_s32): Remove.
24372 (vrshlq_m_n_u8): Remove.
24373 (vrshlq_m_n_s8): Remove.
24374 (vrshlq_m_n_u16): Remove.
24375 (vrshlq_m_n_s16): Remove.
24376 (vrshlq_m_n_u32): Remove.
24377 (vrshlq_m_n_s32): Remove.
24378 (vrshlq_m_s8): Remove.
24379 (vrshlq_m_s32): Remove.
24380 (vrshlq_m_s16): Remove.
24381 (vrshlq_m_u8): Remove.
24382 (vrshlq_m_u32): Remove.
24383 (vrshlq_m_u16): Remove.
24384 (vrshlq_x_s8): Remove.
24385 (vrshlq_x_s16): Remove.
24386 (vrshlq_x_s32): Remove.
24387 (vrshlq_x_u8): Remove.
24388 (vrshlq_x_u16): Remove.
24389 (vrshlq_x_u32): Remove.
24390 (__arm_vrshlq_u8): Remove.
24391 (__arm_vrshlq_n_u8): Remove.
24392 (__arm_vrshlq_s8): Remove.
24393 (__arm_vrshlq_n_s8): Remove.
24394 (__arm_vrshlq_u16): Remove.
24395 (__arm_vrshlq_n_u16): Remove.
24396 (__arm_vrshlq_s16): Remove.
24397 (__arm_vrshlq_n_s16): Remove.
24398 (__arm_vrshlq_u32): Remove.
24399 (__arm_vrshlq_n_u32): Remove.
24400 (__arm_vrshlq_s32): Remove.
24401 (__arm_vrshlq_n_s32): Remove.
24402 (__arm_vrshlq_m_n_u8): Remove.
24403 (__arm_vrshlq_m_n_s8): Remove.
24404 (__arm_vrshlq_m_n_u16): Remove.
24405 (__arm_vrshlq_m_n_s16): Remove.
24406 (__arm_vrshlq_m_n_u32): Remove.
24407 (__arm_vrshlq_m_n_s32): Remove.
24408 (__arm_vrshlq_m_s8): Remove.
24409 (__arm_vrshlq_m_s32): Remove.
24410 (__arm_vrshlq_m_s16): Remove.
24411 (__arm_vrshlq_m_u8): Remove.
24412 (__arm_vrshlq_m_u32): Remove.
24413 (__arm_vrshlq_m_u16): Remove.
24414 (__arm_vrshlq_x_s8): Remove.
24415 (__arm_vrshlq_x_s16): Remove.
24416 (__arm_vrshlq_x_s32): Remove.
24417 (__arm_vrshlq_x_u8): Remove.
24418 (__arm_vrshlq_x_u16): Remove.
24419 (__arm_vrshlq_x_u32): Remove.
24420 (__arm_vrshlq): Remove.
24421 (__arm_vrshlq_m_n): Remove.
24422 (__arm_vrshlq_m): Remove.
24423 (__arm_vrshlq_x): Remove.
24425 (vqrshlq_m_n): Remove.
24426 (vqrshlq_m): Remove.
24427 (vqrshlq_u8): Remove.
24428 (vqrshlq_n_u8): Remove.
24429 (vqrshlq_s8): Remove.
24430 (vqrshlq_n_s8): Remove.
24431 (vqrshlq_u16): Remove.
24432 (vqrshlq_n_u16): Remove.
24433 (vqrshlq_s16): Remove.
24434 (vqrshlq_n_s16): Remove.
24435 (vqrshlq_u32): Remove.
24436 (vqrshlq_n_u32): Remove.
24437 (vqrshlq_s32): Remove.
24438 (vqrshlq_n_s32): Remove.
24439 (vqrshlq_m_n_u8): Remove.
24440 (vqrshlq_m_n_s8): Remove.
24441 (vqrshlq_m_n_u16): Remove.
24442 (vqrshlq_m_n_s16): Remove.
24443 (vqrshlq_m_n_u32): Remove.
24444 (vqrshlq_m_n_s32): Remove.
24445 (vqrshlq_m_s8): Remove.
24446 (vqrshlq_m_s32): Remove.
24447 (vqrshlq_m_s16): Remove.
24448 (vqrshlq_m_u8): Remove.
24449 (vqrshlq_m_u32): Remove.
24450 (vqrshlq_m_u16): Remove.
24451 (__arm_vqrshlq_u8): Remove.
24452 (__arm_vqrshlq_n_u8): Remove.
24453 (__arm_vqrshlq_s8): Remove.
24454 (__arm_vqrshlq_n_s8): Remove.
24455 (__arm_vqrshlq_u16): Remove.
24456 (__arm_vqrshlq_n_u16): Remove.
24457 (__arm_vqrshlq_s16): Remove.
24458 (__arm_vqrshlq_n_s16): Remove.
24459 (__arm_vqrshlq_u32): Remove.
24460 (__arm_vqrshlq_n_u32): Remove.
24461 (__arm_vqrshlq_s32): Remove.
24462 (__arm_vqrshlq_n_s32): Remove.
24463 (__arm_vqrshlq_m_n_u8): Remove.
24464 (__arm_vqrshlq_m_n_s8): Remove.
24465 (__arm_vqrshlq_m_n_u16): Remove.
24466 (__arm_vqrshlq_m_n_s16): Remove.
24467 (__arm_vqrshlq_m_n_u32): Remove.
24468 (__arm_vqrshlq_m_n_s32): Remove.
24469 (__arm_vqrshlq_m_s8): Remove.
24470 (__arm_vqrshlq_m_s32): Remove.
24471 (__arm_vqrshlq_m_s16): Remove.
24472 (__arm_vqrshlq_m_u8): Remove.
24473 (__arm_vqrshlq_m_u32): Remove.
24474 (__arm_vqrshlq_m_u16): Remove.
24475 (__arm_vqrshlq): Remove.
24476 (__arm_vqrshlq_m_n): Remove.
24477 (__arm_vqrshlq_m): Remove.
24479 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24481 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
24482 (mve_insn): Add vqrshl, vrshl.
24483 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
24484 (mve_vrshlq_n_<supf><mode>): Merge into ...
24485 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24486 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
24488 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24490 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24492 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
24493 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
24495 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24498 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
24499 denegrate PHI optmization.
24501 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
24503 * config/i386/predicates.md (register_no_SP_operand):
24504 Rename from index_register_operand.
24505 (call_register_operand): Update for rename.
24506 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
24508 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24511 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
24512 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
24513 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
24514 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
24515 (s-match): Split into s-generic-match and s-gimple-match.
24516 * configure.ac (with-matchpd-partitions,
24517 DEFAULT_MATCHPD_PARTITIONS): New.
24518 * configure: Regenerate.
24520 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24523 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
24524 (decision_tree::gen): Accept list of files instead of single and update
24525 to write function definition to header and main file.
24526 (write_predicate): Likewise.
24527 (write_header): Emit pragmas and new includes.
24528 (main): Create file buffers and cleanup.
24529 (showUsage, write_header_includes): New.
24531 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24534 * Makefile.in (OBJS): Add gimple-match-exports.o.
24535 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
24536 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
24537 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
24538 gimple_resimplify5, constant_for_folding, convert_conditional_op,
24539 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
24540 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
24541 do_valueize, try_conditional_simplification, gimple_extract,
24542 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
24543 commutative_ternary_op_p, first_commutative_argument,
24544 associative_binary_op_p, directly_supported_p,
24545 get_conditional_internal_fn): Moved to gimple-match-exports.cc
24546 * gimple-match-exports.cc: New file.
24548 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24551 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
24553 (dt_simplify::gen_1): Use it.
24555 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24558 * genmatch.cc (output_line_directive): Only emit commented directive
24561 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24564 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
24566 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
24568 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
24569 unused in_mode/in_n variables.
24571 2023-05-05 Richard Biener <rguenther@suse.de>
24573 PR tree-optimization/109735
24574 * tree-vect-stmts.cc (vectorizable_operation): Perform
24575 conversion for POINTER_DIFF_EXPR unconditionally.
24577 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
24579 * config/i386/mmx.md (mulv2si3): New expander.
24580 (*mulv2si3): New insn pattern.
24582 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
24583 Thomas Schwinge <thomas@codesourcery.com>
24586 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
24587 alongside reverse-offload function table to prevent NULL values
24588 of the function addresses.
24590 2023-05-05 Jakub Jelinek <jakub@redhat.com>
24592 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
24594 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
24596 2023-05-05 Andrew Pinski <apinski@marvell.com>
24598 PR tree-optimization/109732
24599 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
24600 of the argtrue/argfalse.
24602 2023-05-05 Andrew Pinski <apinski@marvell.com>
24604 PR tree-optimization/109722
24605 * match.pd: Extend the `ABS<a> == 0` pattern
24606 to cover `ABSU<a> == 0` too.
24608 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
24611 * config/i386/predicates.md (index_reg_operand): New predicate.
24612 * config/i386/i386.md (ashift to lea spliter): Use
24613 general_reg_operand and index_reg_operand predicates.
24615 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24617 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
24618 Rename and reimplement with RTL codes to...
24619 (aarch64_<optab>hn2<mode>_insn_le): .. This.
24620 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
24621 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
24623 (aarch64_<optab>hn2<mode>_insn_be): ... This.
24624 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
24625 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
24626 (aarch64_<optab>hn2<mode>): ... This.
24627 (aarch64_r<optab>hn2<mode>): New expander.
24628 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
24629 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
24630 (ADDSUBHN): Delete.
24631 (sur): Remove handling of the above.
24632 (addsub): Likewise.
24634 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24636 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
24638 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
24639 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
24640 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
24641 (aarch64_<sur><addsub>hn<mode>): Delete.
24642 (aarch64_<optab>hn<mode>): New define_expand.
24643 (aarch64_r<optab>hn<mode>): Likewise.
24644 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
24647 2023-05-04 Andrew Pinski <apinski@marvell.com>
24649 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
24650 diamond form bb with forwarder only empty blocks better.
24652 2023-05-04 Andrew Pinski <apinski@marvell.com>
24654 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
24655 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
24656 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
24657 of an inline version of it.
24658 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
24659 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
24661 2023-05-04 Andrew Pinski <apinski@marvell.com>
24663 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
24664 the default argument value for dce_ssa_names to nullptr.
24665 Check to make sure dce_ssa_names is a non-nullptr before
24666 calling simple_dce_from_worklist.
24668 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
24670 * config/i386/predicates.md (index_register_operand): Reject
24671 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
24672 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
24673 (call_register_no_elim_operand): Rewrite as ...
24674 (call_register_operand): ... this.
24675 (call_insn_operand): Use call_register_operand predicate.
24677 2023-05-04 Richard Biener <rguenther@suse.de>
24679 PR tree-optimization/109721
24680 * tree-vect-stmts.cc (vectorizable_operation): Make sure
24681 to test word_mode for all !target_support_p operations.
24683 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24686 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
24687 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
24688 (aarch64_mla<mode>): Rename to...
24689 (aarch64_mla<mode><vczle><vczbe>): ... This.
24690 (*aarch64_mla_elt<mode>): Rename to...
24691 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
24692 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
24693 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24694 (aarch64_mla_n<mode>): Rename to...
24695 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
24696 (aarch64_mls<mode>): Rename to...
24697 (aarch64_mls<mode><vczle><vczbe>): ... This.
24698 (*aarch64_mls_elt<mode>): Rename to...
24699 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
24700 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
24701 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24702 (aarch64_mls_n<mode>): Rename to...
24703 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
24704 (fma<mode>4): Rename to...
24705 (fma<mode>4<vczle><vczbe>): ... This.
24706 (*aarch64_fma4_elt<mode>): Rename to...
24707 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
24708 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
24709 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24710 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
24711 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
24712 (fnma<mode>4): Rename to...
24713 (fnma<mode>4<vczle><vczbe>): ... This.
24714 (*aarch64_fnma4_elt<mode>): Rename to...
24715 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
24716 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
24717 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24718 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
24719 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
24720 (aarch64_simd_bsl<mode>_internal): Rename to...
24721 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
24722 (*aarch64_simd_bsl<mode>_alt): Rename to...
24723 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
24725 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24728 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
24729 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
24730 (fabd<mode>3): Rename to...
24731 (fabd<mode>3<vczle><vczbe>): ... This.
24732 (aarch64_<optab>p<mode>): Rename to...
24733 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
24734 (aarch64_faddp<mode>): Rename to...
24735 (aarch64_faddp<mode><vczle><vczbe>): ... This.
24737 2023-05-04 Martin Liska <mliska@suse.cz>
24739 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
24740 (print_version): Use it.
24741 (generate_results): Likewise.
24743 2023-05-04 Richard Biener <rguenther@suse.de>
24745 * tree-cfg.h (last_stmt): Rename to ...
24746 (last_nondebug_stmt): ... this.
24747 * tree-cfg.cc (last_stmt): Rename to ...
24748 (last_nondebug_stmt): ... this.
24749 (assign_discriminators): Adjust.
24750 (group_case_labels_stmt): Likewise.
24751 (gimple_can_duplicate_bb_p): Likewise.
24752 (execute_fixup_cfg): Likewise.
24753 * auto-profile.cc (afdo_propagate_circuit): Likewise.
24754 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
24755 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
24756 (determine_parallel_type): Likewise.
24757 (adjust_context_and_scope): Likewise.
24758 (expand_task_call): Likewise.
24759 (remove_exit_barrier): Likewise.
24760 (expand_omp_taskreg): Likewise.
24761 (expand_omp_for_init_counts): Likewise.
24762 (expand_omp_for_init_vars): Likewise.
24763 (expand_omp_for_static_chunk): Likewise.
24764 (expand_omp_simd): Likewise.
24765 (expand_oacc_for): Likewise.
24766 (expand_omp_for): Likewise.
24767 (expand_omp_sections): Likewise.
24768 (expand_omp_atomic_fetch_op): Likewise.
24769 (expand_omp_atomic_cas): Likewise.
24770 (expand_omp_atomic): Likewise.
24771 (expand_omp_target): Likewise.
24772 (expand_omp): Likewise.
24773 (omp_make_gimple_edges): Likewise.
24774 * trans-mem.cc (tm_region_init): Likewise.
24775 * tree-inline.cc (redirect_all_calls): Likewise.
24776 * tree-parloops.cc (gen_parallel_loop): Likewise.
24777 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
24778 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
24780 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
24781 (may_eliminate_iv): Likewise.
24782 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
24783 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
24785 (estimate_numbers_of_iterations): Likewise.
24786 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
24787 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
24788 (set_predicates_for_bb): Likewise.
24789 (init_loop_unswitch_info): Likewise.
24790 (hoist_guard): Likewise.
24791 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
24792 (minmax_replacement): Likewise.
24793 * tree-ssa-reassoc.cc (update_range_test): Likewise.
24794 (optimize_range_tests_to_bit_test): Likewise.
24795 (optimize_range_tests_var_bound): Likewise.
24796 (optimize_range_tests): Likewise.
24797 (no_side_effect_bb): Likewise.
24798 (suitable_cond_bb): Likewise.
24799 (maybe_optimize_range_tests): Likewise.
24800 (reassociate_bb): Likewise.
24801 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
24803 2023-05-04 Jakub Jelinek <jakub@redhat.com>
24806 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
24807 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
24808 for it only if it still has TImode. Don't decide whether to call
24809 fix_debug_reg_uses based on whether SRC is ever set or not.
24811 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24813 * config/cris/cris.cc (cris_split_constant): New function.
24814 * config/cris/cris.md (splitop): New iterator.
24815 (opsplit1): New define_peephole2.
24816 * config/cris/cris-protos.h (cris_split_constant): Declare.
24817 (cris_splittable_constant_p): New macro.
24819 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24821 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
24824 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24826 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
24827 lra_in_progress, not reload_in_progress.
24828 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
24829 * config/cris/constraints.md ("Q"): Ditto.
24831 2023-05-03 Andrew Pinski <apinski@marvell.com>
24833 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
24834 stats on removed number of statements and phis.
24836 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
24838 PR tree-optimization/109711
24839 * value-range.cc (irange::verify_range): Allow types of
24842 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
24845 * calls.cc (can_implement_as_sibling_call_p): Reject calls
24846 to __sanitizer_cov_trace_pc.
24848 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
24851 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
24852 a new ABI break parameter for GCC 14. Set it to the alignment
24853 of enums that have an underlying type. Take the true alignment
24854 of such enums from the TYPE_ALIGN of the underlying type's
24856 (aarch64_function_arg_boundary): Update accordingly.
24857 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
24858 Warn about ABI differences.
24860 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
24863 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
24864 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
24865 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
24866 (aarch64_gimplify_va_arg_expr): Likewise.
24868 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24870 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
24871 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
24872 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
24874 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
24875 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
24876 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
24877 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
24878 * config/arm/arm_mve.h (vhsubq): Remove.
24880 (vhaddq_m): Remove.
24881 (vhsubq_m): Remove.
24882 (vhaddq_x): Remove.
24883 (vhsubq_x): Remove.
24884 (vhsubq_u8): Remove.
24885 (vhsubq_n_u8): Remove.
24886 (vhaddq_u8): Remove.
24887 (vhaddq_n_u8): Remove.
24888 (vhsubq_s8): Remove.
24889 (vhsubq_n_s8): Remove.
24890 (vhaddq_s8): Remove.
24891 (vhaddq_n_s8): Remove.
24892 (vhsubq_u16): Remove.
24893 (vhsubq_n_u16): Remove.
24894 (vhaddq_u16): Remove.
24895 (vhaddq_n_u16): Remove.
24896 (vhsubq_s16): Remove.
24897 (vhsubq_n_s16): Remove.
24898 (vhaddq_s16): Remove.
24899 (vhaddq_n_s16): Remove.
24900 (vhsubq_u32): Remove.
24901 (vhsubq_n_u32): Remove.
24902 (vhaddq_u32): Remove.
24903 (vhaddq_n_u32): Remove.
24904 (vhsubq_s32): Remove.
24905 (vhsubq_n_s32): Remove.
24906 (vhaddq_s32): Remove.
24907 (vhaddq_n_s32): Remove.
24908 (vhaddq_m_n_s8): Remove.
24909 (vhaddq_m_n_s32): Remove.
24910 (vhaddq_m_n_s16): Remove.
24911 (vhaddq_m_n_u8): Remove.
24912 (vhaddq_m_n_u32): Remove.
24913 (vhaddq_m_n_u16): Remove.
24914 (vhaddq_m_s8): Remove.
24915 (vhaddq_m_s32): Remove.
24916 (vhaddq_m_s16): Remove.
24917 (vhaddq_m_u8): Remove.
24918 (vhaddq_m_u32): Remove.
24919 (vhaddq_m_u16): Remove.
24920 (vhsubq_m_n_s8): Remove.
24921 (vhsubq_m_n_s32): Remove.
24922 (vhsubq_m_n_s16): Remove.
24923 (vhsubq_m_n_u8): Remove.
24924 (vhsubq_m_n_u32): Remove.
24925 (vhsubq_m_n_u16): Remove.
24926 (vhsubq_m_s8): Remove.
24927 (vhsubq_m_s32): Remove.
24928 (vhsubq_m_s16): Remove.
24929 (vhsubq_m_u8): Remove.
24930 (vhsubq_m_u32): Remove.
24931 (vhsubq_m_u16): Remove.
24932 (vhaddq_x_n_s8): Remove.
24933 (vhaddq_x_n_s16): Remove.
24934 (vhaddq_x_n_s32): Remove.
24935 (vhaddq_x_n_u8): Remove.
24936 (vhaddq_x_n_u16): Remove.
24937 (vhaddq_x_n_u32): Remove.
24938 (vhaddq_x_s8): Remove.
24939 (vhaddq_x_s16): Remove.
24940 (vhaddq_x_s32): Remove.
24941 (vhaddq_x_u8): Remove.
24942 (vhaddq_x_u16): Remove.
24943 (vhaddq_x_u32): Remove.
24944 (vhsubq_x_n_s8): Remove.
24945 (vhsubq_x_n_s16): Remove.
24946 (vhsubq_x_n_s32): Remove.
24947 (vhsubq_x_n_u8): Remove.
24948 (vhsubq_x_n_u16): Remove.
24949 (vhsubq_x_n_u32): Remove.
24950 (vhsubq_x_s8): Remove.
24951 (vhsubq_x_s16): Remove.
24952 (vhsubq_x_s32): Remove.
24953 (vhsubq_x_u8): Remove.
24954 (vhsubq_x_u16): Remove.
24955 (vhsubq_x_u32): Remove.
24956 (__arm_vhsubq_u8): Remove.
24957 (__arm_vhsubq_n_u8): Remove.
24958 (__arm_vhaddq_u8): Remove.
24959 (__arm_vhaddq_n_u8): Remove.
24960 (__arm_vhsubq_s8): Remove.
24961 (__arm_vhsubq_n_s8): Remove.
24962 (__arm_vhaddq_s8): Remove.
24963 (__arm_vhaddq_n_s8): Remove.
24964 (__arm_vhsubq_u16): Remove.
24965 (__arm_vhsubq_n_u16): Remove.
24966 (__arm_vhaddq_u16): Remove.
24967 (__arm_vhaddq_n_u16): Remove.
24968 (__arm_vhsubq_s16): Remove.
24969 (__arm_vhsubq_n_s16): Remove.
24970 (__arm_vhaddq_s16): Remove.
24971 (__arm_vhaddq_n_s16): Remove.
24972 (__arm_vhsubq_u32): Remove.
24973 (__arm_vhsubq_n_u32): Remove.
24974 (__arm_vhaddq_u32): Remove.
24975 (__arm_vhaddq_n_u32): Remove.
24976 (__arm_vhsubq_s32): Remove.
24977 (__arm_vhsubq_n_s32): Remove.
24978 (__arm_vhaddq_s32): Remove.
24979 (__arm_vhaddq_n_s32): Remove.
24980 (__arm_vhaddq_m_n_s8): Remove.
24981 (__arm_vhaddq_m_n_s32): Remove.
24982 (__arm_vhaddq_m_n_s16): Remove.
24983 (__arm_vhaddq_m_n_u8): Remove.
24984 (__arm_vhaddq_m_n_u32): Remove.
24985 (__arm_vhaddq_m_n_u16): Remove.
24986 (__arm_vhaddq_m_s8): Remove.
24987 (__arm_vhaddq_m_s32): Remove.
24988 (__arm_vhaddq_m_s16): Remove.
24989 (__arm_vhaddq_m_u8): Remove.
24990 (__arm_vhaddq_m_u32): Remove.
24991 (__arm_vhaddq_m_u16): Remove.
24992 (__arm_vhsubq_m_n_s8): Remove.
24993 (__arm_vhsubq_m_n_s32): Remove.
24994 (__arm_vhsubq_m_n_s16): Remove.
24995 (__arm_vhsubq_m_n_u8): Remove.
24996 (__arm_vhsubq_m_n_u32): Remove.
24997 (__arm_vhsubq_m_n_u16): Remove.
24998 (__arm_vhsubq_m_s8): Remove.
24999 (__arm_vhsubq_m_s32): Remove.
25000 (__arm_vhsubq_m_s16): Remove.
25001 (__arm_vhsubq_m_u8): Remove.
25002 (__arm_vhsubq_m_u32): Remove.
25003 (__arm_vhsubq_m_u16): Remove.
25004 (__arm_vhaddq_x_n_s8): Remove.
25005 (__arm_vhaddq_x_n_s16): Remove.
25006 (__arm_vhaddq_x_n_s32): Remove.
25007 (__arm_vhaddq_x_n_u8): Remove.
25008 (__arm_vhaddq_x_n_u16): Remove.
25009 (__arm_vhaddq_x_n_u32): Remove.
25010 (__arm_vhaddq_x_s8): Remove.
25011 (__arm_vhaddq_x_s16): Remove.
25012 (__arm_vhaddq_x_s32): Remove.
25013 (__arm_vhaddq_x_u8): Remove.
25014 (__arm_vhaddq_x_u16): Remove.
25015 (__arm_vhaddq_x_u32): Remove.
25016 (__arm_vhsubq_x_n_s8): Remove.
25017 (__arm_vhsubq_x_n_s16): Remove.
25018 (__arm_vhsubq_x_n_s32): Remove.
25019 (__arm_vhsubq_x_n_u8): Remove.
25020 (__arm_vhsubq_x_n_u16): Remove.
25021 (__arm_vhsubq_x_n_u32): Remove.
25022 (__arm_vhsubq_x_s8): Remove.
25023 (__arm_vhsubq_x_s16): Remove.
25024 (__arm_vhsubq_x_s32): Remove.
25025 (__arm_vhsubq_x_u8): Remove.
25026 (__arm_vhsubq_x_u16): Remove.
25027 (__arm_vhsubq_x_u32): Remove.
25028 (__arm_vhsubq): Remove.
25029 (__arm_vhaddq): Remove.
25030 (__arm_vhaddq_m): Remove.
25031 (__arm_vhsubq_m): Remove.
25032 (__arm_vhaddq_x): Remove.
25033 (__arm_vhsubq_x): Remove.
25035 (vmulhq_m): Remove.
25036 (vmulhq_x): Remove.
25037 (vmulhq_u8): Remove.
25038 (vmulhq_s8): Remove.
25039 (vmulhq_u16): Remove.
25040 (vmulhq_s16): Remove.
25041 (vmulhq_u32): Remove.
25042 (vmulhq_s32): Remove.
25043 (vmulhq_m_s8): Remove.
25044 (vmulhq_m_s32): Remove.
25045 (vmulhq_m_s16): Remove.
25046 (vmulhq_m_u8): Remove.
25047 (vmulhq_m_u32): Remove.
25048 (vmulhq_m_u16): Remove.
25049 (vmulhq_x_s8): Remove.
25050 (vmulhq_x_s16): Remove.
25051 (vmulhq_x_s32): Remove.
25052 (vmulhq_x_u8): Remove.
25053 (vmulhq_x_u16): Remove.
25054 (vmulhq_x_u32): Remove.
25055 (__arm_vmulhq_u8): Remove.
25056 (__arm_vmulhq_s8): Remove.
25057 (__arm_vmulhq_u16): Remove.
25058 (__arm_vmulhq_s16): Remove.
25059 (__arm_vmulhq_u32): Remove.
25060 (__arm_vmulhq_s32): Remove.
25061 (__arm_vmulhq_m_s8): Remove.
25062 (__arm_vmulhq_m_s32): Remove.
25063 (__arm_vmulhq_m_s16): Remove.
25064 (__arm_vmulhq_m_u8): Remove.
25065 (__arm_vmulhq_m_u32): Remove.
25066 (__arm_vmulhq_m_u16): Remove.
25067 (__arm_vmulhq_x_s8): Remove.
25068 (__arm_vmulhq_x_s16): Remove.
25069 (__arm_vmulhq_x_s32): Remove.
25070 (__arm_vmulhq_x_u8): Remove.
25071 (__arm_vmulhq_x_u16): Remove.
25072 (__arm_vmulhq_x_u32): Remove.
25073 (__arm_vmulhq): Remove.
25074 (__arm_vmulhq_m): Remove.
25075 (__arm_vmulhq_x): Remove.
25078 (vqaddq_m): Remove.
25079 (vqsubq_m): Remove.
25080 (vqsubq_u8): Remove.
25081 (vqsubq_n_u8): Remove.
25082 (vqaddq_u8): Remove.
25083 (vqaddq_n_u8): Remove.
25084 (vqsubq_s8): Remove.
25085 (vqsubq_n_s8): Remove.
25086 (vqaddq_s8): Remove.
25087 (vqaddq_n_s8): Remove.
25088 (vqsubq_u16): Remove.
25089 (vqsubq_n_u16): Remove.
25090 (vqaddq_u16): Remove.
25091 (vqaddq_n_u16): Remove.
25092 (vqsubq_s16): Remove.
25093 (vqsubq_n_s16): Remove.
25094 (vqaddq_s16): Remove.
25095 (vqaddq_n_s16): Remove.
25096 (vqsubq_u32): Remove.
25097 (vqsubq_n_u32): Remove.
25098 (vqaddq_u32): Remove.
25099 (vqaddq_n_u32): Remove.
25100 (vqsubq_s32): Remove.
25101 (vqsubq_n_s32): Remove.
25102 (vqaddq_s32): Remove.
25103 (vqaddq_n_s32): Remove.
25104 (vqaddq_m_n_s8): Remove.
25105 (vqaddq_m_n_s32): Remove.
25106 (vqaddq_m_n_s16): Remove.
25107 (vqaddq_m_n_u8): Remove.
25108 (vqaddq_m_n_u32): Remove.
25109 (vqaddq_m_n_u16): Remove.
25110 (vqaddq_m_s8): Remove.
25111 (vqaddq_m_s32): Remove.
25112 (vqaddq_m_s16): Remove.
25113 (vqaddq_m_u8): Remove.
25114 (vqaddq_m_u32): Remove.
25115 (vqaddq_m_u16): Remove.
25116 (vqsubq_m_n_s8): Remove.
25117 (vqsubq_m_n_s32): Remove.
25118 (vqsubq_m_n_s16): Remove.
25119 (vqsubq_m_n_u8): Remove.
25120 (vqsubq_m_n_u32): Remove.
25121 (vqsubq_m_n_u16): Remove.
25122 (vqsubq_m_s8): Remove.
25123 (vqsubq_m_s32): Remove.
25124 (vqsubq_m_s16): Remove.
25125 (vqsubq_m_u8): Remove.
25126 (vqsubq_m_u32): Remove.
25127 (vqsubq_m_u16): Remove.
25128 (__arm_vqsubq_u8): Remove.
25129 (__arm_vqsubq_n_u8): Remove.
25130 (__arm_vqaddq_u8): Remove.
25131 (__arm_vqaddq_n_u8): Remove.
25132 (__arm_vqsubq_s8): Remove.
25133 (__arm_vqsubq_n_s8): Remove.
25134 (__arm_vqaddq_s8): Remove.
25135 (__arm_vqaddq_n_s8): Remove.
25136 (__arm_vqsubq_u16): Remove.
25137 (__arm_vqsubq_n_u16): Remove.
25138 (__arm_vqaddq_u16): Remove.
25139 (__arm_vqaddq_n_u16): Remove.
25140 (__arm_vqsubq_s16): Remove.
25141 (__arm_vqsubq_n_s16): Remove.
25142 (__arm_vqaddq_s16): Remove.
25143 (__arm_vqaddq_n_s16): Remove.
25144 (__arm_vqsubq_u32): Remove.
25145 (__arm_vqsubq_n_u32): Remove.
25146 (__arm_vqaddq_u32): Remove.
25147 (__arm_vqaddq_n_u32): Remove.
25148 (__arm_vqsubq_s32): Remove.
25149 (__arm_vqsubq_n_s32): Remove.
25150 (__arm_vqaddq_s32): Remove.
25151 (__arm_vqaddq_n_s32): Remove.
25152 (__arm_vqaddq_m_n_s8): Remove.
25153 (__arm_vqaddq_m_n_s32): Remove.
25154 (__arm_vqaddq_m_n_s16): Remove.
25155 (__arm_vqaddq_m_n_u8): Remove.
25156 (__arm_vqaddq_m_n_u32): Remove.
25157 (__arm_vqaddq_m_n_u16): Remove.
25158 (__arm_vqaddq_m_s8): Remove.
25159 (__arm_vqaddq_m_s32): Remove.
25160 (__arm_vqaddq_m_s16): Remove.
25161 (__arm_vqaddq_m_u8): Remove.
25162 (__arm_vqaddq_m_u32): Remove.
25163 (__arm_vqaddq_m_u16): Remove.
25164 (__arm_vqsubq_m_n_s8): Remove.
25165 (__arm_vqsubq_m_n_s32): Remove.
25166 (__arm_vqsubq_m_n_s16): Remove.
25167 (__arm_vqsubq_m_n_u8): Remove.
25168 (__arm_vqsubq_m_n_u32): Remove.
25169 (__arm_vqsubq_m_n_u16): Remove.
25170 (__arm_vqsubq_m_s8): Remove.
25171 (__arm_vqsubq_m_s32): Remove.
25172 (__arm_vqsubq_m_s16): Remove.
25173 (__arm_vqsubq_m_u8): Remove.
25174 (__arm_vqsubq_m_u32): Remove.
25175 (__arm_vqsubq_m_u16): Remove.
25176 (__arm_vqsubq): Remove.
25177 (__arm_vqaddq): Remove.
25178 (__arm_vqaddq_m): Remove.
25179 (__arm_vqsubq_m): Remove.
25180 (vqdmulhq): Remove.
25181 (vqdmulhq_m): Remove.
25182 (vqdmulhq_s8): Remove.
25183 (vqdmulhq_n_s8): Remove.
25184 (vqdmulhq_s16): Remove.
25185 (vqdmulhq_n_s16): Remove.
25186 (vqdmulhq_s32): Remove.
25187 (vqdmulhq_n_s32): Remove.
25188 (vqdmulhq_m_n_s8): Remove.
25189 (vqdmulhq_m_n_s32): Remove.
25190 (vqdmulhq_m_n_s16): Remove.
25191 (vqdmulhq_m_s8): Remove.
25192 (vqdmulhq_m_s32): Remove.
25193 (vqdmulhq_m_s16): Remove.
25194 (__arm_vqdmulhq_s8): Remove.
25195 (__arm_vqdmulhq_n_s8): Remove.
25196 (__arm_vqdmulhq_s16): Remove.
25197 (__arm_vqdmulhq_n_s16): Remove.
25198 (__arm_vqdmulhq_s32): Remove.
25199 (__arm_vqdmulhq_n_s32): Remove.
25200 (__arm_vqdmulhq_m_n_s8): Remove.
25201 (__arm_vqdmulhq_m_n_s32): Remove.
25202 (__arm_vqdmulhq_m_n_s16): Remove.
25203 (__arm_vqdmulhq_m_s8): Remove.
25204 (__arm_vqdmulhq_m_s32): Remove.
25205 (__arm_vqdmulhq_m_s16): Remove.
25206 (__arm_vqdmulhq): Remove.
25207 (__arm_vqdmulhq_m): Remove.
25209 (vrhaddq_m): Remove.
25210 (vrhaddq_x): Remove.
25211 (vrhaddq_u8): Remove.
25212 (vrhaddq_s8): Remove.
25213 (vrhaddq_u16): Remove.
25214 (vrhaddq_s16): Remove.
25215 (vrhaddq_u32): Remove.
25216 (vrhaddq_s32): Remove.
25217 (vrhaddq_m_s8): Remove.
25218 (vrhaddq_m_s32): Remove.
25219 (vrhaddq_m_s16): Remove.
25220 (vrhaddq_m_u8): Remove.
25221 (vrhaddq_m_u32): Remove.
25222 (vrhaddq_m_u16): Remove.
25223 (vrhaddq_x_s8): Remove.
25224 (vrhaddq_x_s16): Remove.
25225 (vrhaddq_x_s32): Remove.
25226 (vrhaddq_x_u8): Remove.
25227 (vrhaddq_x_u16): Remove.
25228 (vrhaddq_x_u32): Remove.
25229 (__arm_vrhaddq_u8): Remove.
25230 (__arm_vrhaddq_s8): Remove.
25231 (__arm_vrhaddq_u16): Remove.
25232 (__arm_vrhaddq_s16): Remove.
25233 (__arm_vrhaddq_u32): Remove.
25234 (__arm_vrhaddq_s32): Remove.
25235 (__arm_vrhaddq_m_s8): Remove.
25236 (__arm_vrhaddq_m_s32): Remove.
25237 (__arm_vrhaddq_m_s16): Remove.
25238 (__arm_vrhaddq_m_u8): Remove.
25239 (__arm_vrhaddq_m_u32): Remove.
25240 (__arm_vrhaddq_m_u16): Remove.
25241 (__arm_vrhaddq_x_s8): Remove.
25242 (__arm_vrhaddq_x_s16): Remove.
25243 (__arm_vrhaddq_x_s32): Remove.
25244 (__arm_vrhaddq_x_u8): Remove.
25245 (__arm_vrhaddq_x_u16): Remove.
25246 (__arm_vrhaddq_x_u32): Remove.
25247 (__arm_vrhaddq): Remove.
25248 (__arm_vrhaddq_m): Remove.
25249 (__arm_vrhaddq_x): Remove.
25251 (vrmulhq_m): Remove.
25252 (vrmulhq_x): Remove.
25253 (vrmulhq_u8): Remove.
25254 (vrmulhq_s8): Remove.
25255 (vrmulhq_u16): Remove.
25256 (vrmulhq_s16): Remove.
25257 (vrmulhq_u32): Remove.
25258 (vrmulhq_s32): Remove.
25259 (vrmulhq_m_s8): Remove.
25260 (vrmulhq_m_s32): Remove.
25261 (vrmulhq_m_s16): Remove.
25262 (vrmulhq_m_u8): Remove.
25263 (vrmulhq_m_u32): Remove.
25264 (vrmulhq_m_u16): Remove.
25265 (vrmulhq_x_s8): Remove.
25266 (vrmulhq_x_s16): Remove.
25267 (vrmulhq_x_s32): Remove.
25268 (vrmulhq_x_u8): Remove.
25269 (vrmulhq_x_u16): Remove.
25270 (vrmulhq_x_u32): Remove.
25271 (__arm_vrmulhq_u8): Remove.
25272 (__arm_vrmulhq_s8): Remove.
25273 (__arm_vrmulhq_u16): Remove.
25274 (__arm_vrmulhq_s16): Remove.
25275 (__arm_vrmulhq_u32): Remove.
25276 (__arm_vrmulhq_s32): Remove.
25277 (__arm_vrmulhq_m_s8): Remove.
25278 (__arm_vrmulhq_m_s32): Remove.
25279 (__arm_vrmulhq_m_s16): Remove.
25280 (__arm_vrmulhq_m_u8): Remove.
25281 (__arm_vrmulhq_m_u32): Remove.
25282 (__arm_vrmulhq_m_u16): Remove.
25283 (__arm_vrmulhq_x_s8): Remove.
25284 (__arm_vrmulhq_x_s16): Remove.
25285 (__arm_vrmulhq_x_s32): Remove.
25286 (__arm_vrmulhq_x_u8): Remove.
25287 (__arm_vrmulhq_x_u16): Remove.
25288 (__arm_vrmulhq_x_u32): Remove.
25289 (__arm_vrmulhq): Remove.
25290 (__arm_vrmulhq_m): Remove.
25291 (__arm_vrmulhq_x): Remove.
25293 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25295 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
25296 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
25297 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
25298 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
25299 * config/arm/mve.md (mve_vabdq_<supf><mode>)
25300 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
25301 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
25302 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
25303 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
25304 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
25305 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
25307 (@mve_<mve_insn>q_<supf><mode>): ... this.
25308 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
25309 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
25310 gen_mve_vhaddq / gen_mve_vrhaddq.
25312 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25314 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
25315 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
25316 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
25317 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
25318 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
25319 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
25320 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
25321 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
25322 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
25323 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
25324 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
25325 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
25326 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25328 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25330 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
25331 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
25333 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
25334 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
25335 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
25336 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
25337 (mve_vqsubq_n_<supf><mode>): Merge into ...
25338 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25340 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25342 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
25343 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
25344 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
25345 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
25346 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
25347 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
25348 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
25349 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
25350 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
25351 (mve_vshlq_m_<supf><mode>): Merged into
25352 @mve_<mve_insn>q_m_<supf><mode>.
25353 (mve_vabdq_m_<supf><mode>): Likewise.
25354 (mve_vhaddq_m_<supf><mode>): Likewise.
25355 (mve_vhsubq_m_<supf><mode>): Likewise.
25356 (mve_vmaxq_m_<supf><mode>): Likewise.
25357 (mve_vminq_m_<supf><mode>): Likewise.
25358 (mve_vmulhq_m_<supf><mode>): Likewise.
25359 (mve_vqaddq_m_<supf><mode>): Likewise.
25360 (mve_vqrshlq_m_<supf><mode>): Likewise.
25361 (mve_vqshlq_m_<supf><mode>): Likewise.
25362 (mve_vqsubq_m_<supf><mode>): Likewise.
25363 (mve_vrhaddq_m_<supf><mode>): Likewise.
25364 (mve_vrmulhq_m_<supf><mode>): Likewise.
25365 (mve_vrshlq_m_<supf><mode>): Likewise.
25366 (mve_vqdmladhq_m_s<mode>): Likewise.
25367 (mve_vqdmladhxq_m_s<mode>): Likewise.
25368 (mve_vqdmlsdhq_m_s<mode>): Likewise.
25369 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
25370 (mve_vqdmulhq_m_s<mode>): Likewise.
25371 (mve_vqrdmladhq_m_s<mode>): Likewise.
25372 (mve_vqrdmladhxq_m_s<mode>): Likewise.
25373 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
25374 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
25375 (mve_vqrdmulhq_m_s<mode>): Likewise.
25377 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25379 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
25380 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
25381 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
25382 * config/arm/arm_mve.h (vcreateq_f16): Remove.
25383 (vcreateq_f32): Remove.
25384 (vcreateq_u8): Remove.
25385 (vcreateq_u16): Remove.
25386 (vcreateq_u32): Remove.
25387 (vcreateq_u64): Remove.
25388 (vcreateq_s8): Remove.
25389 (vcreateq_s16): Remove.
25390 (vcreateq_s32): Remove.
25391 (vcreateq_s64): Remove.
25392 (__arm_vcreateq_u8): Remove.
25393 (__arm_vcreateq_u16): Remove.
25394 (__arm_vcreateq_u32): Remove.
25395 (__arm_vcreateq_u64): Remove.
25396 (__arm_vcreateq_s8): Remove.
25397 (__arm_vcreateq_s16): Remove.
25398 (__arm_vcreateq_s32): Remove.
25399 (__arm_vcreateq_s64): Remove.
25400 (__arm_vcreateq_f16): Remove.
25401 (__arm_vcreateq_f32): Remove.
25403 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25405 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
25406 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
25407 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
25408 (@mve_<mve_insn>q_f<mode>): ... this.
25409 (mve_vcreateq_<supf><mode>): Rename into ...
25410 (@mve_<mve_insn>q_<supf><mode>): ... this.
25412 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25414 * config/arm/arm-mve-builtins-shapes.cc (create): New.
25415 * config/arm/arm-mve-builtins-shapes.h: (create): New.
25417 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25419 * config/arm/arm-mve-builtins-functions.h (class
25420 unspec_mve_function_exact_insn): New.
25422 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25424 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
25426 * config/arm/arm-mve-builtins-base.def (vorrq): New.
25427 * config/arm/arm-mve-builtins-base.h (vorrq): New.
25428 * config/arm/arm-mve-builtins.cc
25429 (function_instance::has_inactive_argument): Handle vorrq.
25430 * config/arm/arm_mve.h (vorrq): Remove.
25431 (vorrq_m_n): Remove.
25434 (vorrq_u8): Remove.
25435 (vorrq_s8): Remove.
25436 (vorrq_u16): Remove.
25437 (vorrq_s16): Remove.
25438 (vorrq_u32): Remove.
25439 (vorrq_s32): Remove.
25440 (vorrq_n_u16): Remove.
25441 (vorrq_f16): Remove.
25442 (vorrq_n_s16): Remove.
25443 (vorrq_n_u32): Remove.
25444 (vorrq_f32): Remove.
25445 (vorrq_n_s32): Remove.
25446 (vorrq_m_n_s16): Remove.
25447 (vorrq_m_n_u16): Remove.
25448 (vorrq_m_n_s32): Remove.
25449 (vorrq_m_n_u32): Remove.
25450 (vorrq_m_s8): Remove.
25451 (vorrq_m_s32): Remove.
25452 (vorrq_m_s16): Remove.
25453 (vorrq_m_u8): Remove.
25454 (vorrq_m_u32): Remove.
25455 (vorrq_m_u16): Remove.
25456 (vorrq_m_f32): Remove.
25457 (vorrq_m_f16): Remove.
25458 (vorrq_x_s8): Remove.
25459 (vorrq_x_s16): Remove.
25460 (vorrq_x_s32): Remove.
25461 (vorrq_x_u8): Remove.
25462 (vorrq_x_u16): Remove.
25463 (vorrq_x_u32): Remove.
25464 (vorrq_x_f16): Remove.
25465 (vorrq_x_f32): Remove.
25466 (__arm_vorrq_u8): Remove.
25467 (__arm_vorrq_s8): Remove.
25468 (__arm_vorrq_u16): Remove.
25469 (__arm_vorrq_s16): Remove.
25470 (__arm_vorrq_u32): Remove.
25471 (__arm_vorrq_s32): Remove.
25472 (__arm_vorrq_n_u16): Remove.
25473 (__arm_vorrq_n_s16): Remove.
25474 (__arm_vorrq_n_u32): Remove.
25475 (__arm_vorrq_n_s32): Remove.
25476 (__arm_vorrq_m_n_s16): Remove.
25477 (__arm_vorrq_m_n_u16): Remove.
25478 (__arm_vorrq_m_n_s32): Remove.
25479 (__arm_vorrq_m_n_u32): Remove.
25480 (__arm_vorrq_m_s8): Remove.
25481 (__arm_vorrq_m_s32): Remove.
25482 (__arm_vorrq_m_s16): Remove.
25483 (__arm_vorrq_m_u8): Remove.
25484 (__arm_vorrq_m_u32): Remove.
25485 (__arm_vorrq_m_u16): Remove.
25486 (__arm_vorrq_x_s8): Remove.
25487 (__arm_vorrq_x_s16): Remove.
25488 (__arm_vorrq_x_s32): Remove.
25489 (__arm_vorrq_x_u8): Remove.
25490 (__arm_vorrq_x_u16): Remove.
25491 (__arm_vorrq_x_u32): Remove.
25492 (__arm_vorrq_f16): Remove.
25493 (__arm_vorrq_f32): Remove.
25494 (__arm_vorrq_m_f32): Remove.
25495 (__arm_vorrq_m_f16): Remove.
25496 (__arm_vorrq_x_f16): Remove.
25497 (__arm_vorrq_x_f32): Remove.
25498 (__arm_vorrq): Remove.
25499 (__arm_vorrq_m_n): Remove.
25500 (__arm_vorrq_m): Remove.
25501 (__arm_vorrq_x): Remove.
25503 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25505 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
25506 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
25507 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
25508 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
25510 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25512 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
25513 (vandq,veorq): New.
25514 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
25515 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
25516 * config/arm/arm_mve.h (vandq): Remove.
25519 (vandq_u8): Remove.
25520 (vandq_s8): Remove.
25521 (vandq_u16): Remove.
25522 (vandq_s16): Remove.
25523 (vandq_u32): Remove.
25524 (vandq_s32): Remove.
25525 (vandq_f16): Remove.
25526 (vandq_f32): Remove.
25527 (vandq_m_s8): Remove.
25528 (vandq_m_s32): Remove.
25529 (vandq_m_s16): Remove.
25530 (vandq_m_u8): Remove.
25531 (vandq_m_u32): Remove.
25532 (vandq_m_u16): Remove.
25533 (vandq_m_f32): Remove.
25534 (vandq_m_f16): Remove.
25535 (vandq_x_s8): Remove.
25536 (vandq_x_s16): Remove.
25537 (vandq_x_s32): Remove.
25538 (vandq_x_u8): Remove.
25539 (vandq_x_u16): Remove.
25540 (vandq_x_u32): Remove.
25541 (vandq_x_f16): Remove.
25542 (vandq_x_f32): Remove.
25543 (__arm_vandq_u8): Remove.
25544 (__arm_vandq_s8): Remove.
25545 (__arm_vandq_u16): Remove.
25546 (__arm_vandq_s16): Remove.
25547 (__arm_vandq_u32): Remove.
25548 (__arm_vandq_s32): Remove.
25549 (__arm_vandq_m_s8): Remove.
25550 (__arm_vandq_m_s32): Remove.
25551 (__arm_vandq_m_s16): Remove.
25552 (__arm_vandq_m_u8): Remove.
25553 (__arm_vandq_m_u32): Remove.
25554 (__arm_vandq_m_u16): Remove.
25555 (__arm_vandq_x_s8): Remove.
25556 (__arm_vandq_x_s16): Remove.
25557 (__arm_vandq_x_s32): Remove.
25558 (__arm_vandq_x_u8): Remove.
25559 (__arm_vandq_x_u16): Remove.
25560 (__arm_vandq_x_u32): Remove.
25561 (__arm_vandq_f16): Remove.
25562 (__arm_vandq_f32): Remove.
25563 (__arm_vandq_m_f32): Remove.
25564 (__arm_vandq_m_f16): Remove.
25565 (__arm_vandq_x_f16): Remove.
25566 (__arm_vandq_x_f32): Remove.
25567 (__arm_vandq): Remove.
25568 (__arm_vandq_m): Remove.
25569 (__arm_vandq_x): Remove.
25572 (veorq_u8): Remove.
25573 (veorq_s8): Remove.
25574 (veorq_u16): Remove.
25575 (veorq_s16): Remove.
25576 (veorq_u32): Remove.
25577 (veorq_s32): Remove.
25578 (veorq_f16): Remove.
25579 (veorq_f32): Remove.
25580 (veorq_m_s8): Remove.
25581 (veorq_m_s32): Remove.
25582 (veorq_m_s16): Remove.
25583 (veorq_m_u8): Remove.
25584 (veorq_m_u32): Remove.
25585 (veorq_m_u16): Remove.
25586 (veorq_m_f32): Remove.
25587 (veorq_m_f16): Remove.
25588 (veorq_x_s8): Remove.
25589 (veorq_x_s16): Remove.
25590 (veorq_x_s32): Remove.
25591 (veorq_x_u8): Remove.
25592 (veorq_x_u16): Remove.
25593 (veorq_x_u32): Remove.
25594 (veorq_x_f16): Remove.
25595 (veorq_x_f32): Remove.
25596 (__arm_veorq_u8): Remove.
25597 (__arm_veorq_s8): Remove.
25598 (__arm_veorq_u16): Remove.
25599 (__arm_veorq_s16): Remove.
25600 (__arm_veorq_u32): Remove.
25601 (__arm_veorq_s32): Remove.
25602 (__arm_veorq_m_s8): Remove.
25603 (__arm_veorq_m_s32): Remove.
25604 (__arm_veorq_m_s16): Remove.
25605 (__arm_veorq_m_u8): Remove.
25606 (__arm_veorq_m_u32): Remove.
25607 (__arm_veorq_m_u16): Remove.
25608 (__arm_veorq_x_s8): Remove.
25609 (__arm_veorq_x_s16): Remove.
25610 (__arm_veorq_x_s32): Remove.
25611 (__arm_veorq_x_u8): Remove.
25612 (__arm_veorq_x_u16): Remove.
25613 (__arm_veorq_x_u32): Remove.
25614 (__arm_veorq_f16): Remove.
25615 (__arm_veorq_f32): Remove.
25616 (__arm_veorq_m_f32): Remove.
25617 (__arm_veorq_m_f16): Remove.
25618 (__arm_veorq_x_f16): Remove.
25619 (__arm_veorq_x_f32): Remove.
25620 (__arm_veorq): Remove.
25621 (__arm_veorq_m): Remove.
25622 (__arm_veorq_x): Remove.
25624 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25626 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
25627 (MVE_FP_M_BINARY_LOGIC): New.
25628 (MVE_INT_M_N_BINARY_LOGIC): New.
25629 (MVE_INT_N_BINARY_LOGIC): New.
25630 (mve_insn): Add vand, veor, vorr, vbic.
25631 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
25632 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
25633 (mve_vbicq_m_<supf><mode>): Merge into ...
25634 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25635 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
25636 (mve_vbicq_m_f<mode>): Merge into ...
25637 (@mve_<mve_insn>q_m_f<mode>): ... this.
25638 (mve_vorrq_n_<supf><mode>)
25639 (mve_vbicq_n_<supf><mode>): Merge into ...
25640 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25641 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
25643 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25645 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25647 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
25648 * config/arm/arm-mve-builtins-shapes.h (binary): New.
25650 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25652 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
25654 (vaddq, vmulq, vsubq): New.
25655 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
25656 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
25657 * config/arm/arm_mve.h (vaddq): Remove.
25660 (vaddq_n_u8): Remove.
25661 (vaddq_n_s8): Remove.
25662 (vaddq_n_u16): Remove.
25663 (vaddq_n_s16): Remove.
25664 (vaddq_n_u32): Remove.
25665 (vaddq_n_s32): Remove.
25666 (vaddq_n_f16): Remove.
25667 (vaddq_n_f32): Remove.
25668 (vaddq_m_n_s8): Remove.
25669 (vaddq_m_n_s32): Remove.
25670 (vaddq_m_n_s16): Remove.
25671 (vaddq_m_n_u8): Remove.
25672 (vaddq_m_n_u32): Remove.
25673 (vaddq_m_n_u16): Remove.
25674 (vaddq_m_s8): Remove.
25675 (vaddq_m_s32): Remove.
25676 (vaddq_m_s16): Remove.
25677 (vaddq_m_u8): Remove.
25678 (vaddq_m_u32): Remove.
25679 (vaddq_m_u16): Remove.
25680 (vaddq_m_f32): Remove.
25681 (vaddq_m_f16): Remove.
25682 (vaddq_m_n_f32): Remove.
25683 (vaddq_m_n_f16): Remove.
25684 (vaddq_s8): Remove.
25685 (vaddq_s16): Remove.
25686 (vaddq_s32): Remove.
25687 (vaddq_u8): Remove.
25688 (vaddq_u16): Remove.
25689 (vaddq_u32): Remove.
25690 (vaddq_f16): Remove.
25691 (vaddq_f32): Remove.
25692 (vaddq_x_s8): Remove.
25693 (vaddq_x_s16): Remove.
25694 (vaddq_x_s32): Remove.
25695 (vaddq_x_n_s8): Remove.
25696 (vaddq_x_n_s16): Remove.
25697 (vaddq_x_n_s32): Remove.
25698 (vaddq_x_u8): Remove.
25699 (vaddq_x_u16): Remove.
25700 (vaddq_x_u32): Remove.
25701 (vaddq_x_n_u8): Remove.
25702 (vaddq_x_n_u16): Remove.
25703 (vaddq_x_n_u32): Remove.
25704 (vaddq_x_f16): Remove.
25705 (vaddq_x_f32): Remove.
25706 (vaddq_x_n_f16): Remove.
25707 (vaddq_x_n_f32): Remove.
25708 (__arm_vaddq_n_u8): Remove.
25709 (__arm_vaddq_n_s8): Remove.
25710 (__arm_vaddq_n_u16): Remove.
25711 (__arm_vaddq_n_s16): Remove.
25712 (__arm_vaddq_n_u32): Remove.
25713 (__arm_vaddq_n_s32): Remove.
25714 (__arm_vaddq_m_n_s8): Remove.
25715 (__arm_vaddq_m_n_s32): Remove.
25716 (__arm_vaddq_m_n_s16): Remove.
25717 (__arm_vaddq_m_n_u8): Remove.
25718 (__arm_vaddq_m_n_u32): Remove.
25719 (__arm_vaddq_m_n_u16): Remove.
25720 (__arm_vaddq_m_s8): Remove.
25721 (__arm_vaddq_m_s32): Remove.
25722 (__arm_vaddq_m_s16): Remove.
25723 (__arm_vaddq_m_u8): Remove.
25724 (__arm_vaddq_m_u32): Remove.
25725 (__arm_vaddq_m_u16): Remove.
25726 (__arm_vaddq_s8): Remove.
25727 (__arm_vaddq_s16): Remove.
25728 (__arm_vaddq_s32): Remove.
25729 (__arm_vaddq_u8): Remove.
25730 (__arm_vaddq_u16): Remove.
25731 (__arm_vaddq_u32): Remove.
25732 (__arm_vaddq_x_s8): Remove.
25733 (__arm_vaddq_x_s16): Remove.
25734 (__arm_vaddq_x_s32): Remove.
25735 (__arm_vaddq_x_n_s8): Remove.
25736 (__arm_vaddq_x_n_s16): Remove.
25737 (__arm_vaddq_x_n_s32): Remove.
25738 (__arm_vaddq_x_u8): Remove.
25739 (__arm_vaddq_x_u16): Remove.
25740 (__arm_vaddq_x_u32): Remove.
25741 (__arm_vaddq_x_n_u8): Remove.
25742 (__arm_vaddq_x_n_u16): Remove.
25743 (__arm_vaddq_x_n_u32): Remove.
25744 (__arm_vaddq_n_f16): Remove.
25745 (__arm_vaddq_n_f32): Remove.
25746 (__arm_vaddq_m_f32): Remove.
25747 (__arm_vaddq_m_f16): Remove.
25748 (__arm_vaddq_m_n_f32): Remove.
25749 (__arm_vaddq_m_n_f16): Remove.
25750 (__arm_vaddq_f16): Remove.
25751 (__arm_vaddq_f32): Remove.
25752 (__arm_vaddq_x_f16): Remove.
25753 (__arm_vaddq_x_f32): Remove.
25754 (__arm_vaddq_x_n_f16): Remove.
25755 (__arm_vaddq_x_n_f32): Remove.
25756 (__arm_vaddq): Remove.
25757 (__arm_vaddq_m): Remove.
25758 (__arm_vaddq_x): Remove.
25762 (vmulq_u8): Remove.
25763 (vmulq_n_u8): Remove.
25764 (vmulq_s8): Remove.
25765 (vmulq_n_s8): Remove.
25766 (vmulq_u16): Remove.
25767 (vmulq_n_u16): Remove.
25768 (vmulq_s16): Remove.
25769 (vmulq_n_s16): Remove.
25770 (vmulq_u32): Remove.
25771 (vmulq_n_u32): Remove.
25772 (vmulq_s32): Remove.
25773 (vmulq_n_s32): Remove.
25774 (vmulq_n_f16): Remove.
25775 (vmulq_f16): Remove.
25776 (vmulq_n_f32): Remove.
25777 (vmulq_f32): Remove.
25778 (vmulq_m_n_s8): Remove.
25779 (vmulq_m_n_s32): Remove.
25780 (vmulq_m_n_s16): Remove.
25781 (vmulq_m_n_u8): Remove.
25782 (vmulq_m_n_u32): Remove.
25783 (vmulq_m_n_u16): Remove.
25784 (vmulq_m_s8): Remove.
25785 (vmulq_m_s32): Remove.
25786 (vmulq_m_s16): Remove.
25787 (vmulq_m_u8): Remove.
25788 (vmulq_m_u32): Remove.
25789 (vmulq_m_u16): Remove.
25790 (vmulq_m_f32): Remove.
25791 (vmulq_m_f16): Remove.
25792 (vmulq_m_n_f32): Remove.
25793 (vmulq_m_n_f16): Remove.
25794 (vmulq_x_s8): Remove.
25795 (vmulq_x_s16): Remove.
25796 (vmulq_x_s32): Remove.
25797 (vmulq_x_n_s8): Remove.
25798 (vmulq_x_n_s16): Remove.
25799 (vmulq_x_n_s32): Remove.
25800 (vmulq_x_u8): Remove.
25801 (vmulq_x_u16): Remove.
25802 (vmulq_x_u32): Remove.
25803 (vmulq_x_n_u8): Remove.
25804 (vmulq_x_n_u16): Remove.
25805 (vmulq_x_n_u32): Remove.
25806 (vmulq_x_f16): Remove.
25807 (vmulq_x_f32): Remove.
25808 (vmulq_x_n_f16): Remove.
25809 (vmulq_x_n_f32): Remove.
25810 (__arm_vmulq_u8): Remove.
25811 (__arm_vmulq_n_u8): Remove.
25812 (__arm_vmulq_s8): Remove.
25813 (__arm_vmulq_n_s8): Remove.
25814 (__arm_vmulq_u16): Remove.
25815 (__arm_vmulq_n_u16): Remove.
25816 (__arm_vmulq_s16): Remove.
25817 (__arm_vmulq_n_s16): Remove.
25818 (__arm_vmulq_u32): Remove.
25819 (__arm_vmulq_n_u32): Remove.
25820 (__arm_vmulq_s32): Remove.
25821 (__arm_vmulq_n_s32): Remove.
25822 (__arm_vmulq_m_n_s8): Remove.
25823 (__arm_vmulq_m_n_s32): Remove.
25824 (__arm_vmulq_m_n_s16): Remove.
25825 (__arm_vmulq_m_n_u8): Remove.
25826 (__arm_vmulq_m_n_u32): Remove.
25827 (__arm_vmulq_m_n_u16): Remove.
25828 (__arm_vmulq_m_s8): Remove.
25829 (__arm_vmulq_m_s32): Remove.
25830 (__arm_vmulq_m_s16): Remove.
25831 (__arm_vmulq_m_u8): Remove.
25832 (__arm_vmulq_m_u32): Remove.
25833 (__arm_vmulq_m_u16): Remove.
25834 (__arm_vmulq_x_s8): Remove.
25835 (__arm_vmulq_x_s16): Remove.
25836 (__arm_vmulq_x_s32): Remove.
25837 (__arm_vmulq_x_n_s8): Remove.
25838 (__arm_vmulq_x_n_s16): Remove.
25839 (__arm_vmulq_x_n_s32): Remove.
25840 (__arm_vmulq_x_u8): Remove.
25841 (__arm_vmulq_x_u16): Remove.
25842 (__arm_vmulq_x_u32): Remove.
25843 (__arm_vmulq_x_n_u8): Remove.
25844 (__arm_vmulq_x_n_u16): Remove.
25845 (__arm_vmulq_x_n_u32): Remove.
25846 (__arm_vmulq_n_f16): Remove.
25847 (__arm_vmulq_f16): Remove.
25848 (__arm_vmulq_n_f32): Remove.
25849 (__arm_vmulq_f32): Remove.
25850 (__arm_vmulq_m_f32): Remove.
25851 (__arm_vmulq_m_f16): Remove.
25852 (__arm_vmulq_m_n_f32): Remove.
25853 (__arm_vmulq_m_n_f16): Remove.
25854 (__arm_vmulq_x_f16): Remove.
25855 (__arm_vmulq_x_f32): Remove.
25856 (__arm_vmulq_x_n_f16): Remove.
25857 (__arm_vmulq_x_n_f32): Remove.
25858 (__arm_vmulq): Remove.
25859 (__arm_vmulq_m): Remove.
25860 (__arm_vmulq_x): Remove.
25864 (vsubq_n_f16): Remove.
25865 (vsubq_n_f32): Remove.
25866 (vsubq_u8): Remove.
25867 (vsubq_n_u8): Remove.
25868 (vsubq_s8): Remove.
25869 (vsubq_n_s8): Remove.
25870 (vsubq_u16): Remove.
25871 (vsubq_n_u16): Remove.
25872 (vsubq_s16): Remove.
25873 (vsubq_n_s16): Remove.
25874 (vsubq_u32): Remove.
25875 (vsubq_n_u32): Remove.
25876 (vsubq_s32): Remove.
25877 (vsubq_n_s32): Remove.
25878 (vsubq_f16): Remove.
25879 (vsubq_f32): Remove.
25880 (vsubq_m_s8): Remove.
25881 (vsubq_m_u8): Remove.
25882 (vsubq_m_s16): Remove.
25883 (vsubq_m_u16): Remove.
25884 (vsubq_m_s32): Remove.
25885 (vsubq_m_u32): Remove.
25886 (vsubq_m_n_s8): Remove.
25887 (vsubq_m_n_s32): Remove.
25888 (vsubq_m_n_s16): Remove.
25889 (vsubq_m_n_u8): Remove.
25890 (vsubq_m_n_u32): Remove.
25891 (vsubq_m_n_u16): Remove.
25892 (vsubq_m_f32): Remove.
25893 (vsubq_m_f16): Remove.
25894 (vsubq_m_n_f32): Remove.
25895 (vsubq_m_n_f16): Remove.
25896 (vsubq_x_s8): Remove.
25897 (vsubq_x_s16): Remove.
25898 (vsubq_x_s32): Remove.
25899 (vsubq_x_n_s8): Remove.
25900 (vsubq_x_n_s16): Remove.
25901 (vsubq_x_n_s32): Remove.
25902 (vsubq_x_u8): Remove.
25903 (vsubq_x_u16): Remove.
25904 (vsubq_x_u32): Remove.
25905 (vsubq_x_n_u8): Remove.
25906 (vsubq_x_n_u16): Remove.
25907 (vsubq_x_n_u32): Remove.
25908 (vsubq_x_f16): Remove.
25909 (vsubq_x_f32): Remove.
25910 (vsubq_x_n_f16): Remove.
25911 (vsubq_x_n_f32): Remove.
25912 (__arm_vsubq_u8): Remove.
25913 (__arm_vsubq_n_u8): Remove.
25914 (__arm_vsubq_s8): Remove.
25915 (__arm_vsubq_n_s8): Remove.
25916 (__arm_vsubq_u16): Remove.
25917 (__arm_vsubq_n_u16): Remove.
25918 (__arm_vsubq_s16): Remove.
25919 (__arm_vsubq_n_s16): Remove.
25920 (__arm_vsubq_u32): Remove.
25921 (__arm_vsubq_n_u32): Remove.
25922 (__arm_vsubq_s32): Remove.
25923 (__arm_vsubq_n_s32): Remove.
25924 (__arm_vsubq_m_s8): Remove.
25925 (__arm_vsubq_m_u8): Remove.
25926 (__arm_vsubq_m_s16): Remove.
25927 (__arm_vsubq_m_u16): Remove.
25928 (__arm_vsubq_m_s32): Remove.
25929 (__arm_vsubq_m_u32): Remove.
25930 (__arm_vsubq_m_n_s8): Remove.
25931 (__arm_vsubq_m_n_s32): Remove.
25932 (__arm_vsubq_m_n_s16): Remove.
25933 (__arm_vsubq_m_n_u8): Remove.
25934 (__arm_vsubq_m_n_u32): Remove.
25935 (__arm_vsubq_m_n_u16): Remove.
25936 (__arm_vsubq_x_s8): Remove.
25937 (__arm_vsubq_x_s16): Remove.
25938 (__arm_vsubq_x_s32): Remove.
25939 (__arm_vsubq_x_n_s8): Remove.
25940 (__arm_vsubq_x_n_s16): Remove.
25941 (__arm_vsubq_x_n_s32): Remove.
25942 (__arm_vsubq_x_u8): Remove.
25943 (__arm_vsubq_x_u16): Remove.
25944 (__arm_vsubq_x_u32): Remove.
25945 (__arm_vsubq_x_n_u8): Remove.
25946 (__arm_vsubq_x_n_u16): Remove.
25947 (__arm_vsubq_x_n_u32): Remove.
25948 (__arm_vsubq_n_f16): Remove.
25949 (__arm_vsubq_n_f32): Remove.
25950 (__arm_vsubq_f16): Remove.
25951 (__arm_vsubq_f32): Remove.
25952 (__arm_vsubq_m_f32): Remove.
25953 (__arm_vsubq_m_f16): Remove.
25954 (__arm_vsubq_m_n_f32): Remove.
25955 (__arm_vsubq_m_n_f16): Remove.
25956 (__arm_vsubq_x_f16): Remove.
25957 (__arm_vsubq_x_f32): Remove.
25958 (__arm_vsubq_x_n_f16): Remove.
25959 (__arm_vsubq_x_n_f32): Remove.
25960 (__arm_vsubq): Remove.
25961 (__arm_vsubq_m): Remove.
25962 (__arm_vsubq_x): Remove.
25963 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
25965 (vmulq_u, vmulq_s, vmulq_f): Remove.
25966 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
25967 (mve_vmulq_<supf><mode>): Remove.
25969 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25971 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
25972 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
25973 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
25975 * config/arm/mve.md
25976 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
25978 (@mve_<mve_insn>q_n_f<mode>): ... this.
25979 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
25980 (mve_vsubq_n_<supf><mode>): Factorize into ...
25981 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25982 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
25984 (mve_<mve_addsubmul>q<mode>): ... this.
25985 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
25987 (mve_<mve_addsubmul>q_f<mode>): ... this.
25988 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
25989 (mve_vsubq_m_<supf><mode>): Factorize into ...
25990 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
25991 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
25992 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
25993 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25994 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
25996 (@mve_<mve_insn>q_m_f<mode>): ... this.
25997 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
25998 (mve_vsubq_m_n_f<mode>): Factorize into ...
25999 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
26001 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26003 * config/arm/arm-mve-builtins-functions.h (class
26004 unspec_based_mve_function_base): New.
26005 (class unspec_based_mve_function_exact_insn): New.
26007 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26009 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
26010 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
26012 2023-05-03 Murray Steele <murray.steele@arm.com>
26013 Christophe Lyon <christophe.lyon@arm.com>
26015 * config/arm/arm-mve-builtins-base.cc (class
26016 vuninitializedq_impl): New.
26017 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
26018 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
26020 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
26021 * config/arm/arm-mve-builtins-shapes.h (inherent): New
26023 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
26024 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
26025 (__arm_vuninitializedq_u8): Remove.
26026 (__arm_vuninitializedq_u16): Remove.
26027 (__arm_vuninitializedq_u32): Remove.
26028 (__arm_vuninitializedq_u64): Remove.
26029 (__arm_vuninitializedq_s8): Remove.
26030 (__arm_vuninitializedq_s16): Remove.
26031 (__arm_vuninitializedq_s32): Remove.
26032 (__arm_vuninitializedq_s64): Remove.
26033 (__arm_vuninitializedq_f16): Remove.
26034 (__arm_vuninitializedq_f32): Remove.
26036 2023-05-03 Murray Steele <murray.steele@arm.com>
26037 Christophe Lyon <christophe.lyon@arm.com>
26039 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
26040 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
26041 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
26042 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
26043 (parse_type): Likewise.
26044 (parse_signature): Likewise.
26045 (build_one): Likewise.
26046 (build_all): Likewise.
26047 (overloaded_base): New struct.
26048 (unary_convert_def): Likewise.
26049 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
26050 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
26052 (TYPES_reinterpret_unsigned1): Likewise.
26053 (TYPES_reinterpret_integer): Likewise.
26054 (TYPES_reinterpret_integer1): Likewise.
26055 (TYPES_reinterpret_float1): Likewise.
26056 (TYPES_reinterpret_float): Likewise.
26057 (reinterpret_integer): New.
26058 (reinterpret_float): New.
26059 (handle_arm_mve_h): Register builtins.
26060 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
26061 (vreinterpretq_s32): Likewise.
26062 (vreinterpretq_s64): Likewise.
26063 (vreinterpretq_s8): Likewise.
26064 (vreinterpretq_u16): Likewise.
26065 (vreinterpretq_u32): Likewise.
26066 (vreinterpretq_u64): Likewise.
26067 (vreinterpretq_u8): Likewise.
26068 (vreinterpretq_f16): Likewise.
26069 (vreinterpretq_f32): Likewise.
26070 (vreinterpretq_s16_s32): Likewise.
26071 (vreinterpretq_s16_s64): Likewise.
26072 (vreinterpretq_s16_s8): Likewise.
26073 (vreinterpretq_s16_u16): Likewise.
26074 (vreinterpretq_s16_u32): Likewise.
26075 (vreinterpretq_s16_u64): Likewise.
26076 (vreinterpretq_s16_u8): Likewise.
26077 (vreinterpretq_s32_s16): Likewise.
26078 (vreinterpretq_s32_s64): Likewise.
26079 (vreinterpretq_s32_s8): Likewise.
26080 (vreinterpretq_s32_u16): Likewise.
26081 (vreinterpretq_s32_u32): Likewise.
26082 (vreinterpretq_s32_u64): Likewise.
26083 (vreinterpretq_s32_u8): Likewise.
26084 (vreinterpretq_s64_s16): Likewise.
26085 (vreinterpretq_s64_s32): Likewise.
26086 (vreinterpretq_s64_s8): Likewise.
26087 (vreinterpretq_s64_u16): Likewise.
26088 (vreinterpretq_s64_u32): Likewise.
26089 (vreinterpretq_s64_u64): Likewise.
26090 (vreinterpretq_s64_u8): Likewise.
26091 (vreinterpretq_s8_s16): Likewise.
26092 (vreinterpretq_s8_s32): Likewise.
26093 (vreinterpretq_s8_s64): Likewise.
26094 (vreinterpretq_s8_u16): Likewise.
26095 (vreinterpretq_s8_u32): Likewise.
26096 (vreinterpretq_s8_u64): Likewise.
26097 (vreinterpretq_s8_u8): Likewise.
26098 (vreinterpretq_u16_s16): Likewise.
26099 (vreinterpretq_u16_s32): Likewise.
26100 (vreinterpretq_u16_s64): Likewise.
26101 (vreinterpretq_u16_s8): Likewise.
26102 (vreinterpretq_u16_u32): Likewise.
26103 (vreinterpretq_u16_u64): Likewise.
26104 (vreinterpretq_u16_u8): Likewise.
26105 (vreinterpretq_u32_s16): Likewise.
26106 (vreinterpretq_u32_s32): Likewise.
26107 (vreinterpretq_u32_s64): Likewise.
26108 (vreinterpretq_u32_s8): Likewise.
26109 (vreinterpretq_u32_u16): Likewise.
26110 (vreinterpretq_u32_u64): Likewise.
26111 (vreinterpretq_u32_u8): Likewise.
26112 (vreinterpretq_u64_s16): Likewise.
26113 (vreinterpretq_u64_s32): Likewise.
26114 (vreinterpretq_u64_s64): Likewise.
26115 (vreinterpretq_u64_s8): Likewise.
26116 (vreinterpretq_u64_u16): Likewise.
26117 (vreinterpretq_u64_u32): Likewise.
26118 (vreinterpretq_u64_u8): Likewise.
26119 (vreinterpretq_u8_s16): Likewise.
26120 (vreinterpretq_u8_s32): Likewise.
26121 (vreinterpretq_u8_s64): Likewise.
26122 (vreinterpretq_u8_s8): Likewise.
26123 (vreinterpretq_u8_u16): Likewise.
26124 (vreinterpretq_u8_u32): Likewise.
26125 (vreinterpretq_u8_u64): Likewise.
26126 (vreinterpretq_s32_f16): Likewise.
26127 (vreinterpretq_s32_f32): Likewise.
26128 (vreinterpretq_u16_f16): Likewise.
26129 (vreinterpretq_u16_f32): Likewise.
26130 (vreinterpretq_u32_f16): Likewise.
26131 (vreinterpretq_u32_f32): Likewise.
26132 (vreinterpretq_u64_f16): Likewise.
26133 (vreinterpretq_u64_f32): Likewise.
26134 (vreinterpretq_u8_f16): Likewise.
26135 (vreinterpretq_u8_f32): Likewise.
26136 (vreinterpretq_f16_f32): Likewise.
26137 (vreinterpretq_f16_s16): Likewise.
26138 (vreinterpretq_f16_s32): Likewise.
26139 (vreinterpretq_f16_s64): Likewise.
26140 (vreinterpretq_f16_s8): Likewise.
26141 (vreinterpretq_f16_u16): Likewise.
26142 (vreinterpretq_f16_u32): Likewise.
26143 (vreinterpretq_f16_u64): Likewise.
26144 (vreinterpretq_f16_u8): Likewise.
26145 (vreinterpretq_f32_f16): Likewise.
26146 (vreinterpretq_f32_s16): Likewise.
26147 (vreinterpretq_f32_s32): Likewise.
26148 (vreinterpretq_f32_s64): Likewise.
26149 (vreinterpretq_f32_s8): Likewise.
26150 (vreinterpretq_f32_u16): Likewise.
26151 (vreinterpretq_f32_u32): Likewise.
26152 (vreinterpretq_f32_u64): Likewise.
26153 (vreinterpretq_f32_u8): Likewise.
26154 (vreinterpretq_s16_f16): Likewise.
26155 (vreinterpretq_s16_f32): Likewise.
26156 (vreinterpretq_s64_f16): Likewise.
26157 (vreinterpretq_s64_f32): Likewise.
26158 (vreinterpretq_s8_f16): Likewise.
26159 (vreinterpretq_s8_f32): Likewise.
26160 (__arm_vreinterpretq_f16): Likewise.
26161 (__arm_vreinterpretq_f32): Likewise.
26162 (__arm_vreinterpretq_s16): Likewise.
26163 (__arm_vreinterpretq_s32): Likewise.
26164 (__arm_vreinterpretq_s64): Likewise.
26165 (__arm_vreinterpretq_s8): Likewise.
26166 (__arm_vreinterpretq_u16): Likewise.
26167 (__arm_vreinterpretq_u32): Likewise.
26168 (__arm_vreinterpretq_u64): Likewise.
26169 (__arm_vreinterpretq_u8): Likewise.
26170 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
26171 (__arm_vreinterpretq_s16_s64): Likewise.
26172 (__arm_vreinterpretq_s16_s8): Likewise.
26173 (__arm_vreinterpretq_s16_u16): Likewise.
26174 (__arm_vreinterpretq_s16_u32): Likewise.
26175 (__arm_vreinterpretq_s16_u64): Likewise.
26176 (__arm_vreinterpretq_s16_u8): Likewise.
26177 (__arm_vreinterpretq_s32_s16): Likewise.
26178 (__arm_vreinterpretq_s32_s64): Likewise.
26179 (__arm_vreinterpretq_s32_s8): Likewise.
26180 (__arm_vreinterpretq_s32_u16): Likewise.
26181 (__arm_vreinterpretq_s32_u32): Likewise.
26182 (__arm_vreinterpretq_s32_u64): Likewise.
26183 (__arm_vreinterpretq_s32_u8): Likewise.
26184 (__arm_vreinterpretq_s64_s16): Likewise.
26185 (__arm_vreinterpretq_s64_s32): Likewise.
26186 (__arm_vreinterpretq_s64_s8): Likewise.
26187 (__arm_vreinterpretq_s64_u16): Likewise.
26188 (__arm_vreinterpretq_s64_u32): Likewise.
26189 (__arm_vreinterpretq_s64_u64): Likewise.
26190 (__arm_vreinterpretq_s64_u8): Likewise.
26191 (__arm_vreinterpretq_s8_s16): Likewise.
26192 (__arm_vreinterpretq_s8_s32): Likewise.
26193 (__arm_vreinterpretq_s8_s64): Likewise.
26194 (__arm_vreinterpretq_s8_u16): Likewise.
26195 (__arm_vreinterpretq_s8_u32): Likewise.
26196 (__arm_vreinterpretq_s8_u64): Likewise.
26197 (__arm_vreinterpretq_s8_u8): Likewise.
26198 (__arm_vreinterpretq_u16_s16): Likewise.
26199 (__arm_vreinterpretq_u16_s32): Likewise.
26200 (__arm_vreinterpretq_u16_s64): Likewise.
26201 (__arm_vreinterpretq_u16_s8): Likewise.
26202 (__arm_vreinterpretq_u16_u32): Likewise.
26203 (__arm_vreinterpretq_u16_u64): Likewise.
26204 (__arm_vreinterpretq_u16_u8): Likewise.
26205 (__arm_vreinterpretq_u32_s16): Likewise.
26206 (__arm_vreinterpretq_u32_s32): Likewise.
26207 (__arm_vreinterpretq_u32_s64): Likewise.
26208 (__arm_vreinterpretq_u32_s8): Likewise.
26209 (__arm_vreinterpretq_u32_u16): Likewise.
26210 (__arm_vreinterpretq_u32_u64): Likewise.
26211 (__arm_vreinterpretq_u32_u8): Likewise.
26212 (__arm_vreinterpretq_u64_s16): Likewise.
26213 (__arm_vreinterpretq_u64_s32): Likewise.
26214 (__arm_vreinterpretq_u64_s64): Likewise.
26215 (__arm_vreinterpretq_u64_s8): Likewise.
26216 (__arm_vreinterpretq_u64_u16): Likewise.
26217 (__arm_vreinterpretq_u64_u32): Likewise.
26218 (__arm_vreinterpretq_u64_u8): Likewise.
26219 (__arm_vreinterpretq_u8_s16): Likewise.
26220 (__arm_vreinterpretq_u8_s32): Likewise.
26221 (__arm_vreinterpretq_u8_s64): Likewise.
26222 (__arm_vreinterpretq_u8_s8): Likewise.
26223 (__arm_vreinterpretq_u8_u16): Likewise.
26224 (__arm_vreinterpretq_u8_u32): Likewise.
26225 (__arm_vreinterpretq_u8_u64): Likewise.
26226 (__arm_vreinterpretq_s32_f16): Likewise.
26227 (__arm_vreinterpretq_s32_f32): Likewise.
26228 (__arm_vreinterpretq_s16_f16): Likewise.
26229 (__arm_vreinterpretq_s16_f32): Likewise.
26230 (__arm_vreinterpretq_s64_f16): Likewise.
26231 (__arm_vreinterpretq_s64_f32): Likewise.
26232 (__arm_vreinterpretq_s8_f16): Likewise.
26233 (__arm_vreinterpretq_s8_f32): Likewise.
26234 (__arm_vreinterpretq_u16_f16): Likewise.
26235 (__arm_vreinterpretq_u16_f32): Likewise.
26236 (__arm_vreinterpretq_u32_f16): Likewise.
26237 (__arm_vreinterpretq_u32_f32): Likewise.
26238 (__arm_vreinterpretq_u64_f16): Likewise.
26239 (__arm_vreinterpretq_u64_f32): Likewise.
26240 (__arm_vreinterpretq_u8_f16): Likewise.
26241 (__arm_vreinterpretq_u8_f32): Likewise.
26242 (__arm_vreinterpretq_f16_f32): Likewise.
26243 (__arm_vreinterpretq_f16_s16): Likewise.
26244 (__arm_vreinterpretq_f16_s32): Likewise.
26245 (__arm_vreinterpretq_f16_s64): Likewise.
26246 (__arm_vreinterpretq_f16_s8): Likewise.
26247 (__arm_vreinterpretq_f16_u16): Likewise.
26248 (__arm_vreinterpretq_f16_u32): Likewise.
26249 (__arm_vreinterpretq_f16_u64): Likewise.
26250 (__arm_vreinterpretq_f16_u8): Likewise.
26251 (__arm_vreinterpretq_f32_f16): Likewise.
26252 (__arm_vreinterpretq_f32_s16): Likewise.
26253 (__arm_vreinterpretq_f32_s32): Likewise.
26254 (__arm_vreinterpretq_f32_s64): Likewise.
26255 (__arm_vreinterpretq_f32_s8): Likewise.
26256 (__arm_vreinterpretq_f32_u16): Likewise.
26257 (__arm_vreinterpretq_f32_u32): Likewise.
26258 (__arm_vreinterpretq_f32_u64): Likewise.
26259 (__arm_vreinterpretq_f32_u8): Likewise.
26260 (__arm_vreinterpretq_s16): Likewise.
26261 (__arm_vreinterpretq_s32): Likewise.
26262 (__arm_vreinterpretq_s64): Likewise.
26263 (__arm_vreinterpretq_s8): Likewise.
26264 (__arm_vreinterpretq_u16): Likewise.
26265 (__arm_vreinterpretq_u32): Likewise.
26266 (__arm_vreinterpretq_u64): Likewise.
26267 (__arm_vreinterpretq_u8): Likewise.
26268 (__arm_vreinterpretq_f16): Likewise.
26269 (__arm_vreinterpretq_f32): Likewise.
26270 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
26271 * config/arm/unspecs.md: (REINTERPRET): New unspec.
26273 2023-05-03 Murray Steele <murray.steele@arm.com>
26274 Christophe Lyon <christophe.lyon@arm.com>
26275 Christophe Lyon <christophe.lyon@arm.com
26277 * config.gcc: Add arm-mve-builtins-base.o and
26278 arm-mve-builtins-shapes.o to extra_objs.
26279 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
26281 (arm_expand_builtin): Likewise
26282 (arm_check_builtin_call): Likewise
26283 (arm_describe_resolver): Likewise.
26284 * config/arm/arm-builtins.h (enum resolver_ident): Add
26286 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
26287 (arm_resolve_overloaded_builtin): Handle MVE builtins.
26288 (arm_register_target_pragmas): Register arm_check_builtin_call.
26289 * config/arm/arm-mve-builtins.cc (class registered_function): New
26291 (struct registered_function_hasher): New struct.
26292 (pred_suffixes): New table.
26293 (mode_suffixes): New table.
26294 (type_suffix_info): New table.
26295 (TYPES_float16): New.
26296 (TYPES_all_float): New.
26297 (TYPES_integer_8): New.
26298 (TYPES_integer_8_16): New.
26299 (TYPES_integer_16_32): New.
26300 (TYPES_integer_32): New.
26301 (TYPES_signed_16_32): New.
26302 (TYPES_signed_32): New.
26303 (TYPES_all_signed): New.
26304 (TYPES_all_unsigned): New.
26305 (TYPES_all_integer): New.
26306 (TYPES_all_integer_with_64): New.
26307 (DEF_VECTOR_TYPE): New.
26308 (DEF_DOUBLE_TYPE): New.
26309 (DEF_MVE_TYPES_ARRAY): New.
26310 (all_integer): New.
26311 (all_integer_with_64): New.
26315 (all_unsigned): New.
26317 (integer_8_16): New.
26318 (integer_16_32): New.
26320 (signed_16_32): New.
26322 (register_vector_type): Use void_type_node for mve.fp-only types when
26323 mve.fp is not enabled.
26324 (register_builtin_tuple_types): Likewise.
26325 (handle_arm_mve_h): New function..
26326 (matches_type_p): Likewise..
26327 (report_out_of_range): Likewise.
26328 (report_not_enum): Likewise.
26329 (report_missing_float): Likewise.
26330 (report_non_ice): Likewise.
26331 (check_requires_float): Likewise.
26332 (function_instance::hash): Likewise
26333 (function_instance::call_properties): Likewise.
26334 (function_instance::reads_global_state_p): Likewise.
26335 (function_instance::modifies_global_state_p): Likewise.
26336 (function_instance::could_trap_p): Likewise.
26337 (function_instance::has_inactive_argument): Likewise.
26338 (registered_function_hasher::hash): Likewise.
26339 (registered_function_hasher::equal): Likewise.
26340 (function_builder::function_builder): Likewise.
26341 (function_builder::~function_builder): Likewise.
26342 (function_builder::append_name): Likewise.
26343 (function_builder::finish_name): Likewise.
26344 (function_builder::get_name): Likewise.
26345 (add_attribute): Likewise.
26346 (function_builder::get_attributes): Likewise.
26347 (function_builder::add_function): Likewise.
26348 (function_builder::add_unique_function): Likewise.
26349 (function_builder::add_overloaded_function): Likewise.
26350 (function_builder::add_overloaded_functions): Likewise.
26351 (function_builder::register_function_group): Likewise.
26352 (function_call_info::function_call_info): Likewise.
26353 (function_resolver::function_resolver): Likewise.
26354 (function_resolver::get_vector_type): Likewise.
26355 (function_resolver::get_scalar_type_name): Likewise.
26356 (function_resolver::get_argument_type): Likewise.
26357 (function_resolver::scalar_argument_p): Likewise.
26358 (function_resolver::report_no_such_form): Likewise.
26359 (function_resolver::lookup_form): Likewise.
26360 (function_resolver::resolve_to): Likewise.
26361 (function_resolver::infer_vector_or_tuple_type): Likewise.
26362 (function_resolver::infer_vector_type): Likewise.
26363 (function_resolver::require_vector_or_scalar_type): Likewise.
26364 (function_resolver::require_vector_type): Likewise.
26365 (function_resolver::require_matching_vector_type): Likewise.
26366 (function_resolver::require_derived_vector_type): Likewise.
26367 (function_resolver::require_derived_scalar_type): Likewise.
26368 (function_resolver::require_integer_immediate): Likewise.
26369 (function_resolver::require_scalar_type): Likewise.
26370 (function_resolver::check_num_arguments): Likewise.
26371 (function_resolver::check_gp_argument): Likewise.
26372 (function_resolver::finish_opt_n_resolution): Likewise.
26373 (function_resolver::resolve_unary): Likewise.
26374 (function_resolver::resolve_unary_n): Likewise.
26375 (function_resolver::resolve_uniform): Likewise.
26376 (function_resolver::resolve_uniform_opt_n): Likewise.
26377 (function_resolver::resolve): Likewise.
26378 (function_checker::function_checker): Likewise.
26379 (function_checker::argument_exists_p): Likewise.
26380 (function_checker::require_immediate): Likewise.
26381 (function_checker::require_immediate_enum): Likewise.
26382 (function_checker::require_immediate_range): Likewise.
26383 (function_checker::check): Likewise.
26384 (gimple_folder::gimple_folder): Likewise.
26385 (gimple_folder::fold): Likewise.
26386 (function_expander::function_expander): Likewise.
26387 (function_expander::direct_optab_handler): Likewise.
26388 (function_expander::get_fallback_value): Likewise.
26389 (function_expander::get_reg_target): Likewise.
26390 (function_expander::add_output_operand): Likewise.
26391 (function_expander::add_input_operand): Likewise.
26392 (function_expander::add_integer_operand): Likewise.
26393 (function_expander::generate_insn): Likewise.
26394 (function_expander::use_exact_insn): Likewise.
26395 (function_expander::use_unpred_insn): Likewise.
26396 (function_expander::use_pred_x_insn): Likewise.
26397 (function_expander::use_cond_insn): Likewise.
26398 (function_expander::map_to_rtx_codes): Likewise.
26399 (function_expander::expand): Likewise.
26400 (resolve_overloaded_builtin): Likewise.
26401 (check_builtin_call): Likewise.
26402 (gimple_fold_builtin): Likewise.
26403 (expand_builtin): Likewise.
26404 (gt_ggc_mx): Likewise.
26405 (gt_pch_nx): Likewise.
26406 (gt_pch_nx): Likewise.
26407 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
26418 (offset): New mode.
26419 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
26420 (CP_READ_FPCR): Likewise.
26421 (CP_RAISE_FP_EXCEPTIONS): Likewise.
26422 (CP_READ_MEMORY): Likewise.
26423 (CP_WRITE_MEMORY): Likewise.
26424 (enum units_index): New enum.
26425 (enum predication_index): New.
26426 (enum type_class_index): New.
26427 (enum mode_suffix_index): New enum.
26428 (enum type_suffix_index): New.
26429 (struct mode_suffix_info): New struct.
26430 (struct type_suffix_info): New.
26431 (struct function_group_info): Likewise.
26432 (class function_instance): Likewise.
26433 (class registered_function): Likewise.
26434 (class function_builder): Likewise.
26435 (class function_call_info): Likewise.
26436 (class function_resolver): Likewise.
26437 (class function_checker): Likewise.
26438 (class gimple_folder): Likewise.
26439 (class function_expander): Likewise.
26440 (get_mve_pred16_t): Likewise.
26441 (find_mode_suffix): New function.
26442 (class function_base): Likewise.
26443 (class function_shape): Likewise.
26444 (function_instance::operator==): New function.
26445 (function_instance::operator!=): Likewise.
26446 (function_instance::vectors_per_tuple): Likewise.
26447 (function_instance::mode_suffix): Likewise.
26448 (function_instance::type_suffix): Likewise.
26449 (function_instance::scalar_type): Likewise.
26450 (function_instance::vector_type): Likewise.
26451 (function_instance::tuple_type): Likewise.
26452 (function_instance::vector_mode): Likewise.
26453 (function_call_info::function_returns_void_p): Likewise.
26454 (function_base::call_properties): Likewise.
26455 * config/arm/arm-protos.h (enum arm_builtin_class): Add
26457 (handle_arm_mve_h): New.
26458 (resolve_overloaded_builtin): New.
26459 (check_builtin_call): New.
26460 (gimple_fold_builtin): New.
26461 (expand_builtin): New.
26462 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
26463 arm_gimple_fold_builtin.
26464 (arm_gimple_fold_builtin): New function.
26465 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
26466 * config/arm/predicates.md (arm_any_register_operand): New predicate.
26467 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
26468 (arm-mve-builtins-shapes.o): New target.
26469 (arm-mve-builtins-base.o): New target.
26470 * config/arm/arm-mve-builtins-base.cc: New file.
26471 * config/arm/arm-mve-builtins-base.def: New file.
26472 * config/arm/arm-mve-builtins-base.h: New file.
26473 * config/arm/arm-mve-builtins-functions.h: New file.
26474 * config/arm/arm-mve-builtins-shapes.cc: New file.
26475 * config/arm/arm-mve-builtins-shapes.h: New file.
26477 2023-05-03 Murray Steele <murray.steele@arm.com>
26478 Christophe Lyon <christophe.lyon@arm.com>
26479 Christophe Lyon <christophe.lyon@arm.com>
26481 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
26483 (arm_init_builtin): Use arm_general_add_builtin_function instead
26484 of arm_add_builtin_function.
26485 (arm_init_acle_builtins): Likewise.
26486 (arm_init_mve_builtins): Likewise.
26487 (arm_init_crypto_builtins): Likewise.
26488 (arm_init_builtins): Likewise.
26489 (arm_general_builtin_decl): New function.
26490 (arm_builtin_decl): Defer to numberspace-specialized functions.
26491 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
26492 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
26493 (arm_general_expand_builtin_1): ... specialize for general builtins.
26494 (arm_expand_acle_builtin): Use arm_general_expand_builtin
26495 instead of arm_expand_builtin.
26496 (arm_expand_mve_builtin): Likewise.
26497 (arm_expand_neon_builtin): Likewise.
26498 (arm_expand_vfp_builtin): Likewise.
26499 (arm_general_expand_builtin): New function.
26500 (arm_expand_builtin): Specialize for general builtins.
26501 (arm_general_check_builtin_call): New function.
26502 (arm_check_builtin_call): Specialize for general builtins.
26503 (arm_describe_resolver): Validate numberspace.
26504 (arm_cde_end_args): Likewise.
26505 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
26506 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
26508 2023-05-03 Martin Liska <mliska@suse.cz>
26511 * config/riscv/sync.md: Add gcc_unreachable to a switch.
26513 2023-05-03 Richard Biener <rguenther@suse.de>
26515 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
26516 (patch_loop_exit): Likewise.
26517 (connect_loops): Likewise.
26518 (split_loop): Likewise.
26519 (control_dep_semi_invariant_p): Likewise.
26520 (do_split_loop_on_cond): Likewise.
26521 (split_loop_on_cond): Likewise.
26522 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
26524 (simplify_loop_version): Likewise.
26525 (evaluate_bbs): Likewise.
26526 (find_loop_guard): Likewise.
26527 (clean_up_after_unswitching): Likewise.
26528 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
26530 (optimize_spaceship): Take a gcond * argument, avoid
26532 (math_opts_dom_walker::after_dom_children): Adjust call to
26533 optimize_spaceship.
26534 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
26535 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
26538 2023-05-03 Andreas Schwab <schwab@suse.de>
26540 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
26542 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26544 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
26546 (class vlseg): New class.
26547 (class vsseg): Ditto.
26548 (class vlsseg): Ditto.
26549 (class vssseg): Ditto.
26550 (class seg_indexed_load): Ditto.
26551 (class seg_indexed_store): Ditto.
26552 (class vlsegff): Ditto.
26554 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
26555 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
26565 * config/riscv/riscv-vector-builtins-shapes.cc (struct
26566 seg_loadstore_def): Ditto.
26567 (struct seg_indexed_loadstore_def): Ditto.
26568 (struct seg_fault_load_def): Ditto.
26570 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
26571 * config/riscv/riscv-vector-builtins.cc
26572 (function_builder::append_nf): New function.
26573 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
26574 Change ptr from double into float.
26575 (vfloat32m1x3_t): Ditto.
26576 (vfloat32m1x4_t): Ditto.
26577 (vfloat32m1x5_t): Ditto.
26578 (vfloat32m1x6_t): Ditto.
26579 (vfloat32m1x7_t): Ditto.
26580 (vfloat32m1x8_t): Ditto.
26581 (vfloat32m2x2_t): Ditto.
26582 (vfloat32m2x3_t): Ditto.
26583 (vfloat32m2x4_t): Ditto.
26584 (vfloat32m4x2_t): Ditto.
26585 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
26586 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
26588 * config/riscv/riscv.md: Add segment instructions.
26589 * config/riscv/vector-iterators.md: Support segment intrinsics.
26590 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
26592 (@pred_unit_strided_store<mode>): Ditto.
26593 (@pred_strided_load<mode>): Ditto.
26594 (@pred_strided_store<mode>): Ditto.
26595 (@pred_fault_load<mode>): Ditto.
26596 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
26597 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
26598 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
26599 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
26600 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
26601 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
26602 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
26603 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
26604 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
26605 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
26606 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
26607 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
26608 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
26609 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
26611 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26613 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
26614 tuple type support.
26616 (floattype): Ditto.
26618 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
26619 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
26621 (vget): Add tuple type vget.
26622 * config/riscv/riscv-vector-builtins-types.def
26623 (DEF_RVV_TUPLE_OPS): New macro.
26624 (vint8mf8x2_t): Ditto.
26625 (vuint8mf8x2_t): Ditto.
26626 (vint8mf8x3_t): Ditto.
26627 (vuint8mf8x3_t): Ditto.
26628 (vint8mf8x4_t): Ditto.
26629 (vuint8mf8x4_t): Ditto.
26630 (vint8mf8x5_t): Ditto.
26631 (vuint8mf8x5_t): Ditto.
26632 (vint8mf8x6_t): Ditto.
26633 (vuint8mf8x6_t): Ditto.
26634 (vint8mf8x7_t): Ditto.
26635 (vuint8mf8x7_t): Ditto.
26636 (vint8mf8x8_t): Ditto.
26637 (vuint8mf8x8_t): Ditto.
26638 (vint8mf4x2_t): Ditto.
26639 (vuint8mf4x2_t): Ditto.
26640 (vint8mf4x3_t): Ditto.
26641 (vuint8mf4x3_t): Ditto.
26642 (vint8mf4x4_t): Ditto.
26643 (vuint8mf4x4_t): Ditto.
26644 (vint8mf4x5_t): Ditto.
26645 (vuint8mf4x5_t): Ditto.
26646 (vint8mf4x6_t): Ditto.
26647 (vuint8mf4x6_t): Ditto.
26648 (vint8mf4x7_t): Ditto.
26649 (vuint8mf4x7_t): Ditto.
26650 (vint8mf4x8_t): Ditto.
26651 (vuint8mf4x8_t): Ditto.
26652 (vint8mf2x2_t): Ditto.
26653 (vuint8mf2x2_t): Ditto.
26654 (vint8mf2x3_t): Ditto.
26655 (vuint8mf2x3_t): Ditto.
26656 (vint8mf2x4_t): Ditto.
26657 (vuint8mf2x4_t): Ditto.
26658 (vint8mf2x5_t): Ditto.
26659 (vuint8mf2x5_t): Ditto.
26660 (vint8mf2x6_t): Ditto.
26661 (vuint8mf2x6_t): Ditto.
26662 (vint8mf2x7_t): Ditto.
26663 (vuint8mf2x7_t): Ditto.
26664 (vint8mf2x8_t): Ditto.
26665 (vuint8mf2x8_t): Ditto.
26666 (vint8m1x2_t): Ditto.
26667 (vuint8m1x2_t): Ditto.
26668 (vint8m1x3_t): Ditto.
26669 (vuint8m1x3_t): Ditto.
26670 (vint8m1x4_t): Ditto.
26671 (vuint8m1x4_t): Ditto.
26672 (vint8m1x5_t): Ditto.
26673 (vuint8m1x5_t): Ditto.
26674 (vint8m1x6_t): Ditto.
26675 (vuint8m1x6_t): Ditto.
26676 (vint8m1x7_t): Ditto.
26677 (vuint8m1x7_t): Ditto.
26678 (vint8m1x8_t): Ditto.
26679 (vuint8m1x8_t): Ditto.
26680 (vint8m2x2_t): Ditto.
26681 (vuint8m2x2_t): Ditto.
26682 (vint8m2x3_t): Ditto.
26683 (vuint8m2x3_t): Ditto.
26684 (vint8m2x4_t): Ditto.
26685 (vuint8m2x4_t): Ditto.
26686 (vint8m4x2_t): Ditto.
26687 (vuint8m4x2_t): Ditto.
26688 (vint16mf4x2_t): Ditto.
26689 (vuint16mf4x2_t): Ditto.
26690 (vint16mf4x3_t): Ditto.
26691 (vuint16mf4x3_t): Ditto.
26692 (vint16mf4x4_t): Ditto.
26693 (vuint16mf4x4_t): Ditto.
26694 (vint16mf4x5_t): Ditto.
26695 (vuint16mf4x5_t): Ditto.
26696 (vint16mf4x6_t): Ditto.
26697 (vuint16mf4x6_t): Ditto.
26698 (vint16mf4x7_t): Ditto.
26699 (vuint16mf4x7_t): Ditto.
26700 (vint16mf4x8_t): Ditto.
26701 (vuint16mf4x8_t): Ditto.
26702 (vint16mf2x2_t): Ditto.
26703 (vuint16mf2x2_t): Ditto.
26704 (vint16mf2x3_t): Ditto.
26705 (vuint16mf2x3_t): Ditto.
26706 (vint16mf2x4_t): Ditto.
26707 (vuint16mf2x4_t): Ditto.
26708 (vint16mf2x5_t): Ditto.
26709 (vuint16mf2x5_t): Ditto.
26710 (vint16mf2x6_t): Ditto.
26711 (vuint16mf2x6_t): Ditto.
26712 (vint16mf2x7_t): Ditto.
26713 (vuint16mf2x7_t): Ditto.
26714 (vint16mf2x8_t): Ditto.
26715 (vuint16mf2x8_t): Ditto.
26716 (vint16m1x2_t): Ditto.
26717 (vuint16m1x2_t): Ditto.
26718 (vint16m1x3_t): Ditto.
26719 (vuint16m1x3_t): Ditto.
26720 (vint16m1x4_t): Ditto.
26721 (vuint16m1x4_t): Ditto.
26722 (vint16m1x5_t): Ditto.
26723 (vuint16m1x5_t): Ditto.
26724 (vint16m1x6_t): Ditto.
26725 (vuint16m1x6_t): Ditto.
26726 (vint16m1x7_t): Ditto.
26727 (vuint16m1x7_t): Ditto.
26728 (vint16m1x8_t): Ditto.
26729 (vuint16m1x8_t): Ditto.
26730 (vint16m2x2_t): Ditto.
26731 (vuint16m2x2_t): Ditto.
26732 (vint16m2x3_t): Ditto.
26733 (vuint16m2x3_t): Ditto.
26734 (vint16m2x4_t): Ditto.
26735 (vuint16m2x4_t): Ditto.
26736 (vint16m4x2_t): Ditto.
26737 (vuint16m4x2_t): Ditto.
26738 (vint32mf2x2_t): Ditto.
26739 (vuint32mf2x2_t): Ditto.
26740 (vint32mf2x3_t): Ditto.
26741 (vuint32mf2x3_t): Ditto.
26742 (vint32mf2x4_t): Ditto.
26743 (vuint32mf2x4_t): Ditto.
26744 (vint32mf2x5_t): Ditto.
26745 (vuint32mf2x5_t): Ditto.
26746 (vint32mf2x6_t): Ditto.
26747 (vuint32mf2x6_t): Ditto.
26748 (vint32mf2x7_t): Ditto.
26749 (vuint32mf2x7_t): Ditto.
26750 (vint32mf2x8_t): Ditto.
26751 (vuint32mf2x8_t): Ditto.
26752 (vint32m1x2_t): Ditto.
26753 (vuint32m1x2_t): Ditto.
26754 (vint32m1x3_t): Ditto.
26755 (vuint32m1x3_t): Ditto.
26756 (vint32m1x4_t): Ditto.
26757 (vuint32m1x4_t): Ditto.
26758 (vint32m1x5_t): Ditto.
26759 (vuint32m1x5_t): Ditto.
26760 (vint32m1x6_t): Ditto.
26761 (vuint32m1x6_t): Ditto.
26762 (vint32m1x7_t): Ditto.
26763 (vuint32m1x7_t): Ditto.
26764 (vint32m1x8_t): Ditto.
26765 (vuint32m1x8_t): Ditto.
26766 (vint32m2x2_t): Ditto.
26767 (vuint32m2x2_t): Ditto.
26768 (vint32m2x3_t): Ditto.
26769 (vuint32m2x3_t): Ditto.
26770 (vint32m2x4_t): Ditto.
26771 (vuint32m2x4_t): Ditto.
26772 (vint32m4x2_t): Ditto.
26773 (vuint32m4x2_t): Ditto.
26774 (vint64m1x2_t): Ditto.
26775 (vuint64m1x2_t): Ditto.
26776 (vint64m1x3_t): Ditto.
26777 (vuint64m1x3_t): Ditto.
26778 (vint64m1x4_t): Ditto.
26779 (vuint64m1x4_t): Ditto.
26780 (vint64m1x5_t): Ditto.
26781 (vuint64m1x5_t): Ditto.
26782 (vint64m1x6_t): Ditto.
26783 (vuint64m1x6_t): Ditto.
26784 (vint64m1x7_t): Ditto.
26785 (vuint64m1x7_t): Ditto.
26786 (vint64m1x8_t): Ditto.
26787 (vuint64m1x8_t): Ditto.
26788 (vint64m2x2_t): Ditto.
26789 (vuint64m2x2_t): Ditto.
26790 (vint64m2x3_t): Ditto.
26791 (vuint64m2x3_t): Ditto.
26792 (vint64m2x4_t): Ditto.
26793 (vuint64m2x4_t): Ditto.
26794 (vint64m4x2_t): Ditto.
26795 (vuint64m4x2_t): Ditto.
26796 (vfloat32mf2x2_t): Ditto.
26797 (vfloat32mf2x3_t): Ditto.
26798 (vfloat32mf2x4_t): Ditto.
26799 (vfloat32mf2x5_t): Ditto.
26800 (vfloat32mf2x6_t): Ditto.
26801 (vfloat32mf2x7_t): Ditto.
26802 (vfloat32mf2x8_t): Ditto.
26803 (vfloat32m1x2_t): Ditto.
26804 (vfloat32m1x3_t): Ditto.
26805 (vfloat32m1x4_t): Ditto.
26806 (vfloat32m1x5_t): Ditto.
26807 (vfloat32m1x6_t): Ditto.
26808 (vfloat32m1x7_t): Ditto.
26809 (vfloat32m1x8_t): Ditto.
26810 (vfloat32m2x2_t): Ditto.
26811 (vfloat32m2x3_t): Ditto.
26812 (vfloat32m2x4_t): Ditto.
26813 (vfloat32m4x2_t): Ditto.
26814 (vfloat64m1x2_t): Ditto.
26815 (vfloat64m1x3_t): Ditto.
26816 (vfloat64m1x4_t): Ditto.
26817 (vfloat64m1x5_t): Ditto.
26818 (vfloat64m1x6_t): Ditto.
26819 (vfloat64m1x7_t): Ditto.
26820 (vfloat64m1x8_t): Ditto.
26821 (vfloat64m2x2_t): Ditto.
26822 (vfloat64m2x3_t): Ditto.
26823 (vfloat64m2x4_t): Ditto.
26824 (vfloat64m4x2_t): Ditto.
26825 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
26827 (DEF_RVV_TYPE_INDEX): Ditto.
26828 (rvv_arg_type_info::get_tuple_subpart_type): New function.
26829 (DEF_RVV_TUPLE_TYPE): New macro.
26830 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
26831 Adapt for tuple vget/vset support.
26832 (vint8mf4_t): Ditto.
26833 (vuint8mf4_t): Ditto.
26834 (vint8mf2_t): Ditto.
26835 (vuint8mf2_t): Ditto.
26836 (vint8m1_t): Ditto.
26837 (vuint8m1_t): Ditto.
26838 (vint8m2_t): Ditto.
26839 (vuint8m2_t): Ditto.
26840 (vint8m4_t): Ditto.
26841 (vuint8m4_t): Ditto.
26842 (vint8m8_t): Ditto.
26843 (vuint8m8_t): Ditto.
26844 (vint16mf4_t): Ditto.
26845 (vuint16mf4_t): Ditto.
26846 (vint16mf2_t): Ditto.
26847 (vuint16mf2_t): Ditto.
26848 (vint16m1_t): Ditto.
26849 (vuint16m1_t): Ditto.
26850 (vint16m2_t): Ditto.
26851 (vuint16m2_t): Ditto.
26852 (vint16m4_t): Ditto.
26853 (vuint16m4_t): Ditto.
26854 (vint16m8_t): Ditto.
26855 (vuint16m8_t): Ditto.
26856 (vint32mf2_t): Ditto.
26857 (vuint32mf2_t): Ditto.
26858 (vint32m1_t): Ditto.
26859 (vuint32m1_t): Ditto.
26860 (vint32m2_t): Ditto.
26861 (vuint32m2_t): Ditto.
26862 (vint32m4_t): Ditto.
26863 (vuint32m4_t): Ditto.
26864 (vint32m8_t): Ditto.
26865 (vuint32m8_t): Ditto.
26866 (vint64m1_t): Ditto.
26867 (vuint64m1_t): Ditto.
26868 (vint64m2_t): Ditto.
26869 (vuint64m2_t): Ditto.
26870 (vint64m4_t): Ditto.
26871 (vuint64m4_t): Ditto.
26872 (vint64m8_t): Ditto.
26873 (vuint64m8_t): Ditto.
26874 (vfloat32mf2_t): Ditto.
26875 (vfloat32m1_t): Ditto.
26876 (vfloat32m2_t): Ditto.
26877 (vfloat32m4_t): Ditto.
26878 (vfloat32m8_t): Ditto.
26879 (vfloat64m1_t): Ditto.
26880 (vfloat64m2_t): Ditto.
26881 (vfloat64m4_t): Ditto.
26882 (vfloat64m8_t): Ditto.
26883 (tuple_subpart): Add tuple subpart base type.
26884 * config/riscv/riscv-vector-builtins.h (struct
26885 rvv_arg_type_info): Ditto.
26886 (tuple_type_field): New function.
26888 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26890 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
26891 (RVV_TUPLE_PARTIAL_MODES): Ditto.
26892 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
26895 (get_subpart_mode): Ditto.
26896 (get_tuple_mode): Ditto.
26897 (expand_tuple_move): Ditto.
26898 * config/riscv/riscv-v.cc (ENTRY): New macro.
26899 (TUPLE_ENTRY): Ditto.
26900 (get_nf): New function.
26901 (get_subpart_mode): Ditto.
26902 (get_tuple_mode): Ditto.
26903 (expand_tuple_move): Ditto.
26904 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
26906 (register_tuple_type): New function
26907 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
26909 (vint8mf8x2_t): New macro.
26910 (vuint8mf8x2_t): Ditto.
26911 (vint8mf8x3_t): Ditto.
26912 (vuint8mf8x3_t): Ditto.
26913 (vint8mf8x4_t): Ditto.
26914 (vuint8mf8x4_t): Ditto.
26915 (vint8mf8x5_t): Ditto.
26916 (vuint8mf8x5_t): Ditto.
26917 (vint8mf8x6_t): Ditto.
26918 (vuint8mf8x6_t): Ditto.
26919 (vint8mf8x7_t): Ditto.
26920 (vuint8mf8x7_t): Ditto.
26921 (vint8mf8x8_t): Ditto.
26922 (vuint8mf8x8_t): Ditto.
26923 (vint8mf4x2_t): Ditto.
26924 (vuint8mf4x2_t): Ditto.
26925 (vint8mf4x3_t): Ditto.
26926 (vuint8mf4x3_t): Ditto.
26927 (vint8mf4x4_t): Ditto.
26928 (vuint8mf4x4_t): Ditto.
26929 (vint8mf4x5_t): Ditto.
26930 (vuint8mf4x5_t): Ditto.
26931 (vint8mf4x6_t): Ditto.
26932 (vuint8mf4x6_t): Ditto.
26933 (vint8mf4x7_t): Ditto.
26934 (vuint8mf4x7_t): Ditto.
26935 (vint8mf4x8_t): Ditto.
26936 (vuint8mf4x8_t): Ditto.
26937 (vint8mf2x2_t): Ditto.
26938 (vuint8mf2x2_t): Ditto.
26939 (vint8mf2x3_t): Ditto.
26940 (vuint8mf2x3_t): Ditto.
26941 (vint8mf2x4_t): Ditto.
26942 (vuint8mf2x4_t): Ditto.
26943 (vint8mf2x5_t): Ditto.
26944 (vuint8mf2x5_t): Ditto.
26945 (vint8mf2x6_t): Ditto.
26946 (vuint8mf2x6_t): Ditto.
26947 (vint8mf2x7_t): Ditto.
26948 (vuint8mf2x7_t): Ditto.
26949 (vint8mf2x8_t): Ditto.
26950 (vuint8mf2x8_t): Ditto.
26951 (vint8m1x2_t): Ditto.
26952 (vuint8m1x2_t): Ditto.
26953 (vint8m1x3_t): Ditto.
26954 (vuint8m1x3_t): Ditto.
26955 (vint8m1x4_t): Ditto.
26956 (vuint8m1x4_t): Ditto.
26957 (vint8m1x5_t): Ditto.
26958 (vuint8m1x5_t): Ditto.
26959 (vint8m1x6_t): Ditto.
26960 (vuint8m1x6_t): Ditto.
26961 (vint8m1x7_t): Ditto.
26962 (vuint8m1x7_t): Ditto.
26963 (vint8m1x8_t): Ditto.
26964 (vuint8m1x8_t): Ditto.
26965 (vint8m2x2_t): Ditto.
26966 (vuint8m2x2_t): Ditto.
26967 (vint8m2x3_t): Ditto.
26968 (vuint8m2x3_t): Ditto.
26969 (vint8m2x4_t): Ditto.
26970 (vuint8m2x4_t): Ditto.
26971 (vint8m4x2_t): Ditto.
26972 (vuint8m4x2_t): Ditto.
26973 (vint16mf4x2_t): Ditto.
26974 (vuint16mf4x2_t): Ditto.
26975 (vint16mf4x3_t): Ditto.
26976 (vuint16mf4x3_t): Ditto.
26977 (vint16mf4x4_t): Ditto.
26978 (vuint16mf4x4_t): Ditto.
26979 (vint16mf4x5_t): Ditto.
26980 (vuint16mf4x5_t): Ditto.
26981 (vint16mf4x6_t): Ditto.
26982 (vuint16mf4x6_t): Ditto.
26983 (vint16mf4x7_t): Ditto.
26984 (vuint16mf4x7_t): Ditto.
26985 (vint16mf4x8_t): Ditto.
26986 (vuint16mf4x8_t): Ditto.
26987 (vint16mf2x2_t): Ditto.
26988 (vuint16mf2x2_t): Ditto.
26989 (vint16mf2x3_t): Ditto.
26990 (vuint16mf2x3_t): Ditto.
26991 (vint16mf2x4_t): Ditto.
26992 (vuint16mf2x4_t): Ditto.
26993 (vint16mf2x5_t): Ditto.
26994 (vuint16mf2x5_t): Ditto.
26995 (vint16mf2x6_t): Ditto.
26996 (vuint16mf2x6_t): Ditto.
26997 (vint16mf2x7_t): Ditto.
26998 (vuint16mf2x7_t): Ditto.
26999 (vint16mf2x8_t): Ditto.
27000 (vuint16mf2x8_t): Ditto.
27001 (vint16m1x2_t): Ditto.
27002 (vuint16m1x2_t): Ditto.
27003 (vint16m1x3_t): Ditto.
27004 (vuint16m1x3_t): Ditto.
27005 (vint16m1x4_t): Ditto.
27006 (vuint16m1x4_t): Ditto.
27007 (vint16m1x5_t): Ditto.
27008 (vuint16m1x5_t): Ditto.
27009 (vint16m1x6_t): Ditto.
27010 (vuint16m1x6_t): Ditto.
27011 (vint16m1x7_t): Ditto.
27012 (vuint16m1x7_t): Ditto.
27013 (vint16m1x8_t): Ditto.
27014 (vuint16m1x8_t): Ditto.
27015 (vint16m2x2_t): Ditto.
27016 (vuint16m2x2_t): Ditto.
27017 (vint16m2x3_t): Ditto.
27018 (vuint16m2x3_t): Ditto.
27019 (vint16m2x4_t): Ditto.
27020 (vuint16m2x4_t): Ditto.
27021 (vint16m4x2_t): Ditto.
27022 (vuint16m4x2_t): Ditto.
27023 (vint32mf2x2_t): Ditto.
27024 (vuint32mf2x2_t): Ditto.
27025 (vint32mf2x3_t): Ditto.
27026 (vuint32mf2x3_t): Ditto.
27027 (vint32mf2x4_t): Ditto.
27028 (vuint32mf2x4_t): Ditto.
27029 (vint32mf2x5_t): Ditto.
27030 (vuint32mf2x5_t): Ditto.
27031 (vint32mf2x6_t): Ditto.
27032 (vuint32mf2x6_t): Ditto.
27033 (vint32mf2x7_t): Ditto.
27034 (vuint32mf2x7_t): Ditto.
27035 (vint32mf2x8_t): Ditto.
27036 (vuint32mf2x8_t): Ditto.
27037 (vint32m1x2_t): Ditto.
27038 (vuint32m1x2_t): Ditto.
27039 (vint32m1x3_t): Ditto.
27040 (vuint32m1x3_t): Ditto.
27041 (vint32m1x4_t): Ditto.
27042 (vuint32m1x4_t): Ditto.
27043 (vint32m1x5_t): Ditto.
27044 (vuint32m1x5_t): Ditto.
27045 (vint32m1x6_t): Ditto.
27046 (vuint32m1x6_t): Ditto.
27047 (vint32m1x7_t): Ditto.
27048 (vuint32m1x7_t): Ditto.
27049 (vint32m1x8_t): Ditto.
27050 (vuint32m1x8_t): Ditto.
27051 (vint32m2x2_t): Ditto.
27052 (vuint32m2x2_t): Ditto.
27053 (vint32m2x3_t): Ditto.
27054 (vuint32m2x3_t): Ditto.
27055 (vint32m2x4_t): Ditto.
27056 (vuint32m2x4_t): Ditto.
27057 (vint32m4x2_t): Ditto.
27058 (vuint32m4x2_t): Ditto.
27059 (vint64m1x2_t): Ditto.
27060 (vuint64m1x2_t): Ditto.
27061 (vint64m1x3_t): Ditto.
27062 (vuint64m1x3_t): Ditto.
27063 (vint64m1x4_t): Ditto.
27064 (vuint64m1x4_t): Ditto.
27065 (vint64m1x5_t): Ditto.
27066 (vuint64m1x5_t): Ditto.
27067 (vint64m1x6_t): Ditto.
27068 (vuint64m1x6_t): Ditto.
27069 (vint64m1x7_t): Ditto.
27070 (vuint64m1x7_t): Ditto.
27071 (vint64m1x8_t): Ditto.
27072 (vuint64m1x8_t): Ditto.
27073 (vint64m2x2_t): Ditto.
27074 (vuint64m2x2_t): Ditto.
27075 (vint64m2x3_t): Ditto.
27076 (vuint64m2x3_t): Ditto.
27077 (vint64m2x4_t): Ditto.
27078 (vuint64m2x4_t): Ditto.
27079 (vint64m4x2_t): Ditto.
27080 (vuint64m4x2_t): Ditto.
27081 (vfloat32mf2x2_t): Ditto.
27082 (vfloat32mf2x3_t): Ditto.
27083 (vfloat32mf2x4_t): Ditto.
27084 (vfloat32mf2x5_t): Ditto.
27085 (vfloat32mf2x6_t): Ditto.
27086 (vfloat32mf2x7_t): Ditto.
27087 (vfloat32mf2x8_t): Ditto.
27088 (vfloat32m1x2_t): Ditto.
27089 (vfloat32m1x3_t): Ditto.
27090 (vfloat32m1x4_t): Ditto.
27091 (vfloat32m1x5_t): Ditto.
27092 (vfloat32m1x6_t): Ditto.
27093 (vfloat32m1x7_t): Ditto.
27094 (vfloat32m1x8_t): Ditto.
27095 (vfloat32m2x2_t): Ditto.
27096 (vfloat32m2x3_t): Ditto.
27097 (vfloat32m2x4_t): Ditto.
27098 (vfloat32m4x2_t): Ditto.
27099 (vfloat64m1x2_t): Ditto.
27100 (vfloat64m1x3_t): Ditto.
27101 (vfloat64m1x4_t): Ditto.
27102 (vfloat64m1x5_t): Ditto.
27103 (vfloat64m1x6_t): Ditto.
27104 (vfloat64m1x7_t): Ditto.
27105 (vfloat64m1x8_t): Ditto.
27106 (vfloat64m2x2_t): Ditto.
27107 (vfloat64m2x3_t): Ditto.
27108 (vfloat64m2x4_t): Ditto.
27109 (vfloat64m4x2_t): Ditto.
27110 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
27112 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
27113 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
27115 (TUPLE_ENTRY): Ditto.
27116 (riscv_v_ext_mode_p): New function.
27117 (riscv_v_adjust_nunits): Add tuple mode adjustment.
27118 (riscv_classify_address): Ditto.
27119 (riscv_binary_cost): Ditto.
27120 (riscv_rtx_costs): Ditto.
27121 (riscv_secondary_memory_needed): Ditto.
27122 (riscv_hard_regno_nregs): Ditto.
27123 (riscv_hard_regno_mode_ok): Ditto.
27124 (riscv_vector_mode_supported_p): Ditto.
27125 (riscv_regmode_natural_size): Ditto.
27126 (riscv_array_mode): New function.
27127 (TARGET_ARRAY_MODE): New target hook.
27128 * config/riscv/riscv.md: Add tuple modes.
27129 * config/riscv/vector-iterators.md: Ditto.
27130 * config/riscv/vector.md (mov<mode>): Add tuple modes data
27132 (*mov<VT:mode>_<P:mode>): Ditto.
27134 2023-05-03 Richard Biener <rguenther@suse.de>
27136 * cse.cc (cse_insn): Track an equivalence to the destination
27137 separately and delay using src_related for it.
27139 2023-05-03 Richard Biener <rguenther@suse.de>
27141 * cse.cc (HASH): Turn into inline function and mix
27142 in another HASH_SHIFT bits.
27143 (SAFE_HASH): Likewise.
27145 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27148 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
27149 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
27151 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27154 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
27155 (add<mode>3<vczle><vczbe>): ... This.
27156 (sub<mode>3): Rename to...
27157 (sub<mode>3<vczle><vczbe>): ... This.
27158 (mul<mode>3): Rename to...
27159 (mul<mode>3<vczle><vczbe>): ... This.
27160 (*div<mode>3): Rename to...
27161 (*div<mode>3<vczle><vczbe>): ... This.
27162 (neg<mode>2): Rename to...
27163 (neg<mode>2<vczle><vczbe>): ... This.
27164 (abs<mode>2): Rename to...
27165 (abs<mode>2<vczle><vczbe>): ... This.
27166 (<frint_pattern><mode>2): Rename to...
27167 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
27168 (<fmaxmin><mode>3): Rename to...
27169 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
27170 (*sqrt<mode>2): Rename to...
27171 (*sqrt<mode>2<vczle><vczbe>): ... This.
27173 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
27175 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
27177 2023-05-03 Martin Liska <mliska@suse.cz>
27179 PR tree-optimization/109693
27180 * value-range-storage.cc (vrange_allocator::vrange_allocator):
27181 Remove unused field.
27182 * value-range-storage.h: Likewise.
27184 2023-05-02 Andrew Pinski <apinski@marvell.com>
27186 * tree-ssa-phiopt.cc (move_stmt): New function.
27187 (match_simplify_replacement): Use move_stmt instead
27188 of the inlined version.
27190 2023-05-02 Andrew Pinski <apinski@marvell.com>
27192 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
27195 2023-05-02 Andrew Pinski <apinski@marvell.com>
27197 PR tree-optimization/109702
27198 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
27199 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
27201 2023-05-02 Andrew Pinski <apinski@marvell.com>
27204 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
27205 insn_and_split pattern.
27207 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27209 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
27212 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27214 * config/riscv/sync.md (mem_thread_fence_1): Change fence
27215 depending on the given memory model.
27217 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27219 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
27220 riscv_union_memmodels function to sync.md.
27221 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
27222 get the union of two memmodels in sync.md.
27223 (riscv_print_operand): Add %I and %J flags that output the
27224 optimal LR/SC flag bits for a given memory model.
27225 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
27226 bits on SC op and replace with optimized %I, %J flags.
27228 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27230 * config/riscv/riscv.cc
27231 (riscv_memmodel_needs_amo_release): Change function name.
27232 (riscv_print_operand): Remove unneeded %F case.
27233 * config/riscv/sync.md: Remove unneeded fences.
27235 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27238 * config/riscv/sync.md (atomic_store<mode>): Use simple store
27239 instruction in combination with fence(s).
27241 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27243 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
27244 of %A to include release bits.
27246 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27248 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
27249 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
27252 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27254 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
27255 sequentially consistent LR.aqrl/SC.rl pairs.
27257 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27259 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
27260 sanitize memmodel input with memmodel_base.
27262 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
27263 Pan Li <pan2.li@intel.com>
27266 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
27268 2023-05-02 Romain Naour <romain.naour@gmail.com>
27270 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
27273 2023-05-02 Martin Liska <mliska@suse.cz>
27275 * doc/invoke.texi: Update documentation based on param.opt file.
27277 2023-05-02 Richard Biener <rguenther@suse.de>
27279 PR tree-optimization/109672
27280 * tree-vect-stmts.cc (vectorizable_operation): For plus,
27281 minus and negate always check the vector mode is word mode.
27283 2023-05-01 Andrew Pinski <apinski@marvell.com>
27285 * tree-ssa-phiopt.cc: Update comment about
27286 how the transformation are implemented.
27288 2023-05-01 Jeff Law <jlaw@ventanamicro>
27290 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
27292 2023-05-01 Jeff Law <jlaw@ventanamicro>
27294 * config/cris/cris.cc (TARGET_LRA_P): Remove.
27295 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
27296 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
27297 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
27298 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
27299 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
27301 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
27303 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
27304 * print-tree.cc (print_decl_identifier): Implement it.
27305 * toplev.cc (output_stack_usage_1): Use it.
27307 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27309 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
27312 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27314 * value-range.h (irange::set_nonzero): Inline.
27316 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27318 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
27320 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
27321 invalid_range, as it is an inverse range.
27322 * tree-vrp.cc (find_case_label_range): Avoid trees.
27323 * value-range.cc (irange::irange_set): Delete.
27324 (irange::irange_set_1bit_anti_range): Delete.
27325 (irange::irange_set_anti_range): Delete.
27326 (irange::set): Cleanup.
27327 * value-range.h (class irange): Remove irange_set,
27328 irange_set_anti_range, irange_set_1bit_anti_range.
27329 (irange::set_undefined): Remove set to m_type.
27331 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27333 * range-op.cc (update_known_bitmask): Adjust for irange containing
27334 wide_ints internally.
27335 * tree-ssanames.cc (set_nonzero_bits): Same.
27336 * tree-ssanames.h (set_nonzero_bits): Same.
27337 * value-range-storage.cc (irange_storage::set_irange): Same.
27338 (irange_storage::get_irange): Same.
27339 * value-range.cc (irange::operator=): Same.
27340 (irange::irange_set): Same.
27341 (irange::irange_set_1bit_anti_range): Same.
27342 (irange::irange_set_anti_range): Same.
27343 (irange::set): Same.
27344 (irange::verify_range): Same.
27345 (irange::contains_p): Same.
27346 (irange::irange_single_pair_union): Same.
27347 (irange::union_): Same.
27348 (irange::irange_contains_p): Same.
27349 (irange::intersect): Same.
27350 (irange::invert): Same.
27351 (irange::set_range_from_nonzero_bits): Same.
27352 (irange::set_nonzero_bits): Same.
27353 (mask_to_wi): Same.
27354 (irange::intersect_nonzero_bits): Same.
27355 (irange::union_nonzero_bits): Same.
27358 (tree_range): Same.
27359 (range_tests_strict_enum): Same.
27360 (range_tests_misc): Same.
27361 (range_tests_nonzero_bits): Same.
27362 * value-range.h (irange::type): Same.
27363 (irange::varying_compatible_p): Same.
27364 (irange::irange): Same.
27365 (int_range::int_range): Same.
27366 (irange::set_undefined): Same.
27367 (irange::set_varying): Same.
27368 (irange::lower_bound): Same.
27369 (irange::upper_bound): Same.
27371 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27373 * gimple-range-fold.cc (tree_lower_bound): Delete.
27374 (tree_upper_bound): Delete.
27375 (vrp_val_max): Delete.
27376 (vrp_val_min): Delete.
27377 (fold_using_range::range_of_ssa_name_with_loop_info): Call
27378 range_of_var_in_loop.
27379 * vr-values.cc (valid_value_p): Delete.
27380 (fix_overflow): Delete.
27381 (get_scev_info): New.
27382 (bounds_of_var_in_loop): Refactor into...
27383 (induction_variable_may_overflow_p): ...this,
27384 (range_from_loop_direction): ...and this,
27385 (range_of_var_in_loop): ...and this.
27386 * vr-values.h (bounds_of_var_in_loop): Delete.
27387 (range_of_var_in_loop): New.
27389 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27391 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
27393 (vrp_val_max): New.
27394 (vrp_val_min): New.
27395 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
27396 * range-op.cc (max_limit): Same.
27398 (plus_minus_ranges): Same.
27399 (operator_rshift::op1_range): Same.
27400 (operator_cast::inside_domain_p): Same.
27401 * value-range.cc (vrp_val_is_max): Delete.
27402 (vrp_val_is_min): Delete.
27403 (range_tests_misc): Use irange_val_*.
27404 * value-range.h (vrp_val_is_min): Delete.
27405 (vrp_val_is_max): Delete.
27406 (vrp_val_max): Delete.
27407 (irange_val_min): New.
27408 (vrp_val_min): Delete.
27409 (irange_val_max): New.
27410 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
27412 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27414 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
27415 * gimple-fold.cc (size_must_be_zero_p): Same.
27416 * gimple-loop-versioning.cc
27417 (loop_versioning::prune_loop_conditions): Same.
27418 * gimple-range-edge.cc (gcond_edge_range): Same.
27419 (gimple_outgoing_range::calc_switch_ranges): Same.
27420 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
27421 (adjust_realpart_expr): Same.
27422 (fold_using_range::range_of_address): Same.
27423 (fold_using_range::relation_fold_and_or): Same.
27424 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
27425 (range_is_either_true_or_false): Same.
27426 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
27427 (cfn_clz::fold_range): Same.
27428 (cfn_ctz::fold_range): Same.
27429 * gimple-range-tests.cc (class test_expr_eval): Same.
27430 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
27431 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
27432 (propagate_vr_across_jump_function): Same.
27433 (decide_whether_version_node): Same.
27434 * ipa-prop.cc (ipa_get_value_range): Same.
27435 * ipa-prop.h (ipa_range_set_and_normalize): Same.
27436 * range-op.cc (get_shift_range): Same.
27437 (value_range_from_overflowed_bounds): Same.
27438 (value_range_with_overflow): Same.
27439 (create_possibly_reversed_range): Same.
27440 (equal_op1_op2_relation): Same.
27441 (not_equal_op1_op2_relation): Same.
27442 (lt_op1_op2_relation): Same.
27443 (le_op1_op2_relation): Same.
27444 (gt_op1_op2_relation): Same.
27445 (ge_op1_op2_relation): Same.
27446 (operator_mult::op1_range): Same.
27447 (operator_exact_divide::op1_range): Same.
27448 (operator_lshift::op1_range): Same.
27449 (operator_rshift::op1_range): Same.
27450 (operator_cast::op1_range): Same.
27451 (operator_logical_and::fold_range): Same.
27452 (set_nonzero_range_from_mask): Same.
27453 (operator_bitwise_or::op1_range): Same.
27454 (operator_bitwise_xor::op1_range): Same.
27455 (operator_addr_expr::fold_range): Same.
27456 (pointer_plus_operator::wi_fold): Same.
27457 (pointer_or_operator::op1_range): Same.
27464 (range_op_cast_tests): Same.
27465 (range_op_lshift_tests): Same.
27466 (range_op_rshift_tests): Same.
27467 (range_op_bitwise_and_tests): Same.
27468 (range_relational_tests): Same.
27469 * range.cc (range_zero): Same.
27470 (range_nonzero): Same.
27471 * range.h (range_true): Same.
27472 (range_false): Same.
27473 (range_true_and_false): Same.
27474 * tree-data-ref.cc (split_constant_offset_1): Same.
27475 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
27476 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
27477 (find_unswitching_predicates_for_bb): Same.
27478 * tree-ssa-phiopt.cc (value_replacement): Same.
27479 * tree-ssa-threadbackward.cc
27480 (back_threader::find_taken_edge_cond): Same.
27481 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
27482 * tree-vrp.cc (find_case_label_range): Same.
27483 * value-query.cc (range_query::get_tree_range): Same.
27484 * value-range.cc (irange::set_nonnegative): Same.
27485 (frange::contains_p): Same.
27486 (frange::singleton_p): Same.
27487 (frange::internal_singleton_p): Same.
27488 (irange::irange_set): Same.
27489 (irange::irange_set_1bit_anti_range): Same.
27490 (irange::irange_set_anti_range): Same.
27491 (irange::set): Same.
27492 (irange::operator==): Same.
27493 (irange::singleton_p): Same.
27494 (irange::contains_p): Same.
27495 (irange::set_range_from_nonzero_bits): Same.
27496 (DEFINE_INT_RANGE_INSTANCE): Same.
27506 (range_uint128): New.
27507 (range_uchar): New.
27509 (build_range3): Convert to irange wide_int API.
27510 (range_tests_irange3): Same.
27511 (range_tests_int_range_max): Same.
27512 (range_tests_strict_enum): Same.
27513 (range_tests_misc): Same.
27514 (range_tests_nonzero_bits): Same.
27515 (range_tests_nan): Same.
27516 (range_tests_signed_zeros): Same.
27517 * value-range.h (Value_Range::Value_Range): Same.
27518 (irange::set): Same.
27519 (irange::nonzero_p): Same.
27520 (irange::contains_p): Same.
27521 (range_includes_zero_p): Same.
27522 (irange::set_nonzero): Same.
27523 (irange::set_zero): Same.
27524 (contains_zero_p): Same.
27525 (frange::contains_p): Same.
27527 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
27528 (bounds_of_var_in_loop): Same.
27529 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
27531 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27533 * value-range.cc (irange::irange_union): Rename to...
27534 (irange::union_): ...this.
27535 (irange::irange_intersect): Rename to...
27536 (irange::intersect): ...this.
27537 * value-range.h (irange::union_): Delete.
27538 (irange::intersect): Delete.
27540 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27542 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
27544 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27546 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
27548 (compare_ranges): Delete.
27549 (compare_range_with_value): Delete.
27550 (bounds_of_var_in_loop): Tidy up by using ranger API.
27551 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
27552 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
27553 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
27554 strict_overflow_p and only_ranges.
27555 (simplify_using_ranges::legacy_fold_cond): Adjust call to
27556 legacy_fold_cond_overflow.
27557 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
27559 (range_fits_type_p): Rename value_range to irange.
27560 * vr-values.h (range_fits_type_p): Adjust prototype.
27562 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27564 * value-range.cc (irange::irange_set_anti_range): Remove uses of
27565 tree_lower_bound and tree_upper_bound.
27566 (irange::verify_range): Same.
27567 (irange::operator==): Same.
27568 (irange::singleton_p): Same.
27569 * value-range.h (irange::tree_lower_bound): Delete.
27570 (irange::tree_upper_bound): Delete.
27571 (irange::lower_bound): Delete.
27572 (irange::upper_bound): Delete.
27573 (irange::zero_p): Remove uses of tree_lower_bound and
27576 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27578 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
27580 (determine_value_range): Same.
27581 (record_nonwrapping_iv): Same.
27582 (infer_loop_bounds_from_signedness): Same.
27583 (scev_var_range_cant_overflow): Same.
27584 * tree-vrp.cc (operand_less_p): Delete.
27585 * tree-vrp.h (operand_less_p): Delete.
27586 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
27587 (irange::value_inside_range): Delete.
27588 * value-range.h (vrange::kind): Delete.
27589 (irange::num_pairs): Remove check of m_kind.
27590 (irange::min): Delete.
27591 (irange::max): Delete.
27593 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27595 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
27596 for vrange_storage.
27597 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
27598 (sbr_vector::grow): Same.
27599 (sbr_vector::set_bb_range): Same.
27600 (sbr_vector::get_bb_range): Same.
27601 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
27602 (sbr_sparse_bitmap::set_bb_range): Same.
27603 (sbr_sparse_bitmap::get_bb_range): Same.
27604 (block_range_cache::block_range_cache): Same.
27605 (ssa_global_cache::ssa_global_cache): Same.
27606 (ssa_global_cache::get_global_range): Same.
27607 (ssa_global_cache::set_global_range): Same.
27608 * gimple-range-cache.h: Same.
27609 * gimple-range-edge.cc
27610 (gimple_outgoing_range::gimple_outgoing_range): Same.
27611 (gimple_outgoing_range::switch_edge_range): Same.
27612 (gimple_outgoing_range::calc_switch_ranges): Same.
27613 * gimple-range-edge.h: Same.
27614 * gimple-range-infer.cc
27615 (infer_range_manager::infer_range_manager): Same.
27616 (infer_range_manager::get_nonzero): Same.
27617 (infer_range_manager::maybe_adjust_range): Same.
27618 (infer_range_manager::add_range): Same.
27619 * gimple-range-infer.h: Rename obstack_vrange_allocator to
27621 * tree-core.h (struct irange_storage_slot): Remove.
27622 (struct tree_ssa_name): Remove irange_info and frange_info. Make
27623 range_info a pointer to vrange_storage.
27624 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
27625 (range_info_alloc): Same.
27626 (range_info_free): Same.
27627 (range_info_get_range): Same.
27628 (range_info_set_range): Same.
27629 (get_nonzero_bits): Same.
27630 * value-query.cc (get_ssa_name_range_info): Same.
27631 * value-range-storage.cc (class vrange_internal_alloc): New.
27632 (class vrange_obstack_alloc): New.
27633 (class vrange_ggc_alloc): New.
27634 (vrange_allocator::vrange_allocator): New.
27635 (vrange_allocator::~vrange_allocator): New.
27636 (vrange_storage::alloc_slot): New.
27637 (vrange_allocator::alloc): New.
27638 (vrange_allocator::free): New.
27639 (vrange_allocator::clone): New.
27640 (vrange_allocator::clone_varying): New.
27641 (vrange_allocator::clone_undefined): New.
27642 (vrange_storage::alloc): New.
27643 (vrange_storage::set_vrange): Remove slot argument.
27644 (vrange_storage::get_vrange): Same.
27645 (vrange_storage::fits_p): Same.
27646 (vrange_storage::equal_p): New.
27647 (irange_storage::write_lengths_address): New.
27648 (irange_storage::lengths_address): New.
27649 (irange_storage_slot::alloc_slot): Remove.
27650 (irange_storage::alloc): New.
27651 (irange_storage_slot::irange_storage_slot): Remove.
27652 (irange_storage::irange_storage): New.
27653 (write_wide_int): New.
27654 (irange_storage_slot::set_irange): Remove.
27655 (irange_storage::set_irange): New.
27656 (read_wide_int): New.
27657 (irange_storage_slot::get_irange): Remove.
27658 (irange_storage::get_irange): New.
27659 (irange_storage_slot::size): Remove.
27660 (irange_storage::equal_p): New.
27661 (irange_storage_slot::num_wide_ints_needed): Remove.
27662 (irange_storage::size): New.
27663 (irange_storage_slot::fits_p): Remove.
27664 (irange_storage::fits_p): New.
27665 (irange_storage_slot::dump): Remove.
27666 (irange_storage::dump): New.
27667 (frange_storage_slot::alloc_slot): Remove.
27668 (frange_storage::alloc): New.
27669 (frange_storage_slot::set_frange): Remove.
27670 (frange_storage::set_frange): New.
27671 (frange_storage_slot::get_frange): Remove.
27672 (frange_storage::get_frange): New.
27673 (frange_storage_slot::fits_p): Remove.
27674 (frange_storage::equal_p): New.
27675 (frange_storage::fits_p): New.
27676 (ggc_vrange_allocator): New.
27677 (ggc_alloc_vrange_storage): New.
27678 * value-range-storage.h (class vrange_storage): Rewrite.
27679 (class irange_storage): Rewrite.
27680 (class frange_storage): Rewrite.
27681 (class obstack_vrange_allocator): Remove.
27682 (class ggc_vrange_allocator): Remove.
27683 (vrange_allocator::alloc_vrange): Remove.
27684 (vrange_allocator::alloc_irange): Remove.
27685 (vrange_allocator::alloc_frange): Remove.
27686 (ggc_alloc_vrange_storage): New.
27687 * value-range.h (class irange): Rename vrange_allocator to
27689 (class frange): Same.
27691 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
27693 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
27694 inc to avoid clobbering the carry flag.
27696 2023-04-30 Andrew Pinski <apinski@marvell.com>
27698 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
27699 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
27701 2023-04-30 Andrew Pinski <apinski@marvell.com>
27703 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
27704 Allow some builtin/internal function calls which
27705 are known not to trap/throw.
27706 (phiopt_worker::match_simplify_replacement):
27707 Use name instead of getting the lhs again.
27709 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
27711 * configure: Regenerate.
27712 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
27714 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
27716 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
27717 emit_insn_if_valid_for_reload.
27718 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
27719 to be recognized, also try emitting a parallel that clobbers
27720 TARGET_FLAGS_REGNUM, as applicable.
27722 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
27724 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
27726 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
27727 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
27729 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
27731 * config/stormy16/stormy16.md (any_lshift): New code iterator.
27732 (any_or_plus): Likewise.
27733 (any_rotate): Likewise.
27734 (*<any_lshift>_and_internal): New define_insn_and_split to
27735 recognize a logical shift followed by an AND, and split it
27736 again after reload.
27737 (*swpn): New define_insn matching xstormy16's swpn.
27738 (*swpn_zext): New define_insn recognizing swpn followed by
27739 zero_extendqihi2, i.e. with the high byte set to zero.
27740 (*swpn_sext): Likewise, for swpn followed by cbw.
27741 (*swpn_sext_2): Likewise, for an alternate RTL form.
27742 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
27743 sequence is split in the correct place to recognize the *swpn_zext
27744 followed by any_or_plus (ior, xor or plus) instruction.
27746 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
27749 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
27750 (lm32-*-uclinux*): Likewise.
27752 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
27754 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
27755 for riscv_use_save_libcall.
27756 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
27757 (riscv_compute_frame_info): restructure to decouple stack allocation
27758 for rv32e w/o save-restore.
27760 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
27762 * doc/install.texi: Fix documentation typo
27764 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
27766 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
27767 (u): Add div/udiv cases.
27768 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
27769 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
27771 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
27772 (thead_c906_tune_info): Likewise.
27773 (optimize_size_tune_info): Likewise.
27774 (riscv_use_divmod_expander): New function.
27775 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
27777 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
27779 * config/riscv/bitmanip.md: Added clmulr instruction.
27780 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
27781 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
27783 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
27784 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
27785 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
27786 functions to riscv-cmo.def.
27787 * config/riscv/generic.md: Add clmul to list of instructions
27788 using the generic_imul reservation.
27790 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27792 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
27794 2023-04-28 Andrew Pinski <apinski@marvell.com>
27796 PR tree-optimization/100958
27797 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
27798 (pass_phiopt::execute): Don't call two_value_replacement.
27799 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
27800 handle what two_value_replacement did.
27802 2023-04-28 Andrew Pinski <apinski@marvell.com>
27804 * match.pd: Add patterns for
27805 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
27807 2023-04-28 Andrew Pinski <apinski@marvell.com>
27809 * match.pd: Factor out the deciding the min/max from
27810 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
27812 * fold-const.cc (minmax_from_comparison): this new function.
27813 * fold-const.h (minmax_from_comparison): New prototype.
27815 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
27817 PR rtl-optimization/109476
27818 * lower-subreg.cc: Include explow.h for force_reg.
27819 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
27820 If decomposing a suitable LSHIFTRT and we're not splitting
27821 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
27822 instead of setting a high part SUBREG to zero, which helps combine.
27823 (decompose_multiword_subregs): Update call to resolve_shift_zext.
27825 2023-04-28 Richard Biener <rguenther@suse.de>
27827 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
27829 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
27830 gather-scatter info and cost emulated scatters accordingly.
27831 (get_load_store_type): Support emulated scatters.
27832 (vectorizable_store): Likewise. Emulate them by extracting
27833 scalar offsets and data, doing scalar stores.
27835 2023-04-28 Richard Biener <rguenther@suse.de>
27837 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
27838 Tame down element extracts and scalar loads for gather/scatter
27839 similar to elementwise strided accesses.
27841 2023-04-28 Pan Li <pan2.li@intel.com>
27842 kito-cheng <kito.cheng@sifive.com>
27844 * config/riscv/vector.md: Add new define split to perform
27845 the simplification.
27847 2023-04-28 Richard Biener <rguenther@suse.de>
27850 * ipa-param-manipulation.cc
27851 (ipa_param_body_adjustments::modify_expression): Allow
27852 conversion of a register to a non-register type. Elide
27853 conversions inside BIT_FIELD_REFs.
27855 2023-04-28 Richard Biener <rguenther@suse.de>
27857 PR tree-optimization/109644
27858 * tree-cfg.cc (verify_types_in_gimple_reference): Check
27859 register constraints on the outermost VIEW_CONVERT_EXPR
27860 only. Do not allow register or invariant bases on
27861 multi-level or possibly variable index handled components.
27863 2023-04-28 Richard Biener <rguenther@suse.de>
27865 * gimplify.cc (gimplify_compound_lval): When there's a
27866 non-register type produced by one of the handled component
27867 operations make sure we get a non-register base.
27869 2023-04-28 Richard Biener <rguenther@suse.de>
27871 PR tree-optimization/108752
27872 * tree-vect-generic.cc (build_replicated_const): Rename
27873 to build_replicated_int_cst and move to tree.{h,cc}.
27874 (do_plus_minus): Adjust.
27875 (do_negate): Likewise.
27876 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
27877 arithmetic vector operations in lowered form.
27878 * tree.h (build_replicated_int_cst): Declare.
27879 * tree.cc (build_replicated_int_cst): Moved from
27880 tree-vect-generic.cc build_replicated_const.
27882 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27885 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
27886 (aarch64_rbit<mode><vczle><vczbe>): ... This.
27887 (neg<mode>2): Rename to...
27888 (neg<mode>2<vczle><vczbe>): ... This.
27889 (abs<mode>2): Rename to...
27890 (abs<mode>2<vczle><vczbe>): ... This.
27891 (aarch64_abs<mode>): Rename to...
27892 (aarch64_abs<mode><vczle><vczbe>): ... This.
27893 (one_cmpl<mode>2): Rename to...
27894 (one_cmpl<mode>2<vczle><vczbe>): ... This.
27895 (clrsb<mode>2): Rename to...
27896 (clrsb<mode>2<vczle><vczbe>): ... This.
27897 (clz<mode>2): Rename to...
27898 (clz<mode>2<vczle><vczbe>): ... This.
27899 (popcount<mode>2): Rename to...
27900 (popcount<mode>2<vczle><vczbe>): ... This.
27902 2023-04-28 Jakub Jelinek <jakub@redhat.com>
27904 * gimple-range-op.cc (class cfn_sqrt): New type.
27905 (op_cfn_sqrt): New variable.
27906 (gimple_range_op_handler::maybe_builtin_call): Handle
27907 CASE_CFN_SQRT{,_FN}.
27909 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
27910 Jakub Jelinek <jakub@redhat.com>
27912 * value-range.h (frange_nextafter): Declare.
27913 * gimple-range-op.cc (class cfn_sincos): New.
27914 (op_cfn_sin, op_cfn_cos): New variables.
27915 (gimple_range_op_handler::maybe_builtin_call): Handle
27916 CASE_CFN_{SIN,COS}{,_FN}.
27918 2023-04-28 Jakub Jelinek <jakub@redhat.com>
27920 * target.def (libm_function_max_error): New target hook.
27921 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
27922 * doc/tm.texi: Regenerated.
27923 * targhooks.h (default_libm_function_max_error,
27924 glibc_linux_libm_function_max_error): Declare.
27925 * targhooks.cc: Include case-cfn-macros.h.
27926 (default_libm_function_max_error,
27927 glibc_linux_libm_function_max_error): New functions.
27928 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27929 * config/linux-protos.h (linux_libm_function_max_error): Declare.
27930 * config/linux.cc: Include target.h and targhooks.h.
27931 (linux_libm_function_max_error): New function.
27932 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
27933 (arc_libm_function_max_error): New function.
27934 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27935 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
27936 (ix86_libm_function_max_error): New function.
27937 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27938 * config/rs6000/rs6000-protos.h
27939 (rs6000_linux_libm_function_max_error): Declare.
27940 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
27941 and case-cfn-macros.h.
27942 (rs6000_linux_libm_function_max_error): New function.
27943 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27944 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27945 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
27946 (or1k_libm_function_max_error): New function.
27947 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27949 2023-04-28 Alexandre Oliva <oliva@adacore.com>
27951 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
27952 Move detach value calls...
27953 (pass_harden_conditional_branches::execute): ... here.
27954 (pass_harden_compares::execute): Detach values before
27957 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
27959 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
27960 (cml<addsub_as><mode>4): Likewise.
27961 (vec_addsub<mode>3): Likewise.
27962 (cadd<rot><mode>3): Likewise.
27963 (vec_fmaddsub<mode>4): Likewise.
27964 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
27966 2023-04-27 Andrew Pinski <apinski@marvell.com>
27968 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
27969 up to 2 min/max expressions in the sequence/match code.
27971 2023-04-27 Andrew Pinski <apinski@marvell.com>
27973 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
27975 * tree-eh.cc (operation_could_trap_helper_p): Treate
27976 MIN_EXPR/MAX_EXPR similar as other comparisons.
27978 2023-04-27 Andrew Pinski <apinski@marvell.com>
27980 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
27982 (cond_if_else_store_replacement): Likewise.
27983 (get_non_trapping): Likewise.
27984 (store_elim_worker): Move into ...
27985 (pass_cselim::execute): This.
27987 2023-04-27 Andrew Pinski <apinski@marvell.com>
27989 * tree-ssa-phiopt.cc (two_value_replacement): Remove
27991 (match_simplify_replacement): Likewise.
27992 (factor_out_conditional_conversion): Likewise.
27993 (value_replacement): Likewise.
27994 (minmax_replacement): Likewise.
27995 (spaceship_replacement): Likewise.
27996 (cond_removal_in_builtin_zero_pattern): Likewise.
27997 (hoist_adjacent_loads): Likewise.
27998 (tree_ssa_phiopt_worker): Move into ...
27999 (pass_phiopt::execute): this.
28001 2023-04-27 Andrew Pinski <apinski@marvell.com>
28003 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
28004 do_store_elim argument and split that part out to ...
28005 (store_elim_worker): This new function.
28006 (pass_cselim::execute): Call store_elim_worker.
28007 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
28009 2023-04-27 Jan Hubicka <jh@suse.cz>
28011 * cfgloopmanip.h (unloop_loops): Export.
28012 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
28013 that no longer loop.
28014 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
28015 vectors of loops to unloop.
28016 (canonicalize_induction_variables): Free vectors here.
28017 (tree_unroll_loops_completely): Free vectors here.
28019 2023-04-27 Richard Biener <rguenther@suse.de>
28021 PR tree-optimization/109170
28022 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
28023 Handle __builtin_expect and similar via cfn_pass_through_arg1
28024 and inspecting the calls fnspec.
28025 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
28026 and BUILT_IN_EXPECT_WITH_PROBABILITY.
28028 2023-04-27 Alexandre Oliva <oliva@adacore.com>
28030 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
28032 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
28034 PR tree-optimization/109639
28035 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
28036 (propagate_vr_across_jump_function): Same.
28037 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
28038 * ipa-prop.h (ipa_range_set_and_normalize): New.
28039 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
28041 2023-04-27 Richard Biener <rguenther@suse.de>
28043 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
28044 create a CTOR operand in the result when simplifying GIMPLE.
28046 2023-04-27 Richard Biener <rguenther@suse.de>
28048 * gimplify.cc (gimplify_compound_lval): When the base
28049 gimplified to a register make sure to split up chains
28052 2023-04-27 Richard Biener <rguenther@suse.de>
28055 * ipa-param-manipulation.h
28056 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
28058 * ipa-param-manipulation.cc
28059 (ipa_param_body_adjustments::modify_expression): Likewise.
28060 When we need a conversion and the replacement is a register
28061 split the conversion out.
28062 (ipa_param_body_adjustments::modify_assignment): Pass
28063 extra_stmts to RHS modify_expression.
28065 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
28067 * doc/extend.texi (Zero Length): Describe example.
28069 2023-04-27 Richard Biener <rguenther@suse.de>
28071 PR tree-optimization/109594
28072 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
28073 what we rewrite to a register based on the above.
28075 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
28077 * config/riscv/riscv.cc: Fix whitespace.
28078 * config/riscv/sync.md: Fix whitespace.
28080 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28082 PR tree-optimization/108697
28083 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
28084 not clear the vector on an out of range query.
28085 (ssa_cache::dump): Use dump_range_query instead of get_range.
28086 (ssa_cache::dump_range_query): New.
28087 (ssa_lazy_cache::dump_range_query): New.
28088 (ssa_lazy_cache::set_range): New.
28089 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
28090 (class ssa_lazy_cache): New.
28091 (ssa_lazy_cache::ssa_lazy_cache): New.
28092 (ssa_lazy_cache::~ssa_lazy_cache): New.
28093 (ssa_lazy_cache::get_range): New.
28094 (ssa_lazy_cache::clear_range): New.
28095 (ssa_lazy_cache::clear): New.
28096 (ssa_lazy_cache::dump): New.
28097 * gimple-range-path.cc (path_range_query::path_range_query): Do
28098 not allocate a ssa_cache object nor has_cache bitmap.
28099 (path_range_query::~path_range_query): Do not free objects.
28100 (path_range_query::clear_cache): Remove.
28101 (path_range_query::get_cache): Adjust.
28102 (path_range_query::set_cache): Remove.
28103 (path_range_query::dump): Don't call through a pointer.
28104 (path_range_query::internal_range_of_expr): Set cache directly.
28105 (path_range_query::reset_path): Clear cache directly.
28106 (path_range_query::ssa_range_in_phi): Fold with globals only.
28107 (path_range_query::compute_ranges_in_phis): Simply set range.
28108 (path_range_query::compute_ranges_in_block): Call cache directly.
28109 * gimple-range-path.h (class path_range_query): Replace bitmap
28110 and cache pointer with lazy cache object.
28111 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
28113 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28115 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
28116 (ssa_cache::~ssa_cache): Rename.
28117 (ssa_cache::has_range): New.
28118 (ssa_cache::get_range): Rename.
28119 (ssa_cache::set_range): Rename.
28120 (ssa_cache::clear_range): Rename.
28121 (ssa_cache::clear): Rename.
28122 (ssa_cache::dump): Rename and use get_range.
28123 (ranger_cache::get_global_range): Use get_range and set_range.
28124 (ranger_cache::range_of_def): Use get_range.
28125 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
28126 (class ranger_cache): Use ssa_cache.
28127 * gimple-range-path.cc (path_range_query::path_range_query): Use
28129 (path_range_query::get_cache): Use get_range.
28130 (path_range_query::set_cache): Use set_range.
28131 * gimple-range-path.h (class path_range_query): Use ssa_cache.
28132 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
28133 (assume_query::range_of_expr): Use get_range.
28134 (assume_query::assume_query): Use set_range.
28135 (assume_query::calculate_op): Use get_range and set_range.
28136 * gimple-range.h (class assume_query): Use ssa_cache.
28138 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28140 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
28141 and local to optionally zero memory.
28142 (br_vector::grow): Only zero memory if flag is set.
28143 (class sbr_lazy_vector): New.
28144 (sbr_lazy_vector::sbr_lazy_vector): New.
28145 (sbr_lazy_vector::set_bb_range): New.
28146 (sbr_lazy_vector::get_bb_range): New.
28147 (sbr_lazy_vector::bb_range_p): New.
28148 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
28149 * gimple-range-gori.cc (gori_map::calculate_gori): Use
28150 param_vrp_switch_limit.
28151 (gori_compute::gori_compute): Use param_vrp_switch_limit.
28152 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
28153 (vrp_switch_limit): Rename from evrp_switch_limit.
28154 (vrp_vector_threshold): New.
28156 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28158 * value-relation.cc (dom_oracle::query_relation): Check early for lack
28160 * value-relation.h (equiv_oracle::has_equiv_p): New.
28162 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28164 PR tree-optimization/109417
28165 * gimple-range-gori.cc (range_def_chain::register_dependency):
28166 Save the ssa version number, not the pointer.
28167 (gori_compute::may_recompute_p): No need to check if a dependency
28168 is in the free list.
28169 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
28170 fields to be unsigned int instead of trees.
28171 (ange_def_chain::depend1): Adjust.
28172 (ange_def_chain::depend2): Adjust.
28173 * gimple-range.h: Include "ssa.h" to inline ssa_name().
28175 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
28177 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
28178 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
28179 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
28181 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
28184 * config/riscv/riscv-protos.h: Add helper function stubs.
28185 * config/riscv/riscv.cc: Add helper functions for subword masking.
28186 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
28187 -mno-inline-atomics.
28188 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
28189 fetch_and_nand, CAS, and exchange ops.
28190 * doc/invoke.texi: Add blurb regarding new command-line flags
28191 -minline-atomics and -mno-inline-atomics.
28193 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28195 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
28196 Reimplement using standard RTL codes instead of unspec.
28197 (aarch64_rshrn2<mode>_insn_be): Likewise.
28198 (aarch64_rshrn2<mode>): Adjust for the above.
28199 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
28201 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28203 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
28204 with standard RTL codes instead of an UNSPEC.
28205 (aarch64_rshrn<mode>_insn_be): Likewise.
28206 (aarch64_rshrn<mode>): Adjust for the above.
28207 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
28209 2023-04-26 Pan Li <pan2.li@intel.com>
28210 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28212 * config/riscv/riscv.cc (riscv_classify_address): Allow
28213 const0_rtx for the RVV load/store.
28215 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28217 * range-op.cc (range_op_cast_tests): Remove legacy support.
28218 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
28219 * value-range.cc (irange::operator=): Same.
28220 (get_legacy_range): Same.
28221 (irange::copy_legacy_to_multi_range): Delete.
28222 (irange::copy_to_legacy): Delete.
28223 (irange::irange_set_anti_range): Delete.
28224 (irange::set): Remove legacy support.
28225 (irange::verify_range): Same.
28226 (irange::legacy_lower_bound): Delete.
28227 (irange::legacy_upper_bound): Delete.
28228 (irange::legacy_equal_p): Delete.
28229 (irange::operator==): Remove legacy support.
28230 (irange::singleton_p): Same.
28231 (irange::value_inside_range): Same.
28232 (irange::contains_p): Same.
28233 (intersect_ranges): Delete.
28234 (irange::legacy_intersect): Delete.
28235 (union_ranges): Delete.
28236 (irange::legacy_union): Delete.
28237 (irange::legacy_verbose_union_): Delete.
28238 (irange::legacy_verbose_intersect): Delete.
28239 (irange::irange_union): Remove legacy support.
28240 (irange::irange_intersect): Same.
28241 (irange::intersect): Same.
28242 (irange::invert): Same.
28243 (ranges_from_anti_range): Delete.
28244 (gt_pch_nx): Adjust for legacy removal.
28246 (range_tests_legacy): Delete.
28247 (range_tests_misc): Adjust for legacy removal.
28248 (range_tests): Same.
28249 * value-range.h (class irange): Same.
28250 (irange::legacy_mode_p): Delete.
28251 (ranges_from_anti_range): Delete.
28252 (irange::nonzero_p): Adjust for legacy removal.
28253 (irange::lower_bound): Same.
28254 (irange::upper_bound): Same.
28255 (irange::union_): Same.
28256 (irange::intersect): Same.
28257 (irange::set_nonzero): Same.
28258 (irange::set_zero): Same.
28259 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28261 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28263 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
28264 of range_has_numeric_bounds_p with irange API.
28265 (range_has_numeric_bounds_p): Delete.
28266 * value-range.h (range_has_numeric_bounds_p): Delete.
28268 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28270 * tree-data-ref.cc (compute_distributive_range): Replace uses of
28271 range_int_cst_p with irange API.
28272 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
28273 * tree-vrp.h (range_int_cst_p): Delete.
28274 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
28275 range_int_cst_p with irange API.
28276 (vr_set_zero_nonzero_bits): Same.
28277 (range_fits_type_p): Same.
28278 (simplify_using_ranges::simplify_casted_cond): Same.
28279 * tree-vrp.cc (range_int_cst_p): Remove.
28281 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28283 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
28285 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28287 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
28288 API uses to new API.
28289 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
28290 * internal-fn.cc (get_min_precision): Same.
28292 * tree-affine.cc (expr_to_aff_combination): Same.
28293 * tree-data-ref.cc (dr_step_indicator): Same.
28294 * tree-dfa.cc (get_ref_base_and_extent): Same.
28295 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
28296 * tree-ssa-phiopt.cc (two_value_replacement): Same.
28297 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
28298 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
28299 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
28300 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
28301 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
28302 * tree.cc (get_range_pos_neg): Same.
28304 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28306 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
28307 vrange::dump instead of ad-hoc dumper.
28308 * tree-ssa-strlen.cc (dump_strlen_info): Same.
28309 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
28312 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28314 * range-op.cc (operator_cast::op1_range): Use
28315 create_possibly_reversed_range.
28316 (operator_bitwise_and::simple_op1_range_solver): Same.
28317 * value-range.cc (swap_out_of_order_endpoints): Delete.
28318 (irange::set): Remove call to swap_out_of_order_endpoints.
28320 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28322 * builtins.cc (determine_block_size): Convert use of legacy API to
28324 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
28325 (array_bounds_checker::check_array_ref): Same.
28326 * gimple-ssa-warn-restrict.cc
28327 (builtin_memref::extend_offset_range): Same.
28328 * ipa-cp.cc (ipcp_store_vr_results): Same.
28329 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
28330 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
28331 (ipa_write_jump_function): Same.
28332 * pointer-query.cc (get_size_range): Same.
28333 * tree-data-ref.cc (split_constant_offset): Same.
28334 * tree-ssa-strlen.cc (get_range): Same.
28335 (maybe_diag_stxncpy_trunc): Same.
28336 (strlen_pass::get_len_or_size): Same.
28337 (strlen_pass::count_nonzero_bytes_addr): Same.
28338 * tree-vect-patterns.cc (vect_get_range_info): Same.
28339 * value-range.cc (irange::maybe_anti_range): Remove.
28340 (get_legacy_range): New.
28341 (irange::copy_to_legacy): Use get_legacy_range.
28342 (ranges_from_anti_range): Same.
28343 * value-range.h (class irange): Remove maybe_anti_range.
28344 (get_legacy_range): New.
28345 * vr-values.cc (check_for_binary_op_overflow): Convert use of
28346 legacy API to get_legacy_range.
28347 (compare_ranges): Same.
28348 (compare_range_with_value): Same.
28349 (bounds_of_var_in_loop): Same.
28350 (find_case_label_ranges): Same.
28351 (simplify_using_ranges::simplify_switch_using_ranges): Same.
28353 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28355 * value-range-pretty-print.cc (vrange_printer::visit): Remove
28357 * value-range.cc (irange::constant_p): Remove.
28358 (irange::get_nonzero_bits_from_range): Remove constant_p use.
28359 * value-range.h (class irange): Remove constant_p.
28360 (irange::num_pairs): Remove constant_p use.
28362 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28364 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
28366 (irange::set): Same.
28367 (irange::legacy_lower_bound): Same.
28368 (irange::legacy_upper_bound): Same.
28369 (irange::contains_p): Same.
28370 (range_tests_legacy): Same.
28371 (irange::normalize_addresses): Remove.
28372 (irange::normalize_symbolics): Remove.
28373 (irange::symbolic_p): Remove.
28374 * value-range.h (class irange): Remove symbolic_p,
28375 normalize_symbolics, and normalize_addresses.
28376 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
28377 Remove symbolics support.
28379 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28381 * value-range.cc (irange::may_contain_p): Remove.
28382 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
28383 usage with contains_p.
28384 * vr-values.cc (compare_range_with_value): Same.
28386 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28388 * tree-vrp.cc (supported_types_p): Remove.
28389 (defined_ranges_p): Remove.
28390 (range_fold_binary_expr): Remove.
28391 (range_fold_unary_expr): Remove.
28392 * tree-vrp.h (range_fold_unary_expr): Remove.
28393 (range_fold_binary_expr): Remove.
28395 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28397 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
28398 (ipa_value_range_from_jfunc): Same.
28399 (propagate_vr_across_jump_function): Same.
28400 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
28401 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
28402 * vr-values.cc (bounds_of_var_in_loop): Same.
28404 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28406 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
28407 Add irange argument.
28408 (check_out_of_bounds_and_warn): Remove check for vr.
28409 (array_bounds_checker::check_array_ref): Remove pointer qualifier
28410 for vr and adjust accordingly.
28411 * gimple-array-bounds.h (get_value_range): Add irange argument.
28412 * value-query.cc (class equiv_allocator): Delete.
28413 (range_query::get_value_range): Delete.
28414 (range_query::range_query): Remove allocator access.
28415 (range_query::~range_query): Same.
28416 * value-query.h (get_value_range): Delete.
28418 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
28419 call to get_value_range.
28420 (check_for_binary_op_overflow): Same.
28421 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28422 (simplify_using_ranges::simplify_abs_using_ranges): Same.
28423 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
28424 (simplify_using_ranges::simplify_casted_cond): Same.
28425 (simplify_using_ranges::simplify_switch_using_ranges): Same.
28426 (simplify_using_ranges::two_valued_val_range_p): Same.
28428 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28431 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
28433 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
28434 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
28435 (simplify_using_ranges::legacy_fold_cond): ...this.
28436 (simplify_using_ranges::fold_cond): Rename
28437 vrp_evaluate_conditional_warnv_with_ops to
28438 legacy_fold_cond_overflow.
28439 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
28440 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
28441 legacy_fold_cond_overflow respectively.
28443 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28445 * vr-values.cc (get_vr_for_comparison): Remove.
28446 (compare_name_with_value): Same.
28447 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
28448 compare_name_with_value.
28449 * vr-values.h: Remove compare_name_with_value.
28450 Remove get_vr_for_comparison.
28452 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
28454 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
28455 (bswapsi2): New define_insn.
28456 (swaphi): New define_insn to exchange two registers (swpw).
28457 (define_peephole2): Recognize exchange of registers as swaphi.
28459 2023-04-26 Richard Biener <rguenther@suse.de>
28461 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
28463 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
28464 * predict.cc (apply_return_prediction): Likewise.
28465 * sese.cc (set_ifsese_condition): Likewise. Simplify.
28466 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
28467 (make_edges_bb): Likewise.
28468 (make_cond_expr_edges): Likewise.
28469 (end_recording_case_labels): Likewise.
28470 (make_gimple_asm_edges): Likewise.
28471 (cleanup_dead_labels): Likewise.
28472 (group_case_labels): Likewise.
28473 (gimple_can_merge_blocks_p): Likewise.
28474 (gimple_merge_blocks): Likewise.
28475 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
28476 (gimple_duplicate_sese_tail): Avoid last_stmt.
28477 (find_loop_dist_alias): Likewise.
28478 (gimple_block_ends_with_condjump_p): Likewise.
28479 (gimple_purge_dead_eh_edges): Likewise.
28480 (gimple_purge_dead_abnormal_call_edges): Likewise.
28481 (pass_warn_function_return::execute): Likewise.
28482 (execute_fixup_cfg): Likewise.
28483 * tree-eh.cc (redirect_eh_edge_1): Likewise.
28484 (pass_lower_resx::execute): Likewise.
28485 (pass_lower_eh_dispatch::execute): Likewise.
28486 (cleanup_empty_eh): Likewise.
28487 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
28488 (predicate_bbs): Likewise.
28489 (ifcvt_split_critical_edges): Likewise.
28490 * tree-loop-distribution.cc (create_edge_for_control_dependence):
28492 (loop_distribution::transform_reduction_loop): Likewise.
28493 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
28494 (try_transform_to_exit_first_loop_alt): Likewise.
28495 (transform_to_exit_first_loop): Likewise.
28496 (create_parallel_loop): Likewise.
28497 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
28498 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
28499 (eliminate_unnecessary_stmts): Likewise.
28501 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
28503 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
28504 (pass_tree_ifcombine::execute): Likewise.
28505 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
28506 (should_duplicate_loop_header_p): Likewise.
28507 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
28508 (tree_estimate_loop_size): Likewise.
28509 (try_unroll_loop_completely): Likewise.
28510 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
28511 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
28512 (canonicalize_loop_ivs): Likewise.
28513 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
28514 (bound_difference): Likewise.
28515 (number_of_iterations_popcount): Likewise.
28516 (number_of_iterations_cltz): Likewise.
28517 (number_of_iterations_cltz_complement): Likewise.
28518 (simplify_using_initial_conditions): Likewise.
28519 (number_of_iterations_exit_assumptions): Likewise.
28520 (loop_niter_by_eval): Likewise.
28521 (estimate_numbers_of_iterations): Likewise.
28523 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28525 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
28527 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
28530 * config/rs6000/rs6000-builtins.def
28531 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
28532 __builtin_vsx_scalar_cmp_exp_qp_lt,
28533 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
28536 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
28539 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
28540 easy_vector_constant with const_vector_each_byte_same, add
28541 handlings in preparation for !easy_vector_constant, and update
28542 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
28543 * config/rs6000/predicates.md (const_vector_each_byte_same): New
28546 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28548 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
28549 (*pred_ltge<mode>_merge_tie_mask): Ditto.
28550 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
28551 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
28552 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
28553 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
28554 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
28556 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28558 * config/riscv/vector.md: Fix redundant vmv1r.v.
28560 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28562 * config/riscv/vector.md: Fix RA constraint.
28564 2023-04-26 Pan Li <pan2.li@intel.com>
28567 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
28568 check for vn_reference equal.
28570 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28572 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
28573 auto-vectorization preference.
28574 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
28575 auto-vectorization.
28576 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
28578 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
28580 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
28581 and bclridisi_nottwobits patterns.
28582 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
28583 predicate to avoid splitting arith constants.
28584 (const_nottwobits_not_arith_operand): New predicate.
28586 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
28588 * recog.cc (peep2_attempt, peep2_update_life): Correct
28589 head-comment description of parameter match_len.
28591 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
28593 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
28594 riscv_split_symbol() drop in_splitter arg.
28595 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
28596 riscv_split_symbol() drop in_splitter arg.
28597 riscv_force_temporary() drop in_splitter arg.
28598 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
28599 riscv_split_symbol() drop in_splitter arg.
28601 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
28603 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
28604 superfluous debug temporaries for single GIMPLE assignments.
28606 2023-04-25 Richard Biener <rguenther@suse.de>
28608 PR tree-optimization/109609
28609 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
28611 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
28612 the size given by arg_max_access_size_given_by_arg_p as
28613 maximum, not exact, size.
28615 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28618 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
28619 (orn<mode>3<vczle><vczbe>): ... This.
28620 (bic<mode>3): Rename to...
28621 (bic<mode>3<vczle><vczbe>): ... This.
28622 (<su><maxmin><mode>3): Rename to...
28623 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
28625 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28627 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
28628 * config/aarch64/iterators.md (VQDIV): New mode iterator.
28629 (vnx2di): New mode attribute.
28631 2023-04-25 Richard Biener <rguenther@suse.de>
28633 PR rtl-optimization/109585
28634 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
28636 2023-04-25 Jakub Jelinek <jakub@redhat.com>
28639 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
28640 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
28641 is larger than signed int maximum.
28643 2023-04-25 Martin Liska <mliska@suse.cz>
28645 * doc/gcov.texi: Document the new "calls" field and document
28646 the API bump. Mention also "block_ids" for lines.
28647 * gcov.cc (output_intermediate_json_line): Output info about
28648 calls and extend branches as well.
28649 (generate_results): Bump version to 2.
28650 (output_line_details): Use block ID instead of a non-sensual
28653 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
28655 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
28656 length attribute for the first (memory operand) alternative.
28658 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
28660 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
28661 * config/aarch64/constraints.md: Make "Umn" relaxed memory
28663 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
28665 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
28667 * value-range.cc (frange::set): Adjust constructor.
28668 * value-range.h (nan_state::nan_state): Replace default
28669 constructor with one taking an argument.
28671 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
28673 * ipa-cp.cc (ipa_range_contains_p): New.
28674 (decide_whether_version_node): Use it.
28676 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28678 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
28679 simplify two successive VEC_PERM_EXPRs with same VLA mask,
28680 where mask chooses elements in reverse order.
28682 2023-04-24 Andrew Pinski <apinski@marvell.com>
28684 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
28685 and support diamond shaped basic block form.
28686 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
28688 2023-04-24 Andrew Pinski <apinski@marvell.com>
28690 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
28691 Instead of calling last_and_only_stmt, look for the last statement
28694 2023-04-24 Andrew Pinski <apinski@marvell.com>
28696 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
28698 (match_simplify_replacement): Call
28699 empty_bb_or_one_feeding_into_p instead of doing it inline.
28701 2023-04-24 Andrew Pinski <apinski@marvell.com>
28703 PR tree-optimization/68894
28704 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
28705 continue for the do_hoist_loads diamond case.
28707 2023-04-24 Andrew Pinski <apinski@marvell.com>
28709 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
28710 code for better code readability.
28712 2023-04-24 Andrew Pinski <apinski@marvell.com>
28714 PR tree-optimization/109604
28715 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
28716 diamond form check from ...
28717 (minmax_replacement): Here.
28719 2023-04-24 Patrick Palka <ppalka@redhat.com>
28721 * tree.cc (strip_array_types): Don't define here.
28722 (is_typedef_decl): Don't define here.
28723 (typedef_variant_p): Don't define here.
28724 * tree.h (strip_array_types): Define here.
28725 (is_typedef_decl): Define here.
28726 (typedef_variant_p): Define here.
28728 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
28730 * doc/generic.texi (OpenMP): Add != to allowed
28731 conditions and state that vars can be unsigned.
28732 * tree.def (OMP_FOR): Likewise.
28734 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28736 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
28738 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
28740 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
28741 Remove explicit Solaris 11 references.
28743 (Options specification, --with-gnu-as): as and gas always differ
28745 Remove /usr/ccs/bin reference.
28746 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
28747 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
28748 (*-*-solaris2*): ... here.
28749 Update bundled GCC versions.
28750 Don't refer to pre-built binaries.
28751 Remove /bin/sh warning.
28752 Update assembler, linker recommendations.
28753 Document GNAT bootstrap compiler.
28754 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
28755 (sparc64-*-solaris2*): Move content...
28756 (sparcv9-*-solaris2*): ...here.
28757 Add GDC for 64-bit bootstrap compilers.
28759 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28762 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
28764 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
28767 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28769 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
28770 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
28771 (aarch64_<su>abal2<mode>): New define_expand.
28772 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
28773 (aarch64_rtx_costs): Handle ABD rtxes.
28774 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
28775 * config/aarch64/iterators.md (ABAL2): Delete.
28776 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
28778 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28780 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
28781 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
28782 (<sur>sadv16qi): Rename to...
28783 (<su>sadv16qi): ... This. Adjust for the above.
28784 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
28785 (<su>sad<vsi2qi>): ... This. Adjust for the above.
28786 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
28787 * config/aarch64/iterators.md (ABAL): Delete.
28788 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
28790 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28792 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
28793 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
28794 (aarch64_<su>abdl2<mode>): New define_expand.
28795 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
28796 * config/aarch64/iterators.md (ABDL2): Delete.
28797 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
28799 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28801 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
28802 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
28804 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
28805 * config/aarch64/iterators.md (ABDL): Delete.
28806 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
28808 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28810 * config/aarch64/aarch64-simd.md
28811 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
28813 2023-04-24 Richard Biener <rguenther@suse.de>
28815 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
28817 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
28819 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
28820 (set_switch_stmt_execution_predicate): Likewise.
28821 (phi_result_unknown_predicate): Likewise.
28822 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
28823 (ipa_analyze_indirect_call_uses): Likewise.
28824 * predict.cc (predict_iv_comparison): Likewise.
28825 (predict_extra_loop_exits): Likewise.
28826 (predict_loops): Likewise.
28827 (tree_predict_by_opcode): Likewise.
28828 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
28830 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
28831 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
28832 (replace_phi_edge_with_variable): Likewise.
28833 (two_value_replacement): Likewise.
28834 (value_replacement): Likewise.
28835 (minmax_replacement): Likewise.
28836 (spaceship_replacement): Likewise.
28837 (cond_removal_in_builtin_zero_pattern): Likewise.
28838 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
28839 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
28840 (vn_phi_lookup): Likewise.
28841 (vn_phi_insert): Likewise.
28842 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
28843 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
28845 (back_threader_profitability::possibly_profitable_path_p):
28847 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
28849 * tree-switch-conversion.cc (pass_convert_switch::execute):
28851 (pass_lower_switch<O0>::execute): Likewise.
28852 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
28853 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
28854 * tree-vect-slp.cc (vect_slp_function): Likewise.
28855 * tree-vect-stmts.cc (cfun_returns): Likewise.
28856 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
28857 (vect_loop_dist_alias_call): Likewise.
28859 2023-04-24 Richard Biener <rguenther@suse.de>
28861 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
28863 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28865 * config/riscv/riscv-vsetvl.cc
28866 (vector_infos_manager::all_avail_in_compatible_p): New function.
28867 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
28868 * config/riscv/riscv-vsetvl.h: New function.
28870 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28872 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
28873 comment for cleanup_insns.
28875 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28877 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
28878 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
28879 with the fault first load property.
28881 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28883 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
28884 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
28886 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28889 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
28890 (aarch64_addp<mode><vczle><vczbe>): ... This.
28892 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28894 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
28895 provide reasonable values for common arithmetic operations and
28896 immediate operands (in several machine modes).
28898 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28900 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
28901 format specifier to output high_part register name of SImode reg.
28902 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
28903 (zero_extendqihi2): Fix lengths, consistent formatting and add
28904 "and Rx,#255" alternative, for documentation purposes.
28905 (zero_extendhisi2): New define_insn.
28907 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28909 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
28910 SImode shifts by two by performing a single bit SImode shift twice.
28912 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
28914 PR tree-optimization/109593
28915 * value-range.cc (frange::operator==): Handle NANs.
28917 2023-04-23 liuhongt <hongtao.liu@intel.com>
28919 PR rtl-optimization/108707
28920 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
28921 GENERAL_REGS when preferred reg_class is not known.
28923 2023-04-22 Andrew Pinski <apinski@marvell.com>
28925 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
28926 Change the code around slightly to move diamond
28927 handling for do_store_elim/do_hoist_loads out of
28930 2023-04-22 Andrew Pinski <apinski@marvell.com>
28932 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
28933 Remove check on empty_block_p.
28935 2023-04-22 Jakub Jelinek <jakub@redhat.com>
28937 PR bootstrap/109589
28938 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
28939 * realmpfr.h (class auto_mpfr): Likewise.
28941 2023-04-22 Jakub Jelinek <jakub@redhat.com>
28943 PR tree-optimization/109583
28944 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
28945 if vec_mode is not VECTOR_MODE_P.
28947 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
28948 Ondrej Kubanek <kubanek0ondrej@gmail.com>
28950 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
28951 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
28952 loop profile and bounds after header duplication.
28953 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
28954 Break out from try_peel_loop; fix handling of 0 iterations.
28955 (try_peel_loop): Use adjust_loop_info_after_peeling.
28957 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
28959 PR tree-optimization/109546
28960 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
28961 not fold conditions with ADDR_EXPR early.
28963 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28965 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
28966 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
28968 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
28969 (*aarch64_<optab><mode>3_zero): Define.
28970 (*aarch64_<optab><mode>3_cssc): Likewise.
28971 * config/aarch64/iterators.md (maxminand): New code attribute.
28973 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28976 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
28977 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
28979 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
28980 (aarch64_override_options_internal): Handle the above.
28981 (aarch64_output_load_tp): New function.
28982 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
28983 aarch64_output_load_tp.
28984 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
28985 (mtp=): New option.
28986 * doc/invoke.texi (AArch64 Options): Document -mtp=.
28988 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28991 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
28992 (add_vec_concat_subst_be): Likewise.
28995 (add<mode>3): Rename to...
28996 (add<mode>3<vczle><vczbe>): ... This.
28997 (sub<mode>3): Rename to...
28998 (sub<mode>3<vczle><vczbe>): ... This.
28999 (mul<mode>3): Rename to...
29000 (mul<mode>3<vczle><vczbe>): ... This.
29001 (and<mode>3): Rename to...
29002 (and<mode>3<vczle><vczbe>): ... This.
29003 (ior<mode>3): Rename to...
29004 (ior<mode>3<vczle><vczbe>): ... This.
29005 (xor<mode>3): Rename to...
29006 (xor<mode>3<vczle><vczbe>): ... This.
29007 * config/aarch64/iterators.md (VDZ): Define.
29009 2023-04-21 Patrick Palka <ppalka@redhat.com>
29011 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
29014 2023-04-21 Jan Hubicka <jh@suse.cz>
29016 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
29019 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
29021 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
29022 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
29024 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29026 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
29027 force_reg instead of copy_to_mode_reg.
29028 (aarch64_expand_vector_init): Likewise.
29030 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
29032 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
29033 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
29034 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
29035 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
29036 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
29037 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
29038 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
29039 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
29040 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
29041 * config/i386/predicates.md (index_register_operand):
29042 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
29043 * config/i386/i386.cc (ix86_legitimate_address_p): Use
29044 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
29045 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
29047 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
29048 Ondrej Kubanek <kubanek0ondrej@gmail.com>
29050 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
29053 2023-04-21 Richard Biener <rguenther@suse.de>
29055 * is-a.h (safe_is_a): New.
29057 2023-04-21 Richard Biener <rguenther@suse.de>
29059 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
29060 (gphi_iterator::operator*): Likewise.
29062 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
29063 Michal Jires <michal@jires.eu>
29065 * ipa-inline.cc (class inline_badness): New class.
29066 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
29068 (update_edge_key): Update.
29069 (lookup_recursive_calls): Likewise.
29070 (recursive_inlining): Likewise.
29071 (add_new_edges_to_heap): Likewise.
29072 (inline_small_functions): Likewise.
29074 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
29076 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
29078 2023-04-21 Richard Biener <rguenther@suse.de>
29080 PR tree-optimization/109573
29081 * tree-vect-loop.cc (vectorizable_live_operation): Allow
29082 unhandled SSA copy as well. Demote assert to checking only.
29084 2023-04-21 Richard Biener <rguenther@suse.de>
29086 * df-core.cc (df_analyze): Compute RPO on the reverse graph
29087 for DF_BACKWARD problems.
29088 (loop_post_order_compute): Rename to ...
29089 (loop_rev_post_order_compute): ... this, compute a RPO.
29090 (loop_inverted_post_order_compute): Rename to ...
29091 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
29092 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
29093 problems, RPO on the inverted graph for DF_BACKWARD.
29095 2023-04-21 Richard Biener <rguenther@suse.de>
29097 * cfganal.h (inverted_rev_post_order_compute): Rename
29099 (inverted_post_order_compute): ... this. Add struct function
29100 argument, change allocation to a C array.
29101 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
29102 * lcm.cc (compute_antinout_edge): Adjust.
29103 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
29104 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
29105 * tree-ssa-pre.cc (compute_antic): Likewise.
29107 2023-04-21 Richard Biener <rguenther@suse.de>
29109 * df.h (df_d::postorder_inverted): Change back to int *,
29111 * df-core.cc (rest_of_handle_df_finish): Adjust.
29112 (df_analyze_1): Likewise.
29113 (df_analyze): For DF_FORWARD problems use RPO on the forward
29115 (loop_inverted_post_order_compute): Adjust API.
29116 (df_analyze_loop): Adjust.
29117 (df_get_n_blocks): Likewise.
29118 (df_get_postorder): Likewise.
29120 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29123 * config/riscv/riscv-vsetvl.cc
29124 (vector_infos_manager::all_empty_predecessor_p): New function.
29125 (pass_vsetvl::backward_demand_fusion): Ditto.
29126 * config/riscv/riscv-vsetvl.h: Ditto.
29128 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
29131 * config/riscv/generic.md: Change standard names to insn names.
29133 2023-04-21 Richard Biener <rguenther@suse.de>
29135 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
29136 (compute_laterin): Use RPO.
29137 (compute_available): Likewise.
29139 2023-04-21 Peng Fan <fanpeng@loongson.cn>
29141 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
29143 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29146 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
29147 (vector_insn_info::skip_avl_compatible_p): Ditto.
29148 (vector_insn_info::merge): Remove default value.
29149 (pass_vsetvl::compute_local_backward_infos): Ditto.
29150 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
29151 * config/riscv/riscv-vsetvl.h: Ditto.
29153 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
29155 * doc/extend.texi (Common Function Attributes): Remove duplicate
29158 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
29160 PR tree-optimization/109564
29161 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
29162 UNDEFINED range names when deciding if all PHI arguments are the same,
29164 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29166 PR tree-optimization/109011
29167 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
29168 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
29169 .CTZ (X) = PREC - .POPCOUNT (X | -X).
29171 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
29173 * lra-constraints.cc (match_reload): Exclude some hard regs for
29174 multi-reg inout reload pseudos used in asm in different mode.
29176 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
29178 * config/arm/arm.cc (thumb1_legitimate_address_p):
29179 Use VIRTUAL_REGISTER_P predicate.
29180 (arm_eliminable_register): Ditto.
29181 * config/avr/avr.md (push<mode>_1): Ditto.
29182 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
29183 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
29184 * config/i386/predicates.md (register_no_elim_operand): Ditto.
29185 * config/iq2000/predicates.md (call_insn_operand): Ditto.
29186 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
29188 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
29191 * config/i386/predicates.md (extract_operator): New predicate.
29192 * config/i386/i386.md (any_extract): Remove code iterator.
29193 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
29194 (*cmpqi_ext<mode>_1): Ditto.
29195 (*cmpqi_ext<mode>_2): Ditto.
29196 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
29197 (*cmpqi_ext<mode>_3): Ditto.
29198 (*cmpqi_ext<mode>_4): Ditto.
29199 (*extzvqi_mem_rex64): Ditto.
29201 (*insvqi_2): Ditto.
29202 (*extendqi<SWI24:mode>_ext_1): Ditto.
29203 (*addqi_ext<mode>_0): Ditto.
29204 (*addqi_ext<mode>_1): Ditto.
29205 (*addqi_ext<mode>_2): Ditto.
29206 (*subqi_ext<mode>_0): Ditto.
29207 (*subqi_ext<mode>_2): Ditto.
29208 (*testqi_ext<mode>_1): Ditto.
29209 (*testqi_ext<mode>_2): Ditto.
29210 (*andqi_ext<mode>_0): Ditto.
29211 (*andqi_ext<mode>_1): Ditto.
29212 (*andqi_ext<mode>_1_cc): Ditto.
29213 (*andqi_ext<mode>_2): Ditto.
29214 (*<any_or:code>qi_ext<mode>_0): Ditto.
29215 (*<any_or:code>qi_ext<mode>_1): Ditto.
29216 (*<any_or:code>qi_ext<mode>_2): Ditto.
29217 (*xorqi_ext<mode>_1_cc): Ditto.
29218 (*negqi_ext<mode>_2): Ditto.
29219 (*ashlqi_ext<mode>_2): Ditto.
29220 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
29222 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
29225 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
29226 <bitmanip_insn> as the type to allow for fine grained control of
29227 scheduling these insns.
29228 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
29230 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
29231 pcnt, signed and unsigned min/max.
29233 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29234 kito-cheng <kito.cheng@sifive.com>
29236 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
29238 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29239 kito-cheng <kito.cheng@sifive.com>
29242 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
29243 (pass_vsetvl::cleanup_insns): Fix bug.
29245 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
29247 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
29248 (ldexp<mode>3): Delete.
29249 (ldexp<mode>3<exec>): Change "B" to "A".
29251 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29252 Jonathan Wakely <jwakely@redhat.com>
29254 * tree.h (built_in_function_equal_p): New helper function.
29255 (fndecl_built_in_p): Turn into variadic template to support
29256 1 or more built_in_function arguments.
29257 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
29258 * gimplify.cc (goa_stabilize_expr): Likewise.
29259 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
29260 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
29261 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
29262 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
29263 cgraph_update_edges_for_call_stmt_node,
29264 cgraph_edge::verify_corresponds_to_fndecl,
29265 cgraph_node::verify_node): Likewise.
29266 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
29267 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
29268 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
29270 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29272 PR tree-optimization/109011
29273 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
29274 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
29275 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
29276 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
29277 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
29279 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
29281 2023-04-20 Richard Biener <rguenther@suse.de>
29283 * df-core.cc (rest_of_handle_df_initialize): Remove
29284 computation of df->postorder, df->postorder_inverted and
29287 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29289 * common/config/i386/i386-common.cc
29290 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
29291 (ix86_handle_option): Set AVX flag for VAES.
29292 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
29293 Add OPTION_MASK_ISA2_VAES_UNSET.
29294 (def_builtin): Share builtin between AES and VAES.
29295 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
29297 * config/i386/i386.md (aes): New isa attribute.
29298 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
29299 (aesenclast): Ditto.
29301 (aesdeclast): Ditto.
29302 * config/i386/vaesintrin.h: Remove redundant avx target push.
29303 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
29304 (_mm_aesdeclast_si128): Ditto.
29305 (_mm_aesenc_si128): Ditto.
29306 (_mm_aesenclast_si128): Ditto.
29308 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
29310 * config/i386/avx2intrin.h
29311 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
29312 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
29313 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
29314 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
29315 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
29316 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
29317 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
29318 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
29319 (_mm_reduce_add_epi16): New instrinsics.
29320 (_mm_reduce_mul_epi16): Ditto.
29321 (_mm_reduce_and_epi16): Ditto.
29322 (_mm_reduce_or_epi16): Ditto.
29323 (_mm_reduce_max_epi16): Ditto.
29324 (_mm_reduce_max_epu16): Ditto.
29325 (_mm_reduce_min_epi16): Ditto.
29326 (_mm_reduce_min_epu16): Ditto.
29327 (_mm256_reduce_add_epi16): Ditto.
29328 (_mm256_reduce_mul_epi16): Ditto.
29329 (_mm256_reduce_and_epi16): Ditto.
29330 (_mm256_reduce_or_epi16): Ditto.
29331 (_mm256_reduce_max_epi16): Ditto.
29332 (_mm256_reduce_max_epu16): Ditto.
29333 (_mm256_reduce_min_epi16): Ditto.
29334 (_mm256_reduce_min_epu16): Ditto.
29335 (_mm_reduce_add_epi8): Ditto.
29336 (_mm_reduce_mul_epi8): Ditto.
29337 (_mm_reduce_and_epi8): Ditto.
29338 (_mm_reduce_or_epi8): Ditto.
29339 (_mm_reduce_max_epi8): Ditto.
29340 (_mm_reduce_max_epu8): Ditto.
29341 (_mm_reduce_min_epi8): Ditto.
29342 (_mm_reduce_min_epu8): Ditto.
29343 (_mm256_reduce_add_epi8): Ditto.
29344 (_mm256_reduce_mul_epi8): Ditto.
29345 (_mm256_reduce_and_epi8): Ditto.
29346 (_mm256_reduce_or_epi8): Ditto.
29347 (_mm256_reduce_max_epi8): Ditto.
29348 (_mm256_reduce_max_epu8): Ditto.
29349 (_mm256_reduce_min_epi8): Ditto.
29350 (_mm256_reduce_min_epu8): Ditto.
29351 * config/i386/avx512vlbwintrin.h:
29352 (_mm_mask_reduce_add_epi16): Ditto.
29353 (_mm_mask_reduce_mul_epi16): Ditto.
29354 (_mm_mask_reduce_and_epi16): Ditto.
29355 (_mm_mask_reduce_or_epi16): Ditto.
29356 (_mm_mask_reduce_max_epi16): Ditto.
29357 (_mm_mask_reduce_max_epu16): Ditto.
29358 (_mm_mask_reduce_min_epi16): Ditto.
29359 (_mm_mask_reduce_min_epu16): Ditto.
29360 (_mm256_mask_reduce_add_epi16): Ditto.
29361 (_mm256_mask_reduce_mul_epi16): Ditto.
29362 (_mm256_mask_reduce_and_epi16): Ditto.
29363 (_mm256_mask_reduce_or_epi16): Ditto.
29364 (_mm256_mask_reduce_max_epi16): Ditto.
29365 (_mm256_mask_reduce_max_epu16): Ditto.
29366 (_mm256_mask_reduce_min_epi16): Ditto.
29367 (_mm256_mask_reduce_min_epu16): Ditto.
29368 (_mm_mask_reduce_add_epi8): Ditto.
29369 (_mm_mask_reduce_mul_epi8): Ditto.
29370 (_mm_mask_reduce_and_epi8): Ditto.
29371 (_mm_mask_reduce_or_epi8): Ditto.
29372 (_mm_mask_reduce_max_epi8): Ditto.
29373 (_mm_mask_reduce_max_epu8): Ditto.
29374 (_mm_mask_reduce_min_epi8): Ditto.
29375 (_mm_mask_reduce_min_epu8): Ditto.
29376 (_mm256_mask_reduce_add_epi8): Ditto.
29377 (_mm256_mask_reduce_mul_epi8): Ditto.
29378 (_mm256_mask_reduce_and_epi8): Ditto.
29379 (_mm256_mask_reduce_or_epi8): Ditto.
29380 (_mm256_mask_reduce_max_epi8): Ditto.
29381 (_mm256_mask_reduce_max_epu8): Ditto.
29382 (_mm256_mask_reduce_min_epi8): Ditto.
29383 (_mm256_mask_reduce_min_epu8): Ditto.
29385 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29387 * common/config/i386/i386-common.cc
29388 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
29389 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
29390 (OPTION_MASK_ISA_AVX_UNSET):
29391 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
29392 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
29393 * config/i386/i386.md (vpclmulqdqvl): New.
29394 * config/i386/sse.md (pclmulqdq): Add evex encoding.
29395 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
29398 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29400 * config/i386/avx512vlbwintrin.h
29401 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
29402 (_mm_mask_blend_epi8): Ditto.
29403 (_mm256_mask_blend_epi16): Ditto.
29404 (_mm256_mask_blend_epi8): Ditto.
29405 * config/i386/avx512vlintrin.h
29406 (_mm256_mask_blend_pd): Ditto.
29407 (_mm256_mask_blend_ps): Ditto.
29408 (_mm256_mask_blend_epi64): Ditto.
29409 (_mm256_mask_blend_epi32): Ditto.
29410 (_mm_mask_blend_pd): Ditto.
29411 (_mm_mask_blend_ps): Ditto.
29412 (_mm_mask_blend_epi64): Ditto.
29413 (_mm_mask_blend_epi32): Ditto.
29414 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
29415 (VF_AVX512HFBFVL): Move it before the first usage.
29416 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
29417 to VF_AVX512HFBFVL.
29419 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29421 * common/config/i386/i386-common.cc
29422 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
29423 to OPTION_MASK_ISA_AVX512BW_SET.
29424 (OPTION_MASK_ISA_AVX512F_UNSET):
29425 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
29426 (OPTION_MASK_ISA_AVX512BW_UNSET):
29427 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
29428 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
29429 * config/i386/avx512vbmi2vlintrin.h: Ditto.
29430 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
29431 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
29432 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
29433 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
29435 (compressstore<mode>_mask): Ditto.
29436 (expand<mode>_mask): Ditto.
29437 (expand<mode>_maskz): Ditto.
29438 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
29439 VI12_VI48F_AVX512VL.
29441 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29443 * common/config/i386/i386-common.cc
29444 (OPTION_MASK_ISA_AVX512BITALG_SET):
29445 Change OPTION_MASK_ISA_AVX512F_SET
29446 to OPTION_MASK_ISA_AVX512BW_SET.
29447 (OPTION_MASK_ISA_AVX512F_UNSET):
29448 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
29449 (OPTION_MASK_ISA_AVX512BW_UNSET):
29450 Add OPTION_MASK_ISA_AVX512BITALG_SET.
29451 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
29452 * config/i386/i386-builtin.def:
29453 Remove redundant OPTION_MASK_ISA_AVX512BW.
29454 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
29455 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
29456 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
29458 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29460 * config/i386/i386-expand.cc
29461 (ix86_check_builtin_isa_match): Correct wrong comments.
29462 Add a new macro SHARE_BUILTIN and refactor the current if
29465 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
29467 * config/i386/cpuid.h: Open a new section for Extended Features
29468 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
29471 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
29473 * config/i386/sse.md: Modify insn vperm{i,f}
29476 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
29478 * config/xtensa/xtensa-opts.h: New header.
29479 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
29480 xtensa_strict_align.
29481 * config/xtensa/xtensa.cc (xtensa_option_override): When
29482 -m[no-]strict-align is not specified in the command line set
29483 xtensa_strict_align to 0 if the hardware supports both unaligned
29484 loads and stores or to 1 otherwise.
29485 * config/xtensa/xtensa.opt (mstrict-align): New option.
29486 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
29488 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
29490 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
29493 2023-04-19 Andrew Pinski <apinski@marvell.com>
29495 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
29497 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29499 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
29500 (VECTOR_BOOL_MODE): Ditto.
29501 (ADJUST_NUNITS): Ditto.
29502 (ADJUST_ALIGNMENT): Ditto.
29503 (ADJUST_BYTESIZE): Ditto.
29504 (ADJUST_PRECISION): Ditto.
29505 (RVV_MODES): Ditto.
29506 (VECTOR_MODE_WITH_PREFIX): Ditto.
29507 * config/riscv/riscv-v.cc (ENTRY): Ditto.
29508 (get_vlmul): Ditto.
29509 (get_ratio): Ditto.
29510 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
29511 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
29512 (vbool64_t): Ditto.
29513 (vbool32_t): Ditto.
29514 (vbool16_t): Ditto.
29519 (vint8mf8_t): Ditto.
29520 (vuint8mf8_t): Ditto.
29521 (vint8mf4_t): Ditto.
29522 (vuint8mf4_t): Ditto.
29523 (vint8mf2_t): Ditto.
29524 (vuint8mf2_t): Ditto.
29525 (vint8m1_t): Ditto.
29526 (vuint8m1_t): Ditto.
29527 (vint8m2_t): Ditto.
29528 (vuint8m2_t): Ditto.
29529 (vint8m4_t): Ditto.
29530 (vuint8m4_t): Ditto.
29531 (vint8m8_t): Ditto.
29532 (vuint8m8_t): Ditto.
29533 (vint16mf4_t): Ditto.
29534 (vuint16mf4_t): Ditto.
29535 (vint16mf2_t): Ditto.
29536 (vuint16mf2_t): Ditto.
29537 (vint16m1_t): Ditto.
29538 (vuint16m1_t): Ditto.
29539 (vint16m2_t): Ditto.
29540 (vuint16m2_t): Ditto.
29541 (vint16m4_t): Ditto.
29542 (vuint16m4_t): Ditto.
29543 (vint16m8_t): Ditto.
29544 (vuint16m8_t): Ditto.
29545 (vint32mf2_t): Ditto.
29546 (vuint32mf2_t): Ditto.
29547 (vint32m1_t): Ditto.
29548 (vuint32m1_t): Ditto.
29549 (vint32m2_t): Ditto.
29550 (vuint32m2_t): Ditto.
29551 (vint32m4_t): Ditto.
29552 (vuint32m4_t): Ditto.
29553 (vint32m8_t): Ditto.
29554 (vuint32m8_t): Ditto.
29555 (vint64m1_t): Ditto.
29556 (vuint64m1_t): Ditto.
29557 (vint64m2_t): Ditto.
29558 (vuint64m2_t): Ditto.
29559 (vint64m4_t): Ditto.
29560 (vuint64m4_t): Ditto.
29561 (vint64m8_t): Ditto.
29562 (vuint64m8_t): Ditto.
29563 (vfloat32mf2_t): Ditto.
29564 (vfloat32m1_t): Ditto.
29565 (vfloat32m2_t): Ditto.
29566 (vfloat32m4_t): Ditto.
29567 (vfloat32m8_t): Ditto.
29568 (vfloat64m1_t): Ditto.
29569 (vfloat64m2_t): Ditto.
29570 (vfloat64m4_t): Ditto.
29571 (vfloat64m8_t): Ditto.
29572 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
29573 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
29574 (riscv_convert_vector_bits): Ditto.
29575 * config/riscv/riscv.md:
29576 * config/riscv/vector-iterators.md:
29577 * config/riscv/vector.md
29578 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
29579 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
29580 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
29581 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
29582 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
29583 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
29584 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
29585 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
29586 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
29588 2023-04-19 Pan Li <pan2.li@intel.com>
29590 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
29591 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
29593 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
29597 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
29598 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
29599 for operand 0. Use any_extract code iterator.
29600 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
29601 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
29602 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
29603 (*cmpqi_ext<mode>_1): Use general_operand predicate
29604 for operand 1. Use any_extract code iterator.
29605 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
29606 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
29608 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29610 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
29611 (aarch64_uaddw2<mode>): Delete.
29612 (aarch64_ssubw2<mode>): Delete.
29613 (aarch64_usubw2<mode>): Delete.
29614 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
29616 2023-04-19 Richard Biener <rguenther@suse.de>
29618 * tree-ssa-structalias.cc (do_ds_constraint): Use
29619 solve_add_graph_edge.
29621 2023-04-19 Richard Biener <rguenther@suse.de>
29623 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
29625 (do_sd_constraint): ... here.
29627 2023-04-19 Richard Biener <rguenther@suse.de>
29629 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
29630 rejecting the merge when A contains only a non-local label.
29632 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
29634 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
29635 (VIRTUAL_REGISTER_NUM_P): Ditto.
29636 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
29637 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
29638 * function.cc (instantiate_decl_rtl): Ditto.
29639 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
29640 (nonzero_address_p): Ditto.
29641 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
29643 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
29645 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
29647 2023-04-19 Richard Biener <rguenther@suse.de>
29649 * system.h (auto_mpz::operator->()): New.
29650 * realmpfr.h (auto_mpfr::operator->()): New.
29651 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
29652 * real.cc (real_from_string): Likewise.
29653 (dconst_e_ptr): Likewise.
29654 (dconst_sqrt2_ptr): Likewise.
29655 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
29657 (bound_difference_of_offsetted_base): Likewise.
29658 (number_of_iterations_ne): Likewise.
29659 (number_of_iterations_lt_to_ne): Likewise.
29660 * ubsan.cc: Include realmpfr.h.
29661 (ubsan_instrument_float_cast): Use auto_mpfr.
29663 2023-04-19 Richard Biener <rguenther@suse.de>
29665 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
29666 edges, remove edges from escaped after special-casing them.
29668 2023-04-19 Richard Biener <rguenther@suse.de>
29670 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
29673 2023-04-19 Richard Biener <rguenther@suse.de>
29675 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
29676 to the LHS varinfo solution member.
29678 2023-04-19 Richard Biener <rguenther@suse.de>
29680 * tree-ssa-structalias.cc (topo_visit): Look at the real
29681 destination of edges.
29683 2023-04-19 Richard Biener <rguenther@suse.de>
29685 PR tree-optimization/44794
29686 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
29687 If an epilogue loop is required set its iteration upper bound.
29689 2023-04-19 Xi Ruoyao <xry111@xry111.site>
29692 * config/loongarch/loongarch-protos.h
29693 (loongarch_expand_block_move): Add a parameter as alignment RTX.
29694 * config/loongarch/loongarch.h:
29695 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
29696 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
29697 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
29698 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
29699 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
29700 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
29701 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
29702 Take the alignment from the parameter, but set it to
29703 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
29704 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
29705 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
29706 (loongarch_block_move_straight): When there are left-over bytes,
29707 half the mode size instead of falling back to byte mode at once.
29708 (loongarch_block_move_loop): Limit the length of loop body with
29709 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
29710 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
29711 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
29712 to loongarch_expand_block_move.
29714 2023-04-19 Xi Ruoyao <xry111@xry111.site>
29716 * config/loongarch/loongarch.cc
29717 (loongarch_setup_incoming_varargs): Don't save more GARs than
29718 cfun->va_list_gpr_size / UNITS_PER_WORD.
29720 2023-04-19 Richard Biener <rguenther@suse.de>
29722 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
29723 no epilogue condition.
29725 2023-04-19 Richard Biener <rguenther@suse.de>
29727 * gimple.h (gimple_assign_load): Outline...
29728 * gimple.cc (gimple_assign_load): ... here. Avoid
29729 get_base_address and instead just strip the outermost
29730 handled component, treating a remaining handled component
29733 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29735 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
29737 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
29739 2023-04-19 Jakub Jelinek <jakub@redhat.com>
29741 PR tree-optimization/109011
29742 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
29743 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
29744 CLZ, CTZ and FFS. Remove vargs variable, use
29745 gimple_build_call_internal rather than gimple_build_call_internal_vec.
29746 (vect_vect_recog_func_ptrs): Adjust popcount entry.
29748 2023-04-19 Jakub Jelinek <jakub@redhat.com>
29751 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
29752 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
29753 a new REG rather than the SUBREG.
29755 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29757 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
29760 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29763 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
29764 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
29766 2023-04-19 Richard Biener <rguenther@suse.de>
29768 PR rtl-optimization/109237
29769 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
29770 TREE_VISITED on INSN_VAR_LOCATION_DECL.
29771 (delete_trivially_dead_insns): Maintain TREE_VISITED on
29772 active debug bind INSN_VAR_LOCATION_DECL.
29774 2023-04-19 Richard Biener <rguenther@suse.de>
29776 PR rtl-optimization/109237
29777 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
29779 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
29781 * doc/install.texi (enable-decimal-float): Add AArch64.
29783 2023-04-19 liuhongt <hongtao.liu@intel.com>
29785 PR rtl-optimization/109351
29786 * ira.cc (setup_class_subset_and_memory_move_costs): Check
29787 hard_regno_mode_ok before setting lowest memory move cost for
29788 the mode with different reg classes.
29790 2023-04-18 Jason Merrill <jason@redhat.com>
29792 * doc/invoke.texi: Remove stray @gol.
29794 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29796 * ifcvt.cc (cond_move_process_if_block): Consider the result of
29797 targetm.noce_conversion_profitable_p() when replacing the original
29798 sequence with the converted one.
29800 2023-04-18 Mark Harmstone <mark@harmstone.com>
29802 * common.opt (gcodeview): Add new option.
29803 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
29804 * opts.cc (command_handle_option): Similarly.
29805 * doc/invoke.texi: Add documentation for -gcodeview.
29807 2023-04-18 Andrew Pinski <apinski@marvell.com>
29809 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
29810 (make_pass_phiopt): Make execute out of line.
29811 (tree_ssa_cs_elim): Move code into ...
29812 (pass_cselim::execute): here.
29814 2023-04-18 Sam James <sam@gentoo.org>
29816 * system.h: Drop unused INCLUDE_PTHREAD_H.
29818 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
29820 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
29823 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
29825 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
29826 (bswapdi2, bswapsi2): Similarly.
29828 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
29831 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
29832 Use CODE_FOR_sse4_1_insertps_v4sf.
29833 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
29834 (expand_vec_perm_1): Call expand_vec_per_insertps.
29835 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
29836 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
29837 (@sse4_1_insertps_<mode>): New insn pattern.
29838 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
29839 pattern from sse4_1_insertps using VI4F_128 mode iterator.
29841 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29843 * value-range.cc (gt_ggc_mx): New.
29845 * value-range.h (class vrange): Add GTY marker.
29846 (class frange): Same.
29847 (gt_ggc_mx): Remove.
29848 (gt_pch_nx): Remove.
29850 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
29852 * lra-constraints.cc (constraint_unique): New.
29853 (process_address_1): Apply constraint_unique test.
29854 * recog.cc (constrain_operands): Allow relaxed memory
29857 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
29859 * doc/extend.texi (Target Builtins): Add RISC-V Vector
29861 (RISC-V Vector Intrinsics): Document GCC implemented which
29862 version of RISC-V vector intrinsics and its reference.
29864 2023-04-18 Richard Biener <rguenther@suse.de>
29866 PR middle-end/108786
29867 * bitmap.h (bitmap_clear_first_set_bit): New.
29868 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
29869 bitmap_first_set_bit and add optional clearing of the bit.
29870 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
29871 (bitmap_clear_first_set_bit): Likewise.
29872 * df-core.cc (df_worklist_dataflow_doublequeue): Use
29873 bitmap_clear_first_set_bit.
29874 * graphite-scop-detection.cc (scop_detection::merge_sese):
29876 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
29877 (sanitize_asan_mark_poison): Likewise.
29878 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
29879 * tree-into-ssa.cc (rewrite_blocks): Likewise.
29880 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
29881 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
29883 2023-04-18 Richard Biener <rguenther@suse.de>
29885 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
29886 (dump_sa_points_to_info): ... this function.
29887 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
29888 and call dump_sa_stats guarded with TDF_STATS.
29889 (ipa_pta_execute): Likewise.
29890 (compute_may_aliases): Guard dump_alias_info with
29891 TDF_DETAILS|TDF_ALIAS.
29893 2023-04-18 Andrew Pinski <apinski@marvell.com>
29895 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
29896 the expression that is being tried when TDF_FOLDING
29898 (phiopt_worker::match_simplify_replacement): Dump
29899 the sequence which was created by gimple_simplify_phiopt
29900 when TDF_FOLDING is true.
29902 2023-04-18 Andrew Pinski <apinski@marvell.com>
29904 * tree-ssa-phiopt.cc (match_simplify_replacement):
29905 Simplify code that does the movement slightly.
29907 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29909 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
29911 (rev16<mode>2): Rename to...
29912 (aarch64_rev16<mode>2_alt1): ... This.
29913 (rev16<mode>2_alt): Rename to...
29914 (*aarch64_rev16<mode>2_alt2): ... This.
29916 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29918 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
29919 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
29921 * range-op-float.cc (zero_range): Use dconstm0.
29922 (zero_to_inf_range): Same.
29923 * real.h (dconstm0): New.
29924 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
29925 (frange::set_zero): Do not declare dconstm0.
29927 2023-04-18 Richard Biener <rguenther@suse.de>
29929 * system.h (class auto_mpz): New,
29930 * realmpfr.h (class auto_mpfr): Likewise.
29931 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
29932 (do_mpfr_arg2): Likewise.
29933 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
29935 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29937 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
29938 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
29940 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29942 * value-range.cc (frange::operator==): Adjust for NAN.
29943 (range_tests_nan): Remove some NAN tests.
29945 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29947 * inchash.cc (hash::add_real_value): New.
29948 * inchash.h (class hash): Add add_real_value.
29949 * value-range.cc (add_vrange): New.
29950 * value-range.h (inchash::add_vrange): New.
29952 2023-04-18 Richard Biener <rguenther@suse.de>
29954 PR tree-optimization/109539
29955 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
29956 Re-implement pointer relatedness for PHIs.
29958 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
29960 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
29961 (SV_FP): New iterator.
29962 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
29963 (recip<mode>2): Unify the two patterns using SV_FP.
29964 (div_scale<mode><exec_vcc>): New insn.
29965 (div_fmas<mode><exec>): New insn.
29966 (div_fixup<mode><exec>): New insn.
29967 (div<mode>3): Unify the two expanders and rewrite using hardfp.
29968 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
29969 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
29970 and UNSPEC_DIV_FIXUP.
29971 (vccwait): New attribute.
29973 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29975 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
29976 if the argument matches that.
29978 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29980 * config/aarch64/atomics.md
29981 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
29982 Use SD_HSDI for destination mode iterator.
29984 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
29986 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
29987 of z-extensions and s-extensions.
29988 (riscv_subset_list::parse): Likewise.
29990 2023-04-18 Jakub Jelinek <jakub@redhat.com>
29992 PR tree-optimization/109240
29993 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
29994 first vec_perm operand and minus as second using fneg/fadd and
29995 minus as first vec_perm operand and plus as second using fneg/fsub.
29997 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29999 * data-streamer.cc (bp_pack_real_value): New.
30000 (bp_unpack_real_value): New.
30001 * data-streamer.h (bp_pack_real_value): New.
30002 (bp_unpack_real_value): New.
30003 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
30004 bp_unpack_real_value.
30005 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
30006 bp_pack_real_value.
30008 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30010 * wide-int.h (WIDE_INT_MAX_HWIS): New.
30011 (class fixed_wide_int_storage): Use it.
30012 (trailing_wide_ints <N>::set_precision): Use it.
30013 (trailing_wide_ints <N>::extra_size): Use it.
30015 2023-04-18 Xi Ruoyao <xry111@xry111.site>
30017 * config/loongarch/loongarch-protos.h
30018 (loongarch_addu16i_imm12_operand_p): New function prototype.
30019 (loongarch_split_plus_constant): Likewise.
30020 * config/loongarch/loongarch.cc
30021 (loongarch_addu16i_imm12_operand_p): New function.
30022 (loongarch_split_plus_constant): Likewise.
30023 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
30024 (DUAL_IMM12_OPERAND): Likewise.
30025 (DUAL_ADDU16I_OPERAND): Likewise.
30026 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
30028 * config/loongarch/predicates.md (const_dual_imm12_operand): New
30030 (const_addu16i_operand): Likewise.
30031 (const_addu16i_imm12_di_operand): Likewise.
30032 (const_addu16i_imm12_si_operand): Likewise.
30033 (plus_di_operand): Likewise.
30034 (plus_si_operand): Likewise.
30035 (plus_si_extend_operand): Likewise.
30036 * config/loongarch/loongarch.md (add<mode>3): Convert to
30037 define_insn_and_split. Use plus_<mode>_operand predicate
30038 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
30039 and Le constraints.
30040 (*addsi3_extended): Convert to define_insn_and_split. Use
30041 plus_si_extend_operand instead of arith_operand. Add
30042 alternatives for La and Le alternatives.
30044 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30046 * value-range.h (Value_Range::Value_Range): New.
30047 (Value_Range::contains_p): New.
30049 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30051 * value-range.h (class vrange): Make m_discriminator const.
30052 (class irange): Make m_max_ranges const. Adjust constructors
30054 (class unsupported_range): Construct vrange appropriately.
30055 (class frange): Same.
30057 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
30059 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
30062 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
30064 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
30066 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
30068 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
30070 (riscv_expand_epilogue): Likewise.
30072 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
30074 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
30076 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
30078 2023-04-17 Andrew Pinski <apinski@marvell.com>
30080 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
30083 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
30085 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
30088 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
30090 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
30091 parameter remaining_size.
30092 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
30093 (riscv_expand_prologue): Likewise.
30094 (riscv_expand_epilogue): Likewise.
30096 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
30098 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
30099 roriw for constant counts.
30100 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
30101 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
30102 (simplify_context::simplify_binary_operation_1): Use it.
30103 * expmed.cc (expand_shift_1): Likewise.
30105 2023-04-17 Martin Jambor <mjambor@suse.cz>
30109 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
30110 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
30111 (ipa_zap_jf_refdesc): New function.
30112 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
30113 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
30114 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
30115 the new parameter of find_reference.
30116 (adjust_references_in_caller): Likewise. Make sure the constant jump
30117 function is not used to decrement a refdec counter again. Only
30118 decrement refdesc counters when the pass_through jump function allows
30119 it. Added a detailed dump when decrementing refdesc counters.
30120 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
30121 (ipa_set_jf_simple_pass_through): Initialize the new flag.
30122 (ipa_set_jf_unary_pass_through): Likewise.
30123 (ipa_set_jf_arith_pass_through): Likewise.
30124 (remove_described_reference): Provide a value for the new parameter of
30126 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
30127 the previous pass_through had a flag mandating that we do so.
30128 (propagate_controlled_uses): Likewise. Only decrement refdesc
30129 counters when the pass_through jump function allows it.
30130 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
30131 parameter of find_reference.
30132 (ipa_write_jump_function): Assert the new flag does not have to be
30134 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
30137 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
30138 Di Zhao <di.zhao@amperecomputing.com>
30140 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
30141 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
30142 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
30143 Check for the above tuning option when processing loads.
30145 2023-04-17 Richard Biener <rguenther@suse.de>
30147 PR tree-optimization/109524
30148 * tree-vrp.cc (remove_unreachable::m_list): Change to a
30149 vector of pairs of block indices.
30150 (remove_unreachable::maybe_register_block): Adjust.
30151 (remove_unreachable::remove_and_update_globals): Likewise.
30152 Deal with removed blocks.
30154 2023-04-16 Jeff Law <jlaw@ventanamicro>
30157 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
30158 TARGET_SFB_ALU, force the true arm into a register.
30160 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
30163 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
30164 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
30166 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
30167 (pa_function_arg_size): Change return type to int. Return zero
30168 for arguments larger than 1 GB. Update comments.
30170 2023-04-15 Jakub Jelinek <jakub@redhat.com>
30172 PR tree-optimization/109154
30173 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
30174 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
30176 2023-04-15 Jason Merrill <jason@redhat.com>
30179 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
30180 Overhaul lhs_ref.ref analysis.
30182 2023-04-14 Richard Biener <rguenther@suse.de>
30184 PR tree-optimization/109502
30185 * tree-vect-stmts.cc (vectorizable_assignment): Fix
30186 check for conversion between mask and non-mask types.
30188 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
30189 Jakub Jelinek <jakub@redhat.com>
30193 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
30194 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
30195 smaller than word_mode.
30196 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
30197 <case AND>: Likewise.
30199 2023-04-14 Jakub Jelinek <jakub@redhat.com>
30201 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
30204 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
30206 PR tree-optimization/108139
30207 PR tree-optimization/109462
30208 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
30209 equivalency check for PHI nodes.
30210 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
30211 does not dominate single-arg equivalency edges.
30213 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
30216 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
30217 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
30219 2023-04-13 Richard Biener <rguenther@suse.de>
30221 PR tree-optimization/109491
30222 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
30223 NULL operands test.
30225 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30228 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
30229 (vint16mf4_t): Ditto.
30230 (vint32mf2_t): Ditto.
30231 (vint64m1_t): Ditto.
30232 (vint64m2_t): Ditto.
30233 (vint64m4_t): Ditto.
30234 (vint64m8_t): Ditto.
30235 (vuint8mf8_t): Ditto.
30236 (vuint16mf4_t): Ditto.
30237 (vuint32mf2_t): Ditto.
30238 (vuint64m1_t): Ditto.
30239 (vuint64m2_t): Ditto.
30240 (vuint64m4_t): Ditto.
30241 (vuint64m8_t): Ditto.
30242 (vfloat32mf2_t): Ditto.
30243 (vbool64_t): Ditto.
30244 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
30245 (register_vector_type): Ditto.
30246 (check_required_extensions): Fix condition.
30247 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
30248 (RVV_REQUIRE_ELEN_64): New define.
30249 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
30250 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
30251 (TARGET_VECTOR_FP64): Ditto.
30252 (ENTRY): Fix predicate.
30253 * config/riscv/vector-iterators.md: Fix predicate.
30255 2023-04-12 Jakub Jelinek <jakub@redhat.com>
30257 PR tree-optimization/109410
30258 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
30259 block if first statement of the function is a call to returns_twice
30262 2023-04-12 Jakub Jelinek <jakub@redhat.com>
30265 * config/i386/i386.cc: Include rtl-error.h.
30266 (ix86_print_operand): For z modifier warning, use warning_for_asm
30267 if this_is_asm_operands. For Z modifier errors, use %c and code
30268 instead of hardcoded Z.
30270 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
30272 * config/i386/x-mingw32-utf8: Remove extrataneous $@
30274 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
30276 PR tree-optimization/109462
30277 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
30278 check for equivalences if NAME is a phi node.
30280 2023-04-12 Richard Biener <rguenther@suse.de>
30282 PR tree-optimization/109473
30283 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
30284 Convert scalar result to the computation type before performing
30285 the reduction adjustment.
30287 2023-04-12 Richard Biener <rguenther@suse.de>
30289 PR tree-optimization/109469
30290 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
30291 a returns-twice call.
30293 2023-04-12 Richard Biener <rguenther@suse.de>
30295 PR tree-optimization/109434
30296 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
30297 handle possibly throwing calls when processing the LHS
30298 and may-defs are not OK.
30300 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
30302 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
30303 predicate to avoid splitting arith constants.
30305 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
30306 Pan Li <pan2.li@intel.com>
30307 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30308 Kito Cheng <kito.cheng@sifive.com>
30311 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
30312 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
30313 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
30314 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
30315 (riscv_zero_call_used_regs): New.
30316 (TARGET_ZERO_CALL_USED_REGS): New.
30318 2023-04-11 Martin Liska <mliska@suse.cz>
30321 * opts.cc (finish_options): Drop also
30322 x_flag_var_tracking_assignments.
30324 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
30326 PR tree-optimization/108888
30327 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
30329 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
30332 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
30333 (vsx_sign_extend_v16qi_<mode>): ... this.
30334 (vsx_sign_extend_hi_<mode>): Rename to...
30335 (vsx_sign_extend_v8hi_<mode>): ... this.
30336 (vsx_sign_extend_si_v2di): Rename to...
30337 (vsx_sign_extend_v4si_v2di): ... this.
30338 (vsignextend_qi_<mode>): Remove.
30339 (vsignextend_hi_<mode>): Remove.
30340 (vsignextend_si_v2di): Remove.
30341 (vsignextend_v2di_v1ti): Remove.
30342 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
30343 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
30344 with gen_vsx_sign_extend_v16qi_v4si.
30345 * config/rs6000/rs6000.md (split for DI constant generation):
30346 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
30347 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
30348 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
30349 with gen_vsx_sign_extend_v16qi_si.
30350 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
30351 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
30352 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
30353 vsx_sign_extend_v16qi_v4si.
30354 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
30355 vsx_sign_extend_v8hi_v2di.
30356 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
30357 vsx_sign_extend_v8hi_v4si.
30358 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
30359 vsx_sign_extend_si_v2di.
30360 (__builtin_altivec_vsignext): Set bif-pattern to
30361 vsx_sign_extend_v2di_v1ti.
30362 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
30363 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
30364 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
30365 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
30367 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
30370 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
30371 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
30373 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
30375 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
30377 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
30379 * common/config/i386/cpuinfo.h (get_available_features):
30380 Detect AMX-COMPLEX.
30381 * common/config/i386/i386-common.cc
30382 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
30383 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
30384 (ix86_handle_option): Handle -mamx-complex.
30385 * common/config/i386/i386-cpuinfo.h (enum processor_features):
30386 Add FEATURE_AMX_COMPLEX.
30387 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
30389 * config.gcc: Add amxcomplexintrin.h.
30390 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
30391 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
30393 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
30394 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
30395 Handle amx-complex.
30396 * config/i386/i386.opt: Add option -mamx-complex.
30397 * config/i386/immintrin.h: Include amxcomplexintrin.h.
30398 * doc/extend.texi: Document amx-complex.
30399 * doc/invoke.texi: Document -mamx-complex.
30400 * doc/sourcebuild.texi: Document target amx-complex.
30401 * config/i386/amxcomplexintrin.h: New file.
30403 2023-04-08 Jakub Jelinek <jakub@redhat.com>
30405 PR tree-optimization/109392
30406 * tree-vect-generic.cc (tree_vec_extract): Handle failure
30407 of maybe_push_res_to_seq better.
30409 2023-04-08 Jakub Jelinek <jakub@redhat.com>
30411 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
30413 (SYSTEM_H): Depend on $(HASHTAB_H).
30414 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
30415 dependency on $(RTL_BASE_H), remove redundant dependency on
30418 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
30421 * config/arm/arm.cc (arm_effective_regno): New function.
30422 (mve_vector_mem_operand): Use it.
30424 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
30426 PR tree-optimization/109417
30427 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
30428 dependency is in SSA_NAME_FREE_LIST.
30430 2023-04-06 Andrew Pinski <apinski@marvell.com>
30432 PR tree-optimization/109427
30433 * params.opt (-param=vect-induction-float=):
30434 Fix option attribute typo for IntegerRange.
30436 2023-04-05 Jeff Law <jlaw@ventanamicro>
30439 * combine.cc (combine_instructions): Force re-recognition when
30440 after restoring the body of an insn to its original form.
30442 2023-04-05 Martin Jambor <mjambor@suse.cz>
30445 * ipa-sra.cc (zap_useless_ipcp_results): New function.
30446 (process_isra_node_results): Call it.
30448 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30450 * config/riscv/vector.md: Fix incorrect operand order.
30452 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30454 * config/riscv/riscv-vsetvl.cc
30455 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
30458 2023-04-05 Li Xu <xuli1@eswincomputing.com>
30460 * config/riscv/riscv-vector-builtins.def: Fix typo.
30461 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
30462 * config/riscv/vector-iterators.md: Ditto.
30464 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
30466 * doc/md.texi (Including Patterns): Fix page break.
30468 2023-04-04 Jakub Jelinek <jakub@redhat.com>
30470 PR tree-optimization/109386
30471 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
30472 foperator_le::op1_range, foperator_le::op2_range,
30473 foperator_gt::op1_range, foperator_gt::op2_range,
30474 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
30475 BRS_FALSE case even if the other op is maybe_isnan, not just
30477 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
30478 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
30479 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
30480 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
30481 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
30482 not just known_isnan.
30484 2023-04-04 Marek Polacek <polacek@redhat.com>
30486 PR sanitizer/109107
30487 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
30489 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
30491 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
30493 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
30494 (mve_vcreateq_f<mode>): Swap operands.
30496 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
30498 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
30500 2023-04-04 Jakub Jelinek <jakub@redhat.com>
30503 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
30504 Reword diagnostics about zfinx conflict with f, formatting fixes.
30506 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
30508 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
30510 2023-04-04 Richard Biener <rguenther@suse.de>
30512 PR tree-optimization/109304
30513 * tree-profile.cc (tree_profiling): Use symtab node
30514 availability to decide whether to skip adjusting calls.
30515 Do not adjust calls to internal functions.
30517 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
30520 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
30521 function for permutation control vector by considering big endianness.
30523 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
30526 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
30527 (rs6000_vprtyb<mode>2): ... this.
30528 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
30529 rs6000_vprtybv2di2.
30530 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
30531 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
30532 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
30533 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
30535 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
30536 Sandra Loosemore <sandra@codesourcery.com>
30538 * doc/md.texi (Insn Splitting): Tweak wording for readability.
30540 2023-04-03 Martin Jambor <mjambor@suse.cz>
30543 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
30544 offset + size will be representable in unsigned int.
30546 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
30548 * configure.ac (ZSTD_LIB): Move before zstd.h check.
30549 Unset gcc_cv_header_zstd_h without libzstd.
30550 * configure: Regenerate.
30552 2023-04-03 Martin Liska <mliska@suse.cz>
30554 * doc/invoke.texi: Document new param.
30556 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
30558 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
30559 new check_effective_target function.
30561 2023-04-03 Li Xu <xuli1@eswincomputing.com>
30563 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
30564 (vfloat32m8_t): Likewise
30566 2023-04-03 liuhongt <hongtao.liu@intel.com>
30568 * doc/md.texi: Document signbitm2.
30570 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30571 kito-cheng <kito.cheng@sifive.com>
30573 * config/riscv/vector.md: Fix RA constraint.
30575 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30577 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
30578 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
30579 * config/riscv/vector.md: Fix scalar move bug.
30581 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30583 * range-op-float.cc (foperator_equal::fold_range): If at least
30584 one of the op ranges is not singleton and neither is NaN and all
30585 4 bounds are zero, return [1, 1].
30586 (foperator_not_equal::fold_range): In the same case return [0, 0].
30588 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30590 * range-op-float.cc (foperator_equal::fold_range): Perform the
30591 non-singleton handling regardless of maybe_isnan (op1, op2).
30592 (foperator_not_equal::fold_range): Likewise.
30593 (foperator_lt::fold_range, foperator_le::fold_range,
30594 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
30595 real_* comparison check which results in range_false (type)
30596 even if maybe_isnan (op1, op2). Simplify.
30597 (foperator_ltgt): New class.
30598 (fop_ltgt): New variable.
30599 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
30602 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30605 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
30606 returns VOIDmode, handle it like if the register isn't used for
30607 passing arguments at all.
30608 (apply_result_size): If targetm.calls.get_raw_result_mode returns
30609 VOIDmode, handle it like if the register isn't used for returning
30611 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
30612 means to return VOIDmode.
30613 * doc/tm.texi: Regenerated.
30614 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
30615 TARGET_SVE for P0_REGNUM.
30616 (aarch64_function_arg_regno_p): Also return true for p0-p3.
30617 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
30619 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
30621 * lra-constraints.cc: (combine_reload_insn): New function.
30623 2023-03-31 Jakub Jelinek <jakub@redhat.com>
30625 PR tree-optimization/91645
30626 * range-op-float.cc (foperator_unordered_lt::fold_range,
30627 foperator_unordered_le::fold_range,
30628 foperator_unordered_gt::fold_range,
30629 foperator_unordered_ge::fold_range,
30630 foperator_unordered_equal::fold_range): Call the ordered
30631 fold_range on ranges with cleared NaNs.
30632 * value-query.cc (range_query::get_tree_range): Handle also
30633 COMPARISON_CLASS_P trees.
30635 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
30636 Andrew Pinski <pinskia@gmail.com>
30639 * config/riscv/t-riscv: Add missing dependencies.
30641 2023-03-31 liuhongt <hongtao.liu@intel.com>
30643 * config/i386/i386.cc (inline_memory_move_cost): Return 100
30644 for MASK_REGS when MODE_SIZE > 8.
30646 2023-03-31 liuhongt <hongtao.liu@intel.com>
30649 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
30650 ufloat/ufix to floatuns/fixuns.
30651 * config/i386/i386-expand.cc
30652 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
30653 * config/i386/sse.md
30654 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
30656 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
30657 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
30659 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
30661 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
30663 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
30664 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
30665 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
30666 (ufloatv2siv2df2<mask_name>): Renamed to ..
30667 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
30668 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
30670 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
30672 (ufix_notruncv2dfv2si2): Renamed to ..
30673 (fixuns_notruncv2dfv2si2):.. this.
30674 (ufix_notruncv2dfv2si2_mask): Renamed to ..
30675 (fixuns_notruncv2dfv2si2_mask): .. this.
30676 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
30677 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
30678 (ufix_truncv2dfv2si2): Renamed to ..
30679 (*fixuns_truncv2dfv2si2): .. this.
30680 (ufix_truncv2dfv2si2_mask): Renamed to ..
30681 (fixuns_truncv2dfv2si2_mask): .. this.
30682 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
30683 (*fixuns_truncv2dfv2si2_mask_1): .. this.
30684 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
30685 (fixuns_truncv4dfv4si2<mask_name>): .. this.
30686 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
30688 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
30690 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
30691 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
30694 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
30696 PR tree-optimization/109154
30697 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
30698 * gimple-range-gori.h (may_recompute_p): Add depth param.
30699 * params.opt (ranger-recompute-depth): New param.
30701 2023-03-30 Jason Merrill <jason@redhat.com>
30705 * cgraph.h: Move reset() from cgraph_node to symtab_node.
30706 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
30707 remove_from_same_comdat_group.
30709 2023-03-30 Richard Biener <rguenther@suse.de>
30711 PR tree-optimization/107561
30712 * gimple-ssa-warn-access.cc (get_size_range): Add flags
30713 argument and pass it on.
30714 (check_access): When querying for the size range pass
30715 SR_ALLOW_ZERO when the known destination size is zero.
30717 2023-03-30 Richard Biener <rguenther@suse.de>
30719 PR tree-optimization/109342
30720 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
30721 overload for edge. When that edge is a backedge use
30722 dominated_by_p directly.
30724 2023-03-30 liuhongt <hongtao.liu@intel.com>
30726 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
30727 vpblendd instead of vpblendw for V4SI under avx2.
30729 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
30731 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
30732 for many quick operands, for register-sized modes.
30734 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
30736 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
30739 2023-03-29 Martin Liska <mliska@suse.cz>
30741 PR bootstrap/109310
30742 * configure.ac: Emit a warning for deprecated option
30743 --enable-link-mutex.
30744 * configure: Regenerate.
30746 2023-03-29 Richard Biener <rguenther@suse.de>
30748 PR tree-optimization/109331
30749 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
30750 discover a taken edge make sure to cleanup the CFG.
30752 2023-03-29 Richard Biener <rguenther@suse.de>
30754 PR tree-optimization/109327
30755 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
30756 already removed stmts when draining to_remove.
30758 2023-03-29 Richard Biener <rguenther@suse.de>
30761 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
30762 so we can re-create the DIE for the type if required.
30764 2023-03-29 Jakub Jelinek <jakub@redhat.com>
30765 Richard Biener <rguenther@suse.de>
30767 PR tree-optimization/109301
30768 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
30769 properties_provided from PROP_gimple_opt_math to 0.
30770 (pass_data_expand_powcabs): Change properties_provided from 0 to
30771 PROP_gimple_opt_math.
30773 2023-03-29 Richard Biener <rguenther@suse.de>
30775 PR tree-optimization/109154
30776 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
30777 inverted condition specially by inverting at the caller.
30778 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
30780 2023-03-28 David Malcolm <dmalcolm@redhat.com>
30783 * diagnostic-show-locus.cc (column_range::column_range): Factor
30784 out assertion conditional into...
30785 (column_range::valid_p): ...this new function.
30786 (line_corrections::add_hint): Don't attempt to consolidate hints
30787 if it would lead to invalid column_range instances.
30789 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
30792 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
30793 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
30796 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
30798 PR rtl-optimization/109187
30799 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
30800 subtraction in three-way comparison.
30802 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
30804 PR tree-optimization/109265
30805 PR tree-optimization/109274
30806 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
30807 not create a relation record is op1 and op2 are the same symbol.
30808 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
30809 handler for this stmt, but create a new record only if this statement
30810 generates a relation based on the ranges.
30811 (gori_compute::compute_operand2_range): Ditto.
30812 * value-relation.h (value_relation::set_relation): Always create the
30813 record that is requested.
30815 2023-03-28 Richard Biener <rguenther@suse.de>
30817 PR tree-optimization/107087
30818 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
30819 executable regions to avoid useless work and to better
30820 propagate degenerate PHIs.
30822 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
30824 * config/i386/x-mingw32-utf8: update comments.
30826 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
30829 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
30830 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
30832 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
30834 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
30835 after inlining. Record which decls are loaded from. Fix handling
30836 of vops for loads and stores.
30837 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
30838 (aarch64_accesses_vector_load_decl_p): Likewise.
30839 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
30841 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
30842 that loads from a decl, treat vector stores to those decls as
30844 (aarch64_vector_costs::finish_cost): ...and in that case,
30845 if the vector code does nothing more than a store, give the
30846 prologue a zero cost as well.
30848 2023-03-28 Richard Biener <rguenther@suse.de>
30851 PR tree-optimization/108129
30852 * genmatch.cc (lower_for): For (match ...) delay
30853 substituting into the match operator if possible.
30854 (dt_operand::gen_gimple_expr): For user_id look at the
30855 first substitute for determining how to access operands.
30856 (dt_operand::gen_generic_expr): Likewise.
30857 (dt_node::gen_kids): Properly sort user_ids according
30858 to their substitutes.
30859 (dt_node::gen_kids_1): Code-generate user_id matching.
30861 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30862 Jonathan Wakely <jwakely@redhat.com>
30864 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
30865 Use subcommand rather than sub-command in function comments.
30867 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30869 PR tree-optimization/109154
30870 * value-range.h (frange::flush_denormals_to_zero): Make it public
30871 rather than private.
30872 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
30874 * range-op-float.cc (range_operator_float::fold_range): Call
30875 flush_denormals_to_zero.
30877 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30879 PR middle-end/106190
30880 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
30881 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
30883 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30885 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
30886 as 4th argument to set to avoid clear_nan and union_ calls.
30888 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30891 * config/i386/i386.cc (assign_386_stack_local): For DImode
30892 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
30893 align 32 rather than 0 to assign_stack_local.
30895 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
30898 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
30899 on operand #3 to get the final condition code. Use std::swap.
30900 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
30901 (fucmp<gcond:code>8<P:mode>_vis): Move around.
30902 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
30903 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
30905 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
30907 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
30908 top-level sections.
30910 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
30912 * config.host: Pull in i386/x-mingw32-utf8 Makefile
30913 fragment and reference utf8rc-mingw32.o explicitly
30915 * config/i386/sym-mingw32.cc: prevent name mangling of
30917 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
30918 depend on manifest file explicitly.
30920 2023-03-28 Richard Biener <rguenther@suse.de>
30923 2023-03-27 Richard Biener <rguenther@suse.de>
30925 PR rtl-optimization/109237
30926 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30928 2023-03-28 Richard Biener <rguenther@suse.de>
30930 * common.opt (gdwarf): Remove Negative(gdwarf-).
30932 2023-03-28 Richard Biener <rguenther@suse.de>
30934 * common.opt (gdwarf): Add RejectNegative.
30935 (gdwarf-): Likewise.
30939 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30941 * config/cris/constraints.md ("T"): Correct to
30942 define_memory_constraint.
30944 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30946 * config/cris/cris.md (BW2): New mode-iterator.
30947 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
30950 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30952 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
30953 for possible eliminable compares.
30955 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30957 * config/cris/constraints.md ("R"): Remove unused constraint.
30959 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
30961 PR gcov-profile/109297
30962 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
30963 (merge_stream_usage): Likewise.
30964 (overlap_usage): Likewise.
30966 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
30969 * config/riscv/thead.md: Add missing mode specifiers.
30971 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
30972 Jiangning Liu <jiangning.liu@amperecomputing.com>
30973 Manolis Tsamis <manolis.tsamis@vrull.eu>
30975 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
30977 2023-03-27 Richard Biener <rguenther@suse.de>
30979 PR rtl-optimization/109237
30980 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30982 2023-03-27 Richard Biener <rguenther@suse.de>
30985 * lto-wrapper.cc (run_gcc): Parse alternate debug options
30986 as well, they always enable debug.
30988 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
30991 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
30993 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
30995 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
30998 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
30999 than zero when calling vec_sld.
31000 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
31001 zero when calling vec_sld.
31002 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
31003 than zero when calling vec_sld.
31005 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
31007 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
31008 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
31009 loops are represented and which fields are vectors. Add
31010 documentation for OMP_FOR_PRE_BODY field. Document internal
31011 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
31012 * tree.def (OMP_FOR): Make documentation consistent with the
31013 Texinfo manual, to fill some gaps and correct errors.
31015 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
31018 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
31019 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
31020 (handle_move_double): Call it before handle_movsi.
31021 * config/m68k/m68k-protos.h: Declare it.
31023 2023-03-26 Jakub Jelinek <jakub@redhat.com>
31025 PR tree-optimization/109230
31026 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
31028 2023-03-26 Jakub Jelinek <jakub@redhat.com>
31031 * predict.cc (compute_function_frequency): Don't call
31032 warn_function_cold if function already has cold attribute.
31034 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
31036 * doc/install.texi: Remove anachronistic note
31037 related to languages built and separate source tarballs.
31039 2023-03-25 David Malcolm <dmalcolm@redhat.com>
31042 * diagnostic-format-sarif.cc (read_until_eof): Delete.
31043 (maybe_read_file): Delete.
31044 (sarif_builder::maybe_make_artifact_content_object): Use
31045 get_source_file_content rather than maybe_read_file.
31046 Reject it if it's not valid UTF-8.
31047 * input.cc (file_cache_slot::get_full_file_content): New.
31048 (get_source_file_content): New.
31049 (selftest::check_cpp_valid_utf8_p): New.
31050 (selftest::test_cpp_valid_utf8_p): New.
31051 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
31052 * input.h (get_source_file_content): New prototype.
31054 2023-03-24 David Malcolm <dmalcolm@redhat.com>
31056 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
31058 (Special Functions for Debugging the Analyzer): Convert to a
31059 table, and rewrite in places.
31060 (Other Debugging Techniques): Add notes on how to compare two
31061 different exploded graphs.
31063 2023-03-24 David Malcolm <dmalcolm@redhat.com>
31066 * json.cc: Update comments to indicate that we now preserve
31067 insertion order of keys within objects.
31068 (object::print): Traverse keys in insertion order.
31069 (object::set): Preserve insertion order of keys.
31070 (selftest::test_writing_objects): Add an additional key to verify
31071 that we preserve insertion order.
31072 * json.h (object::m_keys): New field.
31074 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
31076 PR tree-optimization/109238
31077 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
31078 predecessors which this block dominates.
31080 2023-03-24 Richard Biener <rguenther@suse.de>
31082 PR tree-optimization/106912
31083 * tree-profile.cc (tree_profiling): Update stmts only when
31084 profiling or testing coverage. Make sure to update calls
31085 fntype, stripping 'const' there.
31087 2023-03-24 Jakub Jelinek <jakub@redhat.com>
31089 PR middle-end/109258
31090 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
31091 if target == const0_rtx.
31093 2023-03-24 Alexandre Oliva <oliva@adacore.com>
31095 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
31096 Document options and effective targets.
31098 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
31100 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
31103 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
31105 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
31106 non-earlyclobber alternative.
31108 2023-03-23 Andrew Pinski <apinski@marvell.com>
31111 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
31114 2023-03-23 Richard Biener <rguenther@suse.de>
31116 PR tree-optimization/107569
31117 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
31118 Do not push SSA names with zero uses as available leader.
31119 (process_bb): Likewise.
31121 2023-03-23 Richard Biener <rguenther@suse.de>
31123 PR tree-optimization/109262
31124 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
31125 combining a piecewise complex load avoid touching loads
31126 that throw internally. Use fun, not cfun throughout.
31128 2023-03-23 Jakub Jelinek <jakub@redhat.com>
31130 * value-range.cc (irange::irange_union, irange::intersect): Fix
31131 comment spelling bugs.
31132 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
31133 * gimple-range-trace.h: Likewise.
31134 * gimple-range-edge.cc: Likewise.
31135 (gimple_outgoing_range_stmt_p,
31136 gimple_outgoing_range::switch_edge_range,
31137 gimple_outgoing_range::edge_range_p): Likewise.
31138 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
31139 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
31140 assume_query::assume_query, assume_query::calculate_phi): Likewise.
31141 * gimple-range-edge.h: Likewise.
31142 * value-range.h (Value_Range::set, Value_Range::lower_bound,
31143 Value_Range::upper_bound, frange::set_undefined): Likewise.
31144 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
31145 gori_compute): Likewise.
31146 * gimple-range-fold.h (fold_using_range): Likewise.
31147 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
31149 * gimple-range-gori.cc (range_def_chain::in_chain_p,
31150 range_def_chain::dump, gori_map::calculate_gori,
31151 gori_compute::compute_operand_range_switch,
31152 gori_compute::logical_combine, gori_compute::refine_using_relation,
31153 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
31155 * gimple-range.h: Likewise.
31156 (enable_ranger): Likewise.
31157 * range-op.h (empty_range_varying): Likewise.
31158 * value-query.h (value_query): Likewise.
31159 * gimple-range-cache.cc (block_range_cache::set_bb_range,
31160 block_range_cache::dump, ssa_global_cache::clear_global_range,
31161 temporal_cache::temporal_value, temporal_cache::current_p,
31162 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
31163 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
31165 * gimple-range-fold.cc (fur_edge::get_phi_operand,
31166 fur_stmt::get_operand, gimple_range_adjustment,
31167 fold_using_range::range_of_phi,
31168 fold_using_range::relation_fold_and_or): Likewise.
31169 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
31170 * value-query.cc (range_query::value_of_expr,
31171 range_query::value_on_edge, range_query::query_relation): Likewise.
31172 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
31173 intersect_range_with_nonzero_bits): Likewise.
31174 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
31175 exit_range): Likewise.
31176 * value-relation.h: Likewise.
31177 (equiv_oracle, relation_trio::relation_trio, value_relation,
31178 value_relation::value_relation, pe_min): Likewise.
31179 * range-op-float.cc (range_operator_float::rv_fold,
31180 frange_arithmetic, foperator_unordered_equal::op1_range,
31181 foperator_div::rv_fold): Likewise.
31182 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
31183 * value-relation.cc (equiv_oracle::query_relation,
31184 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
31185 value_relation::apply_transitive, relation_chain_head::find_relation,
31186 dom_oracle::query_relation, dom_oracle::find_relation_block,
31187 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
31188 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
31189 create_possibly_reversed_range, adjust_op1_for_overflow,
31190 operator_mult::wi_fold, operator_exact_divide::op1_range,
31191 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
31192 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
31193 range_op_lshift_tests): Likewise.
31195 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
31197 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
31198 (move_callee_saved_registers): Detect the bug condition early.
31200 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
31202 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
31203 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
31205 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
31206 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
31207 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
31208 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
31209 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
31211 2023-03-23 Jakub Jelinek <jakub@redhat.com>
31213 PR tree-optimization/109176
31214 * tree-vect-generic.cc (expand_vector_condition): If a has
31215 vector boolean type and is a comparison, also check if both
31216 the comparison and VEC_COND_EXPR could be successfully expanded
31219 2023-03-23 Pan Li <pan2.li@intel.com>
31220 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31224 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
31225 for vector mask modes.
31226 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
31227 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
31229 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
31231 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
31233 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31236 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
31237 (emit_vlmax_op): Ditto.
31238 * config/riscv/riscv-v.cc (get_sew): New function.
31239 (emit_vlmax_vsetvl): Adapt function.
31240 (emit_pred_op): Ditto.
31241 (emit_vlmax_op): Ditto.
31242 (emit_nonvlmax_op): Ditto.
31243 (legitimize_move): Fix LRA ICE.
31244 (gen_no_side_effects_vsetvl_rtx): Adapt function.
31245 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
31246 (@mov<VB:mode><P:mode>_lra): Ditto.
31247 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
31248 (*mov<VB:mode><P:mode>_lra): Ditto.
31250 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31253 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
31254 __riscv_vlenb support.
31256 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31257 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
31258 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
31260 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31261 * config/riscv/riscv-vector-builtins.cc: Ditto.
31263 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31264 kito-cheng <kito.cheng@sifive.com>
31266 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
31267 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
31268 (pass_vsetvl::need_vsetvl): Fix bugs.
31269 (pass_vsetvl::backward_demand_fusion): Fix bugs.
31270 (pass_vsetvl::demand_fusion): Fix bugs.
31271 (eliminate_insn): Fix bugs.
31272 (insert_vsetvl): Ditto.
31273 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
31274 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
31275 * config/riscv/vector.md: Ditto.
31277 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31278 kito-cheng <kito.cheng@sifive.com>
31280 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
31281 * config/riscv/vector-iterators.md (nmsac): Ditto.
31287 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
31288 (@pred_mul_plus<mode>): Ditto.
31289 (*pred_madd<mode>): Ditto.
31290 (*pred_macc<mode>): Ditto.
31291 (*pred_mul_plus<mode>): Ditto.
31292 (@pred_mul_plus<mode>_scalar): Ditto.
31293 (*pred_madd<mode>_scalar): Ditto.
31294 (*pred_macc<mode>_scalar): Ditto.
31295 (*pred_mul_plus<mode>_scalar): Ditto.
31296 (*pred_madd<mode>_extended_scalar): Ditto.
31297 (*pred_macc<mode>_extended_scalar): Ditto.
31298 (*pred_mul_plus<mode>_extended_scalar): Ditto.
31299 (@pred_minus_mul<mode>): Ditto.
31300 (*pred_<madd_nmsub><mode>): Ditto.
31301 (*pred_nmsub<mode>): Ditto.
31302 (*pred_<macc_nmsac><mode>): Ditto.
31303 (*pred_nmsac<mode>): Ditto.
31304 (*pred_mul_<optab><mode>): Ditto.
31305 (*pred_minus_mul<mode>): Ditto.
31306 (@pred_mul_<optab><mode>_scalar): Ditto.
31307 (@pred_minus_mul<mode>_scalar): Ditto.
31308 (*pred_<madd_nmsub><mode>_scalar): Ditto.
31309 (*pred_nmsub<mode>_scalar): Ditto.
31310 (*pred_<macc_nmsac><mode>_scalar): Ditto.
31311 (*pred_nmsac<mode>_scalar): Ditto.
31312 (*pred_mul_<optab><mode>_scalar): Ditto.
31313 (*pred_minus_mul<mode>_scalar): Ditto.
31314 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
31315 (*pred_nmsub<mode>_extended_scalar): Ditto.
31316 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
31317 (*pred_nmsac<mode>_extended_scalar): Ditto.
31318 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
31319 (*pred_minus_mul<mode>_extended_scalar): Ditto.
31320 (*pred_<madd_msub><mode>): Ditto.
31321 (*pred_<macc_msac><mode>): Ditto.
31322 (*pred_<madd_msub><mode>_scalar): Ditto.
31323 (*pred_<macc_msac><mode>_scalar): Ditto.
31324 (@pred_neg_mul_<optab><mode>): Ditto.
31325 (@pred_mul_neg_<optab><mode>): Ditto.
31326 (*pred_<nmadd_msub><mode>): Ditto.
31327 (*pred_<nmsub_nmadd><mode>): Ditto.
31328 (*pred_<nmacc_msac><mode>): Ditto.
31329 (*pred_<nmsac_nmacc><mode>): Ditto.
31330 (*pred_neg_mul_<optab><mode>): Ditto.
31331 (*pred_mul_neg_<optab><mode>): Ditto.
31332 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
31333 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
31334 (*pred_<nmadd_msub><mode>_scalar): Ditto.
31335 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
31336 (*pred_<nmacc_msac><mode>_scalar): Ditto.
31337 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
31338 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
31339 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
31340 (@pred_widen_neg_mul_<optab><mode>): Ditto.
31341 (@pred_widen_mul_neg_<optab><mode>): Ditto.
31342 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
31343 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
31345 2023-03-23 liuhongt <hongtao.liu@intel.com>
31347 * builtins.cc (builtin_memset_read_str): Replace
31348 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
31349 (builtin_memset_gen_str): Ditto.
31350 * config/i386/i386-expand.cc
31351 (ix86_convert_const_wide_int_to_broadcast): Replace
31352 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
31353 (ix86_expand_vector_move): Ditto.
31354 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
31356 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
31357 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
31358 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
31359 * doc/tm.texi.in: Ditto.
31360 * target.def: Ditto.
31362 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
31364 * lra.cc (lra): Do not repeat inheritance and live range splitting
31365 when asm error is found.
31367 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
31369 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
31370 (gcn_expand_dpp_distribute_even_insn)
31371 (gcn_expand_dpp_distribute_odd_insn): Declare.
31372 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
31373 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
31374 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
31375 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
31376 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
31377 (fms<mode>4_negop2): New patterns.
31378 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
31379 (gcn_expand_dpp_distribute_even_insn)
31380 (gcn_expand_dpp_distribute_odd_insn): New functions.
31381 * config/gcn/gcn.md: Add entries to unspec enum.
31383 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
31385 PR tree-optimization/109008
31386 * value-range.cc (frange::set): Add nan_state argument.
31387 * value-range.h (class nan_state): New.
31388 (frange::get_nan_state): New.
31390 2023-03-22 Martin Liska <mliska@suse.cz>
31392 * configure: Regenerate.
31394 2023-03-21 Joseph Myers <joseph@codesourcery.com>
31396 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
31399 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
31401 PR tree-optimization/109192
31402 * gimple-range-gori.cc (gori_compute::compute_operand_range):
31403 Terminate gori calculations if a relation is not relevant.
31404 * value-relation.h (value_relation::set_relation): Allow
31405 equality between op1 and op2 if they are the same.
31407 2023-03-21 Richard Biener <rguenther@suse.de>
31409 PR tree-optimization/109219
31410 * tree-vect-loop.cc (vectorizable_reduction): Check
31411 slp_node, not STMT_SLP_TYPE.
31412 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
31413 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
31414 Remove assertion on STMT_SLP_TYPE.
31416 2023-03-21 Jakub Jelinek <jakub@redhat.com>
31418 PR tree-optimization/109215
31419 * tree.h (enum special_array_member): Adjust comments for int_0
31421 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
31422 has zero sized element type and the array has variable number of
31423 elements or constant one or more elements.
31424 (component_ref_size): Adjust comments, formatting fix.
31426 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31428 * configure.ac: Add check for the Texinfo 6.8
31429 CONTENTS_OUTPUT_LOCATION customization variable and set it if
31431 * configure: Regenerate.
31432 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
31433 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
31434 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
31435 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
31437 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31439 * doc/extend.texi: Associate use_hazard_barrier_return index
31440 entry with its attribute.
31441 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
31444 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31446 * doc/implement-c.texi: Remove usage of @gol.
31447 * doc/invoke.texi: Ditto.
31448 * doc/sourcebuild.texi: Ditto.
31449 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
31450 texinfo.tex versions, the bug it was working around appears to
31453 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31455 * doc/include/texinfo.tex: Update to 2023-01-17.19.
31457 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31459 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
31460 @enddefbuiltin for defining built-in functions.
31461 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
31462 places where it should be used.
31464 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31466 * doc/extend.texi (Formatted Output Function Checking): New
31467 subsection for grouping together printf et al.
31468 (Exception handling) Fix missing @ sign before copyright
31469 header, which lead to the copyright line leaking into
31470 '(gcc)Exception handling'.
31471 * doc/gcc.texi: Set document language to en_US.
31472 (@copying): Wrap front cover texts in quotations, move in manual
31475 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31477 * doc/gcc.texi: Add the Indices appendix, to make texinfo
31478 generate nice indices overview page.
31480 2023-03-21 Richard Biener <rguenther@suse.de>
31482 PR tree-optimization/109170
31483 * gimple-range-op.cc (cfn_pass_through_arg1): New.
31484 (gimple_range_op_handler::maybe_builtin_call): Handle
31485 __builtin_expect via cfn_pass_through_arg1.
31487 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
31490 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
31491 (init_float128_ieee): Delete code to switch complex multiply and divide
31493 (complex_multiply_builtin_code): New helper function.
31494 (complex_divide_builtin_code): Likewise.
31495 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
31496 of complex 128-bit multiply and divide built-in functions.
31498 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
31501 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
31503 2023-03-19 Jonny Grant <jg@jguk.org>
31505 * doc/extend.texi (Common Function Attributes) <nonnull>:
31508 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
31510 PR rtl-optimization/109179
31511 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
31512 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
31514 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31517 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
31519 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
31520 to allocate_struct_function instead of false.
31521 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
31522 nor DECL_RESULT here. Pass true as ABSTRACT_P to
31523 push_struct_function. Call targetm.target_option.relayout_function
31525 (tree_function_versioning): Formatting fix.
31527 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
31529 * lra-constraints.cc: Include hooks.h.
31530 (combine_reload_insn): New function.
31531 (lra_constraints): Call it.
31533 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31534 kito-cheng <kito.cheng@sifive.com>
31536 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
31537 as legitimate value.
31538 * config/riscv/riscv-vector-builtins.cc
31539 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
31540 (function_expander::use_widen_ternop_insn): Ditto.
31541 * config/riscv/vector.md (@vundefined<mode>): New pattern.
31542 (pred_mul_<optab><mode>_undef_merge): Remove.
31543 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31544 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
31545 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
31546 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
31548 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31551 * config/riscv/riscv.md: Fix subreg bug.
31553 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31555 PR middle-end/108685
31556 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
31557 use its loop_father rather than BODY_BB's loop_father.
31558 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
31559 If broken_loop with ordered > collapse and at least one of those
31560 extra loops aren't guaranteed to have at least one iteration, change
31561 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
31562 loop_father to l0_bb's loop_father rather than l1_bb's.
31564 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31567 * gdbhooks.py (TreePrinter.to_string): Wrap
31568 gdb.parse_and_eval('tree_code_type') in a try block, parse
31569 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
31570 raises exception. Update comments for the recent tree_code_type
31573 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
31575 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
31576 issues. Add more line breaks to example so it doesn't overflow
31579 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
31581 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
31582 line breaks in examples.
31583 <malloc>: Fix bad line breaks in running text, also copy-edit
31585 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
31586 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
31588 (C++ Dialect Options) <-fcontracts>: Add line break in example.
31589 <-Wctad-maybe-unsupported>: Likewise.
31590 <-Winvalid-constexpr>: Likewise.
31591 (Warning Options) <-Wdangling-pointer>: Likewise.
31592 <-Winterference-size>: Likewise.
31593 <-Wvla-parameter>: Likewise.
31594 (Static Analyzer Options): Fix bad line breaks in running text,
31595 plus add some missing markup.
31596 (Optimize Options) <openacc-privatization>: Fix more bad line
31597 breaks in running text.
31599 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
31601 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
31602 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
31603 (expand_vec_perm_2perm_pblendv): Ditto.
31605 2023-03-16 Martin Liska <mliska@suse.cz>
31607 PR middle-end/106133
31608 * gcc.cc (driver_handle_option): Use x_main_input_basename
31609 if x_dump_base_name is null.
31610 * opts.cc (common_handle_option): Likewise.
31612 2023-03-16 Richard Biener <rguenther@suse.de>
31614 PR tree-optimization/109123
31615 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
31616 Do not emit -Wuse-after-free late.
31617 (pass_waccess::check_call): Always check call pointer uses.
31619 2023-03-16 Richard Biener <rguenther@suse.de>
31621 PR tree-optimization/109141
31622 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
31623 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
31625 (renumber_gimple_stmt_uids): ... here and
31626 (renumber_gimple_stmt_uids_in_blocks): ... here.
31627 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
31628 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
31630 (pass_waccess::check_pointer_uses): Process all PHIs.
31632 2023-03-15 David Malcolm <dmalcolm@redhat.com>
31635 * diagnostic-format-sarif.cc (class sarif_invocation): New.
31636 (class sarif_ice_notification): New.
31637 (sarif_builder::m_invocation_obj): New field.
31638 (sarif_invocation::add_notification_for_ice): New.
31639 (sarif_invocation::prepare_to_flush): New.
31640 (sarif_ice_notification::sarif_ice_notification): New.
31641 (sarif_builder::sarif_builder): Add m_invocation_obj.
31642 (sarif_builder::end_diagnostic): Special-case DK_ICE and
31644 (sarif_builder::flush_to_file): Call prepare_to_flush on
31645 m_invocation_obj. Pass the latter to make_top_level_object.
31646 (sarif_builder::make_result_object): Move creation of "locations"
31648 (sarif_builder::make_locations_arr): ...this new function.
31649 (sarif_builder::make_top_level_object): Add "invocation_obj" param
31650 and pass it to make_run_object.
31651 (sarif_builder::make_run_object): Add "invocation_obj" param and
31653 (sarif_ice_handler): New callback.
31654 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
31655 * diagnostic.cc (diagnostic_initialize): Initialize new field
31657 (diagnostic_action_after_output): If it is set, make one attempt
31658 to call ice_handler_cb.
31659 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
31661 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
31663 * config/i386/i386-expand.cc (expand_vec_perm_blend):
31664 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
31665 and fix V2HImode handling.
31666 (expand_vec_perm_1): Try to emit BLEND instruction
31667 before MOVSS/MOVSD.
31668 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
31670 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
31672 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
31674 2023-03-15 Richard Biener <rguenther@suse.de>
31676 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
31677 Do not diagnose clobbers.
31679 2023-03-15 Richard Biener <rguenther@suse.de>
31681 PR tree-optimization/109139
31682 * tree-ssa-live.cc (remove_unused_locals): Look at the
31683 base address for unused decls on the LHS of .DEFERRED_INIT.
31685 2023-03-15 Xi Ruoyao <xry111@xry111.site>
31688 * builtins.cc (inline_string_cmp): Force the character
31689 difference into "result" pseudo-register, instead of reassign
31690 the pseudo-register.
31692 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31694 * config.gcc: Add thead.o to RISC-V extra_objs.
31695 * config/riscv/peephole.md: Add mempair peephole passes.
31696 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
31698 (th_mempair_operands_p): Likewise.
31699 (th_mempair_order_operands): Likewise.
31700 (th_mempair_prepare_save_restore_operands): Likewise.
31701 (th_mempair_save_restore_regs): Likewise.
31702 (th_mempair_output_move): Likewise.
31703 * config/riscv/riscv.cc (riscv_save_reg): Move code.
31704 (riscv_restore_reg): Move code.
31705 (riscv_for_each_saved_reg): Add code to emit mempair insns.
31706 * config/riscv/t-riscv: Add thead.cc.
31707 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
31709 (*th_mempair_store_<GPR:mode>2): Likewise.
31710 (*th_mempair_load_extendsidi2): Likewise.
31711 (*th_mempair_load_zero_extendsidi2): Likewise.
31712 * config/riscv/thead.cc: New file.
31714 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31716 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
31717 New constraint "th_f_fmv".
31718 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
31720 * config/riscv/riscv.cc (riscv_split_doubleword_move):
31721 Add split code for XTheadFmv.
31722 (riscv_secondary_memory_needed): XTheadFmv does not need
31724 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
31725 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
31726 movdf_hardfloat_rv32.
31727 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
31728 (th_fmv_x_w): New INSN.
31729 (th_fmv_x_hw): New INSN.
31731 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31733 * config/riscv/riscv.md (maddhisi4): New expand.
31734 (msubhisi4): New expand.
31735 * config/riscv/thead.md (*th_mula<mode>): New pattern.
31736 (*th_mulawsi): New pattern.
31737 (*th_mulawsi2): New pattern.
31738 (*th_maddhisi4): New pattern.
31739 (*th_sextw_maddhisi4): New pattern.
31740 (*th_muls<mode>): New pattern.
31741 (*th_mulswsi): New pattern.
31742 (*th_mulswsi2): New pattern.
31743 (*th_msubhisi4): New pattern.
31744 (*th_sextw_msubhisi4): New pattern.
31746 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31748 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
31749 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
31751 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
31753 (riscv_expand_conditional_move): New function.
31754 (riscv_expand_conditional_move_onesided): New function.
31755 * config/riscv/riscv.md: Add support for XTheadCondMov.
31756 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
31757 support for XTheadCondMov.
31758 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
31760 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31762 * config/riscv/bitmanip.md (clzdi2): New expand.
31763 (clzsi2): New expand.
31764 (ctz<mode>2): New expand.
31765 (popcount<mode>2): New expand.
31766 (<bitmanip_optab>si2): Rename INSN.
31767 (*<bitmanip_optab>si2): Hide INSN name.
31768 (<bitmanip_optab>di2): Rename INSN.
31769 (*<bitmanip_optab>di2): Hide INSN name.
31770 (rotrsi3): Remove INSN.
31771 (rotr<mode>3): Add expand.
31772 (*rotrsi3): New INSN.
31773 (rotrdi3): Rename INSN.
31774 (*rotrdi3): Hide INSN name.
31775 (rotrsi3_sext): Rename INSN.
31776 (*rotrsi3_sext): Hide INSN name.
31777 (bswap<mode>2): Remove INSN.
31778 (bswapdi2): Add expand.
31779 (bswapsi2): Add expand.
31780 (*bswap<mode>2): Hide INSN name.
31781 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
31783 * config/riscv/riscv.md (extv<mode>): New expand.
31784 (extzv<mode>): New expand.
31785 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
31786 (*th_ext<mode>): New INSN.
31787 (*th_extu<mode>): New INSN.
31788 (*th_clz<mode>2): New INSN.
31789 (*th_rev<mode>2): New INSN.
31791 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31793 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
31794 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
31796 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31798 * config/riscv/riscv.md: Include thead.md
31799 * config/riscv/thead.md: New file.
31801 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31803 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
31805 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31807 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
31808 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
31809 (MASK_XTHEADBB): New.
31810 (MASK_XTHEADBS): New.
31811 (MASK_XTHEADCMO): New.
31812 (MASK_XTHEADCONDMOV): New.
31813 (MASK_XTHEADFMEMIDX): New.
31814 (MASK_XTHEADFMV): New.
31815 (MASK_XTHEADINT): New.
31816 (MASK_XTHEADMAC): New.
31817 (MASK_XTHEADMEMIDX): New.
31818 (MASK_XTHEADMEMPAIR): New.
31819 (MASK_XTHEADSYNC): New.
31820 (TARGET_XTHEADBA): New.
31821 (TARGET_XTHEADBB): New.
31822 (TARGET_XTHEADBS): New.
31823 (TARGET_XTHEADCMO): New.
31824 (TARGET_XTHEADCONDMOV): New.
31825 (TARGET_XTHEADFMEMIDX): New.
31826 (TARGET_XTHEADFMV): New.
31827 (TARGET_XTHEADINT): New.
31828 (TARGET_XTHEADMAC): New.
31829 (TARGET_XTHEADMEMIDX): New.
31830 (TARGET_XTHEADMEMPAIR): new.
31831 (TARGET_XTHEADSYNC): New.
31832 * config/riscv/riscv.opt: Add riscv_xthead_subext.
31834 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
31837 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
31838 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
31839 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
31841 2023-03-14 Jakub Jelinek <jakub@redhat.com>
31844 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
31845 when lo is equal to dhi and hi is a MEM which uses dlo register.
31847 2023-03-14 Martin Jambor <mjambor@suse.cz>
31850 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
31851 global0 instead of zeroing when it does not have as many counts as
31854 2023-03-14 Martin Jambor <mjambor@suse.cz>
31857 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
31858 ipa count, remove assert, lenient_count_portion_handling, dump
31859 also orig_node_count.
31861 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
31863 * config/i386/i386-expand.cc (expand_vec_perm_movs):
31864 Handle V2SImode for TARGET_MMX_WITH_SSE.
31865 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
31866 using V2FI mode iterator to handle both V2SI and V2SF modes.
31868 2023-03-14 Sam James <sam@gentoo.org>
31870 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
31871 including <sstream> earlier.
31872 * system.h: Add INCLUDE_SSTREAM.
31874 2023-03-14 Richard Biener <rguenther@suse.de>
31876 * tree-ssa-live.cc (remove_unused_locals): Do not treat
31877 the .DEFERRED_INIT of a variable as use, instead remove
31878 that if it is the only use.
31880 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
31882 PR rtl-optimization/107762
31883 * expr.cc (emit_group_store): Revert latest change.
31885 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
31887 PR tree-optimization/109005
31888 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
31889 aggregate type check.
31891 2023-03-14 Jakub Jelinek <jakub@redhat.com>
31893 PR tree-optimization/109115
31894 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
31895 r.upper_bound () on r.undefined_p () range.
31897 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
31899 PR tree-optimization/106896
31900 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
31901 implementatoin with probability_in; avoid some asserts.
31903 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
31905 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
31907 2023-03-13 Sean Bright <sean@seanbright.com>
31909 * doc/invoke.texi (Warning Options): Remove errant 'See'
31912 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31914 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
31915 REG_OK_FOR_BASE_P): Remove.
31917 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31919 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
31920 (=vd,vd,vr,vr): Ditto.
31921 * config/riscv/vector.md: Ditto.
31923 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31925 * config/riscv/riscv-vector-builtins.cc
31926 (function_expander::use_compare_insn): Add operand predicate check.
31928 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31930 * config/riscv/vector.md: Fine tune RA constraints.
31932 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
31934 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
31935 hsaco assemble/link.
31937 2023-03-13 Richard Biener <rguenther@suse.de>
31939 PR tree-optimization/109046
31940 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
31941 piecewise complex loads.
31943 2023-03-12 Jakub Jelinek <jakub@redhat.com>
31945 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
31946 (aarch64_bf16_ptr_type_node): Adjust comment.
31947 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
31948 bfloat16_type_node rather than aarch64_bf16_type_node.
31949 (aarch64_libgcc_floating_mode_supported_p,
31950 aarch64_scalar_mode_supported_p): Also support BFmode.
31951 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
31952 (aarch64_invalid_binary_op): Remove BFmode related rejections.
31953 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
31954 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
31955 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
31956 aarch64_bf16_type_node.
31957 (aarch64_init_simd_builtin_types): Likewise.
31958 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
31959 which is created in tree.cc already.
31960 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
31962 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
31964 PR middle-end/109031
31965 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
31966 ensure that the type of x is as wide or wider than the type of a.
31968 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31971 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
31972 (*bitmask_shift_plus<mode>): New.
31973 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
31974 (@aarch64_bitmask_udiv<mode>3): Remove.
31975 * config/aarch64/aarch64.cc
31976 (aarch64_vectorize_can_special_div_by_constant,
31977 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
31978 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
31979 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
31981 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31984 * target.def (preferred_div_as_shifts_over_mult): New.
31985 * doc/tm.texi.in: Document it.
31986 * doc/tm.texi: Regenerate.
31987 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
31988 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
31989 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
31991 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31992 Richard Sandiford <richard.sandiford@arm.com>
31995 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
31998 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31999 Andrew MacLeod <amacleod@redhat.com>
32002 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
32003 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
32005 (gimple_range_op_handler::maybe_non_standard): New.
32006 * range-op.cc (class operator_widen_plus_signed,
32007 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
32008 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
32009 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
32010 operator_widen_mult_unsigned::wi_fold,
32011 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
32012 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
32013 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
32014 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
32016 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32019 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
32020 * doc/tm.texi.in: Likewise.
32021 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
32022 * expmed.cc (expand_divmod): Likewise.
32023 * expmed.h (expand_divmod): Likewise.
32024 * expr.cc (force_operand, expand_expr_divmod): Likewise.
32025 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
32026 * target.def (can_special_div_by_const): Remove.
32027 * target.h: Remove tree-core.h include
32028 * targhooks.cc (default_can_special_div_by_const): Remove.
32029 * targhooks.h (default_can_special_div_by_const): Remove.
32030 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
32031 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
32032 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
32034 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
32036 * doc/install.texi2html: Fix issue number typo in comment.
32038 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
32040 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
32043 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
32045 * doc/invoke.texi (Optimize Options): Add markup to
32046 description of asan-kernel-mem-intrinsic-prefix, and clarify
32049 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
32051 * doc/extend.texi (Named Address Spaces): Drop a redundant link
32054 2023-03-11 Jeff Law <jlaw@ventanamicro>
32057 * doc/extend.texi: Clarify Attribute Syntax a bit.
32059 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
32061 * doc/install.texi (Prerequisites): Suggest using newer versions
32063 (Final install): Clean up and modernize discussion of how to
32064 build or obtain the GCC manuals.
32065 * doc/install.texi2html: Update comment to point to the PR instead
32066 of "makeinfo 4.7 brokenness" (it's not specific to that version).
32068 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32071 * optabs.cc (expand_fix): For conversions from BFmode to integral,
32072 use shifts to convert it to SFmode first and then convert SFmode
32075 2023-03-10 Andrew Pinski <apinski@marvell.com>
32077 * config/aarch64/aarch64.md: Add a new define_split
32080 2023-03-10 Richard Biener <rguenther@suse.de>
32082 * tree-ssa-structalias.cc (solve_graph): Immediately
32083 iterate self-cycles.
32085 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32087 PR tree-optimization/109008
32088 * range-op-float.cc (float_widen_lhs_range): If not
32089 -frounding-math and not IBM double double format, extend lhs
32090 range just by 0.5ulp rather than 1ulp in each direction.
32092 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32095 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
32097 * config/i386/t-cygwin-w64: Remove.
32099 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32102 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
32103 C++14, don't declare as extern const arrays.
32104 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
32105 static constexpr member arrays for C++11 or C++14.
32106 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
32107 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
32108 (TREE_CODE_LENGTH): For C++11 or C++14 use
32109 tree_code_length_tmpl <0>::tree_code_length instead of
32111 * tree.cc (tree_code_type, tree_code_length): Remove.
32113 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32116 * common.opt (fcanon-prefix-map): New option.
32117 * opts.cc: Include file-prefix-map.h.
32118 (flag_canon_prefix_map): New variable.
32119 (common_handle_option): Handle OPT_fcanon_prefix_map.
32120 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
32121 * file-prefix-map.h (flag_canon_prefix_map): Declare.
32122 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
32124 (add_prefix_map): Initialize canonicalize member from
32125 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
32126 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
32127 use lrealpath result only for map->canonicalize map entries.
32128 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
32129 * opts-global.cc (handle_common_deferred_options): Clear
32130 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
32131 * doc/invoke.texi (-fcanon-prefix-map): Document.
32132 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
32133 see also for -fcanon-prefix-map.
32134 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
32136 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32139 * cgraphunit.cc (check_global_declaration): Don't warn for unused
32140 variables which have OPT_Wunused_variable warning suppressed.
32142 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32144 PR tree-optimization/109008
32145 * range-op-float.cc (float_widen_lhs_range): If lb is
32146 minimum representable finite number or ub is maximum
32147 representable finite number, instead of widening it to
32148 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
32149 Temporarily clear flag_finite_math_only when canonicalizing
32152 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32154 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
32155 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
32156 (gimple_fold_builtin): Ditto.
32157 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
32158 (class vleff): Ditto.
32160 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32161 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
32163 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
32164 (struct fault_load_def): Ditto.
32166 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32167 * config/riscv/riscv-vector-builtins.cc
32168 (rvv_arg_type_info::get_tree_type): Add size_ptr.
32169 (gimple_folder::gimple_folder): New class.
32170 (gimple_folder::fold): Ditto.
32171 (gimple_fold_builtin): New function.
32172 (get_read_vl_instance): Ditto.
32173 (get_read_vl_decl): Ditto.
32174 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
32175 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
32176 (get_read_vl_instance): New function.
32177 (get_read_vl_decl): Ditto.
32178 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
32179 (read_vl_insn_p): Ditto.
32180 (available_occurrence_p): Ditto.
32181 (backward_propagate_worthwhile_p): Ditto.
32182 (gen_vsetvl_pat): Adapt for vleff support.
32183 (get_forward_read_vl_insn): New function.
32184 (get_backward_fault_first_load_insn): Ditto.
32185 (source_equal_p): Adapt for vleff support.
32186 (first_ratio_invalid_for_second_sew_p): Remove.
32187 (first_ratio_invalid_for_second_lmul_p): Ditto.
32188 (first_lmul_less_than_second_lmul_p): Ditto.
32189 (first_ratio_less_than_second_ratio_p): Ditto.
32190 (support_relaxed_compatible_p): New function.
32191 (vector_insn_info::operator>): Remove.
32192 (vector_insn_info::operator>=): Refine.
32193 (vector_insn_info::parse_insn): Adapt for vleff support.
32194 (vector_insn_info::compatible_p): Ditto.
32195 (vector_insn_info::update_fault_first_load_avl): New function.
32196 (pass_vsetvl::transfer_after): Adapt for vleff support.
32197 (pass_vsetvl::demand_fusion): Ditto.
32198 (pass_vsetvl::cleanup_insns): Ditto.
32199 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
32200 redundant condtions.
32201 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
32202 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
32203 * config/riscv/riscv.md: Adapt for vleff support.
32204 * config/riscv/t-riscv: Ditto.
32205 * config/riscv/vector-iterators.md: New iterator.
32206 * config/riscv/vector.md (read_vlsi): New pattern.
32207 (read_vldi_zero_extend): Ditto.
32208 (@pred_fault_load<mode>): Ditto.
32210 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32212 * config/riscv/riscv-vector-builtins.cc
32213 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
32214 (function_expander::use_widen_ternop_insn): Ditto.
32215 * optabs.cc (maybe_gen_insn): Extend nops handling.
32217 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32219 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
32220 patterns according to RVV ISA.
32221 * config/riscv/vector-iterators.md: New iterators.
32222 * config/riscv/vector.md
32223 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
32224 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
32225 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
32226 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
32227 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
32228 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
32229 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
32230 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
32231 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
32232 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
32233 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
32234 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
32235 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
32236 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
32238 2023-03-10 Michael Collison <collison@rivosinc.com>
32240 * tree-vect-loop-manip.cc (vect_do_peeling): Use
32241 result of constant_lower_bound instead of vf for the lower
32242 bound of the epilog loop trip count.
32244 2023-03-09 Tamar Christina <tamar.christina@arm.com>
32246 * passes.cc (emergency_dump_function): Finish graph generation.
32248 2023-03-09 Tamar Christina <tamar.christina@arm.com>
32250 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
32251 and bottom bit only.
32253 2023-03-09 Andrew Pinski <apinski@marvell.com>
32255 PR tree-optimization/108980
32256 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
32257 Reorgnize the call to warning for not strict flexible arrays
32258 to be before the check of warned.
32260 2023-03-09 Jason Merrill <jason@redhat.com>
32262 * doc/extend.texi: Comment out __is_deducible docs.
32264 2023-03-09 Jason Merrill <jason@redhat.com>
32267 * doc/extend.texi (Type Traits):: Document __is_deducible.
32269 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
32272 * config.host: add object for x86_64-*-mingw*.
32273 * config/i386/sym-mingw32.cc: dummy file to attach
32275 * config/i386/utf8-mingw32.rc: windres resource file.
32276 * config/i386/winnt-utf8.manifest: XML manifest to
32278 * config/i386/x-mingw32: reference to x-mingw32-utf8.
32279 * config/i386/x-mingw32-utf8: Makefile fragment to
32280 embed UTF-8 manifest.
32282 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
32284 * lra-constraints.cc (process_alt_operands): Use operand modes for
32285 clobbered regs instead of the biggest access mode.
32287 2023-03-09 Richard Biener <rguenther@suse.de>
32289 PR middle-end/108995
32290 * fold-const.cc (extract_muldiv_1): Avoid folding
32291 (CST * b) / CST2 when sanitizing overflow and we rely on
32292 overflow being undefined.
32294 2023-03-09 Jakub Jelinek <jakub@redhat.com>
32295 Richard Biener <rguenther@suse.de>
32297 PR tree-optimization/109008
32298 * range-op-float.cc (float_widen_lhs_range): New function.
32299 (foperator_plus::op1_range, foperator_minus::op1_range,
32300 foperator_minus::op2_range, foperator_mult::op1_range,
32301 foperator_div::op1_range, foperator_div::op2_range): Use it.
32303 2023-03-07 Jonathan Grant <jg@jguk.org>
32306 * doc/invoke.texi (Instrumentation Options): Clarify
32307 LeakSanitizer behavior.
32309 2023-03-07 Benson Muite <benson_muite@emailplus.org>
32311 * doc/install.texi (Prerequisites): Add link to gmplib.org.
32313 2023-03-07 Pan Li <pan2.li@intel.com>
32314 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32318 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
32320 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
32321 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
32322 * genmodes.cc (adj_precision): New.
32323 (ADJUST_PRECISION): New.
32324 (emit_mode_adjustments): Handle ADJUST_PRECISION.
32326 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
32328 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
32330 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
32332 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
32333 {s|u}{max|min} in QI, HI and DI modes.
32334 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
32335 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
32336 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
32337 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
32340 2023-03-06 Richard Biener <rguenther@suse.de>
32342 PR tree-optimization/109025
32343 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
32344 the inner LC PHI use is the inner loop PHI latch definition
32345 before classifying an outer PHI as double reduction.
32347 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
32350 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
32352 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
32353 (X86_TUNE_USE_SCATTER): Likewise.
32355 2023-03-06 Xi Ruoyao <xry111@xry111.site>
32358 * config/loongarch/loongarch.h (FP_RETURN): Use
32359 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
32360 (UNITS_PER_FP_ARG): Likewise.
32362 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32364 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
32365 (pass_vsetvl::backward_demand_fusion): Ditto.
32367 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32368 SiYu Wu <siyu@isrc.iscas.ac.cn>
32370 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
32372 (riscv_sm3p1_<mode>): New.
32373 (riscv_sm4ed_<mode>): New.
32374 (riscv_sm4ks_<mode>): New.
32375 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
32376 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
32377 ZKSH's built-in functions.
32379 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32380 SiYu Wu <siyu@isrc.iscas.ac.cn>
32382 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
32383 (riscv_sha256sig1_<mode>): New.
32384 (riscv_sha256sum0_<mode>): New.
32385 (riscv_sha256sum1_<mode>): New.
32386 (riscv_sha512sig0h): New.
32387 (riscv_sha512sig0l): New.
32388 (riscv_sha512sig1h): New.
32389 (riscv_sha512sig1l): New.
32390 (riscv_sha512sum0r): New.
32391 (riscv_sha512sum1r): New.
32392 (riscv_sha512sig0): New.
32393 (riscv_sha512sig1): New.
32394 (riscv_sha512sum0): New.
32395 (riscv_sha512sum1): New.
32396 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
32397 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
32398 built-in functions.
32399 (DIRECT_BUILTIN): Add new.
32401 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32402 SiYu Wu <siyu@isrc.iscas.ac.cn>
32404 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
32406 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
32407 (riscv_aes32dsmi): New.
32408 (riscv_aes64ds): New.
32409 (riscv_aes64dsm): New.
32410 (riscv_aes64im): New.
32411 (riscv_aes64ks1i): New.
32412 (riscv_aes64ks2): New.
32413 (riscv_aes32esi): New.
32414 (riscv_aes32esmi): New.
32415 (riscv_aes64es): New.
32416 (riscv_aes64esm): New.
32417 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
32418 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
32419 ZKNE's built-in functions.
32421 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32422 SiYu Wu <siyu@isrc.iscas.ac.cn>
32424 * config/riscv/bitmanip.md: Add ZBKB's instructions.
32425 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
32426 * config/riscv/riscv.md: Add new type for crypto instructions.
32427 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
32429 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
32430 extension's built-in function file.
32432 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32433 SiYu Wu <siyu@isrc.iscas.ac.cn>
32435 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
32436 (RISCV_FTYPE_NAME3): New.
32437 (RISCV_ATYPE_QI): New.
32438 (RISCV_ATYPE_HI): New.
32439 (RISCV_FTYPE_ATYPES2): New.
32440 (RISCV_FTYPE_ATYPES3): New.
32441 * config/riscv/riscv-ftypes.def (2): New.
32444 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
32446 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
32449 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32450 kito-cheng <kito.cheng@sifive.com>
32452 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
32453 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
32454 (riscv_register_pragmas): Add builtin function check call.
32455 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
32456 (check_builtin_call): New function.
32457 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
32458 (class vreinterpret): Ditto.
32459 (class vlmul_ext): Ditto.
32460 (class vlmul_trunc): Ditto.
32461 (class vset): Ditto.
32462 (class vget): Ditto.
32464 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32465 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
32481 (vundefined): Add new intrinsic.
32482 (vreinterpret): Ditto.
32483 (vlmul_ext): Ditto.
32484 (vlmul_trunc): Ditto.
32487 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
32488 (struct narrow_alu_def): Ditto.
32489 (struct reduc_alu_def): Ditto.
32490 (struct vundefined_def): Ditto.
32491 (struct misc_def): Ditto.
32492 (struct vset_def): Ditto.
32493 (struct vget_def): Ditto.
32495 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32496 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
32497 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
32498 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
32499 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
32500 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
32501 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
32502 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
32503 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
32504 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
32505 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
32506 (DEF_RVV_LMUL1_OPS): Ditto.
32507 (DEF_RVV_LMUL2_OPS): Ditto.
32508 (DEF_RVV_LMUL4_OPS): Ditto.
32509 (vint16mf4_t): Ditto.
32510 (vint16mf2_t): Ditto.
32511 (vint16m1_t): Ditto.
32512 (vint16m2_t): Ditto.
32513 (vint16m4_t): Ditto.
32514 (vint16m8_t): Ditto.
32515 (vint32mf2_t): Ditto.
32516 (vint32m1_t): Ditto.
32517 (vint32m2_t): Ditto.
32518 (vint32m4_t): Ditto.
32519 (vint32m8_t): Ditto.
32520 (vint64m1_t): Ditto.
32521 (vint64m2_t): Ditto.
32522 (vint64m4_t): Ditto.
32523 (vint64m8_t): Ditto.
32524 (vuint16mf4_t): Ditto.
32525 (vuint16mf2_t): Ditto.
32526 (vuint16m1_t): Ditto.
32527 (vuint16m2_t): Ditto.
32528 (vuint16m4_t): Ditto.
32529 (vuint16m8_t): Ditto.
32530 (vuint32mf2_t): Ditto.
32531 (vuint32m1_t): Ditto.
32532 (vuint32m2_t): Ditto.
32533 (vuint32m4_t): Ditto.
32534 (vuint32m8_t): Ditto.
32535 (vuint64m1_t): Ditto.
32536 (vuint64m2_t): Ditto.
32537 (vuint64m4_t): Ditto.
32538 (vuint64m8_t): Ditto.
32539 (vint8mf4_t): Ditto.
32540 (vint8mf2_t): Ditto.
32541 (vint8m1_t): Ditto.
32542 (vint8m2_t): Ditto.
32543 (vint8m4_t): Ditto.
32544 (vint8m8_t): Ditto.
32545 (vuint8mf4_t): Ditto.
32546 (vuint8mf2_t): Ditto.
32547 (vuint8m1_t): Ditto.
32548 (vuint8m2_t): Ditto.
32549 (vuint8m4_t): Ditto.
32550 (vuint8m8_t): Ditto.
32551 (vint8mf8_t): Ditto.
32552 (vuint8mf8_t): Ditto.
32553 (vfloat32mf2_t): Ditto.
32554 (vfloat32m1_t): Ditto.
32555 (vfloat32m2_t): Ditto.
32556 (vfloat32m4_t): Ditto.
32557 (vfloat64m1_t): Ditto.
32558 (vfloat64m2_t): Ditto.
32559 (vfloat64m4_t): Ditto.
32560 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
32561 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
32562 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
32563 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
32564 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
32565 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
32566 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
32567 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
32568 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
32569 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
32570 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
32571 (DEF_RVV_LMUL1_OPS): Ditto.
32572 (DEF_RVV_LMUL2_OPS): Ditto.
32573 (DEF_RVV_LMUL4_OPS): Ditto.
32574 (DEF_RVV_TYPE_INDEX): Ditto.
32575 (required_extensions_p): Adapt for new intrinsic support/
32576 (get_required_extensions): New function.
32577 (check_required_extensions): Ditto.
32578 (unsigned_base_type_p): Remove.
32579 (rvv_arg_type_info::get_scalar_ptr_type): New function.
32580 (get_mode_for_bitsize): Remove.
32581 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
32582 (rvv_arg_type_info::get_base_vector_type): Ditto.
32583 (rvv_arg_type_info::get_function_type_index): Ditto.
32584 (DEF_RVV_BASE_TYPE): New def.
32585 (function_builder::apply_predication): New class.
32586 (function_expander::mask_mode): Ditto.
32587 (function_checker::function_checker): Ditto.
32588 (function_checker::report_non_ice): Ditto.
32589 (function_checker::report_out_of_range): Ditto.
32590 (function_checker::require_immediate): Ditto.
32591 (function_checker::require_immediate_range): Ditto.
32592 (function_checker::check): Ditto.
32593 (check_builtin_call): Ditto.
32594 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
32595 (DEF_RVV_BASE_TYPE): Ditto.
32596 (DEF_RVV_TYPE_INDEX): Ditto.
32597 (vbool64_t): Ditto.
32598 (vbool32_t): Ditto.
32599 (vbool16_t): Ditto.
32604 (vuint8mf8_t): Ditto.
32605 (vuint8mf4_t): Ditto.
32606 (vuint8mf2_t): Ditto.
32607 (vuint8m1_t): Ditto.
32608 (vuint8m2_t): Ditto.
32609 (vint8m4_t): Ditto.
32610 (vuint8m4_t): Ditto.
32611 (vint8m8_t): Ditto.
32612 (vuint8m8_t): Ditto.
32613 (vint16mf4_t): Ditto.
32614 (vuint16mf2_t): Ditto.
32615 (vuint16m1_t): Ditto.
32616 (vuint16m2_t): Ditto.
32617 (vuint16m4_t): Ditto.
32618 (vuint16m8_t): Ditto.
32619 (vint32mf2_t): Ditto.
32620 (vuint32m1_t): Ditto.
32621 (vuint32m2_t): Ditto.
32622 (vuint32m4_t): Ditto.
32623 (vuint32m8_t): Ditto.
32624 (vuint64m1_t): Ditto.
32625 (vuint64m2_t): Ditto.
32626 (vuint64m4_t): Ditto.
32627 (vuint64m8_t): Ditto.
32628 (vfloat32mf2_t): Ditto.
32629 (vfloat32m1_t): Ditto.
32630 (vfloat32m2_t): Ditto.
32631 (vfloat32m4_t): Ditto.
32632 (vfloat32m8_t): Ditto.
32633 (vfloat64m1_t): Ditto.
32634 (vfloat64m4_t): Ditto.
32635 (vector): Move it def.
32638 (signed_vector): Ditto.
32639 (unsigned_vector): Ditto.
32640 (unsigned_scalar): Ditto.
32641 (vector_ptr): Ditto.
32642 (scalar_ptr): Ditto.
32643 (scalar_const_ptr): Ditto.
32647 (unsigned_long): Ditto.
32649 (eew8_index): Ditto.
32650 (eew16_index): Ditto.
32651 (eew32_index): Ditto.
32652 (eew64_index): Ditto.
32653 (shift_vector): Ditto.
32654 (double_trunc_vector): Ditto.
32655 (quad_trunc_vector): Ditto.
32656 (oct_trunc_vector): Ditto.
32657 (double_trunc_scalar): Ditto.
32658 (double_trunc_signed_vector): Ditto.
32659 (double_trunc_unsigned_vector): Ditto.
32660 (double_trunc_unsigned_scalar): Ditto.
32661 (double_trunc_float_vector): Ditto.
32662 (float_vector): Ditto.
32663 (lmul1_vector): Ditto.
32664 (widen_lmul1_vector): Ditto.
32665 (eew8_interpret): Ditto.
32666 (eew16_interpret): Ditto.
32667 (eew32_interpret): Ditto.
32668 (eew64_interpret): Ditto.
32669 (vlmul_ext_x2): Ditto.
32670 (vlmul_ext_x4): Ditto.
32671 (vlmul_ext_x8): Ditto.
32672 (vlmul_ext_x16): Ditto.
32673 (vlmul_ext_x32): Ditto.
32674 (vlmul_ext_x64): Ditto.
32675 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
32676 (struct function_type_info): New function.
32677 (struct rvv_arg_type_info): Ditto.
32678 (class function_checker): New class.
32679 (rvv_arg_type_info::get_scalar_type): New function.
32680 (rvv_arg_type_info::get_vector_type): Ditto.
32681 (function_expander::ret_mode): New function.
32682 (function_checker::arg_mode): Ditto.
32683 (function_checker::ret_mode): Ditto.
32684 * config/riscv/t-riscv: Add generator.
32685 * config/riscv/vector-iterators.md: New iterators.
32686 * config/riscv/vector.md (vundefined<mode>): New pattern.
32687 (@vundefined<mode>): Ditto.
32688 (@vreinterpret<mode>): Ditto.
32689 (@vlmul_extx2<mode>): Ditto.
32690 (@vlmul_extx4<mode>): Ditto.
32691 (@vlmul_extx8<mode>): Ditto.
32692 (@vlmul_extx16<mode>): Ditto.
32693 (@vlmul_extx32<mode>): Ditto.
32694 (@vlmul_extx64<mode>): Ditto.
32695 (*vlmul_extx2<mode>): Ditto.
32696 (*vlmul_extx4<mode>): Ditto.
32697 (*vlmul_extx8<mode>): Ditto.
32698 (*vlmul_extx16<mode>): Ditto.
32699 (*vlmul_extx32<mode>): Ditto.
32700 (*vlmul_extx64<mode>): Ditto.
32701 * config/riscv/genrvv-type-indexer.cc: New file.
32703 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32705 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
32706 (slide1_sew64_helper): New function.
32707 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
32708 (get_unknown_min_value): Ditto.
32709 (force_vector_length_operand): Ditto.
32710 (gen_no_side_effects_vsetvl_rtx): Ditto.
32711 (get_vl_x2_rtx): Ditto.
32712 (slide1_sew64_helper): Ditto.
32713 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
32714 (class vrgather): Ditto.
32715 (class vrgatherei16): Ditto.
32716 (class vcompress): Ditto.
32718 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32719 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
32720 (vslidedown): Ditto.
32721 (vslide1up): Ditto.
32722 (vslide1down): Ditto.
32723 (vfslide1up): Ditto.
32724 (vfslide1down): Ditto.
32726 (vrgatherei16): Ditto.
32727 (vcompress): Ditto.
32728 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
32729 (vint8mf8_t): Ditto.
32730 (vint8mf4_t): Ditto.
32731 (vint8mf2_t): Ditto.
32732 (vint8m1_t): Ditto.
32733 (vint8m2_t): Ditto.
32734 (vint8m4_t): Ditto.
32735 (vint16mf4_t): Ditto.
32736 (vint16mf2_t): Ditto.
32737 (vint16m1_t): Ditto.
32738 (vint16m2_t): Ditto.
32739 (vint16m4_t): Ditto.
32740 (vint16m8_t): Ditto.
32741 (vint32mf2_t): Ditto.
32742 (vint32m1_t): Ditto.
32743 (vint32m2_t): Ditto.
32744 (vint32m4_t): Ditto.
32745 (vint32m8_t): Ditto.
32746 (vint64m1_t): Ditto.
32747 (vint64m2_t): Ditto.
32748 (vint64m4_t): Ditto.
32749 (vint64m8_t): Ditto.
32750 (vuint8mf8_t): Ditto.
32751 (vuint8mf4_t): Ditto.
32752 (vuint8mf2_t): Ditto.
32753 (vuint8m1_t): Ditto.
32754 (vuint8m2_t): Ditto.
32755 (vuint8m4_t): Ditto.
32756 (vuint16mf4_t): Ditto.
32757 (vuint16mf2_t): Ditto.
32758 (vuint16m1_t): Ditto.
32759 (vuint16m2_t): Ditto.
32760 (vuint16m4_t): Ditto.
32761 (vuint16m8_t): Ditto.
32762 (vuint32mf2_t): Ditto.
32763 (vuint32m1_t): Ditto.
32764 (vuint32m2_t): Ditto.
32765 (vuint32m4_t): Ditto.
32766 (vuint32m8_t): Ditto.
32767 (vuint64m1_t): Ditto.
32768 (vuint64m2_t): Ditto.
32769 (vuint64m4_t): Ditto.
32770 (vuint64m8_t): Ditto.
32771 (vfloat32mf2_t): Ditto.
32772 (vfloat32m1_t): Ditto.
32773 (vfloat32m2_t): Ditto.
32774 (vfloat32m4_t): Ditto.
32775 (vfloat32m8_t): Ditto.
32776 (vfloat64m1_t): Ditto.
32777 (vfloat64m2_t): Ditto.
32778 (vfloat64m4_t): Ditto.
32779 (vfloat64m8_t): Ditto.
32780 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
32781 * config/riscv/riscv.md: Adjust RVV instruction types.
32782 * config/riscv/vector-iterators.md (down): New iterator.
32783 (=vd,vr): New attribute.
32784 (UNSPEC_VSLIDE1UP): New unspec.
32785 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
32786 (*pred_slide<ud><mode>): Ditto.
32787 (*pred_slide<ud><mode>_extended): Ditto.
32788 (@pred_gather<mode>): Ditto.
32789 (@pred_gather<mode>_scalar): Ditto.
32790 (@pred_gatherei16<mode>): Ditto.
32791 (@pred_compress<mode>): Ditto.
32793 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32795 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
32797 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32799 * config/riscv/constraints.md (Wb1): New constraint.
32800 * config/riscv/predicates.md
32801 (vector_least_significant_set_mask_operand): New predicate.
32802 (vector_broadcast_mask_operand): Ditto.
32803 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
32804 (gen_scalar_move_mask): New function.
32805 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
32806 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
32807 (class vmv_s): Ditto.
32809 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32810 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
32814 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
32816 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32817 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
32818 (function_expander::use_exact_insn): New function.
32819 (function_expander::use_contiguous_load_insn): New function.
32820 (function_expander::use_contiguous_store_insn): New function.
32821 (function_expander::use_ternop_insn): New function.
32822 (function_expander::use_widen_ternop_insn): New function.
32823 (function_expander::use_scalar_move_insn): New function.
32824 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
32825 * config/riscv/riscv-vector-builtins.h
32826 (function_expander::add_scalar_move_mask_operand): New class.
32827 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
32828 (scalar_move_insn_p): Ditto.
32829 (has_vsetvl_killed_avl_p): Ditto.
32830 (anticipatable_occurrence_p): Ditto.
32831 (insert_vsetvl): Ditto.
32832 (get_vl_vtype_info): Ditto.
32833 (calculate_sew): Ditto.
32834 (calculate_vlmul): Ditto.
32835 (incompatible_avl_p): Ditto.
32836 (different_sew_p): Ditto.
32837 (different_lmul_p): Ditto.
32838 (different_ratio_p): Ditto.
32839 (different_tail_policy_p): Ditto.
32840 (different_mask_policy_p): Ditto.
32841 (possible_zero_avl_p): Ditto.
32842 (first_ratio_invalid_for_second_sew_p): Ditto.
32843 (first_ratio_invalid_for_second_lmul_p): Ditto.
32844 (second_ratio_invalid_for_first_sew_p): Ditto.
32845 (second_ratio_invalid_for_first_lmul_p): Ditto.
32846 (second_sew_less_than_first_sew_p): Ditto.
32847 (first_sew_less_than_second_sew_p): Ditto.
32848 (compare_lmul): Ditto.
32849 (second_lmul_less_than_first_lmul_p): Ditto.
32850 (first_lmul_less_than_second_lmul_p): Ditto.
32851 (first_ratio_less_than_second_ratio_p): Ditto.
32852 (second_ratio_less_than_first_ratio_p): Ditto.
32853 (DEF_INCOMPATIBLE_COND): Ditto.
32854 (greatest_sew): Ditto.
32855 (first_sew): Ditto.
32856 (second_sew): Ditto.
32857 (first_vlmul): Ditto.
32858 (second_vlmul): Ditto.
32859 (first_ratio): Ditto.
32860 (second_ratio): Ditto.
32861 (vlmul_for_first_sew_second_ratio): Ditto.
32862 (ratio_for_second_sew_first_vlmul): Ditto.
32863 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
32864 (always_unavailable): Ditto.
32865 (avl_unavailable_p): Ditto.
32866 (sew_unavailable_p): Ditto.
32867 (lmul_unavailable_p): Ditto.
32868 (ge_sew_unavailable_p): Ditto.
32869 (ge_sew_lmul_unavailable_p): Ditto.
32870 (ge_sew_ratio_unavailable_p): Ditto.
32871 (DEF_UNAVAILABLE_COND): Ditto.
32872 (same_sew_lmul_demand_p): Ditto.
32873 (propagate_avl_across_demands_p): Ditto.
32874 (reg_available_p): Ditto.
32875 (avl_info::has_non_zero_avl): Ditto.
32876 (vl_vtype_info::has_non_zero_avl): Ditto.
32877 (vector_insn_info::operator>=): Refactor.
32878 (vector_insn_info::parse_insn): Adjust for scalar move.
32879 (vector_insn_info::demand_vl_vtype): Remove.
32880 (vector_insn_info::compatible_p): New function.
32881 (vector_insn_info::compatible_avl_p): Ditto.
32882 (vector_insn_info::compatible_vtype_p): Ditto.
32883 (vector_insn_info::available_p): Ditto.
32884 (vector_insn_info::merge): Ditto.
32885 (vector_insn_info::fuse_avl): Ditto.
32886 (vector_insn_info::fuse_sew_lmul): Ditto.
32887 (vector_insn_info::fuse_tail_policy): Ditto.
32888 (vector_insn_info::fuse_mask_policy): Ditto.
32889 (vector_insn_info::dump): Ditto.
32890 (vector_infos_manager::release): Ditto.
32891 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
32892 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
32893 (pass_vsetvl::hard_empty_block_p): Ditto.
32894 (pass_vsetvl::backward_demand_fusion): Ditto.
32895 (pass_vsetvl::forward_demand_fusion): Ditto.
32896 (pass_vsetvl::refine_vsetvls): Ditto.
32897 (pass_vsetvl::cleanup_vsetvls): Ditto.
32898 (pass_vsetvl::commit_vsetvls): Ditto.
32899 (pass_vsetvl::propagate_avl): Ditto.
32900 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
32901 (struct demands_pair): Ditto.
32902 (struct demands_cond): Ditto.
32903 (struct demands_fuse_rule): Ditto.
32904 * config/riscv/vector-iterators.md: New iterator.
32905 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
32906 (*pred_broadcast<mode>): Ditto.
32907 (*pred_broadcast<mode>_extended_scalar): Ditto.
32908 (@pred_extract_first<mode>): Ditto.
32909 (*pred_extract_first<mode>): Ditto.
32910 (@pred_extract_first_trunc<mode>): Ditto.
32911 * config/riscv/riscv-vsetvl.def: New file.
32913 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
32915 * config/riscv/bitmanip.md: allow 0 constant in max/min
32918 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
32920 * config/riscv/bitmanip.md: Fix wrong index in the check.
32922 2023-03-04 Jakub Jelinek <jakub@redhat.com>
32924 PR middle-end/109006
32925 * vec.cc (test_auto_alias): Adjust comment for removal of
32927 * read-rtl-function.cc (function_reader::parse_block): Likewise.
32928 * gdbhooks.py: Likewise.
32930 2023-03-04 Jakub Jelinek <jakub@redhat.com>
32932 PR testsuite/108973
32933 * selftest-diagnostic.cc
32934 (test_diagnostic_context::test_diagnostic_context): Set
32935 caret_max_width to 80.
32937 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32939 * gimple-ssa-warn-access.cc
32940 (pass_waccess::check_dangling_stores): Skip non-stores.
32942 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32944 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
32945 after vmsr and vmrs, and lower the case of P0.
32947 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
32949 PR middle-end/109006
32950 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
32952 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
32954 PR middle-end/109006
32955 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
32957 2023-03-03 Jakub Jelinek <jakub@redhat.com>
32960 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
32961 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
32962 suppressed on stmt. For [static %E] warning, print access_nelts
32963 rather than access_size. Fix up comment wording.
32965 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
32967 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
32968 arch14 instead of z16.
32970 2023-03-03 Anthony Green <green@moxielogic.com>
32972 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
32974 2023-03-03 Anthony Green <green@moxielogic.com>
32976 * config/moxie/constraints.md (A, B, W): Change
32977 define_constraint to define_memory_constraint.
32979 2023-03-03 Xi Ruoyao <xry111@xry111.site>
32981 * toplev.cc (process_options): Fix the spelling of
32982 "-fstack-clash-protection".
32984 2023-03-03 Richard Biener <rguenther@suse.de>
32986 PR tree-optimization/109002
32987 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
32988 PHI-translate ANTIC_IN.
32990 2023-03-03 Jakub Jelinek <jakub@redhat.com>
32992 PR tree-optimization/108988
32993 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
32994 size_type_node before passing it as argument to fwrite. Formatting
32997 2023-03-03 Richard Biener <rguenther@suse.de>
33000 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
33001 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
33002 * config/i386/i386-features.h (scalar_chain::max_visits): New.
33003 (scalar_chain::build): Add bitmap parameter, return boolean.
33004 (scalar_chain::add_insn): Likewise.
33005 (scalar_chain::analyze_register_chain): Likewise.
33006 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
33007 Initialize max_visits.
33008 (scalar_chain::analyze_register_chain): When we exhaust
33009 max_visits, abort. Also abort when running into any
33011 (scalar_chain::add_insn): Propagate abort.
33012 (scalar_chain::build): Likewise. When aborting amend
33013 the set of disallowed insn with the insns set.
33014 (convert_scalars_to_vector): Adjust. Do not convert aborted
33017 2023-03-03 Richard Biener <rguenther@suse.de>
33020 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
33021 generate a DIE for a function scope static.
33023 2023-03-03 Alexandre Oliva <oliva@adacore.com>
33025 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
33027 2023-03-02 Jakub Jelinek <jakub@redhat.com>
33030 * target.h (emit_support_tinfos_callback): New typedef.
33031 * targhooks.h (default_emit_support_tinfos): Declare.
33032 * targhooks.cc (default_emit_support_tinfos): New function.
33033 * target.def (emit_support_tinfos): New target hook.
33034 * doc/tm.texi.in (emit_support_tinfos): Document it.
33035 * doc/tm.texi: Regenerated.
33036 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
33037 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
33039 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
33041 * ira-costs.cc: Include print-rtl.h.
33042 (record_reg_classes, scan_one_insn): Add code to print debug info.
33043 (record_operand_costs): Find and use smaller cost for hard reg
33046 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
33047 Paul-Antoine Arras <pa@codesourcery.com>
33049 * builtins.cc (mathfn_built_in_explicit): New.
33050 * config/gcn/gcn.cc: Include case-cfn-macros.h.
33051 (mathfn_built_in_explicit): Add prototype.
33052 (gcn_vectorize_builtin_vectorized_function): New.
33053 (gcn_libc_has_function): New.
33054 (TARGET_LIBC_HAS_FUNCTION): Define.
33055 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
33057 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
33059 PR tree-optimization/108979
33060 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
33061 operations on invariants.
33063 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
33065 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
33066 * config/s390/s390.cc (s390_option_override_internal): Make
33067 partial vector usage the default from z13 on.
33068 * config/s390/vector.md (len_load_v16qi): Add.
33069 (len_store_v16qi): Add.
33071 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33073 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
33074 of constant 0 offset.
33076 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
33078 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
33080 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
33082 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
33084 * config.gcc: add -with-{no-}msa build option.
33085 * config/mips/mips.h: Likewise.
33086 * doc/install.texi: Likewise.
33088 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
33090 PR tree-optimization/108603
33091 * explow.cc (convert_memory_address_addr_space_1): Only wrap
33092 the result of a recursive call in a CONST if no instructions
33095 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
33097 PR tree-optimization/108430
33098 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
33099 of inverted condition.
33101 2023-03-02 Jakub Jelinek <jakub@redhat.com>
33104 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
33105 comparison copy the bytes from ptr to a temporary buffer and clearing
33106 padding bits in there.
33108 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
33110 PR middle-end/108545
33111 * gimplify.cc (struct tree_operand_hash_no_se): New.
33112 (omp_index_mapping_groups_1, omp_index_mapping_groups,
33113 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
33114 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
33115 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
33116 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
33117 of tree_operand_hash.
33119 2023-03-01 LIU Hao <lh_mouse@126.com>
33122 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
33123 Remove the size limit `pch_VA_max_size`
33125 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
33127 PR middle-end/108546
33128 * omp-low.cc (lower_omp_target): Remove optional handling
33129 on the receiver side, i.e. inside target (data), for
33132 2023-03-01 Jakub Jelinek <jakub@redhat.com>
33135 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
33136 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
33138 2023-03-01 Richard Biener <rguenther@suse.de>
33140 PR tree-optimization/108970
33141 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
33142 Check we can copy the BBs.
33143 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
33145 (vect_do_peeling): Streamline error handling.
33147 2023-03-01 Richard Biener <rguenther@suse.de>
33149 PR tree-optimization/108950
33150 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
33151 Check oprnd0 is defined in the loop.
33152 * tree-vect-loop.cc (vectorizable_reduction): Record all
33153 operands vector types, compute that of invariants and
33154 properly update their SLP nodes.
33156 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
33159 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
33160 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
33162 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
33164 PR middle-end/107411
33165 PR middle-end/107411
33166 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
33168 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
33169 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
33171 2023-02-28 Jakub Jelinek <jakub@redhat.com>
33173 PR sanitizer/108894
33174 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
33175 comparison rather than index > bound.
33176 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
33177 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
33178 * doc/invoke.texi (-fsanitize=bounds): Document that whether
33179 flexible array member-like arrays are instrumented or not depends
33180 on -fstrict-flex-arrays* options of strict_flex_array attributes.
33181 (-fsanitize=bounds-strict): Document that flexible array members
33182 are not instrumented.
33184 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
33188 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
33189 (fmod<mode>3): Ditto.
33190 (fpremxf4_i387): Ditto.
33191 (reminderxf3): Ditto.
33192 (reminder<mode>3): Ditto.
33193 (fprem1xf4_i387): Ditto.
33195 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
33197 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
33198 generating FFS with mismatched operand and result modes, by using
33199 an explicit SIGN_EXTEND/ZERO_EXTEND.
33200 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
33201 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
33203 2023-02-27 Patrick Palka <ppalka@redhat.com>
33205 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
33206 * lra-int.h (lra_change_class): Likewise.
33207 * recog.h (which_op_alt): Likewise.
33208 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
33211 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33213 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
33215 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
33217 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
33218 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
33220 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
33222 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
33223 (xtensa_get_config_v3): New functions.
33225 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33227 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
33229 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
33231 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
33232 the macro to 0x1000000000.
33234 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
33237 * doc/gm2.texi (-fm2-pathname): New option documented.
33238 (-fm2-pathnameI): New option documented.
33239 (-fm2-prefix=): New option documented.
33240 (-fruntime-modules=): Update default module list.
33242 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
33245 * config/xtensa/xtensa-protos.h
33246 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
33247 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
33248 to xtensa_expand_call.
33249 (xtensa_expand_call): Emit the call and add a clobber expression
33250 for the static chain to it in case of windowed ABI.
33251 * config/xtensa/xtensa.md (call, call_value, sibcall)
33252 (sibcall_value): Call xtensa_expand_call and complete expansion
33253 right after that call.
33255 2023-02-24 Richard Biener <rguenther@suse.de>
33257 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
33258 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
33259 changing alignment of vec<T, A, vl_embed> and simplifying
33261 (vec<T, A, vl_embed>::address): Compute as this + 1.
33262 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
33263 vector instead of the offset of the m_vecdata member.
33264 (auto_vec<T, N>::m_data): Turn storage into
33265 uninitialized unsigned char.
33266 (auto_vec<T, N>::auto_vec): Allow allocation of one
33267 stack member. Initialize m_vec in a special way to
33268 avoid later stringop overflow diagnostics.
33269 * vec.cc (test_auto_alias): New.
33270 (vec_cc_tests): Call it.
33272 2023-02-24 Richard Biener <rguenther@suse.de>
33274 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
33275 take a const reference to the object, use address to
33277 (vec<T, A, vl_embed>::contains): Use address to access data.
33278 (vec<T, A, vl_embed>::operator[]): Use address instead of
33279 m_vecdata to access data.
33280 (vec<T, A, vl_embed>::iterate): Likewise.
33281 (vec<T, A, vl_embed>::copy): Likewise.
33282 (vec<T, A, vl_embed>::quick_push): Likewise.
33283 (vec<T, A, vl_embed>::pop): Likewise.
33284 (vec<T, A, vl_embed>::quick_insert): Likewise.
33285 (vec<T, A, vl_embed>::ordered_remove): Likewise.
33286 (vec<T, A, vl_embed>::unordered_remove): Likewise.
33287 (vec<T, A, vl_embed>::block_remove): Likewise.
33288 (vec<T, A, vl_heap>::address): Likewise.
33290 2023-02-24 Martin Liska <mliska@suse.cz>
33292 PR sanitizer/108834
33293 * asan.cc (asan_add_global): Use proper TU name for normal
33294 global variables (and aux_base_name for the artificial one).
33296 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33298 * config/i386/i386-builtin.def: Update description of BDESC
33299 and BDESC_FIRST in file comment to include mask2.
33301 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33303 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
33305 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33307 PR middle-end/108854
33308 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
33309 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
33310 nodes and adjust their DECL_CONTEXT.
33312 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33315 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
33316 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
33317 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
33318 __builtin_ia32_cvtne2ps2bf16_v8bf,
33319 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
33320 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
33321 __builtin_ia32_cvtneps2bf16_v8sf_mask,
33322 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
33323 __builtin_ia32_cvtneps2bf16_v4sf_mask,
33324 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
33325 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
33326 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
33327 __builtin_ia32_dpbf16ps_v4sf_mask,
33328 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
33329 OPTION_MASK_ISA_AVX512VL.
33331 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
33333 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
33334 Add non-compact 32-bit multilibs.
33336 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
33338 * config/mips/mips.md (*clo<mode>2): New pattern.
33340 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
33342 * config/mips/mips.h (machine_function): New variable
33343 use_hazard_barrier_return_p.
33344 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
33345 (mips_hb_return_internal): New insn pattern.
33346 * config/mips/mips.cc (mips_attribute_table): Add attribute
33347 use_hazard_barrier_return.
33348 (mips_use_hazard_barrier_return_p): New static function.
33349 (mips_function_attr_inlinable_p): Likewise.
33350 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
33351 Emit error for unsupported architecture choice.
33352 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
33353 Return false for use_hazard_barrier_return.
33354 (mips_expand_epilogue): Emit hazard barrier return.
33355 * doc/extend.texi: Document use_hazard_barrier_return.
33357 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33359 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
33360 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
33361 for the gcc-internal headers.
33363 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33365 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
33366 and $(POSTCOMPILE) instead of manual dependency listing.
33367 * config/xtensa/xtensa-dynconfig.c: Rename to ...
33368 * config/xtensa/xtensa-dynconfig.cc: ... this.
33370 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
33372 * doc/cfg.texi: Reorder index entries around @items.
33373 * doc/cpp.texi: Ditto.
33374 * doc/cppenv.texi: Ditto.
33375 * doc/cppopts.texi: Ditto.
33376 * doc/generic.texi: Ditto.
33377 * doc/install.texi: Ditto.
33378 * doc/extend.texi: Ditto.
33379 * doc/invoke.texi: Ditto.
33380 * doc/md.texi: Ditto.
33381 * doc/rtl.texi: Ditto.
33382 * doc/tm.texi.in: Ditto.
33383 * doc/trouble.texi: Ditto.
33384 * doc/tm.texi: Regenerate.
33386 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33388 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
33389 the occurrence of general-purpose register used only once and for
33390 transferring intermediate value.
33392 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33394 * config/xtensa/xtensa.cc (machine_function): Add new member
33395 'eliminated_callee_saved_bmp'.
33396 (xtensa_can_eliminate_callee_saved_reg_p): New function to
33397 determine whether the register can be eliminated or not.
33398 (xtensa_expand_prologue): Add invoking the above function and
33399 elimination the use of callee-saved register by using its stack
33400 slot through the stack pointer (or the frame pointer if needed)
33402 (xtensa_expand_prologue): Modify to not emit register restoration
33403 insn from its stack slot if the register is already eliminated.
33405 2023-02-23 Jakub Jelinek <jakub@redhat.com>
33407 PR translation/108890
33408 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
33409 around fatal_error format strings.
33411 2023-02-23 Richard Biener <rguenther@suse.de>
33413 * tree-ssa-structalias.cc (handle_lhs_call): Do not
33414 re-create rhsc, only truncate it.
33416 2023-02-23 Jakub Jelinek <jakub@redhat.com>
33418 PR middle-end/106258
33419 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
33420 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
33422 2023-02-23 Richard Biener <rguenther@suse.de>
33424 * tree-if-conv.cc (tree_if_conversion): Properly manage
33425 memory of refs and the contained data references.
33427 2023-02-23 Richard Biener <rguenther@suse.de>
33429 PR tree-optimization/108888
33430 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
33431 calls to predicate.
33432 (predicate_statements): Only predicate calls with PLF_2.
33434 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33436 * config/xtensa/xtensa.md
33437 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
33438 Add missing "SI:" to PLUS RTXes.
33440 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33443 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
33444 Emit (use (reg:SI A0_REG)) at the end in the sibling call
33445 (i.e. the same place as (return) in the normal call).
33447 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33450 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
33453 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
33455 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
33456 (sibcall_value, sibcall_value_internal): Add 'use' expression
33459 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
33461 * doc/cppdiropts.texi: Reorder @opindex commands to precede
33462 @items they relate to.
33463 * doc/cppopts.texi: Ditto.
33464 * doc/cppwarnopts.texi: Ditto.
33465 * doc/invoke.texi: Ditto.
33466 * doc/lto.texi: Ditto.
33468 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
33470 * internal-fn.cc (expand_MASK_CALL): New.
33471 * internal-fn.def (MASK_CALL): New.
33472 * internal-fn.h (expand_MASK_CALL): New prototype.
33473 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
33474 for mask arguments also.
33475 * tree-if-conv.cc: Include cgraph.h.
33476 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
33477 (predicate_statements): Convert functions to IFN_MASK_CALL.
33478 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
33479 IFN_MASK_CALL as a SIMD function call.
33480 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
33481 IFN_MASK_CALL as an inbranch SIMD function call.
33482 Generate the mask vector arguments.
33484 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33486 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
33487 (class widen_reducop): Ditto.
33488 (class freducop): Ditto.
33489 (class widen_freducop): Ditto.
33491 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33492 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
33501 (vwredsumu): Ditto.
33502 (vfredusum): Ditto.
33503 (vfredosum): Ditto.
33506 (vfwredosum): Ditto.
33507 (vfwredusum): Ditto.
33508 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
33510 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33511 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
33512 (DEF_RVV_WU_OPS): Ditto.
33513 (DEF_RVV_WF_OPS): Ditto.
33514 (vint8mf8_t): Ditto.
33515 (vint8mf4_t): Ditto.
33516 (vint8mf2_t): Ditto.
33517 (vint8m1_t): Ditto.
33518 (vint8m2_t): Ditto.
33519 (vint8m4_t): Ditto.
33520 (vint8m8_t): Ditto.
33521 (vint16mf4_t): Ditto.
33522 (vint16mf2_t): Ditto.
33523 (vint16m1_t): Ditto.
33524 (vint16m2_t): Ditto.
33525 (vint16m4_t): Ditto.
33526 (vint16m8_t): Ditto.
33527 (vint32mf2_t): Ditto.
33528 (vint32m1_t): Ditto.
33529 (vint32m2_t): Ditto.
33530 (vint32m4_t): Ditto.
33531 (vint32m8_t): Ditto.
33532 (vuint8mf8_t): Ditto.
33533 (vuint8mf4_t): Ditto.
33534 (vuint8mf2_t): Ditto.
33535 (vuint8m1_t): Ditto.
33536 (vuint8m2_t): Ditto.
33537 (vuint8m4_t): Ditto.
33538 (vuint8m8_t): Ditto.
33539 (vuint16mf4_t): Ditto.
33540 (vuint16mf2_t): Ditto.
33541 (vuint16m1_t): Ditto.
33542 (vuint16m2_t): Ditto.
33543 (vuint16m4_t): Ditto.
33544 (vuint16m8_t): Ditto.
33545 (vuint32mf2_t): Ditto.
33546 (vuint32m1_t): Ditto.
33547 (vuint32m2_t): Ditto.
33548 (vuint32m4_t): Ditto.
33549 (vuint32m8_t): Ditto.
33550 (vfloat32mf2_t): Ditto.
33551 (vfloat32m1_t): Ditto.
33552 (vfloat32m2_t): Ditto.
33553 (vfloat32m4_t): Ditto.
33554 (vfloat32m8_t): Ditto.
33555 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
33556 (DEF_RVV_WU_OPS): Ditto.
33557 (DEF_RVV_WF_OPS): Ditto.
33558 (required_extensions_p): Add reduction support.
33559 (rvv_arg_type_info::get_base_vector_type): Ditto.
33560 (rvv_arg_type_info::get_tree_type): Ditto.
33561 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
33562 * config/riscv/riscv.md: Ditto.
33563 * config/riscv/vector-iterators.md (minu): Ditto.
33564 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
33565 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
33566 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
33567 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
33568 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
33569 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
33570 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
33572 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33574 * config/riscv/iterators.md: New iterator.
33575 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
33576 (enum ternop_type): New enum.
33577 (class vmacc): New class.
33578 (class imac): Ditto.
33579 (class vnmsac): Ditto.
33580 (enum widen_ternop_type): New enum.
33581 (class vmadd): Ditto.
33582 (class vnmsub): Ditto.
33583 (class iwmac): Ditto.
33584 (class vwmacc): Ditto.
33585 (class vwmaccu): Ditto.
33586 (class vwmaccsu): Ditto.
33587 (class vwmaccus): Ditto.
33588 (class reverse_binop): Ditto.
33589 (class vfmacc): Ditto.
33590 (class vfnmsac): Ditto.
33591 (class vfmadd): Ditto.
33592 (class vfnmsub): Ditto.
33593 (class vfnmacc): Ditto.
33594 (class vfmsac): Ditto.
33595 (class vfnmadd): Ditto.
33596 (class vfmsub): Ditto.
33597 (class vfwmacc): Ditto.
33598 (class vfwnmacc): Ditto.
33599 (class vfwmsac): Ditto.
33600 (class vfwnmsac): Ditto.
33601 (class float_misc): Ditto.
33602 (class fcmp): Ditto.
33603 (class vfclass): Ditto.
33604 (class vfcvt_x): Ditto.
33605 (class vfcvt_rtz_x): Ditto.
33606 (class vfcvt_f): Ditto.
33607 (class vfwcvt_x): Ditto.
33608 (class vfwcvt_rtz_x): Ditto.
33609 (class vfwcvt_f): Ditto.
33610 (class vfncvt_x): Ditto.
33611 (class vfncvt_rtz_x): Ditto.
33612 (class vfncvt_f): Ditto.
33613 (class vfncvt_rod_f): Ditto.
33615 * config/riscv/riscv-vector-builtins-bases.h:
33616 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
33660 (vfcvt_rtz_x): Ditto.
33661 (vfcvt_rtz_xu): Ditto.
33664 (vfwcvt_xu): Ditto.
33665 (vfwcvt_rtz_x): Ditto.
33666 (vfwcvt_rtz_xu): Ditto.
33669 (vfncvt_xu): Ditto.
33670 (vfncvt_rtz_x): Ditto.
33671 (vfncvt_rtz_xu): Ditto.
33673 (vfncvt_rod_f): Ditto.
33674 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
33675 (struct move_def): Ditto.
33676 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
33677 (DEF_RVV_CONVERT_I_OPS): Ditto.
33678 (DEF_RVV_CONVERT_U_OPS): Ditto.
33679 (DEF_RVV_WCONVERT_I_OPS): Ditto.
33680 (DEF_RVV_WCONVERT_U_OPS): Ditto.
33681 (DEF_RVV_WCONVERT_F_OPS): Ditto.
33682 (vfloat64m1_t): Ditto.
33683 (vfloat64m2_t): Ditto.
33684 (vfloat64m4_t): Ditto.
33685 (vfloat64m8_t): Ditto.
33686 (vint32mf2_t): Ditto.
33687 (vint32m1_t): Ditto.
33688 (vint32m2_t): Ditto.
33689 (vint32m4_t): Ditto.
33690 (vint32m8_t): Ditto.
33691 (vint64m1_t): Ditto.
33692 (vint64m2_t): Ditto.
33693 (vint64m4_t): Ditto.
33694 (vint64m8_t): Ditto.
33695 (vuint32mf2_t): Ditto.
33696 (vuint32m1_t): Ditto.
33697 (vuint32m2_t): Ditto.
33698 (vuint32m4_t): Ditto.
33699 (vuint32m8_t): Ditto.
33700 (vuint64m1_t): Ditto.
33701 (vuint64m2_t): Ditto.
33702 (vuint64m4_t): Ditto.
33703 (vuint64m8_t): Ditto.
33704 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
33705 (DEF_RVV_CONVERT_U_OPS): Ditto.
33706 (DEF_RVV_WCONVERT_I_OPS): Ditto.
33707 (DEF_RVV_WCONVERT_U_OPS): Ditto.
33708 (DEF_RVV_WCONVERT_F_OPS): Ditto.
33709 (DEF_RVV_F_OPS): Ditto.
33710 (DEF_RVV_WEXTF_OPS): Ditto.
33711 (required_extensions_p): Adjust for floating-point support.
33712 (check_required_extensions): Ditto.
33713 (unsigned_base_type_p): Ditto.
33714 (get_mode_for_bitsize): Ditto.
33715 (rvv_arg_type_info::get_base_vector_type): Ditto.
33716 (rvv_arg_type_info::get_tree_type): Ditto.
33717 * config/riscv/riscv-vector-builtins.def (v_f): New define.
33720 (xu_v): New define.
33722 (xu_w): New define.
33723 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
33724 (function_expander::arg_mode): New function.
33725 * config/riscv/vector-iterators.md (sof): New iterator.
33731 (fixuns_trunc): Ditto.
33733 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
33734 (@pred_<optab><mode>): Ditto.
33735 (@pred_<optab><mode>_scalar): Ditto.
33736 (@pred_<optab><mode>_reverse_scalar): Ditto.
33737 (@pred_<copysign><mode>): Ditto.
33738 (@pred_<copysign><mode>_scalar): Ditto.
33739 (@pred_mul_<optab><mode>): Ditto.
33740 (pred_mul_<optab><mode>_undef_merge): Ditto.
33741 (*pred_<madd_nmsub><mode>): Ditto.
33742 (*pred_<macc_nmsac><mode>): Ditto.
33743 (*pred_mul_<optab><mode>): Ditto.
33744 (@pred_mul_<optab><mode>_scalar): Ditto.
33745 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
33746 (*pred_<madd_nmsub><mode>_scalar): Ditto.
33747 (*pred_<macc_nmsac><mode>_scalar): Ditto.
33748 (*pred_mul_<optab><mode>_scalar): Ditto.
33749 (@pred_neg_mul_<optab><mode>): Ditto.
33750 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
33751 (*pred_<nmadd_msub><mode>): Ditto.
33752 (*pred_<nmacc_msac><mode>): Ditto.
33753 (*pred_neg_mul_<optab><mode>): Ditto.
33754 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
33755 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
33756 (*pred_<nmadd_msub><mode>_scalar): Ditto.
33757 (*pred_<nmacc_msac><mode>_scalar): Ditto.
33758 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
33759 (@pred_<misc_op><mode>): Ditto.
33760 (@pred_class<mode>): Ditto.
33761 (@pred_dual_widen_<optab><mode>): Ditto.
33762 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
33763 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
33764 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
33765 (@pred_widen_mul_<optab><mode>): Ditto.
33766 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
33767 (@pred_widen_neg_mul_<optab><mode>): Ditto.
33768 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
33769 (@pred_cmp<mode>): Ditto.
33770 (*pred_cmp<mode>): Ditto.
33771 (*pred_cmp<mode>_narrow): Ditto.
33772 (@pred_cmp<mode>_scalar): Ditto.
33773 (*pred_cmp<mode>_scalar): Ditto.
33774 (*pred_cmp<mode>_scalar_narrow): Ditto.
33775 (@pred_eqne<mode>_scalar): Ditto.
33776 (*pred_eqne<mode>_scalar): Ditto.
33777 (*pred_eqne<mode>_scalar_narrow): Ditto.
33778 (@pred_merge<mode>_scalar): Ditto.
33779 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
33780 (@pred_<fix_cvt><mode>): Ditto.
33781 (@pred_<float_cvt><mode>): Ditto.
33782 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
33783 (@pred_widen_<fix_cvt><mode>): Ditto.
33784 (@pred_widen_<float_cvt><mode>): Ditto.
33785 (@pred_extend<mode>): Ditto.
33786 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
33787 (@pred_narrow_<fix_cvt><mode>): Ditto.
33788 (@pred_narrow_<float_cvt><mode>): Ditto.
33789 (@pred_trunc<mode>): Ditto.
33790 (@pred_rod_trunc<mode>): Ditto.
33792 2023-02-22 Jakub Jelinek <jakub@redhat.com>
33794 PR middle-end/106258
33795 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
33796 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
33797 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
33798 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
33800 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
33802 * common.opt (-Wcomplain-wrong-lang): New.
33803 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
33804 * opts-common.cc (prune_options): Handle it.
33805 * opts-global.cc (complain_wrong_lang): Use it.
33807 2023-02-21 David Malcolm <dmalcolm@redhat.com>
33810 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
33812 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
33815 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
33817 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
33818 (sibcall_value, sibcall_value_internal): Add 'use' expression
33821 2023-02-21 Richard Biener <rguenther@suse.de>
33823 PR tree-optimization/108691
33824 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
33825 assert about calls_setjmp not becoming true when it was false.
33827 2023-02-21 Richard Biener <rguenther@suse.de>
33829 PR tree-optimization/108793
33830 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
33831 Use convert operands to niter_type when computing num.
33833 2023-02-21 Richard Biener <rguenther@suse.de>
33836 2023-02-13 Richard Biener <rguenther@suse.de>
33838 PR tree-optimization/108691
33839 * tree-cfg.cc (notice_special_calls): When the CFG is built
33840 honor gimple_call_ctrl_altering_p.
33841 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
33842 temporarily if the call is not control-altering.
33843 * calls.cc (emit_call_1): Do not add REG_SETJMP if
33844 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
33846 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33848 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
33849 true if register A0 (return address register) when -Og is specified.
33851 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
33853 * config/i386/predicates.md
33854 (general_x64constmem_operand): New predicate.
33855 * config/i386/i386.md (*cmpqi_ext<mode>_1):
33856 Use nonimm_x64constmem_operand.
33857 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
33858 (*addqi_ext<mode>_1): Ditto.
33859 (*testqi_ext<mode>_1): Ditto.
33860 (*andqi_ext<mode>_1): Ditto.
33861 (*andqi_ext<mode>_1_cc): Ditto.
33862 (*<any_or:code>qi_ext<mode>_1): Ditto.
33863 (*xorqi_ext<mode>_1_cc): Ditto.
33865 2023-02-20 Jakub Jelinek <jakub2redhat.com>
33868 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
33869 gen_umadddi4_highpart{,_le}.
33871 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
33873 * config/riscv/riscv.md (prefetch): Use r instead of p for the
33875 (riscv_prefetchi_<mode>): Ditto.
33877 2023-02-20 Richard Biener <rguenther@suse.de>
33879 PR tree-optimization/108816
33880 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
33881 versioning condition split prerequesite, assert required
33884 2023-02-20 Richard Biener <rguenther@suse.de>
33886 PR tree-optimization/108825
33887 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
33888 loop-local verfication only verify there's no pending SSA
33891 2023-02-20 Richard Biener <rguenther@suse.de>
33893 PR tree-optimization/108819
33894 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
33895 we have an SSA name as iv_2 as expected.
33897 2023-02-18 Jakub Jelinek <jakub@redhat.com>
33899 PR tree-optimization/108819
33900 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
33902 2023-02-18 Jakub Jelinek <jakub@redhat.com>
33905 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
33906 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
33908 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
33909 with ix86_replace_reg_with_reg.
33911 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
33913 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
33915 2023-02-18 Xi Ruoyao <xry111@xry111.site>
33917 * config.gcc (triplet_abi): Set its value based on $with_abi,
33918 instead of $target.
33919 (la_canonical_triplet): Set it after $triplet_abi is set
33921 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
33922 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
33925 2023-02-18 Andrew Pinski <apinski@marvell.com>
33927 * match.pd: Remove #if GIMPLE around the
33930 2023-02-18 Andrew Pinski <apinski@marvell.com>
33932 * value-query.h (get_range_query): Return the global ranges
33933 for a nullptr func.
33935 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
33937 * doc/invoke.texi (@item -Wall): Fix typo in
33940 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
33943 * config/i386/predicates.md
33944 (nonimm_x64constmem_operand): New predicate.
33945 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
33946 (*subqi_ext<mode>_0): Ditto.
33947 (*andqi_ext<mode>_0): Ditto.
33948 (*<any_or:code>qi_ext<mode>_0): Ditto.
33950 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
33953 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
33954 int_outermode instead of GET_MODE (tem) to prevent
33955 VOIDmode from entering simplify_gen_subreg.
33957 2023-02-17 Richard Biener <rguenther@suse.de>
33959 PR tree-optimization/108821
33960 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
33961 move volatile accesses.
33963 2023-02-17 Richard Biener <rguenther@suse.de>
33965 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
33966 called on virtual operands.
33967 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
33968 ssa_undefined_value_p calls.
33969 (vn_phi_insert): Likewise.
33970 (set_ssa_val_to): Likewise.
33971 (visit_phi): Avoid extra work with equivalences for
33972 virtual operand PHIs.
33974 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33976 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
33978 (class mask_nlogic): Ditto.
33979 (class mask_notlogic): Ditto.
33980 (class vmmv): Ditto.
33981 (class vmclr): Ditto.
33982 (class vmset): Ditto.
33983 (class vmnot): Ditto.
33984 (class vcpop): Ditto.
33985 (class vfirst): Ditto.
33986 (class mask_misc): Ditto.
33987 (class viota): Ditto.
33988 (class vid): Ditto.
33990 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33991 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
34010 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
34011 (struct mask_alu_def): Ditto.
34013 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34014 * config/riscv/riscv-vector-builtins.cc: Ditto.
34015 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
34016 for dest it scalar RVV intrinsics.
34017 * config/riscv/vector-iterators.md (sof): New iterator.
34018 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
34019 (@pred_<optab>not<mode>): New pattern.
34020 (@pred_popcount<VB:mode><P:mode>): New pattern.
34021 (@pred_ffs<VB:mode><P:mode>): New pattern.
34022 (@pred_<misc_op><mode>): New pattern.
34023 (@pred_iota<mode>): New pattern.
34024 (@pred_series<mode>): New pattern.
34026 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34028 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
34032 * config/riscv/riscv-vector-builtins.cc: Ditto.
34034 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34035 kito-cheng <kito.cheng@sifive.com>
34037 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
34038 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
34039 (sew64_scalar_helper): New function.
34040 * config/riscv/vector.md: Normalization.
34042 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34044 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
34106 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34108 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
34109 (@pred_<optab><mode>_scalar): Ditto.
34110 (*pred_<optab><mode>_scalar): Ditto.
34111 (*pred_<optab><mode>_extended_scalar): Ditto.
34113 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34115 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
34116 (init_builtins): Ditto.
34117 (mangle_builtin_type): Ditto.
34118 (verify_type_context): Ditto.
34119 (handle_pragma_vector): Ditto.
34120 (builtin_decl): Ditto.
34121 (expand_builtin): Ditto.
34122 (const_vec_all_same_in_range_p): Ditto.
34123 (legitimize_move): Ditto.
34124 (emit_vlmax_op): Ditto.
34125 (emit_nonvlmax_op): Ditto.
34126 (get_vlmul): Ditto.
34127 (get_ratio): Ditto.
34130 (get_avl_type): Ditto.
34131 (calculate_ratio): Ditto.
34132 (enum vlmul_type): Ditto.
34134 (neg_simm5_p): Ditto.
34135 (has_vi_variant_p): Ditto.
34137 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34139 * config/riscv/riscv-protos.h (simm32_p): Remove.
34140 * config/riscv/riscv-v.cc (simm32_p): Ditto.
34141 * config/riscv/vector.md: Use immediate_operand
34142 instead of riscv_vector::simm32_p.
34144 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
34146 * doc/invoke.texi (Optimize Options): Reword the explanation
34147 getting minimal, maximal and default values of a parameter.
34149 2023-02-16 Patrick Palka <ppalka@redhat.com>
34151 * addresses.h: Mechanically drop 'static' from 'static inline'
34152 functions via s/^static inline/inline/g.
34153 * asan.h: Likewise.
34154 * attribs.h: Likewise.
34155 * basic-block.h: Likewise.
34156 * bitmap.h: Likewise.
34157 * cfghooks.h: Likewise.
34158 * cfgloop.h: Likewise.
34159 * cgraph.h: Likewise.
34160 * cselib.h: Likewise.
34161 * data-streamer.h: Likewise.
34162 * debug.h: Likewise.
34164 * diagnostic.h: Likewise.
34165 * dominance.h: Likewise.
34166 * dumpfile.h: Likewise.
34167 * emit-rtl.h: Likewise.
34168 * except.h: Likewise.
34169 * expmed.h: Likewise.
34170 * expr.h: Likewise.
34171 * fixed-value.h: Likewise.
34172 * gengtype.h: Likewise.
34173 * gimple-expr.h: Likewise.
34174 * gimple-iterator.h: Likewise.
34175 * gimple-predict.h: Likewise.
34176 * gimple-range-fold.h: Likewise.
34177 * gimple-ssa.h: Likewise.
34178 * gimple.h: Likewise.
34179 * graphite.h: Likewise.
34180 * hard-reg-set.h: Likewise.
34181 * hash-map.h: Likewise.
34182 * hash-set.h: Likewise.
34183 * hash-table.h: Likewise.
34184 * hwint.h: Likewise.
34185 * input.h: Likewise.
34186 * insn-addr.h: Likewise.
34187 * internal-fn.h: Likewise.
34188 * ipa-fnsummary.h: Likewise.
34189 * ipa-icf-gimple.h: Likewise.
34190 * ipa-inline.h: Likewise.
34191 * ipa-modref.h: Likewise.
34192 * ipa-prop.h: Likewise.
34193 * ira-int.h: Likewise.
34195 * lra-int.h: Likewise.
34197 * lto-streamer.h: Likewise.
34198 * memmodel.h: Likewise.
34199 * omp-general.h: Likewise.
34200 * optabs-query.h: Likewise.
34201 * optabs.h: Likewise.
34202 * plugin.h: Likewise.
34203 * pretty-print.h: Likewise.
34204 * range.h: Likewise.
34205 * read-md.h: Likewise.
34206 * recog.h: Likewise.
34207 * regs.h: Likewise.
34208 * rtl-iter.h: Likewise.
34210 * sbitmap.h: Likewise.
34211 * sched-int.h: Likewise.
34212 * sel-sched-ir.h: Likewise.
34213 * sese.h: Likewise.
34214 * sparseset.h: Likewise.
34215 * ssa-iterators.h: Likewise.
34216 * system.h: Likewise.
34217 * target-globals.h: Likewise.
34218 * target.h: Likewise.
34219 * timevar.h: Likewise.
34220 * tree-chrec.h: Likewise.
34221 * tree-data-ref.h: Likewise.
34222 * tree-iterator.h: Likewise.
34223 * tree-outof-ssa.h: Likewise.
34224 * tree-phinodes.h: Likewise.
34225 * tree-scalar-evolution.h: Likewise.
34226 * tree-sra.h: Likewise.
34227 * tree-ssa-alias.h: Likewise.
34228 * tree-ssa-live.h: Likewise.
34229 * tree-ssa-loop-manip.h: Likewise.
34230 * tree-ssa-loop.h: Likewise.
34231 * tree-ssa-operands.h: Likewise.
34232 * tree-ssa-propagate.h: Likewise.
34233 * tree-ssa-sccvn.h: Likewise.
34234 * tree-ssa.h: Likewise.
34235 * tree-ssanames.h: Likewise.
34236 * tree-streamer.h: Likewise.
34237 * tree-switch-conversion.h: Likewise.
34238 * tree-vectorizer.h: Likewise.
34239 * tree.h: Likewise.
34240 * wide-int.h: Likewise.
34242 2023-02-16 Jakub Jelinek <jakub@redhat.com>
34244 PR tree-optimization/108657
34245 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
34246 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
34247 is a call to internal or builtin function.
34249 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
34251 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
34252 using-declaration to unhide functions.
34254 2023-02-16 Jakub Jelinek <jakub@redhat.com>
34256 PR tree-optimization/108783
34257 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
34258 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
34259 t to curr->op. Otherwise, punt if either newop1 or newop2 are
34260 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
34262 2023-02-16 Richard Biener <rguenther@suse.de>
34264 PR tree-optimization/108791
34265 * tree-ssa-forwprop.cc (optimize_vector_load): Build
34266 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
34269 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
34272 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
34273 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
34274 (ix86_expand_prologue): Likewise.
34276 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
34278 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
34280 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
34282 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
34283 int248_register_operand predicate in zero_extract sub-RTX.
34284 (*cmpqi_ext<mode>_2): Ditto.
34285 (*cmpqi_ext<mode>_3): Ditto.
34286 (*cmpqi_ext<mode>_4): Ditto.
34287 (*extzvqi_mem_rex64): Ditto.
34289 (*insvqi_1_mem_rex64): Ditto.
34290 (@insv<mode>_1): Ditto.
34291 (*insvqi_1): Ditto.
34292 (*insvqi_2): Ditto.
34293 (*insvqi_3): Ditto.
34294 (*extendqi<SWI24:mode>_ext_1): Ditto.
34295 (*addqi_ext<mode>_1): Ditto.
34296 (*addqi_ext<mode>_2): Ditto.
34297 (*subqi_ext<mode>_2): Ditto.
34298 (*testqi_ext<mode>_1): Ditto.
34299 (*testqi_ext<mode>_2): Ditto.
34300 (*andqi_ext<mode>_1): Ditto.
34301 (*andqi_ext<mode>_1_cc): Ditto.
34302 (*andqi_ext<mode>_2): Ditto.
34303 (*<any_or:code>qi_ext<mode>_1): Ditto.
34304 (*<any_or:code>qi_ext<mode>_2): Ditto.
34305 (*xorqi_ext<mode>_1_cc): Ditto.
34306 (*negqi_ext<mode>_2): Ditto.
34307 (*ashlqi_ext<mode>_2): Ditto.
34308 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
34310 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
34312 * config/i386/predicates.md (int248_register_operand):
34313 Rename from extr_register_operand.
34314 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
34315 (*extzx<mode>): Ditto.
34316 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
34317 (*ashl<mode>3_mask): Ditto.
34318 (*<any_shiftrt:insn><mode>3_mask): Ditto.
34319 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
34320 (*<any_rotate:insn><mode>3_mask): Ditto.
34321 (*<btsc><mode>_mask): Ditto.
34322 (*btr<mode>_mask): Ditto.
34323 (*jcc_bt<mode>_mask_1): Ditto.
34325 2023-02-15 Richard Biener <rguenther@suse.de>
34327 PR middle-end/26854
34328 * df-core.cc (df_worklist_propagate_forward): Put later
34329 blocks on worklist and only earlier blocks on pending.
34330 (df_worklist_propagate_backward): Likewise.
34331 (df_worklist_dataflow_doublequeue): Change the iteration
34332 to process new blocks in the same iteration if that
34333 maintains the iteration order.
34335 2023-02-15 Marek Polacek <polacek@redhat.com>
34337 PR middle-end/106080
34338 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
34341 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34343 * config/riscv/predicates.md: Refine codes.
34344 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
34345 * config/riscv/riscv-v.cc: Refine codes.
34346 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
34348 (class imac): New class.
34349 (enum widen_ternop_type): New enum.
34350 (class iwmac): New class.
34352 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34353 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
34361 * config/riscv/riscv-vector-builtins.cc
34362 (function_builder::apply_predication): Adjust for multiply-add support.
34363 (function_expander::add_vundef_operand): Refine codes.
34364 (function_expander::use_ternop_insn): New function.
34365 (function_expander::use_widen_ternop_insn): Ditto.
34366 * config/riscv/riscv-vector-builtins.h: New function.
34367 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
34368 (pred_mul_<optab><mode>_undef_merge): Ditto.
34369 (*pred_<madd_nmsub><mode>): Ditto.
34370 (*pred_<macc_nmsac><mode>): Ditto.
34371 (*pred_mul_<optab><mode>): Ditto.
34372 (@pred_mul_<optab><mode>_scalar): Ditto.
34373 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34374 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34375 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34376 (*pred_mul_<optab><mode>_scalar): Ditto.
34377 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
34378 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
34379 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
34380 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
34381 (@pred_widen_mul_plus<su><mode>): Ditto.
34382 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
34383 (@pred_widen_mul_plussu<mode>): Ditto.
34384 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
34385 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
34387 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34389 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
34390 (vector_all_trues_mask_operand): New predicate.
34391 (vector_undef_operand): New predicate.
34392 (ltge_operator): New predicate.
34393 (comparison_except_ltge_operator): New predicate.
34394 (comparison_except_eqge_operator): New predicate.
34395 (ge_operator): New predicate.
34396 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
34397 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
34399 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34400 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
34410 * config/riscv/riscv-vector-builtins-shapes.cc
34411 (struct return_mask_def): Adjust for compare support.
34412 * config/riscv/riscv-vector-builtins.cc
34413 (function_expander::use_compare_insn): New function.
34414 * config/riscv/riscv-vector-builtins.h
34415 (function_expander::add_integer_operand): Ditto.
34416 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
34417 * config/riscv/riscv.md: Add vector min/max attributes.
34418 * config/riscv/vector-iterators.md (xnor): New iterator.
34419 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
34420 (*pred_cmp<mode>): Ditto.
34421 (*pred_cmp<mode>_narrow): Ditto.
34422 (@pred_ltge<mode>): Ditto.
34423 (*pred_ltge<mode>): Ditto.
34424 (*pred_ltge<mode>_narrow): Ditto.
34425 (@pred_cmp<mode>_scalar): Ditto.
34426 (*pred_cmp<mode>_scalar): Ditto.
34427 (*pred_cmp<mode>_scalar_narrow): Ditto.
34428 (@pred_eqne<mode>_scalar): Ditto.
34429 (*pred_eqne<mode>_scalar): Ditto.
34430 (*pred_eqne<mode>_scalar_narrow): Ditto.
34431 (*pred_cmp<mode>_extended_scalar): Ditto.
34432 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
34433 (*pred_eqne<mode>_extended_scalar): Ditto.
34434 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
34435 (@pred_ge<mode>_scalar): Ditto.
34436 (@pred_<optab><mode>): Ditto.
34437 (@pred_n<optab><mode>): Ditto.
34438 (@pred_<optab>n<mode>): Ditto.
34439 (@pred_not<mode>): Ditto.
34441 2023-02-15 Martin Jambor <mjambor@suse.cz>
34444 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
34445 creation of non-scalar replacements even if IPA-CP knows their
34448 2023-02-15 Jakub Jelinek <jakub@redhat.com>
34452 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
34453 expander, change operand 3 to be TImode, emit maddlddi4 and
34454 umadddi4_highpart{,_le} with its low half and finally add the high
34455 half to the result.
34457 2023-02-15 Martin Liska <mliska@suse.cz>
34459 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
34461 2023-02-15 Richard Biener <rguenther@suse.de>
34463 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
34464 for with_poison and alias worklist to it.
34465 (sanitize_asan_mark_poison): Likewise.
34467 2023-02-15 Richard Biener <rguenther@suse.de>
34470 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
34471 Combine bitmap test and set.
34472 (scalar_chain::add_insn): Likewise.
34473 (scalar_chain::analyze_register_chain): Remove redundant
34474 attempt to add to queue and instead strengthen assert.
34475 Sink common attempts to mark the def dual-mode.
34476 (scalar_chain::add_to_queue): Remove redundant insn bitmap
34479 2023-02-15 Richard Biener <rguenther@suse.de>
34482 * config/i386/i386-features.cc (convert_scalars_to_vector):
34483 Switch candidates bitmaps to tree view before building the chains.
34485 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
34487 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
34488 "failure trying to reload" call.
34490 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
34492 * gdbinit.in (phrs): New command.
34493 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
34494 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
34496 2023-02-14 David Faust <david.faust@oracle.com>
34499 * config/bpf/constraints.md (q): New memory constraint.
34500 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
34501 (zero_extendqidi2): Likewise.
34502 (zero_extendsidi2): Likewise.
34503 (*mov<MM:mode>): Likewise.
34505 2023-02-14 Andrew Pinski <apinski@marvell.com>
34507 PR tree-optimization/108355
34508 PR tree-optimization/96921
34509 * match.pd: Add pattern for "1 - bool_val".
34511 2023-02-14 Richard Biener <rguenther@suse.de>
34513 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
34514 basic block index hashing on the availability of ->cclhs.
34515 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
34516 rely on ->cclhs availability.
34517 (vn_phi_lookup): Set ->cclhs only when we are eventually
34518 going to CSE the PHI.
34519 (vn_phi_insert): Likewise.
34521 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
34523 * gimplify.cc (gimplify_save_expr): Add missing guard.
34525 2023-02-14 Richard Biener <rguenther@suse.de>
34527 PR tree-optimization/108782
34528 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
34529 Make sure we're not vectorizing an inner loop.
34531 2023-02-14 Jakub Jelinek <jakub@redhat.com>
34533 PR sanitizer/108777
34534 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
34535 * asan.h (asan_memfn_rtl): Declare.
34536 * asan.cc (asan_memfn_rtls): New variable.
34537 (asan_memfn_rtl): New function.
34538 * builtins.cc (expand_builtin): If
34539 param_asan_kernel_mem_intrinsic_prefix and function is
34540 kernel-{,hw}address sanitized, emit calls to
34541 __{,hw}asan_{memcpy,memmove,memset} rather than
34542 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
34543 instead of flag_sanitize & SANITIZE_ADDRESS to check if
34544 asan_intercepted_p functions shouldn't be expanded inline.
34546 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
34548 PR tree-optimization/96373
34549 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
34550 operations on the loop mask. Reject partial vectors if this isn't
34553 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
34555 PR rtl-optimization/108681
34556 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
34557 code to handle bare uses and clobbers.
34559 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
34561 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
34562 caller_save_p flag when clearing defined_p flag.
34563 (setup_reg_equiv): Ditto.
34564 * lra-constraints.cc (lra_constraints): Ditto.
34566 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
34569 * config/i386/predicates.md (extr_register_operand):
34570 New special predicate.
34571 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
34572 as operand 1 predicate.
34573 (*exzv<mode>): Ditto.
34574 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
34576 2023-02-13 Richard Biener <rguenther@suse.de>
34578 PR tree-optimization/28614
34579 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
34580 walking all edges in most cases.
34581 (vn_nary_op_insert_pieces_predicated): Avoid repeated
34582 calls to can_track_predicate_on_edge unless checking is
34584 (process_bb): Instead call it once here for each edge
34585 we register possibly multiple predicates on.
34587 2023-02-13 Richard Biener <rguenther@suse.de>
34589 PR tree-optimization/108691
34590 * tree-cfg.cc (notice_special_calls): When the CFG is built
34591 honor gimple_call_ctrl_altering_p.
34592 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
34593 temporarily if the call is not control-altering.
34594 * calls.cc (emit_call_1): Do not add REG_SETJMP if
34595 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
34597 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
34600 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
34601 (struct s390_sched_state): Initialise to zero.
34602 (s390_sched_variable_issue): For better debuggability also emit
34604 (s390_sched_init): Unconditionally reset scheduler state.
34606 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
34608 * ifcvt.h (noce_if_info::cond_inverted): New field.
34609 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
34610 values when cond_inverted is true.
34611 (noce_find_if_block): Allow the condition to be inverted when
34612 handling conditional moves.
34614 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
34616 * config/s390/predicates.md (execute_operation): Use
34617 constrain_operands instead of extract_constrain_insn in order to
34618 determine wheter there exists a valid alternative.
34620 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
34622 * common/config/arc/arc-common.cc (arc_option_optimization_table):
34623 Remove millicode from list.
34625 2023-02-13 Martin Liska <mliska@suse.cz>
34627 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
34629 2023-02-13 Richard Biener <rguenther@suse.de>
34631 PR tree-optimization/106722
34632 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
34633 whether we marked a stmt.
34634 (mark_control_dependent_edges_necessary): When
34635 mark_last_stmt_necessary didn't mark any stmt make sure
34636 to mark its control dependent edges.
34637 (propagate_necessity): Likewise.
34639 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
34641 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
34642 (DWARF_FRAME_REGISTERS): New.
34643 (DWARF_REG_TO_UNWIND_COLUMN): New.
34645 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
34647 * doc/sourcebuild.texi: Remove (broken) direct reference to
34648 "The GNU configure and build system".
34650 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
34652 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
34653 gen_add3_insn to gen_rtx_SET.
34654 (riscv_adjust_libcall_cfi_epilogue): Likewise.
34656 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34658 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
34659 (class vnclip): Ditto.
34661 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34662 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
34671 * config/riscv/vector-iterators.md (su): Add instruction.
34674 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
34675 (@pred_<sat_op><mode>_scalar): Ditto.
34676 (*pred_<sat_op><mode>_scalar): Ditto.
34677 (*pred_<sat_op><mode>_extended_scalar): Ditto.
34678 (@pred_narrow_clip<v_su><mode>): Ditto.
34679 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
34681 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34683 * config/riscv/constraints.md (Wbr): Remove unused constraint.
34684 * config/riscv/predicates.md: Fix move operand predicate.
34685 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
34686 (class vncvt_x): Ditto.
34687 (class vmerge): Ditto.
34688 (class vmv_v): Ditto.
34690 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34691 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
34698 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
34699 (struct move_def): Ditto.
34701 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34702 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
34703 (DEF_RVV_WEXTU_OPS): Ditto
34704 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
34709 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
34710 * config/riscv/vector-iterators.md (nmsac):New iterator.
34711 (nmsub): New iterator.
34712 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
34713 (@pred_merge<mode>_scalar): New pattern.
34714 (*pred_merge<mode>_scalar): New pattern.
34715 (*pred_merge<mode>_extended_scalar): New pattern.
34716 (@pred_narrow_<optab><mode>): New pattern.
34717 (@pred_narrow_<optab><mode>_scalar): New pattern.
34718 (@pred_trunc<mode>): New pattern.
34720 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34722 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
34723 (class vmsbc): Ditto.
34724 (BASE): Define new class.
34725 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34726 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
34728 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
34731 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34732 * config/riscv/riscv-vector-builtins.cc
34733 (function_expander::use_exact_insn): Adjust for new support
34734 * config/riscv/riscv-vector-builtins.h
34735 (function_base::has_merge_operand_p): New function.
34736 * config/riscv/vector-iterators.md: New iterator.
34737 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
34738 (@pred_msbc<mode>): Ditto.
34739 (@pred_madc<mode>_scalar): Ditto.
34740 (@pred_msbc<mode>_scalar): Ditto.
34741 (*pred_madc<mode>_scalar): Ditto.
34742 (*pred_madc<mode>_extended_scalar): Ditto.
34743 (*pred_msbc<mode>_scalar): Ditto.
34744 (*pred_msbc<mode>_extended_scalar): Ditto.
34745 (@pred_madc<mode>_overflow): Ditto.
34746 (@pred_msbc<mode>_overflow): Ditto.
34747 (@pred_madc<mode>_overflow_scalar): Ditto.
34748 (@pred_msbc<mode>_overflow_scalar): Ditto.
34749 (*pred_madc<mode>_overflow_scalar): Ditto.
34750 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
34751 (*pred_msbc<mode>_overflow_scalar): Ditto.
34752 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
34754 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34756 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
34757 * config/riscv/riscv-v.cc (simm32_p): Ditto.
34758 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
34759 (class vsbc): Ditto.
34761 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34762 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
34764 * config/riscv/riscv-vector-builtins-shapes.cc
34765 (struct no_mask_policy_def): Ditto.
34767 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34768 * config/riscv/riscv-vector-builtins.cc
34769 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
34770 (rvv_arg_type_info::get_tree_type): Ditto.
34771 (function_expander::use_exact_insn): Ditto.
34772 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34773 (function_base::use_mask_predication_p): New function.
34774 * config/riscv/vector-iterators.md: New iterator.
34775 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
34776 (@pred_sbc<mode>): Ditto.
34777 (@pred_adc<mode>_scalar): Ditto.
34778 (@pred_sbc<mode>_scalar): Ditto.
34779 (*pred_adc<mode>_scalar): Ditto.
34780 (*pred_adc<mode>_extended_scalar): Ditto.
34781 (*pred_sbc<mode>_scalar): Ditto.
34782 (*pred_sbc<mode>_extended_scalar): Ditto.
34784 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34786 * config/riscv/vector.md: use "zero" reg.
34788 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34790 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
34792 (class vwmulsu): Ditto.
34793 (class vwcvt): Ditto.
34794 (BASE): Add integer widening support.
34795 * config/riscv/riscv-vector-builtins-bases.h: Ditto
34796 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
34797 (vwsub): New class.
34798 (vwmul): New class.
34799 (vwmulu): New class.
34800 (vwmulsu): New class.
34801 (vwaddu): New class.
34802 (vwsubu): New class.
34803 (vwcvt_x): New class.
34804 (vwcvtu_x): New class.
34805 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
34807 (struct widen_alu_def): New class.
34808 (SHAPE): New class.
34809 * config/riscv/riscv-vector-builtins-shapes.h: New class.
34810 * config/riscv/riscv-vector-builtins.cc
34811 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
34812 (rvv_arg_type_info::get_tree_type): Ditto.
34813 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
34815 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
34817 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
34818 * config/riscv/riscv.h (X0_REGNUM): New constant.
34819 * config/riscv/vector-iterators.md: New iterators.
34820 * config/riscv/vector.md
34821 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
34823 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
34825 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
34826 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
34828 (@pred_widen_mulsu<mode>): Ditto.
34829 (@pred_widen_mulsu<mode>_scalar): Ditto.
34830 (@pred_<optab><mode>): Ditto.
34832 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34833 kito-cheng <kito.cheng@sifive.com>
34835 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
34836 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
34838 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34839 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
34843 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
34845 (DEF_RVV_FULL_V_U_OPS): Ditto.
34846 (vint8mf8_t): Ditto.
34847 (vint8mf4_t): Ditto.
34848 (vint8mf2_t): Ditto.
34849 (vint8m1_t): Ditto.
34850 (vint8m2_t): Ditto.
34851 (vint8m4_t): Ditto.
34852 (vint8m8_t): Ditto.
34853 (vint16mf4_t): Ditto.
34854 (vint16mf2_t): Ditto.
34855 (vint16m1_t): Ditto.
34856 (vint16m2_t): Ditto.
34857 (vint16m4_t): Ditto.
34858 (vint16m8_t): Ditto.
34859 (vint32mf2_t): Ditto.
34860 (vint32m1_t): Ditto.
34861 (vint32m2_t): Ditto.
34862 (vint32m4_t): Ditto.
34863 (vint32m8_t): Ditto.
34864 (vint64m1_t): Ditto.
34865 (vint64m2_t): Ditto.
34866 (vint64m4_t): Ditto.
34867 (vint64m8_t): Ditto.
34868 (vuint8mf8_t): Ditto.
34869 (vuint8mf4_t): Ditto.
34870 (vuint8mf2_t): Ditto.
34871 (vuint8m1_t): Ditto.
34872 (vuint8m2_t): Ditto.
34873 (vuint8m4_t): Ditto.
34874 (vuint8m8_t): Ditto.
34875 (vuint16mf4_t): Ditto.
34876 (vuint16mf2_t): Ditto.
34877 (vuint16m1_t): Ditto.
34878 (vuint16m2_t): Ditto.
34879 (vuint16m4_t): Ditto.
34880 (vuint16m8_t): Ditto.
34881 (vuint32mf2_t): Ditto.
34882 (vuint32m1_t): Ditto.
34883 (vuint32m2_t): Ditto.
34884 (vuint32m4_t): Ditto.
34885 (vuint32m8_t): Ditto.
34886 (vuint64m1_t): Ditto.
34887 (vuint64m2_t): Ditto.
34888 (vuint64m4_t): Ditto.
34889 (vuint64m8_t): Ditto.
34890 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
34891 (DEF_RVV_FULL_V_U_OPS): Ditto.
34892 (check_required_extensions): Add vmulh support.
34893 (rvv_arg_type_info::get_tree_type): Ditto.
34894 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
34895 (enum rvv_base_type): Ditto.
34896 * config/riscv/riscv.opt: Add 'V' extension flag.
34897 * config/riscv/vector-iterators.md (su): New iterator.
34898 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
34899 (@pred_mulh<v_su><mode>_scalar): Ditto.
34900 (*pred_mulh<v_su><mode>_scalar): Ditto.
34901 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
34903 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34905 * config/riscv/iterators.md: Add sign_extend/zero_extend.
34906 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
34908 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
34909 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
34912 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
34913 for vsext/vzext support.
34914 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
34916 (DEF_RVV_QEXTI_OPS): Ditto.
34917 (DEF_RVV_OEXTI_OPS): Ditto.
34918 (DEF_RVV_WEXTU_OPS): Ditto.
34919 (DEF_RVV_QEXTU_OPS): Ditto.
34920 (DEF_RVV_OEXTU_OPS): Ditto.
34921 (vint16mf4_t): Ditto.
34922 (vint16mf2_t): Ditto.
34923 (vint16m1_t): Ditto.
34924 (vint16m2_t): Ditto.
34925 (vint16m4_t): Ditto.
34926 (vint16m8_t): Ditto.
34927 (vint32mf2_t): Ditto.
34928 (vint32m1_t): Ditto.
34929 (vint32m2_t): Ditto.
34930 (vint32m4_t): Ditto.
34931 (vint32m8_t): Ditto.
34932 (vint64m1_t): Ditto.
34933 (vint64m2_t): Ditto.
34934 (vint64m4_t): Ditto.
34935 (vint64m8_t): Ditto.
34936 (vuint16mf4_t): Ditto.
34937 (vuint16mf2_t): Ditto.
34938 (vuint16m1_t): Ditto.
34939 (vuint16m2_t): Ditto.
34940 (vuint16m4_t): Ditto.
34941 (vuint16m8_t): Ditto.
34942 (vuint32mf2_t): Ditto.
34943 (vuint32m1_t): Ditto.
34944 (vuint32m2_t): Ditto.
34945 (vuint32m4_t): Ditto.
34946 (vuint32m8_t): Ditto.
34947 (vuint64m1_t): Ditto.
34948 (vuint64m2_t): Ditto.
34949 (vuint64m4_t): Ditto.
34950 (vuint64m8_t): Ditto.
34951 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
34952 (DEF_RVV_QEXTI_OPS): Ditto.
34953 (DEF_RVV_OEXTI_OPS): Ditto.
34954 (DEF_RVV_WEXTU_OPS): Ditto.
34955 (DEF_RVV_QEXTU_OPS): Ditto.
34956 (DEF_RVV_OEXTU_OPS): Ditto.
34957 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
34959 (rvv_arg_type_info::get_tree_type): Ditto.
34960 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34961 * config/riscv/vector-iterators.md (z): New attribute.
34962 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
34963 (@pred_<optab><mode>_vf4): Ditto.
34964 (@pred_<optab><mode>_vf8): Ditto.
34966 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34968 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
34969 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
34970 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
34971 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34972 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
34976 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
34981 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
34982 (@pred_<optab><mode>_scalar): New pattern.
34983 (*pred_<optab><mode>_scalar): New pattern.
34984 (*pred_<optab><mode>_extended_scalar): New pattern.
34986 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34988 * config/riscv/iterators.md: Add neg and not.
34989 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
34991 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34992 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
35013 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
35014 (struct alu_def): Ditto.
35016 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35017 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
35018 * config/riscv/vector-iterators.md: New iterator.
35019 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
35021 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35023 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
35025 2023-02-11 Jakub Jelinek <jakub@redhat.com>
35028 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
35029 item->offset bit position is too large to be representable as
35030 unsigned int byte position.
35032 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
35034 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
35036 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
35038 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
35039 valid_combine only when ira_use_lra_p is true.
35041 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
35043 * params.opt (ira-simple-lra-insn-threshold): Add new param.
35044 * ira.cc (ira): Use the param to switch on simple LRA.
35046 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
35048 PR tree-optimization/108687
35049 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
35050 back to RFD_NONE mode for calculations.
35051 (ranger_cache::propagate_cache): Call the internal edge range API
35052 with RFD_READ_ONLY instead of changing the external routine.
35054 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
35056 PR tree-optimization/108520
35057 * gimple-range-infer.cc (check_assume_func): Invoke
35058 gimple_range_global directly instead using global_range_query.
35059 * value-query.cc (get_range_global): Add function context and
35060 avoid calling nonnull_arg_p if not cfun.
35061 (gimple_range_global): Add function context pointer.
35062 * value-query.h (imple_range_global): Add function context.
35064 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35066 * config/riscv/constraints.md (Wdm): Adjust constraint.
35067 (Wbr): New constraint.
35068 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
35069 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
35070 (emit_vlmax_op): New function.
35071 (emit_nonvlmax_op): Ditto.
35073 (neg_simm5_p): Ditto.
35074 (has_vi_variant_p): Ditto.
35075 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
35076 (emit_vlmax_op): New function.
35077 (emit_nonvlmax_op): Ditto.
35078 (expand_const_vector): Adjust function.
35079 (legitimize_move): Ditto.
35080 (simm32_p): New function.
35082 (neg_simm5_p): Ditto.
35083 (has_vi_variant_p): Ditto.
35084 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
35086 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35087 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
35090 (vminu): Remove signed cases.
35092 (vdiv): Remove unsigned cases.
35094 (vdivu): Remove signed cases.
35098 (vrsub): New class.
35103 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
35104 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
35105 * config/riscv/vector-iterators.md: New iterators.
35106 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
35108 (@pred_<optab><mode>_scalar): New pattern.
35109 (@pred_sub<mode>_reverse_scalar): Ditto.
35110 (*pred_<optab><mode>_scalar): Ditto.
35111 (*pred_<optab><mode>_extended_scalar): Ditto.
35112 (*pred_sub<mode>_reverse_scalar): Ditto.
35113 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
35115 2023-02-10 Richard Biener <rguenther@suse.de>
35117 PR tree-optimization/108724
35118 * tree-vect-stmts.cc (vectorizable_operation): Avoid
35119 using word_mode vectors when vector lowering will
35120 decompose them to elementwise operations.
35122 2023-02-10 Jakub Jelinek <jakub@redhat.com>
35125 2023-02-09 Martin Liska <mliska@suse.cz>
35128 * doc/extend.texi: Document that the function
35129 does not work correctly for old VIA processors.
35131 2023-02-10 Andrew Pinski <apinski@marvell.com>
35132 Andrew Macleod <amacleod@redhat.com>
35134 PR tree-optimization/108684
35135 * tree-ssa-dce.cc (simple_dce_from_worklist):
35136 Check all ssa names and not just non-vdef ones
35137 before accepting the inline-asm.
35138 Call unlink_stmt_vdef on the statement before
35141 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
35143 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35144 * ira.cc (validate_equiv_mem): Check memref address variance.
35145 (no_equiv): Clear caller_save_p flag.
35146 (update_equiv_regs): Define caller save equivalence for
35148 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35149 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35150 call_save_p. Use caller save equivalence depending on the arg.
35151 (split_reg): Adjust the call.
35153 2023-02-09 Jakub Jelinek <jakub@redhat.com>
35156 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
35157 (cpu_indicator_init): Call get_available_features for all CPUs with
35158 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
35161 2023-02-09 Jakub Jelinek <jakub@redhat.com>
35163 PR tree-optimization/108688
35164 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
35165 of BIT_INSERT_EXPR extracting exactly all inserted bits even
35166 when without mode precision. Formatting fixes.
35168 2023-02-09 Andrew Pinski <apinski@marvell.com>
35170 PR tree-optimization/108688
35171 * match.pd (bit_field_ref [bit_insert]): Avoid generating
35172 BIT_FIELD_REFs of non-mode-precision integral operands.
35174 2023-02-09 Martin Liska <mliska@suse.cz>
35177 * doc/extend.texi: Document that the function
35178 does not work correctly for old VIA processors.
35180 2023-02-09 Andreas Schwab <schwab@suse.de>
35182 * lto-wrapper.cc (merge_and_complain): Handle
35183 -funwind-tables and -fasynchronous-unwind-tables.
35184 (append_compiler_options): Likewise.
35186 2023-02-09 Richard Biener <rguenther@suse.de>
35188 PR tree-optimization/26854
35189 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
35190 view around insert_updated_phi_nodes_for.
35191 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
35193 (walk_aliased_vdefs_1): Likewise.
35195 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
35197 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
35199 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35202 * config.gcc (tm_mlib_file): Define new variable.
35204 2023-02-08 Jakub Jelinek <jakub@redhat.com>
35206 PR tree-optimization/108692
35207 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
35208 widened_code which is different from code, don't call
35209 vect_look_through_possible_promotion but instead just check op is
35210 SSA_NAME with integral type for which vect_is_simple_use is true
35211 and call set_op on this_unprom.
35213 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
35215 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
35217 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
35219 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
35220 to 'aarch_ra_sign_key'.
35221 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
35223 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
35224 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
35225 * config/arm/arm.opt: Define.
35227 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
35229 PR tree-optimization/108316
35230 * tree-vect-stmts.cc (get_load_store_type): When using
35231 internal functions for gather/scatter, make sure that the type
35232 of the offset argument is consistent with the offset vector type.
35234 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
35237 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
35239 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35240 * ira.cc (validate_equiv_mem): Check memref address variance.
35241 (update_equiv_regs): Define caller save equivalence for
35243 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35244 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35245 call_save_p. Use caller save equivalence depending on the arg.
35246 (split_reg): Adjust the call.
35248 2023-02-08 Jakub Jelinek <jakub@redhat.com>
35250 * tree.def (SAD_EXPR): Remove outdated comment about missing
35253 2023-02-07 Marek Polacek <polacek@redhat.com>
35255 * doc/invoke.texi: Update -fchar8_t documentation.
35257 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
35259 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35260 * ira.cc (validate_equiv_mem): Check memref address variance.
35261 (update_equiv_regs): Define caller save equivalence for
35263 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35264 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35265 call_save_p. Use caller save equivalence depending on the arg.
35266 (split_reg): Adjust the call.
35268 2023-02-07 Richard Biener <rguenther@suse.de>
35270 PR tree-optimization/26854
35271 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
35272 instead of immediate uses.
35274 2023-02-07 Jakub Jelinek <jakub@redhat.com>
35276 PR tree-optimization/106923
35277 * ipa-split.cc (execute_split_functions): Don't split returns_twice
35280 2023-02-07 Jakub Jelinek <jakub@redhat.com>
35282 PR tree-optimization/106433
35283 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
35284 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
35286 2023-02-07 Jan Hubicka <jh@suse.cz>
35288 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
35291 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
35293 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
35294 (process_asm): Create a constructor for GCN_STACK_SIZE.
35295 (main): Parse the -mstack-size option.
35297 2023-02-06 Alex Coplan <alex.coplan@arm.com>
35300 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
35301 Use correct constraint for operand 3.
35303 2023-02-06 Martin Jambor <mjambor@suse.cz>
35305 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
35307 2023-02-06 Xi Ruoyao <xry111@xry111.site>
35309 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
35310 New define_int_iterator.
35311 (bytepick_d_ashift_amount): Likewise.
35312 (bytepick_imm): New define_int_attr.
35313 (bytepick_w_lshiftrt_amount): Likewise.
35314 (bytepick_d_lshiftrt_amount): Likewise.
35315 (bytepick_w_<bytepick_imm>): New define_insn template.
35316 (bytepick_w_<bytepick_imm>_extend): Likewise.
35317 (bytepick_d_<bytepick_imm>): Likewise.
35318 (bytepick_w): Remove unused define_insn.
35319 (bytepick_d): Likewise.
35320 (UNSPEC_BYTEPICK_W): Remove unused unspec.
35321 (UNSPEC_BYTEPICK_D): Likewise.
35322 * config/loongarch/predicates.md (const_0_to_3_operand):
35323 Remove unused define_predicate.
35324 (const_0_to_7_operand): Likewise.
35326 2023-02-06 Jakub Jelinek <jakub@redhat.com>
35328 PR tree-optimization/108655
35329 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
35330 or -fsanitize=unreachable -fsanitize-trap=unreachable return
35331 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
35333 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
35335 * doc/install.texi (Specific): Remove PW32.
35337 2023-02-03 Jakub Jelinek <jakub@redhat.com>
35339 PR tree-optimization/108647
35340 * range-op.cc (operator_equal::op1_range,
35341 operator_not_equal::op1_range): Don't test op2 bound
35342 equality if op2.undefined_p (), instead set_varying.
35343 (operator_lt::op1_range, operator_le::op1_range,
35344 operator_gt::op1_range, operator_ge::op1_range): Return false if
35345 op2.undefined_p ().
35346 (operator_lt::op2_range, operator_le::op2_range,
35347 operator_gt::op2_range, operator_ge::op2_range): Return false if
35348 op1.undefined_p ().
35350 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
35352 PR tree-optimization/108639
35353 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
35355 (irange::operator==): Same.
35357 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
35359 PR tree-optimization/108647
35360 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
35361 (foperator_lt::op2_range): Same.
35362 (foperator_le::op1_range): Same.
35363 (foperator_le::op2_range): Same.
35364 (foperator_gt::op1_range): Same.
35365 (foperator_gt::op2_range): Same.
35366 (foperator_ge::op1_range): Same.
35367 (foperator_ge::op2_range): Same.
35368 (foperator_unordered_lt::op1_range): Same.
35369 (foperator_unordered_lt::op2_range): Same.
35370 (foperator_unordered_le::op1_range): Same.
35371 (foperator_unordered_le::op2_range): Same.
35372 (foperator_unordered_gt::op1_range): Same.
35373 (foperator_unordered_gt::op2_range): Same.
35374 (foperator_unordered_ge::op1_range): Same.
35375 (foperator_unordered_ge::op2_range): Same.
35377 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
35379 PR tree-optimization/107570
35380 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
35382 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
35384 * doc/gm2.texi (Internals): Remove from menu.
35385 (Using): Comment out ifnohtml conditional.
35386 (Documentation): Use gcc url.
35387 (License): Node simplified.
35388 (Copying): New node. Include gpl_v3_without_node.
35389 (Contributing): Node simplified.
35390 (Internals): Commented out.
35391 (Libraries): Node simplified.
35394 (Functions): Ditto.
35396 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
35398 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
35400 (mve_vqshluq_m_n_s<mode>): Likewise.
35401 (mve_vshlq_m_<supf><mode>): Likewise.
35402 (mve_vsriq_m_n_<supf><mode>): Likewise.
35403 (mve_vsubq_m_<supf><mode>): Likewise.
35405 2023-02-03 Martin Jambor <mjambor@suse.cz>
35408 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
35409 when comparing to an IPA-CP value.
35410 (dump_list_of_param_indices): New function.
35411 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
35412 Dump removed candidates using dump_list_of_param_indices.
35413 * ipa-param-manipulation.cc
35414 (ipa_param_body_adjustments::modify_expression): Add assert checking
35415 sizes of a VIEW_CONVERT_EXPR will match.
35416 (ipa_param_body_adjustments::modify_assignment): Likewise.
35418 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
35420 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
35421 * config/riscv/riscv.cc: Ditto.
35423 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35425 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
35429 * config/riscv/vector.md: Ditto.
35431 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35433 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
35434 * config/riscv/riscv-vector-builtins-bases.cc: New class.
35435 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
35438 * config/riscv/riscv-vector-builtins.cc: Ditto.
35439 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
35441 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
35443 * toplev.cc (toplev::main): Only print the version information header
35444 from toplevel main().
35446 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
35448 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
35449 cond_{ashl|ashr|lshr}
35451 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
35453 PR rtl-optimization/108086
35454 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
35455 Adjust size-related commentary accordingly.
35457 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
35459 PR rtl-optimization/108508
35460 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
35461 the splay tree search gives the first clobber in the second group,
35462 make sure that the root of the first clobber group is updated
35463 correctly. Enter the new clobber group into the definition splay
35466 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
35468 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
35469 Fix finding best match score.
35471 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35474 PR rtl-optimization/108463
35476 * cselib.cc (cselib_current_insn): Move declaration earlier.
35477 (cselib_hasher::equal): For debug only locs, temporarily override
35478 cselib_current_insn to their l->setting_insn for the
35479 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
35480 promote some debug locs.
35481 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
35482 when using cselib call cselib_lookup_from_insn on the address but
35483 don't substitute it.
35485 2023-02-02 Richard Biener <rguenther@suse.de>
35487 PR middle-end/108625
35488 * genmatch.cc (expr::gen_transform): Also disallow resimplification
35489 from pushing to lseq with force_leaf.
35490 (dt_simplify::gen_1): Likewise.
35492 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
35494 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
35495 (struct kernargs): Replace the common content with kernargs_abi.
35496 (struct heap): Delete.
35497 (main): Read GCN_STACK_SIZE envvar.
35498 Allocate space for the device stacks.
35499 Write the new kernargs fields.
35500 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
35501 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
35502 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
35503 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
35504 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
35505 Set up the stacks from the values in the kernargs, not private.
35506 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
35507 (gcn_hsa_declare_function_name): Turn off the private segment.
35508 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
35509 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
35510 * config/gcn/gcn.opt (mstack-size): Change the description.
35512 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35515 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
35516 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
35517 addressing MVE predicate modes.
35518 (mve_bool_vec_to_const): Change to represent correct MVE predicate
35520 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
35522 (arm_vector_mode_supported_p): Likewise.
35523 (arm_mode_to_pred_mode): Add V2QI.
35524 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
35526 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
35527 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
35528 (v2qi_UP): New macro.
35529 (v4bi_UP): New macro.
35530 (v8bi_UP): New macro.
35531 (v16bi_UP): New macro.
35532 (arm_expand_builtin_args): Make it able to expand the new predicate
35534 * config/arm/arm-modes.def (V2QI): New mode.
35535 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
35536 Pred4x4_t): Remove unused predicate builtin types.
35537 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
35538 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
35539 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
35540 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
35541 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
35542 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
35543 of MODE_VECTOR_BOOL.
35544 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
35545 (MVE_VPRED): Likewise.
35546 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
35547 (MVE_vctp): New mode attribute.
35551 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
35552 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
35554 (mve_vpnothi): Rename this...
35555 (mve_vpnotv16bi): ... to this.
35556 (mve_vctp<mode1>q_mhi): Rename this...
35557 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
35558 (mve_vldrdq_gather_base_z_<supf>v2di,
35559 mve_vldrdq_gather_offset_z_<supf>v2di,
35560 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
35561 mve_vstrdq_scatter_base_p_<supf>v2di,
35562 mve_vstrdq_scatter_offset_p_<supf>v2di,
35563 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
35564 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
35565 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
35566 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
35567 mve_vldrdq_gather_base_wb_z_<supf>v2di,
35568 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
35569 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
35571 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
35573 (VCTP): ... with this.
35574 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
35575 (VCTP_M): ... with this.
35576 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
35577 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
35579 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35582 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
35583 (arm_modes_tieable_p): Make MVE predicate modes tieable.
35584 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
35585 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
35586 simplify_subreg to simplify subregs where the outermode is not scalar.
35588 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35591 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
35592 new qualifiers parameter and use unsigned short type for MVE predicate.
35593 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
35595 (arm_init_crypto_builtins): Likewise.
35597 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35600 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
35601 * internal-fn.def (TRAP): Remove.
35602 * internal-fn.cc (expand_TRAP): Remove.
35603 * tree.cc (build_common_builtin_nodes): Define
35604 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
35605 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
35606 instead of BUILT_IN_TRAP.
35607 * gimple.cc (gimple_build_builtin_unreachable): Remove
35608 emitting internal function for BUILT_IN_TRAP.
35609 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
35610 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
35611 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
35612 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
35613 BUILT_IN_UNREACHABLE_TRAP.
35614 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
35615 * tree-cfg.cc (verify_gimple_call,
35616 pass_warn_function_return::execute): Likewise.
35617 * attribs.cc (decl_attributes): Don't report exclusions on
35618 BUILT_IN_UNREACHABLE_TRAP either.
35620 2023-02-02 liuhongt <hongtao.liu@intel.com>
35622 PR tree-optimization/108601
35623 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
35624 * tree-vect-loop.cc
35625 (vectorizable_nonlinear_induction): Remove
35626 vect_can_peel_nonlinear_iv_p.
35627 (vect_can_peel_nonlinear_iv_p): Don't peel
35628 nonlinear iv(mult or shift) for epilog when vf is not
35629 constant and moved the defination to ..
35630 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
35633 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35635 PR middle-end/108435
35636 * tree-nested.cc (convert_nonlocal_omp_clauses)
35637 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
35638 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
35639 before calling declare_vars.
35640 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
35641 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
35642 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
35643 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
35645 2023-02-01 Tamar Christina <tamar.christina@arm.com>
35647 * common/config/aarch64/aarch64-common.cc
35648 (struct aarch64_option_extension): Add native_detect and document struct
35650 (all_extensions): Set new field native_detect.
35651 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
35654 2023-02-01 Martin Liska <mliska@suse.cz>
35656 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
35659 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
35661 PR tree-optimization/108356
35662 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
35663 do a search of the DOM tree for a range.
35665 2023-02-01 Martin Liska <mliska@suse.cz>
35668 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
35669 ony non-null values.
35670 * ipa.cc (walk_polymorphic_call_targets): Likewise.
35672 2023-02-01 Martin Liska <mliska@suse.cz>
35675 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
35678 2023-02-01 Jakub Jelinek <jakub@redhat.com>
35681 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
35682 subregs in DEBUG_INSNs.
35684 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
35686 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
35688 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
35690 * config/s390/s390.cc (s390_restore_gpr_p): New function.
35691 (s390_preserve_gpr_arg_in_range_p): New function.
35692 (s390_preserve_gpr_arg_p): New function.
35693 (s390_preserve_fpr_arg_p): New function.
35694 (s390_register_info_stdarg_fpr): Rename to ...
35695 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
35696 (s390_register_info_stdarg_gpr): Rename to ...
35697 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
35698 (s390_register_info): Use the renamed functions above.
35699 (s390_optimize_register_info): Likewise.
35700 (save_fpr): Generate CFI for -mpreserve-args.
35701 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
35702 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
35703 (s390_optimize_prologue): Likewise.
35704 * config/s390/s390.opt: New option -mpreserve-args
35706 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
35708 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
35709 (restore_gprs): Likewise.
35710 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
35711 frame pointer if a frame-pointer is used.
35712 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
35713 * config/s390/s390.md (stack_tie): Add a register operand and
35715 (@stack_tie<mode>): ... this.
35717 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
35719 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
35720 EMIT_CFI parameter.
35721 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
35722 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
35724 2023-02-01 Richard Biener <rguenther@suse.de>
35726 PR middle-end/108500
35727 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
35728 with tree traversal algorithm.
35730 2023-02-01 Jason Merrill <jason@redhat.com>
35732 * doc/invoke.texi: Document -Wno-changes-meaning.
35734 2023-02-01 David Malcolm <dmalcolm@redhat.com>
35736 * doc/invoke.texi (Static Analyzer Options): Add notes about
35737 limitations of -fanalyzer.
35739 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35741 * config/riscv/constraints.md (vj): New.
35743 * config/riscv/iterators.md: Add more opcode.
35744 * config/riscv/predicates.md (vector_arith_operand): New.
35745 (vector_neg_arith_operand): New.
35746 (vector_shift_operand): New.
35747 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
35748 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
35765 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
35782 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
35783 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
35784 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
35785 (DEF_RVV_U_OPS): New.
35786 (rvv_arg_type_info::get_base_vector_type): Handle
35787 RVV_BASE_shift_vector.
35788 (rvv_arg_type_info::get_tree_type): Ditto.
35789 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
35790 RVV_BASE_shift_vector.
35791 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
35792 * config/riscv/vector-iterators.md: Handle more opcode.
35793 * config/riscv/vector.md (@pred_<optab><mode>): New.
35795 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
35798 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
35801 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
35803 PR tree-optimization/108608
35804 * tree-vect-loop.cc (vect_transform_reduction): Handle single
35805 def-use cycles that involve function calls rather than tree codes.
35807 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35809 PR tree-optimization/108385
35810 * gimple-range-gori.cc (gori_compute::compute_operand_range):
35811 Allow VARYING computations to continue if there is a relation.
35812 * range-op.cc (pointer_plus_operator::op2_range): New.
35814 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35816 PR tree-optimization/108359
35817 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
35818 (range_operator::fold_range): If op1 is equivalent to op2 then
35819 invoke new fold_in_parts_equiv to operate on sub-components.
35820 * range-op.h (wi_fold_in_parts_equiv): New prototype.
35822 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35824 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
35825 not abort calculations if there is a valid relation available.
35826 (gori_compute::refine_using_relation): Pass correct relation trio.
35827 (gori_compute::compute_operand1_range): Create trio and use it.
35828 (gori_compute::compute_operand2_range): Ditto.
35829 * range-op.cc (operator_plus::op1_range): Use correct trio member.
35830 (operator_minus::op1_range): Use correct trio member.
35831 * value-relation.cc (value_relation::create_trio): New.
35832 * value-relation.h (value_relation::create_trio): New prototype.
35834 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35837 * config/i386/i386-expand.cc
35838 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
35839 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
35840 equal to bitsize of mode.
35842 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35844 PR rtl-optimization/108596
35845 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
35846 ends with asm goto and has a crossing fallthrough edge to the same bb
35847 that contains at least one of its labels by restoring EDGE_CROSSING
35848 flag even on possible edge from cur_bb to new_bb successor.
35850 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35853 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
35854 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
35855 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
35856 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
35857 uninitialized automatic variable __W.
35859 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
35861 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
35863 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35865 * config/riscv/riscv-protos.h (get_vector_mode): New function.
35866 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
35867 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
35868 (class loadstore): Adjust for indexed loads/stores support.
35870 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
35871 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
35887 * config/riscv/riscv-vector-builtins-shapes.cc
35888 (struct indexed_loadstore_def): New class.
35890 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35891 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
35892 for indexed loads/stores support.
35893 (check_required_extensions): Ditto.
35894 (rvv_arg_type_info::get_base_vector_type): New function.
35895 (rvv_arg_type_info::get_tree_type): Ditto.
35896 (function_builder::add_unique_function): Adjust for indexed loads/stores
35898 (function_expander::use_exact_insn): New function.
35899 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
35900 indexed loads/stores support.
35901 (struct rvv_arg_type_info): Ditto.
35902 (function_expander::index_mode): New function.
35903 (function_base::apply_tail_policy_p): Ditto.
35904 (function_base::apply_mask_policy_p): Ditto.
35905 * config/riscv/vector-iterators.md (unspec): New unspec.
35906 * config/riscv/vector.md (unspec): Ditto.
35907 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
35909 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
35910 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
35911 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
35912 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35913 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35914 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35915 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35916 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35917 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35918 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35919 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35920 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35921 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35923 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
35925 * config.gcc: Recognize x86_64-*-gnu* targets and include
35927 * config/i386/gnu64.h: Define configuration for new target
35928 including ld.so location.
35930 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
35932 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
35933 ampere1a to include SM4.
35935 2023-01-30 Andrew Pinski <apinski@marvell.com>
35937 PR tree-optimization/108582
35938 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
35939 for middlebb to have no phi nodes.
35941 2023-01-30 Richard Biener <rguenther@suse.de>
35943 PR tree-optimization/108574
35944 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
35945 sameval and def, ignore the equivalence if there's the
35946 danger of oscillating between two values.
35948 2023-01-30 Andreas Schwab <schwab@suse.de>
35950 * common/config/riscv/riscv-common.cc
35951 (riscv_option_optimization_table)
35952 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
35953 -fasynchronous-unwind-tables and -funwind-tables.
35954 * config.gcc (riscv*-*-linux*): Define
35955 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
35957 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
35959 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
35960 value of includedir.
35962 2023-01-30 Richard Biener <rguenther@suse.de>
35965 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
35968 2023-01-30 liuhongt <hongtao.liu@intel.com>
35970 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
35971 * doc/invoke.texi: Ditto.
35973 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
35975 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
35976 (stmt_may_terminate_function_p): If assuming return or EH
35977 volatile asm is safe.
35978 (find_always_executed_bbs): Fix handling of terminating BBS and
35979 infinite loops; add debug output.
35980 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
35982 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
35984 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
35985 off-by-one in checking the permissible shift-amount.
35987 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35989 * doc/extend.texi (Named Address Spaces): Update link to the
35992 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35994 * doc/standards.texi (Standards): Fix markup.
35996 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35998 * doc/standards.texi (Standards): Update link to Objective-C book.
36000 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36002 * doc/invoke.texi (Instrumentation Options): Update reference to
36005 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36007 * doc/standards.texi: Update Go1 link.
36009 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36011 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
36012 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
36015 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36016 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
36018 * config/riscv/riscv-vector-builtins.cc
36019 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
36020 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
36021 (@pred_strided_store<mode>): Ditto.
36023 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36025 * config/riscv/vector.md (tail_policy_op_idx): Remove.
36026 (mask_policy_op_idx): Remove.
36027 (avl_type_op_idx): Remove.
36029 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
36031 PR tree-optimization/96373
36032 * tree.h (sign_mask_for): Declare.
36033 * tree.cc (sign_mask_for): New function.
36034 (signed_or_unsigned_type_for): For vector types, try to use the
36035 related_int_vector_mode.
36036 * genmatch.cc (commutative_op): Handle conditional internal functions.
36037 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
36039 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
36041 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
36042 Use the likely minimum VF when bounding the denominators to
36043 the estimated number of iterations.
36045 2023-01-27 Richard Biener <rguenther@suse.de>
36048 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
36049 and -Ofast FP environment side-effects.
36051 2023-01-27 Richard Biener <rguenther@suse.de>
36054 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
36055 Don't add crtfastmath.o for -shared.
36057 2023-01-27 Richard Biener <rguenther@suse.de>
36060 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
36063 2023-01-27 Richard Biener <rguenther@suse.de>
36066 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
36067 crtfastmath.o for -shared.
36069 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
36071 PR tree-optimization/108306
36072 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
36073 varying for shifts that are always out of void range.
36074 (operator_rshift::fold_range): Return [0, 0] not
36075 varying for shifts that are always out of void range.
36077 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
36079 PR tree-optimization/108447
36080 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
36081 Do not attempt to fold HONOR_NAN types.
36083 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36085 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
36086 Remove _m suffix for "vop_m" C++ overloaded API name.
36088 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36090 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
36091 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36092 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
36094 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
36095 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
36096 (vbool64_t): Ditto.
36097 (vbool32_t): Ditto.
36098 (vbool16_t): Ditto.
36103 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
36104 (rvv_arg_type_info::get_tree_type): Ditto.
36105 (function_expander::use_contiguous_load_insn): Ditto.
36106 * config/riscv/vector.md (@pred_store<mode>): Ditto.
36108 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36110 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
36111 (vsetvl_discard_result_insn_p): New function.
36112 (reg_killed_by_bb_p): rename to find_reg_killed_by.
36113 (find_reg_killed_by): New name.
36114 (get_vl): allow it to be called by more functions.
36115 (has_vsetvl_killed_avl_p): Add condition.
36116 (get_avl): allow it to be called by more functions.
36117 (insn_should_be_added_p): New function.
36118 (get_all_nonphi_defs): Refine function.
36119 (get_all_sets): Ditto.
36120 (get_same_bb_set): New function.
36121 (any_insn_in_bb_p): Ditto.
36122 (any_set_in_bb_p): Ditto.
36123 (get_vl_vtype_info): Add VLMAX forward optimization.
36124 (source_equal_p): Fix issues.
36125 (extract_single_source): Refine.
36126 (avl_info::multiple_source_equal_p): New function.
36127 (avl_info::operator==): Adjust for final version.
36128 (vl_vtype_info::operator==): Ditto.
36129 (vl_vtype_info::same_avl_p): Ditto.
36130 (vector_insn_info::parse_insn): Ditto.
36131 (vector_insn_info::available_p): New function.
36132 (vector_insn_info::merge): Adjust for final version.
36133 (vector_insn_info::dump): Add hard_empty.
36134 (pass_vsetvl::hard_empty_block_p): New function.
36135 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
36136 (pass_vsetvl::forward_demand_fusion): Ditto.
36137 (pass_vsetvl::demand_fusion): Ditto.
36138 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
36139 (pass_vsetvl::compute_local_properties): Adjust for final version.
36140 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
36141 (pass_vsetvl::refine_vsetvls): Ditto.
36142 (pass_vsetvl::commit_vsetvls): Ditto.
36143 (pass_vsetvl::propagate_avl): New function.
36144 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
36145 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
36147 2023-01-27 Jakub Jelinek <jakub@redhat.com>
36150 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
36151 from size_t to int.
36153 2023-01-27 Jakub Jelinek <jakub@redhat.com>
36156 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
36157 redirection of calls to __builtin_trap in addition to redirection
36158 to __builtin_unreachable.
36160 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36162 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
36164 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36166 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
36167 (emit_vsetvl_insn): Ditto.
36169 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36171 * config/riscv/vector.md: Fix constraints.
36173 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36175 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
36177 2023-01-27 Patrick Palka <ppalka@redhat.com>
36178 Jakub Jelinek <jakub@redhat.com>
36180 * tree-core.h (tree_code_type, tree_code_length): For
36181 C++17 and later, add inline keyword, otherwise don't define
36182 the arrays, but declare extern arrays.
36183 * tree.cc (tree_code_type, tree_code_length): Define these
36184 arrays for C++14 and older.
36186 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36188 * config/riscv/riscv-vsetvl.h: Change it into public.
36190 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36192 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
36195 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36197 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
36199 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36201 * config/riscv/vector.md: Fix incorrect attributes.
36203 2023-01-27 Richard Biener <rguenther@suse.de>
36206 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
36207 Don't add crtfastmath.o for -shared.
36209 2023-01-27 Alexandre Oliva <oliva@gnu.org>
36211 * doc/options.texi (option, RejectNegative): Mention that
36212 -g-started options are also implicitly negatable.
36214 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
36216 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
36217 Use get_typenode_from_name to get fixed-width integer type
36219 * config/riscv/riscv-vector-builtins.def: Update define with
36220 fixed-width integer type nodes.
36222 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36224 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
36225 (real_insn_and_same_bb_p): New function.
36226 (same_bb_and_after_or_equal_p): Remove it.
36227 (before_p): New function.
36228 (reg_killed_by_bb_p): Ditto.
36229 (has_vsetvl_killed_avl_p): Ditto.
36230 (get_vl): Move location so that we can call it.
36231 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
36232 (available_occurrence_p): Ditto.
36233 (dominate_probability_p): Remove it.
36234 (can_backward_propagate_p): Remove it.
36235 (get_all_nonphi_defs): New function.
36236 (get_all_predecessors): Ditto.
36237 (any_insn_in_bb_p): Ditto.
36238 (insert_vsetvl): Adjust AVL REG.
36239 (source_equal_p): New function.
36240 (extract_single_source): Ditto.
36241 (avl_info::single_source_equal_p): Ditto.
36242 (avl_info::operator==): Adjust for AVL=REG.
36243 (vl_vtype_info::same_avl_p): Ditto.
36244 (vector_insn_info::set_demand_info): Remove it.
36245 (vector_insn_info::compatible_p): Adjust for AVL=REG.
36246 (vector_insn_info::compatible_avl_p): New function.
36247 (vector_insn_info::merge): Adjust AVL=REG.
36248 (vector_insn_info::dump): Ditto.
36249 (pass_vsetvl::merge_successors): Remove it.
36250 (enum fusion_type): New enum.
36251 (pass_vsetvl::get_backward_fusion_type): New function.
36252 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
36253 (pass_vsetvl::forward_demand_fusion): Ditto.
36254 (pass_vsetvl::demand_fusion): Ditto.
36255 (pass_vsetvl::prune_expressions): Ditto.
36256 (pass_vsetvl::compute_local_properties): Ditto.
36257 (pass_vsetvl::cleanup_vsetvls): Ditto.
36258 (pass_vsetvl::commit_vsetvls): Ditto.
36259 (pass_vsetvl::init): Ditto.
36260 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
36261 (enum merge_type): New enum.
36263 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36265 * config/riscv/riscv-vsetvl.cc
36266 (vector_infos_manager::vector_infos_manager): Add probability.
36267 (vector_infos_manager::dump): Ditto.
36268 (pass_vsetvl::compute_probabilities): Ditto.
36269 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
36271 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36273 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
36274 (vector_insn_info::merge): Ditto.
36275 (vector_insn_info::dump): Ditto.
36276 (pass_vsetvl::merge_successors): Ditto.
36277 (pass_vsetvl::backward_demand_fusion): Ditto.
36278 (pass_vsetvl::forward_demand_fusion): Ditto.
36279 (pass_vsetvl::commit_vsetvls): Ditto.
36280 * config/riscv/riscv-vsetvl.h: Ditto.
36282 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36284 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
36287 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36289 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
36291 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36293 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
36294 Add pre-check for redundant flow.
36296 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36298 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
36299 (vector_infos_manager::free_bitmap_vectors): Ditto.
36300 (pass_vsetvl::pre_vsetvl): Adjust codes.
36301 * config/riscv/riscv-vsetvl.h: New function declaration.
36303 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36305 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
36306 (vector_insn_info::set_demand_info): New function.
36307 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
36308 (pass_vsetvl::merge_successors): Ditto.
36309 (pass_vsetvl::compute_global_backward_infos): Ditto.
36310 (pass_vsetvl::backward_demand_fusion): Ditto.
36311 (pass_vsetvl::forward_demand_fusion): Ditto.
36312 (pass_vsetvl::demand_fusion): New function.
36313 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
36314 * config/riscv/riscv-vsetvl.h: New function declaration.
36316 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36318 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
36320 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36322 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
36323 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
36325 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36327 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
36328 (backward_propagate_worthwhile_p): Fix non-worthwhile.
36330 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36332 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
36334 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36336 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
36337 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
36338 (pass_vsetvl::commit_vsetvls): Ditto.
36339 * config/riscv/riscv-vsetvl.h: New function declaration.
36341 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36343 * config/riscv/vector.md:
36345 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36347 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
36348 pred_store for vse.
36349 * config/riscv/riscv-vector-builtins.cc
36350 (function_expander::add_mem_operand): Refine function.
36351 (function_expander::use_contiguous_load_insn): Adjust new
36353 (function_expander::use_contiguous_store_insn): Ditto.
36354 * config/riscv/riscv-vector-builtins.h: Refine function.
36355 * config/riscv/vector.md (@pred_store<mode>): New pattern.
36357 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36359 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
36361 2023-01-26 Marek Polacek <polacek@redhat.com>
36363 PR middle-end/108543
36364 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
36365 if it was previously set.
36367 2023-01-26 Jakub Jelinek <jakub@redhat.com>
36369 PR tree-optimization/108540
36370 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
36371 are singletons, use range_true even if op1 != op2
36372 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
36373 even if intersection of the ranges is empty and one has
36374 zero low bound and another zero high bound, use range_true_and_false
36375 rather than range_false.
36376 (foperator_not_equal::fold_range): If both op1 and op2
36377 are singletons, use range_false even if op1 != op2
36378 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
36379 even if intersection of the ranges is empty and one has
36380 zero low bound and another zero high bound, use range_true_and_false
36381 rather than range_true.
36383 2023-01-26 Jakub Jelinek <jakub@redhat.com>
36385 * value-relation.cc (kind_string): Add const.
36386 (rr_negate_table, rr_swap_table, rr_intersect_table,
36387 rr_union_table, rr_transitive_table): Add static const, change
36388 element type from relation_kind to unsigned char.
36389 (relation_negate, relation_swap, relation_intersect, relation_union,
36390 relation_transitive): Cast rr_*_table element to relation_kind.
36391 (relation_to_code): Add static const.
36392 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
36394 2023-01-26 Richard Biener <rguenther@suse.de>
36396 PR tree-optimization/108547
36397 * gimple-predicate-analysis.cc (value_sat_pred_p):
36400 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
36402 PR tree-optimization/108522
36403 * tree-object-size.cc (compute_object_offset): Make EXPR
36404 argument non-const. Call component_ref_field_offset.
36406 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36408 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
36409 FEATURE_STRING field.
36411 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
36413 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
36415 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
36419 * gcc.cc: Provide default specs for Modula-2 so that when the
36420 language is not built-in better diagnostics are emitted for
36421 attempts to use .mod or .m2i file extensions.
36423 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36425 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
36427 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36429 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
36431 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36433 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
36436 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36438 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
36440 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36442 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
36444 2023-01-25 Richard Biener <rguenther@suse.de>
36446 PR tree-optimization/108523
36447 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
36448 backedge value for the result when using predication to
36451 2023-01-25 Richard Biener <rguenther@suse.de>
36453 * doc/lto.texi (Command line options): Reword and update reference
36454 to removed lto_read_all_file_options.
36456 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
36458 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
36461 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
36463 * doc/contrib.texi: Add Jose E. Marchesi.
36465 2023-01-25 Jakub Jelinek <jakub@redhat.com>
36467 PR tree-optimization/108498
36468 * gimple-ssa-store-merging.cc (class store_operand_info):
36469 End coment with full stop rather than comma.
36470 (split_group): Likewise.
36471 (merged_store_group::apply_stores): Clear string_concatenation if
36472 start or end aren't on a byte boundary.
36474 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
36475 Jakub Jelinek <jakub@redhat.com>
36477 PR tree-optimization/108522
36478 * tree-object-size.cc (compute_object_offset): Use
36479 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
36481 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36483 * config/xtensa/xtensa.md:
36484 Fix exit from loops detecting references before overwriting in the
36487 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
36489 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
36490 do elimination but only for hard register.
36491 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
36492 calls of get_hard_regno.
36494 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36496 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
36499 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
36502 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
36503 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
36506 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36508 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
36509 and only include 'csky/t-csky-linux' when enable multilib.
36510 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
36511 define it when disable multilib.
36513 2023-01-24 Richard Biener <rguenther@suse.de>
36515 PR tree-optimization/108500
36516 * dominance.h (calculate_dominance_info): Add parameter
36517 to indicate fast-query compute, defaulted to true.
36518 * dominance.cc (calculate_dominance_info): Honor
36519 fast-query compute parameter.
36520 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
36521 not compute the dominator fast-query DFS numbers.
36523 2023-01-24 Eric Biggers <ebiggers@google.com>
36526 * optc-save-gen.awk: Fix copy-and-paste error.
36528 2023-01-24 Jakub Jelinek <jakub@redhat.com>
36531 * cgraphbuild.cc: Include gimplify.h.
36532 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
36533 their corresponding DECL_VALUE_EXPR expressions after unsharing.
36535 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36538 * config.gcc (tm_file): Move the variable out of loop.
36540 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
36541 Yang Yujie <yangyujie@loongson.cn>
36544 * config/loongarch/loongarch.cc (loongarch_classify_address):
36545 Add precessint for CONST_INT.
36546 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
36547 (loongarch_print_operand): Increase the processing of '%c'.
36548 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
36549 And port the public operand modifiers information to this document.
36551 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36553 * doc/invoke.texi (-mbranch-protection): Update documentation.
36555 2023-01-23 Richard Biener <rguenther@suse.de>
36558 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
36560 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
36561 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
36562 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
36563 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
36565 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36567 * config/arm/aout.h (ra_auth_code): Add entry in enum.
36568 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
36569 to dwarf frame expression.
36570 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
36571 (arm_expand_prologue): Update frame related information and reg notes
36572 for pac/pacbit insn.
36573 (arm_regno_class): Check for pac pseudo reigster.
36574 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
36575 (arm_init_machine_status): Set pacspval_needed to zero.
36576 (arm_debugger_regno): Check for PAC register.
36577 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
36579 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
36580 (arm_unwind_emit): Update REG_CFA_REGISTER case._
36581 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
36582 (DWARF_PAC_REGNUM): Define.
36583 (IS_PAC_REGNUM): Likewise.
36584 (enum reg_class): Add PAC_REG entry.
36585 (machine_function): Add pacbti_needed state to structure.
36586 * config/arm/arm.md (RA_AUTH_CODE): Define.
36588 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36590 * config.gcc ($tm_file): Update variable.
36591 * config/arm/arm-mlib.h: Create new header file.
36592 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
36593 multilib arch directory.
36594 (MULTILIB_REUSE): Add multilib reuse rules.
36595 (MULTILIB_MATCHES): Add multilib match rules.
36597 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36599 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
36600 * config/arm/arm-tables.opt: Regenerate.
36601 * config/arm/arm-tune.md: Likewise.
36602 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
36603 * (-mfix-cmse-cve-2021-35465): Likewise.
36605 2023-01-23 Richard Biener <rguenther@suse.de>
36607 PR tree-optimization/108482
36608 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
36609 .LOOP_DIST_ALIAS calls.
36611 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36613 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
36614 * config/arm/arm-protos.h: Update.
36615 * config/arm/aarch-common-protos.h: Declare
36616 'aarch_bti_arch_check'.
36617 * config/arm/arm.cc (aarch_bti_enabled) Update.
36618 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
36619 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
36620 * config/arm/arm.md (bti_nop): New insn.
36621 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
36622 (aarch-bti-insert.o): New target.
36623 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
36624 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
36626 (gate): Make use of 'aarch_bti_arch_check'.
36627 * config/arm/arm-passes.def: New file.
36628 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
36630 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36632 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
36633 'aarch-bti-insert.o'.
36634 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
36636 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
36637 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
36638 (aarch64_output_mi_thunk)
36639 (aarch64_print_patchable_function_entry)
36640 (aarch64_file_end_indicate_exec_stack): Update renamed function
36641 calls to renamed functions.
36642 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
36643 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
36645 * config/aarch64/aarch64-bti-insert.cc: Delete.
36646 * config/arm/aarch-bti-insert.cc: New file including and
36647 generalizing code from aarch64-bti-insert.cc.
36648 * config/arm/aarch-common-protos.h: Update.
36650 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36652 * config/arm/arm.h (arm_arch8m_main): Declare it.
36653 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
36655 * config/arm/arm.cc (arm_arch8m_main): Define it.
36656 (arm_option_reconfigure_globals): Set arm_arch8m_main.
36657 (arm_compute_frame_layout, arm_expand_prologue)
36658 (thumb2_expand_return, arm_expand_epilogue)
36659 (arm_conditional_register_usage): Update for pac codegen.
36660 (arm_current_function_pac_enabled_p): New function.
36661 (aarch_bti_enabled) New function.
36662 (use_return_insn): Return zero when pac is enabled.
36663 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
36665 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
36666 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
36668 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36670 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
36671 mbranch-protection.
36673 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36674 Tejas Belagod <tbelagod@arm.com>
36676 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
36677 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
36679 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36680 Tejas Belagod <tbelagod@arm.com>
36681 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36683 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
36684 new pseudo register class _UVRSC_PAC.
36686 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36687 Tejas Belagod <tbelagod@arm.com>
36689 * config/arm/arm-c.cc (arm_cpu_builtins): Define
36690 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
36691 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
36693 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36694 Tejas Belagod <tbelagod@arm.com>
36696 * doc/sourcebuild.texi: Document arm_pacbti_hw.
36698 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36699 Tejas Belagod <tbelagod@arm.com>
36700 Richard Earnshaw <Richard.Earnshaw@arm.com>
36702 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
36703 -mbranch-protection option and initialize appropriate data structures.
36704 * config/arm/arm.opt (-mbranch-protection): New option.
36705 * doc/invoke.texi (Arm Options): Document it.
36707 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36708 Tejas Belagod <tbelagod@arm.com>
36710 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
36711 * config/arm/arm-cpus.in (pacbti): New feature.
36712 * doc/invoke.texi (Arm Options): Document it.
36714 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36715 Tejas Belagod <tbelagod@arm.com>
36717 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
36718 (all_architectures): Fix comment.
36719 (aarch64_parse_extension): Rename return type, enum value names.
36720 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
36721 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
36722 Also rename corresponding enum values.
36723 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
36724 out aarch64_function_type and move it to common code as
36725 aarch_function_type in aarch-common.h.
36726 * config/aarch64/aarch64-protos.h: Include common types header,
36727 move out types aarch64_parse_opt_result and aarch64_key_type to
36729 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
36730 and functions out into aarch-common.h and aarch-common.cc. Fix up
36731 all the name changes resulting from the move.
36732 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
36734 * config/aarch64/aarch64.opt: Include aarch-common.h to import
36735 type move. Fix up name changes from factoring out common code and
36737 * config/arm/aarch-common-protos.h: Export factored out routines to both
36739 * config/arm/aarch-common.cc: Include newly factored out types.
36740 Move all mbranch-protection code and data structures from
36742 * config/arm/aarch-common.h: New header that declares types shared
36743 between aarch32 and aarch64 backends.
36744 * config/arm/arm-protos.h: Declare types and variables that are
36745 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
36746 aarch_ra_sign_scope and aarch_enable_bti.
36747 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
36748 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
36749 * config/arm/arm.cc: Add missing includes.
36751 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
36753 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
36755 2023-01-23 Richard Biener <rguenther@suse.de>
36757 PR tree-optimization/108449
36758 * cgraphunit.cc (check_global_declaration): Do not turn
36759 undefined statics into externs.
36761 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
36763 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
36764 and HI input modes.
36765 * config/pru/pru.md (clz): Fix generated code for QI and HI
36768 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
36770 * config/v850/v850.cc (v850_select_section): Put const volatile
36771 objects into read-only sections.
36773 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
36775 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
36776 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
36777 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
36779 2023-01-20 Jakub Jelinek <jakub@redhat.com>
36781 PR tree-optimization/108457
36782 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
36783 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
36784 argument instead of a temporary. Formatting fixes.
36786 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36788 PR tree-optimization/108447
36789 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
36790 (relation_tests): Add self-tests for relation_{intersect,union}
36792 * selftest.h (relation_tests): Declare.
36793 * function-tests.cc (test_ranges): Call it.
36795 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
36798 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
36799 invalid third argument to __builtin_ia32_prefetch.
36801 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36803 PR middle-end/108459
36804 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
36805 than fold_unary for NEGATE_EXPR.
36807 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
36810 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
36811 comment. Move assert about alignment a bit later.
36813 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36815 PR tree-optimization/108440
36816 * tree-ssa-forwprop.cc: Include gimple-range.h.
36817 (simplify_rotate): For the forms with T2 wider than T and shift counts of
36818 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
36819 to B. For the forms with T2 wider than T and shift counts of
36820 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
36821 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
36822 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
36823 pass specific ranger instead of get_global_range_query.
36824 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
36827 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36829 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
36830 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
36832 (aarch64_simd_vec_copy_lane<mode>): Likewise.
36833 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
36835 2023-01-19 Alexandre Oliva <oliva@adacore.com>
36838 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
36839 within debug insns.
36841 2023-01-18 Martin Jambor <mjambor@suse.cz>
36844 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
36845 lcone_of chain also do not need the body.
36847 2023-01-18 Richard Biener <rguenther@suse.de>
36850 2022-12-16 Richard Biener <rguenther@suse.de>
36852 PR middle-end/108086
36853 * tree-inline.cc (remap_ssa_name): Do not unshare the
36854 result from the decl_map.
36856 2023-01-18 Murray Steele <murray.steele@arm.com>
36859 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
36861 (__arm_vst1q_p_s8): Likewise.
36862 (__arm_vld1q_z_u8): Likewise.
36863 (__arm_vld1q_z_s8): Likewise.
36864 (__arm_vst1q_p_u16): Likewise.
36865 (__arm_vst1q_p_s16): Likewise.
36866 (__arm_vld1q_z_u16): Likewise.
36867 (__arm_vld1q_z_s16): Likewise.
36868 (__arm_vst1q_p_u32): Likewise.
36869 (__arm_vst1q_p_s32): Likewise.
36870 (__arm_vld1q_z_u32): Likewise.
36871 (__arm_vld1q_z_s32): Likewise.
36872 (__arm_vld1q_z_f16): Likewise.
36873 (__arm_vst1q_p_f16): Likewise.
36874 (__arm_vld1q_z_f32): Likewise.
36875 (__arm_vst1q_p_f32): Likewise.
36877 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36879 * config/xtensa/xtensa.md (xorsi3_internal):
36880 Rename from the original of "xorsi3".
36881 (xorsi3): New expansion pattern that emits addition rather than
36882 bitwise-XOR when the second source is a constant of -2147483648
36885 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
36886 Andrew Pinski <apinski@marvell.com>
36889 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
36890 vec_vsubcuqP with vec_vsubcuq.
36892 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
36895 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
36896 support for invalid uses of MMA opaque type in function arguments.
36898 2023-01-18 liuhongt <hongtao.liu@intel.com>
36901 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
36902 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
36903 -share or -mno-daz-ftz is specified.
36904 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
36905 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
36907 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
36909 * config/bpf/bpf.cc (bpf_option_override): Disable
36912 2023-01-17 Jakub Jelinek <jakub@redhat.com>
36914 PR tree-optimization/106523
36915 * tree-ssa-forwprop.cc (simplify_rotate): For the
36916 patterns with (-Y) & (B - 1) in one operand's shift
36917 count and Y in another, if T2 has wider precision than T,
36918 punt if Y could have a value in [B, B2 - 1] range.
36920 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
36923 * config/i386/i386.cc (x86_output_mi_thunk): Disable
36924 -mforce-indirect-call for PIC in 32-bit mode.
36926 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
36929 * ipa-modref.cc (modref_access_analysis::analyze): Use
36930 find_always_executed_bbs.
36931 * ipa-sra.cc (process_scan_results): Likewise.
36932 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
36933 (find_always_executed_bbs): New function.
36934 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
36935 (find_always_executed_bbs): Declare.
36937 2023-01-16 Jan Hubicka <jh@suse.cz>
36939 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
36940 by TARGET_USE_SCATTER.
36941 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
36942 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
36943 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
36944 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
36945 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
36946 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
36948 2023-01-16 Richard Biener <rguenther@suse.de>
36951 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
36953 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36957 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
36958 (__ARM_mve_coerce3): Likewise.
36960 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36962 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
36964 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36966 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
36967 (number_of_iterations_bitcount): Add call to the above.
36968 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
36969 c[lt]z idiom recognition.
36971 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36973 * doc/sourcebuild.texi: Add missing target attributes.
36975 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36977 PR tree-optimization/94793
36978 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
36980 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
36981 (number_of_iterations_cltz_complement): New.
36982 (number_of_iterations_bitcount): Add call to the above.
36984 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
36986 * doc/extend.texi (Common Function Attributes): Fix grammar.
36988 2023-01-16 Jakub Jelinek <jakub@redhat.com>
36991 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
36992 * config/riscv/riscv-vsetvl.cc: Likewise.
36994 2023-01-16 Jakub Jelinek <jakub@redhat.com>
36997 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
36998 disable -Winit-self using pragma GCC diagnostic ignored.
36999 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
37001 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
37002 _mm256_undefined_si256): Likewise.
37003 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
37004 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
37005 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
37006 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
37008 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
37011 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
37012 support for invalid uses in inline asm, factor out the checking and
37013 erroring to lambda function check_and_error_invalid_use.
37015 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
37017 PR tree-optimization/107608
37018 * range-op-float.cc (range_operator_float::fold_range): Avoid
37019 folding into INF when flag_trapping_math.
37020 * value-range.h (frange::known_isinf): Return false for possible NANs.
37022 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37024 * config.gcc (csky-*-*): Support --with-float=softfp.
37026 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37028 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
37029 Rename to xtensa_adjust_reg_alloc_order.
37030 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
37031 Ditto. And also remove code to reorder register numbers for
37032 leaf functions, rename the tables, and adjust the allocation
37033 order for the call0 ABI to use register A0 more.
37034 (xtensa_leaf_regs): Remove.
37035 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
37036 (order_regs_for_local_alloc): Rename as the above.
37037 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
37039 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
37041 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
37042 Change to define_insn_and_split to fold ldr+dup to ld1rq.
37043 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
37045 2023-01-14 Alexandre Oliva <oliva@adacore.com>
37047 * hash-table.h (is_deleted): Precheck !is_empty.
37048 (mark_deleted): Postcheck !is_empty.
37049 (copy constructor): Test is_empty before is_deleted.
37051 2023-01-14 Alexandre Oliva <oliva@adacore.com>
37054 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
37057 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
37059 PR rtl-optimization/108274
37060 * function.cc (thread_prologue_and_epilogue_insns): Also update the
37061 DF information for calls in a few more cases.
37063 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
37065 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
37066 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
37068 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
37069 (MAX_SYNC_LIBFUNC_SIZE): Define.
37070 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
37072 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
37073 libcall when sync libcalls are disabled.
37074 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
37075 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
37076 are disabled on 32-bit target.
37077 * config/pa/pa.opt (matomic-libcalls): New option.
37078 * doc/invoke.texi (HPPA Options): Update.
37080 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
37082 PR rtl-optimization/108117
37083 PR rtl-optimization/108132
37084 * sched-deps.cc (deps_analyze_insn): Do not schedule across
37085 calls before reload.
37087 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37089 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
37090 options for -mlibarch.
37091 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
37092 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
37094 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
37096 * attribs.cc (strict_flex_array_level_of): Move this function to ...
37097 * attribs.h (strict_flex_array_level_of): Remove the declaration.
37098 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
37099 replace the referece to strict_flex_array_level_of with
37100 DECL_NOT_FLEXARRAY.
37101 * tree.cc (component_ref_size): Likewise.
37103 2023-01-13 Richard Biener <rguenther@suse.de>
37106 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
37107 crtfastmath.o for -shared.
37108 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
37110 2023-01-13 Richard Biener <rguenther@suse.de>
37113 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
37114 crtfastmath.o for -shared.
37115 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
37117 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
37120 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
37122 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
37124 (TARGET_DWARF_FRAME_REG_MODE): Define.
37126 2023-01-13 Richard Biener <rguenther@suse.de>
37129 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
37130 update EH info on the fly.
37132 2023-01-13 Richard Biener <rguenther@suse.de>
37134 PR tree-optimization/108387
37135 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
37136 value before inserting expression into the tables.
37138 2023-01-12 Andrew Pinski <apinski@marvell.com>
37139 Roger Sayle <roger@nextmovesoftware.com>
37141 PR tree-optimization/92342
37142 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
37143 Use tcc_comparison and :c for the multiply.
37144 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
37146 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
37147 Richard Sandiford <richard.sandiford@arm.com>
37150 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
37151 Check DECL_PACKED for bitfield.
37152 (aarch64_layout_arg): Warn when parameter passing ABI changes.
37153 (aarch64_function_arg_boundary): Do not warn here.
37154 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
37157 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
37158 Richard Sandiford <richard.sandiford@arm.com>
37160 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
37162 (aarch64_layout_arg): Factorize warning conditions.
37163 (aarch64_function_arg_boundary): Fix typo.
37164 * function.cc (currently_expanding_function_start): New variable.
37165 (expand_function_start): Handle
37166 currently_expanding_function_start.
37167 * function.h (currently_expanding_function_start): Declare.
37169 2023-01-12 Richard Biener <rguenther@suse.de>
37171 PR tree-optimization/99412
37172 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
37173 (swap_ops_for_binary_stmt): Remove reduction handling.
37174 (rewrite_expr_tree_parallel): Adjust.
37175 (reassociate_bb): Likewise.
37176 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
37178 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37180 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
37181 Rearrange the emitting codes.
37183 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37185 * config/xtensa/xtensa.md (*btrue):
37186 Correct value of the attribute "length" that depends on
37187 TARGET_DENSITY and operands, and add '?' character to the register
37188 constraint of the compared operand.
37190 2023-01-12 Alexandre Oliva <oliva@adacore.com>
37192 * hash-table.h (expand): Check elements and deleted counts.
37193 (verify): Likewise.
37195 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
37197 PR tree-optimization/71343
37198 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
37199 the value number of the expression X << C the same as the value
37200 number for the multiplication X * (1<<C).
37202 2023-01-11 David Faust <david.faust@oracle.com>
37205 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
37206 floating point modes.
37208 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
37210 PR tree-optimization/108199
37211 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
37212 for bit-field references.
37214 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
37216 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
37217 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
37218 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
37219 OPTION_MASK_P10_FUSION.
37221 2023-01-11 Richard Biener <rguenther@suse.de>
37223 PR tree-optimization/107767
37224 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
37225 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
37226 * tree-switch-conversion.cc (switch_conversion::collect):
37227 Count unique non-default targets accounting for later
37228 merging opportunities.
37230 2023-01-11 Martin Liska <mliska@suse.cz>
37232 PR middle-end/107976
37233 * params.opt: Limit JT params.
37234 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
37236 2023-01-11 Richard Biener <rguenther@suse.de>
37238 PR tree-optimization/108352
37239 * tree-ssa-threadbackward.cc
37240 (back_threader_profitability::profitable_path_p): Adjust
37241 heuristic that allows non-multi-way branch threads creating
37243 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
37244 (--param fsm-scale-path-stmts): Adjust.
37245 * params.opt (--param=fsm-scale-path-blocks=): Remove.
37246 (-param=fsm-scale-path-stmts=): Adjust description.
37248 2023-01-11 Richard Biener <rguenther@suse.de>
37250 PR tree-optimization/108353
37251 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
37253 (add_ssa_edge): Simplify.
37254 (add_control_edge): Likewise.
37255 (ssa_prop_init): Likewise.
37256 (ssa_prop_fini): Likewise.
37257 (ssa_propagation_engine::ssa_propagate): Likewise.
37259 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
37261 * config/s390/s390.md (*not<mode>): New pattern.
37263 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37265 * config/xtensa/xtensa.cc (xtensa_insn_cost):
37266 Let insn cost for size be obtained by applying COSTS_N_INSNS()
37267 to instruction length and then dividing by 3.
37269 2023-01-10 Richard Biener <rguenther@suse.de>
37271 PR tree-optimization/106293
37272 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
37273 process degenerate PHI defs.
37275 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
37277 PR rtl-optimization/106421
37278 * cprop.cc (bypass_block): Check that DEST is local to this
37279 function (non-NULL) before calling find_edge.
37281 2023-01-10 Martin Jambor <mjambor@suse.cz>
37284 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
37285 sort_replacements, lookup_first_base_replacement and
37286 m_sorted_replacements_p.
37287 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
37288 (ipa_param_body_adjustments::register_replacement): Set
37289 m_sorted_replacements_p to false.
37290 (compare_param_body_replacement): New function.
37291 (ipa_param_body_adjustments::sort_replacements): Likewise.
37292 (ipa_param_body_adjustments::common_initialization): Call
37294 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
37295 m_sorted_replacements_p.
37296 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
37298 (ipa_param_body_adjustments::lookup_first_base_replacement): New
37300 (ipa_param_body_adjustments::modify_call_stmt): Use
37301 lookup_first_base_replacement.
37302 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
37303 adjustments->sort_replacements.
37305 2023-01-10 Richard Biener <rguenther@suse.de>
37307 PR tree-optimization/108314
37308 * tree-vect-stmts.cc (vectorizable_condition): Do not
37309 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
37311 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37313 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
37315 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37317 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
37319 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37321 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
37322 defines for soft float abi.
37324 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37326 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
37327 (smart_bclri): Likewise.
37328 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
37329 (fast_bclri): Likewise.
37330 (fast_cmpnesi_i): Likewise.
37331 (*fast_cmpltsi_i): Likewise.
37332 (*fast_cmpgeusi_i): Likewise.
37334 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37336 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
37337 flag_fp_int_builtin_inexact || !flag_trapping_math.
37338 (<frm_pattern><mode>2): Likewise.
37340 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
37342 * config/s390/s390.cc (s390_register_info): Check call_used_regs
37343 instead of hard-coding the register numbers for call saved
37345 (s390_optimize_register_info): Likewise.
37347 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
37349 * doc/gm2.texi (Overview): Fix @node markers.
37350 (Using): Likewise. Remove subsections that were moved to Overview
37351 from the menu and move others around.
37353 2023-01-09 Richard Biener <rguenther@suse.de>
37355 PR middle-end/108209
37356 * genmatch.cc (commutative_op): Fix return value for
37357 user-id with non-commutative first replacement.
37359 2023-01-09 Jakub Jelinek <jakub@redhat.com>
37362 * calls.cc (expand_call): For calls with
37363 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
37366 2023-01-09 Richard Biener <rguenther@suse.de>
37368 PR middle-end/69482
37369 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
37370 qualified accesses also force objects to memory.
37372 2023-01-09 Martin Liska <mliska@suse.cz>
37375 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
37376 NULL (deleleted value) to a hash_set.
37378 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37380 * config/xtensa/xtensa.md (*splice_bits):
37381 New insn_and_split pattern.
37383 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37385 * config/xtensa/xtensa.cc
37386 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
37387 New helper functions.
37388 (xtensa_set_return_address, xtensa_output_mi_thunk):
37389 Change to use the helper function.
37390 (xtensa_emit_adjust_stack_ptr): Ditto.
37391 And also change to try reusing the content of scratch register
37392 A9 if the register is not modified in the function body.
37394 2023-01-07 LIU Hao <lh_mouse@126.com>
37396 PR middle-end/108300
37397 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
37398 before <windows.h>.
37399 * diagnostic-color.cc: Likewise.
37400 * plugin.cc: Likewise.
37401 * prefix.cc: Likewise.
37403 2023-01-06 Joseph Myers <joseph@codesourcery.com>
37405 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
37406 for handling real integer types.
37408 2023-01-06 Tamar Christina <tamar.christina@arm.com>
37411 2022-12-12 Tamar Christina <tamar.christina@arm.com>
37413 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
37414 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
37415 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
37416 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
37417 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
37418 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
37419 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
37420 (aarch64_simd_dupv2hf): New.
37421 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
37423 * config/aarch64/iterators.md (VHSDF_P): New.
37424 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
37425 Vel, q, vp): Add V2HF.
37426 * config/arm/types.md (neon_fp_reduc_add_h): New.
37428 2023-01-06 Martin Liska <mliska@suse.cz>
37430 PR middle-end/107966
37431 * doc/options.texi: Fix Var documentation in internal manual.
37433 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
37436 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37438 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
37439 RTL expansion to allow condition (mask) to be shared/reused,
37440 by avoiding overwriting pseudos and adding REG_EQUAL notes.
37442 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
37444 * common.opt: Add -static-libgm2.
37445 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
37446 * doc/gm2.texi: Document static-libgm2.
37447 * gcc.cc (driver_handle_option): Allow static-libgm2.
37449 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
37451 * common/config/i386/i386-common.cc (processor_alias_table):
37452 Use CPU_ZNVER4 for znver4.
37453 * config/i386/i386.md: Add znver4.md.
37454 * config/i386/znver4.md: New.
37456 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37458 PR tree-optimization/108253
37459 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
37462 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37464 PR middle-end/108237
37465 * generic-match-head.cc: Include tree-pass.h.
37466 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
37467 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
37468 resp. PROP_gimple_lvec property set.
37470 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37472 PR sanitizer/108256
37473 * convert.cc (do_narrow): Punt for MULT_EXPR if original
37474 type doesn't wrap around and -fsanitize=signed-integer-overflow
37476 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
37478 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
37480 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
37481 * common/config/i386/i386-common.cc: Add Emeraldrapids.
37483 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
37485 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
37488 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
37490 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
37491 default constructor to initialize it.
37492 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
37493 for last and iterate to handle recursive calls. Delete leftover
37494 candidates at the end.
37495 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
37497 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
37498 gc_candidate bit when a clone is used.
37500 2023-01-03 Florian Weimer <fweimer@redhat.com>
37503 2023-01-02 Florian Weimer <fweimer@redhat.com>
37505 * dwarf2cfi.cc (init_return_column_size): Remove.
37506 (init_one_dwarf_reg_size): Adjust.
37507 (generate_dwarf_reg_sizes): New function. Extracted
37508 from expand_builtin_init_dwarf_reg_sizes.
37509 (expand_builtin_init_dwarf_reg_sizes): Call
37510 generate_dwarf_reg_sizes.
37511 * target.def (init_dwarf_reg_sizes_extra): Adjust
37513 * config/msp430/msp430.cc
37514 (msp430_init_dwarf_reg_sizes_extra): Adjust.
37515 * config/rs6000/rs6000.cc
37516 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
37517 * doc/tm.texi: Update.
37519 2023-01-03 Florian Weimer <fweimer@redhat.com>
37522 2023-01-02 Florian Weimer <fweimer@redhat.com>
37524 * debug.h (dwarf_reg_sizes_constant): Declare.
37525 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
37527 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
37529 PR tree-optimization/105043
37530 * doc/extend.texi (Object Size Checking): Split out into two
37531 subsections and mention _FORTIFY_SOURCE.
37533 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37535 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
37536 RTL expansion to allow condition (mask) to be shared/reused,
37537 by avoiding overwriting pseudos and adding REG_EQUAL notes.
37539 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37542 * config/i386/i386-features.cc
37543 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
37544 the gain/cost of converting a MEM operand.
37546 2023-01-03 Jakub Jelinek <jakub@redhat.com>
37548 PR middle-end/108264
37549 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
37550 from source which doesn't have scalar integral mode first convert
37553 2023-01-03 Jakub Jelinek <jakub@redhat.com>
37555 PR rtl-optimization/108263
37556 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
37559 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
37562 * config/i386/lujiazui.md (lujiazui_div): New automaton.
37563 (lua_div): New unit.
37564 (lua_idiv_qi): Correct unit in the reservation.
37565 (lua_idiv_qi_load): Ditto.
37566 (lua_idiv_hi): Ditto.
37567 (lua_idiv_hi_load): Ditto.
37568 (lua_idiv_si): Ditto.
37569 (lua_idiv_si_load): Ditto.
37570 (lua_idiv_di): Ditto.
37571 (lua_idiv_di_load): Ditto.
37572 (lua_fdiv_SF): Ditto.
37573 (lua_fdiv_SF_load): Ditto.
37574 (lua_fdiv_DF): Ditto.
37575 (lua_fdiv_DF_load): Ditto.
37576 (lua_fdiv_XF): Ditto.
37577 (lua_fdiv_XF_load): Ditto.
37578 (lua_ssediv_SF): Ditto.
37579 (lua_ssediv_load_SF): Ditto.
37580 (lua_ssediv_V4SF): Ditto.
37581 (lua_ssediv_load_V4SF): Ditto.
37582 (lua_ssediv_V8SF): Ditto.
37583 (lua_ssediv_load_V8SF): Ditto.
37584 (lua_ssediv_SD): Ditto.
37585 (lua_ssediv_load_SD): Ditto.
37586 (lua_ssediv_V2DF): Ditto.
37587 (lua_ssediv_load_V2DF): Ditto.
37588 (lua_ssediv_V4DF): Ditto.
37589 (lua_ssediv_load_V4DF): Ditto.
37591 2023-01-02 Florian Weimer <fweimer@redhat.com>
37593 * debug.h (dwarf_reg_sizes_constant): Declare.
37594 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
37596 2023-01-02 Florian Weimer <fweimer@redhat.com>
37598 * dwarf2cfi.cc (init_return_column_size): Remove.
37599 (init_one_dwarf_reg_size): Adjust.
37600 (generate_dwarf_reg_sizes): New function. Extracted
37601 from expand_builtin_init_dwarf_reg_sizes.
37602 (expand_builtin_init_dwarf_reg_sizes): Call
37603 generate_dwarf_reg_sizes.
37604 * target.def (init_dwarf_reg_sizes_extra): Adjust
37606 * config/msp430/msp430.cc
37607 (msp430_init_dwarf_reg_sizes_extra): Adjust.
37608 * config/rs6000/rs6000.cc
37609 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
37610 * doc/tm.texi: Update.
37612 2023-01-02 Jakub Jelinek <jakub@redhat.com>
37614 * gcc.cc (process_command): Update copyright notice dates.
37615 * gcov-dump.cc (print_version): Ditto.
37616 * gcov.cc (print_version): Ditto.
37617 * gcov-tool.cc (print_version): Ditto.
37618 * gengtype.cc (create_file): Ditto.
37619 * doc/cpp.texi: Bump @copying's copyright year.
37620 * doc/cppinternals.texi: Ditto.
37621 * doc/gcc.texi: Ditto.
37622 * doc/gccint.texi: Ditto.
37623 * doc/gcov.texi: Ditto.
37624 * doc/install.texi: Ditto.
37625 * doc/invoke.texi: Ditto.
37627 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
37628 Uroš Bizjak <ubizjak@gmail.com>
37630 * config/i386/i386.md (extendditi2): New define_insn.
37631 (define_split): Use DWIH mode iterator to treat new extendditi2
37632 identically to existing extendsidi2_1.
37633 (define_peephole2): Likewise.
37634 (define_peephole2): Likewise.
37635 (define_Split): Likewise.
37638 Copyright (C) 2023 Free Software Foundation, Inc.
37640 Copying and distribution of this file, with or without modification,
37641 are permitted in any medium without royalty provided the copyright
37642 notice and this notice are preserved.