gcc/testsuite/gcc.dg/asr_div1.c

   1 /* Test division by const int generates only one shift.  */
   2 /* { dg-do run } */
   3 /* { dg-options "-O2 -fdump-rtl-combine-all" } */
   4 /* { dg-options "-O2 -fdump-rtl-combine-all -mtune=cortex-a53" { target aarch64*-*-* } } */
   5 /* { dg-require-effective-target int32plus } */
   6
   7 extern void abort (void);
   8
   9 #define NOINLINE __attribute__((noinline))
  10
  11 static NOINLINE int
  12 f1 (int n)
  13 {
  14   return n / 33;
  15 }
  16
  17 static NOINLINE int
  18 f2 (int n)
  19 {
  20   return n / 77;
  21 }
  22
  23 int
  24 main ()
  25 {
  26   int a = 0xaaaaaaaa;
  27   int b = 0x55555555;
  28   int c;
  29   c = f1 (a);
  30   if (c != 0xfd6a052c)
  31     abort ();
  32   c = f1 (b);
  33   if (c != 0x295FAD4)
  34     abort ();
  35   c = f2 (a);
  36   if (c != 0xfee44b5c)
  37     abort ();
  38   c = f2 (b);
  39   if (c != 0x11bb4a4)
  40     abort ();
  41   return 0;
  42 }
  43
  44 /* Following replacement pattern of intger division by constant, GCC is expected
  45    to generate MULT and (x)SHIFTRT.  This test checks that considering division
  46    by const 33, gcc generates a single ASHIFTRT by 35, instead of two - LSHIFTRT
  47    by 32 and ASHIFTRT by 3.  */
  48
  49 /* { dg-final { scan-rtl-dump "\\(set \\(subreg:DI \\(reg:SI" "combine" { target aarch64*-*-* } } } */
  50 /* { dg-final { scan-rtl-dump "\\(ashiftrt:DI \\(reg:DI" "combine" { target aarch64*-*-* } } } */
  51 /* { dg-final { scan-rtl-dump "\\(const_int 35 " "combine" { target aarch64*-*-* } } } */
  52
  53 /* Similarly, considering division by const 77, gcc generates a single ASHIFTRT
  54    by 36, instead of two - LSHIFTRT by 32 and ASHIFTRT by 4.  */
  55
  56 /* { dg-final { scan-rtl-dump "\\(const_int 36 " "combine" { target aarch64*-*-* } } } */
  57