1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 #include "coretypes.h"
29 #include "hard-reg-set.h"
36 #include "insn-attr.h"
40 /* This structure is used to record liveness information at the targets or
41 fallthrough insns of branches. We will most likely need the information
42 at targets again, so save them in a hash table rather than recomputing them
47 int uid
; /* INSN_UID of target. */
48 struct target_info
*next
; /* Next info for same hash bucket. */
49 HARD_REG_SET live_regs
; /* Registers live at target. */
50 int block
; /* Basic block number containing target. */
51 int bb_tick
; /* Generation count of basic block info. */
54 #define TARGET_HASH_PRIME 257
56 /* Indicates what resources are required at the beginning of the epilogue. */
57 static struct resources start_of_epilogue_needs
;
59 /* Indicates what resources are required at function end. */
60 static struct resources end_of_function_needs
;
62 /* Define the hash table itself. */
63 static struct target_info
**target_hash_table
= NULL
;
65 /* For each basic block, we maintain a generation number of its basic
66 block info, which is updated each time we move an insn from the
67 target of a jump. This is the generation number indexed by block
72 /* Marks registers possibly live at the current place being scanned by
73 mark_target_live_regs. Also used by update_live_status. */
75 static HARD_REG_SET current_live_regs
;
77 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
78 Also only used by the next two functions. */
80 static HARD_REG_SET pending_dead_regs
;
82 static void update_live_status (rtx
, rtx
, void *);
83 static int find_basic_block (rtx
, int);
84 static rtx
next_insn_no_annul (rtx
);
85 static rtx
find_dead_or_set_registers (rtx
, struct resources
*,
86 rtx
*, int, struct resources
,
89 /* Utility function called from mark_target_live_regs via note_stores.
90 It deadens any CLOBBERed registers and livens any SET registers. */
93 update_live_status (rtx dest
, rtx x
, void *data ATTRIBUTE_UNUSED
)
95 int first_regno
, last_regno
;
99 && (GET_CODE (dest
) != SUBREG
|| !REG_P (SUBREG_REG (dest
))))
102 if (GET_CODE (dest
) == SUBREG
)
104 first_regno
= subreg_regno (dest
);
105 last_regno
= first_regno
+ subreg_nregs (dest
);
110 first_regno
= REGNO (dest
);
111 last_regno
= END_HARD_REGNO (dest
);
114 if (GET_CODE (x
) == CLOBBER
)
115 for (i
= first_regno
; i
< last_regno
; i
++)
116 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
118 for (i
= first_regno
; i
< last_regno
; i
++)
120 SET_HARD_REG_BIT (current_live_regs
, i
);
121 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
125 /* Find the number of the basic block with correct live register
126 information that starts closest to INSN. Return -1 if we couldn't
127 find such a basic block or the beginning is more than
128 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
131 The delay slot filling code destroys the control-flow graph so,
132 instead of finding the basic block containing INSN, we search
133 backwards toward a BARRIER where the live register information is
137 find_basic_block (rtx insn
, int search_limit
)
141 /* Scan backwards to the previous BARRIER. Then see if we can find a
142 label that starts a basic block. Return the basic block number. */
143 for (insn
= prev_nonnote_insn (insn
);
144 insn
&& !BARRIER_P (insn
) && search_limit
!= 0;
145 insn
= prev_nonnote_insn (insn
), --search_limit
)
148 /* The closest BARRIER is too far away. */
149 if (search_limit
== 0)
152 /* The start of the function. */
154 return ENTRY_BLOCK_PTR
->next_bb
->index
;
156 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
157 anything other than a CODE_LABEL or note, we can't find this code. */
158 for (insn
= next_nonnote_insn (insn
);
159 insn
&& LABEL_P (insn
);
160 insn
= next_nonnote_insn (insn
))
163 if (insn
== BB_HEAD (bb
))
170 /* Similar to next_insn, but ignores insns in the delay slots of
171 an annulled branch. */
174 next_insn_no_annul (rtx insn
)
178 /* If INSN is an annulled branch, skip any insns from the target
181 && INSN_ANNULLED_BRANCH_P (insn
)
182 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
184 rtx next
= NEXT_INSN (insn
);
185 enum rtx_code code
= GET_CODE (next
);
187 while ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
188 && INSN_FROM_TARGET_P (next
))
191 next
= NEXT_INSN (insn
);
192 code
= GET_CODE (next
);
196 insn
= NEXT_INSN (insn
);
197 if (insn
&& NONJUMP_INSN_P (insn
)
198 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
199 insn
= XVECEXP (PATTERN (insn
), 0, 0);
205 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
206 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
207 is TRUE, resources used by the called routine will be included for
211 mark_referenced_resources (rtx x
, struct resources
*res
,
212 int include_delayed_effects
)
214 enum rtx_code code
= GET_CODE (x
);
217 const char *format_ptr
;
219 /* Handle leaf items for which we set resource flags. Also, special-case
220 CALL, SET and CLOBBER operators. */
233 if (!REG_P (SUBREG_REG (x
)))
234 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
237 unsigned int regno
= subreg_regno (x
);
238 unsigned int last_regno
= regno
+ subreg_nregs (x
);
240 gcc_assert (last_regno
<= FIRST_PSEUDO_REGISTER
);
241 for (r
= regno
; r
< last_regno
; r
++)
242 SET_HARD_REG_BIT (res
->regs
, r
);
247 gcc_assert (HARD_REGISTER_P (x
));
248 add_to_hard_reg_set (&res
->regs
, GET_MODE (x
), REGNO (x
));
252 /* If this memory shouldn't change, it really isn't referencing
254 if (MEM_READONLY_P (x
))
255 res
->unch_memory
= 1;
258 res
->volatil
|= MEM_VOLATILE_P (x
);
260 /* Mark registers used to access memory. */
261 mark_referenced_resources (XEXP (x
, 0), res
, 0);
268 case UNSPEC_VOLATILE
:
270 /* Traditional asm's are always volatile. */
279 res
->volatil
|= MEM_VOLATILE_P (x
);
281 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
282 We can not just fall through here since then we would be confused
283 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
284 traditional asms unlike their normal usage. */
286 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
287 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
291 /* The first operand will be a (MEM (xxx)) but doesn't really reference
292 memory. The second operand may be referenced, though. */
293 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
294 mark_referenced_resources (XEXP (x
, 1), res
, 0);
298 /* Usually, the first operand of SET is set, not referenced. But
299 registers used to access memory are referenced. SET_DEST is
300 also referenced if it is a ZERO_EXTRACT. */
302 mark_referenced_resources (SET_SRC (x
), res
, 0);
305 if (GET_CODE (x
) == ZERO_EXTRACT
306 || GET_CODE (x
) == STRICT_LOW_PART
)
307 mark_referenced_resources (x
, res
, 0);
308 else if (GET_CODE (x
) == SUBREG
)
311 mark_referenced_resources (XEXP (x
, 0), res
, 0);
318 if (include_delayed_effects
)
320 /* A CALL references memory, the frame pointer if it exists, the
321 stack pointer, any global registers and any registers given in
322 USE insns immediately in front of the CALL.
324 However, we may have moved some of the parameter loading insns
325 into the delay slot of this CALL. If so, the USE's for them
326 don't count and should be skipped. */
327 rtx insn
= PREV_INSN (x
);
332 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
333 if (NEXT_INSN (insn
) != x
)
335 sequence
= PATTERN (NEXT_INSN (insn
));
336 seq_size
= XVECLEN (sequence
, 0);
337 gcc_assert (GET_CODE (sequence
) == SEQUENCE
);
341 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
342 if (frame_pointer_needed
)
344 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
345 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
346 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
350 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
352 SET_HARD_REG_BIT (res
->regs
, i
);
354 /* Check for a REG_SETJMP. If it exists, then we must
355 assume that this call can need any register.
357 This is done to be more conservative about how we handle setjmp.
358 We assume that they both use and set all registers. Using all
359 registers ensures that a register will not be considered dead
360 just because it crosses a setjmp call. A register should be
361 considered dead only if the setjmp call returns nonzero. */
362 if (find_reg_note (x
, REG_SETJMP
, NULL
))
363 SET_HARD_REG_SET (res
->regs
);
368 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
370 link
= XEXP (link
, 1))
371 if (GET_CODE (XEXP (link
, 0)) == USE
)
373 for (i
= 1; i
< seq_size
; i
++)
375 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
376 if (GET_CODE (slot_pat
) == SET
377 && rtx_equal_p (SET_DEST (slot_pat
),
378 XEXP (XEXP (link
, 0), 0)))
382 mark_referenced_resources (XEXP (XEXP (link
, 0), 0),
388 /* ... fall through to other INSN processing ... */
393 #ifdef INSN_REFERENCES_ARE_DELAYED
394 if (! include_delayed_effects
395 && INSN_REFERENCES_ARE_DELAYED (x
))
399 /* No special processing, just speed up. */
400 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
407 /* Process each sub-expression and flag what it needs. */
408 format_ptr
= GET_RTX_FORMAT (code
);
409 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
410 switch (*format_ptr
++)
413 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
417 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
418 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
419 include_delayed_effects
);
424 /* A subroutine of mark_target_live_regs. Search forward from TARGET
425 looking for registers that are set before they are used. These are dead.
426 Stop after passing a few conditional jumps, and/or a small
427 number of unconditional branches. */
430 find_dead_or_set_registers (rtx target
, struct resources
*res
,
431 rtx
*jump_target
, int jump_count
,
432 struct resources set
, struct resources needed
)
434 HARD_REG_SET scratch
;
439 for (insn
= target
; insn
; insn
= next
)
441 rtx this_jump_insn
= insn
;
443 next
= NEXT_INSN (insn
);
445 /* If this instruction can throw an exception, then we don't
446 know where we might end up next. That means that we have to
447 assume that whatever we have already marked as live really is
449 if (can_throw_internal (insn
))
452 switch (GET_CODE (insn
))
455 /* After a label, any pending dead registers that weren't yet
456 used can be made dead. */
457 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
458 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
459 CLEAR_HARD_REG_SET (pending_dead_regs
);
468 if (GET_CODE (PATTERN (insn
)) == USE
)
470 /* If INSN is a USE made by update_block, we care about the
471 underlying insn. Any registers set by the underlying insn
472 are live since the insn is being done somewhere else. */
473 if (INSN_P (XEXP (PATTERN (insn
), 0)))
474 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0,
477 /* All other USE insns are to be ignored. */
480 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
482 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
484 /* An unconditional jump can be used to fill the delay slot
485 of a call, so search for a JUMP_INSN in any position. */
486 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
488 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
489 if (JUMP_P (this_jump_insn
))
498 if (JUMP_P (this_jump_insn
))
500 if (jump_count
++ < 10)
502 if (any_uncondjump_p (this_jump_insn
)
503 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
505 next
= JUMP_LABEL (this_jump_insn
);
510 *jump_target
= JUMP_LABEL (this_jump_insn
);
513 else if (any_condjump_p (this_jump_insn
))
515 struct resources target_set
, target_res
;
516 struct resources fallthrough_res
;
518 /* We can handle conditional branches here by following
519 both paths, and then IOR the results of the two paths
520 together, which will give us registers that are dead
521 on both paths. Since this is expensive, we give it
522 a much higher cost than unconditional branches. The
523 cost was chosen so that we will follow at most 1
524 conditional branch. */
527 if (jump_count
>= 10)
530 mark_referenced_resources (insn
, &needed
, 1);
532 /* For an annulled branch, mark_set_resources ignores slots
533 filled by instructions from the target. This is correct
534 if the branch is not taken. Since we are following both
535 paths from the branch, we must also compute correct info
536 if the branch is taken. We do this by inverting all of
537 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
538 and then inverting the INSN_FROM_TARGET_P bits again. */
540 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
541 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
543 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
544 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
545 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
548 mark_set_resources (insn
, &target_set
, 0,
551 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
552 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
553 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
555 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
559 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
564 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
565 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
566 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
568 fallthrough_res
= *res
;
569 COPY_HARD_REG_SET (scratch
, set
.regs
);
570 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
571 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
573 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
574 &target_res
, 0, jump_count
,
576 find_dead_or_set_registers (next
,
577 &fallthrough_res
, 0, jump_count
,
579 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
580 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
588 /* Don't try this optimization if we expired our jump count
589 above, since that would mean there may be an infinite loop
590 in the function being compiled. */
596 mark_referenced_resources (insn
, &needed
, 1);
597 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
599 COPY_HARD_REG_SET (scratch
, set
.regs
);
600 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
601 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
607 /* Given X, a part of an insn, and a pointer to a `struct resource',
608 RES, indicate which resources are modified by the insn. If
609 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
610 set by the called routine.
612 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
613 objects are being referenced instead of set.
615 We never mark the insn as modifying the condition code unless it explicitly
616 SETs CC0 even though this is not totally correct. The reason for this is
617 that we require a SET of CC0 to immediately precede the reference to CC0.
618 So if some other insn sets CC0 as a side-effect, we know it cannot affect
619 our computation and thus may be placed in a delay slot. */
622 mark_set_resources (rtx x
, struct resources
*res
, int in_dest
,
623 enum mark_resource_type mark_type
)
628 const char *format_ptr
;
647 /* These don't set any resources. */
656 /* Called routine modifies the condition code, memory, any registers
657 that aren't saved across calls, global registers and anything
658 explicitly CLOBBERed immediately after the CALL_INSN. */
660 if (mark_type
== MARK_SRC_DEST_CALL
)
664 res
->cc
= res
->memory
= 1;
665 for (r
= 0; r
< FIRST_PSEUDO_REGISTER
; r
++)
666 if (call_used_regs
[r
] || global_regs
[r
])
667 SET_HARD_REG_BIT (res
->regs
, r
);
669 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
670 link
; link
= XEXP (link
, 1))
671 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
672 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1,
675 /* Check for a REG_SETJMP. If it exists, then we must
676 assume that this call can clobber any register. */
677 if (find_reg_note (x
, REG_SETJMP
, NULL
))
678 SET_HARD_REG_SET (res
->regs
);
681 /* ... and also what its RTL says it modifies, if anything. */
686 /* An insn consisting of just a CLOBBER (or USE) is just for flow
687 and doesn't actually do anything, so we ignore it. */
689 #ifdef INSN_SETS_ARE_DELAYED
690 if (mark_type
!= MARK_SRC_DEST_CALL
691 && INSN_SETS_ARE_DELAYED (x
))
696 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
701 /* If the source of a SET is a CALL, this is actually done by
702 the called routine. So only include it if we are to include the
703 effects of the calling routine. */
705 mark_set_resources (SET_DEST (x
), res
,
706 (mark_type
== MARK_SRC_DEST_CALL
707 || GET_CODE (SET_SRC (x
)) != CALL
),
710 mark_set_resources (SET_SRC (x
), res
, 0, MARK_SRC_DEST
);
714 mark_set_resources (XEXP (x
, 0), res
, 1, MARK_SRC_DEST
);
718 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
719 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
720 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
721 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0, mark_type
);
728 mark_set_resources (XEXP (x
, 0), res
, 1, MARK_SRC_DEST
);
733 mark_set_resources (XEXP (x
, 0), res
, 1, MARK_SRC_DEST
);
734 mark_set_resources (XEXP (XEXP (x
, 1), 0), res
, 0, MARK_SRC_DEST
);
735 mark_set_resources (XEXP (XEXP (x
, 1), 1), res
, 0, MARK_SRC_DEST
);
740 mark_set_resources (XEXP (x
, 0), res
, in_dest
, MARK_SRC_DEST
);
741 mark_set_resources (XEXP (x
, 1), res
, 0, MARK_SRC_DEST
);
742 mark_set_resources (XEXP (x
, 2), res
, 0, MARK_SRC_DEST
);
749 res
->unch_memory
|= MEM_READONLY_P (x
);
750 res
->volatil
|= MEM_VOLATILE_P (x
);
753 mark_set_resources (XEXP (x
, 0), res
, 0, MARK_SRC_DEST
);
759 if (!REG_P (SUBREG_REG (x
)))
760 mark_set_resources (SUBREG_REG (x
), res
, in_dest
, mark_type
);
763 unsigned int regno
= subreg_regno (x
);
764 unsigned int last_regno
= regno
+ subreg_nregs (x
);
766 gcc_assert (last_regno
<= FIRST_PSEUDO_REGISTER
);
767 for (r
= regno
; r
< last_regno
; r
++)
768 SET_HARD_REG_BIT (res
->regs
, r
);
776 gcc_assert (HARD_REGISTER_P (x
));
777 add_to_hard_reg_set (&res
->regs
, GET_MODE (x
), REGNO (x
));
781 case UNSPEC_VOLATILE
:
783 /* Traditional asm's are always volatile. */
792 res
->volatil
|= MEM_VOLATILE_P (x
);
794 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
795 We can not just fall through here since then we would be confused
796 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
797 traditional asms unlike their normal usage. */
799 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
800 mark_set_resources (ASM_OPERANDS_INPUT (x
, i
), res
, in_dest
,
808 /* Process each sub-expression and flag what it needs. */
809 format_ptr
= GET_RTX_FORMAT (code
);
810 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
811 switch (*format_ptr
++)
814 mark_set_resources (XEXP (x
, i
), res
, in_dest
, mark_type
);
818 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
819 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
, mark_type
);
824 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */
827 return_insn_p (rtx insn
)
829 if (JUMP_P (insn
) && GET_CODE (PATTERN (insn
)) == RETURN
)
832 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
833 return return_insn_p (XVECEXP (PATTERN (insn
), 0, 0));
838 /* Set the resources that are live at TARGET.
840 If TARGET is zero, we refer to the end of the current function and can
841 return our precomputed value.
843 Otherwise, we try to find out what is live by consulting the basic block
844 information. This is tricky, because we must consider the actions of
845 reload and jump optimization, which occur after the basic block information
848 Accordingly, we proceed as follows::
850 We find the previous BARRIER and look at all immediately following labels
851 (with no intervening active insns) to see if any of them start a basic
852 block. If we hit the start of the function first, we use block 0.
854 Once we have found a basic block and a corresponding first insns, we can
855 accurately compute the live status from basic_block_live_regs and
856 reg_renumber. (By starting at a label following a BARRIER, we are immune
857 to actions taken by reload and jump.) Then we scan all insns between
858 that point and our target. For each CLOBBER (or for call-clobbered regs
859 when we pass a CALL_INSN), mark the appropriate registers are dead. For
860 a SET, mark them as live.
862 We have to be careful when using REG_DEAD notes because they are not
863 updated by such things as find_equiv_reg. So keep track of registers
864 marked as dead that haven't been assigned to, and mark them dead at the
865 next CODE_LABEL since reload and jump won't propagate values across labels.
867 If we cannot find the start of a basic block (should be a very rare
868 case, if it can happen at all), mark everything as potentially live.
870 Next, scan forward from TARGET looking for things set or clobbered
871 before they are used. These are not live.
873 Because we can be called many times on the same target, save our results
874 in a hash table indexed by INSN_UID. This is only done if the function
875 init_resource_info () was invoked before we are called. */
878 mark_target_live_regs (rtx insns
, rtx target
, struct resources
*res
)
882 struct target_info
*tinfo
= NULL
;
886 HARD_REG_SET scratch
;
887 struct resources set
, needed
;
889 /* Handle end of function. */
892 *res
= end_of_function_needs
;
896 /* Handle return insn. */
897 else if (return_insn_p (target
))
899 *res
= end_of_function_needs
;
900 mark_referenced_resources (target
, res
, 0);
904 /* We have to assume memory is needed, but the CC isn't. */
906 res
->volatil
= res
->unch_memory
= 0;
909 /* See if we have computed this value already. */
910 if (target_hash_table
!= NULL
)
912 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
913 tinfo
; tinfo
= tinfo
->next
)
914 if (tinfo
->uid
== INSN_UID (target
))
917 /* Start by getting the basic block number. If we have saved
918 information, we can get it from there unless the insn at the
919 start of the basic block has been deleted. */
920 if (tinfo
&& tinfo
->block
!= -1
921 && ! INSN_DELETED_P (BB_HEAD (BASIC_BLOCK (tinfo
->block
))))
926 b
= find_basic_block (target
, MAX_DELAY_SLOT_LIVE_SEARCH
);
928 if (target_hash_table
!= NULL
)
932 /* If the information is up-to-date, use it. Otherwise, we will
934 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
936 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
942 /* Allocate a place to put our results and chain it into the
944 tinfo
= XNEW (struct target_info
);
945 tinfo
->uid
= INSN_UID (target
);
948 = target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
949 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
953 CLEAR_HARD_REG_SET (pending_dead_regs
);
955 /* If we found a basic block, get the live registers from it and update
956 them with anything set or killed between its start and the insn before
957 TARGET. Otherwise, we must assume everything is live. */
960 regset regs_live
= df_get_live_in (BASIC_BLOCK (b
));
961 rtx start_insn
, stop_insn
;
962 reg_set_iterator rsi
;
964 /* Compute hard regs live at start of block -- this is the real hard regs
965 marked live, plus live pseudo regs that have been renumbered to
968 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
970 EXECUTE_IF_SET_IN_REG_SET (regs_live
, FIRST_PSEUDO_REGISTER
, i
, rsi
)
972 if (reg_renumber
[i
] >= 0)
973 add_to_hard_reg_set (¤t_live_regs
, PSEUDO_REGNO_MODE (i
),
977 /* Get starting and ending insn, handling the case where each might
979 start_insn
= (b
== ENTRY_BLOCK_PTR
->next_bb
->index
?
980 insns
: BB_HEAD (BASIC_BLOCK (b
)));
983 if (NONJUMP_INSN_P (start_insn
)
984 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
985 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
987 if (NONJUMP_INSN_P (stop_insn
)
988 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
989 stop_insn
= next_insn (PREV_INSN (stop_insn
));
991 for (insn
= start_insn
; insn
!= stop_insn
;
992 insn
= next_insn_no_annul (insn
))
995 rtx real_insn
= insn
;
996 enum rtx_code code
= GET_CODE (insn
);
998 /* If this insn is from the target of a branch, it isn't going to
999 be used in the sequel. If it is used in both cases, this
1000 test will not be true. */
1001 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
1002 && INSN_FROM_TARGET_P (insn
))
1005 /* If this insn is a USE made by update_block, we care about the
1007 if (code
== INSN
&& GET_CODE (PATTERN (insn
)) == USE
1008 && INSN_P (XEXP (PATTERN (insn
), 0)))
1009 real_insn
= XEXP (PATTERN (insn
), 0);
1011 if (CALL_P (real_insn
))
1013 /* CALL clobbers all call-used regs that aren't fixed except
1014 sp, ap, and fp. Do this before setting the result of the
1016 AND_COMPL_HARD_REG_SET (current_live_regs
,
1017 regs_invalidated_by_call
);
1019 /* A CALL_INSN sets any global register live, since it may
1020 have been modified by the call. */
1021 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1023 SET_HARD_REG_BIT (current_live_regs
, i
);
1026 /* Mark anything killed in an insn to be deadened at the next
1027 label. Ignore USE insns; the only REG_DEAD notes will be for
1028 parameters. But they might be early. A CALL_INSN will usually
1029 clobber registers used for parameters. It isn't worth bothering
1030 with the unlikely case when it won't. */
1031 if ((NONJUMP_INSN_P (real_insn
)
1032 && GET_CODE (PATTERN (real_insn
)) != USE
1033 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
1034 || JUMP_P (real_insn
)
1035 || CALL_P (real_insn
))
1037 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1038 if (REG_NOTE_KIND (link
) == REG_DEAD
1039 && REG_P (XEXP (link
, 0))
1040 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1041 add_to_hard_reg_set (&pending_dead_regs
,
1042 GET_MODE (XEXP (link
, 0)),
1043 REGNO (XEXP (link
, 0)));
1045 note_stores (PATTERN (real_insn
), update_live_status
, NULL
);
1047 /* If any registers were unused after this insn, kill them.
1048 These notes will always be accurate. */
1049 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1050 if (REG_NOTE_KIND (link
) == REG_UNUSED
1051 && REG_P (XEXP (link
, 0))
1052 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1053 remove_from_hard_reg_set (¤t_live_regs
,
1054 GET_MODE (XEXP (link
, 0)),
1055 REGNO (XEXP (link
, 0)));
1058 else if (LABEL_P (real_insn
))
1060 /* A label clobbers the pending dead registers since neither
1061 reload nor jump will propagate a value across a label. */
1062 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
1063 CLEAR_HARD_REG_SET (pending_dead_regs
);
1066 /* The beginning of the epilogue corresponds to the end of the
1067 RTL chain when there are no epilogue insns. Certain resources
1068 are implicitly required at that point. */
1069 else if (NOTE_P (real_insn
)
1070 && NOTE_KIND (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
1071 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
1074 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
1078 tinfo
->bb_tick
= bb_ticks
[b
];
1082 /* We didn't find the start of a basic block. Assume everything
1083 in use. This should happen only extremely rarely. */
1084 SET_HARD_REG_SET (res
->regs
);
1086 CLEAR_RESOURCE (&set
);
1087 CLEAR_RESOURCE (&needed
);
1089 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1092 /* If we hit an unconditional branch, we have another way of finding out
1093 what is live: we can see what is live at the branch target and include
1094 anything used but not set before the branch. We add the live
1095 resources found using the test below to those found until now. */
1099 struct resources new_resources
;
1100 rtx stop_insn
= next_active_insn (jump_insn
);
1102 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1104 CLEAR_RESOURCE (&set
);
1105 CLEAR_RESOURCE (&needed
);
1107 /* Include JUMP_INSN in the needed registers. */
1108 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1110 mark_referenced_resources (insn
, &needed
, 1);
1112 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1113 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1114 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1116 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1119 IOR_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1124 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1128 /* Initialize the resources required by mark_target_live_regs ().
1129 This should be invoked before the first call to mark_target_live_regs. */
1132 init_resource_info (rtx epilogue_insn
)
1136 /* Indicate what resources are required to be valid at the end of the current
1137 function. The condition code never is and memory always is. If the
1138 frame pointer is needed, it is and so is the stack pointer unless
1139 EXIT_IGNORE_STACK is nonzero. If the frame pointer is not needed, the
1140 stack pointer is. Registers used to return the function value are
1141 needed. Registers holding global variables are needed. */
1143 end_of_function_needs
.cc
= 0;
1144 end_of_function_needs
.memory
= 1;
1145 end_of_function_needs
.unch_memory
= 0;
1146 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1148 if (frame_pointer_needed
)
1150 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1151 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1152 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1154 if (! EXIT_IGNORE_STACK
1155 || current_function_sp_is_unchanging
)
1156 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1159 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1161 if (current_function_return_rtx
!= 0)
1162 mark_referenced_resources (current_function_return_rtx
,
1163 &end_of_function_needs
, 1);
1165 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1167 #ifdef EPILOGUE_USES
1168 || EPILOGUE_USES (i
)
1171 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1173 /* The registers required to be live at the end of the function are
1174 represented in the flow information as being dead just prior to
1175 reaching the end of the function. For example, the return of a value
1176 might be represented by a USE of the return register immediately
1177 followed by an unconditional jump to the return label where the
1178 return label is the end of the RTL chain. The end of the RTL chain
1179 is then taken to mean that the return register is live.
1181 This sequence is no longer maintained when epilogue instructions are
1182 added to the RTL chain. To reconstruct the original meaning, the
1183 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1184 point where these registers become live (start_of_epilogue_needs).
1185 If epilogue instructions are present, the registers set by those
1186 instructions won't have been processed by flow. Thus, those
1187 registers are additionally required at the end of the RTL chain
1188 (end_of_function_needs). */
1190 start_of_epilogue_needs
= end_of_function_needs
;
1192 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1194 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0,
1195 MARK_SRC_DEST_CALL
);
1196 if (return_insn_p (epilogue_insn
))
1200 /* Allocate and initialize the tables used by mark_target_live_regs. */
1201 target_hash_table
= XCNEWVEC (struct target_info
*, TARGET_HASH_PRIME
);
1202 bb_ticks
= XCNEWVEC (int, last_basic_block
);
1205 /* Free up the resources allocated to mark_target_live_regs (). This
1206 should be invoked after the last call to mark_target_live_regs (). */
1209 free_resource_info (void)
1211 if (target_hash_table
!= NULL
)
1215 for (i
= 0; i
< TARGET_HASH_PRIME
; ++i
)
1217 struct target_info
*ti
= target_hash_table
[i
];
1221 struct target_info
*next
= ti
->next
;
1227 free (target_hash_table
);
1228 target_hash_table
= NULL
;
1231 if (bb_ticks
!= NULL
)
1238 /* Clear any hashed information that we have stored for INSN. */
1241 clear_hashed_info_for_insn (rtx insn
)
1243 struct target_info
*tinfo
;
1245 if (target_hash_table
!= NULL
)
1247 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1248 tinfo
; tinfo
= tinfo
->next
)
1249 if (tinfo
->uid
== INSN_UID (insn
))
1257 /* Increment the tick count for the basic block that contains INSN. */
1260 incr_ticks_for_insn (rtx insn
)
1262 int b
= find_basic_block (insn
, MAX_DELAY_SLOT_LIVE_SEARCH
);
1268 /* Add TRIAL to the set of resources used at the end of the current
1271 mark_end_of_function_resources (rtx trial
, int include_delayed_effects
)
1273 mark_referenced_resources (trial
, &end_of_function_needs
,
1274 include_delayed_effects
);