Daily bump.
[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "hard-reg-set.h"
30 #include "regs.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
41 #include "timevar.h"
42 #include "except.h"
43 #include "target.h"
44 #include "params.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
47 #include "df.h"
48 #include "dbgcnt.h"
50 /* The basic idea of common subexpression elimination is to go
51 through the code, keeping a record of expressions that would
52 have the same value at the current scan point, and replacing
53 expressions encountered with the cheapest equivalent expression.
55 It is too complicated to keep track of the different possibilities
56 when control paths merge in this code; so, at each label, we forget all
57 that is known and start fresh. This can be described as processing each
58 extended basic block separately. We have a separate pass to perform
59 global CSE.
61 Note CSE can turn a conditional or computed jump into a nop or
62 an unconditional jump. When this occurs we arrange to run the jump
63 optimizer after CSE to delete the unreachable code.
65 We use two data structures to record the equivalent expressions:
66 a hash table for most expressions, and a vector of "quantity
67 numbers" to record equivalent (pseudo) registers.
69 The use of the special data structure for registers is desirable
70 because it is faster. It is possible because registers references
71 contain a fairly small number, the register number, taken from
72 a contiguously allocated series, and two register references are
73 identical if they have the same number. General expressions
74 do not have any such thing, so the only way to retrieve the
75 information recorded on an expression other than a register
76 is to keep it in a hash table.
78 Registers and "quantity numbers":
80 At the start of each basic block, all of the (hardware and pseudo)
81 registers used in the function are given distinct quantity
82 numbers to indicate their contents. During scan, when the code
83 copies one register into another, we copy the quantity number.
84 When a register is loaded in any other way, we allocate a new
85 quantity number to describe the value generated by this operation.
86 `REG_QTY (N)' records what quantity register N is currently thought
87 of as containing.
89 All real quantity numbers are greater than or equal to zero.
90 If register N has not been assigned a quantity, `REG_QTY (N)' will
91 equal -N - 1, which is always negative.
93 Quantity numbers below zero do not exist and none of the `qty_table'
94 entries should be referenced with a negative index.
96 We also maintain a bidirectional chain of registers for each
97 quantity number. The `qty_table` members `first_reg' and `last_reg',
98 and `reg_eqv_table' members `next' and `prev' hold these chains.
100 The first register in a chain is the one whose lifespan is least local.
101 Among equals, it is the one that was seen first.
102 We replace any equivalent register with that one.
104 If two registers have the same quantity number, it must be true that
105 REG expressions with qty_table `mode' must be in the hash table for both
106 registers and must be in the same class.
108 The converse is not true. Since hard registers may be referenced in
109 any mode, two REG expressions might be equivalent in the hash table
110 but not have the same quantity number if the quantity number of one
111 of the registers is not the same mode as those expressions.
113 Constants and quantity numbers
115 When a quantity has a known constant value, that value is stored
116 in the appropriate qty_table `const_rtx'. This is in addition to
117 putting the constant in the hash table as is usual for non-regs.
119 Whether a reg or a constant is preferred is determined by the configuration
120 macro CONST_COSTS and will often depend on the constant value. In any
121 event, expressions containing constants can be simplified, by fold_rtx.
123 When a quantity has a known nearly constant value (such as an address
124 of a stack slot), that value is stored in the appropriate qty_table
125 `const_rtx'.
127 Integer constants don't have a machine mode. However, cse
128 determines the intended machine mode from the destination
129 of the instruction that moves the constant. The machine mode
130 is recorded in the hash table along with the actual RTL
131 constant expression so that different modes are kept separate.
133 Other expressions:
135 To record known equivalences among expressions in general
136 we use a hash table called `table'. It has a fixed number of buckets
137 that contain chains of `struct table_elt' elements for expressions.
138 These chains connect the elements whose expressions have the same
139 hash codes.
141 Other chains through the same elements connect the elements which
142 currently have equivalent values.
144 Register references in an expression are canonicalized before hashing
145 the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 The hash code of a register reference is computed using the quantity
147 number, not the register number.
149 When the value of an expression changes, it is necessary to remove from the
150 hash table not just that expression but all expressions whose values
151 could be different as a result.
153 1. If the value changing is in memory, except in special cases
154 ANYTHING referring to memory could be changed. That is because
155 nobody knows where a pointer does not point.
156 The function `invalidate_memory' removes what is necessary.
158 The special cases are when the address is constant or is
159 a constant plus a fixed register such as the frame pointer
160 or a static chain pointer. When such addresses are stored in,
161 we can tell exactly which other such addresses must be invalidated
162 due to overlap. `invalidate' does this.
163 All expressions that refer to non-constant
164 memory addresses are also invalidated. `invalidate_memory' does this.
166 2. If the value changing is a register, all expressions
167 containing references to that register, and only those,
168 must be removed.
170 Because searching the entire hash table for expressions that contain
171 a register is very slow, we try to figure out when it isn't necessary.
172 Precisely, this is necessary only when expressions have been
173 entered in the hash table using this register, and then the value has
174 changed, and then another expression wants to be added to refer to
175 the register's new value. This sequence of circumstances is rare
176 within any one basic block.
178 `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 cse_reg_info, are used to detect this case. REG_TICK (i) is
180 incremented whenever a value is stored in register i.
181 REG_IN_TABLE (i) holds -1 if no references to register i have been
182 entered in the table; otherwise, it contains the value REG_TICK (i)
183 had when the references were entered. If we want to enter a
184 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 remove old references. Until we want to enter a new entry, the
186 mere fact that the two vectors don't match makes the entries be
187 ignored if anyone tries to match them.
189 Registers themselves are entered in the hash table as well as in
190 the equivalent-register chains. However, `REG_TICK' and
191 `REG_IN_TABLE' do not apply to expressions which are simple
192 register references. These expressions are removed from the table
193 immediately when they become invalid, and this can be done even if
194 we do not immediately search for all the expressions that refer to
195 the register.
197 A CLOBBER rtx in an instruction invalidates its operand for further
198 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 invalidates everything that resides in memory.
201 Related expressions:
203 Constant expressions that differ only by an additive integer
204 are called related. When a constant expression is put in
205 the table, the related expression with no constant term
206 is also entered. These are made to point at each other
207 so that it is possible to find out if there exists any
208 register equivalent to an expression related to a given expression. */
210 /* Length of qty_table vector. We know in advance we will not need
211 a quantity number this big. */
213 static int max_qty;
215 /* Next quantity number to be allocated.
216 This is 1 + the largest number needed so far. */
218 static int next_qty;
220 /* Per-qty information tracking.
222 `first_reg' and `last_reg' track the head and tail of the
223 chain of registers which currently contain this quantity.
225 `mode' contains the machine mode of this quantity.
227 `const_rtx' holds the rtx of the constant value of this
228 quantity, if known. A summations of the frame/arg pointer
229 and a constant can also be entered here. When this holds
230 a known value, `const_insn' is the insn which stored the
231 constant value.
233 `comparison_{code,const,qty}' are used to track when a
234 comparison between a quantity and some constant or register has
235 been passed. In such a case, we know the results of the comparison
236 in case we see it again. These members record a comparison that
237 is known to be true. `comparison_code' holds the rtx code of such
238 a comparison, else it is set to UNKNOWN and the other two
239 comparison members are undefined. `comparison_const' holds
240 the constant being compared against, or zero if the comparison
241 is not against a constant. `comparison_qty' holds the quantity
242 being compared against when the result is known. If the comparison
243 is not with a register, `comparison_qty' is -1. */
245 struct qty_table_elem
247 rtx const_rtx;
248 rtx const_insn;
249 rtx comparison_const;
250 int comparison_qty;
251 unsigned int first_reg, last_reg;
252 /* The sizes of these fields should match the sizes of the
253 code and mode fields of struct rtx_def (see rtl.h). */
254 ENUM_BITFIELD(rtx_code) comparison_code : 16;
255 ENUM_BITFIELD(machine_mode) mode : 8;
258 /* The table of all qtys, indexed by qty number. */
259 static struct qty_table_elem *qty_table;
261 /* Structure used to pass arguments via for_each_rtx to function
262 cse_change_cc_mode. */
263 struct change_cc_mode_args
265 rtx insn;
266 rtx newreg;
269 #ifdef HAVE_cc0
270 /* For machines that have a CC0, we do not record its value in the hash
271 table since its use is guaranteed to be the insn immediately following
272 its definition and any other insn is presumed to invalidate it.
274 Instead, we store below the current and last value assigned to CC0.
275 If it should happen to be a constant, it is stored in preference
276 to the actual assigned value. In case it is a constant, we store
277 the mode in which the constant should be interpreted. */
279 static rtx this_insn_cc0, prev_insn_cc0;
280 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
281 #endif
283 /* Insn being scanned. */
285 static rtx this_insn;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
298 int next, prev;
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
304 struct cse_reg_info
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp;
309 /* The quantity number of the register's current contents. */
310 int reg_qty;
312 /* The number of times the register has been altered in the current
313 basic block. */
314 int reg_tick;
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
319 invalid. */
320 int reg_in_table;
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info *cse_reg_info_table;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
365 subexpression. */
367 static int do_not_record;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
402 chain is not useful.
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
409 a fixed address).
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
418 struct table_elt
420 rtx exp;
421 rtx canon_exp;
422 struct table_elt *next_same_hash;
423 struct table_elt *prev_same_hash;
424 struct table_elt *next_same_value;
425 struct table_elt *prev_same_value;
426 struct table_elt *first_same_value;
427 struct table_elt *related_value;
428 int cost;
429 int regcost;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode) mode : 8;
433 char in_memory;
434 char is_const;
435 char flag;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
441 #define HASH_SHIFT 5
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
448 #define HASH(X, M) \
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
462 non-fixed hard regs.
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P(N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
479 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
481 /* Get the number of times this register has been updated in this
482 basic block. */
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
491 SUBREG). */
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 static struct table_elt *table[HASH_SIZE];
506 /* Chain of `struct table_elt's made so far for this function
507 but currently removed from the table. */
509 static struct table_elt *free_element_chain;
511 /* Set to the cost of a constant pool reference if one was found for a
512 symbolic constant. If this was found, it means we should try to
513 convert constants into constant pool entries if they don't fit in
514 the insn. */
516 static int constant_pool_entries_cost;
517 static int constant_pool_entries_regcost;
519 /* This data describes a block that will be processed by
520 cse_extended_basic_block. */
522 struct cse_basic_block_data
524 /* Total number of SETs in block. */
525 int nsets;
526 /* Size of current branch path, if any. */
527 int path_size;
528 /* Current path, indicating which basic_blocks will be processed. */
529 struct branch_path
531 /* The basic block for this path entry. */
532 basic_block bb;
533 } *path;
537 /* Pointers to the live in/live out bitmaps for the boundaries of the
538 current EBB. */
539 static bitmap cse_ebb_live_in, cse_ebb_live_out;
541 /* A simple bitmap to track which basic blocks have been visited
542 already as part of an already processed extended basic block. */
543 static sbitmap cse_visited_basic_blocks;
545 static bool fixed_base_plus_p (rtx x);
546 static int notreg_cost (rtx, enum rtx_code);
547 static int approx_reg_cost_1 (rtx *, void *);
548 static int approx_reg_cost (rtx);
549 static int preferable (int, int, int, int);
550 static void new_basic_block (void);
551 static void make_new_qty (unsigned int, enum machine_mode);
552 static void make_regs_eqv (unsigned int, unsigned int);
553 static void delete_reg_equiv (unsigned int);
554 static int mention_regs (rtx);
555 static int insert_regs (rtx, struct table_elt *, int);
556 static void remove_from_table (struct table_elt *, unsigned);
557 static void remove_pseudo_from_table (rtx, unsigned);
558 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
559 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
560 static rtx lookup_as_function (rtx, enum rtx_code);
561 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
562 enum machine_mode);
563 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
564 static void invalidate (rtx, enum machine_mode);
565 static bool cse_rtx_varies_p (const_rtx, bool);
566 static void remove_invalid_refs (unsigned int);
567 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
568 enum machine_mode);
569 static void rehash_using_reg (rtx);
570 static void invalidate_memory (void);
571 static void invalidate_for_call (void);
572 static rtx use_related_value (rtx, struct table_elt *);
574 static inline unsigned canon_hash (rtx, enum machine_mode);
575 static inline unsigned safe_hash (rtx, enum machine_mode);
576 static unsigned hash_rtx_string (const char *);
578 static rtx canon_reg (rtx, rtx);
579 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
580 enum machine_mode *,
581 enum machine_mode *);
582 static rtx fold_rtx (rtx, rtx);
583 static rtx equiv_constant (rtx);
584 static void record_jump_equiv (rtx, bool);
585 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
586 int);
587 static void cse_insn (rtx, rtx);
588 static void cse_prescan_path (struct cse_basic_block_data *);
589 static void invalidate_from_clobbers (rtx);
590 static rtx cse_process_notes (rtx, rtx, bool *);
591 static void cse_extended_basic_block (struct cse_basic_block_data *);
592 static void count_reg_usage (rtx, int *, rtx, int);
593 static int check_for_label_ref (rtx *, void *);
594 extern void dump_class (struct table_elt*);
595 static void get_cse_reg_info_1 (unsigned int regno);
596 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
597 static int check_dependence (rtx *, void *);
599 static void flush_hash_table (void);
600 static bool insn_live_p (rtx, int *);
601 static bool set_live_p (rtx, rtx, int *);
602 static bool dead_libcall_p (rtx, int *);
603 static int cse_change_cc_mode (rtx *, void *);
604 static void cse_change_cc_mode_insn (rtx, rtx);
605 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
606 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
609 #undef RTL_HOOKS_GEN_LOWPART
610 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
612 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
614 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
615 virtual regs here because the simplify_*_operation routines are called
616 by integrate.c, which is called before virtual register instantiation. */
618 static bool
619 fixed_base_plus_p (rtx x)
621 switch (GET_CODE (x))
623 case REG:
624 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
625 return true;
626 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
627 return true;
628 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
629 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
630 return true;
631 return false;
633 case PLUS:
634 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
635 return false;
636 return fixed_base_plus_p (XEXP (x, 0));
638 default:
639 return false;
643 /* Dump the expressions in the equivalence class indicated by CLASSP.
644 This function is used only for debugging. */
645 void
646 dump_class (struct table_elt *classp)
648 struct table_elt *elt;
650 fprintf (stderr, "Equivalence chain for ");
651 print_rtl (stderr, classp->exp);
652 fprintf (stderr, ": \n");
654 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
656 print_rtl (stderr, elt->exp);
657 fprintf (stderr, "\n");
661 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
663 static int
664 approx_reg_cost_1 (rtx *xp, void *data)
666 rtx x = *xp;
667 int *cost_p = data;
669 if (x && REG_P (x))
671 unsigned int regno = REGNO (x);
673 if (! CHEAP_REGNO (regno))
675 if (regno < FIRST_PSEUDO_REGISTER)
677 if (SMALL_REGISTER_CLASSES)
678 return 1;
679 *cost_p += 2;
681 else
682 *cost_p += 1;
686 return 0;
689 /* Return an estimate of the cost of the registers used in an rtx.
690 This is mostly the number of different REG expressions in the rtx;
691 however for some exceptions like fixed registers we use a cost of
692 0. If any other hard register reference occurs, return MAX_COST. */
694 static int
695 approx_reg_cost (rtx x)
697 int cost = 0;
699 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
700 return MAX_COST;
702 return cost;
705 /* Return a negative value if an rtx A, whose costs are given by COST_A
706 and REGCOST_A, is more desirable than an rtx B.
707 Return a positive value if A is less desirable, or 0 if the two are
708 equally good. */
709 static int
710 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
712 /* First, get rid of cases involving expressions that are entirely
713 unwanted. */
714 if (cost_a != cost_b)
716 if (cost_a == MAX_COST)
717 return 1;
718 if (cost_b == MAX_COST)
719 return -1;
722 /* Avoid extending lifetimes of hardregs. */
723 if (regcost_a != regcost_b)
725 if (regcost_a == MAX_COST)
726 return 1;
727 if (regcost_b == MAX_COST)
728 return -1;
731 /* Normal operation costs take precedence. */
732 if (cost_a != cost_b)
733 return cost_a - cost_b;
734 /* Only if these are identical consider effects on register pressure. */
735 if (regcost_a != regcost_b)
736 return regcost_a - regcost_b;
737 return 0;
740 /* Internal function, to compute cost when X is not a register; called
741 from COST macro to keep it simple. */
743 static int
744 notreg_cost (rtx x, enum rtx_code outer)
746 return ((GET_CODE (x) == SUBREG
747 && REG_P (SUBREG_REG (x))
748 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
749 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
750 && (GET_MODE_SIZE (GET_MODE (x))
751 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
752 && subreg_lowpart_p (x)
753 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
754 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
756 : rtx_cost (x, outer) * 2);
760 /* Initialize CSE_REG_INFO_TABLE. */
762 static void
763 init_cse_reg_info (unsigned int nregs)
765 /* Do we need to grow the table? */
766 if (nregs > cse_reg_info_table_size)
768 unsigned int new_size;
770 if (cse_reg_info_table_size < 2048)
772 /* Compute a new size that is a power of 2 and no smaller
773 than the large of NREGS and 64. */
774 new_size = (cse_reg_info_table_size
775 ? cse_reg_info_table_size : 64);
777 while (new_size < nregs)
778 new_size *= 2;
780 else
782 /* If we need a big table, allocate just enough to hold
783 NREGS registers. */
784 new_size = nregs;
787 /* Reallocate the table with NEW_SIZE entries. */
788 if (cse_reg_info_table)
789 free (cse_reg_info_table);
790 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
791 cse_reg_info_table_size = new_size;
792 cse_reg_info_table_first_uninitialized = 0;
795 /* Do we have all of the first NREGS entries initialized? */
796 if (cse_reg_info_table_first_uninitialized < nregs)
798 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
799 unsigned int i;
801 /* Put the old timestamp on newly allocated entries so that they
802 will all be considered out of date. We do not touch those
803 entries beyond the first NREGS entries to be nice to the
804 virtual memory. */
805 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
806 cse_reg_info_table[i].timestamp = old_timestamp;
808 cse_reg_info_table_first_uninitialized = nregs;
812 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
814 static void
815 get_cse_reg_info_1 (unsigned int regno)
817 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
818 entry will be considered to have been initialized. */
819 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
821 /* Initialize the rest of the entry. */
822 cse_reg_info_table[regno].reg_tick = 1;
823 cse_reg_info_table[regno].reg_in_table = -1;
824 cse_reg_info_table[regno].subreg_ticked = -1;
825 cse_reg_info_table[regno].reg_qty = -regno - 1;
828 /* Find a cse_reg_info entry for REGNO. */
830 static inline struct cse_reg_info *
831 get_cse_reg_info (unsigned int regno)
833 struct cse_reg_info *p = &cse_reg_info_table[regno];
835 /* If this entry has not been initialized, go ahead and initialize
836 it. */
837 if (p->timestamp != cse_reg_info_timestamp)
838 get_cse_reg_info_1 (regno);
840 return p;
843 /* Clear the hash table and initialize each register with its own quantity,
844 for a new basic block. */
846 static void
847 new_basic_block (void)
849 int i;
851 next_qty = 0;
853 /* Invalidate cse_reg_info_table. */
854 cse_reg_info_timestamp++;
856 /* Clear out hash table state for this pass. */
857 CLEAR_HARD_REG_SET (hard_regs_in_table);
859 /* The per-quantity values used to be initialized here, but it is
860 much faster to initialize each as it is made in `make_new_qty'. */
862 for (i = 0; i < HASH_SIZE; i++)
864 struct table_elt *first;
866 first = table[i];
867 if (first != NULL)
869 struct table_elt *last = first;
871 table[i] = NULL;
873 while (last->next_same_hash != NULL)
874 last = last->next_same_hash;
876 /* Now relink this hash entire chain into
877 the free element list. */
879 last->next_same_hash = free_element_chain;
880 free_element_chain = first;
884 #ifdef HAVE_cc0
885 prev_insn_cc0 = 0;
886 #endif
889 /* Say that register REG contains a quantity in mode MODE not in any
890 register before and initialize that quantity. */
892 static void
893 make_new_qty (unsigned int reg, enum machine_mode mode)
895 int q;
896 struct qty_table_elem *ent;
897 struct reg_eqv_elem *eqv;
899 gcc_assert (next_qty < max_qty);
901 q = REG_QTY (reg) = next_qty++;
902 ent = &qty_table[q];
903 ent->first_reg = reg;
904 ent->last_reg = reg;
905 ent->mode = mode;
906 ent->const_rtx = ent->const_insn = NULL_RTX;
907 ent->comparison_code = UNKNOWN;
909 eqv = &reg_eqv_table[reg];
910 eqv->next = eqv->prev = -1;
913 /* Make reg NEW equivalent to reg OLD.
914 OLD is not changing; NEW is. */
916 static void
917 make_regs_eqv (unsigned int new, unsigned int old)
919 unsigned int lastr, firstr;
920 int q = REG_QTY (old);
921 struct qty_table_elem *ent;
923 ent = &qty_table[q];
925 /* Nothing should become eqv until it has a "non-invalid" qty number. */
926 gcc_assert (REGNO_QTY_VALID_P (old));
928 REG_QTY (new) = q;
929 firstr = ent->first_reg;
930 lastr = ent->last_reg;
932 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
933 hard regs. Among pseudos, if NEW will live longer than any other reg
934 of the same qty, and that is beyond the current basic block,
935 make it the new canonical replacement for this qty. */
936 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
937 /* Certain fixed registers might be of the class NO_REGS. This means
938 that not only can they not be allocated by the compiler, but
939 they cannot be used in substitutions or canonicalizations
940 either. */
941 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
942 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
943 || (new >= FIRST_PSEUDO_REGISTER
944 && (firstr < FIRST_PSEUDO_REGISTER
945 || (bitmap_bit_p (cse_ebb_live_out, new)
946 && !bitmap_bit_p (cse_ebb_live_out, firstr))
947 || (bitmap_bit_p (cse_ebb_live_in, new)
948 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
950 reg_eqv_table[firstr].prev = new;
951 reg_eqv_table[new].next = firstr;
952 reg_eqv_table[new].prev = -1;
953 ent->first_reg = new;
955 else
957 /* If NEW is a hard reg (known to be non-fixed), insert at end.
958 Otherwise, insert before any non-fixed hard regs that are at the
959 end. Registers of class NO_REGS cannot be used as an
960 equivalent for anything. */
961 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
962 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
963 && new >= FIRST_PSEUDO_REGISTER)
964 lastr = reg_eqv_table[lastr].prev;
965 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
966 if (reg_eqv_table[lastr].next >= 0)
967 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
968 else
969 qty_table[q].last_reg = new;
970 reg_eqv_table[lastr].next = new;
971 reg_eqv_table[new].prev = lastr;
975 /* Remove REG from its equivalence class. */
977 static void
978 delete_reg_equiv (unsigned int reg)
980 struct qty_table_elem *ent;
981 int q = REG_QTY (reg);
982 int p, n;
984 /* If invalid, do nothing. */
985 if (! REGNO_QTY_VALID_P (reg))
986 return;
988 ent = &qty_table[q];
990 p = reg_eqv_table[reg].prev;
991 n = reg_eqv_table[reg].next;
993 if (n != -1)
994 reg_eqv_table[n].prev = p;
995 else
996 ent->last_reg = p;
997 if (p != -1)
998 reg_eqv_table[p].next = n;
999 else
1000 ent->first_reg = n;
1002 REG_QTY (reg) = -reg - 1;
1005 /* Remove any invalid expressions from the hash table
1006 that refer to any of the registers contained in expression X.
1008 Make sure that newly inserted references to those registers
1009 as subexpressions will be considered valid.
1011 mention_regs is not called when a register itself
1012 is being stored in the table.
1014 Return 1 if we have done something that may have changed the hash code
1015 of X. */
1017 static int
1018 mention_regs (rtx x)
1020 enum rtx_code code;
1021 int i, j;
1022 const char *fmt;
1023 int changed = 0;
1025 if (x == 0)
1026 return 0;
1028 code = GET_CODE (x);
1029 if (code == REG)
1031 unsigned int regno = REGNO (x);
1032 unsigned int endregno = END_REGNO (x);
1033 unsigned int i;
1035 for (i = regno; i < endregno; i++)
1037 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1038 remove_invalid_refs (i);
1040 REG_IN_TABLE (i) = REG_TICK (i);
1041 SUBREG_TICKED (i) = -1;
1044 return 0;
1047 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1048 pseudo if they don't use overlapping words. We handle only pseudos
1049 here for simplicity. */
1050 if (code == SUBREG && REG_P (SUBREG_REG (x))
1051 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1053 unsigned int i = REGNO (SUBREG_REG (x));
1055 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1057 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1058 the last store to this register really stored into this
1059 subreg, then remove the memory of this subreg.
1060 Otherwise, remove any memory of the entire register and
1061 all its subregs from the table. */
1062 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1063 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1064 remove_invalid_refs (i);
1065 else
1066 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1069 REG_IN_TABLE (i) = REG_TICK (i);
1070 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1071 return 0;
1074 /* If X is a comparison or a COMPARE and either operand is a register
1075 that does not have a quantity, give it one. This is so that a later
1076 call to record_jump_equiv won't cause X to be assigned a different
1077 hash code and not found in the table after that call.
1079 It is not necessary to do this here, since rehash_using_reg can
1080 fix up the table later, but doing this here eliminates the need to
1081 call that expensive function in the most common case where the only
1082 use of the register is in the comparison. */
1084 if (code == COMPARE || COMPARISON_P (x))
1086 if (REG_P (XEXP (x, 0))
1087 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1088 if (insert_regs (XEXP (x, 0), NULL, 0))
1090 rehash_using_reg (XEXP (x, 0));
1091 changed = 1;
1094 if (REG_P (XEXP (x, 1))
1095 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1096 if (insert_regs (XEXP (x, 1), NULL, 0))
1098 rehash_using_reg (XEXP (x, 1));
1099 changed = 1;
1103 fmt = GET_RTX_FORMAT (code);
1104 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1105 if (fmt[i] == 'e')
1106 changed |= mention_regs (XEXP (x, i));
1107 else if (fmt[i] == 'E')
1108 for (j = 0; j < XVECLEN (x, i); j++)
1109 changed |= mention_regs (XVECEXP (x, i, j));
1111 return changed;
1114 /* Update the register quantities for inserting X into the hash table
1115 with a value equivalent to CLASSP.
1116 (If the class does not contain a REG, it is irrelevant.)
1117 If MODIFIED is nonzero, X is a destination; it is being modified.
1118 Note that delete_reg_equiv should be called on a register
1119 before insert_regs is done on that register with MODIFIED != 0.
1121 Nonzero value means that elements of reg_qty have changed
1122 so X's hash code may be different. */
1124 static int
1125 insert_regs (rtx x, struct table_elt *classp, int modified)
1127 if (REG_P (x))
1129 unsigned int regno = REGNO (x);
1130 int qty_valid;
1132 /* If REGNO is in the equivalence table already but is of the
1133 wrong mode for that equivalence, don't do anything here. */
1135 qty_valid = REGNO_QTY_VALID_P (regno);
1136 if (qty_valid)
1138 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1140 if (ent->mode != GET_MODE (x))
1141 return 0;
1144 if (modified || ! qty_valid)
1146 if (classp)
1147 for (classp = classp->first_same_value;
1148 classp != 0;
1149 classp = classp->next_same_value)
1150 if (REG_P (classp->exp)
1151 && GET_MODE (classp->exp) == GET_MODE (x))
1153 unsigned c_regno = REGNO (classp->exp);
1155 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1157 /* Suppose that 5 is hard reg and 100 and 101 are
1158 pseudos. Consider
1160 (set (reg:si 100) (reg:si 5))
1161 (set (reg:si 5) (reg:si 100))
1162 (set (reg:di 101) (reg:di 5))
1164 We would now set REG_QTY (101) = REG_QTY (5), but the
1165 entry for 5 is in SImode. When we use this later in
1166 copy propagation, we get the register in wrong mode. */
1167 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1168 continue;
1170 make_regs_eqv (regno, c_regno);
1171 return 1;
1174 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1175 than REG_IN_TABLE to find out if there was only a single preceding
1176 invalidation - for the SUBREG - or another one, which would be
1177 for the full register. However, if we find here that REG_TICK
1178 indicates that the register is invalid, it means that it has
1179 been invalidated in a separate operation. The SUBREG might be used
1180 now (then this is a recursive call), or we might use the full REG
1181 now and a SUBREG of it later. So bump up REG_TICK so that
1182 mention_regs will do the right thing. */
1183 if (! modified
1184 && REG_IN_TABLE (regno) >= 0
1185 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1186 REG_TICK (regno)++;
1187 make_new_qty (regno, GET_MODE (x));
1188 return 1;
1191 return 0;
1194 /* If X is a SUBREG, we will likely be inserting the inner register in the
1195 table. If that register doesn't have an assigned quantity number at
1196 this point but does later, the insertion that we will be doing now will
1197 not be accessible because its hash code will have changed. So assign
1198 a quantity number now. */
1200 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1201 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1203 insert_regs (SUBREG_REG (x), NULL, 0);
1204 mention_regs (x);
1205 return 1;
1207 else
1208 return mention_regs (x);
1211 /* Look in or update the hash table. */
1213 /* Remove table element ELT from use in the table.
1214 HASH is its hash code, made using the HASH macro.
1215 It's an argument because often that is known in advance
1216 and we save much time not recomputing it. */
1218 static void
1219 remove_from_table (struct table_elt *elt, unsigned int hash)
1221 if (elt == 0)
1222 return;
1224 /* Mark this element as removed. See cse_insn. */
1225 elt->first_same_value = 0;
1227 /* Remove the table element from its equivalence class. */
1230 struct table_elt *prev = elt->prev_same_value;
1231 struct table_elt *next = elt->next_same_value;
1233 if (next)
1234 next->prev_same_value = prev;
1236 if (prev)
1237 prev->next_same_value = next;
1238 else
1240 struct table_elt *newfirst = next;
1241 while (next)
1243 next->first_same_value = newfirst;
1244 next = next->next_same_value;
1249 /* Remove the table element from its hash bucket. */
1252 struct table_elt *prev = elt->prev_same_hash;
1253 struct table_elt *next = elt->next_same_hash;
1255 if (next)
1256 next->prev_same_hash = prev;
1258 if (prev)
1259 prev->next_same_hash = next;
1260 else if (table[hash] == elt)
1261 table[hash] = next;
1262 else
1264 /* This entry is not in the proper hash bucket. This can happen
1265 when two classes were merged by `merge_equiv_classes'. Search
1266 for the hash bucket that it heads. This happens only very
1267 rarely, so the cost is acceptable. */
1268 for (hash = 0; hash < HASH_SIZE; hash++)
1269 if (table[hash] == elt)
1270 table[hash] = next;
1274 /* Remove the table element from its related-value circular chain. */
1276 if (elt->related_value != 0 && elt->related_value != elt)
1278 struct table_elt *p = elt->related_value;
1280 while (p->related_value != elt)
1281 p = p->related_value;
1282 p->related_value = elt->related_value;
1283 if (p->related_value == p)
1284 p->related_value = 0;
1287 /* Now add it to the free element chain. */
1288 elt->next_same_hash = free_element_chain;
1289 free_element_chain = elt;
1292 /* Same as above, but X is a pseudo-register. */
1294 static void
1295 remove_pseudo_from_table (rtx x, unsigned int hash)
1297 struct table_elt *elt;
1299 /* Because a pseudo-register can be referenced in more than one
1300 mode, we might have to remove more than one table entry. */
1301 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1302 remove_from_table (elt, hash);
1305 /* Look up X in the hash table and return its table element,
1306 or 0 if X is not in the table.
1308 MODE is the machine-mode of X, or if X is an integer constant
1309 with VOIDmode then MODE is the mode with which X will be used.
1311 Here we are satisfied to find an expression whose tree structure
1312 looks like X. */
1314 static struct table_elt *
1315 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1317 struct table_elt *p;
1319 for (p = table[hash]; p; p = p->next_same_hash)
1320 if (mode == p->mode && ((x == p->exp && REG_P (x))
1321 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1322 return p;
1324 return 0;
1327 /* Like `lookup' but don't care whether the table element uses invalid regs.
1328 Also ignore discrepancies in the machine mode of a register. */
1330 static struct table_elt *
1331 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1333 struct table_elt *p;
1335 if (REG_P (x))
1337 unsigned int regno = REGNO (x);
1339 /* Don't check the machine mode when comparing registers;
1340 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1341 for (p = table[hash]; p; p = p->next_same_hash)
1342 if (REG_P (p->exp)
1343 && REGNO (p->exp) == regno)
1344 return p;
1346 else
1348 for (p = table[hash]; p; p = p->next_same_hash)
1349 if (mode == p->mode
1350 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1351 return p;
1354 return 0;
1357 /* Look for an expression equivalent to X and with code CODE.
1358 If one is found, return that expression. */
1360 static rtx
1361 lookup_as_function (rtx x, enum rtx_code code)
1363 struct table_elt *p
1364 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1366 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1367 long as we are narrowing. So if we looked in vain for a mode narrower
1368 than word_mode before, look for word_mode now. */
1369 if (p == 0 && code == CONST_INT
1370 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1372 x = copy_rtx (x);
1373 PUT_MODE (x, word_mode);
1374 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1377 if (p == 0)
1378 return 0;
1380 for (p = p->first_same_value; p; p = p->next_same_value)
1381 if (GET_CODE (p->exp) == code
1382 /* Make sure this is a valid entry in the table. */
1383 && exp_equiv_p (p->exp, p->exp, 1, false))
1384 return p->exp;
1386 return 0;
1389 /* Insert X in the hash table, assuming HASH is its hash code
1390 and CLASSP is an element of the class it should go in
1391 (or 0 if a new class should be made).
1392 It is inserted at the proper position to keep the class in
1393 the order cheapest first.
1395 MODE is the machine-mode of X, or if X is an integer constant
1396 with VOIDmode then MODE is the mode with which X will be used.
1398 For elements of equal cheapness, the most recent one
1399 goes in front, except that the first element in the list
1400 remains first unless a cheaper element is added. The order of
1401 pseudo-registers does not matter, as canon_reg will be called to
1402 find the cheapest when a register is retrieved from the table.
1404 The in_memory field in the hash table element is set to 0.
1405 The caller must set it nonzero if appropriate.
1407 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1408 and if insert_regs returns a nonzero value
1409 you must then recompute its hash code before calling here.
1411 If necessary, update table showing constant values of quantities. */
1413 #define CHEAPER(X, Y) \
1414 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1416 static struct table_elt *
1417 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1419 struct table_elt *elt;
1421 /* If X is a register and we haven't made a quantity for it,
1422 something is wrong. */
1423 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1425 /* If X is a hard register, show it is being put in the table. */
1426 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1427 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1429 /* Put an element for X into the right hash bucket. */
1431 elt = free_element_chain;
1432 if (elt)
1433 free_element_chain = elt->next_same_hash;
1434 else
1435 elt = XNEW (struct table_elt);
1437 elt->exp = x;
1438 elt->canon_exp = NULL_RTX;
1439 elt->cost = COST (x);
1440 elt->regcost = approx_reg_cost (x);
1441 elt->next_same_value = 0;
1442 elt->prev_same_value = 0;
1443 elt->next_same_hash = table[hash];
1444 elt->prev_same_hash = 0;
1445 elt->related_value = 0;
1446 elt->in_memory = 0;
1447 elt->mode = mode;
1448 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1450 if (table[hash])
1451 table[hash]->prev_same_hash = elt;
1452 table[hash] = elt;
1454 /* Put it into the proper value-class. */
1455 if (classp)
1457 classp = classp->first_same_value;
1458 if (CHEAPER (elt, classp))
1459 /* Insert at the head of the class. */
1461 struct table_elt *p;
1462 elt->next_same_value = classp;
1463 classp->prev_same_value = elt;
1464 elt->first_same_value = elt;
1466 for (p = classp; p; p = p->next_same_value)
1467 p->first_same_value = elt;
1469 else
1471 /* Insert not at head of the class. */
1472 /* Put it after the last element cheaper than X. */
1473 struct table_elt *p, *next;
1475 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1476 p = next);
1478 /* Put it after P and before NEXT. */
1479 elt->next_same_value = next;
1480 if (next)
1481 next->prev_same_value = elt;
1483 elt->prev_same_value = p;
1484 p->next_same_value = elt;
1485 elt->first_same_value = classp;
1488 else
1489 elt->first_same_value = elt;
1491 /* If this is a constant being set equivalent to a register or a register
1492 being set equivalent to a constant, note the constant equivalence.
1494 If this is a constant, it cannot be equivalent to a different constant,
1495 and a constant is the only thing that can be cheaper than a register. So
1496 we know the register is the head of the class (before the constant was
1497 inserted).
1499 If this is a register that is not already known equivalent to a
1500 constant, we must check the entire class.
1502 If this is a register that is already known equivalent to an insn,
1503 update the qtys `const_insn' to show that `this_insn' is the latest
1504 insn making that quantity equivalent to the constant. */
1506 if (elt->is_const && classp && REG_P (classp->exp)
1507 && !REG_P (x))
1509 int exp_q = REG_QTY (REGNO (classp->exp));
1510 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1512 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1513 exp_ent->const_insn = this_insn;
1516 else if (REG_P (x)
1517 && classp
1518 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1519 && ! elt->is_const)
1521 struct table_elt *p;
1523 for (p = classp; p != 0; p = p->next_same_value)
1525 if (p->is_const && !REG_P (p->exp))
1527 int x_q = REG_QTY (REGNO (x));
1528 struct qty_table_elem *x_ent = &qty_table[x_q];
1530 x_ent->const_rtx
1531 = gen_lowpart (GET_MODE (x), p->exp);
1532 x_ent->const_insn = this_insn;
1533 break;
1538 else if (REG_P (x)
1539 && qty_table[REG_QTY (REGNO (x))].const_rtx
1540 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1541 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1543 /* If this is a constant with symbolic value,
1544 and it has a term with an explicit integer value,
1545 link it up with related expressions. */
1546 if (GET_CODE (x) == CONST)
1548 rtx subexp = get_related_value (x);
1549 unsigned subhash;
1550 struct table_elt *subelt, *subelt_prev;
1552 if (subexp != 0)
1554 /* Get the integer-free subexpression in the hash table. */
1555 subhash = SAFE_HASH (subexp, mode);
1556 subelt = lookup (subexp, subhash, mode);
1557 if (subelt == 0)
1558 subelt = insert (subexp, NULL, subhash, mode);
1559 /* Initialize SUBELT's circular chain if it has none. */
1560 if (subelt->related_value == 0)
1561 subelt->related_value = subelt;
1562 /* Find the element in the circular chain that precedes SUBELT. */
1563 subelt_prev = subelt;
1564 while (subelt_prev->related_value != subelt)
1565 subelt_prev = subelt_prev->related_value;
1566 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1567 This way the element that follows SUBELT is the oldest one. */
1568 elt->related_value = subelt_prev->related_value;
1569 subelt_prev->related_value = elt;
1573 return elt;
1576 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1577 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1578 the two classes equivalent.
1580 CLASS1 will be the surviving class; CLASS2 should not be used after this
1581 call.
1583 Any invalid entries in CLASS2 will not be copied. */
1585 static void
1586 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1588 struct table_elt *elt, *next, *new;
1590 /* Ensure we start with the head of the classes. */
1591 class1 = class1->first_same_value;
1592 class2 = class2->first_same_value;
1594 /* If they were already equal, forget it. */
1595 if (class1 == class2)
1596 return;
1598 for (elt = class2; elt; elt = next)
1600 unsigned int hash;
1601 rtx exp = elt->exp;
1602 enum machine_mode mode = elt->mode;
1604 next = elt->next_same_value;
1606 /* Remove old entry, make a new one in CLASS1's class.
1607 Don't do this for invalid entries as we cannot find their
1608 hash code (it also isn't necessary). */
1609 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1611 bool need_rehash = false;
1613 hash_arg_in_memory = 0;
1614 hash = HASH (exp, mode);
1616 if (REG_P (exp))
1618 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1619 delete_reg_equiv (REGNO (exp));
1622 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1623 remove_pseudo_from_table (exp, hash);
1624 else
1625 remove_from_table (elt, hash);
1627 if (insert_regs (exp, class1, 0) || need_rehash)
1629 rehash_using_reg (exp);
1630 hash = HASH (exp, mode);
1632 new = insert (exp, class1, hash, mode);
1633 new->in_memory = hash_arg_in_memory;
1638 /* Flush the entire hash table. */
1640 static void
1641 flush_hash_table (void)
1643 int i;
1644 struct table_elt *p;
1646 for (i = 0; i < HASH_SIZE; i++)
1647 for (p = table[i]; p; p = table[i])
1649 /* Note that invalidate can remove elements
1650 after P in the current hash chain. */
1651 if (REG_P (p->exp))
1652 invalidate (p->exp, VOIDmode);
1653 else
1654 remove_from_table (p, i);
1658 /* Function called for each rtx to check whether true dependence exist. */
1659 struct check_dependence_data
1661 enum machine_mode mode;
1662 rtx exp;
1663 rtx addr;
1666 static int
1667 check_dependence (rtx *x, void *data)
1669 struct check_dependence_data *d = (struct check_dependence_data *) data;
1670 if (*x && MEM_P (*x))
1671 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1672 cse_rtx_varies_p);
1673 else
1674 return 0;
1677 /* Remove from the hash table, or mark as invalid, all expressions whose
1678 values could be altered by storing in X. X is a register, a subreg, or
1679 a memory reference with nonvarying address (because, when a memory
1680 reference with a varying address is stored in, all memory references are
1681 removed by invalidate_memory so specific invalidation is superfluous).
1682 FULL_MODE, if not VOIDmode, indicates that this much should be
1683 invalidated instead of just the amount indicated by the mode of X. This
1684 is only used for bitfield stores into memory.
1686 A nonvarying address may be just a register or just a symbol reference,
1687 or it may be either of those plus a numeric offset. */
1689 static void
1690 invalidate (rtx x, enum machine_mode full_mode)
1692 int i;
1693 struct table_elt *p;
1694 rtx addr;
1696 switch (GET_CODE (x))
1698 case REG:
1700 /* If X is a register, dependencies on its contents are recorded
1701 through the qty number mechanism. Just change the qty number of
1702 the register, mark it as invalid for expressions that refer to it,
1703 and remove it itself. */
1704 unsigned int regno = REGNO (x);
1705 unsigned int hash = HASH (x, GET_MODE (x));
1707 /* Remove REGNO from any quantity list it might be on and indicate
1708 that its value might have changed. If it is a pseudo, remove its
1709 entry from the hash table.
1711 For a hard register, we do the first two actions above for any
1712 additional hard registers corresponding to X. Then, if any of these
1713 registers are in the table, we must remove any REG entries that
1714 overlap these registers. */
1716 delete_reg_equiv (regno);
1717 REG_TICK (regno)++;
1718 SUBREG_TICKED (regno) = -1;
1720 if (regno >= FIRST_PSEUDO_REGISTER)
1721 remove_pseudo_from_table (x, hash);
1722 else
1724 HOST_WIDE_INT in_table
1725 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1726 unsigned int endregno = END_HARD_REGNO (x);
1727 unsigned int tregno, tendregno, rn;
1728 struct table_elt *p, *next;
1730 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1732 for (rn = regno + 1; rn < endregno; rn++)
1734 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1735 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1736 delete_reg_equiv (rn);
1737 REG_TICK (rn)++;
1738 SUBREG_TICKED (rn) = -1;
1741 if (in_table)
1742 for (hash = 0; hash < HASH_SIZE; hash++)
1743 for (p = table[hash]; p; p = next)
1745 next = p->next_same_hash;
1747 if (!REG_P (p->exp)
1748 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1749 continue;
1751 tregno = REGNO (p->exp);
1752 tendregno = END_HARD_REGNO (p->exp);
1753 if (tendregno > regno && tregno < endregno)
1754 remove_from_table (p, hash);
1758 return;
1760 case SUBREG:
1761 invalidate (SUBREG_REG (x), VOIDmode);
1762 return;
1764 case PARALLEL:
1765 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1766 invalidate (XVECEXP (x, 0, i), VOIDmode);
1767 return;
1769 case EXPR_LIST:
1770 /* This is part of a disjoint return value; extract the location in
1771 question ignoring the offset. */
1772 invalidate (XEXP (x, 0), VOIDmode);
1773 return;
1775 case MEM:
1776 addr = canon_rtx (get_addr (XEXP (x, 0)));
1777 /* Calculate the canonical version of X here so that
1778 true_dependence doesn't generate new RTL for X on each call. */
1779 x = canon_rtx (x);
1781 /* Remove all hash table elements that refer to overlapping pieces of
1782 memory. */
1783 if (full_mode == VOIDmode)
1784 full_mode = GET_MODE (x);
1786 for (i = 0; i < HASH_SIZE; i++)
1788 struct table_elt *next;
1790 for (p = table[i]; p; p = next)
1792 next = p->next_same_hash;
1793 if (p->in_memory)
1795 struct check_dependence_data d;
1797 /* Just canonicalize the expression once;
1798 otherwise each time we call invalidate
1799 true_dependence will canonicalize the
1800 expression again. */
1801 if (!p->canon_exp)
1802 p->canon_exp = canon_rtx (p->exp);
1803 d.exp = x;
1804 d.addr = addr;
1805 d.mode = full_mode;
1806 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1807 remove_from_table (p, i);
1811 return;
1813 default:
1814 gcc_unreachable ();
1818 /* Remove all expressions that refer to register REGNO,
1819 since they are already invalid, and we are about to
1820 mark that register valid again and don't want the old
1821 expressions to reappear as valid. */
1823 static void
1824 remove_invalid_refs (unsigned int regno)
1826 unsigned int i;
1827 struct table_elt *p, *next;
1829 for (i = 0; i < HASH_SIZE; i++)
1830 for (p = table[i]; p; p = next)
1832 next = p->next_same_hash;
1833 if (!REG_P (p->exp)
1834 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1835 remove_from_table (p, i);
1839 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1840 and mode MODE. */
1841 static void
1842 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1843 enum machine_mode mode)
1845 unsigned int i;
1846 struct table_elt *p, *next;
1847 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1849 for (i = 0; i < HASH_SIZE; i++)
1850 for (p = table[i]; p; p = next)
1852 rtx exp = p->exp;
1853 next = p->next_same_hash;
1855 if (!REG_P (exp)
1856 && (GET_CODE (exp) != SUBREG
1857 || !REG_P (SUBREG_REG (exp))
1858 || REGNO (SUBREG_REG (exp)) != regno
1859 || (((SUBREG_BYTE (exp)
1860 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1861 && SUBREG_BYTE (exp) <= end))
1862 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1863 remove_from_table (p, i);
1867 /* Recompute the hash codes of any valid entries in the hash table that
1868 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1870 This is called when we make a jump equivalence. */
1872 static void
1873 rehash_using_reg (rtx x)
1875 unsigned int i;
1876 struct table_elt *p, *next;
1877 unsigned hash;
1879 if (GET_CODE (x) == SUBREG)
1880 x = SUBREG_REG (x);
1882 /* If X is not a register or if the register is known not to be in any
1883 valid entries in the table, we have no work to do. */
1885 if (!REG_P (x)
1886 || REG_IN_TABLE (REGNO (x)) < 0
1887 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1888 return;
1890 /* Scan all hash chains looking for valid entries that mention X.
1891 If we find one and it is in the wrong hash chain, move it. */
1893 for (i = 0; i < HASH_SIZE; i++)
1894 for (p = table[i]; p; p = next)
1896 next = p->next_same_hash;
1897 if (reg_mentioned_p (x, p->exp)
1898 && exp_equiv_p (p->exp, p->exp, 1, false)
1899 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1901 if (p->next_same_hash)
1902 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1904 if (p->prev_same_hash)
1905 p->prev_same_hash->next_same_hash = p->next_same_hash;
1906 else
1907 table[i] = p->next_same_hash;
1909 p->next_same_hash = table[hash];
1910 p->prev_same_hash = 0;
1911 if (table[hash])
1912 table[hash]->prev_same_hash = p;
1913 table[hash] = p;
1918 /* Remove from the hash table any expression that is a call-clobbered
1919 register. Also update their TICK values. */
1921 static void
1922 invalidate_for_call (void)
1924 unsigned int regno, endregno;
1925 unsigned int i;
1926 unsigned hash;
1927 struct table_elt *p, *next;
1928 int in_table = 0;
1930 /* Go through all the hard registers. For each that is clobbered in
1931 a CALL_INSN, remove the register from quantity chains and update
1932 reg_tick if defined. Also see if any of these registers is currently
1933 in the table. */
1935 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1936 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1938 delete_reg_equiv (regno);
1939 if (REG_TICK (regno) >= 0)
1941 REG_TICK (regno)++;
1942 SUBREG_TICKED (regno) = -1;
1945 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1948 /* In the case where we have no call-clobbered hard registers in the
1949 table, we are done. Otherwise, scan the table and remove any
1950 entry that overlaps a call-clobbered register. */
1952 if (in_table)
1953 for (hash = 0; hash < HASH_SIZE; hash++)
1954 for (p = table[hash]; p; p = next)
1956 next = p->next_same_hash;
1958 if (!REG_P (p->exp)
1959 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1960 continue;
1962 regno = REGNO (p->exp);
1963 endregno = END_HARD_REGNO (p->exp);
1965 for (i = regno; i < endregno; i++)
1966 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1968 remove_from_table (p, hash);
1969 break;
1974 /* Given an expression X of type CONST,
1975 and ELT which is its table entry (or 0 if it
1976 is not in the hash table),
1977 return an alternate expression for X as a register plus integer.
1978 If none can be found, return 0. */
1980 static rtx
1981 use_related_value (rtx x, struct table_elt *elt)
1983 struct table_elt *relt = 0;
1984 struct table_elt *p, *q;
1985 HOST_WIDE_INT offset;
1987 /* First, is there anything related known?
1988 If we have a table element, we can tell from that.
1989 Otherwise, must look it up. */
1991 if (elt != 0 && elt->related_value != 0)
1992 relt = elt;
1993 else if (elt == 0 && GET_CODE (x) == CONST)
1995 rtx subexp = get_related_value (x);
1996 if (subexp != 0)
1997 relt = lookup (subexp,
1998 SAFE_HASH (subexp, GET_MODE (subexp)),
1999 GET_MODE (subexp));
2002 if (relt == 0)
2003 return 0;
2005 /* Search all related table entries for one that has an
2006 equivalent register. */
2008 p = relt;
2009 while (1)
2011 /* This loop is strange in that it is executed in two different cases.
2012 The first is when X is already in the table. Then it is searching
2013 the RELATED_VALUE list of X's class (RELT). The second case is when
2014 X is not in the table. Then RELT points to a class for the related
2015 value.
2017 Ensure that, whatever case we are in, that we ignore classes that have
2018 the same value as X. */
2020 if (rtx_equal_p (x, p->exp))
2021 q = 0;
2022 else
2023 for (q = p->first_same_value; q; q = q->next_same_value)
2024 if (REG_P (q->exp))
2025 break;
2027 if (q)
2028 break;
2030 p = p->related_value;
2032 /* We went all the way around, so there is nothing to be found.
2033 Alternatively, perhaps RELT was in the table for some other reason
2034 and it has no related values recorded. */
2035 if (p == relt || p == 0)
2036 break;
2039 if (q == 0)
2040 return 0;
2042 offset = (get_integer_term (x) - get_integer_term (p->exp));
2043 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2044 return plus_constant (q->exp, offset);
2047 /* Hash a string. Just add its bytes up. */
2048 static inline unsigned
2049 hash_rtx_string (const char *ps)
2051 unsigned hash = 0;
2052 const unsigned char *p = (const unsigned char *) ps;
2054 if (p)
2055 while (*p)
2056 hash += *p++;
2058 return hash;
2061 /* Hash an rtx. We are careful to make sure the value is never negative.
2062 Equivalent registers hash identically.
2063 MODE is used in hashing for CONST_INTs only;
2064 otherwise the mode of X is used.
2066 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2068 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2069 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2071 Note that cse_insn knows that the hash code of a MEM expression
2072 is just (int) MEM plus the hash code of the address. */
2074 unsigned
2075 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2076 int *hash_arg_in_memory_p, bool have_reg_qty)
2078 int i, j;
2079 unsigned hash = 0;
2080 enum rtx_code code;
2081 const char *fmt;
2083 /* Used to turn recursion into iteration. We can't rely on GCC's
2084 tail-recursion elimination since we need to keep accumulating values
2085 in HASH. */
2086 repeat:
2087 if (x == 0)
2088 return hash;
2090 code = GET_CODE (x);
2091 switch (code)
2093 case REG:
2095 unsigned int regno = REGNO (x);
2097 if (!reload_completed)
2099 /* On some machines, we can't record any non-fixed hard register,
2100 because extending its life will cause reload problems. We
2101 consider ap, fp, sp, gp to be fixed for this purpose.
2103 We also consider CCmode registers to be fixed for this purpose;
2104 failure to do so leads to failure to simplify 0<100 type of
2105 conditionals.
2107 On all machines, we can't record any global registers.
2108 Nor should we record any register that is in a small
2109 class, as defined by CLASS_LIKELY_SPILLED_P. */
2110 bool record;
2112 if (regno >= FIRST_PSEUDO_REGISTER)
2113 record = true;
2114 else if (x == frame_pointer_rtx
2115 || x == hard_frame_pointer_rtx
2116 || x == arg_pointer_rtx
2117 || x == stack_pointer_rtx
2118 || x == pic_offset_table_rtx)
2119 record = true;
2120 else if (global_regs[regno])
2121 record = false;
2122 else if (fixed_regs[regno])
2123 record = true;
2124 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2125 record = true;
2126 else if (SMALL_REGISTER_CLASSES)
2127 record = false;
2128 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2129 record = false;
2130 else
2131 record = true;
2133 if (!record)
2135 *do_not_record_p = 1;
2136 return 0;
2140 hash += ((unsigned int) REG << 7);
2141 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2142 return hash;
2145 /* We handle SUBREG of a REG specially because the underlying
2146 reg changes its hash value with every value change; we don't
2147 want to have to forget unrelated subregs when one subreg changes. */
2148 case SUBREG:
2150 if (REG_P (SUBREG_REG (x)))
2152 hash += (((unsigned int) SUBREG << 7)
2153 + REGNO (SUBREG_REG (x))
2154 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2155 return hash;
2157 break;
2160 case CONST_INT:
2161 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2162 + (unsigned int) INTVAL (x));
2163 return hash;
2165 case CONST_DOUBLE:
2166 /* This is like the general case, except that it only counts
2167 the integers representing the constant. */
2168 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2169 if (GET_MODE (x) != VOIDmode)
2170 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2171 else
2172 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2173 + (unsigned int) CONST_DOUBLE_HIGH (x));
2174 return hash;
2176 case CONST_FIXED:
2177 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2178 hash += fixed_hash (CONST_FIXED_VALUE (x));
2179 return hash;
2181 case CONST_VECTOR:
2183 int units;
2184 rtx elt;
2186 units = CONST_VECTOR_NUNITS (x);
2188 for (i = 0; i < units; ++i)
2190 elt = CONST_VECTOR_ELT (x, i);
2191 hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p,
2192 hash_arg_in_memory_p, have_reg_qty);
2195 return hash;
2198 /* Assume there is only one rtx object for any given label. */
2199 case LABEL_REF:
2200 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2201 differences and differences between each stage's debugging dumps. */
2202 hash += (((unsigned int) LABEL_REF << 7)
2203 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2204 return hash;
2206 case SYMBOL_REF:
2208 /* Don't hash on the symbol's address to avoid bootstrap differences.
2209 Different hash values may cause expressions to be recorded in
2210 different orders and thus different registers to be used in the
2211 final assembler. This also avoids differences in the dump files
2212 between various stages. */
2213 unsigned int h = 0;
2214 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2216 while (*p)
2217 h += (h << 7) + *p++; /* ??? revisit */
2219 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2220 return hash;
2223 case MEM:
2224 /* We don't record if marked volatile or if BLKmode since we don't
2225 know the size of the move. */
2226 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2228 *do_not_record_p = 1;
2229 return 0;
2231 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2232 *hash_arg_in_memory_p = 1;
2234 /* Now that we have already found this special case,
2235 might as well speed it up as much as possible. */
2236 hash += (unsigned) MEM;
2237 x = XEXP (x, 0);
2238 goto repeat;
2240 case USE:
2241 /* A USE that mentions non-volatile memory needs special
2242 handling since the MEM may be BLKmode which normally
2243 prevents an entry from being made. Pure calls are
2244 marked by a USE which mentions BLKmode memory.
2245 See calls.c:emit_call_1. */
2246 if (MEM_P (XEXP (x, 0))
2247 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2249 hash += (unsigned) USE;
2250 x = XEXP (x, 0);
2252 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2253 *hash_arg_in_memory_p = 1;
2255 /* Now that we have already found this special case,
2256 might as well speed it up as much as possible. */
2257 hash += (unsigned) MEM;
2258 x = XEXP (x, 0);
2259 goto repeat;
2261 break;
2263 case PRE_DEC:
2264 case PRE_INC:
2265 case POST_DEC:
2266 case POST_INC:
2267 case PRE_MODIFY:
2268 case POST_MODIFY:
2269 case PC:
2270 case CC0:
2271 case CALL:
2272 case UNSPEC_VOLATILE:
2273 *do_not_record_p = 1;
2274 return 0;
2276 case ASM_OPERANDS:
2277 if (MEM_VOLATILE_P (x))
2279 *do_not_record_p = 1;
2280 return 0;
2282 else
2284 /* We don't want to take the filename and line into account. */
2285 hash += (unsigned) code + (unsigned) GET_MODE (x)
2286 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2287 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2288 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2290 if (ASM_OPERANDS_INPUT_LENGTH (x))
2292 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2294 hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2295 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2296 do_not_record_p, hash_arg_in_memory_p,
2297 have_reg_qty)
2298 + hash_rtx_string
2299 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2302 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2303 x = ASM_OPERANDS_INPUT (x, 0);
2304 mode = GET_MODE (x);
2305 goto repeat;
2308 return hash;
2310 break;
2312 default:
2313 break;
2316 i = GET_RTX_LENGTH (code) - 1;
2317 hash += (unsigned) code + (unsigned) GET_MODE (x);
2318 fmt = GET_RTX_FORMAT (code);
2319 for (; i >= 0; i--)
2321 switch (fmt[i])
2323 case 'e':
2324 /* If we are about to do the last recursive call
2325 needed at this level, change it into iteration.
2326 This function is called enough to be worth it. */
2327 if (i == 0)
2329 x = XEXP (x, i);
2330 goto repeat;
2333 hash += hash_rtx (XEXP (x, i), 0, do_not_record_p,
2334 hash_arg_in_memory_p, have_reg_qty);
2335 break;
2337 case 'E':
2338 for (j = 0; j < XVECLEN (x, i); j++)
2339 hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p,
2340 hash_arg_in_memory_p, have_reg_qty);
2341 break;
2343 case 's':
2344 hash += hash_rtx_string (XSTR (x, i));
2345 break;
2347 case 'i':
2348 hash += (unsigned int) XINT (x, i);
2349 break;
2351 case '0': case 't':
2352 /* Unused. */
2353 break;
2355 default:
2356 gcc_unreachable ();
2360 return hash;
2363 /* Hash an rtx X for cse via hash_rtx.
2364 Stores 1 in do_not_record if any subexpression is volatile.
2365 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2366 does not have the RTX_UNCHANGING_P bit set. */
2368 static inline unsigned
2369 canon_hash (rtx x, enum machine_mode mode)
2371 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2374 /* Like canon_hash but with no side effects, i.e. do_not_record
2375 and hash_arg_in_memory are not changed. */
2377 static inline unsigned
2378 safe_hash (rtx x, enum machine_mode mode)
2380 int dummy_do_not_record;
2381 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2384 /* Return 1 iff X and Y would canonicalize into the same thing,
2385 without actually constructing the canonicalization of either one.
2386 If VALIDATE is nonzero,
2387 we assume X is an expression being processed from the rtl
2388 and Y was found in the hash table. We check register refs
2389 in Y for being marked as valid.
2391 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2394 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2396 int i, j;
2397 enum rtx_code code;
2398 const char *fmt;
2400 /* Note: it is incorrect to assume an expression is equivalent to itself
2401 if VALIDATE is nonzero. */
2402 if (x == y && !validate)
2403 return 1;
2405 if (x == 0 || y == 0)
2406 return x == y;
2408 code = GET_CODE (x);
2409 if (code != GET_CODE (y))
2410 return 0;
2412 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2413 if (GET_MODE (x) != GET_MODE (y))
2414 return 0;
2416 switch (code)
2418 case PC:
2419 case CC0:
2420 case CONST_INT:
2421 case CONST_DOUBLE:
2422 case CONST_FIXED:
2423 return x == y;
2425 case LABEL_REF:
2426 return XEXP (x, 0) == XEXP (y, 0);
2428 case SYMBOL_REF:
2429 return XSTR (x, 0) == XSTR (y, 0);
2431 case REG:
2432 if (for_gcse)
2433 return REGNO (x) == REGNO (y);
2434 else
2436 unsigned int regno = REGNO (y);
2437 unsigned int i;
2438 unsigned int endregno = END_REGNO (y);
2440 /* If the quantities are not the same, the expressions are not
2441 equivalent. If there are and we are not to validate, they
2442 are equivalent. Otherwise, ensure all regs are up-to-date. */
2444 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2445 return 0;
2447 if (! validate)
2448 return 1;
2450 for (i = regno; i < endregno; i++)
2451 if (REG_IN_TABLE (i) != REG_TICK (i))
2452 return 0;
2454 return 1;
2457 case MEM:
2458 if (for_gcse)
2460 /* A volatile mem should not be considered equivalent to any
2461 other. */
2462 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2463 return 0;
2465 /* Can't merge two expressions in different alias sets, since we
2466 can decide that the expression is transparent in a block when
2467 it isn't, due to it being set with the different alias set.
2469 Also, can't merge two expressions with different MEM_ATTRS.
2470 They could e.g. be two different entities allocated into the
2471 same space on the stack (see e.g. PR25130). In that case, the
2472 MEM addresses can be the same, even though the two MEMs are
2473 absolutely not equivalent.
2475 But because really all MEM attributes should be the same for
2476 equivalent MEMs, we just use the invariant that MEMs that have
2477 the same attributes share the same mem_attrs data structure. */
2478 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2479 return 0;
2481 break;
2483 /* For commutative operations, check both orders. */
2484 case PLUS:
2485 case MULT:
2486 case AND:
2487 case IOR:
2488 case XOR:
2489 case NE:
2490 case EQ:
2491 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2492 validate, for_gcse)
2493 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2494 validate, for_gcse))
2495 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2496 validate, for_gcse)
2497 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2498 validate, for_gcse)));
2500 case ASM_OPERANDS:
2501 /* We don't use the generic code below because we want to
2502 disregard filename and line numbers. */
2504 /* A volatile asm isn't equivalent to any other. */
2505 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2506 return 0;
2508 if (GET_MODE (x) != GET_MODE (y)
2509 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2510 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2511 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2512 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2513 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2514 return 0;
2516 if (ASM_OPERANDS_INPUT_LENGTH (x))
2518 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2519 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2520 ASM_OPERANDS_INPUT (y, i),
2521 validate, for_gcse)
2522 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2523 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2524 return 0;
2527 return 1;
2529 default:
2530 break;
2533 /* Compare the elements. If any pair of corresponding elements
2534 fail to match, return 0 for the whole thing. */
2536 fmt = GET_RTX_FORMAT (code);
2537 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2539 switch (fmt[i])
2541 case 'e':
2542 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2543 validate, for_gcse))
2544 return 0;
2545 break;
2547 case 'E':
2548 if (XVECLEN (x, i) != XVECLEN (y, i))
2549 return 0;
2550 for (j = 0; j < XVECLEN (x, i); j++)
2551 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2552 validate, for_gcse))
2553 return 0;
2554 break;
2556 case 's':
2557 if (strcmp (XSTR (x, i), XSTR (y, i)))
2558 return 0;
2559 break;
2561 case 'i':
2562 if (XINT (x, i) != XINT (y, i))
2563 return 0;
2564 break;
2566 case 'w':
2567 if (XWINT (x, i) != XWINT (y, i))
2568 return 0;
2569 break;
2571 case '0':
2572 case 't':
2573 break;
2575 default:
2576 gcc_unreachable ();
2580 return 1;
2583 /* Return 1 if X has a value that can vary even between two
2584 executions of the program. 0 means X can be compared reliably
2585 against certain constants or near-constants. */
2587 static bool
2588 cse_rtx_varies_p (const_rtx x, bool from_alias)
2590 /* We need not check for X and the equivalence class being of the same
2591 mode because if X is equivalent to a constant in some mode, it
2592 doesn't vary in any mode. */
2594 if (REG_P (x)
2595 && REGNO_QTY_VALID_P (REGNO (x)))
2597 int x_q = REG_QTY (REGNO (x));
2598 struct qty_table_elem *x_ent = &qty_table[x_q];
2600 if (GET_MODE (x) == x_ent->mode
2601 && x_ent->const_rtx != NULL_RTX)
2602 return 0;
2605 if (GET_CODE (x) == PLUS
2606 && GET_CODE (XEXP (x, 1)) == CONST_INT
2607 && REG_P (XEXP (x, 0))
2608 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2610 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2611 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2613 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2614 && x0_ent->const_rtx != NULL_RTX)
2615 return 0;
2618 /* This can happen as the result of virtual register instantiation, if
2619 the initial constant is too large to be a valid address. This gives
2620 us a three instruction sequence, load large offset into a register,
2621 load fp minus a constant into a register, then a MEM which is the
2622 sum of the two `constant' registers. */
2623 if (GET_CODE (x) == PLUS
2624 && REG_P (XEXP (x, 0))
2625 && REG_P (XEXP (x, 1))
2626 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2627 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2629 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2630 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2631 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2632 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2634 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2635 && x0_ent->const_rtx != NULL_RTX
2636 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2637 && x1_ent->const_rtx != NULL_RTX)
2638 return 0;
2641 return rtx_varies_p (x, from_alias);
2644 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2645 the result if necessary. INSN is as for canon_reg. */
2647 static void
2648 validate_canon_reg (rtx *xloc, rtx insn)
2650 if (*xloc)
2652 rtx new = canon_reg (*xloc, insn);
2654 /* If replacing pseudo with hard reg or vice versa, ensure the
2655 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2656 gcc_assert (insn && new);
2657 validate_change (insn, xloc, new, 1);
2661 /* Canonicalize an expression:
2662 replace each register reference inside it
2663 with the "oldest" equivalent register.
2665 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2666 after we make our substitution. The calls are made with IN_GROUP nonzero
2667 so apply_change_group must be called upon the outermost return from this
2668 function (unless INSN is zero). The result of apply_change_group can
2669 generally be discarded since the changes we are making are optional. */
2671 static rtx
2672 canon_reg (rtx x, rtx insn)
2674 int i;
2675 enum rtx_code code;
2676 const char *fmt;
2678 if (x == 0)
2679 return x;
2681 code = GET_CODE (x);
2682 switch (code)
2684 case PC:
2685 case CC0:
2686 case CONST:
2687 case CONST_INT:
2688 case CONST_DOUBLE:
2689 case CONST_FIXED:
2690 case CONST_VECTOR:
2691 case SYMBOL_REF:
2692 case LABEL_REF:
2693 case ADDR_VEC:
2694 case ADDR_DIFF_VEC:
2695 return x;
2697 case REG:
2699 int first;
2700 int q;
2701 struct qty_table_elem *ent;
2703 /* Never replace a hard reg, because hard regs can appear
2704 in more than one machine mode, and we must preserve the mode
2705 of each occurrence. Also, some hard regs appear in
2706 MEMs that are shared and mustn't be altered. Don't try to
2707 replace any reg that maps to a reg of class NO_REGS. */
2708 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2709 || ! REGNO_QTY_VALID_P (REGNO (x)))
2710 return x;
2712 q = REG_QTY (REGNO (x));
2713 ent = &qty_table[q];
2714 first = ent->first_reg;
2715 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2716 : REGNO_REG_CLASS (first) == NO_REGS ? x
2717 : gen_rtx_REG (ent->mode, first));
2720 default:
2721 break;
2724 fmt = GET_RTX_FORMAT (code);
2725 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2727 int j;
2729 if (fmt[i] == 'e')
2730 validate_canon_reg (&XEXP (x, i), insn);
2731 else if (fmt[i] == 'E')
2732 for (j = 0; j < XVECLEN (x, i); j++)
2733 validate_canon_reg (&XVECEXP (x, i, j), insn);
2736 return x;
2739 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2740 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2741 what values are being compared.
2743 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2744 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2745 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2746 compared to produce cc0.
2748 The return value is the comparison operator and is either the code of
2749 A or the code corresponding to the inverse of the comparison. */
2751 static enum rtx_code
2752 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2753 enum machine_mode *pmode1, enum machine_mode *pmode2)
2755 rtx arg1, arg2;
2757 arg1 = *parg1, arg2 = *parg2;
2759 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2761 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2763 /* Set nonzero when we find something of interest. */
2764 rtx x = 0;
2765 int reverse_code = 0;
2766 struct table_elt *p = 0;
2768 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2769 On machines with CC0, this is the only case that can occur, since
2770 fold_rtx will return the COMPARE or item being compared with zero
2771 when given CC0. */
2773 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2774 x = arg1;
2776 /* If ARG1 is a comparison operator and CODE is testing for
2777 STORE_FLAG_VALUE, get the inner arguments. */
2779 else if (COMPARISON_P (arg1))
2781 #ifdef FLOAT_STORE_FLAG_VALUE
2782 REAL_VALUE_TYPE fsfv;
2783 #endif
2785 if (code == NE
2786 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2787 && code == LT && STORE_FLAG_VALUE == -1)
2788 #ifdef FLOAT_STORE_FLAG_VALUE
2789 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2790 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2791 REAL_VALUE_NEGATIVE (fsfv)))
2792 #endif
2794 x = arg1;
2795 else if (code == EQ
2796 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2797 && code == GE && STORE_FLAG_VALUE == -1)
2798 #ifdef FLOAT_STORE_FLAG_VALUE
2799 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2800 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2801 REAL_VALUE_NEGATIVE (fsfv)))
2802 #endif
2804 x = arg1, reverse_code = 1;
2807 /* ??? We could also check for
2809 (ne (and (eq (...) (const_int 1))) (const_int 0))
2811 and related forms, but let's wait until we see them occurring. */
2813 if (x == 0)
2814 /* Look up ARG1 in the hash table and see if it has an equivalence
2815 that lets us see what is being compared. */
2816 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2817 if (p)
2819 p = p->first_same_value;
2821 /* If what we compare is already known to be constant, that is as
2822 good as it gets.
2823 We need to break the loop in this case, because otherwise we
2824 can have an infinite loop when looking at a reg that is known
2825 to be a constant which is the same as a comparison of a reg
2826 against zero which appears later in the insn stream, which in
2827 turn is constant and the same as the comparison of the first reg
2828 against zero... */
2829 if (p->is_const)
2830 break;
2833 for (; p; p = p->next_same_value)
2835 enum machine_mode inner_mode = GET_MODE (p->exp);
2836 #ifdef FLOAT_STORE_FLAG_VALUE
2837 REAL_VALUE_TYPE fsfv;
2838 #endif
2840 /* If the entry isn't valid, skip it. */
2841 if (! exp_equiv_p (p->exp, p->exp, 1, false))
2842 continue;
2844 if (GET_CODE (p->exp) == COMPARE
2845 /* Another possibility is that this machine has a compare insn
2846 that includes the comparison code. In that case, ARG1 would
2847 be equivalent to a comparison operation that would set ARG1 to
2848 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2849 ORIG_CODE is the actual comparison being done; if it is an EQ,
2850 we must reverse ORIG_CODE. On machine with a negative value
2851 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2852 || ((code == NE
2853 || (code == LT
2854 && GET_MODE_CLASS (inner_mode) == MODE_INT
2855 && (GET_MODE_BITSIZE (inner_mode)
2856 <= HOST_BITS_PER_WIDE_INT)
2857 && (STORE_FLAG_VALUE
2858 & ((HOST_WIDE_INT) 1
2859 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2860 #ifdef FLOAT_STORE_FLAG_VALUE
2861 || (code == LT
2862 && SCALAR_FLOAT_MODE_P (inner_mode)
2863 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2864 REAL_VALUE_NEGATIVE (fsfv)))
2865 #endif
2867 && COMPARISON_P (p->exp)))
2869 x = p->exp;
2870 break;
2872 else if ((code == EQ
2873 || (code == GE
2874 && GET_MODE_CLASS (inner_mode) == MODE_INT
2875 && (GET_MODE_BITSIZE (inner_mode)
2876 <= HOST_BITS_PER_WIDE_INT)
2877 && (STORE_FLAG_VALUE
2878 & ((HOST_WIDE_INT) 1
2879 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2880 #ifdef FLOAT_STORE_FLAG_VALUE
2881 || (code == GE
2882 && SCALAR_FLOAT_MODE_P (inner_mode)
2883 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2884 REAL_VALUE_NEGATIVE (fsfv)))
2885 #endif
2887 && COMPARISON_P (p->exp))
2889 reverse_code = 1;
2890 x = p->exp;
2891 break;
2894 /* If this non-trapping address, e.g. fp + constant, the
2895 equivalent is a better operand since it may let us predict
2896 the value of the comparison. */
2897 else if (!rtx_addr_can_trap_p (p->exp))
2899 arg1 = p->exp;
2900 continue;
2904 /* If we didn't find a useful equivalence for ARG1, we are done.
2905 Otherwise, set up for the next iteration. */
2906 if (x == 0)
2907 break;
2909 /* If we need to reverse the comparison, make sure that that is
2910 possible -- we can't necessarily infer the value of GE from LT
2911 with floating-point operands. */
2912 if (reverse_code)
2914 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
2915 if (reversed == UNKNOWN)
2916 break;
2917 else
2918 code = reversed;
2920 else if (COMPARISON_P (x))
2921 code = GET_CODE (x);
2922 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2925 /* Return our results. Return the modes from before fold_rtx
2926 because fold_rtx might produce const_int, and then it's too late. */
2927 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2928 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2930 return code;
2933 /* If X is a nontrivial arithmetic operation on an argument for which
2934 a constant value can be determined, return the result of operating
2935 on that value, as a constant. Otherwise, return X, possibly with
2936 one or more operands changed to a forward-propagated constant.
2938 If X is a register whose contents are known, we do NOT return
2939 those contents here; equiv_constant is called to perform that task.
2940 For SUBREGs and MEMs, we do that both here and in equiv_constant.
2942 INSN is the insn that we may be modifying. If it is 0, make a copy
2943 of X before modifying it. */
2945 static rtx
2946 fold_rtx (rtx x, rtx insn)
2948 enum rtx_code code;
2949 enum machine_mode mode;
2950 const char *fmt;
2951 int i;
2952 rtx new = 0;
2953 int changed = 0;
2955 /* Operands of X. */
2956 rtx folded_arg0;
2957 rtx folded_arg1;
2959 /* Constant equivalents of first three operands of X;
2960 0 when no such equivalent is known. */
2961 rtx const_arg0;
2962 rtx const_arg1;
2963 rtx const_arg2;
2965 /* The mode of the first operand of X. We need this for sign and zero
2966 extends. */
2967 enum machine_mode mode_arg0;
2969 if (x == 0)
2970 return x;
2972 /* Try to perform some initial simplifications on X. */
2973 code = GET_CODE (x);
2974 switch (code)
2976 case MEM:
2977 case SUBREG:
2978 if ((new = equiv_constant (x)) != NULL_RTX)
2979 return new;
2980 return x;
2982 case CONST:
2983 case CONST_INT:
2984 case CONST_DOUBLE:
2985 case CONST_FIXED:
2986 case CONST_VECTOR:
2987 case SYMBOL_REF:
2988 case LABEL_REF:
2989 case REG:
2990 case PC:
2991 /* No use simplifying an EXPR_LIST
2992 since they are used only for lists of args
2993 in a function call's REG_EQUAL note. */
2994 case EXPR_LIST:
2995 return x;
2997 #ifdef HAVE_cc0
2998 case CC0:
2999 return prev_insn_cc0;
3000 #endif
3002 case ASM_OPERANDS:
3003 if (insn)
3005 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3006 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3007 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3009 return x;
3011 #ifdef NO_FUNCTION_CSE
3012 case CALL:
3013 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3014 return x;
3015 break;
3016 #endif
3018 /* Anything else goes through the loop below. */
3019 default:
3020 break;
3023 mode = GET_MODE (x);
3024 const_arg0 = 0;
3025 const_arg1 = 0;
3026 const_arg2 = 0;
3027 mode_arg0 = VOIDmode;
3029 /* Try folding our operands.
3030 Then see which ones have constant values known. */
3032 fmt = GET_RTX_FORMAT (code);
3033 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3034 if (fmt[i] == 'e')
3036 rtx folded_arg = XEXP (x, i), const_arg;
3037 enum machine_mode mode_arg = GET_MODE (folded_arg);
3039 switch (GET_CODE (folded_arg))
3041 case MEM:
3042 case REG:
3043 case SUBREG:
3044 const_arg = equiv_constant (folded_arg);
3045 break;
3047 case CONST:
3048 case CONST_INT:
3049 case SYMBOL_REF:
3050 case LABEL_REF:
3051 case CONST_DOUBLE:
3052 case CONST_FIXED:
3053 case CONST_VECTOR:
3054 const_arg = folded_arg;
3055 break;
3057 #ifdef HAVE_cc0
3058 case CC0:
3059 folded_arg = prev_insn_cc0;
3060 mode_arg = prev_insn_cc0_mode;
3061 const_arg = equiv_constant (folded_arg);
3062 break;
3063 #endif
3065 default:
3066 folded_arg = fold_rtx (folded_arg, insn);
3067 const_arg = equiv_constant (folded_arg);
3068 break;
3071 /* For the first three operands, see if the operand
3072 is constant or equivalent to a constant. */
3073 switch (i)
3075 case 0:
3076 folded_arg0 = folded_arg;
3077 const_arg0 = const_arg;
3078 mode_arg0 = mode_arg;
3079 break;
3080 case 1:
3081 folded_arg1 = folded_arg;
3082 const_arg1 = const_arg;
3083 break;
3084 case 2:
3085 const_arg2 = const_arg;
3086 break;
3089 /* Pick the least expensive of the argument and an equivalent constant
3090 argument. */
3091 if (const_arg != 0
3092 && const_arg != folded_arg
3093 && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
3095 /* It's not safe to substitute the operand of a conversion
3096 operator with a constant, as the conversion's identity
3097 depends upon the mode of its operand. This optimization
3098 is handled by the call to simplify_unary_operation. */
3099 && (GET_RTX_CLASS (code) != RTX_UNARY
3100 || GET_MODE (const_arg) == mode_arg0
3101 || (code != ZERO_EXTEND
3102 && code != SIGN_EXTEND
3103 && code != TRUNCATE
3104 && code != FLOAT_TRUNCATE
3105 && code != FLOAT_EXTEND
3106 && code != FLOAT
3107 && code != FIX
3108 && code != UNSIGNED_FLOAT
3109 && code != UNSIGNED_FIX)))
3110 folded_arg = const_arg;
3112 if (folded_arg == XEXP (x, i))
3113 continue;
3115 if (insn == NULL_RTX && !changed)
3116 x = copy_rtx (x);
3117 changed = 1;
3118 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3121 if (changed)
3123 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3124 consistent with the order in X. */
3125 if (canonicalize_change_group (insn, x))
3127 rtx tem;
3128 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3129 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3132 apply_change_group ();
3135 /* If X is an arithmetic operation, see if we can simplify it. */
3137 switch (GET_RTX_CLASS (code))
3139 case RTX_UNARY:
3141 int is_const = 0;
3143 /* We can't simplify extension ops unless we know the
3144 original mode. */
3145 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3146 && mode_arg0 == VOIDmode)
3147 break;
3149 /* If we had a CONST, strip it off and put it back later if we
3150 fold. */
3151 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3152 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3154 new = simplify_unary_operation (code, mode,
3155 const_arg0 ? const_arg0 : folded_arg0,
3156 mode_arg0);
3157 /* NEG of PLUS could be converted into MINUS, but that causes
3158 expressions of the form
3159 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3160 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3161 FIXME: those ports should be fixed. */
3162 if (new != 0 && is_const
3163 && GET_CODE (new) == PLUS
3164 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3165 || GET_CODE (XEXP (new, 0)) == LABEL_REF)
3166 && GET_CODE (XEXP (new, 1)) == CONST_INT)
3167 new = gen_rtx_CONST (mode, new);
3169 break;
3171 case RTX_COMPARE:
3172 case RTX_COMM_COMPARE:
3173 /* See what items are actually being compared and set FOLDED_ARG[01]
3174 to those values and CODE to the actual comparison code. If any are
3175 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3176 do anything if both operands are already known to be constant. */
3178 /* ??? Vector mode comparisons are not supported yet. */
3179 if (VECTOR_MODE_P (mode))
3180 break;
3182 if (const_arg0 == 0 || const_arg1 == 0)
3184 struct table_elt *p0, *p1;
3185 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3186 enum machine_mode mode_arg1;
3188 #ifdef FLOAT_STORE_FLAG_VALUE
3189 if (SCALAR_FLOAT_MODE_P (mode))
3191 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3192 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3193 false_rtx = CONST0_RTX (mode);
3195 #endif
3197 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3198 &mode_arg0, &mode_arg1);
3200 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3201 what kinds of things are being compared, so we can't do
3202 anything with this comparison. */
3204 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3205 break;
3207 const_arg0 = equiv_constant (folded_arg0);
3208 const_arg1 = equiv_constant (folded_arg1);
3210 /* If we do not now have two constants being compared, see
3211 if we can nevertheless deduce some things about the
3212 comparison. */
3213 if (const_arg0 == 0 || const_arg1 == 0)
3215 if (const_arg1 != NULL)
3217 rtx cheapest_simplification;
3218 int cheapest_cost;
3219 rtx simp_result;
3220 struct table_elt *p;
3222 /* See if we can find an equivalent of folded_arg0
3223 that gets us a cheaper expression, possibly a
3224 constant through simplifications. */
3225 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3226 mode_arg0);
3228 if (p != NULL)
3230 cheapest_simplification = x;
3231 cheapest_cost = COST (x);
3233 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3235 int cost;
3237 /* If the entry isn't valid, skip it. */
3238 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3239 continue;
3241 /* Try to simplify using this equivalence. */
3242 simp_result
3243 = simplify_relational_operation (code, mode,
3244 mode_arg0,
3245 p->exp,
3246 const_arg1);
3248 if (simp_result == NULL)
3249 continue;
3251 cost = COST (simp_result);
3252 if (cost < cheapest_cost)
3254 cheapest_cost = cost;
3255 cheapest_simplification = simp_result;
3259 /* If we have a cheaper expression now, use that
3260 and try folding it further, from the top. */
3261 if (cheapest_simplification != x)
3262 return fold_rtx (copy_rtx (cheapest_simplification),
3263 insn);
3267 /* See if the two operands are the same. */
3269 if ((REG_P (folded_arg0)
3270 && REG_P (folded_arg1)
3271 && (REG_QTY (REGNO (folded_arg0))
3272 == REG_QTY (REGNO (folded_arg1))))
3273 || ((p0 = lookup (folded_arg0,
3274 SAFE_HASH (folded_arg0, mode_arg0),
3275 mode_arg0))
3276 && (p1 = lookup (folded_arg1,
3277 SAFE_HASH (folded_arg1, mode_arg0),
3278 mode_arg0))
3279 && p0->first_same_value == p1->first_same_value))
3280 folded_arg1 = folded_arg0;
3282 /* If FOLDED_ARG0 is a register, see if the comparison we are
3283 doing now is either the same as we did before or the reverse
3284 (we only check the reverse if not floating-point). */
3285 else if (REG_P (folded_arg0))
3287 int qty = REG_QTY (REGNO (folded_arg0));
3289 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3291 struct qty_table_elem *ent = &qty_table[qty];
3293 if ((comparison_dominates_p (ent->comparison_code, code)
3294 || (! FLOAT_MODE_P (mode_arg0)
3295 && comparison_dominates_p (ent->comparison_code,
3296 reverse_condition (code))))
3297 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3298 || (const_arg1
3299 && rtx_equal_p (ent->comparison_const,
3300 const_arg1))
3301 || (REG_P (folded_arg1)
3302 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3303 return (comparison_dominates_p (ent->comparison_code, code)
3304 ? true_rtx : false_rtx);
3310 /* If we are comparing against zero, see if the first operand is
3311 equivalent to an IOR with a constant. If so, we may be able to
3312 determine the result of this comparison. */
3313 if (const_arg1 == const0_rtx && !const_arg0)
3315 rtx y = lookup_as_function (folded_arg0, IOR);
3316 rtx inner_const;
3318 if (y != 0
3319 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3320 && GET_CODE (inner_const) == CONST_INT
3321 && INTVAL (inner_const) != 0)
3322 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3326 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3327 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3328 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3330 break;
3332 case RTX_BIN_ARITH:
3333 case RTX_COMM_ARITH:
3334 switch (code)
3336 case PLUS:
3337 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3338 with that LABEL_REF as its second operand. If so, the result is
3339 the first operand of that MINUS. This handles switches with an
3340 ADDR_DIFF_VEC table. */
3341 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3343 rtx y
3344 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3345 : lookup_as_function (folded_arg0, MINUS);
3347 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3348 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3349 return XEXP (y, 0);
3351 /* Now try for a CONST of a MINUS like the above. */
3352 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3353 : lookup_as_function (folded_arg0, CONST))) != 0
3354 && GET_CODE (XEXP (y, 0)) == MINUS
3355 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3356 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3357 return XEXP (XEXP (y, 0), 0);
3360 /* Likewise if the operands are in the other order. */
3361 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3363 rtx y
3364 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3365 : lookup_as_function (folded_arg1, MINUS);
3367 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3368 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3369 return XEXP (y, 0);
3371 /* Now try for a CONST of a MINUS like the above. */
3372 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3373 : lookup_as_function (folded_arg1, CONST))) != 0
3374 && GET_CODE (XEXP (y, 0)) == MINUS
3375 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3376 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3377 return XEXP (XEXP (y, 0), 0);
3380 /* If second operand is a register equivalent to a negative
3381 CONST_INT, see if we can find a register equivalent to the
3382 positive constant. Make a MINUS if so. Don't do this for
3383 a non-negative constant since we might then alternate between
3384 choosing positive and negative constants. Having the positive
3385 constant previously-used is the more common case. Be sure
3386 the resulting constant is non-negative; if const_arg1 were
3387 the smallest negative number this would overflow: depending
3388 on the mode, this would either just be the same value (and
3389 hence not save anything) or be incorrect. */
3390 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3391 && INTVAL (const_arg1) < 0
3392 /* This used to test
3394 -INTVAL (const_arg1) >= 0
3396 But The Sun V5.0 compilers mis-compiled that test. So
3397 instead we test for the problematic value in a more direct
3398 manner and hope the Sun compilers get it correct. */
3399 && INTVAL (const_arg1) !=
3400 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3401 && REG_P (folded_arg1))
3403 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3404 struct table_elt *p
3405 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3407 if (p)
3408 for (p = p->first_same_value; p; p = p->next_same_value)
3409 if (REG_P (p->exp))
3410 return simplify_gen_binary (MINUS, mode, folded_arg0,
3411 canon_reg (p->exp, NULL_RTX));
3413 goto from_plus;
3415 case MINUS:
3416 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3417 If so, produce (PLUS Z C2-C). */
3418 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3420 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3421 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3422 return fold_rtx (plus_constant (copy_rtx (y),
3423 -INTVAL (const_arg1)),
3424 NULL_RTX);
3427 /* Fall through. */
3429 from_plus:
3430 case SMIN: case SMAX: case UMIN: case UMAX:
3431 case IOR: case AND: case XOR:
3432 case MULT:
3433 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3434 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3435 is known to be of similar form, we may be able to replace the
3436 operation with a combined operation. This may eliminate the
3437 intermediate operation if every use is simplified in this way.
3438 Note that the similar optimization done by combine.c only works
3439 if the intermediate operation's result has only one reference. */
3441 if (REG_P (folded_arg0)
3442 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3444 int is_shift
3445 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3446 rtx y, inner_const, new_const;
3447 enum rtx_code associate_code;
3449 if (is_shift
3450 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
3451 || INTVAL (const_arg1) < 0))
3453 if (SHIFT_COUNT_TRUNCATED)
3454 const_arg1 = GEN_INT (INTVAL (const_arg1)
3455 & (GET_MODE_BITSIZE (mode) - 1));
3456 else
3457 break;
3460 y = lookup_as_function (folded_arg0, code);
3461 if (y == 0)
3462 break;
3464 /* If we have compiled a statement like
3465 "if (x == (x & mask1))", and now are looking at
3466 "x & mask2", we will have a case where the first operand
3467 of Y is the same as our first operand. Unless we detect
3468 this case, an infinite loop will result. */
3469 if (XEXP (y, 0) == folded_arg0)
3470 break;
3472 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3473 if (!inner_const || GET_CODE (inner_const) != CONST_INT)
3474 break;
3476 /* Don't associate these operations if they are a PLUS with the
3477 same constant and it is a power of two. These might be doable
3478 with a pre- or post-increment. Similarly for two subtracts of
3479 identical powers of two with post decrement. */
3481 if (code == PLUS && const_arg1 == inner_const
3482 && ((HAVE_PRE_INCREMENT
3483 && exact_log2 (INTVAL (const_arg1)) >= 0)
3484 || (HAVE_POST_INCREMENT
3485 && exact_log2 (INTVAL (const_arg1)) >= 0)
3486 || (HAVE_PRE_DECREMENT
3487 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3488 || (HAVE_POST_DECREMENT
3489 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3490 break;
3492 if (is_shift
3493 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
3494 || INTVAL (inner_const) < 0))
3496 if (SHIFT_COUNT_TRUNCATED)
3497 inner_const = GEN_INT (INTVAL (inner_const)
3498 & (GET_MODE_BITSIZE (mode) - 1));
3499 else
3500 break;
3503 /* Compute the code used to compose the constants. For example,
3504 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3506 associate_code = (is_shift || code == MINUS ? PLUS : code);
3508 new_const = simplify_binary_operation (associate_code, mode,
3509 const_arg1, inner_const);
3511 if (new_const == 0)
3512 break;
3514 /* If we are associating shift operations, don't let this
3515 produce a shift of the size of the object or larger.
3516 This could occur when we follow a sign-extend by a right
3517 shift on a machine that does a sign-extend as a pair
3518 of shifts. */
3520 if (is_shift
3521 && GET_CODE (new_const) == CONST_INT
3522 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3524 /* As an exception, we can turn an ASHIFTRT of this
3525 form into a shift of the number of bits - 1. */
3526 if (code == ASHIFTRT)
3527 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3528 else if (!side_effects_p (XEXP (y, 0)))
3529 return CONST0_RTX (mode);
3530 else
3531 break;
3534 y = copy_rtx (XEXP (y, 0));
3536 /* If Y contains our first operand (the most common way this
3537 can happen is if Y is a MEM), we would do into an infinite
3538 loop if we tried to fold it. So don't in that case. */
3540 if (! reg_mentioned_p (folded_arg0, y))
3541 y = fold_rtx (y, insn);
3543 return simplify_gen_binary (code, mode, y, new_const);
3545 break;
3547 case DIV: case UDIV:
3548 /* ??? The associative optimization performed immediately above is
3549 also possible for DIV and UDIV using associate_code of MULT.
3550 However, we would need extra code to verify that the
3551 multiplication does not overflow, that is, there is no overflow
3552 in the calculation of new_const. */
3553 break;
3555 default:
3556 break;
3559 new = simplify_binary_operation (code, mode,
3560 const_arg0 ? const_arg0 : folded_arg0,
3561 const_arg1 ? const_arg1 : folded_arg1);
3562 break;
3564 case RTX_OBJ:
3565 /* (lo_sum (high X) X) is simply X. */
3566 if (code == LO_SUM && const_arg0 != 0
3567 && GET_CODE (const_arg0) == HIGH
3568 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3569 return const_arg1;
3570 break;
3572 case RTX_TERNARY:
3573 case RTX_BITFIELD_OPS:
3574 new = simplify_ternary_operation (code, mode, mode_arg0,
3575 const_arg0 ? const_arg0 : folded_arg0,
3576 const_arg1 ? const_arg1 : folded_arg1,
3577 const_arg2 ? const_arg2 : XEXP (x, 2));
3578 break;
3580 default:
3581 break;
3584 return new ? new : x;
3587 /* Return a constant value currently equivalent to X.
3588 Return 0 if we don't know one. */
3590 static rtx
3591 equiv_constant (rtx x)
3593 if (REG_P (x)
3594 && REGNO_QTY_VALID_P (REGNO (x)))
3596 int x_q = REG_QTY (REGNO (x));
3597 struct qty_table_elem *x_ent = &qty_table[x_q];
3599 if (x_ent->const_rtx)
3600 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3603 if (x == 0 || CONSTANT_P (x))
3604 return x;
3606 if (GET_CODE (x) == SUBREG)
3608 rtx new;
3610 /* See if we previously assigned a constant value to this SUBREG. */
3611 if ((new = lookup_as_function (x, CONST_INT)) != 0
3612 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0
3613 || (new = lookup_as_function (x, CONST_FIXED)) != 0)
3614 return new;
3616 if (REG_P (SUBREG_REG (x))
3617 && (new = equiv_constant (SUBREG_REG (x))) != 0)
3618 return simplify_subreg (GET_MODE (x), SUBREG_REG (x),
3619 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3621 return 0;
3624 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3625 the hash table in case its value was seen before. */
3627 if (MEM_P (x))
3629 struct table_elt *elt;
3631 x = avoid_constant_pool_reference (x);
3632 if (CONSTANT_P (x))
3633 return x;
3635 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3636 if (elt == 0)
3637 return 0;
3639 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3640 if (elt->is_const && CONSTANT_P (elt->exp))
3641 return elt->exp;
3644 return 0;
3647 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3648 "taken" branch.
3650 In certain cases, this can cause us to add an equivalence. For example,
3651 if we are following the taken case of
3652 if (i == 2)
3653 we can add the fact that `i' and '2' are now equivalent.
3655 In any case, we can record that this comparison was passed. If the same
3656 comparison is seen later, we will know its value. */
3658 static void
3659 record_jump_equiv (rtx insn, bool taken)
3661 int cond_known_true;
3662 rtx op0, op1;
3663 rtx set;
3664 enum machine_mode mode, mode0, mode1;
3665 int reversed_nonequality = 0;
3666 enum rtx_code code;
3668 /* Ensure this is the right kind of insn. */
3669 gcc_assert (any_condjump_p (insn));
3671 set = pc_set (insn);
3673 /* See if this jump condition is known true or false. */
3674 if (taken)
3675 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3676 else
3677 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3679 /* Get the type of comparison being done and the operands being compared.
3680 If we had to reverse a non-equality condition, record that fact so we
3681 know that it isn't valid for floating-point. */
3682 code = GET_CODE (XEXP (SET_SRC (set), 0));
3683 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3684 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3686 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3687 if (! cond_known_true)
3689 code = reversed_comparison_code_parts (code, op0, op1, insn);
3691 /* Don't remember if we can't find the inverse. */
3692 if (code == UNKNOWN)
3693 return;
3696 /* The mode is the mode of the non-constant. */
3697 mode = mode0;
3698 if (mode1 != VOIDmode)
3699 mode = mode1;
3701 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3704 /* Yet another form of subreg creation. In this case, we want something in
3705 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3707 static rtx
3708 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3710 enum machine_mode op_mode = GET_MODE (op);
3711 if (op_mode == mode || op_mode == VOIDmode)
3712 return op;
3713 return lowpart_subreg (mode, op, op_mode);
3716 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3717 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3718 Make any useful entries we can with that information. Called from
3719 above function and called recursively. */
3721 static void
3722 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3723 rtx op1, int reversed_nonequality)
3725 unsigned op0_hash, op1_hash;
3726 int op0_in_memory, op1_in_memory;
3727 struct table_elt *op0_elt, *op1_elt;
3729 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3730 we know that they are also equal in the smaller mode (this is also
3731 true for all smaller modes whether or not there is a SUBREG, but
3732 is not worth testing for with no SUBREG). */
3734 /* Note that GET_MODE (op0) may not equal MODE. */
3735 if (code == EQ && GET_CODE (op0) == SUBREG
3736 && (GET_MODE_SIZE (GET_MODE (op0))
3737 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3739 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3740 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3741 if (tem)
3742 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3743 reversed_nonequality);
3746 if (code == EQ && GET_CODE (op1) == SUBREG
3747 && (GET_MODE_SIZE (GET_MODE (op1))
3748 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3750 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3751 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3752 if (tem)
3753 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3754 reversed_nonequality);
3757 /* Similarly, if this is an NE comparison, and either is a SUBREG
3758 making a smaller mode, we know the whole thing is also NE. */
3760 /* Note that GET_MODE (op0) may not equal MODE;
3761 if we test MODE instead, we can get an infinite recursion
3762 alternating between two modes each wider than MODE. */
3764 if (code == NE && GET_CODE (op0) == SUBREG
3765 && subreg_lowpart_p (op0)
3766 && (GET_MODE_SIZE (GET_MODE (op0))
3767 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3769 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3770 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3771 if (tem)
3772 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3773 reversed_nonequality);
3776 if (code == NE && GET_CODE (op1) == SUBREG
3777 && subreg_lowpart_p (op1)
3778 && (GET_MODE_SIZE (GET_MODE (op1))
3779 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3781 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3782 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3783 if (tem)
3784 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3785 reversed_nonequality);
3788 /* Hash both operands. */
3790 do_not_record = 0;
3791 hash_arg_in_memory = 0;
3792 op0_hash = HASH (op0, mode);
3793 op0_in_memory = hash_arg_in_memory;
3795 if (do_not_record)
3796 return;
3798 do_not_record = 0;
3799 hash_arg_in_memory = 0;
3800 op1_hash = HASH (op1, mode);
3801 op1_in_memory = hash_arg_in_memory;
3803 if (do_not_record)
3804 return;
3806 /* Look up both operands. */
3807 op0_elt = lookup (op0, op0_hash, mode);
3808 op1_elt = lookup (op1, op1_hash, mode);
3810 /* If both operands are already equivalent or if they are not in the
3811 table but are identical, do nothing. */
3812 if ((op0_elt != 0 && op1_elt != 0
3813 && op0_elt->first_same_value == op1_elt->first_same_value)
3814 || op0 == op1 || rtx_equal_p (op0, op1))
3815 return;
3817 /* If we aren't setting two things equal all we can do is save this
3818 comparison. Similarly if this is floating-point. In the latter
3819 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3820 If we record the equality, we might inadvertently delete code
3821 whose intent was to change -0 to +0. */
3823 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
3825 struct qty_table_elem *ent;
3826 int qty;
3828 /* If we reversed a floating-point comparison, if OP0 is not a
3829 register, or if OP1 is neither a register or constant, we can't
3830 do anything. */
3832 if (!REG_P (op1))
3833 op1 = equiv_constant (op1);
3835 if ((reversed_nonequality && FLOAT_MODE_P (mode))
3836 || !REG_P (op0) || op1 == 0)
3837 return;
3839 /* Put OP0 in the hash table if it isn't already. This gives it a
3840 new quantity number. */
3841 if (op0_elt == 0)
3843 if (insert_regs (op0, NULL, 0))
3845 rehash_using_reg (op0);
3846 op0_hash = HASH (op0, mode);
3848 /* If OP0 is contained in OP1, this changes its hash code
3849 as well. Faster to rehash than to check, except
3850 for the simple case of a constant. */
3851 if (! CONSTANT_P (op1))
3852 op1_hash = HASH (op1,mode);
3855 op0_elt = insert (op0, NULL, op0_hash, mode);
3856 op0_elt->in_memory = op0_in_memory;
3859 qty = REG_QTY (REGNO (op0));
3860 ent = &qty_table[qty];
3862 ent->comparison_code = code;
3863 if (REG_P (op1))
3865 /* Look it up again--in case op0 and op1 are the same. */
3866 op1_elt = lookup (op1, op1_hash, mode);
3868 /* Put OP1 in the hash table so it gets a new quantity number. */
3869 if (op1_elt == 0)
3871 if (insert_regs (op1, NULL, 0))
3873 rehash_using_reg (op1);
3874 op1_hash = HASH (op1, mode);
3877 op1_elt = insert (op1, NULL, op1_hash, mode);
3878 op1_elt->in_memory = op1_in_memory;
3881 ent->comparison_const = NULL_RTX;
3882 ent->comparison_qty = REG_QTY (REGNO (op1));
3884 else
3886 ent->comparison_const = op1;
3887 ent->comparison_qty = -1;
3890 return;
3893 /* If either side is still missing an equivalence, make it now,
3894 then merge the equivalences. */
3896 if (op0_elt == 0)
3898 if (insert_regs (op0, NULL, 0))
3900 rehash_using_reg (op0);
3901 op0_hash = HASH (op0, mode);
3904 op0_elt = insert (op0, NULL, op0_hash, mode);
3905 op0_elt->in_memory = op0_in_memory;
3908 if (op1_elt == 0)
3910 if (insert_regs (op1, NULL, 0))
3912 rehash_using_reg (op1);
3913 op1_hash = HASH (op1, mode);
3916 op1_elt = insert (op1, NULL, op1_hash, mode);
3917 op1_elt->in_memory = op1_in_memory;
3920 merge_equiv_classes (op0_elt, op1_elt);
3923 /* CSE processing for one instruction.
3924 First simplify sources and addresses of all assignments
3925 in the instruction, using previously-computed equivalents values.
3926 Then install the new sources and destinations in the table
3927 of available values.
3929 If LIBCALL_INSN is nonzero, don't record any equivalence made in
3930 the insn. It means that INSN is inside libcall block. In this
3931 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
3933 /* Data on one SET contained in the instruction. */
3935 struct set
3937 /* The SET rtx itself. */
3938 rtx rtl;
3939 /* The SET_SRC of the rtx (the original value, if it is changing). */
3940 rtx src;
3941 /* The hash-table element for the SET_SRC of the SET. */
3942 struct table_elt *src_elt;
3943 /* Hash value for the SET_SRC. */
3944 unsigned src_hash;
3945 /* Hash value for the SET_DEST. */
3946 unsigned dest_hash;
3947 /* The SET_DEST, with SUBREG, etc., stripped. */
3948 rtx inner_dest;
3949 /* Nonzero if the SET_SRC is in memory. */
3950 char src_in_memory;
3951 /* Nonzero if the SET_SRC contains something
3952 whose value cannot be predicted and understood. */
3953 char src_volatile;
3954 /* Original machine mode, in case it becomes a CONST_INT.
3955 The size of this field should match the size of the mode
3956 field of struct rtx_def (see rtl.h). */
3957 ENUM_BITFIELD(machine_mode) mode : 8;
3958 /* A constant equivalent for SET_SRC, if any. */
3959 rtx src_const;
3960 /* Original SET_SRC value used for libcall notes. */
3961 rtx orig_src;
3962 /* Hash value of constant equivalent for SET_SRC. */
3963 unsigned src_const_hash;
3964 /* Table entry for constant equivalent for SET_SRC, if any. */
3965 struct table_elt *src_const_elt;
3966 /* Table entry for the destination address. */
3967 struct table_elt *dest_addr_elt;
3970 static void
3971 cse_insn (rtx insn, rtx libcall_insn)
3973 rtx x = PATTERN (insn);
3974 int i;
3975 rtx tem;
3976 int n_sets = 0;
3978 rtx src_eqv = 0;
3979 struct table_elt *src_eqv_elt = 0;
3980 int src_eqv_volatile = 0;
3981 int src_eqv_in_memory = 0;
3982 unsigned src_eqv_hash = 0;
3984 struct set *sets = (struct set *) 0;
3986 this_insn = insn;
3987 #ifdef HAVE_cc0
3988 /* Records what this insn does to set CC0. */
3989 this_insn_cc0 = 0;
3990 this_insn_cc0_mode = VOIDmode;
3991 #endif
3993 /* Find all the SETs and CLOBBERs in this instruction.
3994 Record all the SETs in the array `set' and count them.
3995 Also determine whether there is a CLOBBER that invalidates
3996 all memory references, or all references at varying addresses. */
3998 if (CALL_P (insn))
4000 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4002 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4003 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4004 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4008 if (GET_CODE (x) == SET)
4010 sets = alloca (sizeof (struct set));
4011 sets[0].rtl = x;
4013 /* Ignore SETs that are unconditional jumps.
4014 They never need cse processing, so this does not hurt.
4015 The reason is not efficiency but rather
4016 so that we can test at the end for instructions
4017 that have been simplified to unconditional jumps
4018 and not be misled by unchanged instructions
4019 that were unconditional jumps to begin with. */
4020 if (SET_DEST (x) == pc_rtx
4021 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4024 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4025 The hard function value register is used only once, to copy to
4026 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4027 Ensure we invalidate the destination register. On the 80386 no
4028 other code would invalidate it since it is a fixed_reg.
4029 We need not check the return of apply_change_group; see canon_reg. */
4031 else if (GET_CODE (SET_SRC (x)) == CALL)
4033 canon_reg (SET_SRC (x), insn);
4034 apply_change_group ();
4035 fold_rtx (SET_SRC (x), insn);
4036 invalidate (SET_DEST (x), VOIDmode);
4038 else
4039 n_sets = 1;
4041 else if (GET_CODE (x) == PARALLEL)
4043 int lim = XVECLEN (x, 0);
4045 sets = alloca (lim * sizeof (struct set));
4047 /* Find all regs explicitly clobbered in this insn,
4048 and ensure they are not replaced with any other regs
4049 elsewhere in this insn.
4050 When a reg that is clobbered is also used for input,
4051 we should presume that that is for a reason,
4052 and we should not substitute some other register
4053 which is not supposed to be clobbered.
4054 Therefore, this loop cannot be merged into the one below
4055 because a CALL may precede a CLOBBER and refer to the
4056 value clobbered. We must not let a canonicalization do
4057 anything in that case. */
4058 for (i = 0; i < lim; i++)
4060 rtx y = XVECEXP (x, 0, i);
4061 if (GET_CODE (y) == CLOBBER)
4063 rtx clobbered = XEXP (y, 0);
4065 if (REG_P (clobbered)
4066 || GET_CODE (clobbered) == SUBREG)
4067 invalidate (clobbered, VOIDmode);
4068 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4069 || GET_CODE (clobbered) == ZERO_EXTRACT)
4070 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4074 for (i = 0; i < lim; i++)
4076 rtx y = XVECEXP (x, 0, i);
4077 if (GET_CODE (y) == SET)
4079 /* As above, we ignore unconditional jumps and call-insns and
4080 ignore the result of apply_change_group. */
4081 if (GET_CODE (SET_SRC (y)) == CALL)
4083 canon_reg (SET_SRC (y), insn);
4084 apply_change_group ();
4085 fold_rtx (SET_SRC (y), insn);
4086 invalidate (SET_DEST (y), VOIDmode);
4088 else if (SET_DEST (y) == pc_rtx
4089 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4091 else
4092 sets[n_sets++].rtl = y;
4094 else if (GET_CODE (y) == CLOBBER)
4096 /* If we clobber memory, canon the address.
4097 This does nothing when a register is clobbered
4098 because we have already invalidated the reg. */
4099 if (MEM_P (XEXP (y, 0)))
4100 canon_reg (XEXP (y, 0), insn);
4102 else if (GET_CODE (y) == USE
4103 && ! (REG_P (XEXP (y, 0))
4104 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4105 canon_reg (y, insn);
4106 else if (GET_CODE (y) == CALL)
4108 /* The result of apply_change_group can be ignored; see
4109 canon_reg. */
4110 canon_reg (y, insn);
4111 apply_change_group ();
4112 fold_rtx (y, insn);
4116 else if (GET_CODE (x) == CLOBBER)
4118 if (MEM_P (XEXP (x, 0)))
4119 canon_reg (XEXP (x, 0), insn);
4122 /* Canonicalize a USE of a pseudo register or memory location. */
4123 else if (GET_CODE (x) == USE
4124 && ! (REG_P (XEXP (x, 0))
4125 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4126 canon_reg (XEXP (x, 0), insn);
4127 else if (GET_CODE (x) == CALL)
4129 /* The result of apply_change_group can be ignored; see canon_reg. */
4130 canon_reg (x, insn);
4131 apply_change_group ();
4132 fold_rtx (x, insn);
4135 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4136 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4137 is handled specially for this case, and if it isn't set, then there will
4138 be no equivalence for the destination. */
4139 if (n_sets == 1 && REG_NOTES (insn) != 0
4140 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4141 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4142 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4144 /* The result of apply_change_group can be ignored; see canon_reg. */
4145 canon_reg (XEXP (tem, 0), insn);
4146 apply_change_group ();
4147 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4148 XEXP (tem, 0) = copy_rtx (src_eqv);
4149 df_notes_rescan (insn);
4152 /* Canonicalize sources and addresses of destinations.
4153 We do this in a separate pass to avoid problems when a MATCH_DUP is
4154 present in the insn pattern. In that case, we want to ensure that
4155 we don't break the duplicate nature of the pattern. So we will replace
4156 both operands at the same time. Otherwise, we would fail to find an
4157 equivalent substitution in the loop calling validate_change below.
4159 We used to suppress canonicalization of DEST if it appears in SRC,
4160 but we don't do this any more. */
4162 for (i = 0; i < n_sets; i++)
4164 rtx dest = SET_DEST (sets[i].rtl);
4165 rtx src = SET_SRC (sets[i].rtl);
4166 rtx new = canon_reg (src, insn);
4168 sets[i].orig_src = src;
4169 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4171 if (GET_CODE (dest) == ZERO_EXTRACT)
4173 validate_change (insn, &XEXP (dest, 1),
4174 canon_reg (XEXP (dest, 1), insn), 1);
4175 validate_change (insn, &XEXP (dest, 2),
4176 canon_reg (XEXP (dest, 2), insn), 1);
4179 while (GET_CODE (dest) == SUBREG
4180 || GET_CODE (dest) == ZERO_EXTRACT
4181 || GET_CODE (dest) == STRICT_LOW_PART)
4182 dest = XEXP (dest, 0);
4184 if (MEM_P (dest))
4185 canon_reg (dest, insn);
4188 /* Now that we have done all the replacements, we can apply the change
4189 group and see if they all work. Note that this will cause some
4190 canonicalizations that would have worked individually not to be applied
4191 because some other canonicalization didn't work, but this should not
4192 occur often.
4194 The result of apply_change_group can be ignored; see canon_reg. */
4196 apply_change_group ();
4198 /* Set sets[i].src_elt to the class each source belongs to.
4199 Detect assignments from or to volatile things
4200 and set set[i] to zero so they will be ignored
4201 in the rest of this function.
4203 Nothing in this loop changes the hash table or the register chains. */
4205 for (i = 0; i < n_sets; i++)
4207 rtx src, dest;
4208 rtx src_folded;
4209 struct table_elt *elt = 0, *p;
4210 enum machine_mode mode;
4211 rtx src_eqv_here;
4212 rtx src_const = 0;
4213 rtx src_related = 0;
4214 struct table_elt *src_const_elt = 0;
4215 int src_cost = MAX_COST;
4216 int src_eqv_cost = MAX_COST;
4217 int src_folded_cost = MAX_COST;
4218 int src_related_cost = MAX_COST;
4219 int src_elt_cost = MAX_COST;
4220 int src_regcost = MAX_COST;
4221 int src_eqv_regcost = MAX_COST;
4222 int src_folded_regcost = MAX_COST;
4223 int src_related_regcost = MAX_COST;
4224 int src_elt_regcost = MAX_COST;
4225 /* Set nonzero if we need to call force_const_mem on with the
4226 contents of src_folded before using it. */
4227 int src_folded_force_flag = 0;
4229 dest = SET_DEST (sets[i].rtl);
4230 src = SET_SRC (sets[i].rtl);
4232 /* If SRC is a constant that has no machine mode,
4233 hash it with the destination's machine mode.
4234 This way we can keep different modes separate. */
4236 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4237 sets[i].mode = mode;
4239 if (src_eqv)
4241 enum machine_mode eqvmode = mode;
4242 if (GET_CODE (dest) == STRICT_LOW_PART)
4243 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4244 do_not_record = 0;
4245 hash_arg_in_memory = 0;
4246 src_eqv_hash = HASH (src_eqv, eqvmode);
4248 /* Find the equivalence class for the equivalent expression. */
4250 if (!do_not_record)
4251 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4253 src_eqv_volatile = do_not_record;
4254 src_eqv_in_memory = hash_arg_in_memory;
4257 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4258 value of the INNER register, not the destination. So it is not
4259 a valid substitution for the source. But save it for later. */
4260 if (GET_CODE (dest) == STRICT_LOW_PART)
4261 src_eqv_here = 0;
4262 else
4263 src_eqv_here = src_eqv;
4265 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4266 simplified result, which may not necessarily be valid. */
4267 src_folded = fold_rtx (src, insn);
4269 #if 0
4270 /* ??? This caused bad code to be generated for the m68k port with -O2.
4271 Suppose src is (CONST_INT -1), and that after truncation src_folded
4272 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4273 At the end we will add src and src_const to the same equivalence
4274 class. We now have 3 and -1 on the same equivalence class. This
4275 causes later instructions to be mis-optimized. */
4276 /* If storing a constant in a bitfield, pre-truncate the constant
4277 so we will be able to record it later. */
4278 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4280 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4282 if (GET_CODE (src) == CONST_INT
4283 && GET_CODE (width) == CONST_INT
4284 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4285 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4286 src_folded
4287 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4288 << INTVAL (width)) - 1));
4290 #endif
4292 /* Compute SRC's hash code, and also notice if it
4293 should not be recorded at all. In that case,
4294 prevent any further processing of this assignment. */
4295 do_not_record = 0;
4296 hash_arg_in_memory = 0;
4298 sets[i].src = src;
4299 sets[i].src_hash = HASH (src, mode);
4300 sets[i].src_volatile = do_not_record;
4301 sets[i].src_in_memory = hash_arg_in_memory;
4303 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4304 a pseudo, do not record SRC. Using SRC as a replacement for
4305 anything else will be incorrect in that situation. Note that
4306 this usually occurs only for stack slots, in which case all the
4307 RTL would be referring to SRC, so we don't lose any optimization
4308 opportunities by not having SRC in the hash table. */
4310 if (MEM_P (src)
4311 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4312 && REG_P (dest)
4313 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4314 sets[i].src_volatile = 1;
4316 #if 0
4317 /* It is no longer clear why we used to do this, but it doesn't
4318 appear to still be needed. So let's try without it since this
4319 code hurts cse'ing widened ops. */
4320 /* If source is a paradoxical subreg (such as QI treated as an SI),
4321 treat it as volatile. It may do the work of an SI in one context
4322 where the extra bits are not being used, but cannot replace an SI
4323 in general. */
4324 if (GET_CODE (src) == SUBREG
4325 && (GET_MODE_SIZE (GET_MODE (src))
4326 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4327 sets[i].src_volatile = 1;
4328 #endif
4330 /* Locate all possible equivalent forms for SRC. Try to replace
4331 SRC in the insn with each cheaper equivalent.
4333 We have the following types of equivalents: SRC itself, a folded
4334 version, a value given in a REG_EQUAL note, or a value related
4335 to a constant.
4337 Each of these equivalents may be part of an additional class
4338 of equivalents (if more than one is in the table, they must be in
4339 the same class; we check for this).
4341 If the source is volatile, we don't do any table lookups.
4343 We note any constant equivalent for possible later use in a
4344 REG_NOTE. */
4346 if (!sets[i].src_volatile)
4347 elt = lookup (src, sets[i].src_hash, mode);
4349 sets[i].src_elt = elt;
4351 if (elt && src_eqv_here && src_eqv_elt)
4353 if (elt->first_same_value != src_eqv_elt->first_same_value)
4355 /* The REG_EQUAL is indicating that two formerly distinct
4356 classes are now equivalent. So merge them. */
4357 merge_equiv_classes (elt, src_eqv_elt);
4358 src_eqv_hash = HASH (src_eqv, elt->mode);
4359 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4362 src_eqv_here = 0;
4365 else if (src_eqv_elt)
4366 elt = src_eqv_elt;
4368 /* Try to find a constant somewhere and record it in `src_const'.
4369 Record its table element, if any, in `src_const_elt'. Look in
4370 any known equivalences first. (If the constant is not in the
4371 table, also set `sets[i].src_const_hash'). */
4372 if (elt)
4373 for (p = elt->first_same_value; p; p = p->next_same_value)
4374 if (p->is_const)
4376 src_const = p->exp;
4377 src_const_elt = elt;
4378 break;
4381 if (src_const == 0
4382 && (CONSTANT_P (src_folded)
4383 /* Consider (minus (label_ref L1) (label_ref L2)) as
4384 "constant" here so we will record it. This allows us
4385 to fold switch statements when an ADDR_DIFF_VEC is used. */
4386 || (GET_CODE (src_folded) == MINUS
4387 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4388 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4389 src_const = src_folded, src_const_elt = elt;
4390 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4391 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4393 /* If we don't know if the constant is in the table, get its
4394 hash code and look it up. */
4395 if (src_const && src_const_elt == 0)
4397 sets[i].src_const_hash = HASH (src_const, mode);
4398 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4401 sets[i].src_const = src_const;
4402 sets[i].src_const_elt = src_const_elt;
4404 /* If the constant and our source are both in the table, mark them as
4405 equivalent. Otherwise, if a constant is in the table but the source
4406 isn't, set ELT to it. */
4407 if (src_const_elt && elt
4408 && src_const_elt->first_same_value != elt->first_same_value)
4409 merge_equiv_classes (elt, src_const_elt);
4410 else if (src_const_elt && elt == 0)
4411 elt = src_const_elt;
4413 /* See if there is a register linearly related to a constant
4414 equivalent of SRC. */
4415 if (src_const
4416 && (GET_CODE (src_const) == CONST
4417 || (src_const_elt && src_const_elt->related_value != 0)))
4419 src_related = use_related_value (src_const, src_const_elt);
4420 if (src_related)
4422 struct table_elt *src_related_elt
4423 = lookup (src_related, HASH (src_related, mode), mode);
4424 if (src_related_elt && elt)
4426 if (elt->first_same_value
4427 != src_related_elt->first_same_value)
4428 /* This can occur when we previously saw a CONST
4429 involving a SYMBOL_REF and then see the SYMBOL_REF
4430 twice. Merge the involved classes. */
4431 merge_equiv_classes (elt, src_related_elt);
4433 src_related = 0;
4434 src_related_elt = 0;
4436 else if (src_related_elt && elt == 0)
4437 elt = src_related_elt;
4441 /* See if we have a CONST_INT that is already in a register in a
4442 wider mode. */
4444 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4445 && GET_MODE_CLASS (mode) == MODE_INT
4446 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4448 enum machine_mode wider_mode;
4450 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4451 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4452 && src_related == 0;
4453 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4455 struct table_elt *const_elt
4456 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4458 if (const_elt == 0)
4459 continue;
4461 for (const_elt = const_elt->first_same_value;
4462 const_elt; const_elt = const_elt->next_same_value)
4463 if (REG_P (const_elt->exp))
4465 src_related = gen_lowpart (mode, const_elt->exp);
4466 break;
4471 /* Another possibility is that we have an AND with a constant in
4472 a mode narrower than a word. If so, it might have been generated
4473 as part of an "if" which would narrow the AND. If we already
4474 have done the AND in a wider mode, we can use a SUBREG of that
4475 value. */
4477 if (flag_expensive_optimizations && ! src_related
4478 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4479 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4481 enum machine_mode tmode;
4482 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4484 for (tmode = GET_MODE_WIDER_MODE (mode);
4485 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4486 tmode = GET_MODE_WIDER_MODE (tmode))
4488 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4489 struct table_elt *larger_elt;
4491 if (inner)
4493 PUT_MODE (new_and, tmode);
4494 XEXP (new_and, 0) = inner;
4495 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4496 if (larger_elt == 0)
4497 continue;
4499 for (larger_elt = larger_elt->first_same_value;
4500 larger_elt; larger_elt = larger_elt->next_same_value)
4501 if (REG_P (larger_elt->exp))
4503 src_related
4504 = gen_lowpart (mode, larger_elt->exp);
4505 break;
4508 if (src_related)
4509 break;
4514 #ifdef LOAD_EXTEND_OP
4515 /* See if a MEM has already been loaded with a widening operation;
4516 if it has, we can use a subreg of that. Many CISC machines
4517 also have such operations, but this is only likely to be
4518 beneficial on these machines. */
4520 if (flag_expensive_optimizations && src_related == 0
4521 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4522 && GET_MODE_CLASS (mode) == MODE_INT
4523 && MEM_P (src) && ! do_not_record
4524 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4526 struct rtx_def memory_extend_buf;
4527 rtx memory_extend_rtx = &memory_extend_buf;
4528 enum machine_mode tmode;
4530 /* Set what we are trying to extend and the operation it might
4531 have been extended with. */
4532 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4533 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4534 XEXP (memory_extend_rtx, 0) = src;
4536 for (tmode = GET_MODE_WIDER_MODE (mode);
4537 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4538 tmode = GET_MODE_WIDER_MODE (tmode))
4540 struct table_elt *larger_elt;
4542 PUT_MODE (memory_extend_rtx, tmode);
4543 larger_elt = lookup (memory_extend_rtx,
4544 HASH (memory_extend_rtx, tmode), tmode);
4545 if (larger_elt == 0)
4546 continue;
4548 for (larger_elt = larger_elt->first_same_value;
4549 larger_elt; larger_elt = larger_elt->next_same_value)
4550 if (REG_P (larger_elt->exp))
4552 src_related = gen_lowpart (mode, larger_elt->exp);
4553 break;
4556 if (src_related)
4557 break;
4560 #endif /* LOAD_EXTEND_OP */
4562 if (src == src_folded)
4563 src_folded = 0;
4565 /* At this point, ELT, if nonzero, points to a class of expressions
4566 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4567 and SRC_RELATED, if nonzero, each contain additional equivalent
4568 expressions. Prune these latter expressions by deleting expressions
4569 already in the equivalence class.
4571 Check for an equivalent identical to the destination. If found,
4572 this is the preferred equivalent since it will likely lead to
4573 elimination of the insn. Indicate this by placing it in
4574 `src_related'. */
4576 if (elt)
4577 elt = elt->first_same_value;
4578 for (p = elt; p; p = p->next_same_value)
4580 enum rtx_code code = GET_CODE (p->exp);
4582 /* If the expression is not valid, ignore it. Then we do not
4583 have to check for validity below. In most cases, we can use
4584 `rtx_equal_p', since canonicalization has already been done. */
4585 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4586 continue;
4588 /* Also skip paradoxical subregs, unless that's what we're
4589 looking for. */
4590 if (code == SUBREG
4591 && (GET_MODE_SIZE (GET_MODE (p->exp))
4592 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
4593 && ! (src != 0
4594 && GET_CODE (src) == SUBREG
4595 && GET_MODE (src) == GET_MODE (p->exp)
4596 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4597 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4598 continue;
4600 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4601 src = 0;
4602 else if (src_folded && GET_CODE (src_folded) == code
4603 && rtx_equal_p (src_folded, p->exp))
4604 src_folded = 0;
4605 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4606 && rtx_equal_p (src_eqv_here, p->exp))
4607 src_eqv_here = 0;
4608 else if (src_related && GET_CODE (src_related) == code
4609 && rtx_equal_p (src_related, p->exp))
4610 src_related = 0;
4612 /* This is the same as the destination of the insns, we want
4613 to prefer it. Copy it to src_related. The code below will
4614 then give it a negative cost. */
4615 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4616 src_related = dest;
4619 /* Find the cheapest valid equivalent, trying all the available
4620 possibilities. Prefer items not in the hash table to ones
4621 that are when they are equal cost. Note that we can never
4622 worsen an insn as the current contents will also succeed.
4623 If we find an equivalent identical to the destination, use it as best,
4624 since this insn will probably be eliminated in that case. */
4625 if (src)
4627 if (rtx_equal_p (src, dest))
4628 src_cost = src_regcost = -1;
4629 else
4631 src_cost = COST (src);
4632 src_regcost = approx_reg_cost (src);
4636 if (src_eqv_here)
4638 if (rtx_equal_p (src_eqv_here, dest))
4639 src_eqv_cost = src_eqv_regcost = -1;
4640 else
4642 src_eqv_cost = COST (src_eqv_here);
4643 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4647 if (src_folded)
4649 if (rtx_equal_p (src_folded, dest))
4650 src_folded_cost = src_folded_regcost = -1;
4651 else
4653 src_folded_cost = COST (src_folded);
4654 src_folded_regcost = approx_reg_cost (src_folded);
4658 if (src_related)
4660 if (rtx_equal_p (src_related, dest))
4661 src_related_cost = src_related_regcost = -1;
4662 else
4664 src_related_cost = COST (src_related);
4665 src_related_regcost = approx_reg_cost (src_related);
4669 /* If this was an indirect jump insn, a known label will really be
4670 cheaper even though it looks more expensive. */
4671 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4672 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4674 /* Terminate loop when replacement made. This must terminate since
4675 the current contents will be tested and will always be valid. */
4676 while (1)
4678 rtx trial;
4680 /* Skip invalid entries. */
4681 while (elt && !REG_P (elt->exp)
4682 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4683 elt = elt->next_same_value;
4685 /* A paradoxical subreg would be bad here: it'll be the right
4686 size, but later may be adjusted so that the upper bits aren't
4687 what we want. So reject it. */
4688 if (elt != 0
4689 && GET_CODE (elt->exp) == SUBREG
4690 && (GET_MODE_SIZE (GET_MODE (elt->exp))
4691 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
4692 /* It is okay, though, if the rtx we're trying to match
4693 will ignore any of the bits we can't predict. */
4694 && ! (src != 0
4695 && GET_CODE (src) == SUBREG
4696 && GET_MODE (src) == GET_MODE (elt->exp)
4697 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4698 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4700 elt = elt->next_same_value;
4701 continue;
4704 if (elt)
4706 src_elt_cost = elt->cost;
4707 src_elt_regcost = elt->regcost;
4710 /* Find cheapest and skip it for the next time. For items
4711 of equal cost, use this order:
4712 src_folded, src, src_eqv, src_related and hash table entry. */
4713 if (src_folded
4714 && preferable (src_folded_cost, src_folded_regcost,
4715 src_cost, src_regcost) <= 0
4716 && preferable (src_folded_cost, src_folded_regcost,
4717 src_eqv_cost, src_eqv_regcost) <= 0
4718 && preferable (src_folded_cost, src_folded_regcost,
4719 src_related_cost, src_related_regcost) <= 0
4720 && preferable (src_folded_cost, src_folded_regcost,
4721 src_elt_cost, src_elt_regcost) <= 0)
4723 trial = src_folded, src_folded_cost = MAX_COST;
4724 if (src_folded_force_flag)
4726 rtx forced = force_const_mem (mode, trial);
4727 if (forced)
4728 trial = forced;
4731 else if (src
4732 && preferable (src_cost, src_regcost,
4733 src_eqv_cost, src_eqv_regcost) <= 0
4734 && preferable (src_cost, src_regcost,
4735 src_related_cost, src_related_regcost) <= 0
4736 && preferable (src_cost, src_regcost,
4737 src_elt_cost, src_elt_regcost) <= 0)
4738 trial = src, src_cost = MAX_COST;
4739 else if (src_eqv_here
4740 && preferable (src_eqv_cost, src_eqv_regcost,
4741 src_related_cost, src_related_regcost) <= 0
4742 && preferable (src_eqv_cost, src_eqv_regcost,
4743 src_elt_cost, src_elt_regcost) <= 0)
4744 trial = src_eqv_here, src_eqv_cost = MAX_COST;
4745 else if (src_related
4746 && preferable (src_related_cost, src_related_regcost,
4747 src_elt_cost, src_elt_regcost) <= 0)
4748 trial = src_related, src_related_cost = MAX_COST;
4749 else
4751 trial = elt->exp;
4752 elt = elt->next_same_value;
4753 src_elt_cost = MAX_COST;
4756 /* We don't normally have an insn matching (set (pc) (pc)), so
4757 check for this separately here. We will delete such an
4758 insn below.
4760 For other cases such as a table jump or conditional jump
4761 where we know the ultimate target, go ahead and replace the
4762 operand. While that may not make a valid insn, we will
4763 reemit the jump below (and also insert any necessary
4764 barriers). */
4765 if (n_sets == 1 && dest == pc_rtx
4766 && (trial == pc_rtx
4767 || (GET_CODE (trial) == LABEL_REF
4768 && ! condjump_p (insn))))
4770 /* Don't substitute non-local labels, this confuses CFG. */
4771 if (GET_CODE (trial) == LABEL_REF
4772 && LABEL_REF_NONLOCAL_P (trial))
4773 continue;
4775 SET_SRC (sets[i].rtl) = trial;
4776 cse_jumps_altered = true;
4777 break;
4780 /* Reject certain invalid forms of CONST that we create. */
4781 else if (CONSTANT_P (trial)
4782 && GET_CODE (trial) == CONST
4783 /* Reject cases that will cause decode_rtx_const to
4784 die. On the alpha when simplifying a switch, we
4785 get (const (truncate (minus (label_ref)
4786 (label_ref)))). */
4787 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
4788 /* Likewise on IA-64, except without the
4789 truncate. */
4790 || (GET_CODE (XEXP (trial, 0)) == MINUS
4791 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
4792 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
4793 /* Do nothing for this case. */
4796 /* Look for a substitution that makes a valid insn. */
4797 else if (validate_unshare_change
4798 (insn, &SET_SRC (sets[i].rtl), trial, 0))
4800 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
4802 /* If we just made a substitution inside a libcall, then we
4803 need to make the same substitution in any notes attached
4804 to the RETVAL insn. */
4805 if (libcall_insn
4806 && (REG_P (sets[i].orig_src)
4807 || GET_CODE (sets[i].orig_src) == SUBREG
4808 || MEM_P (sets[i].orig_src)))
4810 rtx note = find_reg_equal_equiv_note (libcall_insn);
4811 if (note != 0)
4812 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
4813 sets[i].orig_src,
4814 copy_rtx (new));
4815 df_notes_rescan (libcall_insn);
4818 /* The result of apply_change_group can be ignored; see
4819 canon_reg. */
4821 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4822 apply_change_group ();
4824 break;
4827 /* If we previously found constant pool entries for
4828 constants and this is a constant, try making a
4829 pool entry. Put it in src_folded unless we already have done
4830 this since that is where it likely came from. */
4832 else if (constant_pool_entries_cost
4833 && CONSTANT_P (trial)
4834 && (src_folded == 0
4835 || (!MEM_P (src_folded)
4836 && ! src_folded_force_flag))
4837 && GET_MODE_CLASS (mode) != MODE_CC
4838 && mode != VOIDmode)
4840 src_folded_force_flag = 1;
4841 src_folded = trial;
4842 src_folded_cost = constant_pool_entries_cost;
4843 src_folded_regcost = constant_pool_entries_regcost;
4847 src = SET_SRC (sets[i].rtl);
4849 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
4850 However, there is an important exception: If both are registers
4851 that are not the head of their equivalence class, replace SET_SRC
4852 with the head of the class. If we do not do this, we will have
4853 both registers live over a portion of the basic block. This way,
4854 their lifetimes will likely abut instead of overlapping. */
4855 if (REG_P (dest)
4856 && REGNO_QTY_VALID_P (REGNO (dest)))
4858 int dest_q = REG_QTY (REGNO (dest));
4859 struct qty_table_elem *dest_ent = &qty_table[dest_q];
4861 if (dest_ent->mode == GET_MODE (dest)
4862 && dest_ent->first_reg != REGNO (dest)
4863 && REG_P (src) && REGNO (src) == REGNO (dest)
4864 /* Don't do this if the original insn had a hard reg as
4865 SET_SRC or SET_DEST. */
4866 && (!REG_P (sets[i].src)
4867 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
4868 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
4869 /* We can't call canon_reg here because it won't do anything if
4870 SRC is a hard register. */
4872 int src_q = REG_QTY (REGNO (src));
4873 struct qty_table_elem *src_ent = &qty_table[src_q];
4874 int first = src_ent->first_reg;
4875 rtx new_src
4876 = (first >= FIRST_PSEUDO_REGISTER
4877 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
4879 /* We must use validate-change even for this, because this
4880 might be a special no-op instruction, suitable only to
4881 tag notes onto. */
4882 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
4884 src = new_src;
4885 /* If we had a constant that is cheaper than what we are now
4886 setting SRC to, use that constant. We ignored it when we
4887 thought we could make this into a no-op. */
4888 if (src_const && COST (src_const) < COST (src)
4889 && validate_change (insn, &SET_SRC (sets[i].rtl),
4890 src_const, 0))
4891 src = src_const;
4896 /* If we made a change, recompute SRC values. */
4897 if (src != sets[i].src)
4899 do_not_record = 0;
4900 hash_arg_in_memory = 0;
4901 sets[i].src = src;
4902 sets[i].src_hash = HASH (src, mode);
4903 sets[i].src_volatile = do_not_record;
4904 sets[i].src_in_memory = hash_arg_in_memory;
4905 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
4908 /* If this is a single SET, we are setting a register, and we have an
4909 equivalent constant, we want to add a REG_NOTE. We don't want
4910 to write a REG_EQUAL note for a constant pseudo since verifying that
4911 that pseudo hasn't been eliminated is a pain. Such a note also
4912 won't help anything.
4914 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
4915 which can be created for a reference to a compile time computable
4916 entry in a jump table. */
4918 if (n_sets == 1 && src_const && REG_P (dest)
4919 && !REG_P (src_const)
4920 && ! (GET_CODE (src_const) == CONST
4921 && GET_CODE (XEXP (src_const, 0)) == MINUS
4922 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
4923 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
4925 /* We only want a REG_EQUAL note if src_const != src. */
4926 if (! rtx_equal_p (src, src_const))
4928 /* Make sure that the rtx is not shared. */
4929 src_const = copy_rtx (src_const);
4931 /* Record the actual constant value in a REG_EQUAL note,
4932 making a new one if one does not already exist. */
4933 set_unique_reg_note (insn, REG_EQUAL, src_const);
4934 df_notes_rescan (insn);
4938 /* Now deal with the destination. */
4939 do_not_record = 0;
4941 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
4942 while (GET_CODE (dest) == SUBREG
4943 || GET_CODE (dest) == ZERO_EXTRACT
4944 || GET_CODE (dest) == STRICT_LOW_PART)
4945 dest = XEXP (dest, 0);
4947 sets[i].inner_dest = dest;
4949 if (MEM_P (dest))
4951 #ifdef PUSH_ROUNDING
4952 /* Stack pushes invalidate the stack pointer. */
4953 rtx addr = XEXP (dest, 0);
4954 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
4955 && XEXP (addr, 0) == stack_pointer_rtx)
4956 invalidate (stack_pointer_rtx, VOIDmode);
4957 #endif
4958 dest = fold_rtx (dest, insn);
4961 /* Compute the hash code of the destination now,
4962 before the effects of this instruction are recorded,
4963 since the register values used in the address computation
4964 are those before this instruction. */
4965 sets[i].dest_hash = HASH (dest, mode);
4967 /* Don't enter a bit-field in the hash table
4968 because the value in it after the store
4969 may not equal what was stored, due to truncation. */
4971 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4973 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4975 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
4976 && GET_CODE (width) == CONST_INT
4977 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4978 && ! (INTVAL (src_const)
4979 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4980 /* Exception: if the value is constant,
4981 and it won't be truncated, record it. */
4983 else
4985 /* This is chosen so that the destination will be invalidated
4986 but no new value will be recorded.
4987 We must invalidate because sometimes constant
4988 values can be recorded for bitfields. */
4989 sets[i].src_elt = 0;
4990 sets[i].src_volatile = 1;
4991 src_eqv = 0;
4992 src_eqv_elt = 0;
4996 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
4997 the insn. */
4998 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5000 /* One less use of the label this insn used to jump to. */
5001 delete_insn_and_edges (insn);
5002 cse_jumps_altered = true;
5003 /* No more processing for this set. */
5004 sets[i].rtl = 0;
5007 /* If this SET is now setting PC to a label, we know it used to
5008 be a conditional or computed branch. */
5009 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5010 && !LABEL_REF_NONLOCAL_P (src))
5012 /* We reemit the jump in as many cases as possible just in
5013 case the form of an unconditional jump is significantly
5014 different than a computed jump or conditional jump.
5016 If this insn has multiple sets, then reemitting the
5017 jump is nontrivial. So instead we just force rerecognition
5018 and hope for the best. */
5019 if (n_sets == 1)
5021 rtx new, note;
5023 new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5024 JUMP_LABEL (new) = XEXP (src, 0);
5025 LABEL_NUSES (XEXP (src, 0))++;
5027 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5028 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5029 if (note)
5031 XEXP (note, 1) = NULL_RTX;
5032 REG_NOTES (new) = note;
5035 delete_insn_and_edges (insn);
5036 insn = new;
5038 else
5039 INSN_CODE (insn) = -1;
5041 /* Do not bother deleting any unreachable code, let jump do it. */
5042 cse_jumps_altered = true;
5043 sets[i].rtl = 0;
5046 /* If destination is volatile, invalidate it and then do no further
5047 processing for this assignment. */
5049 else if (do_not_record)
5051 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5052 invalidate (dest, VOIDmode);
5053 else if (MEM_P (dest))
5054 invalidate (dest, VOIDmode);
5055 else if (GET_CODE (dest) == STRICT_LOW_PART
5056 || GET_CODE (dest) == ZERO_EXTRACT)
5057 invalidate (XEXP (dest, 0), GET_MODE (dest));
5058 sets[i].rtl = 0;
5061 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5062 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5064 #ifdef HAVE_cc0
5065 /* If setting CC0, record what it was set to, or a constant, if it
5066 is equivalent to a constant. If it is being set to a floating-point
5067 value, make a COMPARE with the appropriate constant of 0. If we
5068 don't do this, later code can interpret this as a test against
5069 const0_rtx, which can cause problems if we try to put it into an
5070 insn as a floating-point operand. */
5071 if (dest == cc0_rtx)
5073 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5074 this_insn_cc0_mode = mode;
5075 if (FLOAT_MODE_P (mode))
5076 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5077 CONST0_RTX (mode));
5079 #endif
5082 /* Now enter all non-volatile source expressions in the hash table
5083 if they are not already present.
5084 Record their equivalence classes in src_elt.
5085 This way we can insert the corresponding destinations into
5086 the same classes even if the actual sources are no longer in them
5087 (having been invalidated). */
5089 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5090 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5092 struct table_elt *elt;
5093 struct table_elt *classp = sets[0].src_elt;
5094 rtx dest = SET_DEST (sets[0].rtl);
5095 enum machine_mode eqvmode = GET_MODE (dest);
5097 if (GET_CODE (dest) == STRICT_LOW_PART)
5099 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5100 classp = 0;
5102 if (insert_regs (src_eqv, classp, 0))
5104 rehash_using_reg (src_eqv);
5105 src_eqv_hash = HASH (src_eqv, eqvmode);
5107 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5108 elt->in_memory = src_eqv_in_memory;
5109 src_eqv_elt = elt;
5111 /* Check to see if src_eqv_elt is the same as a set source which
5112 does not yet have an elt, and if so set the elt of the set source
5113 to src_eqv_elt. */
5114 for (i = 0; i < n_sets; i++)
5115 if (sets[i].rtl && sets[i].src_elt == 0
5116 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5117 sets[i].src_elt = src_eqv_elt;
5120 for (i = 0; i < n_sets; i++)
5121 if (sets[i].rtl && ! sets[i].src_volatile
5122 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5124 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5126 /* REG_EQUAL in setting a STRICT_LOW_PART
5127 gives an equivalent for the entire destination register,
5128 not just for the subreg being stored in now.
5129 This is a more interesting equivalence, so we arrange later
5130 to treat the entire reg as the destination. */
5131 sets[i].src_elt = src_eqv_elt;
5132 sets[i].src_hash = src_eqv_hash;
5134 else
5136 /* Insert source and constant equivalent into hash table, if not
5137 already present. */
5138 struct table_elt *classp = src_eqv_elt;
5139 rtx src = sets[i].src;
5140 rtx dest = SET_DEST (sets[i].rtl);
5141 enum machine_mode mode
5142 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5144 /* It's possible that we have a source value known to be
5145 constant but don't have a REG_EQUAL note on the insn.
5146 Lack of a note will mean src_eqv_elt will be NULL. This
5147 can happen where we've generated a SUBREG to access a
5148 CONST_INT that is already in a register in a wider mode.
5149 Ensure that the source expression is put in the proper
5150 constant class. */
5151 if (!classp)
5152 classp = sets[i].src_const_elt;
5154 if (sets[i].src_elt == 0)
5156 /* Don't put a hard register source into the table if this is
5157 the last insn of a libcall. In this case, we only need
5158 to put src_eqv_elt in src_elt. */
5159 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5161 struct table_elt *elt;
5163 /* Note that these insert_regs calls cannot remove
5164 any of the src_elt's, because they would have failed to
5165 match if not still valid. */
5166 if (insert_regs (src, classp, 0))
5168 rehash_using_reg (src);
5169 sets[i].src_hash = HASH (src, mode);
5171 elt = insert (src, classp, sets[i].src_hash, mode);
5172 elt->in_memory = sets[i].src_in_memory;
5173 sets[i].src_elt = classp = elt;
5175 else
5176 sets[i].src_elt = classp;
5178 if (sets[i].src_const && sets[i].src_const_elt == 0
5179 && src != sets[i].src_const
5180 && ! rtx_equal_p (sets[i].src_const, src))
5181 sets[i].src_elt = insert (sets[i].src_const, classp,
5182 sets[i].src_const_hash, mode);
5185 else if (sets[i].src_elt == 0)
5186 /* If we did not insert the source into the hash table (e.g., it was
5187 volatile), note the equivalence class for the REG_EQUAL value, if any,
5188 so that the destination goes into that class. */
5189 sets[i].src_elt = src_eqv_elt;
5191 /* Record destination addresses in the hash table. This allows us to
5192 check if they are invalidated by other sets. */
5193 for (i = 0; i < n_sets; i++)
5195 if (sets[i].rtl)
5197 rtx x = sets[i].inner_dest;
5198 struct table_elt *elt;
5199 enum machine_mode mode;
5200 unsigned hash;
5202 if (MEM_P (x))
5204 x = XEXP (x, 0);
5205 mode = GET_MODE (x);
5206 hash = HASH (x, mode);
5207 elt = lookup (x, hash, mode);
5208 if (!elt)
5210 if (insert_regs (x, NULL, 0))
5212 rtx dest = SET_DEST (sets[i].rtl);
5214 rehash_using_reg (x);
5215 hash = HASH (x, mode);
5216 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5218 elt = insert (x, NULL, hash, mode);
5221 sets[i].dest_addr_elt = elt;
5223 else
5224 sets[i].dest_addr_elt = NULL;
5228 invalidate_from_clobbers (x);
5230 /* Some registers are invalidated by subroutine calls. Memory is
5231 invalidated by non-constant calls. */
5233 if (CALL_P (insn))
5235 if (! CONST_OR_PURE_CALL_P (insn))
5236 invalidate_memory ();
5237 invalidate_for_call ();
5240 /* Now invalidate everything set by this instruction.
5241 If a SUBREG or other funny destination is being set,
5242 sets[i].rtl is still nonzero, so here we invalidate the reg
5243 a part of which is being set. */
5245 for (i = 0; i < n_sets; i++)
5246 if (sets[i].rtl)
5248 /* We can't use the inner dest, because the mode associated with
5249 a ZERO_EXTRACT is significant. */
5250 rtx dest = SET_DEST (sets[i].rtl);
5252 /* Needed for registers to remove the register from its
5253 previous quantity's chain.
5254 Needed for memory if this is a nonvarying address, unless
5255 we have just done an invalidate_memory that covers even those. */
5256 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5257 invalidate (dest, VOIDmode);
5258 else if (MEM_P (dest))
5259 invalidate (dest, VOIDmode);
5260 else if (GET_CODE (dest) == STRICT_LOW_PART
5261 || GET_CODE (dest) == ZERO_EXTRACT)
5262 invalidate (XEXP (dest, 0), GET_MODE (dest));
5265 /* A volatile ASM invalidates everything. */
5266 if (NONJUMP_INSN_P (insn)
5267 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5268 && MEM_VOLATILE_P (PATTERN (insn)))
5269 flush_hash_table ();
5271 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5272 the regs restored by the longjmp come from a later time
5273 than the setjmp. */
5274 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5276 flush_hash_table ();
5277 goto done;
5280 /* Make sure registers mentioned in destinations
5281 are safe for use in an expression to be inserted.
5282 This removes from the hash table
5283 any invalid entry that refers to one of these registers.
5285 We don't care about the return value from mention_regs because
5286 we are going to hash the SET_DEST values unconditionally. */
5288 for (i = 0; i < n_sets; i++)
5290 if (sets[i].rtl)
5292 rtx x = SET_DEST (sets[i].rtl);
5294 if (!REG_P (x))
5295 mention_regs (x);
5296 else
5298 /* We used to rely on all references to a register becoming
5299 inaccessible when a register changes to a new quantity,
5300 since that changes the hash code. However, that is not
5301 safe, since after HASH_SIZE new quantities we get a
5302 hash 'collision' of a register with its own invalid
5303 entries. And since SUBREGs have been changed not to
5304 change their hash code with the hash code of the register,
5305 it wouldn't work any longer at all. So we have to check
5306 for any invalid references lying around now.
5307 This code is similar to the REG case in mention_regs,
5308 but it knows that reg_tick has been incremented, and
5309 it leaves reg_in_table as -1 . */
5310 unsigned int regno = REGNO (x);
5311 unsigned int endregno = END_REGNO (x);
5312 unsigned int i;
5314 for (i = regno; i < endregno; i++)
5316 if (REG_IN_TABLE (i) >= 0)
5318 remove_invalid_refs (i);
5319 REG_IN_TABLE (i) = -1;
5326 /* We may have just removed some of the src_elt's from the hash table.
5327 So replace each one with the current head of the same class.
5328 Also check if destination addresses have been removed. */
5330 for (i = 0; i < n_sets; i++)
5331 if (sets[i].rtl)
5333 if (sets[i].dest_addr_elt
5334 && sets[i].dest_addr_elt->first_same_value == 0)
5336 /* The elt was removed, which means this destination is not
5337 valid after this instruction. */
5338 sets[i].rtl = NULL_RTX;
5340 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5341 /* If elt was removed, find current head of same class,
5342 or 0 if nothing remains of that class. */
5344 struct table_elt *elt = sets[i].src_elt;
5346 while (elt && elt->prev_same_value)
5347 elt = elt->prev_same_value;
5349 while (elt && elt->first_same_value == 0)
5350 elt = elt->next_same_value;
5351 sets[i].src_elt = elt ? elt->first_same_value : 0;
5355 /* Now insert the destinations into their equivalence classes. */
5357 for (i = 0; i < n_sets; i++)
5358 if (sets[i].rtl)
5360 rtx dest = SET_DEST (sets[i].rtl);
5361 struct table_elt *elt;
5363 /* Don't record value if we are not supposed to risk allocating
5364 floating-point values in registers that might be wider than
5365 memory. */
5366 if ((flag_float_store
5367 && MEM_P (dest)
5368 && FLOAT_MODE_P (GET_MODE (dest)))
5369 /* Don't record BLKmode values, because we don't know the
5370 size of it, and can't be sure that other BLKmode values
5371 have the same or smaller size. */
5372 || GET_MODE (dest) == BLKmode
5373 /* Don't record values of destinations set inside a libcall block
5374 since we might delete the libcall. Things should have been set
5375 up so we won't want to reuse such a value, but we play it safe
5376 here. */
5377 || libcall_insn
5378 /* If we didn't put a REG_EQUAL value or a source into the hash
5379 table, there is no point is recording DEST. */
5380 || sets[i].src_elt == 0
5381 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5382 or SIGN_EXTEND, don't record DEST since it can cause
5383 some tracking to be wrong.
5385 ??? Think about this more later. */
5386 || (GET_CODE (dest) == SUBREG
5387 && (GET_MODE_SIZE (GET_MODE (dest))
5388 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5389 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5390 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5391 continue;
5393 /* STRICT_LOW_PART isn't part of the value BEING set,
5394 and neither is the SUBREG inside it.
5395 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5396 if (GET_CODE (dest) == STRICT_LOW_PART)
5397 dest = SUBREG_REG (XEXP (dest, 0));
5399 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5400 /* Registers must also be inserted into chains for quantities. */
5401 if (insert_regs (dest, sets[i].src_elt, 1))
5403 /* If `insert_regs' changes something, the hash code must be
5404 recalculated. */
5405 rehash_using_reg (dest);
5406 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5409 elt = insert (dest, sets[i].src_elt,
5410 sets[i].dest_hash, GET_MODE (dest));
5412 elt->in_memory = (MEM_P (sets[i].inner_dest)
5413 && !MEM_READONLY_P (sets[i].inner_dest));
5415 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5416 narrower than M2, and both M1 and M2 are the same number of words,
5417 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5418 make that equivalence as well.
5420 However, BAR may have equivalences for which gen_lowpart
5421 will produce a simpler value than gen_lowpart applied to
5422 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5423 BAR's equivalences. If we don't get a simplified form, make
5424 the SUBREG. It will not be used in an equivalence, but will
5425 cause two similar assignments to be detected.
5427 Note the loop below will find SUBREG_REG (DEST) since we have
5428 already entered SRC and DEST of the SET in the table. */
5430 if (GET_CODE (dest) == SUBREG
5431 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5432 / UNITS_PER_WORD)
5433 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5434 && (GET_MODE_SIZE (GET_MODE (dest))
5435 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5436 && sets[i].src_elt != 0)
5438 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5439 struct table_elt *elt, *classp = 0;
5441 for (elt = sets[i].src_elt->first_same_value; elt;
5442 elt = elt->next_same_value)
5444 rtx new_src = 0;
5445 unsigned src_hash;
5446 struct table_elt *src_elt;
5447 int byte = 0;
5449 /* Ignore invalid entries. */
5450 if (!REG_P (elt->exp)
5451 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5452 continue;
5454 /* We may have already been playing subreg games. If the
5455 mode is already correct for the destination, use it. */
5456 if (GET_MODE (elt->exp) == new_mode)
5457 new_src = elt->exp;
5458 else
5460 /* Calculate big endian correction for the SUBREG_BYTE.
5461 We have already checked that M1 (GET_MODE (dest))
5462 is not narrower than M2 (new_mode). */
5463 if (BYTES_BIG_ENDIAN)
5464 byte = (GET_MODE_SIZE (GET_MODE (dest))
5465 - GET_MODE_SIZE (new_mode));
5467 new_src = simplify_gen_subreg (new_mode, elt->exp,
5468 GET_MODE (dest), byte);
5471 /* The call to simplify_gen_subreg fails if the value
5472 is VOIDmode, yet we can't do any simplification, e.g.
5473 for EXPR_LISTs denoting function call results.
5474 It is invalid to construct a SUBREG with a VOIDmode
5475 SUBREG_REG, hence a zero new_src means we can't do
5476 this substitution. */
5477 if (! new_src)
5478 continue;
5480 src_hash = HASH (new_src, new_mode);
5481 src_elt = lookup (new_src, src_hash, new_mode);
5483 /* Put the new source in the hash table is if isn't
5484 already. */
5485 if (src_elt == 0)
5487 if (insert_regs (new_src, classp, 0))
5489 rehash_using_reg (new_src);
5490 src_hash = HASH (new_src, new_mode);
5492 src_elt = insert (new_src, classp, src_hash, new_mode);
5493 src_elt->in_memory = elt->in_memory;
5495 else if (classp && classp != src_elt->first_same_value)
5496 /* Show that two things that we've seen before are
5497 actually the same. */
5498 merge_equiv_classes (src_elt, classp);
5500 classp = src_elt->first_same_value;
5501 /* Ignore invalid entries. */
5502 while (classp
5503 && !REG_P (classp->exp)
5504 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5505 classp = classp->next_same_value;
5510 /* Special handling for (set REG0 REG1) where REG0 is the
5511 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5512 be used in the sequel, so (if easily done) change this insn to
5513 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5514 that computed their value. Then REG1 will become a dead store
5515 and won't cloud the situation for later optimizations.
5517 Do not make this change if REG1 is a hard register, because it will
5518 then be used in the sequel and we may be changing a two-operand insn
5519 into a three-operand insn.
5521 Also do not do this if we are operating on a copy of INSN.
5523 Also don't do this if INSN ends a libcall; this would cause an unrelated
5524 register to be set in the middle of a libcall, and we then get bad code
5525 if the libcall is deleted. */
5527 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5528 && NEXT_INSN (PREV_INSN (insn)) == insn
5529 && REG_P (SET_SRC (sets[0].rtl))
5530 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5531 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5533 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5534 struct qty_table_elem *src_ent = &qty_table[src_q];
5536 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5537 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5539 /* Scan for the previous nonnote insn, but stop at a basic
5540 block boundary. */
5541 rtx prev = insn;
5542 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5545 prev = PREV_INSN (prev);
5547 while (prev != bb_head && NOTE_P (prev));
5549 /* Do not swap the registers around if the previous instruction
5550 attaches a REG_EQUIV note to REG1.
5552 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5553 from the pseudo that originally shadowed an incoming argument
5554 to another register. Some uses of REG_EQUIV might rely on it
5555 being attached to REG1 rather than REG2.
5557 This section previously turned the REG_EQUIV into a REG_EQUAL
5558 note. We cannot do that because REG_EQUIV may provide an
5559 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5560 if (NONJUMP_INSN_P (prev)
5561 && GET_CODE (PATTERN (prev)) == SET
5562 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5563 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5565 rtx dest = SET_DEST (sets[0].rtl);
5566 rtx src = SET_SRC (sets[0].rtl);
5567 rtx note;
5569 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5570 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5571 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5572 apply_change_group ();
5574 /* If INSN has a REG_EQUAL note, and this note mentions
5575 REG0, then we must delete it, because the value in
5576 REG0 has changed. If the note's value is REG1, we must
5577 also delete it because that is now this insn's dest. */
5578 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5579 if (note != 0
5580 && (reg_mentioned_p (dest, XEXP (note, 0))
5581 || rtx_equal_p (src, XEXP (note, 0))))
5582 remove_note (insn, note);
5587 done:;
5590 /* Remove from the hash table all expressions that reference memory. */
5592 static void
5593 invalidate_memory (void)
5595 int i;
5596 struct table_elt *p, *next;
5598 for (i = 0; i < HASH_SIZE; i++)
5599 for (p = table[i]; p; p = next)
5601 next = p->next_same_hash;
5602 if (p->in_memory)
5603 remove_from_table (p, i);
5607 /* Perform invalidation on the basis of everything about an insn
5608 except for invalidating the actual places that are SET in it.
5609 This includes the places CLOBBERed, and anything that might
5610 alias with something that is SET or CLOBBERed.
5612 X is the pattern of the insn. */
5614 static void
5615 invalidate_from_clobbers (rtx x)
5617 if (GET_CODE (x) == CLOBBER)
5619 rtx ref = XEXP (x, 0);
5620 if (ref)
5622 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5623 || MEM_P (ref))
5624 invalidate (ref, VOIDmode);
5625 else if (GET_CODE (ref) == STRICT_LOW_PART
5626 || GET_CODE (ref) == ZERO_EXTRACT)
5627 invalidate (XEXP (ref, 0), GET_MODE (ref));
5630 else if (GET_CODE (x) == PARALLEL)
5632 int i;
5633 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5635 rtx y = XVECEXP (x, 0, i);
5636 if (GET_CODE (y) == CLOBBER)
5638 rtx ref = XEXP (y, 0);
5639 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5640 || MEM_P (ref))
5641 invalidate (ref, VOIDmode);
5642 else if (GET_CODE (ref) == STRICT_LOW_PART
5643 || GET_CODE (ref) == ZERO_EXTRACT)
5644 invalidate (XEXP (ref, 0), GET_MODE (ref));
5650 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5651 and replace any registers in them with either an equivalent constant
5652 or the canonical form of the register. If we are inside an address,
5653 only do this if the address remains valid.
5655 OBJECT is 0 except when within a MEM in which case it is the MEM.
5657 Return the replacement for X. */
5659 static rtx
5660 cse_process_notes_1 (rtx x, rtx object, bool *changed)
5662 enum rtx_code code = GET_CODE (x);
5663 const char *fmt = GET_RTX_FORMAT (code);
5664 int i;
5666 switch (code)
5668 case CONST_INT:
5669 case CONST:
5670 case SYMBOL_REF:
5671 case LABEL_REF:
5672 case CONST_DOUBLE:
5673 case CONST_FIXED:
5674 case CONST_VECTOR:
5675 case PC:
5676 case CC0:
5677 case LO_SUM:
5678 return x;
5680 case MEM:
5681 validate_change (x, &XEXP (x, 0),
5682 cse_process_notes (XEXP (x, 0), x, changed), 0);
5683 return x;
5685 case EXPR_LIST:
5686 case INSN_LIST:
5687 if (REG_NOTE_KIND (x) == REG_EQUAL)
5688 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
5689 if (XEXP (x, 1))
5690 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
5691 return x;
5693 case SIGN_EXTEND:
5694 case ZERO_EXTEND:
5695 case SUBREG:
5697 rtx new = cse_process_notes (XEXP (x, 0), object, changed);
5698 /* We don't substitute VOIDmode constants into these rtx,
5699 since they would impede folding. */
5700 if (GET_MODE (new) != VOIDmode)
5701 validate_change (object, &XEXP (x, 0), new, 0);
5702 return x;
5705 case REG:
5706 i = REG_QTY (REGNO (x));
5708 /* Return a constant or a constant register. */
5709 if (REGNO_QTY_VALID_P (REGNO (x)))
5711 struct qty_table_elem *ent = &qty_table[i];
5713 if (ent->const_rtx != NULL_RTX
5714 && (CONSTANT_P (ent->const_rtx)
5715 || REG_P (ent->const_rtx)))
5717 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
5718 if (new)
5719 return copy_rtx (new);
5723 /* Otherwise, canonicalize this register. */
5724 return canon_reg (x, NULL_RTX);
5726 default:
5727 break;
5730 for (i = 0; i < GET_RTX_LENGTH (code); i++)
5731 if (fmt[i] == 'e')
5732 validate_change (object, &XEXP (x, i),
5733 cse_process_notes (XEXP (x, i), object, changed), 0);
5735 return x;
5738 static rtx
5739 cse_process_notes (rtx x, rtx object, bool *changed)
5741 rtx new = cse_process_notes_1 (x, object, changed);
5742 if (new != x)
5743 *changed = true;
5744 return new;
5748 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
5750 DATA is a pointer to a struct cse_basic_block_data, that is used to
5751 describe the path.
5752 It is filled with a queue of basic blocks, starting with FIRST_BB
5753 and following a trace through the CFG.
5755 If all paths starting at FIRST_BB have been followed, or no new path
5756 starting at FIRST_BB can be constructed, this function returns FALSE.
5757 Otherwise, DATA->path is filled and the function returns TRUE indicating
5758 that a path to follow was found.
5760 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
5761 block in the path will be FIRST_BB. */
5763 static bool
5764 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
5765 int follow_jumps)
5767 basic_block bb;
5768 edge e;
5769 int path_size;
5771 SET_BIT (cse_visited_basic_blocks, first_bb->index);
5773 /* See if there is a previous path. */
5774 path_size = data->path_size;
5776 /* There is a previous path. Make sure it started with FIRST_BB. */
5777 if (path_size)
5778 gcc_assert (data->path[0].bb == first_bb);
5780 /* There was only one basic block in the last path. Clear the path and
5781 return, so that paths starting at another basic block can be tried. */
5782 if (path_size == 1)
5784 path_size = 0;
5785 goto done;
5788 /* If the path was empty from the beginning, construct a new path. */
5789 if (path_size == 0)
5790 data->path[path_size++].bb = first_bb;
5791 else
5793 /* Otherwise, path_size must be equal to or greater than 2, because
5794 a previous path exists that is at least two basic blocks long.
5796 Update the previous branch path, if any. If the last branch was
5797 previously along the branch edge, take the fallthrough edge now. */
5798 while (path_size >= 2)
5800 basic_block last_bb_in_path, previous_bb_in_path;
5801 edge e;
5803 --path_size;
5804 last_bb_in_path = data->path[path_size].bb;
5805 previous_bb_in_path = data->path[path_size - 1].bb;
5807 /* If we previously followed a path along the branch edge, try
5808 the fallthru edge now. */
5809 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
5810 && any_condjump_p (BB_END (previous_bb_in_path))
5811 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
5812 && e == BRANCH_EDGE (previous_bb_in_path))
5814 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
5815 if (bb != EXIT_BLOCK_PTR
5816 && single_pred_p (bb)
5817 /* We used to assert here that we would only see blocks
5818 that we have not visited yet. But we may end up
5819 visiting basic blocks twice if the CFG has changed
5820 in this run of cse_main, because when the CFG changes
5821 the topological sort of the CFG also changes. A basic
5822 blocks that previously had more than two predecessors
5823 may now have a single predecessor, and become part of
5824 a path that starts at another basic block.
5826 We still want to visit each basic block only once, so
5827 halt the path here if we have already visited BB. */
5828 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
5830 SET_BIT (cse_visited_basic_blocks, bb->index);
5831 data->path[path_size++].bb = bb;
5832 break;
5836 data->path[path_size].bb = NULL;
5839 /* If only one block remains in the path, bail. */
5840 if (path_size == 1)
5842 path_size = 0;
5843 goto done;
5847 /* Extend the path if possible. */
5848 if (follow_jumps)
5850 bb = data->path[path_size - 1].bb;
5851 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
5853 if (single_succ_p (bb))
5854 e = single_succ_edge (bb);
5855 else if (EDGE_COUNT (bb->succs) == 2
5856 && any_condjump_p (BB_END (bb)))
5858 /* First try to follow the branch. If that doesn't lead
5859 to a useful path, follow the fallthru edge. */
5860 e = BRANCH_EDGE (bb);
5861 if (!single_pred_p (e->dest))
5862 e = FALLTHRU_EDGE (bb);
5864 else
5865 e = NULL;
5867 if (e && e->dest != EXIT_BLOCK_PTR
5868 && single_pred_p (e->dest)
5869 /* Avoid visiting basic blocks twice. The large comment
5870 above explains why this can happen. */
5871 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
5873 basic_block bb2 = e->dest;
5874 SET_BIT (cse_visited_basic_blocks, bb2->index);
5875 data->path[path_size++].bb = bb2;
5876 bb = bb2;
5878 else
5879 bb = NULL;
5883 done:
5884 data->path_size = path_size;
5885 return path_size != 0;
5888 /* Dump the path in DATA to file F. NSETS is the number of sets
5889 in the path. */
5891 static void
5892 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
5894 int path_entry;
5896 fprintf (f, ";; Following path with %d sets: ", nsets);
5897 for (path_entry = 0; path_entry < data->path_size; path_entry++)
5898 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
5899 fputc ('\n', dump_file);
5900 fflush (f);
5904 /* Return true if BB has exception handling successor edges. */
5906 static bool
5907 have_eh_succ_edges (basic_block bb)
5909 edge e;
5910 edge_iterator ei;
5912 FOR_EACH_EDGE (e, ei, bb->succs)
5913 if (e->flags & EDGE_EH)
5914 return true;
5916 return false;
5920 /* Scan to the end of the path described by DATA. Return an estimate of
5921 the total number of SETs of all insns in the path. */
5923 static void
5924 cse_prescan_path (struct cse_basic_block_data *data)
5926 int nsets = 0;
5927 int path_size = data->path_size;
5928 int path_entry;
5930 /* Scan to end of each basic block in the path. */
5931 for (path_entry = 0; path_entry < path_size; path_entry++)
5933 basic_block bb;
5934 rtx insn;
5936 bb = data->path[path_entry].bb;
5938 FOR_BB_INSNS (bb, insn)
5940 if (!INSN_P (insn))
5941 continue;
5943 /* A PARALLEL can have lots of SETs in it,
5944 especially if it is really an ASM_OPERANDS. */
5945 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5946 nsets += XVECLEN (PATTERN (insn), 0);
5947 else
5948 nsets += 1;
5952 data->nsets = nsets;
5955 /* Process a single extended basic block described by EBB_DATA. */
5957 static void
5958 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
5960 int path_size = ebb_data->path_size;
5961 int path_entry;
5962 int num_insns = 0;
5964 /* Allocate the space needed by qty_table. */
5965 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
5967 new_basic_block ();
5968 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
5969 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
5970 for (path_entry = 0; path_entry < path_size; path_entry++)
5972 basic_block bb;
5973 rtx insn;
5974 rtx libcall_insn = NULL_RTX;
5975 int no_conflict = 0;
5977 bb = ebb_data->path[path_entry].bb;
5978 FOR_BB_INSNS (bb, insn)
5980 /* If we have processed 1,000 insns, flush the hash table to
5981 avoid extreme quadratic behavior. We must not include NOTEs
5982 in the count since there may be more of them when generating
5983 debugging information. If we clear the table at different
5984 times, code generated with -g -O might be different than code
5985 generated with -O but not -g.
5987 FIXME: This is a real kludge and needs to be done some other
5988 way. */
5989 if (INSN_P (insn)
5990 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
5992 flush_hash_table ();
5993 num_insns = 0;
5996 if (INSN_P (insn))
5998 /* Process notes first so we have all notes in canonical forms
5999 when looking for duplicate operations. */
6000 if (REG_NOTES (insn))
6002 bool changed = false;
6003 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6004 NULL_RTX, &changed);
6005 if (changed)
6006 df_notes_rescan (insn);
6009 /* Track when we are inside in LIBCALL block. Inside such
6010 a block we do not want to record destinations. The last
6011 insn of a LIBCALL block is not considered to be part of
6012 the block, since its destination is the result of the
6013 block and hence should be recorded. */
6014 if (REG_NOTES (insn) != 0)
6016 rtx p;
6018 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6019 libcall_insn = XEXP (p, 0);
6020 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6022 /* Keep libcall_insn for the last SET insn of
6023 a no-conflict block to prevent changing the
6024 destination. */
6025 if (!no_conflict)
6026 libcall_insn = NULL_RTX;
6027 else
6028 no_conflict = -1;
6030 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
6031 no_conflict = 1;
6034 cse_insn (insn, libcall_insn);
6036 /* If we kept libcall_insn for a no-conflict bock,
6037 clear it here. */
6038 if (no_conflict == -1)
6040 libcall_insn = NULL_RTX;
6041 no_conflict = 0;
6044 /* If we haven't already found an insn where we added a LABEL_REF,
6045 check this one. */
6046 if (INSN_P (insn) && !recorded_label_ref
6047 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6048 (void *) insn))
6049 recorded_label_ref = true;
6051 #ifdef HAVE_cc0
6052 /* If the previous insn set CC0 and this insn no longer
6053 references CC0, delete the previous insn. Here we use
6054 fact that nothing expects CC0 to be valid over an insn,
6055 which is true until the final pass. */
6057 rtx prev_insn, tem;
6059 prev_insn = PREV_INSN (insn);
6060 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6061 && (tem = single_set (prev_insn)) != 0
6062 && SET_DEST (tem) == cc0_rtx
6063 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6064 delete_insn (prev_insn);
6067 /* If this insn is not the last insn in the basic block,
6068 it will be PREV_INSN(insn) in the next iteration. If
6069 we recorded any CC0-related information for this insn,
6070 remember it. */
6071 if (insn != BB_END (bb))
6073 prev_insn_cc0 = this_insn_cc0;
6074 prev_insn_cc0_mode = this_insn_cc0_mode;
6076 #endif
6080 /* Make sure that libcalls don't span multiple basic blocks. */
6081 gcc_assert (libcall_insn == NULL_RTX);
6083 /* With non-call exceptions, we are not always able to update
6084 the CFG properly inside cse_insn. So clean up possibly
6085 redundant EH edges here. */
6086 if (flag_non_call_exceptions && have_eh_succ_edges (bb))
6087 cse_cfg_altered |= purge_dead_edges (bb);
6089 /* If we changed a conditional jump, we may have terminated
6090 the path we are following. Check that by verifying that
6091 the edge we would take still exists. If the edge does
6092 not exist anymore, purge the remainder of the path.
6093 Note that this will cause us to return to the caller. */
6094 if (path_entry < path_size - 1)
6096 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6097 if (!find_edge (bb, next_bb))
6101 path_size--;
6103 /* If we truncate the path, we must also reset the
6104 visited bit on the remaining blocks in the path,
6105 or we will never visit them at all. */
6106 RESET_BIT (cse_visited_basic_blocks,
6107 ebb_data->path[path_size].bb->index);
6108 ebb_data->path[path_size].bb = NULL;
6110 while (path_size - 1 != path_entry);
6111 ebb_data->path_size = path_size;
6115 /* If this is a conditional jump insn, record any known
6116 equivalences due to the condition being tested. */
6117 insn = BB_END (bb);
6118 if (path_entry < path_size - 1
6119 && JUMP_P (insn)
6120 && single_set (insn)
6121 && any_condjump_p (insn))
6123 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6124 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6125 record_jump_equiv (insn, taken);
6128 #ifdef HAVE_cc0
6129 /* Clear the CC0-tracking related insns, they can't provide
6130 useful information across basic block boundaries. */
6131 prev_insn_cc0 = 0;
6132 #endif
6135 gcc_assert (next_qty <= max_qty);
6137 free (qty_table);
6141 /* Perform cse on the instructions of a function.
6142 F is the first instruction.
6143 NREGS is one plus the highest pseudo-reg number used in the instruction.
6145 Return 2 if jump optimizations should be redone due to simplifications
6146 in conditional jump instructions.
6147 Return 1 if the CFG should be cleaned up because it has been modified.
6148 Return 0 otherwise. */
6151 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6153 struct cse_basic_block_data ebb_data;
6154 basic_block bb;
6155 int *rc_order = XNEWVEC (int, last_basic_block);
6156 int i, n_blocks;
6158 df_set_flags (DF_LR_RUN_DCE);
6159 df_analyze ();
6160 df_set_flags (DF_DEFER_INSN_RESCAN);
6162 reg_scan (get_insns (), max_reg_num ());
6163 init_cse_reg_info (nregs);
6165 ebb_data.path = XNEWVEC (struct branch_path,
6166 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6168 cse_cfg_altered = false;
6169 cse_jumps_altered = false;
6170 recorded_label_ref = false;
6171 constant_pool_entries_cost = 0;
6172 constant_pool_entries_regcost = 0;
6173 ebb_data.path_size = 0;
6174 ebb_data.nsets = 0;
6175 rtl_hooks = cse_rtl_hooks;
6177 init_recog ();
6178 init_alias_analysis ();
6180 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6182 /* Set up the table of already visited basic blocks. */
6183 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6184 sbitmap_zero (cse_visited_basic_blocks);
6186 /* Loop over basic blocks in reverse completion order (RPO),
6187 excluding the ENTRY and EXIT blocks. */
6188 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6189 i = 0;
6190 while (i < n_blocks)
6192 /* Find the first block in the RPO queue that we have not yet
6193 processed before. */
6196 bb = BASIC_BLOCK (rc_order[i++]);
6198 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6199 && i < n_blocks);
6201 /* Find all paths starting with BB, and process them. */
6202 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6204 /* Pre-scan the path. */
6205 cse_prescan_path (&ebb_data);
6207 /* If this basic block has no sets, skip it. */
6208 if (ebb_data.nsets == 0)
6209 continue;
6211 /* Get a reasonable estimate for the maximum number of qty's
6212 needed for this path. For this, we take the number of sets
6213 and multiply that by MAX_RECOG_OPERANDS. */
6214 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6216 /* Dump the path we're about to process. */
6217 if (dump_file)
6218 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6220 cse_extended_basic_block (&ebb_data);
6224 /* Clean up. */
6225 end_alias_analysis ();
6226 free (reg_eqv_table);
6227 free (ebb_data.path);
6228 sbitmap_free (cse_visited_basic_blocks);
6229 free (rc_order);
6230 rtl_hooks = general_rtl_hooks;
6232 if (cse_jumps_altered || recorded_label_ref)
6233 return 2;
6234 else if (cse_cfg_altered)
6235 return 1;
6236 else
6237 return 0;
6240 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6241 which there isn't a REG_LABEL_OPERAND note.
6242 Return one if so. DATA is the insn. */
6244 static int
6245 check_for_label_ref (rtx *rtl, void *data)
6247 rtx insn = (rtx) data;
6249 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6250 note for it, we must rerun jump since it needs to place the note. If
6251 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6252 don't do this since no REG_LABEL_OPERAND will be added. */
6253 return (GET_CODE (*rtl) == LABEL_REF
6254 && ! LABEL_REF_NONLOCAL_P (*rtl)
6255 && (!JUMP_P (insn)
6256 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6257 && LABEL_P (XEXP (*rtl, 0))
6258 && INSN_UID (XEXP (*rtl, 0)) != 0
6259 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6262 /* Count the number of times registers are used (not set) in X.
6263 COUNTS is an array in which we accumulate the count, INCR is how much
6264 we count each register usage.
6266 Don't count a usage of DEST, which is the SET_DEST of a SET which
6267 contains X in its SET_SRC. This is because such a SET does not
6268 modify the liveness of DEST.
6269 DEST is set to pc_rtx for a trapping insn, which means that we must count
6270 uses of a SET_DEST regardless because the insn can't be deleted here. */
6272 static void
6273 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6275 enum rtx_code code;
6276 rtx note;
6277 const char *fmt;
6278 int i, j;
6280 if (x == 0)
6281 return;
6283 switch (code = GET_CODE (x))
6285 case REG:
6286 if (x != dest)
6287 counts[REGNO (x)] += incr;
6288 return;
6290 case PC:
6291 case CC0:
6292 case CONST:
6293 case CONST_INT:
6294 case CONST_DOUBLE:
6295 case CONST_FIXED:
6296 case CONST_VECTOR:
6297 case SYMBOL_REF:
6298 case LABEL_REF:
6299 return;
6301 case CLOBBER:
6302 /* If we are clobbering a MEM, mark any registers inside the address
6303 as being used. */
6304 if (MEM_P (XEXP (x, 0)))
6305 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6306 return;
6308 case SET:
6309 /* Unless we are setting a REG, count everything in SET_DEST. */
6310 if (!REG_P (SET_DEST (x)))
6311 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6312 count_reg_usage (SET_SRC (x), counts,
6313 dest ? dest : SET_DEST (x),
6314 incr);
6315 return;
6317 case CALL_INSN:
6318 case INSN:
6319 case JUMP_INSN:
6320 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
6321 this fact by setting DEST to pc_rtx. */
6322 if (flag_non_call_exceptions && may_trap_p (PATTERN (x)))
6323 dest = pc_rtx;
6324 if (code == CALL_INSN)
6325 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6326 count_reg_usage (PATTERN (x), counts, dest, incr);
6328 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6329 use them. */
6331 note = find_reg_equal_equiv_note (x);
6332 if (note)
6334 rtx eqv = XEXP (note, 0);
6336 if (GET_CODE (eqv) == EXPR_LIST)
6337 /* This REG_EQUAL note describes the result of a function call.
6338 Process all the arguments. */
6341 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6342 eqv = XEXP (eqv, 1);
6344 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6345 else
6346 count_reg_usage (eqv, counts, dest, incr);
6348 return;
6350 case EXPR_LIST:
6351 if (REG_NOTE_KIND (x) == REG_EQUAL
6352 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6353 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6354 involving registers in the address. */
6355 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6356 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6358 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6359 return;
6361 case ASM_OPERANDS:
6362 /* If the asm is volatile, then this insn cannot be deleted,
6363 and so the inputs *must* be live. */
6364 if (MEM_VOLATILE_P (x))
6365 dest = NULL_RTX;
6366 /* Iterate over just the inputs, not the constraints as well. */
6367 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6368 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6369 return;
6371 case INSN_LIST:
6372 gcc_unreachable ();
6374 default:
6375 break;
6378 fmt = GET_RTX_FORMAT (code);
6379 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6381 if (fmt[i] == 'e')
6382 count_reg_usage (XEXP (x, i), counts, dest, incr);
6383 else if (fmt[i] == 'E')
6384 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6385 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6389 /* Return true if set is live. */
6390 static bool
6391 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6392 int *counts)
6394 #ifdef HAVE_cc0
6395 rtx tem;
6396 #endif
6398 if (set_noop_p (set))
6401 #ifdef HAVE_cc0
6402 else if (GET_CODE (SET_DEST (set)) == CC0
6403 && !side_effects_p (SET_SRC (set))
6404 && ((tem = next_nonnote_insn (insn)) == 0
6405 || !INSN_P (tem)
6406 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6407 return false;
6408 #endif
6409 else if (!REG_P (SET_DEST (set))
6410 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
6411 || counts[REGNO (SET_DEST (set))] != 0
6412 || side_effects_p (SET_SRC (set)))
6413 return true;
6414 return false;
6417 /* Return true if insn is live. */
6419 static bool
6420 insn_live_p (rtx insn, int *counts)
6422 int i;
6423 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
6424 return true;
6425 else if (GET_CODE (PATTERN (insn)) == SET)
6426 return set_live_p (PATTERN (insn), insn, counts);
6427 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6429 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6431 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6433 if (GET_CODE (elt) == SET)
6435 if (set_live_p (elt, insn, counts))
6436 return true;
6438 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6439 return true;
6441 return false;
6443 else
6444 return true;
6447 /* Return true if libcall is dead as a whole. */
6449 static bool
6450 dead_libcall_p (rtx insn, int *counts)
6452 rtx note, set, new;
6454 /* See if there's a REG_EQUAL note on this insn and try to
6455 replace the source with the REG_EQUAL expression.
6457 We assume that insns with REG_RETVALs can only be reg->reg
6458 copies at this point. */
6459 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6460 if (!note)
6461 return false;
6463 set = single_set (insn);
6464 if (!set)
6465 return false;
6467 new = simplify_rtx (XEXP (note, 0));
6468 if (!new)
6469 new = XEXP (note, 0);
6471 /* While changing insn, we must update the counts accordingly. */
6472 count_reg_usage (insn, counts, NULL_RTX, -1);
6474 if (validate_change (insn, &SET_SRC (set), new, 0))
6476 count_reg_usage (insn, counts, NULL_RTX, 1);
6477 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
6478 remove_note (insn, note);
6479 return true;
6482 if (CONSTANT_P (new))
6484 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
6485 if (new && validate_change (insn, &SET_SRC (set), new, 0))
6487 count_reg_usage (insn, counts, NULL_RTX, 1);
6488 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
6489 remove_note (insn, note);
6490 return true;
6494 count_reg_usage (insn, counts, NULL_RTX, 1);
6495 return false;
6498 /* Scan all the insns and delete any that are dead; i.e., they store a register
6499 that is never used or they copy a register to itself.
6501 This is used to remove insns made obviously dead by cse, loop or other
6502 optimizations. It improves the heuristics in loop since it won't try to
6503 move dead invariants out of loops or make givs for dead quantities. The
6504 remaining passes of the compilation are also sped up. */
6507 delete_trivially_dead_insns (rtx insns, int nreg)
6509 int *counts;
6510 rtx insn, prev;
6511 int in_libcall = 0, dead_libcall = 0;
6512 int ndead = 0;
6514 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6515 /* First count the number of times each register is used. */
6516 counts = XCNEWVEC (int, nreg);
6517 for (insn = insns; insn; insn = NEXT_INSN (insn))
6518 if (INSN_P (insn))
6519 count_reg_usage (insn, counts, NULL_RTX, 1);
6521 /* Go from the last insn to the first and delete insns that only set unused
6522 registers or copy a register to itself. As we delete an insn, remove
6523 usage counts for registers it uses.
6525 The first jump optimization pass may leave a real insn as the last
6526 insn in the function. We must not skip that insn or we may end
6527 up deleting code that is not really dead. */
6528 for (insn = get_last_insn (); insn; insn = prev)
6530 int live_insn = 0;
6532 prev = PREV_INSN (insn);
6533 if (!INSN_P (insn))
6534 continue;
6536 /* Don't delete any insns that are part of a libcall block unless
6537 we can delete the whole libcall block.
6539 Flow or loop might get confused if we did that. Remember
6540 that we are scanning backwards. */
6541 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6543 in_libcall = 1;
6544 live_insn = 1;
6545 dead_libcall = dead_libcall_p (insn, counts);
6547 else if (in_libcall)
6548 live_insn = ! dead_libcall;
6549 else
6550 live_insn = insn_live_p (insn, counts);
6552 /* If this is a dead insn, delete it and show registers in it aren't
6553 being used. */
6555 if (! live_insn && dbg_cnt (delete_trivial_dead))
6557 count_reg_usage (insn, counts, NULL_RTX, -1);
6558 delete_insn_and_edges (insn);
6559 ndead++;
6562 if (in_libcall && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
6564 in_libcall = 0;
6565 dead_libcall = 0;
6569 if (dump_file && ndead)
6570 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6571 ndead);
6572 /* Clean up. */
6573 free (counts);
6574 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
6575 return ndead;
6578 /* This function is called via for_each_rtx. The argument, NEWREG, is
6579 a condition code register with the desired mode. If we are looking
6580 at the same register in a different mode, replace it with
6581 NEWREG. */
6583 static int
6584 cse_change_cc_mode (rtx *loc, void *data)
6586 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
6588 if (*loc
6589 && REG_P (*loc)
6590 && REGNO (*loc) == REGNO (args->newreg)
6591 && GET_MODE (*loc) != GET_MODE (args->newreg))
6593 validate_change (args->insn, loc, args->newreg, 1);
6595 return -1;
6597 return 0;
6600 /* Change the mode of any reference to the register REGNO (NEWREG) to
6601 GET_MODE (NEWREG) in INSN. */
6603 static void
6604 cse_change_cc_mode_insn (rtx insn, rtx newreg)
6606 struct change_cc_mode_args args;
6607 int success;
6609 if (!INSN_P (insn))
6610 return;
6612 args.insn = insn;
6613 args.newreg = newreg;
6615 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
6616 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, &args);
6618 /* If the following assertion was triggered, there is most probably
6619 something wrong with the cc_modes_compatible back end function.
6620 CC modes only can be considered compatible if the insn - with the mode
6621 replaced by any of the compatible modes - can still be recognized. */
6622 success = apply_change_group ();
6623 gcc_assert (success);
6626 /* Change the mode of any reference to the register REGNO (NEWREG) to
6627 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
6628 any instruction which modifies NEWREG. */
6630 static void
6631 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
6633 rtx insn;
6635 for (insn = start; insn != end; insn = NEXT_INSN (insn))
6637 if (! INSN_P (insn))
6638 continue;
6640 if (reg_set_p (newreg, insn))
6641 return;
6643 cse_change_cc_mode_insn (insn, newreg);
6647 /* BB is a basic block which finishes with CC_REG as a condition code
6648 register which is set to CC_SRC. Look through the successors of BB
6649 to find blocks which have a single predecessor (i.e., this one),
6650 and look through those blocks for an assignment to CC_REG which is
6651 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
6652 permitted to change the mode of CC_SRC to a compatible mode. This
6653 returns VOIDmode if no equivalent assignments were found.
6654 Otherwise it returns the mode which CC_SRC should wind up with.
6656 The main complexity in this function is handling the mode issues.
6657 We may have more than one duplicate which we can eliminate, and we
6658 try to find a mode which will work for multiple duplicates. */
6660 static enum machine_mode
6661 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
6663 bool found_equiv;
6664 enum machine_mode mode;
6665 unsigned int insn_count;
6666 edge e;
6667 rtx insns[2];
6668 enum machine_mode modes[2];
6669 rtx last_insns[2];
6670 unsigned int i;
6671 rtx newreg;
6672 edge_iterator ei;
6674 /* We expect to have two successors. Look at both before picking
6675 the final mode for the comparison. If we have more successors
6676 (i.e., some sort of table jump, although that seems unlikely),
6677 then we require all beyond the first two to use the same
6678 mode. */
6680 found_equiv = false;
6681 mode = GET_MODE (cc_src);
6682 insn_count = 0;
6683 FOR_EACH_EDGE (e, ei, bb->succs)
6685 rtx insn;
6686 rtx end;
6688 if (e->flags & EDGE_COMPLEX)
6689 continue;
6691 if (EDGE_COUNT (e->dest->preds) != 1
6692 || e->dest == EXIT_BLOCK_PTR)
6693 continue;
6695 end = NEXT_INSN (BB_END (e->dest));
6696 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
6698 rtx set;
6700 if (! INSN_P (insn))
6701 continue;
6703 /* If CC_SRC is modified, we have to stop looking for
6704 something which uses it. */
6705 if (modified_in_p (cc_src, insn))
6706 break;
6708 /* Check whether INSN sets CC_REG to CC_SRC. */
6709 set = single_set (insn);
6710 if (set
6711 && REG_P (SET_DEST (set))
6712 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6714 bool found;
6715 enum machine_mode set_mode;
6716 enum machine_mode comp_mode;
6718 found = false;
6719 set_mode = GET_MODE (SET_SRC (set));
6720 comp_mode = set_mode;
6721 if (rtx_equal_p (cc_src, SET_SRC (set)))
6722 found = true;
6723 else if (GET_CODE (cc_src) == COMPARE
6724 && GET_CODE (SET_SRC (set)) == COMPARE
6725 && mode != set_mode
6726 && rtx_equal_p (XEXP (cc_src, 0),
6727 XEXP (SET_SRC (set), 0))
6728 && rtx_equal_p (XEXP (cc_src, 1),
6729 XEXP (SET_SRC (set), 1)))
6732 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
6733 if (comp_mode != VOIDmode
6734 && (can_change_mode || comp_mode == mode))
6735 found = true;
6738 if (found)
6740 found_equiv = true;
6741 if (insn_count < ARRAY_SIZE (insns))
6743 insns[insn_count] = insn;
6744 modes[insn_count] = set_mode;
6745 last_insns[insn_count] = end;
6746 ++insn_count;
6748 if (mode != comp_mode)
6750 gcc_assert (can_change_mode);
6751 mode = comp_mode;
6753 /* The modified insn will be re-recognized later. */
6754 PUT_MODE (cc_src, mode);
6757 else
6759 if (set_mode != mode)
6761 /* We found a matching expression in the
6762 wrong mode, but we don't have room to
6763 store it in the array. Punt. This case
6764 should be rare. */
6765 break;
6767 /* INSN sets CC_REG to a value equal to CC_SRC
6768 with the right mode. We can simply delete
6769 it. */
6770 delete_insn (insn);
6773 /* We found an instruction to delete. Keep looking,
6774 in the hopes of finding a three-way jump. */
6775 continue;
6778 /* We found an instruction which sets the condition
6779 code, so don't look any farther. */
6780 break;
6783 /* If INSN sets CC_REG in some other way, don't look any
6784 farther. */
6785 if (reg_set_p (cc_reg, insn))
6786 break;
6789 /* If we fell off the bottom of the block, we can keep looking
6790 through successors. We pass CAN_CHANGE_MODE as false because
6791 we aren't prepared to handle compatibility between the
6792 further blocks and this block. */
6793 if (insn == end)
6795 enum machine_mode submode;
6797 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
6798 if (submode != VOIDmode)
6800 gcc_assert (submode == mode);
6801 found_equiv = true;
6802 can_change_mode = false;
6807 if (! found_equiv)
6808 return VOIDmode;
6810 /* Now INSN_COUNT is the number of instructions we found which set
6811 CC_REG to a value equivalent to CC_SRC. The instructions are in
6812 INSNS. The modes used by those instructions are in MODES. */
6814 newreg = NULL_RTX;
6815 for (i = 0; i < insn_count; ++i)
6817 if (modes[i] != mode)
6819 /* We need to change the mode of CC_REG in INSNS[i] and
6820 subsequent instructions. */
6821 if (! newreg)
6823 if (GET_MODE (cc_reg) == mode)
6824 newreg = cc_reg;
6825 else
6826 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6828 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
6829 newreg);
6832 delete_insn (insns[i]);
6835 return mode;
6838 /* If we have a fixed condition code register (or two), walk through
6839 the instructions and try to eliminate duplicate assignments. */
6841 static void
6842 cse_condition_code_reg (void)
6844 unsigned int cc_regno_1;
6845 unsigned int cc_regno_2;
6846 rtx cc_reg_1;
6847 rtx cc_reg_2;
6848 basic_block bb;
6850 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
6851 return;
6853 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
6854 if (cc_regno_2 != INVALID_REGNUM)
6855 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
6856 else
6857 cc_reg_2 = NULL_RTX;
6859 FOR_EACH_BB (bb)
6861 rtx last_insn;
6862 rtx cc_reg;
6863 rtx insn;
6864 rtx cc_src_insn;
6865 rtx cc_src;
6866 enum machine_mode mode;
6867 enum machine_mode orig_mode;
6869 /* Look for blocks which end with a conditional jump based on a
6870 condition code register. Then look for the instruction which
6871 sets the condition code register. Then look through the
6872 successor blocks for instructions which set the condition
6873 code register to the same value. There are other possible
6874 uses of the condition code register, but these are by far the
6875 most common and the ones which we are most likely to be able
6876 to optimize. */
6878 last_insn = BB_END (bb);
6879 if (!JUMP_P (last_insn))
6880 continue;
6882 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
6883 cc_reg = cc_reg_1;
6884 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
6885 cc_reg = cc_reg_2;
6886 else
6887 continue;
6889 cc_src_insn = NULL_RTX;
6890 cc_src = NULL_RTX;
6891 for (insn = PREV_INSN (last_insn);
6892 insn && insn != PREV_INSN (BB_HEAD (bb));
6893 insn = PREV_INSN (insn))
6895 rtx set;
6897 if (! INSN_P (insn))
6898 continue;
6899 set = single_set (insn);
6900 if (set
6901 && REG_P (SET_DEST (set))
6902 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6904 cc_src_insn = insn;
6905 cc_src = SET_SRC (set);
6906 break;
6908 else if (reg_set_p (cc_reg, insn))
6909 break;
6912 if (! cc_src_insn)
6913 continue;
6915 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
6916 continue;
6918 /* Now CC_REG is a condition code register used for a
6919 conditional jump at the end of the block, and CC_SRC, in
6920 CC_SRC_INSN, is the value to which that condition code
6921 register is set, and CC_SRC is still meaningful at the end of
6922 the basic block. */
6924 orig_mode = GET_MODE (cc_src);
6925 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
6926 if (mode != VOIDmode)
6928 gcc_assert (mode == GET_MODE (cc_src));
6929 if (mode != orig_mode)
6931 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6933 cse_change_cc_mode_insn (cc_src_insn, newreg);
6935 /* Do the same in the following insns that use the
6936 current value of CC_REG within BB. */
6937 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
6938 NEXT_INSN (last_insn),
6939 newreg);
6946 /* Perform common subexpression elimination. Nonzero value from
6947 `cse_main' means that jumps were simplified and some code may now
6948 be unreachable, so do jump optimization again. */
6949 static bool
6950 gate_handle_cse (void)
6952 return optimize > 0;
6955 static unsigned int
6956 rest_of_handle_cse (void)
6958 int tem;
6960 if (dump_file)
6961 dump_flow_info (dump_file, dump_flags);
6963 tem = cse_main (get_insns (), max_reg_num ());
6965 /* If we are not running more CSE passes, then we are no longer
6966 expecting CSE to be run. But always rerun it in a cheap mode. */
6967 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
6969 if (tem == 2)
6971 timevar_push (TV_JUMP);
6972 rebuild_jump_labels (get_insns ());
6973 cleanup_cfg (0);
6974 timevar_pop (TV_JUMP);
6976 else if (tem == 1 || optimize > 1)
6977 cleanup_cfg (0);
6979 return 0;
6982 struct tree_opt_pass pass_cse =
6984 "cse1", /* name */
6985 gate_handle_cse, /* gate */
6986 rest_of_handle_cse, /* execute */
6987 NULL, /* sub */
6988 NULL, /* next */
6989 0, /* static_pass_number */
6990 TV_CSE, /* tv_id */
6991 0, /* properties_required */
6992 0, /* properties_provided */
6993 0, /* properties_destroyed */
6994 0, /* todo_flags_start */
6995 TODO_df_finish | TODO_verify_rtl_sharing |
6996 TODO_dump_func |
6997 TODO_ggc_collect |
6998 TODO_verify_flow, /* todo_flags_finish */
6999 's' /* letter */
7003 static bool
7004 gate_handle_cse2 (void)
7006 return optimize > 0 && flag_rerun_cse_after_loop;
7009 /* Run second CSE pass after loop optimizations. */
7010 static unsigned int
7011 rest_of_handle_cse2 (void)
7013 int tem;
7015 if (dump_file)
7016 dump_flow_info (dump_file, dump_flags);
7018 tem = cse_main (get_insns (), max_reg_num ());
7020 /* Run a pass to eliminate duplicated assignments to condition code
7021 registers. We have to run this after bypass_jumps, because it
7022 makes it harder for that pass to determine whether a jump can be
7023 bypassed safely. */
7024 cse_condition_code_reg ();
7026 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7028 if (tem == 2)
7030 timevar_push (TV_JUMP);
7031 rebuild_jump_labels (get_insns ());
7032 cleanup_cfg (0);
7033 timevar_pop (TV_JUMP);
7035 else if (tem == 1)
7036 cleanup_cfg (0);
7038 cse_not_expected = 1;
7039 return 0;
7043 struct tree_opt_pass pass_cse2 =
7045 "cse2", /* name */
7046 gate_handle_cse2, /* gate */
7047 rest_of_handle_cse2, /* execute */
7048 NULL, /* sub */
7049 NULL, /* next */
7050 0, /* static_pass_number */
7051 TV_CSE2, /* tv_id */
7052 0, /* properties_required */
7053 0, /* properties_provided */
7054 0, /* properties_destroyed */
7055 0, /* todo_flags_start */
7056 TODO_df_finish | TODO_verify_rtl_sharing |
7057 TODO_dump_func |
7058 TODO_ggc_collect |
7059 TODO_verify_flow, /* todo_flags_finish */
7060 't' /* letter */