1 /* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
2 /* { dg-require-effective-target sse2 } */
3 /* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */
15 /* Here, we should use non-temporal prefetch instruction. */
16 for (i
= 0; i
< K
; i
++)
17 for (j
= 0; j
< K
; j
++)
20 /* Here, we should not use non-temporal prefetch instruction, since the
21 value of a[i+10][j] is reused in L2 cache. */
22 for (i
= 0; i
< K
; i
++)
23 for (j
= 0; j
< K
; j
++)
24 sum
+= a
[i
][j
] * a
[i
+ 10][j
];
26 /* Here, we should use non-temporal prefetch instruction, since the
27 value of a[i+100][j] is too far to be reused in L2 cache. */
28 for (i
= 0; i
< K
; i
++)
29 for (j
= 0; j
< K
; j
++)
30 sum
+= a
[i
][j
] * a
[i
+ 100][j
];
32 /* Here, temporal prefetches should be used, since the volume of the
33 memory accesses is smaller than L2 cache. */
34 for (i
= 0; i
< 100; i
++)
35 for (j
= 0; j
< 100; j
++)
36 sum
+= a
[i
][j
] * a
[i
+ 100][j
];
38 /* Temporal prefetches should be used here (even though the accesses to
39 a[j][i] are independent, the same cache line is almost always hit
40 every N iterations). */
41 for (i
= 0; i
< N
; i
++)
42 for (j
= 0; j
< N
; j
++)
48 /* { dg-final { scan-tree-dump-times "Issued prefetch" 5 "aprefetch" } } */
49 /* { dg-final { scan-tree-dump-times "Issued nontemporal prefetch" 3 "aprefetch" } } */
51 /* { dg-final { scan-assembler-times "prefetcht" 5 } } */
52 /* { dg-final { scan-assembler-times "prefetchnta" 3 } } */
54 /* { dg-final { cleanup-tree-dump "aprefetch" } } */