1 /* This file contains definitions for the register renamer.
2 Copyright (C) 2011-2022 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #ifndef GCC_REGRENAME_H
21 #define GCC_REGRENAME_H
23 /* We keep linked lists of DU_HEAD structures, each of which describes
24 a chain of occurrences of a reg. */
29 class du_head
*next_chain
;
30 /* The first and last elements of this chain. */
31 struct du_chain
*first
, *last
;
32 /* The chain that this chain is tied to. */
33 class du_head
*tied_chain
;
34 /* Describes the register being tracked. */
38 /* A unique id to be used as an index into the conflicts bitmaps. */
40 /* A bitmap to record conflicts with other chains. */
41 bitmap_head conflicts
;
42 /* Conflicts with untracked hard registers. */
43 HARD_REG_SET hard_conflicts
;
44 /* Which registers are fully or partially clobbered by the calls that
46 HARD_REG_SET call_clobber_mask
;
48 /* A bitmask of ABIs used by the calls that the chain crosses. */
49 unsigned int call_abis
: NUM_ABI_IDS
;
50 /* Nonzero if the register is used in a way that prevents renaming,
51 such as the SET_DEST of a CALL_INSN or an asm operand that used
52 to be a hard register. */
53 unsigned int cannot_rename
:1;
54 /* Nonzero if the chain has already been renamed. */
55 unsigned int renamed
:1;
57 /* Fields for use by target code. */
58 unsigned int target_data_1
;
59 unsigned int target_data_2
;
62 typedef class du_head
*du_head_p
;
64 /* This struct describes a single occurrence of a register. */
67 /* Links to the next occurrence of the register. */
68 struct du_chain
*next_use
;
70 /* The insn where the register appears. */
72 /* The location inside the insn. */
74 /* The register class required by the insn at this location. */
75 ENUM_BITFIELD(reg_class
) cl
: 16;
78 /* This struct describes data gathered during regrename_analyze about
79 a single operand of an insn. */
80 struct operand_rr_info
82 /* The number of chains recorded for this operand. */
85 /* Holds either the chain for the operand itself, or for the registers in
87 struct du_chain
*chains
[MAX_REGS_PER_ADDRESS
];
88 class du_head
*heads
[MAX_REGS_PER_ADDRESS
];
91 /* A struct to hold a vector of operand_rr_info structures describing the
92 operands of an insn. */
95 operand_rr_info
*op_info
;
99 extern vec
<insn_rr_info
> insn_rr
;
101 extern void regrename_init (bool);
102 extern void regrename_finish (void);
103 extern void regrename_analyze (bitmap
, bool = true);
104 extern du_head_p
regrename_chain_from_id (unsigned int);
105 extern int find_rename_reg (du_head_p
, enum reg_class
, HARD_REG_SET
*, int,
107 extern bool regrename_do_replace (du_head_p
, int);
108 extern reg_class
regrename_find_superclass (du_head_p
, int *,