1 /* If-conversion support.
2 Copyright (C) 2000-2022 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
39 #include "cfgcleanup.h"
43 #include "tree-pass.h"
45 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static int cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, profile_probability
, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, int);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static rtx
cond_exec_get_condition (rtx_insn
*, bool);
87 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
88 static int noce_operand_ok (const_rtx
);
89 static void merge_if_block (ce_if_block
*);
90 static int find_cond_trap (basic_block
, edge
, edge
);
91 static basic_block
find_if_header (basic_block
, int);
92 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
93 static int noce_find_if_block (basic_block
, edge
, edge
, int);
94 static int cond_exec_find_if_block (ce_if_block
*);
95 static int find_if_case_1 (basic_block
, edge
, edge
);
96 static int find_if_case_2 (basic_block
, edge
, edge
);
97 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
99 static void noce_emit_move_insn (rtx
, rtx
);
100 static rtx_insn
*block_has_only_trap (basic_block
);
101 static void need_cmov_or_rewire (basic_block
, hash_set
<rtx_insn
*> *,
102 hash_map
<rtx_insn
*, int> *);
103 static bool noce_convert_multiple_sets_1 (struct noce_if_info
*,
104 hash_set
<rtx_insn
*> *,
105 hash_map
<rtx_insn
*, int> *,
108 auto_vec
<rtx_insn
*> *, int *);
110 /* Count the number of non-jump active insns in BB. */
113 count_bb_insns (const_basic_block bb
)
116 rtx_insn
*insn
= BB_HEAD (bb
);
120 if (active_insn_p (insn
) && !JUMP_P (insn
))
123 if (insn
== BB_END (bb
))
125 insn
= NEXT_INSN (insn
);
131 /* Determine whether the total insn_cost on non-jump insns in
132 basic block BB is less than MAX_COST. This function returns
133 false if the cost of any instruction could not be estimated.
135 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
136 as those insns are being speculated. MAX_COST is scaled with SCALE
137 plus a small fudge factor. */
140 cheap_bb_rtx_cost_p (const_basic_block bb
,
141 profile_probability prob
, int max_cost
)
144 rtx_insn
*insn
= BB_HEAD (bb
);
145 bool speed
= optimize_bb_for_speed_p (bb
);
146 int scale
= prob
.initialized_p () ? prob
.to_reg_br_prob_base ()
149 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
150 applied to insn_cost when optimizing for size. Only do
151 this after combine because if-conversion might interfere with
152 passes before combine.
154 Use optimize_function_for_speed_p instead of the pre-defined
155 variable speed to make sure it is set to same value for all
156 basic blocks in one if-conversion transformation. */
157 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
158 scale
= REG_BR_PROB_BASE
;
159 /* Our branch probability/scaling factors are just estimates and don't
160 account for cases where we can get speculation for free and other
161 secondary benefits. So we fudge the scale factor to make speculating
162 appear a little more profitable when optimizing for performance. */
164 scale
+= REG_BR_PROB_BASE
/ 8;
171 if (NONJUMP_INSN_P (insn
))
173 int cost
= insn_cost (insn
, speed
) * REG_BR_PROB_BASE
;
177 /* If this instruction is the load or set of a "stack" register,
178 such as a floating point register on x87, then the cost of
179 speculatively executing this insn may need to include
180 the additional cost of popping its result off of the
181 register stack. Unfortunately, correctly recognizing and
182 accounting for this additional overhead is tricky, so for
183 now we simply prohibit such speculative execution. */
186 rtx set
= single_set (insn
);
187 if (set
&& STACK_REG_P (SET_DEST (set
)))
193 if (count
>= max_cost
)
196 else if (CALL_P (insn
))
199 if (insn
== BB_END (bb
))
201 insn
= NEXT_INSN (insn
);
207 /* Return the first non-jump active insn in the basic block. */
210 first_active_insn (basic_block bb
)
212 rtx_insn
*insn
= BB_HEAD (bb
);
216 if (insn
== BB_END (bb
))
218 insn
= NEXT_INSN (insn
);
221 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
223 if (insn
== BB_END (bb
))
225 insn
= NEXT_INSN (insn
);
234 /* Return the last non-jump active (non-jump) insn in the basic block. */
237 last_active_insn (basic_block bb
, int skip_use_p
)
239 rtx_insn
*insn
= BB_END (bb
);
240 rtx_insn
*head
= BB_HEAD (bb
);
244 || DEBUG_INSN_P (insn
)
246 && NONJUMP_INSN_P (insn
)
247 && GET_CODE (PATTERN (insn
)) == USE
))
251 insn
= PREV_INSN (insn
);
260 /* Return the active insn before INSN inside basic block CURR_BB. */
263 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
265 if (!insn
|| insn
== BB_HEAD (curr_bb
))
268 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
270 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
273 /* No other active insn all the way to the start of the basic block. */
274 if (insn
== BB_HEAD (curr_bb
))
281 /* Return the active insn after INSN inside basic block CURR_BB. */
284 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
286 if (!insn
|| insn
== BB_END (curr_bb
))
289 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
291 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
294 /* No other active insn all the way to the end of the basic block. */
295 if (insn
== BB_END (curr_bb
))
302 /* Return the basic block reached by falling though the basic block BB. */
305 block_fallthru (basic_block bb
)
307 edge e
= find_fallthru_edge (bb
->succs
);
309 return (e
) ? e
->dest
: NULL_BLOCK
;
312 /* Return true if RTXs A and B can be safely interchanged. */
315 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
317 if (!rtx_equal_p (a
, b
))
320 if (GET_CODE (a
) != MEM
)
323 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
324 reference is not. Interchanging a dead type-unsafe memory reference with
325 a live type-safe one creates a live type-unsafe memory reference, in other
326 words, it makes the program illegal.
327 We check here conservatively whether the two memory references have equal
328 memory attributes. */
330 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
334 /* Go through a bunch of insns, converting them to conditional
335 execution format if possible. Return TRUE if all of the non-note
336 insns were processed. */
339 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
340 /* if block information */rtx_insn
*start
,
341 /* first insn to look at */rtx end
,
342 /* last insn to look at */rtx test
,
343 /* conditional execution test */profile_probability
345 /* probability of branch taken. */int mod_ok
)
347 int must_be_last
= FALSE
;
355 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
357 /* dwarf2out can't cope with conditional prologues. */
358 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
361 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
364 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
366 /* dwarf2out can't cope with conditional unwind info. */
367 if (RTX_FRAME_RELATED_P (insn
))
370 /* Remove USE insns that get in the way. */
371 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
373 /* ??? Ug. Actually unlinking the thing is problematic,
374 given what we'd have to coordinate with our callers. */
375 SET_INSN_DELETED (insn
);
379 /* Last insn wasn't last? */
383 if (modified_in_p (test
, insn
))
390 /* Now build the conditional form of the instruction. */
391 pattern
= PATTERN (insn
);
392 xtest
= copy_rtx (test
);
394 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
396 if (GET_CODE (pattern
) == COND_EXEC
)
398 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
401 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
402 COND_EXEC_TEST (pattern
));
403 pattern
= COND_EXEC_CODE (pattern
);
406 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
408 /* If the machine needs to modify the insn being conditionally executed,
409 say for example to force a constant integer operand into a temp
410 register, do so here. */
411 #ifdef IFCVT_MODIFY_INSN
412 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
417 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
419 if (CALL_P (insn
) && prob_val
.initialized_p ())
420 validate_change (insn
, ®_NOTES (insn
),
421 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
422 prob_val
.to_reg_br_prob_note (),
423 REG_NOTES (insn
)), 1);
433 /* Return the condition for a jump. Do not do any special processing. */
436 cond_exec_get_condition (rtx_insn
*jump
, bool get_reversed
= false)
440 if (any_condjump_p (jump
))
441 test_if
= SET_SRC (pc_set (jump
));
444 cond
= XEXP (test_if
, 0);
446 /* If this branches to JUMP_LABEL when the condition is false,
447 reverse the condition. */
449 || (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
450 && label_ref_label (XEXP (test_if
, 2))
451 == JUMP_LABEL (jump
)))
453 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
457 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
464 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
465 to conditional execution. Return TRUE if we were successful at
466 converting the block. */
469 cond_exec_process_if_block (ce_if_block
* ce_info
,
470 /* if block information */int do_multiple_p
)
472 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
473 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
474 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
475 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
476 rtx_insn
*then_start
; /* first insn in THEN block */
477 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
478 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
479 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
480 int max
; /* max # of insns to convert. */
481 int then_mod_ok
; /* whether conditional mods are ok in THEN */
482 rtx true_expr
; /* test for else block insns */
483 rtx false_expr
; /* test for then block insns */
484 profile_probability true_prob_val
;/* probability of else block */
485 profile_probability false_prob_val
;/* probability of then block */
486 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
487 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
488 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
489 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
490 int then_n_insns
, else_n_insns
, n_insns
;
491 enum rtx_code false_code
;
494 /* If test is comprised of && or || elements, and we've failed at handling
495 all of them together, just use the last test if it is the special case of
496 && elements without an ELSE block. */
497 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
499 if (else_bb
|| ! ce_info
->and_and_p
)
502 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
503 ce_info
->num_multiple_test_blocks
= 0;
504 ce_info
->num_and_and_blocks
= 0;
505 ce_info
->num_or_or_blocks
= 0;
508 /* Find the conditional jump to the ELSE or JOIN part, and isolate
510 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
514 /* If the conditional jump is more than just a conditional jump,
515 then we cannot do conditional execution conversion on this block. */
516 if (! onlyjump_p (BB_END (test_bb
)))
519 /* Collect the bounds of where we're to search, skipping any labels, jumps
520 and notes at the beginning and end of the block. Then count the total
521 number of insns and see if it is small enough to convert. */
522 then_start
= first_active_insn (then_bb
);
523 then_end
= last_active_insn (then_bb
, TRUE
);
524 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
525 n_insns
= then_n_insns
;
526 max
= MAX_CONDITIONAL_EXECUTE
;
533 else_start
= first_active_insn (else_bb
);
534 else_end
= last_active_insn (else_bb
, TRUE
);
535 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
536 n_insns
+= else_n_insns
;
538 /* Look for matching sequences at the head and tail of the two blocks,
539 and limit the range of insns to be converted if possible. */
540 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
541 &then_first_tail
, &else_first_tail
,
543 if (then_first_tail
== BB_HEAD (then_bb
))
544 then_start
= then_end
= NULL
;
545 if (else_first_tail
== BB_HEAD (else_bb
))
546 else_start
= else_end
= NULL
;
551 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
553 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
554 n_insns
-= 2 * n_matching
;
559 && then_n_insns
> n_matching
560 && else_n_insns
> n_matching
)
562 int longest_match
= MIN (then_n_insns
- n_matching
,
563 else_n_insns
- n_matching
);
565 = flow_find_head_matching_sequence (then_bb
, else_bb
,
574 /* We won't pass the insns in the head sequence to
575 cond_exec_process_insns, so we need to test them here
576 to make sure that they don't clobber the condition. */
577 for (insn
= BB_HEAD (then_bb
);
578 insn
!= NEXT_INSN (then_last_head
);
579 insn
= NEXT_INSN (insn
))
580 if (!LABEL_P (insn
) && !NOTE_P (insn
)
581 && !DEBUG_INSN_P (insn
)
582 && modified_in_p (test_expr
, insn
))
586 if (then_last_head
== then_end
)
587 then_start
= then_end
= NULL
;
588 if (else_last_head
== else_end
)
589 else_start
= else_end
= NULL
;
594 then_start
= find_active_insn_after (then_bb
, then_last_head
);
596 else_start
= find_active_insn_after (else_bb
, else_last_head
);
597 n_insns
-= 2 * n_matching
;
605 /* Map test_expr/test_jump into the appropriate MD tests to use on
606 the conditionally executed code. */
608 true_expr
= test_expr
;
610 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
611 if (false_code
!= UNKNOWN
)
612 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
613 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
615 false_expr
= NULL_RTX
;
617 #ifdef IFCVT_MODIFY_TESTS
618 /* If the machine description needs to modify the tests, such as setting a
619 conditional execution register from a comparison, it can do so here. */
620 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
622 /* See if the conversion failed. */
623 if (!true_expr
|| !false_expr
)
627 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
630 true_prob_val
= profile_probability::from_reg_br_prob_note (XINT (note
, 0));
631 false_prob_val
= true_prob_val
.invert ();
635 true_prob_val
= profile_probability::uninitialized ();
636 false_prob_val
= profile_probability::uninitialized ();
639 /* If we have && or || tests, do them here. These tests are in the adjacent
640 blocks after the first block containing the test. */
641 if (ce_info
->num_multiple_test_blocks
> 0)
643 basic_block bb
= test_bb
;
644 basic_block last_test_bb
= ce_info
->last_test_bb
;
651 rtx_insn
*start
, *end
;
653 enum rtx_code f_code
;
655 bb
= block_fallthru (bb
);
656 start
= first_active_insn (bb
);
657 end
= last_active_insn (bb
, TRUE
);
659 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
660 false_prob_val
, FALSE
))
663 /* If the conditional jump is more than just a conditional jump, then
664 we cannot do conditional execution conversion on this block. */
665 if (! onlyjump_p (BB_END (bb
)))
668 /* Find the conditional jump and isolate the test. */
669 t
= cond_exec_get_condition (BB_END (bb
));
673 f_code
= reversed_comparison_code (t
, BB_END (bb
));
674 if (f_code
== UNKNOWN
)
677 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
678 if (ce_info
->and_and_p
)
680 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
681 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
685 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
686 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
689 /* If the machine description needs to modify the tests, such as
690 setting a conditional execution register from a comparison, it can
692 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
693 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
695 /* See if the conversion failed. */
703 while (bb
!= last_test_bb
);
706 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
707 on then THEN block. */
708 then_mod_ok
= (else_bb
== NULL_BLOCK
);
710 /* Go through the THEN and ELSE blocks converting the insns if possible
711 to conditional execution. */
715 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
716 false_expr
, false_prob_val
,
720 if (else_bb
&& else_end
721 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
722 true_expr
, true_prob_val
, TRUE
))
725 /* If we cannot apply the changes, fail. Do not go through the normal fail
726 processing, since apply_change_group will call cancel_changes. */
727 if (! apply_change_group ())
729 #ifdef IFCVT_MODIFY_CANCEL
730 /* Cancel any machine dependent changes. */
731 IFCVT_MODIFY_CANCEL (ce_info
);
736 #ifdef IFCVT_MODIFY_FINAL
737 /* Do any machine dependent final modifications. */
738 IFCVT_MODIFY_FINAL (ce_info
);
741 /* Conversion succeeded. */
743 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
744 n_insns
, (n_insns
== 1) ? " was" : "s were");
746 /* Merge the blocks! If we had matching sequences, make sure to delete one
747 copy at the appropriate location first: delete the copy in the THEN branch
748 for a tail sequence so that the remaining one is executed last for both
749 branches, and delete the copy in the ELSE branch for a head sequence so
750 that the remaining one is executed first for both branches. */
753 rtx_insn
*from
= then_first_tail
;
755 from
= find_active_insn_after (then_bb
, from
);
756 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
759 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
761 merge_if_block (ce_info
);
762 cond_exec_changed_p
= TRUE
;
766 #ifdef IFCVT_MODIFY_CANCEL
767 /* Cancel any machine dependent changes. */
768 IFCVT_MODIFY_CANCEL (ce_info
);
775 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
776 static int noce_try_move (struct noce_if_info
*);
777 static int noce_try_ifelse_collapse (struct noce_if_info
*);
778 static int noce_try_store_flag (struct noce_if_info
*);
779 static int noce_try_addcc (struct noce_if_info
*);
780 static int noce_try_store_flag_constants (struct noce_if_info
*);
781 static int noce_try_store_flag_mask (struct noce_if_info
*);
782 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
783 rtx
, rtx
, rtx
, rtx
= NULL
, rtx
= NULL
);
784 static int noce_try_cmove (struct noce_if_info
*);
785 static int noce_try_cmove_arith (struct noce_if_info
*);
786 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
787 static int noce_try_minmax (struct noce_if_info
*);
788 static int noce_try_abs (struct noce_if_info
*);
789 static int noce_try_sign_mask (struct noce_if_info
*);
791 /* Return the comparison code for reversed condition for IF_INFO,
792 or UNKNOWN if reversing the condition is not possible. */
794 static inline enum rtx_code
795 noce_reversed_cond_code (struct noce_if_info
*if_info
)
797 if (if_info
->rev_cond
)
798 return GET_CODE (if_info
->rev_cond
);
799 return reversed_comparison_code (if_info
->cond
, if_info
->jump
);
802 /* Return true if SEQ is a good candidate as a replacement for the
803 if-convertible sequence described in IF_INFO.
804 This is the default implementation that targets can override
805 through a target hook. */
808 default_noce_conversion_profitable_p (rtx_insn
*seq
,
809 struct noce_if_info
*if_info
)
811 bool speed_p
= if_info
->speed_p
;
813 /* Cost up the new sequence. */
814 unsigned int cost
= seq_cost (seq
, speed_p
);
816 if (cost
<= if_info
->original_cost
)
819 /* When compiling for size, we can make a reasonably accurately guess
820 at the size growth. When compiling for speed, use the maximum. */
821 return speed_p
&& cost
<= if_info
->max_seq_cost
;
824 /* Helper function for noce_try_store_flag*. */
827 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
830 rtx cond
= if_info
->cond
;
834 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
835 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
837 /* If earliest == jump, or when the condition is complex, try to
838 build the store_flag insn directly. */
842 rtx set
= pc_set (if_info
->jump
);
843 cond
= XEXP (SET_SRC (set
), 0);
844 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
845 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
846 reversep
= !reversep
;
847 if (if_info
->then_else_reversed
)
848 reversep
= !reversep
;
852 && general_operand (XEXP (if_info
->rev_cond
, 0), VOIDmode
)
853 && general_operand (XEXP (if_info
->rev_cond
, 1), VOIDmode
))
855 cond
= if_info
->rev_cond
;
860 code
= reversed_comparison_code (cond
, if_info
->jump
);
862 code
= GET_CODE (cond
);
864 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
865 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
867 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
869 rtx set
= gen_rtx_SET (x
, src
);
872 rtx_insn
*insn
= emit_insn (set
);
874 if (recog_memoized (insn
) >= 0)
876 rtx_insn
*seq
= get_insns ();
880 if_info
->cond_earliest
= if_info
->jump
;
888 /* Don't even try if the comparison operands or the mode of X are weird. */
889 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
892 return emit_store_flag (x
, code
, XEXP (cond
, 0),
893 XEXP (cond
, 1), VOIDmode
,
894 (code
== LTU
|| code
== LEU
895 || code
== GEU
|| code
== GTU
), normalize
);
898 /* Return true if X can be safely forced into a register by copy_to_mode_reg
902 noce_can_force_operand (rtx x
)
904 if (general_operand (x
, VOIDmode
))
908 if (!noce_can_force_operand (SUBREG_REG (x
)))
912 if (ARITHMETIC_P (x
))
914 if (!noce_can_force_operand (XEXP (x
, 0))
915 || !noce_can_force_operand (XEXP (x
, 1)))
917 switch (GET_CODE (x
))
926 return code_to_optab (GET_CODE (x
));
931 if (!noce_can_force_operand (XEXP (x
, 0)))
933 switch (GET_CODE (x
))
946 return code_to_optab (GET_CODE (x
));
952 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
953 X is the destination/target and Y is the value to copy. */
956 noce_emit_move_insn (rtx x
, rtx y
)
958 machine_mode outmode
;
962 if (GET_CODE (x
) != STRICT_LOW_PART
)
964 rtx_insn
*seq
, *insn
;
969 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
970 otherwise construct a suitable SET pattern ourselves. */
971 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
972 ? emit_move_insn (x
, y
)
973 : emit_insn (gen_rtx_SET (x
, y
));
977 if (recog_memoized (insn
) <= 0)
979 if (GET_CODE (x
) == ZERO_EXTRACT
)
981 rtx op
= XEXP (x
, 0);
982 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
983 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
985 /* store_bit_field expects START to be relative to
986 BYTES_BIG_ENDIAN and adjusts this value for machines with
987 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
988 invoke store_bit_field again it is necessary to have the START
989 value from the first call. */
990 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
993 start
= BITS_PER_UNIT
- start
- size
;
996 gcc_assert (REG_P (op
));
997 start
= BITS_PER_WORD
- start
- size
;
1001 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
1002 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
1006 switch (GET_RTX_CLASS (GET_CODE (y
)))
1009 ot
= code_to_optab (GET_CODE (y
));
1010 if (ot
&& noce_can_force_operand (XEXP (y
, 0)))
1013 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
1014 if (target
!= NULL_RTX
)
1017 emit_move_insn (x
, target
);
1025 case RTX_COMM_ARITH
:
1026 ot
= code_to_optab (GET_CODE (y
));
1028 && noce_can_force_operand (XEXP (y
, 0))
1029 && noce_can_force_operand (XEXP (y
, 1)))
1032 target
= expand_binop (GET_MODE (y
), ot
,
1033 XEXP (y
, 0), XEXP (y
, 1),
1034 x
, 0, OPTAB_DIRECT
);
1035 if (target
!= NULL_RTX
)
1038 emit_move_insn (x
, target
);
1054 outer
= XEXP (x
, 0);
1055 inner
= XEXP (outer
, 0);
1056 outmode
= GET_MODE (outer
);
1057 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1058 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1059 0, 0, outmode
, y
, false);
1062 /* Return the CC reg if it is used in COND. */
1065 cc_in_cond (rtx cond
)
1067 if (have_cbranchcc4
&& cond
1068 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1069 return XEXP (cond
, 0);
1074 /* Return sequence of instructions generated by if conversion. This
1075 function calls end_sequence() to end the current stream, ensures
1076 that the instructions are unshared, recognizable non-jump insns.
1077 On failure, this function returns a NULL_RTX. */
1080 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1083 rtx_insn
*seq
= get_insns ();
1084 rtx cc
= cc_in_cond (if_info
->cond
);
1086 set_used_flags (if_info
->x
);
1087 set_used_flags (if_info
->cond
);
1088 set_used_flags (if_info
->a
);
1089 set_used_flags (if_info
->b
);
1091 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1092 set_used_flags (insn
);
1094 unshare_all_rtl_in_chain (seq
);
1097 /* Make sure that all of the instructions emitted are recognizable,
1098 and that we haven't introduced a new jump instruction.
1099 As an exercise for the reader, build a general mechanism that
1100 allows proper placement of required clobbers. */
1101 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1103 || recog_memoized (insn
) == -1
1104 /* Make sure new generated code does not clobber CC. */
1105 || (cc
&& set_of (cc
, insn
)))
1111 /* Return true iff the then and else basic block (if it exists)
1112 consist of a single simple set instruction. */
1115 noce_simple_bbs (struct noce_if_info
*if_info
)
1117 if (!if_info
->then_simple
)
1120 if (if_info
->else_bb
)
1121 return if_info
->else_simple
;
1126 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1127 "if (a == b) x = a; else x = b" into "x = b". */
1130 noce_try_move (struct noce_if_info
*if_info
)
1132 rtx cond
= if_info
->cond
;
1133 enum rtx_code code
= GET_CODE (cond
);
1137 if (code
!= NE
&& code
!= EQ
)
1140 if (!noce_simple_bbs (if_info
))
1143 /* This optimization isn't valid if either A or B could be a NaN
1144 or a signed zero. */
1145 if (HONOR_NANS (if_info
->x
)
1146 || HONOR_SIGNED_ZEROS (if_info
->x
))
1149 /* Check whether the operands of the comparison are A and in
1151 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1152 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1153 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1154 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1156 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1159 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1161 /* Avoid generating the move if the source is the destination. */
1162 if (! rtx_equal_p (if_info
->x
, y
))
1165 noce_emit_move_insn (if_info
->x
, y
);
1166 seq
= end_ifcvt_sequence (if_info
);
1170 emit_insn_before_setloc (seq
, if_info
->jump
,
1171 INSN_LOCATION (if_info
->insn_a
));
1173 if_info
->transform_name
= "noce_try_move";
1179 /* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
1180 through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
1181 If that is the case, emit the result into x. */
1184 noce_try_ifelse_collapse (struct noce_if_info
* if_info
)
1186 if (!noce_simple_bbs (if_info
))
1189 machine_mode mode
= GET_MODE (if_info
->x
);
1190 rtx if_then_else
= simplify_gen_ternary (IF_THEN_ELSE
, mode
, mode
,
1191 if_info
->cond
, if_info
->b
,
1194 if (GET_CODE (if_then_else
) == IF_THEN_ELSE
)
1199 noce_emit_move_insn (if_info
->x
, if_then_else
);
1200 seq
= end_ifcvt_sequence (if_info
);
1204 emit_insn_before_setloc (seq
, if_info
->jump
,
1205 INSN_LOCATION (if_info
->insn_a
));
1207 if_info
->transform_name
= "noce_try_ifelse_collapse";
1212 /* Convert "if (test) x = 1; else x = 0".
1214 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1215 tried in noce_try_store_flag_constants after noce_try_cmove has had
1216 a go at the conversion. */
1219 noce_try_store_flag (struct noce_if_info
*if_info
)
1225 if (!noce_simple_bbs (if_info
))
1228 if (CONST_INT_P (if_info
->b
)
1229 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1230 && if_info
->a
== const0_rtx
)
1232 else if (if_info
->b
== const0_rtx
1233 && CONST_INT_P (if_info
->a
)
1234 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1235 && noce_reversed_cond_code (if_info
) != UNKNOWN
)
1242 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1245 if (target
!= if_info
->x
)
1246 noce_emit_move_insn (if_info
->x
, target
);
1248 seq
= end_ifcvt_sequence (if_info
);
1252 emit_insn_before_setloc (seq
, if_info
->jump
,
1253 INSN_LOCATION (if_info
->insn_a
));
1254 if_info
->transform_name
= "noce_try_store_flag";
1265 /* Convert "if (test) x = -A; else x = A" into
1266 x = A; if (test) x = -x if the machine can do the
1267 conditional negate form of this cheaply.
1268 Try this before noce_try_cmove that will just load the
1269 immediates into two registers and do a conditional select
1270 between them. If the target has a conditional negate or
1271 conditional invert operation we can save a potentially
1272 expensive constant synthesis. */
1275 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1277 if (!noce_simple_bbs (if_info
))
1280 if (!CONST_INT_P (if_info
->a
)
1281 || !CONST_INT_P (if_info
->b
)
1282 || !REG_P (if_info
->x
))
1285 machine_mode mode
= GET_MODE (if_info
->x
);
1287 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1288 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1290 rtx cond
= if_info
->cond
;
1298 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1300 else if (val_a
== ~val_b
)
1308 rtx tmp
= gen_reg_rtx (mode
);
1309 noce_emit_move_insn (tmp
, if_info
->a
);
1311 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1315 rtx_insn
*seq
= get_insns ();
1323 if (target
!= if_info
->x
)
1324 noce_emit_move_insn (if_info
->x
, target
);
1326 seq
= end_ifcvt_sequence (if_info
);
1331 emit_insn_before_setloc (seq
, if_info
->jump
,
1332 INSN_LOCATION (if_info
->insn_a
));
1333 if_info
->transform_name
= "noce_try_inverse_constants";
1342 /* Convert "if (test) x = a; else x = b", for A and B constant.
1343 Also allow A = y + c1, B = y + c2, with a common y between A
1347 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1352 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1355 machine_mode mode
= GET_MODE (if_info
->x
);
1356 rtx common
= NULL_RTX
;
1361 /* Handle cases like x := test ? y + 3 : y + 4. */
1362 if (GET_CODE (a
) == PLUS
1363 && GET_CODE (b
) == PLUS
1364 && CONST_INT_P (XEXP (a
, 1))
1365 && CONST_INT_P (XEXP (b
, 1))
1366 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1367 /* Allow expressions that are not using the result or plain
1368 registers where we handle overlap below. */
1369 && (REG_P (XEXP (a
, 0))
1370 || (noce_operand_ok (XEXP (a
, 0))
1371 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0)))))
1373 common
= XEXP (a
, 0);
1378 if (!noce_simple_bbs (if_info
))
1384 ifalse
= INTVAL (a
);
1386 bool subtract_flag_p
= false;
1388 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1389 /* Make sure we can represent the difference between the two values. */
1391 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1394 diff
= trunc_int_for_mode (diff
, mode
);
1396 can_reverse
= noce_reversed_cond_code (if_info
) != UNKNOWN
;
1398 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1401 /* We could collapse these cases but it is easier to follow the
1402 diff/STORE_FLAG_VALUE combinations when they are listed
1406 => 4 + (test != 0). */
1407 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1410 => can_reverse | 4 + (test == 0)
1411 !can_reverse | 3 - (test != 0). */
1412 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1414 reversep
= can_reverse
;
1415 subtract_flag_p
= !can_reverse
;
1416 /* If we need to subtract the flag and we have PLUS-immediate
1417 A and B then it is unlikely to be beneficial to play tricks
1419 if (subtract_flag_p
&& common
)
1423 => can_reverse | 3 + (test == 0)
1424 !can_reverse | 4 - (test != 0). */
1425 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1427 reversep
= can_reverse
;
1428 subtract_flag_p
= !can_reverse
;
1429 /* If we need to subtract the flag and we have PLUS-immediate
1430 A and B then it is unlikely to be beneficial to play tricks
1432 if (subtract_flag_p
&& common
)
1436 => 4 + (test != 0). */
1437 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1442 /* Is this (cond) ? 2^n : 0? */
1443 else if (ifalse
== 0 && pow2p_hwi (itrue
)
1444 && STORE_FLAG_VALUE
== 1)
1446 /* Is this (cond) ? 0 : 2^n? */
1447 else if (itrue
== 0 && pow2p_hwi (ifalse
) && can_reverse
1448 && STORE_FLAG_VALUE
== 1)
1453 /* Is this (cond) ? -1 : x? */
1454 else if (itrue
== -1
1455 && STORE_FLAG_VALUE
== -1)
1457 /* Is this (cond) ? x : -1? */
1458 else if (ifalse
== -1 && can_reverse
1459 && STORE_FLAG_VALUE
== -1)
1469 std::swap (itrue
, ifalse
);
1470 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1475 /* If we have x := test ? x + 3 : x + 4 then move the original
1476 x out of the way while we store flags. */
1477 if (common
&& rtx_equal_p (common
, if_info
->x
))
1479 common
= gen_reg_rtx (mode
);
1480 noce_emit_move_insn (common
, if_info
->x
);
1483 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1490 /* if (test) x = 3; else x = 4;
1491 => x = 3 + (test == 0); */
1492 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1494 /* Add the common part now. This may allow combine to merge this
1495 with the store flag operation earlier into some sort of conditional
1496 increment/decrement if the target allows it. */
1498 target
= expand_simple_binop (mode
, PLUS
,
1500 target
, 0, OPTAB_WIDEN
);
1502 /* Always use ifalse here. It should have been swapped with itrue
1503 when appropriate when reversep is true. */
1504 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1505 gen_int_mode (ifalse
, mode
), target
,
1506 if_info
->x
, 0, OPTAB_WIDEN
);
1508 /* Other cases are not beneficial when the original A and B are PLUS
1515 /* if (test) x = 8; else x = 0;
1516 => x = (test != 0) << 3; */
1517 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1519 target
= expand_simple_binop (mode
, ASHIFT
,
1520 target
, GEN_INT (tmp
), if_info
->x
, 0,
1524 /* if (test) x = -1; else x = b;
1525 => x = -(test != 0) | b; */
1526 else if (itrue
== -1)
1528 target
= expand_simple_binop (mode
, IOR
,
1529 target
, gen_int_mode (ifalse
, mode
),
1530 if_info
->x
, 0, OPTAB_WIDEN
);
1544 if (target
!= if_info
->x
)
1545 noce_emit_move_insn (if_info
->x
, target
);
1547 seq
= end_ifcvt_sequence (if_info
);
1548 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1551 emit_insn_before_setloc (seq
, if_info
->jump
,
1552 INSN_LOCATION (if_info
->insn_a
));
1553 if_info
->transform_name
= "noce_try_store_flag_constants";
1561 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1562 similarly for "foo--". */
1565 noce_try_addcc (struct noce_if_info
*if_info
)
1569 int subtract
, normalize
;
1571 if (!noce_simple_bbs (if_info
))
1574 if (GET_CODE (if_info
->a
) == PLUS
1575 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1576 && noce_reversed_cond_code (if_info
) != UNKNOWN
)
1578 rtx cond
= if_info
->rev_cond
;
1581 if (cond
== NULL_RTX
)
1583 cond
= if_info
->cond
;
1584 code
= reversed_comparison_code (cond
, if_info
->jump
);
1587 code
= GET_CODE (cond
);
1589 /* First try to use addcc pattern. */
1590 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1591 && general_operand (XEXP (cond
, 1), VOIDmode
))
1594 target
= emit_conditional_add (if_info
->x
, code
,
1599 XEXP (if_info
->a
, 1),
1600 GET_MODE (if_info
->x
),
1601 (code
== LTU
|| code
== GEU
1602 || code
== LEU
|| code
== GTU
));
1605 if (target
!= if_info
->x
)
1606 noce_emit_move_insn (if_info
->x
, target
);
1608 seq
= end_ifcvt_sequence (if_info
);
1609 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1612 emit_insn_before_setloc (seq
, if_info
->jump
,
1613 INSN_LOCATION (if_info
->insn_a
));
1614 if_info
->transform_name
= "noce_try_addcc";
1621 /* If that fails, construct conditional increment or decrement using
1622 setcc. We're changing a branch and an increment to a comparison and
1624 if (XEXP (if_info
->a
, 1) == const1_rtx
1625 || XEXP (if_info
->a
, 1) == constm1_rtx
)
1628 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1629 subtract
= 0, normalize
= 0;
1630 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1631 subtract
= 1, normalize
= 0;
1633 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1636 target
= noce_emit_store_flag (if_info
,
1637 gen_reg_rtx (GET_MODE (if_info
->x
)),
1641 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1642 subtract
? MINUS
: PLUS
,
1643 if_info
->b
, target
, if_info
->x
,
1647 if (target
!= if_info
->x
)
1648 noce_emit_move_insn (if_info
->x
, target
);
1650 seq
= end_ifcvt_sequence (if_info
);
1651 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1654 emit_insn_before_setloc (seq
, if_info
->jump
,
1655 INSN_LOCATION (if_info
->insn_a
));
1656 if_info
->transform_name
= "noce_try_addcc";
1666 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1669 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1675 if (!noce_simple_bbs (if_info
))
1680 if ((if_info
->a
== const0_rtx
1681 && (REG_P (if_info
->b
) || rtx_equal_p (if_info
->b
, if_info
->x
)))
1682 || ((reversep
= (noce_reversed_cond_code (if_info
) != UNKNOWN
))
1683 && if_info
->b
== const0_rtx
1684 && (REG_P (if_info
->a
) || rtx_equal_p (if_info
->a
, if_info
->x
))))
1687 target
= noce_emit_store_flag (if_info
,
1688 gen_reg_rtx (GET_MODE (if_info
->x
)),
1691 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1692 reversep
? if_info
->a
: if_info
->b
,
1693 target
, if_info
->x
, 0,
1698 if (target
!= if_info
->x
)
1699 noce_emit_move_insn (if_info
->x
, target
);
1701 seq
= end_ifcvt_sequence (if_info
);
1702 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1705 emit_insn_before_setloc (seq
, if_info
->jump
,
1706 INSN_LOCATION (if_info
->insn_a
));
1707 if_info
->transform_name
= "noce_try_store_flag_mask";
1718 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1721 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1722 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
, rtx cc_cmp
,
1725 rtx target ATTRIBUTE_UNUSED
;
1726 int unsignedp ATTRIBUTE_UNUSED
;
1728 /* If earliest == jump, try to build the cmove insn directly.
1729 This is helpful when combine has created some complex condition
1730 (like for alpha's cmovlbs) that we can't hope to regenerate
1731 through the normal interface. */
1733 if (if_info
->cond_earliest
== if_info
->jump
)
1735 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1736 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1737 cond
, vtrue
, vfalse
);
1738 rtx set
= gen_rtx_SET (x
, if_then_else
);
1741 rtx_insn
*insn
= emit_insn (set
);
1743 if (recog_memoized (insn
) >= 0)
1745 rtx_insn
*seq
= get_insns ();
1755 unsignedp
= (code
== LTU
|| code
== GEU
1756 || code
== LEU
|| code
== GTU
);
1758 if (cc_cmp
!= NULL_RTX
&& rev_cc_cmp
!= NULL_RTX
)
1759 target
= emit_conditional_move (x
, cc_cmp
, rev_cc_cmp
,
1760 vtrue
, vfalse
, GET_MODE (x
));
1763 /* Don't even try if the comparison operands are weird
1764 except that the target supports cbranchcc4. */
1765 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1766 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1768 if (!have_cbranchcc4
1769 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1770 || cmp_b
!= const0_rtx
)
1774 target
= emit_conditional_move (x
, { code
, cmp_a
, cmp_b
, VOIDmode
},
1775 vtrue
, vfalse
, GET_MODE (x
),
1782 /* We might be faced with a situation like:
1785 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1786 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1788 We can't do a conditional move in mode M, but it's possible that we
1789 could do a conditional move in mode N instead and take a subreg of
1792 If we can't create new pseudos, though, don't bother. */
1793 if (reload_completed
)
1796 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1798 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1799 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1800 poly_uint64 byte_vtrue
= SUBREG_BYTE (vtrue
);
1801 poly_uint64 byte_vfalse
= SUBREG_BYTE (vfalse
);
1802 rtx promoted_target
;
1804 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1805 || maybe_ne (byte_vtrue
, byte_vfalse
)
1806 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1807 != SUBREG_PROMOTED_VAR_P (vfalse
))
1808 || (SUBREG_PROMOTED_GET (vtrue
)
1809 != SUBREG_PROMOTED_GET (vfalse
)))
1812 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1814 target
= emit_conditional_move (promoted_target
,
1815 { code
, cmp_a
, cmp_b
, VOIDmode
},
1816 reg_vtrue
, reg_vfalse
,
1817 GET_MODE (reg_vtrue
), unsignedp
);
1818 /* Nope, couldn't do it in that mode either. */
1822 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1823 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1824 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1825 emit_move_insn (x
, target
);
1832 /* Try only simple constants and registers here. More complex cases
1833 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1834 has had a go at it. */
1837 noce_try_cmove (struct noce_if_info
*if_info
)
1843 if (!noce_simple_bbs (if_info
))
1846 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1847 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1851 code
= GET_CODE (if_info
->cond
);
1852 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1853 XEXP (if_info
->cond
, 0),
1854 XEXP (if_info
->cond
, 1),
1855 if_info
->a
, if_info
->b
);
1859 if (target
!= if_info
->x
)
1860 noce_emit_move_insn (if_info
->x
, target
);
1862 seq
= end_ifcvt_sequence (if_info
);
1863 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1866 emit_insn_before_setloc (seq
, if_info
->jump
,
1867 INSN_LOCATION (if_info
->insn_a
));
1868 if_info
->transform_name
= "noce_try_cmove";
1872 /* If both a and b are constants try a last-ditch transformation:
1873 if (test) x = a; else x = b;
1874 => x = (-(test != 0) & (b - a)) + a;
1875 Try this only if the target-specific expansion above has failed.
1876 The target-specific expander may want to generate sequences that
1877 we don't know about, so give them a chance before trying this
1879 else if (!targetm
.have_conditional_execution ()
1880 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
))
1882 machine_mode mode
= GET_MODE (if_info
->x
);
1883 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1884 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1885 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1892 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1893 /* Make sure we can represent the difference
1894 between the two values. */
1896 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1902 diff
= trunc_int_for_mode (diff
, mode
);
1903 target
= expand_simple_binop (mode
, AND
,
1904 target
, gen_int_mode (diff
, mode
),
1905 if_info
->x
, 0, OPTAB_WIDEN
);
1907 target
= expand_simple_binop (mode
, PLUS
,
1908 target
, gen_int_mode (ifalse
, mode
),
1909 if_info
->x
, 0, OPTAB_WIDEN
);
1912 if (target
!= if_info
->x
)
1913 noce_emit_move_insn (if_info
->x
, target
);
1915 seq
= end_ifcvt_sequence (if_info
);
1916 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1919 emit_insn_before_setloc (seq
, if_info
->jump
,
1920 INSN_LOCATION (if_info
->insn_a
));
1921 if_info
->transform_name
= "noce_try_cmove";
1937 /* Return true if X contains a conditional code mode rtx. */
1940 contains_ccmode_rtx_p (rtx x
)
1942 subrtx_iterator::array_type array
;
1943 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1944 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1950 /* Helper for bb_valid_for_noce_process_p. Validate that
1951 the rtx insn INSN is a single set that does not set
1952 the conditional register CC and is in general valid for
1956 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1959 || !NONJUMP_INSN_P (insn
)
1960 || (cc
&& set_of (cc
, insn
)))
1963 rtx sset
= single_set (insn
);
1965 /* Currently support only simple single sets in test_bb. */
1967 || !noce_operand_ok (SET_DEST (sset
))
1968 || contains_ccmode_rtx_p (SET_DEST (sset
))
1969 || !noce_operand_ok (SET_SRC (sset
)))
1976 /* Return true iff the registers that the insns in BB_A set do not get
1977 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1978 renamed later by the caller and so conflicts on it should be ignored
1979 in this function. */
1982 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1985 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1990 FOR_BB_INSNS (bb_a
, a_insn
)
1992 if (!active_insn_p (a_insn
))
1995 rtx sset_a
= single_set (a_insn
);
1999 BITMAP_FREE (bba_sets
);
2002 /* Record all registers that BB_A sets. */
2003 FOR_EACH_INSN_DEF (def
, a_insn
)
2004 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
2005 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
2010 FOR_BB_INSNS (bb_b
, b_insn
)
2012 if (!active_insn_p (b_insn
))
2015 rtx sset_b
= single_set (b_insn
);
2019 BITMAP_FREE (bba_sets
);
2023 /* Make sure this is a REG and not some instance
2024 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
2025 If we have a memory destination then we have a pair of simple
2026 basic blocks performing an operation of the form [addr] = c ? a : b.
2027 bb_valid_for_noce_process_p will have ensured that these are
2028 the only stores present. In that case [addr] should be the location
2029 to be renamed. Assert that the callers set this up properly. */
2030 if (MEM_P (SET_DEST (sset_b
)))
2031 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
2032 else if (!REG_P (SET_DEST (sset_b
)))
2034 BITMAP_FREE (bba_sets
);
2038 /* If the insn uses a reg set in BB_A return false. */
2039 FOR_EACH_INSN_USE (use
, b_insn
)
2041 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
2043 BITMAP_FREE (bba_sets
);
2050 BITMAP_FREE (bba_sets
);
2054 /* Emit copies of all the active instructions in BB except the last.
2055 This is a helper for noce_try_cmove_arith. */
2058 noce_emit_all_but_last (basic_block bb
)
2060 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
2062 FOR_BB_INSNS (bb
, insn
)
2064 if (insn
!= last
&& active_insn_p (insn
))
2066 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
2068 emit_insn (PATTERN (to_emit
));
2073 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
2074 the resulting insn or NULL if it's not a valid insn. */
2077 noce_emit_insn (rtx to_emit
)
2079 gcc_assert (to_emit
);
2080 rtx_insn
*insn
= emit_insn (to_emit
);
2082 if (recog_memoized (insn
) < 0)
2088 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
2089 and including the penultimate one in BB if it is not simple
2090 (as indicated by SIMPLE). Then emit LAST_INSN as the last
2091 insn in the block. The reason for that is that LAST_INSN may
2092 have been modified by the preparation in noce_try_cmove_arith. */
2095 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
2098 noce_emit_all_but_last (bb
);
2100 if (last_insn
&& !noce_emit_insn (last_insn
))
2106 /* Try more complex cases involving conditional_move. */
2109 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2115 rtx_insn
*insn_a
, *insn_b
;
2116 bool a_simple
= if_info
->then_simple
;
2117 bool b_simple
= if_info
->else_simple
;
2118 basic_block then_bb
= if_info
->then_bb
;
2119 basic_block else_bb
= if_info
->else_bb
;
2123 rtx cond
= if_info
->cond
;
2124 rtx_insn
*ifcvt_seq
;
2126 /* A conditional move from two memory sources is equivalent to a
2127 conditional on their addresses followed by a load. Don't do this
2128 early because it'll screw alias analysis. Note that we've
2129 already checked for no side effects. */
2130 if (cse_not_expected
2131 && MEM_P (a
) && MEM_P (b
)
2132 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
))
2134 machine_mode address_mode
= get_address_mode (a
);
2138 x
= gen_reg_rtx (address_mode
);
2142 /* ??? We could handle this if we knew that a load from A or B could
2143 not trap or fault. This is also true if we've already loaded
2144 from the address along the path from ENTRY. */
2145 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2148 /* if (test) x = a + b; else x = c - d;
2155 code
= GET_CODE (cond
);
2156 insn_a
= if_info
->insn_a
;
2157 insn_b
= if_info
->insn_b
;
2159 machine_mode x_mode
= GET_MODE (x
);
2161 if (!can_conditionally_move_p (x_mode
))
2164 /* Possibly rearrange operands to make things come out more natural. */
2165 if (noce_reversed_cond_code (if_info
) != UNKNOWN
)
2168 if (rtx_equal_p (b
, x
))
2170 else if (general_operand (b
, GET_MODE (b
)))
2175 if (if_info
->rev_cond
)
2177 cond
= if_info
->rev_cond
;
2178 code
= GET_CODE (cond
);
2181 code
= reversed_comparison_code (cond
, if_info
->jump
);
2183 std::swap (insn_a
, insn_b
);
2184 std::swap (a_simple
, b_simple
);
2185 std::swap (then_bb
, else_bb
);
2189 if (then_bb
&& else_bb
2190 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2191 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2196 /* If one of the blocks is empty then the corresponding B or A value
2197 came from the test block. The non-empty complex block that we will
2198 emit might clobber the register used by B or A, so move it to a pseudo
2201 rtx tmp_a
= NULL_RTX
;
2202 rtx tmp_b
= NULL_RTX
;
2204 if (b_simple
|| !else_bb
)
2205 tmp_b
= gen_reg_rtx (x_mode
);
2207 if (a_simple
|| !then_bb
)
2208 tmp_a
= gen_reg_rtx (x_mode
);
2213 rtx emit_a
= NULL_RTX
;
2214 rtx emit_b
= NULL_RTX
;
2215 rtx_insn
*tmp_insn
= NULL
;
2216 bool modified_in_a
= false;
2217 bool modified_in_b
= false;
2218 /* If either operand is complex, load it into a register first.
2219 The best way to do this is to copy the original insn. In this
2220 way we preserve any clobbers etc that the insn may have had.
2221 This is of course not possible in the IS_MEM case. */
2223 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2228 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2229 emit_a
= gen_rtx_SET (reg
, a
);
2235 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2237 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2238 rtx set
= single_set (copy_of_a
);
2241 emit_a
= PATTERN (copy_of_a
);
2245 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2246 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2252 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2256 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2257 emit_b
= gen_rtx_SET (reg
, b
);
2263 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2264 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2265 rtx set
= single_set (copy_of_b
);
2268 emit_b
= PATTERN (copy_of_b
);
2272 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2273 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2279 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2280 if (tmp_b
&& then_bb
)
2282 FOR_BB_INSNS (then_bb
, tmp_insn
)
2283 /* Don't check inside insn_a. We will have changed it to emit_a
2284 with a destination that doesn't conflict. */
2285 if (!(insn_a
&& tmp_insn
== insn_a
)
2286 && modified_in_p (orig_b
, tmp_insn
))
2288 modified_in_a
= true;
2294 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2295 if (tmp_a
&& else_bb
)
2297 FOR_BB_INSNS (else_bb
, tmp_insn
)
2298 /* Don't check inside insn_b. We will have changed it to emit_b
2299 with a destination that doesn't conflict. */
2300 if (!(insn_b
&& tmp_insn
== insn_b
)
2301 && modified_in_p (orig_a
, tmp_insn
))
2303 modified_in_b
= true;
2308 /* If insn to set up A clobbers any registers B depends on, try to
2309 swap insn that sets up A with the one that sets up B. If even
2310 that doesn't help, punt. */
2311 if (modified_in_a
&& !modified_in_b
)
2313 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2314 goto end_seq_and_fail
;
2316 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2317 goto end_seq_and_fail
;
2319 else if (!modified_in_a
)
2321 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2322 goto end_seq_and_fail
;
2324 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2325 goto end_seq_and_fail
;
2328 goto end_seq_and_fail
;
2330 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (cond
, 0), XEXP (cond
, 1),
2334 goto end_seq_and_fail
;
2336 /* If we're handling a memory for above, emit the load now. */
2339 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2341 /* Copy over flags as appropriate. */
2342 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2343 MEM_VOLATILE_P (mem
) = 1;
2344 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2345 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2347 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2349 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2350 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2352 noce_emit_move_insn (if_info
->x
, mem
);
2354 else if (target
!= x
)
2355 noce_emit_move_insn (x
, target
);
2357 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2358 if (!ifcvt_seq
|| !targetm
.noce_conversion_profitable_p (ifcvt_seq
, if_info
))
2361 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2362 INSN_LOCATION (if_info
->insn_a
));
2363 if_info
->transform_name
= "noce_try_cmove_arith";
2371 /* For most cases, the simplified condition we found is the best
2372 choice, but this is not the case for the min/max/abs transforms.
2373 For these we wish to know that it is A or B in the condition. */
2376 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2377 rtx_insn
**earliest
)
2383 /* If target is already mentioned in the known condition, return it. */
2384 if (reg_mentioned_p (target
, if_info
->cond
))
2386 *earliest
= if_info
->cond_earliest
;
2387 return if_info
->cond
;
2390 set
= pc_set (if_info
->jump
);
2391 cond
= XEXP (SET_SRC (set
), 0);
2393 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2394 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2395 if (if_info
->then_else_reversed
)
2398 /* If we're looking for a constant, try to make the conditional
2399 have that constant in it. There are two reasons why it may
2400 not have the constant we want:
2402 1. GCC may have needed to put the constant in a register, because
2403 the target can't compare directly against that constant. For
2404 this case, we look for a SET immediately before the comparison
2405 that puts a constant in that register.
2407 2. GCC may have canonicalized the conditional, for example
2408 replacing "if x < 4" with "if x <= 3". We can undo that (or
2409 make equivalent types of changes) to get the constants we need
2410 if they're off by one in the right direction. */
2412 if (CONST_INT_P (target
))
2414 enum rtx_code code
= GET_CODE (if_info
->cond
);
2415 rtx op_a
= XEXP (if_info
->cond
, 0);
2416 rtx op_b
= XEXP (if_info
->cond
, 1);
2417 rtx_insn
*prev_insn
;
2419 /* First, look to see if we put a constant in a register. */
2420 prev_insn
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2422 && BLOCK_FOR_INSN (prev_insn
)
2423 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2424 && INSN_P (prev_insn
)
2425 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2427 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2429 src
= SET_SRC (PATTERN (prev_insn
));
2430 if (CONST_INT_P (src
))
2432 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2434 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2437 if (CONST_INT_P (op_a
))
2439 std::swap (op_a
, op_b
);
2440 code
= swap_condition (code
);
2445 /* Now, look to see if we can get the right constant by
2446 adjusting the conditional. */
2447 if (CONST_INT_P (op_b
))
2449 HOST_WIDE_INT desired_val
= INTVAL (target
);
2450 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2455 if (desired_val
!= HOST_WIDE_INT_MAX
2456 && actual_val
== desired_val
+ 1)
2459 op_b
= GEN_INT (desired_val
);
2463 if (desired_val
!= HOST_WIDE_INT_MIN
2464 && actual_val
== desired_val
- 1)
2467 op_b
= GEN_INT (desired_val
);
2471 if (desired_val
!= HOST_WIDE_INT_MIN
2472 && actual_val
== desired_val
- 1)
2475 op_b
= GEN_INT (desired_val
);
2479 if (desired_val
!= HOST_WIDE_INT_MAX
2480 && actual_val
== desired_val
+ 1)
2483 op_b
= GEN_INT (desired_val
);
2491 /* If we made any changes, generate a new conditional that is
2492 equivalent to what we started with, but has the right
2494 if (code
!= GET_CODE (if_info
->cond
)
2495 || op_a
!= XEXP (if_info
->cond
, 0)
2496 || op_b
!= XEXP (if_info
->cond
, 1))
2498 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2499 *earliest
= if_info
->cond_earliest
;
2504 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2505 earliest
, target
, have_cbranchcc4
, true);
2506 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2509 /* We almost certainly searched back to a different place.
2510 Need to re-verify correct lifetimes. */
2512 /* X may not be mentioned in the range (cond_earliest, jump]. */
2513 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2514 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2517 /* A and B may not be modified in the range [cond_earliest, jump). */
2518 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2520 && (modified_in_p (if_info
->a
, insn
)
2521 || modified_in_p (if_info
->b
, insn
)))
2527 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2530 noce_try_minmax (struct noce_if_info
*if_info
)
2533 rtx_insn
*earliest
, *seq
;
2534 enum rtx_code code
, op
;
2537 if (!noce_simple_bbs (if_info
))
2540 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2541 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2542 to get the target to tell us... */
2543 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2544 || HONOR_NANS (if_info
->x
))
2547 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2551 /* Verify the condition is of the form we expect, and canonicalize
2552 the comparison code. */
2553 code
= GET_CODE (cond
);
2554 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2556 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2559 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2561 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2563 code
= swap_condition (code
);
2568 /* Determine what sort of operation this is. Note that the code is for
2569 a taken branch, so the code->operation mapping appears backwards. */
2602 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2603 if_info
->a
, if_info
->b
,
2604 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2610 if (target
!= if_info
->x
)
2611 noce_emit_move_insn (if_info
->x
, target
);
2613 seq
= end_ifcvt_sequence (if_info
);
2617 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2618 if_info
->cond
= cond
;
2619 if_info
->cond_earliest
= earliest
;
2620 if_info
->rev_cond
= NULL_RTX
;
2621 if_info
->transform_name
= "noce_try_minmax";
2626 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2627 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2631 noce_try_abs (struct noce_if_info
*if_info
)
2633 rtx cond
, target
, a
, b
, c
;
2634 rtx_insn
*earliest
, *seq
;
2636 bool one_cmpl
= false;
2638 if (!noce_simple_bbs (if_info
))
2641 /* Reject modes with signed zeros. */
2642 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2645 /* Recognize A and B as constituting an ABS or NABS. The canonical
2646 form is a branch around the negation, taken when the object is the
2647 first operand of a comparison against 0 that evaluates to true. */
2650 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2652 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2657 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2662 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2671 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2675 /* Verify the condition is of the form we expect. */
2676 if (rtx_equal_p (XEXP (cond
, 0), b
))
2678 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2686 /* Verify that C is zero. Search one step backward for a
2687 REG_EQUAL note or a simple source if necessary. */
2691 rtx_insn
*insn
= prev_nonnote_nondebug_insn (earliest
);
2693 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2694 && (set
= single_set (insn
))
2695 && rtx_equal_p (SET_DEST (set
), c
))
2697 rtx note
= find_reg_equal_equiv_note (insn
);
2707 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2708 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2709 c
= get_pool_constant (XEXP (c
, 0));
2711 /* Work around funny ideas get_condition has wrt canonicalization.
2712 Note that these rtx constants are known to be CONST_INT, and
2713 therefore imply integer comparisons.
2714 The one_cmpl case is more complicated, as we want to handle
2715 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2716 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2717 but not other cases (x > -1 is equivalent of x >= 0). */
2718 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2720 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2725 else if (c
== CONST0_RTX (GET_MODE (b
)))
2728 && GET_CODE (cond
) != GE
2729 && GET_CODE (cond
) != LT
)
2735 /* Determine what sort of operation this is. */
2736 switch (GET_CODE (cond
))
2755 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2758 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2760 /* ??? It's a quandary whether cmove would be better here, especially
2761 for integers. Perhaps combine will clean things up. */
2762 if (target
&& negate
)
2765 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2768 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2778 if (target
!= if_info
->x
)
2779 noce_emit_move_insn (if_info
->x
, target
);
2781 seq
= end_ifcvt_sequence (if_info
);
2785 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2786 if_info
->cond
= cond
;
2787 if_info
->cond_earliest
= earliest
;
2788 if_info
->rev_cond
= NULL_RTX
;
2789 if_info
->transform_name
= "noce_try_abs";
2794 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2797 noce_try_sign_mask (struct noce_if_info
*if_info
)
2803 bool t_unconditional
;
2805 if (!noce_simple_bbs (if_info
))
2808 cond
= if_info
->cond
;
2809 code
= GET_CODE (cond
);
2814 if (if_info
->a
== const0_rtx
)
2816 if ((code
== LT
&& c
== const0_rtx
)
2817 || (code
== LE
&& c
== constm1_rtx
))
2820 else if (if_info
->b
== const0_rtx
)
2822 if ((code
== GE
&& c
== const0_rtx
)
2823 || (code
== GT
&& c
== constm1_rtx
))
2827 if (! t
|| side_effects_p (t
))
2830 /* We currently don't handle different modes. */
2831 mode
= GET_MODE (t
);
2832 if (GET_MODE (m
) != mode
)
2835 /* This is only profitable if T is unconditionally executed/evaluated in the
2836 original insn sequence or T is cheap. The former happens if B is the
2837 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2838 INSN_B which can happen for e.g. conditional stores to memory. For the
2839 cost computation use the block TEST_BB where the evaluation will end up
2840 after the transformation. */
2843 && (if_info
->insn_b
== NULL_RTX
2844 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2845 if (!(t_unconditional
2846 || (set_src_cost (t
, mode
, if_info
->speed_p
)
2847 < COSTS_N_INSNS (2))))
2850 if (!noce_can_force_operand (t
))
2854 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2855 "(signed) m >> 31" directly. This benefits targets with specialized
2856 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2857 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2858 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2867 noce_emit_move_insn (if_info
->x
, t
);
2869 seq
= end_ifcvt_sequence (if_info
);
2873 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2874 if_info
->transform_name
= "noce_try_sign_mask";
2880 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2884 noce_try_bitop (struct noce_if_info
*if_info
)
2886 rtx cond
, x
, a
, result
;
2888 scalar_int_mode mode
;
2893 cond
= if_info
->cond
;
2894 code
= GET_CODE (cond
);
2896 /* Check for an integer operation. */
2897 if (!is_a
<scalar_int_mode
> (GET_MODE (x
), &mode
))
2900 if (!noce_simple_bbs (if_info
))
2903 /* Check for no else condition. */
2904 if (! rtx_equal_p (x
, if_info
->b
))
2907 /* Check for a suitable condition. */
2908 if (code
!= NE
&& code
!= EQ
)
2910 if (XEXP (cond
, 1) != const0_rtx
)
2912 cond
= XEXP (cond
, 0);
2914 /* ??? We could also handle AND here. */
2915 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2917 if (XEXP (cond
, 1) != const1_rtx
2918 || !CONST_INT_P (XEXP (cond
, 2))
2919 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2921 bitnum
= INTVAL (XEXP (cond
, 2));
2922 if (BITS_BIG_ENDIAN
)
2923 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2924 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2931 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2933 /* Check for "if (X & C) x = x op C". */
2934 if (! rtx_equal_p (x
, XEXP (a
, 0))
2935 || !CONST_INT_P (XEXP (a
, 1))
2936 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2937 != HOST_WIDE_INT_1U
<< bitnum
)
2940 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2941 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2942 if (GET_CODE (a
) == IOR
)
2943 result
= (code
== NE
) ? a
: NULL_RTX
;
2944 else if (code
== NE
)
2946 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2947 result
= gen_int_mode (HOST_WIDE_INT_1
<< bitnum
, mode
);
2948 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2952 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2953 result
= gen_int_mode (~(HOST_WIDE_INT_1
<< bitnum
), mode
);
2954 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2957 else if (GET_CODE (a
) == AND
)
2959 /* Check for "if (X & C) x &= ~C". */
2960 if (! rtx_equal_p (x
, XEXP (a
, 0))
2961 || !CONST_INT_P (XEXP (a
, 1))
2962 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2963 != (~(HOST_WIDE_INT_1
<< bitnum
) & GET_MODE_MASK (mode
)))
2966 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2967 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2968 result
= (code
== EQ
) ? a
: NULL_RTX
;
2976 noce_emit_move_insn (x
, result
);
2977 seq
= end_ifcvt_sequence (if_info
);
2981 emit_insn_before_setloc (seq
, if_info
->jump
,
2982 INSN_LOCATION (if_info
->insn_a
));
2984 if_info
->transform_name
= "noce_try_bitop";
2989 /* Similar to get_condition, only the resulting condition must be
2990 valid at JUMP, instead of at EARLIEST.
2992 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2993 THEN block of the caller, and we have to reverse the condition. */
2996 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
3001 if (! any_condjump_p (jump
))
3004 set
= pc_set (jump
);
3006 /* If this branches to JUMP_LABEL when the condition is false,
3007 reverse the condition. */
3008 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
3009 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
3011 /* We may have to reverse because the caller's if block is not canonical,
3012 i.e. the THEN block isn't the fallthrough block for the TEST block
3013 (see find_if_header). */
3014 if (then_else_reversed
)
3017 /* If the condition variable is a register and is MODE_INT, accept it. */
3019 cond
= XEXP (SET_SRC (set
), 0);
3020 tmp
= XEXP (cond
, 0);
3021 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
3022 && (GET_MODE (tmp
) != BImode
3023 || !targetm
.small_register_classes_for_mode_p (BImode
)))
3028 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
3029 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
3033 /* Otherwise, fall back on canonicalize_condition to do the dirty
3034 work of manipulating MODE_CC values and COMPARE rtx codes. */
3035 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
3036 NULL_RTX
, have_cbranchcc4
, true);
3038 /* We don't handle side-effects in the condition, like handling
3039 REG_INC notes and making sure no duplicate conditions are emitted. */
3040 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
3046 /* Return true if OP is ok for if-then-else processing. */
3049 noce_operand_ok (const_rtx op
)
3051 if (side_effects_p (op
))
3054 /* We special-case memories, so handle any of them with
3055 no address side effects. */
3057 return ! side_effects_p (XEXP (op
, 0));
3059 return ! may_trap_p (op
);
3062 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3063 The condition used in this if-conversion is in COND.
3064 In practice, check that TEST_BB ends with a single set
3065 x := a and all previous computations
3066 in TEST_BB don't produce any values that are live after TEST_BB.
3067 In other words, all the insns in TEST_BB are there only
3068 to compute a value for x. Add the rtx cost of the insns
3069 in TEST_BB to COST. Record whether TEST_BB is a single simple
3070 set instruction in SIMPLE_P. */
3073 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3074 unsigned int *cost
, bool *simple_p
)
3079 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
3080 rtx last_set
= NULL_RTX
;
3082 rtx cc
= cc_in_cond (cond
);
3084 if (!insn_valid_noce_process_p (last_insn
, cc
))
3087 /* Punt on blocks ending with asm goto or jumps with other side-effects,
3088 last_active_insn ignores JUMP_INSNs. */
3089 if (JUMP_P (BB_END (test_bb
)) && !onlyjump_p (BB_END (test_bb
)))
3092 last_set
= single_set (last_insn
);
3094 rtx x
= SET_DEST (last_set
);
3095 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3096 rtx first_set
= single_set (first_insn
);
3101 /* We have a single simple set, that's okay. */
3102 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3104 if (first_insn
== last_insn
)
3106 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3107 *cost
+= pattern_cost (first_set
, speed_p
);
3111 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3112 gcc_assert (prev_last_insn
);
3114 /* For now, disallow setting x multiple times in test_bb. */
3115 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3118 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3120 /* The regs that are live out of test_bb. */
3121 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3123 int potential_cost
= pattern_cost (last_set
, speed_p
);
3125 FOR_BB_INSNS (test_bb
, insn
)
3127 if (insn
!= last_insn
)
3129 if (!active_insn_p (insn
))
3132 if (!insn_valid_noce_process_p (insn
, cc
))
3133 goto free_bitmap_and_fail
;
3135 rtx sset
= single_set (insn
);
3138 if (contains_mem_rtx_p (SET_SRC (sset
))
3139 || !REG_P (SET_DEST (sset
))
3140 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3141 goto free_bitmap_and_fail
;
3143 potential_cost
+= pattern_cost (sset
, speed_p
);
3144 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3148 /* If any of the intermediate results in test_bb are live after test_bb
3150 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3151 goto free_bitmap_and_fail
;
3153 BITMAP_FREE (test_bb_temps
);
3154 *cost
+= potential_cost
;
3158 free_bitmap_and_fail
:
3159 BITMAP_FREE (test_bb_temps
);
3163 /* Helper function to emit a cmov sequence encapsulated in
3164 start_sequence () and end_sequence (). If NEED_CMOV is true
3165 we call noce_emit_cmove to create a cmove sequence. Otherwise emit
3166 a simple move. If successful, store the first instruction of the
3167 sequence in TEMP_DEST and the sequence costs in SEQ_COST. */
3170 try_emit_cmove_seq (struct noce_if_info
*if_info
, rtx temp
,
3171 rtx cond
, rtx new_val
, rtx old_val
, bool need_cmov
,
3172 unsigned *cost
, rtx
*temp_dest
,
3173 rtx cc_cmp
= NULL
, rtx rev_cc_cmp
= NULL
)
3175 rtx_insn
*seq
= NULL
;
3178 rtx x
= XEXP (cond
, 0);
3179 rtx y
= XEXP (cond
, 1);
3180 rtx_code cond_code
= GET_CODE (cond
);
3185 *temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3186 x
, y
, new_val
, old_val
, cc_cmp
, rev_cc_cmp
);
3190 if (if_info
->then_else_reversed
)
3191 noce_emit_move_insn (temp
, old_val
);
3193 noce_emit_move_insn (temp
, new_val
);
3196 if (*temp_dest
!= NULL_RTX
)
3199 *cost
= seq_cost (seq
, if_info
->speed_p
);
3207 /* We have something like:
3210 { i = a; j = b; k = c; }
3214 tmp_i = (x > y) ? a : i;
3215 tmp_j = (x > y) ? b : j;
3216 tmp_k = (x > y) ? c : k;
3221 Subsequent passes are expected to clean up the extra moves.
3223 Look for special cases such as writes to one register which are
3224 read back in another SET, as might occur in a swap idiom or
3233 Which we want to rewrite to:
3235 tmp_i = (x > y) ? a : i;
3236 tmp_j = (x > y) ? tmp_i : j;
3240 We can catch these when looking at (SET x y) by keeping a list of the
3241 registers we would have targeted before if-conversion and looking back
3242 through it for an overlap with Y. If we find one, we rewire the
3243 conditional set to use the temporary we introduced earlier.
3245 IF_INFO contains the useful information about the block structure and
3246 jump instructions. */
3249 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3251 basic_block test_bb
= if_info
->test_bb
;
3252 basic_block then_bb
= if_info
->then_bb
;
3253 basic_block join_bb
= if_info
->join_bb
;
3254 rtx_insn
*jump
= if_info
->jump
;
3255 rtx_insn
*cond_earliest
;
3260 /* Decompose the condition attached to the jump. */
3261 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3262 rtx x
= XEXP (cond
, 0);
3263 rtx y
= XEXP (cond
, 1);
3265 /* The true targets for a conditional move. */
3266 auto_vec
<rtx
> targets
;
3267 /* The temporaries introduced to allow us to not consider register
3269 auto_vec
<rtx
> temporaries
;
3270 /* The insns we've emitted. */
3271 auto_vec
<rtx_insn
*> unmodified_insns
;
3273 hash_set
<rtx_insn
*> need_no_cmov
;
3274 hash_map
<rtx_insn
*, int> rewired_src
;
3276 need_cmov_or_rewire (then_bb
, &need_no_cmov
, &rewired_src
);
3278 int last_needs_comparison
= -1;
3280 bool ok
= noce_convert_multiple_sets_1
3281 (if_info
, &need_no_cmov
, &rewired_src
, &targets
, &temporaries
,
3282 &unmodified_insns
, &last_needs_comparison
);
3286 /* If there are insns that overwrite part of the initial
3287 comparison, we can still omit creating temporaries for
3289 As the second try will always create a less expensive,
3290 valid sequence, we do not need to compare and can discard
3292 if (last_needs_comparison
!= -1)
3296 ok
= noce_convert_multiple_sets_1
3297 (if_info
, &need_no_cmov
, &rewired_src
, &targets
, &temporaries
,
3298 &unmodified_insns
, &last_needs_comparison
);
3299 /* Actually we should not fail anymore if we reached here,
3300 but better still check. */
3305 /* We must have seen some sort of insn to insert, otherwise we were
3306 given an empty BB to convert, and we can't handle that. */
3307 gcc_assert (!unmodified_insns
.is_empty ());
3309 /* Now fixup the assignments. */
3310 for (unsigned i
= 0; i
< targets
.length (); i
++)
3311 if (targets
[i
] != temporaries
[i
])
3312 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3314 /* Actually emit the sequence if it isn't too expensive. */
3315 rtx_insn
*seq
= get_insns ();
3317 if (!targetm
.noce_conversion_profitable_p (seq
, if_info
))
3323 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3324 set_used_flags (insn
);
3326 /* Mark all our temporaries and targets as used. */
3327 for (unsigned i
= 0; i
< targets
.length (); i
++)
3329 set_used_flags (temporaries
[i
]);
3330 set_used_flags (targets
[i
]);
3333 set_used_flags (cond
);
3337 unshare_all_rtl_in_chain (seq
);
3343 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3345 || recog_memoized (insn
) == -1)
3348 emit_insn_before_setloc (seq
, if_info
->jump
,
3349 INSN_LOCATION (unmodified_insns
.last ()));
3351 /* Clean up THEN_BB and the edges in and out of it. */
3352 remove_edge (find_edge (test_bb
, join_bb
));
3353 remove_edge (find_edge (then_bb
, join_bb
));
3354 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3355 delete_basic_block (then_bb
);
3358 /* Maybe merge blocks now the jump is simple enough. */
3359 if (can_merge_blocks_p (test_bb
, join_bb
))
3361 merge_blocks (test_bb
, join_bb
);
3365 num_updated_if_blocks
++;
3366 if_info
->transform_name
= "noce_convert_multiple_sets";
3370 /* This goes through all relevant insns of IF_INFO->then_bb and tries to
3371 create conditional moves. In case a simple move sufficis the insn
3372 should be listed in NEED_NO_CMOV. The rewired-src cases should be
3373 specified via REWIRED_SRC. TARGETS, TEMPORARIES and UNMODIFIED_INSNS
3374 are specified and used in noce_convert_multiple_sets and should be passed
3375 to this function.. */
3378 noce_convert_multiple_sets_1 (struct noce_if_info
*if_info
,
3379 hash_set
<rtx_insn
*> *need_no_cmov
,
3380 hash_map
<rtx_insn
*, int> *rewired_src
,
3381 auto_vec
<rtx
> *targets
,
3382 auto_vec
<rtx
> *temporaries
,
3383 auto_vec
<rtx_insn
*> *unmodified_insns
,
3384 int *last_needs_comparison
)
3386 basic_block then_bb
= if_info
->then_bb
;
3387 rtx_insn
*jump
= if_info
->jump
;
3388 rtx_insn
*cond_earliest
;
3390 /* Decompose the condition attached to the jump. */
3391 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3393 rtx cc_cmp
= cond_exec_get_condition (jump
);
3395 cc_cmp
= copy_rtx (cc_cmp
);
3396 rtx rev_cc_cmp
= cond_exec_get_condition (jump
, /* get_reversed */ true);
3398 rev_cc_cmp
= copy_rtx (rev_cc_cmp
);
3403 targets
->truncate (0);
3404 temporaries
->truncate (0);
3405 unmodified_insns
->truncate (0);
3407 bool second_try
= *last_needs_comparison
!= -1;
3409 FOR_BB_INSNS (then_bb
, insn
)
3411 /* Skip over non-insns. */
3412 if (!active_insn_p (insn
))
3415 rtx set
= single_set (insn
);
3416 gcc_checking_assert (set
);
3418 rtx target
= SET_DEST (set
);
3421 rtx new_val
= SET_SRC (set
);
3422 if (int *ii
= rewired_src
->get (insn
))
3423 new_val
= simplify_replace_rtx (new_val
, (*targets
)[*ii
],
3424 (*temporaries
)[*ii
]);
3425 rtx old_val
= target
;
3427 /* As we are transforming
3437 we potentially check x > y before every set.
3438 Even though the check might be removed by subsequent passes, this means
3439 that we cannot transform
3448 since this would invalidate x and the following to-be-removed checks.
3449 Therefore we introduce a temporary every time we are about to
3450 overwrite a variable used in the check. Costing of a sequence with
3451 these is going to be inaccurate so only use temporaries when
3454 If performing a second try, we know how many insns require a
3455 temporary. For the last of these, we can omit creating one. */
3456 if (reg_overlap_mentioned_p (target
, cond
)
3457 && (!second_try
|| count
< *last_needs_comparison
))
3458 temp
= gen_reg_rtx (GET_MODE (target
));
3462 /* We have identified swap-style idioms before. A normal
3463 set will need to be a cmov while the first instruction of a swap-style
3464 idiom can be a regular move. This helps with costing. */
3465 bool need_cmov
= !need_no_cmov
->contains (insn
);
3467 /* If we had a non-canonical conditional jump (i.e. one where
3468 the fallthrough is to the "else" case) we need to reverse
3469 the conditional select. */
3470 if (if_info
->then_else_reversed
)
3471 std::swap (old_val
, new_val
);
3474 /* We allow simple lowpart register subreg SET sources in
3475 bb_ok_for_noce_convert_multiple_sets. Be careful when processing
3477 (set (reg:SI r1) (reg:SI r2))
3478 (set (reg:HI r3) (subreg:HI (r1)))
3479 For the second insn new_val or old_val (r1 in this example) will be
3480 taken from the temporaries and have the wider mode which will not
3481 match with the mode of the other source of the conditional move, so
3482 we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
3483 Wrap the two cmove operands into subregs if appropriate to prevent
3486 if (!CONSTANT_P (new_val
)
3487 && GET_MODE (new_val
) != GET_MODE (temp
))
3489 machine_mode src_mode
= GET_MODE (new_val
);
3490 machine_mode dst_mode
= GET_MODE (temp
);
3491 if (!partial_subreg_p (dst_mode
, src_mode
))
3496 new_val
= lowpart_subreg (dst_mode
, new_val
, src_mode
);
3498 if (!CONSTANT_P (old_val
)
3499 && GET_MODE (old_val
) != GET_MODE (temp
))
3501 machine_mode src_mode
= GET_MODE (old_val
);
3502 machine_mode dst_mode
= GET_MODE (temp
);
3503 if (!partial_subreg_p (dst_mode
, src_mode
))
3508 old_val
= lowpart_subreg (dst_mode
, old_val
, src_mode
);
3511 /* Try emitting a conditional move passing the backend the
3512 canonicalized comparison. The backend is then able to
3513 recognize expressions like
3518 as min/max and emit an insn, accordingly. */
3519 unsigned cost1
= 0, cost2
= 0;
3520 rtx_insn
*seq
, *seq1
, *seq2
;
3521 rtx temp_dest
= NULL_RTX
, temp_dest1
= NULL_RTX
, temp_dest2
= NULL_RTX
;
3522 bool read_comparison
= false;
3524 seq1
= try_emit_cmove_seq (if_info
, temp
, cond
,
3525 new_val
, old_val
, need_cmov
,
3526 &cost1
, &temp_dest1
);
3528 /* Here, we try to pass the backend a non-canonicalized cc comparison
3529 as well. This allows the backend to emit a cmov directly without
3530 creating an additional compare for each. If successful, costing
3531 is easier and this sequence is usually preferred. */
3532 seq2
= try_emit_cmove_seq (if_info
, temp
, cond
,
3533 new_val
, old_val
, need_cmov
,
3534 &cost2
, &temp_dest2
, cc_cmp
, rev_cc_cmp
);
3536 /* The backend might have created a sequence that uses the
3537 condition. Check this. */
3538 rtx_insn
*walk
= seq2
;
3541 rtx set
= single_set (walk
);
3543 if (!set
|| !SET_SRC (set
))
3545 walk
= NEXT_INSN (walk
);
3549 rtx src
= SET_SRC (set
);
3551 if (XEXP (set
, 1) && GET_CODE (XEXP (set
, 1)) == IF_THEN_ELSE
)
3552 ; /* We assume that this is the cmove created by the backend that
3553 naturally uses the condition. Therefore we ignore it. */
3556 if (reg_mentioned_p (XEXP (cond
, 0), src
)
3557 || reg_mentioned_p (XEXP (cond
, 1), src
))
3559 read_comparison
= true;
3564 walk
= NEXT_INSN (walk
);
3567 /* Check which version is less expensive. */
3568 if (seq1
!= NULL_RTX
&& (cost1
<= cost2
|| seq2
== NULL_RTX
))
3571 temp_dest
= temp_dest1
;
3573 *last_needs_comparison
= count
;
3575 else if (seq2
!= NULL_RTX
)
3578 temp_dest
= temp_dest2
;
3579 if (!second_try
&& read_comparison
)
3580 *last_needs_comparison
= count
;
3584 /* Nothing worked, bail out. */
3589 /* End the sub sequence and emit to the main sequence. */
3594 targets
->safe_push (target
);
3595 temporaries
->safe_push (temp_dest
);
3596 unmodified_insns
->safe_push (insn
);
3599 /* Even if we did not actually need the comparison, we want to make sure
3600 to try a second time in order to get rid of the temporaries. */
3601 if (*last_needs_comparison
== -1)
3602 *last_needs_comparison
= 0;
3610 /* Return true iff basic block TEST_BB is comprised of only
3611 (SET (REG) (REG)) insns suitable for conversion to a series
3612 of conditional moves. Also check that we have more than one set
3613 (other routines can handle a single set better than we would), and
3614 fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going
3615 through the insns store the sum of their potential costs in COST. */
3618 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
, unsigned *cost
)
3622 unsigned param
= param_max_rtl_if_conversion_insns
;
3623 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3624 unsigned potential_cost
= 0;
3626 FOR_BB_INSNS (test_bb
, insn
)
3628 /* Skip over notes etc. */
3629 if (!active_insn_p (insn
))
3632 /* We only handle SET insns. */
3633 rtx set
= single_set (insn
);
3634 if (set
== NULL_RTX
)
3637 rtx dest
= SET_DEST (set
);
3638 rtx src
= SET_SRC (set
);
3640 /* We can possibly relax this, but for now only handle REG to REG
3641 (including subreg) moves. This avoids any issues that might come
3642 from introducing loads/stores that might violate data-race-freedom
3647 if (!((REG_P (src
) || CONSTANT_P (src
))
3648 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3649 && subreg_lowpart_p (src
))))
3652 /* Destination must be appropriate for a conditional write. */
3653 if (!noce_operand_ok (dest
))
3656 /* We must be able to conditionally move in this mode. */
3657 if (!can_conditionally_move_p (GET_MODE (dest
)))
3660 potential_cost
+= insn_cost (insn
, speed_p
);
3665 *cost
+= potential_cost
;
3667 /* If we would only put out one conditional move, the other strategies
3668 this pass tries are better optimized and will be more appropriate.
3669 Some targets want to strictly limit the number of conditional moves
3670 that are emitted, they set this through PARAM, we need to respect
3672 return count
> 1 && count
<= param
;
3675 /* Compute average of two given costs weighted by relative probabilities
3676 of respective basic blocks in an IF-THEN-ELSE. E is the IF-THEN edge.
3677 With P as the probability to take the IF-THEN branch, return
3678 P * THEN_COST + (1 - P) * ELSE_COST. */
3680 average_cost (unsigned then_cost
, unsigned else_cost
, edge e
)
3682 return else_cost
+ e
->probability
.apply ((signed) (then_cost
- else_cost
));
3685 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3686 it without using conditional execution. Return TRUE if we were successful
3687 at converting the block. */
3690 noce_process_if_block (struct noce_if_info
*if_info
)
3692 basic_block test_bb
= if_info
->test_bb
; /* test block */
3693 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3694 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3695 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3696 rtx_insn
*jump
= if_info
->jump
;
3697 rtx cond
= if_info
->cond
;
3698 rtx_insn
*insn_a
, *insn_b
;
3700 rtx orig_x
, x
, a
, b
;
3702 /* We're looking for patterns of the form
3704 (1) if (...) x = a; else x = b;
3705 (2) x = b; if (...) x = a;
3706 (3) if (...) x = a; // as if with an initial x = x.
3707 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3708 The later patterns require jumps to be more expensive.
3709 For the if (...) x = a; else x = b; case we allow multiple insns
3710 inside the then and else blocks as long as their only effect is
3711 to calculate a value for x.
3712 ??? For future expansion, further expand the "multiple X" rules. */
3714 /* First look for multiple SETS. The original costs already include
3715 a base cost of COSTS_N_INSNS (2): one instruction for the compare
3716 (which we will be needing either way) and one instruction for the
3717 branch. When comparing costs we want to use the branch instruction
3718 cost and the sets vs. the cmovs generated here. Therefore subtract
3719 the costs of the compare before checking.
3720 ??? Actually, instead of the branch instruction costs we might want
3721 to use COSTS_N_INSNS (BRANCH_COST ()) as in other places. */
3723 unsigned potential_cost
= if_info
->original_cost
- COSTS_N_INSNS (1);
3724 unsigned old_cost
= if_info
->original_cost
;
3726 && HAVE_conditional_move
3727 && bb_ok_for_noce_convert_multiple_sets (then_bb
, &potential_cost
))
3729 /* Temporarily set the original costs to what we estimated so
3730 we can determine if the transformation is worth it. */
3731 if_info
->original_cost
= potential_cost
;
3732 if (noce_convert_multiple_sets (if_info
))
3734 if (dump_file
&& if_info
->transform_name
)
3735 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3736 if_info
->transform_name
);
3740 /* Restore the original costs. */
3741 if_info
->original_cost
= old_cost
;
3744 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3745 unsigned int then_cost
= 0, else_cost
= 0;
3746 if (!bb_valid_for_noce_process_p (then_bb
, cond
, &then_cost
,
3747 &if_info
->then_simple
))
3751 && !bb_valid_for_noce_process_p (else_bb
, cond
, &else_cost
,
3752 &if_info
->else_simple
))
3756 if_info
->original_cost
+= average_cost (then_cost
, else_cost
,
3757 find_edge (test_bb
, then_bb
));
3759 if_info
->original_cost
+= then_cost
+ else_cost
;
3761 insn_a
= last_active_insn (then_bb
, FALSE
);
3762 set_a
= single_set (insn_a
);
3765 x
= SET_DEST (set_a
);
3766 a
= SET_SRC (set_a
);
3768 /* Look for the other potential set. Make sure we've got equivalent
3770 /* ??? This is overconservative. Storing to two different mems is
3771 as easy as conditionally computing the address. Storing to a
3772 single mem merely requires a scratch memory to use as one of the
3773 destination addresses; often the memory immediately below the
3774 stack pointer is available for this. */
3778 insn_b
= last_active_insn (else_bb
, FALSE
);
3779 set_b
= single_set (insn_b
);
3782 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3787 insn_b
= if_info
->cond_earliest
;
3789 insn_b
= prev_nonnote_nondebug_insn (insn_b
);
3791 && (BLOCK_FOR_INSN (insn_b
)
3792 == BLOCK_FOR_INSN (if_info
->cond_earliest
))
3793 && !modified_in_p (x
, insn_b
));
3795 /* We're going to be moving the evaluation of B down from above
3796 COND_EARLIEST to JUMP. Make sure the relevant data is still
3799 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3800 || !NONJUMP_INSN_P (insn_b
)
3801 || (set_b
= single_set (insn_b
)) == NULL_RTX
3802 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3803 || ! noce_operand_ok (SET_SRC (set_b
))
3804 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3805 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3806 /* Avoid extending the lifetime of hard registers on small
3807 register class machines. */
3808 || (REG_P (SET_SRC (set_b
))
3809 && HARD_REGISTER_P (SET_SRC (set_b
))
3810 && targetm
.small_register_classes_for_mode_p
3811 (GET_MODE (SET_SRC (set_b
))))
3812 /* Likewise with X. In particular this can happen when
3813 noce_get_condition looks farther back in the instruction
3814 stream than one might expect. */
3815 || reg_overlap_mentioned_p (x
, cond
)
3816 || reg_overlap_mentioned_p (x
, a
)
3817 || modified_between_p (x
, insn_b
, jump
))
3824 /* If x has side effects then only the if-then-else form is safe to
3825 convert. But even in that case we would need to restore any notes
3826 (such as REG_INC) at then end. That can be tricky if
3827 noce_emit_move_insn expands to more than one insn, so disable the
3828 optimization entirely for now if there are side effects. */
3829 if (side_effects_p (x
))
3832 b
= (set_b
? SET_SRC (set_b
) : x
);
3834 /* Only operate on register destinations, and even then avoid extending
3835 the lifetime of hard registers on small register class machines. */
3837 if_info
->orig_x
= orig_x
;
3839 || (HARD_REGISTER_P (x
)
3840 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3842 if (GET_MODE (x
) == BLKmode
)
3845 if (GET_CODE (x
) == ZERO_EXTRACT
3846 && (!CONST_INT_P (XEXP (x
, 1))
3847 || !CONST_INT_P (XEXP (x
, 2))))
3850 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3851 ? XEXP (x
, 0) : x
));
3854 /* Don't operate on sources that may trap or are volatile. */
3855 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3859 /* Set up the info block for our subroutines. */
3860 if_info
->insn_a
= insn_a
;
3861 if_info
->insn_b
= insn_b
;
3866 /* Try optimizations in some approximation of a useful order. */
3867 /* ??? Should first look to see if X is live incoming at all. If it
3868 isn't, we don't need anything but an unconditional set. */
3870 /* Look and see if A and B are really the same. Avoid creating silly
3871 cmove constructs that no one will fix up later. */
3872 if (noce_simple_bbs (if_info
)
3873 && rtx_interchangeable_p (a
, b
))
3875 /* If we have an INSN_B, we don't have to create any new rtl. Just
3876 move the instruction that we already have. If we don't have an
3877 INSN_B, that means that A == X, and we've got a noop move. In
3878 that case don't do anything and let the code below delete INSN_A. */
3879 if (insn_b
&& else_bb
)
3883 if (else_bb
&& insn_b
== BB_END (else_bb
))
3884 BB_END (else_bb
) = PREV_INSN (insn_b
);
3885 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3887 /* If there was a REG_EQUAL note, delete it since it may have been
3888 true due to this insn being after a jump. */
3889 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3890 remove_note (insn_b
, note
);
3894 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3895 x must be executed twice. */
3896 else if (insn_b
&& side_effects_p (orig_x
))
3903 if (!set_b
&& MEM_P (orig_x
))
3904 /* We want to avoid store speculation to avoid cases like
3905 if (pthread_mutex_trylock(mutex))
3907 Rather than go to much effort here, we rely on the SSA optimizers,
3908 which do a good enough job these days. */
3911 if (noce_try_move (if_info
))
3913 if (noce_try_ifelse_collapse (if_info
))
3915 if (noce_try_store_flag (if_info
))
3917 if (noce_try_bitop (if_info
))
3919 if (noce_try_minmax (if_info
))
3921 if (noce_try_abs (if_info
))
3923 if (noce_try_inverse_constants (if_info
))
3925 if (!targetm
.have_conditional_execution ()
3926 && noce_try_store_flag_constants (if_info
))
3928 if (HAVE_conditional_move
3929 && noce_try_cmove (if_info
))
3931 if (! targetm
.have_conditional_execution ())
3933 if (noce_try_addcc (if_info
))
3935 if (noce_try_store_flag_mask (if_info
))
3937 if (HAVE_conditional_move
3938 && noce_try_cmove_arith (if_info
))
3940 if (noce_try_sign_mask (if_info
))
3944 if (!else_bb
&& set_b
)
3955 if (dump_file
&& if_info
->transform_name
)
3956 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3957 if_info
->transform_name
);
3959 /* If we used a temporary, fix it up now. */
3965 noce_emit_move_insn (orig_x
, x
);
3967 set_used_flags (orig_x
);
3968 unshare_all_rtl_in_chain (seq
);
3971 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3974 /* The original THEN and ELSE blocks may now be removed. The test block
3975 must now jump to the join block. If the test block and the join block
3976 can be merged, do so. */
3979 delete_basic_block (else_bb
);
3983 remove_edge (find_edge (test_bb
, join_bb
));
3985 remove_edge (find_edge (then_bb
, join_bb
));
3986 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3987 delete_basic_block (then_bb
);
3990 if (can_merge_blocks_p (test_bb
, join_bb
))
3992 merge_blocks (test_bb
, join_bb
);
3996 num_updated_if_blocks
++;
4000 /* Check whether a block is suitable for conditional move conversion.
4001 Every insn must be a simple set of a register to a constant or a
4002 register. For each assignment, store the value in the pointer map
4003 VALS, keyed indexed by register pointer, then store the register
4004 pointer in REGS. COND is the condition we will test. */
4007 check_cond_move_block (basic_block bb
,
4008 hash_map
<rtx
, rtx
> *vals
,
4013 rtx cc
= cc_in_cond (cond
);
4015 /* We can only handle simple jumps at the end of the basic block.
4016 It is almost impossible to update the CFG otherwise. */
4018 if (JUMP_P (insn
) && !onlyjump_p (insn
))
4021 FOR_BB_INSNS (bb
, insn
)
4025 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
4027 set
= single_set (insn
);
4031 dest
= SET_DEST (set
);
4032 src
= SET_SRC (set
);
4034 || (HARD_REGISTER_P (dest
)
4035 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
4038 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
4041 if (side_effects_p (src
) || side_effects_p (dest
))
4044 if (may_trap_p (src
) || may_trap_p (dest
))
4047 /* Don't try to handle this if the source register was
4048 modified earlier in the block. */
4051 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
4052 && vals
->get (SUBREG_REG (src
))))
4055 /* Don't try to handle this if the destination register was
4056 modified earlier in the block. */
4057 if (vals
->get (dest
))
4060 /* Don't try to handle this if the condition uses the
4061 destination register. */
4062 if (reg_overlap_mentioned_p (dest
, cond
))
4065 /* Don't try to handle this if the source register is modified
4066 later in the block. */
4067 if (!CONSTANT_P (src
)
4068 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
4071 /* Skip it if the instruction to be moved might clobber CC. */
4072 if (cc
&& set_of (cc
, insn
))
4075 vals
->put (dest
, src
);
4077 regs
->safe_push (dest
);
4083 /* Find local swap-style idioms in BB and mark the first insn (1)
4084 that is only a temporary as not needing a conditional move as
4085 it is going to be dead afterwards anyway.
4095 a = cond ? b : a_old;
4096 b = cond ? tmp : b_old;
4098 Additionally, store the index of insns like (2) when a subsequent
4099 SET reads from their destination.
4107 c = cond ? a : c_old;
4108 d = cond ? d : c; // Need to use c rather than c_old here.
4112 need_cmov_or_rewire (basic_block bb
,
4113 hash_set
<rtx_insn
*> *need_no_cmov
,
4114 hash_map
<rtx_insn
*, int> *rewired_src
)
4118 auto_vec
<rtx_insn
*> insns
;
4119 auto_vec
<rtx
> dests
;
4121 /* Iterate over all SETs, storing the destinations
4123 - If we hit a SET that reads from a destination
4124 that we have seen before and the corresponding register
4125 is dead afterwards, the register does not need to be
4126 moved conditionally.
4127 - If we encounter a previously changed register,
4128 rewire the read to the original source. */
4129 FOR_BB_INSNS (bb
, insn
)
4133 if (!active_insn_p (insn
))
4136 set
= single_set (insn
);
4137 if (set
== NULL_RTX
)
4140 src
= SET_SRC (set
);
4142 src
= SUBREG_REG (src
);
4143 dest
= SET_DEST (set
);
4145 /* Check if the current SET's source is the same
4146 as any previously seen destination.
4147 This is quadratic but the number of insns in BB
4148 is bounded by PARAM_MAX_RTL_IF_CONVERSION_INSNS. */
4150 for (int i
= count
- 1; i
>= 0; --i
)
4151 if (reg_overlap_mentioned_p (src
, dests
[i
]))
4153 if (find_reg_note (insn
, REG_DEAD
, src
) != NULL_RTX
)
4154 need_no_cmov
->add (insns
[i
]);
4156 rewired_src
->put (insn
, i
);
4159 insns
.safe_push (insn
);
4160 dests
.safe_push (dest
);
4166 /* Given a basic block BB suitable for conditional move conversion,
4167 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
4168 the register values depending on COND, emit the insns in the block as
4169 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
4170 processed. The caller has started a sequence for the conversion.
4171 Return true if successful, false if something goes wrong. */
4174 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
4175 basic_block bb
, rtx cond
,
4176 hash_map
<rtx
, rtx
> *then_vals
,
4177 hash_map
<rtx
, rtx
> *else_vals
,
4182 rtx cond_arg0
, cond_arg1
;
4184 code
= GET_CODE (cond
);
4185 cond_arg0
= XEXP (cond
, 0);
4186 cond_arg1
= XEXP (cond
, 1);
4188 FOR_BB_INSNS (bb
, insn
)
4190 rtx set
, target
, dest
, t
, e
;
4192 /* ??? Maybe emit conditional debug insn? */
4193 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
4195 set
= single_set (insn
);
4196 gcc_assert (set
&& REG_P (SET_DEST (set
)));
4198 dest
= SET_DEST (set
);
4200 rtx
*then_slot
= then_vals
->get (dest
);
4201 rtx
*else_slot
= else_vals
->get (dest
);
4202 t
= then_slot
? *then_slot
: NULL_RTX
;
4203 e
= else_slot
? *else_slot
: NULL_RTX
;
4207 /* If this register was set in the then block, we already
4208 handled this case there. */
4221 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
4227 noce_emit_move_insn (dest
, target
);
4233 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
4234 it using only conditional moves. Return TRUE if we were successful at
4235 converting the block. */
4238 cond_move_process_if_block (struct noce_if_info
*if_info
)
4240 basic_block test_bb
= if_info
->test_bb
;
4241 basic_block then_bb
= if_info
->then_bb
;
4242 basic_block else_bb
= if_info
->else_bb
;
4243 basic_block join_bb
= if_info
->join_bb
;
4244 rtx_insn
*jump
= if_info
->jump
;
4245 rtx cond
= if_info
->cond
;
4246 rtx_insn
*seq
, *loc_insn
;
4248 vec
<rtx
> then_regs
= vNULL
;
4249 vec
<rtx
> else_regs
= vNULL
;
4250 int success_p
= FALSE
;
4251 int limit
= param_max_rtl_if_conversion_insns
;
4253 /* Build a mapping for each block to the value used for each
4255 hash_map
<rtx
, rtx
> then_vals
;
4256 hash_map
<rtx
, rtx
> else_vals
;
4258 /* Make sure the blocks are suitable. */
4259 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
4261 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
4264 /* Make sure the blocks can be used together. If the same register
4265 is set in both blocks, and is not set to a constant in both
4266 cases, then both blocks must set it to the same register. We
4267 have already verified that if it is set to a register, that the
4268 source register does not change after the assignment. Also count
4269 the number of registers set in only one of the blocks. */
4271 for (rtx reg
: then_regs
)
4273 rtx
*then_slot
= then_vals
.get (reg
);
4274 rtx
*else_slot
= else_vals
.get (reg
);
4276 gcc_checking_assert (then_slot
);
4281 rtx then_val
= *then_slot
;
4282 rtx else_val
= *else_slot
;
4283 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
4284 && !rtx_equal_p (then_val
, else_val
))
4289 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
4290 for (rtx reg
: else_regs
)
4292 gcc_checking_assert (else_vals
.get (reg
));
4293 if (!then_vals
.get (reg
))
4297 /* Make sure it is reasonable to convert this block. What matters
4298 is the number of assignments currently made in only one of the
4299 branches, since if we convert we are going to always execute
4301 if (c
> MAX_CONDITIONAL_EXECUTE
4305 /* Try to emit the conditional moves. First do the then block,
4306 then do anything left in the else blocks. */
4308 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
4309 &then_vals
, &else_vals
, false)
4311 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
4312 &then_vals
, &else_vals
, true)))
4317 seq
= end_ifcvt_sequence (if_info
);
4321 loc_insn
= first_active_insn (then_bb
);
4324 loc_insn
= first_active_insn (else_bb
);
4325 gcc_assert (loc_insn
);
4327 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
4331 delete_basic_block (else_bb
);
4335 remove_edge (find_edge (test_bb
, join_bb
));
4337 remove_edge (find_edge (then_bb
, join_bb
));
4338 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
4339 delete_basic_block (then_bb
);
4342 if (can_merge_blocks_p (test_bb
, join_bb
))
4344 merge_blocks (test_bb
, join_bb
);
4348 num_updated_if_blocks
++;
4352 then_regs
.release ();
4353 else_regs
.release ();
4358 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
4359 IF-THEN-ELSE-JOIN block.
4361 If so, we'll try to convert the insns to not require the branch,
4362 using only transformations that do not require conditional execution.
4364 Return TRUE if we were successful at converting the block. */
4367 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
4370 basic_block then_bb
, else_bb
, join_bb
;
4371 bool then_else_reversed
= false;
4374 rtx_insn
*cond_earliest
;
4375 struct noce_if_info if_info
;
4376 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
4378 /* We only ever should get here before reload. */
4379 gcc_assert (!reload_completed
);
4381 /* Recognize an IF-THEN-ELSE-JOIN block. */
4382 if (single_pred_p (then_edge
->dest
)
4383 && single_succ_p (then_edge
->dest
)
4384 && single_pred_p (else_edge
->dest
)
4385 && single_succ_p (else_edge
->dest
)
4386 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
4388 then_bb
= then_edge
->dest
;
4389 else_bb
= else_edge
->dest
;
4390 join_bb
= single_succ (then_bb
);
4392 /* Recognize an IF-THEN-JOIN block. */
4393 else if (single_pred_p (then_edge
->dest
)
4394 && single_succ_p (then_edge
->dest
)
4395 && single_succ (then_edge
->dest
) == else_edge
->dest
)
4397 then_bb
= then_edge
->dest
;
4398 else_bb
= NULL_BLOCK
;
4399 join_bb
= else_edge
->dest
;
4401 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
4402 of basic blocks in cfglayout mode does not matter, so the fallthrough
4403 edge can go to any basic block (and not just to bb->next_bb, like in
4405 else if (single_pred_p (else_edge
->dest
)
4406 && single_succ_p (else_edge
->dest
)
4407 && single_succ (else_edge
->dest
) == then_edge
->dest
)
4409 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
4410 To make this work, we have to invert the THEN and ELSE blocks
4411 and reverse the jump condition. */
4412 then_bb
= else_edge
->dest
;
4413 else_bb
= NULL_BLOCK
;
4414 join_bb
= single_succ (then_bb
);
4415 then_else_reversed
= true;
4418 /* Not a form we can handle. */
4421 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4422 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4425 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4428 num_possible_if_blocks
++;
4433 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
4434 (else_bb
) ? "-ELSE" : "",
4435 pass
, test_bb
->index
, then_bb
->index
);
4438 fprintf (dump_file
, ", else %d", else_bb
->index
);
4440 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
4443 /* If the conditional jump is more than just a conditional
4444 jump, then we cannot do if-conversion on this block. */
4445 jump
= BB_END (test_bb
);
4446 if (! onlyjump_p (jump
))
4449 /* If this is not a standard conditional jump, we can't parse it. */
4450 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
4454 /* We must be comparing objects whose modes imply the size. */
4455 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4458 /* Initialize an IF_INFO struct to pass around. */
4459 memset (&if_info
, 0, sizeof if_info
);
4460 if_info
.test_bb
= test_bb
;
4461 if_info
.then_bb
= then_bb
;
4462 if_info
.else_bb
= else_bb
;
4463 if_info
.join_bb
= join_bb
;
4464 if_info
.cond
= cond
;
4465 rtx_insn
*rev_cond_earliest
;
4466 if_info
.rev_cond
= noce_get_condition (jump
, &rev_cond_earliest
,
4467 !then_else_reversed
);
4468 gcc_assert (if_info
.rev_cond
== NULL_RTX
4469 || rev_cond_earliest
== cond_earliest
);
4470 if_info
.cond_earliest
= cond_earliest
;
4471 if_info
.jump
= jump
;
4472 if_info
.then_else_reversed
= then_else_reversed
;
4473 if_info
.speed_p
= speed_p
;
4474 if_info
.max_seq_cost
4475 = targetm
.max_noce_ifcvt_seq_cost (then_edge
);
4476 /* We'll add in the cost of THEN_BB and ELSE_BB later, when we check
4477 that they are valid to transform. We can't easily get back to the insn
4478 for COND (and it may not exist if we had to canonicalize to get COND),
4479 and jump_insns are always given a cost of 1 by seq_cost, so treat
4480 both instructions as having cost COSTS_N_INSNS (1). */
4481 if_info
.original_cost
= COSTS_N_INSNS (2);
4484 /* Do the real work. */
4486 if (noce_process_if_block (&if_info
))
4489 if (HAVE_conditional_move
4490 && cond_move_process_if_block (&if_info
))
4497 /* Merge the blocks and mark for local life update. */
4500 merge_if_block (struct ce_if_block
* ce_info
)
4502 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4503 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4504 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4505 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4506 basic_block combo_bb
;
4508 /* All block merging is done into the lower block numbers. */
4511 df_set_bb_dirty (test_bb
);
4513 /* Merge any basic blocks to handle && and || subtests. Each of
4514 the blocks are on the fallthru path from the predecessor block. */
4515 if (ce_info
->num_multiple_test_blocks
> 0)
4517 basic_block bb
= test_bb
;
4518 basic_block last_test_bb
= ce_info
->last_test_bb
;
4519 basic_block fallthru
= block_fallthru (bb
);
4524 fallthru
= block_fallthru (bb
);
4525 merge_blocks (combo_bb
, bb
);
4528 while (bb
!= last_test_bb
);
4531 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4532 label, but it might if there were || tests. That label's count should be
4533 zero, and it normally should be removed. */
4537 /* If THEN_BB has no successors, then there's a BARRIER after it.
4538 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4539 is no longer needed, and in fact it is incorrect to leave it in
4541 if (EDGE_COUNT (then_bb
->succs
) == 0
4542 && EDGE_COUNT (combo_bb
->succs
) > 1)
4544 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4545 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4546 end
= NEXT_INSN (end
);
4548 if (end
&& BARRIER_P (end
))
4551 merge_blocks (combo_bb
, then_bb
);
4555 /* The ELSE block, if it existed, had a label. That label count
4556 will almost always be zero, but odd things can happen when labels
4557 get their addresses taken. */
4560 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4561 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4562 is no longer needed, and in fact it is incorrect to leave it in
4564 if (EDGE_COUNT (else_bb
->succs
) == 0
4565 && EDGE_COUNT (combo_bb
->succs
) > 1)
4567 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4568 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4569 end
= NEXT_INSN (end
);
4571 if (end
&& BARRIER_P (end
))
4574 merge_blocks (combo_bb
, else_bb
);
4578 /* If there was no join block reported, that means it was not adjacent
4579 to the others, and so we cannot merge them. */
4583 rtx_insn
*last
= BB_END (combo_bb
);
4585 /* The outgoing edge for the current COMBO block should already
4586 be correct. Verify this. */
4587 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4588 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4589 || (NONJUMP_INSN_P (last
)
4590 && GET_CODE (PATTERN (last
)) == TRAP_IF
4591 && (TRAP_CONDITION (PATTERN (last
))
4592 == const_true_rtx
)));
4595 /* There should still be something at the end of the THEN or ELSE
4596 blocks taking us to our final destination. */
4597 gcc_assert (JUMP_P (last
)
4598 || (EDGE_SUCC (combo_bb
, 0)->dest
4599 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4601 && SIBLING_CALL_P (last
))
4602 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4603 && can_throw_internal (last
)));
4606 /* The JOIN block may have had quite a number of other predecessors too.
4607 Since we've already merged the TEST, THEN and ELSE blocks, we should
4608 have only one remaining edge from our if-then-else diamond. If there
4609 is more than one remaining edge, it must come from elsewhere. There
4610 may be zero incoming edges if the THEN block didn't actually join
4611 back up (as with a call to a non-return function). */
4612 else if (EDGE_COUNT (join_bb
->preds
) < 2
4613 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4615 /* We can merge the JOIN cleanly and update the dataflow try
4616 again on this pass.*/
4617 merge_blocks (combo_bb
, join_bb
);
4622 /* We cannot merge the JOIN. */
4624 /* The outgoing edge for the current COMBO block should already
4625 be correct. Verify this. */
4626 gcc_assert (single_succ_p (combo_bb
)
4627 && single_succ (combo_bb
) == join_bb
);
4629 /* Remove the jump and cruft from the end of the COMBO block. */
4630 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4631 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4634 num_updated_if_blocks
++;
4637 /* Find a block ending in a simple IF condition and try to transform it
4638 in some way. When converting a multi-block condition, put the new code
4639 in the first such block and delete the rest. Return a pointer to this
4640 first block if some transformation was done. Return NULL otherwise. */
4643 find_if_header (basic_block test_bb
, int pass
)
4645 ce_if_block ce_info
;
4649 /* The kind of block we're looking for has exactly two successors. */
4650 if (EDGE_COUNT (test_bb
->succs
) != 2)
4653 then_edge
= EDGE_SUCC (test_bb
, 0);
4654 else_edge
= EDGE_SUCC (test_bb
, 1);
4656 if (df_get_bb_dirty (then_edge
->dest
))
4658 if (df_get_bb_dirty (else_edge
->dest
))
4661 /* Neither edge should be abnormal. */
4662 if ((then_edge
->flags
& EDGE_COMPLEX
)
4663 || (else_edge
->flags
& EDGE_COMPLEX
))
4666 /* Nor exit the loop. */
4667 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4668 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4671 /* The THEN edge is canonically the one that falls through. */
4672 if (then_edge
->flags
& EDGE_FALLTHRU
)
4674 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4675 std::swap (then_edge
, else_edge
);
4677 /* Otherwise this must be a multiway branch of some sort. */
4680 memset (&ce_info
, 0, sizeof (ce_info
));
4681 ce_info
.test_bb
= test_bb
;
4682 ce_info
.then_bb
= then_edge
->dest
;
4683 ce_info
.else_bb
= else_edge
->dest
;
4684 ce_info
.pass
= pass
;
4686 #ifdef IFCVT_MACHDEP_INIT
4687 IFCVT_MACHDEP_INIT (&ce_info
);
4690 if (!reload_completed
4691 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4694 if (reload_completed
4695 && targetm
.have_conditional_execution ()
4696 && cond_exec_find_if_block (&ce_info
))
4699 if (targetm
.have_trap ()
4700 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4701 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4704 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4705 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4707 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4709 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4717 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4718 /* Set this so we continue looking. */
4719 cond_exec_changed_p
= TRUE
;
4720 return ce_info
.test_bb
;
4723 /* Return true if a block has two edges, one of which falls through to the next
4724 block, and the other jumps to a specific block, so that we can tell if the
4725 block is part of an && test or an || test. Returns either -1 or the number
4726 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4729 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4732 int fallthru_p
= FALSE
;
4739 if (!cur_bb
|| !target_bb
)
4742 /* If no edges, obviously it doesn't jump or fallthru. */
4743 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4746 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4748 if (cur_edge
->flags
& EDGE_COMPLEX
)
4749 /* Anything complex isn't what we want. */
4752 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4755 else if (cur_edge
->dest
== target_bb
)
4762 if ((jump_p
& fallthru_p
) == 0)
4765 /* Don't allow calls in the block, since this is used to group && and ||
4766 together for conditional execution support. ??? we should support
4767 conditional execution support across calls for IA-64 some day, but
4768 for now it makes the code simpler. */
4769 end
= BB_END (cur_bb
);
4770 insn
= BB_HEAD (cur_bb
);
4772 while (insn
!= NULL_RTX
)
4779 && !DEBUG_INSN_P (insn
)
4780 && GET_CODE (PATTERN (insn
)) != USE
4781 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4787 insn
= NEXT_INSN (insn
);
4793 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4794 block. If so, we'll try to convert the insns to not require the branch.
4795 Return TRUE if we were successful at converting the block. */
4798 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4800 basic_block test_bb
= ce_info
->test_bb
;
4801 basic_block then_bb
= ce_info
->then_bb
;
4802 basic_block else_bb
= ce_info
->else_bb
;
4803 basic_block join_bb
= NULL_BLOCK
;
4808 ce_info
->last_test_bb
= test_bb
;
4810 /* We only ever should get here after reload,
4811 and if we have conditional execution. */
4812 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4814 /* Discover if any fall through predecessors of the current test basic block
4815 were && tests (which jump to the else block) or || tests (which jump to
4817 if (single_pred_p (test_bb
)
4818 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4820 basic_block bb
= single_pred (test_bb
);
4821 basic_block target_bb
;
4822 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4825 /* Determine if the preceding block is an && or || block. */
4826 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4828 ce_info
->and_and_p
= TRUE
;
4829 target_bb
= else_bb
;
4831 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4833 ce_info
->and_and_p
= FALSE
;
4834 target_bb
= then_bb
;
4837 target_bb
= NULL_BLOCK
;
4839 if (target_bb
&& n_insns
<= max_insns
)
4841 int total_insns
= 0;
4844 ce_info
->last_test_bb
= test_bb
;
4846 /* Found at least one && or || block, look for more. */
4849 ce_info
->test_bb
= test_bb
= bb
;
4850 total_insns
+= n_insns
;
4853 if (!single_pred_p (bb
))
4856 bb
= single_pred (bb
);
4857 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4859 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4861 ce_info
->num_multiple_test_blocks
= blocks
;
4862 ce_info
->num_multiple_test_insns
= total_insns
;
4864 if (ce_info
->and_and_p
)
4865 ce_info
->num_and_and_blocks
= blocks
;
4867 ce_info
->num_or_or_blocks
= blocks
;
4871 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4872 other than any || blocks which jump to the THEN block. */
4873 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4876 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4877 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4879 if (cur_edge
->flags
& EDGE_COMPLEX
)
4883 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4885 if (cur_edge
->flags
& EDGE_COMPLEX
)
4889 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4890 if (EDGE_COUNT (then_bb
->succs
) > 0
4891 && (!single_succ_p (then_bb
)
4892 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4893 || (epilogue_completed
4894 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4897 /* If the THEN block has no successors, conditional execution can still
4898 make a conditional call. Don't do this unless the ELSE block has
4899 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4900 Check for the last insn of the THEN block being an indirect jump, which
4901 is listed as not having any successors, but confuses the rest of the CE
4902 code processing. ??? we should fix this in the future. */
4903 if (EDGE_COUNT (then_bb
->succs
) == 0)
4905 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4907 rtx_insn
*last_insn
= BB_END (then_bb
);
4910 && NOTE_P (last_insn
)
4911 && last_insn
!= BB_HEAD (then_bb
))
4912 last_insn
= PREV_INSN (last_insn
);
4915 && JUMP_P (last_insn
)
4916 && ! simplejump_p (last_insn
))
4920 else_bb
= NULL_BLOCK
;
4926 /* If the THEN block's successor is the other edge out of the TEST block,
4927 then we have an IF-THEN combo without an ELSE. */
4928 else if (single_succ (then_bb
) == else_bb
)
4931 else_bb
= NULL_BLOCK
;
4934 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4935 has exactly one predecessor and one successor, and the outgoing edge
4936 is not complex, then we have an IF-THEN-ELSE combo. */
4937 else if (single_succ_p (else_bb
)
4938 && single_succ (then_bb
) == single_succ (else_bb
)
4939 && single_pred_p (else_bb
)
4940 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4941 && !(epilogue_completed
4942 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4943 join_bb
= single_succ (else_bb
);
4945 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4949 num_possible_if_blocks
++;
4954 "\nIF-THEN%s block found, pass %d, start block %d "
4955 "[insn %d], then %d [%d]",
4956 (else_bb
) ? "-ELSE" : "",
4959 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4961 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4964 fprintf (dump_file
, ", else %d [%d]",
4966 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4968 fprintf (dump_file
, ", join %d [%d]",
4970 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4972 if (ce_info
->num_multiple_test_blocks
> 0)
4973 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4974 ce_info
->num_multiple_test_blocks
,
4975 (ce_info
->and_and_p
) ? "&&" : "||",
4976 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4977 ce_info
->last_test_bb
->index
,
4978 ((BB_HEAD (ce_info
->last_test_bb
))
4979 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4982 fputc ('\n', dump_file
);
4985 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4986 first condition for free, since we've already asserted that there's a
4987 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4988 we checked the FALLTHRU flag, those are already adjacent to the last IF
4990 /* ??? As an enhancement, move the ELSE block. Have to deal with
4991 BLOCK notes, if by no other means than backing out the merge if they
4992 exist. Sticky enough I don't want to think about it now. */
4994 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4996 if ((next
= next
->next_bb
) != join_bb
4997 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
5005 /* Do the real work. */
5007 ce_info
->else_bb
= else_bb
;
5008 ce_info
->join_bb
= join_bb
;
5010 /* If we have && and || tests, try to first handle combining the && and ||
5011 tests into the conditional code, and if that fails, go back and handle
5012 it without the && and ||, which at present handles the && case if there
5013 was no ELSE block. */
5014 if (cond_exec_process_if_block (ce_info
, TRUE
))
5017 if (ce_info
->num_multiple_test_blocks
)
5021 if (cond_exec_process_if_block (ce_info
, FALSE
))
5028 /* Convert a branch over a trap, or a branch
5029 to a trap, into a conditional trap. */
5032 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
5034 basic_block then_bb
= then_edge
->dest
;
5035 basic_block else_bb
= else_edge
->dest
;
5036 basic_block other_bb
, trap_bb
;
5037 rtx_insn
*trap
, *jump
;
5039 rtx_insn
*cond_earliest
;
5041 /* Locate the block with the trap instruction. */
5042 /* ??? While we look for no successors, we really ought to allow
5043 EH successors. Need to fix merge_if_block for that to work. */
5044 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
5045 trap_bb
= then_bb
, other_bb
= else_bb
;
5046 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
5047 trap_bb
= else_bb
, other_bb
= then_bb
;
5053 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
5054 test_bb
->index
, trap_bb
->index
);
5057 /* If this is not a standard conditional jump, we can't parse it. */
5058 jump
= BB_END (test_bb
);
5059 cond
= noce_get_condition (jump
, &cond_earliest
, then_bb
== trap_bb
);
5063 /* If the conditional jump is more than just a conditional jump, then
5064 we cannot do if-conversion on this block. Give up for returnjump_p,
5065 changing a conditional return followed by unconditional trap for
5066 conditional trap followed by unconditional return is likely not
5067 beneficial and harder to handle. */
5068 if (! onlyjump_p (jump
) || returnjump_p (jump
))
5071 /* We must be comparing objects whose modes imply the size. */
5072 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
5075 /* Attempt to generate the conditional trap. */
5076 rtx_insn
*seq
= gen_cond_trap (GET_CODE (cond
), copy_rtx (XEXP (cond
, 0)),
5077 copy_rtx (XEXP (cond
, 1)),
5078 TRAP_CODE (PATTERN (trap
)));
5082 /* If that results in an invalid insn, back out. */
5083 for (rtx_insn
*x
= seq
; x
; x
= NEXT_INSN (x
))
5084 if (reload_completed
5086 : recog_memoized (x
) < 0)
5089 /* Emit the new insns before cond_earliest. */
5090 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
5092 /* Delete the trap block if possible. */
5093 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
5094 df_set_bb_dirty (test_bb
);
5095 df_set_bb_dirty (then_bb
);
5096 df_set_bb_dirty (else_bb
);
5098 if (EDGE_COUNT (trap_bb
->preds
) == 0)
5100 delete_basic_block (trap_bb
);
5104 /* Wire together the blocks again. */
5105 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
5106 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
5107 else if (trap_bb
== then_bb
)
5109 rtx lab
= JUMP_LABEL (jump
);
5110 rtx_insn
*seq
= targetm
.gen_jump (lab
);
5111 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
5112 LABEL_NUSES (lab
) += 1;
5113 JUMP_LABEL (newjump
) = lab
;
5114 emit_barrier_after (newjump
);
5118 if (can_merge_blocks_p (test_bb
, other_bb
))
5120 merge_blocks (test_bb
, other_bb
);
5124 num_updated_if_blocks
++;
5128 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
5132 block_has_only_trap (basic_block bb
)
5136 /* We're not the exit block. */
5137 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5140 /* The block must have no successors. */
5141 if (EDGE_COUNT (bb
->succs
) > 0)
5144 /* The only instruction in the THEN block must be the trap. */
5145 trap
= first_active_insn (bb
);
5146 if (! (trap
== BB_END (bb
)
5147 && GET_CODE (PATTERN (trap
)) == TRAP_IF
5148 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
5154 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
5155 transformable, but not necessarily the other. There need be no
5158 Return TRUE if we were successful at converting the block.
5160 Cases we'd like to look at:
5163 if (test) goto over; // x not live
5171 if (! test) goto label;
5174 if (test) goto E; // x not live
5188 (3) // This one's really only interesting for targets that can do
5189 // multiway branching, e.g. IA-64 BBB bundles. For other targets
5190 // it results in multiple branches on a cache line, which often
5191 // does not sit well with predictors.
5193 if (test1) goto E; // predicted not taken
5209 (A) Don't do (2) if the branch is predicted against the block we're
5210 eliminating. Do it anyway if we can eliminate a branch; this requires
5211 that the sole successor of the eliminated block postdominate the other
5214 (B) With CE, on (3) we can steal from both sides of the if, creating
5223 Again, this is most useful if J postdominates.
5225 (C) CE substitutes for helpful life information.
5227 (D) These heuristics need a lot of work. */
5229 /* Tests for case 1 above. */
5232 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
5234 basic_block then_bb
= then_edge
->dest
;
5235 basic_block else_bb
= else_edge
->dest
;
5238 profile_probability then_prob
;
5239 rtx else_target
= NULL_RTX
;
5241 /* If we are partitioning hot/cold basic blocks, we don't want to
5242 mess up unconditional or indirect jumps that cross between hot
5245 Basic block partitioning may result in some jumps that appear to
5246 be optimizable (or blocks that appear to be mergeable), but which really
5247 must be left untouched (they are required to make it safely across
5248 partition boundaries). See the comments at the top of
5249 bb-reorder.cc:partition_hot_cold_basic_blocks for complete details. */
5251 if ((BB_END (then_bb
)
5252 && JUMP_P (BB_END (then_bb
))
5253 && CROSSING_JUMP_P (BB_END (then_bb
)))
5254 || (JUMP_P (BB_END (test_bb
))
5255 && CROSSING_JUMP_P (BB_END (test_bb
)))
5256 || (BB_END (else_bb
)
5257 && JUMP_P (BB_END (else_bb
))
5258 && CROSSING_JUMP_P (BB_END (else_bb
))))
5261 /* Verify test_bb ends in a conditional jump with no other side-effects. */
5262 if (!onlyjump_p (BB_END (test_bb
)))
5265 /* THEN has one successor. */
5266 if (!single_succ_p (then_bb
))
5269 /* THEN does not fall through, but is not strange either. */
5270 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
5273 /* THEN has one predecessor. */
5274 if (!single_pred_p (then_bb
))
5277 /* THEN must do something. */
5278 if (forwarder_block_p (then_bb
))
5281 num_possible_if_blocks
++;
5284 "\nIF-CASE-1 found, start %d, then %d\n",
5285 test_bb
->index
, then_bb
->index
);
5287 then_prob
= then_edge
->probability
.invert ();
5289 /* We're speculating from the THEN path, we want to make sure the cost
5290 of speculation is within reason. */
5291 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
5292 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
5293 predictable_edge_p (then_edge
)))))
5296 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5298 rtx_insn
*jump
= BB_END (else_edge
->src
);
5299 gcc_assert (JUMP_P (jump
));
5300 else_target
= JUMP_LABEL (jump
);
5303 /* Registers set are dead, or are predicable. */
5304 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
5305 single_succ_edge (then_bb
), 1))
5308 /* Conversion went ok, including moving the insns and fixing up the
5309 jump. Adjust the CFG to match. */
5311 /* We can avoid creating a new basic block if then_bb is immediately
5312 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
5313 through to else_bb. */
5315 if (then_bb
->next_bb
== else_bb
5316 && then_bb
->prev_bb
== test_bb
5317 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
5319 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
5322 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5323 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
5324 else_bb
, else_target
);
5326 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
5329 df_set_bb_dirty (test_bb
);
5330 df_set_bb_dirty (else_bb
);
5332 then_bb_index
= then_bb
->index
;
5333 delete_basic_block (then_bb
);
5335 /* Make rest of code believe that the newly created block is the THEN_BB
5336 block we removed. */
5339 df_bb_replace (then_bb_index
, new_bb
);
5340 /* This should have been done above via force_nonfallthru_and_redirect
5341 (possibly called from redirect_edge_and_branch_force). */
5342 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
5346 num_updated_if_blocks
++;
5350 /* Test for case 2 above. */
5353 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
5355 basic_block then_bb
= then_edge
->dest
;
5356 basic_block else_bb
= else_edge
->dest
;
5358 profile_probability then_prob
, else_prob
;
5360 /* We do not want to speculate (empty) loop latches. */
5362 && else_bb
->loop_father
->latch
== else_bb
)
5365 /* If we are partitioning hot/cold basic blocks, we don't want to
5366 mess up unconditional or indirect jumps that cross between hot
5369 Basic block partitioning may result in some jumps that appear to
5370 be optimizable (or blocks that appear to be mergeable), but which really
5371 must be left untouched (they are required to make it safely across
5372 partition boundaries). See the comments at the top of
5373 bb-reorder.cc:partition_hot_cold_basic_blocks for complete details. */
5375 if ((BB_END (then_bb
)
5376 && JUMP_P (BB_END (then_bb
))
5377 && CROSSING_JUMP_P (BB_END (then_bb
)))
5378 || (JUMP_P (BB_END (test_bb
))
5379 && CROSSING_JUMP_P (BB_END (test_bb
)))
5380 || (BB_END (else_bb
)
5381 && JUMP_P (BB_END (else_bb
))
5382 && CROSSING_JUMP_P (BB_END (else_bb
))))
5385 /* Verify test_bb ends in a conditional jump with no other side-effects. */
5386 if (!onlyjump_p (BB_END (test_bb
)))
5389 /* ELSE has one successor. */
5390 if (!single_succ_p (else_bb
))
5393 else_succ
= single_succ_edge (else_bb
);
5395 /* ELSE outgoing edge is not complex. */
5396 if (else_succ
->flags
& EDGE_COMPLEX
)
5399 /* ELSE has one predecessor. */
5400 if (!single_pred_p (else_bb
))
5403 /* THEN is not EXIT. */
5404 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
5407 else_prob
= else_edge
->probability
;
5408 then_prob
= else_prob
.invert ();
5410 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
5411 if (else_prob
> then_prob
)
5413 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
5414 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
5420 num_possible_if_blocks
++;
5423 "\nIF-CASE-2 found, start %d, else %d\n",
5424 test_bb
->index
, else_bb
->index
);
5426 /* We're speculating from the ELSE path, we want to make sure the cost
5427 of speculation is within reason. */
5428 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
5429 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
5430 predictable_edge_p (else_edge
)))))
5433 /* Registers set are dead, or are predicable. */
5434 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
5437 /* Conversion went ok, including moving the insns and fixing up the
5438 jump. Adjust the CFG to match. */
5440 df_set_bb_dirty (test_bb
);
5441 df_set_bb_dirty (then_bb
);
5442 delete_basic_block (else_bb
);
5445 num_updated_if_blocks
++;
5447 /* ??? We may now fallthru from one of THEN's successors into a join
5448 block. Rerun cleanup_cfg? Examine things manually? Wait? */
5453 /* Used by the code above to perform the actual rtl transformations.
5454 Return TRUE if successful.
5456 TEST_BB is the block containing the conditional branch. MERGE_BB
5457 is the block containing the code to manipulate. DEST_EDGE is an
5458 edge representing a jump to the join block; after the conversion,
5459 TEST_BB should be branching to its destination.
5460 REVERSEP is true if the sense of the branch should be reversed. */
5463 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
5464 basic_block other_bb
, edge dest_edge
, int reversep
)
5466 basic_block new_dest
= dest_edge
->dest
;
5467 rtx_insn
*head
, *end
, *jump
;
5468 rtx_insn
*earliest
= NULL
;
5470 bitmap merge_set
= NULL
;
5471 /* Number of pending changes. */
5472 int n_validated_changes
= 0;
5473 rtx new_dest_label
= NULL_RTX
;
5475 jump
= BB_END (test_bb
);
5477 /* Find the extent of the real code in the merge block. */
5478 head
= BB_HEAD (merge_bb
);
5479 end
= BB_END (merge_bb
);
5481 while (DEBUG_INSN_P (end
) && end
!= head
)
5482 end
= PREV_INSN (end
);
5484 /* If merge_bb ends with a tablejump, predicating/moving insn's
5485 into test_bb and then deleting merge_bb will result in the jumptable
5486 that follows merge_bb being removed along with merge_bb and then we
5487 get an unresolved reference to the jumptable. */
5488 if (tablejump_p (end
, NULL
, NULL
))
5492 head
= NEXT_INSN (head
);
5493 while (DEBUG_INSN_P (head
) && head
!= end
)
5494 head
= NEXT_INSN (head
);
5502 head
= NEXT_INSN (head
);
5503 while (DEBUG_INSN_P (head
) && head
!= end
)
5504 head
= NEXT_INSN (head
);
5509 if (!onlyjump_p (end
))
5516 end
= PREV_INSN (end
);
5517 while (DEBUG_INSN_P (end
) && end
!= head
)
5518 end
= PREV_INSN (end
);
5521 /* Don't move frame-related insn across the conditional branch. This
5522 can lead to one of the paths of the branch having wrong unwind info. */
5523 if (epilogue_completed
)
5525 rtx_insn
*insn
= head
;
5528 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5532 insn
= NEXT_INSN (insn
);
5536 /* Disable handling dead code by conditional execution if the machine needs
5537 to do anything funny with the tests, etc. */
5538 #ifndef IFCVT_MODIFY_TESTS
5539 if (targetm
.have_conditional_execution ())
5541 /* In the conditional execution case, we have things easy. We know
5542 the condition is reversible. We don't have to check life info
5543 because we're going to conditionally execute the code anyway.
5544 All that's left is making sure the insns involved can actually
5549 /* If the conditional jump is more than just a conditional jump,
5550 then we cannot do conditional execution conversion on this block. */
5551 if (!onlyjump_p (jump
))
5554 cond
= cond_exec_get_condition (jump
);
5558 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5559 profile_probability prob_val
5560 = (note
? profile_probability::from_reg_br_prob_note (XINT (note
, 0))
5561 : profile_probability::uninitialized ());
5565 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5568 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5570 prob_val
= prob_val
.invert ();
5573 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5574 && verify_changes (0))
5575 n_validated_changes
= num_validated_changes ();
5584 /* If we allocated new pseudos (e.g. in the conditional move
5585 expander called from noce_emit_cmove), we must resize the
5587 if (max_regno
< max_reg_num ())
5588 max_regno
= max_reg_num ();
5590 /* Try the NCE path if the CE path did not result in any changes. */
5591 if (n_validated_changes
== 0)
5598 /* In the non-conditional execution case, we have to verify that there
5599 are no trapping operations, no calls, no references to memory, and
5600 that any registers modified are dead at the branch site. */
5602 if (!any_condjump_p (jump
))
5605 /* Find the extent of the conditional. */
5606 cond
= noce_get_condition (jump
, &earliest
, false);
5610 live
= BITMAP_ALLOC (®_obstack
);
5611 simulate_backwards_to_point (merge_bb
, live
, end
);
5612 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5614 df_get_live_in (other_bb
), NULL
);
5619 /* Collect the set of registers set in MERGE_BB. */
5620 merge_set
= BITMAP_ALLOC (®_obstack
);
5622 FOR_BB_INSNS (merge_bb
, insn
)
5623 if (NONDEBUG_INSN_P (insn
))
5624 df_simulate_find_defs (insn
, merge_set
);
5626 /* If shrink-wrapping, disable this optimization when test_bb is
5627 the first basic block and merge_bb exits. The idea is to not
5628 move code setting up a return register as that may clobber a
5629 register used to pass function parameters, which then must be
5630 saved in caller-saved regs. A caller-saved reg requires the
5631 prologue, killing a shrink-wrap opportunity. */
5632 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5633 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5634 && single_succ_p (new_dest
)
5635 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5636 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5641 return_regs
= BITMAP_ALLOC (®_obstack
);
5643 /* Start off with the intersection of regs used to pass
5644 params and regs used to return values. */
5645 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5646 if (FUNCTION_ARG_REGNO_P (i
)
5647 && targetm
.calls
.function_value_regno_p (i
))
5648 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5650 bitmap_and_into (return_regs
,
5651 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5652 bitmap_and_into (return_regs
,
5653 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5654 if (!bitmap_empty_p (return_regs
))
5656 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5657 if (NONDEBUG_INSN_P (insn
))
5661 /* If this insn sets any reg in return_regs, add all
5662 reg uses to the set of regs we're interested in. */
5663 FOR_EACH_INSN_DEF (def
, insn
)
5664 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5666 df_simulate_uses (insn
, return_regs
);
5670 if (bitmap_intersect_p (merge_set
, return_regs
))
5672 BITMAP_FREE (return_regs
);
5673 BITMAP_FREE (merge_set
);
5677 BITMAP_FREE (return_regs
);
5682 /* We don't want to use normal invert_jump or redirect_jump because
5683 we don't want to delete_insn called. Also, we want to do our own
5684 change group management. */
5686 old_dest
= JUMP_LABEL (jump
);
5687 if (other_bb
!= new_dest
)
5689 if (!any_condjump_p (jump
))
5692 if (JUMP_P (BB_END (dest_edge
->src
)))
5693 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5694 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5695 new_dest_label
= ret_rtx
;
5697 new_dest_label
= block_label (new_dest
);
5699 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5701 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5702 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5706 if (verify_changes (n_validated_changes
))
5707 confirm_change_group ();
5711 if (other_bb
!= new_dest
)
5713 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5716 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5719 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5720 FALLTHRU_EDGE (test_bb
)->probability
);
5721 update_br_prob_note (test_bb
);
5725 /* Move the insns out of MERGE_BB to before the branch. */
5730 if (end
== BB_END (merge_bb
))
5731 BB_END (merge_bb
) = PREV_INSN (head
);
5733 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5734 notes being moved might become invalid. */
5740 if (! INSN_P (insn
))
5742 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5745 remove_note (insn
, note
);
5746 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5748 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5749 notes referring to the registers being set might become invalid. */
5755 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5756 remove_reg_equal_equiv_notes_for_regno (i
);
5758 BITMAP_FREE (merge_set
);
5761 reorder_insns (head
, end
, PREV_INSN (earliest
));
5764 /* Remove the jump and edge if we can. */
5765 if (other_bb
== new_dest
)
5768 remove_edge (BRANCH_EDGE (test_bb
));
5769 /* ??? Can't merge blocks here, as then_bb is still in use.
5770 At minimum, the merge will get done just before bb-reorder. */
5779 BITMAP_FREE (merge_set
);
5784 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5785 we are after combine pass. */
5788 if_convert (bool after_combine
)
5795 df_live_add_problem ();
5796 df_live_set_all_dirty ();
5799 /* Record whether we are after combine pass. */
5800 ifcvt_after_combine
= after_combine
;
5801 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5802 != CODE_FOR_nothing
);
5803 num_possible_if_blocks
= 0;
5804 num_updated_if_blocks
= 0;
5805 num_true_changes
= 0;
5807 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5808 mark_loop_exit_edges ();
5809 loop_optimizer_finalize ();
5810 free_dominance_info (CDI_DOMINATORS
);
5812 /* Compute postdominators. */
5813 calculate_dominance_info (CDI_POST_DOMINATORS
);
5815 df_set_flags (DF_LR_RUN_DCE
);
5817 /* Go through each of the basic blocks looking for things to convert. If we
5818 have conditional execution, we make multiple passes to allow us to handle
5819 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5824 /* Only need to do dce on the first pass. */
5825 df_clear_flags (DF_LR_RUN_DCE
);
5826 cond_exec_changed_p
= FALSE
;
5829 #ifdef IFCVT_MULTIPLE_DUMPS
5830 if (dump_file
&& pass
> 1)
5831 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5834 FOR_EACH_BB_FN (bb
, cfun
)
5837 while (!df_get_bb_dirty (bb
)
5838 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5842 #ifdef IFCVT_MULTIPLE_DUMPS
5843 if (dump_file
&& cond_exec_changed_p
)
5844 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5847 while (cond_exec_changed_p
);
5849 #ifdef IFCVT_MULTIPLE_DUMPS
5851 fprintf (dump_file
, "\n\n========== no more changes\n");
5854 free_dominance_info (CDI_POST_DOMINATORS
);
5859 clear_aux_for_blocks ();
5861 /* If we allocated new pseudos, we must resize the array for sched1. */
5862 if (max_regno
< max_reg_num ())
5863 max_regno
= max_reg_num ();
5865 /* Write the final stats. */
5866 if (dump_file
&& num_possible_if_blocks
> 0)
5869 "\n%d possible IF blocks searched.\n",
5870 num_possible_if_blocks
);
5872 "%d IF blocks converted.\n",
5873 num_updated_if_blocks
);
5875 "%d true changes made.\n\n\n",
5880 df_remove_problem (df_live
);
5882 /* Some non-cold blocks may now be only reachable from cold blocks.
5884 fixup_partitions ();
5886 checking_verify_flow_info ();
5889 /* If-conversion and CFG cleanup. */
5891 rest_of_handle_if_conversion (void)
5895 if (flag_if_conversion
)
5899 dump_reg_info (dump_file
);
5900 dump_flow_info (dump_file
, dump_flags
);
5902 cleanup_cfg (CLEANUP_EXPENSIVE
);
5904 if (num_updated_if_blocks
)
5905 /* Get rid of any dead CC-related instructions. */
5906 flags
|= CLEANUP_FORCE_FAST_DCE
;
5909 cleanup_cfg (flags
);
5915 const pass_data pass_data_rtl_ifcvt
=
5917 RTL_PASS
, /* type */
5919 OPTGROUP_NONE
, /* optinfo_flags */
5920 TV_IFCVT
, /* tv_id */
5921 0, /* properties_required */
5922 0, /* properties_provided */
5923 0, /* properties_destroyed */
5924 0, /* todo_flags_start */
5925 TODO_df_finish
, /* todo_flags_finish */
5928 class pass_rtl_ifcvt
: public rtl_opt_pass
5931 pass_rtl_ifcvt (gcc::context
*ctxt
)
5932 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5935 /* opt_pass methods: */
5936 virtual bool gate (function
*)
5938 return (optimize
> 0) && dbg_cnt (if_conversion
);
5941 virtual unsigned int execute (function
*)
5943 return rest_of_handle_if_conversion ();
5946 }; // class pass_rtl_ifcvt
5951 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5953 return new pass_rtl_ifcvt (ctxt
);
5957 /* Rerun if-conversion, as combine may have simplified things enough
5958 to now meet sequence length restrictions. */
5962 const pass_data pass_data_if_after_combine
=
5964 RTL_PASS
, /* type */
5966 OPTGROUP_NONE
, /* optinfo_flags */
5967 TV_IFCVT
, /* tv_id */
5968 0, /* properties_required */
5969 0, /* properties_provided */
5970 0, /* properties_destroyed */
5971 0, /* todo_flags_start */
5972 TODO_df_finish
, /* todo_flags_finish */
5975 class pass_if_after_combine
: public rtl_opt_pass
5978 pass_if_after_combine (gcc::context
*ctxt
)
5979 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5982 /* opt_pass methods: */
5983 virtual bool gate (function
*)
5985 return optimize
> 0 && flag_if_conversion
5986 && dbg_cnt (if_after_combine
);
5989 virtual unsigned int execute (function
*)
5995 }; // class pass_if_after_combine
6000 make_pass_if_after_combine (gcc::context
*ctxt
)
6002 return new pass_if_after_combine (ctxt
);
6008 const pass_data pass_data_if_after_reload
=
6010 RTL_PASS
, /* type */
6012 OPTGROUP_NONE
, /* optinfo_flags */
6013 TV_IFCVT2
, /* tv_id */
6014 0, /* properties_required */
6015 0, /* properties_provided */
6016 0, /* properties_destroyed */
6017 0, /* todo_flags_start */
6018 TODO_df_finish
, /* todo_flags_finish */
6021 class pass_if_after_reload
: public rtl_opt_pass
6024 pass_if_after_reload (gcc::context
*ctxt
)
6025 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
6028 /* opt_pass methods: */
6029 virtual bool gate (function
*)
6031 return optimize
> 0 && flag_if_conversion2
6032 && dbg_cnt (if_after_reload
);
6035 virtual unsigned int execute (function
*)
6041 }; // class pass_if_after_reload
6046 make_pass_if_after_reload (gcc::context
*ctxt
)
6048 return new pass_if_after_reload (ctxt
);