1 /* Register renaming for the GNU compiler.
2 Copyright (C) 2000-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
24 #include "rtl-error.h"
26 #include "insn-config.h"
28 #include "addresses.h"
29 #include "hard-reg-set.h"
30 #include "basic-block.h"
42 #include "tree-pass.h"
46 #include "regrename.h"
48 /* This file implements the RTL register renaming pass of the compiler. It is
49 a semi-local pass whose goal is to maximize the usage of the register file
50 of the processor by substituting registers for others in the solution given
51 by the register allocator. The algorithm is as follows:
53 1. Local def/use chains are built: within each basic block, chains are
54 opened and closed; if a chain isn't closed at the end of the block,
55 it is dropped. We pre-open chains if we have already examined a
56 predecessor block and found chains live at the end which match
57 live registers at the start of the new block.
59 2. We try to combine the local chains across basic block boundaries by
60 comparing chains that were open at the start or end of a block to
61 those in successor/predecessor blocks.
63 3. For each chain, the set of possible renaming registers is computed.
64 This takes into account the renaming of previously processed chains.
65 Optionally, a preferred class is computed for the renaming register.
67 4. The best renaming register is computed for the chain in the above set,
68 using a round-robin allocation. If a preferred class exists, then the
69 round-robin allocation is done within the class first, if possible.
70 The round-robin allocation of renaming registers itself is global.
72 5. If a renaming register has been found, it is substituted in the chain.
74 Targets can parameterize the pass by specifying a preferred class for the
75 renaming register for a given (super)class of registers to be renamed. */
77 #if HOST_BITS_PER_WIDE_INT <= MAX_RECOG_OPERANDS
78 #error "Use a different bitmap implementation for untracked_operands."
88 /* mark_access is for marking the destination regs in
89 REG_FRAME_RELATED_EXPR notes (as if they were read) so that the
90 note is updated properly. */
94 static const char * const scan_actions_name
[] =
104 /* TICK and THIS_TICK are used to record the last time we saw each
106 static int tick
[FIRST_PSEUDO_REGISTER
];
107 static int this_tick
= 0;
109 static struct obstack rename_obstack
;
111 /* If nonnull, the code calling into the register renamer requested
112 information about insn operands, and we store it here. */
113 vec
<insn_rr_info
> insn_rr
;
115 static void scan_rtx (rtx_insn
*, rtx
*, enum reg_class
, enum scan_actions
,
117 static bool build_def_use (basic_block
);
119 /* The id to be given to the next opened chain. */
120 static unsigned current_id
;
122 /* A mapping of unique id numbers to chains. */
123 static vec
<du_head_p
> id_to_chain
;
125 /* List of currently open chains. */
126 static struct du_head
*open_chains
;
128 /* Bitmap of open chains. The bits set always match the list found in
130 static bitmap_head open_chains_set
;
132 /* Record the registers being tracked in open_chains. */
133 static HARD_REG_SET live_in_chains
;
135 /* Record the registers that are live but not tracked. The intersection
136 between this and live_in_chains is empty. */
137 static HARD_REG_SET live_hard_regs
;
139 /* Set while scanning RTL if INSN_RR is nonnull, i.e. if the current analysis
140 is for a caller that requires operand data. Used in
141 record_operand_use. */
142 static operand_rr_info
*cur_operand
;
144 /* Return the chain corresponding to id number ID. Take into account that
145 chains may have been merged. */
147 regrename_chain_from_id (unsigned int id
)
149 du_head_p first_chain
= id_to_chain
[id
];
150 du_head_p chain
= first_chain
;
151 while (chain
->id
!= id
)
154 chain
= id_to_chain
[id
];
156 first_chain
->id
= id
;
160 /* Dump all def/use chains, starting at id FROM. */
163 dump_def_use_chain (int from
)
167 FOR_EACH_VEC_ELT_FROM (id_to_chain
, i
, head
, from
)
169 struct du_chain
*this_du
= head
->first
;
171 fprintf (dump_file
, "Register %s (%d):",
172 reg_names
[head
->regno
], head
->nregs
);
175 fprintf (dump_file
, " %d [%s]", INSN_UID (this_du
->insn
),
176 reg_class_names
[this_du
->cl
]);
177 this_du
= this_du
->next_use
;
179 fprintf (dump_file
, "\n");
180 head
= head
->next_chain
;
185 free_chain_data (void)
189 for (i
= 0; id_to_chain
.iterate (i
, &ptr
); i
++)
190 bitmap_clear (&ptr
->conflicts
);
192 id_to_chain
.release ();
195 /* Walk all chains starting with CHAINS and record that they conflict with
196 another chain whose id is ID. */
199 mark_conflict (struct du_head
*chains
, unsigned id
)
203 bitmap_set_bit (&chains
->conflicts
, id
);
204 chains
= chains
->next_chain
;
208 /* Examine cur_operand, and if it is nonnull, record information about the
209 use THIS_DU which is part of the chain HEAD. */
212 record_operand_use (struct du_head
*head
, struct du_chain
*this_du
)
214 if (cur_operand
== NULL
)
216 gcc_assert (cur_operand
->n_chains
< MAX_REGS_PER_ADDRESS
);
217 cur_operand
->heads
[cur_operand
->n_chains
] = head
;
218 cur_operand
->chains
[cur_operand
->n_chains
++] = this_du
;
221 /* Create a new chain for THIS_NREGS registers starting at THIS_REGNO,
222 and record its occurrence in *LOC, which is being written to in INSN.
223 This access requires a register of class CL. */
226 create_new_chain (unsigned this_regno
, unsigned this_nregs
, rtx
*loc
,
227 rtx_insn
*insn
, enum reg_class cl
)
229 struct du_head
*head
= XOBNEW (&rename_obstack
, struct du_head
);
230 struct du_chain
*this_du
;
233 head
->next_chain
= open_chains
;
234 head
->regno
= this_regno
;
235 head
->nregs
= this_nregs
;
236 head
->need_caller_save_reg
= 0;
237 head
->cannot_rename
= 0;
239 id_to_chain
.safe_push (head
);
240 head
->id
= current_id
++;
242 bitmap_initialize (&head
->conflicts
, &bitmap_default_obstack
);
243 bitmap_copy (&head
->conflicts
, &open_chains_set
);
244 mark_conflict (open_chains
, head
->id
);
246 /* Since we're tracking this as a chain now, remove it from the
247 list of conflicting live hard registers and track it in
248 live_in_chains instead. */
252 SET_HARD_REG_BIT (live_in_chains
, head
->regno
+ nregs
);
253 CLEAR_HARD_REG_BIT (live_hard_regs
, head
->regno
+ nregs
);
256 COPY_HARD_REG_SET (head
->hard_conflicts
, live_hard_regs
);
257 bitmap_set_bit (&open_chains_set
, head
->id
);
263 fprintf (dump_file
, "Creating chain %s (%d)",
264 reg_names
[head
->regno
], head
->id
);
265 if (insn
!= NULL_RTX
)
266 fprintf (dump_file
, " at insn %d", INSN_UID (insn
));
267 fprintf (dump_file
, "\n");
270 if (insn
== NULL_RTX
)
272 head
->first
= head
->last
= NULL
;
276 this_du
= XOBNEW (&rename_obstack
, struct du_chain
);
277 head
->first
= head
->last
= this_du
;
279 this_du
->next_use
= 0;
281 this_du
->insn
= insn
;
283 record_operand_use (head
, this_du
);
287 /* For a def-use chain HEAD, find which registers overlap its lifetime and
288 set the corresponding bits in *PSET. */
291 merge_overlapping_regs (HARD_REG_SET
*pset
, struct du_head
*head
)
295 IOR_HARD_REG_SET (*pset
, head
->hard_conflicts
);
296 EXECUTE_IF_SET_IN_BITMAP (&head
->conflicts
, 0, i
, bi
)
298 du_head_p other
= regrename_chain_from_id (i
);
299 unsigned j
= other
->nregs
;
300 gcc_assert (other
!= head
);
302 SET_HARD_REG_BIT (*pset
, other
->regno
+ j
);
306 /* Check if NEW_REG can be the candidate register to rename for
307 REG in THIS_HEAD chain. THIS_UNAVAILABLE is a set of unavailable hard
311 check_new_reg_p (int reg ATTRIBUTE_UNUSED
, int new_reg
,
312 struct du_head
*this_head
, HARD_REG_SET this_unavailable
)
314 enum machine_mode mode
= GET_MODE (*this_head
->first
->loc
);
315 int nregs
= hard_regno_nregs
[new_reg
][mode
];
317 struct du_chain
*tmp
;
319 for (i
= nregs
- 1; i
>= 0; --i
)
320 if (TEST_HARD_REG_BIT (this_unavailable
, new_reg
+ i
)
321 || fixed_regs
[new_reg
+ i
]
322 || global_regs
[new_reg
+ i
]
323 /* Can't use regs which aren't saved by the prologue. */
324 || (! df_regs_ever_live_p (new_reg
+ i
)
325 && ! call_used_regs
[new_reg
+ i
])
326 #ifdef LEAF_REGISTERS
327 /* We can't use a non-leaf register if we're in a
330 && !LEAF_REGISTERS
[new_reg
+ i
])
332 #ifdef HARD_REGNO_RENAME_OK
333 || ! HARD_REGNO_RENAME_OK (reg
+ i
, new_reg
+ i
)
338 /* See whether it accepts all modes that occur in
339 definition and uses. */
340 for (tmp
= this_head
->first
; tmp
; tmp
= tmp
->next_use
)
341 if ((! HARD_REGNO_MODE_OK (new_reg
, GET_MODE (*tmp
->loc
))
342 && ! DEBUG_INSN_P (tmp
->insn
))
343 || (this_head
->need_caller_save_reg
344 && ! (HARD_REGNO_CALL_PART_CLOBBERED
345 (reg
, GET_MODE (*tmp
->loc
)))
346 && (HARD_REGNO_CALL_PART_CLOBBERED
347 (new_reg
, GET_MODE (*tmp
->loc
)))))
353 /* For the chain THIS_HEAD, compute and return the best register to
354 rename to. SUPER_CLASS is the superunion of register classes in
355 the chain. UNAVAILABLE is a set of registers that cannot be used.
356 OLD_REG is the register currently used for the chain. */
359 find_best_rename_reg (du_head_p this_head
, enum reg_class super_class
,
360 HARD_REG_SET
*unavailable
, int old_reg
)
362 bool has_preferred_class
;
363 enum reg_class preferred_class
;
365 int best_new_reg
= old_reg
;
367 /* Further narrow the set of registers we can use for renaming.
368 If the chain needs a call-saved register, mark the call-used
369 registers as unavailable. */
370 if (this_head
->need_caller_save_reg
)
371 IOR_HARD_REG_SET (*unavailable
, call_used_reg_set
);
373 /* Mark registers that overlap this chain's lifetime as unavailable. */
374 merge_overlapping_regs (unavailable
, this_head
);
376 /* Compute preferred rename class of super union of all the classes
379 = (enum reg_class
) targetm
.preferred_rename_class (super_class
);
381 /* If PREFERRED_CLASS is not NO_REGS, we iterate in the first pass
382 over registers that belong to PREFERRED_CLASS and try to find the
383 best register within the class. If that failed, we iterate in
384 the second pass over registers that don't belong to the class.
385 If PREFERRED_CLASS is NO_REGS, we iterate over all registers in
386 ascending order without any preference. */
387 has_preferred_class
= (preferred_class
!= NO_REGS
);
388 for (pass
= (has_preferred_class
? 0 : 1); pass
< 2; pass
++)
391 for (new_reg
= 0; new_reg
< FIRST_PSEUDO_REGISTER
; new_reg
++)
393 if (has_preferred_class
395 != TEST_HARD_REG_BIT (reg_class_contents
[preferred_class
],
399 /* In the first pass, we force the renaming of registers that
400 don't belong to PREFERRED_CLASS to registers that do, even
401 though the latters were used not very long ago. */
402 if (check_new_reg_p (old_reg
, new_reg
, this_head
,
405 && !TEST_HARD_REG_BIT (reg_class_contents
[preferred_class
],
407 || tick
[best_new_reg
] > tick
[new_reg
]))
408 best_new_reg
= new_reg
;
410 if (pass
== 0 && best_new_reg
!= old_reg
)
416 /* Perform register renaming on the current function. */
420 HARD_REG_SET unavailable
;
424 memset (tick
, 0, sizeof tick
);
426 CLEAR_HARD_REG_SET (unavailable
);
427 /* Don't clobber traceback for noreturn functions. */
428 if (frame_pointer_needed
)
430 add_to_hard_reg_set (&unavailable
, Pmode
, FRAME_POINTER_REGNUM
);
431 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
432 add_to_hard_reg_set (&unavailable
, Pmode
, HARD_FRAME_POINTER_REGNUM
);
436 FOR_EACH_VEC_ELT (id_to_chain
, i
, this_head
)
440 struct du_chain
*tmp
;
441 HARD_REG_SET this_unavailable
;
442 int reg
= this_head
->regno
;
443 enum reg_class super_class
= NO_REGS
;
445 if (this_head
->cannot_rename
)
448 if (fixed_regs
[reg
] || global_regs
[reg
]
449 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
450 || (frame_pointer_needed
&& reg
== HARD_FRAME_POINTER_REGNUM
)
452 || (frame_pointer_needed
&& reg
== FRAME_POINTER_REGNUM
)
457 COPY_HARD_REG_SET (this_unavailable
, unavailable
);
459 /* Iterate over elements in the chain in order to:
460 1. Count number of uses, and narrow the set of registers we can
462 2. Compute the superunion of register classes in this chain. */
464 super_class
= NO_REGS
;
465 for (tmp
= this_head
->first
; tmp
; tmp
= tmp
->next_use
)
467 if (DEBUG_INSN_P (tmp
->insn
))
470 IOR_COMPL_HARD_REG_SET (this_unavailable
,
471 reg_class_contents
[tmp
->cl
]);
473 = reg_class_superunion
[(int) super_class
][(int) tmp
->cl
];
479 best_new_reg
= find_best_rename_reg (this_head
, super_class
,
480 &this_unavailable
, reg
);
484 fprintf (dump_file
, "Register %s in insn %d",
485 reg_names
[reg
], INSN_UID (this_head
->first
->insn
));
486 if (this_head
->need_caller_save_reg
)
487 fprintf (dump_file
, " crosses a call");
490 if (best_new_reg
== reg
)
492 tick
[reg
] = ++this_tick
;
494 fprintf (dump_file
, "; no available better choice\n");
499 fprintf (dump_file
, ", renamed as %s\n", reg_names
[best_new_reg
]);
501 regrename_do_replace (this_head
, best_new_reg
);
502 tick
[best_new_reg
] = ++this_tick
;
503 df_set_regs_ever_live (best_new_reg
, true);
507 /* A structure to record information for each hard register at the start of
509 struct incoming_reg_info
{
510 /* Holds the number of registers used in the chain that gave us information
511 about this register. Zero means no information known yet, while a
512 negative value is used for something that is part of, but not the first
513 register in a multi-register value. */
515 /* Set to true if we have accesses that conflict in the number of registers
520 /* A structure recording information about each basic block. It is saved
521 and restored around basic block boundaries.
522 A pointer to such a structure is stored in each basic block's aux field
523 during regrename_analyze, except for blocks we know can't be optimized
524 (such as entry and exit blocks). */
525 struct bb_rename_info
527 /* The basic block corresponding to this structure. */
529 /* Copies of the global information. */
530 bitmap_head open_chains_set
;
531 bitmap_head incoming_open_chains_set
;
532 struct incoming_reg_info incoming
[FIRST_PSEUDO_REGISTER
];
535 /* Initialize a rename_info structure P for basic block BB, which starts a new
538 init_rename_info (struct bb_rename_info
*p
, basic_block bb
)
542 HARD_REG_SET start_chains_set
;
545 bitmap_initialize (&p
->open_chains_set
, &bitmap_default_obstack
);
546 bitmap_initialize (&p
->incoming_open_chains_set
, &bitmap_default_obstack
);
549 bitmap_clear (&open_chains_set
);
551 CLEAR_HARD_REG_SET (live_in_chains
);
552 REG_SET_TO_HARD_REG_SET (live_hard_regs
, df_get_live_in (bb
));
553 FOR_EACH_ARTIFICIAL_DEF (def
, bb
->index
)
554 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
555 SET_HARD_REG_BIT (live_hard_regs
, DF_REF_REGNO (def
));
557 /* Open chains based on information from (at least one) predecessor
558 block. This gives us a chance later on to combine chains across
559 basic block boundaries. Inconsistencies (in access sizes) will
560 be caught normally and dealt with conservatively by disabling the
561 chain for renaming, and there is no risk of losing optimization
562 opportunities by opening chains either: if we did not open the
563 chains, we'd have to track the live register as a hard reg, and
564 we'd be unable to rename it in any case. */
565 CLEAR_HARD_REG_SET (start_chains_set
);
566 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
568 struct incoming_reg_info
*iri
= p
->incoming
+ i
;
569 if (iri
->nregs
> 0 && !iri
->unusable
570 && range_in_hard_reg_set_p (live_hard_regs
, i
, iri
->nregs
))
572 SET_HARD_REG_BIT (start_chains_set
, i
);
573 remove_range_from_hard_reg_set (&live_hard_regs
, i
, iri
->nregs
);
576 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
578 struct incoming_reg_info
*iri
= p
->incoming
+ i
;
579 if (TEST_HARD_REG_BIT (start_chains_set
, i
))
583 fprintf (dump_file
, "opening incoming chain\n");
584 chain
= create_new_chain (i
, iri
->nregs
, NULL
, NULL
, NO_REGS
);
585 bitmap_set_bit (&p
->incoming_open_chains_set
, chain
->id
);
590 /* Record in RI that the block corresponding to it has an incoming
591 live value, described by CHAIN. */
593 set_incoming_from_chain (struct bb_rename_info
*ri
, du_head_p chain
)
596 int incoming_nregs
= ri
->incoming
[chain
->regno
].nregs
;
599 /* If we've recorded the same information before, everything is fine. */
600 if (incoming_nregs
== chain
->nregs
)
603 fprintf (dump_file
, "reg %d/%d already recorded\n",
604 chain
->regno
, chain
->nregs
);
608 /* If we have no information for any of the involved registers, update
609 the incoming array. */
610 nregs
= chain
->nregs
;
612 if (ri
->incoming
[chain
->regno
+ nregs
].nregs
!= 0
613 || ri
->incoming
[chain
->regno
+ nregs
].unusable
)
617 nregs
= chain
->nregs
;
618 ri
->incoming
[chain
->regno
].nregs
= nregs
;
620 ri
->incoming
[chain
->regno
+ nregs
].nregs
= -nregs
;
622 fprintf (dump_file
, "recorded reg %d/%d\n",
623 chain
->regno
, chain
->nregs
);
627 /* There must be some kind of conflict. Prevent both the old and
628 new ranges from being used. */
629 if (incoming_nregs
< 0)
630 ri
->incoming
[chain
->regno
+ incoming_nregs
].unusable
= true;
631 for (i
= 0; i
< chain
->nregs
; i
++)
632 ri
->incoming
[chain
->regno
+ i
].unusable
= true;
635 /* Merge the two chains C1 and C2 so that all conflict information is
636 recorded and C1, and the id of C2 is changed to that of C1. */
638 merge_chains (du_head_p c1
, du_head_p c2
)
643 if (c2
->first
!= NULL
)
645 if (c1
->first
== NULL
)
646 c1
->first
= c2
->first
;
648 c1
->last
->next_use
= c2
->first
;
652 c2
->first
= c2
->last
= NULL
;
655 IOR_HARD_REG_SET (c1
->hard_conflicts
, c2
->hard_conflicts
);
656 bitmap_ior_into (&c1
->conflicts
, &c2
->conflicts
);
658 c1
->need_caller_save_reg
|= c2
->need_caller_save_reg
;
659 c1
->cannot_rename
|= c2
->cannot_rename
;
662 /* Analyze the current function and build chains for renaming. */
665 regrename_analyze (bitmap bb_mask
)
667 struct bb_rename_info
*rename_info
;
671 int *inverse_postorder
;
673 inverse_postorder
= XNEWVEC (int, last_basic_block_for_fn (cfun
));
674 n_bbs
= pre_and_rev_post_order_compute (NULL
, inverse_postorder
, false);
676 /* Gather some information about the blocks in this function. */
677 rename_info
= XCNEWVEC (struct bb_rename_info
, n_basic_blocks_for_fn (cfun
));
679 FOR_EACH_BB_FN (bb
, cfun
)
681 struct bb_rename_info
*ri
= rename_info
+ i
;
683 if (bb_mask
!= NULL
&& !bitmap_bit_p (bb_mask
, bb
->index
))
691 id_to_chain
.create (0);
692 bitmap_initialize (&open_chains_set
, &bitmap_default_obstack
);
694 /* The order in which we visit blocks ensures that whenever
695 possible, we only process a block after at least one of its
696 predecessors, which provides a "seeding" effect to make the logic
697 in set_incoming_from_chain and init_rename_info useful. */
699 for (i
= 0; i
< n_bbs
; i
++)
701 basic_block bb1
= BASIC_BLOCK_FOR_FN (cfun
, inverse_postorder
[i
]);
702 struct bb_rename_info
*this_info
;
706 int old_length
= id_to_chain
.length ();
708 this_info
= (struct bb_rename_info
*) bb1
->aux
;
709 if (this_info
== NULL
)
713 fprintf (dump_file
, "\nprocessing block %d:\n", bb1
->index
);
715 init_rename_info (this_info
, bb1
);
717 success
= build_def_use (bb1
);
721 fprintf (dump_file
, "failed\n");
723 id_to_chain
.truncate (old_length
);
724 current_id
= old_length
;
725 bitmap_clear (&this_info
->incoming_open_chains_set
);
727 if (insn_rr
.exists ())
730 FOR_BB_INSNS (bb1
, insn
)
732 insn_rr_info
*p
= &insn_rr
[INSN_UID (insn
)];
740 dump_def_use_chain (old_length
);
741 bitmap_copy (&this_info
->open_chains_set
, &open_chains_set
);
743 /* Add successor blocks to the worklist if necessary, and record
744 data about our own open chains at the end of this block, which
745 will be used to pre-open chains when processing the successors. */
746 FOR_EACH_EDGE (e
, ei
, bb1
->succs
)
748 struct bb_rename_info
*dest_ri
;
749 struct du_head
*chain
;
752 fprintf (dump_file
, "successor block %d\n", e
->dest
->index
);
754 if (e
->flags
& (EDGE_EH
| EDGE_ABNORMAL
))
756 dest_ri
= (struct bb_rename_info
*)e
->dest
->aux
;
759 for (chain
= open_chains
; chain
; chain
= chain
->next_chain
)
760 set_incoming_from_chain (dest_ri
, chain
);
764 free (inverse_postorder
);
766 /* Now, combine the chains data we have gathered across basic block
769 For every basic block, there may be chains open at the start, or at the
770 end. Rather than exclude them from renaming, we look for open chains
771 with matching registers at the other side of the CFG edge.
773 For a given chain using register R, open at the start of block B, we
774 must find an open chain using R on the other side of every edge leading
775 to B, if the register is live across this edge. In the code below,
776 N_PREDS_USED counts the number of edges where the register is live, and
777 N_PREDS_JOINED counts those where we found an appropriate chain for
780 We perform the analysis for both incoming and outgoing edges, but we
781 only need to merge once (in the second part, after verifying outgoing
783 FOR_EACH_BB_FN (bb
, cfun
)
785 struct bb_rename_info
*bb_ri
= (struct bb_rename_info
*) bb
->aux
;
793 fprintf (dump_file
, "processing bb %d in edges\n", bb
->index
);
795 EXECUTE_IF_SET_IN_BITMAP (&bb_ri
->incoming_open_chains_set
, 0, j
, bi
)
799 struct du_head
*chain
= regrename_chain_from_id (j
);
800 int n_preds_used
= 0, n_preds_joined
= 0;
802 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
804 struct bb_rename_info
*src_ri
;
808 bool success
= false;
810 REG_SET_TO_HARD_REG_SET (live
, df_get_live_out (e
->src
));
811 if (!range_overlaps_hard_reg_set_p (live
, chain
->regno
,
816 if (e
->flags
& (EDGE_EH
| EDGE_ABNORMAL
))
819 src_ri
= (struct bb_rename_info
*)e
->src
->aux
;
823 EXECUTE_IF_SET_IN_BITMAP (&src_ri
->open_chains_set
,
826 struct du_head
*outgoing_chain
= regrename_chain_from_id (k
);
828 if (outgoing_chain
->regno
== chain
->regno
829 && outgoing_chain
->nregs
== chain
->nregs
)
836 if (!success
&& dump_file
)
837 fprintf (dump_file
, "failure to match with pred block %d\n",
840 if (n_preds_joined
< n_preds_used
)
843 fprintf (dump_file
, "cannot rename chain %d\n", j
);
844 chain
->cannot_rename
= 1;
848 FOR_EACH_BB_FN (bb
, cfun
)
850 struct bb_rename_info
*bb_ri
= (struct bb_rename_info
*) bb
->aux
;
858 fprintf (dump_file
, "processing bb %d out edges\n", bb
->index
);
860 EXECUTE_IF_SET_IN_BITMAP (&bb_ri
->open_chains_set
, 0, j
, bi
)
864 struct du_head
*chain
= regrename_chain_from_id (j
);
865 int n_succs_used
= 0, n_succs_joined
= 0;
867 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
869 bool printed
= false;
870 struct bb_rename_info
*dest_ri
;
875 REG_SET_TO_HARD_REG_SET (live
, df_get_live_in (e
->dest
));
876 if (!range_overlaps_hard_reg_set_p (live
, chain
->regno
,
882 dest_ri
= (struct bb_rename_info
*)e
->dest
->aux
;
886 EXECUTE_IF_SET_IN_BITMAP (&dest_ri
->incoming_open_chains_set
,
889 struct du_head
*incoming_chain
= regrename_chain_from_id (k
);
891 if (incoming_chain
->regno
== chain
->regno
892 && incoming_chain
->nregs
== chain
->nregs
)
898 "merging blocks for edge %d -> %d\n",
899 e
->src
->index
, e
->dest
->index
);
902 " merging chains %d (->%d) and %d (->%d) [%s]\n",
903 k
, incoming_chain
->id
, j
, chain
->id
,
904 reg_names
[incoming_chain
->regno
]);
907 merge_chains (chain
, incoming_chain
);
913 if (n_succs_joined
< n_succs_used
)
916 fprintf (dump_file
, "cannot rename chain %d\n",
918 chain
->cannot_rename
= 1;
925 FOR_EACH_BB_FN (bb
, cfun
)
930 regrename_do_replace (struct du_head
*head
, int reg
)
932 struct du_chain
*chain
;
933 unsigned int base_regno
= head
->regno
;
934 enum machine_mode mode
;
936 for (chain
= head
->first
; chain
; chain
= chain
->next_use
)
938 unsigned int regno
= ORIGINAL_REGNO (*chain
->loc
);
939 struct reg_attrs
*attr
= REG_ATTRS (*chain
->loc
);
940 int reg_ptr
= REG_POINTER (*chain
->loc
);
942 if (DEBUG_INSN_P (chain
->insn
) && REGNO (*chain
->loc
) != base_regno
)
943 INSN_VAR_LOCATION_LOC (chain
->insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
946 *chain
->loc
= gen_raw_REG (GET_MODE (*chain
->loc
), reg
);
947 if (regno
>= FIRST_PSEUDO_REGISTER
)
948 ORIGINAL_REGNO (*chain
->loc
) = regno
;
949 REG_ATTRS (*chain
->loc
) = attr
;
950 REG_POINTER (*chain
->loc
) = reg_ptr
;
953 df_insn_rescan (chain
->insn
);
956 mode
= GET_MODE (*head
->first
->loc
);
958 head
->nregs
= hard_regno_nregs
[reg
][mode
];
962 /* True if we found a register with a size mismatch, which means that we
963 can't track its lifetime accurately. If so, we abort the current block
965 static bool fail_current_block
;
967 /* Return true if OP is a reg for which all bits are set in PSET, false
968 if all bits are clear.
969 In other cases, set fail_current_block and return false. */
972 verify_reg_in_set (rtx op
, HARD_REG_SET
*pset
)
974 unsigned regno
, nregs
;
975 bool all_live
, all_dead
;
980 nregs
= hard_regno_nregs
[regno
][GET_MODE (op
)];
981 all_live
= all_dead
= true;
983 if (TEST_HARD_REG_BIT (*pset
, regno
+ nregs
))
987 if (!all_dead
&& !all_live
)
989 fail_current_block
= true;
995 /* Return true if OP is a reg that is being tracked already in some form.
996 May set fail_current_block if it sees an unhandled case of overlap. */
999 verify_reg_tracked (rtx op
)
1001 return (verify_reg_in_set (op
, &live_hard_regs
)
1002 || verify_reg_in_set (op
, &live_in_chains
));
1005 /* Called through note_stores. DATA points to a rtx_code, either SET or
1006 CLOBBER, which tells us which kind of rtx to look at. If we have a
1007 match, record the set register in live_hard_regs and in the hard_conflicts
1008 bitmap of open chains. */
1011 note_sets_clobbers (rtx x
, const_rtx set
, void *data
)
1013 enum rtx_code code
= *(enum rtx_code
*)data
;
1014 struct du_head
*chain
;
1016 if (GET_CODE (x
) == SUBREG
)
1018 if (!REG_P (x
) || GET_CODE (set
) != code
)
1020 /* There must not be pseudos at this point. */
1021 gcc_assert (HARD_REGISTER_P (x
));
1022 add_to_hard_reg_set (&live_hard_regs
, GET_MODE (x
), REGNO (x
));
1023 for (chain
= open_chains
; chain
; chain
= chain
->next_chain
)
1024 add_to_hard_reg_set (&chain
->hard_conflicts
, GET_MODE (x
), REGNO (x
));
1028 scan_rtx_reg (rtx_insn
*insn
, rtx
*loc
, enum reg_class cl
, enum scan_actions action
,
1033 enum machine_mode mode
= GET_MODE (x
);
1034 unsigned this_regno
= REGNO (x
);
1035 int this_nregs
= hard_regno_nregs
[this_regno
][mode
];
1037 if (action
== mark_write
)
1040 create_new_chain (this_regno
, this_nregs
, loc
, insn
, cl
);
1044 if ((type
== OP_OUT
) != (action
== terminate_write
|| action
== mark_access
))
1047 for (p
= &open_chains
; *p
;)
1049 struct du_head
*head
= *p
;
1050 struct du_head
*next
= head
->next_chain
;
1051 int exact_match
= (head
->regno
== this_regno
1052 && head
->nregs
== this_nregs
);
1053 int superset
= (this_regno
<= head
->regno
1054 && this_regno
+ this_nregs
>= head
->regno
+ head
->nregs
);
1055 int subset
= (this_regno
>= head
->regno
1056 && this_regno
+ this_nregs
<= head
->regno
+ head
->nregs
);
1058 if (!bitmap_bit_p (&open_chains_set
, head
->id
)
1059 || head
->regno
+ head
->nregs
<= this_regno
1060 || this_regno
+ this_nregs
<= head
->regno
)
1062 p
= &head
->next_chain
;
1066 if (action
== mark_read
|| action
== mark_access
)
1068 /* ??? Class NO_REGS can happen if the md file makes use of
1069 EXTRA_CONSTRAINTS to match registers. Which is arguably
1070 wrong, but there we are. */
1072 if (cl
== NO_REGS
|| (!exact_match
&& !DEBUG_INSN_P (insn
)))
1076 "Cannot rename chain %s (%d) at insn %d (%s)\n",
1077 reg_names
[head
->regno
], head
->id
, INSN_UID (insn
),
1078 scan_actions_name
[(int) action
]);
1079 head
->cannot_rename
= 1;
1082 unsigned nregs
= this_nregs
;
1083 head
->regno
= this_regno
;
1084 head
->nregs
= this_nregs
;
1086 SET_HARD_REG_BIT (live_in_chains
, head
->regno
+ nregs
);
1089 "Widening register in chain %s (%d) at insn %d\n",
1090 reg_names
[head
->regno
], head
->id
, INSN_UID (insn
));
1094 fail_current_block
= true;
1097 "Failing basic block due to unhandled overlap\n");
1102 struct du_chain
*this_du
;
1103 this_du
= XOBNEW (&rename_obstack
, struct du_chain
);
1104 this_du
->next_use
= 0;
1106 this_du
->insn
= insn
;
1108 if (head
->first
== NULL
)
1109 head
->first
= this_du
;
1111 head
->last
->next_use
= this_du
;
1112 record_operand_use (head
, this_du
);
1113 head
->last
= this_du
;
1115 /* Avoid adding the same location in a DEBUG_INSN multiple times,
1116 which could happen with non-exact overlap. */
1117 if (DEBUG_INSN_P (insn
))
1119 /* Otherwise, find any other chains that do not match exactly;
1120 ensure they all get marked unrenamable. */
1121 p
= &head
->next_chain
;
1125 /* Whether the terminated chain can be used for renaming
1126 depends on the action and this being an exact match.
1127 In either case, we remove this element from open_chains. */
1129 if ((action
== terminate_dead
|| action
== terminate_write
)
1130 && (superset
|| subset
))
1134 if (subset
&& !superset
)
1135 head
->cannot_rename
= 1;
1136 bitmap_clear_bit (&open_chains_set
, head
->id
);
1138 nregs
= head
->nregs
;
1141 CLEAR_HARD_REG_BIT (live_in_chains
, head
->regno
+ nregs
);
1142 if (subset
&& !superset
1143 && (head
->regno
+ nregs
< this_regno
1144 || head
->regno
+ nregs
>= this_regno
+ this_nregs
))
1145 SET_HARD_REG_BIT (live_hard_regs
, head
->regno
+ nregs
);
1151 "Closing chain %s (%d) at insn %d (%s%s)\n",
1152 reg_names
[head
->regno
], head
->id
, INSN_UID (insn
),
1153 scan_actions_name
[(int) action
],
1154 superset
? ", superset" : subset
? ", subset" : "");
1156 else if (action
== terminate_dead
|| action
== terminate_write
)
1158 /* In this case, tracking liveness gets too hard. Fail the
1159 entire basic block. */
1162 "Failing basic block due to unhandled overlap\n");
1163 fail_current_block
= true;
1168 head
->cannot_rename
= 1;
1171 "Cannot rename chain %s (%d) at insn %d (%s)\n",
1172 reg_names
[head
->regno
], head
->id
, INSN_UID (insn
),
1173 scan_actions_name
[(int) action
]);
1174 p
= &head
->next_chain
;
1179 /* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
1180 BASE_REG_CLASS depending on how the register is being considered. */
1183 scan_rtx_address (rtx_insn
*insn
, rtx
*loc
, enum reg_class cl
,
1184 enum scan_actions action
, enum machine_mode mode
,
1188 RTX_CODE code
= GET_CODE (x
);
1192 if (action
== mark_write
|| action
== mark_access
)
1199 rtx orig_op0
= XEXP (x
, 0);
1200 rtx orig_op1
= XEXP (x
, 1);
1201 RTX_CODE code0
= GET_CODE (orig_op0
);
1202 RTX_CODE code1
= GET_CODE (orig_op1
);
1207 enum rtx_code index_code
= SCRATCH
;
1209 if (GET_CODE (op0
) == SUBREG
)
1211 op0
= SUBREG_REG (op0
);
1212 code0
= GET_CODE (op0
);
1215 if (GET_CODE (op1
) == SUBREG
)
1217 op1
= SUBREG_REG (op1
);
1218 code1
= GET_CODE (op1
);
1221 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
1222 || code0
== ZERO_EXTEND
|| code1
== MEM
)
1224 locI
= &XEXP (x
, 0);
1225 locB
= &XEXP (x
, 1);
1226 index_code
= GET_CODE (*locI
);
1228 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
1229 || code1
== ZERO_EXTEND
|| code0
== MEM
)
1231 locI
= &XEXP (x
, 1);
1232 locB
= &XEXP (x
, 0);
1233 index_code
= GET_CODE (*locI
);
1235 else if (code0
== CONST_INT
|| code0
== CONST
1236 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
1238 locB
= &XEXP (x
, 1);
1239 index_code
= GET_CODE (XEXP (x
, 0));
1241 else if (code1
== CONST_INT
|| code1
== CONST
1242 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
1244 locB
= &XEXP (x
, 0);
1245 index_code
= GET_CODE (XEXP (x
, 1));
1247 else if (code0
== REG
&& code1
== REG
)
1250 unsigned regno0
= REGNO (op0
), regno1
= REGNO (op1
);
1252 if (REGNO_OK_FOR_INDEX_P (regno1
)
1253 && regno_ok_for_base_p (regno0
, mode
, as
, PLUS
, REG
))
1255 else if (REGNO_OK_FOR_INDEX_P (regno0
)
1256 && regno_ok_for_base_p (regno1
, mode
, as
, PLUS
, REG
))
1258 else if (regno_ok_for_base_p (regno0
, mode
, as
, PLUS
, REG
)
1259 || REGNO_OK_FOR_INDEX_P (regno1
))
1261 else if (regno_ok_for_base_p (regno1
, mode
, as
, PLUS
, REG
))
1266 locI
= &XEXP (x
, index_op
);
1267 locB
= &XEXP (x
, !index_op
);
1268 index_code
= GET_CODE (*locI
);
1270 else if (code0
== REG
)
1272 locI
= &XEXP (x
, 0);
1273 locB
= &XEXP (x
, 1);
1274 index_code
= GET_CODE (*locI
);
1276 else if (code1
== REG
)
1278 locI
= &XEXP (x
, 1);
1279 locB
= &XEXP (x
, 0);
1280 index_code
= GET_CODE (*locI
);
1284 scan_rtx_address (insn
, locI
, INDEX_REG_CLASS
, action
, mode
, as
);
1286 scan_rtx_address (insn
, locB
,
1287 base_reg_class (mode
, as
, PLUS
, index_code
),
1299 #ifndef AUTO_INC_DEC
1300 /* If the target doesn't claim to handle autoinc, this must be
1301 something special, like a stack push. Kill this chain. */
1302 action
= mark_all_read
;
1307 scan_rtx_address (insn
, &XEXP (x
, 0),
1308 base_reg_class (GET_MODE (x
), MEM_ADDR_SPACE (x
),
1310 action
, GET_MODE (x
), MEM_ADDR_SPACE (x
));
1314 scan_rtx_reg (insn
, loc
, cl
, action
, OP_IN
);
1321 fmt
= GET_RTX_FORMAT (code
);
1322 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1325 scan_rtx_address (insn
, &XEXP (x
, i
), cl
, action
, mode
, as
);
1326 else if (fmt
[i
] == 'E')
1327 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1328 scan_rtx_address (insn
, &XVECEXP (x
, i
, j
), cl
, action
, mode
, as
);
1333 scan_rtx (rtx_insn
*insn
, rtx
*loc
, enum reg_class cl
, enum scan_actions action
,
1338 enum rtx_code code
= GET_CODE (x
);
1341 code
= GET_CODE (x
);
1353 scan_rtx_reg (insn
, loc
, cl
, action
, type
);
1357 scan_rtx_address (insn
, &XEXP (x
, 0),
1358 base_reg_class (GET_MODE (x
), MEM_ADDR_SPACE (x
),
1360 action
, GET_MODE (x
), MEM_ADDR_SPACE (x
));
1364 scan_rtx (insn
, &SET_SRC (x
), cl
, action
, OP_IN
);
1365 scan_rtx (insn
, &SET_DEST (x
), cl
, action
,
1366 (GET_CODE (PATTERN (insn
)) == COND_EXEC
1367 && verify_reg_tracked (SET_DEST (x
))) ? OP_INOUT
: OP_OUT
);
1370 case STRICT_LOW_PART
:
1371 scan_rtx (insn
, &XEXP (x
, 0), cl
, action
,
1372 verify_reg_tracked (XEXP (x
, 0)) ? OP_INOUT
: OP_OUT
);
1377 scan_rtx (insn
, &XEXP (x
, 0), cl
, action
,
1378 (type
== OP_IN
? OP_IN
:
1379 verify_reg_tracked (XEXP (x
, 0)) ? OP_INOUT
: OP_OUT
));
1380 scan_rtx (insn
, &XEXP (x
, 1), cl
, action
, OP_IN
);
1381 scan_rtx (insn
, &XEXP (x
, 2), cl
, action
, OP_IN
);
1390 /* Should only happen inside MEM. */
1394 scan_rtx (insn
, &SET_DEST (x
), cl
, action
,
1395 (GET_CODE (PATTERN (insn
)) == COND_EXEC
1396 && verify_reg_tracked (SET_DEST (x
))) ? OP_INOUT
: OP_OUT
);
1400 scan_rtx (insn
, &XEXP (x
, 0), cl
, action
, type
);
1402 scan_rtx (insn
, &XEXP (x
, 1), cl
, action
, type
);
1409 fmt
= GET_RTX_FORMAT (code
);
1410 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1413 scan_rtx (insn
, &XEXP (x
, i
), cl
, action
, type
);
1414 else if (fmt
[i
] == 'E')
1415 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1416 scan_rtx (insn
, &XVECEXP (x
, i
, j
), cl
, action
, type
);
1420 /* Hide operands of the current insn (of which there are N_OPS) by
1421 substituting cc0 for them.
1422 Previous values are stored in the OLD_OPERANDS and OLD_DUPS.
1423 For every bit set in DO_NOT_HIDE, we leave the operand alone.
1424 If INOUT_AND_EC_ONLY is set, we only do this for OP_INOUT type operands
1425 and earlyclobbers. */
1428 hide_operands (int n_ops
, rtx
*old_operands
, rtx
*old_dups
,
1429 unsigned HOST_WIDE_INT do_not_hide
, bool inout_and_ec_only
)
1432 const operand_alternative
*op_alt
= which_op_alt ();
1433 for (i
= 0; i
< n_ops
; i
++)
1435 old_operands
[i
] = recog_data
.operand
[i
];
1436 /* Don't squash match_operator or match_parallel here, since
1437 we don't know that all of the contained registers are
1438 reachable by proper operands. */
1439 if (recog_data
.constraints
[i
][0] == '\0')
1441 if (do_not_hide
& (1 << i
))
1443 if (!inout_and_ec_only
|| recog_data
.operand_type
[i
] == OP_INOUT
1444 || op_alt
[i
].earlyclobber
)
1445 *recog_data
.operand_loc
[i
] = cc0_rtx
;
1447 for (i
= 0; i
< recog_data
.n_dups
; i
++)
1449 int opn
= recog_data
.dup_num
[i
];
1450 old_dups
[i
] = *recog_data
.dup_loc
[i
];
1451 if (do_not_hide
& (1 << opn
))
1453 if (!inout_and_ec_only
|| recog_data
.operand_type
[opn
] == OP_INOUT
1454 || op_alt
[opn
].earlyclobber
)
1455 *recog_data
.dup_loc
[i
] = cc0_rtx
;
1459 /* Undo the substitution performed by hide_operands. INSN is the insn we
1460 are processing; the arguments are the same as in hide_operands. */
1463 restore_operands (rtx_insn
*insn
, int n_ops
, rtx
*old_operands
, rtx
*old_dups
)
1466 for (i
= 0; i
< recog_data
.n_dups
; i
++)
1467 *recog_data
.dup_loc
[i
] = old_dups
[i
];
1468 for (i
= 0; i
< n_ops
; i
++)
1469 *recog_data
.operand_loc
[i
] = old_operands
[i
];
1470 if (recog_data
.n_dups
)
1471 df_insn_rescan (insn
);
1474 /* For each output operand of INSN, call scan_rtx to create a new
1475 open chain. Do this only for normal or earlyclobber outputs,
1476 depending on EARLYCLOBBER. If INSN_INFO is nonnull, use it to
1477 record information about the operands in the insn. */
1480 record_out_operands (rtx_insn
*insn
, bool earlyclobber
, insn_rr_info
*insn_info
)
1482 int n_ops
= recog_data
.n_operands
;
1483 const operand_alternative
*op_alt
= which_op_alt ();
1487 for (i
= 0; i
< n_ops
+ recog_data
.n_dups
; i
++)
1489 int opn
= i
< n_ops
? i
: recog_data
.dup_num
[i
- n_ops
];
1490 rtx
*loc
= (i
< n_ops
1491 ? recog_data
.operand_loc
[opn
]
1492 : recog_data
.dup_loc
[i
- n_ops
]);
1494 enum reg_class cl
= alternative_class (op_alt
, opn
);
1496 struct du_head
*prev_open
;
1498 if (recog_data
.operand_type
[opn
] != OP_OUT
1499 || op_alt
[opn
].earlyclobber
!= earlyclobber
)
1503 cur_operand
= insn_info
->op_info
+ i
;
1505 prev_open
= open_chains
;
1506 scan_rtx (insn
, loc
, cl
, mark_write
, OP_OUT
);
1508 /* ??? Many targets have output constraints on the SET_DEST
1509 of a call insn, which is stupid, since these are certainly
1510 ABI defined hard registers. For these, and for asm operands
1511 that originally referenced hard registers, we must record that
1512 the chain cannot be renamed. */
1514 || (asm_noperands (PATTERN (insn
)) > 0
1516 && REGNO (op
) == ORIGINAL_REGNO (op
)))
1518 if (prev_open
!= open_chains
)
1519 open_chains
->cannot_rename
= 1;
1525 /* Build def/use chain. */
1528 build_def_use (basic_block bb
)
1531 unsigned HOST_WIDE_INT untracked_operands
;
1533 fail_current_block
= false;
1535 for (insn
= BB_HEAD (bb
); ; insn
= NEXT_INSN (insn
))
1537 if (NONDEBUG_INSN_P (insn
))
1541 rtx old_operands
[MAX_RECOG_OPERANDS
];
1542 rtx old_dups
[MAX_DUP_OPERANDS
];
1545 enum rtx_code set_code
= SET
;
1546 enum rtx_code clobber_code
= CLOBBER
;
1547 insn_rr_info
*insn_info
= NULL
;
1549 /* Process the insn, determining its effect on the def-use
1550 chains and live hard registers. We perform the following
1551 steps with the register references in the insn, simulating
1553 (1) Deal with earlyclobber operands and CLOBBERs of non-operands
1554 by creating chains and marking hard regs live.
1555 (2) Any read outside an operand causes any chain it overlaps
1556 with to be marked unrenamable.
1557 (3) Any read inside an operand is added if there's already
1558 an open chain for it.
1559 (4) For any REG_DEAD note we find, close open chains that
1561 (5) For any non-earlyclobber write we find, close open chains
1563 (6) For any non-earlyclobber write we find in an operand, make
1564 a new chain or mark the hard register as live.
1565 (7) For any REG_UNUSED, close any chains we just opened.
1567 We cannot deal with situations where we track a reg in one mode
1568 and see a reference in another mode; these will cause the chain
1569 to be marked unrenamable or even cause us to abort the entire
1572 extract_constrain_insn (insn
);
1573 preprocess_constraints (insn
);
1574 const operand_alternative
*op_alt
= which_op_alt ();
1575 n_ops
= recog_data
.n_operands
;
1576 untracked_operands
= 0;
1578 if (insn_rr
.exists ())
1580 insn_info
= &insn_rr
[INSN_UID (insn
)];
1581 insn_info
->op_info
= XOBNEWVEC (&rename_obstack
, operand_rr_info
,
1582 recog_data
.n_operands
);
1583 memset (insn_info
->op_info
, 0,
1584 sizeof (operand_rr_info
) * recog_data
.n_operands
);
1587 /* Simplify the code below by promoting OP_OUT to OP_INOUT in
1588 predicated instructions, but only for register operands
1589 that are already tracked, so that we can create a chain
1590 when the first SET makes a register live. */
1592 predicated
= GET_CODE (PATTERN (insn
)) == COND_EXEC
;
1593 for (i
= 0; i
< n_ops
; ++i
)
1595 rtx op
= recog_data
.operand
[i
];
1596 int matches
= op_alt
[i
].matches
;
1597 if (matches
>= 0 || op_alt
[i
].matched
>= 0
1598 || (predicated
&& recog_data
.operand_type
[i
] == OP_OUT
))
1600 recog_data
.operand_type
[i
] = OP_INOUT
;
1601 /* A special case to deal with instruction patterns that
1602 have matching operands with different modes. If we're
1603 not already tracking such a reg, we won't start here,
1604 and we must instead make sure to make the operand visible
1605 to the machinery that tracks hard registers. */
1607 && (GET_MODE_SIZE (recog_data
.operand_mode
[i
])
1608 != GET_MODE_SIZE (recog_data
.operand_mode
[matches
]))
1609 && !verify_reg_in_set (op
, &live_in_chains
))
1611 untracked_operands
|= 1 << i
;
1612 untracked_operands
|= 1 << matches
;
1615 /* If there's an in-out operand with a register that is not
1616 being tracked at all yet, open a chain. */
1617 if (recog_data
.operand_type
[i
] == OP_INOUT
1618 && !(untracked_operands
& (1 << i
))
1620 && !verify_reg_tracked (op
))
1622 enum machine_mode mode
= GET_MODE (op
);
1623 unsigned this_regno
= REGNO (op
);
1624 unsigned this_nregs
= hard_regno_nregs
[this_regno
][mode
];
1625 create_new_chain (this_regno
, this_nregs
, NULL
, NULL
,
1630 if (fail_current_block
)
1633 /* Step 1a: Mark hard registers that are clobbered in this insn,
1634 outside an operand, as live. */
1635 hide_operands (n_ops
, old_operands
, old_dups
, untracked_operands
,
1637 note_stores (PATTERN (insn
), note_sets_clobbers
, &clobber_code
);
1638 restore_operands (insn
, n_ops
, old_operands
, old_dups
);
1640 /* Step 1b: Begin new chains for earlyclobbered writes inside
1642 record_out_operands (insn
, true, insn_info
);
1644 /* Step 2: Mark chains for which we have reads outside operands
1646 We do this by munging all operands into CC0, and closing
1647 everything remaining. */
1649 hide_operands (n_ops
, old_operands
, old_dups
, untracked_operands
,
1651 scan_rtx (insn
, &PATTERN (insn
), NO_REGS
, mark_all_read
, OP_IN
);
1652 restore_operands (insn
, n_ops
, old_operands
, old_dups
);
1654 /* Step 2B: Can't rename function call argument registers. */
1655 if (CALL_P (insn
) && CALL_INSN_FUNCTION_USAGE (insn
))
1656 scan_rtx (insn
, &CALL_INSN_FUNCTION_USAGE (insn
),
1657 NO_REGS
, mark_all_read
, OP_IN
);
1659 /* Step 2C: Can't rename asm operands that were originally
1661 if (asm_noperands (PATTERN (insn
)) > 0)
1662 for (i
= 0; i
< n_ops
; i
++)
1664 rtx
*loc
= recog_data
.operand_loc
[i
];
1668 && REGNO (op
) == ORIGINAL_REGNO (op
)
1669 && (recog_data
.operand_type
[i
] == OP_IN
1670 || recog_data
.operand_type
[i
] == OP_INOUT
))
1671 scan_rtx (insn
, loc
, NO_REGS
, mark_all_read
, OP_IN
);
1674 /* Step 3: Append to chains for reads inside operands. */
1675 for (i
= 0; i
< n_ops
+ recog_data
.n_dups
; i
++)
1677 int opn
= i
< n_ops
? i
: recog_data
.dup_num
[i
- n_ops
];
1678 rtx
*loc
= (i
< n_ops
1679 ? recog_data
.operand_loc
[opn
]
1680 : recog_data
.dup_loc
[i
- n_ops
]);
1681 enum reg_class cl
= alternative_class (op_alt
, opn
);
1682 enum op_type type
= recog_data
.operand_type
[opn
];
1684 /* Don't scan match_operand here, since we've no reg class
1685 information to pass down. Any operands that we could
1686 substitute in will be represented elsewhere. */
1687 if (recog_data
.constraints
[opn
][0] == '\0'
1688 || untracked_operands
& (1 << opn
))
1692 cur_operand
= i
== opn
? insn_info
->op_info
+ i
: NULL
;
1693 if (op_alt
[opn
].is_address
)
1694 scan_rtx_address (insn
, loc
, cl
, mark_read
,
1695 VOIDmode
, ADDR_SPACE_GENERIC
);
1697 scan_rtx (insn
, loc
, cl
, mark_read
, type
);
1701 /* Step 3B: Record updates for regs in REG_INC notes, and
1702 source regs in REG_FRAME_RELATED_EXPR notes. */
1703 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1704 if (REG_NOTE_KIND (note
) == REG_INC
1705 || REG_NOTE_KIND (note
) == REG_FRAME_RELATED_EXPR
)
1706 scan_rtx (insn
, &XEXP (note
, 0), ALL_REGS
, mark_read
,
1709 /* Step 4: Close chains for registers that die here, unless
1710 the register is mentioned in a REG_UNUSED note. In that
1711 case we keep the chain open until step #7 below to ensure
1712 it conflicts with other output operands of this insn.
1713 See PR 52573. Arguably the insn should not have both
1714 notes; it has proven difficult to fix that without
1715 other undesirable side effects. */
1716 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1717 if (REG_NOTE_KIND (note
) == REG_DEAD
1718 && !find_regno_note (insn
, REG_UNUSED
, REGNO (XEXP (note
, 0))))
1720 remove_from_hard_reg_set (&live_hard_regs
,
1721 GET_MODE (XEXP (note
, 0)),
1722 REGNO (XEXP (note
, 0)));
1723 scan_rtx (insn
, &XEXP (note
, 0), NO_REGS
, terminate_dead
,
1727 /* Step 4B: If this is a call, any chain live at this point
1728 requires a caller-saved reg. */
1732 for (p
= open_chains
; p
; p
= p
->next_chain
)
1733 p
->need_caller_save_reg
= 1;
1736 /* Step 5: Close open chains that overlap writes. Similar to
1737 step 2, we hide in-out operands, since we do not want to
1738 close these chains. We also hide earlyclobber operands,
1739 since we've opened chains for them in step 1, and earlier
1740 chains they would overlap with must have been closed at
1741 the previous insn at the latest, as such operands cannot
1742 possibly overlap with any input operands. */
1744 hide_operands (n_ops
, old_operands
, old_dups
, untracked_operands
,
1746 scan_rtx (insn
, &PATTERN (insn
), NO_REGS
, terminate_write
, OP_IN
);
1747 restore_operands (insn
, n_ops
, old_operands
, old_dups
);
1749 /* Step 6a: Mark hard registers that are set in this insn,
1750 outside an operand, as live. */
1751 hide_operands (n_ops
, old_operands
, old_dups
, untracked_operands
,
1753 note_stores (PATTERN (insn
), note_sets_clobbers
, &set_code
);
1754 restore_operands (insn
, n_ops
, old_operands
, old_dups
);
1756 /* Step 6b: Begin new chains for writes inside operands. */
1757 record_out_operands (insn
, false, insn_info
);
1759 /* Step 6c: Record destination regs in REG_FRAME_RELATED_EXPR
1760 notes for update. */
1761 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1762 if (REG_NOTE_KIND (note
) == REG_FRAME_RELATED_EXPR
)
1763 scan_rtx (insn
, &XEXP (note
, 0), ALL_REGS
, mark_access
,
1766 /* Step 7: Close chains for registers that were never
1767 really used here. */
1768 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1769 if (REG_NOTE_KIND (note
) == REG_UNUSED
)
1771 remove_from_hard_reg_set (&live_hard_regs
,
1772 GET_MODE (XEXP (note
, 0)),
1773 REGNO (XEXP (note
, 0)));
1774 scan_rtx (insn
, &XEXP (note
, 0), NO_REGS
, terminate_dead
,
1778 else if (DEBUG_INSN_P (insn
)
1779 && !VAR_LOC_UNKNOWN_P (INSN_VAR_LOCATION_LOC (insn
)))
1781 scan_rtx (insn
, &INSN_VAR_LOCATION_LOC (insn
),
1782 ALL_REGS
, mark_read
, OP_IN
);
1784 if (insn
== BB_END (bb
))
1788 if (fail_current_block
)
1794 /* Initialize the register renamer. If INSN_INFO is true, ensure that
1795 insn_rr is nonnull. */
1797 regrename_init (bool insn_info
)
1799 gcc_obstack_init (&rename_obstack
);
1802 insn_rr
.safe_grow_cleared (get_max_uid ());
1805 /* Free all global data used by the register renamer. */
1807 regrename_finish (void)
1811 obstack_free (&rename_obstack
, NULL
);
1814 /* Perform register renaming on the current function. */
1817 regrename_optimize (void)
1819 df_set_flags (DF_LR_RUN_DCE
);
1820 df_note_add_problem ();
1822 df_set_flags (DF_DEFER_INSN_RESCAN
);
1824 regrename_init (false);
1826 regrename_analyze (NULL
);
1830 regrename_finish ();
1837 const pass_data pass_data_regrename
=
1839 RTL_PASS
, /* type */
1841 OPTGROUP_NONE
, /* optinfo_flags */
1842 TV_RENAME_REGISTERS
, /* tv_id */
1843 0, /* properties_required */
1844 0, /* properties_provided */
1845 0, /* properties_destroyed */
1846 0, /* todo_flags_start */
1847 TODO_df_finish
, /* todo_flags_finish */
1850 class pass_regrename
: public rtl_opt_pass
1853 pass_regrename (gcc::context
*ctxt
)
1854 : rtl_opt_pass (pass_data_regrename
, ctxt
)
1857 /* opt_pass methods: */
1858 virtual bool gate (function
*)
1860 return (optimize
> 0 && (flag_rename_registers
));
1863 virtual unsigned int execute (function
*) { return regrename_optimize (); }
1865 }; // class pass_regrename
1870 make_pass_regrename (gcc::context
*ctxt
)
1872 return new pass_regrename (ctxt
);