1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
33 #include "insn-attr.h"
34 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
40 #include "typeclass.h"
42 #include "langhooks.h"
45 #include "tree-iterator.h"
46 #include "tree-flow.h"
48 #include "common/common-target.h"
51 #include "diagnostic.h"
52 #include "ssaexpand.h"
53 #include "target-globals.h"
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
76 #define STACK_PUSH_CODE PRE_INC
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
89 /* This structure is used by move_by_pieces to describe the move to
91 struct move_by_pieces_d
100 int explicit_inc_from
;
101 unsigned HOST_WIDE_INT len
;
102 HOST_WIDE_INT offset
;
106 /* This structure is used by store_by_pieces to describe the clear to
109 struct store_by_pieces_d
115 unsigned HOST_WIDE_INT len
;
116 HOST_WIDE_INT offset
;
117 rtx (*constfun
) (void *, HOST_WIDE_INT
, enum machine_mode
);
122 static void move_by_pieces_1 (insn_gen_fn
, machine_mode
,
123 struct move_by_pieces_d
*);
124 static bool block_move_libcall_safe_for_call_parm (void);
125 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
);
126 static tree
emit_block_move_libcall_fn (int);
127 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
128 static rtx
clear_by_pieces_1 (void *, HOST_WIDE_INT
, enum machine_mode
);
129 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
130 static void store_by_pieces_1 (struct store_by_pieces_d
*, unsigned int);
131 static void store_by_pieces_2 (insn_gen_fn
, machine_mode
,
132 struct store_by_pieces_d
*);
133 static tree
clear_storage_libcall_fn (int);
134 static rtx
compress_float_constant (rtx
, rtx
);
135 static rtx
get_subtarget (rtx
);
136 static void store_constructor_field (rtx
, unsigned HOST_WIDE_INT
,
137 HOST_WIDE_INT
, enum machine_mode
,
138 tree
, int, alias_set_type
);
139 static void store_constructor (tree
, rtx
, int, HOST_WIDE_INT
);
140 static rtx
store_field (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
,
141 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
142 enum machine_mode
, tree
, alias_set_type
, bool);
144 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
146 static int is_aligning_offset (const_tree
, const_tree
);
147 static void expand_operands (tree
, tree
, rtx
, rtx
*, rtx
*,
148 enum expand_modifier
);
149 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
150 static rtx
do_store_flag (sepops
, rtx
, enum machine_mode
);
152 static void emit_single_push_insn (enum machine_mode
, rtx
, tree
);
154 static void do_tablejump (rtx
, enum machine_mode
, rtx
, rtx
, rtx
, int);
155 static rtx
const_vector_from_tree (tree
);
156 static void write_complex_part (rtx
, rtx
, bool);
158 /* This macro is used to determine whether move_by_pieces should be called
159 to perform a structure copy. */
160 #ifndef MOVE_BY_PIECES_P
161 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
162 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
163 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
166 /* This macro is used to determine whether clear_by_pieces should be
167 called to clear storage. */
168 #ifndef CLEAR_BY_PIECES_P
169 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
171 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
174 /* This macro is used to determine whether store_by_pieces should be
175 called to "memset" storage with byte values other than zero. */
176 #ifndef SET_BY_PIECES_P
177 #define SET_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memcpy" storage when the source is a constant string. */
184 #ifndef STORE_BY_PIECES_P
185 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
190 /* This is run to set up which modes can be used
191 directly in memory and to initialize the block move optab. It is run
192 at the beginning of compilation and when the target is reinitialized. */
195 init_expr_target (void)
198 enum machine_mode mode
;
203 /* Try indexing by frame ptr and try by stack ptr.
204 It is known that on the Convex the stack ptr isn't a valid index.
205 With luck, one or the other is valid on any machine. */
206 mem
= gen_rtx_MEM (VOIDmode
, stack_pointer_rtx
);
207 mem1
= gen_rtx_MEM (VOIDmode
, frame_pointer_rtx
);
209 /* A scratch register we can modify in-place below to avoid
210 useless RTL allocations. */
211 reg
= gen_rtx_REG (VOIDmode
, -1);
213 insn
= rtx_alloc (INSN
);
214 pat
= gen_rtx_SET (VOIDmode
, NULL_RTX
, NULL_RTX
);
215 PATTERN (insn
) = pat
;
217 for (mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
218 mode
= (enum machine_mode
) ((int) mode
+ 1))
222 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
223 PUT_MODE (mem
, mode
);
224 PUT_MODE (mem1
, mode
);
225 PUT_MODE (reg
, mode
);
227 /* See if there is some register that can be used in this mode and
228 directly loaded or stored from memory. */
230 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
231 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
232 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
235 if (! HARD_REGNO_MODE_OK (regno
, mode
))
238 SET_REGNO (reg
, regno
);
241 SET_DEST (pat
) = reg
;
242 if (recog (pat
, insn
, &num_clobbers
) >= 0)
243 direct_load
[(int) mode
] = 1;
245 SET_SRC (pat
) = mem1
;
246 SET_DEST (pat
) = reg
;
247 if (recog (pat
, insn
, &num_clobbers
) >= 0)
248 direct_load
[(int) mode
] = 1;
251 SET_DEST (pat
) = mem
;
252 if (recog (pat
, insn
, &num_clobbers
) >= 0)
253 direct_store
[(int) mode
] = 1;
256 SET_DEST (pat
) = mem1
;
257 if (recog (pat
, insn
, &num_clobbers
) >= 0)
258 direct_store
[(int) mode
] = 1;
262 mem
= gen_rtx_MEM (VOIDmode
, gen_rtx_raw_REG (Pmode
, 10000));
264 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
265 mode
= GET_MODE_WIDER_MODE (mode
))
267 enum machine_mode srcmode
;
268 for (srcmode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); srcmode
!= mode
;
269 srcmode
= GET_MODE_WIDER_MODE (srcmode
))
273 ic
= can_extend_p (mode
, srcmode
, 0);
274 if (ic
== CODE_FOR_nothing
)
277 PUT_MODE (mem
, srcmode
);
279 if (insn_operand_matches (ic
, 1, mem
))
280 float_extend_from_mem
[mode
][srcmode
] = true;
285 /* This is run at the start of compiling a function. */
290 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
293 /* Copy data from FROM to TO, where the machine modes are not the same.
294 Both modes may be integer, or both may be floating, or both may be
296 UNSIGNEDP should be nonzero if FROM is an unsigned type.
297 This causes zero-extension instead of sign-extension. */
300 convert_move (rtx to
, rtx from
, int unsignedp
)
302 enum machine_mode to_mode
= GET_MODE (to
);
303 enum machine_mode from_mode
= GET_MODE (from
);
304 int to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
305 int from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
309 /* rtx code for making an equivalent value. */
310 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
311 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
314 gcc_assert (to_real
== from_real
);
315 gcc_assert (to_mode
!= BLKmode
);
316 gcc_assert (from_mode
!= BLKmode
);
318 /* If the source and destination are already the same, then there's
323 /* If FROM is a SUBREG that indicates that we have already done at least
324 the required extension, strip it. We don't handle such SUBREGs as
327 if (GET_CODE (from
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (from
)
328 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from
)))
329 >= GET_MODE_PRECISION (to_mode
))
330 && SUBREG_PROMOTED_UNSIGNED_P (from
) == unsignedp
)
331 from
= gen_lowpart (to_mode
, from
), from_mode
= to_mode
;
333 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
335 if (to_mode
== from_mode
336 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
338 emit_move_insn (to
, from
);
342 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
344 gcc_assert (GET_MODE_BITSIZE (from_mode
) == GET_MODE_BITSIZE (to_mode
));
346 if (VECTOR_MODE_P (to_mode
))
347 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
349 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
351 emit_move_insn (to
, from
);
355 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
357 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
358 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
367 gcc_assert ((GET_MODE_PRECISION (from_mode
)
368 != GET_MODE_PRECISION (to_mode
))
369 || (DECIMAL_FLOAT_MODE_P (from_mode
)
370 != DECIMAL_FLOAT_MODE_P (to_mode
)));
372 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
373 /* Conversion between decimal float and binary float, same size. */
374 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
375 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
380 /* Try converting directly if the insn is supported. */
382 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
383 if (code
!= CODE_FOR_nothing
)
385 emit_unop_insn (code
, to
, from
,
386 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
390 /* Otherwise use a libcall. */
391 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
393 /* Is this conversion implemented yet? */
394 gcc_assert (libcall
);
397 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
399 insns
= get_insns ();
401 emit_libcall_block (insns
, to
, value
,
402 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
404 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
408 /* Handle pointer conversion. */ /* SPEE 900220. */
409 /* Targets are expected to provide conversion insns between PxImode and
410 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
411 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
413 enum machine_mode full_mode
414 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode
), MODE_INT
);
416 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
417 != CODE_FOR_nothing
);
419 if (full_mode
!= from_mode
)
420 from
= convert_to_mode (full_mode
, from
, unsignedp
);
421 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
425 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
428 enum machine_mode full_mode
429 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode
), MODE_INT
);
430 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
431 enum insn_code icode
;
433 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
434 gcc_assert (icode
!= CODE_FOR_nothing
);
436 if (to_mode
== full_mode
)
438 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
442 new_from
= gen_reg_rtx (full_mode
);
443 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
445 /* else proceed to integer conversions below. */
446 from_mode
= full_mode
;
450 /* Make sure both are fixed-point modes or both are not. */
451 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
452 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
453 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
455 /* If we widen from_mode to to_mode and they are in the same class,
456 we won't saturate the result.
457 Otherwise, always saturate the result to play safe. */
458 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
459 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
460 expand_fixed_convert (to
, from
, 0, 0);
462 expand_fixed_convert (to
, from
, 0, 1);
466 /* Now both modes are integers. */
468 /* Handle expanding beyond a word. */
469 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
470 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
477 enum machine_mode lowpart_mode
;
478 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
480 /* Try converting directly if the insn is supported. */
481 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
484 /* If FROM is a SUBREG, put it into a register. Do this
485 so that we always generate the same set of insns for
486 better cse'ing; if an intermediate assignment occurred,
487 we won't be doing the operation directly on the SUBREG. */
488 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
489 from
= force_reg (from_mode
, from
);
490 emit_unop_insn (code
, to
, from
, equiv_code
);
493 /* Next, try converting via full word. */
494 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
495 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
496 != CODE_FOR_nothing
))
498 rtx word_to
= gen_reg_rtx (word_mode
);
501 if (reg_overlap_mentioned_p (to
, from
))
502 from
= force_reg (from_mode
, from
);
505 convert_move (word_to
, from
, unsignedp
);
506 emit_unop_insn (code
, to
, word_to
, equiv_code
);
510 /* No special multiword conversion insn; do it by hand. */
513 /* Since we will turn this into a no conflict block, we must ensure the
514 the source does not overlap the target so force it into an isolated
515 register when maybe so. Likewise for any MEM input, since the
516 conversion sequence might require several references to it and we
517 must ensure we're getting the same value every time. */
519 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
520 from
= force_reg (from_mode
, from
);
522 /* Get a copy of FROM widened to a word, if necessary. */
523 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
524 lowpart_mode
= word_mode
;
526 lowpart_mode
= from_mode
;
528 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
530 lowpart
= gen_lowpart (lowpart_mode
, to
);
531 emit_move_insn (lowpart
, lowfrom
);
533 /* Compute the value to put in each remaining word. */
535 fill_value
= const0_rtx
;
537 fill_value
= emit_store_flag (gen_reg_rtx (word_mode
),
538 LT
, lowfrom
, const0_rtx
,
541 /* Fill the remaining words. */
542 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
544 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
545 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
547 gcc_assert (subword
);
549 if (fill_value
!= subword
)
550 emit_move_insn (subword
, fill_value
);
553 insns
= get_insns ();
560 /* Truncating multi-word to a word or less. */
561 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
562 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
565 && ! MEM_VOLATILE_P (from
)
566 && direct_load
[(int) to_mode
]
567 && ! mode_dependent_address_p (XEXP (from
, 0),
568 MEM_ADDR_SPACE (from
)))
570 || GET_CODE (from
) == SUBREG
))
571 from
= force_reg (from_mode
, from
);
572 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
576 /* Now follow all the conversions between integers
577 no more than a word long. */
579 /* For truncation, usually we can just refer to FROM in a narrower mode. */
580 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
581 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
584 && ! MEM_VOLATILE_P (from
)
585 && direct_load
[(int) to_mode
]
586 && ! mode_dependent_address_p (XEXP (from
, 0),
587 MEM_ADDR_SPACE (from
)))
589 || GET_CODE (from
) == SUBREG
))
590 from
= force_reg (from_mode
, from
);
591 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
592 && ! HARD_REGNO_MODE_OK (REGNO (from
), to_mode
))
593 from
= copy_to_reg (from
);
594 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
598 /* Handle extension. */
599 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
601 /* Convert directly if that works. */
602 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
605 emit_unop_insn (code
, to
, from
, equiv_code
);
610 enum machine_mode intermediate
;
614 /* Search for a mode to convert via. */
615 for (intermediate
= from_mode
; intermediate
!= VOIDmode
;
616 intermediate
= GET_MODE_WIDER_MODE (intermediate
))
617 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
619 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
620 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, intermediate
)))
621 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
622 != CODE_FOR_nothing
))
624 convert_move (to
, convert_to_mode (intermediate
, from
,
625 unsignedp
), unsignedp
);
629 /* No suitable intermediate mode.
630 Generate what we need with shifts. */
631 shift_amount
= (GET_MODE_PRECISION (to_mode
)
632 - GET_MODE_PRECISION (from_mode
));
633 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
634 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
636 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
639 emit_move_insn (to
, tmp
);
644 /* Support special truncate insns for certain modes. */
645 if (convert_optab_handler (trunc_optab
, to_mode
,
646 from_mode
) != CODE_FOR_nothing
)
648 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
653 /* Handle truncation of volatile memrefs, and so on;
654 the things that couldn't be truncated directly,
655 and for which there was no special instruction.
657 ??? Code above formerly short-circuited this, for most integer
658 mode pairs, with a force_reg in from_mode followed by a recursive
659 call to this routine. Appears always to have been wrong. */
660 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
662 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
663 emit_move_insn (to
, temp
);
667 /* Mode combination is not recognized. */
671 /* Return an rtx for a value that would result
672 from converting X to mode MODE.
673 Both X and MODE may be floating, or both integer.
674 UNSIGNEDP is nonzero if X is an unsigned value.
675 This can be done by referring to a part of X in place
676 or by copying to a new temporary with conversion. */
679 convert_to_mode (enum machine_mode mode
, rtx x
, int unsignedp
)
681 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
684 /* Return an rtx for a value that would result
685 from converting X from mode OLDMODE to mode MODE.
686 Both modes may be floating, or both integer.
687 UNSIGNEDP is nonzero if X is an unsigned value.
689 This can be done by referring to a part of X in place
690 or by copying to a new temporary with conversion.
692 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
695 convert_modes (enum machine_mode mode
, enum machine_mode oldmode
, rtx x
, int unsignedp
)
699 /* If FROM is a SUBREG that indicates that we have already done at least
700 the required extension, strip it. */
702 if (GET_CODE (x
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (x
)
703 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) >= GET_MODE_SIZE (mode
)
704 && SUBREG_PROMOTED_UNSIGNED_P (x
) == unsignedp
)
705 x
= gen_lowpart (mode
, x
);
707 if (GET_MODE (x
) != VOIDmode
)
708 oldmode
= GET_MODE (x
);
713 /* There is one case that we must handle specially: If we are converting
714 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
715 we are to interpret the constant as unsigned, gen_lowpart will do
716 the wrong if the constant appears negative. What we want to do is
717 make the high-order word of the constant zero, not all ones. */
719 if (unsignedp
&& GET_MODE_CLASS (mode
) == MODE_INT
720 && GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_DOUBLE_INT
721 && CONST_INT_P (x
) && INTVAL (x
) < 0)
723 double_int val
= double_int::from_uhwi (INTVAL (x
));
725 /* We need to zero extend VAL. */
726 if (oldmode
!= VOIDmode
)
727 val
= val
.zext (GET_MODE_BITSIZE (oldmode
));
729 return immed_double_int_const (val
, mode
);
732 /* We can do this with a gen_lowpart if both desired and current modes
733 are integer, and this is either a constant integer, a register, or a
734 non-volatile MEM. Except for the constant case where MODE is no
735 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
738 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
)
739 || (GET_MODE_CLASS (mode
) == MODE_INT
740 && GET_MODE_CLASS (oldmode
) == MODE_INT
741 && (CONST_DOUBLE_AS_INT_P (x
)
742 || (GET_MODE_PRECISION (mode
) <= GET_MODE_PRECISION (oldmode
)
743 && ((MEM_P (x
) && ! MEM_VOLATILE_P (x
)
744 && direct_load
[(int) mode
])
746 && (! HARD_REGISTER_P (x
)
747 || HARD_REGNO_MODE_OK (REGNO (x
), mode
))
748 && TRULY_NOOP_TRUNCATION_MODES_P (mode
,
751 /* ?? If we don't know OLDMODE, we have to assume here that
752 X does not need sign- or zero-extension. This may not be
753 the case, but it's the best we can do. */
754 if (CONST_INT_P (x
) && oldmode
!= VOIDmode
755 && GET_MODE_PRECISION (mode
) > GET_MODE_PRECISION (oldmode
))
757 HOST_WIDE_INT val
= INTVAL (x
);
759 /* We must sign or zero-extend in this case. Start by
760 zero-extending, then sign extend if we need to. */
761 val
&= GET_MODE_MASK (oldmode
);
763 && val_signbit_known_set_p (oldmode
, val
))
764 val
|= ~GET_MODE_MASK (oldmode
);
766 return gen_int_mode (val
, mode
);
769 return gen_lowpart (mode
, x
);
772 /* Converting from integer constant into mode is always equivalent to an
774 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
776 gcc_assert (GET_MODE_BITSIZE (mode
) == GET_MODE_BITSIZE (oldmode
));
777 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
780 temp
= gen_reg_rtx (mode
);
781 convert_move (temp
, x
, unsignedp
);
785 /* Return the largest alignment we can use for doing a move (or store)
786 of MAX_PIECES. ALIGN is the largest alignment we could use. */
789 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
791 enum machine_mode tmode
;
793 tmode
= mode_for_size (max_pieces
* BITS_PER_UNIT
, MODE_INT
, 1);
794 if (align
>= GET_MODE_ALIGNMENT (tmode
))
795 align
= GET_MODE_ALIGNMENT (tmode
);
798 enum machine_mode tmode
, xmode
;
800 for (tmode
= GET_CLASS_NARROWEST_MODE (MODE_INT
), xmode
= tmode
;
802 xmode
= tmode
, tmode
= GET_MODE_WIDER_MODE (tmode
))
803 if (GET_MODE_SIZE (tmode
) > max_pieces
804 || SLOW_UNALIGNED_ACCESS (tmode
, align
))
807 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
813 /* Return the widest integer mode no wider than SIZE. If no such mode
814 can be found, return VOIDmode. */
816 static enum machine_mode
817 widest_int_mode_for_size (unsigned int size
)
819 enum machine_mode tmode
, mode
= VOIDmode
;
821 for (tmode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
822 tmode
!= VOIDmode
; tmode
= GET_MODE_WIDER_MODE (tmode
))
823 if (GET_MODE_SIZE (tmode
) < size
)
829 /* STORE_MAX_PIECES is the number of bytes at a time that we can
830 store efficiently. Due to internal GCC limitations, this is
831 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
832 for an immediate constant. */
834 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
836 /* Determine whether the LEN bytes can be moved by using several move
837 instructions. Return nonzero if a call to move_by_pieces should
841 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED
,
842 unsigned int align ATTRIBUTE_UNUSED
)
844 return MOVE_BY_PIECES_P (len
, align
);
847 /* Generate several move instructions to copy LEN bytes from block FROM to
848 block TO. (These are MEM rtx's with BLKmode).
850 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
851 used to push FROM to the stack.
853 ALIGN is maximum stack alignment we can assume.
855 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
856 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
860 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
861 unsigned int align
, int endp
)
863 struct move_by_pieces_d data
;
864 enum machine_mode to_addr_mode
;
865 enum machine_mode from_addr_mode
= get_address_mode (from
);
866 rtx to_addr
, from_addr
= XEXP (from
, 0);
867 unsigned int max_size
= MOVE_MAX_PIECES
+ 1;
868 enum insn_code icode
;
870 align
= MIN (to
? MEM_ALIGN (to
) : align
, MEM_ALIGN (from
));
873 data
.from_addr
= from_addr
;
876 to_addr_mode
= get_address_mode (to
);
877 to_addr
= XEXP (to
, 0);
880 = (GET_CODE (to_addr
) == PRE_INC
|| GET_CODE (to_addr
) == PRE_DEC
881 || GET_CODE (to_addr
) == POST_INC
|| GET_CODE (to_addr
) == POST_DEC
);
883 = (GET_CODE (to_addr
) == PRE_DEC
|| GET_CODE (to_addr
) == POST_DEC
);
887 to_addr_mode
= VOIDmode
;
891 #ifdef STACK_GROWS_DOWNWARD
897 data
.to_addr
= to_addr
;
900 = (GET_CODE (from_addr
) == PRE_INC
|| GET_CODE (from_addr
) == PRE_DEC
901 || GET_CODE (from_addr
) == POST_INC
902 || GET_CODE (from_addr
) == POST_DEC
);
904 data
.explicit_inc_from
= 0;
905 data
.explicit_inc_to
= 0;
906 if (data
.reverse
) data
.offset
= len
;
909 /* If copying requires more than two move insns,
910 copy addresses to registers (to make displacements shorter)
911 and use post-increment if available. */
912 if (!(data
.autinc_from
&& data
.autinc_to
)
913 && move_by_pieces_ninsns (len
, align
, max_size
) > 2)
915 /* Find the mode of the largest move...
916 MODE might not be used depending on the definitions of the
917 USE_* macros below. */
918 enum machine_mode mode ATTRIBUTE_UNUSED
919 = widest_int_mode_for_size (max_size
);
921 if (USE_LOAD_PRE_DECREMENT (mode
) && data
.reverse
&& ! data
.autinc_from
)
923 data
.from_addr
= copy_to_mode_reg (from_addr_mode
,
924 plus_constant (from_addr_mode
,
926 data
.autinc_from
= 1;
927 data
.explicit_inc_from
= -1;
929 if (USE_LOAD_POST_INCREMENT (mode
) && ! data
.autinc_from
)
931 data
.from_addr
= copy_to_mode_reg (from_addr_mode
, from_addr
);
932 data
.autinc_from
= 1;
933 data
.explicit_inc_from
= 1;
935 if (!data
.autinc_from
&& CONSTANT_P (from_addr
))
936 data
.from_addr
= copy_to_mode_reg (from_addr_mode
, from_addr
);
937 if (USE_STORE_PRE_DECREMENT (mode
) && data
.reverse
&& ! data
.autinc_to
)
939 data
.to_addr
= copy_to_mode_reg (to_addr_mode
,
940 plus_constant (to_addr_mode
,
943 data
.explicit_inc_to
= -1;
945 if (USE_STORE_POST_INCREMENT (mode
) && ! data
.reverse
&& ! data
.autinc_to
)
947 data
.to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
949 data
.explicit_inc_to
= 1;
951 if (!data
.autinc_to
&& CONSTANT_P (to_addr
))
952 data
.to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
955 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
957 /* First move what we can in the largest integer mode, then go to
958 successively smaller modes. */
960 while (max_size
> 1 && data
.len
> 0)
962 enum machine_mode mode
= widest_int_mode_for_size (max_size
);
964 if (mode
== VOIDmode
)
967 icode
= optab_handler (mov_optab
, mode
);
968 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
969 move_by_pieces_1 (GEN_FCN (icode
), mode
, &data
);
971 max_size
= GET_MODE_SIZE (mode
);
974 /* The code above should have handled everything. */
975 gcc_assert (!data
.len
);
981 gcc_assert (!data
.reverse
);
986 if (HAVE_POST_INCREMENT
&& data
.explicit_inc_to
> 0)
987 emit_insn (gen_add2_insn (data
.to_addr
, constm1_rtx
));
989 data
.to_addr
= copy_to_mode_reg (to_addr_mode
,
990 plus_constant (to_addr_mode
,
994 to1
= adjust_automodify_address (data
.to
, QImode
, data
.to_addr
,
1001 to1
= adjust_address (data
.to
, QImode
, data
.offset
);
1009 /* Return number of insns required to move L bytes by pieces.
1010 ALIGN (in bits) is maximum alignment we can assume. */
1012 unsigned HOST_WIDE_INT
1013 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
1014 unsigned int max_size
)
1016 unsigned HOST_WIDE_INT n_insns
= 0;
1018 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1020 while (max_size
> 1 && l
> 0)
1022 enum machine_mode mode
;
1023 enum insn_code icode
;
1025 mode
= widest_int_mode_for_size (max_size
);
1027 if (mode
== VOIDmode
)
1030 icode
= optab_handler (mov_optab
, mode
);
1031 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
1032 n_insns
+= l
/ GET_MODE_SIZE (mode
), l
%= GET_MODE_SIZE (mode
);
1034 max_size
= GET_MODE_SIZE (mode
);
1041 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1042 with move instructions for mode MODE. GENFUN is the gen_... function
1043 to make a move insn for that mode. DATA has all the other info. */
1046 move_by_pieces_1 (insn_gen_fn genfun
, machine_mode mode
,
1047 struct move_by_pieces_d
*data
)
1049 unsigned int size
= GET_MODE_SIZE (mode
);
1050 rtx to1
= NULL_RTX
, from1
;
1052 while (data
->len
>= size
)
1055 data
->offset
-= size
;
1059 if (data
->autinc_to
)
1060 to1
= adjust_automodify_address (data
->to
, mode
, data
->to_addr
,
1063 to1
= adjust_address (data
->to
, mode
, data
->offset
);
1066 if (data
->autinc_from
)
1067 from1
= adjust_automodify_address (data
->from
, mode
, data
->from_addr
,
1070 from1
= adjust_address (data
->from
, mode
, data
->offset
);
1072 if (HAVE_PRE_DECREMENT
&& data
->explicit_inc_to
< 0)
1073 emit_insn (gen_add2_insn (data
->to_addr
,
1074 GEN_INT (-(HOST_WIDE_INT
)size
)));
1075 if (HAVE_PRE_DECREMENT
&& data
->explicit_inc_from
< 0)
1076 emit_insn (gen_add2_insn (data
->from_addr
,
1077 GEN_INT (-(HOST_WIDE_INT
)size
)));
1080 emit_insn ((*genfun
) (to1
, from1
));
1083 #ifdef PUSH_ROUNDING
1084 emit_single_push_insn (mode
, from1
, NULL
);
1090 if (HAVE_POST_INCREMENT
&& data
->explicit_inc_to
> 0)
1091 emit_insn (gen_add2_insn (data
->to_addr
, GEN_INT (size
)));
1092 if (HAVE_POST_INCREMENT
&& data
->explicit_inc_from
> 0)
1093 emit_insn (gen_add2_insn (data
->from_addr
, GEN_INT (size
)));
1095 if (! data
->reverse
)
1096 data
->offset
+= size
;
1102 /* Emit code to move a block Y to a block X. This may be done with
1103 string-move instructions, with multiple scalar move instructions,
1104 or with a library call.
1106 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1107 SIZE is an rtx that says how long they are.
1108 ALIGN is the maximum alignment we can assume they have.
1109 METHOD describes what kind of copy this is, and what mechanisms may be used.
1111 Return the address of the new block, if memcpy is called and returns it,
1115 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1116 unsigned int expected_align
, HOST_WIDE_INT expected_size
)
1123 if (CONST_INT_P (size
)
1124 && INTVAL (size
) == 0)
1129 case BLOCK_OP_NORMAL
:
1130 case BLOCK_OP_TAILCALL
:
1131 may_use_call
= true;
1134 case BLOCK_OP_CALL_PARM
:
1135 may_use_call
= block_move_libcall_safe_for_call_parm ();
1137 /* Make inhibit_defer_pop nonzero around the library call
1138 to force it to pop the arguments right away. */
1142 case BLOCK_OP_NO_LIBCALL
:
1143 may_use_call
= false;
1150 gcc_assert (MEM_P (x
) && MEM_P (y
));
1151 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1152 gcc_assert (align
>= BITS_PER_UNIT
);
1154 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1155 block copy is more efficient for other large modes, e.g. DCmode. */
1156 x
= adjust_address (x
, BLKmode
, 0);
1157 y
= adjust_address (y
, BLKmode
, 0);
1159 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1160 can be incorrect is coming from __builtin_memcpy. */
1161 if (CONST_INT_P (size
))
1163 x
= shallow_copy_rtx (x
);
1164 y
= shallow_copy_rtx (y
);
1165 set_mem_size (x
, INTVAL (size
));
1166 set_mem_size (y
, INTVAL (size
));
1169 if (CONST_INT_P (size
) && MOVE_BY_PIECES_P (INTVAL (size
), align
))
1170 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1171 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1172 expected_align
, expected_size
))
1174 else if (may_use_call
1175 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1176 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1178 /* Since x and y are passed to a libcall, mark the corresponding
1179 tree EXPR as addressable. */
1180 tree y_expr
= MEM_EXPR (y
);
1181 tree x_expr
= MEM_EXPR (x
);
1183 mark_addressable (y_expr
);
1185 mark_addressable (x_expr
);
1186 retval
= emit_block_move_via_libcall (x
, y
, size
,
1187 method
== BLOCK_OP_TAILCALL
);
1191 emit_block_move_via_loop (x
, y
, size
, align
);
1193 if (method
== BLOCK_OP_CALL_PARM
)
1200 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1202 return emit_block_move_hints (x
, y
, size
, method
, 0, -1);
1205 /* A subroutine of emit_block_move. Returns true if calling the
1206 block move libcall will not clobber any parameters which may have
1207 already been placed on the stack. */
1210 block_move_libcall_safe_for_call_parm (void)
1212 #if defined (REG_PARM_STACK_SPACE)
1216 /* If arguments are pushed on the stack, then they're safe. */
1220 /* If registers go on the stack anyway, any argument is sure to clobber
1221 an outgoing argument. */
1222 #if defined (REG_PARM_STACK_SPACE)
1223 fn
= emit_block_move_libcall_fn (false);
1224 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1225 depend on its argument. */
1227 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1228 && REG_PARM_STACK_SPACE (fn
) != 0)
1232 /* If any argument goes in memory, then it might clobber an outgoing
1235 CUMULATIVE_ARGS args_so_far_v
;
1236 cumulative_args_t args_so_far
;
1239 fn
= emit_block_move_libcall_fn (false);
1240 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1241 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1243 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1244 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1246 enum machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1247 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1249 if (!tmp
|| !REG_P (tmp
))
1251 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1253 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1260 /* A subroutine of emit_block_move. Expand a movmem pattern;
1261 return true if successful. */
1264 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1265 unsigned int expected_align
, HOST_WIDE_INT expected_size
)
1267 int save_volatile_ok
= volatile_ok
;
1268 enum machine_mode mode
;
1270 if (expected_align
< align
)
1271 expected_align
= align
;
1273 /* Since this is a move insn, we don't care about volatility. */
1276 /* Try the most limited insn first, because there's no point
1277 including more than one in the machine description unless
1278 the more limited one has some advantage. */
1280 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1281 mode
= GET_MODE_WIDER_MODE (mode
))
1283 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1285 if (code
!= CODE_FOR_nothing
1286 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1287 here because if SIZE is less than the mode mask, as it is
1288 returned by the macro, it will definitely be less than the
1289 actual mode mask. */
1290 && ((CONST_INT_P (size
)
1291 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1292 <= (GET_MODE_MASK (mode
) >> 1)))
1293 || GET_MODE_BITSIZE (mode
) >= BITS_PER_WORD
))
1295 struct expand_operand ops
[6];
1298 /* ??? When called via emit_block_move_for_call, it'd be
1299 nice if there were some way to inform the backend, so
1300 that it doesn't fail the expansion because it thinks
1301 emitting the libcall would be more efficient. */
1302 nops
= insn_data
[(int) code
].n_generator_args
;
1303 gcc_assert (nops
== 4 || nops
== 6);
1305 create_fixed_operand (&ops
[0], x
);
1306 create_fixed_operand (&ops
[1], y
);
1307 /* The check above guarantees that this size conversion is valid. */
1308 create_convert_operand_to (&ops
[2], size
, mode
, true);
1309 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1312 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1313 create_integer_operand (&ops
[5], expected_size
);
1315 if (maybe_expand_insn (code
, nops
, ops
))
1317 volatile_ok
= save_volatile_ok
;
1323 volatile_ok
= save_volatile_ok
;
1327 /* A subroutine of emit_block_move. Expand a call to memcpy.
1328 Return the return value from memcpy, 0 otherwise. */
1331 emit_block_move_via_libcall (rtx dst
, rtx src
, rtx size
, bool tailcall
)
1333 rtx dst_addr
, src_addr
;
1334 tree call_expr
, fn
, src_tree
, dst_tree
, size_tree
;
1335 enum machine_mode size_mode
;
1338 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1339 pseudos. We can then place those new pseudos into a VAR_DECL and
1342 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1343 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1345 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1346 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1348 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1349 src_tree
= make_tree (ptr_type_node
, src_addr
);
1351 size_mode
= TYPE_MODE (sizetype
);
1353 size
= convert_to_mode (size_mode
, size
, 1);
1354 size
= copy_to_mode_reg (size_mode
, size
);
1356 /* It is incorrect to use the libcall calling conventions to call
1357 memcpy in this context. This could be a user call to memcpy and
1358 the user may wish to examine the return value from memcpy. For
1359 targets where libcalls and normal calls have different conventions
1360 for returning pointers, we could end up generating incorrect code. */
1362 size_tree
= make_tree (sizetype
, size
);
1364 fn
= emit_block_move_libcall_fn (true);
1365 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1366 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1368 retval
= expand_normal (call_expr
);
1373 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1374 for the function we use for block copies. */
1376 static GTY(()) tree block_move_fn
;
1379 init_block_move_fn (const char *asmspec
)
1383 tree args
, fn
, attrs
, attr_args
;
1385 fn
= get_identifier ("memcpy");
1386 args
= build_function_type_list (ptr_type_node
, ptr_type_node
,
1387 const_ptr_type_node
, sizetype
,
1390 fn
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
, fn
, args
);
1391 DECL_EXTERNAL (fn
) = 1;
1392 TREE_PUBLIC (fn
) = 1;
1393 DECL_ARTIFICIAL (fn
) = 1;
1394 TREE_NOTHROW (fn
) = 1;
1395 DECL_VISIBILITY (fn
) = VISIBILITY_DEFAULT
;
1396 DECL_VISIBILITY_SPECIFIED (fn
) = 1;
1398 attr_args
= build_tree_list (NULL_TREE
, build_string (1, "1"));
1399 attrs
= tree_cons (get_identifier ("fn spec"), attr_args
, NULL
);
1401 decl_attributes (&fn
, attrs
, ATTR_FLAG_BUILT_IN
);
1407 set_user_assembler_name (block_move_fn
, asmspec
);
1411 emit_block_move_libcall_fn (int for_call
)
1413 static bool emitted_extern
;
1416 init_block_move_fn (NULL
);
1418 if (for_call
&& !emitted_extern
)
1420 emitted_extern
= true;
1421 make_decl_rtl (block_move_fn
);
1424 return block_move_fn
;
1427 /* A subroutine of emit_block_move. Copy the data via an explicit
1428 loop. This is used only when libcalls are forbidden. */
1429 /* ??? It'd be nice to copy in hunks larger than QImode. */
1432 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1433 unsigned int align ATTRIBUTE_UNUSED
)
1435 rtx cmp_label
, top_label
, iter
, x_addr
, y_addr
, tmp
;
1436 enum machine_mode x_addr_mode
= get_address_mode (x
);
1437 enum machine_mode y_addr_mode
= get_address_mode (y
);
1438 enum machine_mode iter_mode
;
1440 iter_mode
= GET_MODE (size
);
1441 if (iter_mode
== VOIDmode
)
1442 iter_mode
= word_mode
;
1444 top_label
= gen_label_rtx ();
1445 cmp_label
= gen_label_rtx ();
1446 iter
= gen_reg_rtx (iter_mode
);
1448 emit_move_insn (iter
, const0_rtx
);
1450 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1451 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1452 do_pending_stack_adjust ();
1454 emit_jump (cmp_label
);
1455 emit_label (top_label
);
1457 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1458 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1460 if (x_addr_mode
!= y_addr_mode
)
1461 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1462 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1464 x
= change_address (x
, QImode
, x_addr
);
1465 y
= change_address (y
, QImode
, y_addr
);
1467 emit_move_insn (x
, y
);
1469 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1470 true, OPTAB_LIB_WIDEN
);
1472 emit_move_insn (iter
, tmp
);
1474 emit_label (cmp_label
);
1476 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1477 true, top_label
, REG_BR_PROB_BASE
* 90 / 100);
1480 /* Copy all or part of a value X into registers starting at REGNO.
1481 The number of registers to be filled is NREGS. */
1484 move_block_to_reg (int regno
, rtx x
, int nregs
, enum machine_mode mode
)
1487 #ifdef HAVE_load_multiple
1495 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
1496 x
= validize_mem (force_const_mem (mode
, x
));
1498 /* See if the machine can do this with a load multiple insn. */
1499 #ifdef HAVE_load_multiple
1500 if (HAVE_load_multiple
)
1502 last
= get_last_insn ();
1503 pat
= gen_load_multiple (gen_rtx_REG (word_mode
, regno
), x
,
1511 delete_insns_since (last
);
1515 for (i
= 0; i
< nregs
; i
++)
1516 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
1517 operand_subword_force (x
, i
, mode
));
1520 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1521 The number of registers to be filled is NREGS. */
1524 move_block_from_reg (int regno
, rtx x
, int nregs
)
1531 /* See if the machine can do this with a store multiple insn. */
1532 #ifdef HAVE_store_multiple
1533 if (HAVE_store_multiple
)
1535 rtx last
= get_last_insn ();
1536 rtx pat
= gen_store_multiple (x
, gen_rtx_REG (word_mode
, regno
),
1544 delete_insns_since (last
);
1548 for (i
= 0; i
< nregs
; i
++)
1550 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
1554 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
1558 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1559 ORIG, where ORIG is a non-consecutive group of registers represented by
1560 a PARALLEL. The clone is identical to the original except in that the
1561 original set of registers is replaced by a new set of pseudo registers.
1562 The new set has the same modes as the original set. */
1565 gen_group_rtx (rtx orig
)
1570 gcc_assert (GET_CODE (orig
) == PARALLEL
);
1572 length
= XVECLEN (orig
, 0);
1573 tmps
= XALLOCAVEC (rtx
, length
);
1575 /* Skip a NULL entry in first slot. */
1576 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
1581 for (; i
< length
; i
++)
1583 enum machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
1584 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
1586 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
1589 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
1592 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1593 except that values are placed in TMPS[i], and must later be moved
1594 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1597 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
, int ssize
)
1601 enum machine_mode m
= GET_MODE (orig_src
);
1603 gcc_assert (GET_CODE (dst
) == PARALLEL
);
1606 && !SCALAR_INT_MODE_P (m
)
1607 && !MEM_P (orig_src
)
1608 && GET_CODE (orig_src
) != CONCAT
)
1610 enum machine_mode imode
= int_mode_for_mode (GET_MODE (orig_src
));
1611 if (imode
== BLKmode
)
1612 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
1614 src
= gen_reg_rtx (imode
);
1615 if (imode
!= BLKmode
)
1616 src
= gen_lowpart (GET_MODE (orig_src
), src
);
1617 emit_move_insn (src
, orig_src
);
1618 /* ...and back again. */
1619 if (imode
!= BLKmode
)
1620 src
= gen_lowpart (imode
, src
);
1621 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
1625 /* Check for a NULL entry, used to indicate that the parameter goes
1626 both on the stack and in registers. */
1627 if (XEXP (XVECEXP (dst
, 0, 0), 0))
1632 /* Process the pieces. */
1633 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
1635 enum machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
1636 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
1637 unsigned int bytelen
= GET_MODE_SIZE (mode
);
1640 /* Handle trailing fragments that run over the size of the struct. */
1641 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
1643 /* Arrange to shift the fragment to where it belongs.
1644 extract_bit_field loads to the lsb of the reg. */
1646 #ifdef BLOCK_REG_PADDING
1647 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
1648 == (BYTES_BIG_ENDIAN
? upward
: downward
)
1653 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
1654 bytelen
= ssize
- bytepos
;
1655 gcc_assert (bytelen
> 0);
1658 /* If we won't be loading directly from memory, protect the real source
1659 from strange tricks we might play; but make sure that the source can
1660 be loaded directly into the destination. */
1662 if (!MEM_P (orig_src
)
1663 && (!CONSTANT_P (orig_src
)
1664 || (GET_MODE (orig_src
) != mode
1665 && GET_MODE (orig_src
) != VOIDmode
)))
1667 if (GET_MODE (orig_src
) == VOIDmode
)
1668 src
= gen_reg_rtx (mode
);
1670 src
= gen_reg_rtx (GET_MODE (orig_src
));
1672 emit_move_insn (src
, orig_src
);
1675 /* Optimize the access just a bit. */
1677 && (! SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (src
))
1678 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
1679 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
1680 && bytelen
== GET_MODE_SIZE (mode
))
1682 tmps
[i
] = gen_reg_rtx (mode
);
1683 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
1685 else if (COMPLEX_MODE_P (mode
)
1686 && GET_MODE (src
) == mode
1687 && bytelen
== GET_MODE_SIZE (mode
))
1688 /* Let emit_move_complex do the bulk of the work. */
1690 else if (GET_CODE (src
) == CONCAT
)
1692 unsigned int slen
= GET_MODE_SIZE (GET_MODE (src
));
1693 unsigned int slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
1695 if ((bytepos
== 0 && bytelen
== slen0
)
1696 || (bytepos
!= 0 && bytepos
+ bytelen
<= slen
))
1698 /* The following assumes that the concatenated objects all
1699 have the same size. In this case, a simple calculation
1700 can be used to determine the object and the bit field
1702 tmps
[i
] = XEXP (src
, bytepos
/ slen0
);
1703 if (! CONSTANT_P (tmps
[i
])
1704 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
))
1705 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
1706 (bytepos
% slen0
) * BITS_PER_UNIT
,
1707 1, false, NULL_RTX
, mode
, mode
);
1713 gcc_assert (!bytepos
);
1714 mem
= assign_stack_temp (GET_MODE (src
), slen
);
1715 emit_move_insn (mem
, src
);
1716 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
1717 0, 1, false, NULL_RTX
, mode
, mode
);
1720 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1721 SIMD register, which is currently broken. While we get GCC
1722 to emit proper RTL for these cases, let's dump to memory. */
1723 else if (VECTOR_MODE_P (GET_MODE (dst
))
1726 int slen
= GET_MODE_SIZE (GET_MODE (src
));
1729 mem
= assign_stack_temp (GET_MODE (src
), slen
);
1730 emit_move_insn (mem
, src
);
1731 tmps
[i
] = adjust_address (mem
, mode
, (int) bytepos
);
1733 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
1734 && XVECLEN (dst
, 0) > 1)
1735 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE(dst
), bytepos
);
1736 else if (CONSTANT_P (src
))
1738 HOST_WIDE_INT len
= (HOST_WIDE_INT
) bytelen
;
1746 gcc_assert (2 * len
== ssize
);
1747 split_double (src
, &first
, &second
);
1754 else if (REG_P (src
) && GET_MODE (src
) == mode
)
1757 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
1758 bytepos
* BITS_PER_UNIT
, 1, false, NULL_RTX
,
1762 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
1767 /* Emit code to move a block SRC of type TYPE to a block DST,
1768 where DST is non-consecutive registers represented by a PARALLEL.
1769 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 emit_group_load (rtx dst
, rtx src
, tree type
, int ssize
)
1778 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
1779 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
1781 /* Copy the extracted pieces into the proper (probable) hard regs. */
1782 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
1784 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
1787 emit_move_insn (d
, tmps
[i
]);
1791 /* Similar, but load SRC into new pseudos in a format that looks like
1792 PARALLEL. This can later be fed to emit_group_move to get things
1793 in the right place. */
1796 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, int ssize
)
1801 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
1802 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
1804 /* Convert the vector to look just like the original PARALLEL, except
1805 with the computed values. */
1806 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
1808 rtx e
= XVECEXP (parallel
, 0, i
);
1809 rtx d
= XEXP (e
, 0);
1813 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
1814 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
1816 RTVEC_ELT (vec
, i
) = e
;
1819 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
1822 /* Emit code to move a block SRC to block DST, where SRC and DST are
1823 non-consecutive groups of registers, each represented by a PARALLEL. */
1826 emit_group_move (rtx dst
, rtx src
)
1830 gcc_assert (GET_CODE (src
) == PARALLEL
1831 && GET_CODE (dst
) == PARALLEL
1832 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
1834 /* Skip first entry if NULL. */
1835 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
1836 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
1837 XEXP (XVECEXP (src
, 0, i
), 0));
1840 /* Move a group of registers represented by a PARALLEL into pseudos. */
1843 emit_group_move_into_temps (rtx src
)
1845 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
1848 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
1850 rtx e
= XVECEXP (src
, 0, i
);
1851 rtx d
= XEXP (e
, 0);
1854 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
1855 RTVEC_ELT (vec
, i
) = e
;
1858 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
1861 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1862 where SRC is non-consecutive registers represented by a PARALLEL.
1863 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
, int ssize
)
1870 int start
, finish
, i
;
1871 enum machine_mode m
= GET_MODE (orig_dst
);
1873 gcc_assert (GET_CODE (src
) == PARALLEL
);
1875 if (!SCALAR_INT_MODE_P (m
)
1876 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
1878 enum machine_mode imode
= int_mode_for_mode (GET_MODE (orig_dst
));
1879 if (imode
== BLKmode
)
1880 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
1882 dst
= gen_reg_rtx (imode
);
1883 emit_group_store (dst
, src
, type
, ssize
);
1884 if (imode
!= BLKmode
)
1885 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
1886 emit_move_insn (orig_dst
, dst
);
1890 /* Check for a NULL entry, used to indicate that the parameter goes
1891 both on the stack and in registers. */
1892 if (XEXP (XVECEXP (src
, 0, 0), 0))
1896 finish
= XVECLEN (src
, 0);
1898 tmps
= XALLOCAVEC (rtx
, finish
);
1900 /* Copy the (probable) hard regs into pseudos. */
1901 for (i
= start
; i
< finish
; i
++)
1903 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
1904 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
1906 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
1907 emit_move_insn (tmps
[i
], reg
);
1913 /* If we won't be storing directly into memory, protect the real destination
1914 from strange tricks we might play. */
1916 if (GET_CODE (dst
) == PARALLEL
)
1920 /* We can get a PARALLEL dst if there is a conditional expression in
1921 a return statement. In that case, the dst and src are the same,
1922 so no action is necessary. */
1923 if (rtx_equal_p (dst
, src
))
1926 /* It is unclear if we can ever reach here, but we may as well handle
1927 it. Allocate a temporary, and split this into a store/load to/from
1930 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
1931 emit_group_store (temp
, src
, type
, ssize
);
1932 emit_group_load (dst
, temp
, type
, ssize
);
1935 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
1937 enum machine_mode outer
= GET_MODE (dst
);
1938 enum machine_mode inner
;
1939 HOST_WIDE_INT bytepos
;
1943 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1944 dst
= gen_reg_rtx (outer
);
1946 /* Make life a bit easier for combine. */
1947 /* If the first element of the vector is the low part
1948 of the destination mode, use a paradoxical subreg to
1949 initialize the destination. */
1952 inner
= GET_MODE (tmps
[start
]);
1953 bytepos
= subreg_lowpart_offset (inner
, outer
);
1954 if (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)) == bytepos
)
1956 temp
= simplify_gen_subreg (outer
, tmps
[start
],
1960 emit_move_insn (dst
, temp
);
1967 /* If the first element wasn't the low part, try the last. */
1969 && start
< finish
- 1)
1971 inner
= GET_MODE (tmps
[finish
- 1]);
1972 bytepos
= subreg_lowpart_offset (inner
, outer
);
1973 if (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)) == bytepos
)
1975 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
1979 emit_move_insn (dst
, temp
);
1986 /* Otherwise, simply initialize the result to zero. */
1988 emit_move_insn (dst
, CONST0_RTX (outer
));
1991 /* Process the pieces. */
1992 for (i
= start
; i
< finish
; i
++)
1994 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
1995 enum machine_mode mode
= GET_MODE (tmps
[i
]);
1996 unsigned int bytelen
= GET_MODE_SIZE (mode
);
1997 unsigned int adj_bytelen
= bytelen
;
2000 /* Handle trailing fragments that run over the size of the struct. */
2001 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2002 adj_bytelen
= ssize
- bytepos
;
2004 if (GET_CODE (dst
) == CONCAT
)
2006 if (bytepos
+ adj_bytelen
2007 <= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2008 dest
= XEXP (dst
, 0);
2009 else if (bytepos
>= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2011 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2012 dest
= XEXP (dst
, 1);
2016 enum machine_mode dest_mode
= GET_MODE (dest
);
2017 enum machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2019 gcc_assert (bytepos
== 0 && XVECLEN (src
, 0));
2021 if (GET_MODE_ALIGNMENT (dest_mode
)
2022 >= GET_MODE_ALIGNMENT (tmp_mode
))
2024 dest
= assign_stack_temp (dest_mode
,
2025 GET_MODE_SIZE (dest_mode
));
2026 emit_move_insn (adjust_address (dest
,
2034 dest
= assign_stack_temp (tmp_mode
,
2035 GET_MODE_SIZE (tmp_mode
));
2036 emit_move_insn (dest
, tmps
[i
]);
2037 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2043 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2045 /* store_bit_field always takes its value from the lsb.
2046 Move the fragment to the lsb if it's not already there. */
2048 #ifdef BLOCK_REG_PADDING
2049 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2050 == (BYTES_BIG_ENDIAN
? upward
: downward
)
2056 int shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2057 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2060 bytelen
= adj_bytelen
;
2063 /* Optimize the access just a bit. */
2065 && (! SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (dest
))
2066 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2067 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2068 && bytelen
== GET_MODE_SIZE (mode
))
2069 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2071 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2072 0, 0, mode
, tmps
[i
]);
2075 /* Copy from the pseudo into the (probable) hard reg. */
2076 if (orig_dst
!= dst
)
2077 emit_move_insn (orig_dst
, dst
);
2080 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2081 of the value stored in X. */
2084 maybe_emit_group_store (rtx x
, tree type
)
2086 enum machine_mode mode
= TYPE_MODE (type
);
2087 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2088 if (GET_CODE (x
) == PARALLEL
)
2090 rtx result
= gen_reg_rtx (mode
);
2091 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2097 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2099 This is used on targets that return BLKmode values in registers. */
2102 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2104 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2105 rtx src
= NULL
, dst
= NULL
;
2106 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2107 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2108 enum machine_mode mode
= GET_MODE (srcreg
);
2109 enum machine_mode tmode
= GET_MODE (target
);
2110 enum machine_mode copy_mode
;
2112 /* BLKmode registers created in the back-end shouldn't have survived. */
2113 gcc_assert (mode
!= BLKmode
);
2115 /* If the structure doesn't take up a whole number of words, see whether
2116 SRCREG is padded on the left or on the right. If it's on the left,
2117 set PADDING_CORRECTION to the number of bits to skip.
2119 In most ABIs, the structure will be returned at the least end of
2120 the register, which translates to right padding on little-endian
2121 targets and left padding on big-endian targets. The opposite
2122 holds if the structure is returned at the most significant
2123 end of the register. */
2124 if (bytes
% UNITS_PER_WORD
!= 0
2125 && (targetm
.calls
.return_in_msb (type
)
2127 : BYTES_BIG_ENDIAN
))
2129 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2131 /* We can use a single move if we have an exact mode for the size. */
2132 else if (MEM_P (target
)
2133 && (!SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (target
))
2134 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2135 && bytes
== GET_MODE_SIZE (mode
))
2137 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2141 /* And if we additionally have the same mode for a register. */
2142 else if (REG_P (target
)
2143 && GET_MODE (target
) == mode
2144 && bytes
== GET_MODE_SIZE (mode
))
2146 emit_move_insn (target
, srcreg
);
2150 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2151 into a new pseudo which is a full word. */
2152 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2154 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2158 /* Copy the structure BITSIZE bits at a time. If the target lives in
2159 memory, take care of not reading/writing past its end by selecting
2160 a copy mode suited to BITSIZE. This should always be possible given
2163 If the target lives in register, make sure not to select a copy mode
2164 larger than the mode of the register.
2166 We could probably emit more efficient code for machines which do not use
2167 strict alignment, but it doesn't seem worth the effort at the current
2170 copy_mode
= word_mode
;
2173 enum machine_mode mem_mode
= mode_for_size (bitsize
, MODE_INT
, 1);
2174 if (mem_mode
!= BLKmode
)
2175 copy_mode
= mem_mode
;
2177 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2180 for (bitpos
= 0, xbitpos
= padding_correction
;
2181 bitpos
< bytes
* BITS_PER_UNIT
;
2182 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2184 /* We need a new source operand each time xbitpos is on a
2185 word boundary and when xbitpos == padding_correction
2186 (the first time through). */
2187 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2188 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2190 /* We need a new destination operand each time bitpos is on
2192 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2194 else if (bitpos
% BITS_PER_WORD
== 0)
2195 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2197 /* Use xbitpos for the source extraction (right justified) and
2198 bitpos for the destination store (left justified). */
2199 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2200 extract_bit_field (src
, bitsize
,
2201 xbitpos
% BITS_PER_WORD
, 1, false,
2202 NULL_RTX
, copy_mode
, copy_mode
));
2206 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2207 register if it contains any data, otherwise return null.
2209 This is used on targets that return BLKmode values in registers. */
2212 copy_blkmode_to_reg (enum machine_mode mode
, tree src
)
2215 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2216 unsigned int bitsize
;
2217 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2218 enum machine_mode dst_mode
;
2220 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2222 x
= expand_normal (src
);
2224 bytes
= int_size_in_bytes (TREE_TYPE (src
));
2228 /* If the structure doesn't take up a whole number of words, see
2229 whether the register value should be padded on the left or on
2230 the right. Set PADDING_CORRECTION to the number of padding
2231 bits needed on the left side.
2233 In most ABIs, the structure will be returned at the least end of
2234 the register, which translates to right padding on little-endian
2235 targets and left padding on big-endian targets. The opposite
2236 holds if the structure is returned at the most significant
2237 end of the register. */
2238 if (bytes
% UNITS_PER_WORD
!= 0
2239 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2241 : BYTES_BIG_ENDIAN
))
2242 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2245 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2246 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2247 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2249 /* Copy the structure BITSIZE bits at a time. */
2250 for (bitpos
= 0, xbitpos
= padding_correction
;
2251 bitpos
< bytes
* BITS_PER_UNIT
;
2252 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2254 /* We need a new destination pseudo each time xbitpos is
2255 on a word boundary and when xbitpos == padding_correction
2256 (the first time through). */
2257 if (xbitpos
% BITS_PER_WORD
== 0
2258 || xbitpos
== padding_correction
)
2260 /* Generate an appropriate register. */
2261 dst_word
= gen_reg_rtx (word_mode
);
2262 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2264 /* Clear the destination before we move anything into it. */
2265 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2268 /* We need a new source operand each time bitpos is on a word
2270 if (bitpos
% BITS_PER_WORD
== 0)
2271 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2273 /* Use bitpos for the source extraction (left justified) and
2274 xbitpos for the destination store (right justified). */
2275 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2277 extract_bit_field (src_word
, bitsize
,
2278 bitpos
% BITS_PER_WORD
, 1, false,
2279 NULL_RTX
, word_mode
, word_mode
));
2282 if (mode
== BLKmode
)
2284 /* Find the smallest integer mode large enough to hold the
2285 entire structure. */
2286 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
2288 mode
= GET_MODE_WIDER_MODE (mode
))
2289 /* Have we found a large enough mode? */
2290 if (GET_MODE_SIZE (mode
) >= bytes
)
2293 /* A suitable mode should have been found. */
2294 gcc_assert (mode
!= VOIDmode
);
2297 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2298 dst_mode
= word_mode
;
2301 dst
= gen_reg_rtx (dst_mode
);
2303 for (i
= 0; i
< n_regs
; i
++)
2304 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2306 if (mode
!= dst_mode
)
2307 dst
= gen_lowpart (mode
, dst
);
2312 /* Add a USE expression for REG to the (possibly empty) list pointed
2313 to by CALL_FUSAGE. REG must denote a hard register. */
2316 use_reg_mode (rtx
*call_fusage
, rtx reg
, enum machine_mode mode
)
2318 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2321 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2324 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2325 starting at REGNO. All of these registers must be hard registers. */
2328 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2332 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2334 for (i
= 0; i
< nregs
; i
++)
2335 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2338 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2339 PARALLEL REGS. This is for calls that pass values in multiple
2340 non-contiguous locations. The Irix 6 ABI has examples of this. */
2343 use_group_regs (rtx
*call_fusage
, rtx regs
)
2347 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2349 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2351 /* A NULL entry means the parameter goes both on the stack and in
2352 registers. This can also be a MEM for targets that pass values
2353 partially on the stack and partially in registers. */
2354 if (reg
!= 0 && REG_P (reg
))
2355 use_reg (call_fusage
, reg
);
2359 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2360 assigment and the code of the expresion on the RHS is CODE. Return
2364 get_def_for_expr (tree name
, enum tree_code code
)
2368 if (TREE_CODE (name
) != SSA_NAME
)
2371 def_stmt
= get_gimple_for_ssa_name (name
);
2373 || gimple_assign_rhs_code (def_stmt
) != code
)
2379 #ifdef HAVE_conditional_move
2380 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2381 assigment and the class of the expresion on the RHS is CLASS. Return
2385 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2389 if (TREE_CODE (name
) != SSA_NAME
)
2392 def_stmt
= get_gimple_for_ssa_name (name
);
2394 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2402 /* Determine whether the LEN bytes generated by CONSTFUN can be
2403 stored to memory using several move instructions. CONSTFUNDATA is
2404 a pointer which will be passed as argument in every CONSTFUN call.
2405 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2406 a memset operation and false if it's a copy of a constant string.
2407 Return nonzero if a call to store_by_pieces should succeed. */
2410 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
2411 rtx (*constfun
) (void *, HOST_WIDE_INT
, enum machine_mode
),
2412 void *constfundata
, unsigned int align
, bool memsetp
)
2414 unsigned HOST_WIDE_INT l
;
2415 unsigned int max_size
;
2416 HOST_WIDE_INT offset
= 0;
2417 enum machine_mode mode
;
2418 enum insn_code icode
;
2420 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2421 rtx cst ATTRIBUTE_UNUSED
;
2427 ? SET_BY_PIECES_P (len
, align
)
2428 : STORE_BY_PIECES_P (len
, align
)))
2431 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
2433 /* We would first store what we can in the largest integer mode, then go to
2434 successively smaller modes. */
2437 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
2441 max_size
= STORE_MAX_PIECES
+ 1;
2442 while (max_size
> 1 && l
> 0)
2444 mode
= widest_int_mode_for_size (max_size
);
2446 if (mode
== VOIDmode
)
2449 icode
= optab_handler (mov_optab
, mode
);
2450 if (icode
!= CODE_FOR_nothing
2451 && align
>= GET_MODE_ALIGNMENT (mode
))
2453 unsigned int size
= GET_MODE_SIZE (mode
);
2460 cst
= (*constfun
) (constfundata
, offset
, mode
);
2461 if (!targetm
.legitimate_constant_p (mode
, cst
))
2471 max_size
= GET_MODE_SIZE (mode
);
2474 /* The code above should have handled everything. */
2481 /* Generate several move instructions to store LEN bytes generated by
2482 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2483 pointer which will be passed as argument in every CONSTFUN call.
2484 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2485 a memset operation and false if it's a copy of a constant string.
2486 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2487 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2491 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
2492 rtx (*constfun
) (void *, HOST_WIDE_INT
, enum machine_mode
),
2493 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
2495 enum machine_mode to_addr_mode
= get_address_mode (to
);
2496 struct store_by_pieces_d data
;
2500 gcc_assert (endp
!= 2);
2505 ? SET_BY_PIECES_P (len
, align
)
2506 : STORE_BY_PIECES_P (len
, align
));
2507 data
.constfun
= constfun
;
2508 data
.constfundata
= constfundata
;
2511 store_by_pieces_1 (&data
, align
);
2516 gcc_assert (!data
.reverse
);
2521 if (HAVE_POST_INCREMENT
&& data
.explicit_inc_to
> 0)
2522 emit_insn (gen_add2_insn (data
.to_addr
, constm1_rtx
));
2524 data
.to_addr
= copy_to_mode_reg (to_addr_mode
,
2525 plus_constant (to_addr_mode
,
2529 to1
= adjust_automodify_address (data
.to
, QImode
, data
.to_addr
,
2536 to1
= adjust_address (data
.to
, QImode
, data
.offset
);
2544 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2545 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2548 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
2550 struct store_by_pieces_d data
;
2555 data
.constfun
= clear_by_pieces_1
;
2556 data
.constfundata
= NULL
;
2559 store_by_pieces_1 (&data
, align
);
2562 /* Callback routine for clear_by_pieces.
2563 Return const0_rtx unconditionally. */
2566 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED
,
2567 HOST_WIDE_INT offset ATTRIBUTE_UNUSED
,
2568 enum machine_mode mode ATTRIBUTE_UNUSED
)
2573 /* Subroutine of clear_by_pieces and store_by_pieces.
2574 Generate several move instructions to store LEN bytes of block TO. (A MEM
2575 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2578 store_by_pieces_1 (struct store_by_pieces_d
*data ATTRIBUTE_UNUSED
,
2579 unsigned int align ATTRIBUTE_UNUSED
)
2581 enum machine_mode to_addr_mode
= get_address_mode (data
->to
);
2582 rtx to_addr
= XEXP (data
->to
, 0);
2583 unsigned int max_size
= STORE_MAX_PIECES
+ 1;
2584 enum insn_code icode
;
2587 data
->to_addr
= to_addr
;
2589 = (GET_CODE (to_addr
) == PRE_INC
|| GET_CODE (to_addr
) == PRE_DEC
2590 || GET_CODE (to_addr
) == POST_INC
|| GET_CODE (to_addr
) == POST_DEC
);
2592 data
->explicit_inc_to
= 0;
2594 = (GET_CODE (to_addr
) == PRE_DEC
|| GET_CODE (to_addr
) == POST_DEC
);
2596 data
->offset
= data
->len
;
2598 /* If storing requires more than two move insns,
2599 copy addresses to registers (to make displacements shorter)
2600 and use post-increment if available. */
2601 if (!data
->autinc_to
2602 && move_by_pieces_ninsns (data
->len
, align
, max_size
) > 2)
2604 /* Determine the main mode we'll be using.
2605 MODE might not be used depending on the definitions of the
2606 USE_* macros below. */
2607 enum machine_mode mode ATTRIBUTE_UNUSED
2608 = widest_int_mode_for_size (max_size
);
2610 if (USE_STORE_PRE_DECREMENT (mode
) && data
->reverse
&& ! data
->autinc_to
)
2612 data
->to_addr
= copy_to_mode_reg (to_addr_mode
,
2613 plus_constant (to_addr_mode
,
2616 data
->autinc_to
= 1;
2617 data
->explicit_inc_to
= -1;
2620 if (USE_STORE_POST_INCREMENT (mode
) && ! data
->reverse
2621 && ! data
->autinc_to
)
2623 data
->to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
2624 data
->autinc_to
= 1;
2625 data
->explicit_inc_to
= 1;
2628 if ( !data
->autinc_to
&& CONSTANT_P (to_addr
))
2629 data
->to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
2632 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
2634 /* First store what we can in the largest integer mode, then go to
2635 successively smaller modes. */
2637 while (max_size
> 1 && data
->len
> 0)
2639 enum machine_mode mode
= widest_int_mode_for_size (max_size
);
2641 if (mode
== VOIDmode
)
2644 icode
= optab_handler (mov_optab
, mode
);
2645 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
2646 store_by_pieces_2 (GEN_FCN (icode
), mode
, data
);
2648 max_size
= GET_MODE_SIZE (mode
);
2651 /* The code above should have handled everything. */
2652 gcc_assert (!data
->len
);
2655 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2656 with move instructions for mode MODE. GENFUN is the gen_... function
2657 to make a move insn for that mode. DATA has all the other info. */
2660 store_by_pieces_2 (insn_gen_fn genfun
, machine_mode mode
,
2661 struct store_by_pieces_d
*data
)
2663 unsigned int size
= GET_MODE_SIZE (mode
);
2666 while (data
->len
>= size
)
2669 data
->offset
-= size
;
2671 if (data
->autinc_to
)
2672 to1
= adjust_automodify_address (data
->to
, mode
, data
->to_addr
,
2675 to1
= adjust_address (data
->to
, mode
, data
->offset
);
2677 if (HAVE_PRE_DECREMENT
&& data
->explicit_inc_to
< 0)
2678 emit_insn (gen_add2_insn (data
->to_addr
,
2679 GEN_INT (-(HOST_WIDE_INT
) size
)));
2681 cst
= (*data
->constfun
) (data
->constfundata
, data
->offset
, mode
);
2682 emit_insn ((*genfun
) (to1
, cst
));
2684 if (HAVE_POST_INCREMENT
&& data
->explicit_inc_to
> 0)
2685 emit_insn (gen_add2_insn (data
->to_addr
, GEN_INT (size
)));
2687 if (! data
->reverse
)
2688 data
->offset
+= size
;
2694 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2695 its length in bytes. */
2698 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2699 unsigned int expected_align
, HOST_WIDE_INT expected_size
)
2701 enum machine_mode mode
= GET_MODE (object
);
2704 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2706 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2707 just move a zero. Otherwise, do this a piece at a time. */
2709 && CONST_INT_P (size
)
2710 && INTVAL (size
) == (HOST_WIDE_INT
) GET_MODE_SIZE (mode
))
2712 rtx zero
= CONST0_RTX (mode
);
2715 emit_move_insn (object
, zero
);
2719 if (COMPLEX_MODE_P (mode
))
2721 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2724 write_complex_part (object
, zero
, 0);
2725 write_complex_part (object
, zero
, 1);
2731 if (size
== const0_rtx
)
2734 align
= MEM_ALIGN (object
);
2736 if (CONST_INT_P (size
)
2737 && CLEAR_BY_PIECES_P (INTVAL (size
), align
))
2738 clear_by_pieces (object
, INTVAL (size
), align
);
2739 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
2740 expected_align
, expected_size
))
2742 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
2743 return set_storage_via_libcall (object
, size
, const0_rtx
,
2744 method
== BLOCK_OP_TAILCALL
);
2752 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
2754 return clear_storage_hints (object
, size
, method
, 0, -1);
2758 /* A subroutine of clear_storage. Expand a call to memset.
2759 Return the return value of memset, 0 otherwise. */
2762 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
2764 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
2765 enum machine_mode size_mode
;
2768 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2769 place those into new pseudos into a VAR_DECL and use them later. */
2771 object
= copy_addr_to_reg (XEXP (object
, 0));
2773 size_mode
= TYPE_MODE (sizetype
);
2774 size
= convert_to_mode (size_mode
, size
, 1);
2775 size
= copy_to_mode_reg (size_mode
, size
);
2777 /* It is incorrect to use the libcall calling conventions to call
2778 memset in this context. This could be a user call to memset and
2779 the user may wish to examine the return value from memset. For
2780 targets where libcalls and normal calls have different conventions
2781 for returning pointers, we could end up generating incorrect code. */
2783 object_tree
= make_tree (ptr_type_node
, object
);
2784 if (!CONST_INT_P (val
))
2785 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
2786 size_tree
= make_tree (sizetype
, size
);
2787 val_tree
= make_tree (integer_type_node
, val
);
2789 fn
= clear_storage_libcall_fn (true);
2790 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
2791 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
2793 retval
= expand_normal (call_expr
);
2798 /* A subroutine of set_storage_via_libcall. Create the tree node
2799 for the function we use for block clears. */
2801 tree block_clear_fn
;
2804 init_block_clear_fn (const char *asmspec
)
2806 if (!block_clear_fn
)
2810 fn
= get_identifier ("memset");
2811 args
= build_function_type_list (ptr_type_node
, ptr_type_node
,
2812 integer_type_node
, sizetype
,
2815 fn
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
, fn
, args
);
2816 DECL_EXTERNAL (fn
) = 1;
2817 TREE_PUBLIC (fn
) = 1;
2818 DECL_ARTIFICIAL (fn
) = 1;
2819 TREE_NOTHROW (fn
) = 1;
2820 DECL_VISIBILITY (fn
) = VISIBILITY_DEFAULT
;
2821 DECL_VISIBILITY_SPECIFIED (fn
) = 1;
2823 block_clear_fn
= fn
;
2827 set_user_assembler_name (block_clear_fn
, asmspec
);
2831 clear_storage_libcall_fn (int for_call
)
2833 static bool emitted_extern
;
2835 if (!block_clear_fn
)
2836 init_block_clear_fn (NULL
);
2838 if (for_call
&& !emitted_extern
)
2840 emitted_extern
= true;
2841 make_decl_rtl (block_clear_fn
);
2844 return block_clear_fn
;
2847 /* Expand a setmem pattern; return true if successful. */
2850 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
2851 unsigned int expected_align
, HOST_WIDE_INT expected_size
)
2853 /* Try the most limited insn first, because there's no point
2854 including more than one in the machine description unless
2855 the more limited one has some advantage. */
2857 enum machine_mode mode
;
2859 if (expected_align
< align
)
2860 expected_align
= align
;
2862 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
2863 mode
= GET_MODE_WIDER_MODE (mode
))
2865 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
2867 if (code
!= CODE_FOR_nothing
2868 /* We don't need MODE to be narrower than
2869 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2870 the mode mask, as it is returned by the macro, it will
2871 definitely be less than the actual mode mask. */
2872 && ((CONST_INT_P (size
)
2873 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
2874 <= (GET_MODE_MASK (mode
) >> 1)))
2875 || GET_MODE_BITSIZE (mode
) >= BITS_PER_WORD
))
2877 struct expand_operand ops
[6];
2880 nops
= insn_data
[(int) code
].n_generator_args
;
2881 gcc_assert (nops
== 4 || nops
== 6);
2883 create_fixed_operand (&ops
[0], object
);
2884 /* The check above guarantees that this size conversion is valid. */
2885 create_convert_operand_to (&ops
[1], size
, mode
, true);
2886 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
2887 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
2890 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
2891 create_integer_operand (&ops
[5], expected_size
);
2893 if (maybe_expand_insn (code
, nops
, ops
))
2902 /* Write to one of the components of the complex value CPLX. Write VAL to
2903 the real part if IMAG_P is false, and the imaginary part if its true. */
2906 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
2908 enum machine_mode cmode
;
2909 enum machine_mode imode
;
2912 if (GET_CODE (cplx
) == CONCAT
)
2914 emit_move_insn (XEXP (cplx
, imag_p
), val
);
2918 cmode
= GET_MODE (cplx
);
2919 imode
= GET_MODE_INNER (cmode
);
2920 ibitsize
= GET_MODE_BITSIZE (imode
);
2922 /* For MEMs simplify_gen_subreg may generate an invalid new address
2923 because, e.g., the original address is considered mode-dependent
2924 by the target, which restricts simplify_subreg from invoking
2925 adjust_address_nv. Instead of preparing fallback support for an
2926 invalid address, we call adjust_address_nv directly. */
2929 emit_move_insn (adjust_address_nv (cplx
, imode
,
2930 imag_p
? GET_MODE_SIZE (imode
) : 0),
2935 /* If the sub-object is at least word sized, then we know that subregging
2936 will work. This special case is important, since store_bit_field
2937 wants to operate on integer modes, and there's rarely an OImode to
2938 correspond to TCmode. */
2939 if (ibitsize
>= BITS_PER_WORD
2940 /* For hard regs we have exact predicates. Assume we can split
2941 the original object if it spans an even number of hard regs.
2942 This special case is important for SCmode on 64-bit platforms
2943 where the natural size of floating-point regs is 32-bit. */
2945 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
2946 && hard_regno_nregs
[REGNO (cplx
)][cmode
] % 2 == 0))
2948 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
2949 imag_p
? GET_MODE_SIZE (imode
) : 0);
2952 emit_move_insn (part
, val
);
2956 /* simplify_gen_subreg may fail for sub-word MEMs. */
2957 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
2960 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
);
2963 /* Extract one of the components of the complex value CPLX. Extract the
2964 real part if IMAG_P is false, and the imaginary part if it's true. */
2967 read_complex_part (rtx cplx
, bool imag_p
)
2969 enum machine_mode cmode
, imode
;
2972 if (GET_CODE (cplx
) == CONCAT
)
2973 return XEXP (cplx
, imag_p
);
2975 cmode
= GET_MODE (cplx
);
2976 imode
= GET_MODE_INNER (cmode
);
2977 ibitsize
= GET_MODE_BITSIZE (imode
);
2979 /* Special case reads from complex constants that got spilled to memory. */
2980 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
2982 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
2983 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
2985 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
2986 if (CONSTANT_CLASS_P (part
))
2987 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
2991 /* For MEMs simplify_gen_subreg may generate an invalid new address
2992 because, e.g., the original address is considered mode-dependent
2993 by the target, which restricts simplify_subreg from invoking
2994 adjust_address_nv. Instead of preparing fallback support for an
2995 invalid address, we call adjust_address_nv directly. */
2997 return adjust_address_nv (cplx
, imode
,
2998 imag_p
? GET_MODE_SIZE (imode
) : 0);
3000 /* If the sub-object is at least word sized, then we know that subregging
3001 will work. This special case is important, since extract_bit_field
3002 wants to operate on integer modes, and there's rarely an OImode to
3003 correspond to TCmode. */
3004 if (ibitsize
>= BITS_PER_WORD
3005 /* For hard regs we have exact predicates. Assume we can split
3006 the original object if it spans an even number of hard regs.
3007 This special case is important for SCmode on 64-bit platforms
3008 where the natural size of floating-point regs is 32-bit. */
3010 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3011 && hard_regno_nregs
[REGNO (cplx
)][cmode
] % 2 == 0))
3013 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3014 imag_p
? GET_MODE_SIZE (imode
) : 0);
3018 /* simplify_gen_subreg may fail for sub-word MEMs. */
3019 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3022 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3023 true, false, NULL_RTX
, imode
, imode
);
3026 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3027 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3028 represented in NEW_MODE. If FORCE is true, this will never happen, as
3029 we'll force-create a SUBREG if needed. */
3032 emit_move_change_mode (enum machine_mode new_mode
,
3033 enum machine_mode old_mode
, rtx x
, bool force
)
3037 if (push_operand (x
, GET_MODE (x
)))
3039 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3040 MEM_COPY_ATTRIBUTES (ret
, x
);
3044 /* We don't have to worry about changing the address since the
3045 size in bytes is supposed to be the same. */
3046 if (reload_in_progress
)
3048 /* Copy the MEM to change the mode and move any
3049 substitutions from the old MEM to the new one. */
3050 ret
= adjust_address_nv (x
, new_mode
, 0);
3051 copy_replacements (x
, ret
);
3054 ret
= adjust_address (x
, new_mode
, 0);
3058 /* Note that we do want simplify_subreg's behavior of validating
3059 that the new mode is ok for a hard register. If we were to use
3060 simplify_gen_subreg, we would create the subreg, but would
3061 probably run into the target not being able to implement it. */
3062 /* Except, of course, when FORCE is true, when this is exactly what
3063 we want. Which is needed for CCmodes on some targets. */
3065 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3067 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3074 an integer mode of the same size as MODE. Returns the instruction
3075 emitted, or NULL if such a move could not be generated. */
3078 emit_move_via_integer (enum machine_mode mode
, rtx x
, rtx y
, bool force
)
3080 enum machine_mode imode
;
3081 enum insn_code code
;
3083 /* There must exist a mode of the exact size we require. */
3084 imode
= int_mode_for_mode (mode
);
3085 if (imode
== BLKmode
)
3088 /* The target must support moves in this mode. */
3089 code
= optab_handler (mov_optab
, imode
);
3090 if (code
== CODE_FOR_nothing
)
3093 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3096 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3099 return emit_insn (GEN_FCN (code
) (x
, y
));
3102 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3103 Return an equivalent MEM that does not use an auto-increment. */
3106 emit_move_resolve_push (enum machine_mode mode
, rtx x
)
3108 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3109 HOST_WIDE_INT adjust
;
3112 adjust
= GET_MODE_SIZE (mode
);
3113 #ifdef PUSH_ROUNDING
3114 adjust
= PUSH_ROUNDING (adjust
);
3116 if (code
== PRE_DEC
|| code
== POST_DEC
)
3118 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3120 rtx expr
= XEXP (XEXP (x
, 0), 1);
3123 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3124 gcc_assert (CONST_INT_P (XEXP (expr
, 1)));
3125 val
= INTVAL (XEXP (expr
, 1));
3126 if (GET_CODE (expr
) == MINUS
)
3128 gcc_assert (adjust
== val
|| adjust
== -val
);
3132 /* Do not use anti_adjust_stack, since we don't want to update
3133 stack_pointer_delta. */
3134 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3135 GEN_INT (adjust
), stack_pointer_rtx
,
3136 0, OPTAB_LIB_WIDEN
);
3137 if (temp
!= stack_pointer_rtx
)
3138 emit_move_insn (stack_pointer_rtx
, temp
);
3145 temp
= stack_pointer_rtx
;
3150 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3156 return replace_equiv_address (x
, temp
);
3159 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3160 X is known to satisfy push_operand, and MODE is known to be complex.
3161 Returns the last instruction emitted. */
3164 emit_move_complex_push (enum machine_mode mode
, rtx x
, rtx y
)
3166 enum machine_mode submode
= GET_MODE_INNER (mode
);
3169 #ifdef PUSH_ROUNDING
3170 unsigned int submodesize
= GET_MODE_SIZE (submode
);
3172 /* In case we output to the stack, but the size is smaller than the
3173 machine can push exactly, we need to use move instructions. */
3174 if (PUSH_ROUNDING (submodesize
) != submodesize
)
3176 x
= emit_move_resolve_push (mode
, x
);
3177 return emit_move_insn (x
, y
);
3181 /* Note that the real part always precedes the imag part in memory
3182 regardless of machine's endianness. */
3183 switch (GET_CODE (XEXP (x
, 0)))
3197 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3198 read_complex_part (y
, imag_first
));
3199 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3200 read_complex_part (y
, !imag_first
));
3203 /* A subroutine of emit_move_complex. Perform the move from Y to X
3204 via two moves of the parts. Returns the last instruction emitted. */
3207 emit_move_complex_parts (rtx x
, rtx y
)
3209 /* Show the output dies here. This is necessary for SUBREGs
3210 of pseudos since we cannot track their lifetimes correctly;
3211 hard regs shouldn't appear here except as return values. */
3212 if (!reload_completed
&& !reload_in_progress
3213 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3216 write_complex_part (x
, read_complex_part (y
, false), false);
3217 write_complex_part (x
, read_complex_part (y
, true), true);
3219 return get_last_insn ();
3222 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3223 MODE is known to be complex. Returns the last instruction emitted. */
3226 emit_move_complex (enum machine_mode mode
, rtx x
, rtx y
)
3230 /* Need to take special care for pushes, to maintain proper ordering
3231 of the data, and possibly extra padding. */
3232 if (push_operand (x
, mode
))
3233 return emit_move_complex_push (mode
, x
, y
);
3235 /* See if we can coerce the target into moving both values at once, except
3236 for floating point where we favor moving as parts if this is easy. */
3237 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3238 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3240 && HARD_REGISTER_P (x
)
3241 && hard_regno_nregs
[REGNO(x
)][mode
] == 1)
3243 && HARD_REGISTER_P (y
)
3244 && hard_regno_nregs
[REGNO(y
)][mode
] == 1))
3246 /* Not possible if the values are inherently not adjacent. */
3247 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3249 /* Is possible if both are registers (or subregs of registers). */
3250 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3252 /* If one of the operands is a memory, and alignment constraints
3253 are friendly enough, we may be able to do combined memory operations.
3254 We do not attempt this if Y is a constant because that combination is
3255 usually better with the by-parts thing below. */
3256 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3257 && (!STRICT_ALIGNMENT
3258 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3267 /* For memory to memory moves, optimal behavior can be had with the
3268 existing block move logic. */
3269 if (MEM_P (x
) && MEM_P (y
))
3271 emit_block_move (x
, y
, GEN_INT (GET_MODE_SIZE (mode
)),
3272 BLOCK_OP_NO_LIBCALL
);
3273 return get_last_insn ();
3276 ret
= emit_move_via_integer (mode
, x
, y
, true);
3281 return emit_move_complex_parts (x
, y
);
3284 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3285 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3288 emit_move_ccmode (enum machine_mode mode
, rtx x
, rtx y
)
3292 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3295 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3296 if (code
!= CODE_FOR_nothing
)
3298 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3299 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3300 return emit_insn (GEN_FCN (code
) (x
, y
));
3304 /* Otherwise, find the MODE_INT mode of the same width. */
3305 ret
= emit_move_via_integer (mode
, x
, y
, false);
3306 gcc_assert (ret
!= NULL
);
3310 /* Return true if word I of OP lies entirely in the
3311 undefined bits of a paradoxical subreg. */
3314 undefined_operand_subword_p (const_rtx op
, int i
)
3316 enum machine_mode innermode
, innermostmode
;
3318 if (GET_CODE (op
) != SUBREG
)
3320 innermode
= GET_MODE (op
);
3321 innermostmode
= GET_MODE (SUBREG_REG (op
));
3322 offset
= i
* UNITS_PER_WORD
+ SUBREG_BYTE (op
);
3323 /* The SUBREG_BYTE represents offset, as if the value were stored in
3324 memory, except for a paradoxical subreg where we define
3325 SUBREG_BYTE to be 0; undo this exception as in
3327 if (SUBREG_BYTE (op
) == 0
3328 && GET_MODE_SIZE (innermostmode
) < GET_MODE_SIZE (innermode
))
3330 int difference
= (GET_MODE_SIZE (innermostmode
) - GET_MODE_SIZE (innermode
));
3331 if (WORDS_BIG_ENDIAN
)
3332 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
3333 if (BYTES_BIG_ENDIAN
)
3334 offset
+= difference
% UNITS_PER_WORD
;
3336 if (offset
>= GET_MODE_SIZE (innermostmode
)
3337 || offset
<= -GET_MODE_SIZE (word_mode
))
3342 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3343 MODE is any multi-word or full-word mode that lacks a move_insn
3344 pattern. Note that you will get better code if you define such
3345 patterns, even if they must turn into multiple assembler instructions. */
3348 emit_move_multi_word (enum machine_mode mode
, rtx x
, rtx y
)
3355 gcc_assert (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
);
3357 /* If X is a push on the stack, do the push now and replace
3358 X with a reference to the stack pointer. */
3359 if (push_operand (x
, mode
))
3360 x
= emit_move_resolve_push (mode
, x
);
3362 /* If we are in reload, see if either operand is a MEM whose address
3363 is scheduled for replacement. */
3364 if (reload_in_progress
&& MEM_P (x
)
3365 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3366 x
= replace_equiv_address_nv (x
, inner
);
3367 if (reload_in_progress
&& MEM_P (y
)
3368 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3369 y
= replace_equiv_address_nv (y
, inner
);
3373 need_clobber
= false;
3375 i
< (GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
3378 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3381 /* Do not generate code for a move if it would come entirely
3382 from the undefined bits of a paradoxical subreg. */
3383 if (undefined_operand_subword_p (y
, i
))
3386 ypart
= operand_subword (y
, i
, 1, mode
);
3388 /* If we can't get a part of Y, put Y into memory if it is a
3389 constant. Otherwise, force it into a register. Then we must
3390 be able to get a part of Y. */
3391 if (ypart
== 0 && CONSTANT_P (y
))
3393 y
= use_anchored_address (force_const_mem (mode
, y
));
3394 ypart
= operand_subword (y
, i
, 1, mode
);
3396 else if (ypart
== 0)
3397 ypart
= operand_subword_force (y
, i
, mode
);
3399 gcc_assert (xpart
&& ypart
);
3401 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3403 last_insn
= emit_move_insn (xpart
, ypart
);
3409 /* Show the output dies here. This is necessary for SUBREGs
3410 of pseudos since we cannot track their lifetimes correctly;
3411 hard regs shouldn't appear here except as return values.
3412 We never want to emit such a clobber after reload. */
3414 && ! (reload_in_progress
|| reload_completed
)
3415 && need_clobber
!= 0)
3423 /* Low level part of emit_move_insn.
3424 Called just like emit_move_insn, but assumes X and Y
3425 are basically valid. */
3428 emit_move_insn_1 (rtx x
, rtx y
)
3430 enum machine_mode mode
= GET_MODE (x
);
3431 enum insn_code code
;
3433 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3435 code
= optab_handler (mov_optab
, mode
);
3436 if (code
!= CODE_FOR_nothing
)
3437 return emit_insn (GEN_FCN (code
) (x
, y
));
3439 /* Expand complex moves by moving real part and imag part. */
3440 if (COMPLEX_MODE_P (mode
))
3441 return emit_move_complex (mode
, x
, y
);
3443 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3444 || ALL_FIXED_POINT_MODE_P (mode
))
3446 rtx result
= emit_move_via_integer (mode
, x
, y
, true);
3448 /* If we can't find an integer mode, use multi words. */
3452 return emit_move_multi_word (mode
, x
, y
);
3455 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3456 return emit_move_ccmode (mode
, x
, y
);
3458 /* Try using a move pattern for the corresponding integer mode. This is
3459 only safe when simplify_subreg can convert MODE constants into integer
3460 constants. At present, it can only do this reliably if the value
3461 fits within a HOST_WIDE_INT. */
3462 if (!CONSTANT_P (y
) || GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3464 rtx ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3468 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3473 return emit_move_multi_word (mode
, x
, y
);
3476 /* Generate code to copy Y into X.
3477 Both Y and X must have the same mode, except that
3478 Y can be a constant with VOIDmode.
3479 This mode cannot be BLKmode; use emit_block_move for that.
3481 Return the last instruction emitted. */
3484 emit_move_insn (rtx x
, rtx y
)
3486 enum machine_mode mode
= GET_MODE (x
);
3487 rtx y_cst
= NULL_RTX
;
3490 gcc_assert (mode
!= BLKmode
3491 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3496 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3497 && (last_insn
= compress_float_constant (x
, y
)))
3502 if (!targetm
.legitimate_constant_p (mode
, y
))
3504 y
= force_const_mem (mode
, y
);
3506 /* If the target's cannot_force_const_mem prevented the spill,
3507 assume that the target's move expanders will also take care
3508 of the non-legitimate constant. */
3512 y
= use_anchored_address (y
);
3516 /* If X or Y are memory references, verify that their addresses are valid
3519 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3521 && ! push_operand (x
, GET_MODE (x
))))
3522 x
= validize_mem (x
);
3525 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3526 MEM_ADDR_SPACE (y
)))
3527 y
= validize_mem (y
);
3529 gcc_assert (mode
!= BLKmode
);
3531 last_insn
= emit_move_insn_1 (x
, y
);
3533 if (y_cst
&& REG_P (x
)
3534 && (set
= single_set (last_insn
)) != NULL_RTX
3535 && SET_DEST (set
) == x
3536 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3537 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3542 /* If Y is representable exactly in a narrower mode, and the target can
3543 perform the extension directly from constant or memory, then emit the
3544 move as an extension. */
3547 compress_float_constant (rtx x
, rtx y
)
3549 enum machine_mode dstmode
= GET_MODE (x
);
3550 enum machine_mode orig_srcmode
= GET_MODE (y
);
3551 enum machine_mode srcmode
;
3553 int oldcost
, newcost
;
3554 bool speed
= optimize_insn_for_speed_p ();
3556 REAL_VALUE_FROM_CONST_DOUBLE (r
, y
);
3558 if (targetm
.legitimate_constant_p (dstmode
, y
))
3559 oldcost
= set_src_cost (y
, speed
);
3561 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), speed
);
3563 for (srcmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode
));
3564 srcmode
!= orig_srcmode
;
3565 srcmode
= GET_MODE_WIDER_MODE (srcmode
))
3568 rtx trunc_y
, last_insn
;
3570 /* Skip if the target can't extend this way. */
3571 ic
= can_extend_p (dstmode
, srcmode
, 0);
3572 if (ic
== CODE_FOR_nothing
)
3575 /* Skip if the narrowed value isn't exact. */
3576 if (! exact_real_truncate (srcmode
, &r
))
3579 trunc_y
= CONST_DOUBLE_FROM_REAL_VALUE (r
, srcmode
);
3581 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3583 /* Skip if the target needs extra instructions to perform
3585 if (!insn_operand_matches (ic
, 1, trunc_y
))
3587 /* This is valid, but may not be cheaper than the original. */
3588 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3590 if (oldcost
< newcost
)
3593 else if (float_extend_from_mem
[dstmode
][srcmode
])
3595 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3596 /* This is valid, but may not be cheaper than the original. */
3597 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3599 if (oldcost
< newcost
)
3601 trunc_y
= validize_mem (trunc_y
);
3606 /* For CSE's benefit, force the compressed constant pool entry
3607 into a new pseudo. This constant may be used in different modes,
3608 and if not, combine will put things back together for us. */
3609 trunc_y
= force_reg (srcmode
, trunc_y
);
3610 emit_unop_insn (ic
, x
, trunc_y
, UNKNOWN
);
3611 last_insn
= get_last_insn ();
3614 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3622 /* Pushing data onto the stack. */
3624 /* Push a block of length SIZE (perhaps variable)
3625 and return an rtx to address the beginning of the block.
3626 The value may be virtual_outgoing_args_rtx.
3628 EXTRA is the number of bytes of padding to push in addition to SIZE.
3629 BELOW nonzero means this padding comes at low addresses;
3630 otherwise, the padding comes at high addresses. */
3633 push_block (rtx size
, int extra
, int below
)
3637 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3638 if (CONSTANT_P (size
))
3639 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3640 else if (REG_P (size
) && extra
== 0)
3641 anti_adjust_stack (size
);
3644 temp
= copy_to_mode_reg (Pmode
, size
);
3646 temp
= expand_binop (Pmode
, add_optab
, temp
, GEN_INT (extra
),
3647 temp
, 0, OPTAB_LIB_WIDEN
);
3648 anti_adjust_stack (temp
);
3651 #ifndef STACK_GROWS_DOWNWARD
3657 temp
= virtual_outgoing_args_rtx
;
3658 if (extra
!= 0 && below
)
3659 temp
= plus_constant (Pmode
, temp
, extra
);
3663 if (CONST_INT_P (size
))
3664 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3665 -INTVAL (size
) - (below
? 0 : extra
));
3666 else if (extra
!= 0 && !below
)
3667 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3668 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3671 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3672 negate_rtx (Pmode
, size
));
3675 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT
), temp
);
3678 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3681 mem_autoinc_base (rtx mem
)
3685 rtx addr
= XEXP (mem
, 0);
3686 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3687 return XEXP (addr
, 0);
3692 /* A utility routine used here, in reload, and in try_split. The insns
3693 after PREV up to and including LAST are known to adjust the stack,
3694 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3695 placing notes as appropriate. PREV may be NULL, indicating the
3696 entire insn sequence prior to LAST should be scanned.
3698 The set of allowed stack pointer modifications is small:
3699 (1) One or more auto-inc style memory references (aka pushes),
3700 (2) One or more addition/subtraction with the SP as destination,
3701 (3) A single move insn with the SP as destination,
3702 (4) A call_pop insn,
3703 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3705 Insns in the sequence that do not modify the SP are ignored,
3706 except for noreturn calls.
3708 The return value is the amount of adjustment that can be trivially
3709 verified, via immediate operand or auto-inc. If the adjustment
3710 cannot be trivially extracted, the return value is INT_MIN. */
3713 find_args_size_adjust (rtx insn
)
3718 pat
= PATTERN (insn
);
3721 /* Look for a call_pop pattern. */
3724 /* We have to allow non-call_pop patterns for the case
3725 of emit_single_push_insn of a TLS address. */
3726 if (GET_CODE (pat
) != PARALLEL
)
3729 /* All call_pop have a stack pointer adjust in the parallel.
3730 The call itself is always first, and the stack adjust is
3731 usually last, so search from the end. */
3732 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3734 set
= XVECEXP (pat
, 0, i
);
3735 if (GET_CODE (set
) != SET
)
3737 dest
= SET_DEST (set
);
3738 if (dest
== stack_pointer_rtx
)
3741 /* We'd better have found the stack pointer adjust. */
3744 /* Fall through to process the extracted SET and DEST
3745 as if it was a standalone insn. */
3747 else if (GET_CODE (pat
) == SET
)
3749 else if ((set
= single_set (insn
)) != NULL
)
3751 else if (GET_CODE (pat
) == PARALLEL
)
3753 /* ??? Some older ports use a parallel with a stack adjust
3754 and a store for a PUSH_ROUNDING pattern, rather than a
3755 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3756 /* ??? See h8300 and m68k, pushqi1. */
3757 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
3759 set
= XVECEXP (pat
, 0, i
);
3760 if (GET_CODE (set
) != SET
)
3762 dest
= SET_DEST (set
);
3763 if (dest
== stack_pointer_rtx
)
3766 /* We do not expect an auto-inc of the sp in the parallel. */
3767 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
3768 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
3769 != stack_pointer_rtx
);
3777 dest
= SET_DEST (set
);
3779 /* Look for direct modifications of the stack pointer. */
3780 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
3782 /* Look for a trivial adjustment, otherwise assume nothing. */
3783 /* Note that the SPU restore_stack_block pattern refers to
3784 the stack pointer in V4SImode. Consider that non-trivial. */
3785 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
3786 && GET_CODE (SET_SRC (set
)) == PLUS
3787 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
3788 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
3789 return INTVAL (XEXP (SET_SRC (set
), 1));
3790 /* ??? Reload can generate no-op moves, which will be cleaned
3791 up later. Recognize it and continue searching. */
3792 else if (rtx_equal_p (dest
, SET_SRC (set
)))
3795 return HOST_WIDE_INT_MIN
;
3801 /* Otherwise only think about autoinc patterns. */
3802 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
3805 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
3806 != stack_pointer_rtx
);
3808 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
3809 mem
= SET_SRC (set
);
3813 addr
= XEXP (mem
, 0);
3814 switch (GET_CODE (addr
))
3818 return GET_MODE_SIZE (GET_MODE (mem
));
3821 return -GET_MODE_SIZE (GET_MODE (mem
));
3824 addr
= XEXP (addr
, 1);
3825 gcc_assert (GET_CODE (addr
) == PLUS
);
3826 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
3827 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
3828 return INTVAL (XEXP (addr
, 1));
3836 fixup_args_size_notes (rtx prev
, rtx last
, int end_args_size
)
3838 int args_size
= end_args_size
;
3839 bool saw_unknown
= false;
3842 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
3844 HOST_WIDE_INT this_delta
;
3846 if (!NONDEBUG_INSN_P (insn
))
3849 this_delta
= find_args_size_adjust (insn
);
3850 if (this_delta
== 0)
3853 || ACCUMULATE_OUTGOING_ARGS
3854 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
3858 gcc_assert (!saw_unknown
);
3859 if (this_delta
== HOST_WIDE_INT_MIN
)
3862 add_reg_note (insn
, REG_ARGS_SIZE
, GEN_INT (args_size
));
3863 #ifdef STACK_GROWS_DOWNWARD
3864 this_delta
= -(unsigned HOST_WIDE_INT
) this_delta
;
3866 args_size
-= this_delta
;
3869 return saw_unknown
? INT_MIN
: args_size
;
3872 #ifdef PUSH_ROUNDING
3873 /* Emit single push insn. */
3876 emit_single_push_insn_1 (enum machine_mode mode
, rtx x
, tree type
)
3879 unsigned rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
3881 enum insn_code icode
;
3883 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
3884 /* If there is push pattern, use it. Otherwise try old way of throwing
3885 MEM representing push operation to move expander. */
3886 icode
= optab_handler (push_optab
, mode
);
3887 if (icode
!= CODE_FOR_nothing
)
3889 struct expand_operand ops
[1];
3891 create_input_operand (&ops
[0], x
, mode
);
3892 if (maybe_expand_insn (icode
, 1, ops
))
3895 if (GET_MODE_SIZE (mode
) == rounded_size
)
3896 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
3897 /* If we are to pad downward, adjust the stack pointer first and
3898 then store X into the stack location using an offset. This is
3899 because emit_move_insn does not know how to pad; it does not have
3901 else if (FUNCTION_ARG_PADDING (mode
, type
) == downward
)
3903 unsigned padding_size
= rounded_size
- GET_MODE_SIZE (mode
);
3904 HOST_WIDE_INT offset
;
3906 emit_move_insn (stack_pointer_rtx
,
3907 expand_binop (Pmode
,
3908 #ifdef STACK_GROWS_DOWNWARD
3914 GEN_INT (rounded_size
),
3915 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
3917 offset
= (HOST_WIDE_INT
) padding_size
;
3918 #ifdef STACK_GROWS_DOWNWARD
3919 if (STACK_PUSH_CODE
== POST_DEC
)
3920 /* We have already decremented the stack pointer, so get the
3922 offset
+= (HOST_WIDE_INT
) rounded_size
;
3924 if (STACK_PUSH_CODE
== POST_INC
)
3925 /* We have already incremented the stack pointer, so get the
3927 offset
-= (HOST_WIDE_INT
) rounded_size
;
3929 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
, GEN_INT (offset
));
3933 #ifdef STACK_GROWS_DOWNWARD
3934 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3935 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
3936 GEN_INT (-(HOST_WIDE_INT
) rounded_size
));
3938 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3939 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
3940 GEN_INT (rounded_size
));
3942 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
3945 dest
= gen_rtx_MEM (mode
, dest_addr
);
3949 set_mem_attributes (dest
, type
, 1);
3951 if (flag_optimize_sibling_calls
)
3952 /* Function incoming arguments may overlap with sibling call
3953 outgoing arguments and we cannot allow reordering of reads
3954 from function arguments with stores to outgoing arguments
3955 of sibling calls. */
3956 set_mem_alias_set (dest
, 0);
3958 emit_move_insn (dest
, x
);
3961 /* Emit and annotate a single push insn. */
3964 emit_single_push_insn (enum machine_mode mode
, rtx x
, tree type
)
3966 int delta
, old_delta
= stack_pointer_delta
;
3967 rtx prev
= get_last_insn ();
3970 emit_single_push_insn_1 (mode
, x
, type
);
3972 last
= get_last_insn ();
3974 /* Notice the common case where we emitted exactly one insn. */
3975 if (PREV_INSN (last
) == prev
)
3977 add_reg_note (last
, REG_ARGS_SIZE
, GEN_INT (stack_pointer_delta
));
3981 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
3982 gcc_assert (delta
== INT_MIN
|| delta
== old_delta
);
3986 /* Generate code to push X onto the stack, assuming it has mode MODE and
3988 MODE is redundant except when X is a CONST_INT (since they don't
3990 SIZE is an rtx for the size of data to be copied (in bytes),
3991 needed only if X is BLKmode.
3993 ALIGN (in bits) is maximum alignment we can assume.
3995 If PARTIAL and REG are both nonzero, then copy that many of the first
3996 bytes of X into registers starting with REG, and push the rest of X.
3997 The amount of space pushed is decreased by PARTIAL bytes.
3998 REG must be a hard register in this case.
3999 If REG is zero but PARTIAL is not, take any all others actions for an
4000 argument partially in registers, but do not actually load any
4003 EXTRA is the amount in bytes of extra space to leave next to this arg.
4004 This is ignored if an argument block has already been allocated.
4006 On a machine that lacks real push insns, ARGS_ADDR is the address of
4007 the bottom of the argument block for this call. We use indexing off there
4008 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4009 argument block has not been preallocated.
4011 ARGS_SO_FAR is the size of args previously pushed for this call.
4013 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4014 for arguments passed in registers. If nonzero, it will be the number
4015 of bytes required. */
4018 emit_push_insn (rtx x
, enum machine_mode mode
, tree type
, rtx size
,
4019 unsigned int align
, int partial
, rtx reg
, int extra
,
4020 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4024 enum direction stack_direction
4025 #ifdef STACK_GROWS_DOWNWARD
4031 /* Decide where to pad the argument: `downward' for below,
4032 `upward' for above, or `none' for don't pad it.
4033 Default is below for small data on big-endian machines; else above. */
4034 enum direction where_pad
= FUNCTION_ARG_PADDING (mode
, type
);
4036 /* Invert direction if stack is post-decrement.
4038 if (STACK_PUSH_CODE
== POST_DEC
)
4039 if (where_pad
!= none
)
4040 where_pad
= (where_pad
== downward
? upward
: downward
);
4045 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4047 /* Copy a block into the stack, entirely or partially. */
4054 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4055 used
= partial
- offset
;
4057 if (mode
!= BLKmode
)
4059 /* A value is to be stored in an insufficiently aligned
4060 stack slot; copy via a suitably aligned slot if
4062 size
= GEN_INT (GET_MODE_SIZE (mode
));
4063 if (!MEM_P (xinner
))
4065 temp
= assign_temp (type
, 1, 1);
4066 emit_move_insn (temp
, xinner
);
4073 /* USED is now the # of bytes we need not copy to the stack
4074 because registers will take care of them. */
4077 xinner
= adjust_address (xinner
, BLKmode
, used
);
4079 /* If the partial register-part of the arg counts in its stack size,
4080 skip the part of stack space corresponding to the registers.
4081 Otherwise, start copying to the beginning of the stack space,
4082 by setting SKIP to 0. */
4083 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4085 #ifdef PUSH_ROUNDING
4086 /* Do it with several push insns if that doesn't take lots of insns
4087 and if there is no difficulty with push insns that skip bytes
4088 on the stack for alignment purposes. */
4091 && CONST_INT_P (size
)
4093 && MEM_ALIGN (xinner
) >= align
4094 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size
) - used
, align
))
4095 /* Here we avoid the case of a structure whose weak alignment
4096 forces many pushes of a small amount of data,
4097 and such small pushes do rounding that causes trouble. */
4098 && ((! SLOW_UNALIGNED_ACCESS (word_mode
, align
))
4099 || align
>= BIGGEST_ALIGNMENT
4100 || (PUSH_ROUNDING (align
/ BITS_PER_UNIT
)
4101 == (align
/ BITS_PER_UNIT
)))
4102 && (HOST_WIDE_INT
) PUSH_ROUNDING (INTVAL (size
)) == INTVAL (size
))
4104 /* Push padding now if padding above and stack grows down,
4105 or if padding below and stack grows up.
4106 But if space already allocated, this has already been done. */
4107 if (extra
&& args_addr
== 0
4108 && where_pad
!= none
&& where_pad
!= stack_direction
)
4109 anti_adjust_stack (GEN_INT (extra
));
4111 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4114 #endif /* PUSH_ROUNDING */
4118 /* Otherwise make space on the stack and copy the data
4119 to the address of that space. */
4121 /* Deduct words put into registers from the size we must copy. */
4124 if (CONST_INT_P (size
))
4125 size
= GEN_INT (INTVAL (size
) - used
);
4127 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4128 GEN_INT (used
), NULL_RTX
, 0,
4132 /* Get the address of the stack space.
4133 In this case, we do not deal with EXTRA separately.
4134 A single stack adjust will do. */
4137 temp
= push_block (size
, extra
, where_pad
== downward
);
4140 else if (CONST_INT_P (args_so_far
))
4141 temp
= memory_address (BLKmode
,
4142 plus_constant (Pmode
, args_addr
,
4143 skip
+ INTVAL (args_so_far
)));
4145 temp
= memory_address (BLKmode
,
4146 plus_constant (Pmode
,
4147 gen_rtx_PLUS (Pmode
,
4152 if (!ACCUMULATE_OUTGOING_ARGS
)
4154 /* If the source is referenced relative to the stack pointer,
4155 copy it to another register to stabilize it. We do not need
4156 to do this if we know that we won't be changing sp. */
4158 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4159 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4160 temp
= copy_to_reg (temp
);
4163 target
= gen_rtx_MEM (BLKmode
, temp
);
4165 /* We do *not* set_mem_attributes here, because incoming arguments
4166 may overlap with sibling call outgoing arguments and we cannot
4167 allow reordering of reads from function arguments with stores
4168 to outgoing arguments of sibling calls. We do, however, want
4169 to record the alignment of the stack slot. */
4170 /* ALIGN may well be better aligned than TYPE, e.g. due to
4171 PARM_BOUNDARY. Assume the caller isn't lying. */
4172 set_mem_align (target
, align
);
4174 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4177 else if (partial
> 0)
4179 /* Scalar partly in registers. */
4181 int size
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
;
4184 /* # bytes of start of argument
4185 that we must make space for but need not store. */
4186 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4187 int args_offset
= INTVAL (args_so_far
);
4190 /* Push padding now if padding above and stack grows down,
4191 or if padding below and stack grows up.
4192 But if space already allocated, this has already been done. */
4193 if (extra
&& args_addr
== 0
4194 && where_pad
!= none
&& where_pad
!= stack_direction
)
4195 anti_adjust_stack (GEN_INT (extra
));
4197 /* If we make space by pushing it, we might as well push
4198 the real data. Otherwise, we can leave OFFSET nonzero
4199 and leave the space uninitialized. */
4203 /* Now NOT_STACK gets the number of words that we don't need to
4204 allocate on the stack. Convert OFFSET to words too. */
4205 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4206 offset
/= UNITS_PER_WORD
;
4208 /* If the partial register-part of the arg counts in its stack size,
4209 skip the part of stack space corresponding to the registers.
4210 Otherwise, start copying to the beginning of the stack space,
4211 by setting SKIP to 0. */
4212 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4214 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4215 x
= validize_mem (force_const_mem (mode
, x
));
4217 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4218 SUBREGs of such registers are not allowed. */
4219 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4220 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4221 x
= copy_to_reg (x
);
4223 /* Loop over all the words allocated on the stack for this arg. */
4224 /* We can do it by words, because any scalar bigger than a word
4225 has a size a multiple of a word. */
4226 #ifndef PUSH_ARGS_REVERSED
4227 for (i
= not_stack
; i
< size
; i
++)
4229 for (i
= size
- 1; i
>= not_stack
; i
--)
4231 if (i
>= not_stack
+ offset
)
4232 emit_push_insn (operand_subword_force (x
, i
, mode
),
4233 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4235 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4237 reg_parm_stack_space
, alignment_pad
);
4244 /* Push padding now if padding above and stack grows down,
4245 or if padding below and stack grows up.
4246 But if space already allocated, this has already been done. */
4247 if (extra
&& args_addr
== 0
4248 && where_pad
!= none
&& where_pad
!= stack_direction
)
4249 anti_adjust_stack (GEN_INT (extra
));
4251 #ifdef PUSH_ROUNDING
4252 if (args_addr
== 0 && PUSH_ARGS
)
4253 emit_single_push_insn (mode
, x
, type
);
4257 if (CONST_INT_P (args_so_far
))
4259 = memory_address (mode
,
4260 plus_constant (Pmode
, args_addr
,
4261 INTVAL (args_so_far
)));
4263 addr
= memory_address (mode
, gen_rtx_PLUS (Pmode
, args_addr
,
4265 dest
= gen_rtx_MEM (mode
, addr
);
4267 /* We do *not* set_mem_attributes here, because incoming arguments
4268 may overlap with sibling call outgoing arguments and we cannot
4269 allow reordering of reads from function arguments with stores
4270 to outgoing arguments of sibling calls. We do, however, want
4271 to record the alignment of the stack slot. */
4272 /* ALIGN may well be better aligned than TYPE, e.g. due to
4273 PARM_BOUNDARY. Assume the caller isn't lying. */
4274 set_mem_align (dest
, align
);
4276 emit_move_insn (dest
, x
);
4280 /* If part should go in registers, copy that part
4281 into the appropriate registers. Do this now, at the end,
4282 since mem-to-mem copies above may do function calls. */
4283 if (partial
> 0 && reg
!= 0)
4285 /* Handle calls that pass values in multiple non-contiguous locations.
4286 The Irix 6 ABI has examples of this. */
4287 if (GET_CODE (reg
) == PARALLEL
)
4288 emit_group_load (reg
, x
, type
, -1);
4291 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4292 move_block_to_reg (REGNO (reg
), x
, partial
/ UNITS_PER_WORD
, mode
);
4296 if (extra
&& args_addr
== 0 && where_pad
== stack_direction
)
4297 anti_adjust_stack (GEN_INT (extra
));
4299 if (alignment_pad
&& args_addr
== 0)
4300 anti_adjust_stack (alignment_pad
);
4303 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4307 get_subtarget (rtx x
)
4311 /* Only registers can be subtargets. */
4313 /* Don't use hard regs to avoid extending their life. */
4314 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4318 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4319 FIELD is a bitfield. Returns true if the optimization was successful,
4320 and there's nothing else to do. */
4323 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize
,
4324 unsigned HOST_WIDE_INT bitpos
,
4325 unsigned HOST_WIDE_INT bitregion_start
,
4326 unsigned HOST_WIDE_INT bitregion_end
,
4327 enum machine_mode mode1
, rtx str_rtx
,
4330 enum machine_mode str_mode
= GET_MODE (str_rtx
);
4331 unsigned int str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4336 enum tree_code code
;
4338 if (mode1
!= VOIDmode
4339 || bitsize
>= BITS_PER_WORD
4340 || str_bitsize
> BITS_PER_WORD
4341 || TREE_SIDE_EFFECTS (to
)
4342 || TREE_THIS_VOLATILE (to
))
4346 if (TREE_CODE (src
) != SSA_NAME
)
4348 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4351 srcstmt
= get_gimple_for_ssa_name (src
);
4353 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4356 code
= gimple_assign_rhs_code (srcstmt
);
4358 op0
= gimple_assign_rhs1 (srcstmt
);
4360 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4361 to find its initialization. Hopefully the initialization will
4362 be from a bitfield load. */
4363 if (TREE_CODE (op0
) == SSA_NAME
)
4365 gimple op0stmt
= get_gimple_for_ssa_name (op0
);
4367 /* We want to eventually have OP0 be the same as TO, which
4368 should be a bitfield. */
4370 || !is_gimple_assign (op0stmt
)
4371 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4373 op0
= gimple_assign_rhs1 (op0stmt
);
4376 op1
= gimple_assign_rhs2 (srcstmt
);
4378 if (!operand_equal_p (to
, op0
, 0))
4381 if (MEM_P (str_rtx
))
4383 unsigned HOST_WIDE_INT offset1
;
4385 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4386 str_mode
= word_mode
;
4387 str_mode
= get_best_mode (bitsize
, bitpos
,
4388 bitregion_start
, bitregion_end
,
4389 MEM_ALIGN (str_rtx
), str_mode
, 0);
4390 if (str_mode
== VOIDmode
)
4392 str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4395 bitpos
%= str_bitsize
;
4396 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4397 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4399 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4402 /* If the bit field covers the whole REG/MEM, store_field
4403 will likely generate better code. */
4404 if (bitsize
>= str_bitsize
)
4407 /* We can't handle fields split across multiple entities. */
4408 if (bitpos
+ bitsize
> str_bitsize
)
4411 if (BYTES_BIG_ENDIAN
)
4412 bitpos
= str_bitsize
- bitpos
- bitsize
;
4418 /* For now, just optimize the case of the topmost bitfield
4419 where we don't need to do any masking and also
4420 1 bit bitfields where xor can be used.
4421 We might win by one instruction for the other bitfields
4422 too if insv/extv instructions aren't used, so that
4423 can be added later. */
4424 if (bitpos
+ bitsize
!= str_bitsize
4425 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4428 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4429 value
= convert_modes (str_mode
,
4430 TYPE_MODE (TREE_TYPE (op1
)), value
,
4431 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4433 /* We may be accessing data outside the field, which means
4434 we can alias adjacent data. */
4435 if (MEM_P (str_rtx
))
4437 str_rtx
= shallow_copy_rtx (str_rtx
);
4438 set_mem_alias_set (str_rtx
, 0);
4439 set_mem_expr (str_rtx
, 0);
4442 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4443 if (bitsize
== 1 && bitpos
+ bitsize
!= str_bitsize
)
4445 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4448 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4449 result
= expand_binop (str_mode
, binop
, str_rtx
,
4450 value
, str_rtx
, 1, OPTAB_WIDEN
);
4451 if (result
!= str_rtx
)
4452 emit_move_insn (str_rtx
, result
);
4457 if (TREE_CODE (op1
) != INTEGER_CST
)
4459 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4460 value
= convert_modes (str_mode
,
4461 TYPE_MODE (TREE_TYPE (op1
)), value
,
4462 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4464 /* We may be accessing data outside the field, which means
4465 we can alias adjacent data. */
4466 if (MEM_P (str_rtx
))
4468 str_rtx
= shallow_copy_rtx (str_rtx
);
4469 set_mem_alias_set (str_rtx
, 0);
4470 set_mem_expr (str_rtx
, 0);
4473 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4474 if (bitpos
+ bitsize
!= str_bitsize
)
4476 rtx mask
= GEN_INT (((unsigned HOST_WIDE_INT
) 1 << bitsize
) - 1);
4477 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4479 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4480 result
= expand_binop (str_mode
, binop
, str_rtx
,
4481 value
, str_rtx
, 1, OPTAB_WIDEN
);
4482 if (result
!= str_rtx
)
4483 emit_move_insn (str_rtx
, result
);
4493 /* In the C++ memory model, consecutive bit fields in a structure are
4494 considered one memory location.
4496 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4497 returns the bit range of consecutive bits in which this COMPONENT_REF
4498 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4499 and *OFFSET may be adjusted in the process.
4501 If the access does not need to be restricted, 0 is returned in both
4502 *BITSTART and *BITEND. */
4505 get_bit_range (unsigned HOST_WIDE_INT
*bitstart
,
4506 unsigned HOST_WIDE_INT
*bitend
,
4508 HOST_WIDE_INT
*bitpos
,
4511 HOST_WIDE_INT bitoffset
;
4514 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4516 field
= TREE_OPERAND (exp
, 1);
4517 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4518 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4519 need to limit the range we can access. */
4522 *bitstart
= *bitend
= 0;
4526 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4527 part of a larger bit field, then the representative does not serve any
4528 useful purpose. This can occur in Ada. */
4529 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4531 enum machine_mode rmode
;
4532 HOST_WIDE_INT rbitsize
, rbitpos
;
4536 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4537 &roffset
, &rmode
, &unsignedp
, &volatilep
, false);
4538 if ((rbitpos
% BITS_PER_UNIT
) != 0)
4540 *bitstart
= *bitend
= 0;
4545 /* Compute the adjustment to bitpos from the offset of the field
4546 relative to the representative. DECL_FIELD_OFFSET of field and
4547 repr are the same by construction if they are not constants,
4548 see finish_bitfield_layout. */
4549 if (host_integerp (DECL_FIELD_OFFSET (field
), 1)
4550 && host_integerp (DECL_FIELD_OFFSET (repr
), 1))
4551 bitoffset
= (tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
4552 - tree_low_cst (DECL_FIELD_OFFSET (repr
), 1)) * BITS_PER_UNIT
;
4555 bitoffset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
4556 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr
), 1));
4558 /* If the adjustment is larger than bitpos, we would have a negative bit
4559 position for the lower bound and this may wreak havoc later. This can
4560 occur only if we have a non-null offset, so adjust offset and bitpos
4561 to make the lower bound non-negative. */
4562 if (bitoffset
> *bitpos
)
4564 HOST_WIDE_INT adjust
= bitoffset
- *bitpos
;
4566 gcc_assert ((adjust
% BITS_PER_UNIT
) == 0);
4567 gcc_assert (*offset
!= NULL_TREE
);
4571 = size_binop (MINUS_EXPR
, *offset
, size_int (adjust
/ BITS_PER_UNIT
));
4575 *bitstart
= *bitpos
- bitoffset
;
4577 *bitend
= *bitstart
+ tree_low_cst (DECL_SIZE (repr
), 1) - 1;
4580 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4581 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4582 DECL_RTL was not set yet, return NORTL. */
4585 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4587 if (TREE_CODE (addr
) != ADDR_EXPR
)
4590 tree base
= TREE_OPERAND (addr
, 0);
4593 || TREE_ADDRESSABLE (base
)
4594 || DECL_MODE (base
) == BLKmode
)
4597 if (!DECL_RTL_SET_P (base
))
4600 return (!MEM_P (DECL_RTL (base
)));
4603 /* Returns true if the MEM_REF REF refers to an object that does not
4604 reside in memory and has non-BLKmode. */
4607 mem_ref_refers_to_non_mem_p (tree ref
)
4609 tree base
= TREE_OPERAND (ref
, 0);
4610 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4613 /* Return TRUE iff OP is an ADDR_EXPR of a DECL that's not
4614 addressable. This is very much like mem_ref_refers_to_non_mem_p,
4615 but instead of the MEM_REF, it takes its base, and it doesn't
4616 assume a DECL is in memory just because its RTL is not set yet. */
4619 addr_expr_of_non_mem_decl_p (tree op
)
4621 return addr_expr_of_non_mem_decl_p_1 (op
, true);
4624 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4625 is true, try generating a nontemporal store. */
4628 expand_assignment (tree to
, tree from
, bool nontemporal
)
4632 enum machine_mode mode
;
4634 enum insn_code icode
;
4636 /* Don't crash if the lhs of the assignment was erroneous. */
4637 if (TREE_CODE (to
) == ERROR_MARK
)
4639 expand_normal (from
);
4643 /* Optimize away no-op moves without side-effects. */
4644 if (operand_equal_p (to
, from
, 0))
4647 /* Handle misaligned stores. */
4648 mode
= TYPE_MODE (TREE_TYPE (to
));
4649 if ((TREE_CODE (to
) == MEM_REF
4650 || TREE_CODE (to
) == TARGET_MEM_REF
)
4652 && !mem_ref_refers_to_non_mem_p (to
)
4653 && ((align
= get_object_alignment (to
))
4654 < GET_MODE_ALIGNMENT (mode
))
4655 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4656 != CODE_FOR_nothing
)
4657 || SLOW_UNALIGNED_ACCESS (mode
, align
)))
4661 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4662 reg
= force_not_mem (reg
);
4663 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4665 if (icode
!= CODE_FOR_nothing
)
4667 struct expand_operand ops
[2];
4669 create_fixed_operand (&ops
[0], mem
);
4670 create_input_operand (&ops
[1], reg
, mode
);
4671 /* The movmisalign<mode> pattern cannot fail, else the assignment
4672 would silently be omitted. */
4673 expand_insn (icode
, 2, ops
);
4676 store_bit_field (mem
, GET_MODE_BITSIZE (mode
),
4677 0, 0, 0, mode
, reg
);
4681 /* Assignment of a structure component needs special treatment
4682 if the structure component's rtx is not simply a MEM.
4683 Assignment of an array element at a constant index, and assignment of
4684 an array element in an unaligned packed structure field, has the same
4685 problem. Same for (partially) storing into a non-memory object. */
4686 if (handled_component_p (to
)
4687 || (TREE_CODE (to
) == MEM_REF
4688 && mem_ref_refers_to_non_mem_p (to
))
4689 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
4691 enum machine_mode mode1
;
4692 HOST_WIDE_INT bitsize
, bitpos
;
4693 unsigned HOST_WIDE_INT bitregion_start
= 0;
4694 unsigned HOST_WIDE_INT bitregion_end
= 0;
4703 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
4704 &unsignedp
, &volatilep
, true);
4706 if (TREE_CODE (to
) == COMPONENT_REF
4707 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
4708 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
4710 /* If we are going to use store_bit_field and extract_bit_field,
4711 make sure to_rtx will be safe for multiple use. */
4712 mode
= TYPE_MODE (TREE_TYPE (tem
));
4713 if (TREE_CODE (tem
) == MEM_REF
4715 && ((align
= get_object_alignment (tem
))
4716 < GET_MODE_ALIGNMENT (mode
))
4717 && ((icode
= optab_handler (movmisalign_optab
, mode
))
4718 != CODE_FOR_nothing
))
4720 struct expand_operand ops
[2];
4723 to_rtx
= gen_reg_rtx (mode
);
4724 mem
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4726 /* If the misaligned store doesn't overwrite all bits, perform
4727 rmw cycle on MEM. */
4728 if (bitsize
!= GET_MODE_BITSIZE (mode
))
4730 create_input_operand (&ops
[0], to_rtx
, mode
);
4731 create_fixed_operand (&ops
[1], mem
);
4732 /* The movmisalign<mode> pattern cannot fail, else the assignment
4733 would silently be omitted. */
4734 expand_insn (icode
, 2, ops
);
4736 mem
= copy_rtx (mem
);
4742 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4745 /* If the bitfield is volatile, we want to access it in the
4746 field's mode, not the computed mode.
4747 If a MEM has VOIDmode (external with incomplete type),
4748 use BLKmode for it instead. */
4751 if (volatilep
&& flag_strict_volatile_bitfields
> 0)
4752 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
4753 else if (GET_MODE (to_rtx
) == VOIDmode
)
4754 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
4759 enum machine_mode address_mode
;
4762 if (!MEM_P (to_rtx
))
4764 /* We can get constant negative offsets into arrays with broken
4765 user code. Translate this to a trap instead of ICEing. */
4766 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
4767 expand_builtin_trap ();
4768 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
4771 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
4772 address_mode
= get_address_mode (to_rtx
);
4773 if (GET_MODE (offset_rtx
) != address_mode
)
4774 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
4776 /* A constant address in TO_RTX can have VOIDmode, we must not try
4777 to call force_reg for that case. Avoid that case. */
4779 && GET_MODE (to_rtx
) == BLKmode
4780 && GET_MODE (XEXP (to_rtx
, 0)) != VOIDmode
4782 && (bitpos
% bitsize
) == 0
4783 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
4784 && MEM_ALIGN (to_rtx
) == GET_MODE_ALIGNMENT (mode1
))
4786 to_rtx
= adjust_address (to_rtx
, mode1
, bitpos
/ BITS_PER_UNIT
);
4790 to_rtx
= offset_address (to_rtx
, offset_rtx
,
4791 highest_pow2_factor_for_target (to
,
4795 /* No action is needed if the target is not a memory and the field
4796 lies completely outside that target. This can occur if the source
4797 code contains an out-of-bounds access to a small array. */
4799 && GET_MODE (to_rtx
) != BLKmode
4800 && (unsigned HOST_WIDE_INT
) bitpos
4801 >= GET_MODE_PRECISION (GET_MODE (to_rtx
)))
4803 expand_normal (from
);
4806 /* Handle expand_expr of a complex value returning a CONCAT. */
4807 else if (GET_CODE (to_rtx
) == CONCAT
)
4809 unsigned short mode_bitsize
= GET_MODE_BITSIZE (GET_MODE (to_rtx
));
4810 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from
)))
4812 && bitsize
== mode_bitsize
)
4813 result
= store_expr (from
, to_rtx
, false, nontemporal
);
4814 else if (bitsize
== mode_bitsize
/ 2
4815 && (bitpos
== 0 || bitpos
== mode_bitsize
/ 2))
4816 result
= store_expr (from
, XEXP (to_rtx
, bitpos
!= 0), false,
4818 else if (bitpos
+ bitsize
<= mode_bitsize
/ 2)
4819 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
4820 bitregion_start
, bitregion_end
,
4822 get_alias_set (to
), nontemporal
);
4823 else if (bitpos
>= mode_bitsize
/ 2)
4824 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
4825 bitpos
- mode_bitsize
/ 2,
4826 bitregion_start
, bitregion_end
,
4828 get_alias_set (to
), nontemporal
);
4829 else if (bitpos
== 0 && bitsize
== mode_bitsize
)
4832 result
= expand_normal (from
);
4833 from_rtx
= simplify_gen_subreg (GET_MODE (to_rtx
), result
,
4834 TYPE_MODE (TREE_TYPE (from
)), 0);
4835 emit_move_insn (XEXP (to_rtx
, 0),
4836 read_complex_part (from_rtx
, false));
4837 emit_move_insn (XEXP (to_rtx
, 1),
4838 read_complex_part (from_rtx
, true));
4842 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
4843 GET_MODE_SIZE (GET_MODE (to_rtx
)));
4844 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
4845 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
4846 result
= store_field (temp
, bitsize
, bitpos
,
4847 bitregion_start
, bitregion_end
,
4849 get_alias_set (to
), nontemporal
);
4850 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
4851 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
4858 /* If the field is at offset zero, we could have been given the
4859 DECL_RTX of the parent struct. Don't munge it. */
4860 to_rtx
= shallow_copy_rtx (to_rtx
);
4862 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
4864 /* Deal with volatile and readonly fields. The former is only
4865 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4867 MEM_VOLATILE_P (to_rtx
) = 1;
4870 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
4871 bitregion_start
, bitregion_end
,
4876 result
= store_field (to_rtx
, bitsize
, bitpos
,
4877 bitregion_start
, bitregion_end
,
4879 get_alias_set (to
), nontemporal
);
4884 struct expand_operand ops
[2];
4886 create_fixed_operand (&ops
[0], mem
);
4887 create_input_operand (&ops
[1], to_rtx
, mode
);
4888 /* The movmisalign<mode> pattern cannot fail, else the assignment
4889 would silently be omitted. */
4890 expand_insn (icode
, 2, ops
);
4894 preserve_temp_slots (result
);
4899 /* If the rhs is a function call and its value is not an aggregate,
4900 call the function before we start to compute the lhs.
4901 This is needed for correct code for cases such as
4902 val = setjmp (buf) on machines where reference to val
4903 requires loading up part of an address in a separate insn.
4905 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4906 since it might be a promoted variable where the zero- or sign- extension
4907 needs to be done. Handling this in the normal way is safe because no
4908 computation is done before the call. The same is true for SSA names. */
4909 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
4910 && COMPLETE_TYPE_P (TREE_TYPE (from
))
4911 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
4912 && ! (((TREE_CODE (to
) == VAR_DECL
4913 || TREE_CODE (to
) == PARM_DECL
4914 || TREE_CODE (to
) == RESULT_DECL
)
4915 && REG_P (DECL_RTL (to
)))
4916 || TREE_CODE (to
) == SSA_NAME
))
4921 value
= expand_normal (from
);
4923 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4925 /* Handle calls that return values in multiple non-contiguous locations.
4926 The Irix 6 ABI has examples of this. */
4927 if (GET_CODE (to_rtx
) == PARALLEL
)
4929 if (GET_CODE (value
) == PARALLEL
)
4930 emit_group_move (to_rtx
, value
);
4932 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
4933 int_size_in_bytes (TREE_TYPE (from
)));
4935 else if (GET_CODE (value
) == PARALLEL
)
4936 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
4937 int_size_in_bytes (TREE_TYPE (from
)));
4938 else if (GET_MODE (to_rtx
) == BLKmode
)
4940 /* Handle calls that return BLKmode values in registers. */
4942 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
4944 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
4948 if (POINTER_TYPE_P (TREE_TYPE (to
)))
4949 value
= convert_memory_address_addr_space
4950 (GET_MODE (to_rtx
), value
,
4951 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
4953 emit_move_insn (to_rtx
, value
);
4955 preserve_temp_slots (to_rtx
);
4960 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4961 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4963 /* Don't move directly into a return register. */
4964 if (TREE_CODE (to
) == RESULT_DECL
4965 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
4971 /* If the source is itself a return value, it still is in a pseudo at
4972 this point so we can move it back to the return register directly. */
4974 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
4975 && TREE_CODE (from
) != CALL_EXPR
)
4976 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
4978 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
4980 /* Handle calls that return values in multiple non-contiguous locations.
4981 The Irix 6 ABI has examples of this. */
4982 if (GET_CODE (to_rtx
) == PARALLEL
)
4984 if (GET_CODE (temp
) == PARALLEL
)
4985 emit_group_move (to_rtx
, temp
);
4987 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
4988 int_size_in_bytes (TREE_TYPE (from
)));
4991 emit_move_insn (to_rtx
, temp
);
4993 preserve_temp_slots (to_rtx
);
4998 /* In case we are returning the contents of an object which overlaps
4999 the place the value is being stored, use a safe function when copying
5000 a value through a pointer into a structure value return block. */
5001 if (TREE_CODE (to
) == RESULT_DECL
5002 && TREE_CODE (from
) == INDIRECT_REF
5003 && ADDR_SPACE_GENERIC_P
5004 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5005 && refs_may_alias_p (to
, from
)
5006 && cfun
->returns_struct
5007 && !cfun
->returns_pcc_struct
)
5012 size
= expr_size (from
);
5013 from_rtx
= expand_normal (from
);
5015 emit_library_call (memmove_libfunc
, LCT_NORMAL
,
5016 VOIDmode
, 3, XEXP (to_rtx
, 0), Pmode
,
5017 XEXP (from_rtx
, 0), Pmode
,
5018 convert_to_mode (TYPE_MODE (sizetype
),
5019 size
, TYPE_UNSIGNED (sizetype
)),
5020 TYPE_MODE (sizetype
));
5022 preserve_temp_slots (to_rtx
);
5027 /* Compute FROM and store the value in the rtx we got. */
5030 result
= store_expr (from
, to_rtx
, 0, nontemporal
);
5031 preserve_temp_slots (result
);
5036 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5037 succeeded, false otherwise. */
5040 emit_storent_insn (rtx to
, rtx from
)
5042 struct expand_operand ops
[2];
5043 enum machine_mode mode
= GET_MODE (to
);
5044 enum insn_code code
= optab_handler (storent_optab
, mode
);
5046 if (code
== CODE_FOR_nothing
)
5049 create_fixed_operand (&ops
[0], to
);
5050 create_input_operand (&ops
[1], from
, mode
);
5051 return maybe_expand_insn (code
, 2, ops
);
5054 /* Generate code for computing expression EXP,
5055 and storing the value into TARGET.
5057 If the mode is BLKmode then we may return TARGET itself.
5058 It turns out that in BLKmode it doesn't cause a problem.
5059 because C has no operators that could combine two different
5060 assignments into the same BLKmode object with different values
5061 with no sequence point. Will other languages need this to
5064 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5065 stack, and block moves may need to be treated specially.
5067 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5070 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
)
5073 rtx alt_rtl
= NULL_RTX
;
5074 location_t loc
= curr_insn_location ();
5076 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5078 /* C++ can generate ?: expressions with a throw expression in one
5079 branch and an rvalue in the other. Here, we resolve attempts to
5080 store the throw expression's nonexistent result. */
5081 gcc_assert (!call_param_p
);
5082 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5085 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5087 /* Perform first part of compound expression, then assign from second
5089 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5090 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5091 return store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5094 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5096 /* For conditional expression, get safe form of the target. Then
5097 test the condition, doing the appropriate assignment on either
5098 side. This avoids the creation of unnecessary temporaries.
5099 For non-BLKmode, it is more efficient not to do this. */
5101 rtx lab1
= gen_label_rtx (), lab2
= gen_label_rtx ();
5103 do_pending_stack_adjust ();
5105 jumpifnot (TREE_OPERAND (exp
, 0), lab1
, -1);
5106 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5108 emit_jump_insn (gen_jump (lab2
));
5111 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5118 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5119 /* If this is a scalar in a register that is stored in a wider mode
5120 than the declared mode, compute the result into its declared mode
5121 and then convert to the wider mode. Our value is the computed
5124 rtx inner_target
= 0;
5126 /* We can do the conversion inside EXP, which will often result
5127 in some optimizations. Do the conversion in two steps: first
5128 change the signedness, if needed, then the extend. But don't
5129 do this if the type of EXP is a subtype of something else
5130 since then the conversion might involve more than just
5131 converting modes. */
5132 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5133 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5134 && GET_MODE_PRECISION (GET_MODE (target
))
5135 == TYPE_PRECISION (TREE_TYPE (exp
)))
5137 if (TYPE_UNSIGNED (TREE_TYPE (exp
))
5138 != SUBREG_PROMOTED_UNSIGNED_P (target
))
5140 /* Some types, e.g. Fortran's logical*4, won't have a signed
5141 version, so use the mode instead. */
5143 = (signed_or_unsigned_type_for
5144 (SUBREG_PROMOTED_UNSIGNED_P (target
), TREE_TYPE (exp
)));
5146 ntype
= lang_hooks
.types
.type_for_mode
5147 (TYPE_MODE (TREE_TYPE (exp
)),
5148 SUBREG_PROMOTED_UNSIGNED_P (target
));
5150 exp
= fold_convert_loc (loc
, ntype
, exp
);
5153 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5154 (GET_MODE (SUBREG_REG (target
)),
5155 SUBREG_PROMOTED_UNSIGNED_P (target
)),
5158 inner_target
= SUBREG_REG (target
);
5161 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5162 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5164 /* If TEMP is a VOIDmode constant, use convert_modes to make
5165 sure that we properly convert it. */
5166 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5168 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5169 temp
, SUBREG_PROMOTED_UNSIGNED_P (target
));
5170 temp
= convert_modes (GET_MODE (SUBREG_REG (target
)),
5171 GET_MODE (target
), temp
,
5172 SUBREG_PROMOTED_UNSIGNED_P (target
));
5175 convert_move (SUBREG_REG (target
), temp
,
5176 SUBREG_PROMOTED_UNSIGNED_P (target
));
5180 else if ((TREE_CODE (exp
) == STRING_CST
5181 || (TREE_CODE (exp
) == MEM_REF
5182 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5183 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5185 && integer_zerop (TREE_OPERAND (exp
, 1))))
5186 && !nontemporal
&& !call_param_p
5189 /* Optimize initialization of an array with a STRING_CST. */
5190 HOST_WIDE_INT exp_len
, str_copy_len
;
5192 tree str
= TREE_CODE (exp
) == STRING_CST
5193 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5195 exp_len
= int_expr_size (exp
);
5199 if (TREE_STRING_LENGTH (str
) <= 0)
5202 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5203 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5206 str_copy_len
= TREE_STRING_LENGTH (str
);
5207 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5208 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5210 str_copy_len
+= STORE_MAX_PIECES
- 1;
5211 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5213 str_copy_len
= MIN (str_copy_len
, exp_len
);
5214 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5215 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5216 MEM_ALIGN (target
), false))
5221 dest_mem
= store_by_pieces (dest_mem
,
5222 str_copy_len
, builtin_strncpy_read_str
,
5224 TREE_STRING_POINTER (str
)),
5225 MEM_ALIGN (target
), false,
5226 exp_len
> str_copy_len
? 1 : 0);
5227 if (exp_len
> str_copy_len
)
5228 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5229 GEN_INT (exp_len
- str_copy_len
),
5238 /* If we want to use a nontemporal store, force the value to
5240 tmp_target
= nontemporal
? NULL_RTX
: target
;
5241 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5243 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5247 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5248 the same as that of TARGET, adjust the constant. This is needed, for
5249 example, in case it is a CONST_DOUBLE and we want only a word-sized
5251 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5252 && TREE_CODE (exp
) != ERROR_MARK
5253 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5254 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5255 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5257 /* If value was not generated in the target, store it there.
5258 Convert the value to TARGET's type first if necessary and emit the
5259 pending incrementations that have been queued when expanding EXP.
5260 Note that we cannot emit the whole queue blindly because this will
5261 effectively disable the POST_INC optimization later.
5263 If TEMP and TARGET compare equal according to rtx_equal_p, but
5264 one or both of them are volatile memory refs, we have to distinguish
5266 - expand_expr has used TARGET. In this case, we must not generate
5267 another copy. This can be detected by TARGET being equal according
5269 - expand_expr has not used TARGET - that means that the source just
5270 happens to have the same RTX form. Since temp will have been created
5271 by expand_expr, it will compare unequal according to == .
5272 We must generate a copy in this case, to reach the correct number
5273 of volatile memory references. */
5275 if ((! rtx_equal_p (temp
, target
)
5276 || (temp
!= target
&& (side_effects_p (temp
)
5277 || side_effects_p (target
))))
5278 && TREE_CODE (exp
) != ERROR_MARK
5279 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5280 but TARGET is not valid memory reference, TEMP will differ
5281 from TARGET although it is really the same location. */
5283 && rtx_equal_p (alt_rtl
, target
)
5284 && !side_effects_p (alt_rtl
)
5285 && !side_effects_p (target
))
5286 /* If there's nothing to copy, don't bother. Don't call
5287 expr_size unless necessary, because some front-ends (C++)
5288 expr_size-hook must not be given objects that are not
5289 supposed to be bit-copied or bit-initialized. */
5290 && expr_size (exp
) != const0_rtx
)
5292 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5294 if (GET_MODE (target
) == BLKmode
)
5296 /* Handle calls that return BLKmode values in registers. */
5297 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5298 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5300 store_bit_field (target
,
5301 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5302 0, 0, 0, GET_MODE (temp
), temp
);
5305 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5308 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5310 /* Handle copying a string constant into an array. The string
5311 constant may be shorter than the array. So copy just the string's
5312 actual length, and clear the rest. First get the size of the data
5313 type of the string, which is actually the size of the target. */
5314 rtx size
= expr_size (exp
);
5316 if (CONST_INT_P (size
)
5317 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5318 emit_block_move (target
, temp
, size
,
5320 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5323 enum machine_mode pointer_mode
5324 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5325 enum machine_mode address_mode
= get_address_mode (target
);
5327 /* Compute the size of the data to copy from the string. */
5329 = size_binop_loc (loc
, MIN_EXPR
,
5330 make_tree (sizetype
, size
),
5331 size_int (TREE_STRING_LENGTH (exp
)));
5333 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5335 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5338 /* Copy that much. */
5339 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5340 TYPE_UNSIGNED (sizetype
));
5341 emit_block_move (target
, temp
, copy_size_rtx
,
5343 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5345 /* Figure out how much is left in TARGET that we have to clear.
5346 Do all calculations in pointer_mode. */
5347 if (CONST_INT_P (copy_size_rtx
))
5349 size
= plus_constant (address_mode
, size
,
5350 -INTVAL (copy_size_rtx
));
5351 target
= adjust_address (target
, BLKmode
,
5352 INTVAL (copy_size_rtx
));
5356 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5357 copy_size_rtx
, NULL_RTX
, 0,
5360 if (GET_MODE (copy_size_rtx
) != address_mode
)
5361 copy_size_rtx
= convert_to_mode (address_mode
,
5363 TYPE_UNSIGNED (sizetype
));
5365 target
= offset_address (target
, copy_size_rtx
,
5366 highest_pow2_factor (copy_size
));
5367 label
= gen_label_rtx ();
5368 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5369 GET_MODE (size
), 0, label
);
5372 if (size
!= const0_rtx
)
5373 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5379 /* Handle calls that return values in multiple non-contiguous locations.
5380 The Irix 6 ABI has examples of this. */
5381 else if (GET_CODE (target
) == PARALLEL
)
5383 if (GET_CODE (temp
) == PARALLEL
)
5384 emit_group_move (target
, temp
);
5386 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5387 int_size_in_bytes (TREE_TYPE (exp
)));
5389 else if (GET_CODE (temp
) == PARALLEL
)
5390 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5391 int_size_in_bytes (TREE_TYPE (exp
)));
5392 else if (GET_MODE (temp
) == BLKmode
)
5393 emit_block_move (target
, temp
, expr_size (exp
),
5395 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5396 /* If we emit a nontemporal store, there is nothing else to do. */
5397 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5401 temp
= force_operand (temp
, target
);
5403 emit_move_insn (target
, temp
);
5410 /* Return true if field F of structure TYPE is a flexible array. */
5413 flexible_array_member_p (const_tree f
, const_tree type
)
5418 return (DECL_CHAIN (f
) == NULL
5419 && TREE_CODE (tf
) == ARRAY_TYPE
5421 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5422 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5423 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5424 && int_size_in_bytes (type
) >= 0);
5427 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5428 must have in order for it to completely initialize a value of type TYPE.
5429 Return -1 if the number isn't known.
5431 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5433 static HOST_WIDE_INT
5434 count_type_elements (const_tree type
, bool for_ctor_p
)
5436 switch (TREE_CODE (type
))
5442 nelts
= array_type_nelts (type
);
5443 if (nelts
&& host_integerp (nelts
, 1))
5445 unsigned HOST_WIDE_INT n
;
5447 n
= tree_low_cst (nelts
, 1) + 1;
5448 if (n
== 0 || for_ctor_p
)
5451 return n
* count_type_elements (TREE_TYPE (type
), false);
5453 return for_ctor_p
? -1 : 1;
5458 unsigned HOST_WIDE_INT n
;
5462 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5463 if (TREE_CODE (f
) == FIELD_DECL
)
5466 n
+= count_type_elements (TREE_TYPE (f
), false);
5467 else if (!flexible_array_member_p (f
, type
))
5468 /* Don't count flexible arrays, which are not supposed
5469 to be initialized. */
5477 case QUAL_UNION_TYPE
:
5482 gcc_assert (!for_ctor_p
);
5483 /* Estimate the number of scalars in each field and pick the
5484 maximum. Other estimates would do instead; the idea is simply
5485 to make sure that the estimate is not sensitive to the ordering
5488 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5489 if (TREE_CODE (f
) == FIELD_DECL
)
5491 m
= count_type_elements (TREE_TYPE (f
), false);
5492 /* If the field doesn't span the whole union, add an extra
5493 scalar for the rest. */
5494 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5495 TYPE_SIZE (type
)) != 1)
5507 return TYPE_VECTOR_SUBPARTS (type
);
5511 case FIXED_POINT_TYPE
:
5516 case REFERENCE_TYPE
:
5532 /* Helper for categorize_ctor_elements. Identical interface. */
5535 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5536 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5538 unsigned HOST_WIDE_INT idx
;
5539 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5540 tree value
, purpose
, elt_type
;
5542 /* Whether CTOR is a valid constant initializer, in accordance with what
5543 initializer_constant_valid_p does. If inferred from the constructor
5544 elements, true until proven otherwise. */
5545 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5546 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5551 elt_type
= NULL_TREE
;
5553 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5555 HOST_WIDE_INT mult
= 1;
5557 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5559 tree lo_index
= TREE_OPERAND (purpose
, 0);
5560 tree hi_index
= TREE_OPERAND (purpose
, 1);
5562 if (host_integerp (lo_index
, 1) && host_integerp (hi_index
, 1))
5563 mult
= (tree_low_cst (hi_index
, 1)
5564 - tree_low_cst (lo_index
, 1) + 1);
5567 elt_type
= TREE_TYPE (value
);
5569 switch (TREE_CODE (value
))
5573 HOST_WIDE_INT nz
= 0, ic
= 0;
5575 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5578 nz_elts
+= mult
* nz
;
5579 init_elts
+= mult
* ic
;
5581 if (const_from_elts_p
&& const_p
)
5582 const_p
= const_elt_p
;
5589 if (!initializer_zerop (value
))
5595 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
5596 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
5600 if (!initializer_zerop (TREE_REALPART (value
)))
5602 if (!initializer_zerop (TREE_IMAGPART (value
)))
5610 for (i
= 0; i
< VECTOR_CST_NELTS (value
); ++i
)
5612 tree v
= VECTOR_CST_ELT (value
, i
);
5613 if (!initializer_zerop (v
))
5622 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
5623 nz_elts
+= mult
* tc
;
5624 init_elts
+= mult
* tc
;
5626 if (const_from_elts_p
&& const_p
)
5627 const_p
= initializer_constant_valid_p (value
, elt_type
)
5634 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
5635 num_fields
, elt_type
))
5636 *p_complete
= false;
5638 *p_nz_elts
+= nz_elts
;
5639 *p_init_elts
+= init_elts
;
5644 /* Examine CTOR to discover:
5645 * how many scalar fields are set to nonzero values,
5646 and place it in *P_NZ_ELTS;
5647 * how many scalar fields in total are in CTOR,
5648 and place it in *P_ELT_COUNT.
5649 * whether the constructor is complete -- in the sense that every
5650 meaningful byte is explicitly given a value --
5651 and place it in *P_COMPLETE.
5653 Return whether or not CTOR is a valid static constant initializer, the same
5654 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5657 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5658 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5664 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
5667 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5668 of which had type LAST_TYPE. Each element was itself a complete
5669 initializer, in the sense that every meaningful byte was explicitly
5670 given a value. Return true if the same is true for the constructor
5674 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
5675 const_tree last_type
)
5677 if (TREE_CODE (type
) == UNION_TYPE
5678 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
5683 gcc_assert (num_elts
== 1 && last_type
);
5685 /* ??? We could look at each element of the union, and find the
5686 largest element. Which would avoid comparing the size of the
5687 initialized element against any tail padding in the union.
5688 Doesn't seem worth the effort... */
5689 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
5692 return count_type_elements (type
, true) == num_elts
;
5695 /* Return 1 if EXP contains mostly (3/4) zeros. */
5698 mostly_zeros_p (const_tree exp
)
5700 if (TREE_CODE (exp
) == CONSTRUCTOR
)
5702 HOST_WIDE_INT nz_elts
, init_elts
;
5705 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
5706 return !complete_p
|| nz_elts
< init_elts
/ 4;
5709 return initializer_zerop (exp
);
5712 /* Return 1 if EXP contains all zeros. */
5715 all_zeros_p (const_tree exp
)
5717 if (TREE_CODE (exp
) == CONSTRUCTOR
)
5719 HOST_WIDE_INT nz_elts
, init_elts
;
5722 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
5723 return nz_elts
== 0;
5726 return initializer_zerop (exp
);
5729 /* Helper function for store_constructor.
5730 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5731 CLEARED is as for store_constructor.
5732 ALIAS_SET is the alias set to use for any stores.
5734 This provides a recursive shortcut back to store_constructor when it isn't
5735 necessary to go through store_field. This is so that we can pass through
5736 the cleared field to let store_constructor know that we may not have to
5737 clear a substructure if the outer structure has already been cleared. */
5740 store_constructor_field (rtx target
, unsigned HOST_WIDE_INT bitsize
,
5741 HOST_WIDE_INT bitpos
, enum machine_mode mode
,
5742 tree exp
, int cleared
, alias_set_type alias_set
)
5744 if (TREE_CODE (exp
) == CONSTRUCTOR
5745 /* We can only call store_constructor recursively if the size and
5746 bit position are on a byte boundary. */
5747 && bitpos
% BITS_PER_UNIT
== 0
5748 && (bitsize
> 0 && bitsize
% BITS_PER_UNIT
== 0)
5749 /* If we have a nonzero bitpos for a register target, then we just
5750 let store_field do the bitfield handling. This is unlikely to
5751 generate unnecessary clear instructions anyways. */
5752 && (bitpos
== 0 || MEM_P (target
)))
5756 = adjust_address (target
,
5757 GET_MODE (target
) == BLKmode
5759 % GET_MODE_ALIGNMENT (GET_MODE (target
)))
5760 ? BLKmode
: VOIDmode
, bitpos
/ BITS_PER_UNIT
);
5763 /* Update the alias set, if required. */
5764 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
5765 && MEM_ALIAS_SET (target
) != 0)
5767 target
= copy_rtx (target
);
5768 set_mem_alias_set (target
, alias_set
);
5771 store_constructor (exp
, target
, cleared
, bitsize
/ BITS_PER_UNIT
);
5774 store_field (target
, bitsize
, bitpos
, 0, 0, mode
, exp
, alias_set
, false);
5777 /* Store the value of constructor EXP into the rtx TARGET.
5778 TARGET is either a REG or a MEM; we know it cannot conflict, since
5779 safe_from_p has been called.
5780 CLEARED is true if TARGET is known to have been zero'd.
5781 SIZE is the number of bytes of TARGET we are allowed to modify: this
5782 may not be the same as the size of EXP if we are assigning to a field
5783 which has been packed to exclude padding bits. */
5786 store_constructor (tree exp
, rtx target
, int cleared
, HOST_WIDE_INT size
)
5788 tree type
= TREE_TYPE (exp
);
5789 #ifdef WORD_REGISTER_OPERATIONS
5790 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
5793 switch (TREE_CODE (type
))
5797 case QUAL_UNION_TYPE
:
5799 unsigned HOST_WIDE_INT idx
;
5802 /* If size is zero or the target is already cleared, do nothing. */
5803 if (size
== 0 || cleared
)
5805 /* We either clear the aggregate or indicate the value is dead. */
5806 else if ((TREE_CODE (type
) == UNION_TYPE
5807 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
5808 && ! CONSTRUCTOR_ELTS (exp
))
5809 /* If the constructor is empty, clear the union. */
5811 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
5815 /* If we are building a static constructor into a register,
5816 set the initial value as zero so we can fold the value into
5817 a constant. But if more than one register is involved,
5818 this probably loses. */
5819 else if (REG_P (target
) && TREE_STATIC (exp
)
5820 && GET_MODE_SIZE (GET_MODE (target
)) <= UNITS_PER_WORD
)
5822 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
5826 /* If the constructor has fewer fields than the structure or
5827 if we are initializing the structure to mostly zeros, clear
5828 the whole structure first. Don't do this if TARGET is a
5829 register whose mode size isn't equal to SIZE since
5830 clear_storage can't handle this case. */
5832 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp
))
5833 != fields_length (type
))
5834 || mostly_zeros_p (exp
))
5836 || ((HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (target
))
5839 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
5843 if (REG_P (target
) && !cleared
)
5844 emit_clobber (target
);
5846 /* Store each element of the constructor into the
5847 corresponding field of TARGET. */
5848 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
5850 enum machine_mode mode
;
5851 HOST_WIDE_INT bitsize
;
5852 HOST_WIDE_INT bitpos
= 0;
5854 rtx to_rtx
= target
;
5856 /* Just ignore missing fields. We cleared the whole
5857 structure, above, if any fields are missing. */
5861 if (cleared
&& initializer_zerop (value
))
5864 if (host_integerp (DECL_SIZE (field
), 1))
5865 bitsize
= tree_low_cst (DECL_SIZE (field
), 1);
5869 mode
= DECL_MODE (field
);
5870 if (DECL_BIT_FIELD (field
))
5873 offset
= DECL_FIELD_OFFSET (field
);
5874 if (host_integerp (offset
, 0)
5875 && host_integerp (bit_position (field
), 0))
5877 bitpos
= int_bit_position (field
);
5881 bitpos
= tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 0);
5885 enum machine_mode address_mode
;
5889 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset
,
5890 make_tree (TREE_TYPE (exp
),
5893 offset_rtx
= expand_normal (offset
);
5894 gcc_assert (MEM_P (to_rtx
));
5896 address_mode
= get_address_mode (to_rtx
);
5897 if (GET_MODE (offset_rtx
) != address_mode
)
5898 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5900 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5901 highest_pow2_factor (offset
));
5904 #ifdef WORD_REGISTER_OPERATIONS
5905 /* If this initializes a field that is smaller than a
5906 word, at the start of a word, try to widen it to a full
5907 word. This special case allows us to output C++ member
5908 function initializations in a form that the optimizers
5911 && bitsize
< BITS_PER_WORD
5912 && bitpos
% BITS_PER_WORD
== 0
5913 && GET_MODE_CLASS (mode
) == MODE_INT
5914 && TREE_CODE (value
) == INTEGER_CST
5916 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
5918 tree type
= TREE_TYPE (value
);
5920 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
5922 type
= lang_hooks
.types
.type_for_mode
5923 (word_mode
, TYPE_UNSIGNED (type
));
5924 value
= fold_convert (type
, value
);
5927 if (BYTES_BIG_ENDIAN
)
5929 = fold_build2 (LSHIFT_EXPR
, type
, value
,
5930 build_int_cst (type
,
5931 BITS_PER_WORD
- bitsize
));
5932 bitsize
= BITS_PER_WORD
;
5937 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
5938 && DECL_NONADDRESSABLE_P (field
))
5940 to_rtx
= copy_rtx (to_rtx
);
5941 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
5944 store_constructor_field (to_rtx
, bitsize
, bitpos
, mode
,
5946 get_alias_set (TREE_TYPE (field
)));
5953 unsigned HOST_WIDE_INT i
;
5956 tree elttype
= TREE_TYPE (type
);
5958 HOST_WIDE_INT minelt
= 0;
5959 HOST_WIDE_INT maxelt
= 0;
5961 domain
= TYPE_DOMAIN (type
);
5962 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
5963 && TYPE_MAX_VALUE (domain
)
5964 && host_integerp (TYPE_MIN_VALUE (domain
), 0)
5965 && host_integerp (TYPE_MAX_VALUE (domain
), 0));
5967 /* If we have constant bounds for the range of the type, get them. */
5970 minelt
= tree_low_cst (TYPE_MIN_VALUE (domain
), 0);
5971 maxelt
= tree_low_cst (TYPE_MAX_VALUE (domain
), 0);
5974 /* If the constructor has fewer elements than the array, clear
5975 the whole array first. Similarly if this is static
5976 constructor of a non-BLKmode object. */
5979 else if (REG_P (target
) && TREE_STATIC (exp
))
5983 unsigned HOST_WIDE_INT idx
;
5985 HOST_WIDE_INT count
= 0, zero_count
= 0;
5986 need_to_clear
= ! const_bounds_p
;
5988 /* This loop is a more accurate version of the loop in
5989 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5990 is also needed to check for missing elements. */
5991 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
5993 HOST_WIDE_INT this_node_count
;
5998 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6000 tree lo_index
= TREE_OPERAND (index
, 0);
6001 tree hi_index
= TREE_OPERAND (index
, 1);
6003 if (! host_integerp (lo_index
, 1)
6004 || ! host_integerp (hi_index
, 1))
6010 this_node_count
= (tree_low_cst (hi_index
, 1)
6011 - tree_low_cst (lo_index
, 1) + 1);
6014 this_node_count
= 1;
6016 count
+= this_node_count
;
6017 if (mostly_zeros_p (value
))
6018 zero_count
+= this_node_count
;
6021 /* Clear the entire array first if there are any missing
6022 elements, or if the incidence of zero elements is >=
6025 && (count
< maxelt
- minelt
+ 1
6026 || 4 * zero_count
>= 3 * count
))
6030 if (need_to_clear
&& size
> 0)
6033 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6035 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6039 if (!cleared
&& REG_P (target
))
6040 /* Inform later passes that the old value is dead. */
6041 emit_clobber (target
);
6043 /* Store each element of the constructor into the
6044 corresponding element of TARGET, determined by counting the
6046 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6048 enum machine_mode mode
;
6049 HOST_WIDE_INT bitsize
;
6050 HOST_WIDE_INT bitpos
;
6051 rtx xtarget
= target
;
6053 if (cleared
&& initializer_zerop (value
))
6056 mode
= TYPE_MODE (elttype
);
6057 if (mode
== BLKmode
)
6058 bitsize
= (host_integerp (TYPE_SIZE (elttype
), 1)
6059 ? tree_low_cst (TYPE_SIZE (elttype
), 1)
6062 bitsize
= GET_MODE_BITSIZE (mode
);
6064 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6066 tree lo_index
= TREE_OPERAND (index
, 0);
6067 tree hi_index
= TREE_OPERAND (index
, 1);
6068 rtx index_r
, pos_rtx
;
6069 HOST_WIDE_INT lo
, hi
, count
;
6072 /* If the range is constant and "small", unroll the loop. */
6074 && host_integerp (lo_index
, 0)
6075 && host_integerp (hi_index
, 0)
6076 && (lo
= tree_low_cst (lo_index
, 0),
6077 hi
= tree_low_cst (hi_index
, 0),
6078 count
= hi
- lo
+ 1,
6081 || (host_integerp (TYPE_SIZE (elttype
), 1)
6082 && (tree_low_cst (TYPE_SIZE (elttype
), 1) * count
6085 lo
-= minelt
; hi
-= minelt
;
6086 for (; lo
<= hi
; lo
++)
6088 bitpos
= lo
* tree_low_cst (TYPE_SIZE (elttype
), 0);
6091 && !MEM_KEEP_ALIAS_SET_P (target
)
6092 && TREE_CODE (type
) == ARRAY_TYPE
6093 && TYPE_NONALIASED_COMPONENT (type
))
6095 target
= copy_rtx (target
);
6096 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6099 store_constructor_field
6100 (target
, bitsize
, bitpos
, mode
, value
, cleared
,
6101 get_alias_set (elttype
));
6106 rtx loop_start
= gen_label_rtx ();
6107 rtx loop_end
= gen_label_rtx ();
6110 expand_normal (hi_index
);
6112 index
= build_decl (EXPR_LOCATION (exp
),
6113 VAR_DECL
, NULL_TREE
, domain
);
6114 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6115 SET_DECL_RTL (index
, index_r
);
6116 store_expr (lo_index
, index_r
, 0, false);
6118 /* Build the head of the loop. */
6119 do_pending_stack_adjust ();
6120 emit_label (loop_start
);
6122 /* Assign value to element index. */
6124 fold_convert (ssizetype
,
6125 fold_build2 (MINUS_EXPR
,
6128 TYPE_MIN_VALUE (domain
)));
6131 size_binop (MULT_EXPR
, position
,
6132 fold_convert (ssizetype
,
6133 TYPE_SIZE_UNIT (elttype
)));
6135 pos_rtx
= expand_normal (position
);
6136 xtarget
= offset_address (target
, pos_rtx
,
6137 highest_pow2_factor (position
));
6138 xtarget
= adjust_address (xtarget
, mode
, 0);
6139 if (TREE_CODE (value
) == CONSTRUCTOR
)
6140 store_constructor (value
, xtarget
, cleared
,
6141 bitsize
/ BITS_PER_UNIT
);
6143 store_expr (value
, xtarget
, 0, false);
6145 /* Generate a conditional jump to exit the loop. */
6146 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6148 jumpif (exit_cond
, loop_end
, -1);
6150 /* Update the loop counter, and jump to the head of
6152 expand_assignment (index
,
6153 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6154 index
, integer_one_node
),
6157 emit_jump (loop_start
);
6159 /* Build the end of the loop. */
6160 emit_label (loop_end
);
6163 else if ((index
!= 0 && ! host_integerp (index
, 0))
6164 || ! host_integerp (TYPE_SIZE (elttype
), 1))
6169 index
= ssize_int (1);
6172 index
= fold_convert (ssizetype
,
6173 fold_build2 (MINUS_EXPR
,
6176 TYPE_MIN_VALUE (domain
)));
6179 size_binop (MULT_EXPR
, index
,
6180 fold_convert (ssizetype
,
6181 TYPE_SIZE_UNIT (elttype
)));
6182 xtarget
= offset_address (target
,
6183 expand_normal (position
),
6184 highest_pow2_factor (position
));
6185 xtarget
= adjust_address (xtarget
, mode
, 0);
6186 store_expr (value
, xtarget
, 0, false);
6191 bitpos
= ((tree_low_cst (index
, 0) - minelt
)
6192 * tree_low_cst (TYPE_SIZE (elttype
), 1));
6194 bitpos
= (i
* tree_low_cst (TYPE_SIZE (elttype
), 1));
6196 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6197 && TREE_CODE (type
) == ARRAY_TYPE
6198 && TYPE_NONALIASED_COMPONENT (type
))
6200 target
= copy_rtx (target
);
6201 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6203 store_constructor_field (target
, bitsize
, bitpos
, mode
, value
,
6204 cleared
, get_alias_set (elttype
));
6212 unsigned HOST_WIDE_INT idx
;
6213 constructor_elt
*ce
;
6216 int icode
= CODE_FOR_nothing
;
6217 tree elttype
= TREE_TYPE (type
);
6218 int elt_size
= tree_low_cst (TYPE_SIZE (elttype
), 1);
6219 enum machine_mode eltmode
= TYPE_MODE (elttype
);
6220 HOST_WIDE_INT bitsize
;
6221 HOST_WIDE_INT bitpos
;
6222 rtvec vector
= NULL
;
6224 alias_set_type alias
;
6226 gcc_assert (eltmode
!= BLKmode
);
6228 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6229 if (REG_P (target
) && VECTOR_MODE_P (GET_MODE (target
)))
6231 enum machine_mode mode
= GET_MODE (target
);
6233 icode
= (int) optab_handler (vec_init_optab
, mode
);
6234 if (icode
!= CODE_FOR_nothing
)
6238 vector
= rtvec_alloc (n_elts
);
6239 for (i
= 0; i
< n_elts
; i
++)
6240 RTVEC_ELT (vector
, i
) = CONST0_RTX (GET_MODE_INNER (mode
));
6244 /* If the constructor has fewer elements than the vector,
6245 clear the whole array first. Similarly if this is static
6246 constructor of a non-BLKmode object. */
6249 else if (REG_P (target
) && TREE_STATIC (exp
))
6253 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6256 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6258 int n_elts_here
= tree_low_cst
6259 (int_const_binop (TRUNC_DIV_EXPR
,
6260 TYPE_SIZE (TREE_TYPE (value
)),
6261 TYPE_SIZE (elttype
)), 1);
6263 count
+= n_elts_here
;
6264 if (mostly_zeros_p (value
))
6265 zero_count
+= n_elts_here
;
6268 /* Clear the entire vector first if there are any missing elements,
6269 or if the incidence of zero elements is >= 75%. */
6270 need_to_clear
= (count
< n_elts
|| 4 * zero_count
>= 3 * count
);
6273 if (need_to_clear
&& size
> 0 && !vector
)
6276 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6278 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6282 /* Inform later passes that the old value is dead. */
6283 if (!cleared
&& !vector
&& REG_P (target
))
6284 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6287 alias
= MEM_ALIAS_SET (target
);
6289 alias
= get_alias_set (elttype
);
6291 /* Store each element of the constructor into the corresponding
6292 element of TARGET, determined by counting the elements. */
6293 for (idx
= 0, i
= 0;
6294 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6295 idx
++, i
+= bitsize
/ elt_size
)
6297 HOST_WIDE_INT eltpos
;
6298 tree value
= ce
->value
;
6300 bitsize
= tree_low_cst (TYPE_SIZE (TREE_TYPE (value
)), 1);
6301 if (cleared
&& initializer_zerop (value
))
6305 eltpos
= tree_low_cst (ce
->index
, 1);
6311 /* Vector CONSTRUCTORs should only be built from smaller
6312 vectors in the case of BLKmode vectors. */
6313 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6314 RTVEC_ELT (vector
, eltpos
)
6315 = expand_normal (value
);
6319 enum machine_mode value_mode
=
6320 TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6321 ? TYPE_MODE (TREE_TYPE (value
))
6323 bitpos
= eltpos
* elt_size
;
6324 store_constructor_field (target
, bitsize
, bitpos
, value_mode
,
6325 value
, cleared
, alias
);
6330 emit_insn (GEN_FCN (icode
)
6332 gen_rtx_PARALLEL (GET_MODE (target
), vector
)));
6341 /* Store the value of EXP (an expression tree)
6342 into a subfield of TARGET which has mode MODE and occupies
6343 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6344 If MODE is VOIDmode, it means that we are storing into a bit-field.
6346 BITREGION_START is bitpos of the first bitfield in this region.
6347 BITREGION_END is the bitpos of the ending bitfield in this region.
6348 These two fields are 0, if the C++ memory model does not apply,
6349 or we are not interested in keeping track of bitfield regions.
6351 Always return const0_rtx unless we have something particular to
6354 ALIAS_SET is the alias set for the destination. This value will
6355 (in general) be different from that for TARGET, since TARGET is a
6356 reference to the containing structure.
6358 If NONTEMPORAL is true, try generating a nontemporal store. */
6361 store_field (rtx target
, HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitpos
,
6362 unsigned HOST_WIDE_INT bitregion_start
,
6363 unsigned HOST_WIDE_INT bitregion_end
,
6364 enum machine_mode mode
, tree exp
,
6365 alias_set_type alias_set
, bool nontemporal
)
6367 if (TREE_CODE (exp
) == ERROR_MARK
)
6370 /* If we have nothing to store, do nothing unless the expression has
6373 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6375 if (GET_CODE (target
) == CONCAT
)
6377 /* We're storing into a struct containing a single __complex. */
6379 gcc_assert (!bitpos
);
6380 return store_expr (exp
, target
, 0, nontemporal
);
6383 /* If the structure is in a register or if the component
6384 is a bit field, we cannot use addressing to access it.
6385 Use bit-field techniques or SUBREG to store in it. */
6387 if (mode
== VOIDmode
6388 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6389 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6390 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6392 || GET_CODE (target
) == SUBREG
6393 /* If the field isn't aligned enough to store as an ordinary memref,
6394 store it as a bit field. */
6396 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6397 || bitpos
% GET_MODE_ALIGNMENT (mode
))
6398 && SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (target
)))
6399 || (bitpos
% BITS_PER_UNIT
!= 0)))
6400 || (bitsize
>= 0 && mode
!= BLKmode
6401 && GET_MODE_BITSIZE (mode
) > bitsize
)
6402 /* If the RHS and field are a constant size and the size of the
6403 RHS isn't the same size as the bitfield, we must use bitfield
6406 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
6407 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)), bitsize
) != 0)
6408 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6409 decl we must use bitfield operations. */
6411 && TREE_CODE (exp
) == MEM_REF
6412 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6413 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6414 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0),0 ))
6415 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6420 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6421 implies a mask operation. If the precision is the same size as
6422 the field we're storing into, that mask is redundant. This is
6423 particularly common with bit field assignments generated by the
6425 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6428 tree type
= TREE_TYPE (exp
);
6429 if (INTEGRAL_TYPE_P (type
)
6430 && TYPE_PRECISION (type
) < GET_MODE_BITSIZE (TYPE_MODE (type
))
6431 && bitsize
== TYPE_PRECISION (type
))
6433 tree op
= gimple_assign_rhs1 (nop_def
);
6434 type
= TREE_TYPE (op
);
6435 if (INTEGRAL_TYPE_P (type
) && TYPE_PRECISION (type
) >= bitsize
)
6440 temp
= expand_normal (exp
);
6442 /* If BITSIZE is narrower than the size of the type of EXP
6443 we will be narrowing TEMP. Normally, what's wanted are the
6444 low-order bits. However, if EXP's type is a record and this is
6445 big-endian machine, we want the upper BITSIZE bits. */
6446 if (BYTES_BIG_ENDIAN
&& GET_MODE_CLASS (GET_MODE (temp
)) == MODE_INT
6447 && bitsize
< (HOST_WIDE_INT
) GET_MODE_BITSIZE (GET_MODE (temp
))
6448 && TREE_CODE (TREE_TYPE (exp
)) == RECORD_TYPE
)
6449 temp
= expand_shift (RSHIFT_EXPR
, GET_MODE (temp
), temp
,
6450 GET_MODE_BITSIZE (GET_MODE (temp
)) - bitsize
,
6453 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6454 if (mode
!= VOIDmode
&& mode
!= BLKmode
6455 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
6456 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
6458 /* If the modes of TEMP and TARGET are both BLKmode, both
6459 must be in memory and BITPOS must be aligned on a byte
6460 boundary. If so, we simply do a block copy. Likewise
6461 for a BLKmode-like TARGET. */
6462 if (GET_MODE (temp
) == BLKmode
6463 && (GET_MODE (target
) == BLKmode
6465 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
6466 && (bitpos
% BITS_PER_UNIT
) == 0
6467 && (bitsize
% BITS_PER_UNIT
) == 0)))
6469 gcc_assert (MEM_P (target
) && MEM_P (temp
)
6470 && (bitpos
% BITS_PER_UNIT
) == 0);
6472 target
= adjust_address (target
, VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6473 emit_block_move (target
, temp
,
6474 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
6481 /* Handle calls that return values in multiple non-contiguous locations.
6482 The Irix 6 ABI has examples of this. */
6483 if (GET_CODE (temp
) == PARALLEL
)
6485 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6487 if (mode
== BLKmode
)
6488 mode
= smallest_mode_for_size (size
* BITS_PER_UNIT
, MODE_INT
);
6489 temp_target
= gen_reg_rtx (mode
);
6490 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6493 else if (mode
== BLKmode
)
6495 /* Handle calls that return BLKmode values in registers. */
6496 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6498 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6499 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6504 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6506 mode
= smallest_mode_for_size (size
* BITS_PER_UNIT
, MODE_INT
);
6507 temp_target
= gen_reg_rtx (mode
);
6509 = extract_bit_field (temp
, size
* BITS_PER_UNIT
, 0, 1,
6510 false, temp_target
, mode
, mode
);
6515 /* Store the value in the bitfield. */
6516 store_bit_field (target
, bitsize
, bitpos
,
6517 bitregion_start
, bitregion_end
,
6524 /* Now build a reference to just the desired component. */
6525 rtx to_rtx
= adjust_address (target
, mode
, bitpos
/ BITS_PER_UNIT
);
6527 if (to_rtx
== target
)
6528 to_rtx
= copy_rtx (to_rtx
);
6530 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
6531 set_mem_alias_set (to_rtx
, alias_set
);
6533 return store_expr (exp
, to_rtx
, 0, nontemporal
);
6537 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6538 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6539 codes and find the ultimate containing object, which we return.
6541 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6542 bit position, and *PUNSIGNEDP to the signedness of the field.
6543 If the position of the field is variable, we store a tree
6544 giving the variable offset (in units) in *POFFSET.
6545 This offset is in addition to the bit position.
6546 If the position is not variable, we store 0 in *POFFSET.
6548 If any of the extraction expressions is volatile,
6549 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6551 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6552 Otherwise, it is a mode that can be used to access the field.
6554 If the field describes a variable-sized object, *PMODE is set to
6555 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6556 this case, but the address of the object can be found.
6558 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6559 look through nodes that serve as markers of a greater alignment than
6560 the one that can be deduced from the expression. These nodes make it
6561 possible for front-ends to prevent temporaries from being created by
6562 the middle-end on alignment considerations. For that purpose, the
6563 normal operating mode at high-level is to always pass FALSE so that
6564 the ultimate containing object is really returned; moreover, the
6565 associated predicate handled_component_p will always return TRUE
6566 on these nodes, thus indicating that they are essentially handled
6567 by get_inner_reference. TRUE should only be passed when the caller
6568 is scanning the expression in order to build another representation
6569 and specifically knows how to handle these nodes; as such, this is
6570 the normal operating mode in the RTL expanders. */
6573 get_inner_reference (tree exp
, HOST_WIDE_INT
*pbitsize
,
6574 HOST_WIDE_INT
*pbitpos
, tree
*poffset
,
6575 enum machine_mode
*pmode
, int *punsignedp
,
6576 int *pvolatilep
, bool keep_aligning
)
6579 enum machine_mode mode
= VOIDmode
;
6580 bool blkmode_bitfield
= false;
6581 tree offset
= size_zero_node
;
6582 double_int bit_offset
= double_int_zero
;
6584 /* First get the mode, signedness, and size. We do this from just the
6585 outermost expression. */
6587 if (TREE_CODE (exp
) == COMPONENT_REF
)
6589 tree field
= TREE_OPERAND (exp
, 1);
6590 size_tree
= DECL_SIZE (field
);
6591 if (!DECL_BIT_FIELD (field
))
6592 mode
= DECL_MODE (field
);
6593 else if (DECL_MODE (field
) == BLKmode
)
6594 blkmode_bitfield
= true;
6595 else if (TREE_THIS_VOLATILE (exp
)
6596 && flag_strict_volatile_bitfields
> 0)
6597 /* Volatile bitfields should be accessed in the mode of the
6598 field's type, not the mode computed based on the bit
6600 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
6602 *punsignedp
= DECL_UNSIGNED (field
);
6604 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
6606 size_tree
= TREE_OPERAND (exp
, 1);
6607 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
6608 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
6610 /* For vector types, with the correct size of access, use the mode of
6612 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
6613 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
6614 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
6615 mode
= TYPE_MODE (TREE_TYPE (exp
));
6619 mode
= TYPE_MODE (TREE_TYPE (exp
));
6620 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
6622 if (mode
== BLKmode
)
6623 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
6625 *pbitsize
= GET_MODE_BITSIZE (mode
);
6630 if (! host_integerp (size_tree
, 1))
6631 mode
= BLKmode
, *pbitsize
= -1;
6633 *pbitsize
= tree_low_cst (size_tree
, 1);
6636 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6637 and find the ultimate containing object. */
6640 switch (TREE_CODE (exp
))
6643 bit_offset
+= tree_to_double_int (TREE_OPERAND (exp
, 2));
6648 tree field
= TREE_OPERAND (exp
, 1);
6649 tree this_offset
= component_ref_field_offset (exp
);
6651 /* If this field hasn't been filled in yet, don't go past it.
6652 This should only happen when folding expressions made during
6653 type construction. */
6654 if (this_offset
== 0)
6657 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
6658 bit_offset
+= tree_to_double_int (DECL_FIELD_BIT_OFFSET (field
));
6660 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6665 case ARRAY_RANGE_REF
:
6667 tree index
= TREE_OPERAND (exp
, 1);
6668 tree low_bound
= array_ref_low_bound (exp
);
6669 tree unit_size
= array_ref_element_size (exp
);
6671 /* We assume all arrays have sizes that are a multiple of a byte.
6672 First subtract the lower bound, if any, in the type of the
6673 index, then convert to sizetype and multiply by the size of
6674 the array element. */
6675 if (! integer_zerop (low_bound
))
6676 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
6679 offset
= size_binop (PLUS_EXPR
, offset
,
6680 size_binop (MULT_EXPR
,
6681 fold_convert (sizetype
, index
),
6690 bit_offset
+= double_int::from_uhwi (*pbitsize
);
6693 case VIEW_CONVERT_EXPR
:
6694 if (keep_aligning
&& STRICT_ALIGNMENT
6695 && (TYPE_ALIGN (TREE_TYPE (exp
))
6696 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp
, 0))))
6697 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp
, 0)))
6698 < BIGGEST_ALIGNMENT
)
6699 && (TYPE_ALIGN_OK (TREE_TYPE (exp
))
6700 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp
, 0)))))
6705 /* Hand back the decl for MEM[&decl, off]. */
6706 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
6708 tree off
= TREE_OPERAND (exp
, 1);
6709 if (!integer_zerop (off
))
6711 double_int boff
, coff
= mem_ref_offset (exp
);
6712 boff
= coff
.lshift (BITS_PER_UNIT
== 8
6713 ? 3 : exact_log2 (BITS_PER_UNIT
));
6716 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
6724 /* If any reference in the chain is volatile, the effect is volatile. */
6725 if (TREE_THIS_VOLATILE (exp
))
6728 exp
= TREE_OPERAND (exp
, 0);
6732 /* If OFFSET is constant, see if we can return the whole thing as a
6733 constant bit position. Make sure to handle overflow during
6735 if (TREE_CODE (offset
) == INTEGER_CST
)
6737 double_int tem
= tree_to_double_int (offset
);
6738 tem
= tem
.sext (TYPE_PRECISION (sizetype
));
6739 tem
= tem
.lshift (BITS_PER_UNIT
== 8 ? 3 : exact_log2 (BITS_PER_UNIT
));
6741 if (tem
.fits_shwi ())
6743 *pbitpos
= tem
.to_shwi ();
6744 *poffset
= offset
= NULL_TREE
;
6748 /* Otherwise, split it up. */
6751 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6752 if (bit_offset
.is_negative ())
6755 = double_int::mask (BITS_PER_UNIT
== 8
6756 ? 3 : exact_log2 (BITS_PER_UNIT
));
6757 double_int tem
= bit_offset
.and_not (mask
);
6758 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6759 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6761 tem
= tem
.arshift (BITS_PER_UNIT
== 8
6762 ? 3 : exact_log2 (BITS_PER_UNIT
),
6763 HOST_BITS_PER_DOUBLE_INT
);
6764 offset
= size_binop (PLUS_EXPR
, offset
,
6765 double_int_to_tree (sizetype
, tem
));
6768 *pbitpos
= bit_offset
.to_shwi ();
6772 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6773 if (mode
== VOIDmode
6775 && (*pbitpos
% BITS_PER_UNIT
) == 0
6776 && (*pbitsize
% BITS_PER_UNIT
) == 0)
6784 /* Return a tree of sizetype representing the size, in bytes, of the element
6785 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6788 array_ref_element_size (tree exp
)
6790 tree aligned_size
= TREE_OPERAND (exp
, 3);
6791 tree elmt_type
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)));
6792 location_t loc
= EXPR_LOCATION (exp
);
6794 /* If a size was specified in the ARRAY_REF, it's the size measured
6795 in alignment units of the element type. So multiply by that value. */
6798 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6799 sizetype from another type of the same width and signedness. */
6800 if (TREE_TYPE (aligned_size
) != sizetype
)
6801 aligned_size
= fold_convert_loc (loc
, sizetype
, aligned_size
);
6802 return size_binop_loc (loc
, MULT_EXPR
, aligned_size
,
6803 size_int (TYPE_ALIGN_UNIT (elmt_type
)));
6806 /* Otherwise, take the size from that of the element type. Substitute
6807 any PLACEHOLDER_EXPR that we have. */
6809 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type
), exp
);
6812 /* Return a tree representing the lower bound of the array mentioned in
6813 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6816 array_ref_low_bound (tree exp
)
6818 tree domain_type
= TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp
, 0)));
6820 /* If a lower bound is specified in EXP, use it. */
6821 if (TREE_OPERAND (exp
, 2))
6822 return TREE_OPERAND (exp
, 2);
6824 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6825 substituting for a PLACEHOLDER_EXPR as needed. */
6826 if (domain_type
&& TYPE_MIN_VALUE (domain_type
))
6827 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type
), exp
);
6829 /* Otherwise, return a zero of the appropriate type. */
6830 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp
, 1)), 0);
6833 /* Returns true if REF is an array reference to an array at the end of
6834 a structure. If this is the case, the array may be allocated larger
6835 than its upper bound implies. */
6838 array_at_struct_end_p (tree ref
)
6840 if (TREE_CODE (ref
) != ARRAY_REF
6841 && TREE_CODE (ref
) != ARRAY_RANGE_REF
)
6844 while (handled_component_p (ref
))
6846 /* If the reference chain contains a component reference to a
6847 non-union type and there follows another field the reference
6848 is not at the end of a structure. */
6849 if (TREE_CODE (ref
) == COMPONENT_REF
6850 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref
, 0))) == RECORD_TYPE
)
6852 tree nextf
= DECL_CHAIN (TREE_OPERAND (ref
, 1));
6853 while (nextf
&& TREE_CODE (nextf
) != FIELD_DECL
)
6854 nextf
= DECL_CHAIN (nextf
);
6859 ref
= TREE_OPERAND (ref
, 0);
6862 /* If the reference is based on a declared entity, the size of the array
6863 is constrained by its given domain. */
6870 /* Return a tree representing the upper bound of the array mentioned in
6871 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6874 array_ref_up_bound (tree exp
)
6876 tree domain_type
= TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp
, 0)));
6878 /* If there is a domain type and it has an upper bound, use it, substituting
6879 for a PLACEHOLDER_EXPR as needed. */
6880 if (domain_type
&& TYPE_MAX_VALUE (domain_type
))
6881 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type
), exp
);
6883 /* Otherwise fail. */
6887 /* Return a tree representing the offset, in bytes, of the field referenced
6888 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6891 component_ref_field_offset (tree exp
)
6893 tree aligned_offset
= TREE_OPERAND (exp
, 2);
6894 tree field
= TREE_OPERAND (exp
, 1);
6895 location_t loc
= EXPR_LOCATION (exp
);
6897 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6898 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6902 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6903 sizetype from another type of the same width and signedness. */
6904 if (TREE_TYPE (aligned_offset
) != sizetype
)
6905 aligned_offset
= fold_convert_loc (loc
, sizetype
, aligned_offset
);
6906 return size_binop_loc (loc
, MULT_EXPR
, aligned_offset
,
6907 size_int (DECL_OFFSET_ALIGN (field
)
6911 /* Otherwise, take the offset from that of the field. Substitute
6912 any PLACEHOLDER_EXPR that we have. */
6914 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field
), exp
);
6917 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6919 static unsigned HOST_WIDE_INT
6920 target_align (const_tree target
)
6922 /* We might have a chain of nested references with intermediate misaligning
6923 bitfields components, so need to recurse to find out. */
6925 unsigned HOST_WIDE_INT this_align
, outer_align
;
6927 switch (TREE_CODE (target
))
6933 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
6934 outer_align
= target_align (TREE_OPERAND (target
, 0));
6935 return MIN (this_align
, outer_align
);
6938 case ARRAY_RANGE_REF
:
6939 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
6940 outer_align
= target_align (TREE_OPERAND (target
, 0));
6941 return MIN (this_align
, outer_align
);
6944 case NON_LVALUE_EXPR
:
6945 case VIEW_CONVERT_EXPR
:
6946 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
6947 outer_align
= target_align (TREE_OPERAND (target
, 0));
6948 return MAX (this_align
, outer_align
);
6951 return TYPE_ALIGN (TREE_TYPE (target
));
6956 /* Given an rtx VALUE that may contain additions and multiplications, return
6957 an equivalent value that just refers to a register, memory, or constant.
6958 This is done by generating instructions to perform the arithmetic and
6959 returning a pseudo-register containing the value.
6961 The returned value may be a REG, SUBREG, MEM or constant. */
6964 force_operand (rtx value
, rtx target
)
6967 /* Use subtarget as the target for operand 0 of a binary operation. */
6968 rtx subtarget
= get_subtarget (target
);
6969 enum rtx_code code
= GET_CODE (value
);
6971 /* Check for subreg applied to an expression produced by loop optimizer. */
6973 && !REG_P (SUBREG_REG (value
))
6974 && !MEM_P (SUBREG_REG (value
)))
6977 = simplify_gen_subreg (GET_MODE (value
),
6978 force_reg (GET_MODE (SUBREG_REG (value
)),
6979 force_operand (SUBREG_REG (value
),
6981 GET_MODE (SUBREG_REG (value
)),
6982 SUBREG_BYTE (value
));
6983 code
= GET_CODE (value
);
6986 /* Check for a PIC address load. */
6987 if ((code
== PLUS
|| code
== MINUS
)
6988 && XEXP (value
, 0) == pic_offset_table_rtx
6989 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
6990 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
6991 || GET_CODE (XEXP (value
, 1)) == CONST
))
6994 subtarget
= gen_reg_rtx (GET_MODE (value
));
6995 emit_move_insn (subtarget
, value
);
6999 if (ARITHMETIC_P (value
))
7001 op2
= XEXP (value
, 1);
7002 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7004 if (code
== MINUS
&& CONST_INT_P (op2
))
7007 op2
= negate_rtx (GET_MODE (value
), op2
);
7010 /* Check for an addition with OP2 a constant integer and our first
7011 operand a PLUS of a virtual register and something else. In that
7012 case, we want to emit the sum of the virtual register and the
7013 constant first and then add the other value. This allows virtual
7014 register instantiation to simply modify the constant rather than
7015 creating another one around this addition. */
7016 if (code
== PLUS
&& CONST_INT_P (op2
)
7017 && GET_CODE (XEXP (value
, 0)) == PLUS
7018 && REG_P (XEXP (XEXP (value
, 0), 0))
7019 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7020 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7022 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7023 XEXP (XEXP (value
, 0), 0), op2
,
7024 subtarget
, 0, OPTAB_LIB_WIDEN
);
7025 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7026 force_operand (XEXP (XEXP (value
,
7028 target
, 0, OPTAB_LIB_WIDEN
);
7031 op1
= force_operand (XEXP (value
, 0), subtarget
);
7032 op2
= force_operand (op2
, NULL_RTX
);
7036 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7038 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7039 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7040 target
, 1, OPTAB_LIB_WIDEN
);
7042 return expand_divmod (0,
7043 FLOAT_MODE_P (GET_MODE (value
))
7044 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7045 GET_MODE (value
), op1
, op2
, target
, 0);
7047 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7050 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7053 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7056 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7057 target
, 0, OPTAB_LIB_WIDEN
);
7059 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7060 target
, 1, OPTAB_LIB_WIDEN
);
7063 if (UNARY_P (value
))
7066 target
= gen_reg_rtx (GET_MODE (value
));
7067 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7074 case FLOAT_TRUNCATE
:
7075 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7080 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7084 case UNSIGNED_FLOAT
:
7085 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7089 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7093 #ifdef INSN_SCHEDULING
7094 /* On machines that have insn scheduling, we want all memory reference to be
7095 explicit, so we need to deal with such paradoxical SUBREGs. */
7096 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7098 = simplify_gen_subreg (GET_MODE (value
),
7099 force_reg (GET_MODE (SUBREG_REG (value
)),
7100 force_operand (SUBREG_REG (value
),
7102 GET_MODE (SUBREG_REG (value
)),
7103 SUBREG_BYTE (value
));
7109 /* Subroutine of expand_expr: return nonzero iff there is no way that
7110 EXP can reference X, which is being modified. TOP_P is nonzero if this
7111 call is going to be used to determine whether we need a temporary
7112 for EXP, as opposed to a recursive call to this function.
7114 It is always safe for this routine to return zero since it merely
7115 searches for optimization opportunities. */
7118 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7124 /* If EXP has varying size, we MUST use a target since we currently
7125 have no way of allocating temporaries of variable size
7126 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7127 So we assume here that something at a higher level has prevented a
7128 clash. This is somewhat bogus, but the best we can do. Only
7129 do this when X is BLKmode and when we are at the top level. */
7130 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7131 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7132 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7133 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7134 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7136 && GET_MODE (x
) == BLKmode
)
7137 /* If X is in the outgoing argument area, it is always safe. */
7139 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7140 || (GET_CODE (XEXP (x
, 0)) == PLUS
7141 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7144 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7145 find the underlying pseudo. */
7146 if (GET_CODE (x
) == SUBREG
)
7149 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7153 /* Now look at our tree code and possibly recurse. */
7154 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7156 case tcc_declaration
:
7157 exp_rtl
= DECL_RTL_IF_SET (exp
);
7163 case tcc_exceptional
:
7164 if (TREE_CODE (exp
) == TREE_LIST
)
7168 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7170 exp
= TREE_CHAIN (exp
);
7173 if (TREE_CODE (exp
) != TREE_LIST
)
7174 return safe_from_p (x
, exp
, 0);
7177 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7179 constructor_elt
*ce
;
7180 unsigned HOST_WIDE_INT idx
;
7182 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7183 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7184 || !safe_from_p (x
, ce
->value
, 0))
7188 else if (TREE_CODE (exp
) == ERROR_MARK
)
7189 return 1; /* An already-visited SAVE_EXPR? */
7194 /* The only case we look at here is the DECL_INITIAL inside a
7196 return (TREE_CODE (exp
) != DECL_EXPR
7197 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7198 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7199 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7202 case tcc_comparison
:
7203 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7208 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7210 case tcc_expression
:
7213 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7214 the expression. If it is set, we conflict iff we are that rtx or
7215 both are in memory. Otherwise, we check all operands of the
7216 expression recursively. */
7218 switch (TREE_CODE (exp
))
7221 /* If the operand is static or we are static, we can't conflict.
7222 Likewise if we don't conflict with the operand at all. */
7223 if (staticp (TREE_OPERAND (exp
, 0))
7224 || TREE_STATIC (exp
)
7225 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7228 /* Otherwise, the only way this can conflict is if we are taking
7229 the address of a DECL a that address if part of X, which is
7231 exp
= TREE_OPERAND (exp
, 0);
7234 if (!DECL_RTL_SET_P (exp
)
7235 || !MEM_P (DECL_RTL (exp
)))
7238 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7244 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7245 get_alias_set (exp
)))
7250 /* Assume that the call will clobber all hard registers and
7252 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7257 case WITH_CLEANUP_EXPR
:
7258 case CLEANUP_POINT_EXPR
:
7259 /* Lowered by gimplify.c. */
7263 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7269 /* If we have an rtx, we do not need to scan our operands. */
7273 nops
= TREE_OPERAND_LENGTH (exp
);
7274 for (i
= 0; i
< nops
; i
++)
7275 if (TREE_OPERAND (exp
, i
) != 0
7276 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7282 /* Should never get a type here. */
7286 /* If we have an rtl, find any enclosed object. Then see if we conflict
7290 if (GET_CODE (exp_rtl
) == SUBREG
)
7292 exp_rtl
= SUBREG_REG (exp_rtl
);
7294 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7298 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7299 are memory and they conflict. */
7300 return ! (rtx_equal_p (x
, exp_rtl
)
7301 || (MEM_P (x
) && MEM_P (exp_rtl
)
7302 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7305 /* If we reach here, it is safe. */
7310 /* Return the highest power of two that EXP is known to be a multiple of.
7311 This is used in updating alignment of MEMs in array references. */
7313 unsigned HOST_WIDE_INT
7314 highest_pow2_factor (const_tree exp
)
7316 unsigned HOST_WIDE_INT c0
, c1
;
7318 switch (TREE_CODE (exp
))
7321 /* We can find the lowest bit that's a one. If the low
7322 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7323 We need to handle this case since we can find it in a COND_EXPR,
7324 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7325 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7327 if (TREE_OVERFLOW (exp
))
7328 return BIGGEST_ALIGNMENT
;
7331 /* Note: tree_low_cst is intentionally not used here,
7332 we don't care about the upper bits. */
7333 c0
= TREE_INT_CST_LOW (exp
);
7335 return c0
? c0
: BIGGEST_ALIGNMENT
;
7339 case PLUS_EXPR
: case MINUS_EXPR
: case MIN_EXPR
: case MAX_EXPR
:
7340 c0
= highest_pow2_factor (TREE_OPERAND (exp
, 0));
7341 c1
= highest_pow2_factor (TREE_OPERAND (exp
, 1));
7342 return MIN (c0
, c1
);
7345 c0
= highest_pow2_factor (TREE_OPERAND (exp
, 0));
7346 c1
= highest_pow2_factor (TREE_OPERAND (exp
, 1));
7349 case ROUND_DIV_EXPR
: case TRUNC_DIV_EXPR
: case FLOOR_DIV_EXPR
:
7351 if (integer_pow2p (TREE_OPERAND (exp
, 1))
7352 && host_integerp (TREE_OPERAND (exp
, 1), 1))
7354 c0
= highest_pow2_factor (TREE_OPERAND (exp
, 0));
7355 c1
= tree_low_cst (TREE_OPERAND (exp
, 1), 1);
7356 return MAX (1, c0
/ c1
);
7361 /* The highest power of two of a bit-and expression is the maximum of
7362 that of its operands. We typically get here for a complex LHS and
7363 a constant negative power of two on the RHS to force an explicit
7364 alignment, so don't bother looking at the LHS. */
7365 return highest_pow2_factor (TREE_OPERAND (exp
, 1));
7369 return highest_pow2_factor (TREE_OPERAND (exp
, 0));
7372 return highest_pow2_factor (TREE_OPERAND (exp
, 1));
7375 c0
= highest_pow2_factor (TREE_OPERAND (exp
, 1));
7376 c1
= highest_pow2_factor (TREE_OPERAND (exp
, 2));
7377 return MIN (c0
, c1
);
7386 /* Similar, except that the alignment requirements of TARGET are
7387 taken into account. Assume it is at least as aligned as its
7388 type, unless it is a COMPONENT_REF in which case the layout of
7389 the structure gives the alignment. */
7391 static unsigned HOST_WIDE_INT
7392 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7394 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7395 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7397 return MAX (factor
, talign
);
7400 #ifdef HAVE_conditional_move
7401 /* Convert the tree comparison code TCODE to the rtl one where the
7402 signedness is UNSIGNEDP. */
7404 static enum rtx_code
7405 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7417 code
= unsignedp
? LTU
: LT
;
7420 code
= unsignedp
? LEU
: LE
;
7423 code
= unsignedp
? GTU
: GT
;
7426 code
= unsignedp
? GEU
: GE
;
7428 case UNORDERED_EXPR
:
7460 /* Subroutine of expand_expr. Expand the two operands of a binary
7461 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7462 The value may be stored in TARGET if TARGET is nonzero. The
7463 MODIFIER argument is as documented by expand_expr. */
7466 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7467 enum expand_modifier modifier
)
7469 if (! safe_from_p (target
, exp1
, 1))
7471 if (operand_equal_p (exp0
, exp1
, 0))
7473 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7474 *op1
= copy_rtx (*op0
);
7478 /* If we need to preserve evaluation order, copy exp0 into its own
7479 temporary variable so that it can't be clobbered by exp1. */
7480 if (flag_evaluation_order
&& TREE_SIDE_EFFECTS (exp1
))
7481 exp0
= save_expr (exp0
);
7482 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7483 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7488 /* Return a MEM that contains constant EXP. DEFER is as for
7489 output_constant_def and MODIFIER is as for expand_expr. */
7492 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7496 mem
= output_constant_def (exp
, defer
);
7497 if (modifier
!= EXPAND_INITIALIZER
)
7498 mem
= use_anchored_address (mem
);
7502 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7503 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7506 expand_expr_addr_expr_1 (tree exp
, rtx target
, enum machine_mode tmode
,
7507 enum expand_modifier modifier
, addr_space_t as
)
7509 rtx result
, subtarget
;
7511 HOST_WIDE_INT bitsize
, bitpos
;
7512 int volatilep
, unsignedp
;
7513 enum machine_mode mode1
;
7515 /* If we are taking the address of a constant and are at the top level,
7516 we have to use output_constant_def since we can't call force_const_mem
7518 /* ??? This should be considered a front-end bug. We should not be
7519 generating ADDR_EXPR of something that isn't an LVALUE. The only
7520 exception here is STRING_CST. */
7521 if (CONSTANT_CLASS_P (exp
))
7523 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7524 if (modifier
< EXPAND_SUM
)
7525 result
= force_operand (result
, target
);
7529 /* Everything must be something allowed by is_gimple_addressable. */
7530 switch (TREE_CODE (exp
))
7533 /* This case will happen via recursion for &a->b. */
7534 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7538 tree tem
= TREE_OPERAND (exp
, 0);
7539 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7540 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7541 return expand_expr (tem
, target
, tmode
, modifier
);
7545 /* Expand the initializer like constants above. */
7546 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7548 if (modifier
< EXPAND_SUM
)
7549 result
= force_operand (result
, target
);
7553 /* The real part of the complex number is always first, therefore
7554 the address is the same as the address of the parent object. */
7557 inner
= TREE_OPERAND (exp
, 0);
7561 /* The imaginary part of the complex number is always second.
7562 The expression is therefore always offset by the size of the
7565 bitpos
= GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)));
7566 inner
= TREE_OPERAND (exp
, 0);
7569 case COMPOUND_LITERAL_EXPR
:
7570 /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g.
7571 rtl_for_decl_init is called on DECL_INITIAL with
7572 COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */
7573 if (modifier
== EXPAND_INITIALIZER
7574 && COMPOUND_LITERAL_EXPR_DECL (exp
))
7575 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7576 target
, tmode
, modifier
, as
);
7579 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7580 expand_expr, as that can have various side effects; LABEL_DECLs for
7581 example, may not have their DECL_RTL set yet. Expand the rtl of
7582 CONSTRUCTORs too, which should yield a memory reference for the
7583 constructor's contents. Assume language specific tree nodes can
7584 be expanded in some interesting way. */
7585 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7587 || TREE_CODE (exp
) == CONSTRUCTOR
7588 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7590 result
= expand_expr (exp
, target
, tmode
,
7591 modifier
== EXPAND_INITIALIZER
7592 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7594 /* If the DECL isn't in memory, then the DECL wasn't properly
7595 marked TREE_ADDRESSABLE, which will be either a front-end
7596 or a tree optimizer bug. */
7598 if (TREE_ADDRESSABLE (exp
)
7600 && ! targetm
.calls
.allocate_stack_slots_for_args())
7602 error ("local frame unavailable (naked function?)");
7606 gcc_assert (MEM_P (result
));
7607 result
= XEXP (result
, 0);
7609 /* ??? Is this needed anymore? */
7611 TREE_USED (exp
) = 1;
7613 if (modifier
!= EXPAND_INITIALIZER
7614 && modifier
!= EXPAND_CONST_ADDRESS
7615 && modifier
!= EXPAND_SUM
)
7616 result
= force_operand (result
, target
);
7620 /* Pass FALSE as the last argument to get_inner_reference although
7621 we are expanding to RTL. The rationale is that we know how to
7622 handle "aligning nodes" here: we can just bypass them because
7623 they won't change the final object whose address will be returned
7624 (they actually exist only for that purpose). */
7625 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
,
7626 &mode1
, &unsignedp
, &volatilep
, false);
7630 /* We must have made progress. */
7631 gcc_assert (inner
!= exp
);
7633 subtarget
= offset
|| bitpos
? NULL_RTX
: target
;
7634 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7635 inner alignment, force the inner to be sufficiently aligned. */
7636 if (CONSTANT_CLASS_P (inner
)
7637 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7639 inner
= copy_node (inner
);
7640 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7641 TYPE_ALIGN (TREE_TYPE (inner
)) = TYPE_ALIGN (TREE_TYPE (exp
));
7642 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7644 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7650 if (modifier
!= EXPAND_NORMAL
)
7651 result
= force_operand (result
, NULL
);
7652 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7653 modifier
== EXPAND_INITIALIZER
7654 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7656 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7657 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7659 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7660 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7663 subtarget
= bitpos
? NULL_RTX
: target
;
7664 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7665 1, OPTAB_LIB_WIDEN
);
7671 /* Someone beforehand should have rejected taking the address
7672 of such an object. */
7673 gcc_assert ((bitpos
% BITS_PER_UNIT
) == 0);
7675 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7676 result
= plus_constant (tmode
, result
, bitpos
/ BITS_PER_UNIT
);
7677 if (modifier
< EXPAND_SUM
)
7678 result
= force_operand (result
, target
);
7684 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7685 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7688 expand_expr_addr_expr (tree exp
, rtx target
, enum machine_mode tmode
,
7689 enum expand_modifier modifier
)
7691 addr_space_t as
= ADDR_SPACE_GENERIC
;
7692 enum machine_mode address_mode
= Pmode
;
7693 enum machine_mode pointer_mode
= ptr_mode
;
7694 enum machine_mode rmode
;
7697 /* Target mode of VOIDmode says "whatever's natural". */
7698 if (tmode
== VOIDmode
)
7699 tmode
= TYPE_MODE (TREE_TYPE (exp
));
7701 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
7703 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
7704 address_mode
= targetm
.addr_space
.address_mode (as
);
7705 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
7708 /* We can get called with some Weird Things if the user does silliness
7709 like "(short) &a". In that case, convert_memory_address won't do
7710 the right thing, so ignore the given target mode. */
7711 if (tmode
!= address_mode
&& tmode
!= pointer_mode
)
7712 tmode
= address_mode
;
7714 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
7715 tmode
, modifier
, as
);
7717 /* Despite expand_expr claims concerning ignoring TMODE when not
7718 strictly convenient, stuff breaks if we don't honor it. Note
7719 that combined with the above, we only do this for pointer modes. */
7720 rmode
= GET_MODE (result
);
7721 if (rmode
== VOIDmode
)
7724 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7729 /* Generate code for computing CONSTRUCTOR EXP.
7730 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7731 is TRUE, instead of creating a temporary variable in memory
7732 NULL is returned and the caller needs to handle it differently. */
7735 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
7736 bool avoid_temp_mem
)
7738 tree type
= TREE_TYPE (exp
);
7739 enum machine_mode mode
= TYPE_MODE (type
);
7741 /* Try to avoid creating a temporary at all. This is possible
7742 if all of the initializer is zero.
7743 FIXME: try to handle all [0..255] initializers we can handle
7745 if (TREE_STATIC (exp
)
7746 && !TREE_ADDRESSABLE (exp
)
7747 && target
!= 0 && mode
== BLKmode
7748 && all_zeros_p (exp
))
7750 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7754 /* All elts simple constants => refer to a constant in memory. But
7755 if this is a non-BLKmode mode, let it store a field at a time
7756 since that should make a CONST_INT or CONST_DOUBLE when we
7757 fold. Likewise, if we have a target we can use, it is best to
7758 store directly into the target unless the type is large enough
7759 that memcpy will be used. If we are making an initializer and
7760 all operands are constant, put it in memory as well.
7762 FIXME: Avoid trying to fill vector constructors piece-meal.
7763 Output them with output_constant_def below unless we're sure
7764 they're zeros. This should go away when vector initializers
7765 are treated like VECTOR_CST instead of arrays. */
7766 if ((TREE_STATIC (exp
)
7767 && ((mode
== BLKmode
7768 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
7769 || TREE_ADDRESSABLE (exp
)
7770 || (host_integerp (TYPE_SIZE_UNIT (type
), 1)
7771 && (! MOVE_BY_PIECES_P
7772 (tree_low_cst (TYPE_SIZE_UNIT (type
), 1),
7774 && ! mostly_zeros_p (exp
))))
7775 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
7776 && TREE_CONSTANT (exp
)))
7783 constructor
= expand_expr_constant (exp
, 1, modifier
);
7785 if (modifier
!= EXPAND_CONST_ADDRESS
7786 && modifier
!= EXPAND_INITIALIZER
7787 && modifier
!= EXPAND_SUM
)
7788 constructor
= validize_mem (constructor
);
7793 /* Handle calls that pass values in multiple non-contiguous
7794 locations. The Irix 6 ABI has examples of this. */
7795 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
7796 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
7802 = assign_temp (build_qualified_type (type
, (TYPE_QUALS (type
)
7803 | (TREE_READONLY (exp
)
7804 * TYPE_QUAL_CONST
))),
7805 TREE_ADDRESSABLE (exp
), 1);
7808 store_constructor (exp
, target
, 0, int_expr_size (exp
));
7813 /* expand_expr: generate code for computing expression EXP.
7814 An rtx for the computed value is returned. The value is never null.
7815 In the case of a void EXP, const0_rtx is returned.
7817 The value may be stored in TARGET if TARGET is nonzero.
7818 TARGET is just a suggestion; callers must assume that
7819 the rtx returned may not be the same as TARGET.
7821 If TARGET is CONST0_RTX, it means that the value will be ignored.
7823 If TMODE is not VOIDmode, it suggests generating the
7824 result in mode TMODE. But this is done only when convenient.
7825 Otherwise, TMODE is ignored and the value generated in its natural mode.
7826 TMODE is just a suggestion; callers must assume that
7827 the rtx returned may not have mode TMODE.
7829 Note that TARGET may have neither TMODE nor MODE. In that case, it
7830 probably will not be used.
7832 If MODIFIER is EXPAND_SUM then when EXP is an addition
7833 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7834 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7835 products as above, or REG or MEM, or constant.
7836 Ordinarily in such cases we would output mul or add instructions
7837 and then return a pseudo reg containing the sum.
7839 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7840 it also marks a label as absolutely required (it can't be dead).
7841 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7842 This is used for outputting expressions used in initializers.
7844 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7845 with a constant address even if that address is not normally legitimate.
7846 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7848 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7849 a call parameter. Such targets require special care as we haven't yet
7850 marked TARGET so that it's safe from being trashed by libcalls. We
7851 don't want to use TARGET for anything but the final result;
7852 Intermediate values must go elsewhere. Additionally, calls to
7853 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7855 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7856 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7857 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7858 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7862 expand_expr_real (tree exp
, rtx target
, enum machine_mode tmode
,
7863 enum expand_modifier modifier
, rtx
*alt_rtl
)
7867 /* Handle ERROR_MARK before anybody tries to access its type. */
7868 if (TREE_CODE (exp
) == ERROR_MARK
7869 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
7871 ret
= CONST0_RTX (tmode
);
7872 return ret
? ret
: const0_rtx
;
7875 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
);
7879 /* Try to expand the conditional expression which is represented by
7880 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7881 return the rtl reg which repsents the result. Otherwise return
7885 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
7886 tree treeop1 ATTRIBUTE_UNUSED
,
7887 tree treeop2 ATTRIBUTE_UNUSED
)
7889 #ifdef HAVE_conditional_move
7891 rtx op00
, op01
, op1
, op2
;
7892 enum rtx_code comparison_code
;
7893 enum machine_mode comparison_mode
;
7896 tree type
= TREE_TYPE (treeop1
);
7897 int unsignedp
= TYPE_UNSIGNED (type
);
7898 enum machine_mode mode
= TYPE_MODE (type
);
7899 enum machine_mode orig_mode
= mode
;
7901 /* If we cannot do a conditional move on the mode, try doing it
7902 with the promoted mode. */
7903 if (!can_conditionally_move_p (mode
))
7905 mode
= promote_mode (type
, mode
, &unsignedp
);
7906 if (!can_conditionally_move_p (mode
))
7908 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
7911 temp
= assign_temp (type
, 0, 1);
7914 expand_operands (treeop1
, treeop2
,
7915 temp
, &op1
, &op2
, EXPAND_NORMAL
);
7917 if (TREE_CODE (treeop0
) == SSA_NAME
7918 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
7920 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
7921 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
7922 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
7923 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
7924 comparison_mode
= TYPE_MODE (type
);
7925 unsignedp
= TYPE_UNSIGNED (type
);
7926 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
7928 else if (TREE_CODE_CLASS (TREE_CODE (treeop0
)) == tcc_comparison
)
7930 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
7931 enum tree_code cmpcode
= TREE_CODE (treeop0
);
7932 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
7933 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
7934 unsignedp
= TYPE_UNSIGNED (type
);
7935 comparison_mode
= TYPE_MODE (type
);
7936 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
7940 op00
= expand_normal (treeop0
);
7942 comparison_code
= NE
;
7943 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
7946 if (GET_MODE (op1
) != mode
)
7947 op1
= gen_lowpart (mode
, op1
);
7949 if (GET_MODE (op2
) != mode
)
7950 op2
= gen_lowpart (mode
, op2
);
7952 /* Try to emit the conditional move. */
7953 insn
= emit_conditional_move (temp
, comparison_code
,
7954 op00
, op01
, comparison_mode
,
7958 /* If we could do the conditional move, emit the sequence,
7962 rtx seq
= get_insns ();
7965 return convert_modes (orig_mode
, mode
, temp
, 0);
7968 /* Otherwise discard the sequence and fall back to code with
7976 expand_expr_real_2 (sepops ops
, rtx target
, enum machine_mode tmode
,
7977 enum expand_modifier modifier
)
7979 rtx op0
, op1
, op2
, temp
;
7982 enum machine_mode mode
;
7983 enum tree_code code
= ops
->code
;
7985 rtx subtarget
, original_target
;
7987 bool reduce_bit_field
;
7988 location_t loc
= ops
->location
;
7989 tree treeop0
, treeop1
, treeop2
;
7990 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7991 ? reduce_to_bit_field_precision ((expr), \
7997 mode
= TYPE_MODE (type
);
7998 unsignedp
= TYPE_UNSIGNED (type
);
8004 /* We should be called only on simple (binary or unary) expressions,
8005 exactly those that are valid in gimple expressions that aren't
8006 GIMPLE_SINGLE_RHS (or invalid). */
8007 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8008 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8009 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8011 ignore
= (target
== const0_rtx
8012 || ((CONVERT_EXPR_CODE_P (code
)
8013 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8014 && TREE_CODE (type
) == VOID_TYPE
));
8016 /* We should be called only if we need the result. */
8017 gcc_assert (!ignore
);
8019 /* An operation in what may be a bit-field type needs the
8020 result to be reduced to the precision of the bit-field type,
8021 which is narrower than that of the type's mode. */
8022 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8023 && GET_MODE_PRECISION (mode
) > TYPE_PRECISION (type
));
8025 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8028 /* Use subtarget as the target for operand 0 of a binary operation. */
8029 subtarget
= get_subtarget (target
);
8030 original_target
= target
;
8034 case NON_LVALUE_EXPR
:
8037 if (treeop0
== error_mark_node
)
8040 if (TREE_CODE (type
) == UNION_TYPE
)
8042 tree valtype
= TREE_TYPE (treeop0
);
8044 /* If both input and output are BLKmode, this conversion isn't doing
8045 anything except possibly changing memory attribute. */
8046 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8048 rtx result
= expand_expr (treeop0
, target
, tmode
,
8051 result
= copy_rtx (result
);
8052 set_mem_attributes (result
, type
, 0);
8058 if (TYPE_MODE (type
) != BLKmode
)
8059 target
= gen_reg_rtx (TYPE_MODE (type
));
8061 target
= assign_temp (type
, 1, 1);
8065 /* Store data into beginning of memory target. */
8066 store_expr (treeop0
,
8067 adjust_address (target
, TYPE_MODE (valtype
), 0),
8068 modifier
== EXPAND_STACK_PARM
,
8073 gcc_assert (REG_P (target
));
8075 /* Store this field into a union of the proper type. */
8076 store_field (target
,
8077 MIN ((int_size_in_bytes (TREE_TYPE
8080 (HOST_WIDE_INT
) GET_MODE_BITSIZE (mode
)),
8081 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0, false);
8084 /* Return the entire union. */
8088 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8090 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8093 /* If the signedness of the conversion differs and OP0 is
8094 a promoted SUBREG, clear that indication since we now
8095 have to do the proper extension. */
8096 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8097 && GET_CODE (op0
) == SUBREG
)
8098 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8100 return REDUCE_BIT_FIELD (op0
);
8103 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8104 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8105 if (GET_MODE (op0
) == mode
)
8108 /* If OP0 is a constant, just convert it into the proper mode. */
8109 else if (CONSTANT_P (op0
))
8111 tree inner_type
= TREE_TYPE (treeop0
);
8112 enum machine_mode inner_mode
= GET_MODE (op0
);
8114 if (inner_mode
== VOIDmode
)
8115 inner_mode
= TYPE_MODE (inner_type
);
8117 if (modifier
== EXPAND_INITIALIZER
)
8118 op0
= simplify_gen_subreg (mode
, op0
, inner_mode
,
8119 subreg_lowpart_offset (mode
,
8122 op0
= convert_modes (mode
, inner_mode
, op0
,
8123 TYPE_UNSIGNED (inner_type
));
8126 else if (modifier
== EXPAND_INITIALIZER
)
8127 op0
= gen_rtx_fmt_e (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8129 else if (target
== 0)
8130 op0
= convert_to_mode (mode
, op0
,
8131 TYPE_UNSIGNED (TREE_TYPE
8135 convert_move (target
, op0
,
8136 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8140 return REDUCE_BIT_FIELD (op0
);
8142 case ADDR_SPACE_CONVERT_EXPR
:
8144 tree treeop0_type
= TREE_TYPE (treeop0
);
8146 addr_space_t as_from
;
8148 gcc_assert (POINTER_TYPE_P (type
));
8149 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8151 as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8152 as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8154 /* Conversions between pointers to the same address space should
8155 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8156 gcc_assert (as_to
!= as_from
);
8158 /* Ask target code to handle conversion between pointers
8159 to overlapping address spaces. */
8160 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8161 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8163 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8164 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8169 /* For disjoint address spaces, converting anything but
8170 a null pointer invokes undefined behaviour. We simply
8171 always return a null pointer here. */
8172 return CONST0_RTX (mode
);
8175 case POINTER_PLUS_EXPR
:
8176 /* Even though the sizetype mode and the pointer's mode can be different
8177 expand is able to handle this correctly and get the correct result out
8178 of the PLUS_EXPR code. */
8179 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8180 if sizetype precision is smaller than pointer precision. */
8181 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8182 treeop1
= fold_convert_loc (loc
, type
,
8183 fold_convert_loc (loc
, ssizetype
,
8185 /* If sizetype precision is larger than pointer precision, truncate the
8186 offset to have matching modes. */
8187 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8188 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8191 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8192 something else, make sure we add the register to the constant and
8193 then to the other thing. This case can occur during strength
8194 reduction and doing it this way will produce better code if the
8195 frame pointer or argument pointer is eliminated.
8197 fold-const.c will ensure that the constant is always in the inner
8198 PLUS_EXPR, so the only case we need to do anything about is if
8199 sp, ap, or fp is our second argument, in which case we must swap
8200 the innermost first argument and our second argument. */
8202 if (TREE_CODE (treeop0
) == PLUS_EXPR
8203 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8204 && TREE_CODE (treeop1
) == VAR_DECL
8205 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8206 || DECL_RTL (treeop1
) == stack_pointer_rtx
8207 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8212 /* If the result is to be ptr_mode and we are adding an integer to
8213 something, we might be forming a constant. So try to use
8214 plus_constant. If it produces a sum and we can't accept it,
8215 use force_operand. This allows P = &ARR[const] to generate
8216 efficient code on machines where a SYMBOL_REF is not a valid
8219 If this is an EXPAND_SUM call, always return the sum. */
8220 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8221 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8223 if (modifier
== EXPAND_STACK_PARM
)
8225 if (TREE_CODE (treeop0
) == INTEGER_CST
8226 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8227 && TREE_CONSTANT (treeop1
))
8231 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8233 /* Use immed_double_const to ensure that the constant is
8234 truncated according to the mode of OP1, then sign extended
8235 to a HOST_WIDE_INT. Using the constant directly can result
8236 in non-canonical RTL in a 64x32 cross compile. */
8238 = immed_double_const (TREE_INT_CST_LOW (treeop0
),
8240 TYPE_MODE (TREE_TYPE (treeop1
)));
8241 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8242 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8243 op1
= force_operand (op1
, target
);
8244 return REDUCE_BIT_FIELD (op1
);
8247 else if (TREE_CODE (treeop1
) == INTEGER_CST
8248 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8249 && TREE_CONSTANT (treeop0
))
8253 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8254 (modifier
== EXPAND_INITIALIZER
8255 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8256 if (! CONSTANT_P (op0
))
8258 op1
= expand_expr (treeop1
, NULL_RTX
,
8259 VOIDmode
, modifier
);
8260 /* Return a PLUS if modifier says it's OK. */
8261 if (modifier
== EXPAND_SUM
8262 || modifier
== EXPAND_INITIALIZER
)
8263 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8266 /* Use immed_double_const to ensure that the constant is
8267 truncated according to the mode of OP1, then sign extended
8268 to a HOST_WIDE_INT. Using the constant directly can result
8269 in non-canonical RTL in a 64x32 cross compile. */
8271 = immed_double_const (TREE_INT_CST_LOW (treeop1
),
8273 TYPE_MODE (TREE_TYPE (treeop0
)));
8274 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8275 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8276 op0
= force_operand (op0
, target
);
8277 return REDUCE_BIT_FIELD (op0
);
8281 /* Use TER to expand pointer addition of a negated value
8282 as pointer subtraction. */
8283 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8284 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8285 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8286 && TREE_CODE (treeop1
) == SSA_NAME
8287 && TYPE_MODE (TREE_TYPE (treeop0
))
8288 == TYPE_MODE (TREE_TYPE (treeop1
)))
8290 gimple def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8293 treeop1
= gimple_assign_rhs1 (def
);
8299 /* No sense saving up arithmetic to be done
8300 if it's all in the wrong mode to form part of an address.
8301 And force_operand won't know whether to sign-extend or
8303 if ((modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8304 || mode
!= ptr_mode
)
8306 expand_operands (treeop0
, treeop1
,
8307 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8308 if (op0
== const0_rtx
)
8310 if (op1
== const0_rtx
)
8315 expand_operands (treeop0
, treeop1
,
8316 subtarget
, &op0
, &op1
, modifier
);
8317 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8321 /* For initializers, we are allowed to return a MINUS of two
8322 symbolic constants. Here we handle all cases when both operands
8324 /* Handle difference of two symbolic constants,
8325 for the sake of an initializer. */
8326 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8327 && really_constant_p (treeop0
)
8328 && really_constant_p (treeop1
))
8330 expand_operands (treeop0
, treeop1
,
8331 NULL_RTX
, &op0
, &op1
, modifier
);
8333 /* If the last operand is a CONST_INT, use plus_constant of
8334 the negated constant. Else make the MINUS. */
8335 if (CONST_INT_P (op1
))
8336 return REDUCE_BIT_FIELD (plus_constant (mode
, op0
,
8339 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode
, op0
, op1
));
8342 /* No sense saving up arithmetic to be done
8343 if it's all in the wrong mode to form part of an address.
8344 And force_operand won't know whether to sign-extend or
8346 if ((modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8347 || mode
!= ptr_mode
)
8350 expand_operands (treeop0
, treeop1
,
8351 subtarget
, &op0
, &op1
, modifier
);
8353 /* Convert A - const to A + (-const). */
8354 if (CONST_INT_P (op1
))
8356 op1
= negate_rtx (mode
, op1
);
8357 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8362 case WIDEN_MULT_PLUS_EXPR
:
8363 case WIDEN_MULT_MINUS_EXPR
:
8364 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8365 op2
= expand_normal (treeop2
);
8366 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8370 case WIDEN_MULT_EXPR
:
8371 /* If first operand is constant, swap them.
8372 Thus the following special case checks need only
8373 check the second operand. */
8374 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8381 /* First, check if we have a multiplication of one signed and one
8382 unsigned operand. */
8383 if (TREE_CODE (treeop1
) != INTEGER_CST
8384 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8385 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8387 enum machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8388 this_optab
= usmul_widen_optab
;
8389 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8390 != CODE_FOR_nothing
)
8392 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8393 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8396 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8398 /* op0 and op1 might still be constant, despite the above
8399 != INTEGER_CST check. Handle it. */
8400 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8402 op0
= convert_modes (innermode
, mode
, op0
, true);
8403 op1
= convert_modes (innermode
, mode
, op1
, false);
8404 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8405 target
, unsignedp
));
8410 /* Check for a multiplication with matching signedness. */
8411 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8412 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8413 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8414 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8416 tree op0type
= TREE_TYPE (treeop0
);
8417 enum machine_mode innermode
= TYPE_MODE (op0type
);
8418 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8419 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8420 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8422 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8424 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8425 != CODE_FOR_nothing
)
8427 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8429 /* op0 and op1 might still be constant, despite the above
8430 != INTEGER_CST check. Handle it. */
8431 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8434 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8436 = convert_modes (innermode
, mode
, op1
,
8437 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8438 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8442 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8443 unsignedp
, this_optab
);
8444 return REDUCE_BIT_FIELD (temp
);
8446 if (find_widening_optab_handler (other_optab
, mode
, innermode
, 0)
8448 && innermode
== word_mode
)
8451 op0
= expand_normal (treeop0
);
8452 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8453 op1
= convert_modes (innermode
, mode
,
8454 expand_normal (treeop1
),
8455 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8457 op1
= expand_normal (treeop1
);
8458 /* op0 and op1 might still be constant, despite the above
8459 != INTEGER_CST check. Handle it. */
8460 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8461 goto widen_mult_const
;
8462 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8463 unsignedp
, OPTAB_LIB_WIDEN
);
8464 hipart
= gen_highpart (innermode
, temp
);
8465 htem
= expand_mult_highpart_adjust (innermode
, hipart
,
8469 emit_move_insn (hipart
, htem
);
8470 return REDUCE_BIT_FIELD (temp
);
8474 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8475 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8476 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8477 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8481 optab opt
= fma_optab
;
8484 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8486 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8488 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8491 gcc_assert (fn
!= NULL_TREE
);
8492 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8493 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8496 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8497 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8502 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8505 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8506 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8509 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8512 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8515 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8518 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8522 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8524 op2
= expand_normal (treeop2
);
8525 op1
= expand_normal (treeop1
);
8527 return expand_ternary_op (TYPE_MODE (type
), opt
,
8528 op0
, op1
, op2
, target
, 0);
8532 /* If this is a fixed-point operation, then we cannot use the code
8533 below because "expand_mult" doesn't support sat/no-sat fixed-point
8535 if (ALL_FIXED_POINT_MODE_P (mode
))
8538 /* If first operand is constant, swap them.
8539 Thus the following special case checks need only
8540 check the second operand. */
8541 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8548 /* Attempt to return something suitable for generating an
8549 indexed address, for machines that support that. */
8551 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8552 && host_integerp (treeop1
, 0))
8554 tree exp1
= treeop1
;
8556 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8560 op0
= force_operand (op0
, NULL_RTX
);
8562 op0
= copy_to_mode_reg (mode
, op0
);
8564 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8565 gen_int_mode (tree_low_cst (exp1
, 0),
8566 TYPE_MODE (TREE_TYPE (exp1
)))));
8569 if (modifier
== EXPAND_STACK_PARM
)
8572 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8573 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8575 case TRUNC_DIV_EXPR
:
8576 case FLOOR_DIV_EXPR
:
8578 case ROUND_DIV_EXPR
:
8579 case EXACT_DIV_EXPR
:
8580 /* If this is a fixed-point operation, then we cannot use the code
8581 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8583 if (ALL_FIXED_POINT_MODE_P (mode
))
8586 if (modifier
== EXPAND_STACK_PARM
)
8588 /* Possible optimization: compute the dividend with EXPAND_SUM
8589 then if the divisor is constant can optimize the case
8590 where some terms of the dividend have coeffs divisible by it. */
8591 expand_operands (treeop0
, treeop1
,
8592 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8593 return expand_divmod (0, code
, mode
, op0
, op1
, target
, unsignedp
);
8598 case MULT_HIGHPART_EXPR
:
8599 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8600 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8604 case TRUNC_MOD_EXPR
:
8605 case FLOOR_MOD_EXPR
:
8607 case ROUND_MOD_EXPR
:
8608 if (modifier
== EXPAND_STACK_PARM
)
8610 expand_operands (treeop0
, treeop1
,
8611 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8612 return expand_divmod (1, code
, mode
, op0
, op1
, target
, unsignedp
);
8614 case FIXED_CONVERT_EXPR
:
8615 op0
= expand_normal (treeop0
);
8616 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8617 target
= gen_reg_rtx (mode
);
8619 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8620 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8621 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8622 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8624 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8627 case FIX_TRUNC_EXPR
:
8628 op0
= expand_normal (treeop0
);
8629 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8630 target
= gen_reg_rtx (mode
);
8631 expand_fix (target
, op0
, unsignedp
);
8635 op0
= expand_normal (treeop0
);
8636 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8637 target
= gen_reg_rtx (mode
);
8638 /* expand_float can't figure out what to do if FROM has VOIDmode.
8639 So give it the correct mode. With -O, cse will optimize this. */
8640 if (GET_MODE (op0
) == VOIDmode
)
8641 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8643 expand_float (target
, op0
,
8644 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8648 op0
= expand_expr (treeop0
, subtarget
,
8649 VOIDmode
, EXPAND_NORMAL
);
8650 if (modifier
== EXPAND_STACK_PARM
)
8652 temp
= expand_unop (mode
,
8653 optab_for_tree_code (NEGATE_EXPR
, type
,
8657 return REDUCE_BIT_FIELD (temp
);
8660 op0
= expand_expr (treeop0
, subtarget
,
8661 VOIDmode
, EXPAND_NORMAL
);
8662 if (modifier
== EXPAND_STACK_PARM
)
8665 /* ABS_EXPR is not valid for complex arguments. */
8666 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8667 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8669 /* Unsigned abs is simply the operand. Testing here means we don't
8670 risk generating incorrect code below. */
8671 if (TYPE_UNSIGNED (type
))
8674 return expand_abs (mode
, op0
, target
, unsignedp
,
8675 safe_from_p (target
, treeop0
, 1));
8679 target
= original_target
;
8681 || modifier
== EXPAND_STACK_PARM
8682 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
8683 || GET_MODE (target
) != mode
8685 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
8686 target
= gen_reg_rtx (mode
);
8687 expand_operands (treeop0
, treeop1
,
8688 target
, &op0
, &op1
, EXPAND_NORMAL
);
8690 /* First try to do it with a special MIN or MAX instruction.
8691 If that does not win, use a conditional jump to select the proper
8693 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8694 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
8699 /* At this point, a MEM target is no longer useful; we will get better
8702 if (! REG_P (target
))
8703 target
= gen_reg_rtx (mode
);
8705 /* If op1 was placed in target, swap op0 and op1. */
8706 if (target
!= op0
&& target
== op1
)
8713 /* We generate better code and avoid problems with op1 mentioning
8714 target by forcing op1 into a pseudo if it isn't a constant. */
8715 if (! CONSTANT_P (op1
))
8716 op1
= force_reg (mode
, op1
);
8719 enum rtx_code comparison_code
;
8722 if (code
== MAX_EXPR
)
8723 comparison_code
= unsignedp
? GEU
: GE
;
8725 comparison_code
= unsignedp
? LEU
: LE
;
8727 /* Canonicalize to comparisons against 0. */
8728 if (op1
== const1_rtx
)
8730 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8731 or (a != 0 ? a : 1) for unsigned.
8732 For MIN we are safe converting (a <= 1 ? a : 1)
8733 into (a <= 0 ? a : 1) */
8734 cmpop1
= const0_rtx
;
8735 if (code
== MAX_EXPR
)
8736 comparison_code
= unsignedp
? NE
: GT
;
8738 if (op1
== constm1_rtx
&& !unsignedp
)
8740 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8741 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8742 cmpop1
= const0_rtx
;
8743 if (code
== MIN_EXPR
)
8744 comparison_code
= LT
;
8746 #ifdef HAVE_conditional_move
8747 /* Use a conditional move if possible. */
8748 if (can_conditionally_move_p (mode
))
8752 /* ??? Same problem as in expmed.c: emit_conditional_move
8753 forces a stack adjustment via compare_from_rtx, and we
8754 lose the stack adjustment if the sequence we are about
8755 to create is discarded. */
8756 do_pending_stack_adjust ();
8760 /* Try to emit the conditional move. */
8761 insn
= emit_conditional_move (target
, comparison_code
,
8766 /* If we could do the conditional move, emit the sequence,
8770 rtx seq
= get_insns ();
8776 /* Otherwise discard the sequence and fall back to code with
8782 emit_move_insn (target
, op0
);
8784 temp
= gen_label_rtx ();
8785 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
8786 unsignedp
, mode
, NULL_RTX
, NULL_RTX
, temp
,
8789 emit_move_insn (target
, op1
);
8794 op0
= expand_expr (treeop0
, subtarget
,
8795 VOIDmode
, EXPAND_NORMAL
);
8796 if (modifier
== EXPAND_STACK_PARM
)
8798 /* In case we have to reduce the result to bitfield precision
8799 for unsigned bitfield expand this as XOR with a proper constant
8801 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
8802 temp
= expand_binop (mode
, xor_optab
, op0
,
8803 immed_double_int_const
8804 (double_int::mask (TYPE_PRECISION (type
)), mode
),
8805 target
, 1, OPTAB_LIB_WIDEN
);
8807 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
8811 /* ??? Can optimize bitwise operations with one arg constant.
8812 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8813 and (a bitwise1 b) bitwise2 b (etc)
8814 but that is probably not worth while. */
8823 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
8824 || (GET_MODE_PRECISION (TYPE_MODE (type
))
8825 == TYPE_PRECISION (type
)));
8830 /* If this is a fixed-point operation, then we cannot use the code
8831 below because "expand_shift" doesn't support sat/no-sat fixed-point
8833 if (ALL_FIXED_POINT_MODE_P (mode
))
8836 if (! safe_from_p (subtarget
, treeop1
, 1))
8838 if (modifier
== EXPAND_STACK_PARM
)
8840 op0
= expand_expr (treeop0
, subtarget
,
8841 VOIDmode
, EXPAND_NORMAL
);
8842 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
8844 if (code
== LSHIFT_EXPR
)
8845 temp
= REDUCE_BIT_FIELD (temp
);
8848 /* Could determine the answer when only additive constants differ. Also,
8849 the addition of one can be handled by changing the condition. */
8856 case UNORDERED_EXPR
:
8864 temp
= do_store_flag (ops
,
8865 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
8866 tmode
!= VOIDmode
? tmode
: mode
);
8870 /* Use a compare and a jump for BLKmode comparisons, or for function
8871 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8874 || modifier
== EXPAND_STACK_PARM
8875 || ! safe_from_p (target
, treeop0
, 1)
8876 || ! safe_from_p (target
, treeop1
, 1)
8877 /* Make sure we don't have a hard reg (such as function's return
8878 value) live across basic blocks, if not optimizing. */
8879 || (!optimize
&& REG_P (target
)
8880 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
8881 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
8883 emit_move_insn (target
, const0_rtx
);
8885 op1
= gen_label_rtx ();
8886 jumpifnot_1 (code
, treeop0
, treeop1
, op1
, -1);
8888 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
8889 emit_move_insn (target
, constm1_rtx
);
8891 emit_move_insn (target
, const1_rtx
);
8897 /* Get the rtx code of the operands. */
8898 op0
= expand_normal (treeop0
);
8899 op1
= expand_normal (treeop1
);
8902 target
= gen_reg_rtx (TYPE_MODE (type
));
8904 /* If target overlaps with op1, then either we need to force
8905 op1 into a pseudo (if target also overlaps with op0),
8906 or write the complex parts in reverse order. */
8907 switch (GET_CODE (target
))
8910 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
8912 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
8914 complex_expr_force_op1
:
8915 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
8916 emit_move_insn (temp
, op1
);
8920 complex_expr_swap_order
:
8921 /* Move the imaginary (op1) and real (op0) parts to their
8923 write_complex_part (target
, op1
, true);
8924 write_complex_part (target
, op0
, false);
8930 temp
= adjust_address_nv (target
,
8931 GET_MODE_INNER (GET_MODE (target
)), 0);
8932 if (reg_overlap_mentioned_p (temp
, op1
))
8934 enum machine_mode imode
= GET_MODE_INNER (GET_MODE (target
));
8935 temp
= adjust_address_nv (target
, imode
,
8936 GET_MODE_SIZE (imode
));
8937 if (reg_overlap_mentioned_p (temp
, op0
))
8938 goto complex_expr_force_op1
;
8939 goto complex_expr_swap_order
;
8943 if (reg_overlap_mentioned_p (target
, op1
))
8945 if (reg_overlap_mentioned_p (target
, op0
))
8946 goto complex_expr_force_op1
;
8947 goto complex_expr_swap_order
;
8952 /* Move the real (op0) and imaginary (op1) parts to their location. */
8953 write_complex_part (target
, op0
, false);
8954 write_complex_part (target
, op1
, true);
8958 case WIDEN_SUM_EXPR
:
8960 tree oprnd0
= treeop0
;
8961 tree oprnd1
= treeop1
;
8963 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8964 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
8969 case REDUC_MAX_EXPR
:
8970 case REDUC_MIN_EXPR
:
8971 case REDUC_PLUS_EXPR
:
8973 op0
= expand_normal (treeop0
);
8974 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8975 temp
= expand_unop (mode
, this_optab
, op0
, target
, unsignedp
);
8980 case VEC_LSHIFT_EXPR
:
8981 case VEC_RSHIFT_EXPR
:
8983 target
= expand_vec_shift_expr (ops
, target
);
8987 case VEC_UNPACK_HI_EXPR
:
8988 case VEC_UNPACK_LO_EXPR
:
8990 op0
= expand_normal (treeop0
);
8991 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
8997 case VEC_UNPACK_FLOAT_HI_EXPR
:
8998 case VEC_UNPACK_FLOAT_LO_EXPR
:
9000 op0
= expand_normal (treeop0
);
9001 /* The signedness is determined from input operand. */
9002 temp
= expand_widen_pattern_expr
9003 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9004 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9010 case VEC_WIDEN_MULT_HI_EXPR
:
9011 case VEC_WIDEN_MULT_LO_EXPR
:
9012 case VEC_WIDEN_MULT_EVEN_EXPR
:
9013 case VEC_WIDEN_MULT_ODD_EXPR
:
9014 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9015 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9016 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9017 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9019 gcc_assert (target
);
9022 case VEC_PACK_TRUNC_EXPR
:
9023 case VEC_PACK_SAT_EXPR
:
9024 case VEC_PACK_FIX_TRUNC_EXPR
:
9025 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9029 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9030 op2
= expand_normal (treeop2
);
9032 /* Careful here: if the target doesn't support integral vector modes,
9033 a constant selection vector could wind up smooshed into a normal
9034 integral constant. */
9035 if (CONSTANT_P (op2
) && GET_CODE (op2
) != CONST_VECTOR
)
9037 tree sel_type
= TREE_TYPE (treeop2
);
9038 enum machine_mode vmode
9039 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type
)),
9040 TYPE_VECTOR_SUBPARTS (sel_type
));
9041 gcc_assert (GET_MODE_CLASS (vmode
) == MODE_VECTOR_INT
);
9042 op2
= simplify_subreg (vmode
, op2
, TYPE_MODE (sel_type
), 0);
9043 gcc_assert (op2
&& GET_CODE (op2
) == CONST_VECTOR
);
9046 gcc_assert (GET_MODE_CLASS (GET_MODE (op2
)) == MODE_VECTOR_INT
);
9048 temp
= expand_vec_perm (mode
, op0
, op1
, op2
, target
);
9054 tree oprnd0
= treeop0
;
9055 tree oprnd1
= treeop1
;
9056 tree oprnd2
= treeop2
;
9059 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9060 op2
= expand_normal (oprnd2
);
9061 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9066 case REALIGN_LOAD_EXPR
:
9068 tree oprnd0
= treeop0
;
9069 tree oprnd1
= treeop1
;
9070 tree oprnd2
= treeop2
;
9073 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9074 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9075 op2
= expand_normal (oprnd2
);
9076 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9083 /* A COND_EXPR with its type being VOID_TYPE represents a
9084 conditional jump and is handled in
9085 expand_gimple_cond_expr. */
9086 gcc_assert (!VOID_TYPE_P (type
));
9088 /* Note that COND_EXPRs whose type is a structure or union
9089 are required to be constructed to contain assignments of
9090 a temporary variable, so that we can evaluate them here
9091 for side effect only. If type is void, we must do likewise. */
9093 gcc_assert (!TREE_ADDRESSABLE (type
)
9095 && TREE_TYPE (treeop1
) != void_type_node
9096 && TREE_TYPE (treeop2
) != void_type_node
);
9098 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9102 /* If we are not to produce a result, we have no target. Otherwise,
9103 if a target was specified use it; it will not be used as an
9104 intermediate target unless it is safe. If no target, use a
9107 if (modifier
!= EXPAND_STACK_PARM
9109 && safe_from_p (original_target
, treeop0
, 1)
9110 && GET_MODE (original_target
) == mode
9111 && !MEM_P (original_target
))
9112 temp
= original_target
;
9114 temp
= assign_temp (type
, 0, 1);
9116 do_pending_stack_adjust ();
9118 op0
= gen_label_rtx ();
9119 op1
= gen_label_rtx ();
9120 jumpifnot (treeop0
, op0
, -1);
9121 store_expr (treeop1
, temp
,
9122 modifier
== EXPAND_STACK_PARM
,
9125 emit_jump_insn (gen_jump (op1
));
9128 store_expr (treeop2
, temp
,
9129 modifier
== EXPAND_STACK_PARM
,
9137 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9144 /* Here to do an ordinary binary operator. */
9146 expand_operands (treeop0
, treeop1
,
9147 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9149 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9151 if (modifier
== EXPAND_STACK_PARM
)
9153 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9154 unsignedp
, OPTAB_LIB_WIDEN
);
9156 /* Bitwise operations do not need bitfield reduction as we expect their
9157 operands being properly truncated. */
9158 if (code
== BIT_XOR_EXPR
9159 || code
== BIT_AND_EXPR
9160 || code
== BIT_IOR_EXPR
)
9162 return REDUCE_BIT_FIELD (temp
);
9164 #undef REDUCE_BIT_FIELD
9167 expand_expr_real_1 (tree exp
, rtx target
, enum machine_mode tmode
,
9168 enum expand_modifier modifier
, rtx
*alt_rtl
)
9170 rtx op0
, op1
, temp
, decl_rtl
;
9173 enum machine_mode mode
;
9174 enum tree_code code
= TREE_CODE (exp
);
9175 rtx subtarget
, original_target
;
9178 bool reduce_bit_field
;
9179 location_t loc
= EXPR_LOCATION (exp
);
9180 struct separate_ops ops
;
9181 tree treeop0
, treeop1
, treeop2
;
9182 tree ssa_name
= NULL_TREE
;
9185 type
= TREE_TYPE (exp
);
9186 mode
= TYPE_MODE (type
);
9187 unsignedp
= TYPE_UNSIGNED (type
);
9189 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9190 if (!VL_EXP_CLASS_P (exp
))
9191 switch (TREE_CODE_LENGTH (code
))
9194 case 3: treeop2
= TREE_OPERAND (exp
, 2);
9195 case 2: treeop1
= TREE_OPERAND (exp
, 1);
9196 case 1: treeop0
= TREE_OPERAND (exp
, 0);
9206 ignore
= (target
== const0_rtx
9207 || ((CONVERT_EXPR_CODE_P (code
)
9208 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9209 && TREE_CODE (type
) == VOID_TYPE
));
9211 /* An operation in what may be a bit-field type needs the
9212 result to be reduced to the precision of the bit-field type,
9213 which is narrower than that of the type's mode. */
9214 reduce_bit_field
= (!ignore
9215 && INTEGRAL_TYPE_P (type
)
9216 && GET_MODE_PRECISION (mode
) > TYPE_PRECISION (type
));
9218 /* If we are going to ignore this result, we need only do something
9219 if there is a side-effect somewhere in the expression. If there
9220 is, short-circuit the most common cases here. Note that we must
9221 not call expand_expr with anything but const0_rtx in case this
9222 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9226 if (! TREE_SIDE_EFFECTS (exp
))
9229 /* Ensure we reference a volatile object even if value is ignored, but
9230 don't do this if all we are doing is taking its address. */
9231 if (TREE_THIS_VOLATILE (exp
)
9232 && TREE_CODE (exp
) != FUNCTION_DECL
9233 && mode
!= VOIDmode
&& mode
!= BLKmode
9234 && modifier
!= EXPAND_CONST_ADDRESS
)
9236 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9242 if (TREE_CODE_CLASS (code
) == tcc_unary
9243 || code
== BIT_FIELD_REF
9244 || code
== COMPONENT_REF
9245 || code
== INDIRECT_REF
)
9246 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9249 else if (TREE_CODE_CLASS (code
) == tcc_binary
9250 || TREE_CODE_CLASS (code
) == tcc_comparison
9251 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9253 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9254 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9261 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9264 /* Use subtarget as the target for operand 0 of a binary operation. */
9265 subtarget
= get_subtarget (target
);
9266 original_target
= target
;
9272 tree function
= decl_function_context (exp
);
9274 temp
= label_rtx (exp
);
9275 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9277 if (function
!= current_function_decl
9279 LABEL_REF_NONLOCAL_P (temp
) = 1;
9281 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9286 /* ??? ivopts calls expander, without any preparation from
9287 out-of-ssa. So fake instructions as if this was an access to the
9288 base variable. This unnecessarily allocates a pseudo, see how we can
9289 reuse it, if partition base vars have it set already. */
9290 if (!currently_expanding_to_rtl
)
9292 tree var
= SSA_NAME_VAR (exp
);
9293 if (var
&& DECL_RTL_SET_P (var
))
9294 return DECL_RTL (var
);
9295 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9296 LAST_VIRTUAL_REGISTER
+ 1);
9299 g
= get_gimple_for_ssa_name (exp
);
9300 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9302 && modifier
== EXPAND_INITIALIZER
9303 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9304 && (optimize
|| DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9305 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9306 g
= SSA_NAME_DEF_STMT (exp
);
9310 location_t saved_loc
= curr_insn_location ();
9312 set_curr_insn_location (gimple_location (g
));
9313 r
= expand_expr_real (gimple_assign_rhs_to_tree (g
), target
,
9314 tmode
, modifier
, NULL
);
9315 set_curr_insn_location (saved_loc
);
9316 if (REG_P (r
) && !REG_EXPR (r
))
9317 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9322 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9323 exp
= SSA_NAME_VAR (ssa_name
);
9324 goto expand_decl_rtl
;
9328 /* If a static var's type was incomplete when the decl was written,
9329 but the type is complete now, lay out the decl now. */
9330 if (DECL_SIZE (exp
) == 0
9331 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9332 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9333 layout_decl (exp
, 0);
9335 /* ... fall through ... */
9339 decl_rtl
= DECL_RTL (exp
);
9341 gcc_assert (decl_rtl
);
9342 decl_rtl
= copy_rtx (decl_rtl
);
9343 /* Record writes to register variables. */
9344 if (modifier
== EXPAND_WRITE
9346 && HARD_REGISTER_P (decl_rtl
))
9347 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9348 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9350 /* Ensure variable marked as used even if it doesn't go through
9351 a parser. If it hasn't be used yet, write out an external
9353 TREE_USED (exp
) = 1;
9355 /* Show we haven't gotten RTL for this yet. */
9358 /* Variables inherited from containing functions should have
9359 been lowered by this point. */
9360 context
= decl_function_context (exp
);
9361 gcc_assert (SCOPE_FILE_SCOPE_P (context
)
9362 || context
== current_function_decl
9363 || TREE_STATIC (exp
)
9364 || DECL_EXTERNAL (exp
)
9365 /* ??? C++ creates functions that are not TREE_STATIC. */
9366 || TREE_CODE (exp
) == FUNCTION_DECL
);
9368 /* This is the case of an array whose size is to be determined
9369 from its initializer, while the initializer is still being parsed.
9370 ??? We aren't parsing while expanding anymore. */
9372 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9373 temp
= validize_mem (decl_rtl
);
9375 /* If DECL_RTL is memory, we are in the normal case and the
9376 address is not valid, get the address into a register. */
9378 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9381 *alt_rtl
= decl_rtl
;
9382 decl_rtl
= use_anchored_address (decl_rtl
);
9383 if (modifier
!= EXPAND_CONST_ADDRESS
9384 && modifier
!= EXPAND_SUM
9385 && !memory_address_addr_space_p (DECL_MODE (exp
),
9387 MEM_ADDR_SPACE (decl_rtl
)))
9388 temp
= replace_equiv_address (decl_rtl
,
9389 copy_rtx (XEXP (decl_rtl
, 0)));
9392 /* If we got something, return it. But first, set the alignment
9393 if the address is a register. */
9396 if (MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9397 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9402 /* If the mode of DECL_RTL does not match that of the decl,
9403 there are two cases: we are dealing with a BLKmode value
9404 that is returned in a register, or we are dealing with
9405 a promoted value. In the latter case, return a SUBREG
9406 of the wanted mode, but mark it so that we know that it
9407 was already extended. */
9408 if (REG_P (decl_rtl
)
9409 && DECL_MODE (exp
) != BLKmode
9410 && GET_MODE (decl_rtl
) != DECL_MODE (exp
))
9412 enum machine_mode pmode
;
9414 /* Get the signedness to be used for this variable. Ensure we get
9415 the same mode we got when the variable was declared. */
9416 if (code
== SSA_NAME
9417 && (g
= SSA_NAME_DEF_STMT (ssa_name
))
9418 && gimple_code (g
) == GIMPLE_CALL
)
9420 gcc_assert (!gimple_call_internal_p (g
));
9421 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9422 gimple_call_fntype (g
),
9426 pmode
= promote_decl_mode (exp
, &unsignedp
);
9427 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9429 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9430 SUBREG_PROMOTED_VAR_P (temp
) = 1;
9431 SUBREG_PROMOTED_UNSIGNED_SET (temp
, unsignedp
);
9438 temp
= immed_double_const (TREE_INT_CST_LOW (exp
),
9439 TREE_INT_CST_HIGH (exp
), mode
);
9445 tree tmp
= NULL_TREE
;
9446 if (GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
9447 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
9448 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FRACT
9449 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UFRACT
9450 || GET_MODE_CLASS (mode
) == MODE_VECTOR_ACCUM
9451 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UACCUM
)
9452 return const_vector_from_tree (exp
);
9453 if (GET_MODE_CLASS (mode
) == MODE_INT
)
9455 tree type_for_mode
= lang_hooks
.types
.type_for_mode (mode
, 1);
9457 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
, type_for_mode
, exp
);
9461 vec
<constructor_elt
, va_gc
> *v
;
9463 vec_alloc (v
, VECTOR_CST_NELTS (exp
));
9464 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
9465 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
9466 tmp
= build_constructor (type
, v
);
9468 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
9473 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
9476 /* If optimized, generate immediate CONST_DOUBLE
9477 which will be turned into memory by reload if necessary.
9479 We used to force a register so that loop.c could see it. But
9480 this does not allow gen_* patterns to perform optimizations with
9481 the constants. It also produces two insns in cases like "x = 1.0;".
9482 On most machines, floating-point constants are not permitted in
9483 many insns, so we'd end up copying it to a register in any case.
9485 Now, we do the copying in expand_binop, if appropriate. */
9486 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp
),
9487 TYPE_MODE (TREE_TYPE (exp
)));
9490 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
9491 TYPE_MODE (TREE_TYPE (exp
)));
9494 /* Handle evaluating a complex constant in a CONCAT target. */
9495 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
9497 enum machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
9500 rtarg
= XEXP (original_target
, 0);
9501 itarg
= XEXP (original_target
, 1);
9503 /* Move the real and imaginary parts separately. */
9504 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
9505 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
9508 emit_move_insn (rtarg
, op0
);
9510 emit_move_insn (itarg
, op1
);
9512 return original_target
;
9515 /* ... fall through ... */
9518 temp
= expand_expr_constant (exp
, 1, modifier
);
9520 /* temp contains a constant address.
9521 On RISC machines where a constant address isn't valid,
9522 make some insns to get that address into a register. */
9523 if (modifier
!= EXPAND_CONST_ADDRESS
9524 && modifier
!= EXPAND_INITIALIZER
9525 && modifier
!= EXPAND_SUM
9526 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
9527 MEM_ADDR_SPACE (temp
)))
9528 return replace_equiv_address (temp
,
9529 copy_rtx (XEXP (temp
, 0)));
9535 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
);
9537 if (!SAVE_EXPR_RESOLVED_P (exp
))
9539 /* We can indeed still hit this case, typically via builtin
9540 expanders calling save_expr immediately before expanding
9541 something. Assume this means that we only have to deal
9542 with non-BLKmode values. */
9543 gcc_assert (GET_MODE (ret
) != BLKmode
);
9545 val
= build_decl (curr_insn_location (),
9546 VAR_DECL
, NULL
, TREE_TYPE (exp
));
9547 DECL_ARTIFICIAL (val
) = 1;
9548 DECL_IGNORED_P (val
) = 1;
9550 TREE_OPERAND (exp
, 0) = treeop0
;
9551 SAVE_EXPR_RESOLVED_P (exp
) = 1;
9553 if (!CONSTANT_P (ret
))
9554 ret
= copy_to_reg (ret
);
9555 SET_DECL_RTL (val
, ret
);
9563 /* If we don't need the result, just ensure we evaluate any
9567 unsigned HOST_WIDE_INT idx
;
9570 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
9571 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
9576 return expand_constructor (exp
, target
, modifier
, false);
9578 case TARGET_MEM_REF
:
9581 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
9582 struct mem_address addr
;
9583 enum insn_code icode
;
9586 get_address_description (exp
, &addr
);
9587 op0
= addr_for_mem_ref (&addr
, as
, true);
9588 op0
= memory_address_addr_space (mode
, op0
, as
);
9589 temp
= gen_rtx_MEM (mode
, op0
);
9590 set_mem_attributes (temp
, exp
, 0);
9591 set_mem_addr_space (temp
, as
);
9592 align
= get_object_alignment (exp
);
9593 if (modifier
!= EXPAND_WRITE
9594 && modifier
!= EXPAND_MEMORY
9596 && align
< GET_MODE_ALIGNMENT (mode
)
9597 /* If the target does not have special handling for unaligned
9598 loads of mode then it can use regular moves for them. */
9599 && ((icode
= optab_handler (movmisalign_optab
, mode
))
9600 != CODE_FOR_nothing
))
9602 struct expand_operand ops
[2];
9604 /* We've already validated the memory, and we're creating a
9605 new pseudo destination. The predicates really can't fail,
9606 nor can the generator. */
9607 create_output_operand (&ops
[0], NULL_RTX
, mode
);
9608 create_fixed_operand (&ops
[1], temp
);
9609 expand_insn (icode
, 2, ops
);
9610 temp
= ops
[0].value
;
9618 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
9619 enum machine_mode address_mode
;
9620 tree base
= TREE_OPERAND (exp
, 0);
9622 enum insn_code icode
;
9624 /* Handle expansion of non-aliased memory with non-BLKmode. That
9625 might end up in a register. */
9626 if (mem_ref_refers_to_non_mem_p (exp
))
9628 HOST_WIDE_INT offset
= mem_ref_offset (exp
).low
;
9629 base
= TREE_OPERAND (base
, 0);
9631 && host_integerp (TYPE_SIZE (type
), 1)
9632 && (GET_MODE_BITSIZE (DECL_MODE (base
))
9633 == TREE_INT_CST_LOW (TYPE_SIZE (type
))))
9634 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
9635 target
, tmode
, modifier
);
9636 if (TYPE_MODE (type
) == BLKmode
)
9638 temp
= assign_stack_temp (DECL_MODE (base
),
9639 GET_MODE_SIZE (DECL_MODE (base
)));
9640 store_expr (base
, temp
, 0, false);
9641 temp
= adjust_address (temp
, BLKmode
, offset
);
9642 set_mem_size (temp
, int_size_in_bytes (type
));
9645 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
9646 bitsize_int (offset
* BITS_PER_UNIT
));
9647 return expand_expr (exp
, target
, tmode
, modifier
);
9649 address_mode
= targetm
.addr_space
.address_mode (as
);
9650 base
= TREE_OPERAND (exp
, 0);
9651 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
9653 tree mask
= gimple_assign_rhs2 (def_stmt
);
9654 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
9655 gimple_assign_rhs1 (def_stmt
), mask
);
9656 TREE_OPERAND (exp
, 0) = base
;
9658 align
= get_object_alignment (exp
);
9659 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
9660 op0
= memory_address_addr_space (address_mode
, op0
, as
);
9661 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
9664 = immed_double_int_const (mem_ref_offset (exp
), address_mode
);
9665 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
9667 op0
= memory_address_addr_space (mode
, op0
, as
);
9668 temp
= gen_rtx_MEM (mode
, op0
);
9669 set_mem_attributes (temp
, exp
, 0);
9670 set_mem_addr_space (temp
, as
);
9671 if (TREE_THIS_VOLATILE (exp
))
9672 MEM_VOLATILE_P (temp
) = 1;
9673 if (modifier
!= EXPAND_WRITE
9674 && modifier
!= EXPAND_MEMORY
9676 && align
< GET_MODE_ALIGNMENT (mode
))
9678 if ((icode
= optab_handler (movmisalign_optab
, mode
))
9679 != CODE_FOR_nothing
)
9681 struct expand_operand ops
[2];
9683 /* We've already validated the memory, and we're creating a
9684 new pseudo destination. The predicates really can't fail,
9685 nor can the generator. */
9686 create_output_operand (&ops
[0], NULL_RTX
, mode
);
9687 create_fixed_operand (&ops
[1], temp
);
9688 expand_insn (icode
, 2, ops
);
9689 temp
= ops
[0].value
;
9691 else if (SLOW_UNALIGNED_ACCESS (mode
, align
))
9692 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
9693 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
9694 true, (modifier
== EXPAND_STACK_PARM
9695 ? NULL_RTX
: target
),
9704 tree array
= treeop0
;
9705 tree index
= treeop1
;
9708 /* Fold an expression like: "foo"[2].
9709 This is not done in fold so it won't happen inside &.
9710 Don't fold if this is for wide characters since it's too
9711 difficult to do correctly and this is a very rare case. */
9713 if (modifier
!= EXPAND_CONST_ADDRESS
9714 && modifier
!= EXPAND_INITIALIZER
9715 && modifier
!= EXPAND_MEMORY
)
9717 tree t
= fold_read_from_constant_string (exp
);
9720 return expand_expr (t
, target
, tmode
, modifier
);
9723 /* If this is a constant index into a constant array,
9724 just get the value from the array. Handle both the cases when
9725 we have an explicit constructor and when our operand is a variable
9726 that was declared const. */
9728 if (modifier
!= EXPAND_CONST_ADDRESS
9729 && modifier
!= EXPAND_INITIALIZER
9730 && modifier
!= EXPAND_MEMORY
9731 && TREE_CODE (array
) == CONSTRUCTOR
9732 && ! TREE_SIDE_EFFECTS (array
)
9733 && TREE_CODE (index
) == INTEGER_CST
)
9735 unsigned HOST_WIDE_INT ix
;
9738 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
9740 if (tree_int_cst_equal (field
, index
))
9742 if (!TREE_SIDE_EFFECTS (value
))
9743 return expand_expr (fold (value
), target
, tmode
, modifier
);
9748 else if (optimize
>= 1
9749 && modifier
!= EXPAND_CONST_ADDRESS
9750 && modifier
!= EXPAND_INITIALIZER
9751 && modifier
!= EXPAND_MEMORY
9752 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
9753 && TREE_CODE (index
) == INTEGER_CST
9754 && (TREE_CODE (array
) == VAR_DECL
9755 || TREE_CODE (array
) == CONST_DECL
)
9756 && (init
= ctor_for_folding (array
)) != error_mark_node
)
9758 if (TREE_CODE (init
) == CONSTRUCTOR
)
9760 unsigned HOST_WIDE_INT ix
;
9763 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
9765 if (tree_int_cst_equal (field
, index
))
9767 if (TREE_SIDE_EFFECTS (value
))
9770 if (TREE_CODE (value
) == CONSTRUCTOR
)
9772 /* If VALUE is a CONSTRUCTOR, this
9773 optimization is only useful if
9774 this doesn't store the CONSTRUCTOR
9775 into memory. If it does, it is more
9776 efficient to just load the data from
9777 the array directly. */
9778 rtx ret
= expand_constructor (value
, target
,
9780 if (ret
== NULL_RTX
)
9785 expand_expr (fold (value
), target
, tmode
, modifier
);
9788 else if (TREE_CODE (init
) == STRING_CST
)
9790 tree low_bound
= array_ref_low_bound (exp
);
9791 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
9793 /* Optimize the special case of a zero lower bound.
9795 We convert the lower bound to sizetype to avoid problems
9796 with constant folding. E.g. suppose the lower bound is
9797 1 and its mode is QI. Without the conversion
9798 (ARRAY + (INDEX - (unsigned char)1))
9800 (ARRAY + (-(unsigned char)1) + INDEX)
9802 (ARRAY + 255 + INDEX). Oops! */
9803 if (!integer_zerop (low_bound
))
9804 index1
= size_diffop_loc (loc
, index1
,
9805 fold_convert_loc (loc
, sizetype
,
9808 if (compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
9810 tree type
= TREE_TYPE (TREE_TYPE (init
));
9811 enum machine_mode mode
= TYPE_MODE (type
);
9813 if (GET_MODE_CLASS (mode
) == MODE_INT
9814 && GET_MODE_SIZE (mode
) == 1)
9815 return gen_int_mode (TREE_STRING_POINTER (init
)
9816 [TREE_INT_CST_LOW (index1
)],
9822 goto normal_inner_ref
;
9825 /* If the operand is a CONSTRUCTOR, we can just extract the
9826 appropriate field if it is present. */
9827 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
9829 unsigned HOST_WIDE_INT idx
;
9832 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
9834 if (field
== treeop1
9835 /* We can normally use the value of the field in the
9836 CONSTRUCTOR. However, if this is a bitfield in
9837 an integral mode that we can fit in a HOST_WIDE_INT,
9838 we must mask only the number of bits in the bitfield,
9839 since this is done implicitly by the constructor. If
9840 the bitfield does not meet either of those conditions,
9841 we can't do this optimization. */
9842 && (! DECL_BIT_FIELD (field
)
9843 || ((GET_MODE_CLASS (DECL_MODE (field
)) == MODE_INT
)
9844 && (GET_MODE_PRECISION (DECL_MODE (field
))
9845 <= HOST_BITS_PER_WIDE_INT
))))
9847 if (DECL_BIT_FIELD (field
)
9848 && modifier
== EXPAND_STACK_PARM
)
9850 op0
= expand_expr (value
, target
, tmode
, modifier
);
9851 if (DECL_BIT_FIELD (field
))
9853 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
9854 enum machine_mode imode
= TYPE_MODE (TREE_TYPE (field
));
9856 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
9858 op1
= GEN_INT (((HOST_WIDE_INT
) 1 << bitsize
) - 1);
9859 op0
= expand_and (imode
, op0
, op1
, target
);
9863 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
9865 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
9867 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
9875 goto normal_inner_ref
;
9878 case ARRAY_RANGE_REF
:
9881 enum machine_mode mode1
, mode2
;
9882 HOST_WIDE_INT bitsize
, bitpos
;
9884 int volatilep
= 0, must_force_mem
;
9885 bool packedp
= false;
9886 tree tem
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
,
9887 &mode1
, &unsignedp
, &volatilep
, true);
9888 rtx orig_op0
, memloc
;
9889 bool mem_attrs_from_type
= false;
9891 /* If we got back the original object, something is wrong. Perhaps
9892 we are evaluating an expression too early. In any event, don't
9893 infinitely recurse. */
9894 gcc_assert (tem
!= exp
);
9896 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp
, 0)))
9897 || (TREE_CODE (TREE_OPERAND (exp
, 1)) == FIELD_DECL
9898 && DECL_PACKED (TREE_OPERAND (exp
, 1))))
9901 /* If TEM's type is a union of variable size, pass TARGET to the inner
9902 computation, since it will need a temporary and TARGET is known
9903 to have to do. This occurs in unchecked conversion in Ada. */
9906 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
9907 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
9908 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
9910 && modifier
!= EXPAND_STACK_PARM
9911 ? target
: NULL_RTX
),
9913 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
9915 /* If the bitfield is volatile, we want to access it in the
9916 field's mode, not the computed mode.
9917 If a MEM has VOIDmode (external with incomplete type),
9918 use BLKmode for it instead. */
9921 if (volatilep
&& flag_strict_volatile_bitfields
> 0)
9922 op0
= adjust_address (op0
, mode1
, 0);
9923 else if (GET_MODE (op0
) == VOIDmode
)
9924 op0
= adjust_address (op0
, BLKmode
, 0);
9928 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
9930 /* If we have either an offset, a BLKmode result, or a reference
9931 outside the underlying object, we must force it to memory.
9932 Such a case can occur in Ada if we have unchecked conversion
9933 of an expression from a scalar type to an aggregate type or
9934 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9935 passed a partially uninitialized object or a view-conversion
9936 to a larger size. */
9937 must_force_mem
= (offset
9939 || bitpos
+ bitsize
> GET_MODE_BITSIZE (mode2
));
9941 /* Handle CONCAT first. */
9942 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
9945 && bitsize
== GET_MODE_BITSIZE (GET_MODE (op0
)))
9948 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
9951 op0
= XEXP (op0
, 0);
9952 mode2
= GET_MODE (op0
);
9954 else if (bitpos
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
9955 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1)))
9959 op0
= XEXP (op0
, 1);
9961 mode2
= GET_MODE (op0
);
9964 /* Otherwise force into memory. */
9968 /* If this is a constant, put it in a register if it is a legitimate
9969 constant and we don't need a memory reference. */
9970 if (CONSTANT_P (op0
)
9972 && targetm
.legitimate_constant_p (mode2
, op0
)
9974 op0
= force_reg (mode2
, op0
);
9976 /* Otherwise, if this is a constant, try to force it to the constant
9977 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9978 is a legitimate constant. */
9979 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
9980 op0
= validize_mem (memloc
);
9982 /* Otherwise, if this is a constant or the object is not in memory
9983 and need be, put it there. */
9984 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
9986 tree nt
= build_qualified_type (TREE_TYPE (tem
),
9987 (TYPE_QUALS (TREE_TYPE (tem
))
9988 | TYPE_QUAL_CONST
));
9989 memloc
= assign_temp (nt
, 1, 1);
9990 emit_move_insn (memloc
, op0
);
9992 mem_attrs_from_type
= true;
9997 enum machine_mode address_mode
;
9998 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10001 gcc_assert (MEM_P (op0
));
10003 address_mode
= get_address_mode (op0
);
10004 if (GET_MODE (offset_rtx
) != address_mode
)
10005 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10007 if (GET_MODE (op0
) == BLKmode
10008 /* A constant address in OP0 can have VOIDmode, we must
10009 not try to call force_reg in that case. */
10010 && GET_MODE (XEXP (op0
, 0)) != VOIDmode
10012 && (bitpos
% bitsize
) == 0
10013 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
10014 && MEM_ALIGN (op0
) == GET_MODE_ALIGNMENT (mode1
))
10016 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10020 op0
= offset_address (op0
, offset_rtx
,
10021 highest_pow2_factor (offset
));
10024 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10025 record its alignment as BIGGEST_ALIGNMENT. */
10026 if (MEM_P (op0
) && bitpos
== 0 && offset
!= 0
10027 && is_aligning_offset (offset
, tem
))
10028 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10030 /* Don't forget about volatility even if this is a bitfield. */
10031 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10033 if (op0
== orig_op0
)
10034 op0
= copy_rtx (op0
);
10036 MEM_VOLATILE_P (op0
) = 1;
10039 /* In cases where an aligned union has an unaligned object
10040 as a field, we might be extracting a BLKmode value from
10041 an integer-mode (e.g., SImode) object. Handle this case
10042 by doing the extract into an object as wide as the field
10043 (which we know to be the width of a basic mode), then
10044 storing into memory, and changing the mode to BLKmode. */
10045 if (mode1
== VOIDmode
10046 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10047 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10048 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10049 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10050 && modifier
!= EXPAND_CONST_ADDRESS
10051 && modifier
!= EXPAND_INITIALIZER
10052 && modifier
!= EXPAND_MEMORY
)
10053 /* If the field is volatile, we always want an aligned
10054 access. Do this in following two situations:
10055 1. the access is not already naturally
10056 aligned, otherwise "normal" (non-bitfield) volatile fields
10057 become non-addressable.
10058 2. the bitsize is narrower than the access size. Need
10059 to extract bitfields from the access. */
10060 || (volatilep
&& flag_strict_volatile_bitfields
> 0
10061 && (bitpos
% GET_MODE_ALIGNMENT (mode
) != 0
10062 || (mode1
!= BLKmode
10063 && bitsize
< GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
)))
10064 /* If the field isn't aligned enough to fetch as a memref,
10065 fetch it as a bit field. */
10066 || (mode1
!= BLKmode
10067 && (((TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10068 || (bitpos
% GET_MODE_ALIGNMENT (mode
) != 0)
10070 && (MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10071 || (bitpos
% GET_MODE_ALIGNMENT (mode1
) != 0))))
10072 && modifier
!= EXPAND_MEMORY
10073 && ((modifier
== EXPAND_CONST_ADDRESS
10074 || modifier
== EXPAND_INITIALIZER
)
10076 : SLOW_UNALIGNED_ACCESS (mode1
, MEM_ALIGN (op0
))))
10077 || (bitpos
% BITS_PER_UNIT
!= 0)))
10078 /* If the type and the field are a constant size and the
10079 size of the type isn't the same size as the bitfield,
10080 we must use bitfield operations. */
10082 && TYPE_SIZE (TREE_TYPE (exp
))
10083 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
10084 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)),
10087 enum machine_mode ext_mode
= mode
;
10089 if (ext_mode
== BLKmode
10090 && ! (target
!= 0 && MEM_P (op0
)
10092 && bitpos
% BITS_PER_UNIT
== 0))
10093 ext_mode
= mode_for_size (bitsize
, MODE_INT
, 1);
10095 if (ext_mode
== BLKmode
)
10098 target
= assign_temp (type
, 1, 1);
10103 /* In this case, BITPOS must start at a byte boundary and
10104 TARGET, if specified, must be a MEM. */
10105 gcc_assert (MEM_P (op0
)
10106 && (!target
|| MEM_P (target
))
10107 && !(bitpos
% BITS_PER_UNIT
));
10109 emit_block_move (target
,
10110 adjust_address (op0
, VOIDmode
,
10111 bitpos
/ BITS_PER_UNIT
),
10112 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
10114 (modifier
== EXPAND_STACK_PARM
10115 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10120 op0
= validize_mem (op0
);
10122 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10123 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10125 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
, packedp
,
10126 (modifier
== EXPAND_STACK_PARM
10127 ? NULL_RTX
: target
),
10128 ext_mode
, ext_mode
);
10130 /* If the result is a record type and BITSIZE is narrower than
10131 the mode of OP0, an integral mode, and this is a big endian
10132 machine, we must put the field into the high-order bits. */
10133 if (TREE_CODE (type
) == RECORD_TYPE
&& BYTES_BIG_ENDIAN
10134 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_INT
10135 && bitsize
< (HOST_WIDE_INT
) GET_MODE_BITSIZE (GET_MODE (op0
)))
10136 op0
= expand_shift (LSHIFT_EXPR
, GET_MODE (op0
), op0
,
10137 GET_MODE_BITSIZE (GET_MODE (op0
))
10138 - bitsize
, op0
, 1);
10140 /* If the result type is BLKmode, store the data into a temporary
10141 of the appropriate type, but with the mode corresponding to the
10142 mode for the data we have (op0's mode). It's tempting to make
10143 this a constant type, since we know it's only being stored once,
10144 but that can cause problems if we are taking the address of this
10145 COMPONENT_REF because the MEM of any reference via that address
10146 will have flags corresponding to the type, which will not
10147 necessarily be constant. */
10148 if (mode
== BLKmode
)
10152 new_rtx
= assign_stack_temp_for_type (ext_mode
,
10153 GET_MODE_BITSIZE (ext_mode
),
10155 emit_move_insn (new_rtx
, op0
);
10156 op0
= copy_rtx (new_rtx
);
10157 PUT_MODE (op0
, BLKmode
);
10163 /* If the result is BLKmode, use that to access the object
10165 if (mode
== BLKmode
)
10168 /* Get a reference to just this component. */
10169 if (modifier
== EXPAND_CONST_ADDRESS
10170 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10171 op0
= adjust_address_nv (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10173 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10175 if (op0
== orig_op0
)
10176 op0
= copy_rtx (op0
);
10178 /* If op0 is a temporary because of forcing to memory, pass only the
10179 type to set_mem_attributes so that the original expression is never
10180 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10181 if (mem_attrs_from_type
)
10182 set_mem_attributes (op0
, type
, 0);
10184 set_mem_attributes (op0
, exp
, 0);
10186 if (REG_P (XEXP (op0
, 0)))
10187 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10189 MEM_VOLATILE_P (op0
) |= volatilep
;
10190 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10191 || modifier
== EXPAND_CONST_ADDRESS
10192 || modifier
== EXPAND_INITIALIZER
)
10196 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10198 convert_move (target
, op0
, unsignedp
);
10203 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10206 /* All valid uses of __builtin_va_arg_pack () are removed during
10208 if (CALL_EXPR_VA_ARG_PACK (exp
))
10209 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10211 tree fndecl
= get_callee_fndecl (exp
), attr
;
10214 && (attr
= lookup_attribute ("error",
10215 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10216 error ("%Kcall to %qs declared with attribute error: %s",
10217 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10218 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10220 && (attr
= lookup_attribute ("warning",
10221 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10222 warning_at (tree_nonartificial_location (exp
),
10223 0, "%Kcall to %qs declared with attribute warning: %s",
10224 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10225 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10227 /* Check for a built-in function. */
10228 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10230 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10231 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10234 return expand_call (exp
, target
, ignore
);
10236 case VIEW_CONVERT_EXPR
:
10239 /* If we are converting to BLKmode, try to avoid an intermediate
10240 temporary by fetching an inner memory reference. */
10241 if (mode
== BLKmode
10242 && TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
10243 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10244 && handled_component_p (treeop0
))
10246 enum machine_mode mode1
;
10247 HOST_WIDE_INT bitsize
, bitpos
;
10252 = get_inner_reference (treeop0
, &bitsize
, &bitpos
,
10253 &offset
, &mode1
, &unsignedp
, &volatilep
,
10257 /* ??? We should work harder and deal with non-zero offsets. */
10259 && (bitpos
% BITS_PER_UNIT
) == 0
10261 && compare_tree_int (TYPE_SIZE (type
), bitsize
) == 0)
10263 /* See the normal_inner_ref case for the rationale. */
10265 = expand_expr (tem
,
10266 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10267 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10269 && modifier
!= EXPAND_STACK_PARM
10270 ? target
: NULL_RTX
),
10272 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
10274 if (MEM_P (orig_op0
))
10278 /* Get a reference to just this component. */
10279 if (modifier
== EXPAND_CONST_ADDRESS
10280 || modifier
== EXPAND_SUM
10281 || modifier
== EXPAND_INITIALIZER
)
10282 op0
= adjust_address_nv (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10284 op0
= adjust_address (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10286 if (op0
== orig_op0
)
10287 op0
= copy_rtx (op0
);
10289 set_mem_attributes (op0
, treeop0
, 0);
10290 if (REG_P (XEXP (op0
, 0)))
10291 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10293 MEM_VOLATILE_P (op0
) |= volatilep
;
10299 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
10301 /* If the input and output modes are both the same, we are done. */
10302 if (mode
== GET_MODE (op0
))
10304 /* If neither mode is BLKmode, and both modes are the same size
10305 then we can use gen_lowpart. */
10306 else if (mode
!= BLKmode
&& GET_MODE (op0
) != BLKmode
10307 && (GET_MODE_PRECISION (mode
)
10308 == GET_MODE_PRECISION (GET_MODE (op0
)))
10309 && !COMPLEX_MODE_P (GET_MODE (op0
)))
10311 if (GET_CODE (op0
) == SUBREG
)
10312 op0
= force_reg (GET_MODE (op0
), op0
);
10313 temp
= gen_lowpart_common (mode
, op0
);
10318 if (!REG_P (op0
) && !MEM_P (op0
))
10319 op0
= force_reg (GET_MODE (op0
), op0
);
10320 op0
= gen_lowpart (mode
, op0
);
10323 /* If both types are integral, convert from one mode to the other. */
10324 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
10325 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
10326 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10327 /* As a last resort, spill op0 to memory, and reload it in a
10329 else if (!MEM_P (op0
))
10331 /* If the operand is not a MEM, force it into memory. Since we
10332 are going to be changing the mode of the MEM, don't call
10333 force_const_mem for constants because we don't allow pool
10334 constants to change mode. */
10335 tree inner_type
= TREE_TYPE (treeop0
);
10337 gcc_assert (!TREE_ADDRESSABLE (exp
));
10339 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
10341 = assign_stack_temp_for_type
10342 (TYPE_MODE (inner_type
),
10343 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
10345 emit_move_insn (target
, op0
);
10349 /* At this point, OP0 is in the correct mode. If the output type is
10350 such that the operand is known to be aligned, indicate that it is.
10351 Otherwise, we need only be concerned about alignment for non-BLKmode
10355 enum insn_code icode
;
10357 if (TYPE_ALIGN_OK (type
))
10359 /* ??? Copying the MEM without substantially changing it might
10360 run afoul of the code handling volatile memory references in
10361 store_expr, which assumes that TARGET is returned unmodified
10362 if it has been used. */
10363 op0
= copy_rtx (op0
);
10364 set_mem_align (op0
, MAX (MEM_ALIGN (op0
), TYPE_ALIGN (type
)));
10366 else if (mode
!= BLKmode
10367 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
)
10368 /* If the target does have special handling for unaligned
10369 loads of mode then use them. */
10370 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10371 != CODE_FOR_nothing
))
10375 op0
= adjust_address (op0
, mode
, 0);
10376 /* We've already validated the memory, and we're creating a
10377 new pseudo destination. The predicates really can't
10379 reg
= gen_reg_rtx (mode
);
10381 /* Nor can the insn generator. */
10382 insn
= GEN_FCN (icode
) (reg
, op0
);
10386 else if (STRICT_ALIGNMENT
10388 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
10390 tree inner_type
= TREE_TYPE (treeop0
);
10391 HOST_WIDE_INT temp_size
10392 = MAX (int_size_in_bytes (inner_type
),
10393 (HOST_WIDE_INT
) GET_MODE_SIZE (mode
));
10395 = assign_stack_temp_for_type (mode
, temp_size
, type
);
10396 rtx new_with_op0_mode
10397 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
10399 gcc_assert (!TREE_ADDRESSABLE (exp
));
10401 if (GET_MODE (op0
) == BLKmode
)
10402 emit_block_move (new_with_op0_mode
, op0
,
10403 GEN_INT (GET_MODE_SIZE (mode
)),
10404 (modifier
== EXPAND_STACK_PARM
10405 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10407 emit_move_insn (new_with_op0_mode
, op0
);
10412 op0
= adjust_address (op0
, mode
, 0);
10419 tree lhs
= treeop0
;
10420 tree rhs
= treeop1
;
10421 gcc_assert (ignore
);
10423 /* Check for |= or &= of a bitfield of size one into another bitfield
10424 of size 1. In this case, (unless we need the result of the
10425 assignment) we can do this more efficiently with a
10426 test followed by an assignment, if necessary.
10428 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10429 things change so we do, this code should be enhanced to
10431 if (TREE_CODE (lhs
) == COMPONENT_REF
10432 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
10433 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
10434 && TREE_OPERAND (rhs
, 0) == lhs
10435 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
10436 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
10437 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
10439 rtx label
= gen_label_rtx ();
10440 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
10441 do_jump (TREE_OPERAND (rhs
, 1),
10443 value
? 0 : label
, -1);
10444 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
10446 do_pending_stack_adjust ();
10447 emit_label (label
);
10451 expand_assignment (lhs
, rhs
, false);
10456 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
10458 case REALPART_EXPR
:
10459 op0
= expand_normal (treeop0
);
10460 return read_complex_part (op0
, false);
10462 case IMAGPART_EXPR
:
10463 op0
= expand_normal (treeop0
);
10464 return read_complex_part (op0
, true);
10471 /* Expanded in cfgexpand.c. */
10472 gcc_unreachable ();
10474 case TRY_CATCH_EXPR
:
10476 case EH_FILTER_EXPR
:
10477 case TRY_FINALLY_EXPR
:
10478 /* Lowered by tree-eh.c. */
10479 gcc_unreachable ();
10481 case WITH_CLEANUP_EXPR
:
10482 case CLEANUP_POINT_EXPR
:
10484 case CASE_LABEL_EXPR
:
10489 case COMPOUND_EXPR
:
10490 case PREINCREMENT_EXPR
:
10491 case PREDECREMENT_EXPR
:
10492 case POSTINCREMENT_EXPR
:
10493 case POSTDECREMENT_EXPR
:
10496 case COMPOUND_LITERAL_EXPR
:
10497 /* Lowered by gimplify.c. */
10498 gcc_unreachable ();
10501 /* Function descriptors are not valid except for as
10502 initialization constants, and should not be expanded. */
10503 gcc_unreachable ();
10505 case WITH_SIZE_EXPR
:
10506 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10507 have pulled out the size to use in whatever context it needed. */
10508 return expand_expr_real (treeop0
, original_target
, tmode
,
10509 modifier
, alt_rtl
);
10512 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10516 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10517 signedness of TYPE), possibly returning the result in TARGET. */
10519 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
10521 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
10522 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
10524 /* For constant values, reduce using build_int_cst_type. */
10525 if (CONST_INT_P (exp
))
10527 HOST_WIDE_INT value
= INTVAL (exp
);
10528 tree t
= build_int_cst_type (type
, value
);
10529 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
10531 else if (TYPE_UNSIGNED (type
))
10533 rtx mask
= immed_double_int_const (double_int::mask (prec
),
10535 return expand_and (GET_MODE (exp
), exp
, mask
, target
);
10539 int count
= GET_MODE_PRECISION (GET_MODE (exp
)) - prec
;
10540 exp
= expand_shift (LSHIFT_EXPR
, GET_MODE (exp
),
10541 exp
, count
, target
, 0);
10542 return expand_shift (RSHIFT_EXPR
, GET_MODE (exp
),
10543 exp
, count
, target
, 0);
10547 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10548 when applied to the address of EXP produces an address known to be
10549 aligned more than BIGGEST_ALIGNMENT. */
10552 is_aligning_offset (const_tree offset
, const_tree exp
)
10554 /* Strip off any conversions. */
10555 while (CONVERT_EXPR_P (offset
))
10556 offset
= TREE_OPERAND (offset
, 0);
10558 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10559 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10560 if (TREE_CODE (offset
) != BIT_AND_EXPR
10561 || !host_integerp (TREE_OPERAND (offset
, 1), 1)
10562 || compare_tree_int (TREE_OPERAND (offset
, 1),
10563 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
10564 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset
, 1), 1) + 1) < 0)
10567 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10568 It must be NEGATE_EXPR. Then strip any more conversions. */
10569 offset
= TREE_OPERAND (offset
, 0);
10570 while (CONVERT_EXPR_P (offset
))
10571 offset
= TREE_OPERAND (offset
, 0);
10573 if (TREE_CODE (offset
) != NEGATE_EXPR
)
10576 offset
= TREE_OPERAND (offset
, 0);
10577 while (CONVERT_EXPR_P (offset
))
10578 offset
= TREE_OPERAND (offset
, 0);
10580 /* This must now be the address of EXP. */
10581 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
10584 /* Return the tree node if an ARG corresponds to a string constant or zero
10585 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10586 in bytes within the string that ARG is accessing. The type of the
10587 offset will be `sizetype'. */
10590 string_constant (tree arg
, tree
*ptr_offset
)
10592 tree array
, offset
, lower_bound
;
10595 if (TREE_CODE (arg
) == ADDR_EXPR
)
10597 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
10599 *ptr_offset
= size_zero_node
;
10600 return TREE_OPERAND (arg
, 0);
10602 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
10604 array
= TREE_OPERAND (arg
, 0);
10605 offset
= size_zero_node
;
10607 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
10609 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
10610 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
10611 if (TREE_CODE (array
) != STRING_CST
10612 && TREE_CODE (array
) != VAR_DECL
)
10615 /* Check if the array has a nonzero lower bound. */
10616 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
10617 if (!integer_zerop (lower_bound
))
10619 /* If the offset and base aren't both constants, return 0. */
10620 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
10622 if (TREE_CODE (offset
) != INTEGER_CST
)
10624 /* Adjust offset by the lower bound. */
10625 offset
= size_diffop (fold_convert (sizetype
, offset
),
10626 fold_convert (sizetype
, lower_bound
));
10629 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
10631 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
10632 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
10633 if (TREE_CODE (array
) != ADDR_EXPR
)
10635 array
= TREE_OPERAND (array
, 0);
10636 if (TREE_CODE (array
) != STRING_CST
10637 && TREE_CODE (array
) != VAR_DECL
)
10643 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
10645 tree arg0
= TREE_OPERAND (arg
, 0);
10646 tree arg1
= TREE_OPERAND (arg
, 1);
10651 if (TREE_CODE (arg0
) == ADDR_EXPR
10652 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
10653 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
10655 array
= TREE_OPERAND (arg0
, 0);
10658 else if (TREE_CODE (arg1
) == ADDR_EXPR
10659 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
10660 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
10662 array
= TREE_OPERAND (arg1
, 0);
10671 if (TREE_CODE (array
) == STRING_CST
)
10673 *ptr_offset
= fold_convert (sizetype
, offset
);
10676 else if (TREE_CODE (array
) == VAR_DECL
10677 || TREE_CODE (array
) == CONST_DECL
)
10680 tree init
= ctor_for_folding (array
);
10682 /* Variables initialized to string literals can be handled too. */
10683 if (init
== error_mark_node
10685 || TREE_CODE (init
) != STRING_CST
)
10688 /* Avoid const char foo[4] = "abcde"; */
10689 if (DECL_SIZE_UNIT (array
) == NULL_TREE
10690 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
10691 || (length
= TREE_STRING_LENGTH (init
)) <= 0
10692 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
10695 /* If variable is bigger than the string literal, OFFSET must be constant
10696 and inside of the bounds of the string literal. */
10697 offset
= fold_convert (sizetype
, offset
);
10698 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
10699 && (! host_integerp (offset
, 1)
10700 || compare_tree_int (offset
, length
) >= 0))
10703 *ptr_offset
= offset
;
10710 /* Generate code to calculate OPS, and exploded expression
10711 using a store-flag instruction and return an rtx for the result.
10712 OPS reflects a comparison.
10714 If TARGET is nonzero, store the result there if convenient.
10716 Return zero if there is no suitable set-flag instruction
10717 available on this machine.
10719 Once expand_expr has been called on the arguments of the comparison,
10720 we are committed to doing the store flag, since it is not safe to
10721 re-evaluate the expression. We emit the store-flag insn by calling
10722 emit_store_flag, but only expand the arguments if we have a reason
10723 to believe that emit_store_flag will be successful. If we think that
10724 it will, but it isn't, we have to simulate the store-flag with a
10725 set/jump/set sequence. */
10728 do_store_flag (sepops ops
, rtx target
, enum machine_mode mode
)
10730 enum rtx_code code
;
10731 tree arg0
, arg1
, type
;
10733 enum machine_mode operand_mode
;
10736 rtx subtarget
= target
;
10737 location_t loc
= ops
->location
;
10742 /* Don't crash if the comparison was erroneous. */
10743 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
10746 type
= TREE_TYPE (arg0
);
10747 operand_mode
= TYPE_MODE (type
);
10748 unsignedp
= TYPE_UNSIGNED (type
);
10750 /* We won't bother with BLKmode store-flag operations because it would mean
10751 passing a lot of information to emit_store_flag. */
10752 if (operand_mode
== BLKmode
)
10755 /* We won't bother with store-flag operations involving function pointers
10756 when function pointers must be canonicalized before comparisons. */
10757 #ifdef HAVE_canonicalize_funcptr_for_compare
10758 if (HAVE_canonicalize_funcptr_for_compare
10759 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
10760 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
10762 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
10763 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
10764 == FUNCTION_TYPE
))))
10771 /* For vector typed comparisons emit code to generate the desired
10772 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10773 expander for this. */
10774 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
10776 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
10777 tree if_true
= constant_boolean_node (true, ops
->type
);
10778 tree if_false
= constant_boolean_node (false, ops
->type
);
10779 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
, if_false
, target
);
10782 /* Get the rtx comparison code to use. We know that EXP is a comparison
10783 operation of some type. Some comparisons against 1 and -1 can be
10784 converted to comparisons with zero. Do so here so that the tests
10785 below will be aware that we have a comparison with zero. These
10786 tests will not catch constants in the first operand, but constants
10787 are rarely passed as the first operand. */
10798 if (integer_onep (arg1
))
10799 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
10801 code
= unsignedp
? LTU
: LT
;
10804 if (! unsignedp
&& integer_all_onesp (arg1
))
10805 arg1
= integer_zero_node
, code
= LT
;
10807 code
= unsignedp
? LEU
: LE
;
10810 if (! unsignedp
&& integer_all_onesp (arg1
))
10811 arg1
= integer_zero_node
, code
= GE
;
10813 code
= unsignedp
? GTU
: GT
;
10816 if (integer_onep (arg1
))
10817 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
10819 code
= unsignedp
? GEU
: GE
;
10822 case UNORDERED_EXPR
:
10848 gcc_unreachable ();
10851 /* Put a constant second. */
10852 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
10853 || TREE_CODE (arg0
) == FIXED_CST
)
10855 tem
= arg0
; arg0
= arg1
; arg1
= tem
;
10856 code
= swap_condition (code
);
10859 /* If this is an equality or inequality test of a single bit, we can
10860 do this by shifting the bit being tested to the low-order bit and
10861 masking the result with the constant 1. If the condition was EQ,
10862 we xor it with 1. This does not require an scc insn and is faster
10863 than an scc insn even if we have it.
10865 The code to make this transformation was moved into fold_single_bit_test,
10866 so we just call into the folder and expand its result. */
10868 if ((code
== NE
|| code
== EQ
)
10869 && integer_zerop (arg1
)
10870 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
10872 gimple srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
10874 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
10876 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
10877 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
10878 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
10879 gimple_assign_rhs1 (srcstmt
),
10880 gimple_assign_rhs2 (srcstmt
));
10881 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
10883 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
10887 if (! get_subtarget (target
)
10888 || GET_MODE (subtarget
) != operand_mode
)
10891 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10894 target
= gen_reg_rtx (mode
);
10896 /* Try a cstore if possible. */
10897 return emit_store_flag_force (target
, code
, op0
, op1
,
10898 operand_mode
, unsignedp
,
10899 (TYPE_PRECISION (ops
->type
) == 1
10900 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
10904 /* Stubs in case we haven't got a casesi insn. */
10905 #ifndef HAVE_casesi
10906 # define HAVE_casesi 0
10907 # define gen_casesi(a, b, c, d, e) (0)
10908 # define CODE_FOR_casesi CODE_FOR_nothing
10911 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10912 0 otherwise (i.e. if there is no casesi instruction).
10914 DEFAULT_PROBABILITY is the probability of jumping to the default
10917 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
10918 rtx table_label
, rtx default_label
, rtx fallback_label
,
10919 int default_probability
)
10921 struct expand_operand ops
[5];
10922 enum machine_mode index_mode
= SImode
;
10923 rtx op1
, op2
, index
;
10928 /* Convert the index to SImode. */
10929 if (GET_MODE_BITSIZE (TYPE_MODE (index_type
)) > GET_MODE_BITSIZE (index_mode
))
10931 enum machine_mode omode
= TYPE_MODE (index_type
);
10932 rtx rangertx
= expand_normal (range
);
10934 /* We must handle the endpoints in the original mode. */
10935 index_expr
= build2 (MINUS_EXPR
, index_type
,
10936 index_expr
, minval
);
10937 minval
= integer_zero_node
;
10938 index
= expand_normal (index_expr
);
10940 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
10941 omode
, 1, default_label
,
10942 default_probability
);
10943 /* Now we can safely truncate. */
10944 index
= convert_to_mode (index_mode
, index
, 0);
10948 if (TYPE_MODE (index_type
) != index_mode
)
10950 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
10951 index_expr
= fold_convert (index_type
, index_expr
);
10954 index
= expand_normal (index_expr
);
10957 do_pending_stack_adjust ();
10959 op1
= expand_normal (minval
);
10960 op2
= expand_normal (range
);
10962 create_input_operand (&ops
[0], index
, index_mode
);
10963 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
10964 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
10965 create_fixed_operand (&ops
[3], table_label
);
10966 create_fixed_operand (&ops
[4], (default_label
10968 : fallback_label
));
10969 expand_jump_insn (CODE_FOR_casesi
, 5, ops
);
10973 /* Attempt to generate a tablejump instruction; same concept. */
10974 #ifndef HAVE_tablejump
10975 #define HAVE_tablejump 0
10976 #define gen_tablejump(x, y) (0)
10979 /* Subroutine of the next function.
10981 INDEX is the value being switched on, with the lowest value
10982 in the table already subtracted.
10983 MODE is its expected mode (needed if INDEX is constant).
10984 RANGE is the length of the jump table.
10985 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10987 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10988 index value is out of range.
10989 DEFAULT_PROBABILITY is the probability of jumping to
10990 the default label. */
10993 do_tablejump (rtx index
, enum machine_mode mode
, rtx range
, rtx table_label
,
10994 rtx default_label
, int default_probability
)
10998 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
10999 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11001 /* Do an unsigned comparison (in the proper mode) between the index
11002 expression and the value which represents the length of the range.
11003 Since we just finished subtracting the lower bound of the range
11004 from the index expression, this comparison allows us to simultaneously
11005 check that the original index expression value is both greater than
11006 or equal to the minimum value of the range and less than or equal to
11007 the maximum value of the range. */
11010 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11011 default_label
, default_probability
);
11014 /* If index is in range, it must fit in Pmode.
11015 Convert to Pmode so we can index with it. */
11017 index
= convert_to_mode (Pmode
, index
, 1);
11019 /* Don't let a MEM slip through, because then INDEX that comes
11020 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11021 and break_out_memory_refs will go to work on it and mess it up. */
11022 #ifdef PIC_CASE_VECTOR_ADDRESS
11023 if (flag_pic
&& !REG_P (index
))
11024 index
= copy_to_mode_reg (Pmode
, index
);
11027 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11028 GET_MODE_SIZE, because this indicates how large insns are. The other
11029 uses should all be Pmode, because they are addresses. This code
11030 could fail if addresses and insns are not the same size. */
11031 index
= gen_rtx_PLUS (Pmode
,
11032 gen_rtx_MULT (Pmode
, index
,
11033 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE
))),
11034 gen_rtx_LABEL_REF (Pmode
, table_label
));
11035 #ifdef PIC_CASE_VECTOR_ADDRESS
11037 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11040 index
= memory_address (CASE_VECTOR_MODE
, index
);
11041 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11042 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11043 convert_move (temp
, vector
, 0);
11045 emit_jump_insn (gen_tablejump (temp
, table_label
));
11047 /* If we are generating PIC code or if the table is PC-relative, the
11048 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11049 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11054 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11055 rtx table_label
, rtx default_label
, int default_probability
)
11059 if (! HAVE_tablejump
)
11062 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11063 fold_convert (index_type
, index_expr
),
11064 fold_convert (index_type
, minval
));
11065 index
= expand_normal (index_expr
);
11066 do_pending_stack_adjust ();
11068 do_tablejump (index
, TYPE_MODE (index_type
),
11069 convert_modes (TYPE_MODE (index_type
),
11070 TYPE_MODE (TREE_TYPE (range
)),
11071 expand_normal (range
),
11072 TYPE_UNSIGNED (TREE_TYPE (range
))),
11073 table_label
, default_label
, default_probability
);
11077 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11079 const_vector_from_tree (tree exp
)
11085 enum machine_mode inner
, mode
;
11087 mode
= TYPE_MODE (TREE_TYPE (exp
));
11089 if (initializer_zerop (exp
))
11090 return CONST0_RTX (mode
);
11092 units
= GET_MODE_NUNITS (mode
);
11093 inner
= GET_MODE_INNER (mode
);
11095 v
= rtvec_alloc (units
);
11097 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11099 elt
= VECTOR_CST_ELT (exp
, i
);
11101 if (TREE_CODE (elt
) == REAL_CST
)
11102 RTVEC_ELT (v
, i
) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt
),
11104 else if (TREE_CODE (elt
) == FIXED_CST
)
11105 RTVEC_ELT (v
, i
) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11108 RTVEC_ELT (v
, i
) = immed_double_int_const (tree_to_double_int (elt
),
11112 return gen_rtx_CONST_VECTOR (mode
, v
);
11115 /* Build a decl for a personality function given a language prefix. */
11118 build_personality_function (const char *lang
)
11120 const char *unwind_and_version
;
11124 switch (targetm_common
.except_unwind_info (&global_options
))
11129 unwind_and_version
= "_sj0";
11133 unwind_and_version
= "_v0";
11136 unwind_and_version
= "_seh0";
11139 gcc_unreachable ();
11142 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11144 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11145 long_long_unsigned_type_node
,
11146 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11147 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11148 get_identifier (name
), type
);
11149 DECL_ARTIFICIAL (decl
) = 1;
11150 DECL_EXTERNAL (decl
) = 1;
11151 TREE_PUBLIC (decl
) = 1;
11153 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11154 are the flags assigned by targetm.encode_section_info. */
11155 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11160 /* Extracts the personality function of DECL and returns the corresponding
11164 get_personality_function (tree decl
)
11166 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11167 enum eh_personality_kind pk
;
11169 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11170 if (pk
== eh_personality_none
)
11174 && pk
== eh_personality_any
)
11175 personality
= lang_hooks
.eh_personality ();
11177 if (pk
== eh_personality_lang
)
11178 gcc_assert (personality
!= NULL_TREE
);
11180 return XEXP (DECL_RTL (personality
), 0);
11183 #include "gt-expr.h"