RISC-V: Adjust scalar_to_vec cost
[official-gcc.git] / gcc / optabs.h
blobc0b8df5268f6ec9b5c6ca593d0e31dbad3c5f748
1 /* Definitions for code generation pass of GNU compiler.
2 Copyright (C) 2001-2024 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #ifndef GCC_OPTABS_H
21 #define GCC_OPTABS_H
23 #include "optabs-query.h"
24 #include "optabs-libfuncs.h"
25 #include "vec-perm-indices.h"
27 /* Generate code for a widening multiply. */
28 extern rtx expand_widening_mult (machine_mode, rtx, rtx, rtx, int, optab);
30 /* Describes the type of an expand_operand. Each value is associated
31 with a create_*_operand function; see the comments above those
32 functions for details. */
33 enum expand_operand_type {
34 EXPAND_FIXED,
35 EXPAND_OUTPUT,
36 EXPAND_INPUT,
37 EXPAND_CONVERT_TO,
38 EXPAND_CONVERT_FROM,
39 EXPAND_ADDRESS,
40 EXPAND_INTEGER,
41 EXPAND_UNDEFINED_INPUT
44 /* Information about an operand for instruction expansion. */
45 class expand_operand {
46 public:
47 /* The type of operand. */
48 ENUM_BITFIELD (expand_operand_type) type : 8;
50 /* True if any conversion should treat VALUE as being unsigned
51 rather than signed. Only meaningful for certain types. */
52 unsigned int unsigned_p : 1;
54 /* Is the target operand. */
55 unsigned int target : 1;
57 /* Unused; available for future use. */
58 unsigned int unused : 6;
60 /* The mode passed to the convert_*_operand function. It has a
61 type-dependent meaning. */
62 ENUM_BITFIELD (machine_mode) mode : 16;
64 /* The value of the operand. */
65 rtx value;
67 /* The value of an EXPAND_INTEGER operand. */
68 poly_int64 int_value;
71 /* Initialize OP with the given fields. Initialise the other fields
72 to their default values. */
74 inline void
75 create_expand_operand (class expand_operand *op,
76 enum expand_operand_type type,
77 rtx value, machine_mode mode,
78 bool unsigned_p, poly_int64 int_value = 0)
80 op->type = type;
81 op->unsigned_p = unsigned_p;
82 op->target = 0;
83 op->unused = 0;
84 op->mode = mode;
85 op->value = value;
86 op->int_value = int_value;
89 /* Make OP describe an operand that must use rtx X, even if X is volatile. */
91 inline void
92 create_fixed_operand (class expand_operand *op, rtx x)
94 create_expand_operand (op, EXPAND_FIXED, x, VOIDmode, false);
97 /* Make OP describe an output operand that must have mode MODE.
98 X, if nonnull, is a suggestion for where the output should be stored.
99 It is OK for VALUE to be inconsistent with MODE, although it will just
100 be ignored in that case. */
102 inline void
103 create_output_operand (class expand_operand *op, rtx x,
104 machine_mode mode)
106 create_expand_operand (op, EXPAND_OUTPUT, x, mode, false);
109 /* Make OP describe an input operand that must have mode MODE and
110 value VALUE; MODE cannot be VOIDmode. The backend may request that
111 VALUE be copied into a different kind of rtx before being passed
112 as an operand. */
114 inline void
115 create_input_operand (class expand_operand *op, rtx value,
116 machine_mode mode)
118 create_expand_operand (op, EXPAND_INPUT, value, mode, false);
121 /* Make OP describe an undefined input operand of mode MODE. MODE cannot
122 be null. */
124 inline void
125 create_undefined_input_operand (class expand_operand *op, machine_mode mode)
127 create_expand_operand (op, EXPAND_UNDEFINED_INPUT, gen_rtx_SCRATCH (mode),
128 mode, false);
131 /* Like create_input_operand, except that VALUE must first be converted
132 to mode MODE. UNSIGNED_P says whether VALUE is unsigned. */
134 inline void
135 create_convert_operand_to (class expand_operand *op, rtx value,
136 machine_mode mode, bool unsigned_p)
138 create_expand_operand (op, EXPAND_CONVERT_TO, value, mode, unsigned_p);
141 /* Make OP describe an input operand that should have the same value
142 as VALUE, after any mode conversion that the backend might request.
143 If VALUE is a CONST_INT, it should be treated as having mode MODE.
144 UNSIGNED_P says whether VALUE is unsigned.
146 The conversion of VALUE can include a combination of numerical
147 conversion (as for convert_modes) and duplicating a scalar to fill
148 a vector (if VALUE is a scalar but the operand is a vector). */
150 inline void
151 create_convert_operand_from (class expand_operand *op, rtx value,
152 machine_mode mode, bool unsigned_p)
154 create_expand_operand (op, EXPAND_CONVERT_FROM, value, mode, unsigned_p);
158 /* Make OP describe an input Pmode address operand. VALUE is the value
159 of the address, but it may need to be converted to Pmode first. */
161 inline void
162 create_address_operand (class expand_operand *op, rtx value)
164 create_expand_operand (op, EXPAND_ADDRESS, value, Pmode, false);
167 extern void create_integer_operand (class expand_operand *, poly_int64);
169 /* Passed to expand_simple_binop and expand_binop to say which options
170 to try to use if the requested operation can't be open-coded on the
171 requisite mode. Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using
172 a library call. Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try
173 using a wider mode. OPTAB_MUST_WIDEN says try widening and don't
174 try anything else. */
176 enum optab_methods
178 OPTAB_DIRECT,
179 OPTAB_LIB,
180 OPTAB_WIDEN,
181 OPTAB_LIB_WIDEN,
182 OPTAB_MUST_WIDEN
185 extern rtx expand_widen_pattern_expr (struct separate_ops *, rtx , rtx , rtx,
186 rtx, int);
187 extern rtx expand_ternary_op (machine_mode mode, optab ternary_optab,
188 rtx op0, rtx op1, rtx op2, rtx target,
189 int unsignedp);
190 extern rtx simplify_expand_binop (machine_mode mode, optab binoptab,
191 rtx op0, rtx op1, rtx target, int unsignedp,
192 enum optab_methods methods);
193 extern bool force_expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
194 enum optab_methods);
195 extern rtx expand_vector_broadcast (machine_mode, rtx);
197 extern rtx expand_doubleword_divmod (machine_mode, rtx, rtx, rtx *, bool);
199 /* Generate code for a simple binary or unary operation. "Simple" in
200 this case means "can be unambiguously described by a (mode, code)
201 pair and mapped to a single optab." */
202 extern rtx expand_simple_binop (machine_mode, enum rtx_code, rtx,
203 rtx, rtx, int, enum optab_methods);
205 /* Expand a binary operation given optab and rtx operands. */
206 extern rtx expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
207 enum optab_methods);
209 /* Expand a binary operation with both signed and unsigned forms. */
210 extern rtx sign_expand_binop (machine_mode, optab, optab, rtx, rtx,
211 rtx, int, enum optab_methods);
213 /* Generate code to perform an operation on one operand with two results. */
214 extern bool expand_twoval_unop (optab, rtx, rtx, rtx, int);
216 /* Generate code to perform an operation on two operands with two results. */
217 extern bool expand_twoval_binop (optab, rtx, rtx, rtx, rtx, int);
219 /* Generate code to perform an operation on two operands with two
220 results, using a library function. */
221 extern bool expand_twoval_binop_libfunc (optab, rtx, rtx, rtx, rtx,
222 enum rtx_code);
223 extern rtx expand_simple_unop (machine_mode, enum rtx_code, rtx, rtx,
224 int);
226 /* Expand a unary arithmetic operation given optab rtx operand. */
227 extern rtx expand_unop (machine_mode, optab, rtx, rtx, int);
229 /* Expand the absolute value operation. */
230 extern rtx expand_abs_nojump (machine_mode, rtx, rtx, int);
231 extern rtx expand_abs (machine_mode, rtx, rtx, int, int);
233 /* Expand the one's complement absolute value operation. */
234 extern rtx expand_one_cmpl_abs_nojump (machine_mode, rtx, rtx);
236 /* Expand the copysign operation. */
237 extern rtx expand_copysign (rtx, rtx, rtx);
238 /* Generate an instruction with a given INSN_CODE with an output and
239 an input. */
240 extern bool maybe_emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
241 extern void emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
243 /* Emit code to make a call to a constant function or a library call. */
244 extern void emit_libcall_block (rtx_insn *, rtx, rtx, rtx);
246 /* The various uses that a comparison can have; used by can_compare_p:
247 jumps, conditional moves, store flag operations. */
248 enum can_compare_purpose
250 ccp_jump,
251 ccp_cmov,
252 ccp_store_flag
255 /* Nonzero if a compare of mode MODE can be done straightforwardly
256 (without splitting it into pieces). */
257 extern bool can_compare_p (enum rtx_code, machine_mode,
258 enum can_compare_purpose);
260 /* Return whether the backend can emit a vector comparison (vec_cmp/vec_cmpu)
261 for code CODE, comparing operands of mode VALUE_MODE and producing a result
262 with MASK_MODE. */
263 extern bool can_vec_cmp_compare_p (enum rtx_code, machine_mode, machine_mode);
265 /* Return whether the backend can emit a vector comparison (vcond/vcondu) for
266 code CODE, comparing operands of mode CMP_OP_MODE and producing a result
267 with VALUE_MODE. */
268 extern bool can_vcond_compare_p (enum rtx_code, machine_mode, machine_mode);
270 /* Return whether the backend can emit vector set instructions for inserting
271 element into vector at variable index position. */
272 extern bool can_vec_set_var_idx_p (machine_mode);
273 extern bool can_vec_extract_var_idx_p (machine_mode, machine_mode);
275 extern rtx prepare_operand (enum insn_code, rtx, int, machine_mode,
276 machine_mode, int);
277 /* Emit a pair of rtl insns to compare two rtx's and to jump
278 to a label if the comparison is true. */
279 extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx,
280 machine_mode, int, rtx,
281 profile_probability prob
282 = profile_probability::uninitialized ());
283 extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx,
284 machine_mode, int, tree, rtx,
285 profile_probability prob
286 = profile_probability::uninitialized ());
288 /* Generate code to indirectly jump to a location given in the rtx LOC. */
289 extern void emit_indirect_jump (rtx);
291 #include "insn-config.h"
293 #ifndef GCC_INSN_CONFIG_H
294 #error "insn-config.h must be included before optabs.h"
295 #endif
297 /* Emit a conditional move operation. */
298 rtx emit_conditional_move (rtx, rtx_comparison, rtx, rtx, machine_mode, int);
299 rtx emit_conditional_move (rtx, rtx, rtx, rtx, rtx, machine_mode);
301 /* Emit a conditional negate or bitwise complement operation. */
302 rtx emit_conditional_neg_or_complement (rtx, rtx_code, machine_mode, rtx,
303 rtx, rtx);
305 rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode,
306 rtx, rtx, machine_mode, int);
308 /* Create but don't emit one rtl instruction to perform certain operations.
309 Modes must match; operands must meet the operation's predicates.
310 Likewise for subtraction and for just copying. */
311 extern rtx_insn *gen_add2_insn (rtx, rtx);
312 extern rtx_insn *gen_add3_insn (rtx, rtx, rtx);
313 extern bool have_add2_insn (rtx, rtx);
314 extern rtx_insn *gen_addptr3_insn (rtx, rtx, rtx);
315 extern bool have_addptr3_insn (rtx, rtx, rtx);
316 extern rtx_insn *gen_sub2_insn (rtx, rtx);
317 extern rtx_insn *gen_sub3_insn (rtx, rtx, rtx);
318 extern bool have_sub2_insn (rtx, rtx);
320 /* Generate the body of an insn to extend Y (with mode MFROM)
321 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
322 extern rtx_insn *gen_extend_insn (rtx, rtx, machine_mode, machine_mode, int);
324 /* Generate code for a FLOAT_EXPR. */
325 extern void expand_float (rtx, rtx, int);
327 /* Generate code for a FIX_EXPR. */
328 extern void expand_fix (rtx, rtx, int);
330 /* Generate code for a FIXED_CONVERT_EXPR. */
331 extern void expand_fixed_convert (rtx, rtx, int, int);
333 /* Generate code for float to integral conversion. */
334 extern bool expand_sfix_optab (rtx, rtx, convert_optab);
336 /* Report whether the machine description contains an insn which can
337 perform the operation described by CODE and MODE. */
338 extern bool have_insn_for (enum rtx_code, machine_mode);
340 /* Generate a conditional trap instruction. */
341 extern rtx_insn *gen_cond_trap (enum rtx_code, rtx, rtx, rtx);
343 /* Generate code for VEC_PERM_EXPR. */
344 extern rtx expand_vec_perm_var (machine_mode, rtx, rtx, rtx, rtx);
345 extern rtx expand_vec_perm_const (machine_mode, rtx, rtx,
346 const vec_perm_builder &, machine_mode, rtx);
348 /* Generate code for vector comparison. */
349 extern rtx expand_vec_cmp_expr (tree, tree, rtx);
351 /* Generate code for VEC_SERIES_EXPR. */
352 extern rtx expand_vec_series_expr (machine_mode, rtx, rtx, rtx);
354 /* Generate code for MULT_HIGHPART_EXPR. */
355 extern rtx expand_mult_highpart (machine_mode, rtx, rtx, rtx, bool);
357 extern rtx expand_sync_lock_test_and_set (rtx, rtx, rtx);
358 extern rtx expand_atomic_test_and_set (rtx, rtx, enum memmodel);
359 extern rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel);
360 extern bool expand_atomic_compare_and_swap (rtx *, rtx *, rtx, rtx, rtx, bool,
361 enum memmodel, enum memmodel);
362 /* Generate memory barriers. */
363 extern void expand_mem_thread_fence (enum memmodel);
364 extern void expand_mem_signal_fence (enum memmodel);
366 rtx expand_atomic_load (rtx, rtx, enum memmodel);
367 rtx expand_atomic_store (rtx, rtx, enum memmodel, bool);
368 rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
369 bool);
371 extern void expand_asm_reg_clobber_mem_blockage (HARD_REG_SET);
373 extern bool insn_operand_matches (enum insn_code icode, unsigned int opno,
374 rtx operand);
375 extern bool valid_multiword_target_p (rtx);
376 extern void create_convert_operand_from_type (class expand_operand *op,
377 rtx value, tree type);
378 extern bool maybe_legitimize_operands (enum insn_code icode,
379 unsigned int opno, unsigned int nops,
380 class expand_operand *ops);
381 extern rtx_insn *maybe_gen_insn (enum insn_code icode, unsigned int nops,
382 class expand_operand *ops);
383 extern bool maybe_expand_insn (enum insn_code icode, unsigned int nops,
384 class expand_operand *ops);
385 extern bool maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
386 class expand_operand *ops);
387 extern void expand_insn (enum insn_code icode, unsigned int nops,
388 class expand_operand *ops);
389 extern void expand_jump_insn (enum insn_code icode, unsigned int nops,
390 class expand_operand *ops);
392 extern enum rtx_code get_rtx_code_1 (enum tree_code tcode, bool unsignedp);
393 extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp);
394 extern rtx vector_compare_rtx (machine_mode cmp_mode, enum tree_code tcode,
395 tree t_op0, tree t_op1, bool unsignedp,
396 enum insn_code icode, unsigned int opno);
399 #endif /* GCC_OPTABS_H */