1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
63 /* Commonly used modes. */
65 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
66 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
67 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
68 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
70 /* Datastructures maintained for currently processed function in RTL form. */
72 struct rtl_data x_rtl
;
74 /* Indexed by pseudo register number, gives the rtx for that pseudo.
75 Allocated in parallel with regno_pointer_align.
76 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
77 with length attribute nested in top level structures. */
81 /* This is *not* reset after each function. It gives each CODE_LABEL
82 in the entire compilation a unique label number. */
84 static GTY(()) int label_num
= 1;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these are unique; no other rtx-object will be equal to any
91 rtx global_rtl
[GR_MAX
];
93 /* Commonly used RTL for hard registers. These objects are not necessarily
94 unique, so we allocate them separately from global_rtl. They are
95 initialized once per compilation unit, then copied into regno_reg_rtx
96 at the beginning of each function. */
97 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
99 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
100 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
101 record a copy of const[012]_rtx. */
103 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
107 REAL_VALUE_TYPE dconst0
;
108 REAL_VALUE_TYPE dconst1
;
109 REAL_VALUE_TYPE dconst2
;
110 REAL_VALUE_TYPE dconstm1
;
111 REAL_VALUE_TYPE dconsthalf
;
113 /* Record fixed-point constant 0 and 1. */
114 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
115 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
152 htab_t const_int_htab
;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
156 htab_t mem_attrs_htab
;
158 /* A hash table storing register attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
160 htab_t reg_attrs_htab
;
162 /* A hash table storing all CONST_DOUBLEs. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
164 htab_t const_double_htab
;
166 /* A hash table storing all CONST_FIXEDs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
168 htab_t const_fixed_htab
;
170 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
171 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
172 #define last_location (crtl->emit.x_last_location)
173 #define first_label_num (crtl->emit.x_first_label_num)
175 static rtx
make_call_insn_raw (rtx
);
176 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
177 static void set_used_decls (tree
);
178 static void mark_label_nuses (rtx
);
179 static hashval_t
const_int_htab_hash (const void *);
180 static int const_int_htab_eq (const void *, const void *);
181 static hashval_t
const_double_htab_hash (const void *);
182 static int const_double_htab_eq (const void *, const void *);
183 static rtx
lookup_const_double (rtx
);
184 static hashval_t
const_fixed_htab_hash (const void *);
185 static int const_fixed_htab_eq (const void *, const void *);
186 static rtx
lookup_const_fixed (rtx
);
187 static hashval_t
mem_attrs_htab_hash (const void *);
188 static int mem_attrs_htab_eq (const void *, const void *);
189 static mem_attrs
*get_mem_attrs (alias_set_type
, tree
, rtx
, rtx
, unsigned int,
190 addr_space_t
, enum machine_mode
);
191 static hashval_t
reg_attrs_htab_hash (const void *);
192 static int reg_attrs_htab_eq (const void *, const void *);
193 static reg_attrs
*get_reg_attrs (tree
, int);
194 static rtx
gen_const_vector (enum machine_mode
, int);
195 static void copy_rtx_if_shared_1 (rtx
*orig
);
197 /* Probability of the conditional branch currently proceeded by try_split.
198 Set to -1 otherwise. */
199 int split_branch_probability
= -1;
201 /* Returns a hash code for X (which is a really a CONST_INT). */
204 const_int_htab_hash (const void *x
)
206 return (hashval_t
) INTVAL ((const_rtx
) x
);
209 /* Returns nonzero if the value represented by X (which is really a
210 CONST_INT) is the same as that given by Y (which is really a
214 const_int_htab_eq (const void *x
, const void *y
)
216 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (const void *x
)
223 const_rtx
const value
= (const_rtx
) x
;
226 if (GET_MODE (value
) == VOIDmode
)
227 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
230 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
231 /* MODE is used in the comparison, so it should be in the hash. */
232 h
^= GET_MODE (value
);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...) */
240 const_double_htab_eq (const void *x
, const void *y
)
242 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
244 if (GET_MODE (a
) != GET_MODE (b
))
246 if (GET_MODE (a
) == VOIDmode
)
247 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
248 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
250 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
251 CONST_DOUBLE_REAL_VALUE (b
));
254 /* Returns a hash code for X (which is really a CONST_FIXED). */
257 const_fixed_htab_hash (const void *x
)
259 const_rtx
const value
= (const_rtx
) x
;
262 h
= fixed_hash (CONST_FIXED_VALUE (value
));
263 /* MODE is used in the comparison, so it should be in the hash. */
264 h
^= GET_MODE (value
);
268 /* Returns nonzero if the value represented by X (really a ...)
269 is the same as that represented by Y (really a ...). */
272 const_fixed_htab_eq (const void *x
, const void *y
)
274 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
276 if (GET_MODE (a
) != GET_MODE (b
))
278 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
281 /* Returns a hash code for X (which is a really a mem_attrs *). */
284 mem_attrs_htab_hash (const void *x
)
286 const mem_attrs
*const p
= (const mem_attrs
*) x
;
288 return (p
->alias
^ (p
->align
* 1000)
289 ^ (p
->addrspace
* 4000)
290 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
291 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
292 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
295 /* Returns nonzero if the value represented by X (which is really a
296 mem_attrs *) is the same as that given by Y (which is also really a
300 mem_attrs_htab_eq (const void *x
, const void *y
)
302 const mem_attrs
*const p
= (const mem_attrs
*) x
;
303 const mem_attrs
*const q
= (const mem_attrs
*) y
;
305 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
306 && p
->size
== q
->size
&& p
->align
== q
->align
307 && p
->addrspace
== q
->addrspace
308 && (p
->expr
== q
->expr
309 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
310 && operand_equal_p (p
->expr
, q
->expr
, 0))));
313 /* Allocate a new mem_attrs structure and insert it into the hash table if
314 one identical to it is not already in the table. We are doing this for
318 get_mem_attrs (alias_set_type alias
, tree expr
, rtx offset
, rtx size
,
319 unsigned int align
, addr_space_t addrspace
, enum machine_mode mode
)
324 /* If everything is the default, we can just return zero.
325 This must match what the corresponding MEM_* macros return when the
326 field is not present. */
327 if (alias
== 0 && expr
== 0 && offset
== 0 && addrspace
== 0
329 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
330 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
331 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
336 attrs
.offset
= offset
;
339 attrs
.addrspace
= addrspace
;
341 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
344 *slot
= ggc_alloc_mem_attrs ();
345 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
348 return (mem_attrs
*) *slot
;
351 /* Returns a hash code for X (which is a really a reg_attrs *). */
354 reg_attrs_htab_hash (const void *x
)
356 const reg_attrs
*const p
= (const reg_attrs
*) x
;
358 return ((p
->offset
* 1000) ^ (long) p
->decl
);
361 /* Returns nonzero if the value represented by X (which is really a
362 reg_attrs *) is the same as that given by Y (which is also really a
366 reg_attrs_htab_eq (const void *x
, const void *y
)
368 const reg_attrs
*const p
= (const reg_attrs
*) x
;
369 const reg_attrs
*const q
= (const reg_attrs
*) y
;
371 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
373 /* Allocate a new reg_attrs structure and insert it into the hash table if
374 one identical to it is not already in the table. We are doing this for
378 get_reg_attrs (tree decl
, int offset
)
383 /* If everything is the default, we can just return zero. */
384 if (decl
== 0 && offset
== 0)
388 attrs
.offset
= offset
;
390 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
393 *slot
= ggc_alloc_reg_attrs ();
394 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
397 return (reg_attrs
*) *slot
;
402 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
408 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
409 MEM_VOLATILE_P (x
) = true;
415 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
416 don't attempt to share with the various global pieces of rtl (such as
417 frame_pointer_rtx). */
420 gen_raw_REG (enum machine_mode mode
, int regno
)
422 rtx x
= gen_rtx_raw_REG (mode
, regno
);
423 ORIGINAL_REGNO (x
) = regno
;
427 /* There are some RTL codes that require special attention; the generation
428 functions do the raw handling. If you add to this list, modify
429 special_rtx in gengenrtl.c as well. */
432 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
436 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
437 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
439 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
440 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
441 return const_true_rtx
;
444 /* Look up the CONST_INT in the hash table. */
445 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
446 (hashval_t
) arg
, INSERT
);
448 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
454 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
456 return GEN_INT (trunc_int_for_mode (c
, mode
));
459 /* CONST_DOUBLEs might be created from pairs of integers, or from
460 REAL_VALUE_TYPEs. Also, their length is known only at run time,
461 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
463 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
464 hash table. If so, return its counterpart; otherwise add it
465 to the hash table and return it. */
467 lookup_const_double (rtx real
)
469 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
476 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
477 VALUE in mode MODE. */
479 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
481 rtx real
= rtx_alloc (CONST_DOUBLE
);
482 PUT_MODE (real
, mode
);
486 return lookup_const_double (real
);
489 /* Determine whether FIXED, a CONST_FIXED, already exists in the
490 hash table. If so, return its counterpart; otherwise add it
491 to the hash table and return it. */
494 lookup_const_fixed (rtx fixed
)
496 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
503 /* Return a CONST_FIXED rtx for a fixed-point value specified by
504 VALUE in mode MODE. */
507 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
509 rtx fixed
= rtx_alloc (CONST_FIXED
);
510 PUT_MODE (fixed
, mode
);
514 return lookup_const_fixed (fixed
);
517 /* Constructs double_int from rtx CST. */
520 rtx_to_double_int (const_rtx cst
)
524 if (CONST_INT_P (cst
))
525 r
= shwi_to_double_int (INTVAL (cst
));
526 else if (CONST_DOUBLE_P (cst
) && GET_MODE (cst
) == VOIDmode
)
528 r
.low
= CONST_DOUBLE_LOW (cst
);
529 r
.high
= CONST_DOUBLE_HIGH (cst
);
538 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
542 immed_double_int_const (double_int i
, enum machine_mode mode
)
544 return immed_double_const (i
.low
, i
.high
, mode
);
547 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
548 of ints: I0 is the low-order word and I1 is the high-order word.
549 Do not use this routine for non-integer modes; convert to
550 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
553 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
558 /* There are the following cases (note that there are no modes with
559 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
561 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
563 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
564 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
565 from copies of the sign bit, and sign of i0 and i1 are the same), then
566 we return a CONST_INT for i0.
567 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
568 if (mode
!= VOIDmode
)
570 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
571 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
572 /* We can get a 0 for an error mark. */
573 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
574 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
576 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
577 return gen_int_mode (i0
, mode
);
579 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
582 /* If this integer fits in one word, return a CONST_INT. */
583 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
586 /* We use VOIDmode for integers. */
587 value
= rtx_alloc (CONST_DOUBLE
);
588 PUT_MODE (value
, VOIDmode
);
590 CONST_DOUBLE_LOW (value
) = i0
;
591 CONST_DOUBLE_HIGH (value
) = i1
;
593 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
594 XWINT (value
, i
) = 0;
596 return lookup_const_double (value
);
600 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
602 /* In case the MD file explicitly references the frame pointer, have
603 all such references point to the same frame pointer. This is
604 used during frame pointer elimination to distinguish the explicit
605 references to these registers from pseudos that happened to be
608 If we have eliminated the frame pointer or arg pointer, we will
609 be using it as a normal register, for example as a spill
610 register. In such cases, we might be accessing it in a mode that
611 is not Pmode and therefore cannot use the pre-allocated rtx.
613 Also don't do this when we are making new REGs in reload, since
614 we don't want to get confused with the real pointers. */
616 if (mode
== Pmode
&& !reload_in_progress
)
618 if (regno
== FRAME_POINTER_REGNUM
619 && (!reload_completed
|| frame_pointer_needed
))
620 return frame_pointer_rtx
;
621 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
622 if (regno
== HARD_FRAME_POINTER_REGNUM
623 && (!reload_completed
|| frame_pointer_needed
))
624 return hard_frame_pointer_rtx
;
626 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
627 if (regno
== ARG_POINTER_REGNUM
)
628 return arg_pointer_rtx
;
630 #ifdef RETURN_ADDRESS_POINTER_REGNUM
631 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
632 return return_address_pointer_rtx
;
634 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
635 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
636 return pic_offset_table_rtx
;
637 if (regno
== STACK_POINTER_REGNUM
)
638 return stack_pointer_rtx
;
642 /* If the per-function register table has been set up, try to re-use
643 an existing entry in that table to avoid useless generation of RTL.
645 This code is disabled for now until we can fix the various backends
646 which depend on having non-shared hard registers in some cases. Long
647 term we want to re-enable this code as it can significantly cut down
648 on the amount of useless RTL that gets generated.
650 We'll also need to fix some code that runs after reload that wants to
651 set ORIGINAL_REGNO. */
656 && regno
< FIRST_PSEUDO_REGISTER
657 && reg_raw_mode
[regno
] == mode
)
658 return regno_reg_rtx
[regno
];
661 return gen_raw_REG (mode
, regno
);
665 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
667 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
669 /* This field is not cleared by the mere allocation of the rtx, so
676 /* Generate a memory referring to non-trapping constant memory. */
679 gen_const_mem (enum machine_mode mode
, rtx addr
)
681 rtx mem
= gen_rtx_MEM (mode
, addr
);
682 MEM_READONLY_P (mem
) = 1;
683 MEM_NOTRAP_P (mem
) = 1;
687 /* Generate a MEM referring to fixed portions of the frame, e.g., register
691 gen_frame_mem (enum machine_mode mode
, rtx addr
)
693 rtx mem
= gen_rtx_MEM (mode
, addr
);
694 MEM_NOTRAP_P (mem
) = 1;
695 set_mem_alias_set (mem
, get_frame_alias_set ());
699 /* Generate a MEM referring to a temporary use of the stack, not part
700 of the fixed stack frame. For example, something which is pushed
701 by a target splitter. */
703 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
705 rtx mem
= gen_rtx_MEM (mode
, addr
);
706 MEM_NOTRAP_P (mem
) = 1;
707 if (!cfun
->calls_alloca
)
708 set_mem_alias_set (mem
, get_frame_alias_set ());
712 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
713 this construct would be valid, and false otherwise. */
716 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
717 const_rtx reg
, unsigned int offset
)
719 unsigned int isize
= GET_MODE_SIZE (imode
);
720 unsigned int osize
= GET_MODE_SIZE (omode
);
722 /* All subregs must be aligned. */
723 if (offset
% osize
!= 0)
726 /* The subreg offset cannot be outside the inner object. */
730 /* ??? This should not be here. Temporarily continue to allow word_mode
731 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
732 Generally, backends are doing something sketchy but it'll take time to
734 if (omode
== word_mode
)
736 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
737 is the culprit here, and not the backends. */
738 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
740 /* Allow component subregs of complex and vector. Though given the below
741 extraction rules, it's not always clear what that means. */
742 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
743 && GET_MODE_INNER (imode
) == omode
)
745 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
746 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
747 represent this. It's questionable if this ought to be represented at
748 all -- why can't this all be hidden in post-reload splitters that make
749 arbitrarily mode changes to the registers themselves. */
750 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
752 /* Subregs involving floating point modes are not allowed to
753 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
754 (subreg:SI (reg:DF) 0) isn't. */
755 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
761 /* Paradoxical subregs must have offset zero. */
765 /* This is a normal subreg. Verify that the offset is representable. */
767 /* For hard registers, we already have most of these rules collected in
768 subreg_offset_representable_p. */
769 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
771 unsigned int regno
= REGNO (reg
);
773 #ifdef CANNOT_CHANGE_MODE_CLASS
774 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
775 && GET_MODE_INNER (imode
) == omode
)
777 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
781 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
784 /* For pseudo registers, we want most of the same checks. Namely:
785 If the register no larger than a word, the subreg must be lowpart.
786 If the register is larger than a word, the subreg must be the lowpart
787 of a subword. A subreg does *not* perform arbitrary bit extraction.
788 Given that we've already checked mode/offset alignment, we only have
789 to check subword subregs here. */
790 if (osize
< UNITS_PER_WORD
)
792 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
793 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
794 if (offset
% UNITS_PER_WORD
!= low_off
)
801 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
803 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
804 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
807 /* Generate a SUBREG representing the least-significant part of REG if MODE
808 is smaller than mode of REG, otherwise paradoxical SUBREG. */
811 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
813 enum machine_mode inmode
;
815 inmode
= GET_MODE (reg
);
816 if (inmode
== VOIDmode
)
818 return gen_rtx_SUBREG (mode
, reg
,
819 subreg_lowpart_offset (mode
, inmode
));
823 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
826 gen_rtvec (int n
, ...)
834 /* Don't allocate an empty rtvec... */
838 rt_val
= rtvec_alloc (n
);
840 for (i
= 0; i
< n
; i
++)
841 rt_val
->elem
[i
] = va_arg (p
, rtx
);
848 gen_rtvec_v (int n
, rtx
*argp
)
853 /* Don't allocate an empty rtvec... */
857 rt_val
= rtvec_alloc (n
);
859 for (i
= 0; i
< n
; i
++)
860 rt_val
->elem
[i
] = *argp
++;
865 /* Return the number of bytes between the start of an OUTER_MODE
866 in-memory value and the start of an INNER_MODE in-memory value,
867 given that the former is a lowpart of the latter. It may be a
868 paradoxical lowpart, in which case the offset will be negative
869 on big-endian targets. */
872 byte_lowpart_offset (enum machine_mode outer_mode
,
873 enum machine_mode inner_mode
)
875 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
876 return subreg_lowpart_offset (outer_mode
, inner_mode
);
878 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
881 /* Generate a REG rtx for a new pseudo register of mode MODE.
882 This pseudo is assigned the next sequential register number. */
885 gen_reg_rtx (enum machine_mode mode
)
888 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
890 gcc_assert (can_create_pseudo_p ());
892 /* If a virtual register with bigger mode alignment is generated,
893 increase stack alignment estimation because it might be spilled
895 if (SUPPORTS_STACK_ALIGNMENT
896 && crtl
->stack_alignment_estimated
< align
897 && !crtl
->stack_realign_processed
)
899 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
900 if (crtl
->stack_alignment_estimated
< min_align
)
901 crtl
->stack_alignment_estimated
= min_align
;
904 if (generating_concat_p
905 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
906 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
908 /* For complex modes, don't make a single pseudo.
909 Instead, make a CONCAT of two pseudos.
910 This allows noncontiguous allocation of the real and imaginary parts,
911 which makes much better code. Besides, allocating DCmode
912 pseudos overstrains reload on some machines like the 386. */
913 rtx realpart
, imagpart
;
914 enum machine_mode partmode
= GET_MODE_INNER (mode
);
916 realpart
= gen_reg_rtx (partmode
);
917 imagpart
= gen_reg_rtx (partmode
);
918 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
921 /* Make sure regno_pointer_align, and regno_reg_rtx are large
922 enough to have an element for this pseudo reg number. */
924 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
926 int old_size
= crtl
->emit
.regno_pointer_align_length
;
930 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
931 memset (tmp
+ old_size
, 0, old_size
);
932 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
934 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
935 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
936 regno_reg_rtx
= new1
;
938 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
941 val
= gen_raw_REG (mode
, reg_rtx_no
);
942 regno_reg_rtx
[reg_rtx_no
++] = val
;
946 /* Update NEW with the same attributes as REG, but with OFFSET added
947 to the REG_OFFSET. */
950 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
952 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
953 REG_OFFSET (reg
) + offset
);
956 /* Generate a register with same attributes as REG, but with OFFSET
957 added to the REG_OFFSET. */
960 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
963 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
965 update_reg_offset (new_rtx
, reg
, offset
);
969 /* Generate a new pseudo-register with the same attributes as REG, but
970 with OFFSET added to the REG_OFFSET. */
973 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
975 rtx new_rtx
= gen_reg_rtx (mode
);
977 update_reg_offset (new_rtx
, reg
, offset
);
981 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
982 new register is a (possibly paradoxical) lowpart of the old one. */
985 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
987 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
988 PUT_MODE (reg
, mode
);
991 /* Copy REG's attributes from X, if X has any attributes. If REG and X
992 have different modes, REG is a (possibly paradoxical) lowpart of X. */
995 set_reg_attrs_from_value (rtx reg
, rtx x
)
999 /* Hard registers can be reused for multiple purposes within the same
1000 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1001 on them is wrong. */
1002 if (HARD_REGISTER_P (reg
))
1005 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1008 if (MEM_OFFSET (x
) && CONST_INT_P (MEM_OFFSET (x
)))
1010 = get_reg_attrs (MEM_EXPR (x
), INTVAL (MEM_OFFSET (x
)) + offset
);
1011 if (MEM_POINTER (x
))
1012 mark_reg_pointer (reg
, 0);
1017 update_reg_offset (reg
, x
, offset
);
1018 if (REG_POINTER (x
))
1019 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1023 /* Generate a REG rtx for a new pseudo register, copying the mode
1024 and attributes from X. */
1027 gen_reg_rtx_and_attrs (rtx x
)
1029 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1030 set_reg_attrs_from_value (reg
, x
);
1034 /* Set the register attributes for registers contained in PARM_RTX.
1035 Use needed values from memory attributes of MEM. */
1038 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1040 if (REG_P (parm_rtx
))
1041 set_reg_attrs_from_value (parm_rtx
, mem
);
1042 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1044 /* Check for a NULL entry in the first slot, used to indicate that the
1045 parameter goes both on the stack and in registers. */
1046 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1047 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1049 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1050 if (REG_P (XEXP (x
, 0)))
1051 REG_ATTRS (XEXP (x
, 0))
1052 = get_reg_attrs (MEM_EXPR (mem
),
1053 INTVAL (XEXP (x
, 1)));
1058 /* Set the REG_ATTRS for registers in value X, given that X represents
1062 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1064 if (GET_CODE (x
) == SUBREG
)
1066 gcc_assert (subreg_lowpart_p (x
));
1071 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1073 if (GET_CODE (x
) == CONCAT
)
1075 if (REG_P (XEXP (x
, 0)))
1076 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1077 if (REG_P (XEXP (x
, 1)))
1078 REG_ATTRS (XEXP (x
, 1))
1079 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1081 if (GET_CODE (x
) == PARALLEL
)
1085 /* Check for a NULL entry, used to indicate that the parameter goes
1086 both on the stack and in registers. */
1087 if (XEXP (XVECEXP (x
, 0, 0), 0))
1092 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1094 rtx y
= XVECEXP (x
, 0, i
);
1095 if (REG_P (XEXP (y
, 0)))
1096 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1101 /* Assign the RTX X to declaration T. */
1104 set_decl_rtl (tree t
, rtx x
)
1106 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1108 set_reg_attrs_for_decl_rtl (t
, x
);
1111 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1112 if the ABI requires the parameter to be passed by reference. */
1115 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1117 DECL_INCOMING_RTL (t
) = x
;
1118 if (x
&& !by_reference_p
)
1119 set_reg_attrs_for_decl_rtl (t
, x
);
1122 /* Identify REG (which may be a CONCAT) as a user register. */
1125 mark_user_reg (rtx reg
)
1127 if (GET_CODE (reg
) == CONCAT
)
1129 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1130 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1134 gcc_assert (REG_P (reg
));
1135 REG_USERVAR_P (reg
) = 1;
1139 /* Identify REG as a probable pointer register and show its alignment
1140 as ALIGN, if nonzero. */
1143 mark_reg_pointer (rtx reg
, int align
)
1145 if (! REG_POINTER (reg
))
1147 REG_POINTER (reg
) = 1;
1150 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1152 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1153 /* We can no-longer be sure just how aligned this pointer is. */
1154 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1157 /* Return 1 plus largest pseudo reg number used in the current function. */
1165 /* Return 1 + the largest label number used so far in the current function. */
1168 max_label_num (void)
1173 /* Return first label number used in this function (if any were used). */
1176 get_first_label_num (void)
1178 return first_label_num
;
1181 /* If the rtx for label was created during the expansion of a nested
1182 function, then first_label_num won't include this label number.
1183 Fix this now so that array indices work later. */
1186 maybe_set_first_label_num (rtx x
)
1188 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1189 first_label_num
= CODE_LABEL_NUMBER (x
);
1192 /* Return a value representing some low-order bits of X, where the number
1193 of low-order bits is given by MODE. Note that no conversion is done
1194 between floating-point and fixed-point values, rather, the bit
1195 representation is returned.
1197 This function handles the cases in common between gen_lowpart, below,
1198 and two variants in cse.c and combine.c. These are the cases that can
1199 be safely handled at all points in the compilation.
1201 If this is not a case we can handle, return 0. */
1204 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1206 int msize
= GET_MODE_SIZE (mode
);
1209 enum machine_mode innermode
;
1211 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1212 so we have to make one up. Yuk. */
1213 innermode
= GET_MODE (x
);
1215 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1216 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1217 else if (innermode
== VOIDmode
)
1218 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1220 xsize
= GET_MODE_SIZE (innermode
);
1222 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1224 if (innermode
== mode
)
1227 /* MODE must occupy no more words than the mode of X. */
1228 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1229 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1232 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1233 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1236 offset
= subreg_lowpart_offset (mode
, innermode
);
1238 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1239 && (GET_MODE_CLASS (mode
) == MODE_INT
1240 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1242 /* If we are getting the low-order part of something that has been
1243 sign- or zero-extended, we can either just use the object being
1244 extended or make a narrower extension. If we want an even smaller
1245 piece than the size of the object being extended, call ourselves
1248 This case is used mostly by combine and cse. */
1250 if (GET_MODE (XEXP (x
, 0)) == mode
)
1252 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1253 return gen_lowpart_common (mode
, XEXP (x
, 0));
1254 else if (msize
< xsize
)
1255 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1257 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1258 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1259 || GET_CODE (x
) == CONST_DOUBLE
|| CONST_INT_P (x
))
1260 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1262 /* Otherwise, we can't do this. */
1267 gen_highpart (enum machine_mode mode
, rtx x
)
1269 unsigned int msize
= GET_MODE_SIZE (mode
);
1272 /* This case loses if X is a subreg. To catch bugs early,
1273 complain if an invalid MODE is used even in other cases. */
1274 gcc_assert (msize
<= UNITS_PER_WORD
1275 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1277 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1278 subreg_highpart_offset (mode
, GET_MODE (x
)));
1279 gcc_assert (result
);
1281 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1282 the target if we have a MEM. gen_highpart must return a valid operand,
1283 emitting code if necessary to do so. */
1286 result
= validize_mem (result
);
1287 gcc_assert (result
);
1293 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1294 be VOIDmode constant. */
1296 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1298 if (GET_MODE (exp
) != VOIDmode
)
1300 gcc_assert (GET_MODE (exp
) == innermode
);
1301 return gen_highpart (outermode
, exp
);
1303 return simplify_gen_subreg (outermode
, exp
, innermode
,
1304 subreg_highpart_offset (outermode
, innermode
));
1307 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1310 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1312 unsigned int offset
= 0;
1313 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1317 if (WORDS_BIG_ENDIAN
)
1318 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1319 if (BYTES_BIG_ENDIAN
)
1320 offset
+= difference
% UNITS_PER_WORD
;
1326 /* Return offset in bytes to get OUTERMODE high part
1327 of the value in mode INNERMODE stored in memory in target format. */
1329 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1331 unsigned int offset
= 0;
1332 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1334 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1338 if (! WORDS_BIG_ENDIAN
)
1339 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1340 if (! BYTES_BIG_ENDIAN
)
1341 offset
+= difference
% UNITS_PER_WORD
;
1347 /* Return 1 iff X, assumed to be a SUBREG,
1348 refers to the least significant part of its containing reg.
1349 If X is not a SUBREG, always return 1 (it is its own low part!). */
1352 subreg_lowpart_p (const_rtx x
)
1354 if (GET_CODE (x
) != SUBREG
)
1356 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1359 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1360 == SUBREG_BYTE (x
));
1363 /* Return subword OFFSET of operand OP.
1364 The word number, OFFSET, is interpreted as the word number starting
1365 at the low-order address. OFFSET 0 is the low-order word if not
1366 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1368 If we cannot extract the required word, we return zero. Otherwise,
1369 an rtx corresponding to the requested word will be returned.
1371 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1372 reload has completed, a valid address will always be returned. After
1373 reload, if a valid address cannot be returned, we return zero.
1375 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1376 it is the responsibility of the caller.
1378 MODE is the mode of OP in case it is a CONST_INT.
1380 ??? This is still rather broken for some cases. The problem for the
1381 moment is that all callers of this thing provide no 'goal mode' to
1382 tell us to work with. This exists because all callers were written
1383 in a word based SUBREG world.
1384 Now use of this function can be deprecated by simplify_subreg in most
1389 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1391 if (mode
== VOIDmode
)
1392 mode
= GET_MODE (op
);
1394 gcc_assert (mode
!= VOIDmode
);
1396 /* If OP is narrower than a word, fail. */
1398 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1401 /* If we want a word outside OP, return zero. */
1403 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1406 /* Form a new MEM at the requested address. */
1409 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1411 if (! validate_address
)
1414 else if (reload_completed
)
1416 if (! strict_memory_address_addr_space_p (word_mode
,
1418 MEM_ADDR_SPACE (op
)))
1422 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1425 /* Rest can be handled by simplify_subreg. */
1426 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1429 /* Similar to `operand_subword', but never return 0. If we can't
1430 extract the required subword, put OP into a register and try again.
1431 The second attempt must succeed. We always validate the address in
1434 MODE is the mode of OP, in case it is CONST_INT. */
1437 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1439 rtx result
= operand_subword (op
, offset
, 1, mode
);
1444 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1446 /* If this is a register which can not be accessed by words, copy it
1447 to a pseudo register. */
1449 op
= copy_to_reg (op
);
1451 op
= force_reg (mode
, op
);
1454 result
= operand_subword (op
, offset
, 1, mode
);
1455 gcc_assert (result
);
1460 /* Returns 1 if both MEM_EXPR can be considered equal
1464 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1469 if (! expr1
|| ! expr2
)
1472 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1475 return operand_equal_p (expr1
, expr2
, 0);
1478 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1479 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1483 get_mem_align_offset (rtx mem
, unsigned int align
)
1486 unsigned HOST_WIDE_INT offset
;
1488 /* This function can't use
1489 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1490 || !CONST_INT_P (MEM_OFFSET (mem))
1491 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1495 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1497 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1498 for <variable>. get_inner_reference doesn't handle it and
1499 even if it did, the alignment in that case needs to be determined
1500 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1501 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1502 isn't sufficiently aligned, the object it is in might be. */
1503 gcc_assert (MEM_P (mem
));
1504 expr
= MEM_EXPR (mem
);
1505 if (expr
== NULL_TREE
1506 || MEM_OFFSET (mem
) == NULL_RTX
1507 || !CONST_INT_P (MEM_OFFSET (mem
)))
1510 offset
= INTVAL (MEM_OFFSET (mem
));
1513 if (DECL_ALIGN (expr
) < align
)
1516 else if (INDIRECT_REF_P (expr
))
1518 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1521 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1525 tree inner
= TREE_OPERAND (expr
, 0);
1526 tree field
= TREE_OPERAND (expr
, 1);
1527 tree byte_offset
= component_ref_field_offset (expr
);
1528 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1531 || !host_integerp (byte_offset
, 1)
1532 || !host_integerp (bit_offset
, 1))
1535 offset
+= tree_low_cst (byte_offset
, 1);
1536 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1538 if (inner
== NULL_TREE
)
1540 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1541 < (unsigned int) align
)
1545 else if (DECL_P (inner
))
1547 if (DECL_ALIGN (inner
) < align
)
1551 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1559 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1562 /* Given REF (a MEM) and T, either the type of X or the expression
1563 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1564 if we are making a new object of this type. BITPOS is nonzero if
1565 there is an offset outstanding on T that will be applied later. */
1568 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1569 HOST_WIDE_INT bitpos
)
1571 alias_set_type alias
= MEM_ALIAS_SET (ref
);
1572 tree expr
= MEM_EXPR (ref
);
1573 rtx offset
= MEM_OFFSET (ref
);
1574 rtx size
= MEM_SIZE (ref
);
1575 unsigned int align
= MEM_ALIGN (ref
);
1576 HOST_WIDE_INT apply_bitpos
= 0;
1579 /* It can happen that type_for_mode was given a mode for which there
1580 is no language-level type. In which case it returns NULL, which
1585 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1586 if (type
== error_mark_node
)
1589 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1590 wrong answer, as it assumes that DECL_RTL already has the right alias
1591 info. Callers should not set DECL_RTL until after the call to
1592 set_mem_attributes. */
1593 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1595 /* Get the alias set from the expression or type (perhaps using a
1596 front-end routine) and use it. */
1597 alias
= get_alias_set (t
);
1599 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1600 MEM_IN_STRUCT_P (ref
)
1601 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1602 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1604 /* If we are making an object of this type, or if this is a DECL, we know
1605 that it is a scalar if the type is not an aggregate. */
1606 if ((objectp
|| DECL_P (t
))
1607 && ! AGGREGATE_TYPE_P (type
)
1608 && TREE_CODE (type
) != COMPLEX_TYPE
)
1609 MEM_SCALAR_P (ref
) = 1;
1611 /* We can set the alignment from the type if we are making an object,
1612 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1613 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1614 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1615 || TYPE_ALIGN_OK (type
))
1616 align
= MAX (align
, TYPE_ALIGN (type
));
1618 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1620 if (integer_zerop (TREE_OPERAND (t
, 1)))
1621 /* We don't know anything about the alignment. */
1622 align
= BITS_PER_UNIT
;
1624 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1627 /* If the size is known, we can set that. */
1628 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1629 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1631 /* If T is not a type, we may be able to deduce some more information about
1636 bool align_computed
= false;
1638 if (TREE_THIS_VOLATILE (t
))
1639 MEM_VOLATILE_P (ref
) = 1;
1641 /* Now remove any conversions: they don't change what the underlying
1642 object is. Likewise for SAVE_EXPR. */
1643 while (CONVERT_EXPR_P (t
)
1644 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1645 || TREE_CODE (t
) == SAVE_EXPR
)
1646 t
= TREE_OPERAND (t
, 0);
1648 /* We may look through structure-like accesses for the purposes of
1649 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1651 while (TREE_CODE (base
) == COMPONENT_REF
1652 || TREE_CODE (base
) == REALPART_EXPR
1653 || TREE_CODE (base
) == IMAGPART_EXPR
1654 || TREE_CODE (base
) == BIT_FIELD_REF
)
1655 base
= TREE_OPERAND (base
, 0);
1659 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1660 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1662 MEM_NOTRAP_P (ref
) = 1;
1665 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1667 base
= get_base_address (base
);
1668 if (base
&& DECL_P (base
)
1669 && TREE_READONLY (base
)
1670 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1671 MEM_READONLY_P (ref
) = 1;
1673 /* If this expression uses it's parent's alias set, mark it such
1674 that we won't change it. */
1675 if (component_uses_parent_alias_set (t
))
1676 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1678 /* If this is a decl, set the attributes of the MEM from it. */
1682 offset
= const0_rtx
;
1683 apply_bitpos
= bitpos
;
1684 size
= (DECL_SIZE_UNIT (t
)
1685 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1686 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1687 align
= DECL_ALIGN (t
);
1688 align_computed
= true;
1691 /* If this is a constant, we know the alignment. */
1692 else if (CONSTANT_CLASS_P (t
))
1694 align
= TYPE_ALIGN (type
);
1695 #ifdef CONSTANT_ALIGNMENT
1696 align
= CONSTANT_ALIGNMENT (t
, align
);
1698 align_computed
= true;
1701 /* If this is a field reference and not a bit-field, record it. */
1702 /* ??? There is some information that can be gleaned from bit-fields,
1703 such as the word offset in the structure that might be modified.
1704 But skip it for now. */
1705 else if (TREE_CODE (t
) == COMPONENT_REF
1706 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1709 offset
= const0_rtx
;
1710 apply_bitpos
= bitpos
;
1711 /* ??? Any reason the field size would be different than
1712 the size we got from the type? */
1715 /* If this is an array reference, look for an outer field reference. */
1716 else if (TREE_CODE (t
) == ARRAY_REF
)
1718 tree off_tree
= size_zero_node
;
1719 /* We can't modify t, because we use it at the end of the
1725 tree index
= TREE_OPERAND (t2
, 1);
1726 tree low_bound
= array_ref_low_bound (t2
);
1727 tree unit_size
= array_ref_element_size (t2
);
1729 /* We assume all arrays have sizes that are a multiple of a byte.
1730 First subtract the lower bound, if any, in the type of the
1731 index, then convert to sizetype and multiply by the size of
1732 the array element. */
1733 if (! integer_zerop (low_bound
))
1734 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1737 off_tree
= size_binop (PLUS_EXPR
,
1738 size_binop (MULT_EXPR
,
1739 fold_convert (sizetype
,
1743 t2
= TREE_OPERAND (t2
, 0);
1745 while (TREE_CODE (t2
) == ARRAY_REF
);
1751 if (host_integerp (off_tree
, 1))
1753 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1754 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1755 align
= DECL_ALIGN (t2
);
1756 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1758 align_computed
= true;
1759 offset
= GEN_INT (ioff
);
1760 apply_bitpos
= bitpos
;
1763 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1767 if (host_integerp (off_tree
, 1))
1769 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1770 apply_bitpos
= bitpos
;
1772 /* ??? Any reason the field size would be different than
1773 the size we got from the type? */
1776 /* If this is an indirect reference, record it. */
1777 else if (TREE_CODE (t
) == INDIRECT_REF
1778 || TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1781 offset
= const0_rtx
;
1782 apply_bitpos
= bitpos
;
1786 /* If this is an indirect reference, record it. */
1787 else if (TREE_CODE (t
) == INDIRECT_REF
1788 || TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1791 offset
= const0_rtx
;
1792 apply_bitpos
= bitpos
;
1795 if (!align_computed
&& !INDIRECT_REF_P (t
))
1797 unsigned int obj_align
1798 = get_object_alignment (t
, align
, BIGGEST_ALIGNMENT
);
1799 align
= MAX (align
, obj_align
);
1803 /* If we modified OFFSET based on T, then subtract the outstanding
1804 bit position offset. Similarly, increase the size of the accessed
1805 object to contain the negative offset. */
1808 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1810 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1813 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1815 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1816 we're overlapping. */
1821 /* Now set the attributes we computed above. */
1823 = get_mem_attrs (alias
, expr
, offset
, size
, align
,
1824 TYPE_ADDR_SPACE (type
), GET_MODE (ref
));
1826 /* If this is already known to be a scalar or aggregate, we are done. */
1827 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1830 /* If it is a reference into an aggregate, this is part of an aggregate.
1831 Otherwise we don't know. */
1832 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1833 || TREE_CODE (t
) == ARRAY_RANGE_REF
1834 || TREE_CODE (t
) == BIT_FIELD_REF
)
1835 MEM_IN_STRUCT_P (ref
) = 1;
1839 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1841 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1844 /* Set the alias set of MEM to SET. */
1847 set_mem_alias_set (rtx mem
, alias_set_type set
)
1849 #ifdef ENABLE_CHECKING
1850 /* If the new and old alias sets don't conflict, something is wrong. */
1851 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1854 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1855 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1856 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1859 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1862 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1864 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1865 MEM_OFFSET (mem
), MEM_SIZE (mem
),
1866 MEM_ALIGN (mem
), addrspace
, GET_MODE (mem
));
1869 /* Set the alignment of MEM to ALIGN bits. */
1872 set_mem_align (rtx mem
, unsigned int align
)
1874 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1875 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1876 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1879 /* Set the expr for MEM to EXPR. */
1882 set_mem_expr (rtx mem
, tree expr
)
1885 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1886 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1887 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1890 /* Set the offset of MEM to OFFSET. */
1893 set_mem_offset (rtx mem
, rtx offset
)
1895 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1896 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1897 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1900 /* Set the size of MEM to SIZE. */
1903 set_mem_size (rtx mem
, rtx size
)
1905 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1906 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1907 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1910 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1911 and its address changed to ADDR. (VOIDmode means don't change the mode.
1912 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1913 returned memory location is required to be valid. The memory
1914 attributes are not changed. */
1917 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1922 gcc_assert (MEM_P (memref
));
1923 as
= MEM_ADDR_SPACE (memref
);
1924 if (mode
== VOIDmode
)
1925 mode
= GET_MODE (memref
);
1927 addr
= XEXP (memref
, 0);
1928 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1929 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
1934 if (reload_in_progress
|| reload_completed
)
1935 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
1937 addr
= memory_address_addr_space (mode
, addr
, as
);
1940 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1943 new_rtx
= gen_rtx_MEM (mode
, addr
);
1944 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1948 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1949 way we are changing MEMREF, so we only preserve the alias set. */
1952 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1954 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1), size
;
1955 enum machine_mode mmode
= GET_MODE (new_rtx
);
1958 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1959 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1961 /* If there are no changes, just return the original memory reference. */
1962 if (new_rtx
== memref
)
1964 if (MEM_ATTRS (memref
) == 0
1965 || (MEM_EXPR (memref
) == NULL
1966 && MEM_OFFSET (memref
) == NULL
1967 && MEM_SIZE (memref
) == size
1968 && MEM_ALIGN (memref
) == align
))
1971 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1972 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1976 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
,
1977 MEM_ADDR_SPACE (memref
), mmode
);
1982 /* Return a memory reference like MEMREF, but with its mode changed
1983 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1984 nonzero, the memory address is forced to be valid.
1985 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1986 and caller is responsible for adjusting MEMREF base register. */
1989 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1990 int validate
, int adjust
)
1992 rtx addr
= XEXP (memref
, 0);
1994 rtx memoffset
= MEM_OFFSET (memref
);
1996 unsigned int memalign
= MEM_ALIGN (memref
);
1997 addr_space_t as
= MEM_ADDR_SPACE (memref
);
1998 enum machine_mode address_mode
= targetm
.addr_space
.address_mode (as
);
2001 /* If there are no changes, just return the original memory reference. */
2002 if (mode
== GET_MODE (memref
) && !offset
2003 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2006 /* ??? Prefer to create garbage instead of creating shared rtl.
2007 This may happen even if offset is nonzero -- consider
2008 (plus (plus reg reg) const_int) -- so do this always. */
2009 addr
= copy_rtx (addr
);
2011 /* Convert a possibly large offset to a signed value within the
2012 range of the target address space. */
2013 pbits
= GET_MODE_BITSIZE (address_mode
);
2014 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2016 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2017 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2023 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2024 object, we can merge it into the LO_SUM. */
2025 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2027 && (unsigned HOST_WIDE_INT
) offset
2028 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2029 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2030 plus_constant (XEXP (addr
, 1), offset
));
2032 addr
= plus_constant (addr
, offset
);
2035 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2037 /* If the address is a REG, change_address_1 rightfully returns memref,
2038 but this would destroy memref's MEM_ATTRS. */
2039 if (new_rtx
== memref
&& offset
!= 0)
2040 new_rtx
= copy_rtx (new_rtx
);
2042 /* Compute the new values of the memory attributes due to this adjustment.
2043 We add the offsets and update the alignment. */
2045 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2047 /* Compute the new alignment by taking the MIN of the alignment and the
2048 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2053 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2055 /* We can compute the size in a number of ways. */
2056 if (GET_MODE (new_rtx
) != BLKmode
)
2057 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx
)));
2058 else if (MEM_SIZE (memref
))
2059 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2061 MEM_ATTRS (new_rtx
) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2062 memoffset
, size
, memalign
, as
,
2063 GET_MODE (new_rtx
));
2065 /* At some point, we should validate that this offset is within the object,
2066 if all the appropriate values are known. */
2070 /* Return a memory reference like MEMREF, but with its mode changed
2071 to MODE and its address changed to ADDR, which is assumed to be
2072 MEMREF offset by OFFSET bytes. If VALIDATE is
2073 nonzero, the memory address is forced to be valid. */
2076 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2077 HOST_WIDE_INT offset
, int validate
)
2079 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2080 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2083 /* Return a memory reference like MEMREF, but whose address is changed by
2084 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2085 known to be in OFFSET (possibly 1). */
2088 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2090 rtx new_rtx
, addr
= XEXP (memref
, 0);
2091 addr_space_t as
= MEM_ADDR_SPACE (memref
);
2092 enum machine_mode address_mode
= targetm
.addr_space
.address_mode (as
);
2094 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2096 /* At this point we don't know _why_ the address is invalid. It
2097 could have secondary memory references, multiplies or anything.
2099 However, if we did go and rearrange things, we can wind up not
2100 being able to recognize the magic around pic_offset_table_rtx.
2101 This stuff is fragile, and is yet another example of why it is
2102 bad to expose PIC machinery too early. */
2103 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
, as
)
2104 && GET_CODE (addr
) == PLUS
2105 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2107 addr
= force_reg (GET_MODE (addr
), addr
);
2108 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2111 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2112 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2114 /* If there are no changes, just return the original memory reference. */
2115 if (new_rtx
== memref
)
2118 /* Update the alignment to reflect the offset. Reset the offset, which
2121 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2122 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2123 as
, GET_MODE (new_rtx
));
2127 /* Return a memory reference like MEMREF, but with its address changed to
2128 ADDR. The caller is asserting that the actual piece of memory pointed
2129 to is the same, just the form of the address is being changed, such as
2130 by putting something into a register. */
2133 replace_equiv_address (rtx memref
, rtx addr
)
2135 /* change_address_1 copies the memory attribute structure without change
2136 and that's exactly what we want here. */
2137 update_temp_slot_address (XEXP (memref
, 0), addr
);
2138 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2141 /* Likewise, but the reference is not required to be valid. */
2144 replace_equiv_address_nv (rtx memref
, rtx addr
)
2146 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2149 /* Return a memory reference like MEMREF, but with its mode widened to
2150 MODE and offset by OFFSET. This would be used by targets that e.g.
2151 cannot issue QImode memory operations and have to use SImode memory
2152 operations plus masking logic. */
2155 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2157 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1);
2158 tree expr
= MEM_EXPR (new_rtx
);
2159 rtx memoffset
= MEM_OFFSET (new_rtx
);
2160 unsigned int size
= GET_MODE_SIZE (mode
);
2162 /* If there are no changes, just return the original memory reference. */
2163 if (new_rtx
== memref
)
2166 /* If we don't know what offset we were at within the expression, then
2167 we can't know if we've overstepped the bounds. */
2173 if (TREE_CODE (expr
) == COMPONENT_REF
)
2175 tree field
= TREE_OPERAND (expr
, 1);
2176 tree offset
= component_ref_field_offset (expr
);
2178 if (! DECL_SIZE_UNIT (field
))
2184 /* Is the field at least as large as the access? If so, ok,
2185 otherwise strip back to the containing structure. */
2186 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2187 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2188 && INTVAL (memoffset
) >= 0)
2191 if (! host_integerp (offset
, 1))
2197 expr
= TREE_OPERAND (expr
, 0);
2199 = (GEN_INT (INTVAL (memoffset
)
2200 + tree_low_cst (offset
, 1)
2201 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2204 /* Similarly for the decl. */
2205 else if (DECL_P (expr
)
2206 && DECL_SIZE_UNIT (expr
)
2207 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2208 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2209 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2213 /* The widened memory access overflows the expression, which means
2214 that it could alias another expression. Zap it. */
2221 memoffset
= NULL_RTX
;
2223 /* The widened memory may alias other stuff, so zap the alias set. */
2224 /* ??? Maybe use get_alias_set on any remaining expression. */
2226 MEM_ATTRS (new_rtx
) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2227 MEM_ALIGN (new_rtx
),
2228 MEM_ADDR_SPACE (new_rtx
), mode
);
2233 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2234 static GTY(()) tree spill_slot_decl
;
2237 get_spill_slot_decl (bool force_build_p
)
2239 tree d
= spill_slot_decl
;
2242 if (d
|| !force_build_p
)
2245 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2246 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2247 DECL_ARTIFICIAL (d
) = 1;
2248 DECL_IGNORED_P (d
) = 1;
2250 TREE_THIS_NOTRAP (d
) = 1;
2251 spill_slot_decl
= d
;
2253 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2254 MEM_NOTRAP_P (rd
) = 1;
2255 MEM_ATTRS (rd
) = get_mem_attrs (new_alias_set (), d
, const0_rtx
,
2256 NULL_RTX
, 0, ADDR_SPACE_GENERIC
, BLKmode
);
2257 SET_DECL_RTL (d
, rd
);
2262 /* Given MEM, a result from assign_stack_local, fill in the memory
2263 attributes as appropriate for a register allocator spill slot.
2264 These slots are not aliasable by other memory. We arrange for
2265 them all to use a single MEM_EXPR, so that the aliasing code can
2266 work properly in the case of shared spill slots. */
2269 set_mem_attrs_for_spill (rtx mem
)
2271 alias_set_type alias
;
2275 expr
= get_spill_slot_decl (true);
2276 alias
= MEM_ALIAS_SET (DECL_RTL (expr
));
2278 /* We expect the incoming memory to be of the form:
2279 (mem:MODE (plus (reg sfp) (const_int offset)))
2280 with perhaps the plus missing for offset = 0. */
2281 addr
= XEXP (mem
, 0);
2282 offset
= const0_rtx
;
2283 if (GET_CODE (addr
) == PLUS
2284 && CONST_INT_P (XEXP (addr
, 1)))
2285 offset
= XEXP (addr
, 1);
2287 MEM_ATTRS (mem
) = get_mem_attrs (alias
, expr
, offset
,
2288 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2289 ADDR_SPACE_GENERIC
, GET_MODE (mem
));
2290 MEM_NOTRAP_P (mem
) = 1;
2293 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2296 gen_label_rtx (void)
2298 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2299 NULL
, label_num
++, NULL
);
2302 /* For procedure integration. */
2304 /* Install new pointers to the first and last insns in the chain.
2305 Also, set cur_insn_uid to one higher than the last in use.
2306 Used for an inline-procedure after copying the insn chain. */
2309 set_new_first_and_last_insn (rtx first
, rtx last
)
2313 set_first_insn (first
);
2314 set_last_insn (last
);
2317 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2319 int debug_count
= 0;
2321 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2322 cur_debug_insn_uid
= 0;
2324 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2325 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2326 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2329 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2330 if (DEBUG_INSN_P (insn
))
2335 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2337 cur_debug_insn_uid
++;
2340 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2341 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2346 /* Go through all the RTL insn bodies and copy any invalid shared
2347 structure. This routine should only be called once. */
2350 unshare_all_rtl_1 (rtx insn
)
2352 /* Unshare just about everything else. */
2353 unshare_all_rtl_in_chain (insn
);
2355 /* Make sure the addresses of stack slots found outside the insn chain
2356 (such as, in DECL_RTL of a variable) are not shared
2357 with the insn chain.
2359 This special care is necessary when the stack slot MEM does not
2360 actually appear in the insn chain. If it does appear, its address
2361 is unshared from all else at that point. */
2362 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2365 /* Go through all the RTL insn bodies and copy any invalid shared
2366 structure, again. This is a fairly expensive thing to do so it
2367 should be done sparingly. */
2370 unshare_all_rtl_again (rtx insn
)
2375 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2378 reset_used_flags (PATTERN (p
));
2379 reset_used_flags (REG_NOTES (p
));
2382 /* Make sure that virtual stack slots are not shared. */
2383 set_used_decls (DECL_INITIAL (cfun
->decl
));
2385 /* Make sure that virtual parameters are not shared. */
2386 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2387 set_used_flags (DECL_RTL (decl
));
2389 reset_used_flags (stack_slot_list
);
2391 unshare_all_rtl_1 (insn
);
2395 unshare_all_rtl (void)
2397 unshare_all_rtl_1 (get_insns ());
2401 struct rtl_opt_pass pass_unshare_all_rtl
=
2405 "unshare", /* name */
2407 unshare_all_rtl
, /* execute */
2410 0, /* static_pass_number */
2411 TV_NONE
, /* tv_id */
2412 0, /* properties_required */
2413 0, /* properties_provided */
2414 0, /* properties_destroyed */
2415 0, /* todo_flags_start */
2416 TODO_dump_func
| TODO_verify_rtl_sharing
/* todo_flags_finish */
2421 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2422 Recursively does the same for subexpressions. */
2425 verify_rtx_sharing (rtx orig
, rtx insn
)
2430 const char *format_ptr
;
2435 code
= GET_CODE (x
);
2437 /* These types may be freely shared. */
2455 /* SCRATCH must be shared because they represent distinct values. */
2457 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2462 if (shared_const_p (orig
))
2467 /* A MEM is allowed to be shared if its address is constant. */
2468 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2469 || reload_completed
|| reload_in_progress
)
2478 /* This rtx may not be shared. If it has already been seen,
2479 replace it with a copy of itself. */
2480 #ifdef ENABLE_CHECKING
2481 if (RTX_FLAG (x
, used
))
2483 error ("invalid rtl sharing found in the insn");
2485 error ("shared rtx");
2487 internal_error ("internal consistency failure");
2490 gcc_assert (!RTX_FLAG (x
, used
));
2492 RTX_FLAG (x
, used
) = 1;
2494 /* Now scan the subexpressions recursively. */
2496 format_ptr
= GET_RTX_FORMAT (code
);
2498 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2500 switch (*format_ptr
++)
2503 verify_rtx_sharing (XEXP (x
, i
), insn
);
2507 if (XVEC (x
, i
) != NULL
)
2510 int len
= XVECLEN (x
, i
);
2512 for (j
= 0; j
< len
; j
++)
2514 /* We allow sharing of ASM_OPERANDS inside single
2516 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2517 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2519 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2521 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2530 /* Go through all the RTL insn bodies and check that there is no unexpected
2531 sharing in between the subexpressions. */
2534 verify_rtl_sharing (void)
2538 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2541 reset_used_flags (PATTERN (p
));
2542 reset_used_flags (REG_NOTES (p
));
2543 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2546 rtx q
, sequence
= PATTERN (p
);
2548 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2550 q
= XVECEXP (sequence
, 0, i
);
2551 gcc_assert (INSN_P (q
));
2552 reset_used_flags (PATTERN (q
));
2553 reset_used_flags (REG_NOTES (q
));
2558 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2561 verify_rtx_sharing (PATTERN (p
), p
);
2562 verify_rtx_sharing (REG_NOTES (p
), p
);
2566 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2567 Assumes the mark bits are cleared at entry. */
2570 unshare_all_rtl_in_chain (rtx insn
)
2572 for (; insn
; insn
= NEXT_INSN (insn
))
2575 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2576 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2580 /* Go through all virtual stack slots of a function and mark them as
2581 shared. We never replace the DECL_RTLs themselves with a copy,
2582 but expressions mentioned into a DECL_RTL cannot be shared with
2583 expressions in the instruction stream.
2585 Note that reload may convert pseudo registers into memories in-place.
2586 Pseudo registers are always shared, but MEMs never are. Thus if we
2587 reset the used flags on MEMs in the instruction stream, we must set
2588 them again on MEMs that appear in DECL_RTLs. */
2591 set_used_decls (tree blk
)
2596 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2597 if (DECL_RTL_SET_P (t
))
2598 set_used_flags (DECL_RTL (t
));
2600 /* Now process sub-blocks. */
2601 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2605 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2606 Recursively does the same for subexpressions. Uses
2607 copy_rtx_if_shared_1 to reduce stack space. */
2610 copy_rtx_if_shared (rtx orig
)
2612 copy_rtx_if_shared_1 (&orig
);
2616 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2617 use. Recursively does the same for subexpressions. */
2620 copy_rtx_if_shared_1 (rtx
*orig1
)
2626 const char *format_ptr
;
2630 /* Repeat is used to turn tail-recursion into iteration. */
2637 code
= GET_CODE (x
);
2639 /* These types may be freely shared. */
2656 /* SCRATCH must be shared because they represent distinct values. */
2659 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2664 if (shared_const_p (x
))
2674 /* The chain of insns is not being copied. */
2681 /* This rtx may not be shared. If it has already been seen,
2682 replace it with a copy of itself. */
2684 if (RTX_FLAG (x
, used
))
2686 x
= shallow_copy_rtx (x
);
2689 RTX_FLAG (x
, used
) = 1;
2691 /* Now scan the subexpressions recursively.
2692 We can store any replaced subexpressions directly into X
2693 since we know X is not shared! Any vectors in X
2694 must be copied if X was copied. */
2696 format_ptr
= GET_RTX_FORMAT (code
);
2697 length
= GET_RTX_LENGTH (code
);
2700 for (i
= 0; i
< length
; i
++)
2702 switch (*format_ptr
++)
2706 copy_rtx_if_shared_1 (last_ptr
);
2707 last_ptr
= &XEXP (x
, i
);
2711 if (XVEC (x
, i
) != NULL
)
2714 int len
= XVECLEN (x
, i
);
2716 /* Copy the vector iff I copied the rtx and the length
2718 if (copied
&& len
> 0)
2719 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2721 /* Call recursively on all inside the vector. */
2722 for (j
= 0; j
< len
; j
++)
2725 copy_rtx_if_shared_1 (last_ptr
);
2726 last_ptr
= &XVECEXP (x
, i
, j
);
2741 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2742 to look for shared sub-parts. */
2745 reset_used_flags (rtx x
)
2749 const char *format_ptr
;
2752 /* Repeat is used to turn tail-recursion into iteration. */
2757 code
= GET_CODE (x
);
2759 /* These types may be freely shared so we needn't do any resetting
2784 /* The chain of insns is not being copied. */
2791 RTX_FLAG (x
, used
) = 0;
2793 format_ptr
= GET_RTX_FORMAT (code
);
2794 length
= GET_RTX_LENGTH (code
);
2796 for (i
= 0; i
< length
; i
++)
2798 switch (*format_ptr
++)
2806 reset_used_flags (XEXP (x
, i
));
2810 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2811 reset_used_flags (XVECEXP (x
, i
, j
));
2817 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2818 to look for shared sub-parts. */
2821 set_used_flags (rtx x
)
2825 const char *format_ptr
;
2830 code
= GET_CODE (x
);
2832 /* These types may be freely shared so we needn't do any resetting
2857 /* The chain of insns is not being copied. */
2864 RTX_FLAG (x
, used
) = 1;
2866 format_ptr
= GET_RTX_FORMAT (code
);
2867 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2869 switch (*format_ptr
++)
2872 set_used_flags (XEXP (x
, i
));
2876 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2877 set_used_flags (XVECEXP (x
, i
, j
));
2883 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2884 Return X or the rtx for the pseudo reg the value of X was copied into.
2885 OTHER must be valid as a SET_DEST. */
2888 make_safe_from (rtx x
, rtx other
)
2891 switch (GET_CODE (other
))
2894 other
= SUBREG_REG (other
);
2896 case STRICT_LOW_PART
:
2899 other
= XEXP (other
, 0);
2908 && GET_CODE (x
) != SUBREG
)
2910 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2911 || reg_mentioned_p (other
, x
))))
2913 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2914 emit_move_insn (temp
, x
);
2920 /* Emission of insns (adding them to the doubly-linked list). */
2922 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2925 get_last_insn_anywhere (void)
2927 struct sequence_stack
*stack
;
2928 if (get_last_insn ())
2929 return get_last_insn ();
2930 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2931 if (stack
->last
!= 0)
2936 /* Return the first nonnote insn emitted in current sequence or current
2937 function. This routine looks inside SEQUENCEs. */
2940 get_first_nonnote_insn (void)
2942 rtx insn
= get_insns ();
2947 for (insn
= next_insn (insn
);
2948 insn
&& NOTE_P (insn
);
2949 insn
= next_insn (insn
))
2953 if (NONJUMP_INSN_P (insn
)
2954 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2955 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2962 /* Return the last nonnote insn emitted in current sequence or current
2963 function. This routine looks inside SEQUENCEs. */
2966 get_last_nonnote_insn (void)
2968 rtx insn
= get_last_insn ();
2973 for (insn
= previous_insn (insn
);
2974 insn
&& NOTE_P (insn
);
2975 insn
= previous_insn (insn
))
2979 if (NONJUMP_INSN_P (insn
)
2980 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2981 insn
= XVECEXP (PATTERN (insn
), 0,
2982 XVECLEN (PATTERN (insn
), 0) - 1);
2989 /* Return the number of actual (non-debug) insns emitted in this
2993 get_max_insn_count (void)
2995 int n
= cur_insn_uid
;
2997 /* The table size must be stable across -g, to avoid codegen
2998 differences due to debug insns, and not be affected by
2999 -fmin-insn-uid, to avoid excessive table size and to simplify
3000 debugging of -fcompare-debug failures. */
3001 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3002 n
-= cur_debug_insn_uid
;
3004 n
-= MIN_NONDEBUG_INSN_UID
;
3010 /* Return the next insn. If it is a SEQUENCE, return the first insn
3014 next_insn (rtx insn
)
3018 insn
= NEXT_INSN (insn
);
3019 if (insn
&& NONJUMP_INSN_P (insn
)
3020 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3021 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3027 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3031 previous_insn (rtx insn
)
3035 insn
= PREV_INSN (insn
);
3036 if (insn
&& NONJUMP_INSN_P (insn
)
3037 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3038 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3044 /* Return the next insn after INSN that is not a NOTE. This routine does not
3045 look inside SEQUENCEs. */
3048 next_nonnote_insn (rtx insn
)
3052 insn
= NEXT_INSN (insn
);
3053 if (insn
== 0 || !NOTE_P (insn
))
3060 /* Return the next insn after INSN that is not a NOTE, but stop the
3061 search before we enter another basic block. This routine does not
3062 look inside SEQUENCEs. */
3065 next_nonnote_insn_bb (rtx insn
)
3069 insn
= NEXT_INSN (insn
);
3070 if (insn
== 0 || !NOTE_P (insn
))
3072 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3079 /* Return the previous insn before INSN that is not a NOTE. This routine does
3080 not look inside SEQUENCEs. */
3083 prev_nonnote_insn (rtx insn
)
3087 insn
= PREV_INSN (insn
);
3088 if (insn
== 0 || !NOTE_P (insn
))
3095 /* Return the previous insn before INSN that is not a NOTE, but stop
3096 the search before we enter another basic block. This routine does
3097 not look inside SEQUENCEs. */
3100 prev_nonnote_insn_bb (rtx insn
)
3104 insn
= PREV_INSN (insn
);
3105 if (insn
== 0 || !NOTE_P (insn
))
3107 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3114 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3115 routine does not look inside SEQUENCEs. */
3118 next_nondebug_insn (rtx insn
)
3122 insn
= NEXT_INSN (insn
);
3123 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3130 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3131 This routine does not look inside SEQUENCEs. */
3134 prev_nondebug_insn (rtx insn
)
3138 insn
= PREV_INSN (insn
);
3139 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3146 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3147 or 0, if there is none. This routine does not look inside
3151 next_real_insn (rtx insn
)
3155 insn
= NEXT_INSN (insn
);
3156 if (insn
== 0 || INSN_P (insn
))
3163 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3164 or 0, if there is none. This routine does not look inside
3168 prev_real_insn (rtx insn
)
3172 insn
= PREV_INSN (insn
);
3173 if (insn
== 0 || INSN_P (insn
))
3180 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3181 This routine does not look inside SEQUENCEs. */
3184 last_call_insn (void)
3188 for (insn
= get_last_insn ();
3189 insn
&& !CALL_P (insn
);
3190 insn
= PREV_INSN (insn
))
3196 /* Find the next insn after INSN that really does something. This routine
3197 does not look inside SEQUENCEs. After reload this also skips over
3198 standalone USE and CLOBBER insn. */
3201 active_insn_p (const_rtx insn
)
3203 return (CALL_P (insn
) || JUMP_P (insn
)
3204 || (NONJUMP_INSN_P (insn
)
3205 && (! reload_completed
3206 || (GET_CODE (PATTERN (insn
)) != USE
3207 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3211 next_active_insn (rtx insn
)
3215 insn
= NEXT_INSN (insn
);
3216 if (insn
== 0 || active_insn_p (insn
))
3223 /* Find the last insn before INSN that really does something. This routine
3224 does not look inside SEQUENCEs. After reload this also skips over
3225 standalone USE and CLOBBER insn. */
3228 prev_active_insn (rtx insn
)
3232 insn
= PREV_INSN (insn
);
3233 if (insn
== 0 || active_insn_p (insn
))
3240 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3243 next_label (rtx insn
)
3247 insn
= NEXT_INSN (insn
);
3248 if (insn
== 0 || LABEL_P (insn
))
3255 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3258 prev_label (rtx insn
)
3262 insn
= PREV_INSN (insn
);
3263 if (insn
== 0 || LABEL_P (insn
))
3270 /* Return the last label to mark the same position as LABEL. Return null
3271 if LABEL itself is null. */
3274 skip_consecutive_labels (rtx label
)
3278 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3286 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3287 and REG_CC_USER notes so we can find it. */
3290 link_cc0_insns (rtx insn
)
3292 rtx user
= next_nonnote_insn (insn
);
3294 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3295 user
= XVECEXP (PATTERN (user
), 0, 0);
3297 add_reg_note (user
, REG_CC_SETTER
, insn
);
3298 add_reg_note (insn
, REG_CC_USER
, user
);
3301 /* Return the next insn that uses CC0 after INSN, which is assumed to
3302 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3303 applied to the result of this function should yield INSN).
3305 Normally, this is simply the next insn. However, if a REG_CC_USER note
3306 is present, it contains the insn that uses CC0.
3308 Return 0 if we can't find the insn. */
3311 next_cc0_user (rtx insn
)
3313 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3316 return XEXP (note
, 0);
3318 insn
= next_nonnote_insn (insn
);
3319 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3320 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3322 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3328 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3329 note, it is the previous insn. */
3332 prev_cc0_setter (rtx insn
)
3334 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3337 return XEXP (note
, 0);
3339 insn
= prev_nonnote_insn (insn
);
3340 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3347 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3350 find_auto_inc (rtx
*xp
, void *data
)
3353 rtx reg
= (rtx
) data
;
3355 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3358 switch (GET_CODE (x
))
3366 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3377 /* Increment the label uses for all labels present in rtx. */
3380 mark_label_nuses (rtx x
)
3386 code
= GET_CODE (x
);
3387 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3388 LABEL_NUSES (XEXP (x
, 0))++;
3390 fmt
= GET_RTX_FORMAT (code
);
3391 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3394 mark_label_nuses (XEXP (x
, i
));
3395 else if (fmt
[i
] == 'E')
3396 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3397 mark_label_nuses (XVECEXP (x
, i
, j
));
3402 /* Try splitting insns that can be split for better scheduling.
3403 PAT is the pattern which might split.
3404 TRIAL is the insn providing PAT.
3405 LAST is nonzero if we should return the last insn of the sequence produced.
3407 If this routine succeeds in splitting, it returns the first or last
3408 replacement insn depending on the value of LAST. Otherwise, it
3409 returns TRIAL. If the insn to be returned can be split, it will be. */
3412 try_split (rtx pat
, rtx trial
, int last
)
3414 rtx before
= PREV_INSN (trial
);
3415 rtx after
= NEXT_INSN (trial
);
3416 int has_barrier
= 0;
3419 rtx insn_last
, insn
;
3422 /* We're not good at redistributing frame information. */
3423 if (RTX_FRAME_RELATED_P (trial
))
3426 if (any_condjump_p (trial
)
3427 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3428 split_branch_probability
= INTVAL (XEXP (note
, 0));
3429 probability
= split_branch_probability
;
3431 seq
= split_insns (pat
, trial
);
3433 split_branch_probability
= -1;
3435 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3436 We may need to handle this specially. */
3437 if (after
&& BARRIER_P (after
))
3440 after
= NEXT_INSN (after
);
3446 /* Avoid infinite loop if any insn of the result matches
3447 the original pattern. */
3451 if (INSN_P (insn_last
)
3452 && rtx_equal_p (PATTERN (insn_last
), pat
))
3454 if (!NEXT_INSN (insn_last
))
3456 insn_last
= NEXT_INSN (insn_last
);
3459 /* We will be adding the new sequence to the function. The splitters
3460 may have introduced invalid RTL sharing, so unshare the sequence now. */
3461 unshare_all_rtl_in_chain (seq
);
3464 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3468 mark_jump_label (PATTERN (insn
), insn
, 0);
3470 if (probability
!= -1
3471 && any_condjump_p (insn
)
3472 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3474 /* We can preserve the REG_BR_PROB notes only if exactly
3475 one jump is created, otherwise the machine description
3476 is responsible for this step using
3477 split_branch_probability variable. */
3478 gcc_assert (njumps
== 1);
3479 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3484 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3485 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3488 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3491 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3494 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3495 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3497 /* Update the debug information for the CALL_INSN. */
3498 if (flag_enable_icf_debug
)
3499 (*debug_hooks
->copy_call_info
) (trial
, insn
);
3503 /* Copy notes, particularly those related to the CFG. */
3504 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3506 switch (REG_NOTE_KIND (note
))
3509 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3514 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3517 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3521 case REG_NON_LOCAL_GOTO
:
3522 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3525 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3531 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3533 rtx reg
= XEXP (note
, 0);
3534 if (!FIND_REG_INC_NOTE (insn
, reg
)
3535 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3536 add_reg_note (insn
, REG_INC
, reg
);
3546 /* If there are LABELS inside the split insns increment the
3547 usage count so we don't delete the label. */
3551 while (insn
!= NULL_RTX
)
3553 /* JUMP_P insns have already been "marked" above. */
3554 if (NONJUMP_INSN_P (insn
))
3555 mark_label_nuses (PATTERN (insn
));
3557 insn
= PREV_INSN (insn
);
3561 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3563 delete_insn (trial
);
3565 emit_barrier_after (tem
);
3567 /* Recursively call try_split for each new insn created; by the
3568 time control returns here that insn will be fully split, so
3569 set LAST and continue from the insn after the one returned.
3570 We can't use next_active_insn here since AFTER may be a note.
3571 Ignore deleted insns, which can be occur if not optimizing. */
3572 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3573 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3574 tem
= try_split (PATTERN (tem
), tem
, 1);
3576 /* Return either the first or the last insn, depending on which was
3579 ? (after
? PREV_INSN (after
) : get_last_insn ())
3580 : NEXT_INSN (before
);
3583 /* Make and return an INSN rtx, initializing all its slots.
3584 Store PATTERN in the pattern slots. */
3587 make_insn_raw (rtx pattern
)
3591 insn
= rtx_alloc (INSN
);
3593 INSN_UID (insn
) = cur_insn_uid
++;
3594 PATTERN (insn
) = pattern
;
3595 INSN_CODE (insn
) = -1;
3596 REG_NOTES (insn
) = NULL
;
3597 INSN_LOCATOR (insn
) = curr_insn_locator ();
3598 BLOCK_FOR_INSN (insn
) = NULL
;
3600 #ifdef ENABLE_RTL_CHECKING
3603 && (returnjump_p (insn
)
3604 || (GET_CODE (insn
) == SET
3605 && SET_DEST (insn
) == pc_rtx
)))
3607 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3615 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3618 make_debug_insn_raw (rtx pattern
)
3622 insn
= rtx_alloc (DEBUG_INSN
);
3623 INSN_UID (insn
) = cur_debug_insn_uid
++;
3624 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3625 INSN_UID (insn
) = cur_insn_uid
++;
3627 PATTERN (insn
) = pattern
;
3628 INSN_CODE (insn
) = -1;
3629 REG_NOTES (insn
) = NULL
;
3630 INSN_LOCATOR (insn
) = curr_insn_locator ();
3631 BLOCK_FOR_INSN (insn
) = NULL
;
3636 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3639 make_jump_insn_raw (rtx pattern
)
3643 insn
= rtx_alloc (JUMP_INSN
);
3644 INSN_UID (insn
) = cur_insn_uid
++;
3646 PATTERN (insn
) = pattern
;
3647 INSN_CODE (insn
) = -1;
3648 REG_NOTES (insn
) = NULL
;
3649 JUMP_LABEL (insn
) = NULL
;
3650 INSN_LOCATOR (insn
) = curr_insn_locator ();
3651 BLOCK_FOR_INSN (insn
) = NULL
;
3656 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3659 make_call_insn_raw (rtx pattern
)
3663 insn
= rtx_alloc (CALL_INSN
);
3664 INSN_UID (insn
) = cur_insn_uid
++;
3666 PATTERN (insn
) = pattern
;
3667 INSN_CODE (insn
) = -1;
3668 REG_NOTES (insn
) = NULL
;
3669 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3670 INSN_LOCATOR (insn
) = curr_insn_locator ();
3671 BLOCK_FOR_INSN (insn
) = NULL
;
3676 /* Add INSN to the end of the doubly-linked list.
3677 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3682 PREV_INSN (insn
) = get_last_insn();
3683 NEXT_INSN (insn
) = 0;
3685 if (NULL
!= get_last_insn())
3686 NEXT_INSN (get_last_insn ()) = insn
;
3688 if (NULL
== get_insns ())
3689 set_first_insn (insn
);
3691 set_last_insn (insn
);
3694 /* Add INSN into the doubly-linked list after insn AFTER. This and
3695 the next should be the only functions called to insert an insn once
3696 delay slots have been filled since only they know how to update a
3700 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3702 rtx next
= NEXT_INSN (after
);
3704 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3706 NEXT_INSN (insn
) = next
;
3707 PREV_INSN (insn
) = after
;
3711 PREV_INSN (next
) = insn
;
3712 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3713 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3715 else if (get_last_insn () == after
)
3716 set_last_insn (insn
);
3719 struct sequence_stack
*stack
= seq_stack
;
3720 /* Scan all pending sequences too. */
3721 for (; stack
; stack
= stack
->next
)
3722 if (after
== stack
->last
)
3731 if (!BARRIER_P (after
)
3732 && !BARRIER_P (insn
)
3733 && (bb
= BLOCK_FOR_INSN (after
)))
3735 set_block_for_insn (insn
, bb
);
3737 df_insn_rescan (insn
);
3738 /* Should not happen as first in the BB is always
3739 either NOTE or LABEL. */
3740 if (BB_END (bb
) == after
3741 /* Avoid clobbering of structure when creating new BB. */
3742 && !BARRIER_P (insn
)
3743 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3747 NEXT_INSN (after
) = insn
;
3748 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3750 rtx sequence
= PATTERN (after
);
3751 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3755 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3756 the previous should be the only functions called to insert an insn
3757 once delay slots have been filled since only they know how to
3758 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3762 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3764 rtx prev
= PREV_INSN (before
);
3766 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3768 PREV_INSN (insn
) = prev
;
3769 NEXT_INSN (insn
) = before
;
3773 NEXT_INSN (prev
) = insn
;
3774 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3776 rtx sequence
= PATTERN (prev
);
3777 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3780 else if (get_insns () == before
)
3781 set_first_insn (insn
);
3784 struct sequence_stack
*stack
= seq_stack
;
3785 /* Scan all pending sequences too. */
3786 for (; stack
; stack
= stack
->next
)
3787 if (before
== stack
->first
)
3789 stack
->first
= insn
;
3797 && !BARRIER_P (before
)
3798 && !BARRIER_P (insn
))
3799 bb
= BLOCK_FOR_INSN (before
);
3803 set_block_for_insn (insn
, bb
);
3805 df_insn_rescan (insn
);
3806 /* Should not happen as first in the BB is always either NOTE or
3808 gcc_assert (BB_HEAD (bb
) != insn
3809 /* Avoid clobbering of structure when creating new BB. */
3811 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3814 PREV_INSN (before
) = insn
;
3815 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3816 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3820 /* Replace insn with an deleted instruction note. */
3823 set_insn_deleted (rtx insn
)
3825 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3826 PUT_CODE (insn
, NOTE
);
3827 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3831 /* Remove an insn from its doubly-linked list. This function knows how
3832 to handle sequences. */
3834 remove_insn (rtx insn
)
3836 rtx next
= NEXT_INSN (insn
);
3837 rtx prev
= PREV_INSN (insn
);
3840 /* Later in the code, the block will be marked dirty. */
3841 df_insn_delete (NULL
, INSN_UID (insn
));
3845 NEXT_INSN (prev
) = next
;
3846 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3848 rtx sequence
= PATTERN (prev
);
3849 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3852 else if (get_insns () == insn
)
3855 PREV_INSN (next
) = NULL
;
3856 set_first_insn (next
);
3860 struct sequence_stack
*stack
= seq_stack
;
3861 /* Scan all pending sequences too. */
3862 for (; stack
; stack
= stack
->next
)
3863 if (insn
== stack
->first
)
3865 stack
->first
= next
;
3874 PREV_INSN (next
) = prev
;
3875 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3876 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3878 else if (get_last_insn () == insn
)
3879 set_last_insn (prev
);
3882 struct sequence_stack
*stack
= seq_stack
;
3883 /* Scan all pending sequences too. */
3884 for (; stack
; stack
= stack
->next
)
3885 if (insn
== stack
->last
)
3893 if (!BARRIER_P (insn
)
3894 && (bb
= BLOCK_FOR_INSN (insn
)))
3897 df_set_bb_dirty (bb
);
3898 if (BB_HEAD (bb
) == insn
)
3900 /* Never ever delete the basic block note without deleting whole
3902 gcc_assert (!NOTE_P (insn
));
3903 BB_HEAD (bb
) = next
;
3905 if (BB_END (bb
) == insn
)
3910 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3913 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3915 gcc_assert (call_insn
&& CALL_P (call_insn
));
3917 /* Put the register usage information on the CALL. If there is already
3918 some usage information, put ours at the end. */
3919 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3923 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3924 link
= XEXP (link
, 1))
3927 XEXP (link
, 1) = call_fusage
;
3930 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3933 /* Delete all insns made since FROM.
3934 FROM becomes the new last instruction. */
3937 delete_insns_since (rtx from
)
3942 NEXT_INSN (from
) = 0;
3943 set_last_insn (from
);
3946 /* This function is deprecated, please use sequences instead.
3948 Move a consecutive bunch of insns to a different place in the chain.
3949 The insns to be moved are those between FROM and TO.
3950 They are moved to a new position after the insn AFTER.
3951 AFTER must not be FROM or TO or any insn in between.
3953 This function does not know about SEQUENCEs and hence should not be
3954 called after delay-slot filling has been done. */
3957 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3959 /* Splice this bunch out of where it is now. */
3960 if (PREV_INSN (from
))
3961 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3963 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3964 if (get_last_insn () == to
)
3965 set_last_insn (PREV_INSN (from
));
3966 if (get_insns () == from
)
3967 set_first_insn (NEXT_INSN (to
));
3969 /* Make the new neighbors point to it and it to them. */
3970 if (NEXT_INSN (after
))
3971 PREV_INSN (NEXT_INSN (after
)) = to
;
3973 NEXT_INSN (to
) = NEXT_INSN (after
);
3974 PREV_INSN (from
) = after
;
3975 NEXT_INSN (after
) = from
;
3976 if (after
== get_last_insn())
3980 /* Same as function above, but take care to update BB boundaries. */
3982 reorder_insns (rtx from
, rtx to
, rtx after
)
3984 rtx prev
= PREV_INSN (from
);
3985 basic_block bb
, bb2
;
3987 reorder_insns_nobb (from
, to
, after
);
3989 if (!BARRIER_P (after
)
3990 && (bb
= BLOCK_FOR_INSN (after
)))
3993 df_set_bb_dirty (bb
);
3995 if (!BARRIER_P (from
)
3996 && (bb2
= BLOCK_FOR_INSN (from
)))
3998 if (BB_END (bb2
) == to
)
3999 BB_END (bb2
) = prev
;
4000 df_set_bb_dirty (bb2
);
4003 if (BB_END (bb
) == after
)
4006 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4008 df_insn_change_bb (x
, bb
);
4013 /* Emit insn(s) of given code and pattern
4014 at a specified place within the doubly-linked list.
4016 All of the emit_foo global entry points accept an object
4017 X which is either an insn list or a PATTERN of a single
4020 There are thus a few canonical ways to generate code and
4021 emit it at a specific place in the instruction stream. For
4022 example, consider the instruction named SPOT and the fact that
4023 we would like to emit some instructions before SPOT. We might
4027 ... emit the new instructions ...
4028 insns_head = get_insns ();
4031 emit_insn_before (insns_head, SPOT);
4033 It used to be common to generate SEQUENCE rtl instead, but that
4034 is a relic of the past which no longer occurs. The reason is that
4035 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4036 generated would almost certainly die right after it was created. */
4038 /* Make X be output before the instruction BEFORE. */
4041 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4046 gcc_assert (before
);
4051 switch (GET_CODE (x
))
4063 rtx next
= NEXT_INSN (insn
);
4064 add_insn_before (insn
, before
, bb
);
4070 #ifdef ENABLE_RTL_CHECKING
4077 last
= make_insn_raw (x
);
4078 add_insn_before (last
, before
, bb
);
4085 /* Make an instruction with body X and code JUMP_INSN
4086 and output it before the instruction BEFORE. */
4089 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4091 rtx insn
, last
= NULL_RTX
;
4093 gcc_assert (before
);
4095 switch (GET_CODE (x
))
4107 rtx next
= NEXT_INSN (insn
);
4108 add_insn_before (insn
, before
, NULL
);
4114 #ifdef ENABLE_RTL_CHECKING
4121 last
= make_jump_insn_raw (x
);
4122 add_insn_before (last
, before
, NULL
);
4129 /* Make an instruction with body X and code CALL_INSN
4130 and output it before the instruction BEFORE. */
4133 emit_call_insn_before_noloc (rtx x
, rtx before
)
4135 rtx last
= NULL_RTX
, insn
;
4137 gcc_assert (before
);
4139 switch (GET_CODE (x
))
4151 rtx next
= NEXT_INSN (insn
);
4152 add_insn_before (insn
, before
, NULL
);
4158 #ifdef ENABLE_RTL_CHECKING
4165 last
= make_call_insn_raw (x
);
4166 add_insn_before (last
, before
, NULL
);
4173 /* Make an instruction with body X and code DEBUG_INSN
4174 and output it before the instruction BEFORE. */
4177 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4179 rtx last
= NULL_RTX
, insn
;
4181 gcc_assert (before
);
4183 switch (GET_CODE (x
))
4195 rtx next
= NEXT_INSN (insn
);
4196 add_insn_before (insn
, before
, NULL
);
4202 #ifdef ENABLE_RTL_CHECKING
4209 last
= make_debug_insn_raw (x
);
4210 add_insn_before (last
, before
, NULL
);
4217 /* Make an insn of code BARRIER
4218 and output it before the insn BEFORE. */
4221 emit_barrier_before (rtx before
)
4223 rtx insn
= rtx_alloc (BARRIER
);
4225 INSN_UID (insn
) = cur_insn_uid
++;
4227 add_insn_before (insn
, before
, NULL
);
4231 /* Emit the label LABEL before the insn BEFORE. */
4234 emit_label_before (rtx label
, rtx before
)
4236 /* This can be called twice for the same label as a result of the
4237 confusion that follows a syntax error! So make it harmless. */
4238 if (INSN_UID (label
) == 0)
4240 INSN_UID (label
) = cur_insn_uid
++;
4241 add_insn_before (label
, before
, NULL
);
4247 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4250 emit_note_before (enum insn_note subtype
, rtx before
)
4252 rtx note
= rtx_alloc (NOTE
);
4253 INSN_UID (note
) = cur_insn_uid
++;
4254 NOTE_KIND (note
) = subtype
;
4255 BLOCK_FOR_INSN (note
) = NULL
;
4256 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4258 add_insn_before (note
, before
, NULL
);
4262 /* Helper for emit_insn_after, handles lists of instructions
4266 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4270 if (!bb
&& !BARRIER_P (after
))
4271 bb
= BLOCK_FOR_INSN (after
);
4275 df_set_bb_dirty (bb
);
4276 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4277 if (!BARRIER_P (last
))
4279 set_block_for_insn (last
, bb
);
4280 df_insn_rescan (last
);
4282 if (!BARRIER_P (last
))
4284 set_block_for_insn (last
, bb
);
4285 df_insn_rescan (last
);
4287 if (BB_END (bb
) == after
)
4291 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4294 after_after
= NEXT_INSN (after
);
4296 NEXT_INSN (after
) = first
;
4297 PREV_INSN (first
) = after
;
4298 NEXT_INSN (last
) = after_after
;
4300 PREV_INSN (after_after
) = last
;
4302 if (after
== get_last_insn())
4303 set_last_insn (last
);
4308 /* Make X be output after the insn AFTER and set the BB of insn. If
4309 BB is NULL, an attempt is made to infer the BB from AFTER. */
4312 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4321 switch (GET_CODE (x
))
4330 last
= emit_insn_after_1 (x
, after
, bb
);
4333 #ifdef ENABLE_RTL_CHECKING
4340 last
= make_insn_raw (x
);
4341 add_insn_after (last
, after
, bb
);
4349 /* Make an insn of code JUMP_INSN with body X
4350 and output it after the insn AFTER. */
4353 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4359 switch (GET_CODE (x
))
4368 last
= emit_insn_after_1 (x
, after
, NULL
);
4371 #ifdef ENABLE_RTL_CHECKING
4378 last
= make_jump_insn_raw (x
);
4379 add_insn_after (last
, after
, NULL
);
4386 /* Make an instruction with body X and code CALL_INSN
4387 and output it after the instruction AFTER. */
4390 emit_call_insn_after_noloc (rtx x
, rtx after
)
4396 switch (GET_CODE (x
))
4405 last
= emit_insn_after_1 (x
, after
, NULL
);
4408 #ifdef ENABLE_RTL_CHECKING
4415 last
= make_call_insn_raw (x
);
4416 add_insn_after (last
, after
, NULL
);
4423 /* Make an instruction with body X and code CALL_INSN
4424 and output it after the instruction AFTER. */
4427 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4433 switch (GET_CODE (x
))
4442 last
= emit_insn_after_1 (x
, after
, NULL
);
4445 #ifdef ENABLE_RTL_CHECKING
4452 last
= make_debug_insn_raw (x
);
4453 add_insn_after (last
, after
, NULL
);
4460 /* Make an insn of code BARRIER
4461 and output it after the insn AFTER. */
4464 emit_barrier_after (rtx after
)
4466 rtx insn
= rtx_alloc (BARRIER
);
4468 INSN_UID (insn
) = cur_insn_uid
++;
4470 add_insn_after (insn
, after
, NULL
);
4474 /* Emit the label LABEL after the insn AFTER. */
4477 emit_label_after (rtx label
, rtx after
)
4479 /* This can be called twice for the same label
4480 as a result of the confusion that follows a syntax error!
4481 So make it harmless. */
4482 if (INSN_UID (label
) == 0)
4484 INSN_UID (label
) = cur_insn_uid
++;
4485 add_insn_after (label
, after
, NULL
);
4491 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4494 emit_note_after (enum insn_note subtype
, rtx after
)
4496 rtx note
= rtx_alloc (NOTE
);
4497 INSN_UID (note
) = cur_insn_uid
++;
4498 NOTE_KIND (note
) = subtype
;
4499 BLOCK_FOR_INSN (note
) = NULL
;
4500 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4501 add_insn_after (note
, after
, NULL
);
4505 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4507 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4509 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4511 if (pattern
== NULL_RTX
|| !loc
)
4514 after
= NEXT_INSN (after
);
4517 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4518 INSN_LOCATOR (after
) = loc
;
4521 after
= NEXT_INSN (after
);
4526 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4528 emit_insn_after (rtx pattern
, rtx after
)
4532 while (DEBUG_INSN_P (prev
))
4533 prev
= PREV_INSN (prev
);
4536 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (prev
));
4538 return emit_insn_after_noloc (pattern
, after
, NULL
);
4541 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4543 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4545 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4547 if (pattern
== NULL_RTX
|| !loc
)
4550 after
= NEXT_INSN (after
);
4553 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4554 INSN_LOCATOR (after
) = loc
;
4557 after
= NEXT_INSN (after
);
4562 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4564 emit_jump_insn_after (rtx pattern
, rtx after
)
4568 while (DEBUG_INSN_P (prev
))
4569 prev
= PREV_INSN (prev
);
4572 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (prev
));
4574 return emit_jump_insn_after_noloc (pattern
, after
);
4577 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4579 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4581 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4583 if (pattern
== NULL_RTX
|| !loc
)
4586 after
= NEXT_INSN (after
);
4589 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4590 INSN_LOCATOR (after
) = loc
;
4593 after
= NEXT_INSN (after
);
4598 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4600 emit_call_insn_after (rtx pattern
, rtx after
)
4604 while (DEBUG_INSN_P (prev
))
4605 prev
= PREV_INSN (prev
);
4608 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (prev
));
4610 return emit_call_insn_after_noloc (pattern
, after
);
4613 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4615 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4617 rtx last
= emit_debug_insn_after_noloc (pattern
, after
);
4619 if (pattern
== NULL_RTX
|| !loc
)
4622 after
= NEXT_INSN (after
);
4625 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4626 INSN_LOCATOR (after
) = loc
;
4629 after
= NEXT_INSN (after
);
4634 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4636 emit_debug_insn_after (rtx pattern
, rtx after
)
4639 return emit_debug_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4641 return emit_debug_insn_after_noloc (pattern
, after
);
4644 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4646 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4648 rtx first
= PREV_INSN (before
);
4649 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4651 if (pattern
== NULL_RTX
|| !loc
)
4655 first
= get_insns ();
4657 first
= NEXT_INSN (first
);
4660 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4661 INSN_LOCATOR (first
) = loc
;
4664 first
= NEXT_INSN (first
);
4669 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4671 emit_insn_before (rtx pattern
, rtx before
)
4675 while (DEBUG_INSN_P (next
))
4676 next
= PREV_INSN (next
);
4679 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (next
));
4681 return emit_insn_before_noloc (pattern
, before
, NULL
);
4684 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4686 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4688 rtx first
= PREV_INSN (before
);
4689 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4691 if (pattern
== NULL_RTX
)
4694 first
= NEXT_INSN (first
);
4697 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4698 INSN_LOCATOR (first
) = loc
;
4701 first
= NEXT_INSN (first
);
4706 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4708 emit_jump_insn_before (rtx pattern
, rtx before
)
4712 while (DEBUG_INSN_P (next
))
4713 next
= PREV_INSN (next
);
4716 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (next
));
4718 return emit_jump_insn_before_noloc (pattern
, before
);
4721 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4723 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4725 rtx first
= PREV_INSN (before
);
4726 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4728 if (pattern
== NULL_RTX
)
4731 first
= NEXT_INSN (first
);
4734 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4735 INSN_LOCATOR (first
) = loc
;
4738 first
= NEXT_INSN (first
);
4743 /* like emit_call_insn_before_noloc,
4744 but set insn_locator according to before. */
4746 emit_call_insn_before (rtx pattern
, rtx before
)
4750 while (DEBUG_INSN_P (next
))
4751 next
= PREV_INSN (next
);
4754 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (next
));
4756 return emit_call_insn_before_noloc (pattern
, before
);
4759 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4761 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4763 rtx first
= PREV_INSN (before
);
4764 rtx last
= emit_debug_insn_before_noloc (pattern
, before
);
4766 if (pattern
== NULL_RTX
)
4769 first
= NEXT_INSN (first
);
4772 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4773 INSN_LOCATOR (first
) = loc
;
4776 first
= NEXT_INSN (first
);
4781 /* like emit_debug_insn_before_noloc,
4782 but set insn_locator according to before. */
4784 emit_debug_insn_before (rtx pattern
, rtx before
)
4786 if (INSN_P (before
))
4787 return emit_debug_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4789 return emit_debug_insn_before_noloc (pattern
, before
);
4792 /* Take X and emit it at the end of the doubly-linked
4795 Returns the last insn emitted. */
4800 rtx last
= get_last_insn();
4806 switch (GET_CODE (x
))
4818 rtx next
= NEXT_INSN (insn
);
4825 #ifdef ENABLE_RTL_CHECKING
4832 last
= make_insn_raw (x
);
4840 /* Make an insn of code DEBUG_INSN with pattern X
4841 and add it to the end of the doubly-linked list. */
4844 emit_debug_insn (rtx x
)
4846 rtx last
= get_last_insn();
4852 switch (GET_CODE (x
))
4864 rtx next
= NEXT_INSN (insn
);
4871 #ifdef ENABLE_RTL_CHECKING
4878 last
= make_debug_insn_raw (x
);
4886 /* Make an insn of code JUMP_INSN with pattern X
4887 and add it to the end of the doubly-linked list. */
4890 emit_jump_insn (rtx x
)
4892 rtx last
= NULL_RTX
, insn
;
4894 switch (GET_CODE (x
))
4906 rtx next
= NEXT_INSN (insn
);
4913 #ifdef ENABLE_RTL_CHECKING
4920 last
= make_jump_insn_raw (x
);
4928 /* Make an insn of code CALL_INSN with pattern X
4929 and add it to the end of the doubly-linked list. */
4932 emit_call_insn (rtx x
)
4936 switch (GET_CODE (x
))
4945 insn
= emit_insn (x
);
4948 #ifdef ENABLE_RTL_CHECKING
4955 insn
= make_call_insn_raw (x
);
4963 /* Add the label LABEL to the end of the doubly-linked list. */
4966 emit_label (rtx label
)
4968 /* This can be called twice for the same label
4969 as a result of the confusion that follows a syntax error!
4970 So make it harmless. */
4971 if (INSN_UID (label
) == 0)
4973 INSN_UID (label
) = cur_insn_uid
++;
4979 /* Make an insn of code BARRIER
4980 and add it to the end of the doubly-linked list. */
4985 rtx barrier
= rtx_alloc (BARRIER
);
4986 INSN_UID (barrier
) = cur_insn_uid
++;
4991 /* Emit a copy of note ORIG. */
4994 emit_note_copy (rtx orig
)
4998 note
= rtx_alloc (NOTE
);
5000 INSN_UID (note
) = cur_insn_uid
++;
5001 NOTE_DATA (note
) = NOTE_DATA (orig
);
5002 NOTE_KIND (note
) = NOTE_KIND (orig
);
5003 BLOCK_FOR_INSN (note
) = NULL
;
5009 /* Make an insn of code NOTE or type NOTE_NO
5010 and add it to the end of the doubly-linked list. */
5013 emit_note (enum insn_note kind
)
5017 note
= rtx_alloc (NOTE
);
5018 INSN_UID (note
) = cur_insn_uid
++;
5019 NOTE_KIND (note
) = kind
;
5020 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
5021 BLOCK_FOR_INSN (note
) = NULL
;
5026 /* Emit a clobber of lvalue X. */
5029 emit_clobber (rtx x
)
5031 /* CONCATs should not appear in the insn stream. */
5032 if (GET_CODE (x
) == CONCAT
)
5034 emit_clobber (XEXP (x
, 0));
5035 return emit_clobber (XEXP (x
, 1));
5037 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5040 /* Return a sequence of insns to clobber lvalue X. */
5054 /* Emit a use of rvalue X. */
5059 /* CONCATs should not appear in the insn stream. */
5060 if (GET_CODE (x
) == CONCAT
)
5062 emit_use (XEXP (x
, 0));
5063 return emit_use (XEXP (x
, 1));
5065 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5068 /* Return a sequence of insns to use rvalue X. */
5082 /* Cause next statement to emit a line note even if the line number
5086 force_next_line_note (void)
5091 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5092 note of this type already exists, remove it first. */
5095 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5097 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5103 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5104 has multiple sets (some callers assume single_set
5105 means the insn only has one set, when in fact it
5106 means the insn only has one * useful * set). */
5107 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5113 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5114 It serves no useful purpose and breaks eliminate_regs. */
5115 if (GET_CODE (datum
) == ASM_OPERANDS
)
5120 XEXP (note
, 0) = datum
;
5121 df_notes_rescan (insn
);
5129 XEXP (note
, 0) = datum
;
5135 add_reg_note (insn
, kind
, datum
);
5141 df_notes_rescan (insn
);
5147 return REG_NOTES (insn
);
5150 /* Return an indication of which type of insn should have X as a body.
5151 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5153 static enum rtx_code
5154 classify_insn (rtx x
)
5158 if (GET_CODE (x
) == CALL
)
5160 if (GET_CODE (x
) == RETURN
)
5162 if (GET_CODE (x
) == SET
)
5164 if (SET_DEST (x
) == pc_rtx
)
5166 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5171 if (GET_CODE (x
) == PARALLEL
)
5174 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5175 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5177 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5178 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5180 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5181 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5187 /* Emit the rtl pattern X as an appropriate kind of insn.
5188 If X is a label, it is simply added into the insn chain. */
5193 enum rtx_code code
= classify_insn (x
);
5198 return emit_label (x
);
5200 return emit_insn (x
);
5203 rtx insn
= emit_jump_insn (x
);
5204 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5205 return emit_barrier ();
5209 return emit_call_insn (x
);
5211 return emit_debug_insn (x
);
5217 /* Space for free sequence stack entries. */
5218 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5220 /* Begin emitting insns to a sequence. If this sequence will contain
5221 something that might cause the compiler to pop arguments to function
5222 calls (because those pops have previously been deferred; see
5223 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5224 before calling this function. That will ensure that the deferred
5225 pops are not accidentally emitted in the middle of this sequence. */
5228 start_sequence (void)
5230 struct sequence_stack
*tem
;
5232 if (free_sequence_stack
!= NULL
)
5234 tem
= free_sequence_stack
;
5235 free_sequence_stack
= tem
->next
;
5238 tem
= ggc_alloc_sequence_stack ();
5240 tem
->next
= seq_stack
;
5241 tem
->first
= get_insns ();
5242 tem
->last
= get_last_insn ();
5250 /* Set up the insn chain starting with FIRST as the current sequence,
5251 saving the previously current one. See the documentation for
5252 start_sequence for more information about how to use this function. */
5255 push_to_sequence (rtx first
)
5261 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5263 set_first_insn (first
);
5264 set_last_insn (last
);
5267 /* Like push_to_sequence, but take the last insn as an argument to avoid
5268 looping through the list. */
5271 push_to_sequence2 (rtx first
, rtx last
)
5275 set_first_insn (first
);
5276 set_last_insn (last
);
5279 /* Set up the outer-level insn chain
5280 as the current sequence, saving the previously current one. */
5283 push_topmost_sequence (void)
5285 struct sequence_stack
*stack
, *top
= NULL
;
5289 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5292 set_first_insn (top
->first
);
5293 set_last_insn (top
->last
);
5296 /* After emitting to the outer-level insn chain, update the outer-level
5297 insn chain, and restore the previous saved state. */
5300 pop_topmost_sequence (void)
5302 struct sequence_stack
*stack
, *top
= NULL
;
5304 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5307 top
->first
= get_insns ();
5308 top
->last
= get_last_insn ();
5313 /* After emitting to a sequence, restore previous saved state.
5315 To get the contents of the sequence just made, you must call
5316 `get_insns' *before* calling here.
5318 If the compiler might have deferred popping arguments while
5319 generating this sequence, and this sequence will not be immediately
5320 inserted into the instruction stream, use do_pending_stack_adjust
5321 before calling get_insns. That will ensure that the deferred
5322 pops are inserted into this sequence, and not into some random
5323 location in the instruction stream. See INHIBIT_DEFER_POP for more
5324 information about deferred popping of arguments. */
5329 struct sequence_stack
*tem
= seq_stack
;
5331 set_first_insn (tem
->first
);
5332 set_last_insn (tem
->last
);
5333 seq_stack
= tem
->next
;
5335 memset (tem
, 0, sizeof (*tem
));
5336 tem
->next
= free_sequence_stack
;
5337 free_sequence_stack
= tem
;
5340 /* Return 1 if currently emitting into a sequence. */
5343 in_sequence_p (void)
5345 return seq_stack
!= 0;
5348 /* Put the various virtual registers into REGNO_REG_RTX. */
5351 init_virtual_regs (void)
5353 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5354 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5355 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5356 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5357 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5361 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5362 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5363 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5364 static int copy_insn_n_scratches
;
5366 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5367 copied an ASM_OPERANDS.
5368 In that case, it is the original input-operand vector. */
5369 static rtvec orig_asm_operands_vector
;
5371 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5372 copied an ASM_OPERANDS.
5373 In that case, it is the copied input-operand vector. */
5374 static rtvec copy_asm_operands_vector
;
5376 /* Likewise for the constraints vector. */
5377 static rtvec orig_asm_constraints_vector
;
5378 static rtvec copy_asm_constraints_vector
;
5380 /* Recursively create a new copy of an rtx for copy_insn.
5381 This function differs from copy_rtx in that it handles SCRATCHes and
5382 ASM_OPERANDs properly.
5383 Normally, this function is not used directly; use copy_insn as front end.
5384 However, you could first copy an insn pattern with copy_insn and then use
5385 this function afterwards to properly copy any REG_NOTEs containing
5389 copy_insn_1 (rtx orig
)
5394 const char *format_ptr
;
5399 code
= GET_CODE (orig
);
5414 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5419 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5420 if (copy_insn_scratch_in
[i
] == orig
)
5421 return copy_insn_scratch_out
[i
];
5425 if (shared_const_p (orig
))
5429 /* A MEM with a constant address is not sharable. The problem is that
5430 the constant address may need to be reloaded. If the mem is shared,
5431 then reloading one copy of this mem will cause all copies to appear
5432 to have been reloaded. */
5438 /* Copy the various flags, fields, and other information. We assume
5439 that all fields need copying, and then clear the fields that should
5440 not be copied. That is the sensible default behavior, and forces
5441 us to explicitly document why we are *not* copying a flag. */
5442 copy
= shallow_copy_rtx (orig
);
5444 /* We do not copy the USED flag, which is used as a mark bit during
5445 walks over the RTL. */
5446 RTX_FLAG (copy
, used
) = 0;
5448 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5451 RTX_FLAG (copy
, jump
) = 0;
5452 RTX_FLAG (copy
, call
) = 0;
5453 RTX_FLAG (copy
, frame_related
) = 0;
5456 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5458 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5459 switch (*format_ptr
++)
5462 if (XEXP (orig
, i
) != NULL
)
5463 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5468 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5469 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5470 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5471 XVEC (copy
, i
) = copy_asm_operands_vector
;
5472 else if (XVEC (orig
, i
) != NULL
)
5474 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5475 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5476 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5487 /* These are left unchanged. */
5494 if (code
== SCRATCH
)
5496 i
= copy_insn_n_scratches
++;
5497 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5498 copy_insn_scratch_in
[i
] = orig
;
5499 copy_insn_scratch_out
[i
] = copy
;
5501 else if (code
== ASM_OPERANDS
)
5503 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5504 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5505 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5506 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5512 /* Create a new copy of an rtx.
5513 This function differs from copy_rtx in that it handles SCRATCHes and
5514 ASM_OPERANDs properly.
5515 INSN doesn't really have to be a full INSN; it could be just the
5518 copy_insn (rtx insn
)
5520 copy_insn_n_scratches
= 0;
5521 orig_asm_operands_vector
= 0;
5522 orig_asm_constraints_vector
= 0;
5523 copy_asm_operands_vector
= 0;
5524 copy_asm_constraints_vector
= 0;
5525 return copy_insn_1 (insn
);
5528 /* Initialize data structures and variables in this file
5529 before generating rtl for each function. */
5534 set_first_insn (NULL
);
5535 set_last_insn (NULL
);
5536 if (MIN_NONDEBUG_INSN_UID
)
5537 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5540 cur_debug_insn_uid
= 1;
5541 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5542 last_location
= UNKNOWN_LOCATION
;
5543 first_label_num
= label_num
;
5546 /* Init the tables that describe all the pseudo regs. */
5548 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5550 crtl
->emit
.regno_pointer_align
5551 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5553 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5555 /* Put copies of all the hard registers into regno_reg_rtx. */
5556 memcpy (regno_reg_rtx
,
5557 static_regno_reg_rtx
,
5558 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5560 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5561 init_virtual_regs ();
5563 /* Indicate that the virtual registers and stack locations are
5565 REG_POINTER (stack_pointer_rtx
) = 1;
5566 REG_POINTER (frame_pointer_rtx
) = 1;
5567 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5568 REG_POINTER (arg_pointer_rtx
) = 1;
5570 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5571 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5572 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5573 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5574 REG_POINTER (virtual_cfa_rtx
) = 1;
5576 #ifdef STACK_BOUNDARY
5577 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5578 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5579 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5580 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5582 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5583 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5584 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5585 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5586 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5589 #ifdef INIT_EXPANDERS
5594 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5597 gen_const_vector (enum machine_mode mode
, int constant
)
5602 enum machine_mode inner
;
5604 units
= GET_MODE_NUNITS (mode
);
5605 inner
= GET_MODE_INNER (mode
);
5607 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5609 v
= rtvec_alloc (units
);
5611 /* We need to call this function after we set the scalar const_tiny_rtx
5613 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5615 for (i
= 0; i
< units
; ++i
)
5616 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5618 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5622 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5623 all elements are zero, and the one vector when all elements are one. */
5625 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5627 enum machine_mode inner
= GET_MODE_INNER (mode
);
5628 int nunits
= GET_MODE_NUNITS (mode
);
5632 /* Check to see if all of the elements have the same value. */
5633 x
= RTVEC_ELT (v
, nunits
- 1);
5634 for (i
= nunits
- 2; i
>= 0; i
--)
5635 if (RTVEC_ELT (v
, i
) != x
)
5638 /* If the values are all the same, check to see if we can use one of the
5639 standard constant vectors. */
5642 if (x
== CONST0_RTX (inner
))
5643 return CONST0_RTX (mode
);
5644 else if (x
== CONST1_RTX (inner
))
5645 return CONST1_RTX (mode
);
5648 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5651 /* Initialise global register information required by all functions. */
5654 init_emit_regs (void)
5658 /* Reset register attributes */
5659 htab_empty (reg_attrs_htab
);
5661 /* We need reg_raw_mode, so initialize the modes now. */
5662 init_reg_modes_target ();
5664 /* Assign register numbers to the globally defined register rtx. */
5665 pc_rtx
= gen_rtx_PC (VOIDmode
);
5666 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5667 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5668 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5669 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5670 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5671 virtual_incoming_args_rtx
=
5672 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5673 virtual_stack_vars_rtx
=
5674 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5675 virtual_stack_dynamic_rtx
=
5676 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5677 virtual_outgoing_args_rtx
=
5678 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5679 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5681 /* Initialize RTL for commonly used hard registers. These are
5682 copied into regno_reg_rtx as we begin to compile each function. */
5683 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5684 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5686 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5687 return_address_pointer_rtx
5688 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5691 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5692 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5694 pic_offset_table_rtx
= NULL_RTX
;
5697 /* Create some permanent unique rtl objects shared between all functions. */
5700 init_emit_once (void)
5703 enum machine_mode mode
;
5704 enum machine_mode double_mode
;
5706 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5708 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5709 const_int_htab_eq
, NULL
);
5711 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5712 const_double_htab_eq
, NULL
);
5714 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5715 const_fixed_htab_eq
, NULL
);
5717 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5718 mem_attrs_htab_eq
, NULL
);
5719 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5720 reg_attrs_htab_eq
, NULL
);
5722 /* Compute the word and byte modes. */
5724 byte_mode
= VOIDmode
;
5725 word_mode
= VOIDmode
;
5726 double_mode
= VOIDmode
;
5728 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5730 mode
= GET_MODE_WIDER_MODE (mode
))
5732 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5733 && byte_mode
== VOIDmode
)
5736 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5737 && word_mode
== VOIDmode
)
5741 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5743 mode
= GET_MODE_WIDER_MODE (mode
))
5745 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5746 && double_mode
== VOIDmode
)
5750 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5752 #ifdef INIT_EXPANDERS
5753 /* This is to initialize {init|mark|free}_machine_status before the first
5754 call to push_function_context_to. This is needed by the Chill front
5755 end which calls push_function_context_to before the first call to
5756 init_function_start. */
5760 /* Create the unique rtx's for certain rtx codes and operand values. */
5762 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5763 tries to use these variables. */
5764 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5765 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5766 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5768 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5769 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5770 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5772 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5774 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5775 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5776 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5781 dconsthalf
= dconst1
;
5782 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5784 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5786 const REAL_VALUE_TYPE
*const r
=
5787 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5789 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5791 mode
= GET_MODE_WIDER_MODE (mode
))
5792 const_tiny_rtx
[i
][(int) mode
] =
5793 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5795 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5797 mode
= GET_MODE_WIDER_MODE (mode
))
5798 const_tiny_rtx
[i
][(int) mode
] =
5799 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5801 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5803 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5805 mode
= GET_MODE_WIDER_MODE (mode
))
5806 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5808 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5810 mode
= GET_MODE_WIDER_MODE (mode
))
5811 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5814 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5816 mode
= GET_MODE_WIDER_MODE (mode
))
5818 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5819 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5822 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5824 mode
= GET_MODE_WIDER_MODE (mode
))
5826 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5827 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5830 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5832 mode
= GET_MODE_WIDER_MODE (mode
))
5834 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5835 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5838 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5840 mode
= GET_MODE_WIDER_MODE (mode
))
5842 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5843 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5846 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5848 mode
= GET_MODE_WIDER_MODE (mode
))
5850 FCONST0(mode
).data
.high
= 0;
5851 FCONST0(mode
).data
.low
= 0;
5852 FCONST0(mode
).mode
= mode
;
5853 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5854 FCONST0 (mode
), mode
);
5857 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5859 mode
= GET_MODE_WIDER_MODE (mode
))
5861 FCONST0(mode
).data
.high
= 0;
5862 FCONST0(mode
).data
.low
= 0;
5863 FCONST0(mode
).mode
= mode
;
5864 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5865 FCONST0 (mode
), mode
);
5868 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5870 mode
= GET_MODE_WIDER_MODE (mode
))
5872 FCONST0(mode
).data
.high
= 0;
5873 FCONST0(mode
).data
.low
= 0;
5874 FCONST0(mode
).mode
= mode
;
5875 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5876 FCONST0 (mode
), mode
);
5878 /* We store the value 1. */
5879 FCONST1(mode
).data
.high
= 0;
5880 FCONST1(mode
).data
.low
= 0;
5881 FCONST1(mode
).mode
= mode
;
5882 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5883 2 * HOST_BITS_PER_WIDE_INT
,
5884 &FCONST1(mode
).data
.low
,
5885 &FCONST1(mode
).data
.high
,
5886 SIGNED_FIXED_POINT_MODE_P (mode
));
5887 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5888 FCONST1 (mode
), mode
);
5891 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5893 mode
= GET_MODE_WIDER_MODE (mode
))
5895 FCONST0(mode
).data
.high
= 0;
5896 FCONST0(mode
).data
.low
= 0;
5897 FCONST0(mode
).mode
= mode
;
5898 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5899 FCONST0 (mode
), mode
);
5901 /* We store the value 1. */
5902 FCONST1(mode
).data
.high
= 0;
5903 FCONST1(mode
).data
.low
= 0;
5904 FCONST1(mode
).mode
= mode
;
5905 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5906 2 * HOST_BITS_PER_WIDE_INT
,
5907 &FCONST1(mode
).data
.low
,
5908 &FCONST1(mode
).data
.high
,
5909 SIGNED_FIXED_POINT_MODE_P (mode
));
5910 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5911 FCONST1 (mode
), mode
);
5914 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5916 mode
= GET_MODE_WIDER_MODE (mode
))
5918 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5921 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5923 mode
= GET_MODE_WIDER_MODE (mode
))
5925 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5928 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5930 mode
= GET_MODE_WIDER_MODE (mode
))
5932 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5933 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5936 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5938 mode
= GET_MODE_WIDER_MODE (mode
))
5940 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5941 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5944 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5945 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5946 const_tiny_rtx
[0][i
] = const0_rtx
;
5948 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5949 if (STORE_FLAG_VALUE
== 1)
5950 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5953 /* Produce exact duplicate of insn INSN after AFTER.
5954 Care updating of libcall regions if present. */
5957 emit_copy_of_insn_after (rtx insn
, rtx after
)
5961 switch (GET_CODE (insn
))
5964 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5968 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5972 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5976 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5977 if (CALL_INSN_FUNCTION_USAGE (insn
))
5978 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5979 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5980 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5981 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5982 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5983 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5984 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5991 /* Update LABEL_NUSES. */
5992 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5994 INSN_LOCATOR (new_rtx
) = INSN_LOCATOR (insn
);
5996 /* If the old insn is frame related, then so is the new one. This is
5997 primarily needed for IA-64 unwind info which marks epilogue insns,
5998 which may be duplicated by the basic block reordering code. */
5999 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6001 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6002 will make them. REG_LABEL_TARGETs are created there too, but are
6003 supposed to be sticky, so we copy them. */
6004 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6005 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6007 if (GET_CODE (link
) == EXPR_LIST
)
6008 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6009 copy_insn_1 (XEXP (link
, 0)));
6011 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
6014 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6018 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6020 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6022 if (hard_reg_clobbers
[mode
][regno
])
6023 return hard_reg_clobbers
[mode
][regno
];
6025 return (hard_reg_clobbers
[mode
][regno
] =
6026 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6029 #include "gt-emit-rtl.h"