1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
94 #include "insn-config.h"
95 #include "insn-codes.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
107 #ifndef REGISTER_MOVE_COST
108 #define REGISTER_MOVE_COST(x, y) 2
111 #ifndef REGNO_MODE_OK_FOR_BASE_P
112 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
115 #ifndef REG_MODE_OK_FOR_BASE_P
116 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
119 /* All reloads of the current insn are recorded here. See reload.h for
122 struct reload rld
[MAX_RELOADS
];
124 /* All the "earlyclobber" operands of the current insn
125 are recorded here. */
127 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
129 int reload_n_operands
;
131 /* Replacing reloads.
133 If `replace_reloads' is nonzero, then as each reload is recorded
134 an entry is made for it in the table `replacements'.
135 Then later `subst_reloads' can look through that table and
136 perform all the replacements needed. */
138 /* Nonzero means record the places to replace. */
139 static int replace_reloads
;
141 /* Each replacement is recorded with a structure like this. */
144 rtx
*where
; /* Location to store in */
145 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
146 a SUBREG; 0 otherwise. */
147 int what
; /* which reload this is for */
148 enum machine_mode mode
; /* mode it must have */
151 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
153 /* Number of replacements currently recorded. */
154 static int n_replacements
;
156 /* Used to track what is modified by an operand. */
159 int reg_flag
; /* Nonzero if referencing a register. */
160 int safe
; /* Nonzero if this can't conflict with anything. */
161 rtx base
; /* Base address for MEM. */
162 HOST_WIDE_INT start
; /* Starting offset or register number. */
163 HOST_WIDE_INT end
; /* Ending offset or register number. */
166 #ifdef SECONDARY_MEMORY_NEEDED
168 /* Save MEMs needed to copy from one class of registers to another. One MEM
169 is used per mode, but normally only one or two modes are ever used.
171 We keep two versions, before and after register elimination. The one
172 after register elimination is record separately for each operand. This
173 is done in case the address is not valid to be sure that we separately
176 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
177 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
180 /* The instruction we are doing reloads for;
181 so we can test whether a register dies in it. */
182 static rtx this_insn
;
184 /* Nonzero if this instruction is a user-specified asm with operands. */
185 static int this_insn_is_asm
;
187 /* If hard_regs_live_known is nonzero,
188 we can tell which hard regs are currently live,
189 at least enough to succeed in choosing dummy reloads. */
190 static int hard_regs_live_known
;
192 /* Indexed by hard reg number,
193 element is nonnegative if hard reg has been spilled.
194 This vector is passed to `find_reloads' as an argument
195 and is not changed here. */
196 static short *static_reload_reg_p
;
198 /* Set to 1 in subst_reg_equivs if it changes anything. */
199 static int subst_reg_equivs_changed
;
201 /* On return from push_reload, holds the reload-number for the OUT
202 operand, which can be different for that from the input operand. */
203 static int output_reloadnum
;
205 /* Compare two RTX's. */
206 #define MATCHES(x, y) \
207 (x == y || (x != 0 && (GET_CODE (x) == REG \
208 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
209 : rtx_equal_p (x, y) && ! side_effects_p (x))))
211 /* Indicates if two reloads purposes are for similar enough things that we
212 can merge their reloads. */
213 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
214 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
215 || ((when1) == (when2) && (op1) == (op2)) \
216 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
217 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
218 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
219 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
220 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
222 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
223 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
224 ((when1) != (when2) \
225 || ! ((op1) == (op2) \
226 || (when1) == RELOAD_FOR_INPUT \
227 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
228 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
230 /* If we are going to reload an address, compute the reload type to
232 #define ADDR_TYPE(type) \
233 ((type) == RELOAD_FOR_INPUT_ADDRESS \
234 ? RELOAD_FOR_INPADDR_ADDRESS \
235 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
236 ? RELOAD_FOR_OUTADDR_ADDRESS \
239 #ifdef HAVE_SECONDARY_RELOADS
240 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
241 enum machine_mode
, enum reload_type
,
244 static enum reg_class find_valid_class
PROTO((enum machine_mode
, int));
245 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
246 enum machine_mode
, enum machine_mode
,
247 int, int, int, enum reload_type
));
248 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
249 static void combine_reloads
PROTO((void));
250 static int find_reusable_reload
PROTO((rtx
*, rtx
, enum reg_class
,
251 enum reload_type
, int, int));
252 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
253 enum machine_mode
, enum machine_mode
,
254 enum reg_class
, int, int));
255 static int earlyclobber_operand_p
PROTO((rtx
));
256 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
257 static struct decomposition decompose
PROTO((rtx
));
258 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PROTO((const char *, int));
260 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int, rtx
));
261 static rtx make_memloc
PROTO((rtx
, int));
262 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
263 int, enum reload_type
, int, rtx
));
264 static rtx subst_reg_equivs
PROTO((rtx
, rtx
));
265 static rtx subst_indexed_address
PROTO((rtx
));
266 static int find_reloads_address_1
PROTO((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PROTO((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PROTO((rtx
, rtx
));
274 static int loc_mentioned_in_p
PROTO((rtx
*, rtx
));
276 #ifdef HAVE_SECONDARY_RELOADS
278 /* Determine if any secondary reloads are needed for loading (if IN_P is
279 non-zero) or storing (if IN_P is zero) X to or from a reload register of
280 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
281 are needed, push them.
283 Return the reload number of the secondary reload we made, or -1 if
284 we didn't need one. *PICODE is set to the insn_code to use if we do
285 need a secondary reload. */
288 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
294 enum reg_class reload_class
;
295 enum machine_mode reload_mode
;
296 enum reload_type type
;
297 enum insn_code
*picode
;
299 enum reg_class
class = NO_REGS
;
300 enum machine_mode mode
= reload_mode
;
301 enum insn_code icode
= CODE_FOR_nothing
;
302 enum reg_class t_class
= NO_REGS
;
303 enum machine_mode t_mode
= VOIDmode
;
304 enum insn_code t_icode
= CODE_FOR_nothing
;
305 enum reload_type secondary_type
;
306 int s_reload
, t_reload
= -1;
308 if (type
== RELOAD_FOR_INPUT_ADDRESS
309 || type
== RELOAD_FOR_OUTPUT_ADDRESS
310 || type
== RELOAD_FOR_INPADDR_ADDRESS
311 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
312 secondary_type
= type
;
314 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
316 *picode
= CODE_FOR_nothing
;
318 /* If X is a paradoxical SUBREG, use the inner value to determine both the
319 mode and object being reloaded. */
320 if (GET_CODE (x
) == SUBREG
321 && (GET_MODE_SIZE (GET_MODE (x
))
322 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
325 reload_mode
= GET_MODE (x
);
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem
[REGNO (x
)] != 0)
336 x
= reg_equiv_mem
[REGNO (x
)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_data
[(int) icode
].operand
[in_p
].predicate
360 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
377 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
378 enum reg_class insn_class
379 = (insn_letter
== 'r' ? GENERAL_REGS
380 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
382 if (insn_class
== NO_REGS
384 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
385 /* The scratch register's constraint must start with "=&". */
386 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
387 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
390 if (reg_class_subset_p (reload_class
, insn_class
))
391 mode
= insn_data
[(int) icode
].operand
[2].mode
;
394 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
396 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
397 t_class
= (t_letter
== 'r' ? GENERAL_REGS
398 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
400 icode
= CODE_FOR_nothing
;
404 /* This case isn't valid, so fail. Reload is allowed to use the same
405 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
406 in the case of a secondary register, we actually need two different
407 registers for correct code. We fail here to prevent the possibility of
408 silently generating incorrect code later.
410 The convention is that secondary input reloads are valid only if the
411 secondary_class is different from class. If you have such a case, you
412 can not use secondary reloads, you must work around the problem some
415 Allow this when MODE is not reload_mode and assume that the generated
416 code handles this case (it does on the Alpha, which is the only place
417 this currently happens). */
419 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
422 /* If we need a tertiary reload, see if we have one we can reuse or else
425 if (t_class
!= NO_REGS
)
427 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
428 if (rld
[t_reload
].secondary_p
429 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
430 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
431 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
432 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
433 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
434 == CODE_FOR_nothing
))
435 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
436 == CODE_FOR_nothing
)))
437 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
438 && MERGABLE_RELOADS (secondary_type
,
439 rld
[t_reload
].when_needed
,
440 opnum
, rld
[t_reload
].opnum
))
443 rld
[t_reload
].inmode
= t_mode
;
445 rld
[t_reload
].outmode
= t_mode
;
447 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
448 rld
[t_reload
].class = t_class
;
450 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
451 rld
[t_reload
].optional
&= optional
;
452 rld
[t_reload
].secondary_p
= 1;
453 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
454 opnum
, rld
[t_reload
].opnum
))
455 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
458 if (t_reload
== n_reloads
)
460 /* We need to make a new tertiary reload for this register class. */
461 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
462 rld
[t_reload
].class = t_class
;
463 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
464 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
465 rld
[t_reload
].reg_rtx
= 0;
466 rld
[t_reload
].optional
= optional
;
467 rld
[t_reload
].nongroup
= 0;
468 rld
[t_reload
].inc
= 0;
469 /* Maybe we could combine these, but it seems too tricky. */
470 rld
[t_reload
].nocombine
= 1;
471 rld
[t_reload
].in_reg
= 0;
472 rld
[t_reload
].out_reg
= 0;
473 rld
[t_reload
].opnum
= opnum
;
474 rld
[t_reload
].when_needed
= secondary_type
;
475 rld
[t_reload
].secondary_in_reload
= -1;
476 rld
[t_reload
].secondary_out_reload
= -1;
477 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
478 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
479 rld
[t_reload
].secondary_p
= 1;
485 /* See if we can reuse an existing secondary reload. */
486 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
487 if (rld
[s_reload
].secondary_p
488 && (reg_class_subset_p (class, rld
[s_reload
].class)
489 || reg_class_subset_p (rld
[s_reload
].class, class))
490 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
491 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
492 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
493 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
494 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
495 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
496 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
497 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
498 opnum
, rld
[s_reload
].opnum
))
501 rld
[s_reload
].inmode
= mode
;
503 rld
[s_reload
].outmode
= mode
;
505 if (reg_class_subset_p (class, rld
[s_reload
].class))
506 rld
[s_reload
].class = class;
508 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
509 rld
[s_reload
].optional
&= optional
;
510 rld
[s_reload
].secondary_p
= 1;
511 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
512 opnum
, rld
[s_reload
].opnum
))
513 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
516 if (s_reload
== n_reloads
)
518 #ifdef SECONDARY_MEMORY_NEEDED
519 /* If we need a memory location to copy between the two reload regs,
520 set it up now. Note that we do the input case before making
521 the reload and the output case after. This is due to the
522 way reloads are output. */
524 if (in_p
&& icode
== CODE_FOR_nothing
525 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
526 get_secondary_mem (x
, reload_mode
, opnum
, type
);
529 /* We need to make a new secondary reload for this register class. */
530 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
531 rld
[s_reload
].class = class;
533 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
534 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
535 rld
[s_reload
].reg_rtx
= 0;
536 rld
[s_reload
].optional
= optional
;
537 rld
[s_reload
].nongroup
= 0;
538 rld
[s_reload
].inc
= 0;
539 /* Maybe we could combine these, but it seems too tricky. */
540 rld
[s_reload
].nocombine
= 1;
541 rld
[s_reload
].in_reg
= 0;
542 rld
[s_reload
].out_reg
= 0;
543 rld
[s_reload
].opnum
= opnum
;
544 rld
[s_reload
].when_needed
= secondary_type
;
545 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
546 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
547 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
548 rld
[s_reload
].secondary_out_icode
549 = ! in_p
? t_icode
: CODE_FOR_nothing
;
550 rld
[s_reload
].secondary_p
= 1;
554 #ifdef SECONDARY_MEMORY_NEEDED
555 if (! in_p
&& icode
== CODE_FOR_nothing
556 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
557 get_secondary_mem (x
, mode
, opnum
, type
);
564 #endif /* HAVE_SECONDARY_RELOADS */
566 #ifdef SECONDARY_MEMORY_NEEDED
568 /* Return a memory location that will be used to copy X in mode MODE.
569 If we haven't already made a location for this mode in this insn,
570 call find_reloads_address on the location being returned. */
573 get_secondary_mem (x
, mode
, opnum
, type
)
575 enum machine_mode mode
;
577 enum reload_type type
;
582 /* By default, if MODE is narrower than a word, widen it to a word.
583 This is required because most machines that require these memory
584 locations do not support short load and stores from all registers
585 (e.g., FP registers). */
587 #ifdef SECONDARY_MEMORY_NEEDED_MODE
588 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
590 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
591 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
594 /* If we already have made a MEM for this operand in MODE, return it. */
595 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
596 return secondary_memlocs_elim
[(int) mode
][opnum
];
598 /* If this is the first time we've tried to get a MEM for this mode,
599 allocate a new one. `something_changed' in reload will get set
600 by noticing that the frame size has changed. */
602 if (secondary_memlocs
[(int) mode
] == 0)
604 #ifdef SECONDARY_MEMORY_NEEDED_RTX
605 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
607 secondary_memlocs
[(int) mode
]
608 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
612 /* Get a version of the address doing any eliminations needed. If that
613 didn't give us a new MEM, make a new one if it isn't valid. */
615 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
616 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
618 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
619 loc
= copy_rtx (loc
);
621 /* The only time the call below will do anything is if the stack
622 offset is too large. In that case IND_LEVELS doesn't matter, so we
623 can just pass a zero. Adjust the type to be the address of the
624 corresponding object. If the address was valid, save the eliminated
625 address. If it wasn't valid, we need to make a reload each time, so
630 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
631 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
634 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
638 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
642 /* Clear any secondary memory locations we've made. */
645 clear_secondary_mem ()
647 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
649 #endif /* SECONDARY_MEMORY_NEEDED */
651 /* Find the largest class for which every register number plus N is valid in
652 M1 (if in range). Abort if no such class exists. */
654 static enum reg_class
655 find_valid_class (m1
, n
)
656 enum machine_mode m1
;
661 enum reg_class best_class
;
664 for (class = 1; class < N_REG_CLASSES
; class++)
667 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
668 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
669 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
670 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
673 if (! bad
&& reg_class_size
[class] > best_size
)
674 best_class
= class, best_size
= reg_class_size
[class];
683 /* Return the number of a previously made reload that can be combined with
684 a new one, or n_reloads if none of the existing reloads can be used.
685 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
686 push_reload, they determine the kind of the new reload that we try to
687 combine. P_IN points to the corresponding value of IN, which can be
688 modified by this function.
689 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
691 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
693 enum reg_class
class;
694 enum reload_type type
;
695 int opnum
, dont_share
;
699 /* We can't merge two reloads if the output of either one is
702 if (earlyclobber_operand_p (out
))
705 /* We can use an existing reload if the class is right
706 and at least one of IN and OUT is a match
707 and the other is at worst neutral.
708 (A zero compared against anything is neutral.)
710 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
711 for the same thing since that can cause us to need more reload registers
712 than we otherwise would. */
714 for (i
= 0; i
< n_reloads
; i
++)
715 if ((reg_class_subset_p (class, rld
[i
].class)
716 || reg_class_subset_p (rld
[i
].class, class))
717 /* If the existing reload has a register, it must fit our class. */
718 && (rld
[i
].reg_rtx
== 0
719 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
720 true_regnum (rld
[i
].reg_rtx
)))
721 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
722 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
723 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
724 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
725 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
726 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
727 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
730 /* Reloading a plain reg for input can match a reload to postincrement
731 that reg, since the postincrement's value is the right value.
732 Likewise, it can match a preincrement reload, since we regard
733 the preincrementation as happening before any ref in this insn
735 for (i
= 0; i
< n_reloads
; i
++)
736 if ((reg_class_subset_p (class, rld
[i
].class)
737 || reg_class_subset_p (rld
[i
].class, class))
738 /* If the existing reload has a register, it must fit our
740 && (rld
[i
].reg_rtx
== 0
741 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
742 true_regnum (rld
[i
].reg_rtx
)))
743 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
744 && ((GET_CODE (in
) == REG
745 && (GET_CODE (rld
[i
].in
) == POST_INC
746 || GET_CODE (rld
[i
].in
) == POST_DEC
747 || GET_CODE (rld
[i
].in
) == PRE_INC
748 || GET_CODE (rld
[i
].in
) == PRE_DEC
)
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
751 (GET_CODE (rld
[i
].in
) == REG
752 && (GET_CODE (in
) == POST_INC
753 || GET_CODE (in
) == POST_DEC
754 || GET_CODE (in
) == PRE_INC
755 || GET_CODE (in
) == PRE_DEC
)
756 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
757 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
758 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
759 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
760 opnum
, rld
[i
].opnum
))
762 /* Make sure reload_in ultimately has the increment,
763 not the plain register. */
764 if (GET_CODE (in
) == REG
)
771 /* Record one reload that needs to be performed.
772 IN is an rtx saying where the data are to be found before this instruction.
773 OUT says where they must be stored after the instruction.
774 (IN is zero for data not read, and OUT is zero for data not written.)
775 INLOC and OUTLOC point to the places in the instructions where
776 IN and OUT were found.
777 If IN and OUT are both non-zero, it means the same register must be used
778 to reload both IN and OUT.
780 CLASS is a register class required for the reloaded data.
781 INMODE is the machine mode that the instruction requires
782 for the reg that replaces IN and OUTMODE is likewise for OUT.
784 If IN is zero, then OUT's location and mode should be passed as
787 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
789 OPTIONAL nonzero means this reload does not need to be performed:
790 it can be discarded if that is more convenient.
792 OPNUM and TYPE say what the purpose of this reload is.
794 The return value is the reload-number for this reload.
796 If both IN and OUT are nonzero, in some rare cases we might
797 want to make two separate reloads. (Actually we never do this now.)
798 Therefore, the reload-number for OUT is stored in
799 output_reloadnum when we return; the return value applies to IN.
800 Usually (presently always), when IN and OUT are nonzero,
801 the two reload-numbers are equal, but the caller should be careful to
805 push_reload (in
, out
, inloc
, outloc
, class,
806 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
809 enum reg_class
class;
810 enum machine_mode inmode
, outmode
;
814 enum reload_type type
;
818 int dont_remove_subreg
= 0;
819 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
820 int secondary_in_reload
= -1, secondary_out_reload
= -1;
821 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
822 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
824 /* INMODE and/or OUTMODE could be VOIDmode if no mode
825 has been specified for the operand. In that case,
826 use the operand's mode as the mode to reload. */
827 if (inmode
== VOIDmode
&& in
!= 0)
828 inmode
= GET_MODE (in
);
829 if (outmode
== VOIDmode
&& out
!= 0)
830 outmode
= GET_MODE (out
);
832 /* If IN is a pseudo register everywhere-equivalent to a constant, and
833 it is not in a hard register, reload straight from the constant,
834 since we want to get rid of such pseudo registers.
835 Often this is done earlier, but not always in find_reloads_address. */
836 if (in
!= 0 && GET_CODE (in
) == REG
)
838 register int regno
= REGNO (in
);
840 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
841 && reg_equiv_constant
[regno
] != 0)
842 in
= reg_equiv_constant
[regno
];
845 /* Likewise for OUT. Of course, OUT will never be equivalent to
846 an actual constant, but it might be equivalent to a memory location
847 (in the case of a parameter). */
848 if (out
!= 0 && GET_CODE (out
) == REG
)
850 register int regno
= REGNO (out
);
852 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
853 && reg_equiv_constant
[regno
] != 0)
854 out
= reg_equiv_constant
[regno
];
857 /* If we have a read-write operand with an address side-effect,
858 change either IN or OUT so the side-effect happens only once. */
859 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
861 if (GET_CODE (XEXP (in
, 0)) == POST_INC
862 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
863 in
= gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
864 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
865 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
866 out
= gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
869 /* If we are reloading a (SUBREG constant ...), really reload just the
870 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
871 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
872 a pseudo and hence will become a MEM) with M1 wider than M2 and the
873 register is a pseudo, also reload the inside expression.
874 For machines that extend byte loads, do this for any SUBREG of a pseudo
875 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
876 M2 is an integral mode that gets extended when loaded.
877 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
878 either M1 is not valid for R or M2 is wider than a word but we only
879 need one word to store an M2-sized quantity in R.
880 (However, if OUT is nonzero, we need to reload the reg *and*
881 the subreg, so do nothing here, and let following statement handle it.)
883 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
884 we can't handle it here because CONST_INT does not indicate a mode.
886 Similarly, we must reload the inside expression if we have a
887 STRICT_LOW_PART (presumably, in == out in the cas).
889 Also reload the inner expression if it does not require a secondary
890 reload but the SUBREG does.
892 Finally, reload the inner expression if it is a register that is in
893 the class whose registers cannot be referenced in a different size
894 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
895 cannot reload just the inside since we might end up with the wrong
896 register class. But if it is inside a STRICT_LOW_PART, we have
897 no choice, so we hope we do get the right register class there. */
899 if (in
!= 0 && GET_CODE (in
) == SUBREG
900 && (SUBREG_WORD (in
) == 0 || strict_low
)
901 #ifdef CLASS_CANNOT_CHANGE_SIZE
902 && class != CLASS_CANNOT_CHANGE_SIZE
904 && (CONSTANT_P (SUBREG_REG (in
))
905 || GET_CODE (SUBREG_REG (in
)) == PLUS
907 || (((GET_CODE (SUBREG_REG (in
)) == REG
908 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
909 || GET_CODE (SUBREG_REG (in
)) == MEM
)
910 && ((GET_MODE_SIZE (inmode
)
911 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
912 #ifdef LOAD_EXTEND_OP
913 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
914 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
916 && (GET_MODE_SIZE (inmode
)
917 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
918 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
919 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
921 #ifdef WORD_REGISTER_OPERATIONS
922 || ((GET_MODE_SIZE (inmode
)
923 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
924 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
925 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
929 || (GET_CODE (SUBREG_REG (in
)) == REG
930 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
931 /* The case where out is nonzero
932 is handled differently in the following statement. */
933 && (out
== 0 || SUBREG_WORD (in
) == 0)
934 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
935 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
937 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
939 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
940 GET_MODE (SUBREG_REG (in
)))))
941 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
944 #ifdef SECONDARY_INPUT_RELOAD_CLASS
945 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
946 && (SECONDARY_INPUT_RELOAD_CLASS (class,
947 GET_MODE (SUBREG_REG (in
)),
951 #ifdef CLASS_CANNOT_CHANGE_SIZE
952 || (GET_CODE (SUBREG_REG (in
)) == REG
953 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
954 && (TEST_HARD_REG_BIT
955 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
956 REGNO (SUBREG_REG (in
))))
957 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
958 != GET_MODE_SIZE (inmode
)))
962 in_subreg_loc
= inloc
;
963 inloc
= &SUBREG_REG (in
);
965 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
966 if (GET_CODE (in
) == MEM
)
967 /* This is supposed to happen only for paradoxical subregs made by
968 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
969 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
972 inmode
= GET_MODE (in
);
975 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
976 either M1 is not valid for R or M2 is wider than a word but we only
977 need one word to store an M2-sized quantity in R.
979 However, we must reload the inner reg *as well as* the subreg in
982 /* Similar issue for (SUBREG constant ...) if it was not handled by the
983 code above. This can happen if SUBREG_WORD != 0. */
985 if (in
!= 0 && GET_CODE (in
) == SUBREG
986 && (CONSTANT_P (SUBREG_REG (in
))
987 || (GET_CODE (SUBREG_REG (in
)) == REG
988 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
989 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
992 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
993 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
995 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
997 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
998 GET_MODE (SUBREG_REG (in
)))))))))
1000 /* This relies on the fact that emit_reload_insns outputs the
1001 instructions for input reloads of type RELOAD_OTHER in the same
1002 order as the reloads. Thus if the outer reload is also of type
1003 RELOAD_OTHER, we are guaranteed that this inner reload will be
1004 output before the outer reload. */
1005 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1006 find_valid_class (inmode
, SUBREG_WORD (in
)),
1007 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1008 dont_remove_subreg
= 1;
1011 /* Similarly for paradoxical and problematical SUBREGs on the output.
1012 Note that there is no reason we need worry about the previous value
1013 of SUBREG_REG (out); even if wider than out,
1014 storing in a subreg is entitled to clobber it all
1015 (except in the case of STRICT_LOW_PART,
1016 and in that case the constraint should label it input-output.) */
1017 if (out
!= 0 && GET_CODE (out
) == SUBREG
1018 && (SUBREG_WORD (out
) == 0 || strict_low
)
1019 #ifdef CLASS_CANNOT_CHANGE_SIZE
1020 && class != CLASS_CANNOT_CHANGE_SIZE
1022 && (CONSTANT_P (SUBREG_REG (out
))
1024 || (((GET_CODE (SUBREG_REG (out
)) == REG
1025 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1026 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1027 && ((GET_MODE_SIZE (outmode
)
1028 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1029 #ifdef WORD_REGISTER_OPERATIONS
1030 || ((GET_MODE_SIZE (outmode
)
1031 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1032 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1033 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1037 || (GET_CODE (SUBREG_REG (out
)) == REG
1038 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1039 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1040 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1042 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1044 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1045 GET_MODE (SUBREG_REG (out
)))))
1046 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1047 + SUBREG_WORD (out
)),
1049 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1050 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1051 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1052 GET_MODE (SUBREG_REG (out
)),
1056 #ifdef CLASS_CANNOT_CHANGE_SIZE
1057 || (GET_CODE (SUBREG_REG (out
)) == REG
1058 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1059 && (TEST_HARD_REG_BIT
1060 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1061 REGNO (SUBREG_REG (out
))))
1062 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1063 != GET_MODE_SIZE (outmode
)))
1067 out_subreg_loc
= outloc
;
1068 outloc
= &SUBREG_REG (out
);
1070 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1071 if (GET_CODE (out
) == MEM
1072 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1075 outmode
= GET_MODE (out
);
1078 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1079 either M1 is not valid for R or M2 is wider than a word but we only
1080 need one word to store an M2-sized quantity in R.
1082 However, we must reload the inner reg *as well as* the subreg in
1083 that case. In this case, the inner reg is an in-out reload. */
1085 if (out
!= 0 && GET_CODE (out
) == SUBREG
1086 && GET_CODE (SUBREG_REG (out
)) == REG
1087 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1088 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1090 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1091 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1093 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1095 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1096 GET_MODE (SUBREG_REG (out
)))))))
1098 /* This relies on the fact that emit_reload_insns outputs the
1099 instructions for output reloads of type RELOAD_OTHER in reverse
1100 order of the reloads. Thus if the outer reload is also of type
1101 RELOAD_OTHER, we are guaranteed that this inner reload will be
1102 output after the outer reload. */
1103 dont_remove_subreg
= 1;
1104 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1106 find_valid_class (outmode
, SUBREG_WORD (out
)),
1107 VOIDmode
, VOIDmode
, 0, 0,
1108 opnum
, RELOAD_OTHER
);
1111 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1112 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1113 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1114 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1117 /* If IN is a SUBREG of a hard register, make a new REG. This
1118 simplifies some of the cases below. */
1120 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1121 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1122 && ! dont_remove_subreg
)
1123 in
= gen_rtx_REG (GET_MODE (in
),
1124 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1126 /* Similarly for OUT. */
1127 if (out
!= 0 && GET_CODE (out
) == SUBREG
1128 && GET_CODE (SUBREG_REG (out
)) == REG
1129 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1130 && ! dont_remove_subreg
)
1131 out
= gen_rtx_REG (GET_MODE (out
),
1132 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1134 /* Narrow down the class of register wanted if that is
1135 desirable on this machine for efficiency. */
1137 class = PREFERRED_RELOAD_CLASS (in
, class);
1139 /* Output reloads may need analogous treatment, different in detail. */
1140 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1142 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1145 /* Make sure we use a class that can handle the actual pseudo
1146 inside any subreg. For example, on the 386, QImode regs
1147 can appear within SImode subregs. Although GENERAL_REGS
1148 can handle SImode, QImode needs a smaller class. */
1149 #ifdef LIMIT_RELOAD_CLASS
1151 class = LIMIT_RELOAD_CLASS (inmode
, class);
1152 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1153 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1156 class = LIMIT_RELOAD_CLASS (outmode
, class);
1157 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1158 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1161 /* Verify that this class is at least possible for the mode that
1163 if (this_insn_is_asm
)
1165 enum machine_mode mode
;
1166 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1170 if (mode
== VOIDmode
)
1172 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1177 outmode
= word_mode
;
1179 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1180 if (HARD_REGNO_MODE_OK (i
, mode
)
1181 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1183 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1186 for (j
= 1; j
< nregs
; j
++)
1187 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1192 if (i
== FIRST_PSEUDO_REGISTER
)
1194 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1199 /* Optional output reloads are always OK even if we have no register class,
1200 since the function of these reloads is only to have spill_reg_store etc.
1201 set, so that the storing insn can be deleted later. */
1202 if (class == NO_REGS
1203 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1206 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1210 /* See if we need a secondary reload register to move between CLASS
1211 and IN or CLASS and OUT. Get the icode and push any required reloads
1212 needed for each of them if so. */
1214 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1217 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1218 &secondary_in_icode
);
1221 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1222 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1223 secondary_out_reload
1224 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1225 type
, &secondary_out_icode
);
1228 /* We found no existing reload suitable for re-use.
1229 So add an additional reload. */
1231 #ifdef SECONDARY_MEMORY_NEEDED
1232 /* If a memory location is needed for the copy, make one. */
1233 if (in
!= 0 && GET_CODE (in
) == REG
1234 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1235 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1237 get_secondary_mem (in
, inmode
, opnum
, type
);
1243 rld
[i
].class = class;
1244 rld
[i
].inmode
= inmode
;
1245 rld
[i
].outmode
= outmode
;
1247 rld
[i
].optional
= optional
;
1248 rld
[i
].nongroup
= 0;
1250 rld
[i
].nocombine
= 0;
1251 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1252 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1253 rld
[i
].opnum
= opnum
;
1254 rld
[i
].when_needed
= type
;
1255 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1256 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1257 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1258 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1259 rld
[i
].secondary_p
= 0;
1263 #ifdef SECONDARY_MEMORY_NEEDED
1264 if (out
!= 0 && GET_CODE (out
) == REG
1265 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1266 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1268 get_secondary_mem (out
, outmode
, opnum
, type
);
1273 /* We are reusing an existing reload,
1274 but we may have additional information for it.
1275 For example, we may now have both IN and OUT
1276 while the old one may have just one of them. */
1278 /* The modes can be different. If they are, we want to reload in
1279 the larger mode, so that the value is valid for both modes. */
1280 if (inmode
!= VOIDmode
1281 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1282 rld
[i
].inmode
= inmode
;
1283 if (outmode
!= VOIDmode
1284 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1285 rld
[i
].outmode
= outmode
;
1288 rtx in_reg
= inloc
? *inloc
: 0;
1289 /* If we merge reloads for two distinct rtl expressions that
1290 are identical in content, there might be duplicate address
1291 reloads. Remove the extra set now, so that if we later find
1292 that we can inherit this reload, we can get rid of the
1293 address reloads altogether.
1295 Do not do this if both reloads are optional since the result
1296 would be an optional reload which could potentially leave
1297 unresolved address replacements.
1299 It is not sufficient to call transfer_replacements since
1300 choose_reload_regs will remove the replacements for address
1301 reloads of inherited reloads which results in the same
1303 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1304 && ! (rld
[i
].optional
&& optional
))
1306 /* We must keep the address reload with the lower operand
1308 if (opnum
> rld
[i
].opnum
)
1310 remove_address_replacements (in
);
1312 in_reg
= rld
[i
].in_reg
;
1315 remove_address_replacements (rld
[i
].in
);
1318 rld
[i
].in_reg
= in_reg
;
1323 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1325 if (reg_class_subset_p (class, rld
[i
].class))
1326 rld
[i
].class = class;
1327 rld
[i
].optional
&= optional
;
1328 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1329 opnum
, rld
[i
].opnum
))
1330 rld
[i
].when_needed
= RELOAD_OTHER
;
1331 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1334 /* If the ostensible rtx being reload differs from the rtx found
1335 in the location to substitute, this reload is not safe to combine
1336 because we cannot reliably tell whether it appears in the insn. */
1338 if (in
!= 0 && in
!= *inloc
)
1339 rld
[i
].nocombine
= 1;
1342 /* This was replaced by changes in find_reloads_address_1 and the new
1343 function inc_for_reload, which go with a new meaning of reload_inc. */
1345 /* If this is an IN/OUT reload in an insn that sets the CC,
1346 it must be for an autoincrement. It doesn't work to store
1347 the incremented value after the insn because that would clobber the CC.
1348 So we must do the increment of the value reloaded from,
1349 increment it, store it back, then decrement again. */
1350 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1354 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1355 /* If we did not find a nonzero amount-to-increment-by,
1356 that contradicts the belief that IN is being incremented
1357 in an address in this insn. */
1358 if (rld
[i
].inc
== 0)
1363 /* If we will replace IN and OUT with the reload-reg,
1364 record where they are located so that substitution need
1365 not do a tree walk. */
1367 if (replace_reloads
)
1371 register struct replacement
*r
= &replacements
[n_replacements
++];
1373 r
->subreg_loc
= in_subreg_loc
;
1377 if (outloc
!= 0 && outloc
!= inloc
)
1379 register struct replacement
*r
= &replacements
[n_replacements
++];
1382 r
->subreg_loc
= out_subreg_loc
;
1387 /* If this reload is just being introduced and it has both
1388 an incoming quantity and an outgoing quantity that are
1389 supposed to be made to match, see if either one of the two
1390 can serve as the place to reload into.
1392 If one of them is acceptable, set rld[i].reg_rtx
1395 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1397 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1400 earlyclobber_operand_p (out
));
1402 /* If the outgoing register already contains the same value
1403 as the incoming one, we can dispense with loading it.
1404 The easiest way to tell the caller that is to give a phony
1405 value for the incoming operand (same as outgoing one). */
1406 if (rld
[i
].reg_rtx
== out
1407 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1408 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1409 static_reload_reg_p
, i
, inmode
))
1413 /* If this is an input reload and the operand contains a register that
1414 dies in this insn and is used nowhere else, see if it is the right class
1415 to be used for this reload. Use it if so. (This occurs most commonly
1416 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1417 this if it is also an output reload that mentions the register unless
1418 the output is a SUBREG that clobbers an entire register.
1420 Note that the operand might be one of the spill regs, if it is a
1421 pseudo reg and we are in a block where spilling has not taken place.
1422 But if there is no spilling in this block, that is OK.
1423 An explicitly used hard reg cannot be a spill reg. */
1425 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1430 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1431 if (REG_NOTE_KIND (note
) == REG_DEAD
1432 && GET_CODE (XEXP (note
, 0)) == REG
1433 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1434 && reg_mentioned_p (XEXP (note
, 0), in
)
1435 && ! refers_to_regno_for_reload_p (regno
,
1437 + HARD_REGNO_NREGS (regno
,
1439 PATTERN (this_insn
), inloc
)
1440 /* If this is also an output reload, IN cannot be used as
1441 the reload register if it is set in this insn unless IN
1443 && (out
== 0 || in
== out
1444 || ! hard_reg_set_here_p (regno
,
1446 + HARD_REGNO_NREGS (regno
,
1448 PATTERN (this_insn
)))
1449 /* ??? Why is this code so different from the previous?
1450 Is there any simple coherent way to describe the two together?
1451 What's going on here. */
1453 || (GET_CODE (in
) == SUBREG
1454 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1456 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1457 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1458 /* Make sure the operand fits in the reg that dies. */
1459 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1460 && HARD_REGNO_MODE_OK (regno
, inmode
)
1461 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1462 && HARD_REGNO_MODE_OK (regno
, outmode
)
1463 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1464 && !fixed_regs
[regno
])
1466 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1472 output_reloadnum
= i
;
1477 /* Record an additional place we must replace a value
1478 for which we have already recorded a reload.
1479 RELOADNUM is the value returned by push_reload
1480 when the reload was recorded.
1481 This is used in insn patterns that use match_dup. */
1484 push_replacement (loc
, reloadnum
, mode
)
1487 enum machine_mode mode
;
1489 if (replace_reloads
)
1491 register struct replacement
*r
= &replacements
[n_replacements
++];
1492 r
->what
= reloadnum
;
1499 /* Transfer all replacements that used to be in reload FROM to be in
1503 transfer_replacements (to
, from
)
1508 for (i
= 0; i
< n_replacements
; i
++)
1509 if (replacements
[i
].what
== from
)
1510 replacements
[i
].what
= to
;
1513 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1514 or a subpart of it. If we have any replacements registered for IN_RTX,
1515 cancel the reloads that were supposed to load them.
1516 Return non-zero if we canceled any reloads. */
1518 remove_address_replacements (in_rtx
)
1522 char reload_flags
[MAX_RELOADS
];
1523 int something_changed
= 0;
1525 bzero (reload_flags
, sizeof reload_flags
);
1526 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1528 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1529 reload_flags
[replacements
[i
].what
] |= 1;
1532 replacements
[j
++] = replacements
[i
];
1533 reload_flags
[replacements
[i
].what
] |= 2;
1536 /* Note that the following store must be done before the recursive calls. */
1539 for (i
= n_reloads
- 1; i
>= 0; i
--)
1541 if (reload_flags
[i
] == 1)
1543 deallocate_reload_reg (i
);
1544 remove_address_replacements (rld
[i
].in
);
1546 something_changed
= 1;
1549 return something_changed
;
1552 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1554 loc_mentioned_in_p (loc
, in
)
1557 enum rtx_code code
= GET_CODE (in
);
1558 const char *fmt
= GET_RTX_FORMAT (code
);
1561 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1563 if (loc
== &in
->fld
[i
].rtx
)
1567 if (loc_mentioned_in_p (loc
, XEXP (in
, i
)))
1570 else if (fmt
[i
] == 'E')
1571 for (j
= XVECLEN (in
, i
) - 1; i
>= 0; i
--)
1572 if (loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
1578 /* If there is only one output reload, and it is not for an earlyclobber
1579 operand, try to combine it with a (logically unrelated) input reload
1580 to reduce the number of reload registers needed.
1582 This is safe if the input reload does not appear in
1583 the value being output-reloaded, because this implies
1584 it is not needed any more once the original insn completes.
1586 If that doesn't work, see we can use any of the registers that
1587 die in this insn as a reload register. We can if it is of the right
1588 class and does not appear in the value being output-reloaded. */
1594 int output_reload
= -1;
1595 int secondary_out
= -1;
1598 /* Find the output reload; return unless there is exactly one
1599 and that one is mandatory. */
1601 for (i
= 0; i
< n_reloads
; i
++)
1602 if (rld
[i
].out
!= 0)
1604 if (output_reload
>= 0)
1609 if (output_reload
< 0 || rld
[output_reload
].optional
)
1612 /* An input-output reload isn't combinable. */
1614 if (rld
[output_reload
].in
!= 0)
1617 /* If this reload is for an earlyclobber operand, we can't do anything. */
1618 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1621 /* Check each input reload; can we combine it? */
1623 for (i
= 0; i
< n_reloads
; i
++)
1624 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1625 /* Life span of this reload must not extend past main insn. */
1626 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1627 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1628 && rld
[i
].when_needed
!= RELOAD_OTHER
1629 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1630 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1631 rld
[output_reload
].outmode
))
1633 && rld
[i
].reg_rtx
== 0
1634 #ifdef SECONDARY_MEMORY_NEEDED
1635 /* Don't combine two reloads with different secondary
1636 memory locations. */
1637 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1638 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1639 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1640 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1642 && (SMALL_REGISTER_CLASSES
1643 ? (rld
[i
].class == rld
[output_reload
].class)
1644 : (reg_class_subset_p (rld
[i
].class,
1645 rld
[output_reload
].class)
1646 || reg_class_subset_p (rld
[output_reload
].class,
1648 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1649 /* Args reversed because the first arg seems to be
1650 the one that we imagine being modified
1651 while the second is the one that might be affected. */
1652 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1654 /* However, if the input is a register that appears inside
1655 the output, then we also can't share.
1656 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1657 If the same reload reg is used for both reg 69 and the
1658 result to be stored in memory, then that result
1659 will clobber the address of the memory ref. */
1660 && ! (GET_CODE (rld
[i
].in
) == REG
1661 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1662 rld
[output_reload
].out
))))
1663 && (reg_class_size
[(int) rld
[i
].class]
1664 || SMALL_REGISTER_CLASSES
)
1665 /* We will allow making things slightly worse by combining an
1666 input and an output, but no worse than that. */
1667 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1668 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1672 /* We have found a reload to combine with! */
1673 rld
[i
].out
= rld
[output_reload
].out
;
1674 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1675 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1676 /* Mark the old output reload as inoperative. */
1677 rld
[output_reload
].out
= 0;
1678 /* The combined reload is needed for the entire insn. */
1679 rld
[i
].when_needed
= RELOAD_OTHER
;
1680 /* If the output reload had a secondary reload, copy it. */
1681 if (rld
[output_reload
].secondary_out_reload
!= -1)
1683 rld
[i
].secondary_out_reload
1684 = rld
[output_reload
].secondary_out_reload
;
1685 rld
[i
].secondary_out_icode
1686 = rld
[output_reload
].secondary_out_icode
;
1689 #ifdef SECONDARY_MEMORY_NEEDED
1690 /* Copy any secondary MEM. */
1691 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1692 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1693 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1695 /* If required, minimize the register class. */
1696 if (reg_class_subset_p (rld
[output_reload
].class,
1698 rld
[i
].class = rld
[output_reload
].class;
1700 /* Transfer all replacements from the old reload to the combined. */
1701 for (j
= 0; j
< n_replacements
; j
++)
1702 if (replacements
[j
].what
== output_reload
)
1703 replacements
[j
].what
= i
;
1708 /* If this insn has only one operand that is modified or written (assumed
1709 to be the first), it must be the one corresponding to this reload. It
1710 is safe to use anything that dies in this insn for that output provided
1711 that it does not occur in the output (we already know it isn't an
1712 earlyclobber. If this is an asm insn, give up. */
1714 if (INSN_CODE (this_insn
) == -1)
1717 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1718 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1719 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1722 /* See if some hard register that dies in this insn and is not used in
1723 the output is the right class. Only works if the register we pick
1724 up can fully hold our output reload. */
1725 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1726 if (REG_NOTE_KIND (note
) == REG_DEAD
1727 && GET_CODE (XEXP (note
, 0)) == REG
1728 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1729 rld
[output_reload
].out
)
1730 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1731 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1732 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1733 REGNO (XEXP (note
, 0)))
1734 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1735 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1736 /* Ensure that a secondary or tertiary reload for this output
1737 won't want this register. */
1738 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1739 || (! (TEST_HARD_REG_BIT
1740 (reg_class_contents
[(int) rld
[secondary_out
].class],
1741 REGNO (XEXP (note
, 0))))
1742 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1743 || ! (TEST_HARD_REG_BIT
1744 (reg_class_contents
[(int) rld
[secondary_out
].class],
1745 REGNO (XEXP (note
, 0)))))))
1746 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1748 rld
[output_reload
].reg_rtx
1749 = gen_rtx_REG (rld
[output_reload
].outmode
,
1750 REGNO (XEXP (note
, 0)));
1755 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1756 See if one of IN and OUT is a register that may be used;
1757 this is desirable since a spill-register won't be needed.
1758 If so, return the register rtx that proves acceptable.
1760 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1761 CLASS is the register class required for the reload.
1763 If FOR_REAL is >= 0, it is the number of the reload,
1764 and in some cases when it can be discovered that OUT doesn't need
1765 to be computed, clear out rld[FOR_REAL].out.
1767 If FOR_REAL is -1, this should not be done, because this call
1768 is just to see if a register can be found, not to find and install it.
1770 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1771 puts an additional constraint on being able to use IN for OUT since
1772 IN must not appear elsewhere in the insn (it is assumed that IN itself
1773 is safe from the earlyclobber). */
1776 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1777 inmode
, outmode
, class, for_real
, earlyclobber
)
1778 rtx real_in
, real_out
;
1779 rtx
*inloc
, *outloc
;
1780 enum machine_mode inmode
, outmode
;
1781 enum reg_class
class;
1791 /* If operands exceed a word, we can't use either of them
1792 unless they have the same size. */
1793 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1794 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1795 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1798 /* Find the inside of any subregs. */
1799 while (GET_CODE (out
) == SUBREG
)
1801 out_offset
= SUBREG_WORD (out
);
1802 out
= SUBREG_REG (out
);
1804 while (GET_CODE (in
) == SUBREG
)
1806 in_offset
= SUBREG_WORD (in
);
1807 in
= SUBREG_REG (in
);
1810 /* Narrow down the reg class, the same way push_reload will;
1811 otherwise we might find a dummy now, but push_reload won't. */
1812 class = PREFERRED_RELOAD_CLASS (in
, class);
1814 /* See if OUT will do. */
1815 if (GET_CODE (out
) == REG
1816 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1818 register int regno
= REGNO (out
) + out_offset
;
1819 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1822 /* When we consider whether the insn uses OUT,
1823 ignore references within IN. They don't prevent us
1824 from copying IN into OUT, because those refs would
1825 move into the insn that reloads IN.
1827 However, we only ignore IN in its role as this reload.
1828 If the insn uses IN elsewhere and it contains OUT,
1829 that counts. We can't be sure it's the "same" operand
1830 so it might not go through this reload. */
1832 *inloc
= const0_rtx
;
1834 if (regno
< FIRST_PSEUDO_REGISTER
1835 /* A fixed reg that can overlap other regs better not be used
1836 for reloading in any way. */
1837 #ifdef OVERLAPPING_REGNO_P
1838 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1840 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1841 PATTERN (this_insn
), outloc
))
1844 for (i
= 0; i
< nwords
; i
++)
1845 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1851 if (GET_CODE (real_out
) == REG
)
1854 value
= gen_rtx_REG (outmode
, regno
);
1861 /* Consider using IN if OUT was not acceptable
1862 or if OUT dies in this insn (like the quotient in a divmod insn).
1863 We can't use IN unless it is dies in this insn,
1864 which means we must know accurately which hard regs are live.
1865 Also, the result can't go in IN if IN is used within OUT,
1866 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1867 if (hard_regs_live_known
1868 && GET_CODE (in
) == REG
1869 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1871 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1872 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1873 && !fixed_regs
[REGNO (in
)]
1874 && HARD_REGNO_MODE_OK (REGNO (in
),
1875 /* The only case where out and real_out might
1876 have different modes is where real_out
1877 is a subreg, and in that case, out
1879 (GET_MODE (out
) != VOIDmode
1880 ? GET_MODE (out
) : outmode
)))
1882 register int regno
= REGNO (in
) + in_offset
;
1883 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1885 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1886 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1887 PATTERN (this_insn
))
1889 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1890 PATTERN (this_insn
), inloc
)))
1893 for (i
= 0; i
< nwords
; i
++)
1894 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1900 /* If we were going to use OUT as the reload reg
1901 and changed our mind, it means OUT is a dummy that
1902 dies here. So don't bother copying value to it. */
1903 if (for_real
>= 0 && value
== real_out
)
1904 rld
[for_real
].out
= 0;
1905 if (GET_CODE (real_in
) == REG
)
1908 value
= gen_rtx_REG (inmode
, regno
);
1916 /* This page contains subroutines used mainly for determining
1917 whether the IN or an OUT of a reload can serve as the
1920 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1923 earlyclobber_operand_p (x
)
1928 for (i
= 0; i
< n_earlyclobbers
; i
++)
1929 if (reload_earlyclobbers
[i
] == x
)
1935 /* Return 1 if expression X alters a hard reg in the range
1936 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1937 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1938 X should be the body of an instruction. */
1941 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1942 register int beg_regno
, end_regno
;
1945 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1947 register rtx op0
= SET_DEST (x
);
1948 while (GET_CODE (op0
) == SUBREG
)
1949 op0
= SUBREG_REG (op0
);
1950 if (GET_CODE (op0
) == REG
)
1952 register int r
= REGNO (op0
);
1953 /* See if this reg overlaps range under consideration. */
1955 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1959 else if (GET_CODE (x
) == PARALLEL
)
1961 register int i
= XVECLEN (x
, 0) - 1;
1963 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1970 /* Return 1 if ADDR is a valid memory address for mode MODE,
1971 and check that each pseudo reg has the proper kind of
1975 strict_memory_address_p (mode
, addr
)
1976 enum machine_mode mode
;
1979 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1986 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1987 if they are the same hard reg, and has special hacks for
1988 autoincrement and autodecrement.
1989 This is specifically intended for find_reloads to use
1990 in determining whether two operands match.
1991 X is the operand whose number is the lower of the two.
1993 The value is 2 if Y contains a pre-increment that matches
1994 a non-incrementing address in X. */
1996 /* ??? To be completely correct, we should arrange to pass
1997 for X the output operand and for Y the input operand.
1998 For now, we assume that the output operand has the lower number
1999 because that is natural in (SET output (... input ...)). */
2002 operands_match_p (x
, y
)
2006 register RTX_CODE code
= GET_CODE (x
);
2007 register const char *fmt
;
2012 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2013 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2014 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2020 i
= REGNO (SUBREG_REG (x
));
2021 if (i
>= FIRST_PSEUDO_REGISTER
)
2023 i
+= SUBREG_WORD (x
);
2028 if (GET_CODE (y
) == SUBREG
)
2030 j
= REGNO (SUBREG_REG (y
));
2031 if (j
>= FIRST_PSEUDO_REGISTER
)
2033 j
+= SUBREG_WORD (y
);
2038 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2039 multiple hard register group, so that for example (reg:DI 0) and
2040 (reg:SI 1) will be considered the same register. */
2041 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2042 && i
< FIRST_PSEUDO_REGISTER
)
2043 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2044 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2045 && j
< FIRST_PSEUDO_REGISTER
)
2046 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2050 /* If two operands must match, because they are really a single
2051 operand of an assembler insn, then two postincrements are invalid
2052 because the assembler insn would increment only once.
2053 On the other hand, an postincrement matches ordinary indexing
2054 if the postincrement is the output operand. */
2055 if (code
== POST_DEC
|| code
== POST_INC
)
2056 return operands_match_p (XEXP (x
, 0), y
);
2057 /* Two preincrements are invalid
2058 because the assembler insn would increment only once.
2059 On the other hand, an preincrement matches ordinary indexing
2060 if the preincrement is the input operand.
2061 In this case, return 2, since some callers need to do special
2062 things when this happens. */
2063 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
2064 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2068 /* Now we have disposed of all the cases
2069 in which different rtx codes can match. */
2070 if (code
!= GET_CODE (y
))
2072 if (code
== LABEL_REF
)
2073 return XEXP (x
, 0) == XEXP (y
, 0);
2074 if (code
== SYMBOL_REF
)
2075 return XSTR (x
, 0) == XSTR (y
, 0);
2077 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2079 if (GET_MODE (x
) != GET_MODE (y
))
2082 /* Compare the elements. If any pair of corresponding elements
2083 fail to match, return 0 for the whole things. */
2086 fmt
= GET_RTX_FORMAT (code
);
2087 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2093 if (XWINT (x
, i
) != XWINT (y
, i
))
2098 if (XINT (x
, i
) != XINT (y
, i
))
2103 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2106 /* If any subexpression returns 2,
2107 we should return 2 if we are successful. */
2116 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2118 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2120 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2128 /* It is believed that rtx's at this level will never
2129 contain anything but integers and other rtx's,
2130 except for within LABEL_REFs and SYMBOL_REFs. */
2135 return 1 + success_2
;
2138 /* Describe the range of registers or memory referenced by X.
2139 If X is a register, set REG_FLAG and put the first register
2140 number into START and the last plus one into END.
2141 If X is a memory reference, put a base address into BASE
2142 and a range of integer offsets into START and END.
2143 If X is pushing on the stack, we can assume it causes no trouble,
2144 so we set the SAFE field. */
2146 static struct decomposition
2150 struct decomposition val
;
2156 if (GET_CODE (x
) == MEM
)
2158 rtx base
= NULL_RTX
, offset
= 0;
2159 rtx addr
= XEXP (x
, 0);
2161 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2162 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2164 val
.base
= XEXP (addr
, 0);
2165 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2166 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2167 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2171 if (GET_CODE (addr
) == CONST
)
2173 addr
= XEXP (addr
, 0);
2176 if (GET_CODE (addr
) == PLUS
)
2178 if (CONSTANT_P (XEXP (addr
, 0)))
2180 base
= XEXP (addr
, 1);
2181 offset
= XEXP (addr
, 0);
2183 else if (CONSTANT_P (XEXP (addr
, 1)))
2185 base
= XEXP (addr
, 0);
2186 offset
= XEXP (addr
, 1);
2193 offset
= const0_rtx
;
2195 if (GET_CODE (offset
) == CONST
)
2196 offset
= XEXP (offset
, 0);
2197 if (GET_CODE (offset
) == PLUS
)
2199 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2201 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2202 offset
= XEXP (offset
, 0);
2204 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2206 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2207 offset
= XEXP (offset
, 1);
2211 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2212 offset
= const0_rtx
;
2215 else if (GET_CODE (offset
) != CONST_INT
)
2217 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2218 offset
= const0_rtx
;
2221 if (all_const
&& GET_CODE (base
) == PLUS
)
2222 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2224 if (GET_CODE (offset
) != CONST_INT
)
2227 val
.start
= INTVAL (offset
);
2228 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2232 else if (GET_CODE (x
) == REG
)
2235 val
.start
= true_regnum (x
);
2238 /* A pseudo with no hard reg. */
2239 val
.start
= REGNO (x
);
2240 val
.end
= val
.start
+ 1;
2244 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2246 else if (GET_CODE (x
) == SUBREG
)
2248 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2249 /* This could be more precise, but it's good enough. */
2250 return decompose (SUBREG_REG (x
));
2252 val
.start
= true_regnum (x
);
2254 return decompose (SUBREG_REG (x
));
2257 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2259 else if (CONSTANT_P (x
)
2260 /* This hasn't been assigned yet, so it can't conflict yet. */
2261 || GET_CODE (x
) == SCRATCH
)
2268 /* Return 1 if altering Y will not modify the value of X.
2269 Y is also described by YDATA, which should be decompose (Y). */
2272 immune_p (x
, y
, ydata
)
2274 struct decomposition ydata
;
2276 struct decomposition xdata
;
2279 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2283 if (GET_CODE (y
) != MEM
)
2285 /* If Y is memory and X is not, Y can't affect X. */
2286 if (GET_CODE (x
) != MEM
)
2289 xdata
= decompose (x
);
2291 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2293 /* If bases are distinct symbolic constants, there is no overlap. */
2294 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2296 /* Constants and stack slots never overlap. */
2297 if (CONSTANT_P (xdata
.base
)
2298 && (ydata
.base
== frame_pointer_rtx
2299 || ydata
.base
== hard_frame_pointer_rtx
2300 || ydata
.base
== stack_pointer_rtx
))
2302 if (CONSTANT_P (ydata
.base
)
2303 && (xdata
.base
== frame_pointer_rtx
2304 || xdata
.base
== hard_frame_pointer_rtx
2305 || xdata
.base
== stack_pointer_rtx
))
2307 /* If either base is variable, we don't know anything. */
2312 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2315 /* Similar, but calls decompose. */
2318 safe_from_earlyclobber (op
, clobber
)
2321 struct decomposition early_data
;
2323 early_data
= decompose (clobber
);
2324 return immune_p (op
, clobber
, early_data
);
2327 /* Main entry point of this file: search the body of INSN
2328 for values that need reloading and record them with push_reload.
2329 REPLACE nonzero means record also where the values occur
2330 so that subst_reloads can be used.
2332 IND_LEVELS says how many levels of indirection are supported by this
2333 machine; a value of zero means that a memory reference is not a valid
2336 LIVE_KNOWN says we have valid information about which hard
2337 regs are live at each point in the program; this is true when
2338 we are called from global_alloc but false when stupid register
2339 allocation has been done.
2341 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2342 which is nonnegative if the reg has been commandeered for reloading into.
2343 It is copied into STATIC_RELOAD_REG_P and referenced from there
2344 by various subroutines.
2346 Return TRUE if some operands need to be changed, because of swapping
2347 commutative operands, reg_equiv_address substitution, or whatever. */
2350 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2352 int replace
, ind_levels
;
2354 short *reload_reg_p
;
2356 register int insn_code_number
;
2359 /* These start out as the constraints for the insn
2360 and they are chewed up as we consider alternatives. */
2361 char *constraints
[MAX_RECOG_OPERANDS
];
2362 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2364 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2365 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2366 /* Nonzero for a MEM operand whose entire address needs a reload. */
2367 int address_reloaded
[MAX_RECOG_OPERANDS
];
2368 /* Value of enum reload_type to use for operand. */
2369 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2370 /* Value of enum reload_type to use within address of operand. */
2371 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2372 /* Save the usage of each operand. */
2373 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2374 int no_input_reloads
= 0, no_output_reloads
= 0;
2376 int this_alternative
[MAX_RECOG_OPERANDS
];
2377 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2378 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2379 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2380 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2382 int goal_alternative
[MAX_RECOG_OPERANDS
];
2383 int this_alternative_number
;
2384 int goal_alternative_number
;
2385 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2386 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2387 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2388 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2389 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2390 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2391 int goal_alternative_swapped
;
2395 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2396 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2397 rtx body
= PATTERN (insn
);
2398 rtx set
= single_set (insn
);
2399 int goal_earlyclobber
, this_earlyclobber
;
2400 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2406 n_earlyclobbers
= 0;
2407 replace_reloads
= replace
;
2408 hard_regs_live_known
= live_known
;
2409 static_reload_reg_p
= reload_reg_p
;
2411 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2412 neither are insns that SET cc0. Insns that use CC0 are not allowed
2413 to have any input reloads. */
2414 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2415 no_output_reloads
= 1;
2418 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2419 no_input_reloads
= 1;
2420 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2421 no_output_reloads
= 1;
2424 #ifdef SECONDARY_MEMORY_NEEDED
2425 /* The eliminated forms of any secondary memory locations are per-insn, so
2426 clear them out here. */
2428 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2431 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2432 is cheap to move between them. If it is not, there may not be an insn
2433 to do the copy, so we may need a reload. */
2434 if (GET_CODE (body
) == SET
2435 && GET_CODE (SET_DEST (body
)) == REG
2436 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2437 && GET_CODE (SET_SRC (body
)) == REG
2438 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2439 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2440 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2443 extract_insn (insn
);
2445 noperands
= reload_n_operands
= recog_data
.n_operands
;
2446 n_alternatives
= recog_data
.n_alternatives
;
2448 /* Just return "no reloads" if insn has no operands with constraints. */
2449 if (noperands
== 0 || n_alternatives
== 0)
2452 insn_code_number
= INSN_CODE (insn
);
2453 this_insn_is_asm
= insn_code_number
< 0;
2455 bcopy ((char *) recog_data
.operand_mode
, (char *) operand_mode
,
2456 noperands
* sizeof (enum machine_mode
));
2457 bcopy ((char *) recog_data
.constraints
, (char *) constraints
,
2458 noperands
* sizeof (char *));
2462 /* If we will need to know, later, whether some pair of operands
2463 are the same, we must compare them now and save the result.
2464 Reloading the base and index registers will clobber them
2465 and afterward they will fail to match. */
2467 for (i
= 0; i
< noperands
; i
++)
2472 substed_operand
[i
] = recog_data
.operand
[i
];
2475 modified
[i
] = RELOAD_READ
;
2477 /* Scan this operand's constraint to see if it is an output operand,
2478 an in-out operand, is commutative, or should match another. */
2483 modified
[i
] = RELOAD_WRITE
;
2485 modified
[i
] = RELOAD_READ_WRITE
;
2488 /* The last operand should not be marked commutative. */
2489 if (i
== noperands
- 1)
2494 else if (c
>= '0' && c
<= '9')
2497 operands_match
[c
][i
]
2498 = operands_match_p (recog_data
.operand
[c
],
2499 recog_data
.operand
[i
]);
2501 /* An operand may not match itself. */
2505 /* If C can be commuted with C+1, and C might need to match I,
2506 then C+1 might also need to match I. */
2507 if (commutative
>= 0)
2509 if (c
== commutative
|| c
== commutative
+ 1)
2511 int other
= c
+ (c
== commutative
? 1 : -1);
2512 operands_match
[other
][i
]
2513 = operands_match_p (recog_data
.operand
[other
],
2514 recog_data
.operand
[i
]);
2516 if (i
== commutative
|| i
== commutative
+ 1)
2518 int other
= i
+ (i
== commutative
? 1 : -1);
2519 operands_match
[c
][other
]
2520 = operands_match_p (recog_data
.operand
[c
],
2521 recog_data
.operand
[other
]);
2523 /* Note that C is supposed to be less than I.
2524 No need to consider altering both C and I because in
2525 that case we would alter one into the other. */
2531 /* Examine each operand that is a memory reference or memory address
2532 and reload parts of the addresses into index registers.
2533 Also here any references to pseudo regs that didn't get hard regs
2534 but are equivalent to constants get replaced in the insn itself
2535 with those constants. Nobody will ever see them again.
2537 Finally, set up the preferred classes of each operand. */
2539 for (i
= 0; i
< noperands
; i
++)
2541 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2543 address_reloaded
[i
] = 0;
2544 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2545 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2548 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2549 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2552 if (*constraints
[i
] == 0)
2553 /* Ignore things like match_operator operands. */
2555 else if (constraints
[i
][0] == 'p')
2557 find_reloads_address (VOIDmode
, NULL_PTR
,
2558 recog_data
.operand
[i
],
2559 recog_data
.operand_loc
[i
],
2560 i
, operand_type
[i
], ind_levels
, insn
);
2562 /* If we now have a simple operand where we used to have a
2563 PLUS or MULT, re-recognize and try again. */
2564 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2565 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2566 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2567 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2569 INSN_CODE (insn
) = -1;
2570 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2575 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2576 substed_operand
[i
] = recog_data
.operand
[i
];
2578 else if (code
== MEM
)
2581 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2582 recog_data
.operand_loc
[i
],
2583 XEXP (recog_data
.operand
[i
], 0),
2584 &XEXP (recog_data
.operand
[i
], 0),
2585 i
, address_type
[i
], ind_levels
, insn
);
2586 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2587 substed_operand
[i
] = recog_data
.operand
[i
];
2589 else if (code
== SUBREG
)
2591 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2593 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2596 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2599 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2600 that didn't get a hard register, emit a USE with a REG_EQUAL
2601 note in front so that we might inherit a previous, possibly
2605 && GET_CODE (op
) == MEM
2606 && GET_CODE (reg
) == REG
2607 && (GET_MODE_SIZE (GET_MODE (reg
))
2608 >= GET_MODE_SIZE (GET_MODE (op
))))
2609 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2610 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2611 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2613 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2615 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2616 /* We can get a PLUS as an "operand" as a result of register
2617 elimination. See eliminate_regs and gen_reload. We handle
2618 a unary operator by reloading the operand. */
2619 substed_operand
[i
] = recog_data
.operand
[i
]
2620 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2621 ind_levels
, 0, insn
);
2622 else if (code
== REG
)
2624 /* This is equivalent to calling find_reloads_toplev.
2625 The code is duplicated for speed.
2626 When we find a pseudo always equivalent to a constant,
2627 we replace it by the constant. We must be sure, however,
2628 that we don't try to replace it in the insn in which it
2630 register int regno
= REGNO (recog_data
.operand
[i
]);
2631 if (reg_equiv_constant
[regno
] != 0
2632 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2634 /* Record the existing mode so that the check if constants are
2635 allowed will work when operand_mode isn't specified. */
2637 if (operand_mode
[i
] == VOIDmode
)
2638 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2640 substed_operand
[i
] = recog_data
.operand
[i
]
2641 = reg_equiv_constant
[regno
];
2643 if (reg_equiv_memory_loc
[regno
] != 0
2644 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2645 /* We need not give a valid is_set_dest argument since the case
2646 of a constant equivalence was checked above. */
2647 substed_operand
[i
] = recog_data
.operand
[i
]
2648 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2649 ind_levels
, 0, insn
);
2651 /* If the operand is still a register (we didn't replace it with an
2652 equivalent), get the preferred class to reload it into. */
2653 code
= GET_CODE (recog_data
.operand
[i
]);
2655 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2656 >= FIRST_PSEUDO_REGISTER
)
2657 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2661 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2662 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2666 /* If we made any reloads for addresses, see if they violate a
2667 "no input reloads" requirement for this insn. */
2668 if (no_input_reloads
)
2669 for (i
= 0; i
< n_reloads
; i
++)
2674 /* If this is simply a copy from operand 1 to operand 0, merge the
2675 preferred classes for the operands. */
2676 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2677 && recog_data
.operand
[1] == SET_SRC (set
))
2679 preferred_class
[0] = preferred_class
[1]
2680 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2681 pref_or_nothing
[0] |= pref_or_nothing
[1];
2682 pref_or_nothing
[1] |= pref_or_nothing
[0];
2685 /* Now see what we need for pseudo-regs that didn't get hard regs
2686 or got the wrong kind of hard reg. For this, we must consider
2687 all the operands together against the register constraints. */
2689 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2692 goal_alternative_swapped
= 0;
2695 /* The constraints are made of several alternatives.
2696 Each operand's constraint looks like foo,bar,... with commas
2697 separating the alternatives. The first alternatives for all
2698 operands go together, the second alternatives go together, etc.
2700 First loop over alternatives. */
2702 for (this_alternative_number
= 0;
2703 this_alternative_number
< n_alternatives
;
2704 this_alternative_number
++)
2706 /* Loop over operands for one constraint alternative. */
2707 /* LOSERS counts those that don't fit this alternative
2708 and would require loading. */
2710 /* BAD is set to 1 if it some operand can't fit this alternative
2711 even after reloading. */
2713 /* REJECT is a count of how undesirable this alternative says it is
2714 if any reloading is required. If the alternative matches exactly
2715 then REJECT is ignored, but otherwise it gets this much
2716 counted against it in addition to the reloading needed. Each
2717 ? counts three times here since we want the disparaging caused by
2718 a bad register class to only count 1/3 as much. */
2721 this_earlyclobber
= 0;
2723 for (i
= 0; i
< noperands
; i
++)
2725 register char *p
= constraints
[i
];
2726 register int win
= 0;
2727 /* 0 => this operand can be reloaded somehow for this alternative */
2729 /* 0 => this operand can be reloaded if the alternative allows regs. */
2732 register rtx operand
= recog_data
.operand
[i
];
2734 /* Nonzero means this is a MEM that must be reloaded into a reg
2735 regardless of what the constraint says. */
2736 int force_reload
= 0;
2738 /* Nonzero if a constant forced into memory would be OK for this
2741 int earlyclobber
= 0;
2743 /* If the predicate accepts a unary operator, it means that
2744 we need to reload the operand, but do not do this for
2745 match_operator and friends. */
2746 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2747 operand
= XEXP (operand
, 0);
2749 /* If the operand is a SUBREG, extract
2750 the REG or MEM (or maybe even a constant) within.
2751 (Constants can occur as a result of reg_equiv_constant.) */
2753 while (GET_CODE (operand
) == SUBREG
)
2755 offset
+= SUBREG_WORD (operand
);
2756 operand
= SUBREG_REG (operand
);
2757 /* Force reload if this is a constant or PLUS or if there may
2758 be a problem accessing OPERAND in the outer mode. */
2759 if (CONSTANT_P (operand
)
2760 || GET_CODE (operand
) == PLUS
2761 /* We must force a reload of paradoxical SUBREGs
2762 of a MEM because the alignment of the inner value
2763 may not be enough to do the outer reference. On
2764 big-endian machines, it may also reference outside
2767 On machines that extend byte operations and we have a
2768 SUBREG where both the inner and outer modes are no wider
2769 than a word and the inner mode is narrower, is integral,
2770 and gets extended when loaded from memory, combine.c has
2771 made assumptions about the behavior of the machine in such
2772 register access. If the data is, in fact, in memory we
2773 must always load using the size assumed to be in the
2774 register and let the insn do the different-sized
2777 This is doubly true if WORD_REGISTER_OPERATIONS. In
2778 this case eliminate_regs has left non-paradoxical
2779 subregs for push_reloads to see. Make sure it does
2780 by forcing the reload.
2782 ??? When is it right at this stage to have a subreg
2783 of a mem that is _not_ to be handled specialy? IMO
2784 those should have been reduced to just a mem. */
2785 || ((GET_CODE (operand
) == MEM
2786 || (GET_CODE (operand
)== REG
2787 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2788 #ifndef WORD_REGISTER_OPERATIONS
2789 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2790 < BIGGEST_ALIGNMENT
)
2791 && (GET_MODE_SIZE (operand_mode
[i
])
2792 > GET_MODE_SIZE (GET_MODE (operand
))))
2793 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2794 #ifdef LOAD_EXTEND_OP
2795 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2796 && (GET_MODE_SIZE (GET_MODE (operand
))
2798 && (GET_MODE_SIZE (operand_mode
[i
])
2799 > GET_MODE_SIZE (GET_MODE (operand
)))
2800 && INTEGRAL_MODE_P (GET_MODE (operand
))
2801 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2806 /* Subreg of a hard reg which can't handle the subreg's mode
2807 or which would handle that mode in the wrong number of
2808 registers for subregging to work. */
2809 || (GET_CODE (operand
) == REG
2810 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2811 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2812 && (GET_MODE_SIZE (GET_MODE (operand
))
2814 && ((GET_MODE_SIZE (GET_MODE (operand
))
2816 != HARD_REGNO_NREGS (REGNO (operand
),
2817 GET_MODE (operand
))))
2818 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2823 this_alternative
[i
] = (int) NO_REGS
;
2824 this_alternative_win
[i
] = 0;
2825 this_alternative_offmemok
[i
] = 0;
2826 this_alternative_earlyclobber
[i
] = 0;
2827 this_alternative_matches
[i
] = -1;
2829 /* An empty constraint or empty alternative
2830 allows anything which matched the pattern. */
2831 if (*p
== 0 || *p
== ',')
2834 /* Scan this alternative's specs for this operand;
2835 set WIN if the operand fits any letter in this alternative.
2836 Otherwise, clear BADOP if this operand could
2837 fit some letter after reloads,
2838 or set WINREG if this operand could fit after reloads
2839 provided the constraint allows some registers. */
2841 while (*p
&& (c
= *p
++) != ',')
2844 case '=': case '+': case '*':
2848 /* The last operand should not be marked commutative. */
2849 if (i
!= noperands
- 1)
2862 /* Ignore rest of this alternative as far as
2863 reloading is concerned. */
2864 while (*p
&& *p
!= ',') p
++;
2867 case '0': case '1': case '2': case '3': case '4':
2868 case '5': case '6': case '7': case '8': case '9':
2871 this_alternative_matches
[i
] = c
;
2872 /* We are supposed to match a previous operand.
2873 If we do, we win if that one did.
2874 If we do not, count both of the operands as losers.
2875 (This is too conservative, since most of the time
2876 only a single reload insn will be needed to make
2877 the two operands win. As a result, this alternative
2878 may be rejected when it is actually desirable.) */
2879 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2880 /* If we are matching as if two operands were swapped,
2881 also pretend that operands_match had been computed
2883 But if I is the second of those and C is the first,
2884 don't exchange them, because operands_match is valid
2885 only on one side of its diagonal. */
2887 [(c
== commutative
|| c
== commutative
+ 1)
2888 ? 2*commutative
+ 1 - c
: c
]
2889 [(i
== commutative
|| i
== commutative
+ 1)
2890 ? 2*commutative
+ 1 - i
: i
])
2891 : operands_match
[c
][i
])
2893 /* If we are matching a non-offsettable address where an
2894 offsettable address was expected, then we must reject
2895 this combination, because we can't reload it. */
2896 if (this_alternative_offmemok
[c
]
2897 && GET_CODE (recog_data
.operand
[c
]) == MEM
2898 && this_alternative
[c
] == (int) NO_REGS
2899 && ! this_alternative_win
[c
])
2902 win
= this_alternative_win
[c
];
2906 /* Operands don't match. */
2908 /* Retroactively mark the operand we had to match
2909 as a loser, if it wasn't already. */
2910 if (this_alternative_win
[c
])
2912 this_alternative_win
[c
] = 0;
2913 if (this_alternative
[c
] == (int) NO_REGS
)
2915 /* But count the pair only once in the total badness of
2916 this alternative, if the pair can be a dummy reload. */
2918 = find_dummy_reload (recog_data
.operand
[i
],
2919 recog_data
.operand
[c
],
2920 recog_data
.operand_loc
[i
],
2921 recog_data
.operand_loc
[c
],
2922 operand_mode
[i
], operand_mode
[c
],
2923 this_alternative
[c
], -1,
2924 this_alternative_earlyclobber
[c
]);
2929 /* This can be fixed with reloads if the operand
2930 we are supposed to match can be fixed with reloads. */
2932 this_alternative
[i
] = this_alternative
[c
];
2934 /* If we have to reload this operand and some previous
2935 operand also had to match the same thing as this
2936 operand, we don't know how to do that. So reject this
2938 if (! win
|| force_reload
)
2939 for (j
= 0; j
< i
; j
++)
2940 if (this_alternative_matches
[j
]
2941 == this_alternative_matches
[i
])
2947 /* All necessary reloads for an address_operand
2948 were handled in find_reloads_address. */
2949 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2956 if (GET_CODE (operand
) == MEM
2957 || (GET_CODE (operand
) == REG
2958 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2959 && reg_renumber
[REGNO (operand
)] < 0))
2961 if (CONSTANT_P (operand
)
2962 /* force_const_mem does not accept HIGH. */
2963 && GET_CODE (operand
) != HIGH
)
2969 if (GET_CODE (operand
) == MEM
2970 && ! address_reloaded
[i
]
2971 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2972 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2977 if (GET_CODE (operand
) == MEM
2978 && ! address_reloaded
[i
]
2979 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2980 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2984 /* Memory operand whose address is not offsettable. */
2988 if (GET_CODE (operand
) == MEM
2989 && ! (ind_levels
? offsettable_memref_p (operand
)
2990 : offsettable_nonstrict_memref_p (operand
))
2991 /* Certain mem addresses will become offsettable
2992 after they themselves are reloaded. This is important;
2993 we don't want our own handling of unoffsettables
2994 to override the handling of reg_equiv_address. */
2995 && !(GET_CODE (XEXP (operand
, 0)) == REG
2997 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3001 /* Memory operand whose address is offsettable. */
3005 if ((GET_CODE (operand
) == MEM
3006 /* If IND_LEVELS, find_reloads_address won't reload a
3007 pseudo that didn't get a hard reg, so we have to
3008 reject that case. */
3009 && ((ind_levels
? offsettable_memref_p (operand
)
3010 : offsettable_nonstrict_memref_p (operand
))
3011 /* A reloaded address is offsettable because it is now
3012 just a simple register indirect. */
3013 || address_reloaded
[i
]))
3014 || (GET_CODE (operand
) == REG
3015 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3016 && reg_renumber
[REGNO (operand
)] < 0
3017 /* If reg_equiv_address is nonzero, we will be
3018 loading it into a register; hence it will be
3019 offsettable, but we cannot say that reg_equiv_mem
3020 is offsettable without checking. */
3021 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3022 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3023 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3025 /* force_const_mem does not accept HIGH. */
3026 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3027 || GET_CODE (operand
) == MEM
)
3034 /* Output operand that is stored before the need for the
3035 input operands (and their index registers) is over. */
3036 earlyclobber
= 1, this_earlyclobber
= 1;
3040 #ifndef REAL_ARITHMETIC
3041 /* Match any floating double constant, but only if
3042 we can examine the bits of it reliably. */
3043 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3044 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3045 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3048 if (GET_CODE (operand
) == CONST_DOUBLE
)
3053 if (GET_CODE (operand
) == CONST_DOUBLE
)
3059 if (GET_CODE (operand
) == CONST_DOUBLE
3060 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3065 if (GET_CODE (operand
) == CONST_INT
3066 || (GET_CODE (operand
) == CONST_DOUBLE
3067 && GET_MODE (operand
) == VOIDmode
))
3070 if (CONSTANT_P (operand
)
3071 #ifdef LEGITIMATE_PIC_OPERAND_P
3072 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3079 if (GET_CODE (operand
) == CONST_INT
3080 || (GET_CODE (operand
) == CONST_DOUBLE
3081 && GET_MODE (operand
) == VOIDmode
))
3093 if (GET_CODE (operand
) == CONST_INT
3094 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3104 /* A PLUS is never a valid operand, but reload can make
3105 it from a register when eliminating registers. */
3106 && GET_CODE (operand
) != PLUS
3107 /* A SCRATCH is not a valid operand. */
3108 && GET_CODE (operand
) != SCRATCH
3109 #ifdef LEGITIMATE_PIC_OPERAND_P
3110 && (! CONSTANT_P (operand
)
3112 || LEGITIMATE_PIC_OPERAND_P (operand
))
3114 && (GENERAL_REGS
== ALL_REGS
3115 || GET_CODE (operand
) != REG
3116 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3117 && reg_renumber
[REGNO (operand
)] < 0)))
3119 /* Drop through into 'r' case */
3123 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3126 #ifdef EXTRA_CONSTRAINT
3132 if (EXTRA_CONSTRAINT (operand
, c
))
3139 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3142 if (GET_MODE (operand
) == BLKmode
)
3145 if (GET_CODE (operand
) == REG
3146 && reg_fits_class_p (operand
, this_alternative
[i
],
3147 offset
, GET_MODE (recog_data
.operand
[i
])))
3154 /* If this operand could be handled with a reg,
3155 and some reg is allowed, then this operand can be handled. */
3156 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3159 /* Record which operands fit this alternative. */
3160 this_alternative_earlyclobber
[i
] = earlyclobber
;
3161 if (win
&& ! force_reload
)
3162 this_alternative_win
[i
] = 1;
3165 int const_to_mem
= 0;
3167 this_alternative_offmemok
[i
] = offmemok
;
3171 /* Alternative loses if it has no regs for a reg operand. */
3172 if (GET_CODE (operand
) == REG
3173 && this_alternative
[i
] == (int) NO_REGS
3174 && this_alternative_matches
[i
] < 0)
3177 /* If this is a constant that is reloaded into the desired
3178 class by copying it to memory first, count that as another
3179 reload. This is consistent with other code and is
3180 required to avoid choosing another alternative when
3181 the constant is moved into memory by this function on
3182 an early reload pass. Note that the test here is
3183 precisely the same as in the code below that calls
3185 if (CONSTANT_P (operand
)
3186 /* force_const_mem does not accept HIGH. */
3187 && GET_CODE (operand
) != HIGH
3188 && ((PREFERRED_RELOAD_CLASS (operand
,
3189 (enum reg_class
) this_alternative
[i
])
3191 || no_input_reloads
)
3192 && operand_mode
[i
] != VOIDmode
)
3195 if (this_alternative
[i
] != (int) NO_REGS
)
3199 /* If we can't reload this value at all, reject this
3200 alternative. Note that we could also lose due to
3201 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3204 if (! CONSTANT_P (operand
)
3205 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3206 && (PREFERRED_RELOAD_CLASS (operand
,
3207 (enum reg_class
) this_alternative
[i
])
3211 /* Alternative loses if it requires a type of reload not
3212 permitted for this insn. We can always reload SCRATCH
3213 and objects with a REG_UNUSED note. */
3214 else if (GET_CODE (operand
) != SCRATCH
3215 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3216 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3218 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3223 /* We prefer to reload pseudos over reloading other things,
3224 since such reloads may be able to be eliminated later.
3225 If we are reloading a SCRATCH, we won't be generating any
3226 insns, just using a register, so it is also preferred.
3227 So bump REJECT in other cases. Don't do this in the
3228 case where we are forcing a constant into memory and
3229 it will then win since we don't want to have a different
3230 alternative match then. */
3231 if (! (GET_CODE (operand
) == REG
3232 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3233 && GET_CODE (operand
) != SCRATCH
3234 && ! (const_to_mem
&& constmemok
))
3237 /* Input reloads can be inherited more often than output
3238 reloads can be removed, so penalize output reloads. */
3239 if (operand_type
[i
] != RELOAD_FOR_INPUT
3240 && GET_CODE (operand
) != SCRATCH
)
3244 /* If this operand is a pseudo register that didn't get a hard
3245 reg and this alternative accepts some register, see if the
3246 class that we want is a subset of the preferred class for this
3247 register. If not, but it intersects that class, use the
3248 preferred class instead. If it does not intersect the preferred
3249 class, show that usage of this alternative should be discouraged;
3250 it will be discouraged more still if the register is `preferred
3251 or nothing'. We do this because it increases the chance of
3252 reusing our spill register in a later insn and avoiding a pair
3253 of memory stores and loads.
3255 Don't bother with this if this alternative will accept this
3258 Don't do this for a multiword operand, since it is only a
3259 small win and has the risk of requiring more spill registers,
3260 which could cause a large loss.
3262 Don't do this if the preferred class has only one register
3263 because we might otherwise exhaust the class. */
3266 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3267 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3268 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3270 if (! reg_class_subset_p (this_alternative
[i
],
3271 preferred_class
[i
]))
3273 /* Since we don't have a way of forming the intersection,
3274 we just do something special if the preferred class
3275 is a subset of the class we have; that's the most
3276 common case anyway. */
3277 if (reg_class_subset_p (preferred_class
[i
],
3278 this_alternative
[i
]))
3279 this_alternative
[i
] = (int) preferred_class
[i
];
3281 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3286 /* Now see if any output operands that are marked "earlyclobber"
3287 in this alternative conflict with any input operands
3288 or any memory addresses. */
3290 for (i
= 0; i
< noperands
; i
++)
3291 if (this_alternative_earlyclobber
[i
]
3292 && this_alternative_win
[i
])
3294 struct decomposition early_data
;
3296 early_data
= decompose (recog_data
.operand
[i
]);
3298 if (modified
[i
] == RELOAD_READ
)
3301 if (this_alternative
[i
] == NO_REGS
)
3303 this_alternative_earlyclobber
[i
] = 0;
3304 if (this_insn_is_asm
)
3305 error_for_asm (this_insn
,
3306 "`&' constraint used with no register class");
3311 for (j
= 0; j
< noperands
; j
++)
3312 /* Is this an input operand or a memory ref? */
3313 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3314 || modified
[j
] != RELOAD_WRITE
)
3316 /* Ignore things like match_operator operands. */
3317 && *recog_data
.constraints
[j
] != 0
3318 /* Don't count an input operand that is constrained to match
3319 the early clobber operand. */
3320 && ! (this_alternative_matches
[j
] == i
3321 && rtx_equal_p (recog_data
.operand
[i
],
3322 recog_data
.operand
[j
]))
3323 /* Is it altered by storing the earlyclobber operand? */
3324 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3327 /* If the output is in a single-reg class,
3328 it's costly to reload it, so reload the input instead. */
3329 if (reg_class_size
[this_alternative
[i
]] == 1
3330 && (GET_CODE (recog_data
.operand
[j
]) == REG
3331 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3334 this_alternative_win
[j
] = 0;
3339 /* If an earlyclobber operand conflicts with something,
3340 it must be reloaded, so request this and count the cost. */
3344 this_alternative_win
[i
] = 0;
3345 for (j
= 0; j
< noperands
; j
++)
3346 if (this_alternative_matches
[j
] == i
3347 && this_alternative_win
[j
])
3349 this_alternative_win
[j
] = 0;
3355 /* If one alternative accepts all the operands, no reload required,
3356 choose that alternative; don't consider the remaining ones. */
3359 /* Unswap these so that they are never swapped at `finish'. */
3360 if (commutative
>= 0)
3362 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3363 recog_data
.operand
[commutative
+ 1]
3364 = substed_operand
[commutative
+ 1];
3366 for (i
= 0; i
< noperands
; i
++)
3368 goal_alternative_win
[i
] = 1;
3369 goal_alternative
[i
] = this_alternative
[i
];
3370 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3371 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3372 goal_alternative_earlyclobber
[i
]
3373 = this_alternative_earlyclobber
[i
];
3375 goal_alternative_number
= this_alternative_number
;
3376 goal_alternative_swapped
= swapped
;
3377 goal_earlyclobber
= this_earlyclobber
;
3381 /* REJECT, set by the ! and ? constraint characters and when a register
3382 would be reloaded into a non-preferred class, discourages the use of
3383 this alternative for a reload goal. REJECT is incremented by six
3384 for each ? and two for each non-preferred class. */
3385 losers
= losers
* 6 + reject
;
3387 /* If this alternative can be made to work by reloading,
3388 and it needs less reloading than the others checked so far,
3389 record it as the chosen goal for reloading. */
3390 if (! bad
&& best
> losers
)
3392 for (i
= 0; i
< noperands
; i
++)
3394 goal_alternative
[i
] = this_alternative
[i
];
3395 goal_alternative_win
[i
] = this_alternative_win
[i
];
3396 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3397 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3398 goal_alternative_earlyclobber
[i
]
3399 = this_alternative_earlyclobber
[i
];
3401 goal_alternative_swapped
= swapped
;
3403 goal_alternative_number
= this_alternative_number
;
3404 goal_earlyclobber
= this_earlyclobber
;
3408 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3409 then we need to try each alternative twice,
3410 the second time matching those two operands
3411 as if we had exchanged them.
3412 To do this, really exchange them in operands.
3414 If we have just tried the alternatives the second time,
3415 return operands to normal and drop through. */
3417 if (commutative
>= 0)
3422 register enum reg_class tclass
;
3425 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3426 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3428 tclass
= preferred_class
[commutative
];
3429 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3430 preferred_class
[commutative
+ 1] = tclass
;
3432 t
= pref_or_nothing
[commutative
];
3433 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3434 pref_or_nothing
[commutative
+ 1] = t
;
3436 bcopy ((char *) recog_data
.constraints
, (char *) constraints
,
3437 noperands
* sizeof (char *));
3442 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3443 recog_data
.operand
[commutative
+ 1]
3444 = substed_operand
[commutative
+ 1];
3448 /* The operands don't meet the constraints.
3449 goal_alternative describes the alternative
3450 that we could reach by reloading the fewest operands.
3451 Reload so as to fit it. */
3453 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3455 /* No alternative works with reloads?? */
3456 if (insn_code_number
>= 0)
3457 fatal_insn ("Unable to generate reloads for:", insn
);
3458 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3459 /* Avoid further trouble with this insn. */
3460 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3465 /* Jump to `finish' from above if all operands are valid already.
3466 In that case, goal_alternative_win is all 1. */
3469 /* Right now, for any pair of operands I and J that are required to match,
3471 goal_alternative_matches[J] is I.
3472 Set up goal_alternative_matched as the inverse function:
3473 goal_alternative_matched[I] = J. */
3475 for (i
= 0; i
< noperands
; i
++)
3476 goal_alternative_matched
[i
] = -1;
3478 for (i
= 0; i
< noperands
; i
++)
3479 if (! goal_alternative_win
[i
]
3480 && goal_alternative_matches
[i
] >= 0)
3481 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3483 /* If the best alternative is with operands 1 and 2 swapped,
3484 consider them swapped before reporting the reloads. Update the
3485 operand numbers of any reloads already pushed. */
3487 if (goal_alternative_swapped
)
3491 tem
= substed_operand
[commutative
];
3492 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3493 substed_operand
[commutative
+ 1] = tem
;
3494 tem
= recog_data
.operand
[commutative
];
3495 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3496 recog_data
.operand
[commutative
+ 1] = tem
;
3497 tem
= *recog_data
.operand_loc
[commutative
];
3498 *recog_data
.operand_loc
[commutative
]
3499 = *recog_data
.operand_loc
[commutative
+ 1];
3500 *recog_data
.operand_loc
[commutative
+1] = tem
;
3502 for (i
= 0; i
< n_reloads
; i
++)
3504 if (rld
[i
].opnum
== commutative
)
3505 rld
[i
].opnum
= commutative
+ 1;
3506 else if (rld
[i
].opnum
== commutative
+ 1)
3507 rld
[i
].opnum
= commutative
;
3511 for (i
= 0; i
< noperands
; i
++)
3513 operand_reloadnum
[i
] = -1;
3515 /* If this is an earlyclobber operand, we need to widen the scope.
3516 The reload must remain valid from the start of the insn being
3517 reloaded until after the operand is stored into its destination.
3518 We approximate this with RELOAD_OTHER even though we know that we
3519 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3521 One special case that is worth checking is when we have an
3522 output that is earlyclobber but isn't used past the insn (typically
3523 a SCRATCH). In this case, we only need have the reload live
3524 through the insn itself, but not for any of our input or output
3526 But we must not accidentally narrow the scope of an existing
3527 RELOAD_OTHER reload - leave these alone.
3529 In any case, anything needed to address this operand can remain
3530 however they were previously categorized. */
3532 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3534 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3535 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3538 /* Any constants that aren't allowed and can't be reloaded
3539 into registers are here changed into memory references. */
3540 for (i
= 0; i
< noperands
; i
++)
3541 if (! goal_alternative_win
[i
]
3542 && CONSTANT_P (recog_data
.operand
[i
])
3543 /* force_const_mem does not accept HIGH. */
3544 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3545 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3546 (enum reg_class
) goal_alternative
[i
])
3548 || no_input_reloads
)
3549 && operand_mode
[i
] != VOIDmode
)
3551 substed_operand
[i
] = recog_data
.operand
[i
]
3552 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3553 recog_data
.operand
[i
]),
3554 i
, address_type
[i
], ind_levels
, 0, insn
);
3555 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3556 goal_alternative_number
))
3557 goal_alternative_win
[i
] = 1;
3560 /* Record the values of the earlyclobber operands for the caller. */
3561 if (goal_earlyclobber
)
3562 for (i
= 0; i
< noperands
; i
++)
3563 if (goal_alternative_earlyclobber
[i
])
3564 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3566 /* Now record reloads for all the operands that need them. */
3567 for (i
= 0; i
< noperands
; i
++)
3568 if (! goal_alternative_win
[i
])
3570 /* Operands that match previous ones have already been handled. */
3571 if (goal_alternative_matches
[i
] >= 0)
3573 /* Handle an operand with a nonoffsettable address
3574 appearing where an offsettable address will do
3575 by reloading the address into a base register.
3577 ??? We can also do this when the operand is a register and
3578 reg_equiv_mem is not offsettable, but this is a bit tricky,
3579 so we don't bother with it. It may not be worth doing. */
3580 else if (goal_alternative_matched
[i
] == -1
3581 && goal_alternative_offmemok
[i
]
3582 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3584 operand_reloadnum
[i
]
3585 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3586 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3588 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3589 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3590 rld
[operand_reloadnum
[i
]].inc
3591 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3593 /* If this operand is an output, we will have made any
3594 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3595 now we are treating part of the operand as an input, so
3596 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3598 if (modified
[i
] == RELOAD_WRITE
)
3600 for (j
= 0; j
< n_reloads
; j
++)
3602 if (rld
[j
].opnum
== i
)
3604 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3605 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3606 else if (rld
[j
].when_needed
3607 == RELOAD_FOR_OUTADDR_ADDRESS
)
3608 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3613 else if (goal_alternative_matched
[i
] == -1)
3615 operand_reloadnum
[i
]
3616 = push_reload ((modified
[i
] != RELOAD_WRITE
3617 ? recog_data
.operand
[i
] : 0),
3618 (modified
[i
] != RELOAD_READ
3619 ? recog_data
.operand
[i
] : 0),
3620 (modified
[i
] != RELOAD_WRITE
3621 ? recog_data
.operand_loc
[i
] : 0),
3622 (modified
[i
] != RELOAD_READ
3623 ? recog_data
.operand_loc
[i
] : 0),
3624 (enum reg_class
) goal_alternative
[i
],
3625 (modified
[i
] == RELOAD_WRITE
3626 ? VOIDmode
: operand_mode
[i
]),
3627 (modified
[i
] == RELOAD_READ
3628 ? VOIDmode
: operand_mode
[i
]),
3629 (insn_code_number
< 0 ? 0
3630 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3631 0, i
, operand_type
[i
]);
3633 /* In a matching pair of operands, one must be input only
3634 and the other must be output only.
3635 Pass the input operand as IN and the other as OUT. */
3636 else if (modified
[i
] == RELOAD_READ
3637 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3639 operand_reloadnum
[i
]
3640 = push_reload (recog_data
.operand
[i
],
3641 recog_data
.operand
[goal_alternative_matched
[i
]],
3642 recog_data
.operand_loc
[i
],
3643 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3644 (enum reg_class
) goal_alternative
[i
],
3646 operand_mode
[goal_alternative_matched
[i
]],
3647 0, 0, i
, RELOAD_OTHER
);
3648 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3650 else if (modified
[i
] == RELOAD_WRITE
3651 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3653 operand_reloadnum
[goal_alternative_matched
[i
]]
3654 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3655 recog_data
.operand
[i
],
3656 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3657 recog_data
.operand_loc
[i
],
3658 (enum reg_class
) goal_alternative
[i
],
3659 operand_mode
[goal_alternative_matched
[i
]],
3661 0, 0, i
, RELOAD_OTHER
);
3662 operand_reloadnum
[i
] = output_reloadnum
;
3664 else if (insn_code_number
>= 0)
3668 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3669 /* Avoid further trouble with this insn. */
3670 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3675 else if (goal_alternative_matched
[i
] < 0
3676 && goal_alternative_matches
[i
] < 0
3679 /* For each non-matching operand that's a MEM or a pseudo-register
3680 that didn't get a hard register, make an optional reload.
3681 This may get done even if the insn needs no reloads otherwise. */
3683 rtx operand
= recog_data
.operand
[i
];
3685 while (GET_CODE (operand
) == SUBREG
)
3686 operand
= XEXP (operand
, 0);
3687 if ((GET_CODE (operand
) == MEM
3688 || (GET_CODE (operand
) == REG
3689 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3690 /* If this is only for an output, the optional reload would not
3691 actually cause us to use a register now, just note that
3692 something is stored here. */
3693 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3694 || modified
[i
] == RELOAD_WRITE
)
3695 && ! no_input_reloads
3696 /* An optional output reload might allow to delete INSN later.
3697 We mustn't make in-out reloads on insns that are not permitted
3699 If this is an asm, we can't delete it; we must not even call
3700 push_reload for an optional output reload in this case,
3701 because we can't be sure that the constraint allows a register,
3702 and push_reload verifies the constraints for asms. */
3703 && (modified
[i
] == RELOAD_READ
3704 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3705 operand_reloadnum
[i
]
3706 = push_reload ((modified
[i
] != RELOAD_WRITE
3707 ? recog_data
.operand
[i
] : 0),
3708 (modified
[i
] != RELOAD_READ
3709 ? recog_data
.operand
[i
] : 0),
3710 (modified
[i
] != RELOAD_WRITE
3711 ? recog_data
.operand_loc
[i
] : 0),
3712 (modified
[i
] != RELOAD_READ
3713 ? recog_data
.operand_loc
[i
] : 0),
3714 (enum reg_class
) goal_alternative
[i
],
3715 (modified
[i
] == RELOAD_WRITE
3716 ? VOIDmode
: operand_mode
[i
]),
3717 (modified
[i
] == RELOAD_READ
3718 ? VOIDmode
: operand_mode
[i
]),
3719 (insn_code_number
< 0 ? 0
3720 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3721 1, i
, operand_type
[i
]);
3722 /* If a memory reference remains (either as a MEM or a pseudo that
3723 did not get a hard register), yet we can't make an optional
3724 reload, check if this is actually a pseudo register reference;
3725 we then need to emit a USE and/or a CLOBBER so that reload
3726 inheritance will do the right thing. */
3728 && (GET_CODE (operand
) == MEM
3729 || (GET_CODE (operand
) == REG
3730 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3731 && reg_renumber
[REGNO (operand
)] < 0)))
3733 operand
= *recog_data
.operand_loc
[i
];
3735 while (GET_CODE (operand
) == SUBREG
)
3736 operand
= XEXP (operand
, 0);
3737 if (GET_CODE (operand
) == REG
)
3739 if (modified
[i
] != RELOAD_WRITE
)
3740 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3741 if (modified
[i
] != RELOAD_READ
)
3742 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3746 else if (goal_alternative_matches
[i
] >= 0
3747 && goal_alternative_win
[goal_alternative_matches
[i
]]
3748 && modified
[i
] == RELOAD_READ
3749 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3750 && ! no_input_reloads
&& ! no_output_reloads
3753 /* Similarly, make an optional reload for a pair of matching
3754 objects that are in MEM or a pseudo that didn't get a hard reg. */
3756 rtx operand
= recog_data
.operand
[i
];
3758 while (GET_CODE (operand
) == SUBREG
)
3759 operand
= XEXP (operand
, 0);
3760 if ((GET_CODE (operand
) == MEM
3761 || (GET_CODE (operand
) == REG
3762 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3763 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3765 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3766 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3767 recog_data
.operand
[i
],
3768 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3769 recog_data
.operand_loc
[i
],
3770 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3771 operand_mode
[goal_alternative_matches
[i
]],
3773 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3776 /* Perform whatever substitutions on the operands we are supposed
3777 to make due to commutativity or replacement of registers
3778 with equivalent constants or memory slots. */
3780 for (i
= 0; i
< noperands
; i
++)
3782 /* We only do this on the last pass through reload, because it is
3783 possible for some data (like reg_equiv_address) to be changed during
3784 later passes. Moreover, we loose the opportunity to get a useful
3785 reload_{in,out}_reg when we do these replacements. */
3789 rtx substitution
= substed_operand
[i
];
3791 *recog_data
.operand_loc
[i
] = substitution
;
3793 /* If we're replacing an operand with a LABEL_REF, we need
3794 to make sure that there's a REG_LABEL note attached to
3795 this instruction. */
3796 if (GET_CODE (insn
) != JUMP_INSN
3797 && GET_CODE (substitution
) == LABEL_REF
3798 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3799 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3800 XEXP (substitution
, 0),
3804 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3807 /* If this insn pattern contains any MATCH_DUP's, make sure that
3808 they will be substituted if the operands they match are substituted.
3809 Also do now any substitutions we already did on the operands.
3811 Don't do this if we aren't making replacements because we might be
3812 propagating things allocated by frame pointer elimination into places
3813 it doesn't expect. */
3815 if (insn_code_number
>= 0 && replace
)
3816 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3818 int opno
= recog_data
.dup_num
[i
];
3819 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3820 if (operand_reloadnum
[opno
] >= 0)
3821 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3822 insn_data
[insn_code_number
].operand
[opno
].mode
);
3826 /* This loses because reloading of prior insns can invalidate the equivalence
3827 (or at least find_equiv_reg isn't smart enough to find it any more),
3828 causing this insn to need more reload regs than it needed before.
3829 It may be too late to make the reload regs available.
3830 Now this optimization is done safely in choose_reload_regs. */
3832 /* For each reload of a reg into some other class of reg,
3833 search for an existing equivalent reg (same value now) in the right class.
3834 We can use it as long as we don't need to change its contents. */
3835 for (i
= 0; i
< n_reloads
; i
++)
3836 if (rld
[i
].reg_rtx
== 0
3838 && GET_CODE (rld
[i
].in
) == REG
3842 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3843 static_reload_reg_p
, 0, rld
[i
].inmode
);
3844 /* Prevent generation of insn to load the value
3845 because the one we found already has the value. */
3847 rld
[i
].in
= rld
[i
].reg_rtx
;
3851 /* Perhaps an output reload can be combined with another
3852 to reduce needs by one. */
3853 if (!goal_earlyclobber
)
3856 /* If we have a pair of reloads for parts of an address, they are reloading
3857 the same object, the operands themselves were not reloaded, and they
3858 are for two operands that are supposed to match, merge the reloads and
3859 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3861 for (i
= 0; i
< n_reloads
; i
++)
3865 for (j
= i
+ 1; j
< n_reloads
; j
++)
3866 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3867 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3868 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3869 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3870 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3871 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3872 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3873 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3874 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3875 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3876 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3877 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3878 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3879 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3880 || (goal_alternative_matches
[rld
[j
].opnum
]
3883 for (k
= 0; k
< n_replacements
; k
++)
3884 if (replacements
[k
].what
== j
)
3885 replacements
[k
].what
= i
;
3887 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3888 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3889 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3891 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3896 /* Scan all the reloads and update their type.
3897 If a reload is for the address of an operand and we didn't reload
3898 that operand, change the type. Similarly, change the operand number
3899 of a reload when two operands match. If a reload is optional, treat it
3900 as though the operand isn't reloaded.
3902 ??? This latter case is somewhat odd because if we do the optional
3903 reload, it means the object is hanging around. Thus we need only
3904 do the address reload if the optional reload was NOT done.
3906 Change secondary reloads to be the address type of their operand, not
3909 If an operand's reload is now RELOAD_OTHER, change any
3910 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3911 RELOAD_FOR_OTHER_ADDRESS. */
3913 for (i
= 0; i
< n_reloads
; i
++)
3915 if (rld
[i
].secondary_p
3916 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3917 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3919 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3920 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3921 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3922 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3923 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3924 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3926 /* If we have a secondary reload to go along with this reload,
3927 change its type to RELOAD_FOR_OPADDR_ADDR. */
3929 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3930 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3931 && rld
[i
].secondary_in_reload
!= -1)
3933 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3935 rld
[secondary_in_reload
].when_needed
3936 = RELOAD_FOR_OPADDR_ADDR
;
3938 /* If there's a tertiary reload we have to change it also. */
3939 if (secondary_in_reload
> 0
3940 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3941 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3942 = RELOAD_FOR_OPADDR_ADDR
;
3945 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3946 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3947 && rld
[i
].secondary_out_reload
!= -1)
3949 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3951 rld
[secondary_out_reload
].when_needed
3952 = RELOAD_FOR_OPADDR_ADDR
;
3954 /* If there's a tertiary reload we have to change it also. */
3955 if (secondary_out_reload
3956 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3957 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3958 = RELOAD_FOR_OPADDR_ADDR
;
3961 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3962 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3963 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3965 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3968 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3969 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3970 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3971 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3973 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3975 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3976 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3979 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3980 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3981 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3983 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3984 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3985 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3986 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3987 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3988 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3989 This is complicated by the fact that a single operand can have more
3990 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3991 choose_reload_regs without affecting code quality, and cases that
3992 actually fail are extremely rare, so it turns out to be better to fix
3993 the problem here by not generating cases that choose_reload_regs will
3995 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3996 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3998 We can reduce the register pressure by exploiting that a
3999 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4000 does not conflict with any of them, if it is only used for the first of
4001 the RELOAD_FOR_X_ADDRESS reloads. */
4003 int first_op_addr_num
= -2;
4004 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4005 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4007 /* We use last_op_addr_reload and the contents of the above arrays
4008 first as flags - -2 means no instance encountered, -1 means exactly
4009 one instance encountered.
4010 If more than one instance has been encountered, we store the reload
4011 number of the first reload of the kind in question; reload numbers
4012 are known to be non-negative. */
4013 for (i
= 0; i
< noperands
; i
++)
4014 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4015 for (i
= n_reloads
- 1; i
>= 0; i
--)
4017 switch (rld
[i
].when_needed
)
4019 case RELOAD_FOR_OPERAND_ADDRESS
:
4020 if (++first_op_addr_num
>= 0)
4022 first_op_addr_num
= i
;
4026 case RELOAD_FOR_INPUT_ADDRESS
:
4027 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4029 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4033 case RELOAD_FOR_OUTPUT_ADDRESS
:
4034 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4036 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4047 for (i
= 0; i
< n_reloads
; i
++)
4049 int first_num
, type
;
4051 switch (rld
[i
].when_needed
)
4053 case RELOAD_FOR_OPADDR_ADDR
:
4054 first_num
= first_op_addr_num
;
4055 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4057 case RELOAD_FOR_INPADDR_ADDRESS
:
4058 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4059 type
= RELOAD_FOR_INPUT_ADDRESS
;
4061 case RELOAD_FOR_OUTADDR_ADDRESS
:
4062 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4063 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4070 else if (i
> first_num
)
4071 rld
[i
].when_needed
= type
;
4074 /* Check if the only TYPE reload that uses reload I is
4075 reload FIRST_NUM. */
4076 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4078 if (rld
[j
].when_needed
== type
4079 && (rld
[i
].secondary_p
4080 ? rld
[j
].secondary_in_reload
== i
4081 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4083 rld
[i
].when_needed
= type
;
4092 /* See if we have any reloads that are now allowed to be merged
4093 because we've changed when the reload is needed to
4094 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4095 check for the most common cases. */
4097 for (i
= 0; i
< n_reloads
; i
++)
4098 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4099 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4100 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4101 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4102 for (j
= 0; j
< n_reloads
; j
++)
4103 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4104 && rld
[j
].when_needed
== rld
[i
].when_needed
4105 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4106 && rld
[i
].class == rld
[j
].class
4107 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4108 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4110 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4111 transfer_replacements (i
, j
);
4115 /* Set which reloads must use registers not used in any group. Start
4116 with those that conflict with a group and then include ones that
4117 conflict with ones that are already known to conflict with a group. */
4120 for (i
= 0; i
< n_reloads
; i
++)
4122 enum machine_mode mode
= rld
[i
].inmode
;
4123 enum reg_class
class = rld
[i
].class;
4126 if (GET_MODE_SIZE (rld
[i
].outmode
) > GET_MODE_SIZE (mode
))
4127 mode
= rld
[i
].outmode
;
4128 size
= CLASS_MAX_NREGS (class, mode
);
4131 for (j
= 0; j
< n_reloads
; j
++)
4132 if ((CLASS_MAX_NREGS (rld
[j
].class,
4133 (GET_MODE_SIZE (rld
[j
].outmode
)
4134 > GET_MODE_SIZE (rld
[j
].inmode
))
4135 ? rld
[j
].outmode
: rld
[j
].inmode
)
4138 && (rld
[j
].in
!= 0 || rld
[j
].out
!= 0
4139 || rld
[j
].secondary_p
)
4140 && reloads_conflict (i
, j
)
4141 && reg_classes_intersect_p (class, rld
[j
].class))
4143 rld
[i
].nongroup
= 1;
4153 for (i
= 0; i
< n_reloads
; i
++)
4155 enum machine_mode mode
= rld
[i
].inmode
;
4156 enum reg_class
class = rld
[i
].class;
4159 if (GET_MODE_SIZE (rld
[i
].outmode
) > GET_MODE_SIZE (mode
))
4160 mode
= rld
[i
].outmode
;
4161 size
= CLASS_MAX_NREGS (class, mode
);
4163 if (! rld
[i
].nongroup
&& size
== 1)
4164 for (j
= 0; j
< n_reloads
; j
++)
4166 && reloads_conflict (i
, j
)
4167 && reg_classes_intersect_p (class, rld
[j
].class))
4169 rld
[i
].nongroup
= 1;
4179 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4180 accepts a memory operand with constant address. */
4183 alternative_allows_memconst (constraint
, altnum
)
4184 const char *constraint
;
4188 /* Skip alternatives before the one requested. */
4191 while (*constraint
++ != ',');
4194 /* Scan the requested alternative for 'm' or 'o'.
4195 If one of them is present, this alternative accepts memory constants. */
4196 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4197 if (c
== 'm' || c
== 'o')
4202 /* Scan X for memory references and scan the addresses for reloading.
4203 Also checks for references to "constant" regs that we want to eliminate
4204 and replaces them with the values they stand for.
4205 We may alter X destructively if it contains a reference to such.
4206 If X is just a constant reg, we return the equivalent value
4209 IND_LEVELS says how many levels of indirect addressing this machine
4212 OPNUM and TYPE identify the purpose of the reload.
4214 IS_SET_DEST is true if X is the destination of a SET, which is not
4215 appropriate to be replaced by a constant.
4217 INSN, if nonzero, is the insn in which we do the reload. It is used
4218 to determine if we may generate output reloads, and where to put USEs
4219 for pseudos that we have to replace with stack slots. */
4222 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
)
4225 enum reload_type type
;
4230 register RTX_CODE code
= GET_CODE (x
);
4232 register const char *fmt
= GET_RTX_FORMAT (code
);
4238 /* This code is duplicated for speed in find_reloads. */
4239 register int regno
= REGNO (x
);
4240 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4241 x
= reg_equiv_constant
[regno
];
4243 /* This creates (subreg (mem...)) which would cause an unnecessary
4244 reload of the mem. */
4245 else if (reg_equiv_mem
[regno
] != 0)
4246 x
= reg_equiv_mem
[regno
];
4248 else if (reg_equiv_memory_loc
[regno
]
4249 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4251 rtx mem
= make_memloc (x
, regno
);
4252 if (reg_equiv_address
[regno
]
4253 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4255 /* If this is not a toplevel operand, find_reloads doesn't see
4256 this substitution. We have to emit a USE of the pseudo so
4257 that delete_output_reload can see it. */
4258 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4259 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4261 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4262 opnum
, type
, ind_levels
, insn
);
4270 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4271 opnum
, type
, ind_levels
, insn
);
4275 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4277 /* Check for SUBREG containing a REG that's equivalent to a constant.
4278 If the constant has a known value, truncate it right now.
4279 Similarly if we are extracting a single-word of a multi-word
4280 constant. If the constant is symbolic, allow it to be substituted
4281 normally. push_reload will strip the subreg later. If the
4282 constant is VOIDmode, abort because we will lose the mode of
4283 the register (this should never happen because one of the cases
4284 above should handle it). */
4286 register int regno
= REGNO (SUBREG_REG (x
));
4289 if (subreg_lowpart_p (x
)
4290 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4291 && reg_equiv_constant
[regno
] != 0
4292 && (tem
= gen_lowpart_common (GET_MODE (x
),
4293 reg_equiv_constant
[regno
])) != 0)
4296 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4297 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4298 && reg_equiv_constant
[regno
] != 0
4299 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4301 GET_MODE (SUBREG_REG (x
)))) != 0)
4303 /* TEM is now a word sized constant for the bits from X that
4304 we wanted. However, TEM may be the wrong representation.
4306 Use gen_lowpart_common to convert a CONST_INT into a
4307 CONST_DOUBLE and vice versa as needed according to by the mode
4309 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4315 /* If the SUBREG is wider than a word, the above test will fail.
4316 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4317 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4318 a 32 bit target. We still can - and have to - handle this
4319 for non-paradoxical subregs of CONST_INTs. */
4320 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4321 && reg_equiv_constant
[regno
] != 0
4322 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4323 && (GET_MODE_SIZE (GET_MODE (x
))
4324 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4326 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4327 if (WORDS_BIG_ENDIAN
)
4328 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4329 - GET_MODE_BITSIZE (GET_MODE (x
))
4331 /* Here we use the knowledge that CONST_INTs have a
4332 HOST_WIDE_INT field. */
4333 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4334 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4335 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4338 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4339 && reg_equiv_constant
[regno
] != 0
4340 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4343 /* If the subreg contains a reg that will be converted to a mem,
4344 convert the subreg to a narrower memref now.
4345 Otherwise, we would get (subreg (mem ...) ...),
4346 which would force reload of the mem.
4348 We also need to do this if there is an equivalent MEM that is
4349 not offsettable. In that case, alter_subreg would produce an
4350 invalid address on big-endian machines.
4352 For machines that extend byte loads, we must not reload using
4353 a wider mode if we have a paradoxical SUBREG. find_reloads will
4354 force a reload in that case. So we should not do anything here. */
4356 else if (regno
>= FIRST_PSEUDO_REGISTER
4357 #ifdef LOAD_EXTEND_OP
4358 && (GET_MODE_SIZE (GET_MODE (x
))
4359 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4361 && (reg_equiv_address
[regno
] != 0
4362 || (reg_equiv_mem
[regno
] != 0
4363 && (! strict_memory_address_p (GET_MODE (x
),
4364 XEXP (reg_equiv_mem
[regno
], 0))
4365 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4366 || num_not_at_initial_offset
))))
4367 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4371 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4375 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4376 ind_levels
, is_set_dest
, insn
);
4377 /* If we have replaced a reg with it's equivalent memory loc -
4378 that can still be handled here e.g. if it's in a paradoxical
4379 subreg - we must make the change in a copy, rather than using
4380 a destructive change. This way, find_reloads can still elect
4381 not to do the change. */
4382 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4384 x
= shallow_copy_rtx (x
);
4387 XEXP (x
, i
) = new_part
;
4393 /* Return a mem ref for the memory equivalent of reg REGNO.
4394 This mem ref is not shared with anything. */
4397 make_memloc (ad
, regno
)
4401 /* We must rerun eliminate_regs, in case the elimination
4402 offsets have changed. */
4404 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4406 /* If TEM might contain a pseudo, we must copy it to avoid
4407 modifying it when we do the substitution for the reload. */
4408 if (rtx_varies_p (tem
))
4409 tem
= copy_rtx (tem
);
4411 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4412 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4416 /* Record all reloads needed for handling memory address AD
4417 which appears in *LOC in a memory reference to mode MODE
4418 which itself is found in location *MEMREFLOC.
4419 Note that we take shortcuts assuming that no multi-reg machine mode
4420 occurs as part of an address.
4422 OPNUM and TYPE specify the purpose of this reload.
4424 IND_LEVELS says how many levels of indirect addressing this machine
4427 INSN, if nonzero, is the insn in which we do the reload. It is used
4428 to determine if we may generate output reloads, and where to put USEs
4429 for pseudos that we have to replace with stack slots.
4431 Value is nonzero if this address is reloaded or replaced as a whole.
4432 This is interesting to the caller if the address is an autoincrement.
4434 Note that there is no verification that the address will be valid after
4435 this routine does its work. Instead, we rely on the fact that the address
4436 was valid when reload started. So we need only undo things that reload
4437 could have broken. These are wrong register types, pseudos not allocated
4438 to a hard register, and frame pointer elimination. */
4441 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4442 enum machine_mode mode
;
4447 enum reload_type type
;
4452 int removed_and
= 0;
4455 /* If the address is a register, see if it is a legitimate address and
4456 reload if not. We first handle the cases where we need not reload
4457 or where we must reload in a non-standard way. */
4459 if (GET_CODE (ad
) == REG
)
4463 if (reg_equiv_constant
[regno
] != 0
4464 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4466 *loc
= ad
= reg_equiv_constant
[regno
];
4470 tem
= reg_equiv_memory_loc
[regno
];
4473 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4475 tem
= make_memloc (ad
, regno
);
4476 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4478 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4479 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4482 /* We can avoid a reload if the register's equivalent memory
4483 expression is valid as an indirect memory address.
4484 But not all addresses are valid in a mem used as an indirect
4485 address: only reg or reg+constant. */
4488 && strict_memory_address_p (mode
, tem
)
4489 && (GET_CODE (XEXP (tem
, 0)) == REG
4490 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4491 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4492 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4494 /* TEM is not the same as what we'll be replacing the
4495 pseudo with after reload, put a USE in front of INSN
4496 in the final reload pass. */
4498 && num_not_at_initial_offset
4499 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4502 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4503 /* This doesn't really count as replacing the address
4504 as a whole, since it is still a memory access. */
4512 /* The only remaining case where we can avoid a reload is if this is a
4513 hard register that is valid as a base register and which is not the
4514 subject of a CLOBBER in this insn. */
4516 else if (regno
< FIRST_PSEUDO_REGISTER
4517 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4518 && ! regno_clobbered_p (regno
, this_insn
))
4521 /* If we do not have one of the cases above, we must do the reload. */
4522 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4523 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4527 if (strict_memory_address_p (mode
, ad
))
4529 /* The address appears valid, so reloads are not needed.
4530 But the address may contain an eliminable register.
4531 This can happen because a machine with indirect addressing
4532 may consider a pseudo register by itself a valid address even when
4533 it has failed to get a hard reg.
4534 So do a tree-walk to find and eliminate all such regs. */
4536 /* But first quickly dispose of a common case. */
4537 if (GET_CODE (ad
) == PLUS
4538 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4539 && GET_CODE (XEXP (ad
, 0)) == REG
4540 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4543 subst_reg_equivs_changed
= 0;
4544 *loc
= subst_reg_equivs (ad
, insn
);
4546 if (! subst_reg_equivs_changed
)
4549 /* Check result for validity after substitution. */
4550 if (strict_memory_address_p (mode
, ad
))
4554 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4559 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4564 *memrefloc
= copy_rtx (*memrefloc
);
4565 XEXP (*memrefloc
, 0) = ad
;
4566 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4572 /* The address is not valid. We have to figure out why. First see if
4573 we have an outer AND and remove it if so. Then analyze what's inside. */
4575 if (GET_CODE (ad
) == AND
)
4578 loc
= &XEXP (ad
, 0);
4582 /* One possibility for why the address is invalid is that it is itself
4583 a MEM. This can happen when the frame pointer is being eliminated, a
4584 pseudo is not allocated to a hard register, and the offset between the
4585 frame and stack pointers is not its initial value. In that case the
4586 pseudo will have been replaced by a MEM referring to the
4588 if (GET_CODE (ad
) == MEM
)
4590 /* First ensure that the address in this MEM is valid. Then, unless
4591 indirect addresses are valid, reload the MEM into a register. */
4593 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4594 opnum
, ADDR_TYPE (type
),
4595 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4597 /* If tem was changed, then we must create a new memory reference to
4598 hold it and store it back into memrefloc. */
4599 if (tem
!= ad
&& memrefloc
)
4601 *memrefloc
= copy_rtx (*memrefloc
);
4602 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4603 loc
= &XEXP (*memrefloc
, 0);
4605 loc
= &XEXP (*loc
, 0);
4608 /* Check similar cases as for indirect addresses as above except
4609 that we can allow pseudos and a MEM since they should have been
4610 taken care of above. */
4613 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4614 || GET_CODE (XEXP (tem
, 0)) == MEM
4615 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4616 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4617 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4618 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4620 /* Must use TEM here, not AD, since it is the one that will
4621 have any subexpressions reloaded, if needed. */
4622 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4623 BASE_REG_CLASS
, GET_MODE (tem
),
4626 return ! removed_and
;
4632 /* If we have address of a stack slot but it's not valid because the
4633 displacement is too large, compute the sum in a register.
4634 Handle all base registers here, not just fp/ap/sp, because on some
4635 targets (namely SH) we can also get too large displacements from
4636 big-endian corrections. */
4637 else if (GET_CODE (ad
) == PLUS
4638 && GET_CODE (XEXP (ad
, 0)) == REG
4639 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4640 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4641 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4643 /* Unshare the MEM rtx so we can safely alter it. */
4646 *memrefloc
= copy_rtx (*memrefloc
);
4647 loc
= &XEXP (*memrefloc
, 0);
4649 loc
= &XEXP (*loc
, 0);
4652 if (double_reg_address_ok
)
4654 /* Unshare the sum as well. */
4655 *loc
= ad
= copy_rtx (ad
);
4657 /* Reload the displacement into an index reg.
4658 We assume the frame pointer or arg pointer is a base reg. */
4659 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4660 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4666 /* If the sum of two regs is not necessarily valid,
4667 reload the sum into a base reg.
4668 That will at least work. */
4669 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4670 Pmode
, opnum
, type
, ind_levels
);
4672 return ! removed_and
;
4675 /* If we have an indexed stack slot, there are three possible reasons why
4676 it might be invalid: The index might need to be reloaded, the address
4677 might have been made by frame pointer elimination and hence have a
4678 constant out of range, or both reasons might apply.
4680 We can easily check for an index needing reload, but even if that is the
4681 case, we might also have an invalid constant. To avoid making the
4682 conservative assumption and requiring two reloads, we see if this address
4683 is valid when not interpreted strictly. If it is, the only problem is
4684 that the index needs a reload and find_reloads_address_1 will take care
4687 There is still a case when we might generate an extra reload,
4688 however. In certain cases eliminate_regs will return a MEM for a REG
4689 (see the code there for details). In those cases, memory_address_p
4690 applied to our address will return 0 so we will think that our offset
4691 must be too large. But it might indeed be valid and the only problem
4692 is that a MEM is present where a REG should be. This case should be
4693 very rare and there doesn't seem to be any way to avoid it.
4695 If we decide to do something here, it must be that
4696 `double_reg_address_ok' is true and that this address rtl was made by
4697 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4698 rework the sum so that the reload register will be added to the index.
4699 This is safe because we know the address isn't shared.
4701 We check for fp/ap/sp as both the first and second operand of the
4704 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4705 && GET_CODE (XEXP (ad
, 0)) == PLUS
4706 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4707 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4708 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4710 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4711 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4713 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4714 && ! memory_address_p (mode
, ad
))
4716 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4717 plus_constant (XEXP (XEXP (ad
, 0), 0),
4718 INTVAL (XEXP (ad
, 1))),
4719 XEXP (XEXP (ad
, 0), 1));
4720 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4721 GET_MODE (ad
), opnum
, type
, ind_levels
);
4722 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4728 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4729 && GET_CODE (XEXP (ad
, 0)) == PLUS
4730 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4731 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4732 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4734 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4735 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4737 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4738 && ! memory_address_p (mode
, ad
))
4740 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4741 XEXP (XEXP (ad
, 0), 0),
4742 plus_constant (XEXP (XEXP (ad
, 0), 1),
4743 INTVAL (XEXP (ad
, 1))));
4744 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4745 GET_MODE (ad
), opnum
, type
, ind_levels
);
4746 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4752 /* See if address becomes valid when an eliminable register
4753 in a sum is replaced. */
4756 if (GET_CODE (ad
) == PLUS
)
4757 tem
= subst_indexed_address (ad
);
4758 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4760 /* Ok, we win that way. Replace any additional eliminable
4763 subst_reg_equivs_changed
= 0;
4764 tem
= subst_reg_equivs (tem
, insn
);
4766 /* Make sure that didn't make the address invalid again. */
4768 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4775 /* If constants aren't valid addresses, reload the constant address
4777 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4779 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4780 Unshare it so we can safely alter it. */
4781 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4782 && CONSTANT_POOL_ADDRESS_P (ad
))
4784 *memrefloc
= copy_rtx (*memrefloc
);
4785 loc
= &XEXP (*memrefloc
, 0);
4787 loc
= &XEXP (*loc
, 0);
4790 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4792 return ! removed_and
;
4795 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4799 /* Find all pseudo regs appearing in AD
4800 that are eliminable in favor of equivalent values
4801 and do not have hard regs; replace them by their equivalents.
4802 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4803 front of it for pseudos that we have to replace with stack slots. */
4806 subst_reg_equivs (ad
, insn
)
4810 register RTX_CODE code
= GET_CODE (ad
);
4812 register const char *fmt
;
4828 register int regno
= REGNO (ad
);
4830 if (reg_equiv_constant
[regno
] != 0)
4832 subst_reg_equivs_changed
= 1;
4833 return reg_equiv_constant
[regno
];
4835 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4837 rtx mem
= make_memloc (ad
, regno
);
4838 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4840 subst_reg_equivs_changed
= 1;
4841 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4849 /* Quickly dispose of a common case. */
4850 if (XEXP (ad
, 0) == frame_pointer_rtx
4851 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4859 fmt
= GET_RTX_FORMAT (code
);
4860 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4862 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4866 /* Compute the sum of X and Y, making canonicalizations assumed in an
4867 address, namely: sum constant integers, surround the sum of two
4868 constants with a CONST, put the constant as the second operand, and
4869 group the constant on the outermost sum.
4871 This routine assumes both inputs are already in canonical form. */
4878 enum machine_mode mode
= GET_MODE (x
);
4880 if (mode
== VOIDmode
)
4881 mode
= GET_MODE (y
);
4883 if (mode
== VOIDmode
)
4886 if (GET_CODE (x
) == CONST_INT
)
4887 return plus_constant (y
, INTVAL (x
));
4888 else if (GET_CODE (y
) == CONST_INT
)
4889 return plus_constant (x
, INTVAL (y
));
4890 else if (CONSTANT_P (x
))
4891 tem
= x
, x
= y
, y
= tem
;
4893 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4894 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4896 /* Note that if the operands of Y are specified in the opposite
4897 order in the recursive calls below, infinite recursion will occur. */
4898 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4899 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4901 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4902 constant will have been placed second. */
4903 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4905 if (GET_CODE (x
) == CONST
)
4907 if (GET_CODE (y
) == CONST
)
4910 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4913 return gen_rtx_PLUS (mode
, x
, y
);
4916 /* If ADDR is a sum containing a pseudo register that should be
4917 replaced with a constant (from reg_equiv_constant),
4918 return the result of doing so, and also apply the associative
4919 law so that the result is more likely to be a valid address.
4920 (But it is not guaranteed to be one.)
4922 Note that at most one register is replaced, even if more are
4923 replaceable. Also, we try to put the result into a canonical form
4924 so it is more likely to be a valid address.
4926 In all other cases, return ADDR. */
4929 subst_indexed_address (addr
)
4932 rtx op0
= 0, op1
= 0, op2
= 0;
4936 if (GET_CODE (addr
) == PLUS
)
4938 /* Try to find a register to replace. */
4939 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4940 if (GET_CODE (op0
) == REG
4941 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4942 && reg_renumber
[regno
] < 0
4943 && reg_equiv_constant
[regno
] != 0)
4944 op0
= reg_equiv_constant
[regno
];
4945 else if (GET_CODE (op1
) == REG
4946 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4947 && reg_renumber
[regno
] < 0
4948 && reg_equiv_constant
[regno
] != 0)
4949 op1
= reg_equiv_constant
[regno
];
4950 else if (GET_CODE (op0
) == PLUS
4951 && (tem
= subst_indexed_address (op0
)) != op0
)
4953 else if (GET_CODE (op1
) == PLUS
4954 && (tem
= subst_indexed_address (op1
)) != op1
)
4959 /* Pick out up to three things to add. */
4960 if (GET_CODE (op1
) == PLUS
)
4961 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4962 else if (GET_CODE (op0
) == PLUS
)
4963 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4965 /* Compute the sum. */
4967 op1
= form_sum (op1
, op2
);
4969 op0
= form_sum (op0
, op1
);
4976 /* Record the pseudo registers we must reload into hard registers in a
4977 subexpression of a would-be memory address, X referring to a value
4978 in mode MODE. (This function is not called if the address we find
4981 CONTEXT = 1 means we are considering regs as index regs,
4982 = 0 means we are considering them as base regs.
4984 OPNUM and TYPE specify the purpose of any reloads made.
4986 IND_LEVELS says how many levels of indirect addressing are
4987 supported at this point in the address.
4989 INSN, if nonzero, is the insn in which we do the reload. It is used
4990 to determine if we may generate output reloads.
4992 We return nonzero if X, as a whole, is reloaded or replaced. */
4994 /* Note that we take shortcuts assuming that no multi-reg machine mode
4995 occurs as part of an address.
4996 Also, this is not fully machine-customizable; it works for machines
4997 such as vaxes and 68000's and 32000's, but other possible machines
4998 could have addressing modes that this does not handle right. */
5001 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5002 enum machine_mode mode
;
5007 enum reload_type type
;
5011 register RTX_CODE code
= GET_CODE (x
);
5017 register rtx orig_op0
= XEXP (x
, 0);
5018 register rtx orig_op1
= XEXP (x
, 1);
5019 register RTX_CODE code0
= GET_CODE (orig_op0
);
5020 register RTX_CODE code1
= GET_CODE (orig_op1
);
5021 register rtx op0
= orig_op0
;
5022 register rtx op1
= orig_op1
;
5024 if (GET_CODE (op0
) == SUBREG
)
5026 op0
= SUBREG_REG (op0
);
5027 code0
= GET_CODE (op0
);
5028 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5029 op0
= gen_rtx_REG (word_mode
,
5030 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5033 if (GET_CODE (op1
) == SUBREG
)
5035 op1
= SUBREG_REG (op1
);
5036 code1
= GET_CODE (op1
);
5037 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5038 op1
= gen_rtx_REG (GET_MODE (op1
),
5039 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5042 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5043 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5045 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5046 type
, ind_levels
, insn
);
5047 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5048 type
, ind_levels
, insn
);
5051 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5052 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5054 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5055 type
, ind_levels
, insn
);
5056 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5057 type
, ind_levels
, insn
);
5060 else if (code0
== CONST_INT
|| code0
== CONST
5061 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5062 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5063 type
, ind_levels
, insn
);
5065 else if (code1
== CONST_INT
|| code1
== CONST
5066 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5067 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5068 type
, ind_levels
, insn
);
5070 else if (code0
== REG
&& code1
== REG
)
5072 if (REG_OK_FOR_INDEX_P (op0
)
5073 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5075 else if (REG_OK_FOR_INDEX_P (op1
)
5076 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5078 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5079 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5080 type
, ind_levels
, insn
);
5081 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5082 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5083 type
, ind_levels
, insn
);
5084 else if (REG_OK_FOR_INDEX_P (op1
))
5085 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5086 type
, ind_levels
, insn
);
5087 else if (REG_OK_FOR_INDEX_P (op0
))
5088 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5089 type
, ind_levels
, insn
);
5092 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5093 type
, ind_levels
, insn
);
5094 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5095 type
, ind_levels
, insn
);
5099 else if (code0
== REG
)
5101 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5102 type
, ind_levels
, insn
);
5103 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5104 type
, ind_levels
, insn
);
5107 else if (code1
== REG
)
5109 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5110 type
, ind_levels
, insn
);
5111 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5112 type
, ind_levels
, insn
);
5122 if (GET_CODE (XEXP (x
, 0)) == REG
)
5124 register int regno
= REGNO (XEXP (x
, 0));
5128 /* A register that is incremented cannot be constant! */
5129 if (regno
>= FIRST_PSEUDO_REGISTER
5130 && reg_equiv_constant
[regno
] != 0)
5133 /* Handle a register that is equivalent to a memory location
5134 which cannot be addressed directly. */
5135 if (reg_equiv_memory_loc
[regno
] != 0
5136 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5138 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5139 if (reg_equiv_address
[regno
]
5140 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5142 /* First reload the memory location's address.
5143 We can't use ADDR_TYPE (type) here, because we need to
5144 write back the value after reading it, hence we actually
5145 need two registers. */
5146 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5147 &XEXP (tem
, 0), opnum
, type
,
5149 /* Put this inside a new increment-expression. */
5150 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5151 /* Proceed to reload that, as if it contained a register. */
5155 /* If we have a hard register that is ok as an index,
5156 don't make a reload. If an autoincrement of a nice register
5157 isn't "valid", it must be that no autoincrement is "valid".
5158 If that is true and something made an autoincrement anyway,
5159 this must be a special context where one is allowed.
5160 (For example, a "push" instruction.)
5161 We can't improve this address, so leave it alone. */
5163 /* Otherwise, reload the autoincrement into a suitable hard reg
5164 and record how much to increment by. */
5166 if (reg_renumber
[regno
] >= 0)
5167 regno
= reg_renumber
[regno
];
5168 if ((regno
>= FIRST_PSEUDO_REGISTER
5169 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5170 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5177 /* If we can output the register afterwards, do so, this
5178 saves the extra update.
5179 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5180 CALL_INSN - and it does not set CC0.
5181 But don't do this if we cannot directly address the
5182 memory location, since this will make it harder to
5183 reuse address reloads, and increases register pressure.
5184 Also don't do this if we can probably update x directly. */
5185 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5187 : reg_equiv_mem
[regno
]);
5188 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5189 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5190 && memory_operand (equiv
, GET_MODE (equiv
))
5192 && ! sets_cc0_p (PATTERN (insn
))
5194 && ! (icode
!= CODE_FOR_nothing
5195 && ((*insn_data
[icode
].operand
[0].predicate
)
5197 && ((*insn_data
[icode
].operand
[1].predicate
)
5203 = push_reload (x
, x
, loc
, loc
,
5204 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5205 GET_MODE (x
), GET_MODE (x
), 0, 0,
5206 opnum
, RELOAD_OTHER
);
5208 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5209 LOC above is part of the new MEM, not the MEM in INSN.
5211 We must also replace the address of the MEM in INSN. */
5212 if (&XEXP (x_orig
, 0) != loc
)
5213 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5219 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5220 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5221 GET_MODE (x
), GET_MODE (x
), 0, 0,
5224 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5230 /* Update the REG_INC notes. */
5232 for (link
= REG_NOTES (this_insn
);
5233 link
; link
= XEXP (link
, 1))
5234 if (REG_NOTE_KIND (link
) == REG_INC
5235 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5236 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5242 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5244 /* This is probably the result of a substitution, by eliminate_regs,
5245 of an equivalent address for a pseudo that was not allocated to a
5246 hard register. Verify that the specified address is valid and
5247 reload it into a register. */
5248 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5249 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5253 /* Since we know we are going to reload this item, don't decrement
5254 for the indirection level.
5256 Note that this is actually conservative: it would be slightly
5257 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5259 /* We can't use ADDR_TYPE (type) here, because we need to
5260 write back the value after reading it, hence we actually
5261 need two registers. */
5262 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5263 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5264 opnum
, type
, ind_levels
, insn
);
5266 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5267 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5268 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5270 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5272 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5274 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5281 /* This is probably the result of a substitution, by eliminate_regs, of
5282 an equivalent address for a pseudo that was not allocated to a hard
5283 register. Verify that the specified address is valid and reload it
5286 Since we know we are going to reload this item, don't decrement for
5287 the indirection level.
5289 Note that this is actually conservative: it would be slightly more
5290 efficient to use the value of SPILL_INDIRECT_LEVELS from
5293 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5294 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5295 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5296 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5297 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5302 register int regno
= REGNO (x
);
5304 if (reg_equiv_constant
[regno
] != 0)
5306 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5307 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5308 GET_MODE (x
), opnum
, type
, ind_levels
);
5312 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5313 that feeds this insn. */
5314 if (reg_equiv_mem
[regno
] != 0)
5316 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5317 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5318 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5323 if (reg_equiv_memory_loc
[regno
]
5324 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5326 rtx tem
= make_memloc (x
, regno
);
5327 if (reg_equiv_address
[regno
] != 0
5328 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5331 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5332 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5337 if (reg_renumber
[regno
] >= 0)
5338 regno
= reg_renumber
[regno
];
5340 if ((regno
>= FIRST_PSEUDO_REGISTER
5341 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5342 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5344 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5345 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5346 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5350 /* If a register appearing in an address is the subject of a CLOBBER
5351 in this insn, reload it into some other register to be safe.
5352 The CLOBBER is supposed to make the register unavailable
5353 from before this insn to after it. */
5354 if (regno_clobbered_p (regno
, this_insn
))
5356 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5357 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5358 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5365 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5367 /* If this is a SUBREG of a hard register and the resulting register
5368 is of the wrong class, reload the whole SUBREG. This avoids
5369 needless copies if SUBREG_REG is multi-word. */
5370 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5372 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5374 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5375 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5377 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5378 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5379 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5383 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5384 is larger than the class size, then reload the whole SUBREG. */
5387 enum reg_class
class = (context
? INDEX_REG_CLASS
5389 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5390 > reg_class_size
[class])
5392 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5394 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5395 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5407 register const char *fmt
= GET_RTX_FORMAT (code
);
5410 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5413 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5414 opnum
, type
, ind_levels
, insn
);
5421 /* X, which is found at *LOC, is a part of an address that needs to be
5422 reloaded into a register of class CLASS. If X is a constant, or if
5423 X is a PLUS that contains a constant, check that the constant is a
5424 legitimate operand and that we are supposed to be able to load
5425 it into the register.
5427 If not, force the constant into memory and reload the MEM instead.
5429 MODE is the mode to use, in case X is an integer constant.
5431 OPNUM and TYPE describe the purpose of any reloads made.
5433 IND_LEVELS says how many levels of indirect addressing this machine
5437 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5440 enum reg_class
class;
5441 enum machine_mode mode
;
5443 enum reload_type type
;
5447 && (! LEGITIMATE_CONSTANT_P (x
)
5448 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5452 /* If this is a CONST_INT, it could have been created by a
5453 plus_constant call in eliminate_regs, which means it may be
5454 on the reload_obstack. reload_obstack will be freed later, so
5455 we can't allow such RTL to be put in the constant pool. There
5456 is code in force_const_mem to check for this case, but it doesn't
5457 work because we have already popped off the reload_obstack, so
5458 rtl_obstack == saveable_obstack is true at this point. */
5459 if (GET_CODE (x
) == CONST_INT
)
5460 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5462 tem
= x
= force_const_mem (mode
, x
);
5464 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5465 opnum
, type
, ind_levels
, 0);
5468 else if (GET_CODE (x
) == PLUS
5469 && CONSTANT_P (XEXP (x
, 1))
5470 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5471 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5475 /* See comment above. */
5476 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5477 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5479 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5481 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5482 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5483 opnum
, type
, ind_levels
, 0);
5486 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5487 mode
, VOIDmode
, 0, 0, opnum
, type
);
5490 /* X, a subreg of a pseudo, is a part of an address that needs to be
5493 If the pseudo is equivalent to a memory location that cannot be directly
5494 addressed, make the necessary address reloads.
5496 If address reloads have been necessary, or if the address is changed
5497 by register elimination, return the rtx of the memory location;
5498 otherwise, return X.
5500 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5503 OPNUM and TYPE identify the purpose of the reload.
5505 IND_LEVELS says how many levels of indirect addressing are
5506 supported at this point in the address.
5508 INSN, if nonzero, is the insn in which we do the reload. It is used
5509 to determine where to put USEs for pseudos that we have to replace with
5513 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5518 enum reload_type type
;
5522 int regno
= REGNO (SUBREG_REG (x
));
5524 if (reg_equiv_memory_loc
[regno
])
5526 /* If the address is not directly addressable, or if the address is not
5527 offsettable, then it must be replaced. */
5529 && (reg_equiv_address
[regno
]
5530 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5533 if (force_replace
|| num_not_at_initial_offset
)
5535 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5537 /* If the address changes because of register elimination, then
5538 it must be replaced. */
5540 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5542 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5544 if (BYTES_BIG_ENDIAN
)
5548 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5549 offset
+= MIN (size
, UNITS_PER_WORD
);
5550 size
= GET_MODE_SIZE (GET_MODE (x
));
5551 offset
-= MIN (size
, UNITS_PER_WORD
);
5553 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5554 PUT_MODE (tem
, GET_MODE (x
));
5555 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5556 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5558 /* If this is not a toplevel operand, find_reloads doesn't see
5559 this substitution. We have to emit a USE of the pseudo so
5560 that delete_output_reload can see it. */
5561 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5562 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5570 /* Substitute into the current INSN the registers into which we have reloaded
5571 the things that need reloading. The array `replacements'
5572 says contains the locations of all pointers that must be changed
5573 and says what to replace them with.
5575 Return the rtx that X translates into; usually X, but modified. */
5582 for (i
= 0; i
< n_replacements
; i
++)
5584 register struct replacement
*r
= &replacements
[i
];
5585 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5588 /* Encapsulate RELOADREG so its machine mode matches what
5589 used to be there. Note that gen_lowpart_common will
5590 do the wrong thing if RELOADREG is multi-word. RELOADREG
5591 will always be a REG here. */
5592 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5593 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5595 /* If we are putting this into a SUBREG and RELOADREG is a
5596 SUBREG, we would be making nested SUBREGs, so we have to fix
5597 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5599 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5601 if (GET_MODE (*r
->subreg_loc
)
5602 == GET_MODE (SUBREG_REG (reloadreg
)))
5603 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5606 *r
->where
= SUBREG_REG (reloadreg
);
5607 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5611 *r
->where
= reloadreg
;
5613 /* If reload got no reg and isn't optional, something's wrong. */
5614 else if (! rld
[r
->what
].optional
)
5619 /* Make a copy of any replacements being done into X and move those copies
5620 to locations in Y, a copy of X. We only look at the highest level of
5624 copy_replacements (x
, y
)
5629 enum rtx_code code
= GET_CODE (x
);
5630 const char *fmt
= GET_RTX_FORMAT (code
);
5631 struct replacement
*r
;
5633 /* We can't support X being a SUBREG because we might then need to know its
5634 location if something inside it was replaced. */
5638 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5640 for (j
= 0; j
< n_replacements
; j
++)
5642 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5644 r
= &replacements
[n_replacements
++];
5645 r
->where
= replacements
[j
].where
;
5646 r
->subreg_loc
= &XEXP (y
, i
);
5647 r
->what
= replacements
[j
].what
;
5648 r
->mode
= replacements
[j
].mode
;
5650 else if (replacements
[j
].where
== &XEXP (x
, i
))
5652 r
= &replacements
[n_replacements
++];
5653 r
->where
= &XEXP (y
, i
);
5655 r
->what
= replacements
[j
].what
;
5656 r
->mode
= replacements
[j
].mode
;
5661 /* Change any replacements being done to *X to be done to *Y */
5664 move_replacements (x
, y
)
5670 for (i
= 0; i
< n_replacements
; i
++)
5671 if (replacements
[i
].subreg_loc
== x
)
5672 replacements
[i
].subreg_loc
= y
;
5673 else if (replacements
[i
].where
== x
)
5675 replacements
[i
].where
= y
;
5676 replacements
[i
].subreg_loc
= 0;
5680 /* If LOC was scheduled to be replaced by something, return the replacement.
5681 Otherwise, return *LOC. */
5684 find_replacement (loc
)
5687 struct replacement
*r
;
5689 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5691 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5693 if (reloadreg
&& r
->where
== loc
)
5695 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5696 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5700 else if (reloadreg
&& r
->subreg_loc
== loc
)
5702 /* RELOADREG must be either a REG or a SUBREG.
5704 ??? Is it actually still ever a SUBREG? If so, why? */
5706 if (GET_CODE (reloadreg
) == REG
)
5707 return gen_rtx_REG (GET_MODE (*loc
),
5708 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5709 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5712 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5713 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5717 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5718 what's inside and make a new rtl if so. */
5719 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5720 || GET_CODE (*loc
) == MULT
)
5722 rtx x
= find_replacement (&XEXP (*loc
, 0));
5723 rtx y
= find_replacement (&XEXP (*loc
, 1));
5725 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5726 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5732 /* Return nonzero if register in range [REGNO, ENDREGNO)
5733 appears either explicitly or implicitly in X
5734 other than being stored into (except for earlyclobber operands).
5736 References contained within the substructure at LOC do not count.
5737 LOC may be zero, meaning don't ignore anything.
5739 This is similar to refers_to_regno_p in rtlanal.c except that we
5740 look at equivalences for pseudos that didn't get hard registers. */
5743 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5744 int regno
, endregno
;
5749 register RTX_CODE code
;
5750 register const char *fmt
;
5756 code
= GET_CODE (x
);
5763 /* If this is a pseudo, a hard register must not have been allocated.
5764 X must therefore either be a constant or be in memory. */
5765 if (i
>= FIRST_PSEUDO_REGISTER
)
5767 if (reg_equiv_memory_loc
[i
])
5768 return refers_to_regno_for_reload_p (regno
, endregno
,
5769 reg_equiv_memory_loc
[i
],
5772 if (reg_equiv_constant
[i
])
5778 return (endregno
> i
5779 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5780 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5784 /* If this is a SUBREG of a hard reg, we can see exactly which
5785 registers are being modified. Otherwise, handle normally. */
5786 if (GET_CODE (SUBREG_REG (x
)) == REG
5787 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5789 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5791 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5792 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5794 return endregno
> inner_regno
&& regno
< inner_endregno
;
5800 if (&SET_DEST (x
) != loc
5801 /* Note setting a SUBREG counts as referring to the REG it is in for
5802 a pseudo but not for hard registers since we can
5803 treat each word individually. */
5804 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5805 && loc
!= &SUBREG_REG (SET_DEST (x
))
5806 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5807 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5808 && refers_to_regno_for_reload_p (regno
, endregno
,
5809 SUBREG_REG (SET_DEST (x
)),
5811 /* If the output is an earlyclobber operand, this is
5813 || ((GET_CODE (SET_DEST (x
)) != REG
5814 || earlyclobber_operand_p (SET_DEST (x
)))
5815 && refers_to_regno_for_reload_p (regno
, endregno
,
5816 SET_DEST (x
), loc
))))
5819 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5828 /* X does not match, so try its subexpressions. */
5830 fmt
= GET_RTX_FORMAT (code
);
5831 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5833 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5841 if (refers_to_regno_for_reload_p (regno
, endregno
,
5845 else if (fmt
[i
] == 'E')
5848 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5849 if (loc
!= &XVECEXP (x
, i
, j
)
5850 && refers_to_regno_for_reload_p (regno
, endregno
,
5851 XVECEXP (x
, i
, j
), loc
))
5858 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5859 we check if any register number in X conflicts with the relevant register
5860 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5861 contains a MEM (we don't bother checking for memory addresses that can't
5862 conflict because we expect this to be a rare case.
5864 This function is similar to reg_overlap_mention_p in rtlanal.c except
5865 that we look at equivalences for pseudos that didn't get hard registers. */
5868 reg_overlap_mentioned_for_reload_p (x
, in
)
5871 int regno
, endregno
;
5873 /* Overly conservative. */
5874 if (GET_CODE (x
) == STRICT_LOW_PART
)
5877 /* If either argument is a constant, then modifying X can not affect IN. */
5878 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5880 else if (GET_CODE (x
) == SUBREG
)
5882 regno
= REGNO (SUBREG_REG (x
));
5883 if (regno
< FIRST_PSEUDO_REGISTER
)
5884 regno
+= SUBREG_WORD (x
);
5886 else if (GET_CODE (x
) == REG
)
5890 /* If this is a pseudo, it must not have been assigned a hard register.
5891 Therefore, it must either be in memory or be a constant. */
5893 if (regno
>= FIRST_PSEUDO_REGISTER
)
5895 if (reg_equiv_memory_loc
[regno
])
5896 return refers_to_mem_for_reload_p (in
);
5897 else if (reg_equiv_constant
[regno
])
5902 else if (GET_CODE (x
) == MEM
)
5903 return refers_to_mem_for_reload_p (in
);
5904 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5905 || GET_CODE (x
) == CC0
)
5906 return reg_mentioned_p (x
, in
);
5910 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5911 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5913 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5916 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5920 refers_to_mem_for_reload_p (x
)
5926 if (GET_CODE (x
) == MEM
)
5929 if (GET_CODE (x
) == REG
)
5930 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5931 && reg_equiv_memory_loc
[REGNO (x
)]);
5933 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5934 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5936 && (GET_CODE (XEXP (x
, i
)) == MEM
5937 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5943 /* Check the insns before INSN to see if there is a suitable register
5944 containing the same value as GOAL.
5945 If OTHER is -1, look for a register in class CLASS.
5946 Otherwise, just see if register number OTHER shares GOAL's value.
5948 Return an rtx for the register found, or zero if none is found.
5950 If RELOAD_REG_P is (short *)1,
5951 we reject any hard reg that appears in reload_reg_rtx
5952 because such a hard reg is also needed coming into this insn.
5954 If RELOAD_REG_P is any other nonzero value,
5955 it is a vector indexed by hard reg number
5956 and we reject any hard reg whose element in the vector is nonnegative
5957 as well as any that appears in reload_reg_rtx.
5959 If GOAL is zero, then GOALREG is a register number; we look
5960 for an equivalent for that register.
5962 MODE is the machine mode of the value we want an equivalence for.
5963 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5965 This function is used by jump.c as well as in the reload pass.
5967 If GOAL is the sum of the stack pointer and a constant, we treat it
5968 as if it were a constant except that sp is required to be unchanging. */
5971 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5974 enum reg_class
class;
5976 short *reload_reg_p
;
5978 enum machine_mode mode
;
5980 register rtx p
= insn
;
5981 rtx goaltry
, valtry
, value
, where
;
5983 register int regno
= -1;
5987 int goal_mem_addr_varies
= 0;
5988 int need_stable_sp
= 0;
5994 else if (GET_CODE (goal
) == REG
)
5995 regno
= REGNO (goal
);
5996 else if (GET_CODE (goal
) == MEM
)
5998 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5999 if (MEM_VOLATILE_P (goal
))
6001 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6003 /* An address with side effects must be reexecuted. */
6016 else if (CONSTANT_P (goal
))
6018 else if (GET_CODE (goal
) == PLUS
6019 && XEXP (goal
, 0) == stack_pointer_rtx
6020 && CONSTANT_P (XEXP (goal
, 1)))
6021 goal_const
= need_stable_sp
= 1;
6022 else if (GET_CODE (goal
) == PLUS
6023 && XEXP (goal
, 0) == frame_pointer_rtx
6024 && CONSTANT_P (XEXP (goal
, 1)))
6029 /* On some machines, certain regs must always be rejected
6030 because they don't behave the way ordinary registers do. */
6032 #ifdef OVERLAPPING_REGNO_P
6033 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
6034 && OVERLAPPING_REGNO_P (regno
))
6038 /* Scan insns back from INSN, looking for one that copies
6039 a value into or out of GOAL.
6040 Stop and give up if we reach a label. */
6045 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6047 if (GET_CODE (p
) == INSN
6048 /* If we don't want spill regs ... */
6049 && (! (reload_reg_p
!= 0
6050 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6051 /* ... then ignore insns introduced by reload; they aren't useful
6052 and can cause results in reload_as_needed to be different
6053 from what they were when calculating the need for spills.
6054 If we notice an input-reload insn here, we will reject it below,
6055 but it might hide a usable equivalent. That makes bad code.
6056 It may even abort: perhaps no reg was spilled for this insn
6057 because it was assumed we would find that equivalent. */
6058 || INSN_UID (p
) < reload_first_uid
))
6061 pat
= single_set (p
);
6062 /* First check for something that sets some reg equal to GOAL. */
6065 && true_regnum (SET_SRC (pat
)) == regno
6066 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6069 && true_regnum (SET_DEST (pat
)) == regno
6070 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6072 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6073 /* When looking for stack pointer + const,
6074 make sure we don't use a stack adjust. */
6075 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6076 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6078 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6079 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6081 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6082 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6083 /* If we are looking for a constant,
6084 and something equivalent to that constant was copied
6085 into a reg, we can use that reg. */
6086 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6088 && rtx_equal_p (XEXP (tem
, 0), goal
)
6089 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6090 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6092 && GET_CODE (SET_DEST (pat
)) == REG
6093 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6094 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
6095 && GET_CODE (goal
) == CONST_INT
6096 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
6098 && rtx_equal_p (goal
, goaltry
)
6099 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
6101 && (valueno
= true_regnum (valtry
)) >= 0)
6102 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6104 && GET_CODE (SET_DEST (pat
)) == REG
6105 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6106 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
6107 && GET_CODE (goal
) == CONST_INT
6108 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6110 && rtx_equal_p (goal
, goaltry
)
6112 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6113 && (valueno
= true_regnum (valtry
)) >= 0)))
6116 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6117 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6127 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6128 (or copying VALUE into GOAL, if GOAL is also a register).
6129 Now verify that VALUE is really valid. */
6131 /* VALUENO is the register number of VALUE; a hard register. */
6133 /* Don't try to re-use something that is killed in this insn. We want
6134 to be able to trust REG_UNUSED notes. */
6135 if (find_reg_note (where
, REG_UNUSED
, value
))
6138 /* If we propose to get the value from the stack pointer or if GOAL is
6139 a MEM based on the stack pointer, we need a stable SP. */
6140 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6141 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6145 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6146 if (GET_MODE (value
) != mode
)
6149 /* Reject VALUE if it was loaded from GOAL
6150 and is also a register that appears in the address of GOAL. */
6152 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6153 && refers_to_regno_for_reload_p (valueno
,
6155 + HARD_REGNO_NREGS (valueno
, mode
)),
6159 /* Reject registers that overlap GOAL. */
6161 if (!goal_mem
&& !goal_const
6162 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
6163 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
6166 /* Reject VALUE if it is one of the regs reserved for reloads.
6167 Reload1 knows how to reuse them anyway, and it would get
6168 confused if we allocated one without its knowledge.
6169 (Now that insns introduced by reload are ignored above,
6170 this case shouldn't happen, but I'm not positive.) */
6172 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
6173 && reload_reg_p
[valueno
] >= 0)
6176 /* On some machines, certain regs must always be rejected
6177 because they don't behave the way ordinary registers do. */
6179 #ifdef OVERLAPPING_REGNO_P
6180 if (OVERLAPPING_REGNO_P (valueno
))
6184 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6185 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6187 /* Reject VALUE if it is a register being used for an input reload
6188 even if it is not one of those reserved. */
6190 if (reload_reg_p
!= 0)
6193 for (i
= 0; i
< n_reloads
; i
++)
6194 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6196 int regno1
= REGNO (rld
[i
].reg_rtx
);
6197 int nregs1
= HARD_REGNO_NREGS (regno1
,
6198 GET_MODE (rld
[i
].reg_rtx
));
6199 if (regno1
< valueno
+ valuenregs
6200 && regno1
+ nregs1
> valueno
)
6206 /* We must treat frame pointer as varying here,
6207 since it can vary--in a nonlocal goto as generated by expand_goto. */
6208 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6210 /* Now verify that the values of GOAL and VALUE remain unaltered
6211 until INSN is reached. */
6220 /* Don't trust the conversion past a function call
6221 if either of the two is in a call-clobbered register, or memory. */
6222 if (GET_CODE (p
) == CALL_INSN
6223 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
6224 && call_used_regs
[regno
])
6226 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
6227 && call_used_regs
[valueno
])
6233 #ifdef NON_SAVING_SETJMP
6234 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6235 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6239 #ifdef INSN_CLOBBERS_REGNO_P
6240 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
6241 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
6242 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
6243 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
6247 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6251 /* Watch out for unspec_volatile, and volatile asms. */
6252 if (volatile_insn_p (pat
))
6255 /* If this insn P stores in either GOAL or VALUE, return 0.
6256 If GOAL is a memory ref and this insn writes memory, return 0.
6257 If GOAL is a memory ref and its address is not constant,
6258 and this insn P changes a register used in GOAL, return 0. */
6260 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6262 register rtx dest
= SET_DEST (pat
);
6263 while (GET_CODE (dest
) == SUBREG
6264 || GET_CODE (dest
) == ZERO_EXTRACT
6265 || GET_CODE (dest
) == SIGN_EXTRACT
6266 || GET_CODE (dest
) == STRICT_LOW_PART
)
6267 dest
= XEXP (dest
, 0);
6268 if (GET_CODE (dest
) == REG
)
6270 register int xregno
= REGNO (dest
);
6272 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6273 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6276 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6278 if (xregno
< valueno
+ valuenregs
6279 && xregno
+ xnregs
> valueno
)
6281 if (goal_mem_addr_varies
6282 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6284 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6287 else if (goal_mem
&& GET_CODE (dest
) == MEM
6288 && ! push_operand (dest
, GET_MODE (dest
)))
6290 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6291 && reg_equiv_memory_loc
[regno
] != 0)
6293 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6296 else if (GET_CODE (pat
) == PARALLEL
)
6299 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6301 register rtx v1
= XVECEXP (pat
, 0, i
);
6302 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6304 register rtx dest
= SET_DEST (v1
);
6305 while (GET_CODE (dest
) == SUBREG
6306 || GET_CODE (dest
) == ZERO_EXTRACT
6307 || GET_CODE (dest
) == SIGN_EXTRACT
6308 || GET_CODE (dest
) == STRICT_LOW_PART
)
6309 dest
= XEXP (dest
, 0);
6310 if (GET_CODE (dest
) == REG
)
6312 register int xregno
= REGNO (dest
);
6314 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6315 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6318 if (xregno
< regno
+ nregs
6319 && xregno
+ xnregs
> regno
)
6321 if (xregno
< valueno
+ valuenregs
6322 && xregno
+ xnregs
> valueno
)
6324 if (goal_mem_addr_varies
6325 && reg_overlap_mentioned_for_reload_p (dest
,
6328 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6331 else if (goal_mem
&& GET_CODE (dest
) == MEM
6332 && ! push_operand (dest
, GET_MODE (dest
)))
6334 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6335 && reg_equiv_memory_loc
[regno
] != 0)
6337 else if (need_stable_sp
6338 && push_operand (dest
, GET_MODE (dest
)))
6344 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6348 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6349 link
= XEXP (link
, 1))
6351 pat
= XEXP (link
, 0);
6352 if (GET_CODE (pat
) == CLOBBER
)
6354 register rtx dest
= SET_DEST (pat
);
6355 while (GET_CODE (dest
) == SUBREG
6356 || GET_CODE (dest
) == ZERO_EXTRACT
6357 || GET_CODE (dest
) == SIGN_EXTRACT
6358 || GET_CODE (dest
) == STRICT_LOW_PART
)
6359 dest
= XEXP (dest
, 0);
6360 if (GET_CODE (dest
) == REG
)
6362 register int xregno
= REGNO (dest
);
6364 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6365 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6368 if (xregno
< regno
+ nregs
6369 && xregno
+ xnregs
> regno
)
6371 if (xregno
< valueno
+ valuenregs
6372 && xregno
+ xnregs
> valueno
)
6374 if (goal_mem_addr_varies
6375 && reg_overlap_mentioned_for_reload_p (dest
,
6379 else if (goal_mem
&& GET_CODE (dest
) == MEM
6380 && ! push_operand (dest
, GET_MODE (dest
)))
6382 else if (need_stable_sp
6383 && push_operand (dest
, GET_MODE (dest
)))
6390 /* If this insn auto-increments or auto-decrements
6391 either regno or valueno, return 0 now.
6392 If GOAL is a memory ref and its address is not constant,
6393 and this insn P increments a register used in GOAL, return 0. */
6397 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6398 if (REG_NOTE_KIND (link
) == REG_INC
6399 && GET_CODE (XEXP (link
, 0)) == REG
)
6401 register int incno
= REGNO (XEXP (link
, 0));
6402 if (incno
< regno
+ nregs
&& incno
>= regno
)
6404 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6406 if (goal_mem_addr_varies
6407 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6417 /* Find a place where INCED appears in an increment or decrement operator
6418 within X, and return the amount INCED is incremented or decremented by.
6419 The value is always positive. */
6422 find_inc_amount (x
, inced
)
6425 register enum rtx_code code
= GET_CODE (x
);
6426 register const char *fmt
;
6431 register rtx addr
= XEXP (x
, 0);
6432 if ((GET_CODE (addr
) == PRE_DEC
6433 || GET_CODE (addr
) == POST_DEC
6434 || GET_CODE (addr
) == PRE_INC
6435 || GET_CODE (addr
) == POST_INC
)
6436 && XEXP (addr
, 0) == inced
)
6437 return GET_MODE_SIZE (GET_MODE (x
));
6440 fmt
= GET_RTX_FORMAT (code
);
6441 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6445 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6452 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6454 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6464 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6467 regno_clobbered_p (regno
, insn
)
6471 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6472 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6473 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6475 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6477 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6481 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6482 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6483 && REGNO (XEXP (elt
, 0)) == regno
)
6491 static const char *reload_when_needed_name
[] =
6494 "RELOAD_FOR_OUTPUT",
6496 "RELOAD_FOR_INPUT_ADDRESS",
6497 "RELOAD_FOR_INPADDR_ADDRESS",
6498 "RELOAD_FOR_OUTPUT_ADDRESS",
6499 "RELOAD_FOR_OUTADDR_ADDRESS",
6500 "RELOAD_FOR_OPERAND_ADDRESS",
6501 "RELOAD_FOR_OPADDR_ADDR",
6503 "RELOAD_FOR_OTHER_ADDRESS"
6506 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6508 /* These functions are used to print the variables set by 'find_reloads' */
6511 debug_reload_to_stream (f
)
6519 for (r
= 0; r
< n_reloads
; r
++)
6521 fprintf (f
, "Reload %d: ", r
);
6525 fprintf (f
, "reload_in (%s) = ",
6526 GET_MODE_NAME (rld
[r
].inmode
));
6527 print_inline_rtx (f
, rld
[r
].in
, 24);
6528 fprintf (f
, "\n\t");
6531 if (rld
[r
].out
!= 0)
6533 fprintf (f
, "reload_out (%s) = ",
6534 GET_MODE_NAME (rld
[r
].outmode
));
6535 print_inline_rtx (f
, rld
[r
].out
, 24);
6536 fprintf (f
, "\n\t");
6539 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6541 fprintf (f
, "%s (opnum = %d)",
6542 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6545 if (rld
[r
].optional
)
6546 fprintf (f
, ", optional");
6548 if (rld
[r
].nongroup
)
6549 fprintf (stderr
, ", nongroup");
6551 if (rld
[r
].inc
!= 0)
6552 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6554 if (rld
[r
].nocombine
)
6555 fprintf (f
, ", can't combine");
6557 if (rld
[r
].secondary_p
)
6558 fprintf (f
, ", secondary_reload_p");
6560 if (rld
[r
].in_reg
!= 0)
6562 fprintf (f
, "\n\treload_in_reg: ");
6563 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6566 if (rld
[r
].out_reg
!= 0)
6568 fprintf (f
, "\n\treload_out_reg: ");
6569 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6572 if (rld
[r
].reg_rtx
!= 0)
6574 fprintf (f
, "\n\treload_reg_rtx: ");
6575 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6579 if (rld
[r
].secondary_in_reload
!= -1)
6581 fprintf (f
, "%ssecondary_in_reload = %d",
6582 prefix
, rld
[r
].secondary_in_reload
);
6586 if (rld
[r
].secondary_out_reload
!= -1)
6587 fprintf (f
, "%ssecondary_out_reload = %d\n",
6588 prefix
, rld
[r
].secondary_out_reload
);
6591 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6593 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6594 insn_data
[rld
[r
].secondary_in_icode
].name
);
6598 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6599 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6600 insn_data
[rld
[r
].secondary_out_icode
].name
);
6609 debug_reload_to_stream (stderr
);