1 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
4 allocated size and set current_function_static_stack_size, if
7 2020-07-20 Sergei Trofimovich <siarheit@google.com>
10 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
11 to get crtendS.o for !no-pie mode.
12 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
14 2020-07-20 Yang Yang <yangyang305@huawei.com>
16 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
17 VIEW_CONVERT_EXPRs if the arguments types and return type
18 of simd clone function are distinct with the vectype of stmt.
20 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
23 * config/i386/i386.h (TARGET_AVOID_MFENCE):
24 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
25 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
26 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
27 referred memory in word_mode.
28 (mem_thread_fence): Do not generate mfence_sse2 pattern when
29 TARGET_AVOID_MFENCE is true.
30 (atomic_store<mode>): Update for rename.
31 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
32 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
34 2020-07-20 Martin Sebor <msebor@redhat.com>
38 * builtins.c (inline_expand_builtin_string_cmp): Rename...
39 (inline_expand_builtin_bytecmp): ...to this.
40 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
41 (expand_builtin_memory_copy_args): Handle object representations
42 with embedded nul bytes.
43 (expand_builtin_memcmp): Same.
44 (expand_builtin_strcmp): Adjust call to naming change.
45 (expand_builtin_strncmp): Same.
46 * expr.c (string_constant): Create empty strings with nonzero size.
47 * fold-const.c (c_getstr): Rename locals and update comments.
48 * tree.c (build_string): Accept null pointer argument.
49 (build_string_literal): Same.
50 * tree.h (build_string): Provide a default.
51 (build_string_literal): Same.
53 2020-07-20 Richard Biener <rguenther@suse.de>
55 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
56 write-only post array.
58 2020-07-20 Jakub Jelinek <jakub@redhat.com>
61 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
62 of a bitfield not aligned on byte boundaries try to
63 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
64 adjust it depending on endianity.
66 2020-07-20 Jakub Jelinek <jakub@redhat.com>
69 * fold-const.c (native_encode_initializer): Handle bit-fields.
71 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
73 * config/rs6000/rs6000.c (rs6000_option_override_internal):
74 Set param_vect_partial_vector_usage to 0 explicitly.
75 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
76 * optabs-query.c (get_len_load_store_mode): New function.
77 * optabs-query.h (get_len_load_store_mode): New declare.
78 * params.opt (vect-partial-vector-usage): New.
79 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
80 handlings for vectorization using length-based partial vectors, call
81 vect_gen_len for length generation, and rename some variables with
82 items instead of scalars.
83 (vect_set_loop_condition_partial_vectors): Add the handlings for
84 vectorization using length-based partial vectors.
85 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
86 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
87 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
88 epil_using_partial_vectors_p.
89 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
90 for lengths destruction.
91 (vect_verify_loop_lens): New function.
92 (vect_analyze_loop): Add handlings for epilogue of loop when it's
93 marked to use vectorization using partial vectors.
94 (vect_analyze_loop_2): Add the check to allow only one vectorization
95 approach using partial vectorization at the same time. Check param
96 vect-partial-vector-usage for partial vectors decision. Mark
97 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
98 considerable to use partial vectors. Call release_vec_loop_controls
99 for lengths destruction.
100 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
101 using length-based partial vectors.
102 (vect_record_loop_mask): Init factor to 1 for vectorization using
103 mask-based partial vectors.
104 (vect_record_loop_len): New function.
105 (vect_get_loop_len): Likewise.
106 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
107 checks for vectorization using length-based partial vectors. Factor
108 some code to lambda function get_valid_nvectors.
109 (vectorizable_store): Add handlings when using length-based partial
111 (vectorizable_load): Likewise.
112 (vect_gen_len): New function.
113 * tree-vectorizer.h (struct rgroup_controls): Add field factor
114 mainly for length-based partial vectors.
115 (vec_loop_lens): New typedef.
116 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
117 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
118 (LOOP_VINFO_LENS): Likewise.
119 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
120 (vect_record_loop_len): New declare.
121 (vect_get_loop_len): Likewise.
122 (vect_gen_len): Likewise.
124 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
126 * config/mmix/mmix.c (mmix_option_override): Reinstate default
127 integer-emitting targetm.asm_out pseudos when dumping detailed
129 (mmix_assemble_integer): Update comment.
131 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
135 * config/i386/cpuid.h: Add include guard.
138 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
141 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
143 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
146 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
147 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
148 (define_attr "enabled"): Handle p9.
150 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
152 * function.c (assign_parm_setup_block): Use the macro
153 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
154 targetm.truly_noop_truncation directly.
156 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
160 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
161 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
162 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
163 VF1_AVX512ER_128_256.
165 2020-07-17 Tamar Christina <tamar.christina@arm.com>
167 * doc/sourcebuild.texi (dg-set-compiler-env-var,
168 dg-set-target-env-var): Document.
170 2020-07-17 Tamar Christina <tamar.christina@arm.com>
172 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
174 2020-07-17 Tamar Christina <tamar.christina@arm.com>
176 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
179 2020-07-17 Tamar Christina <tamar.christina@arm.com>
181 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
182 (parse_field): Use std::string.
183 (split_words, readline, find_field): New.
184 (host_detect_local_cpu): Fix truncation issues.
186 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
188 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
189 (ELFOSABI_AMDGPU_HSA): Likewise.
190 (ELFABIVERSION_AMDGPU_HSA): Likewise.
191 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
192 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
193 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
196 2020-07-17 Andrew Pinski <apinksi@marvell.com>
197 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
200 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
201 (aarch64_expand_vec_perm_const_1): Call it.
202 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
203 public, and add a "@" prefix.
205 2020-07-17 Andrew Pinski <apinksi@marvell.com>
206 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
209 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
210 (aarch64_expand_vec_perm_const_1): Call it.
212 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
214 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
216 (VAR1): Add new field FLAG in macro.
232 (aarch64_general_fold_builtin): Likewise.
233 (aarch64_general_gimple_fold_builtin): Likewise.
234 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
235 each built-in function.
236 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
238 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
241 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
242 expanders to generate the pattern.
243 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
244 '*' to have callable expanders.
246 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
247 Segher Boessenkool <segher@kernel.crashing.org>
250 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
253 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
256 * config/i386/sync.md
257 (peephole2 to remove unneded compare after CMPXCHG):
258 New pattern, also handle XOR zeroing and load of -1 by OR.
260 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
262 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
263 (ix86_adjust_stack_and_probe): Delete.
264 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
265 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
266 a small dope beyond SIZE bytes.
267 (ix86_emit_probe_stack_range): Use local variable.
268 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
269 and tidy up the stack checking code.
270 * explow.c (get_stack_check_protect): Fix head comment.
271 (anti_adjust_stack_and_probe_stack_clash): Likewise.
272 (allocate_dynamic_stack_space): Add comment.
273 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
274 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
276 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
278 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
279 (EM_AMDGPU): New macro.
280 (ELFOSABI_AMDGPU_HSA): New macro.
281 (ELFABIVERSION_AMDGPU_HSA): New macro.
282 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
283 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
284 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
285 (R_AMDGPU_NONE): New macro.
286 (R_AMDGPU_ABS32_LO): New macro.
287 (R_AMDGPU_ABS32_HI): New macro.
288 (R_AMDGPU_ABS64): New macro.
289 (R_AMDGPU_REL32): New macro.
290 (R_AMDGPU_REL64): New macro.
291 (R_AMDGPU_ABS32): New macro.
292 (R_AMDGPU_GOTPCREL): New macro.
293 (R_AMDGPU_GOTPCREL32_LO): New macro.
294 (R_AMDGPU_GOTPCREL32_HI): New macro.
295 (R_AMDGPU_REL32_LO): New macro.
296 (R_AMDGPU_REL32_HI): New macro.
297 (reserved): New macro.
298 (R_AMDGPU_RELATIVE64): New macro.
299 (gcn_s1_name): Delete global variable.
300 (gcn_s2_name): Delete global variable.
301 (gcn_o_name): Delete global variable.
302 (gcn_cfile_name): Delete global variable.
303 (files_to_cleanup): New global variable.
304 (offload_abi): New global variable.
305 (tool_cleanup): Use files_to_cleanup, not explicit list.
306 (copy_early_debug_info): New function.
307 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
309 Create files_to_cleanup obstack.
310 Recognize -march options.
311 Copy early debug info from input .o files.
313 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
315 * Makefile.in (TAGS): Remove 'params.def'.
317 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
319 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
320 targets that return false, indicating SUBREGs shouldn't be
321 used, also need to provide a trunc?i?i2 optab that performs this
323 * doc/tm.texi: Regenerate.
325 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
328 * config/i386/sync.md
329 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
331 2020-07-15 Jakub Jelinek <jakub@redhat.com>
334 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
335 member to first_inner_iterations, adjust comment.
336 * omp-general.c (omp_extract_for_data): Adjust for the above change.
337 Always use n1first and n2first to compute it, rather than depending
338 on single_nonrect_cond_code. Similarly, always compute factor
339 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
340 depending on single_nonrect_cond_code.
341 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
342 to first_inner_iterations and min_inner_iterationsd to
343 first_inner_iterationsd.
345 2020-07-15 Jakub Jelinek <jakub@redhat.com>
348 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
349 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
350 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
351 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
352 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
353 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
354 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
355 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
356 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
357 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
358 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
359 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
360 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
361 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
362 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
363 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
364 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
367 2020-07-15 Jakub Jelinek <jakub@redhat.com>
370 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
372 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
373 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
376 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
378 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
380 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
382 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
384 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
385 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
387 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
389 PR preprocessor/49973
391 * common.opt: Handle -ftabstop here instead of in c-family
392 options. Add -fdiagnostics-column-unit= and
393 -fdiagnostics-column-origin= options.
394 * opts.c (common_handle_option): Handle the new options.
395 * diagnostic-format-json.cc (json_from_expanded_location): Add
396 diagnostic_context argument. Use it to convert column numbers as per
398 (json_from_location_range): Likewise.
399 (json_from_fixit_hint): Likewise.
400 (json_end_diagnostic): Pass the new context argument to helper
401 functions above. Add "column-origin" field to the output.
402 (test_unknown_location): Add the new context argument to calls to
404 (test_bad_endpoints): Likewise.
405 * diagnostic-show-locus.c
406 (exploc_with_display_col::exploc_with_display_col): Support
408 (layout_point::layout_point): Make use of class
409 exploc_with_display_col.
410 (layout_range::layout_range): Likewise.
411 (struct line_bounds): Clarify that the units are now always
412 display columns. Rename members accordingly. Add constructor.
413 (layout::print_source_line): Add support for tab expansion.
414 (make_range): Adapt to class layout_range changes.
415 (layout::maybe_add_location_range): Likewise.
416 (layout::layout): Adapt to class exploc_with_display_col changes.
417 (layout::calculate_x_offset_display): Support tabstop parameter.
418 (layout::print_annotation_line): Adapt to struct line_bounds changes.
419 (layout::print_line): Likewise.
420 (line_label::line_label): Add diagnostic_context argument.
421 (get_affected_range): Likewise.
422 (get_printed_columns): Likewise.
423 (layout::print_any_labels): Adapt to struct line_label changes.
424 (class correction): Add m_tabstop member.
425 (correction::correction): Add tabstop argument.
426 (correction::compute_display_cols): Use m_tabstop.
427 (class line_corrections): Add m_context member.
428 (line_corrections::line_corrections): Add diagnostic_context argument.
429 (line_corrections::add_hint): Use m_context to handle tabstops.
430 (layout::print_trailing_fixits): Adapt to class line_corrections
432 (test_layout_x_offset_display_utf8): Support tabstop parameter.
433 (test_layout_x_offset_display_tab): New selftest.
434 (test_one_liner_colorized_utf8): Likewise.
435 (test_tab_expansion): Likewise.
436 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
437 (diagnostic_show_locus_c_tests): Likewise.
438 (test_overlapped_fixit_printing): Adapt to helper class and
440 (test_overlapped_fixit_printing_utf8): Likewise.
441 (test_overlapped_fixit_printing_2): Likewise.
442 * diagnostic.h (enum diagnostics_column_unit): New enum.
443 (struct diagnostic_context): Add members for the new options.
444 (diagnostic_converted_column): Declare.
445 (json_from_expanded_location): Add new context argument.
446 * diagnostic.c (diagnostic_initialize): Initialize new members.
447 (diagnostic_converted_column): New function.
448 (maybe_line_and_column): Be willing to output a column of 0.
449 (diagnostic_get_location_text): Convert column number as per the new
451 (diagnostic_report_current_module): Likewise.
452 (assert_location_text): Add origin and column_unit arguments for
453 testing the new functionality.
454 (test_diagnostic_get_location_text): Test the new functionality.
455 * doc/invoke.texi: Document the new options and behavior.
456 * input.h (location_compute_display_column): Add tabstop argument.
457 * input.c (location_compute_display_column): Likewise.
458 (test_cpp_utf8): Add selftests for tab expansion.
459 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
460 new context argument to json_from_expanded_location().
462 2020-07-14 Jakub Jelinek <jakub@redhat.com>
465 * expr.c (expand_constructor): Don't create temporary for store to
466 volatile MEM if exp has an addressable type.
468 2020-07-14 Nathan Sidwell <nathan@acm.org>
470 * hash-map.h (hash_map::get): Note it is a pointer to value.
471 * incpath.h (incpath_kind): Align comments.
473 2020-07-14 Nathan Sidwell <nathan@acm.org>
475 * tree-core.h (tree_decl_with_vis, tree_function_decl):
476 Note additional padding on 64-bits
477 * tree.c (cache_integer_cst): Note why no caching of enum literals.
478 (get_tree_code_name): Robustify error case.
480 2020-07-14 Nathan Sidwell <nathan@acm.org>
482 * doc/gty.texi: Fic gt_cleare_cache name.
483 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
485 2020-07-14 Jakub Jelinek <jakub@redhat.com>
487 * omp-general.h (struct omp_for_data): Add adjn1 member.
488 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
489 count computing if n1, n2 or step are not INTEGER_CST earlier.
490 Narrow the outer iterator range if needed so that non-rect loop
491 has at least one iteration for each outer range iteration. Compute
493 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
494 instead of the outer loop's n1.
496 2020-07-14 Matthias Klose <doko@ubuntu.com>
499 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
500 error on different values for -fcf-protection.
501 (append_compiler_options): Pass -fcf-protection option.
502 (find_and_merge_options): Add decoded options as parameter,
503 pass decoded_options to merge_and_complain.
504 (run_gcc): Pass decoded options to find_and_merge_options.
505 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
507 2020-07-13 Alan Modra <amodra@gmail.com>
509 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
511 (sibcall_value_local): Similarly.
513 2020-07-13 Nathan Sidwell <nathan@acm.org>
515 * Makefile.in (distclean): Remove long gone cxxmain.c
517 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
520 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
521 length to cmpstrnqi patterns.
523 2020-07-13 Jakub Jelinek <jakub@redhat.com>
526 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
529 2020-07-13 Richard Biener <rguenther@suse.de>
531 PR tree-optimization/96163
532 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
533 at least after region begin.
535 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
537 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
538 __ARM_FEATURE_PAC_DEFAULT support.
540 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
543 * doc/extend.texi: Update the text for __builtin_return_address.
545 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
548 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
549 Disable return address signing if __builtin_eh_return is used.
551 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
555 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
556 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
557 (aarch64_return_addr): Use aarch64_return_addr_rtx.
558 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
560 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
563 * tree.h (virtual_method_call_p): Add a default-false parameter
564 that indicates whether the function is being called from dump
566 (obj_type_ref_class): Likewise.
567 * tree.c (virtual_method_call_p): Likewise.
568 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
569 type information for the type when the parameter is false.
570 * tree-pretty-print.c (dump_generic_node): Update calls to
571 virtual_method_call_p and obj_type_ref_class accordingly.
573 2020-07-13 Julian Brown <julian@codesourcery.com>
574 Thomas Schwinge <thomas@codesourcery.com>
576 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
577 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
578 directives (see also PR92929).
580 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
582 * convert.c (convert_to_integer_1): Narrow integer operations
583 even on targets that require explicit truncation instructions.
585 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
588 * config/cris/cris-passes.def: New file.
589 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
590 * config/cris/cris.c: Add infrastructure bits and pass execute
591 function cris_postdbr_cmpelim.
592 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
594 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
596 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
598 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
601 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
602 ("*addi_b_<mode>"): New pattern.
603 ("*addsi3<setnz>"): Remove stale %-related comment.
605 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
607 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
608 Use match_dup in output template, not match_operand.
610 2020-07-13 Richard Biener <rguenther@suse.de>
612 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
613 (vt_find_locations): Eliminate visited bitmap in favor of
614 RPO order check. Dump statistics about the number of
615 local BB dataflow computes.
617 2020-07-13 Richard Biener <rguenther@suse.de>
620 * expr.c (expand_constructor): Make a temporary also if we're
621 storing to volatile memory.
623 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
625 * config/rs6000/rs6000.md (rotl_unspec): New
626 define_insn_and_split.
628 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
630 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
631 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
633 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
635 * internal-fn.c (expand_mul_overflow): When checking for signed
636 overflow from a widening multiplication, we access the truncated
637 lowpart RES twice, so keep this value in a pseudo register.
639 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
641 PR tree-optimization/96146
642 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
643 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
644 involving POLY_INT_CSTs.
646 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
649 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
650 create named section for VAR_DECL or FUNCTION_DECL.
652 2020-07-10 Joseph Myers <joseph@codesourcery.com>
654 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
657 2020-07-10 Alexander Popov <alex.popov@linux.com>
659 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
661 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
664 * expr.c (expand_expr_real_2): When reducing bit fields,
665 clear the target if it has a different mode from the expression.
666 (reduce_to_bit_field_precision): Don't do that here. Instead
667 assert that the target already has the correct mode.
669 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
673 * config/arm/arm.c (arm_attribute_table): Add
674 "Advanced SIMD type".
675 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
676 attributes are equal.
677 * config/arm/arm-builtins.c: Include stringpool.h and
679 (arm_mangle_builtin_vector_type): Use the mangling recorded
680 in the "Advanced SIMD type" attribute.
681 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
682 attribute to each Advanced SIMD type, using the mangled type
683 as the attribute's single argument.
685 2020-07-10 Carl Love <cel@us.ibm.com>
687 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
688 (VSX_MM4): New define_mode_iterator.
689 (vec_mtvsrbmi): New define_insn.
690 (vec_mtvsr_<mode>): New define_insn.
691 (vec_cntmb_<mode>): New define_insn.
692 (vec_extract_<mode>): New define_insn.
693 (vec_expand_<mode>): New define_insn.
694 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
695 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
696 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
697 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
699 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
700 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
701 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
702 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
703 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
704 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
705 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
706 (BU_P10_OVERLOAD_2): Add defition for cntm.
707 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
708 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
709 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
710 (altivec_overloaded_builtins): Add overloaded argument entries for
711 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
712 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
713 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
714 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
715 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
716 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
717 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
718 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
719 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
720 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
721 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
722 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
723 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
724 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
725 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
726 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
727 P10_BUILTIN_VEXPANDMQ.
728 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
729 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
732 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
735 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
736 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
737 v16qi_ftype_pcvoid with correct number of parameters.
739 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
742 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
743 TARGET_AVX512VL when enabling FMA.
745 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
746 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
747 Iain Apreotesei <iain.apreotesei@arm.com>
749 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
751 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
752 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
753 (arm_target_insn_ok_for_lob): New function.
754 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
755 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
756 (dls_insn): Add new patterns.
757 (doloop_end): Modify to select LR when LOB is available.
758 * config/arm/unspecs.md: Add new unspec.
759 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
760 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
763 2020-07-10 Richard Biener <rguenther@suse.de>
765 PR tree-optimization/96133
766 * gimple-fold.c (fold_array_ctor_reference): Do not
767 recurse to folding a CTOR that does not fully cover the
770 2020-07-10 Cui,Lili <lili.cui@intel.com>
772 * common/config/i386/cpuinfo.h
773 (get_intel_cpu): Handle sapphirerapids.
774 * common/config/i386/i386-common.c
775 (processor_names): Add sapphirerapids and alderlake.
776 (processor_alias_table): Add sapphirerapids and alderlake.
777 * common/config/i386/i386-cpuinfo.h
778 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
779 INTEL_COREI7_ALDERLAKE.
780 * config.gcc: Add -march=sapphirerapids and alderlake.
781 * config/i386/driver-i386.c
782 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
783 * config/i386/i386-c.c
784 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
785 * config/i386/i386-options.c
786 (m_SAPPHIRERAPIDS) : Define.
787 (m_ALDERLAKE): Ditto.
788 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
789 (processor_cost_table): Add sapphirerapids and alderlake.
790 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
791 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
793 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
794 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
797 (PTA_CLDEMOTE): Ditto.
798 (PTA_SERIALIZE): Ditto.
800 (PTA_SAPPHIRERAPIDS): Ditto.
801 (PTA_ALDERLAKE): Ditto.
802 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
804 * doc/extend.texi: Add sapphirerapids and alderlake.
805 * doc/invoke.texi: Add sapphirerapids and alderlake.
807 2020-07-10 Martin Liska <mliska@suse.cz>
809 * dumpfile.c [profile-report]: Add new profile dump.
810 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
811 * passes.c (pass_manager::dump_profile_report): Change stderr
814 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
816 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
817 is adjusted by considering peeled prologue for non
818 vect_use_loop_mask_for_alignment_p cases.
820 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
823 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
824 specific types __vector_quad and __vector_pair, and initialize the
825 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
826 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
827 Remove now unneeded mask variable.
828 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
829 OPTION_MASK_MMA flag for power10 if not already set.
831 2020-07-09 Richard Biener <rguenther@suse.de>
833 PR tree-optimization/96133
834 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
835 status between stmts.
837 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
840 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
841 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
842 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
843 (rsqrtv16sf2): Removed.
845 2020-07-09 Richard Biener <rguenther@suse.de>
847 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
848 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
849 (vect_slp_analyze_instance_alignment): ... this.
850 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
851 (vect_verify_datarefs_alignment): Likewise.
852 (vect_enhance_data_refs_alignment): Do not call
853 vect_verify_datarefs_alignment.
854 (vect_slp_analyze_node_alignment): Rename from
855 vect_slp_analyze_and_verify_node_alignment and do not
856 call verify_data_ref_alignment.
857 (vect_slp_analyze_instance_alignment): Rename from
858 vect_slp_analyze_and_verify_instance_alignment.
859 * tree-vect-stmts.c (vectorizable_store): Dump when
860 we vectorize an unaligned access.
861 (vectorizable_load): Likewise.
862 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
863 vect_verify_datarefs_alignment.
864 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
866 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
868 PR tree-optimization/95804
869 * tree-loop-distribution.c (break_alias_scc_partitions): Force
870 negative post order to reduction partition.
872 2020-07-09 Jakub Jelinek <jakub@redhat.com>
874 * omp-general.h (struct omp_for_data): Add min_inner_iterations
876 * omp-general.c (omp_extract_for_data): Initialize them and remember
877 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
878 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
879 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
880 (expand_omp_for_init_vars): For
881 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
882 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
883 using fallback method when possible.
885 2020-07-09 Omar Tahir <omar.tahir@arm.com>
887 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
888 last_moveable_pseudo before returning.
890 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
892 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
893 __ARM_FEATURE_BTI_DEFAULT support.
895 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
897 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
899 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
900 stub registers class.
901 (aarch64_class_max_nregs): Likewise.
902 (aarch64_register_move_cost): Likewise.
903 (aarch64_sls_shared_thunks): Global array to store stub labels.
904 (aarch64_sls_emit_function_stub): New.
905 (aarch64_create_blr_label): New.
906 (aarch64_sls_emit_blr_function_thunks): New.
907 (aarch64_sls_emit_shared_blr_thunks): New.
908 (aarch64_asm_file_end): New.
909 (aarch64_indirect_call_asm): New.
910 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
911 (TARGET_ASM_FUNCTION_EPILOGUE): Use
912 aarch64_sls_emit_blr_function_thunks.
913 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
914 (enum reg_class): Add STUB_REGS class.
915 (machine_function): Introduce `call_via` array for
916 function-local stub labels.
917 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
918 aarch64_indirect_call_asm to emit code when hardening BLR
920 * config/aarch64/constraints.md (Ucr): New constraint
921 representing registers for indirect calls. Is GENERAL_REGS
922 usually, and STUB_REGS when hardening BLR instruction against
924 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
925 is also a general register.
927 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
929 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
930 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
931 speculation barrier after BR instruction if needs be.
932 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
934 (aarch64_sls_barrier): New.
935 (aarch64_asm_trampoline_template): Add needed barriers.
936 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
938 (TRAMPOLINE_SIZE): Account for barrier.
939 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
940 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
941 Emit barrier if needs be, also account for possible barrier using
942 "sls_length" attribute.
943 (sls_length): New attribute.
944 (length): Determine default using any non-default sls_length
947 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
949 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
951 (aarch64_harden_sls_blr_p): New.
952 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
954 (aarch64_harden_sls_retbr_p): New.
955 (aarch64_harden_sls_blr_p): New.
956 (aarch64_validate_sls_mitigation): New.
957 (aarch64_override_options): Parse options for SLS mitigation.
958 * config/aarch64/aarch64.opt (-mharden-sls): New option.
959 * doc/invoke.texi: Document new option.
961 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
963 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
964 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
965 or nested-cycle reduction.
967 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
969 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
970 for fully masking to be more common.
972 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
974 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
976 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
977 Document __builtin_thread_pointer.
979 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
981 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
982 Abort if any arguments on stack.
984 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
986 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
987 either type has reverse scalar storage order.
988 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
989 a memory copy if either type has reverse scalar storage order.
991 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
993 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
994 on to the native compiler, if used.
995 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
997 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
999 * config/rs6000/altivec.h (vec_vmsumudm): New define.
1000 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
1001 (altivec_vmsumudm): New define_insn.
1002 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
1003 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
1004 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
1005 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
1006 * doc/extend.texi: Add document for vmsumudm behind vmsum.
1008 2020-07-08 Richard Biener <rguenther@suse.de>
1010 * tree-vect-stmts.c (get_group_load_store_type): Pass
1011 in the SLP node and the alignment support scheme output.
1013 (get_load_store_type): Likewise.
1014 (vectorizable_store): Adjust.
1015 (vectorizable_load): Likewise.
1017 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
1020 * expr.c (expand_expr_real_2): Get the mode from the type rather
1021 than the rtx, and assert that it is consistent with the mode of
1022 the rtx (where known). Optimize all constant integers, not just
1023 those that can be represented in poly_int64.
1025 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
1027 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
1028 (len_store_v16qi): Likewise.
1030 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
1032 * doc/md.texi (len_load_@var{m}): Document.
1033 (len_store_@var{m}): Likewise.
1034 * internal-fn.c (len_load_direct): New macro.
1035 (len_store_direct): Likewise.
1036 (expand_len_load_optab_fn): Likewise.
1037 (expand_len_store_optab_fn): Likewise.
1038 (direct_len_load_optab_supported_p): Likewise.
1039 (direct_len_store_optab_supported_p): Likewise.
1040 (expand_mask_load_optab_fn): New macro. Original renamed to ...
1041 (expand_partial_load_optab_fn): ... here. Add handlings for
1043 (expand_mask_store_optab_fn): New macro. Original renamed to ...
1044 (expand_partial_store_optab_fn): ... here. Add handlings for
1046 (internal_load_fn_p): Handle IFN_LEN_LOAD.
1047 (internal_store_fn_p): Handle IFN_LEN_STORE.
1048 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
1049 * internal-fn.def (LEN_LOAD): New internal function.
1050 (LEN_STORE): Likewise.
1051 * optabs.def (len_load_optab, len_store_optab): New optab.
1053 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
1055 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
1056 thunderx2t99_vector_cost): Likewise.
1058 2020-07-07 Richard Biener <rguenther@suse.de>
1060 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
1061 group overlap condition to allow negative step DR groups.
1062 * tree-vect-stmts.c (get_group_load_store_type): For
1063 multi element SLP groups force VMAT_STRIDED_SLP when the step
1066 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
1068 * doc/generic.texi: Fix typo.
1070 2020-07-07 Richard Biener <rguenther@suse.de>
1072 * lto-streamer-out.c (cmp_symbol_files): Use the computed
1073 order map to sort symbols from the same sub-file together.
1074 (lto_output): Compute a map of sub-file to an order number
1075 it appears in the symbol output array.
1077 2020-07-06 Richard Biener <rguenther@suse.de>
1079 PR tree-optimization/96075
1080 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
1081 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
1082 for the misalignment calculation for negative step.
1084 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
1086 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
1087 (*vsub_addsi4): New instruction.
1089 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
1091 * config/cris/cris.md (movulsr): New peephole2.
1093 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
1095 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
1096 Correct gcc_assert of overlapping operands.
1098 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
1100 * config/cris/cris.c (cris_select_cc_mode): Always return
1101 CC_NZmode for matching comparisons. Clarify comments.
1102 * config/cris/cris-modes.def: Clarify mode comment.
1103 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
1105 (addsub, addsubbo, nd): New code iterator attributes.
1106 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
1107 iterator constructs instead of match_operator constructs.
1108 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
1109 "*extop<mode>si<setnz>".
1110 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
1111 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
1112 "*extop<mode>si<setnz>_swap".
1114 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
1116 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
1117 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
1119 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
1121 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
1122 were initially created for the assignment of a variable-sized
1123 object and whose source is now a string constant.
1124 * gimple-ssa-store-merging.c (struct merged_store_group): Document
1125 STRING_CST for rhs_code field.
1126 Add string_concatenation boolean field.
1127 (merged_store_group::merged_store_group): Initialize it as well as
1129 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
1130 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
1131 (merged_store_group::apply_stores): Clear it for small regions.
1132 Do not create a power-of-2-sized buffer if it is still true.
1133 And do not set bit_insertion here again.
1134 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
1135 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
1136 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
1137 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
1138 (count_multiple_uses): Return 0 for STRING_CST.
1139 (split_group): Do not split the group for a string concatenation.
1140 (imm_store_chain_info::output_merged_store): Constify and rename
1141 some local variables. Build an array type as destination type
1142 for a string concatenation, as well as a zero mask, and call
1143 build_string to build the source.
1144 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
1145 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
1146 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
1147 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
1148 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
1150 2020-07-03 Martin Jambor <mjambor@suse.cz>
1153 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
1154 mismatched accesses.
1156 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
1158 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
1159 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
1161 2020-07-03 Martin Liska <mliska@suse.cz>
1162 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1165 * gcov-dump.c (tag_function): Use gcov_position_t
1168 2020-07-03 Richard Biener <rguenther@suse.de>
1170 PR tree-optimization/96037
1171 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
1173 2020-07-03 Richard Biener <rguenther@suse.de>
1175 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
1176 original non-pattern stmts, look at the pattern stmt
1177 vectorization status.
1179 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
1181 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
1183 2020-07-03 Richard Biener <rguenther@suse.de>
1185 * tree-vectorizer.h (vec_info::insert_on_entry): New.
1186 (vec_info::insert_seq_on_entry): Likewise.
1187 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
1188 (vec_info::insert_seq_on_entry): Likewise.
1189 * tree-vect-stmts.c (vect_init_vector_1): Use
1190 vec_info::insert_on_entry.
1191 (vect_finish_stmt_generation): Set modified bit after
1193 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
1194 by using vec_info::insert_seq_on_entry and bypassing
1196 (vect_schedule_slp_instance): Deal with all-constant
1199 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
1200 Tom de Vries <tdevries@suse.de>
1203 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
1204 to access TYPE_SIZE (type). Return at least the mode's alignment.
1206 2020-07-02 Richard Biener <rguenther@suse.de>
1208 PR tree-optimization/96028
1209 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
1210 we have scalar stmts to use.
1211 (vect_slp_analyze_node_operations): When analyzing a child
1212 failed try externalizing the parent node.
1214 2020-07-02 Martin Jambor <mjambor@suse.cz>
1217 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
1218 argument index if necessary.
1220 2020-07-02 Martin Liska <mliska@suse.cz>
1223 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
1224 (expand_vector_comparison): Do not expand a comparison if all
1225 uses are consumed by a VEC_COND_EXPR.
1226 (expand_vector_operation): Change void return type to bool.
1227 (expand_vector_operations_1): Pass dce_ssa_names.
1229 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
1232 * system.h (NULL): Redefine to nullptr.
1234 2020-07-02 Jakub Jelinek <jakub@redhat.com>
1236 PR tree-optimization/95857
1237 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
1238 base_bb, remember all forced and non-local labels on it and later
1239 treat those as if they have NULL label_to_block. Formatting fix.
1242 2020-07-02 Richard Biener <rguenther@suse.de>
1244 PR tree-optimization/96022
1245 * tree-vect-stmts.c (vectorizable_shift): Only use the
1246 first vector stmt when extracting the scalar shift amount.
1247 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
1248 nodes with all-scalar children from scalars but not stores.
1249 (vect_analyze_slp_instance): Mark the node not failed.
1251 2020-07-02 Felix Yang <felix.yang@huawei.com>
1253 PR tree-optimization/95961
1254 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
1255 number of scalars instead of the number of vectors as an upper bound
1256 for the loop saving info about DR in the hash table. Remove unused
1259 2020-07-02 Jakub Jelinek <jakub@redhat.com>
1261 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
1262 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
1263 OpenMP non-rectangular loops. Use XALLOCAVEC.
1265 2020-07-02 Martin Liska <mliska@suse.cz>
1267 PR gcov-profile/95348
1268 * coverage.c (read_counts_file): Read only COUNTERS that are
1270 * gcov-dump.c (tag_function): Change signature from unsigned to
1272 (tag_blocks): Likewise.
1273 (tag_arcs): Likewise.
1274 (tag_lines): Likewise.
1275 (tag_counters): Likewise.
1276 (tag_summary): Likewise.
1277 * gcov.c (read_count_file): Read all non-zero counters
1280 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
1282 * config/riscv/multilib-generator (arch_canonicalize): Handle
1283 multi-letter extension.
1284 Using underline as separator between different extensions.
1286 2020-07-01 Pip Cet <pipcet@gmail.com>
1288 * spellcheck.c (test_data): Add problematic strings.
1289 (test_metric_conditions): Don't test the triangle inequality
1290 condition, which our distance function does not satisfy.
1292 2020-07-01 Omar Tahir <omar.tahir@arm.com>
1294 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
1295 generate a BTI instruction.
1297 2020-07-01 Jeff Law <law@redhat.com>
1299 PR tree-optimization/94882
1300 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
1302 2020-07-01 Jeff Law <law@redhat.com>
1304 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
1305 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
1307 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
1309 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
1310 for 64bits fpsr/fpcr getter setters builtin variants.
1311 (aarch64_init_fpsr_fpcr_builtins): New function.
1312 (aarch64_general_init_builtins): Modify to make use of the later.
1313 (aarch64_expand_fpsr_fpcr_setter): New function.
1314 (aarch64_general_expand_builtin): Modify to make use of the later.
1315 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
1316 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
1317 generalizing 'get_fpcr', 'set_fpsr'.
1318 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
1320 (fpscr_name): New int attribute.
1321 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
1322 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
1323 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
1326 2020-07-01 Martin Liska <mliska@suse.cz>
1328 * gcov.c (print_usage): Avoid trailing space for -j option.
1330 2020-07-01 Richard Biener <rguenther@suse.de>
1332 PR tree-optimization/95839
1333 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
1334 vectors are not uniform.
1335 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
1337 (vect_build_slp_tree_2): For groups of lane extracts
1338 from a vector register generate a permute node
1339 with a special child representing the pre-existing vector.
1340 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
1341 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
1342 (vectorizable_slp_permutation): Do not generate or cost identity
1344 (vect_schedule_slp_instance): Handle pre-existing vector
1345 that are function arguments.
1347 2020-07-01 Richard Biener <rguenther@suse.de>
1349 * system.h (INCLUDE_ISL): New guarded include.
1350 * graphite-dependences.c: Use it.
1351 * graphite-isl-ast-to-gimple.c: Likewise.
1352 * graphite-optimize-isl.c: Likewise.
1353 * graphite-poly.c: Likewise.
1354 * graphite-scop-detection.c: Likewise.
1355 * graphite-sese-to-poly.c: Likewise.
1356 * graphite.c: Likewise.
1357 * graphite.h: Drop the includes here.
1359 2020-07-01 Martin Liska <mliska@suse.cz>
1361 * gcov.c (print_usage): Shorted option description for -j
1364 2020-07-01 Martin Liska <mliska@suse.cz>
1366 * doc/gcov.texi: Rename 2 options.
1367 * gcov.c (print_usage): Rename -i,--json-format to
1368 -j,--json-format and -j,--human-readable to -H,--human-readable.
1369 (process_args): Fix up parsing. Document obsolete options and
1370 how are they changed.
1372 2020-07-01 Jeff Law <law@redhat.com>
1374 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
1375 (pa_output_ascii): Likewise.
1377 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
1379 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
1381 (riscv_subset_list::parsing_subset_version): Add parameter for
1382 indicate explicitly version, and handle explicitly version.
1383 (riscv_subset_list::handle_implied_ext): Ditto.
1384 (riscv_subset_list::add): Ditto.
1385 (riscv_subset_t::riscv_subset_t): Init new field.
1386 (riscv_subset_list::to_string): Always output version info if version
1387 explicitly specified.
1388 (riscv_subset_list::parsing_subset_version): Handle explicitly
1390 (riscv_subset_list::parse_std_ext): Ditto.
1391 (riscv_subset_list::parse_multiletter_ext): Ditto.
1393 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
1397 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
1398 "Advanced SIMD type".
1399 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
1400 attributes are equal.
1401 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
1403 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
1404 in the "Advanced SIMD type" attribute.
1405 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
1406 attribute to each Advanced SIMD type, using the mangled type
1407 as the attribute's single argument.
1409 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
1412 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
1413 -mgeneral-regs-only is not used.
1415 2020-06-30 Yang Yang <yangyang305@huawei.com>
1417 PR tree-optimization/95855
1418 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
1419 checks to recognize a missed if-conversion opportunity when
1420 judging whether to duplicate a block.
1422 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
1424 * doc/extend.texi: Change references to "future architecture" to
1425 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
1426 references to "future" (because the future is now).
1428 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
1430 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
1432 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
1434 * simplify-rtx.c (simplify_distributive_operation): New function
1435 to un-distribute a binary operation of two binary operations.
1436 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
1437 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
1439 (test_scalar_int_ops): New function for unit self-testing
1440 scalar integer transformations in simplify-rtx.c.
1441 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
1442 (simplify_rtx_c_tests): Call test_scalar_ops.
1444 2020-06-29 Richard Biener <rguenther@suse.de>
1446 PR tree-optimization/95916
1447 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
1448 the case of not vectorized externals.
1450 2020-06-29 Richard Biener <rguenther@suse.de>
1452 * tree-vectorizer.h: Do not include <utility>.
1454 2020-06-29 Martin Liska <mliska@suse.cz>
1456 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
1457 instead of gimple_stmt_iterator::bb.
1458 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
1459 * tree-vectorizer.h: Likewise.
1461 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
1463 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
1464 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
1465 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
1466 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
1467 (gcn_dwarf_register_number): New function.
1468 (gcn_dwarf_register_span): New function.
1469 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
1471 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
1473 PR tree-optimization/95854
1474 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
1475 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
1476 unsigned HOST_WIDE_INT.
1478 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1480 * config/sparc/sparc.c (epilogue_renumber): Remove register.
1481 (sparc_print_operand_address): Likewise.
1482 (sparc_type_code): Likewise.
1483 (set_extends): Likewise.
1485 2020-06-29 Martin Liska <mliska@suse.cz>
1487 PR tree-optimization/92860
1488 * optc-save-gen.awk: Add exceptions for arc target.
1490 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
1492 * doc/sourcebuild.texi: Describe globbing of the
1493 dump file scanning commands "suffix" argument.
1495 2020-06-28 Martin Sebor <msebor@redhat.com>
1498 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
1500 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
1502 * tree.c (get_nonnull_args): Consider the this pointer implicitly
1504 * var-tracking.c (deps_vec): New type.
1505 (var_loc_dep_vec): New function.
1506 (VAR_LOC_DEP_VEC): Use it.
1508 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
1510 * internal-fn.c (direct_mask_load_optab_supported_p): Use
1511 convert_optab_supported_p instead of direct_optab_supported_p.
1512 (direct_mask_store_optab_supported_p): Likewise.
1514 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
1516 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
1517 simplify_using_ranges class.
1518 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
1519 field. Adjust all methods to use new field.
1520 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
1521 simplify_using_ranges class.
1522 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
1523 field. Adjust all methods to use new field.
1524 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
1525 (vrp_prop::vrp_finalize): New vrp_folder argument.
1526 (execute_vrp): Pass folder to vrp_finalize. Use
1527 simplify_using_ranges class.
1528 Remove cleanup_edges_and_switches call.
1529 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
1530 value_range_equiv uses to value_range.
1531 (simplify_using_ranges::op_with_boolean_value_range_p): Use
1532 simplify_using_ranges class.
1533 (check_for_binary_op_overflow): Make static.
1534 (vr_values::extract_range_basic): Pass this to
1535 check_for_binary_op_overflow.
1536 (compare_range_with_value): Change value_range_equiv uses to
1538 (vr_values::vr_values): Initialize simplifier field.
1539 Remove uses of to_remove_edges and to_update_switch_stmts.
1540 (vr_values::~vr_values): Remove uses of to_remove_edges and
1541 to_update_switch_stmts.
1542 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
1544 (vr_values::compare_name_with_value): Same.
1545 (vr_values::compare_names): Same.
1546 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
1547 (vr_values::vrp_evaluate_conditional): Same.
1548 (vr_values::vrp_visit_cond_stmt): Same.
1549 (find_case_label_ranges): Change value_range_equiv uses to
1551 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
1552 (vr_values::simplify_truth_ops_using_ranges): Move to
1553 simplify_using_ranges class.
1554 (vr_values::simplify_div_or_mod_using_ranges): Same.
1555 (vr_values::simplify_min_or_max_using_ranges): Same.
1556 (vr_values::simplify_abs_using_ranges): Same.
1557 (vr_values::simplify_bit_ops_using_ranges): Same.
1558 (test_for_singularity): Change value_range_equiv uses to
1560 (range_fits_type_p): Same.
1561 (vr_values::simplify_cond_using_ranges_1): Same.
1562 (vr_values::simplify_cond_using_ranges_2): Make extern.
1563 (vr_values::fold_cond): Move to simplify_using_ranges class.
1564 (vr_values::simplify_switch_using_ranges): Same.
1565 (vr_values::cleanup_edges_and_switches): Same.
1566 (vr_values::simplify_float_conversion_using_ranges): Same.
1567 (vr_values::simplify_internal_call_using_ranges): Same.
1568 (vr_values::two_valued_val_range_p): Same.
1569 (vr_values::simplify_stmt_using_ranges): Move to...
1570 (simplify_using_ranges::simplify): ...here.
1571 * vr-values.h (class vr_values): Move all the simplification of
1572 statements using ranges methods and code from here...
1573 (class simplify_using_ranges): ...to here.
1574 (simplify_cond_using_ranges_2): New extern prototype.
1576 2020-06-27 Jakub Jelinek <jakub@redhat.com>
1578 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
1579 member, move outer member.
1580 (struct omp_for_data): Add first_nonrect and last_nonrect members.
1581 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
1582 last_nonrect and non_rect_referenced members.
1583 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
1585 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
1586 non-rectangular loops.
1587 (extract_omp_for_update_vars): Likewise.
1588 (expand_omp_for_generic, expand_omp_for_static_nochunk,
1589 expand_omp_for_static_chunk, expand_omp_simd,
1590 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
1591 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
1592 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
1595 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
1598 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
1600 * config/i386/i386.c (ix86_frame_pointer_required): Update
1603 2020-06-26 Yichao Yu <yyc1992@gmail.com>
1605 * multiple_target.c (redirect_to_specific_clone): Fix tests
1606 to check individual attribute rather than an attribute list.
1608 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
1610 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
1611 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
1614 2020-06-26 Marek Polacek <polacek@redhat.com>
1616 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
1617 * doc/standards.texi (C Language): Correct the default dialect.
1618 (C++ Language): Update the default for C++ to gnu++17.
1620 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
1622 * tree-ssa-reassoc.c (dump_range_entry): New function.
1623 (debug_range_entry): New debug function.
1624 (update_range_test): Invoke dump_range_entry for dumping.
1625 (optimize_range_tests_to_bit_test): Merge the entry test in the
1626 bit test when possible and lower the profitability threshold.
1628 2020-06-26 Richard Biener <rguenther@suse.de>
1630 PR tree-optimization/95897
1631 * tree-vectorizer.h (vectorizable_induction): Remove
1632 unused gimple_stmt_iterator * parameter.
1633 * tree-vect-loop.c (vectorizable_induction): Likewise.
1634 (vect_analyze_loop_operations): Adjust.
1635 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
1636 (vect_transform_stmt): Likewise.
1637 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
1638 for fold-left reductions, clarify existing reduction case.
1640 2020-06-25 Nick Clifton <nickc@redhat.com>
1642 * config/m32r/m32r.md (movsicc): Disable pattern.
1644 2020-06-25 Richard Biener <rguenther@suse.de>
1646 PR tree-optimization/95839
1647 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
1648 check on the number of datarefs.
1650 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
1652 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
1653 the insn_data n_operands value to unsigned.
1655 2020-06-25 Richard Biener <rguenther@suse.de>
1657 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
1658 vector defs to determine insertion place.
1660 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
1663 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
1664 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
1665 (PTA_TIGERLAKE): Add PTA_CLWB.
1667 2020-06-25 Richard Biener <rguenther@suse.de>
1669 PR tree-optimization/95866
1670 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
1671 vectorized shift operands. For scalar shifts use lane zero
1672 of a vectorized shift operand.
1674 2020-06-25 Martin Liska <mliska@suse.cz>
1676 PR tree-optimization/95745
1678 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
1679 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
1681 * tree-vect-generic.c (expand_vector_condition): Remove dead
1682 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
1684 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
1687 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
1688 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
1689 (convert_4f32_8f16): New define_expand
1690 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
1692 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
1693 overloaded builtin entry.
1694 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
1695 (vsx_xvcvsphp): New define_insn.
1697 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
1698 Segher Boessenkool <segher@kernel.crashing.org>
1700 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
1702 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
1704 * simplify-rtx.c (simplify_unary_operation_1): Simplify
1705 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
1707 2020-06-24 Richard Biener <rguenther@suse.de>
1709 PR tree-optimization/95866
1710 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
1711 (vect_build_slp_tree_2): Properly reset matches[0],
1712 ignore uniform constants.
1714 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1717 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
1718 (cpu_indicator_init): Likewise.
1719 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
1721 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1724 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
1725 detection with AVX512BF16.
1727 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1730 * common/config/i386/i386-isas.h: New file. Extracted from
1731 gcc/config/i386/i386-builtins.c.
1732 (_isa_names_table): Add option.
1733 (ISA_NAMES_TABLE_START): New.
1734 (ISA_NAMES_TABLE_END): Likewise.
1735 (ISA_NAMES_TABLE_ENTRY): Likewise.
1736 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
1737 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
1738 from enum processor_features.
1739 * config/i386/driver-i386.c: Include
1740 "common/config/i386/cpuinfo.h" and
1741 "common/config/i386/i386-isas.h".
1742 (has_feature): New macro.
1743 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
1744 features. Use has_feature to detect processor features. Call
1745 Call get_intel_cpu to get the newer Intel CPU name. Use
1746 isa_names_table to generate command-line options.
1747 * config/i386/i386-builtins.c: Include
1748 "common/config/i386/i386-isas.h".
1749 (_arch_names_table): Removed.
1750 (isa_names_table): Likewise.
1752 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1755 * common/config/i386/cpuinfo.h: New file.
1756 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
1757 (__processor_model2): New.
1758 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
1759 (has_cpu_feature): New function.
1760 (set_cpu_feature): Likewise.
1761 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
1762 CHECK___builtin_cpu_is. Return AMD CPU name.
1763 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
1764 Use CHECK___builtin_cpu_is. Return Intel CPU name.
1765 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
1766 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
1767 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
1768 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
1769 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
1770 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
1771 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
1772 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
1773 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
1774 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
1775 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
1776 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
1777 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
1778 FEATURE_XSAVEOPT and FEATURE_XSAVES
1779 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
1780 Also update cpu_model2.
1781 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
1782 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
1783 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
1784 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
1785 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
1786 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
1787 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
1788 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
1789 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
1790 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
1791 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
1792 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
1793 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
1794 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
1795 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
1796 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
1797 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
1798 (SIZE_OF_CPU_FEATURES): New.
1799 * config/i386/i386-builtins.c (processor_features): Removed.
1800 (isa_names_table): Replace F_XXX with FEATURE_XXX.
1801 (fold_builtin_cpu): Change __cpu_features2 to an array.
1803 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1806 * common/config/i386/i386-common.c (processor_alias_table): Add
1807 processor model and priority to each entry.
1808 (pta_size): Updated with -6.
1809 (num_arch_names): New.
1810 * common/config/i386/i386-cpuinfo.h: New file.
1811 * config/i386/i386-builtins.c (feature_priority): Removed.
1812 (processor_model): Likewise.
1813 (_arch_names_table): Likewise.
1814 (arch_names_table): Likewise.
1815 (_isa_names_table): Replace P_ZERO with P_NONE.
1816 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
1817 processor_alias_table.
1818 (fold_builtin_cpu): Replace arch_names_table with
1819 processor_alias_table.
1820 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
1821 (pta): Add model and priority.
1822 (num_arch_names): New.
1824 2020-06-24 Richard Biener <rguenther@suse.de>
1826 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
1828 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
1829 Simplify for new position of vectorized SLP loads.
1830 (vect_slp_analyze_node_dependences): Adjust for it.
1831 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
1832 for the first stmts dataref.
1833 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
1834 (vect_schedule_slp_instance): Emit loads before the
1836 * tree-vect-stmts.c (vectorizable_load): Do what the comment
1837 says and use vect_find_first_scalar_stmt_in_slp.
1839 2020-06-24 Richard Biener <rguenther@suse.de>
1841 PR tree-optimization/95856
1842 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
1845 2020-06-24 Jakub Jelinek <jakub@redhat.com>
1848 * fold-const.c (fold_cond_expr_with_comparison): Optimize
1849 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
1851 2020-06-24 Jakub Jelinek <jakub@redhat.com>
1853 * omp-low.c (lower_omp_for): Fix two pastos.
1855 2020-06-24 Martin Liska <mliska@suse.cz>
1857 * optc-save-gen.awk: Compare string options in cl_optimization_compare
1860 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
1862 * config.gcc: Identify power10 as a 64-bit processor and as valid
1863 for --with-cpu and --with-tune.
1865 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
1867 * Makefile.in (LANG_MAKEFRAGS): Same.
1868 (tmake_file): Use -include.
1871 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
1873 * REVISION: Delete file meant for a private branch.
1875 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
1878 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
1879 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
1881 2020-06-23 Alexandre Oliva <oliva@adacore.com>
1883 * collect-utils.h (dumppfx): New.
1884 * collect-utils.c (dumppfx): Likewise.
1885 * lto-wrapper.c (run_gcc): Set global dumppfx.
1886 (compile_offload_image): Pass a -dumpbase on to mkoffload.
1887 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
1888 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
1890 (compile_native): Pass -dumpbase et al to compiler.
1891 * config/gcn/mkoffload.c (gcn_dumpbase): New.
1892 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
1893 save_temps. Pass -dumpbase et al to offload target compiler.
1894 (compile_native): Pass -dumpbase et al to compiler.
1896 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
1898 * REVISION: New file.
1900 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
1902 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
1903 Update comment for ISA 3.1.
1904 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
1905 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
1906 on AIX, and -mpower10 elsewhere.
1907 * config/rs6000/future.md: Delete.
1908 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
1910 * config/rs6000/power10.md: New file.
1911 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
1912 PPC_PLATFORM_FUTURE.
1913 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
1914 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
1915 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
1916 Use BU_P10_* instead of BU_FUTURE_*.
1917 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
1918 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
1919 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
1920 FUTURE_BUILTIN_VEC_XXEVAL.
1921 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
1922 Update compiler messages.
1923 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
1924 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
1925 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
1927 * config/rs6000/rs6000-string.c: Ditto.
1928 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
1929 instead of "future", reorder it to right after "power9".
1930 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
1931 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
1932 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
1933 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
1934 not ISA_FUTURE_MASKS_SERVER.
1935 (rs6000_opt_masks): Use "power10" instead of "future".
1936 (rs6000_builtin_mask_names): Ditto.
1937 (rs6000_disable_incompatible_switches): Ditto.
1938 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
1939 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
1940 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
1941 not RS6000_BTM_FUTURE.
1942 * config/rs6000/rs6000.md: Use "power10", not "future". Use
1943 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
1945 * config/rs6000/rs6000.opt (mfuture): Delete.
1947 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
1948 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
1950 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
1952 * coretypes.h (first_type): Delete.
1953 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
1955 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1957 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
1958 (arm_mve_hw): Likewise.
1960 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
1963 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
1966 2020-06-22 Richard Biener <rguenther@suse.de>
1968 PR tree-optimization/95770
1969 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
1972 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
1974 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
1975 (gcn_return_in_memory): Return vectors in memory.
1977 2020-06-22 Jakub Jelinek <jakub@redhat.com>
1979 * omp-general.c (omp_extract_for_data): For triangular loops with
1980 all loop invariant expressions constant where the innermost loop is
1981 executed at least once compute number of iterations at compile time.
1983 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
1985 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
1986 (DRIVER_SELF_SPECS): New.
1988 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
1990 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
1991 (RISCV_FTYPE_ATYPES0): New.
1992 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
1993 * config/riscv/riscv-ftypes.def: Remove VOID argument.
1995 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
1997 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
1998 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
2001 (ASM_CPU_SPEC): Remove vsx and altivec options.
2002 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
2005 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
2006 (TARGET_DEFAULT): Only define if not BIARCH.
2007 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
2010 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
2013 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
2014 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
2016 (CPLUSPLUS_CPP_SPEC): Same.
2019 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
2020 * config/rs6000/defaultaix64.h: New file.
2021 * config/rs6000/t-aix64: New file.
2023 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
2025 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
2026 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
2027 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
2029 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
2030 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
2031 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
2032 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
2033 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
2034 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
2035 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
2036 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
2037 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
2038 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
2039 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
2040 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
2041 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
2042 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
2043 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
2044 Allow zero constants.
2045 (print_operand) <case 'A'>: New output modifier.
2046 (rs6000_split_multireg_move): Add support for inserting accumulator
2047 priming and depriming instructions. Add support for splitting an
2048 assemble accumulator pattern.
2049 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
2050 rs6000_gimple_fold_mma_builtin): New functions.
2051 (RS6000_BUILTIN_M): New macro.
2052 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
2053 (bdesc_mma): Add new MMA built-in support.
2054 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
2055 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
2057 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
2058 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
2059 and rs6000_gimple_fold_mma_builtin.
2060 (rs6000_expand_builtin): Call mma_expand_builtin.
2061 Use RS6000_BTC_OPND_MASK.
2062 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
2063 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
2064 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
2065 VSX_BUILTIN_XVCVBF16SP.
2066 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
2067 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
2068 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
2069 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
2070 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
2071 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
2072 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
2073 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
2074 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
2075 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
2076 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
2077 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
2078 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
2079 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
2080 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
2081 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
2082 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
2083 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
2084 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
2085 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
2086 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
2087 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
2088 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
2089 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
2090 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
2091 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
2092 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
2093 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
2094 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
2095 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
2096 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
2097 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
2098 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
2099 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
2100 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
2101 MMA_AVVI4I4I4): New define_int_iterator.
2102 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
2103 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
2104 avvi4i4i4): New define_int_attr.
2105 (*movpxi): Add zero constant alternative.
2106 (mma_assemble_pair, mma_assemble_acc): New define_expand.
2107 (*mma_assemble_acc): New define_insn_and_split.
2108 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
2109 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
2110 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
2111 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
2112 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
2113 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
2114 (UNSPEC_VSX_XVCVSPBF16): Likewise.
2115 (XVCVBF16): New define_int_iterator.
2116 (xvcvbf16): New define_int_attr.
2117 (vsx_<xvcvbf16>): New define_insn.
2118 * doc/extend.texi: Document the mma built-ins.
2120 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
2121 Michael Meissner <meissner@linux.ibm.com>
2123 * config/rs6000/mma.md: New file.
2124 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
2126 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
2127 for __vector_pair and __vector_quad types.
2128 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
2130 (POWERPC_MASKS): Likewise.
2131 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
2132 (POI, PXI): New partial integer modes.
2133 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
2134 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
2135 (rs6000_hard_regno_mode_ok_uncached): Likewise.
2136 Add support for POImode being allowed in VSX registers and PXImode
2137 being allowed in FP registers.
2138 (rs6000_modes_tieable_p): Adjust comment.
2139 Add support for POImode and PXImode.
2140 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
2141 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
2142 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
2143 Set up appropriate addr_masks for vector pair and vector quad addresses.
2144 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
2145 vector quad registers. Setup reload handlers for POImode and PXImode.
2146 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
2147 (rs6000_option_override_internal): Error if -mmma is specified
2148 without -mcpu=future.
2149 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
2150 (quad_address_p): Change size test to less than 16 bytes.
2151 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
2152 and vector quad instructions.
2153 (avoiding_indexed_address_p): Likewise.
2154 (rs6000_emit_move): Disallow POImode and PXImode moves involving
2156 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
2157 and FP registers for PXImode.
2158 (rs6000_split_multireg_move): Support splitting POImode and PXImode
2160 (rs6000_mangle_type): Adjust comment. Add support for mangling
2161 __vector_pair and __vector_quad types.
2162 (rs6000_opt_masks): Add entry for mma.
2163 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
2164 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
2165 (address_to_insn_form): Likewise.
2166 (reg_to_non_prefixed): Likewise.
2167 (rs6000_invalid_conversion): New function.
2168 * config/rs6000/rs6000.h (MASK_MMA): Define.
2169 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
2170 (VECTOR_ALIGNMENT_P): New helper macro.
2171 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
2172 (RS6000_BTM_MMA): Define.
2173 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
2174 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
2175 RS6000_BTI_vector_quad.
2176 (vector_pair_type_node): New.
2177 (vector_quad_type_node): New.
2178 * config/rs6000/rs6000.md: Include mma.md.
2179 (define_mode_iterator RELOAD): Add POI and PXI.
2180 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
2181 * config/rs6000/rs6000.opt (-mmma): New.
2182 * doc/invoke.texi: Document -mmma.
2184 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
2186 PR tree-optimization/95638
2187 * tree-loop-distribution.c (pg_edge_callback_data): New field.
2188 (loop_distribution::break_alias_scc_partitions): Record and restore
2189 postorder information. Fix memory leak.
2191 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
2193 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
2194 (output_file_start): Use const 'char *'.
2196 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
2198 PR tree-optimization/94880
2199 * match.pd (A | B) - B -> (A & ~B): New simplification.
2201 2020-06-19 Richard Biener <rguenther@suse.de>
2203 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
2204 for lane permutations.
2206 2020-06-19 Richard Biener <rguenther@suse.de>
2208 PR tree-optimization/95761
2209 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
2210 vectorized stmts for finding the last one.
2212 2020-06-18 Felix Yang <felix.yang@huawei.com>
2214 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
2215 vect_relevant_for_alignment_p to filter out data references in
2216 the loop whose alignment is irrelevant when trying loop peeling
2219 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
2221 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
2222 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
2223 mode iterator for the first operand of ZERO_EXTRACT RTX.
2224 Change ext_register_operand predicate to register_operand.
2225 Rename from *cmpqi_ext_1.
2226 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
2227 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
2228 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
2229 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2230 (*extv<mode>): Use SWI24 mode iterator for the first operand
2231 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2232 to register_operand.
2233 (*extzv<mode>): Use SWI248 mode iterator for the first operand
2234 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2235 to register_operand.
2236 (*extzvqi): Use SWI248 mode iterator instead of SImode for
2237 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
2238 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
2240 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
2241 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
2242 mode iterator for the first operand of ZERO_EXTRACT RTX.
2243 Change ext_register_operand predicate to register_operand.
2244 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
2245 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
2247 (*insvqi_1): Use SWI248 mode iterator instead of SImode
2248 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
2249 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
2250 predicate to register_operand.
2253 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
2254 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
2255 mode iterator for the first operand of ZERO_EXTRACT RTX.
2256 Change ext_register_operand predicate to register_operand.
2257 (addqi_ext_1): New expander.
2258 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
2259 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2260 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2261 to register_operand. Rename from *addqi_ext_1.
2262 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
2263 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2264 (udivmodqi4): Ditto.
2265 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2266 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
2267 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2268 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2269 to register_operand. Rename from *testqi_ext_1.
2270 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
2271 (andqi_ext_1): New expander.
2272 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
2273 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2274 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2275 to register_operand. Rename from andqi_ext_1.
2276 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
2277 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
2278 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
2279 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
2280 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2281 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
2282 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2283 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2284 to register_operand. Rename from *xorqi_ext_1_cc.
2285 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
2286 in mode, matching its first operand.
2287 (promote_duplicated_reg): Update for renamed insv<mode>_1.
2288 * config/i386/predicates.md (ext_register_operand): Remove predicate.
2290 2020-06-18 Martin Sebor <msebor@redhat.com>
2294 * builtins.c (compute_objsize): Remove call to
2295 compute_builtin_object_size and instead compute conservative sizes
2298 2020-06-18 Martin Liska <mliska@suse.cz>
2300 * coretypes.h (struct iterator_range): New type.
2301 * tree-vect-patterns.c (vect_determine_precisions): Use
2302 range-based iterator.
2303 (vect_pattern_recog): Likewise.
2304 * tree-vect-slp.c (_bb_vec_info): Likewise.
2305 (_bb_vec_info::~_bb_vec_info): Likewise.
2306 (vect_slp_check_for_constructors): Likewise.
2307 * tree-vectorizer.h:Add new iterators
2308 and functions that use it.
2310 2020-06-18 Martin Liska <mliska@suse.cz>
2312 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
2313 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
2314 of a VEC_COND_EXPR cannot be tcc_comparison and so that
2315 a SSA_NAME needs to be created before we use it for the first
2316 argument of the VEC_COND_EXPR.
2317 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
2319 2020-06-18 Richard Biener <rguenther@suse.de>
2322 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
2323 to the target if necessary.
2324 (expand_vect_cond_mask_optab_fn): Likewise.
2326 2020-06-18 Martin Liska <mliska@suse.cz>
2328 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
2329 vcond as we check for NULL pointer.
2331 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
2333 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
2334 silence empty-body warning with gcc_fallthrough.
2336 2020-06-18 Jakub Jelinek <jakub@redhat.com>
2338 PR tree-optimization/95699
2339 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
2340 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
2341 declarations to the statements that set them where possible.
2343 2020-06-18 Jakub Jelinek <jakub@redhat.com>
2346 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
2347 scalar mode halfvectype other than vector boolean for
2348 VEC_PACK_TRUNC_EXPR.
2350 2020-06-18 Richard Biener <rguenther@suse.de>
2352 * varasm.c (assemble_variable): Make sure to not
2353 defer output when outputting addressed constants.
2354 (output_constant_def_contents): Likewise.
2355 (add_constant_to_table): Take and pass on whether to
2357 (output_addressed_constants): Likewise.
2358 (output_constant_def): Pass on whether to defer output
2359 to add_constant_to_table.
2360 (tree_output_constant_def): Defer output of constants.
2362 2020-06-18 Richard Biener <rguenther@suse.de>
2364 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
2365 (_slp_tree::lane_permutation): New member.
2366 (_slp_tree::code): Likewise.
2367 (SLP_TREE_TWO_OPERATORS): Remove.
2368 (SLP_TREE_LANE_PERMUTATION): New.
2369 (SLP_TREE_CODE): Likewise.
2370 (vect_stmt_dominates_stmt_p): Declare.
2371 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
2372 * tree-vect-stmts.c (vect_model_simple_cost): Remove
2373 SLP_TREE_TWO_OPERATORS handling.
2374 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
2375 (_slp_tree::~_slp_tree): Likewise.
2376 (vect_two_operations_perm_ok_p): Remove.
2377 (vect_build_slp_tree_1): Remove verification of two-operator
2379 (vect_build_slp_tree_2): When we have two different operators
2380 build two computation SLP nodes and a blend.
2381 (vect_print_slp_tree): Print the lane permutation if it exists.
2382 (slp_copy_subtree): Copy it.
2383 (vect_slp_rearrange_stmts): Re-arrange it.
2384 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
2385 VEC_PERM_EXPR explicitely.
2386 (vect_schedule_slp_instance): Likewise. Remove old
2387 SLP_TREE_TWO_OPERATORS code.
2388 (vectorizable_slp_permutation): New function.
2390 2020-06-18 Martin Liska <mliska@suse.cz>
2392 * tree-vect-generic.c (expand_vector_condition): Check
2393 for gassign before inspecting RHS.
2395 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
2397 * gimplify.c (omp_notice_threadprivate_variable)
2398 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
2399 diagnostic. Adjust all users.
2401 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
2403 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
2404 NULL_TREE' check earlier.
2406 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
2408 * doc/extend.texi (attribute access): Fix a typo.
2410 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
2411 Kaipeng Zhou <zhoukaipeng3@huawei.com>
2413 PR tree-optimization/95199
2414 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
2415 strided load/store operations and remove redundant code.
2417 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
2419 * coretypes.h (first_type): New alias template.
2420 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
2421 Remove spurious “...” and split the function type out into a typedef.
2423 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
2425 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
2428 2020-06-17 Richard Biener <rguenther@suse.de>
2430 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
2431 in *vectype parameter.
2432 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
2433 vect_build_slp_tree_1 computed.
2434 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
2435 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
2436 (vect_schedule_slp_instance): Likewise.
2437 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
2438 from SLP_TREE_VECTYPE.
2440 2020-06-17 Richard Biener <rguenther@suse.de>
2442 PR tree-optimization/95717
2443 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
2444 Move BB SSA updating before exit/latch PHI current def copying.
2446 2020-06-17 Martin Liska <mliska@suse.cz>
2448 * Makefile.in: Add new file.
2449 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
2450 not meet this condition.
2451 (do_store_flag): Likewise.
2452 * gimplify.c (gimplify_expr): Gimplify first argument of
2453 VEC_COND_EXPR to be a SSA name.
2454 * internal-fn.c (vec_cond_mask_direct): New.
2455 (vec_cond_direct): Likewise.
2456 (vec_condu_direct): Likewise.
2457 (vec_condeq_direct): Likewise.
2458 (expand_vect_cond_optab_fn): New.
2459 (expand_vec_cond_optab_fn): Likewise.
2460 (expand_vec_condu_optab_fn): Likewise.
2461 (expand_vec_condeq_optab_fn): Likewise.
2462 (expand_vect_cond_mask_optab_fn): Likewise.
2463 (expand_vec_cond_mask_optab_fn): Likewise.
2464 (direct_vec_cond_mask_optab_supported_p): Likewise.
2465 (direct_vec_cond_optab_supported_p): Likewise.
2466 (direct_vec_condu_optab_supported_p): Likewise.
2467 (direct_vec_condeq_optab_supported_p): Likewise.
2468 * internal-fn.def (VCOND): New OPTAB.
2470 (VCONDEQ): Likewise.
2471 (VCOND_MASK): Likewise.
2472 * optabs.c (get_rtx_code): Make it global.
2473 (expand_vec_cond_mask_expr): Removed.
2474 (expand_vec_cond_expr): Removed.
2475 * optabs.h (expand_vec_cond_expr): Likewise.
2476 (vector_compare_rtx): Make it global.
2477 * passes.def: Add new pass_gimple_isel pass.
2478 * tree-cfg.c (verify_gimple_assign_ternary): Add check
2479 for VEC_COND_EXPR about first argument.
2480 * tree-pass.h (make_pass_gimple_isel): New.
2481 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
2482 propagation of the first argument of a VEC_COND_EXPR.
2483 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
2484 first argument of a VEC_COND_EXPR.
2485 (optimize_vec_cond_expr): Likewise.
2486 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
2487 for a first argument of created VEC_COND_EXPR.
2488 (expand_vector_condition): Fix coding style.
2489 * tree-vect-stmts.c (vectorizable_condition): Gimplify
2491 * gimple-isel.cc: New file.
2493 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
2495 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
2496 (BSS_SECTION_ASM_OP): Use ".bss".
2497 (ASM_SPEC): Remove "-mattr=-code-object-v3".
2498 (LINK_SPEC): Add "--export-dynamic".
2499 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
2500 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
2501 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
2502 (load_image): Remove obsolete relocation handling.
2503 Add ".kd" suffix to the symbol names.
2504 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
2505 (gcn_option_override): Update gcn_isa test.
2506 (gcn_kernel_arg_types): Update all the assembler directives.
2507 Remove the obsolete options.
2508 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
2509 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
2511 (output_file_start): Rework assembler file header.
2512 (gcn_hsa_declare_function_name): Rework kernel metadata.
2513 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
2514 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
2515 (PROCESSOR_VEGA10): New enum value.
2516 (PROCESSOR_VEGA20): New enum value.
2518 2020-06-17 Martin Liska <mliska@suse.cz>
2520 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
2522 * gcov-tool.c (print_version): Likewise.
2523 * gcov.c (print_version): Likewise.
2525 2020-06-17 liuhongt <hongtao.liu@intel.com>
2528 * config/i386/i386-expand.c
2529 (ix86_expand_vec_shift_qihi_constant): New function.
2530 * config/i386/i386-protos.h
2531 (ix86_expand_vec_shift_qihi_constant): Declare.
2532 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
2533 V*QImode by constant.
2535 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
2537 PR tree-optimization/95649
2538 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
2539 value is a constant.
2541 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2543 * config.in: Regenerate.
2544 * config/s390/s390.c (print_operand): Emit vector alignment hints
2545 for target z13, if AS accepts them. For other targets the logic
2547 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
2549 * configure: Regenerate.
2550 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
2552 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2554 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
2556 (__arm_vaddq_m_n_s32): Likewise.
2557 (__arm_vaddq_m_n_s16): Likewise.
2558 (__arm_vaddq_m_n_u8): Likewise.
2559 (__arm_vaddq_m_n_u32): Likewise.
2560 (__arm_vaddq_m_n_u16): Likewise.
2561 (__arm_vaddq_m): Modify polymorphic variant.
2563 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2565 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
2566 and constraint of all the operands.
2567 (mve_sqrshrl_sat<supf>_di): Likewise.
2568 (mve_uqrshl_si): Likewise.
2569 (mve_sqrshr_si): Likewise.
2570 (mve_uqshll_di): Likewise.
2571 (mve_urshrl_di): Likewise.
2572 (mve_uqshl_si): Likewise.
2573 (mve_urshr_si): Likewise.
2574 (mve_sqshl_si): Likewise.
2575 (mve_srshr_si): Likewise.
2576 (mve_srshrl_di): Likewise.
2577 (mve_sqshll_di): Likewise.
2578 * config/arm/predicates.md (arm_low_register_operand): Define.
2580 2020-06-16 Jakub Jelinek <jakub@redhat.com>
2582 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
2583 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
2584 or dist_schedule clause on non-rectangular loops. Handle
2585 gimplification of non-rectangular lb/b expressions. When changing
2586 iteration variable, adjust also non-rectangular lb/b expressions
2588 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
2590 (struct omp_for_data): Add non_rect member.
2591 * omp-general.c (omp_extract_for_data): Handle non-rectangular
2592 loops. Fill in non_rect, m1, m2 and outer.
2593 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
2594 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
2595 non-rectangular loop cases and assert for cases that can't be
2597 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
2598 (dump_omp_loop_non_rect_expr): New function.
2599 (dump_generic_node): Handle non-rectangular OpenMP loops.
2600 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
2601 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
2604 2020-06-16 Richard Biener <rguenther@suse.de>
2607 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
2609 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
2612 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
2613 assertion and turn it into a early exit check.
2615 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
2617 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
2618 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
2619 true and all elements are zero, then always clear. Return GS_ERROR
2620 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
2621 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
2622 the type is aggregate non-addressable, ask gimplify_init_constructor
2623 whether it can generate a single access to the target.
2625 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
2627 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
2628 access on the LHS is replaced with a scalar access, propagate the
2629 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
2631 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
2633 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
2634 TARGET_THREADPTR reference.
2635 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
2636 targetm.have_tls instead of TARGET_HAVE_TLS.
2637 (xtensa_option_override): Set targetm.have_tls to false in
2638 configurations without THREADPTR.
2640 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
2642 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
2644 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
2645 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
2646 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
2647 xtensa_windowed_abi if needed.
2648 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
2650 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
2651 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
2653 (mabi=call0, mabi=windowed): New options.
2654 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
2656 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
2658 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
2659 (TARGET_CAN_ELIMINATE): New macro.
2660 * config/xtensa/xtensa.h
2661 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
2662 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
2663 (HARD_FRAME_POINTER_REGNUM): Define using
2664 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
2665 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
2666 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
2667 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
2669 2020-06-15 Felix Yang <felix.yang@huawei.com>
2671 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
2672 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
2674 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
2676 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
2677 LOOP_VINFO_DATAREFS when possible.
2678 (update_epilogue_loop_vinfo): Likewise.
2680 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
2682 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
2684 (riscv_gpr_save_operation_p): Change type to unsigned for i and
2687 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
2690 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
2692 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
2693 * config/i386/sse.md (mul<mode>3): Drop mask_name since
2694 there's no real simd int8 multiplication instruction with
2695 mask. Also optimize it under TARGET_AVX512BW.
2696 (mulv8qi3): New expander.
2698 2020-06-12 Marco Elver <elver@google.com>
2700 * gimplify.c (gimplify_function_tree): Optimize and do not emit
2701 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
2702 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
2703 * tsan.c (instrument_memory_accesses): Make
2704 fentry_exit_instrument bool depend on new param.
2706 2020-06-12 Felix Yang <felix.yang@huawei.com>
2708 PR tree-optimization/95570
2709 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
2710 (vect_verify_datarefs_alignment): Call it to filter out data references
2711 in the loop whose alignment is irrelevant.
2712 (vect_get_peeling_costs_all_drs): Likewise.
2713 (vect_peeling_supportable): Likewise.
2714 (vect_enhance_data_refs_alignment): Likewise.
2716 2020-06-12 Richard Biener <rguenther@suse.de>
2718 PR tree-optimization/95633
2719 * tree-vect-stmts.c (vectorizable_condition): Properly
2720 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
2722 2020-06-12 Martin Liška <mliska@suse.cz>
2724 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
2725 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
2727 * lto-wrapper.c (merge_and_complain): Wrap option names.
2729 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
2731 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
2732 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
2733 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
2734 (vect_set_loop_condition_masked): Renamed to ...
2735 (vect_set_loop_condition_partial_vectors): ... this. Rename
2736 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
2737 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
2738 (vect_set_loop_condition_unmasked): Renamed to ...
2739 (vect_set_loop_condition_normal): ... this.
2740 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
2741 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
2742 to vect_set_loop_condition_partial_vectors.
2743 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
2744 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
2745 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
2747 (vect_analyze_loop_costing): ... this.
2748 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
2750 (vect_min_prec_for_max_niters): New, factored out from ...
2751 (vect_verify_full_masking): ... this. Rename
2752 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
2753 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
2754 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
2755 (vectorizable_reduction): Update some dumpings with partial
2756 vectors instead of fully-masked.
2757 (vectorizable_live_operation): Likewise.
2758 (vect_iv_limit_for_full_masking): Renamed to ...
2759 (vect_iv_limit_for_partial_vectors): ... this.
2760 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
2761 (check_load_store_for_partial_vectors): ... this. Update some
2762 dumpings with partial vectors instead of fully-masked.
2763 (vectorizable_store): Rename check_load_store_masking to
2764 check_load_store_for_partial_vectors.
2765 (vectorizable_load): Likewise.
2766 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
2767 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
2768 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
2769 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
2770 (vect_iv_limit_for_full_masking): Renamed to ...
2771 (vect_iv_limit_for_partial_vectors): this.
2772 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
2773 Rename iv_type to rgroup_iv_type.
2775 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
2777 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
2778 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
2779 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
2780 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
2781 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
2782 (insn_gen_fn::operator()): Replace overloaded definitions with
2783 a parameter-pack version.
2785 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
2788 * config/i386/i386-features.c (rest_of_insert_endbranch):
2790 (rest_of_insert_endbr_and_patchable_area): Change return type
2791 to void. Add need_endbr and patchable_area_size arguments.
2792 Don't call timevar_push nor timevar_pop. Replace
2793 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
2794 UNSPECV_PATCHABLE_AREA for patchable area.
2795 (pass_data_insert_endbranch): Renamed to ...
2796 (pass_data_insert_endbr_and_patchable_area): This. Change
2797 pass name to endbr_and_patchable_area.
2798 (pass_insert_endbranch): Renamed to ...
2799 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
2800 and patchable_area_size;.
2801 (pass_insert_endbr_and_patchable_area::gate): Set and check
2802 need_endbr and patchable_area_size.
2803 (pass_insert_endbr_and_patchable_area::execute): Call
2804 timevar_push and timevar_pop. Pass need_endbr and
2805 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
2806 (make_pass_insert_endbranch): Renamed to ...
2807 (make_pass_insert_endbr_and_patchable_area): This.
2808 * config/i386/i386-passes.def: Replace pass_insert_endbranch
2809 with pass_insert_endbr_and_patchable_area.
2810 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
2811 (make_pass_insert_endbranch): Renamed to ...
2812 (make_pass_insert_endbr_and_patchable_area): This.
2813 * config/i386/i386.c (ix86_asm_output_function_label): Set
2814 function_label_emitted to true.
2815 (ix86_print_patchable_function_entry): New function.
2816 (ix86_output_patchable_area): Likewise.
2817 (x86_function_profiler): Replace endbr_queued_at_entrance with
2818 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
2819 Call ix86_output_patchable_area to generate patchable area if
2821 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
2822 * config/i386/i386.h (queued_insn_type): New.
2823 (machine_function): Add function_label_emitted. Replace
2824 endbr_queued_at_entrance with insn_queued_at_entrance.
2825 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
2826 (patchable_area): New.
2828 2020-06-11 Martin Liska <mliska@suse.cz>
2830 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
2833 2020-06-11 Martin Liska <mliska@suse.cz>
2836 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
2839 2020-06-11 Martin Liska <mliska@suse.cz>
2840 Jakub Jelinek <jakub@redhat.com>
2843 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
2844 by using Pmode instead of ptr_mode.
2846 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
2848 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
2849 (vect_set_loop_control): ... this.
2850 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
2851 (vect_set_loop_masks_directly): Renamed to ...
2852 (vect_set_loop_controls_directly): ... this. Also rename some
2853 variables with ctrl instead of mask. Rename vect_set_loop_mask to
2854 vect_set_loop_control.
2855 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
2856 Also rename some variables with ctrl instead of mask.
2857 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
2858 (release_vec_loop_controls): ... this. Rename rgroup_masks related
2860 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
2861 release_vec_loop_controls.
2862 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
2863 (vect_get_max_nscalars_per_iter): Likewise.
2864 (vect_estimate_min_profitable_iters): Likewise.
2865 (vect_record_loop_mask): Likewise.
2866 (vect_get_loop_mask): Likewise.
2867 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
2868 (struct rgroup_controls): ... this. Also rename mask_type
2869 to type and rename masks to controls.
2871 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
2873 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
2874 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
2875 (vect_gen_vector_loop_niters): Likewise.
2876 (vect_do_peeling): Likewise.
2877 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
2878 fully_masked_p to using_partial_vectors_p.
2879 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
2880 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
2881 (determine_peel_for_niter): Likewise.
2882 (vect_estimate_min_profitable_iters): Likewise.
2883 (vect_transform_loop): Likewise.
2884 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
2885 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
2887 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
2889 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
2890 can_fully_mask_p to can_use_partial_vectors_p.
2891 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
2892 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
2893 to saved_can_use_partial_vectors_p.
2894 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
2895 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
2896 (vectorizable_live_operation): Likewise.
2897 * tree-vect-stmts.c (permute_vec_elements): Likewise.
2898 (check_load_store_masking): Likewise.
2899 (vectorizable_operation): Likewise.
2900 (vectorizable_store): Likewise.
2901 (vectorizable_load): Likewise.
2902 (vectorizable_condition): Likewise.
2903 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
2904 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
2905 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
2907 2020-06-11 Martin Liska <mliska@suse.cz>
2909 * optc-save-gen.awk: Quote error string.
2911 2020-06-11 Alexandre Oliva <oliva@adacore.com>
2913 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
2915 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
2917 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
2918 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
2920 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
2921 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
2923 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
2925 * config/riscv/predicates.md (gpr_save_operation): New.
2926 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
2927 (riscv_gpr_save_operation_p): Ditto.
2928 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
2929 Ignore USEs for gpr_save patter.
2930 * config/riscv/riscv.c (gpr_save_reg_order): New.
2931 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
2932 (riscv_gen_gpr_save_insn): New.
2933 (riscv_gpr_save_operation_p): Ditto.
2934 * config/riscv/riscv.md (S3_REGNUM): New.
2941 (S10_REGNUM): Ditto.
2942 (S11_REGNUM): Ditto.
2943 (gpr_save): Model USEs correctly.
2945 2020-06-10 Martin Sebor <msebor@redhat.com>
2949 * builtins.c (inform_access): New function.
2950 (check_access): Call it. Add argument.
2951 (addr_decl_size): Remove.
2952 (get_range): New function.
2953 (compute_objsize): New overload. Only use compute_builtin_object_size
2954 with raw memory function.
2955 (check_memop_access): Pass new argument to compute_objsize and
2957 (expand_builtin_memchr, expand_builtin_strcat): Same.
2958 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
2959 (expand_builtin_stpncpy, check_strncat_sizes): Same.
2960 (expand_builtin_strncat, expand_builtin_strncpy): Same.
2961 (expand_builtin_memcmp): Same.
2962 * builtins.h (check_nul_terminated_array): Declare extern.
2963 (check_access): Add argument.
2964 (struct access_ref, struct access_data): New structs.
2965 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
2966 (builtin_access::overlap): Call it.
2967 * tree-object-size.c (decl_init_size): Declare extern.
2968 (addr_object_size): Correct offset computation.
2969 * tree-object-size.h (decl_init_size): Declare.
2970 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
2971 to maybe_warn_overflow when assigning to an SSA_NAME.
2973 2020-06-10 Richard Biener <rguenther@suse.de>
2975 * tree-vect-loop.c (vect_determine_vectorization_factor):
2977 (_loop_vec_info::_loop_vec_info): Likewise.
2978 (vect_update_vf_for_slp): Likewise.
2979 (vect_analyze_loop_operations): Likewise.
2980 (update_epilogue_loop_vinfo): Likewise.
2981 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
2982 (vect_pattern_recog): Likewise.
2983 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
2984 (_bb_vec_info::_bb_vec_info): Likewise.
2985 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
2988 2020-06-10 Richard Biener <rguenther@suse.de>
2990 PR tree-optimization/95576
2991 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
2993 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
2996 * config/aarch64/aarch64-sve-builtins.h
2997 (sve_switcher::m_old_maximum_field_alignment): New member.
2998 * config/aarch64/aarch64-sve-builtins.cc
2999 (sve_switcher::sve_switcher): Save maximum_field_alignment in
3000 m_old_maximum_field_alignment and clear maximum_field_alignment.
3001 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
3003 2020-06-10 Richard Biener <rguenther@suse.de>
3005 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
3007 (_stmt_vec_info::vec_stmts): Likewise.
3008 (vec_info::stmt_vec_info_ro): New flag.
3009 (vect_finish_replace_stmt): Adjust declaration.
3010 (vect_finish_stmt_generation): Likewise.
3011 (vectorizable_induction): Likewise.
3012 (vect_transform_reduction): Likewise.
3013 (vectorizable_lc_phi): Likewise.
3014 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
3015 allocate stmt infos for increments.
3016 (vect_record_grouped_load_vectors): Adjust.
3017 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
3018 (vectorize_fold_left_reduction): Likewise.
3019 (vect_transform_reduction): Likewise.
3020 (vect_transform_cycle_phi): Likewise.
3021 (vectorizable_lc_phi): Likewise.
3022 (vectorizable_induction): Likewise.
3023 (vectorizable_live_operation): Likewise.
3024 (vect_transform_loop): Likewise.
3025 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
3026 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
3027 (vect_get_slp_defs): Likewise.
3028 (vect_transform_slp_perm_load): Likewise.
3029 (vect_schedule_slp_instance): Likewise.
3030 (vectorize_slp_instance_root_stmt): Likewise.
3031 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
3032 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
3033 (vect_finish_replace_stmt): Do not return anything.
3034 (vect_finish_stmt_generation): Likewise.
3035 (vect_build_gather_load_calls): Adjust.
3036 (vectorizable_bswap): Likewise.
3037 (vectorizable_call): Likewise.
3038 (vectorizable_simd_clone_call): Likewise.
3039 (vect_create_vectorized_demotion_stmts): Likewise.
3040 (vectorizable_conversion): Likewise.
3041 (vectorizable_assignment): Likewise.
3042 (vectorizable_shift): Likewise.
3043 (vectorizable_operation): Likewise.
3044 (vectorizable_scan_store): Likewise.
3045 (vectorizable_store): Likewise.
3046 (vectorizable_load): Likewise.
3047 (vectorizable_condition): Likewise.
3048 (vectorizable_comparison): Likewise.
3049 (vect_transform_stmt): Likewise.
3050 * tree-vectorizer.c (vec_info::vec_info): Initialize
3052 (vec_info::replace_stmt): Copy over stmt UID rather than
3053 unsetting/setting a stmt info allocating a new UID.
3054 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
3056 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
3058 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
3060 * gimple-ssa-evrp.c (class evrp_folder): New.
3061 (class evrp_dom_walker): Remove.
3062 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
3063 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
3064 * tree-ssa-copy.c (copy_folder::get_value): Same.
3065 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
3066 Pass stmt to get_value.
3067 (substitute_and_fold_engine::replace_phi_args_in): Same.
3068 (substitute_and_fold_dom_walker::after_dom_children): Call
3070 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
3071 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
3072 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
3073 call virtual functions for folding, pre_folding, and post folding.
3074 Call get_value with PHI. Tweak dump.
3075 * tree-ssa-propagate.h (class substitute_and_fold_engine):
3076 New argument to get_value.
3077 New virtual function pre_fold_bb.
3078 New virtual function post_fold_bb.
3079 New virtual function pre_fold_stmt.
3080 New virtual function post_new_stmt.
3081 New function propagate_into_phi_args.
3082 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
3083 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
3085 (vr_values::fold_cond): New.
3086 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
3087 * vr-values.h (class vr_values): Add
3088 simplify_cond_using_ranges_when_edge_is_known.
3090 2020-06-10 Martin Liska <mliska@suse.cz>
3093 * asan.c (asan_emit_stack_protection): Emit
3094 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
3097 2020-06-10 Tamar Christina <tamar.christina@arm.com>
3099 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
3101 2020-06-10 Richard Biener <rguenther@suse.de>
3103 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
3104 (vect_record_grouped_load_vectors): Likewise.
3105 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
3106 (vectorize_fold_left_reduction): Likewise.
3107 (vect_transform_reduction): Likewise.
3108 (vect_transform_cycle_phi): Likewise.
3109 (vectorizable_lc_phi): Likewise.
3110 (vectorizable_induction): Likewise.
3111 (vectorizable_live_operation): Likewise.
3112 (vect_transform_loop): Likewise.
3113 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
3115 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
3116 (vect_get_vec_def_for_operand): Likewise.
3117 (vect_get_vec_def_for_stmt_copy): Likewise.
3118 (vect_get_vec_defs_for_stmt_copy): Likewise.
3119 (vect_get_vec_defs_for_operand): New function.
3120 (vect_get_vec_defs): Likewise.
3121 (vect_build_gather_load_calls): Adjust.
3122 (vect_get_gather_scatter_ops): Likewise.
3123 (vectorizable_bswap): Likewise.
3124 (vectorizable_call): Likewise.
3125 (vectorizable_simd_clone_call): Likewise.
3126 (vect_get_loop_based_defs): Remove.
3127 (vect_create_vectorized_demotion_stmts): Adjust.
3128 (vectorizable_conversion): Likewise.
3129 (vectorizable_assignment): Likewise.
3130 (vectorizable_shift): Likewise.
3131 (vectorizable_operation): Likewise.
3132 (vectorizable_scan_store): Likewise.
3133 (vectorizable_store): Likewise.
3134 (vectorizable_load): Likewise.
3135 (vectorizable_condition): Likewise.
3136 (vectorizable_comparison): Likewise.
3137 (vect_transform_stmt): Adjust and remove no longer applicable
3139 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
3140 STMT_VINFO_VEC_STMTS.
3141 (vec_info::free_stmt_vec_info): Relase it.
3142 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
3143 (_stmt_vec_info::vec_stmts): Add.
3144 (STMT_VINFO_VEC_STMT): Remove.
3145 (STMT_VINFO_VEC_STMTS): New.
3146 (vect_get_vec_def_for_operand_1): Remove.
3147 (vect_get_vec_def_for_operand): Likewise.
3148 (vect_get_vec_defs_for_stmt_copy): Likewise.
3149 (vect_get_vec_def_for_stmt_copy): Likewise.
3150 (vect_get_vec_defs): New overloads.
3151 (vect_get_vec_defs_for_operand): New.
3152 (vect_get_slp_defs): Declare.
3154 2020-06-10 Qian Chao <qianchao9@huawei.com>
3156 PR tree-optimization/95569
3157 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
3159 2020-06-10 Martin Liska <mliska@suse.cz>
3161 PR tree-optimization/92860
3162 * optc-save-gen.awk: Generate new function cl_optimization_compare.
3163 * opth-gen.awk: Generate declaration of the function.
3165 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
3167 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
3168 'future' PowerPC platform.
3169 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
3170 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
3171 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
3173 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
3174 (rs6000_clone_map): Add 'future' system target_clones support.
3176 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
3178 * Makefile.in (ZSTD_INC): Define.
3179 (ZSTD_LIB): Include ZSTD_LDFLAGS.
3180 (CFLAGS-lto-compress.o): Add ZSTD_INC.
3181 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
3183 * configure: Rebuilt.
3185 2020-06-09 Jason Merrill <jason@redhat.com>
3188 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
3190 2020-06-09 Marco Elver <elver@google.com>
3192 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
3193 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
3194 builtin for volatile instrumentation of reads/writes.
3195 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
3196 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
3197 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
3198 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
3199 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
3200 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
3201 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
3202 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
3203 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
3204 * tsan.c (get_memory_access_decl): Argument if access is
3205 volatile. If param tsan-distinguish-volatile is non-zero, and
3206 access if volatile, return volatile instrumentation decl.
3207 (instrument_expr): Check if access is volatile.
3209 2020-06-09 Richard Biener <rguenther@suse.de>
3211 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
3213 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
3215 * omp-offload.c (add_decls_addresses_to_decl_constructor,
3216 omp_finish_file): With in_lto_p, stream out all offload-table
3217 items even if the symtab_node does not exist.
3219 2020-06-09 Richard Biener <rguenther@suse.de>
3221 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
3223 2020-06-09 Martin Liska <mliska@suse.cz>
3225 * gcov-dump.c (print_usage): Fix spacing for --raw option
3228 2020-06-09 Martin Liska <mliska@suse.cz>
3230 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
3231 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
3232 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
3233 Handle all sanitizer options.
3234 (can_inline_edge_p): Use renamed CIF_* enum value.
3236 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
3238 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
3240 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
3241 (@aarch64_bic<mode>): Enable unpacked BIC.
3242 (*bic<mode>3): Enable unpacked BIC.
3244 2020-06-09 Martin Liska <mliska@suse.cz>
3246 PR gcov-profile/95365
3247 * doc/gcov.texi: Compile and link one example in 2 steps.
3249 2020-06-09 Jakub Jelinek <jakub@redhat.com>
3251 PR tree-optimization/95527
3252 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
3254 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
3256 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
3257 'future' PowerPC platform.
3258 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
3259 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
3260 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
3262 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
3263 (rs6000_clone_map): Add 'future' system target_clones support.
3265 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
3269 * omp-offload.c (add_decls_addresses_to_decl_constructor,
3270 omp_finish_file): Skip removed items.
3271 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
3272 to this node for variables and functions.
3274 2020-06-08 Jason Merrill <jason@redhat.com>
3276 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
3277 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
3278 * configure: Regenerate.
3280 2020-06-08 Martin Sebor <msebor@redhat.com>
3282 * postreload.c (reload_cse_simplify_operands): Clear first array element
3283 before using it. Assert a precondition.
3285 2020-06-08 Jakub Jelinek <jakub@redhat.com>
3288 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
3289 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
3290 type is vector boolean.
3292 2020-06-08 Tamar Christina <tamar.christina@arm.com>
3294 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
3296 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
3298 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
3299 instead of VFP_REGS.
3301 2020-06-08 Martin Liska <mliska@suse.cz>
3303 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
3304 in all vcond* patterns.
3306 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
3308 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
3309 Define. No longer include <algorithm>.
3311 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
3313 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
3314 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
3315 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
3316 (parityhi2, parityqi2): New expanders.
3317 (parityhi2_cmp): Implement set parity flag with xorb insn.
3318 (parityqi2_cmp): Implement set parity flag with testb insn.
3319 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
3321 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
3324 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3325 Override flag_cunroll_grow_size.
3327 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
3329 * common.opt (flag_cunroll_grow_size): New flag.
3330 * toplev.c (process_options): Set flag_cunroll_grow_size.
3331 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
3332 Use flag_cunroll_grow_size.
3334 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
3337 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
3338 (ipa_odr_summary_write): Update streaming.
3339 (ipa_odr_read_section): Update streaming.
3341 2020-06-06 Alexandre Oliva <oliva@adacore.com>
3344 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
3346 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
3347 Julian Brown <julian@codesourcery.com>
3349 * gimplify.c (gimplify_adjust_omp_clauses): Remove
3350 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
3352 2020-06-05 Richard Biener <rguenther@suse.de>
3354 PR tree-optimization/95539
3355 * tree-vect-data-refs.c
3356 (vect_slp_analyze_and_verify_instance_alignment): Use
3357 SLP_TREE_REPRESENTATIVE for the data-ref check.
3358 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
3359 back to the first scalar stmt rather than the
3360 SLP_TREE_REPRESENTATIVE to match previous behavior.
3362 2020-06-05 Felix Yang <felix.yang@huawei.com>
3365 * expr.c (emit_move_insn): Check src and dest of the copy to see
3366 if one or both of them are subregs, try to remove the subregs when
3367 innermode and outermode are equal in size and the mode change involves
3368 an implicit round trip through memory.
3370 2020-06-05 Jakub Jelinek <jakub@redhat.com>
3373 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
3374 define_insn_and_split patterns.
3375 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
3376 define_insn patterns.
3378 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
3380 * alloc-pool.h (object_allocator::remove_raw): New.
3381 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
3382 (occurrence::occurrence): Add.
3383 (occurrence::~occurrence): Likewise.
3384 (occurrence::new): Likewise.
3385 (occurrence::delete): Likewise.
3387 (insert_bb): Use new occurence (...) instead of occ_new.
3388 (register_division_in): Likewise.
3389 (free_bb): Use delete occ instead of manually removing
3392 2020-06-05 Richard Biener <rguenther@suse.de>
3395 * cfgexpand.c (expand_debug_expr): Avoid calling
3396 set_mem_attributes_minus_bitpos when we were expanding
3398 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
3399 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
3400 special-cases we do not want MEM_EXPRs for. Assert
3401 we end up with reasonable MEM_EXPRs.
3403 2020-06-05 Lili Cui <lili.cui@intel.com>
3406 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
3408 2020-06-04 Martin Sebor <msebor@redhat.com>
3412 * attribs.c (init_attr_rdwr_indices): Move function here.
3413 * attribs.h (rdwr_access_hash, rdwr_map): Define.
3414 (attr_access): Add 'none'.
3415 (init_attr_rdwr_indices): Declared function.
3416 * builtins.c (warn_for_access)): New function.
3417 (check_access): Call it.
3418 * builtins.h (checK-access): Add an optional argument.
3419 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
3420 (init_attr_rdwr_indices): Declare extern.
3421 (append_attrname): Handle attr_access::none.
3422 (maybe_warn_rdwr_sizes): Same.
3423 (initialize_argument_information): Update comments.
3424 * doc/extend.texi (attribute access): Document 'none'.
3425 * tree-ssa-uninit.c (struct wlimits): New.
3426 (maybe_warn_operand): New function.
3427 (maybe_warn_pass_by_reference): Same.
3428 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
3429 Also call for function calls.
3430 (pass_late_warn_uninitialized::execute): Adjust comments.
3431 (execute_early_warn_uninitialized): Same.
3433 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
3436 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
3437 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
3438 reload if the original insn has it too.
3440 2020-06-04 Richard Biener <rguenther@suse.de>
3442 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
3443 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
3445 2020-06-04 Martin Jambor <mjambor@suse.cz>
3448 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
3449 exceptions check to...
3450 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
3452 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
3453 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
3456 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3459 * config/arm/predicates.md (mve_scatter_memory): Define to
3460 match (mem (reg)) for scatter store memory.
3461 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
3462 define_insn to define_expand.
3463 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
3464 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
3465 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
3466 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
3467 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
3468 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
3469 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
3470 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
3471 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
3472 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
3473 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
3474 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
3475 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
3476 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
3477 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
3478 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
3479 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
3480 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
3481 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
3482 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
3483 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
3485 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
3486 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
3487 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
3488 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
3489 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
3490 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
3491 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
3492 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
3493 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
3494 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
3495 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
3496 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
3497 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
3498 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
3499 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
3500 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
3501 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
3502 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
3503 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
3504 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
3506 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3508 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
3510 (__arm_vbicq_n_s16): Likewise.
3511 (__arm_vbicq_n_u32): Likewise.
3512 (__arm_vbicq_n_s32): Likewise.
3513 (__arm_vbicq): Modify polymorphic variant.
3515 2020-06-04 Richard Biener <rguenther@suse.de>
3517 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
3518 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
3519 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
3520 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
3521 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
3523 (vect_get_slp_defs): ... here.
3524 (vect_get_slp_vect_def): New function.
3526 2020-06-04 Richard Biener <rguenther@suse.de>
3528 * tree-vectorizer.h (_slp_tree::lanes): New.
3529 (SLP_TREE_LANES): Likewise.
3530 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
3531 (vectorizable_reduction): Likewise.
3532 (vect_transform_cycle_phi): Likewise.
3533 (vectorizable_induction): Likewise.
3534 (vectorizable_live_operation): Likewise.
3535 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
3536 (vect_create_new_slp_node): Likewise.
3537 (slp_copy_subtree): Copy it.
3538 (vect_optimize_slp): Use it.
3539 (vect_slp_analyze_node_operations_1): Likewise.
3540 (vect_slp_convert_to_external): Likewise.
3541 (vect_bb_vectorization_profitable_p): Likewise.
3542 * tree-vect-stmts.c (vectorizable_load): Likewise.
3543 (get_vectype_for_scalar_type): Likewise.
3545 2020-06-04 Richard Biener <rguenther@suse.de>
3547 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
3548 (vect_build_slp_tree_2): Simplify building all external op
3550 (vect_slp_analyze_node_operations): Remove push/pop of
3551 STMT_VINFO_DEF_TYPE.
3552 (vect_schedule_slp_instance): Likewise.
3553 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
3554 stmt_info, use the vect_is_simple_use overload combining
3555 SLP and stmt_info analysis.
3556 (vect_is_simple_cond): Likewise.
3557 (vectorizable_store): Adjust.
3558 (vectorizable_condition): Likewise.
3559 (vect_is_simple_use): Fully handle invariant SLP nodes
3560 here. Amend stmt_info operand extraction with COND_EXPR
3562 * tree-vect-loop.c (vectorizable_reduction): Deal with
3563 COND_EXPR representation ugliness.
3565 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
3568 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
3569 Refine from *vcvtps2ph_store<mask_name>.
3570 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
3571 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
3572 (*vcvtps2ph256<merge_mask_name>): New define_insn.
3573 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
3574 * config/i386/subst.md (merge_mask): New define_subst.
3575 (merge_mask_name): New define_subst_attr.
3576 (merge_mask_operand3): Ditto.
3578 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
3580 PR tree-optimization/89430
3582 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
3583 remove ssa_name_ver, store, offset fields.
3584 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
3585 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
3586 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
3589 2020-06-04 Andreas Schwab <schwab@suse.de>
3592 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
3594 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
3596 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
3597 (trunc<mode><pmov_dst_3_lower>2): Refine from
3598 trunc<mode><pmov_dst_3>2.
3600 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
3602 * match.pd (tanh/sinh -> 1/cosh): New simplification.
3604 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
3607 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
3608 is_lfs_stfs_insn and make it recognize lfs as well.
3609 (prefixed_store_p): Use is_lfs_stfs_insn().
3610 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
3612 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
3614 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
3616 (odr_enums): New static var.
3617 (struct odr_enum_val): New struct.
3618 (class odr_enum): New struct.
3619 (odr_enum_map): New hashtable.
3620 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
3621 (add_type_duplicate): Likewise.
3622 (free_odr_warning_data): Do not free TYPE_VALUES.
3623 (register_odr_enum): New function.
3624 (ipa_odr_summary_write): New function.
3625 (ipa_odr_read_section): New function.
3626 (ipa_odr_summary_read): New function.
3627 (class pass_ipa_odr): New pass.
3628 (make_pass_ipa_odr): New function.
3629 * ipa-utils.h (register_odr_enum): Declare.
3630 * lto-section-in.c: (lto_section_name): Add odr_types section.
3631 * lto-streamer.h (enum lto_section_type): Add odr_types section.
3632 * passes.def: Add odr_types pass.
3633 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
3635 (hash_tree): Likewise.
3636 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
3638 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
3640 * timevar.def (TV_IPA_ODR): New timervar.
3641 * tree-pass.h (make_pass_ipa_odr): Declare.
3642 * tree.c (free_lang_data_in_type): Regiser ODR types.
3644 2020-06-03 Romain Naour <romain.naour@gmail.com>
3646 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
3649 2020-06-03 Richard Biener <rguenther@suse.de>
3651 PR tree-optimization/95487
3652 * tree-vect-stmts.c (vectorizable_store): Use a truth type
3653 for the scatter mask.
3655 2020-06-03 Richard Biener <rguenther@suse.de>
3657 PR tree-optimization/95495
3658 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
3659 SLP_TREE_REPRESENTATIVE in the shift assertion.
3661 2020-06-03 Tom Tromey <tromey@adacore.com>
3663 * spellcheck.c (CASE_COST): New define.
3664 (BASE_COST): New define.
3665 (get_edit_distance): Recognize case changes.
3666 (get_edit_distance_cutoff): Update.
3667 (test_edit_distances): Update.
3668 (get_old_cutoff): Update.
3669 (test_find_closest_string): Add case sensitivity test.
3671 2020-06-03 Richard Biener <rguenther@suse.de>
3673 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
3674 the cost vector to unset the visited flag on stmts.
3676 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
3678 * gimplify.c (omp_notice_variable): Use new hook.
3679 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
3680 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
3681 (LANG_HOOKS_DECLS): Add it.
3682 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
3683 (lhd_omp_predetermined_mapping): New.
3684 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
3686 2020-06-03 Jan Hubicka <jh@suse.cz>
3688 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
3689 add LTO_first_tree_tag and LTO_first_gimple_tag.
3690 (lto_tag_is_tree_code_p): Update.
3691 (lto_tag_is_gimple_code_p): Update.
3692 (lto_gimple_code_to_tag): Update.
3693 (lto_tag_to_gimple_code): Update.
3694 (lto_tree_code_to_tag): Update.
3695 (lto_tag_to_tree_code): Update.
3697 2020-06-02 Felix Yang <felix.yang@huawei.com>
3700 * config/aarch64/aarch64.c (aarch64_short_vector_p):
3701 Leave later code to report an error if SVE is disabled.
3703 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3705 * config/aarch64/aarch64-cores.def (zeus): Define.
3706 * config/aarch64/aarch64-tune.md: Regenerate.
3707 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
3709 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
3712 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
3714 (is_stfs_insn): New helper function.
3716 2020-06-02 Jan Hubicka <jh@suse.cz>
3718 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
3720 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
3722 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
3724 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
3725 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
3726 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
3728 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
3731 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
3732 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
3734 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3736 * config/s390/s390.c (print_operand): Emit vector alignment
3739 2020-06-02 Martin Liska <mliska@suse.cz>
3741 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
3742 as they have variable number of counters.
3743 * gcov-dump.c (main): Add new option -r.
3744 (print_usage): Likewise.
3745 (tag_counters): All new raw format.
3746 * gcov-io.h (struct gcov_kvp): New.
3747 (GCOV_TOPN_VALUES): Remove.
3748 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
3749 (GCOV_TOPN_MEM_COUNTERS): New.
3750 (GCOV_TOPN_DISK_COUNTERS): Likewise.
3751 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
3752 * ipa-profile.c (ipa_profile_generate_summary): Use
3753 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
3754 (ipa_profile_write_edge_summary): Likewise.
3755 (ipa_profile_read_edge_summary): Likewise.
3756 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
3757 * profile.c (sort_hist_values): Sort variable number
3759 (compute_value_histograms): Special case for TOP N counters
3760 that have dynamic number of key-value pairs.
3761 * value-prof.c (dump_histogram_value): Dump variable number
3763 (stream_in_histogram_value): Stream in variable number
3764 of key-value pairs for TOP N counter.
3765 (get_nth_most_common_value): Deal with variable number
3767 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
3769 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
3771 * doc/gcov-dump.texi: Document new -r option.
3773 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
3776 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
3778 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
3780 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
3781 returns (const_int 0) for the destination, then emit nothing.
3783 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
3785 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
3786 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
3787 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
3788 LTO_const_decl_ref, LTO_imported_decl_ref,
3789 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
3790 LTO_namelist_decl_ref; add LTO_global_stream_ref.
3791 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
3792 (lto_input_scc): Update.
3793 (lto_input_tree_1): Update.
3794 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
3795 * lto-streamer.c (lto_tag_name): Update.
3797 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
3799 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
3800 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
3801 * lto-cgraph.c (lto_output_node): Likewise.
3802 (lto_output_varpool_node): Likewise.
3803 (output_offload_tables): Likewise.
3804 (input_node): Likewise.
3805 (input_varpool_node): Likewise.
3806 (input_offload_tables): Likewise.
3807 * lto-streamer-in.c (lto_input_tree_ref): Declare.
3808 (lto_input_var_decl_ref): Declare.
3809 (lto_input_fn_decl_ref): Declare.
3810 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
3811 (lto_output_var_decl_index): Rename to ..
3812 (lto_output_var_decl_ref): ... this.
3813 (lto_output_fn_decl_index): Rename to ...
3814 (lto_output_fn_decl_ref): ... this.
3815 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
3816 (DEFINE_DECL_STREAM_FUNCS): Remove.
3817 (lto_output_var_decl_index): Remove.
3818 (lto_output_fn_decl_index): Remove.
3819 (lto_output_var_decl_ref): Declare.
3820 (lto_output_fn_decl_ref): Declare.
3821 (lto_input_var_decl_ref): Declare.
3822 (lto_input_fn_decl_ref): Declare.
3824 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
3826 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
3827 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
3828 dump infomation if there is no adjusted parameter.
3829 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
3831 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
3833 * Makefile.in (gimple-array-bounds.o): New.
3834 * tree-vrp.c: Move array bounds code...
3835 * gimple-array-bounds.cc: ...here...
3836 * gimple-array-bounds.h: ...and here.
3838 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
3840 * Makefile.in (OBJS): Add value-range-equiv.o.
3841 * tree-vrp.c (*value_range_equiv*): Move to...
3842 * value-range-equiv.cc: ...here.
3843 * tree-vrp.h (class value_range_equiv): Move to...
3844 * value-range-equiv.h: ...here.
3845 * vr-values.h: Include value-range-equiv.h.
3847 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
3850 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
3851 lattice for simple pass-through by-ref argument.
3853 2020-05-31 Jeff Law <law@redhat.com>
3855 * lra.c (add_auto_inc_notes): Remove function.
3856 * reload1.c (add_auto_inc_notes): Similarly. Move into...
3857 * rtlanal.c (add_auto_inc_notes): New function.
3858 * rtl.h (add_auto_inc_notes): Add prototype.
3859 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
3862 2020-05-31 Jan Hubicka <jh@suse.cz>
3864 * lto-section-out.c (lto_output_decl_index): Remove.
3865 (lto_output_field_decl_index): Move to lto-streamer-out.c
3866 (lto_output_fn_decl_index): Move to lto-streamer-out.c
3867 (lto_output_namespace_decl_index): Remove.
3868 (lto_output_var_decl_index): Remove.
3869 (lto_output_type_decl_index): Remove.
3870 (lto_output_type_ref_index): Remove.
3871 * lto-streamer-out.c (output_type_ref): Remove.
3872 (lto_get_index): New function.
3873 (lto_output_tree_ref): Remove.
3874 (lto_indexable_tree_ref): New function.
3875 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
3876 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
3877 (stream_write_tree_ref): Update.
3878 (lto_output_tree): Update.
3879 * lto-streamer.h (lto_output_decl_index): Remove prototype.
3880 (lto_output_field_decl_index): Remove prototype.
3881 (lto_output_namespace_decl_index): Remove prototype.
3882 (lto_output_type_decl_index): Remove prototype.
3883 (lto_output_type_ref_index): Remove prototype.
3884 (lto_output_var_decl_index): Move.
3885 (lto_output_fn_decl_index): Move
3887 2020-05-31 Jakub Jelinek <jakub@redhat.com>
3890 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
3893 2020-05-31 Jeff Law <law@redhat.com>
3895 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
3897 2020-05-31 Jim Wilson <jimw@sifive.com>
3899 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
3901 2020-05-30 Jonathan Yong <10walls@gmail.com>
3903 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
3904 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
3905 import library, but also contains some functions that invoke
3906 others in KERNEL32.DLL.
3908 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
3910 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
3911 (altivec_vmrglw_direct): Ditto.
3912 (altivec_vperm_<mode>_direct): Ditto.
3913 (altivec_vperm_v8hiv16qi): Ditto.
3914 (*altivec_vperm_<mode>_uns_internal): Ditto.
3915 (*altivec_vpermr_<mode>_internal): Ditto.
3916 (vperm_v8hiv4si): Ditto.
3917 (vperm_v16qiv8hi): Ditto.
3919 2020-05-29 Jan Hubicka <jh@suse.cz>
3921 * lto-streamer-in.c (streamer_read_chain): Move here from
3923 (stream_read_tree_ref): New.
3924 (lto_input_tree_1): Simplify.
3925 * lto-streamer-out.c (stream_write_tree_ref): New.
3926 (lto_write_tree_1): Simplify.
3927 (lto_output_tree_1): Simplify.
3928 (DFS::DFS_write_tree): Simplify.
3929 (streamer_write_chain): Move here from tree-stremaer-out.c.
3930 * lto-streamer.h (lto_output_tree_ref): Update prototype.
3931 (stream_read_tree_ref): Declare
3932 (stream_write_tree_ref): Declare
3933 * tree-streamer-in.c (streamer_read_chain): Update to use
3934 stream_read_tree_ref.
3935 (lto_input_ts_common_tree_pointers): Likewise.
3936 (lto_input_ts_vector_tree_pointers): Likewise.
3937 (lto_input_ts_poly_tree_pointers): Likewise.
3938 (lto_input_ts_complex_tree_pointers): Likewise.
3939 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
3940 (lto_input_ts_decl_common_tree_pointers): Likewise.
3941 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
3942 (lto_input_ts_field_decl_tree_pointers): Likewise.
3943 (lto_input_ts_function_decl_tree_pointers): Likewise.
3944 (lto_input_ts_type_common_tree_pointers): Likewise.
3945 (lto_input_ts_type_non_common_tree_pointers): Likewise.
3946 (lto_input_ts_list_tree_pointers): Likewise.
3947 (lto_input_ts_vec_tree_pointers): Likewise.
3948 (lto_input_ts_exp_tree_pointers): Likewise.
3949 (lto_input_ts_block_tree_pointers): Likewise.
3950 (lto_input_ts_binfo_tree_pointers): Likewise.
3951 (lto_input_ts_constructor_tree_pointers): Likewise.
3952 (lto_input_ts_omp_clause_tree_pointers): Likewise.
3953 * tree-streamer-out.c (streamer_write_chain): Update to use
3954 stream_write_tree_ref.
3955 (write_ts_common_tree_pointers): Likewise.
3956 (write_ts_vector_tree_pointers): Likewise.
3957 (write_ts_poly_tree_pointers): Likewise.
3958 (write_ts_complex_tree_pointers): Likewise.
3959 (write_ts_decl_minimal_tree_pointers): Likewise.
3960 (write_ts_decl_common_tree_pointers): Likewise.
3961 (write_ts_decl_non_common_tree_pointers): Likewise.
3962 (write_ts_decl_with_vis_tree_pointers): Likewise.
3963 (write_ts_field_decl_tree_pointers): Likewise.
3964 (write_ts_function_decl_tree_pointers): Likewise.
3965 (write_ts_type_common_tree_pointers): Likewise.
3966 (write_ts_type_non_common_tree_pointers): Likewise.
3967 (write_ts_list_tree_pointers): Likewise.
3968 (write_ts_vec_tree_pointers): Likewise.
3969 (write_ts_exp_tree_pointers): Likewise.
3970 (write_ts_block_tree_pointers): Likewise.
3971 (write_ts_binfo_tree_pointers): Likewise.
3972 (write_ts_constructor_tree_pointers): Likewise.
3973 (write_ts_omp_clause_tree_pointers): Likewise.
3974 (streamer_write_tree_body): Likewise.
3975 (streamer_write_integer_cst): Likewise.
3976 * tree-streamer.h (streamer_read_chain):Declare.
3977 (streamer_write_chain):Declare.
3978 (streamer_write_tree_body): Update prototype.
3979 (streamer_write_integer_cst): Update prototype.
3981 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
3984 * configure: Regenerated.
3986 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
3988 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
3989 (add<mode>3_vcc_zext_dup_exec): Likewise.
3990 (add<mode>3_vcc_zext_dup2): Likewise.
3991 (add<mode>3_vcc_zext_dup2_exec): Likewise.
3993 2020-05-29 Richard Biener <rguenther@suse.de>
3995 PR tree-optimization/95272
3996 * tree-vectorizer.h (_slp_tree::representative): Add.
3997 (SLP_TREE_REPRESENTATIVE): Likewise.
3998 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
4000 (vectorizable_live_operation): Use the representative to
4001 attach the reduction info to.
4002 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
4003 SLP_TREE_REPRESENTATIVE.
4004 (vect_create_new_slp_node): Likewise.
4005 (slp_copy_subtree): Copy it.
4006 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
4007 (vect_slp_analyze_node_operations_1): Pass the representative
4008 to vect_analyze_stmt.
4009 (vect_schedule_slp_instance): Pass the representative to
4010 vect_transform_stmt.
4012 2020-05-29 Richard Biener <rguenther@suse.de>
4014 PR tree-optimization/95356
4015 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
4016 node hacking during analysis.
4018 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
4021 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
4023 2020-05-29 Richard Biener <rguenther@suse.de>
4025 PR tree-optimization/95403
4026 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
4029 2020-05-29 Jakub Jelinek <jakub@redhat.com>
4032 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
4033 declare variant cgraph node removal callback.
4035 2020-05-29 Jakub Jelinek <jakub@redhat.com>
4038 * expr.c (store_expr): If expr_size is constant and significantly
4039 larger than TREE_STRING_LENGTH, set temp to just the
4040 TREE_STRING_LENGTH portion of the STRING_CST.
4042 2020-05-29 Richard Biener <rguenther@suse.de>
4044 PR tree-optimization/95393
4045 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
4046 to build the min/max expression so we simplify cases like
4047 MAX(0, s) immediately.
4049 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
4051 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
4052 for unpacked EOR, ORR, AND.
4054 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
4056 * Makefile.in: don't look for libiberty in the "pic" subdirectory
4057 when building for Mingw. Add dependency on xgcc with the proper
4060 2020-05-28 Jeff Law <law@redhat.com>
4062 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
4064 2020-05-28 Jeff Law <law@redhat.com>
4066 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
4067 make a nonzero adjustment to the memory offset.
4068 (b<ior,xor>hi_msx): Turn into a splitter.
4070 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
4072 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
4073 Fix off-by-one error.
4075 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
4077 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
4078 wb_candidate1 and wb_candidate2.
4079 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
4080 wb_candidate1 and wb_candidate2 if we decided not to use them.
4082 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
4085 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
4086 we have at least some CFI operations when using a frame pointer.
4087 Only redefine the CFA if we have CFI operations.
4089 2020-05-28 Richard Biener <rguenther@suse.de>
4091 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
4092 case for !SLP_TREE_VECTYPE.
4093 (vect_slp_analyze_node_operations): Adjust.
4095 2020-05-28 Richard Biener <rguenther@suse.de>
4097 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
4098 (SLP_TREE_VEC_DEFS): Likewise.
4099 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
4100 (_slp_tree::~_slp_tree): Likewise.
4101 (vect_mask_constant_operand_p): Remove unused function.
4102 (vect_get_constant_vectors): Rename to...
4103 (vect_create_constant_vectors): ... this. Take the
4104 invariant node as argument and code generate it. Remove
4105 dead code, remove temporary asserts. Pass a NULL stmt_info
4106 to vect_init_vector.
4107 (vect_get_slp_defs): Simplify.
4108 (vect_schedule_slp_instance): Code-generate externals and
4109 invariants using vect_create_constant_vectors.
4111 2020-05-28 Richard Biener <rguenther@suse.de>
4113 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
4114 Conditionalize stmt_info use, assert the new stmt cannot throw
4116 (vect_finish_stmt_generation): Adjust assert.
4118 2020-05-28 Richard Biener <rguenther@suse.de>
4120 PR tree-optimization/95273
4121 PR tree-optimization/95356
4122 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
4123 what we set the vector type of the shift operand SLP node
4126 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
4128 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
4131 2020-05-28 Martin Liska <mliska@suse.cz>
4134 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
4135 rename ipcp-unit-growth to ipa-cp-unit-growth.
4137 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
4139 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
4140 from *avx512vl_<code>v2div2qi_store and refine memory size of
4142 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
4143 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
4144 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
4145 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
4146 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
4147 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
4148 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
4149 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
4150 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
4151 (*avx512vl_<code>v2div2si2_store_1): Ditto.
4152 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
4153 (*avx512f_<code>v8div16qi2_store_1): Ditto.
4154 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
4155 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
4156 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
4157 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
4158 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
4159 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
4160 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
4161 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
4162 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
4163 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
4164 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
4165 (*avx512vl_<code>v2div2si2_store_2): Ditto.
4166 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
4167 (*avx512f_<code>v8div16qi2_store_2): Ditto.
4168 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
4169 * config/i386/i386-builtin-types.def: Adjust builtin type.
4170 * config/i386/i386-expand.c: Ditto.
4171 * config/i386/i386-builtin.def: Adjust builtin.
4172 * config/i386/avx512fintrin.h: Ditto.
4173 * config/i386/avx512vlbwintrin.h: Ditto.
4174 * config/i386/avx512vlintrin.h: Ditto.
4176 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
4178 PR gcov-profile/95332
4179 * gcov-io.c (gcov_var::endian): Move field.
4180 (from_file): Add IN_GCOV_TOOL check.
4181 * gcov-io.h (gcov_magic): Ditto.
4183 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
4185 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
4187 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
4189 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
4191 * builtin-types.def (BT_UINT128): New primitive type.
4192 (BT_FN_UINT128_UINT128): New function type.
4193 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
4194 * doc/extend.texi (__builtin_bswap128): Document it.
4195 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
4196 (is_inexpensive_builtin): Likewise.
4197 * fold-const-call.c (fold_const_call_ss): Likewise.
4198 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
4199 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
4200 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
4201 (vectorizable_call): Likewise.
4202 * optabs.c (expand_unop): Always use the double word path for it.
4203 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
4204 * tree.h (uint128_type_node): New global type.
4205 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
4207 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
4209 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
4210 (mmx_hsubv2sf3): Ditto.
4211 (mmx_haddsubv2sf3): New expander.
4212 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
4213 RTL template to model horizontal subtraction and addition.
4214 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
4217 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
4220 * config/i386/sse.md
4221 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
4222 Remove %q operand modifier from insn template.
4223 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
4225 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
4227 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
4228 Enable insn pattern for TARGET_MMX_WITH_SSE.
4229 (*mmx_movshdup): New insn pattern.
4230 (*mmx_movsldup): Ditto.
4231 (*mmx_movss): Ditto.
4232 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
4234 (expand_vec_perm_movs): Handle E_V2SFmode.
4235 (expand_vec_perm_even_odd): Ditto.
4236 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
4237 is already handled by standard shuffle patterns.
4239 2020-05-27 Richard Biener <rguenther@suse.de>
4241 PR tree-optimization/95295
4242 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
4243 merging stores from paths.
4245 2020-05-27 Richard Biener <rguenther@suse.de>
4247 PR tree-optimization/95356
4248 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
4249 type for the shift operand.
4251 2020-05-27 Richard Biener <rguenther@suse.de>
4253 PR tree-optimization/95335
4254 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
4255 lvisited for nodes made external.
4257 2020-05-27 Richard Biener <rguenther@suse.de>
4259 * dump-context.h (debug_dump_context): New class.
4260 (dump_context): Make it friend.
4261 * dumpfile.c (debug_dump_context::debug_dump_context):
4263 (debug_dump_context::~debug_dump_context): Likewise.
4264 * tree-vect-slp.c: Include dump-context.h.
4265 (vect_print_slp_tree): Dump a single SLP node.
4266 (debug): New overload for slp_tree.
4267 (vect_print_slp_graph): Rename from vect_print_slp_tree and
4269 (vect_analyze_slp_instance): Adjust.
4271 2020-05-27 Jakub Jelinek <jakub@redhat.com>
4274 * omp-general.c (omp_declare_variant_remove_hook): New function.
4275 (omp_resolve_declare_variant): Always return base if it is already
4276 declare_variant_alt magic decl itself. Register
4277 omp_declare_variant_remove_hook as cgraph node removal hook.
4279 2020-05-27 Jeff Law <law@redhat.com>
4281 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
4282 for the primary input operand.
4283 (tstsi_variable_bit_qi): Similarly.
4285 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
4287 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
4289 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
4292 * ipa-utils.h (odr_type_p): Also permit calls with
4293 only flag_generate_offload set.
4295 2020-05-26 Alexandre Oliva <oliva@adacore.com>
4297 * gcc.c (validate_switches): Add braced parameter. Adjust all
4298 callers. Expected and skip trailing brace only if braced.
4299 Return after handling one atom otherwise.
4300 (DUMPS_OPTIONS): New.
4301 (cpp_debug_options): Define in terms of it.
4303 2020-05-26 Richard Biener <rguenther@suse.de>
4305 PR tree-optimization/95327
4306 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
4307 when we are not using a scalar shift.
4309 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
4311 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
4312 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
4313 Handle E_V2SImode and E_V4HImode.
4314 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
4315 Assert that E_V2SImode is already handled.
4316 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
4317 is already handled by standard shuffle patterns.
4319 2020-05-26 Jan Hubicka <jh@suse.cz>
4321 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
4324 2020-05-26 Jakub Jelinek <jakub@redhat.com>
4327 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
4328 * omp-general.h (find_combined_omp_for): Declare.
4329 * omp-general.c: Include tree-iterator.h.
4330 (find_combined_omp_for): New function, moved from gimplify.c.
4332 2020-05-26 Alexandre Oliva <oliva@adacore.com>
4334 * common.opt (aux_base_name): Define.
4335 (dumpbase, dumpdir): Mark as Driver options.
4336 (-dumpbase, -dumpdir): Likewise.
4337 (dumpbase-ext, -dumpbase-ext): New.
4338 (auxbase, auxbase-strip): Drop.
4339 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
4341 (-o): Introduce the notion of primary output, mention it
4342 influences auxiliary and dump output names as well, add
4344 (-save-temps): Adjust, move examples into -dump*.
4345 (-save-temps=cwd, -save-temps=obj): Likewise.
4346 (-fdump-final-insns): Adjust.
4347 * dwarf2out.c (gen_producer_string): Drop auxbase and
4348 auxbase_strip; add dumpbase_ext.
4349 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
4350 (save_temps_prefix, save_temps_length): Drop.
4351 (save_temps_overrides_dumpdir): New.
4352 (dumpdir, dumpbase, dumpbase_ext): New.
4353 (dumpdir_length, dumpdir_trailing_dash_added): New.
4354 (outbase, outbase_length): New.
4355 (The Specs Language): Introduce %". Adjust %b and %B.
4356 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
4357 Precede object file with %w when it's the primary output.
4358 (cpp_debug_options): Do not pass on incoming -dumpdir,
4359 -dumpbase and -dumpbase-ext options; recompute them with
4361 (cc1_options): Drop auxbase with and without compare-debug;
4362 use cpp_debug_options instead of dumpbase. Mark asm output
4363 with %w when it's the primary output.
4364 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
4365 %:replace-exception. Add %:dumps.
4366 (driver_handle_option): Implement -save-temps=*/-dumpdir
4367 mutual overriding logic. Save dumpdir, dumpbase and
4368 dumpbase-ext options. Do not save output_file in
4370 (adds_single_suffix_p): New.
4371 (single_input_file_index): New.
4372 (process_command): Combine output dir, output base name, and
4373 dumpbase into dumpdir and outbase.
4374 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
4375 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
4376 and outbase instead of input_basename in %b, %B and in
4377 -save-temps aux files. Handle empty argument %".
4378 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
4379 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
4380 naming. Spec-quote the computed -fdump-final-insns file name.
4381 (debug_auxbase_opt): Drop.
4382 (compare_debug_self_opt_spec_function): Drop auxbase-strip
4384 (compare_debug_auxbase_opt_spec_function): Drop.
4385 (not_actual_file_p): New.
4386 (replace_extension_spec_func): Drop.
4387 (dumps_spec_func): New.
4388 (convert_white_space): Split-out parts into...
4389 (quote_string, whitespace_to_convert_p): ... these. New.
4390 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
4391 (driver::finalize): Release and reset new variables; drop
4393 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
4394 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
4395 empty string otherwise.
4396 (DUMPBASE_SUFFIX): Drop leading period.
4397 (debug_objcopy): Use concat.
4398 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
4399 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
4400 component. Simplify temp file names.
4401 * opts.c (finish_options): Drop aux base name handling.
4402 (common_handle_option): Drop auxbase-strip handling.
4403 * toplev.c (print_switch_values): Drop auxbase, add
4405 (process_options): Derive aux_base_name from dump_base_name
4407 (lang_dependent_init): Compute dump_base_ext along with
4408 dump_base_name. Disable stack usage and callgraph-info during
4409 lto generation and compare-debug recompilation.
4411 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
4412 Uroš Bizjak <ubizjak@gmail.com>
4416 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
4417 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
4418 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
4419 float<floatunssuffix>v2div2sf2.
4420 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
4421 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
4422 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
4423 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
4424 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
4425 * config/i386/i386-builtin.def: Ditto.
4426 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
4427 subregs when both omode and imode are vector mode and
4428 have the same inner mode.
4430 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
4432 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
4433 Only turn MEM_REFs into bit-field stores for small bit-field regions.
4434 (imm_store_chain_info::output_merged_store): Be prepared for sources
4435 with non-integral type in the bit-field insertion case.
4436 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
4437 the largest size for the bit-field case.
4439 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
4441 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
4442 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
4443 (*vec_dupv4hi): Redefine as define_insn.
4444 Remove alternative with general register input.
4445 (*vec_dupv2si): Ditto.
4447 2020-05-25 Richard Biener <rguenther@suse.de>
4449 PR tree-optimization/95309
4450 * tree-vect-slp.c (vect_get_constant_vectors): Move number
4451 of vector computation ...
4452 (vect_slp_analyze_node_operations): ... to analysis phase.
4454 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
4456 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
4457 * lto-streamer.h (streamer_debugging): New constant
4458 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
4459 streamer_debugging check.
4460 (streamer_get_pickled_tree): Likewise.
4461 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
4463 2020-05-25 Richard Biener <rguenther@suse.de>
4465 PR tree-optimization/95308
4466 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
4467 test for TARGET_MEM_REFs.
4469 2020-05-25 Richard Biener <rguenther@suse.de>
4471 PR tree-optimization/95295
4472 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
4473 RHSes and drop to full sm_other if they are not equal.
4475 2020-05-25 Richard Biener <rguenther@suse.de>
4477 PR tree-optimization/95271
4478 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
4479 children vector type.
4480 (vectorizable_call): Pass down slp ops.
4482 2020-05-25 Richard Biener <rguenther@suse.de>
4484 PR tree-optimization/95297
4485 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
4486 skip updating operand 1 vector type.
4488 2020-05-25 Richard Biener <rguenther@suse.de>
4490 PR tree-optimization/95284
4491 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
4494 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
4497 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
4498 (trunc<mode><sf2dfmode_lower>2) New expander.
4499 (extend<sf2dfmode_lower><mode>2): Ditto.
4501 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
4503 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
4504 ubsan_{data,type},ASAN symbols linker-visible.
4506 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
4508 * lto-streamer-out.c (DFS::DFS): Silence warning.
4510 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
4513 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
4514 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
4516 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
4518 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
4521 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
4523 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
4524 * lto-streamer-out.c (create_output_block): Fix whitespace
4525 (lto_write_tree_1): Add (debug) dump.
4526 (DFS::DFS): Add dump.
4527 (DFS::DFS_write_tree_body): Do not dump here.
4528 (lto_output_tree): Improve dumping; do not stream ref when not needed.
4529 (produce_asm_for_decls): Fix whitespace.
4530 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
4531 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
4533 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
4536 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
4537 (truncv32hiv32qi2): Ditto.
4538 (trunc<ssedoublemodelower><mode>2): Ditto.
4539 (trunc<mode><pmov_dst_3>2): Ditto.
4540 (trunc<mode><pmov_dst_mode_4>2): Ditto.
4541 (truncv2div2si2): Ditto.
4542 (truncv8div8qi2): Ditto.
4543 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
4544 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
4545 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
4546 *avx512vl_<code><mode>v<ssescalarnum>qi2.
4548 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
4551 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
4554 2020-05-22 Richard Biener <rguenther@suse.de>
4556 PR tree-optimization/95268
4557 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
4560 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
4562 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
4565 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
4567 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
4568 (lto_input_scc): Optimize streaming of entry lengths.
4569 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
4570 (DFS::DFS): Optimize stremaing of entry lengths
4572 2020-05-22 Richard Biener <rguenther@suse.de>
4575 * doc/invoke.texi (flto): Document behavior of diagnostic
4578 2020-05-22 Richard Biener <rguenther@suse.de>
4580 * tree-vectorizer.h (vect_is_simple_use): New overload.
4581 (vect_maybe_update_slp_op_vectype): New.
4582 * tree-vect-stmts.c (vect_is_simple_use): New overload
4583 accessing operands of SLP vs. non-SLP operation transparently.
4584 (vect_maybe_update_slp_op_vectype): New function updating
4585 the possibly shared SLP operands vector type.
4586 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
4587 using the new vect_is_simple_use overload; update SLP invariant
4588 operand nodes vector type.
4589 (vectorizable_comparison): Likewise.
4590 (vectorizable_call): Likewise.
4591 (vectorizable_conversion): Likewise.
4592 (vectorizable_shift): Likewise.
4593 (vectorizable_store): Likewise.
4594 (vectorizable_condition): Likewise.
4595 (vectorizable_assignment): Likewise.
4596 * tree-vect-loop.c (vectorizable_reduction): Likewise.
4597 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
4598 present SLP_TREE_VECTYPE and check it matches previous
4601 2020-05-22 Richard Biener <rguenther@suse.de>
4603 PR tree-optimization/95248
4604 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
4606 2020-05-22 Richard Biener <rguenther@suse.de>
4608 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
4609 (_slp_tree::~_slp_tree): Likewise.
4610 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
4612 (_slp_tree::~_slp_tree): Implement.
4613 (vect_free_slp_tree): Simplify.
4614 (vect_create_new_slp_node): Likewise. Add nops parameter.
4615 (vect_build_slp_tree_2): Adjust.
4616 (vect_analyze_slp_instance): Likewise.
4618 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4620 * adjust-alignment.c: Include memmodel.h.
4622 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
4625 * config/i386/cpuid.h: Use hexadecimal in comments.
4627 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
4630 * config/i386/i386-builtins.c (processor_features): Move
4631 F_AVX512VP2INTERSECT after F_AVX512BF16.
4632 (isa_names_table): Likewise.
4634 2020-05-21 Martin Liska <mliska@suse.cz>
4636 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
4637 Handle OPT_moutline_atomics.
4638 * config/aarch64/aarch64.c: Add outline-atomics to
4640 * doc/extend.texi: Document the newly added target attribute.
4642 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
4646 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
4647 operands 1 and 2 commutative. Manually swap operands.
4648 (*mmx_nabsv2sf2): Ditto.
4651 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
4653 * config/i386/i386.md (*<code>tf2_1):
4654 Mark operands 1 and 2 commutative.
4655 (*nabstf2_1): Ditto.
4656 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
4657 commutative. Do not swap operands.
4658 (*nabs<mode>2): Ditto.
4660 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
4663 * config/i386/sse.md (<code>v8qiv8hi2): Use
4664 simplify_gen_subreg instead of simplify_subreg.
4665 (<code>v8qiv8si2): Ditto.
4666 (<code>v4qiv4si2): Ditto.
4667 (<code>v4hiv4si2): Ditto.
4668 (<code>v8qiv8di2): Ditto.
4669 (<code>v4qiv4di2): Ditto.
4670 (<code>v2qiv2di2): Ditto.
4671 (<code>v4hiv4di2): Ditto.
4672 (<code>v2hiv2di2): Ditto.
4673 (<code>v2siv2di2): Ditto.
4675 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
4678 * config/i386/i386.md (*pushsi2_rex64):
4679 Use "e" constraint instead of "i".
4681 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
4683 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
4684 (lto_input_tree_1): Strenghten sanity check.
4685 (lto_input_tree): Update call of lto_input_scc.
4686 * lto-streamer-out.c: Include ipa-utils.h
4687 (create_output_block): Initialize local_trees if merigng is going
4689 (destroy_output_block): Destroy local_trees.
4690 (DFS): Add max_local_entry.
4691 (local_tree_p): New function.
4692 (DFS::DFS): Initialize and maintain it.
4693 (DFS::DFS_write_tree): Decide on streaming format.
4694 (lto_output_tree): Stream inline singleton SCCs
4695 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
4696 (struct output_block): Add local_trees.
4697 (lto_input_scc): Update prototype.
4699 2020-05-20 Patrick Palka <ppalka@redhat.com>
4702 * hash-table.h (hash_table::find_with_hash): Move up the call to
4705 2020-05-20 Martin Liska <mliska@suse.cz>
4707 * lto-compress.c (lto_compression_zstd): Fill up
4708 num_compressed_il_bytes.
4709 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
4711 2020-05-20 Richard Biener <rguenther@suse.de>
4713 PR tree-optimization/95219
4714 * tree-vect-loop.c (vectorizable_induction): Reduce
4715 group_size before computing the number of required IVs.
4717 2020-05-20 Richard Biener <rguenther@suse.de>
4720 * tree-inline.c (remap_gimple_stmt): Revert adjusting
4721 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
4723 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4724 Andre Vieira <andre.simoesdiasvieira@arm.com>
4727 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
4729 (mve_vector_mem_operand): Likewise.
4730 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
4731 the load from memory to a core register is legitimate for give mode.
4732 (mve_vector_mem_operand): Define function.
4733 (arm_print_operand): Modify comment.
4734 (arm_mode_base_reg_class): Define.
4735 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
4736 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
4737 * config/arm/constraints.md (Ux): Likewise.
4739 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
4740 add support for missing Vector Store Register and Vector Load Register.
4741 Add a new alternative to support load from memory to PC (or label) in
4743 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
4744 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
4745 mve_memory_operand and also modify the MVE instructions to emit.
4746 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
4747 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
4748 mve_memory_operand and also modify the MVE instructions to emit.
4749 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
4750 mve_memory_operand and also modify the MVE instructions to emit.
4751 (mve_vldrhq_z_fv8hf): Likewise.
4752 (mve_vldrhq_z_<supf><mode>): Likewise.
4753 (mve_vldrwq_fv4sf): Likewise.
4754 (mve_vldrwq_<supf>v4si): Likewise.
4755 (mve_vldrwq_z_fv4sf): Likewise.
4756 (mve_vldrwq_z_<supf>v4si): Likewise.
4757 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
4758 (mve_vld1q_<supf><mode>): Likewise.
4759 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
4761 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
4762 mve_memory_operand and also modify the MVE instructions to emit.
4763 (mve_vstrhq_p_<supf><mode>): Likewise.
4764 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
4766 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
4767 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
4768 instructions to emit.
4769 (mve_vstrwq_p_<supf>v4si): Likewise.
4770 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
4771 * config/arm/predicates.md (mve_memory_operand): Define.
4773 2020-05-30 Richard Biener <rguenther@suse.de>
4776 * c-fold.c (c_fully_fold_internal): Enhance guard on
4779 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
4782 * Makefile.in (OBJS): Add adjust-alignment.o.
4783 * adjust-alignment.c (pass_data_adjust_alignment): New.
4784 (pass_adjust_alignment): New.
4785 (pass_adjust_alignment::execute): New.
4786 (make_pass_adjust_alignment): New.
4787 * tree-pass.h (make_pass_adjust_alignment): New.
4788 * passes.def: Add pass_adjust_alignment.
4790 2020-05-19 Alex Coplan <alex.coplan@arm.com>
4793 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
4794 identity permutation.
4796 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
4798 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
4799 msp430_small, msp430_large and size24plus DejaGNU effective
4801 Improve grammar in descriptions for size20plus and size32plus effective
4804 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
4806 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
4807 callee saved registers only in xBPF.
4808 (bpf_expand_prologue): Save callee saved registers only in xBPF.
4809 (bpf_expand_epilogue): Likewise for restoring.
4810 * doc/invoke.texi (eBPF Options): Document this is activated by
4813 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
4815 * config/bpf/bpf.opt (mxbpf): New option.
4816 * doc/invoke.texi (Option Summary): Add -mxbpf.
4817 (eBPF Options): Document -mxbbpf.
4819 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
4822 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
4823 (<code>v32qiv32hi2): Ditto.
4824 (<code>v8qiv8hi2): Ditto.
4825 (<code>v16qiv16si2): Ditto.
4826 (<code>v8qiv8si2): Ditto.
4827 (<code>v4qiv4si2): Ditto.
4828 (<code>v16hiv16si2): Ditto.
4829 (<code>v8hiv8si2): Ditto.
4830 (<code>v4hiv4si2): Ditto.
4831 (<code>v8qiv8di2): Ditto.
4832 (<code>v4qiv4di2): Ditto.
4833 (<code>v2qiv2di2): Ditto.
4834 (<code>v8hiv8di2): Ditto.
4835 (<code>v4hiv4di2): Ditto.
4836 (<code>v2hiv2di2): Ditto.
4837 (<code>v8siv8di2): Ditto.
4838 (<code>v4siv4di2): Ditto.
4839 (<code>v2siv2di2): Ditto.
4841 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
4843 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
4844 (riscv_implied_info): New.
4845 (riscv_subset_list): Add handle_implied_ext.
4846 (riscv_subset_list::to_string): New parameter version_p to
4847 control output format.
4848 (riscv_subset_list::handle_implied_ext): New.
4849 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
4850 (riscv_arch_str): New parameter version_p to control output format.
4851 (riscv_expand_arch): New.
4852 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
4854 * config/riscv/riscv.h (riscv_expand_arch): New,
4855 (EXTRA_SPEC_FUNCTIONS): Define.
4856 (ASM_SPEC): Transform -march= via riscv_expand_arch.
4858 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
4860 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
4861 parse_multiletter_ext.
4862 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
4863 adjust parsing order for 's' and 'x'.
4865 2020-05-19 Richard Biener <rguenther@suse.de>
4867 * tree-vectorizer.h (_slp_tree::vectype): Add field.
4868 (SLP_TREE_VECTYPE): New.
4869 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
4871 (vect_create_new_slp_node): Likewise.
4872 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
4874 (vect_slp_analyze_node_operations): Walk nodes children for
4876 (vect_get_constant_vectors): Use local scope op variable.
4877 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
4878 (vect_model_simple_cost): Adjust.
4879 (vect_model_store_cost): Likewise.
4880 (vectorizable_store): Likewise.
4882 2020-05-18 Martin Sebor <msebor@redhat.com>
4885 * tree-object-size.c (decl_init_size): New function.
4886 (addr_object_size): Call it.
4887 * tree.h (last_field): Declare.
4888 (first_field): Add attribute nonnull.
4890 2020-05-18 Martin Sebor <msebor@redhat.com>
4893 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
4894 * tree.c (component_ref_size): Correct the handling or array members
4896 Drop a pointless test.
4897 Rename a local variable.
4899 2020-05-18 Jason Merrill <jason@redhat.com>
4901 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
4902 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
4904 2020-05-14 Jason Merrill <jason@redhat.com>
4906 * doc/install.texi (Prerequisites): Update boostrap compiler
4907 requirement to C++11/GCC 4.8.
4909 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4911 PR tree-optimization/94952
4912 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
4913 Initialize variables bitpos, bitregion_start, and bitregion_end in
4914 order to silence warnings about use of uninitialized variables.
4916 2020-05-18 Carl Love <cel@us.ibm.com>
4919 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
4920 first_match_index_<mode>.
4921 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
4922 additional test cases with zero vector elements.
4924 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
4927 * config/i386/i386-expand.c (ix86_expand_int_movcc):
4928 Avoid reversing a non-trapping comparison to a trapping one.
4930 2020-05-18 Alex Coplan <alex.coplan@arm.com>
4932 * config/arm/arm.c (output_move_double): Fix codegen when loading into
4933 a register pair with an odd base register.
4935 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
4937 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
4938 Do not emit FLAGS_REG clobber for TFmode.
4939 * config/i386/i386.md (*<code>tf2_1): Rewrite as
4940 define_insn_and_split. Mark operands 1 and 2 commutative.
4941 (*nabstf2_1): Ditto.
4942 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
4943 Do not swap memory operands. Simplify RTX generation.
4944 (neg abs SSE splitter): Ditto.
4945 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
4946 commutative. Do not swap operands. Simplify RTX generation.
4947 (*nabs<mode>2): Ditto.
4949 2020-05-18 Richard Biener <rguenther@suse.de>
4951 * tree-vect-slp.c (vect_slp_bb): Start after labels.
4952 (vect_get_constant_vectors): Really place init stmt after scalar defs.
4953 * tree-vect-stmts.c (vect_init_vector_1): Insert before
4956 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
4958 * config/i386/driver-i386.c (host_detect_local_cpu): Support
4959 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
4962 2020-05-18 Richard Biener <rguenther@suse.de>
4965 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
4966 when inlining into a non-call EH function.
4968 2020-05-18 Richard Biener <rguenther@suse.de>
4970 PR tree-optimization/95172
4971 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
4972 eventually need the conditional processing.
4973 (execute_sm_exit): When processing an orderd sequence
4974 avoid doing any conditional processing.
4975 (hoist_memory_references): Pass down whether all edges
4976 have ordered processing for a ref to execute_sm.
4978 2020-05-17 Jeff Law <law@redhat.com>
4980 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
4981 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
4982 into a single pattern using pc_or_label_operand.
4983 * config/h8300/combiner.md (bit branch patterns): Likewise.
4984 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
4986 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
4989 * config/i386/i386-features.c (has_non_address_hard_reg):
4991 (pseudo_reg_set): This. Return the SET expression. Ignore
4992 pseudo register push.
4993 (general_scalar_to_vector_candidate_p): Combine single_set and
4994 has_non_address_hard_reg calls to pseudo_reg_set.
4995 (timode_scalar_to_vector_candidate_p): Likewise.
4996 * config/i386/i386.md (*pushv1ti2): New pattern.
4998 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5001 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5003 * tree-vrp.c (operand_less_p): Move to...
5004 * vr-values.c (operand_less_p): ...here.
5005 * tree-vrp.h (operand_less_p): Remove.
5007 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5009 * tree-vrp.c (operand_less_p): Move to...
5010 * vr-values.c (operand_less_p): ...here.
5011 * tree-vrp.h (operand_less_p): Remove.
5013 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5015 * tree-vrp.c (class vrp_insert): Remove prototype for
5018 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5020 * tree-vrp.c (class live_names): New.
5021 (live_on_edge): Move into live_names.
5022 (build_assert_expr_for): Move into vrp_insert.
5023 (find_assert_locations_in_bb): Rename from
5024 find_assert_locations_1.
5025 (process_assert_insertions_for): Move into vrp_insert.
5026 (compare_assert_loc): Same.
5027 (remove_range_assertions): Same.
5028 (dump_asserts_for): Rename to vrp_insert::dump.
5029 (debug_asserts_for): Rename to vrp_insert::debug.
5030 (dump_all_asserts): Rename to vrp_insert::dump.
5031 (debug_all_asserts): Rename to vrp_insert::debug.
5033 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5035 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
5036 check_array_ref, check_mem_ref, and search_for_addr_array
5038 (class array_bounds_checker): ...here.
5039 (class check_array_bounds_dom_walker): Adjust to use
5040 array_bounds_checker.
5041 (check_all_array_refs): Move into array_bounds_checker and rename
5043 (class vrp_folder): Make fold_predicate_in private.
5045 2020-05-15 Jeff Law <law@redhat.com>
5047 * config/h8300/h8300.md (SFI iterator): New iterator for
5049 * config/h8300/peepholes.md (memory comparison): Use mode
5050 iterator to consolidate 3 patterns into one.
5051 (stack allocation and stack store): Handle SFmode. Handle
5054 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
5056 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
5057 RS6000_BTM_POWERPC64.
5059 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
5061 * config/i386/i386.md (SWI48DWI): New mode iterator.
5062 (*push<mode>2): Allow XMM registers.
5063 (*pushdi2_rex64): Ditto.
5064 (*pushsi2_rex64): Ditto.
5066 (push XMM reg splitter): New splitter
5068 (*pushdf) Change "x" operand constraint to "v".
5069 (*pushsf_rex64): Ditto.
5072 2020-05-15 Richard Biener <rguenther@suse.de>
5074 PR tree-optimization/92260
5075 * tree-vect-slp.c (vect_get_constant_vectors): Compute
5076 the number of vector stmts in a canonical way.
5078 2020-05-15 Martin Liska <mliska@suse.cz>
5080 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
5083 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
5085 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
5087 2020-05-15 Richard Biener <rguenther@suse.de>
5089 PR tree-optimization/95133
5090 * gimple-ssa-split-paths.c
5091 (find_block_to_duplicate_for_splitting_paths): Check for
5094 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
5096 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
5098 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
5100 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
5103 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
5104 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
5107 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
5110 * config/i386/i386.md (isa): Add sse3_noavx.
5111 (enabled): Handle sse3_noavx.
5113 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
5114 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
5115 alternatives. Match commutative vec_select selector operands.
5116 (*mmx_haddv2sf3_low): New insn pattern.
5118 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
5119 (*mmx_hsubv2sf3_low): New insn pattern.
5121 2020-05-15 Richard Biener <rguenther@suse.de>
5123 PR tree-optimization/33315
5124 * tree-ssa-sink.c: Include tree-eh.h.
5125 (sink_stats): Add commoned member.
5126 (sink_common_stores_to_bb): New function implementing store
5127 commoning by sinking to the successor.
5128 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
5129 (pass_sink_code::execute): Likewise. Record commoned stores
5132 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
5134 PR rtl-optimization/37451, part of PR target/61837
5135 * loop-doloop.c (doloop_simplify_count): New function. Simplify
5136 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
5137 (doloop_modify): Call doloop_simplify_count.
5139 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
5142 * doc/sourcebuild.texi: Document effective target lgccjit.
5144 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
5146 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
5147 define_expand, and rename the original to ...
5148 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
5149 (add<mode>3_zext_dup_exec): Likewise, with ...
5150 (add<mode>3_vcc_zext_dup_exec): ... this.
5151 (add<mode>3_zext_dup2): Likewise, with ...
5152 (add<mode>3_zext_dup_exec): ... this.
5153 (add<mode>3_zext_dup2_exec): Likewise, with ...
5154 (add<mode>3_zext_dup2): ... this.
5155 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
5156 addv64di3_zext* calls to use addv64di3_vcc_zext*.
5158 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
5161 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
5162 (extendv2sfv2df2): Ditto.
5164 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
5166 * configure: Regenerated.
5168 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
5170 * config/arm/arm.c (reg_needs_saving_p): New function.
5171 (use_return_insn): Use reg_needs_saving_p.
5172 (arm_get_vfp_saved_size): Likewise.
5173 (arm_compute_frame_layout): Likewise.
5174 (arm_save_coproc_regs): Likewise.
5175 (thumb1_expand_epilogue): Likewise.
5176 (arm_expand_epilogue_apcs_frame): Likewise.
5177 (arm_expand_epilogue): Likewise.
5179 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
5181 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
5183 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
5186 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
5188 (floatv2siv2df2): New expander.
5189 (floatunsv2siv2df2): New insn pattern.
5191 (fix_truncv2dfv2si2): New expander.
5192 (fixuns_truncv2dfv2si2): New insn pattern.
5194 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
5197 * config/aarch64/aarch64-sve-builtins.cc
5198 (handle_arm_sve_vector_bits_attribute): Create a copy of the
5199 original type's TYPE_MAIN_VARIANT, then reapply all the differences
5200 between the original type and its main variant.
5202 2020-05-14 Richard Biener <rguenther@suse.de>
5205 * real.c (real_to_decimal_for_mode): Make sure we handle
5206 a zero with nonzero exponent.
5208 2020-05-14 Jakub Jelinek <jakub@redhat.com>
5210 * Makefile.in (GTFILES): Add omp-general.c.
5211 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
5212 calls_declare_variant_alt members and initialize them in the
5214 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
5215 calls to declare_variant_alt nodes.
5216 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
5217 and calls_declare_variant_alt.
5218 (input_overwrite_node): Read them back.
5219 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
5221 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
5223 (tree_function_versioning): Copy calls_declare_variant_alt bit.
5224 * omp-offload.c (execute_omp_device_lower): Call
5225 omp_resolve_declare_variant on direct function calls.
5226 (pass_omp_device_lower::gate): Also enable for
5227 calls_declare_variant_alt functions.
5228 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
5229 (omp_context_selector_matches): Handle the case when
5230 cfun->curr_properties has PROP_gimple_any bit set.
5231 (struct omp_declare_variant_entry): New type.
5232 (struct omp_declare_variant_base_entry): New type.
5233 (struct omp_declare_variant_hasher): New type.
5234 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
5236 (omp_declare_variants): New variable.
5237 (struct omp_declare_variant_alt_hasher): New type.
5238 (omp_declare_variant_alt_hasher::hash,
5239 omp_declare_variant_alt_hasher::equal): New methods.
5240 (omp_declare_variant_alt): New variables.
5241 (omp_resolve_late_declare_variant): New function.
5242 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
5243 when called late. Create a magic declare_variant_alt fndecl and
5244 cgraph node and return that if decision needs to be deferred until
5245 after gimplification.
5246 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
5250 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
5251 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
5252 entry block if info->after_stmt is NULL, otherwise add after that stmt
5253 and update it after adding each stmt.
5254 (ipa_simd_modify_function_body): Initialize info.after_stmt.
5256 * function.h (struct function): Add has_omp_target bit.
5257 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
5259 (omp_discover_declare_target_tgt_fn_r): ... this.
5260 (omp_discover_declare_target_var_r): Call
5261 omp_discover_declare_target_tgt_fn_r instead of
5262 omp_discover_declare_target_fn_r.
5263 (omp_discover_implicit_declare_target): Also queue functions with
5264 has_omp_target bit set, for those walk with
5265 omp_discover_declare_target_fn_r, for declare target to functions
5266 walk with omp_discover_declare_target_tgt_fn_r.
5268 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
5271 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
5272 Add SSE/AVX alternative. Change operand predicates from
5273 nonimmediate_operand to register_mmxmem_operand.
5274 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5275 (fix_truncv2sfv2si2): New expander.
5276 (fixuns_truncv2sfv2si2): New insn pattern.
5278 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
5279 Add SSE/AVX alternative. Change operand predicates from
5280 nonimmediate_operand to register_mmxmem_operand.
5281 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5282 (floatv2siv2sf2): New expander.
5283 (floatunsv2siv2sf2): New insn pattern.
5285 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
5287 (IX86_BUILTIN_PI2FD): Ditto.
5289 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
5291 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
5293 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
5296 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
5298 * config/s390/s390.c (allocate_stack_space): Add missing updates
5299 of last_probe_offset.
5301 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
5303 * config/s390/s390.md ("allocate_stack"): Call
5304 anti_adjust_stack_and_probe_stack_clash when stack clash
5305 protection is enabled.
5306 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
5307 prototype. Remove static.
5308 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
5311 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
5313 * config/rs6000/altivec.h (vec_extractl): New #define.
5314 (vec_extracth): Likewise.
5315 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
5316 (UNSPEC_EXTRACTR): Likewise.
5317 (vextractl<mode>): New expansion.
5318 (vextractl<mode>_internal): New insn.
5319 (vextractr<mode>): New expansion.
5320 (vextractr<mode>_internal): New insn.
5321 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
5322 New built-in function.
5323 (__builtin_altivec_vextduhvlx): Likewise.
5324 (__builtin_altivec_vextduwvlx): Likewise.
5325 (__builtin_altivec_vextddvlx): Likewise.
5326 (__builtin_altivec_vextdubvhx): Likewise.
5327 (__builtin_altivec_vextduhvhx): Likewise.
5328 (__builtin_altivec_vextduwvhx): Likewise.
5329 (__builtin_altivec_vextddvhx): Likewise.
5330 (__builtin_vec_extractl): New overloaded built-in function.
5331 (__builtin_vec_extracth): Likewise.
5332 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5333 Define overloaded forms of __builtin_vec_extractl and
5334 __builtin_vec_extracth.
5335 (builtin_function_type): Add cases to mark arguments of new
5336 built-in functions as unsigned.
5337 (rs6000_common_init_builtins): Add
5338 opaque_ftype_opaque_opaque_opaque_opaque.
5339 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
5340 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5341 for a Future Architecture): Add description of vec_extractl and
5342 vec_extractr built-in functions.
5344 2020-05-13 Richard Biener <rguenther@suse.de>
5346 * target.def (add_stmt_cost): Add new vectype parameter.
5347 * targhooks.c (default_add_stmt_cost): Adjust.
5348 * targhooks.h (default_add_stmt_cost): Likewise.
5349 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
5351 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
5352 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
5353 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
5355 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
5356 (dump_stmt_cost): Add new vectype parameter.
5357 (add_stmt_cost): Likewise.
5358 (record_stmt_cost): Likewise.
5359 (record_stmt_cost): Add overload with old signature.
5360 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
5362 (vect_get_known_peeling_cost): Likewise.
5363 (vect_estimate_min_profitable_iters): Likewise.
5364 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
5365 * tree-vect-stmts.c (record_stmt_cost): Likewise.
5366 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
5367 and pass down correct vectype and NULL stmt_info.
5368 (vect_model_simple_cost): Adjust.
5369 (vect_model_store_cost): Likewise.
5371 2020-05-13 Richard Biener <rguenther@suse.de>
5373 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
5374 (_slp_instance::group_size): Likewise.
5375 * tree-vect-loop.c (vectorizable_reduction): The group size
5376 is the number of lanes in the node.
5377 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
5378 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
5379 verify it matches the instance trees number of lanes.
5380 (vect_slp_analyze_node_operations_1): Use the numer of lanes
5381 in the node as group size.
5382 (vect_bb_vectorization_profitable_p): Use the instance root
5383 number of lanes for the size of life.
5384 (vect_schedule_slp_instance): Use the number of lanes as
5386 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
5387 parameter. Use the number of lanes of the load for the group
5388 size in the gap adjustment code.
5389 (vect_analyze_stmt): Adjust.
5390 (vect_transform_stmt): Likewise.
5392 2020-05-13 Jakub Jelinek <jakub@redhat.com>
5395 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
5396 if the last insn is a note.
5398 PR tree-optimization/95060
5399 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
5400 if it is the single use of the FMA internal builtin.
5402 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
5404 PR tree-optimization/94969
5405 * tree-data-dependence.c (constant_access_functions): Rename to...
5406 (invariant_access_functions): ...this. Add parameter. Check for
5407 invariant access function, rather than constant.
5408 (build_classic_dist_vector): Call above function.
5409 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
5411 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
5414 * doc/extend.texi (x86Operandmodifiers): Document more x86
5416 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
5418 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
5420 * tree-vrp.c (class vrp_insert): New.
5421 (insert_range_assertions): Move to class vrp_insert.
5422 (dump_all_asserts): Same as above.
5423 (dump_asserts_for): Same as above.
5424 (live): Same as above.
5425 (need_assert_for): Same as above.
5426 (live_on_edge): Same as above.
5427 (finish_register_edge_assert_for): Same as above.
5428 (find_switch_asserts): Same as above.
5429 (find_assert_locations): Same as above.
5430 (find_assert_locations_1): Same as above.
5431 (find_conditional_asserts): Same as above.
5432 (process_assert_insertions): Same as above.
5433 (register_new_assert_for): Same as above.
5434 (vrp_prop): New variable fun.
5435 (vrp_initialize): New parameter.
5436 (identify_jump_threads): Same as above.
5437 (execute_vrp): Same as above.
5440 2020-05-12 Keith Packard <keith.packard@sifive.com>
5442 * config/riscv/riscv.c (riscv_unique_section): New.
5443 (TARGET_ASM_UNIQUE_SECTION): New.
5445 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
5447 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
5448 * config/riscv/riscv-passes.def: New file.
5449 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
5450 * config/riscv/riscv-shorten-memrefs.c: New file.
5451 * config/riscv/riscv.c (tree-pass.h): New include.
5452 (riscv_compressed_reg_p): New Function
5453 (riscv_compressed_lw_offset_p): Likewise.
5454 (riscv_compressed_lw_address_p): Likewise.
5455 (riscv_shorten_lw_offset): Likewise.
5456 (riscv_legitimize_address): Attempt to convert base + large_offset
5457 to compressible new_base + small_offset.
5458 (riscv_address_cost): Make anticipated compressed load/stores
5459 cheaper for code size than uncompressed load/stores.
5460 (riscv_register_priority): Move compressed register check to
5461 riscv_compressed_reg_p.
5462 * config/riscv/riscv.h (C_S_BITS): Define.
5463 (CSW_MAX_OFFSET): Define.
5464 * config/riscv/riscv.opt (mshorten-memefs): New option.
5465 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
5466 (PASSES_EXTRA): Add riscv-passes.def.
5467 * doc/invoke.texi: Document -mshorten-memrefs.
5469 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
5470 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
5471 * doc/tm.texi: Regenerate.
5472 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
5473 * sched-deps.c (attempt_change): Use old address if it is cheaper than
5475 * target.def (new_address_profitable_p): New hook.
5476 * targhooks.c (default_new_address_profitable_p): New function.
5477 * targhooks.h (default_new_address_profitable_p): Declare.
5479 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
5482 * config/i386/mmx.md (copysignv2sf3): New expander.
5483 (xorsignv2sf3): Ditto.
5484 (signbitv2sf3): Ditto.
5486 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
5489 * config/i386/mmx.md (fmav2sf4): New insn pattern.
5494 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
5496 * Makefile.in (CET_HOST_FLAGS): New.
5497 (COMPILER): Add $(CET_HOST_FLAGS).
5498 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
5499 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
5501 * aclocal.m4: Regenerated.
5502 * configure: Likewise.
5504 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
5507 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
5508 (*mmx_<code>v2sf2): New insn_and_split pattern.
5509 (*mmx_nabsv2sf2): Ditto.
5510 (*mmx_andnotv2sf3): New insn pattern.
5511 (*mmx_<code>v2sf3): Ditto.
5512 * config/i386/i386.md (absneg_op): New code attribute.
5513 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
5514 (ix86_build_signbit_mask): Ditto.
5516 2020-05-12 Richard Biener <rguenther@suse.de>
5518 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
5521 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5523 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
5524 Update prototype to include "local" argument.
5525 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
5526 "local" argument. Handle local common decls.
5527 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
5528 msp430_output_aligned_decl_common call with 0 for "local" argument.
5529 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
5531 2020-05-12 Richard Biener <rguenther@suse.de>
5533 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
5535 2020-05-12 Martin Liska <mliska@suse.cz>
5539 * sanopt.c (sanitize_rewrite_addressable_params):
5540 Clear DECL_NOT_GIMPLE_REG_P for argument.
5542 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
5544 PR tree-optimization/94980
5545 * tree-vect-generic.c (expand_vector_comparison): Use
5546 vector_element_bits_tree to get the element size in bits,
5547 rather than using TYPE_SIZE.
5548 (expand_vector_condition, vector_element): Likewise.
5550 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
5552 PR tree-optimization/94980
5553 * tree-vect-generic.c (build_replicated_const): Take the number
5554 of bits as a parameter, instead of the type of the elements.
5555 (do_plus_minus): Update accordingly, using vector_element_bits
5556 to calculate the correct number of bits.
5557 (do_negate): Likewise.
5559 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
5561 PR tree-optimization/94980
5562 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
5563 * tree.c (vector_element_bits, vector_element_bits_tree): New.
5564 * match.pd: Use the new functions instead of determining the
5565 vector element size directly from TYPE_SIZE(_UNIT).
5566 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
5567 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
5568 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
5569 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
5570 (expand_vector_conversion): Likewise.
5571 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
5572 a divisor. Convert the dividend to bits to compensate.
5573 * tree-vect-loop.c (vectorizable_live_operation): Call
5574 vector_element_bits instead of open-coding it.
5576 2020-05-12 Jakub Jelinek <jakub@redhat.com>
5578 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
5579 * omp-offload.c: Include context.h.
5580 (omp_declare_target_fn_p, omp_declare_target_var_p,
5581 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
5582 omp_discover_implicit_declare_target): New functions.
5583 * cgraphunit.c (analyze_functions): Call
5584 omp_discover_implicit_declare_target.
5586 2020-05-12 Richard Biener <rguenther@suse.de>
5588 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
5589 literal constant &MEM[..] to a constant literal.
5591 2020-05-12 Richard Biener <rguenther@suse.de>
5593 PR tree-optimization/95045
5594 * dbgcnt.def (lim): Add debug-counter.
5595 * tree-ssa-loop-im.c: Include dbgcnt.h.
5596 (find_refs_for_sm): Use lim debug counter for store motion
5598 (do_store_motion): Rename form store_motion. Commit edge
5600 (store_motion_loop): ... here.
5601 (tree_ssa_lim): Adjust.
5603 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5605 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
5606 (vec_ctzm): Rename to vec_cnttzm.
5607 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
5608 Change fourth operand for vec_ternarylogic to require
5609 compatibility with unsigned SImode rather than unsigned QImode.
5610 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5611 Remove overloaded forms of vec_gnb that are no longer needed.
5612 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5613 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
5614 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
5615 vec_gnb; move vec_ternarylogic documentation into this section
5616 and replace const unsigned char with const unsigned int as its
5619 2020-05-11 Carl Love <cel@us.ibm.com>
5621 * config/rs6000/altivec.h (vec_genpcvm): New #define.
5622 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
5624 (XXGENPCVM_V8HI): Likewise.
5625 (XXGENPCVM_V4SI): Likewise.
5626 (XXGENPCVM_V2DI): Likewise.
5627 (XXGENPCVM): New overloaded built-in instantiation.
5628 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
5629 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
5630 (altivec_expand_builtin): Add special handling for
5631 FUTURE_BUILTIN_VEC_XXGENPCVM.
5632 (builtin_function_type): Add handling for
5633 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
5634 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
5635 (UNSPEC_XXGENPCV): New constant.
5636 (xxgenpcvm_<mode>_internal): New insn.
5637 (xxgenpcvm_<mode>): New expansion.
5638 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
5640 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5642 * config/rs6000/altivec.h (vec_strir): New #define.
5643 (vec_stril): Likewise.
5644 (vec_strir_p): Likewise.
5645 (vec_stril_p): Likewise.
5646 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
5647 (UNSPEC_VSTRIL): Likewise.
5648 (vstrir_<mode>): New expansion.
5649 (vstrir_code_<mode>): New insn.
5650 (vstrir_p_<mode>): New expansion.
5651 (vstrir_p_code_<mode>): New insn.
5652 (vstril_<mode>): New expansion.
5653 (vstril_code_<mode>): New insn.
5654 (vstril_p_<mode>): New expansion.
5655 (vstril_p_code_<mode>): New insn.
5656 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
5657 New built-in function.
5658 (__builtin_altivec_vstrihr): Likewise.
5659 (__builtin_altivec_vstribl): Likewise.
5660 (__builtin_altivec_vstrihl): Likewise.
5661 (__builtin_altivec_vstribr_p): Likewise.
5662 (__builtin_altivec_vstrihr_p): Likewise.
5663 (__builtin_altivec_vstribl_p): Likewise.
5664 (__builtin_altivec_vstrihl_p): Likewise.
5665 (__builtin_vec_strir): New overloaded built-in function.
5666 (__builtin_vec_stril): Likewise.
5667 (__builtin_vec_strir_p): Likewise.
5668 (__builtin_vec_stril_p): Likewise.
5669 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5670 Define overloaded forms of __builtin_vec_strir,
5671 __builtin_vec_stril, __builtin_vec_strir_p, and
5672 __builtin_vec_stril_p.
5673 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5674 for a Future Architecture): Add description of vec_stril,
5675 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
5677 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
5679 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
5680 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
5682 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
5683 * config/rs6000/rs6000-builtin.def: Add handling of new macro
5685 (BU_FUTURE_V_4): New macro. Use it.
5686 (BU_FUTURE_OVERLOAD_4): Likewise.
5687 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
5688 handling for quaternary built-in functions.
5689 (altivec_resolve_overloaded_builtin): Add special-case handling
5690 for __builtin_vec_xxeval.
5691 * config/rs6000/rs6000-call.c: Add handling of new macro
5692 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
5693 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
5694 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
5695 (altivec_overloaded_builtins): Add definitions for
5696 FUTURE_BUILTIN_VEC_XXEVAL.
5697 (bdesc_4arg): New array.
5698 (htm_expand_builtin): Add handling for quaternary built-in
5700 (rs6000_expand_quaternop_builtin): New function.
5701 (rs6000_expand_builtin): Add handling for quaternary built-in
5703 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
5704 for unsigned QImode and unsigned HImode.
5705 (builtin_quaternary_function_type): New function.
5706 (rs6000_common_init_builtins): Add handling of quaternary
5708 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
5710 (RS6000_BTC_PREDICATE): Change value of constant.
5711 (RS6000_BTC_ABS): Likewise.
5712 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
5713 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
5714 for a Future Architecture): Add description of vec_ternarylogic
5717 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5719 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
5721 (__builtin_pextd): Likewise.
5722 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
5723 (UNSPEC_PEXTD): Likewise.
5726 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
5727 a Future Architecture): Add descriptions of __builtin_pdepd and
5728 __builtin_pextd functions.
5730 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5732 * config/rs6000/altivec.h (vec_clrl): New #define.
5733 (vec_clrr): Likewise.
5734 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
5735 (UNSPEC_VCLRRB): Likewise.
5738 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
5740 (__builtin_altivec_vclrrb): Likewise.
5741 (__builtin_vec_clrl): New overloaded built-in function.
5742 (__builtin_vec_clrr): Likewise.
5743 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5744 Define overloaded forms of __builtin_vec_clrl and
5746 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5747 for a Future Architecture): Add descriptions of vec_clrl and
5750 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5752 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
5753 built-in function definition.
5754 (__builtin_cnttzdm): Likewise.
5755 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
5756 (UNSPEC_CNTTZDM): Likewise.
5757 (cntlzdm): New insn.
5758 (cnttzdm): Likewise.
5759 * doc/extend.texi (Basic PowerPC Built-in Functions available for
5760 a Future Architecture): Add descriptions of __builtin_cntlzdm and
5761 __builtin_cnttzdm functions.
5763 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
5766 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
5768 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5770 * config/rs6000/altivec.h (vec_cfuge): New #define.
5771 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
5772 (vcfuged): New insn.
5773 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
5774 New built-in function.
5775 * config/rs6000/rs6000-call.c (builtin_function_type): Add
5776 handling for FUTURE_BUILTIN_VCFUGED case.
5777 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5778 for a Future Architecture): Add description of vec_cfuge built-in
5781 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5783 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
5785 (BU_FUTURE_MISC_1): Likewise.
5786 (BU_FUTURE_MISC_2): Likewise.
5787 (BU_FUTURE_MISC_3): Likewise.
5788 (__builtin_cfuged): New built-in function definition.
5789 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
5791 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
5792 a Future Architecture): New subsubsection.
5794 2020-05-11 Richard Biener <rguenther@suse.de>
5796 PR tree-optimization/95049
5797 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
5798 between different constants.
5800 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
5802 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
5804 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5805 Bill Schmidt <wschmidt@linux.ibm.com>
5807 * config/rs6000/altivec.h (vec_gnb): New #define.
5808 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
5810 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
5812 (BU_FUTURE_OVERLOAD_2): Likewise.
5813 (BU_FUTURE_OVERLOAD_3): Likewise.
5814 (__builtin_altivec_gnb): New built-in function.
5815 (__buiiltin_vec_gnb): New overloaded built-in function.
5816 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5817 Define overloaded forms of __builtin_vec_gnb.
5818 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
5819 of __builtin_vec_gnb.
5820 (builtin_function_type): Mark return value and arguments unsigned
5821 for FUTURE_BUILTIN_VGNB.
5822 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5823 for a Future Architecture): Add description of vec_gnb built-in
5826 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5827 Bill Schmidt <wschmidt@linux.ibm.com>
5829 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
5831 (vec_pext): Likewise.
5832 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
5833 (UNSPEC_VPEXTD): Likewise.
5836 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
5838 (__builtin_altivec_vpextd): Likewise.
5839 * config/rs6000/rs6000-call.c (builtin_function_type): Add
5840 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
5842 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
5843 for a Future Architecture): Add description of vec_pdep and
5844 vec_pext built-in functions.
5846 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5847 Bill Schmidt <wschmidt@linux.ibm.com>
5849 * config/rs6000/altivec.h (vec_clzm): New macro.
5850 (vec_ctzm): Likewise.
5851 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
5852 (UNSPEC_VCTZDM): Likewise.
5855 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
5856 (BU_FUTURE_V_1): Likewise.
5857 (BU_FUTURE_V_2): Likewise.
5858 (BU_FUTURE_V_3): Likewise.
5859 (__builtin_altivec_vclzdm): New builtin definition.
5860 (__builtin_altivec_vctzdm): Likewise.
5861 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
5862 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
5864 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
5865 value and parameter types to be unsigned for VCLZDM and VCTZDM.
5866 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
5867 support for TARGET_FUTURE flag.
5868 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
5869 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
5870 for a Future Architecture): New subsubsection.
5872 2020-05-11 Richard Biener <rguenther@suse.de>
5874 PR tree-optimization/94988
5875 PR tree-optimization/95025
5876 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
5877 (sm_seq_push_down): Take extra parameter denoting where we
5879 (execute_sm_exit): Re-issue sm_other stores in the correct
5881 (sm_seq_valid_bb): When always executed, allow sm_other to
5882 prevail inbetween sm_ord and record their stored value.
5883 (hoist_memory_references): Adjust refs_not_supported propagation
5884 and prune sm_other from the end of the ordered sequences.
5886 2020-05-11 Felix Yang <felix.yang@huawei.com>
5889 * config/aarch64/aarch64.md (mov<mode>):
5890 Bitcasts to the equivalent integer mode using gen_lowpart
5891 instead of doing FAIL for scalar floating point move.
5893 2020-05-11 Alex Coplan <alex.coplan@arm.com>
5895 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
5896 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
5897 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
5898 (*csinv3_uxtw_insn2): New.
5899 (*csinv3_uxtw_insn3): New.
5900 * config/aarch64/iterators.md (neg_not_cs): New.
5902 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
5905 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
5906 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
5907 (*mmx_addv2sf3): Ditto.
5908 (*mmx_subv2sf3): Ditto.
5909 (*mmx_mulv2sf3): Ditto.
5910 (*mmx_<code>v2sf3): Ditto.
5911 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
5913 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
5916 * config/i386/i386.c (ix86_vector_mode_supported_p):
5917 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
5918 * config/i386/mmx.md (*mov<mode>_internal): Do not set
5919 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
5921 (mmx_addv2sf3): Change operand predicates from
5922 nonimmediate_operand to register_mmxmem_operand.
5923 (addv2sf3): New expander.
5924 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
5925 predicates from nonimmediate_operand to register_mmxmem_operand.
5926 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5928 (mmx_subv2sf3): Change operand predicate from
5929 nonimmediate_operand to register_mmxmem_operand.
5930 (mmx_subrv2sf3): Ditto.
5931 (subv2sf3): New expander.
5932 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
5933 predicates from nonimmediate_operand to register_mmxmem_operand.
5934 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5936 (mmx_mulv2sf3): Change operand predicates from
5937 nonimmediate_operand to register_mmxmem_operand.
5938 (mulv2sf3): New expander.
5939 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
5940 predicates from nonimmediate_operand to register_mmxmem_operand.
5941 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5943 (mmx_<code>v2sf3): Change operand predicates from
5944 nonimmediate_operand to register_mmxmem_operand.
5945 (<code>v2sf3): New expander.
5946 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
5947 predicates from nonimmediate_operand to register_mmxmem_operand.
5948 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5949 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
5951 2020-05-11 Martin Liska <mliska@suse.cz>
5954 * common.opt: Fix typo in option description.
5956 2020-05-11 Martin Liska <mliska@suse.cz>
5958 PR gcov-profile/94928
5959 * gcov-io.h: Add caveat about coverage format parsing and
5960 possible outdated documentation.
5962 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
5964 PR tree-optimization/83403
5965 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
5966 determine_value_range, Add fold conversion of MULT_EXPR, fix the
5969 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
5971 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
5972 __ILP32__ for 32-bit targets.
5974 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
5976 * tree.h (expr_align): Delete.
5977 * tree.c (expr_align): Likewise.
5979 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
5981 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
5982 from end_of_function_needs.
5984 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
5985 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
5987 * config/cris/t-elfmulti: Remove crisv32 multilib.
5988 * config/cris: Remove shared-library and CRIS v32 support.
5990 Move trivially from cc0 to reg:CC model, removing most optimizations.
5991 * config/cris/cris.md: Remove all side-effect patterns and their
5992 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
5993 to all but post-reload control-flow and movem insns. Remove
5994 constraints on all modified expanders. Remove obsoleted cc0-related
5996 (attr "cc"): Remove alternative "rev".
5997 (mode_iterator BWDD, DI_, SI_): New.
5998 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
5999 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
6000 ("mstep_shift", "mstep_mul"): Remove patterns.
6001 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
6002 * config/cris/cris.c: Change all non-condition-code,
6003 non-control-flow emitted insns to add a parallel with clobber of
6004 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
6005 emit_insn to use of emit_move_insn, gen_add2_insn or
6006 cris_emit_insn, as convenient.
6007 (cris_reg_overlap_mentioned_p)
6008 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
6009 (cris_movem_load_rest_p): Don't assume all elements in a
6011 (cris_store_multiple_op_p): Ditto.
6012 (cris_emit_insn): New function.
6013 * cris/cris-protos.h (cris_emit_insn): Declare.
6016 * config/cris/cris.md (zcond): New code_iterator.
6017 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
6019 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
6021 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
6023 * config/cris/cris.md ("movsi"): For memory destination
6024 post-reload, generate clobberless variant. Similarly for a
6025 zero-source post-reload.
6026 ("*mov_tomem<mode>_split"): New split.
6027 ("*mov_tomem<mode>"): New insn.
6028 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
6029 "Q>m" for less-than-SImode.
6030 ("*mov_fromzero<mode>_split"): New split.
6031 ("*mov_fromzero<mode>"): New insn.
6033 Prepare for cmpelim pass to eliminate redundant compare insns.
6034 * config/cris/cris-modes.def: New file.
6035 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
6036 (cris_notice_update_cc): Remove left-over declaration.
6037 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
6038 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
6039 * config/cris/cris.h (SELECT_CC_MODE): Define.
6040 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
6042 (cond): New code_iterator.
6043 (nzcond): Replacement for incorrect ncond. All callers changed.
6044 (nzvccond): Replacement for ocond. All callers changed.
6045 (rnzcond): Replacement for rcond. All callers changed.
6046 (xCC): New code_attr.
6047 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
6049 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
6050 CCmode with iteration over NZVCSET.
6051 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
6053 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
6054 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
6055 ("*btst<mode>"): Similarly, from "*btst".
6056 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
6057 iterating over cond instead of matching the comparison with
6058 ordered_comparison_operator.
6059 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
6060 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
6062 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
6063 NZVCUSE. Remove FIXME.
6064 ("*b<nzcond:code>_reversed<mode>"): Similarly from
6065 "*b<ncond:code>_reversed", over NZUSE.
6066 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
6067 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
6068 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
6069 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
6070 depending on CC_NZmode vs. CCmode. Remove FIXME.
6071 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
6072 "*b<rcond:code>_reversed", over NZUSE.
6073 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
6074 iterating over cond instead of matching the comparison with
6075 ordered_comparison_operator.
6076 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
6077 iterating over NZUSE.
6078 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
6079 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
6080 depending on CC_NZmode vs. CCmode.
6081 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
6082 NZVCUSE. Remove FIXME.
6083 ("cc"): Comment on new use.
6084 ("cc_enabled"): New attribute.
6085 ("enabled"): Make default fall back to cc_enabled.
6086 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
6087 default_subst_attrs.
6088 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
6089 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
6090 "*movsi_internal". Correct contents of, and rename attribute
6091 "cc" to "cc<cccc><ccnz><ccnzvc>".
6092 ("anz", "anzvc", "acc"): New define_subst_attrs.
6093 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
6094 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
6095 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
6096 "movqi". Correct contents of, and rename "cc" attribute to
6097 "cc<cccc><ccnz><ccnzvc>".
6098 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
6099 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
6100 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
6101 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
6102 Rename from "extend<mode>si2".
6103 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
6104 Similar, from "zero_extend<mode>si2".
6105 ("*adddi3<setnz>"): Rename from "*adddi3".
6106 ("*subdi3<setnz>"): Similarly from "*subdi3".
6107 ("*addsi3<setnz>"): Similarly from "*addsi3".
6108 ("*subsi3<setnz>"): Similarly from "*subsi3".
6109 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
6110 "cc" attribute to "cc<ccnz>".
6111 ("*addqi3<setnz>"): Similarly from "*addqi3".
6112 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
6113 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
6115 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
6116 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
6117 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
6118 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
6119 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
6120 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
6121 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
6122 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
6124 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
6126 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
6128 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
6130 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
6132 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
6134 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
6135 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
6136 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
6137 (znnCC, rznnCC): New code_attrs.
6138 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
6139 obseolete comment. Add belt-and-suspenders mode-test to condition.
6140 Add fixme regarding remaining matched-but-not-generated case.
6141 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
6142 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
6143 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
6144 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
6145 Handle output of CC_ZnNmode.
6146 ("*b<nzcond:code>_reversed<mode>"): Ditto.
6148 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
6149 NEG too. Correct comment.
6150 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
6153 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
6155 * ira-color.c (update_costs_from_allocno): Remove
6156 conflict_cost_update_p argument. Propagate costs only along
6157 threads. Always do conflict cost update. Add printing debugging
6159 (update_costs_from_copies): Add printing debugging info.
6160 (restore_costs_from_copies): Ditto.
6161 (assign_hard_reg): Improve debug info.
6162 (push_only_colorable): Ditto. Call update_costs_from_prefs.
6163 (color_allocnos): Remove update_costs_from_prefs.
6165 2020-05-08 Richard Biener <rguenther@suse.de>
6167 * tree-vectorizer.h (vec_info::slp_loads): New.
6168 (vect_optimize_slp): Declare.
6169 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
6170 nothing when there are no loads.
6171 (vect_gather_slp_loads): Gather loads into a vector.
6172 (vect_supported_load_permutation_p): Remove.
6173 (vect_analyze_slp_instance): Do not verify permutation
6175 (vect_analyze_slp): Optimize permutations of reductions
6176 after all SLP instances have been gathered and gather
6178 (vect_optimize_slp): New function split out from
6179 vect_supported_load_permutation_p. Elide some permutations.
6180 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
6181 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
6182 * tree-vect-stmts.c (vectorizable_load): Check whether
6183 the load can be permuted. When generating code assert we can.
6185 2020-05-08 Richard Biener <rguenther@suse.de>
6187 * tree-ssa-sccvn.c (rpo_avail): Change type to
6188 eliminate_dom_walker *.
6189 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
6190 use the DOM walker availability.
6191 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
6192 with vn_valueize as valueization callback.
6193 (vn_reference_maybe_forwprop_address): Likewise.
6194 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
6195 array_ref_low_bound.
6197 2020-05-08 Jakub Jelinek <jakub@redhat.com>
6199 PR tree-optimization/94786
6200 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
6204 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
6208 * tree.c (get_narrower): Reuse the op temporary instead of
6211 PR tree-optimization/94783
6212 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
6215 PR tree-optimization/94956
6216 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
6217 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
6219 PR tree-optimization/94913
6220 * match.pd (A - B + -1 >= A to B >= A): New simplification.
6221 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
6222 true for TYPE_UNSIGNED integral types.
6225 PR rtl-optimization/94516
6226 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
6228 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
6229 Call df_notes_rescan if that argument is not true and returning true.
6230 * combine.c (adjust_for_new_dest): Pass true as second argument to
6231 remove_reg_equal_equiv_notes.
6232 * postreload.c (reload_combine_recognize_pattern): Don't call
6235 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
6237 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
6239 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
6240 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
6241 (*neg_ne_<mode>): Likewise.
6243 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
6245 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
6247 (*setbcr_<un>signed_<GPR:mode>): Likewise.
6248 (cstore<mode>4): Use setbc[r] if available.
6249 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
6250 (eq<mode>3): Use setbc for TARGET_FUTURE.
6251 (*eq<mode>3): Avoid for TARGET_FUTURE.
6252 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
6253 else for non-Pmode, use gen_eq and gen_xor.
6254 (*ne<mode>3): Avoid for TARGET_FUTURE.
6255 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
6257 2020-05-07 Jeff Law <law@redhat.com>
6259 * config/h8300/h8300.md: Move expanders and patterns into
6260 files based on functionality.
6261 * config/h8300/addsub.md: New file.
6262 * config/h8300/bitfield.md: New file
6263 * config/h8300/combiner.md: New file
6264 * config/h8300/divmod.md: New file
6265 * config/h8300/extensions.md: New file
6266 * config/h8300/jumpcall.md: New file
6267 * config/h8300/logical.md: New file
6268 * config/h8300/movepush.md: New file
6269 * config/h8300/multiply.md: New file
6270 * config/h8300/other.md: New file
6271 * config/h8300/proepi.md: New file
6272 * config/h8300/shiftrotate.md: New file
6273 * config/h8300/testcompare.md: New file
6275 * config/h8300/h8300.md (adds/subs splitters): Merge into single
6277 (negation expanders and patterns): Simplify and combine using
6279 (one_cmpl expanders and patterns): Likewise.
6280 (tablejump, indirect_jump patterns ): Likewise.
6281 (shift and rotate expanders and patterns): Likewise.
6282 (absolute value expander and pattern): Drop expander, rename pattern
6284 (peephole2 patterns): Move into...
6285 * config/h8300/peepholes.md: New file.
6287 * config/h8300/constraints.md (L and N): Simplify now that we're not
6288 longer supporting the original H8/300 chip.
6289 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
6290 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
6291 (shift_alg_hi, shift_alg_si): Similarly.
6292 (h8300_option_overrides): Similarly. Default to H8/300H. If
6293 compiling for H8/S, then turn off H8/300H. Do not update the
6294 shift_alg tables for H8/300 port.
6295 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
6297 (push, split_adds_subs, h8300_rtx_costs): Likewise.
6298 (h8300_print_operand, compute_mov_length): Likewise.
6299 (output_plussi, compute_plussi_length): Likewise.
6300 (compute_plussi_cc, output_logical_op): Likewise.
6301 (compute_logical_op_length, compute_logical_op_cc): Likewise.
6302 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
6303 (output_a_shift, compute_a_shift_length): Likewise.
6304 (output_a_rotate, compute_a_rotate_length): Likewise.
6305 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
6306 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
6307 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
6308 (attr_cpu, TARGET_H8300): Remove.
6309 (TARGET_DEFAULT): Update.
6310 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
6311 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
6312 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
6313 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
6314 * config/h8300/h8300.md: Simplify patterns throughout.
6315 * config/h8300/t-h8300: Update multilib configuration.
6317 * config/h8300/h8300.h (LINK_SPEC): Remove.
6318 (USER_LABEL_PREFIX): Likewise.
6320 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
6321 (h8300_option_override): Remove remnants of COFF support.
6323 2020-05-07 Alan Modra <amodra@gmail.com>
6325 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
6326 set_rtx_cost with set_src_cost.
6327 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
6329 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
6331 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
6332 redundant half vector handlings for no peeling gaps.
6334 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
6336 * tree-ssa-operands.c (operands_scanner): New class.
6337 (operands_bitmap_obstack): Remove.
6338 (n_initialized): Remove.
6339 (build_uses): Move to operands_scanner class.
6340 (build_vuse): Same as above.
6341 (build_vdef): Same as above.
6342 (verify_ssa_operands): Same as above.
6343 (finalize_ssa_uses): Same as above.
6344 (cleanup_build_arrays): Same as above.
6345 (finalize_ssa_stmt_operands): Same as above.
6346 (start_ssa_stmt_operands): Same as above.
6347 (append_use): Same as above.
6348 (append_vdef): Same as above.
6349 (add_virtual_operand): Same as above.
6350 (add_stmt_operand): Same as above.
6351 (get_mem_ref_operands): Same as above.
6352 (get_tmr_operands): Same as above.
6353 (maybe_add_call_vops): Same as above.
6354 (get_asm_stmt_operands): Same as above.
6355 (get_expr_operands): Same as above.
6356 (parse_ssa_operands): Same as above.
6357 (finalize_ssa_defs): Same as above.
6358 (build_ssa_operands): Same as above, plus create a C-like wrapper.
6359 (update_stmt_operands): Create an instance of operands_scanner.
6361 2020-05-07 Richard Biener <rguenther@suse.de>
6364 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
6365 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
6366 (refered_from_nonlocal_var): Likewise.
6367 (ipa_pta_execute): Likewise.
6369 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
6371 * gcc/tree-ssa-struct-alias.c: Fix comments
6373 2020-05-07 Martin Liska <mliska@suse.cz>
6375 * doc/invoke.texi: Fix 2 optindex entries.
6377 2020-05-07 Richard Biener <rguenther@suse.de>
6380 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
6381 (tree_decl_common::not_gimple_reg_flag): ... to this.
6382 * tree.h (DECL_GIMPLE_REG_P): Rename ...
6383 (DECL_NOT_GIMPLE_REG_P): ... to this.
6384 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
6385 (create_tmp_reg): Simplify.
6386 (create_tmp_reg_fn): Likewise.
6387 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
6388 * gimplify.c (create_tmp_from_val): Simplify.
6389 (gimplify_bind_expr): Likewise.
6390 (gimplify_compound_literal_expr): Likewise.
6391 (gimplify_function_tree): Likewise.
6392 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
6393 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
6394 (asan_add_global): Copy it.
6395 * cgraphunit.c (cgraph_node::expand_thunk): Force args
6397 * function.c (gimplify_parameters): Copy
6398 DECL_NOT_GIMPLE_REG_P.
6399 * ipa-param-manipulation.c
6400 (ipa_param_body_adjustments::common_initialization): Simplify.
6401 (ipa_param_body_adjustments::reset_debug_stmts): Copy
6402 DECL_NOT_GIMPLE_REG_P.
6403 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
6404 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
6405 * tree-cfg.c (make_blocks_1): Simplify.
6406 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
6407 * tree-eh.c (lower_eh_constructs_2): Simplify.
6408 * tree-inline.c (declare_return_variable): Adjust and
6410 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
6411 (copy_result_decl_to_var): Likewise.
6412 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
6413 * tree-nested.c (create_tmp_var_for): Simplify.
6414 * tree-parloops.c (separate_decls_in_region_name): Copy
6415 DECL_NOT_GIMPLE_REG_P.
6416 * tree-sra.c (create_access_replacement): Adjust and
6417 generalize partial def support.
6418 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
6419 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
6420 * tree-ssa.c (maybe_optimize_var): Handle clearing of
6421 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
6423 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
6424 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
6425 DECL_NOT_GIMPLE_REG_P.
6426 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
6427 * cfgexpand.c (avoid_type_punning_on_regs): New.
6428 (discover_nonconstant_array_refs): Call
6429 avoid_type_punning_on_regs to avoid unsupported mode punning.
6431 2020-05-07 Alex Coplan <alex.coplan@arm.com>
6433 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
6436 2020-05-07 Richard Biener <rguenther@suse.de>
6438 PR tree-optimization/57359
6439 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
6440 (in_mem_ref::dep_loop): Repurpose.
6441 (LOOP_DEP_BIT): Remove.
6442 (enum dep_kind): New.
6443 (enum dep_state): Likewise.
6444 (record_loop_dependence): New function to populate the
6446 (query_loop_dependence): New function to query the dependence
6448 (memory_accesses::refs_in_loop): Rename to ...
6449 (memory_accesses::refs_loaded_in_loop): ... this and change to
6451 (outermost_indep_loop): Adjust.
6452 (mem_ref_alloc): Likewise.
6453 (gather_mem_refs_stmt): Likewise.
6454 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
6455 (struct sm_aux): New.
6456 (execute_sm): Split code generation on exits, record state
6458 (enum sm_kind): New.
6459 (execute_sm_exit): Exit code generation part.
6460 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
6461 dependence checking on stores reached from exits.
6462 (sm_seq_valid_bb): New function gathering SM stores on exits.
6463 (hoist_memory_references): Re-implement.
6464 (refs_independent_p): Add tbaa_p parameter and pass it down.
6465 (record_dep_loop): Remove.
6466 (ref_indep_loop_p_1): Fold into ...
6467 (ref_indep_loop_p): ... this and generalize for three kinds
6468 of dependence queries.
6469 (can_sm_ref_p): Adjust according to hoist_memory_references
6471 (store_motion_loop): Don't do anything if the set of SM
6472 candidates is empty.
6473 (tree_ssa_lim_initialize): Adjust.
6474 (tree_ssa_lim_finalize): Likewise.
6476 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
6477 Pierre-Marie de Rodat <derodat@adacore.com>
6479 * dwarf2out.c (add_data_member_location_attribute): Take into account
6480 the variant part offset in the computation of the data bit offset.
6481 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
6482 in the call to field_byte_offset.
6483 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
6484 confusing assertion.
6485 (analyze_variant_discr): Deal with boolean subtypes.
6487 2020-05-07 Martin Liska <mliska@suse.cz>
6489 * lto-wrapper.c: Split arguments of MAKE environment
6492 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
6494 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
6495 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
6496 fenv_var and new_fenv_var.
6498 2020-05-06 Jakub Jelinek <jakub@redhat.com>
6501 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
6503 (avx512dq_vextract<shuffletype>64x2_1_maskm,
6504 avx512f_vextract<shuffletype>32x4_1_maskm,
6505 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
6506 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
6508 (*avx512dq_vextract<shuffletype>64x2_1,
6509 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
6510 define_insns. Even in the masked variant allow memory output but in
6511 that case use 0 rather than 0C constraint on the source of masked-out
6513 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
6515 (*avx512f_vextract<shuffletype>32x4_1,
6516 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
6517 Even in the masked variant allow memory output but in that case use
6518 0 rather than 0C constraint on the source of masked-out elts.
6519 (vec_extract_lo_<mode><mask_name>): Split into ...
6520 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
6521 define_insns. Even in the masked variant allow memory output but in
6522 that case use 0 rather than 0C constraint on the source of masked-out
6524 (vec_extract_hi_<mode><mask_name>): Split into ...
6525 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
6526 define_insns. Even in the masked variant allow memory output but in
6527 that case use 0 rather than 0C constraint on the source of masked-out
6530 2020-05-06 qing zhao <qing.zhao@oracle.com>
6533 * common.opt: Add -flarge-source-files.
6534 * doc/invoke.texi: Document it.
6535 * toplev.c (process_options): set line_table->default_range_bits
6536 to 0 when flag_large_source_files is true.
6538 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
6541 * config/i386/predicates.md (add_comparison_operator): New predicate.
6542 * config/i386/i386.md (compare->add splitter): New splitters.
6544 2020-05-06 Richard Biener <rguenther@suse.de>
6546 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
6547 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
6548 Remove slp_instance parameter, just iterate over all scalar stmts.
6549 (vect_slp_analyze_instance_dependence): Adjust and likewise.
6550 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
6552 (vect_schedule_slp): Just iterate over all scalar stmts.
6553 (vect_supported_load_permutation_p): Adjust.
6554 (vect_transform_slp_perm_load): Remove slp_instance parameter,
6555 instead use the number of lanes in the node as group size.
6556 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
6557 factor instead of slp_instance as parameter.
6558 (vectorizable_load): Adjust.
6560 2020-05-06 Andreas Schwab <schwab@suse.de>
6562 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
6563 (aarch64_get_extension_string_for_isa_flags): Don't declare.
6565 2020-05-06 Richard Biener <rguenther@suse.de>
6568 * cfgloopmanip.c (create_preheader): Require non-complex
6569 preheader edge for CP_SIMPLE_PREHEADERS.
6571 2020-05-06 Richard Biener <rguenther@suse.de>
6573 PR tree-optimization/94963
6574 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
6575 no-warning marking of the conditional store.
6576 (execute_sm): Instead mark the uninitialized state
6577 on loop entry to be not warned about.
6579 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
6581 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
6582 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
6583 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
6584 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
6586 * config/i386/i386-builtin.def: Add new builtins.
6587 * config/i386/i386-c.c (ix86_target_macros_internal): Define
6589 * config/i386/i386-options.c (ix86_target_string): Add
6591 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
6592 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
6594 * config/i386/i386.md (define_c_enum "unspec"): Add
6595 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
6596 (TSXLDTRK): New define_int_iterator.
6597 ("<tsxldtrk>"): New define_insn.
6598 * config/i386/i386.opt: Add -mtsxldtrk.
6599 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
6600 * config/i386/tsxldtrkintrin.h: New.
6601 * doc/invoke.texi: Document -mtsxldtrk.
6603 2020-05-06 Jakub Jelinek <jakub@redhat.com>
6605 PR tree-optimization/94921
6606 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
6609 2020-05-06 Richard Biener <rguenther@suse.de>
6611 PR tree-optimization/94965
6612 * tree-vect-stmts.c (vectorizable_load): Fix typo.
6614 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6616 * doc/install.texi: Replace Sun with Solaris as appropriate.
6617 (Tools/packages necessary for building GCC, Perl version between
6618 5.6.1 and 5.6.24): Remove Solaris 8 reference.
6619 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
6621 (Specific, i?86-*-solaris2*): Update version references for
6622 Solaris 11.3 and later. Remove gas 2.26 caveat.
6623 (Specific, *-*-solaris2*): Update version references for
6624 Solaris 11.3 and later. Remove boehm-gc reference.
6625 Document GMP, MPFR caveats on Solaris 11.3.
6626 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
6627 (Specific, sparc64-*-solaris2*): Likewise.
6628 Document --build requirement.
6630 2020-05-06 Jakub Jelinek <jakub@redhat.com>
6633 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
6634 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
6636 PR rtl-optimization/94873
6637 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
6638 note if SET_SRC (set) has side-effects.
6640 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
6641 Wei Xiao <wei3.xiao@intel.com>
6643 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
6644 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
6645 (ix86_handle_option): Handle -mserialize.
6646 * config.gcc (serializeintrin.h): New header file.
6647 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
6648 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
6650 * config/i386/i386-builtin.def: Add new builtin.
6651 * config/i386/i386-c.c (__SERIALIZE__): New macro.
6652 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
6654 * (ix86_valid_target_attribute_inner_p): Add target attribute
6656 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
6658 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
6659 (serialize): New define_insn.
6660 * config/i386/i386.opt (mserialize): New option
6661 * config/i386/immintrin.h: Include serailizeintrin.h.
6662 * config/i386/serializeintrin.h: New header file.
6663 * doc/invoke.texi: Add documents for -mserialize.
6665 2020-05-06 Richard Biener <rguenther@suse.de>
6667 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
6668 to/from pointer conversion checking.
6670 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
6672 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
6674 * config/rs6000/rs6000-c.c: Likewise.
6675 * config/rs6000/rs6000-call.c: Likewise.
6676 * config/rs6000/rs6000.c: Likewise.
6678 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
6680 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
6681 (RTEMS_ENDFILE_SPEC): Likewise.
6682 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
6683 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
6684 (LIB_SPECS): Support -nodefaultlibs option.
6685 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
6686 (RTEMS_ENDFILE_SPEC): Likewise.
6687 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
6688 (RTEMS_ENDFILE_SPEC): Likewise.
6689 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
6690 (RTEMS_ENDFILE_SPEC): Likewise.
6692 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6694 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
6695 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
6697 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6699 * config/pru/pru.h: Mark R3.w0 as caller saved.
6701 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6703 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
6704 and gen_doloop_begin_internal.
6705 (pru_reorg_loop): Use gen_pruloop with mode.
6706 * config/pru/pru.md: Use new @insn syntax.
6708 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6710 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
6712 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
6714 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
6715 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
6716 (addqi3_cconly_overflow): Ditto.
6717 (umulv<mode>4): Ditto.
6718 (<s>mul<mode>3_highpart): Ditto.
6719 (tls_global_dynamic_32): Ditto.
6720 (tls_local_dynamic_base_32): Ditto.
6727 (*adddi_4): Remove "m" constraint from scratch operand.
6728 (*add<mode>_4): Ditto.
6730 2020-05-05 Jakub Jelinek <jakub@redhat.com>
6732 PR rtl-optimization/94516
6733 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
6734 with sp = reg, add REG_EQUAL note with sp + const.
6735 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
6736 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
6737 postreload sp = sp + const to sp = reg optimization if needed and
6739 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
6740 reg = sp insn with sp + const REG_EQUAL note. Adjust
6741 try_apply_stack_adjustment caller, call
6742 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
6743 (combine_stack_adjustments): Allocate and free LIVE bitmap,
6744 adjust combine_stack_adjustments_for_block caller.
6746 2020-05-05 Martin Liska <mliska@suse.cz>
6748 PR gcov-profile/93623
6749 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
6752 2020-05-05 Martin Liska <mliska@suse.cz>
6754 * opt-functions.awk (opt_args_non_empty): New function.
6755 * opt-read.awk: Use the function for various option arguments.
6757 2020-05-05 Martin Liska <mliska@suse.cz>
6760 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
6761 report warning when the jobserver is not detected.
6763 2020-05-05 Martin Liska <mliska@suse.cz>
6765 PR gcov-profile/94636
6766 * gcov.c (main): Print total lines summary at the end.
6767 (generate_results): Expect file_name always being non-null.
6768 Print newline after intermediate file is printed in order to align with
6769 what we do for normal files.
6771 2020-05-05 Martin Liska <mliska@suse.cz>
6773 * dumpfile.c (dump_switch_p): Change return type
6774 and print option suggestion.
6775 * dumpfile.h: Change return type.
6776 * opts-global.c (handle_common_deferred_options):
6777 Move error into dump_switch_p function.
6779 2020-05-05 Martin Liska <mliska@suse.cz>
6782 * alloc-pool.h: Use const for some arguments.
6783 * bitmap.h: Likewise.
6784 * mem-stats.h: Likewise.
6785 * sese.h (get_entry_bb): Likewise.
6786 (get_exit_bb): Likewise.
6788 2020-05-05 Richard Biener <rguenther@suse.de>
6790 * tree-vect-slp.c (struct vdhs_data): New.
6791 (vect_detect_hybrid_slp): New walker.
6792 (vect_detect_hybrid_slp): Rewrite.
6794 2020-05-05 Richard Biener <rguenther@suse.de>
6797 * tree-ssa-structalias.c (ipa_pta_execute): Use
6798 varpool_node::externally_visible_p ().
6799 (refered_from_nonlocal_var): Likewise.
6801 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
6803 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
6804 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
6805 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
6807 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
6809 * gimplify.c (gimplify_init_constructor): Do not put the constructor
6810 into static memory if it is not complete.
6812 2020-05-05 Richard Biener <rguenther@suse.de>
6814 PR tree-optimization/94949
6815 * tree-ssa-loop-im.c (execute_sm): Check whether we use
6816 the multithreaded model or always compute the stored value
6817 before eliding a load.
6819 2020-05-05 Alex Coplan <alex.coplan@arm.com>
6821 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
6823 2020-05-05 Jakub Jelinek <jakub@redhat.com>
6825 PR tree-optimization/94800
6826 * match.pd (X + (X << C) to X * (1 + (1 << C)),
6827 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
6831 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
6833 PR tree-optimization/94914
6834 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
6837 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
6839 * config/i386/i386.md (*testqi_ext_3): Use
6840 int_nonimmediate_operand instead of manual mode checks.
6841 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
6842 Use int_nonimmediate_operand predicate. Rewrite
6843 define_insn_and_split pattern to a combine pass splitter.
6845 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6847 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
6848 * configure: Regenerate.
6850 2020-05-05 Jakub Jelinek <jakub@redhat.com>
6853 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
6854 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
6855 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
6856 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
6858 2020-05-04 Clement Chigot <clement.chigot@atos.net>
6859 David Edelsohn <dje.gcc@gmail.com>
6861 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
6862 for fmodl, frexpl, ldexpl and modfl builtins.
6864 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
6867 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
6868 chosen lhs is different from the gcall lhs.
6869 (expand_mask_load_optab_fn): Likewise.
6870 (expand_gather_load_optab_fn): Likewise.
6872 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
6875 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
6876 (EQ compare->LTU compare splitter): New splitter.
6877 (NE compare->NEG splitter): Ditto.
6879 2020-05-04 Marek Polacek <polacek@redhat.com>
6882 2020-04-30 Marek Polacek <polacek@redhat.com>
6885 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
6886 (check_aligned_type): Check if TYPE_USER_ALIGN match.
6888 2020-05-04 Richard Biener <rguenther@suse.de>
6890 PR tree-optimization/93891
6891 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
6892 the original reference tree for assessing access alignment.
6894 2020-05-04 Richard Biener <rguenther@suse.de>
6896 PR tree-optimization/39612
6897 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
6898 (set_ref_loaded_in_loop): New.
6899 (mark_ref_loaded): Likewise.
6900 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
6901 (execute_sm): Avoid issueing a load when it was not there.
6902 (execute_sm_if_changed): Avoid issueing warnings for the
6905 2020-05-04 Martin Jambor <mjambor@suse.cz>
6908 * tree-inline.c (tree_function_versioning): Leave any type conversion
6909 of replacements to setup_one_parameter and its friend
6910 force_value_to_type.
6912 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
6915 * config/i386/predicates.md (shr_comparison_operator): New predicate.
6916 * config/i386/i386.md (compare->shr splitter): New splitters.
6918 2020-05-04 Jakub Jelinek <jakub@redhat.com>
6920 PR tree-optimization/94718
6921 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
6923 PR tree-optimization/94718
6924 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
6925 replace two nop conversions on bit_{and,ior,xor} argument
6926 and result with just one conversion on the result or another argument.
6928 PR tree-optimization/94718
6929 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
6930 -> (X ^ Y) & C eqne 0 optimization to ...
6931 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
6933 * opts.c (get_option_html_page): Instead of hardcoding a list of
6934 options common between C/C++ and Fortran only use gfortran/
6935 documentation for warnings that have CL_Fortran set but not
6938 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
6940 * config/i386/i386-expand.c (ix86_expand_int_movcc):
6941 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
6942 (emit_memmov): Ditto.
6943 (emit_memset): Ditto.
6944 (ix86_expand_strlensi_unroll_1): Ditto.
6945 (release_scratch_register_on_entry): Ditto.
6946 (gen_frame_set): Ditto.
6947 (ix86_emit_restore_reg_using_pop): Ditto.
6948 (ix86_emit_outlined_ms2sysv_restore): Ditto.
6949 (ix86_expand_epilogue): Ditto.
6950 (ix86_expand_split_stack_prologue): Ditto.
6951 * config/i386/i386.md (push immediate splitter): Ditto.
6955 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
6957 PR translation/93861
6958 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
6961 2020-05-02 Jakub Jelinek <jakub@redhat.com>
6963 * config/tilegx/tilegx.md
6964 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
6965 rather than just <n>.
6967 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
6970 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
6971 and crtl->patch_area_entry.
6972 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
6973 * opts.c (common_handle_option): Limit
6974 function_entry_patch_area_size and function_entry_patch_area_start
6975 to USHRT_MAX. Fix a typo in error message.
6976 * varasm.c (assemble_start_function): Use crtl->patch_area_size
6977 and crtl->patch_area_entry.
6978 * doc/invoke.texi: Document the maximum value for
6979 -fpatchable-function-entry.
6981 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
6983 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
6984 Override SUBTARGET_SHADOW_OFFSET macro.
6986 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
6988 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
6989 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
6990 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
6991 * config/i386/freebsd.h: Likewise.
6992 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
6993 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
6995 2020-04-30 Alexandre Oliva <oliva@adacore.com>
6997 * doc/sourcebuild.texi (Effective-Target Keywords): Document
6998 the newly-introduced fileio effective target.
7000 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
7002 PR rtl-optimization/94740
7003 * cse.c (cse_process_notes_1): Replace with...
7004 (cse_process_note_1): ...this new function, acting as a
7005 simplify_replace_fn_rtx callback to process_note. Handle only
7006 REGs and MEMs directly. Validate the MEM if cse_process_note
7007 changes its address.
7008 (cse_process_notes): Replace with...
7009 (cse_process_note): ...this new function.
7010 (cse_extended_basic_block): Update accordingly, iterating over
7011 the register notes and passing individual notes to cse_process_note.
7013 2020-04-30 Carl Love <cel@us.ibm.com>
7015 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
7017 2020-04-30 Martin Jambor <mjambor@suse.cz>
7020 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
7021 saved by the inliner and thunks which had their call inlined.
7022 * ipa-inline-transform.c (save_inline_function_body): Fill in
7023 former_clone_of of new body holders.
7025 2020-04-30 Jakub Jelinek <jakub@redhat.com>
7027 * BASE-VER: Set to 11.0.0.
7029 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
7031 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
7033 2020-04-30 Marek Polacek <polacek@redhat.com>
7036 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
7037 (check_aligned_type): Check if TYPE_USER_ALIGN match.
7039 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7041 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
7042 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
7043 * doc/invoke.texi (moutline-atomics): Document as on by default.
7045 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
7048 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
7049 the check for NOTE_INSN_DELETED_LABEL.
7051 2020-04-30 Jakub Jelinek <jakub@redhat.com>
7053 * configure.ac (--with-documentation-root-url,
7054 --with-changes-root-url): Diagnose URL not ending with /,
7055 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
7056 * opts.h (get_changes_url): Remove.
7057 * opts.c (get_changes_url): Remove.
7058 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
7059 or -DCHANGES_ROOT_URL.
7060 * doc/install.texi (--with-documentation-root-url,
7061 --with-changes-root-url): Document.
7062 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
7063 get_changes_url and free, change url variable type to const char * and
7064 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
7065 * config/s390/s390.c (s390_function_arg_vector,
7066 s390_function_arg_float): Likewise.
7067 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
7069 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
7071 * config.in: Regenerate.
7072 * configure: Regenerate.
7074 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
7077 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
7079 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
7081 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
7082 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
7084 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
7086 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
7087 Change constraint for vlrl/vstrl to jb4.
7089 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7091 * var-tracking.c (vt_initialize): Move variables pre and post
7092 into inner block and initialize both in order to fix warning
7093 about uninitialized use. Remove unnecessary checks for
7094 frame_pointer_needed.
7096 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7098 * toplev.c (output_stack_usage_1): Ensure that first
7099 argument to fprintf is not null.
7101 2020-04-29 Jakub Jelinek <jakub@redhat.com>
7103 * configure.ac (-with-changes-root-url): New configure option,
7104 defaulting to https://gcc.gnu.org/.
7105 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
7107 * pretty-print.c (get_end_url_string): New function.
7108 (pp_format): Handle %{ and %} for URLs.
7109 (pp_begin_url): Use pp_string instead of pp_printf.
7110 (pp_end_url): Use get_end_url_string.
7111 * opts.h (get_changes_url): Declare.
7112 * opts.c (get_changes_url): New function.
7113 * config/rs6000/rs6000-call.c: Include opts.h.
7114 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
7115 of just in GCC 10.1 in diagnostics and add URL.
7116 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
7117 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
7119 * config/s390/s390.c (s390_function_arg_vector,
7120 s390_function_arg_float): Likewise.
7121 * configure: Regenerated.
7124 * config/s390/s390.c (s390_function_arg_vector,
7125 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
7126 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
7127 passed to the function rather than the type of the single element.
7128 Rename cxx17_empty_base_seen variable to empty_base_seen, change
7129 type to int, and adjust diagnostics depending on if the field
7130 has [[no_unique_attribute]] or not.
7133 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
7134 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
7135 used in casts into parens.
7136 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
7137 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
7138 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
7139 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
7140 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
7141 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
7142 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
7143 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
7144 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
7145 _mm256_mask_cmp_epu8_mask): Likewise.
7146 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
7147 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
7148 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
7149 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
7152 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
7153 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
7154 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
7155 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
7156 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
7157 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
7158 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
7159 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
7160 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
7161 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
7162 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
7163 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
7164 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
7166 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
7167 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
7168 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
7169 as mask vector containing -1.0 or -1.0f elts, but instead vector
7170 with all bits set using _mm*_cmpeq_p? with zero operands.
7171 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
7172 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
7173 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
7174 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
7175 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
7176 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
7177 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
7178 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
7179 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
7180 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
7181 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
7182 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
7183 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
7184 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
7185 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
7186 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
7187 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
7189 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
7190 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
7191 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
7192 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
7193 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
7194 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
7195 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
7196 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
7197 _mm512_mask_prefetch_i64scatter_ps): Likewise.
7198 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
7199 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
7200 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
7201 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
7202 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
7203 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
7204 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
7205 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
7206 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
7207 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
7208 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
7209 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
7210 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
7211 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
7212 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
7213 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
7214 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
7215 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
7216 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
7217 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
7218 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
7219 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
7220 _mm_mask_i64scatter_epi64): Likewise.
7222 2020-04-29 Jeff Law <law@redhat.com>
7224 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
7225 division instructions are 4 bytes long.
7227 2020-04-29 Jakub Jelinek <jakub@redhat.com>
7230 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
7231 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
7232 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
7233 take address of TARGET_EXPR of fenv_var with void_node initializer.
7236 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7238 PR tree-optimization/94774
7239 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
7242 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7244 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
7245 * calls.c (cxx17_empty_base_field_p): New function. Check
7246 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
7249 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
7252 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
7253 Allow -fcf-protection with -mindirect-branch=thunk-extern and
7254 -mfunction-return=thunk-extern.
7255 * doc/invoke.texi: Update notes for -fcf-protection=branch with
7256 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
7258 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7260 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
7262 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7264 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
7265 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
7266 fenv_var and new_fenv_var.
7268 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7270 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
7271 effective-target keyword.
7272 (arm_arch_v8a_hard_multilib): Likewise.
7273 (arm_arch_v8a_hard): Document new dg-add-options keyword.
7274 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
7275 code is deprecated and has not been updated to handle
7276 DECL_FIELD_ABI_IGNORED.
7277 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
7278 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
7279 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
7280 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
7281 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
7282 something actually is a HFA or HVA. Record whether we see a
7283 [[no_unique_address]] field that previous GCCs would not have
7284 ignored in this way.
7285 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
7286 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
7287 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
7288 diagnostic messages.
7289 (arm_needs_doubleword_align): Add a comment explaining why we
7290 consider even zero-sized fields.
7292 2020-04-29 Richard Biener <rguenther@suse.de>
7293 Li Zekun <lizekun1@huawei.com>
7296 * tree.c (component_ref_size): Guard against error_mark_node
7297 DECL_INITIAL as it happens with LTO.
7299 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7301 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
7302 comment explaining why we consider even zero-sized fields.
7303 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
7304 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
7305 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
7306 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
7307 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
7308 something actually is a HFA or HVA. Record whether we see a
7309 [[no_unique_address]] field that previous GCCs would not have
7310 ignored in this way.
7311 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
7312 whether diagnostics should be suppressed. Update the calls to
7313 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
7314 [[no_unique_address]] case.
7315 (aarch64_return_in_msb): Update call accordingly, never silencing
7317 (aarch64_function_value): Likewise.
7318 (aarch64_return_in_memory_1): Likewise.
7319 (aarch64_init_cumulative_args): Likewise.
7320 (aarch64_gimplify_va_arg_expr): Likewise.
7321 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
7322 use it to decide whether arch64_vfp_is_call_or_return_candidate
7324 (aarch64_pass_by_reference): Update calls accordingly.
7325 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
7326 to decide whether arch64_vfp_is_call_or_return_candidate should be
7329 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
7332 * config/aarch64/aarch64-builtins.c
7333 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
7334 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
7337 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
7339 * configure.ac <$enable_offload_targets>: Do parsing as done
7341 * configure: Regenerate.
7343 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
7344 * configure: Regenerate.
7347 * rtlanal.c (set_noop_p): Handle non-constant selectors.
7350 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
7352 (TARGET_EXCEPT_UNWIND_INFO): Define.
7354 2020-04-29 Jakub Jelinek <jakub@redhat.com>
7357 * config/gcn/gcn.md (*mov<mode>_insn): Use
7358 'reg_overlap_mentioned_p' to check for overlap.
7361 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
7362 instead of cxx17_empty_base_field_p.
7365 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
7366 DECL_FIELD_ABI_IGNORED.
7367 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
7368 * calls.h (cxx17_empty_base_field_p): Change into a temporary
7369 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
7371 * calls.c (cxx17_empty_base_field_p): Remove.
7372 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
7373 DECL_FIELD_ABI_IGNORED.
7374 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
7375 * lto-streamer-out.c (hash_tree): Likewise.
7376 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
7377 cxx17_empty_base_seen to empty_base_seen, change type to int *,
7378 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
7379 cxx17_empty_base_field_p, if "no_unique_address" attribute is
7380 present, propagate that to the caller too.
7381 (rs6000_discover_homogeneous_aggregate): Adjust
7382 rs6000_aggregate_candidate caller, emit different diagnostics
7383 when c++17 empty base fields are present and when empty
7384 [[no_unique_address]] fields are present.
7385 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
7386 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
7389 2020-04-29 Richard Biener <rguenther@suse.de>
7391 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
7392 Just check whether the stmt stores.
7394 2020-04-28 Alexandre Oliva <oliva@adacore.com>
7397 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
7398 output operand in emulation. Don't overwrite pseudos.
7400 2020-04-28 Jeff Law <law@redhat.com>
7402 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
7403 multiply patterns are 4 bytes long.
7405 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7407 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
7408 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
7410 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
7411 Jakub Jelinek <jakub@redhat.com>
7414 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
7415 base class artificial fields.
7416 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
7417 decision is different after this fix.
7419 2020-04-28 David Malcolm <dmalcolm@redhat.com>
7425 * doc/invoke.texi (Static Analyzer Options): Remove
7426 -Wanalyzer-use-of-uninitialized-value.
7427 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
7429 2020-04-28 Jakub Jelinek <jakub@redhat.com>
7431 PR tree-optimization/94809
7432 * tree.c (build_call_expr_internal_loc_array): Call
7433 process_call_operands.
7435 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
7437 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
7438 * config/aarch64/aarch64-tune.md: Regenerate.
7439 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
7440 (thunderx3t110_regmove_cost): Likewise.
7441 (thunderx3t110_vector_cost): Likewise.
7442 (thunderx3t110_prefetch_tune): Likewise.
7443 (thunderx3t110_tunings): Likewise.
7444 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
7446 * config/aarch64/thunderx3t110.md: New file.
7447 * config/aarch64/aarch64.md: Include thunderx3t110.md.
7448 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
7450 2020-04-28 Jakub Jelinek <jakub@redhat.com>
7453 * config/s390/s390.c (s390_function_arg_vector,
7454 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
7456 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
7458 PR tree-optimization/94727
7459 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
7460 operands are invariant booleans, use the mask type associated with the
7461 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
7462 (vectorizable_condition): Pass vectype unconditionally to
7463 vect_is_simple_cond.
7465 2020-04-27 Jakub Jelinek <jakub@redhat.com>
7468 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
7469 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
7470 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
7472 2020-04-27 David Malcolm <dmalcolm@redhat.com>
7475 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
7476 default value, so that it can by supplied by get_option_html_page.
7477 * configure: Regenerate.
7478 * opts.c: Include "selftest.h".
7479 (get_option_html_page): New function.
7480 (get_option_url): Use it. Reformat to place comments next to the
7481 expressions they refer to.
7482 (selftest::test_get_option_html_page): New.
7483 (selftest::opts_c_tests): New.
7484 * selftest-run-tests.c (selftest::run_tests): Call
7485 selftest::opts_c_tests.
7486 * selftest.h (selftest::opts_c_tests): New decl.
7488 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
7490 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
7491 UINTVAL to CONST_INTs.
7493 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7495 * config/arm/constraints.md (e): Remove constraint.
7496 (Te): Define constraint.
7497 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
7498 operand 0 from "e" to "Te".
7499 (vaddvaq_<supf><mode>): Likewise.
7500 (vaddvq_p_<supf><mode>): Likewise.
7501 (vmladavq_<supf><mode>): Likewise.
7502 (vmladavxq_s<mode>): Likewise.
7503 (vmlsdavq_s<mode>): Likewise.
7504 (vmlsdavxq_s<mode>): Likewise.
7505 (vaddvaq_p_<supf><mode>): Likewise.
7506 (vmladavaq_<supf><mode>): Likewise.
7507 (vmladavq_p_<supf><mode>): Likewise.
7508 (vmladavxq_p_s<mode>): Likewise.
7509 (vmlsdavq_p_s<mode>): Likewise.
7510 (vmlsdavxq_p_s<mode>): Likewise.
7511 (vmlsdavaxq_s<mode>): Likewise.
7512 (vmlsdavaq_s<mode>): Likewise.
7513 (vmladavaxq_s<mode>): Likewise.
7514 (vmladavaq_p_<supf><mode>): Likewise.
7515 (vmladavaxq_p_s<mode>): Likewise.
7516 (vmlsdavaq_p_s<mode>): Likewise.
7517 (vmlsdavaxq_p_s<mode>): Likewise.
7519 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
7521 * config/arm/arm.c (output_move_neon): Only get the first operand if
7524 2020-04-27 Felix Yang <felix.yang@huawei.com>
7526 PR tree-optimization/94784
7527 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
7528 assert around so that it checks that the two vectors have equal
7529 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
7530 types is a useless_type_conversion_p.
7532 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
7535 * dwarf2cfi.c (struct GTY): Add ra_mangled.
7536 (cfi_row_equal_p): Check ra_mangled.
7537 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
7538 this only handles the sparc logic now.
7539 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
7540 the aarch64 specific logic.
7541 (dwarf2out_frame_debug): Update to use the new subroutines.
7542 (change_cfi_row): Check ra_mangled.
7544 2020-04-27 Jakub Jelinek <jakub@redhat.com>
7547 * config/s390/s390.c (s390_function_arg_vector,
7548 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
7550 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
7552 * common/config/rs6000/rs6000-common.c
7553 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
7555 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
7558 2020-04-27 Martin Liska <mliska@suse.cz>
7561 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
7562 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
7564 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
7567 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
7569 (rs6000_emit_prologue_components):
7570 Check with frame_pointer_needed_indeed.
7571 (rs6000_emit_epilogue_components): Likewise.
7572 (rs6000_emit_prologue): Likewise.
7573 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
7575 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
7577 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
7578 stack frame when debugging and flag_compare_debug is enabled.
7580 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
7582 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
7583 enable PC-relative addressing for -mcpu=future.
7584 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
7585 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
7586 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
7587 suppress PC-relative addressing.
7588 (rs6000_option_override_internal): Split up error messages
7589 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
7592 2020-04-25 Jakub Jelinek <jakub@redhat.com>
7593 Richard Biener <rguenther@suse.de>
7595 PR tree-optimization/94734
7596 PR tree-optimization/89430
7597 * tree-ssa-phiopt.c: Include tree-eh.h.
7598 (cond_store_replacement): Return false if an automatic variable
7599 access could trap. If -fstore-data-races, don't return false
7600 just because an automatic variable is addressable.
7602 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
7604 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
7606 (add<mode>_sext_dup2_exec): Likewise.
7608 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
7611 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
7612 endian byteshift_val calculation.
7614 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
7616 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
7618 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
7620 * config/aarch64/arm_sve.h: Add a comment.
7622 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
7624 PR rtl-optimization/94708
7625 * combine.c (simplify_if_then_else): Add check for
7626 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
7628 2020-04-23 Martin Sebor <msebor@redhat.com>
7631 * common.opt (-Wno-frame-larger-than): New option.
7632 (-Wno-larger-than, -Wno-stack-usage): Same.
7634 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
7636 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
7638 (mov<mode>_exec): Likewise.
7639 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
7640 (<convop><mode><vndi>2_exec): Likewise.
7642 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
7644 PR tree-optimization/94717
7645 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
7646 of the stores doesn't have the same landing pad number as the first.
7647 (coalesce_immediate_stores): Do not try to coalesce the store using
7648 bswap if it doesn't have the same landing pad number as the first.
7650 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
7652 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
7653 Replace outdated link to ELFv2 ABI.
7655 2020-04-23 Jakub Jelinek <jakub@redhat.com>
7658 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
7662 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
7663 temporarily with non-final second operand and updating it later,
7664 push COMPOUND_EXPRs into a vector and process it in reverse,
7665 creating COMPOUND_EXPRs with the final operands.
7667 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
7670 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
7671 bti c and bti j handling.
7673 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
7674 Thomas Schwinge <thomas@codesourcery.com>
7678 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
7679 t_async and the wait arguments.
7681 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
7683 PR tree-optimization/94727
7684 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
7685 comparing invariant scalar booleans.
7687 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
7688 Jakub Jelinek <jakub@redhat.com>
7691 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
7692 empty base class artificial fields.
7693 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
7694 different after this fix.
7696 2020-04-23 Jakub Jelinek <jakub@redhat.com>
7699 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
7700 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
7701 if the same type has been diagnosed most recently already.
7703 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7705 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
7707 (__arm_vbicq_n_s16): Likewise.
7708 (__arm_vbicq_n_u32): Likewise.
7709 (__arm_vbicq_n_s32): Likewise.
7710 (__arm_vbicq): Likewise.
7711 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
7712 (__arm_vbicq_n_s32): Likewise.
7713 (__arm_vbicq_n_u16): Likewise.
7714 (__arm_vbicq_n_u32): Likewise.
7715 (__arm_vdupq_m_n_s8): Likewise.
7716 (__arm_vdupq_m_n_s16): Likewise.
7717 (__arm_vdupq_m_n_s32): Likewise.
7718 (__arm_vdupq_m_n_u8): Likewise.
7719 (__arm_vdupq_m_n_u16): Likewise.
7720 (__arm_vdupq_m_n_u32): Likewise.
7721 (__arm_vdupq_m_n_f16): Likewise.
7722 (__arm_vdupq_m_n_f32): Likewise.
7723 (__arm_vldrhq_gather_offset_s16): Likewise.
7724 (__arm_vldrhq_gather_offset_s32): Likewise.
7725 (__arm_vldrhq_gather_offset_u16): Likewise.
7726 (__arm_vldrhq_gather_offset_u32): Likewise.
7727 (__arm_vldrhq_gather_offset_f16): Likewise.
7728 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7729 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7730 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7731 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7732 (__arm_vldrhq_gather_offset_z_f16): Likewise.
7733 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7734 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7735 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7736 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7737 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
7738 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7739 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7740 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7741 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7742 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
7743 (__arm_vldrwq_gather_offset_s32): Likewise.
7744 (__arm_vldrwq_gather_offset_u32): Likewise.
7745 (__arm_vldrwq_gather_offset_f32): Likewise.
7746 (__arm_vldrwq_gather_offset_z_s32): Likewise.
7747 (__arm_vldrwq_gather_offset_z_u32): Likewise.
7748 (__arm_vldrwq_gather_offset_z_f32): Likewise.
7749 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
7750 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
7751 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
7752 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
7753 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
7754 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
7755 (__arm_vdwdupq_x_n_u8): Likewise.
7756 (__arm_vdwdupq_x_n_u16): Likewise.
7757 (__arm_vdwdupq_x_n_u32): Likewise.
7758 (__arm_viwdupq_x_n_u8): Likewise.
7759 (__arm_viwdupq_x_n_u16): Likewise.
7760 (__arm_viwdupq_x_n_u32): Likewise.
7761 (__arm_vidupq_x_n_u8): Likewise.
7762 (__arm_vddupq_x_n_u8): Likewise.
7763 (__arm_vidupq_x_n_u16): Likewise.
7764 (__arm_vddupq_x_n_u16): Likewise.
7765 (__arm_vidupq_x_n_u32): Likewise.
7766 (__arm_vddupq_x_n_u32): Likewise.
7767 (__arm_vldrdq_gather_offset_s64): Likewise.
7768 (__arm_vldrdq_gather_offset_u64): Likewise.
7769 (__arm_vldrdq_gather_offset_z_s64): Likewise.
7770 (__arm_vldrdq_gather_offset_z_u64): Likewise.
7771 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
7772 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
7773 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
7774 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
7775 (__arm_vidupq_m_n_u8): Likewise.
7776 (__arm_vidupq_m_n_u16): Likewise.
7777 (__arm_vidupq_m_n_u32): Likewise.
7778 (__arm_vddupq_m_n_u8): Likewise.
7779 (__arm_vddupq_m_n_u16): Likewise.
7780 (__arm_vddupq_m_n_u32): Likewise.
7781 (__arm_vidupq_n_u16): Likewise.
7782 (__arm_vidupq_n_u32): Likewise.
7783 (__arm_vidupq_n_u8): Likewise.
7784 (__arm_vddupq_n_u16): Likewise.
7785 (__arm_vddupq_n_u32): Likewise.
7786 (__arm_vddupq_n_u8): Likewise.
7788 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
7790 * doc/install.texi (D-Specific Options): Document
7791 --enable-libphobos-checking and --with-libphobos-druntime-only.
7793 2020-04-23 Jakub Jelinek <jakub@redhat.com>
7796 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
7797 cxx17_empty_base_seen argument. Pass it to recursive calls.
7798 Ignore cxx17_empty_base_field_p fields after setting
7799 *cxx17_empty_base_seen to true.
7800 (rs6000_discover_homogeneous_aggregate): Adjust
7801 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
7802 aggregates with C++17 empty base fields.
7805 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
7806 if last_decl is error_mark_node or has such a TREE_TYPE.
7809 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
7810 if last_decl is error_mark_node or has such a TREE_TYPE.
7812 2020-04-22 Felix Yang <felix.yang@huawei.com>
7815 * config/aarch64/aarch64.h (TARGET_SVE):
7816 Add && !TARGET_GENERAL_REGS_ONLY.
7817 (TARGET_SVE2): Add && TARGET_SVE.
7818 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
7819 TARGET_SVE2_SM4): Add && TARGET_SVE2.
7820 * config/aarch64/aarch64-sve-builtins.h
7821 (sve_switcher::m_old_general_regs_only): New member.
7822 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
7824 (reported_missing_registers_p): New variable.
7825 (check_required_extensions): Call check_required_registers before
7826 return if all required extenstions are present.
7827 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
7828 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
7829 global_options.x_target_flags.
7830 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
7831 global_options.x_target_flags if m_old_general_regs_only is true.
7833 2020-04-22 Zackery Spytz <zspytz@gmail.com>
7835 * doc/extend.exi: Add "free" to list of other builtin functions
7838 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
7841 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
7843 (store_quadpti): Ditto.
7844 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
7845 plq will be used and doesn't need it.
7846 (atomic_store<mode>): Ditto, for pstq.
7848 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
7850 * doc/invoke.texi: Update flags turned on by -O3.
7852 2020-04-22 Jakub Jelinek <jakub@redhat.com>
7855 * config/ia64/ia64.c (hfa_element_mode): Ignore
7856 cxx17_empty_base_field_p fields.
7859 * calls.h (cxx17_empty_base_field_p): Declare.
7860 * calls.c (cxx17_empty_base_field_p): Define.
7862 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
7864 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
7866 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7867 Andre Vieira <andre.simoesdiasvieira@arm.com>
7868 Mihail Ionescu <mihail.ionescu@arm.com>
7870 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
7871 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
7872 (ALL_QUIRKS): Add quirk_no_asmcpu.
7873 (cortex-m55): Define new cpu.
7874 * config/arm/arm-tables.opt: Regenerate.
7875 * config/arm/arm-tune.md: Likewise.
7876 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
7878 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
7880 PR tree-optimization/94700
7881 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
7882 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
7883 of similarly-structured but distinct vector types.
7885 2020-04-21 Martin Sebor <msebor@redhat.com>
7888 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
7889 the computation of the lower bound of the source access size.
7890 (builtin_access::generic_overlap): Remove a hack for setting ranges
7893 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
7895 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
7896 (ASM_WEAKEN_DECL): New define.
7897 (HAVE_GAS_WEAKREF): Undefine.
7899 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
7901 PR tree-optimization/94683
7902 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
7903 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
7904 but distinct vector types.
7906 2020-04-21 Jakub Jelinek <jakub@redhat.com>
7909 * stor-layout.c (place_field, finalize_record_size): Don't emit
7910 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
7911 * ubsan.c (ubsan_get_type_descriptor_type,
7912 ubsan_get_source_location_type, ubsan_create_data): Set
7914 * asan.c (asan_global_struct): Likewise.
7916 2020-04-21 Duan bo <duanbo3@huawei.com>
7919 * config/aarch64/aarch64.c: Add an error message for option conflict.
7920 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
7921 incompatible with -fpic, -fPIC and -mabi=ilp32.
7923 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
7926 * omp-low.c (new_omp_context): Remove assignments to
7927 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
7929 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
7931 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
7932 ("popcountv2di2_vx"): Use simplify_gen_subreg.
7934 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
7937 * config/s390/s390-builtin-types.def: Add 3 new function modes.
7938 * config/s390/s390-builtins.def: Add mode dependent low-level
7939 builtin and map the overloaded builtins to these.
7940 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
7941 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
7943 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
7945 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
7946 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
7947 estimated VF and is no worse at double the estimated VF.
7949 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
7952 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
7953 order of arguments to rtx_vector_builder.
7954 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
7955 When extending the trailing constants to a full vector, replace any
7956 variables with zeros.
7958 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
7961 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
7964 2020-04-20 Martin Liska <mliska@suse.cz>
7966 * symtab.c (symtab_node::dump_references): Add space after
7968 (symtab_node::dump_referring): Likewise.
7970 2020-04-18 Jeff Law <law@redhat.com>
7973 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
7976 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
7978 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
7979 attributes): Document d_runtime_has_std_library.
7981 2020-04-17 Jeff Law <law@redhat.com>
7983 PR rtl-optimization/90275
7984 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
7985 when the destination has a REG_UNUSED note.
7987 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
7990 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
7993 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
7995 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
7996 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
7997 cost of load and store insns if one loop iteration has enough scalar
7998 elements to use an Advanced SIMD LDP or STP.
7999 (aarch64_add_stmt_cost): Update call accordingly.
8001 2020-04-17 Jakub Jelinek <jakub@redhat.com>
8002 Jeff Law <law@redhat.com>
8005 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
8006 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
8007 or pos + len >= 32, or pos + len is equal to operands[2] precision
8008 and operands[2] is not a register operand. During splitting perform
8009 SImode AND if operands[0] doesn't have CCZmode and pos + len is
8010 equal to mode precision.
8012 2020-04-17 Richard Biener <rguenther@suse.de>
8015 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
8017 * dwarf2out.c (dw_val_equal_p): Fix pasto in
8018 dw_val_class_vms_delta comparison.
8019 * optabs.c (expand_binop_directly): Fix pasto in commutation
8021 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
8024 2020-04-17 Jakub Jelinek <jakub@redhat.com>
8026 PR rtl-optimization/94618
8027 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
8028 insn is the BB_END of its block, but also when it is only followed
8029 by DEBUG_INSNs in its block.
8031 PR tree-optimization/94621
8032 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
8033 Move id->adjust_array_error_bounds check first in the condition.
8035 2020-04-17 Martin Liska <mliska@suse.cz>
8036 Jonathan Yong <10walls@gmail.com>
8038 PR gcov-profile/94570
8039 * coverage.c (coverage_init): Use separator properly.
8041 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
8043 PR rtl-optimization/93974
8044 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
8045 (rs6000_cannot_substitute_mem_equiv_p): New function.
8047 2020-04-16 Martin Jambor <mjambor@suse.cz>
8050 * ipa-inline.h (ipa_saved_clone_sources): Declare.
8051 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
8052 (save_inline_function_body): Link the new body holder with the
8054 * cgraph.c: Include ipa-inline.h.
8055 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
8056 the statement in ipa_saved_clone_sources.
8057 * cgraphunit.c: Include ipa-inline.h.
8058 (expand_all_functions): Free ipa_saved_clone_sources.
8060 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
8063 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
8064 the VNx16BI lowpart of the recursively-generated constant.
8066 2020-04-16 Martin Liska <mliska@suse.cz>
8067 Jakub Jelinek <jakub@redhat.com>
8070 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
8071 DECL_IS_REPLACEABLE_OPERATOR during cloning.
8072 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
8073 (propagate_necessity): Check operator names.
8075 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
8077 PR rtl-optimization/94605
8078 * early-remat.c (early_remat::process_block): Handle insns that
8079 set multiple candidate registers.
8080 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
8082 PR gcov-profile/93401
8083 * common.opt (profile-prefix-path): New option.
8084 * coverae.c: Include diagnostics.h.
8085 (coverage_init): Strip profile prefix path.
8086 * doc/invoke.texi (-fprofile-prefix-path): Document.
8088 2020-04-16 Richard Biener <rguenther@suse.de>
8091 * expr.c (emit_move_multi_word): Do not generate code when
8092 the destination part is undefined_operand_subword_p.
8093 * lower-subreg.c (resolve_clobber): Look through a paradoxica
8096 2020-04-16 Martin Jambor <mjambor@suse.cz>
8098 PR tree-optimization/94598
8099 * tree-sra.c (verify_sra_access_forest): Fix verification of total
8100 scalarization accesses under access to one-element arrays.
8102 2020-04-16 Jakub Jelinek <jakub@redhat.com>
8105 * function.c (assign_parm_find_data_types): Add workaround for
8106 BROKEN_VALUE_INITIALIZATION compilers.
8108 2020-04-16 Richard Biener <rguenther@suse.de>
8110 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
8113 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
8116 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
8117 Require OPTION_MASK_ISA_SSE2.
8119 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
8122 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
8123 Don't construct a dump_context temporary to call static method.
8125 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
8127 * config/aarch64/falkor-tag-collision-avoidance.c
8128 (valid_src_p): Check for aarch64_address_info type before
8129 accessing base field.
8131 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
8133 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
8134 (V_sz_elem2): Remove unused mode attribute.
8136 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
8138 * config/arm/arm.md (arm_movdi): Disallow for MVE.
8140 2020-04-15 Richard Biener <rguenther@suse.de>
8143 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
8144 alias_sets_conflict_p for pointers.
8146 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
8149 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
8150 (extendhisi2_internal): Add %v1 before the load instructions.
8152 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
8155 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
8156 use PC-relative addressing for TLS references.
8158 2020-04-14 Martin Jambor <mjambor@suse.cz>
8161 * ipa-sra.c: Include internal-fn.h.
8162 (enum isra_scan_context): Update comment.
8163 (scan_function): Treat calls to internal_functions like loads or stores.
8165 2020-04-14 Yang Yang <yangyang305@huawei.com>
8167 PR tree-optimization/94574
8168 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
8169 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
8171 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
8174 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
8176 2020-04-13 Martin Sebor <msebor@redhat.com>
8178 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
8179 -Wformat-truncation. Move -Wzero-length-bounds last.
8180 (-Wrestrict): Document positive form of option enabled by -Wall.
8182 2020-04-13 Zachary Spytz <zspytz@gmail.com>
8184 * doc/extend.texi: Add realloc to list of built-in functions
8185 are recognized by the compiler.
8187 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
8190 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
8191 pointer in word_mode for eh_return epilogues.
8193 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8195 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
8196 memory references in %B, %C and %D operand selectors when the inner
8197 operand is a post increment address.
8199 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8201 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
8202 reference by 4 bytes, and %D memory reference by 6 bytes.
8204 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
8207 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
8208 condition for V4SI, V8HI and V16QI modes.
8210 2020-04-11 Jakub Jelinek <jakub@redhat.com>
8214 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
8217 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
8221 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
8222 "#pragma omp declare target" has also been applied.
8224 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8226 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
8227 when to emit the epilogue_helper insn.
8228 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
8231 2020-04-09 Jakub Jelinek <jakub@redhat.com>
8234 * cselib.h (cselib_record_sp_cfa_base_equiv,
8235 cselib_sp_derived_value_p): Declare.
8236 * cselib.c (cselib_record_sp_cfa_base_equiv,
8237 cselib_sp_derived_value_p): New functions.
8238 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
8239 cselib_sp_derived_value_p values.
8240 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
8241 start of extended basic blocks other than the first one
8242 for !frame_pointer_needed functions.
8244 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
8246 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
8247 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
8248 (aarch64_sve2048_hw): Document.
8249 * config/aarch64/aarch64-protos.h
8250 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
8251 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
8252 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
8253 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
8255 (find_type_suffix_for_scalar_type): Use it instead of comparing
8257 (function_resolver::infer_vector_or_tuple_type): Likewise.
8258 (function_resolver::require_vector_type): Likewise.
8259 (handle_arm_sve_vector_bits_attribute): New function.
8260 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
8261 (aarch64_attribute_table): Add arm_sve_vector_bits.
8262 (aarch64_return_in_memory_1):
8263 (pure_scalable_type_info::piece::get_rtx): New function.
8264 (pure_scalable_type_info::num_zr): Likewise.
8265 (pure_scalable_type_info::num_pr): Likewise.
8266 (pure_scalable_type_info::get_rtx): Likewise.
8267 (pure_scalable_type_info::analyze): Likewise.
8268 (pure_scalable_type_info::analyze_registers): Likewise.
8269 (pure_scalable_type_info::analyze_array): Likewise.
8270 (pure_scalable_type_info::analyze_record): Likewise.
8271 (pure_scalable_type_info::add_piece): Likewise.
8272 (aarch64_some_values_include_pst_objects_p): Likewise.
8273 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
8274 to analyze whether the type is returned in SVE registers.
8275 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
8276 is passed in SVE registers.
8277 (aarch64_pass_by_reference_1): New function, extracted from...
8278 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
8279 to analyze whether the type is a pure scalable type and, if so,
8280 whether it should be passed by reference.
8281 (aarch64_return_in_msb): Return false for pure scalable types.
8282 (aarch64_function_value_1): Fold back into...
8283 (aarch64_function_value): ...this function. Use
8284 pure_scalable_type_info to analyze whether the type is a pure
8285 scalable type and, if so, which registers it should use. Handle
8286 types that include pure scalable types but are not themselves
8287 pure scalable types.
8288 (aarch64_return_in_memory_1): New function, split out from...
8289 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
8290 to analyze whether the type is a pure scalable type and, if so,
8291 whether it should be returned by reference.
8292 (aarch64_layout_arg): Remove orig_mode argument. Use
8293 pure_scalable_type_info to analyze whether the type is a pure
8294 scalable type and, if so, which registers it should use. Handle
8295 types that include pure scalable types but are not themselves
8296 pure scalable types.
8297 (aarch64_function_arg): Update call accordingly.
8298 (aarch64_function_arg_advance): Likewise.
8299 (aarch64_pad_reg_upward): On big-endian targets, return false for
8300 pure scalable types that are smaller than 16 bytes.
8301 (aarch64_member_type_forces_blk): New function.
8302 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
8303 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
8304 correspond to built-in SVE types. Do not rely on a vector mode
8305 if the type includes an pure scalable type. When returning true,
8306 assert that the mode is not an SVE mode.
8307 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
8308 built-in types here. When returning true, assert that the type
8309 does not have an SVE mode.
8310 (aarch64_can_change_mode_class): Don't allow anything to change
8311 between a predicate mode and a non-predicate mode. Also don't
8312 allow changes between SVE vector modes and other modes that
8313 might be bigger than 128 bits.
8314 (aarch64_invalid_binary_op): Reject binary operations that mix
8315 SVE and GNU vector types.
8316 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
8318 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
8320 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
8321 "SVE sizeless type".
8322 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
8323 (sizeless_type_p): New functions.
8324 (register_builtin_types): Apply make_type_sizeless to the type.
8325 (register_tuple_type): Likewise.
8326 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
8328 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
8330 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
8333 2020-04-09 Martin Jambor <mjambor@suse.cz>
8334 Richard Biener <rguenther@suse.de>
8336 PR tree-optimization/94482
8337 * tree-sra.c (create_access_replacement): Dump new replacement with
8339 (sra_modify_expr): Fix handling of cases when the original EXPR writes
8340 to only part of the replacement.
8341 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
8342 the first operand of combinations into REAL/IMAGPART_EXPR and
8345 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
8347 * doc/sourcebuild.texi (check-function-bodies): Treat the third
8348 parameter as a list of option regexps and require each regexp
8351 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
8354 * config/aarch64/falkor-tag-collision-avoidance.c
8355 (valid_src_p): Fix missing rtx type check.
8357 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
8358 Richard Biener <rguenther@suse.de>
8360 PR tree-optimization/93674
8361 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
8362 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
8363 or non-mode precision type, add candidate in unsigned type with the
8366 2020-04-08 Clement Chigot <clement.chigot@atos.net>
8368 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
8369 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
8370 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
8372 2020-04-08 Jakub Jelinek <jakub@redhat.com>
8375 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
8377 * reload1.c (eliminate_regs_1): Avoid creating
8378 (plus (reg) (const_int 0)) in DEBUG_INSNs.
8380 PR tree-optimization/94524
8381 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
8382 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
8383 op1 rather than op1 itself at the end. Punt for signed modulo by
8384 most negative constant.
8385 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
8386 modulo by most negative constant.
8388 2020-04-08 Richard Biener <rguenther@suse.de>
8390 PR rtl-optimization/93946
8391 * cse.c (cse_insn): Record the tabled expression in
8392 src_related. Verify a redundant store removal is valid.
8394 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
8397 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
8398 ENDBR at function entry if function will be called indirectly.
8400 2020-04-08 Jakub Jelinek <jakub@redhat.com>
8403 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
8406 2020-04-08 Martin Liska <mliska@suse.cz>
8409 * gimple.c (gimple_call_operator_delete_p): Rename to...
8410 (gimple_call_replaceable_operator_delete_p): ... this.
8411 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
8412 * gimple.h (gimple_call_operator_delete_p): Rename to ...
8413 (gimple_call_replaceable_operator_delete_p): ... this.
8414 * tree-core.h (tree_function_decl): Add replaceable_operator
8416 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
8417 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
8418 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
8419 (eliminate_unnecessary_stmts): Likewise.
8420 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
8421 Pack DECL_IS_REPLACEABLE_OPERATOR.
8422 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
8423 Unpack the field here.
8424 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
8425 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
8426 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
8427 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
8428 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
8429 replaceable operator flags.
8431 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
8432 Matthew Malcomson <matthew.malcomson@arm.com>
8434 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
8435 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
8436 (CX_TERNARY_QUALIFIERS): Likewise.
8437 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
8438 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
8439 (arm_init_acle_builtins): Initialize CDE builtins.
8440 (arm_expand_acle_builtin): Check CDE constant operands.
8441 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
8442 of CDE constant operand.
8443 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
8445 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
8446 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
8447 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
8448 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
8449 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
8450 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
8451 * config/arm/arm_cde_builtins.def: New file.
8452 * config/arm/iterators.md (V_reg): New attribute of SI.
8453 * config/arm/predicates.md (const_int_coproc_operand): New.
8454 (const_int_vcde1_operand, const_int_vcde2_operand): New.
8455 (const_int_vcde3_operand): New.
8456 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
8457 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
8458 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
8459 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
8461 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
8463 * config.gcc: Add arm_cde.h.
8464 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
8465 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
8466 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
8467 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
8468 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
8469 * config/arm/arm.h (TARGET_CDE): New macro.
8470 * config/arm/arm_cde.h: New file.
8471 * doc/invoke.texi: Document CDE options +cdecp[0-7].
8472 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
8474 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
8476 2020-04-08 Jakub Jelinek <jakub@redhat.com>
8478 PR rtl-optimization/94516
8479 * postreload.c: Include rtl-iter.h.
8480 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
8481 looking for all MEMs with RTX_AUTOINC operand.
8482 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
8484 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
8486 * omp-grid.c (grid_eliminate_combined_simd_part): Use
8487 OMP_CLAUSE_CODE to access the omp clause code.
8489 2020-04-07 Jeff Law <law@redhat.com>
8491 PR rtl-optimization/92264
8492 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
8493 the destination is the stack pointer.
8495 2020-04-07 Jakub Jelinek <jakub@redhat.com>
8497 PR rtl-optimization/94291
8498 PR rtl-optimization/84169
8499 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
8500 must be a REG or SUBREG of REG; if it is not one of these, don't
8503 2020-04-07 Richard Biener <rguenther@suse.de>
8506 * gimplify.c (gimplify_addr_expr): Also consider generated
8509 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8511 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
8513 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8515 * config/arm/arm_mve.h: Cast some pointers to expected types.
8517 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8519 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
8520 same with '__arm_' prefix.
8522 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8524 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
8526 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8528 * config/arm/arm.c (arm_mve_immediate_check): Removed.
8529 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
8530 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
8531 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
8532 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
8533 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
8534 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
8536 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8538 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
8540 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8542 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
8543 * config/arm/mve/md: Fix v[id]wdup patterns.
8545 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8547 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
8548 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
8550 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8552 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
8553 and remove const_ptr enums.
8555 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
8557 * config/arm/arm_mve.h (vsubq_n): Merge with...
8559 (vmulq_n): Merge with...
8561 (__ARM_mve_typeid): Simplify scalar and constant detection.
8563 2020-04-07 Jakub Jelinek <jakub@redhat.com>
8566 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
8567 for inter-lane permutation for 64-byte modes.
8570 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
8571 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
8572 Assume it is a REG after that instead of testing it and doing FAIL
8573 otherwise. Formatting fix.
8575 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
8577 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
8579 2020-04-07 Jakub Jelinek <jakub@redhat.com>
8582 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
8583 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
8585 2020-04-06 Jakub Jelinek <jakub@redhat.com>
8587 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
8588 + const0_rtx return the SP_DERIVED_VALUE_P.
8590 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
8592 PR rtl-optimization/92989
8593 * lra-lives.c (process_bb_lives): Do not treat eh_return data
8594 registers as being live at the beginning of the EH receiver.
8596 2020-04-05 Zachary Spytz <zspytz@gmail.com>
8598 * extend.texi: Add free to list of ISO C90 functions that
8599 are recognized by the compiler.
8601 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
8603 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
8606 * config/microblaze/microblaze.md (trap): Update output pattern.
8608 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
8609 Jakub Jelinek <jakub@redhat.com>
8612 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
8613 arrays, pointer-to-members, function types and qualifiers when
8614 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
8615 to emit type again on definition.
8617 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
8620 * ipa-fnsummary.c (vrp_will_run_p): New function.
8621 (fre_will_run_p): New function.
8622 (evaluate_properties_for_edge): Use it.
8623 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
8624 !optimize_debug to optimize_debug.
8626 2020-04-04 Jakub Jelinek <jakub@redhat.com>
8628 PR rtl-optimization/94468
8629 * cselib.c (references_value_p): Formatting fix.
8630 (cselib_useless_value_p): New function.
8631 (discard_useless_locs, discard_useless_values,
8632 cselib_invalidate_regno_val, cselib_invalidate_mem,
8633 cselib_record_set): Use it instead of
8634 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
8637 * tree-iterator.h (expr_single): Declare.
8638 * tree-iterator.c (expr_single): New function.
8639 * tree.h (protected_set_expr_location_if_unset): Declare.
8640 * tree.c (protected_set_expr_location): Use expr_single.
8641 (protected_set_expr_location_if_unset): New function.
8643 2020-04-03 Jeff Law <law@redhat.com>
8645 PR rtl-optimization/92264
8646 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
8647 reloading of auto-increment addressing modes.
8649 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
8652 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
8655 2020-04-03 Jeff Law <law@redhat.com>
8657 PR rtl-optimization/92264
8658 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
8659 post-increment addressing of source operands as well as residuals
8660 when computing any adjustments to the input pointer.
8662 2020-04-03 Jakub Jelinek <jakub@redhat.com>
8665 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
8666 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
8667 second half of first lane from first lane of second operand and
8668 first half of second lane from second lane of first operand.
8670 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
8672 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
8674 2020-04-03 Tamar Christina <tamar.christina@arm.com>
8677 * common/config/aarch64/aarch64-common.c
8678 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
8680 2020-04-03 Richard Biener <rguenther@suse.de>
8683 * tree.c (array_ref_low_bound): Deal with released SSA names
8686 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
8688 * config/gcn/gcn.c (print_operand): Handle unordered comparison
8690 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
8691 comparison operators.
8693 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
8695 PR tree-optimization/94443
8696 * tree-vect-loop.c (vectorizable_live_operation): Use
8697 gsi_insert_seq_before to replace gsi_insert_before.
8699 2020-04-03 Martin Liska <mliska@suse.cz>
8702 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
8703 Compare type attributes for gimple_call_fntypes.
8705 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
8707 * alias.c (get_alias_set): Fix comment typos.
8709 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
8712 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
8713 attribute checking used by TYPE.
8715 2020-04-02 Martin Jambor <mjambor@suse.cz>
8718 * ipa-sra.c (struct caller_issues): New fields candidate and
8719 call_from_outside_comdat.
8720 (check_for_caller_issues): Check for calls from outsied of
8721 candidate's same_comdat_group.
8722 (check_all_callers_for_issues): Set up issues.candidate, check result
8724 (mark_callers_calls_comdat_local): New function.
8725 (process_isra_node_results): Set calls_comdat_local of callers if
8728 2020-04-02 Richard Biener <rguenther@suse.de>
8731 * common.opt (ffinite-loops): Initialize to zero.
8732 * opts.c (default_options_table): Remove OPT_ffinite_loops
8734 * cfgloop.h (loop::finite_p): New member.
8735 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
8736 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
8738 * lto-streamer-in.c (input_cfg): Stream finite_p.
8739 * lto-streamer-out.c (output_cfg): Likewise.
8740 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
8741 from flag_finite_loops at CFG build time.
8742 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
8743 finite_p flag instead of flag_finite_loops.
8744 * doc/invoke.texi (ffinite-loops): Adjust documentation of
8747 2020-04-02 Richard Biener <rguenther@suse.de>
8750 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
8751 DW_TAG_imported_unit.
8753 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
8755 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
8756 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
8759 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
8761 PR tree-optimization/94401
8762 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
8763 access type when loading halves of vector to avoid peeling for gaps.
8765 2020-04-02 Jakub Jelinek <jakub@redhat.com>
8767 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
8768 between a string literal and MIPS_SYSVERSION_SPEC macro.
8770 2020-04-02 Martin Jambor <mjambor@suse.cz>
8772 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
8774 2020-04-02 Jakub Jelinek <jakub@redhat.com>
8776 PR rtl-optimization/92264
8777 * params.opt (-param=max-find-base-term-values=): Decrease default
8780 PR rtl-optimization/92264
8781 * rtl.h (struct rtx_def): Mention that call bit is used as
8782 SP_DERIVED_VALUE_P in cselib.c.
8783 * cselib.c (SP_DERIVED_VALUE_P): Define.
8784 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
8785 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
8786 val_rtx and sp based expression where offsets cancel each other.
8787 (preserve_constants_and_equivs): Formatting fix.
8788 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
8789 locs list for cfa_base_preserved_val if needed. Formatting fix.
8790 (autoinc_split): If the to be returned value is a REG, MEM or
8791 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
8792 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
8793 (rtx_equal_for_cselib_1): Call autoinc_split even if both
8794 expressions are PLUS in Pmode with CONST_INT second operands.
8795 Handle SP_DERIVED_VALUE_P cases.
8796 (cselib_hash_plus_const_int): New function.
8797 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
8798 second operand, as well as for PRE_DEC etc. that ought to be
8799 hashed the same way.
8800 (cselib_subst_to_values): Substitute PLUS with Pmode and
8801 CONST_INT operand if the first operand is a VALUE which has
8802 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
8803 SP_DERIVED_VALUE_P + adjusted offset.
8804 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
8805 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
8806 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
8807 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
8808 on the sp value before calling cselib_add_permanent_equiv on the
8810 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
8811 in the insn without REG_INC note.
8812 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
8813 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
8816 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
8817 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
8819 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8822 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
8823 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
8824 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
8825 intrinsic defintion by adding a new builtin call to writeback into base
8827 (__arm_vldrdq_gather_base_wb_u64): Likewise.
8828 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
8829 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
8830 (__arm_vldrwq_gather_base_wb_s32): Likewise.
8831 (__arm_vldrwq_gather_base_wb_u32): Likewise.
8832 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
8833 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
8834 (__arm_vldrwq_gather_base_wb_f32): Likewise.
8835 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
8836 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
8837 builtin's qualifier.
8838 (vldrdq_gather_base_wb_z_u): Likewise.
8839 (vldrwq_gather_base_wb_u): Likewise.
8840 (vldrdq_gather_base_wb_u): Likewise.
8841 (vldrwq_gather_base_wb_z_s): Likewise.
8842 (vldrwq_gather_base_wb_z_f): Likewise.
8843 (vldrdq_gather_base_wb_z_s): Likewise.
8844 (vldrwq_gather_base_wb_s): Likewise.
8845 (vldrwq_gather_base_wb_f): Likewise.
8846 (vldrdq_gather_base_wb_s): Likewise.
8847 (vldrwq_gather_base_nowb_z_u): Define builtin.
8848 (vldrdq_gather_base_nowb_z_u): Likewise.
8849 (vldrwq_gather_base_nowb_u): Likewise.
8850 (vldrdq_gather_base_nowb_u): Likewise.
8851 (vldrwq_gather_base_nowb_z_s): Likewise.
8852 (vldrwq_gather_base_nowb_z_f): Likewise.
8853 (vldrdq_gather_base_nowb_z_s): Likewise.
8854 (vldrwq_gather_base_nowb_s): Likewise.
8855 (vldrwq_gather_base_nowb_f): Likewise.
8856 (vldrdq_gather_base_nowb_s): Likewise.
8857 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
8859 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
8860 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
8861 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
8862 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
8863 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
8864 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
8865 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
8866 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
8867 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
8868 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
8869 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
8871 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
8873 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
8874 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
8875 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
8876 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
8877 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
8878 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
8879 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
8880 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
8881 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
8883 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
8884 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
8885 Remove constraints from expander.
8886 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
8887 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
8888 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
8889 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
8890 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
8891 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
8893 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
8895 PR rtl-optimization/94123
8896 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
8897 flag_split_wide_types_early.
8899 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
8901 * doc/extend.texi (Common Function Attributes): Fix typo.
8903 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
8906 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
8909 2020-04-01 Zackery Spytz <zspytz@gmail.com>
8911 * doc/extend.texi: Fix a typo in the documentation of the
8912 copy function attribute.
8914 2020-04-01 Jakub Jelinek <jakub@redhat.com>
8917 * tree-object-size.c (pass_object_sizes::execute): Don't call
8918 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
8919 call replace_call_with_value.
8921 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
8923 PR tree-optimization/94043
8924 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
8925 phi for vec_lhs and use it for lane extraction.
8927 2020-03-31 Felix Yang <felix.yang@huawei.com>
8929 PR tree-optimization/94398
8930 * tree-vect-stmts.c (vectorizable_store): Instead of calling
8931 vect_supportable_dr_alignment, set alignment_support_scheme to
8932 dr_unaligned_supported for gather-scatter accesses.
8933 (vectorizable_load): Likewise.
8935 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
8937 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
8939 (vnsi, VnSI, vndi, VnDI): New mode attributes.
8940 (mov<mode>): Use <VnDI> in place of V64DI.
8941 (mov<mode>_exec): Likewise.
8942 (mov<mode>_sgprbase): Likewise.
8943 (reload_out<mode>): Likewise.
8944 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
8945 (gather_load<mode>v64si): Rename to ...
8946 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
8947 and <VnDI> in place of V64DI.
8948 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
8949 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
8950 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
8951 (scatter_store<mode>v64si): Rename to ...
8952 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
8953 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
8954 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
8955 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
8956 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
8957 (ds_bpermute<mode>): Use <VnSI>.
8958 (addv64si3_vcc<exec_vcc>): Rename to ...
8959 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
8960 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
8961 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
8962 (addcv64si3<exec_vcc>): Rename to ...
8963 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
8964 (subv64si3_vcc<exec_vcc>): Rename to ...
8965 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
8966 (subcv64si3<exec_vcc>): Rename to ...
8967 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
8968 (addv64di3): Rename to ...
8969 (add<mode>3): ... this, and use V_DI.
8970 (addv64di3_exec): Rename to ...
8971 (add<mode>3_exec): ... this, and use V_DI.
8972 (subv64di3): Rename to ...
8973 (sub<mode>3): ... this, and use V_DI.
8974 (subv64di3_exec): Rename to ...
8975 (sub<mode>3_exec): ... this, and use V_DI.
8976 (addv64di3_zext): Rename to ...
8977 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
8978 (addv64di3_zext_exec): Rename to ...
8979 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
8980 (addv64di3_zext_dup): Rename to ...
8981 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
8982 (addv64di3_zext_dup_exec): Rename to ...
8983 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
8984 (addv64di3_zext_dup2): Rename to ...
8985 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
8986 (addv64di3_zext_dup2_exec): Rename to ...
8987 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
8988 (addv64di3_sext_dup2): Rename to ...
8989 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
8990 (addv64di3_sext_dup2_exec): Rename to ...
8991 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
8992 (<su>mulv64si3_highpart<exec>): Rename to ...
8993 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
8994 (mulv64di3): Rename to ...
8995 (mul<mode>3): ... this, and use V_DI and <VnSI>.
8996 (mulv64di3_exec): Rename to ...
8997 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
8998 (mulv64di3_zext): Rename to ...
8999 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
9000 (mulv64di3_zext_exec): Rename to ...
9001 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
9002 (mulv64di3_zext_dup2): Rename to ...
9003 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
9004 (mulv64di3_zext_dup2_exec): Rename to ...
9005 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
9006 (<expander>v64di3): Rename to ...
9007 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
9008 (<expander>v64di3_exec): Rename to ...
9009 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
9010 (<expander>v64si3<exec>): Rename to ...
9011 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
9012 (v<expander>v64si3<exec>): Rename to ...
9013 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
9014 (<expander>v64si3<exec>): Rename to ...
9015 (<expander><vnsi>3<exec>): ... this, and use V_SI.
9016 (subv64df3<exec>): Rename to ...
9017 (sub<mode>3<exec>): ... this, and use V_DF.
9018 (truncv64di<mode>2): Rename to ...
9019 (trunc<vndi><mode>2): ... this, and use <VnDI>.
9020 (truncv64di<mode>2_exec): Rename to ...
9021 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
9022 (<convop><mode>v64di2): Rename to ...
9023 (<convop><mode><vndi>2): ... this, and use <VnDI>.
9024 (<convop><mode>v64di2_exec): Rename to ...
9025 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
9026 (vec_cmp<u>v64qidi): Rename to ...
9027 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
9028 (vec_cmp<u>v64qidi_exec): Rename to ...
9029 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
9030 (vcond_mask_<mode>di): Use <VnDI>.
9031 (maskload<mode>di): Likewise.
9032 (maskstore<mode>di): Likewise.
9033 (mask_gather_load<mode>v64si): Rename to ...
9034 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
9035 (mask_scatter_store<mode>v64si): Rename to ...
9036 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
9037 (*<reduc_op>_dpp_shr_v64di): Rename to ...
9038 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
9039 (*plus_carry_in_dpp_shr_v64si): Rename to ...
9040 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
9041 (*plus_carry_dpp_shr_v64di): Rename to ...
9042 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
9043 (vec_seriesv64si): Rename to ...
9044 (vec_series<mode>): ... this, and use V_SI.
9045 (vec_seriesv64di): Rename to ...
9046 (vec_series<mode>): ... this, and use V_DI.
9048 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
9050 * config/arc/arc.c (arc_print_operand): Use
9051 HOST_WIDE_INT_PRINT_DEC macro.
9053 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
9055 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
9057 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9059 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
9061 (__arm_vbicq): Likewise.
9063 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
9065 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
9067 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9069 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
9070 common section of both MVE Integer and MVE Floating Point.
9072 (vaddlvq_p): Likewise.
9073 (vaddvaq): Likewise.
9074 (vaddvq_p): Likewise.
9075 (vcmpcsq): Likewise.
9076 (vmlsdavxq): Likewise.
9077 (vmlsdavq): Likewise.
9078 (vmladavxq): Likewise.
9079 (vmladavq): Likewise.
9081 (vminavq): Likewise.
9083 (vmaxavq): Likewise.
9084 (vmlaldavq): Likewise.
9085 (vcmphiq): Likewise.
9086 (vaddlvaq): Likewise.
9087 (vrmlaldavhq): Likewise.
9088 (vrmlaldavhxq): Likewise.
9089 (vrmlsldavhq): Likewise.
9090 (vrmlsldavhxq): Likewise.
9091 (vmlsldavxq): Likewise.
9092 (vmlsldavq): Likewise.
9094 (vrmlaldavhaq): Likewise.
9095 (vcmpgeq_m_n): Likewise.
9096 (vmlsdavxq_p): Likewise.
9097 (vmlsdavq_p): Likewise.
9098 (vmlsdavaxq): Likewise.
9099 (vmlsdavaq): Likewise.
9100 (vaddvaq_p): Likewise.
9101 (vcmpcsq_m_n): Likewise.
9102 (vcmpcsq_m): Likewise.
9103 (vmladavxq_p): Likewise.
9104 (vmladavq_p): Likewise.
9105 (vmladavaxq): Likewise.
9106 (vmladavaq): Likewise.
9107 (vminvq_p): Likewise.
9108 (vminavq_p): Likewise.
9109 (vmaxvq_p): Likewise.
9110 (vmaxavq_p): Likewise.
9111 (vcmphiq_m): Likewise.
9112 (vaddlvaq_p): Likewise.
9113 (vmlaldavaq): Likewise.
9114 (vmlaldavaxq): Likewise.
9115 (vmlaldavq_p): Likewise.
9116 (vmlaldavxq_p): Likewise.
9117 (vmlsldavaq): Likewise.
9118 (vmlsldavaxq): Likewise.
9119 (vmlsldavq_p): Likewise.
9120 (vmlsldavxq_p): Likewise.
9121 (vrmlaldavhaxq): Likewise.
9122 (vrmlaldavhq_p): Likewise.
9123 (vrmlaldavhxq_p): Likewise.
9124 (vrmlsldavhaq): Likewise.
9125 (vrmlsldavhaxq): Likewise.
9126 (vrmlsldavhq_p): Likewise.
9127 (vrmlsldavhxq_p): Likewise.
9128 (vabavq_p): Likewise.
9129 (vmladavaq_p): Likewise.
9130 (vstrbq_scatter_offset): Likewise.
9131 (vstrbq_p): Likewise.
9132 (vstrbq_scatter_offset_p): Likewise.
9133 (vstrdq_scatter_base_p): Likewise.
9134 (vstrdq_scatter_base): Likewise.
9135 (vstrdq_scatter_offset_p): Likewise.
9136 (vstrdq_scatter_offset): Likewise.
9137 (vstrdq_scatter_shifted_offset_p): Likewise.
9138 (vstrdq_scatter_shifted_offset): Likewise.
9139 (vmaxq_x): Likewise.
9140 (vminq_x): Likewise.
9141 (vmovlbq_x): Likewise.
9142 (vmovltq_x): Likewise.
9143 (vmulhq_x): Likewise.
9144 (vmullbq_int_x): Likewise.
9145 (vmullbq_poly_x): Likewise.
9146 (vmulltq_int_x): Likewise.
9147 (vmulltq_poly_x): Likewise.
9150 2020-03-31 Jakub Jelinek <jakub@redhat.com>
9153 * config/aarch64/constraints.md (Uph): New constraint.
9154 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
9155 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
9158 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
9159 Jakub Jelinek <jakub@redhat.com>
9162 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
9163 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
9165 2020-03-31 Jakub Jelinek <jakub@redhat.com>
9167 PR tree-optimization/94403
9168 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
9169 ENUMERAL_TYPE lhs_type.
9171 PR rtl-optimization/94344
9172 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
9173 conversions, either on both operands of |^+ or just one. Handle
9174 also extra same precision conversion on RSHIFT_EXPR first operand
9175 provided RSHIFT_EXPR is performed in unsigned type.
9177 2020-03-30 David Malcolm <dmalcolm@redhat.com>
9179 * lra.c (finish_insn_code_data_once): Set the array elements
9180 to NULL after freeing them.
9182 2020-03-30 Andreas Schwab <schwab@suse.de>
9184 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
9187 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
9189 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
9190 to skip defining builtins based on builtin_mask.
9192 2020-03-30 Jakub Jelinek <jakub@redhat.com>
9195 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
9196 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
9197 operand is a register. Don't enable masked variants for V*[QH]Imode.
9200 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
9201 <store_mask_constraint> instead of m in output operand constraint.
9202 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
9205 2020-03-30 Alan Modra <amodra@gmail.com>
9207 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
9208 (rs6000_indirect_call_template_1): Adjust to suit.
9209 * config/rs6000/rs6000.md (call_local): Merge call_local32,
9210 call_local64, and call_local_aix.
9211 (call_value_local): Simlarly.
9212 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
9213 and disable pattern when CALL_LONG.
9214 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
9215 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
9216 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
9218 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
9221 * doc/invoke.texi: Update -falign-functions, -falign-loops and
9222 -falign-jumps documentation.
9224 2020-03-29 Martin Liska <mliska@suse.cz>
9227 * cgraphunit.c (process_function_and_variable_attributes): Remove
9228 double 'attribute' words.
9230 2020-03-29 John David Anglin <dave.anglin@bell.net>
9232 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
9235 2020-03-28 Jakub Jelinek <jakub@redhat.com>
9238 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
9239 to true after setting size to integer_one_node.
9241 PR tree-optimization/94329
9242 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
9243 on the last stmt in a bb, make sure gsi_prev isn't done immediately
9246 2020-03-27 Alan Modra <amodra@gmail.com>
9249 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
9250 for PLT16_LO and PLT_PCREL.
9251 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
9252 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
9253 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
9255 2020-03-27 Martin Sebor <msebor@redhat.com>
9258 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
9260 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
9262 * config/gcn/gcn-valu.md:
9263 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
9264 (VEC_1REG_MODE): Delete.
9265 (VEC_1REG_ALT): Delete.
9266 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
9267 (VEC_1REG_INT_MODE): Delete.
9268 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
9269 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
9270 (VEC_2REG_MODE): Rename to V_2REG throughout.
9271 (VEC_REG_MODE): Rename to V_noHI throughout.
9272 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
9273 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
9274 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
9275 (VEC_INT_MODE): Delete.
9276 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
9277 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
9278 (FP_MODE): Delete and replace with FP throughout.
9279 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
9280 (VCMP_MODE): Rename to V_noQI throughout and move to top.
9281 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
9282 * config/gcn/gcn.md (FP): New mode iterator.
9283 (FP_1REG): New mode iterator.
9285 2020-03-27 David Malcolm <dmalcolm@redhat.com>
9287 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
9288 now emits two .dot files.
9289 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
9290 (graphviz_out::end_tr): Only close a TR, not a TD.
9291 (graphviz_out::begin_td): New.
9292 (graphviz_out::end_td): New.
9293 (graphviz_out::begin_trtd): New, replacing the old implementation
9294 of graphviz_out::begin_tr.
9295 (graphviz_out::end_tdtr): New, replacing the old implementation
9296 of graphviz_out::end_tr.
9297 * graphviz.h (graphviz_out::begin_td): New decl.
9298 (graphviz_out::end_td): New decl.
9299 (graphviz_out::begin_trtd): New decl.
9300 (graphviz_out::end_tdtr): New decl.
9302 2020-03-27 Richard Biener <rguenther@suse.de>
9305 * dwarf2out.c (should_emit_struct_debug): Return false for
9308 2020-03-27 Richard Biener <rguenther@suse.de>
9310 PR tree-optimization/94352
9311 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
9313 (ssa_propagation_engine::ssa_propagate): ... here after
9314 initializing curr_order.
9316 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
9318 PR tree-optimization/90332
9319 * tree-vect-stmts.c (vector_vector_composition_type): New function.
9320 (get_group_load_store_type): Adjust to call
9321 vector_vector_composition_type, extend it to construct with scalar
9323 (vectorizable_load): Likewise.
9325 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
9327 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
9328 (create_ddg_dep_no_link): Likewise.
9329 (add_cross_iteration_register_deps): Move debug instruction check.
9330 Other minor refactoring.
9331 (add_intra_loop_mem_dep): Do not check for debug instructions.
9332 (add_inter_loop_mem_dep): Likewise.
9333 (build_intra_loop_deps): Likewise.
9334 (create_ddg): Do not include debug insns into the graph.
9335 * ddg.h (struct ddg): Remove num_debug field.
9336 * modulo-sched.c (doloop_register_get): Adjust condition.
9337 (res_MII): Remove DDG num_debug field usage.
9338 (sms_schedule_by_order): Use assertion against debug insns.
9339 (ps_has_conflicts): Drop debug insn check.
9341 2020-03-26 Jakub Jelinek <jakub@redhat.com>
9344 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
9345 that contains exactly one non-DEBUG_BEGIN_STMT statement.
9348 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
9349 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
9350 a single non-debug stmt followed by one or more debug stmts.
9351 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
9352 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
9353 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
9354 gimple_seq_last to check if outer_stmt gbind could be reused and
9355 if yes and it is surrounded by any debug stmts, move them into the
9358 PR rtl-optimization/92264
9359 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
9360 for sp based values in !frame_pointer_needed
9361 && !ACCUMULATE_OUTGOING_ARGS functions.
9363 2020-03-26 Felix Yang <felix.yang@huawei.com>
9365 PR tree-optimization/94269
9366 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
9368 operation to single basic block.
9370 2020-03-25 Jeff Law <law@redhat.com>
9372 PR rtl-optimization/90275
9373 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
9376 2020-03-25 Jakub Jelinek <jakub@redhat.com>
9379 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
9380 mode rather than VOIDmode.
9382 2020-03-25 Martin Sebor <msebor@redhat.com>
9385 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
9386 even for alloca calls resulting from system macro expansion.
9387 Include inlining context in all warnings.
9389 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
9392 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
9393 FPRs to change between SDmode and DDmode.
9395 2020-03-25 Martin Sebor <msebor@redhat.com>
9397 PR tree-optimization/94131
9398 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
9400 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
9401 types have constant sizes.
9403 2020-03-25 Martin Liska <mliska@suse.cz>
9406 * configure.ac: Report error only when --with-zstd
9408 * configure: Regenerate.
9410 2020-03-25 Jakub Jelinek <jakub@redhat.com>
9413 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
9414 INSN_CODE (insn) to -1 when changing the pattern.
9416 2020-03-25 Martin Liska <mliska@suse.cz>
9420 * config/i386/i386-features.c (make_resolver_func): Drop
9421 public flag for resolver.
9422 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
9423 group for resolver and drop public flag if possible.
9424 * multiple_target.c (create_dispatcher_calls): Drop unique_name
9425 and resolution as we want to enable LTO privatization of the default
9428 2020-03-25 Martin Liska <mliska@suse.cz>
9431 * configure.ac: Respect --without-zstd and report
9432 error when we can't find header file with --with-zstd.
9433 * configure: Regenerate.
9435 2020-03-25 Jakub Jelinek <jakub@redhat.com>
9438 * varasm.c (output_constructor_array_range): If local->index
9439 RANGE_EXPR doesn't start at the current location in the constructor,
9440 skip needed number of bytes using assemble_zeros or assert we don't
9444 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
9445 counter instead of DECL_UID.
9447 PR tree-optimization/94300
9448 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
9449 is positive, make sure that off + size isn't larger than needed_len.
9451 2020-03-25 Richard Biener <rguenther@suse.de>
9452 Jakub Jelinek <jakub@redhat.com>
9455 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
9457 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
9459 * doc/sourcebuild.texi (ARM-specific attributes): Add
9461 (Features for dg-add-options): Add arm_fp_dp.
9463 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
9466 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
9468 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
9471 * omp-offload.c (omp_finish_file): Fix target-link handling if
9472 targetm_common.have_named_sections is false.
9474 2020-03-24 Jakub Jelinek <jakub@redhat.com>
9477 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
9481 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
9482 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
9483 If not after and at *incr_pos is a debug stmt, set stmt location to
9484 location of next non-debug stmt after it if any.
9487 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
9488 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
9489 worklist or set GF_PLF_2 just because it is used in a debug stmt in
9490 another bb. Formatting improvements.
9493 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
9494 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
9495 regardless of whether TREE_NO_WARNING is set on it or whether
9496 warn_unused_function is true or not.
9498 2020-03-23 Jeff Law <law@redhat.com>
9500 PR rtl-optimization/90275
9503 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
9504 (simplify_logical_relational_operation): Use it.
9506 2020-03-23 Jakub Jelinek <jakub@redhat.com>
9509 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
9510 ultimate rhs and if returned something different, reconstructing
9513 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
9515 * opts.c (print_filtered_help): Improve the help text for alias options.
9517 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9518 Andre Vieira <andre.simoesdiasvieira@arm.com>
9519 Mihail Ionescu <mihail.ionescu@arm.com>
9521 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
9522 (vshlcq_m_u8): Likewise.
9523 (vshlcq_m_s16): Likewise.
9524 (vshlcq_m_u16): Likewise.
9525 (vshlcq_m_s32): Likewise.
9526 (vshlcq_m_u32): Likewise.
9527 (__arm_vshlcq_m_s8): Define intrinsic.
9528 (__arm_vshlcq_m_u8): Likewise.
9529 (__arm_vshlcq_m_s16): Likewise.
9530 (__arm_vshlcq_m_u16): Likewise.
9531 (__arm_vshlcq_m_s32): Likewise.
9532 (__arm_vshlcq_m_u32): Likewise.
9533 (vshlcq_m): Define polymorphic variant.
9534 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
9535 Use builtin qualifier.
9536 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
9537 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
9538 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
9539 (mve_vshlcq_m_<supf><mode>): Likewise.
9541 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9543 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
9544 (UQSHL_QUALIFIERS): Likewise.
9545 (ASRL_QUALIFIERS): Likewise.
9546 (SQSHL_QUALIFIERS): Likewise.
9547 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
9549 (sqrshr): Define macro.
9550 (sqrshrl): Likewise.
9551 (sqrshrl_sat48): Likewise.
9557 (uqrshll): Likewise.
9558 (uqrshll_sat48): Likewise.
9565 (__arm_lsll): Define intrinsic.
9566 (__arm_asrl): Likewise.
9567 (__arm_uqrshll): Likewise.
9568 (__arm_uqrshll_sat48): Likewise.
9569 (__arm_sqrshrl): Likewise.
9570 (__arm_sqrshrl_sat48): Likewise.
9571 (__arm_uqshll): Likewise.
9572 (__arm_urshrl): Likewise.
9573 (__arm_srshrl): Likewise.
9574 (__arm_sqshll): Likewise.
9575 (__arm_uqrshl): Likewise.
9576 (__arm_sqrshr): Likewise.
9577 (__arm_uqshl): Likewise.
9578 (__arm_urshr): Likewise.
9579 (__arm_sqshl): Likewise.
9580 (__arm_srshr): Likewise.
9581 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
9583 (UQSHL_QUALIFIERS): Likewise.
9584 (ASRL_QUALIFIERS): Likewise.
9585 (SQSHL_QUALIFIERS): Likewise.
9586 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
9587 (mve_sqrshrl_sat<supf>_di): Likewise.
9588 (mve_uqrshl_si): Likewise.
9589 (mve_sqrshr_si): Likewise.
9590 (mve_uqshll_di): Likewise.
9591 (mve_urshrl_di): Likewise.
9592 (mve_uqshl_si): Likewise.
9593 (mve_urshr_si): Likewise.
9594 (mve_sqshl_si): Likewise.
9595 (mve_srshr_si): Likewise.
9596 (mve_srshrl_di): Likewise.
9597 (mve_sqshll_di): Likewise.
9599 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9600 Andre Vieira <andre.simoesdiasvieira@arm.com>
9601 Mihail Ionescu <mihail.ionescu@arm.com>
9603 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
9604 (vsetq_lane_f32): Likewise.
9605 (vsetq_lane_s16): Likewise.
9606 (vsetq_lane_s32): Likewise.
9607 (vsetq_lane_s8): Likewise.
9608 (vsetq_lane_s64): Likewise.
9609 (vsetq_lane_u8): Likewise.
9610 (vsetq_lane_u16): Likewise.
9611 (vsetq_lane_u32): Likewise.
9612 (vsetq_lane_u64): Likewise.
9613 (vgetq_lane_f16): Likewise.
9614 (vgetq_lane_f32): Likewise.
9615 (vgetq_lane_s16): Likewise.
9616 (vgetq_lane_s32): Likewise.
9617 (vgetq_lane_s8): Likewise.
9618 (vgetq_lane_s64): Likewise.
9619 (vgetq_lane_u8): Likewise.
9620 (vgetq_lane_u16): Likewise.
9621 (vgetq_lane_u32): Likewise.
9622 (vgetq_lane_u64): Likewise.
9623 (__ARM_NUM_LANES): Likewise.
9624 (__ARM_LANEQ): Likewise.
9625 (__ARM_CHECK_LANEQ): Likewise.
9626 (__arm_vsetq_lane_s16): Define intrinsic.
9627 (__arm_vsetq_lane_s32): Likewise.
9628 (__arm_vsetq_lane_s8): Likewise.
9629 (__arm_vsetq_lane_s64): Likewise.
9630 (__arm_vsetq_lane_u8): Likewise.
9631 (__arm_vsetq_lane_u16): Likewise.
9632 (__arm_vsetq_lane_u32): Likewise.
9633 (__arm_vsetq_lane_u64): Likewise.
9634 (__arm_vgetq_lane_s16): Likewise.
9635 (__arm_vgetq_lane_s32): Likewise.
9636 (__arm_vgetq_lane_s8): Likewise.
9637 (__arm_vgetq_lane_s64): Likewise.
9638 (__arm_vgetq_lane_u8): Likewise.
9639 (__arm_vgetq_lane_u16): Likewise.
9640 (__arm_vgetq_lane_u32): Likewise.
9641 (__arm_vgetq_lane_u64): Likewise.
9642 (__arm_vsetq_lane_f16): Likewise.
9643 (__arm_vsetq_lane_f32): Likewise.
9644 (__arm_vgetq_lane_f16): Likewise.
9645 (__arm_vgetq_lane_f32): Likewise.
9646 (vgetq_lane): Define polymorphic variant.
9647 (vsetq_lane): Likewise.
9648 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
9650 (mve_vec_extractv2didi): Likewise.
9651 (mve_vec_extract_sext_internal<mode>): Likewise.
9652 (mve_vec_extract_zext_internal<mode>): Likewise.
9653 (mve_vec_set<mode>_internal): Likewise.
9654 (mve_vec_setv2di_internal): Likewise.
9655 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
9657 (vec_extract<mode><V_elem_l>): Rename to
9658 "neon_vec_extract<mode><V_elem_l>".
9659 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
9660 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
9661 pattern common for MVE and NEON.
9662 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
9665 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
9667 * config/arm/mve.md (earlyclobber_32): New mode attribute.
9668 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
9669 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
9671 2020-03-23 Richard Biener <rguenther@suse.de>
9673 PR tree-optimization/94261
9674 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
9675 IL operand swapping code.
9676 (vect_slp_rearrange_stmts): Do not arrange isomorphic
9677 nodes that would need operation code adjustments.
9679 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
9681 * doc/install.texi (amdgcn-*-amdhsa): Renamed
9682 from amdgcn-unknown-amdhsa; change
9683 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
9685 2020-03-23 Richard Biener <rguenther@suse.de>
9688 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
9689 directly rather than also folding it via build_fold_addr_expr.
9691 2020-03-23 Richard Biener <rguenther@suse.de>
9693 PR tree-optimization/94266
9694 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
9695 addresses of TARGET_MEM_REFs.
9697 2020-03-23 Martin Liska <mliska@suse.cz>
9700 * symtab.c (symtab_node::clone_references): Save speculative_id
9701 as ref may be overwritten by create_reference.
9702 (symtab_node::clone_referring): Likewise.
9703 (symtab_node::clone_reference): Likewise.
9705 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
9707 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
9708 references to Darwin.
9709 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
9710 unconditionally and comment on why.
9712 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
9714 * config/darwin.c (darwin_mergeable_constant_section): Collect
9715 section anchor checks into the caller.
9716 (machopic_select_section): Collect section anchor checks into
9717 the determination of 'effective zero-size' objects. When the
9718 size is unknown, assume it is non-zero, and thus return the
9719 'generic' section for the DECL.
9721 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
9724 * config/darwin.opt: Amend options descriptions.
9726 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
9728 PR rtl-optimization/94052
9729 * lra-constraints.c (simplify_operand_subreg): Reload the inner
9730 register of a paradoxical subreg if simplify_subreg_regno fails
9731 to give a valid hard register for the outer mode.
9733 2020-03-20 Martin Jambor <mjambor@suse.cz>
9735 PR tree-optimization/93435
9736 * params.opt (sra-max-propagations): New parameter.
9737 * tree-sra.c (propagation_budget): New variable.
9738 (budget_for_propagation_access): New function.
9739 (propagate_subaccesses_from_rhs): Use it.
9740 (propagate_subaccesses_from_lhs): Likewise.
9741 (propagate_all_subaccesses): Set up and destroy propagation_budget.
9743 2020-03-20 Carl Love <cel@us.ibm.com>
9746 * config/rs6000/rs6000.c (rs6000_option_override_internal):
9747 Add check for TARGET_FPRND for Power 7 or newer.
9749 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
9752 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
9753 (cgraph_edge::redirect_callee): Move here; likewise.
9754 (cgraph_node::remove_callees): Update calls_comdat_local flag.
9755 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
9757 (cgraph_node::check_calls_comdat_local_p): New member function.
9758 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
9759 (cgraph_edge::redirect_callee): Move offline.
9760 * ipa-fnsummary.c (compute_fn_summary): Do not compute
9761 calls_comdat_local flag here.
9762 * ipa-inline-transform.c (inline_call): Fix updating of
9763 calls_comdat_local flag.
9764 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
9765 * symtab.c (symtab_node::add_to_same_comdat_group): Update
9766 calls_comdat_local flag.
9768 2020-03-20 Richard Biener <rguenther@suse.de>
9770 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
9771 from the possibly modified root.
9773 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9774 Andre Vieira <andre.simoesdiasvieira@arm.com>
9775 Mihail Ionescu <mihail.ionescu@arm.com>
9777 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
9778 (vst1q_p_s8): Likewise.
9779 (vst2q_s8): Likewise.
9780 (vst2q_u8): Likewise.
9781 (vld1q_z_u8): Likewise.
9782 (vld1q_z_s8): Likewise.
9783 (vld2q_s8): Likewise.
9784 (vld2q_u8): Likewise.
9785 (vld4q_s8): Likewise.
9786 (vld4q_u8): Likewise.
9787 (vst1q_p_u16): Likewise.
9788 (vst1q_p_s16): Likewise.
9789 (vst2q_s16): Likewise.
9790 (vst2q_u16): Likewise.
9791 (vld1q_z_u16): Likewise.
9792 (vld1q_z_s16): Likewise.
9793 (vld2q_s16): Likewise.
9794 (vld2q_u16): Likewise.
9795 (vld4q_s16): Likewise.
9796 (vld4q_u16): Likewise.
9797 (vst1q_p_u32): Likewise.
9798 (vst1q_p_s32): Likewise.
9799 (vst2q_s32): Likewise.
9800 (vst2q_u32): Likewise.
9801 (vld1q_z_u32): Likewise.
9802 (vld1q_z_s32): Likewise.
9803 (vld2q_s32): Likewise.
9804 (vld2q_u32): Likewise.
9805 (vld4q_s32): Likewise.
9806 (vld4q_u32): Likewise.
9807 (vld4q_f16): Likewise.
9808 (vld2q_f16): Likewise.
9809 (vld1q_z_f16): Likewise.
9810 (vst2q_f16): Likewise.
9811 (vst1q_p_f16): Likewise.
9812 (vld4q_f32): Likewise.
9813 (vld2q_f32): Likewise.
9814 (vld1q_z_f32): Likewise.
9815 (vst2q_f32): Likewise.
9816 (vst1q_p_f32): Likewise.
9817 (__arm_vst1q_p_u8): Define intrinsic.
9818 (__arm_vst1q_p_s8): Likewise.
9819 (__arm_vst2q_s8): Likewise.
9820 (__arm_vst2q_u8): Likewise.
9821 (__arm_vld1q_z_u8): Likewise.
9822 (__arm_vld1q_z_s8): Likewise.
9823 (__arm_vld2q_s8): Likewise.
9824 (__arm_vld2q_u8): Likewise.
9825 (__arm_vld4q_s8): Likewise.
9826 (__arm_vld4q_u8): Likewise.
9827 (__arm_vst1q_p_u16): Likewise.
9828 (__arm_vst1q_p_s16): Likewise.
9829 (__arm_vst2q_s16): Likewise.
9830 (__arm_vst2q_u16): Likewise.
9831 (__arm_vld1q_z_u16): Likewise.
9832 (__arm_vld1q_z_s16): Likewise.
9833 (__arm_vld2q_s16): Likewise.
9834 (__arm_vld2q_u16): Likewise.
9835 (__arm_vld4q_s16): Likewise.
9836 (__arm_vld4q_u16): Likewise.
9837 (__arm_vst1q_p_u32): Likewise.
9838 (__arm_vst1q_p_s32): Likewise.
9839 (__arm_vst2q_s32): Likewise.
9840 (__arm_vst2q_u32): Likewise.
9841 (__arm_vld1q_z_u32): Likewise.
9842 (__arm_vld1q_z_s32): Likewise.
9843 (__arm_vld2q_s32): Likewise.
9844 (__arm_vld2q_u32): Likewise.
9845 (__arm_vld4q_s32): Likewise.
9846 (__arm_vld4q_u32): Likewise.
9847 (__arm_vld4q_f16): Likewise.
9848 (__arm_vld2q_f16): Likewise.
9849 (__arm_vld1q_z_f16): Likewise.
9850 (__arm_vst2q_f16): Likewise.
9851 (__arm_vst1q_p_f16): Likewise.
9852 (__arm_vld4q_f32): Likewise.
9853 (__arm_vld2q_f32): Likewise.
9854 (__arm_vld1q_z_f32): Likewise.
9855 (__arm_vst2q_f32): Likewise.
9856 (__arm_vst1q_p_f32): Likewise.
9857 (vld1q_z): Define polymorphic variant.
9860 (vst1q_p): Likewise.
9862 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
9864 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
9865 (mve_vld2q<mode>): Likewise.
9866 (mve_vld4q<mode>): Likewise.
9868 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9869 Andre Vieira <andre.simoesdiasvieira@arm.com>
9870 Mihail Ionescu <mihail.ionescu@arm.com>
9872 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
9873 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
9874 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
9875 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
9876 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
9877 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
9878 * config/arm/arm_mve.h (vadciq_s32): Define macro.
9879 (vadciq_u32): Likewise.
9880 (vadciq_m_s32): Likewise.
9881 (vadciq_m_u32): Likewise.
9882 (vadcq_s32): Likewise.
9883 (vadcq_u32): Likewise.
9884 (vadcq_m_s32): Likewise.
9885 (vadcq_m_u32): Likewise.
9886 (vsbciq_s32): Likewise.
9887 (vsbciq_u32): Likewise.
9888 (vsbciq_m_s32): Likewise.
9889 (vsbciq_m_u32): Likewise.
9890 (vsbcq_s32): Likewise.
9891 (vsbcq_u32): Likewise.
9892 (vsbcq_m_s32): Likewise.
9893 (vsbcq_m_u32): Likewise.
9894 (__arm_vadciq_s32): Define intrinsic.
9895 (__arm_vadciq_u32): Likewise.
9896 (__arm_vadciq_m_s32): Likewise.
9897 (__arm_vadciq_m_u32): Likewise.
9898 (__arm_vadcq_s32): Likewise.
9899 (__arm_vadcq_u32): Likewise.
9900 (__arm_vadcq_m_s32): Likewise.
9901 (__arm_vadcq_m_u32): Likewise.
9902 (__arm_vsbciq_s32): Likewise.
9903 (__arm_vsbciq_u32): Likewise.
9904 (__arm_vsbciq_m_s32): Likewise.
9905 (__arm_vsbciq_m_u32): Likewise.
9906 (__arm_vsbcq_s32): Likewise.
9907 (__arm_vsbcq_u32): Likewise.
9908 (__arm_vsbcq_m_s32): Likewise.
9909 (__arm_vsbcq_m_u32): Likewise.
9910 (vadciq_m): Define polymorphic variant.
9912 (vadcq_m): Likewise.
9914 (vsbciq_m): Likewise.
9916 (vsbcq_m): Likewise.
9918 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
9920 (BINOP_UNONE_UNONE_UNONE): Likewise.
9921 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
9922 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
9923 * config/arm/mve.md (VADCIQ): Define iterator.
9924 (VADCIQ_M): Likewise.
9926 (VSBCQ_M): Likewise.
9928 (VSBCIQ_M): Likewise.
9930 (VADCQ_M): Likewise.
9931 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
9932 (mve_vadciq_<supf>v4si): Likewise.
9933 (mve_vadcq_m_<supf>v4si): Likewise.
9934 (mve_vadcq_<supf>v4si): Likewise.
9935 (mve_vsbciq_m_<supf>v4si): Likewise.
9936 (mve_vsbciq_<supf>v4si): Likewise.
9937 (mve_vsbcq_m_<supf>v4si): Likewise.
9938 (mve_vsbcq_<supf>v4si): Likewise.
9939 (get_fpscr_nzcvqc): Define isns.
9940 (set_fpscr_nzcvqc): Define isns.
9941 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
9942 (UNSPEC_SET_FPSCR_NZCVQC): Define.
9944 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9946 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
9947 (vddupq_x_n_u16): Likewise.
9948 (vddupq_x_n_u32): Likewise.
9949 (vddupq_x_wb_u8): Likewise.
9950 (vddupq_x_wb_u16): Likewise.
9951 (vddupq_x_wb_u32): Likewise.
9952 (vdwdupq_x_n_u8): Likewise.
9953 (vdwdupq_x_n_u16): Likewise.
9954 (vdwdupq_x_n_u32): Likewise.
9955 (vdwdupq_x_wb_u8): Likewise.
9956 (vdwdupq_x_wb_u16): Likewise.
9957 (vdwdupq_x_wb_u32): Likewise.
9958 (vidupq_x_n_u8): Likewise.
9959 (vidupq_x_n_u16): Likewise.
9960 (vidupq_x_n_u32): Likewise.
9961 (vidupq_x_wb_u8): Likewise.
9962 (vidupq_x_wb_u16): Likewise.
9963 (vidupq_x_wb_u32): Likewise.
9964 (viwdupq_x_n_u8): Likewise.
9965 (viwdupq_x_n_u16): Likewise.
9966 (viwdupq_x_n_u32): Likewise.
9967 (viwdupq_x_wb_u8): Likewise.
9968 (viwdupq_x_wb_u16): Likewise.
9969 (viwdupq_x_wb_u32): Likewise.
9970 (vdupq_x_n_s8): Likewise.
9971 (vdupq_x_n_s16): Likewise.
9972 (vdupq_x_n_s32): Likewise.
9973 (vdupq_x_n_u8): Likewise.
9974 (vdupq_x_n_u16): Likewise.
9975 (vdupq_x_n_u32): Likewise.
9976 (vminq_x_s8): Likewise.
9977 (vminq_x_s16): Likewise.
9978 (vminq_x_s32): Likewise.
9979 (vminq_x_u8): Likewise.
9980 (vminq_x_u16): Likewise.
9981 (vminq_x_u32): Likewise.
9982 (vmaxq_x_s8): Likewise.
9983 (vmaxq_x_s16): Likewise.
9984 (vmaxq_x_s32): Likewise.
9985 (vmaxq_x_u8): Likewise.
9986 (vmaxq_x_u16): Likewise.
9987 (vmaxq_x_u32): Likewise.
9988 (vabdq_x_s8): Likewise.
9989 (vabdq_x_s16): Likewise.
9990 (vabdq_x_s32): Likewise.
9991 (vabdq_x_u8): Likewise.
9992 (vabdq_x_u16): Likewise.
9993 (vabdq_x_u32): Likewise.
9994 (vabsq_x_s8): Likewise.
9995 (vabsq_x_s16): Likewise.
9996 (vabsq_x_s32): Likewise.
9997 (vaddq_x_s8): Likewise.
9998 (vaddq_x_s16): Likewise.
9999 (vaddq_x_s32): Likewise.
10000 (vaddq_x_n_s8): Likewise.
10001 (vaddq_x_n_s16): Likewise.
10002 (vaddq_x_n_s32): Likewise.
10003 (vaddq_x_u8): Likewise.
10004 (vaddq_x_u16): Likewise.
10005 (vaddq_x_u32): Likewise.
10006 (vaddq_x_n_u8): Likewise.
10007 (vaddq_x_n_u16): Likewise.
10008 (vaddq_x_n_u32): Likewise.
10009 (vclsq_x_s8): Likewise.
10010 (vclsq_x_s16): Likewise.
10011 (vclsq_x_s32): Likewise.
10012 (vclzq_x_s8): Likewise.
10013 (vclzq_x_s16): Likewise.
10014 (vclzq_x_s32): Likewise.
10015 (vclzq_x_u8): Likewise.
10016 (vclzq_x_u16): Likewise.
10017 (vclzq_x_u32): Likewise.
10018 (vnegq_x_s8): Likewise.
10019 (vnegq_x_s16): Likewise.
10020 (vnegq_x_s32): Likewise.
10021 (vmulhq_x_s8): Likewise.
10022 (vmulhq_x_s16): Likewise.
10023 (vmulhq_x_s32): Likewise.
10024 (vmulhq_x_u8): Likewise.
10025 (vmulhq_x_u16): Likewise.
10026 (vmulhq_x_u32): Likewise.
10027 (vmullbq_poly_x_p8): Likewise.
10028 (vmullbq_poly_x_p16): Likewise.
10029 (vmullbq_int_x_s8): Likewise.
10030 (vmullbq_int_x_s16): Likewise.
10031 (vmullbq_int_x_s32): Likewise.
10032 (vmullbq_int_x_u8): Likewise.
10033 (vmullbq_int_x_u16): Likewise.
10034 (vmullbq_int_x_u32): Likewise.
10035 (vmulltq_poly_x_p8): Likewise.
10036 (vmulltq_poly_x_p16): Likewise.
10037 (vmulltq_int_x_s8): Likewise.
10038 (vmulltq_int_x_s16): Likewise.
10039 (vmulltq_int_x_s32): Likewise.
10040 (vmulltq_int_x_u8): Likewise.
10041 (vmulltq_int_x_u16): Likewise.
10042 (vmulltq_int_x_u32): Likewise.
10043 (vmulq_x_s8): Likewise.
10044 (vmulq_x_s16): Likewise.
10045 (vmulq_x_s32): Likewise.
10046 (vmulq_x_n_s8): Likewise.
10047 (vmulq_x_n_s16): Likewise.
10048 (vmulq_x_n_s32): Likewise.
10049 (vmulq_x_u8): Likewise.
10050 (vmulq_x_u16): Likewise.
10051 (vmulq_x_u32): Likewise.
10052 (vmulq_x_n_u8): Likewise.
10053 (vmulq_x_n_u16): Likewise.
10054 (vmulq_x_n_u32): Likewise.
10055 (vsubq_x_s8): Likewise.
10056 (vsubq_x_s16): Likewise.
10057 (vsubq_x_s32): Likewise.
10058 (vsubq_x_n_s8): Likewise.
10059 (vsubq_x_n_s16): Likewise.
10060 (vsubq_x_n_s32): Likewise.
10061 (vsubq_x_u8): Likewise.
10062 (vsubq_x_u16): Likewise.
10063 (vsubq_x_u32): Likewise.
10064 (vsubq_x_n_u8): Likewise.
10065 (vsubq_x_n_u16): Likewise.
10066 (vsubq_x_n_u32): Likewise.
10067 (vcaddq_rot90_x_s8): Likewise.
10068 (vcaddq_rot90_x_s16): Likewise.
10069 (vcaddq_rot90_x_s32): Likewise.
10070 (vcaddq_rot90_x_u8): Likewise.
10071 (vcaddq_rot90_x_u16): Likewise.
10072 (vcaddq_rot90_x_u32): Likewise.
10073 (vcaddq_rot270_x_s8): Likewise.
10074 (vcaddq_rot270_x_s16): Likewise.
10075 (vcaddq_rot270_x_s32): Likewise.
10076 (vcaddq_rot270_x_u8): Likewise.
10077 (vcaddq_rot270_x_u16): Likewise.
10078 (vcaddq_rot270_x_u32): Likewise.
10079 (vhaddq_x_n_s8): Likewise.
10080 (vhaddq_x_n_s16): Likewise.
10081 (vhaddq_x_n_s32): Likewise.
10082 (vhaddq_x_n_u8): Likewise.
10083 (vhaddq_x_n_u16): Likewise.
10084 (vhaddq_x_n_u32): Likewise.
10085 (vhaddq_x_s8): Likewise.
10086 (vhaddq_x_s16): Likewise.
10087 (vhaddq_x_s32): Likewise.
10088 (vhaddq_x_u8): Likewise.
10089 (vhaddq_x_u16): Likewise.
10090 (vhaddq_x_u32): Likewise.
10091 (vhcaddq_rot90_x_s8): Likewise.
10092 (vhcaddq_rot90_x_s16): Likewise.
10093 (vhcaddq_rot90_x_s32): Likewise.
10094 (vhcaddq_rot270_x_s8): Likewise.
10095 (vhcaddq_rot270_x_s16): Likewise.
10096 (vhcaddq_rot270_x_s32): Likewise.
10097 (vhsubq_x_n_s8): Likewise.
10098 (vhsubq_x_n_s16): Likewise.
10099 (vhsubq_x_n_s32): Likewise.
10100 (vhsubq_x_n_u8): Likewise.
10101 (vhsubq_x_n_u16): Likewise.
10102 (vhsubq_x_n_u32): Likewise.
10103 (vhsubq_x_s8): Likewise.
10104 (vhsubq_x_s16): Likewise.
10105 (vhsubq_x_s32): Likewise.
10106 (vhsubq_x_u8): Likewise.
10107 (vhsubq_x_u16): Likewise.
10108 (vhsubq_x_u32): Likewise.
10109 (vrhaddq_x_s8): Likewise.
10110 (vrhaddq_x_s16): Likewise.
10111 (vrhaddq_x_s32): Likewise.
10112 (vrhaddq_x_u8): Likewise.
10113 (vrhaddq_x_u16): Likewise.
10114 (vrhaddq_x_u32): Likewise.
10115 (vrmulhq_x_s8): Likewise.
10116 (vrmulhq_x_s16): Likewise.
10117 (vrmulhq_x_s32): Likewise.
10118 (vrmulhq_x_u8): Likewise.
10119 (vrmulhq_x_u16): Likewise.
10120 (vrmulhq_x_u32): Likewise.
10121 (vandq_x_s8): Likewise.
10122 (vandq_x_s16): Likewise.
10123 (vandq_x_s32): Likewise.
10124 (vandq_x_u8): Likewise.
10125 (vandq_x_u16): Likewise.
10126 (vandq_x_u32): Likewise.
10127 (vbicq_x_s8): Likewise.
10128 (vbicq_x_s16): Likewise.
10129 (vbicq_x_s32): Likewise.
10130 (vbicq_x_u8): Likewise.
10131 (vbicq_x_u16): Likewise.
10132 (vbicq_x_u32): Likewise.
10133 (vbrsrq_x_n_s8): Likewise.
10134 (vbrsrq_x_n_s16): Likewise.
10135 (vbrsrq_x_n_s32): Likewise.
10136 (vbrsrq_x_n_u8): Likewise.
10137 (vbrsrq_x_n_u16): Likewise.
10138 (vbrsrq_x_n_u32): Likewise.
10139 (veorq_x_s8): Likewise.
10140 (veorq_x_s16): Likewise.
10141 (veorq_x_s32): Likewise.
10142 (veorq_x_u8): Likewise.
10143 (veorq_x_u16): Likewise.
10144 (veorq_x_u32): Likewise.
10145 (vmovlbq_x_s8): Likewise.
10146 (vmovlbq_x_s16): Likewise.
10147 (vmovlbq_x_u8): Likewise.
10148 (vmovlbq_x_u16): Likewise.
10149 (vmovltq_x_s8): Likewise.
10150 (vmovltq_x_s16): Likewise.
10151 (vmovltq_x_u8): Likewise.
10152 (vmovltq_x_u16): Likewise.
10153 (vmvnq_x_s8): Likewise.
10154 (vmvnq_x_s16): Likewise.
10155 (vmvnq_x_s32): Likewise.
10156 (vmvnq_x_u8): Likewise.
10157 (vmvnq_x_u16): Likewise.
10158 (vmvnq_x_u32): Likewise.
10159 (vmvnq_x_n_s16): Likewise.
10160 (vmvnq_x_n_s32): Likewise.
10161 (vmvnq_x_n_u16): Likewise.
10162 (vmvnq_x_n_u32): Likewise.
10163 (vornq_x_s8): Likewise.
10164 (vornq_x_s16): Likewise.
10165 (vornq_x_s32): Likewise.
10166 (vornq_x_u8): Likewise.
10167 (vornq_x_u16): Likewise.
10168 (vornq_x_u32): Likewise.
10169 (vorrq_x_s8): Likewise.
10170 (vorrq_x_s16): Likewise.
10171 (vorrq_x_s32): Likewise.
10172 (vorrq_x_u8): Likewise.
10173 (vorrq_x_u16): Likewise.
10174 (vorrq_x_u32): Likewise.
10175 (vrev16q_x_s8): Likewise.
10176 (vrev16q_x_u8): Likewise.
10177 (vrev32q_x_s8): Likewise.
10178 (vrev32q_x_s16): Likewise.
10179 (vrev32q_x_u8): Likewise.
10180 (vrev32q_x_u16): Likewise.
10181 (vrev64q_x_s8): Likewise.
10182 (vrev64q_x_s16): Likewise.
10183 (vrev64q_x_s32): Likewise.
10184 (vrev64q_x_u8): Likewise.
10185 (vrev64q_x_u16): Likewise.
10186 (vrev64q_x_u32): Likewise.
10187 (vrshlq_x_s8): Likewise.
10188 (vrshlq_x_s16): Likewise.
10189 (vrshlq_x_s32): Likewise.
10190 (vrshlq_x_u8): Likewise.
10191 (vrshlq_x_u16): Likewise.
10192 (vrshlq_x_u32): Likewise.
10193 (vshllbq_x_n_s8): Likewise.
10194 (vshllbq_x_n_s16): Likewise.
10195 (vshllbq_x_n_u8): Likewise.
10196 (vshllbq_x_n_u16): Likewise.
10197 (vshlltq_x_n_s8): Likewise.
10198 (vshlltq_x_n_s16): Likewise.
10199 (vshlltq_x_n_u8): Likewise.
10200 (vshlltq_x_n_u16): Likewise.
10201 (vshlq_x_s8): Likewise.
10202 (vshlq_x_s16): Likewise.
10203 (vshlq_x_s32): Likewise.
10204 (vshlq_x_u8): Likewise.
10205 (vshlq_x_u16): Likewise.
10206 (vshlq_x_u32): Likewise.
10207 (vshlq_x_n_s8): Likewise.
10208 (vshlq_x_n_s16): Likewise.
10209 (vshlq_x_n_s32): Likewise.
10210 (vshlq_x_n_u8): Likewise.
10211 (vshlq_x_n_u16): Likewise.
10212 (vshlq_x_n_u32): Likewise.
10213 (vrshrq_x_n_s8): Likewise.
10214 (vrshrq_x_n_s16): Likewise.
10215 (vrshrq_x_n_s32): Likewise.
10216 (vrshrq_x_n_u8): Likewise.
10217 (vrshrq_x_n_u16): Likewise.
10218 (vrshrq_x_n_u32): Likewise.
10219 (vshrq_x_n_s8): Likewise.
10220 (vshrq_x_n_s16): Likewise.
10221 (vshrq_x_n_s32): Likewise.
10222 (vshrq_x_n_u8): Likewise.
10223 (vshrq_x_n_u16): Likewise.
10224 (vshrq_x_n_u32): Likewise.
10225 (vdupq_x_n_f16): Likewise.
10226 (vdupq_x_n_f32): Likewise.
10227 (vminnmq_x_f16): Likewise.
10228 (vminnmq_x_f32): Likewise.
10229 (vmaxnmq_x_f16): Likewise.
10230 (vmaxnmq_x_f32): Likewise.
10231 (vabdq_x_f16): Likewise.
10232 (vabdq_x_f32): Likewise.
10233 (vabsq_x_f16): Likewise.
10234 (vabsq_x_f32): Likewise.
10235 (vaddq_x_f16): Likewise.
10236 (vaddq_x_f32): Likewise.
10237 (vaddq_x_n_f16): Likewise.
10238 (vaddq_x_n_f32): Likewise.
10239 (vnegq_x_f16): Likewise.
10240 (vnegq_x_f32): Likewise.
10241 (vmulq_x_f16): Likewise.
10242 (vmulq_x_f32): Likewise.
10243 (vmulq_x_n_f16): Likewise.
10244 (vmulq_x_n_f32): Likewise.
10245 (vsubq_x_f16): Likewise.
10246 (vsubq_x_f32): Likewise.
10247 (vsubq_x_n_f16): Likewise.
10248 (vsubq_x_n_f32): Likewise.
10249 (vcaddq_rot90_x_f16): Likewise.
10250 (vcaddq_rot90_x_f32): Likewise.
10251 (vcaddq_rot270_x_f16): Likewise.
10252 (vcaddq_rot270_x_f32): Likewise.
10253 (vcmulq_x_f16): Likewise.
10254 (vcmulq_x_f32): Likewise.
10255 (vcmulq_rot90_x_f16): Likewise.
10256 (vcmulq_rot90_x_f32): Likewise.
10257 (vcmulq_rot180_x_f16): Likewise.
10258 (vcmulq_rot180_x_f32): Likewise.
10259 (vcmulq_rot270_x_f16): Likewise.
10260 (vcmulq_rot270_x_f32): Likewise.
10261 (vcvtaq_x_s16_f16): Likewise.
10262 (vcvtaq_x_s32_f32): Likewise.
10263 (vcvtaq_x_u16_f16): Likewise.
10264 (vcvtaq_x_u32_f32): Likewise.
10265 (vcvtnq_x_s16_f16): Likewise.
10266 (vcvtnq_x_s32_f32): Likewise.
10267 (vcvtnq_x_u16_f16): Likewise.
10268 (vcvtnq_x_u32_f32): Likewise.
10269 (vcvtpq_x_s16_f16): Likewise.
10270 (vcvtpq_x_s32_f32): Likewise.
10271 (vcvtpq_x_u16_f16): Likewise.
10272 (vcvtpq_x_u32_f32): Likewise.
10273 (vcvtmq_x_s16_f16): Likewise.
10274 (vcvtmq_x_s32_f32): Likewise.
10275 (vcvtmq_x_u16_f16): Likewise.
10276 (vcvtmq_x_u32_f32): Likewise.
10277 (vcvtbq_x_f32_f16): Likewise.
10278 (vcvttq_x_f32_f16): Likewise.
10279 (vcvtq_x_f16_u16): Likewise.
10280 (vcvtq_x_f16_s16): Likewise.
10281 (vcvtq_x_f32_s32): Likewise.
10282 (vcvtq_x_f32_u32): Likewise.
10283 (vcvtq_x_n_f16_s16): Likewise.
10284 (vcvtq_x_n_f16_u16): Likewise.
10285 (vcvtq_x_n_f32_s32): Likewise.
10286 (vcvtq_x_n_f32_u32): Likewise.
10287 (vcvtq_x_s16_f16): Likewise.
10288 (vcvtq_x_s32_f32): Likewise.
10289 (vcvtq_x_u16_f16): Likewise.
10290 (vcvtq_x_u32_f32): Likewise.
10291 (vcvtq_x_n_s16_f16): Likewise.
10292 (vcvtq_x_n_s32_f32): Likewise.
10293 (vcvtq_x_n_u16_f16): Likewise.
10294 (vcvtq_x_n_u32_f32): Likewise.
10295 (vrndq_x_f16): Likewise.
10296 (vrndq_x_f32): Likewise.
10297 (vrndnq_x_f16): Likewise.
10298 (vrndnq_x_f32): Likewise.
10299 (vrndmq_x_f16): Likewise.
10300 (vrndmq_x_f32): Likewise.
10301 (vrndpq_x_f16): Likewise.
10302 (vrndpq_x_f32): Likewise.
10303 (vrndaq_x_f16): Likewise.
10304 (vrndaq_x_f32): Likewise.
10305 (vrndxq_x_f16): Likewise.
10306 (vrndxq_x_f32): Likewise.
10307 (vandq_x_f16): Likewise.
10308 (vandq_x_f32): Likewise.
10309 (vbicq_x_f16): Likewise.
10310 (vbicq_x_f32): Likewise.
10311 (vbrsrq_x_n_f16): Likewise.
10312 (vbrsrq_x_n_f32): Likewise.
10313 (veorq_x_f16): Likewise.
10314 (veorq_x_f32): Likewise.
10315 (vornq_x_f16): Likewise.
10316 (vornq_x_f32): Likewise.
10317 (vorrq_x_f16): Likewise.
10318 (vorrq_x_f32): Likewise.
10319 (vrev32q_x_f16): Likewise.
10320 (vrev64q_x_f16): Likewise.
10321 (vrev64q_x_f32): Likewise.
10322 (__arm_vddupq_x_n_u8): Define intrinsic.
10323 (__arm_vddupq_x_n_u16): Likewise.
10324 (__arm_vddupq_x_n_u32): Likewise.
10325 (__arm_vddupq_x_wb_u8): Likewise.
10326 (__arm_vddupq_x_wb_u16): Likewise.
10327 (__arm_vddupq_x_wb_u32): Likewise.
10328 (__arm_vdwdupq_x_n_u8): Likewise.
10329 (__arm_vdwdupq_x_n_u16): Likewise.
10330 (__arm_vdwdupq_x_n_u32): Likewise.
10331 (__arm_vdwdupq_x_wb_u8): Likewise.
10332 (__arm_vdwdupq_x_wb_u16): Likewise.
10333 (__arm_vdwdupq_x_wb_u32): Likewise.
10334 (__arm_vidupq_x_n_u8): Likewise.
10335 (__arm_vidupq_x_n_u16): Likewise.
10336 (__arm_vidupq_x_n_u32): Likewise.
10337 (__arm_vidupq_x_wb_u8): Likewise.
10338 (__arm_vidupq_x_wb_u16): Likewise.
10339 (__arm_vidupq_x_wb_u32): Likewise.
10340 (__arm_viwdupq_x_n_u8): Likewise.
10341 (__arm_viwdupq_x_n_u16): Likewise.
10342 (__arm_viwdupq_x_n_u32): Likewise.
10343 (__arm_viwdupq_x_wb_u8): Likewise.
10344 (__arm_viwdupq_x_wb_u16): Likewise.
10345 (__arm_viwdupq_x_wb_u32): Likewise.
10346 (__arm_vdupq_x_n_s8): Likewise.
10347 (__arm_vdupq_x_n_s16): Likewise.
10348 (__arm_vdupq_x_n_s32): Likewise.
10349 (__arm_vdupq_x_n_u8): Likewise.
10350 (__arm_vdupq_x_n_u16): Likewise.
10351 (__arm_vdupq_x_n_u32): Likewise.
10352 (__arm_vminq_x_s8): Likewise.
10353 (__arm_vminq_x_s16): Likewise.
10354 (__arm_vminq_x_s32): Likewise.
10355 (__arm_vminq_x_u8): Likewise.
10356 (__arm_vminq_x_u16): Likewise.
10357 (__arm_vminq_x_u32): Likewise.
10358 (__arm_vmaxq_x_s8): Likewise.
10359 (__arm_vmaxq_x_s16): Likewise.
10360 (__arm_vmaxq_x_s32): Likewise.
10361 (__arm_vmaxq_x_u8): Likewise.
10362 (__arm_vmaxq_x_u16): Likewise.
10363 (__arm_vmaxq_x_u32): Likewise.
10364 (__arm_vabdq_x_s8): Likewise.
10365 (__arm_vabdq_x_s16): Likewise.
10366 (__arm_vabdq_x_s32): Likewise.
10367 (__arm_vabdq_x_u8): Likewise.
10368 (__arm_vabdq_x_u16): Likewise.
10369 (__arm_vabdq_x_u32): Likewise.
10370 (__arm_vabsq_x_s8): Likewise.
10371 (__arm_vabsq_x_s16): Likewise.
10372 (__arm_vabsq_x_s32): Likewise.
10373 (__arm_vaddq_x_s8): Likewise.
10374 (__arm_vaddq_x_s16): Likewise.
10375 (__arm_vaddq_x_s32): Likewise.
10376 (__arm_vaddq_x_n_s8): Likewise.
10377 (__arm_vaddq_x_n_s16): Likewise.
10378 (__arm_vaddq_x_n_s32): Likewise.
10379 (__arm_vaddq_x_u8): Likewise.
10380 (__arm_vaddq_x_u16): Likewise.
10381 (__arm_vaddq_x_u32): Likewise.
10382 (__arm_vaddq_x_n_u8): Likewise.
10383 (__arm_vaddq_x_n_u16): Likewise.
10384 (__arm_vaddq_x_n_u32): Likewise.
10385 (__arm_vclsq_x_s8): Likewise.
10386 (__arm_vclsq_x_s16): Likewise.
10387 (__arm_vclsq_x_s32): Likewise.
10388 (__arm_vclzq_x_s8): Likewise.
10389 (__arm_vclzq_x_s16): Likewise.
10390 (__arm_vclzq_x_s32): Likewise.
10391 (__arm_vclzq_x_u8): Likewise.
10392 (__arm_vclzq_x_u16): Likewise.
10393 (__arm_vclzq_x_u32): Likewise.
10394 (__arm_vnegq_x_s8): Likewise.
10395 (__arm_vnegq_x_s16): Likewise.
10396 (__arm_vnegq_x_s32): Likewise.
10397 (__arm_vmulhq_x_s8): Likewise.
10398 (__arm_vmulhq_x_s16): Likewise.
10399 (__arm_vmulhq_x_s32): Likewise.
10400 (__arm_vmulhq_x_u8): Likewise.
10401 (__arm_vmulhq_x_u16): Likewise.
10402 (__arm_vmulhq_x_u32): Likewise.
10403 (__arm_vmullbq_poly_x_p8): Likewise.
10404 (__arm_vmullbq_poly_x_p16): Likewise.
10405 (__arm_vmullbq_int_x_s8): Likewise.
10406 (__arm_vmullbq_int_x_s16): Likewise.
10407 (__arm_vmullbq_int_x_s32): Likewise.
10408 (__arm_vmullbq_int_x_u8): Likewise.
10409 (__arm_vmullbq_int_x_u16): Likewise.
10410 (__arm_vmullbq_int_x_u32): Likewise.
10411 (__arm_vmulltq_poly_x_p8): Likewise.
10412 (__arm_vmulltq_poly_x_p16): Likewise.
10413 (__arm_vmulltq_int_x_s8): Likewise.
10414 (__arm_vmulltq_int_x_s16): Likewise.
10415 (__arm_vmulltq_int_x_s32): Likewise.
10416 (__arm_vmulltq_int_x_u8): Likewise.
10417 (__arm_vmulltq_int_x_u16): Likewise.
10418 (__arm_vmulltq_int_x_u32): Likewise.
10419 (__arm_vmulq_x_s8): Likewise.
10420 (__arm_vmulq_x_s16): Likewise.
10421 (__arm_vmulq_x_s32): Likewise.
10422 (__arm_vmulq_x_n_s8): Likewise.
10423 (__arm_vmulq_x_n_s16): Likewise.
10424 (__arm_vmulq_x_n_s32): Likewise.
10425 (__arm_vmulq_x_u8): Likewise.
10426 (__arm_vmulq_x_u16): Likewise.
10427 (__arm_vmulq_x_u32): Likewise.
10428 (__arm_vmulq_x_n_u8): Likewise.
10429 (__arm_vmulq_x_n_u16): Likewise.
10430 (__arm_vmulq_x_n_u32): Likewise.
10431 (__arm_vsubq_x_s8): Likewise.
10432 (__arm_vsubq_x_s16): Likewise.
10433 (__arm_vsubq_x_s32): Likewise.
10434 (__arm_vsubq_x_n_s8): Likewise.
10435 (__arm_vsubq_x_n_s16): Likewise.
10436 (__arm_vsubq_x_n_s32): Likewise.
10437 (__arm_vsubq_x_u8): Likewise.
10438 (__arm_vsubq_x_u16): Likewise.
10439 (__arm_vsubq_x_u32): Likewise.
10440 (__arm_vsubq_x_n_u8): Likewise.
10441 (__arm_vsubq_x_n_u16): Likewise.
10442 (__arm_vsubq_x_n_u32): Likewise.
10443 (__arm_vcaddq_rot90_x_s8): Likewise.
10444 (__arm_vcaddq_rot90_x_s16): Likewise.
10445 (__arm_vcaddq_rot90_x_s32): Likewise.
10446 (__arm_vcaddq_rot90_x_u8): Likewise.
10447 (__arm_vcaddq_rot90_x_u16): Likewise.
10448 (__arm_vcaddq_rot90_x_u32): Likewise.
10449 (__arm_vcaddq_rot270_x_s8): Likewise.
10450 (__arm_vcaddq_rot270_x_s16): Likewise.
10451 (__arm_vcaddq_rot270_x_s32): Likewise.
10452 (__arm_vcaddq_rot270_x_u8): Likewise.
10453 (__arm_vcaddq_rot270_x_u16): Likewise.
10454 (__arm_vcaddq_rot270_x_u32): Likewise.
10455 (__arm_vhaddq_x_n_s8): Likewise.
10456 (__arm_vhaddq_x_n_s16): Likewise.
10457 (__arm_vhaddq_x_n_s32): Likewise.
10458 (__arm_vhaddq_x_n_u8): Likewise.
10459 (__arm_vhaddq_x_n_u16): Likewise.
10460 (__arm_vhaddq_x_n_u32): Likewise.
10461 (__arm_vhaddq_x_s8): Likewise.
10462 (__arm_vhaddq_x_s16): Likewise.
10463 (__arm_vhaddq_x_s32): Likewise.
10464 (__arm_vhaddq_x_u8): Likewise.
10465 (__arm_vhaddq_x_u16): Likewise.
10466 (__arm_vhaddq_x_u32): Likewise.
10467 (__arm_vhcaddq_rot90_x_s8): Likewise.
10468 (__arm_vhcaddq_rot90_x_s16): Likewise.
10469 (__arm_vhcaddq_rot90_x_s32): Likewise.
10470 (__arm_vhcaddq_rot270_x_s8): Likewise.
10471 (__arm_vhcaddq_rot270_x_s16): Likewise.
10472 (__arm_vhcaddq_rot270_x_s32): Likewise.
10473 (__arm_vhsubq_x_n_s8): Likewise.
10474 (__arm_vhsubq_x_n_s16): Likewise.
10475 (__arm_vhsubq_x_n_s32): Likewise.
10476 (__arm_vhsubq_x_n_u8): Likewise.
10477 (__arm_vhsubq_x_n_u16): Likewise.
10478 (__arm_vhsubq_x_n_u32): Likewise.
10479 (__arm_vhsubq_x_s8): Likewise.
10480 (__arm_vhsubq_x_s16): Likewise.
10481 (__arm_vhsubq_x_s32): Likewise.
10482 (__arm_vhsubq_x_u8): Likewise.
10483 (__arm_vhsubq_x_u16): Likewise.
10484 (__arm_vhsubq_x_u32): Likewise.
10485 (__arm_vrhaddq_x_s8): Likewise.
10486 (__arm_vrhaddq_x_s16): Likewise.
10487 (__arm_vrhaddq_x_s32): Likewise.
10488 (__arm_vrhaddq_x_u8): Likewise.
10489 (__arm_vrhaddq_x_u16): Likewise.
10490 (__arm_vrhaddq_x_u32): Likewise.
10491 (__arm_vrmulhq_x_s8): Likewise.
10492 (__arm_vrmulhq_x_s16): Likewise.
10493 (__arm_vrmulhq_x_s32): Likewise.
10494 (__arm_vrmulhq_x_u8): Likewise.
10495 (__arm_vrmulhq_x_u16): Likewise.
10496 (__arm_vrmulhq_x_u32): Likewise.
10497 (__arm_vandq_x_s8): Likewise.
10498 (__arm_vandq_x_s16): Likewise.
10499 (__arm_vandq_x_s32): Likewise.
10500 (__arm_vandq_x_u8): Likewise.
10501 (__arm_vandq_x_u16): Likewise.
10502 (__arm_vandq_x_u32): Likewise.
10503 (__arm_vbicq_x_s8): Likewise.
10504 (__arm_vbicq_x_s16): Likewise.
10505 (__arm_vbicq_x_s32): Likewise.
10506 (__arm_vbicq_x_u8): Likewise.
10507 (__arm_vbicq_x_u16): Likewise.
10508 (__arm_vbicq_x_u32): Likewise.
10509 (__arm_vbrsrq_x_n_s8): Likewise.
10510 (__arm_vbrsrq_x_n_s16): Likewise.
10511 (__arm_vbrsrq_x_n_s32): Likewise.
10512 (__arm_vbrsrq_x_n_u8): Likewise.
10513 (__arm_vbrsrq_x_n_u16): Likewise.
10514 (__arm_vbrsrq_x_n_u32): Likewise.
10515 (__arm_veorq_x_s8): Likewise.
10516 (__arm_veorq_x_s16): Likewise.
10517 (__arm_veorq_x_s32): Likewise.
10518 (__arm_veorq_x_u8): Likewise.
10519 (__arm_veorq_x_u16): Likewise.
10520 (__arm_veorq_x_u32): Likewise.
10521 (__arm_vmovlbq_x_s8): Likewise.
10522 (__arm_vmovlbq_x_s16): Likewise.
10523 (__arm_vmovlbq_x_u8): Likewise.
10524 (__arm_vmovlbq_x_u16): Likewise.
10525 (__arm_vmovltq_x_s8): Likewise.
10526 (__arm_vmovltq_x_s16): Likewise.
10527 (__arm_vmovltq_x_u8): Likewise.
10528 (__arm_vmovltq_x_u16): Likewise.
10529 (__arm_vmvnq_x_s8): Likewise.
10530 (__arm_vmvnq_x_s16): Likewise.
10531 (__arm_vmvnq_x_s32): Likewise.
10532 (__arm_vmvnq_x_u8): Likewise.
10533 (__arm_vmvnq_x_u16): Likewise.
10534 (__arm_vmvnq_x_u32): Likewise.
10535 (__arm_vmvnq_x_n_s16): Likewise.
10536 (__arm_vmvnq_x_n_s32): Likewise.
10537 (__arm_vmvnq_x_n_u16): Likewise.
10538 (__arm_vmvnq_x_n_u32): Likewise.
10539 (__arm_vornq_x_s8): Likewise.
10540 (__arm_vornq_x_s16): Likewise.
10541 (__arm_vornq_x_s32): Likewise.
10542 (__arm_vornq_x_u8): Likewise.
10543 (__arm_vornq_x_u16): Likewise.
10544 (__arm_vornq_x_u32): Likewise.
10545 (__arm_vorrq_x_s8): Likewise.
10546 (__arm_vorrq_x_s16): Likewise.
10547 (__arm_vorrq_x_s32): Likewise.
10548 (__arm_vorrq_x_u8): Likewise.
10549 (__arm_vorrq_x_u16): Likewise.
10550 (__arm_vorrq_x_u32): Likewise.
10551 (__arm_vrev16q_x_s8): Likewise.
10552 (__arm_vrev16q_x_u8): Likewise.
10553 (__arm_vrev32q_x_s8): Likewise.
10554 (__arm_vrev32q_x_s16): Likewise.
10555 (__arm_vrev32q_x_u8): Likewise.
10556 (__arm_vrev32q_x_u16): Likewise.
10557 (__arm_vrev64q_x_s8): Likewise.
10558 (__arm_vrev64q_x_s16): Likewise.
10559 (__arm_vrev64q_x_s32): Likewise.
10560 (__arm_vrev64q_x_u8): Likewise.
10561 (__arm_vrev64q_x_u16): Likewise.
10562 (__arm_vrev64q_x_u32): Likewise.
10563 (__arm_vrshlq_x_s8): Likewise.
10564 (__arm_vrshlq_x_s16): Likewise.
10565 (__arm_vrshlq_x_s32): Likewise.
10566 (__arm_vrshlq_x_u8): Likewise.
10567 (__arm_vrshlq_x_u16): Likewise.
10568 (__arm_vrshlq_x_u32): Likewise.
10569 (__arm_vshllbq_x_n_s8): Likewise.
10570 (__arm_vshllbq_x_n_s16): Likewise.
10571 (__arm_vshllbq_x_n_u8): Likewise.
10572 (__arm_vshllbq_x_n_u16): Likewise.
10573 (__arm_vshlltq_x_n_s8): Likewise.
10574 (__arm_vshlltq_x_n_s16): Likewise.
10575 (__arm_vshlltq_x_n_u8): Likewise.
10576 (__arm_vshlltq_x_n_u16): Likewise.
10577 (__arm_vshlq_x_s8): Likewise.
10578 (__arm_vshlq_x_s16): Likewise.
10579 (__arm_vshlq_x_s32): Likewise.
10580 (__arm_vshlq_x_u8): Likewise.
10581 (__arm_vshlq_x_u16): Likewise.
10582 (__arm_vshlq_x_u32): Likewise.
10583 (__arm_vshlq_x_n_s8): Likewise.
10584 (__arm_vshlq_x_n_s16): Likewise.
10585 (__arm_vshlq_x_n_s32): Likewise.
10586 (__arm_vshlq_x_n_u8): Likewise.
10587 (__arm_vshlq_x_n_u16): Likewise.
10588 (__arm_vshlq_x_n_u32): Likewise.
10589 (__arm_vrshrq_x_n_s8): Likewise.
10590 (__arm_vrshrq_x_n_s16): Likewise.
10591 (__arm_vrshrq_x_n_s32): Likewise.
10592 (__arm_vrshrq_x_n_u8): Likewise.
10593 (__arm_vrshrq_x_n_u16): Likewise.
10594 (__arm_vrshrq_x_n_u32): Likewise.
10595 (__arm_vshrq_x_n_s8): Likewise.
10596 (__arm_vshrq_x_n_s16): Likewise.
10597 (__arm_vshrq_x_n_s32): Likewise.
10598 (__arm_vshrq_x_n_u8): Likewise.
10599 (__arm_vshrq_x_n_u16): Likewise.
10600 (__arm_vshrq_x_n_u32): Likewise.
10601 (__arm_vdupq_x_n_f16): Likewise.
10602 (__arm_vdupq_x_n_f32): Likewise.
10603 (__arm_vminnmq_x_f16): Likewise.
10604 (__arm_vminnmq_x_f32): Likewise.
10605 (__arm_vmaxnmq_x_f16): Likewise.
10606 (__arm_vmaxnmq_x_f32): Likewise.
10607 (__arm_vabdq_x_f16): Likewise.
10608 (__arm_vabdq_x_f32): Likewise.
10609 (__arm_vabsq_x_f16): Likewise.
10610 (__arm_vabsq_x_f32): Likewise.
10611 (__arm_vaddq_x_f16): Likewise.
10612 (__arm_vaddq_x_f32): Likewise.
10613 (__arm_vaddq_x_n_f16): Likewise.
10614 (__arm_vaddq_x_n_f32): Likewise.
10615 (__arm_vnegq_x_f16): Likewise.
10616 (__arm_vnegq_x_f32): Likewise.
10617 (__arm_vmulq_x_f16): Likewise.
10618 (__arm_vmulq_x_f32): Likewise.
10619 (__arm_vmulq_x_n_f16): Likewise.
10620 (__arm_vmulq_x_n_f32): Likewise.
10621 (__arm_vsubq_x_f16): Likewise.
10622 (__arm_vsubq_x_f32): Likewise.
10623 (__arm_vsubq_x_n_f16): Likewise.
10624 (__arm_vsubq_x_n_f32): Likewise.
10625 (__arm_vcaddq_rot90_x_f16): Likewise.
10626 (__arm_vcaddq_rot90_x_f32): Likewise.
10627 (__arm_vcaddq_rot270_x_f16): Likewise.
10628 (__arm_vcaddq_rot270_x_f32): Likewise.
10629 (__arm_vcmulq_x_f16): Likewise.
10630 (__arm_vcmulq_x_f32): Likewise.
10631 (__arm_vcmulq_rot90_x_f16): Likewise.
10632 (__arm_vcmulq_rot90_x_f32): Likewise.
10633 (__arm_vcmulq_rot180_x_f16): Likewise.
10634 (__arm_vcmulq_rot180_x_f32): Likewise.
10635 (__arm_vcmulq_rot270_x_f16): Likewise.
10636 (__arm_vcmulq_rot270_x_f32): Likewise.
10637 (__arm_vcvtaq_x_s16_f16): Likewise.
10638 (__arm_vcvtaq_x_s32_f32): Likewise.
10639 (__arm_vcvtaq_x_u16_f16): Likewise.
10640 (__arm_vcvtaq_x_u32_f32): Likewise.
10641 (__arm_vcvtnq_x_s16_f16): Likewise.
10642 (__arm_vcvtnq_x_s32_f32): Likewise.
10643 (__arm_vcvtnq_x_u16_f16): Likewise.
10644 (__arm_vcvtnq_x_u32_f32): Likewise.
10645 (__arm_vcvtpq_x_s16_f16): Likewise.
10646 (__arm_vcvtpq_x_s32_f32): Likewise.
10647 (__arm_vcvtpq_x_u16_f16): Likewise.
10648 (__arm_vcvtpq_x_u32_f32): Likewise.
10649 (__arm_vcvtmq_x_s16_f16): Likewise.
10650 (__arm_vcvtmq_x_s32_f32): Likewise.
10651 (__arm_vcvtmq_x_u16_f16): Likewise.
10652 (__arm_vcvtmq_x_u32_f32): Likewise.
10653 (__arm_vcvtbq_x_f32_f16): Likewise.
10654 (__arm_vcvttq_x_f32_f16): Likewise.
10655 (__arm_vcvtq_x_f16_u16): Likewise.
10656 (__arm_vcvtq_x_f16_s16): Likewise.
10657 (__arm_vcvtq_x_f32_s32): Likewise.
10658 (__arm_vcvtq_x_f32_u32): Likewise.
10659 (__arm_vcvtq_x_n_f16_s16): Likewise.
10660 (__arm_vcvtq_x_n_f16_u16): Likewise.
10661 (__arm_vcvtq_x_n_f32_s32): Likewise.
10662 (__arm_vcvtq_x_n_f32_u32): Likewise.
10663 (__arm_vcvtq_x_s16_f16): Likewise.
10664 (__arm_vcvtq_x_s32_f32): Likewise.
10665 (__arm_vcvtq_x_u16_f16): Likewise.
10666 (__arm_vcvtq_x_u32_f32): Likewise.
10667 (__arm_vcvtq_x_n_s16_f16): Likewise.
10668 (__arm_vcvtq_x_n_s32_f32): Likewise.
10669 (__arm_vcvtq_x_n_u16_f16): Likewise.
10670 (__arm_vcvtq_x_n_u32_f32): Likewise.
10671 (__arm_vrndq_x_f16): Likewise.
10672 (__arm_vrndq_x_f32): Likewise.
10673 (__arm_vrndnq_x_f16): Likewise.
10674 (__arm_vrndnq_x_f32): Likewise.
10675 (__arm_vrndmq_x_f16): Likewise.
10676 (__arm_vrndmq_x_f32): Likewise.
10677 (__arm_vrndpq_x_f16): Likewise.
10678 (__arm_vrndpq_x_f32): Likewise.
10679 (__arm_vrndaq_x_f16): Likewise.
10680 (__arm_vrndaq_x_f32): Likewise.
10681 (__arm_vrndxq_x_f16): Likewise.
10682 (__arm_vrndxq_x_f32): Likewise.
10683 (__arm_vandq_x_f16): Likewise.
10684 (__arm_vandq_x_f32): Likewise.
10685 (__arm_vbicq_x_f16): Likewise.
10686 (__arm_vbicq_x_f32): Likewise.
10687 (__arm_vbrsrq_x_n_f16): Likewise.
10688 (__arm_vbrsrq_x_n_f32): Likewise.
10689 (__arm_veorq_x_f16): Likewise.
10690 (__arm_veorq_x_f32): Likewise.
10691 (__arm_vornq_x_f16): Likewise.
10692 (__arm_vornq_x_f32): Likewise.
10693 (__arm_vorrq_x_f16): Likewise.
10694 (__arm_vorrq_x_f32): Likewise.
10695 (__arm_vrev32q_x_f16): Likewise.
10696 (__arm_vrev64q_x_f16): Likewise.
10697 (__arm_vrev64q_x_f32): Likewise.
10698 (vabdq_x): Define polymorphic variant.
10699 (vabsq_x): Likewise.
10700 (vaddq_x): Likewise.
10701 (vandq_x): Likewise.
10702 (vbicq_x): Likewise.
10703 (vbrsrq_x): Likewise.
10704 (vcaddq_rot270_x): Likewise.
10705 (vcaddq_rot90_x): Likewise.
10706 (vcmulq_rot180_x): Likewise.
10707 (vcmulq_rot270_x): Likewise.
10708 (vcmulq_x): Likewise.
10709 (vcvtq_x): Likewise.
10710 (vcvtq_x_n): Likewise.
10711 (vcvtnq_m): Likewise.
10712 (veorq_x): Likewise.
10713 (vmaxnmq_x): Likewise.
10714 (vminnmq_x): Likewise.
10715 (vmulq_x): Likewise.
10716 (vnegq_x): Likewise.
10717 (vornq_x): Likewise.
10718 (vorrq_x): Likewise.
10719 (vrev32q_x): Likewise.
10720 (vrev64q_x): Likewise.
10721 (vrndaq_x): Likewise.
10722 (vrndmq_x): Likewise.
10723 (vrndnq_x): Likewise.
10724 (vrndpq_x): Likewise.
10725 (vrndq_x): Likewise.
10726 (vrndxq_x): Likewise.
10727 (vsubq_x): Likewise.
10728 (vcmulq_rot90_x): Likewise.
10729 (vadciq): Likewise.
10730 (vclsq_x): Likewise.
10731 (vclzq_x): Likewise.
10732 (vhaddq_x): Likewise.
10733 (vhcaddq_rot270_x): Likewise.
10734 (vhcaddq_rot90_x): Likewise.
10735 (vhsubq_x): Likewise.
10736 (vmaxq_x): Likewise.
10737 (vminq_x): Likewise.
10738 (vmovlbq_x): Likewise.
10739 (vmovltq_x): Likewise.
10740 (vmulhq_x): Likewise.
10741 (vmullbq_int_x): Likewise.
10742 (vmullbq_poly_x): Likewise.
10743 (vmulltq_int_x): Likewise.
10744 (vmulltq_poly_x): Likewise.
10745 (vmvnq_x): Likewise.
10746 (vrev16q_x): Likewise.
10747 (vrhaddq_x): Likewise.
10748 (vrmulhq_x): Likewise.
10749 (vrshlq_x): Likewise.
10750 (vrshrq_x): Likewise.
10751 (vshllbq_x): Likewise.
10752 (vshlltq_x): Likewise.
10753 (vshlq_x_n): Likewise.
10754 (vshlq_x): Likewise.
10755 (vdwdupq_x_u8): Likewise.
10756 (vdwdupq_x_u16): Likewise.
10757 (vdwdupq_x_u32): Likewise.
10758 (viwdupq_x_u8): Likewise.
10759 (viwdupq_x_u16): Likewise.
10760 (viwdupq_x_u32): Likewise.
10761 (vidupq_x_u8): Likewise.
10762 (vddupq_x_u8): Likewise.
10763 (vidupq_x_u16): Likewise.
10764 (vddupq_x_u16): Likewise.
10765 (vidupq_x_u32): Likewise.
10766 (vddupq_x_u32): Likewise.
10767 (vshrq_x): Likewise.
10769 2020-03-20 Richard Biener <rguenther@suse.de>
10771 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
10772 to vectorize for CTOR defs.
10774 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10775 Andre Vieira <andre.simoesdiasvieira@arm.com>
10776 Mihail Ionescu <mihail.ionescu@arm.com>
10778 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
10780 (LDRGBWBU_QUALIFIERS): Likewise.
10781 (LDRGBWBS_Z_QUALIFIERS): Likewise.
10782 (LDRGBWBU_Z_QUALIFIERS): Likewise.
10783 (STRSBWBS_QUALIFIERS): Likewise.
10784 (STRSBWBU_QUALIFIERS): Likewise.
10785 (STRSBWBS_P_QUALIFIERS): Likewise.
10786 (STRSBWBU_P_QUALIFIERS): Likewise.
10787 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
10788 (vldrdq_gather_base_wb_u64): Likewise.
10789 (vldrdq_gather_base_wb_z_s64): Likewise.
10790 (vldrdq_gather_base_wb_z_u64): Likewise.
10791 (vldrwq_gather_base_wb_f32): Likewise.
10792 (vldrwq_gather_base_wb_s32): Likewise.
10793 (vldrwq_gather_base_wb_u32): Likewise.
10794 (vldrwq_gather_base_wb_z_f32): Likewise.
10795 (vldrwq_gather_base_wb_z_s32): Likewise.
10796 (vldrwq_gather_base_wb_z_u32): Likewise.
10797 (vstrdq_scatter_base_wb_p_s64): Likewise.
10798 (vstrdq_scatter_base_wb_p_u64): Likewise.
10799 (vstrdq_scatter_base_wb_s64): Likewise.
10800 (vstrdq_scatter_base_wb_u64): Likewise.
10801 (vstrwq_scatter_base_wb_p_s32): Likewise.
10802 (vstrwq_scatter_base_wb_p_f32): Likewise.
10803 (vstrwq_scatter_base_wb_p_u32): Likewise.
10804 (vstrwq_scatter_base_wb_s32): Likewise.
10805 (vstrwq_scatter_base_wb_u32): Likewise.
10806 (vstrwq_scatter_base_wb_f32): Likewise.
10807 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
10808 (__arm_vldrdq_gather_base_wb_u64): Likewise.
10809 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
10810 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
10811 (__arm_vldrwq_gather_base_wb_s32): Likewise.
10812 (__arm_vldrwq_gather_base_wb_u32): Likewise.
10813 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
10814 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
10815 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
10816 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
10817 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
10818 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
10819 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
10820 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
10821 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
10822 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
10823 (__arm_vldrwq_gather_base_wb_f32): Likewise.
10824 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
10825 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
10826 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
10827 (vstrwq_scatter_base_wb): Define polymorphic variant.
10828 (vstrwq_scatter_base_wb_p): Likewise.
10829 (vstrdq_scatter_base_wb_p): Likewise.
10830 (vstrdq_scatter_base_wb): Likewise.
10831 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
10833 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
10835 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
10836 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
10837 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
10838 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
10839 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
10840 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
10841 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
10842 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
10843 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
10844 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
10845 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
10846 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
10847 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
10848 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
10849 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
10850 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
10851 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
10852 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
10853 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
10854 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
10855 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
10856 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
10857 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
10858 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
10859 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
10860 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
10861 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
10862 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
10863 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
10865 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10866 Andre Vieira <andre.simoesdiasvieira@arm.com>
10867 Mihail Ionescu <mihail.ionescu@arm.com>
10869 * config/arm/arm-builtins.c
10870 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
10872 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
10873 (vddupq_m_n_u32): Likewise.
10874 (vddupq_m_n_u16): Likewise.
10875 (vddupq_m_wb_u8): Likewise.
10876 (vddupq_m_wb_u16): Likewise.
10877 (vddupq_m_wb_u32): Likewise.
10878 (vddupq_n_u8): Likewise.
10879 (vddupq_n_u32): Likewise.
10880 (vddupq_n_u16): Likewise.
10881 (vddupq_wb_u8): Likewise.
10882 (vddupq_wb_u16): Likewise.
10883 (vddupq_wb_u32): Likewise.
10884 (vdwdupq_m_n_u8): Likewise.
10885 (vdwdupq_m_n_u32): Likewise.
10886 (vdwdupq_m_n_u16): Likewise.
10887 (vdwdupq_m_wb_u8): Likewise.
10888 (vdwdupq_m_wb_u32): Likewise.
10889 (vdwdupq_m_wb_u16): Likewise.
10890 (vdwdupq_n_u8): Likewise.
10891 (vdwdupq_n_u32): Likewise.
10892 (vdwdupq_n_u16): Likewise.
10893 (vdwdupq_wb_u8): Likewise.
10894 (vdwdupq_wb_u32): Likewise.
10895 (vdwdupq_wb_u16): Likewise.
10896 (vidupq_m_n_u8): Likewise.
10897 (vidupq_m_n_u32): Likewise.
10898 (vidupq_m_n_u16): Likewise.
10899 (vidupq_m_wb_u8): Likewise.
10900 (vidupq_m_wb_u16): Likewise.
10901 (vidupq_m_wb_u32): Likewise.
10902 (vidupq_n_u8): Likewise.
10903 (vidupq_n_u32): Likewise.
10904 (vidupq_n_u16): Likewise.
10905 (vidupq_wb_u8): Likewise.
10906 (vidupq_wb_u16): Likewise.
10907 (vidupq_wb_u32): Likewise.
10908 (viwdupq_m_n_u8): Likewise.
10909 (viwdupq_m_n_u32): Likewise.
10910 (viwdupq_m_n_u16): Likewise.
10911 (viwdupq_m_wb_u8): Likewise.
10912 (viwdupq_m_wb_u32): Likewise.
10913 (viwdupq_m_wb_u16): Likewise.
10914 (viwdupq_n_u8): Likewise.
10915 (viwdupq_n_u32): Likewise.
10916 (viwdupq_n_u16): Likewise.
10917 (viwdupq_wb_u8): Likewise.
10918 (viwdupq_wb_u32): Likewise.
10919 (viwdupq_wb_u16): Likewise.
10920 (__arm_vddupq_m_n_u8): Define intrinsic.
10921 (__arm_vddupq_m_n_u32): Likewise.
10922 (__arm_vddupq_m_n_u16): Likewise.
10923 (__arm_vddupq_m_wb_u8): Likewise.
10924 (__arm_vddupq_m_wb_u16): Likewise.
10925 (__arm_vddupq_m_wb_u32): Likewise.
10926 (__arm_vddupq_n_u8): Likewise.
10927 (__arm_vddupq_n_u32): Likewise.
10928 (__arm_vddupq_n_u16): Likewise.
10929 (__arm_vdwdupq_m_n_u8): Likewise.
10930 (__arm_vdwdupq_m_n_u32): Likewise.
10931 (__arm_vdwdupq_m_n_u16): Likewise.
10932 (__arm_vdwdupq_m_wb_u8): Likewise.
10933 (__arm_vdwdupq_m_wb_u32): Likewise.
10934 (__arm_vdwdupq_m_wb_u16): Likewise.
10935 (__arm_vdwdupq_n_u8): Likewise.
10936 (__arm_vdwdupq_n_u32): Likewise.
10937 (__arm_vdwdupq_n_u16): Likewise.
10938 (__arm_vdwdupq_wb_u8): Likewise.
10939 (__arm_vdwdupq_wb_u32): Likewise.
10940 (__arm_vdwdupq_wb_u16): Likewise.
10941 (__arm_vidupq_m_n_u8): Likewise.
10942 (__arm_vidupq_m_n_u32): Likewise.
10943 (__arm_vidupq_m_n_u16): Likewise.
10944 (__arm_vidupq_n_u8): Likewise.
10945 (__arm_vidupq_m_wb_u8): Likewise.
10946 (__arm_vidupq_m_wb_u16): Likewise.
10947 (__arm_vidupq_m_wb_u32): Likewise.
10948 (__arm_vidupq_n_u32): Likewise.
10949 (__arm_vidupq_n_u16): Likewise.
10950 (__arm_vidupq_wb_u8): Likewise.
10951 (__arm_vidupq_wb_u16): Likewise.
10952 (__arm_vidupq_wb_u32): Likewise.
10953 (__arm_vddupq_wb_u8): Likewise.
10954 (__arm_vddupq_wb_u16): Likewise.
10955 (__arm_vddupq_wb_u32): Likewise.
10956 (__arm_viwdupq_m_n_u8): Likewise.
10957 (__arm_viwdupq_m_n_u32): Likewise.
10958 (__arm_viwdupq_m_n_u16): Likewise.
10959 (__arm_viwdupq_m_wb_u8): Likewise.
10960 (__arm_viwdupq_m_wb_u32): Likewise.
10961 (__arm_viwdupq_m_wb_u16): Likewise.
10962 (__arm_viwdupq_n_u8): Likewise.
10963 (__arm_viwdupq_n_u32): Likewise.
10964 (__arm_viwdupq_n_u16): Likewise.
10965 (__arm_viwdupq_wb_u8): Likewise.
10966 (__arm_viwdupq_wb_u32): Likewise.
10967 (__arm_viwdupq_wb_u16): Likewise.
10968 (vidupq_m): Define polymorphic variant.
10969 (vddupq_m): Likewise.
10970 (vidupq_u16): Likewise.
10971 (vidupq_u32): Likewise.
10972 (vidupq_u8): Likewise.
10973 (vddupq_u16): Likewise.
10974 (vddupq_u32): Likewise.
10975 (vddupq_u8): Likewise.
10976 (viwdupq_m): Likewise.
10977 (viwdupq_u16): Likewise.
10978 (viwdupq_u32): Likewise.
10979 (viwdupq_u8): Likewise.
10980 (vdwdupq_m): Likewise.
10981 (vdwdupq_u16): Likewise.
10982 (vdwdupq_u32): Likewise.
10983 (vdwdupq_u8): Likewise.
10984 * config/arm/arm_mve_builtins.def
10985 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
10987 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
10988 (mve_vidupq_u<mode>_insn): Likewise.
10989 (mve_vidupq_m_n_u<mode>): Likewise.
10990 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
10991 (mve_vddupq_n_u<mode>): Likewise.
10992 (mve_vddupq_u<mode>_insn): Likewise.
10993 (mve_vddupq_m_n_u<mode>): Likewise.
10994 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
10995 (mve_vdwdupq_n_u<mode>): Likewise.
10996 (mve_vdwdupq_wb_u<mode>): Likewise.
10997 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
10998 (mve_vdwdupq_m_n_u<mode>): Likewise.
10999 (mve_vdwdupq_m_wb_u<mode>): Likewise.
11000 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
11001 (mve_viwdupq_n_u<mode>): Likewise.
11002 (mve_viwdupq_wb_u<mode>): Likewise.
11003 (mve_viwdupq_wb_u<mode>_insn): Likewise.
11004 (mve_viwdupq_m_n_u<mode>): Likewise.
11005 (mve_viwdupq_m_wb_u<mode>): Likewise.
11006 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
11008 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11010 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
11011 (vreinterpretq_s16_s64): Likewise.
11012 (vreinterpretq_s16_s8): Likewise.
11013 (vreinterpretq_s16_u16): Likewise.
11014 (vreinterpretq_s16_u32): Likewise.
11015 (vreinterpretq_s16_u64): Likewise.
11016 (vreinterpretq_s16_u8): Likewise.
11017 (vreinterpretq_s32_s16): Likewise.
11018 (vreinterpretq_s32_s64): Likewise.
11019 (vreinterpretq_s32_s8): Likewise.
11020 (vreinterpretq_s32_u16): Likewise.
11021 (vreinterpretq_s32_u32): Likewise.
11022 (vreinterpretq_s32_u64): Likewise.
11023 (vreinterpretq_s32_u8): Likewise.
11024 (vreinterpretq_s64_s16): Likewise.
11025 (vreinterpretq_s64_s32): Likewise.
11026 (vreinterpretq_s64_s8): Likewise.
11027 (vreinterpretq_s64_u16): Likewise.
11028 (vreinterpretq_s64_u32): Likewise.
11029 (vreinterpretq_s64_u64): Likewise.
11030 (vreinterpretq_s64_u8): Likewise.
11031 (vreinterpretq_s8_s16): Likewise.
11032 (vreinterpretq_s8_s32): Likewise.
11033 (vreinterpretq_s8_s64): Likewise.
11034 (vreinterpretq_s8_u16): Likewise.
11035 (vreinterpretq_s8_u32): Likewise.
11036 (vreinterpretq_s8_u64): Likewise.
11037 (vreinterpretq_s8_u8): Likewise.
11038 (vreinterpretq_u16_s16): Likewise.
11039 (vreinterpretq_u16_s32): Likewise.
11040 (vreinterpretq_u16_s64): Likewise.
11041 (vreinterpretq_u16_s8): Likewise.
11042 (vreinterpretq_u16_u32): Likewise.
11043 (vreinterpretq_u16_u64): Likewise.
11044 (vreinterpretq_u16_u8): Likewise.
11045 (vreinterpretq_u32_s16): Likewise.
11046 (vreinterpretq_u32_s32): Likewise.
11047 (vreinterpretq_u32_s64): Likewise.
11048 (vreinterpretq_u32_s8): Likewise.
11049 (vreinterpretq_u32_u16): Likewise.
11050 (vreinterpretq_u32_u64): Likewise.
11051 (vreinterpretq_u32_u8): Likewise.
11052 (vreinterpretq_u64_s16): Likewise.
11053 (vreinterpretq_u64_s32): Likewise.
11054 (vreinterpretq_u64_s64): Likewise.
11055 (vreinterpretq_u64_s8): Likewise.
11056 (vreinterpretq_u64_u16): Likewise.
11057 (vreinterpretq_u64_u32): Likewise.
11058 (vreinterpretq_u64_u8): Likewise.
11059 (vreinterpretq_u8_s16): Likewise.
11060 (vreinterpretq_u8_s32): Likewise.
11061 (vreinterpretq_u8_s64): Likewise.
11062 (vreinterpretq_u8_s8): Likewise.
11063 (vreinterpretq_u8_u16): Likewise.
11064 (vreinterpretq_u8_u32): Likewise.
11065 (vreinterpretq_u8_u64): Likewise.
11066 (vreinterpretq_s32_f16): Likewise.
11067 (vreinterpretq_s32_f32): Likewise.
11068 (vreinterpretq_u16_f16): Likewise.
11069 (vreinterpretq_u16_f32): Likewise.
11070 (vreinterpretq_u32_f16): Likewise.
11071 (vreinterpretq_u32_f32): Likewise.
11072 (vreinterpretq_u64_f16): Likewise.
11073 (vreinterpretq_u64_f32): Likewise.
11074 (vreinterpretq_u8_f16): Likewise.
11075 (vreinterpretq_u8_f32): Likewise.
11076 (vreinterpretq_f16_f32): Likewise.
11077 (vreinterpretq_f16_s16): Likewise.
11078 (vreinterpretq_f16_s32): Likewise.
11079 (vreinterpretq_f16_s64): Likewise.
11080 (vreinterpretq_f16_s8): Likewise.
11081 (vreinterpretq_f16_u16): Likewise.
11082 (vreinterpretq_f16_u32): Likewise.
11083 (vreinterpretq_f16_u64): Likewise.
11084 (vreinterpretq_f16_u8): Likewise.
11085 (vreinterpretq_f32_f16): Likewise.
11086 (vreinterpretq_f32_s16): Likewise.
11087 (vreinterpretq_f32_s32): Likewise.
11088 (vreinterpretq_f32_s64): Likewise.
11089 (vreinterpretq_f32_s8): Likewise.
11090 (vreinterpretq_f32_u16): Likewise.
11091 (vreinterpretq_f32_u32): Likewise.
11092 (vreinterpretq_f32_u64): Likewise.
11093 (vreinterpretq_f32_u8): Likewise.
11094 (vreinterpretq_s16_f16): Likewise.
11095 (vreinterpretq_s16_f32): Likewise.
11096 (vreinterpretq_s64_f16): Likewise.
11097 (vreinterpretq_s64_f32): Likewise.
11098 (vreinterpretq_s8_f16): Likewise.
11099 (vreinterpretq_s8_f32): Likewise.
11100 (vuninitializedq_u8): Likewise.
11101 (vuninitializedq_u16): Likewise.
11102 (vuninitializedq_u32): Likewise.
11103 (vuninitializedq_u64): Likewise.
11104 (vuninitializedq_s8): Likewise.
11105 (vuninitializedq_s16): Likewise.
11106 (vuninitializedq_s32): Likewise.
11107 (vuninitializedq_s64): Likewise.
11108 (vuninitializedq_f16): Likewise.
11109 (vuninitializedq_f32): Likewise.
11110 (__arm_vuninitializedq_u8): Define intrinsic.
11111 (__arm_vuninitializedq_u16): Likewise.
11112 (__arm_vuninitializedq_u32): Likewise.
11113 (__arm_vuninitializedq_u64): Likewise.
11114 (__arm_vuninitializedq_s8): Likewise.
11115 (__arm_vuninitializedq_s16): Likewise.
11116 (__arm_vuninitializedq_s32): Likewise.
11117 (__arm_vuninitializedq_s64): Likewise.
11118 (__arm_vreinterpretq_s16_s32): Likewise.
11119 (__arm_vreinterpretq_s16_s64): Likewise.
11120 (__arm_vreinterpretq_s16_s8): Likewise.
11121 (__arm_vreinterpretq_s16_u16): Likewise.
11122 (__arm_vreinterpretq_s16_u32): Likewise.
11123 (__arm_vreinterpretq_s16_u64): Likewise.
11124 (__arm_vreinterpretq_s16_u8): Likewise.
11125 (__arm_vreinterpretq_s32_s16): Likewise.
11126 (__arm_vreinterpretq_s32_s64): Likewise.
11127 (__arm_vreinterpretq_s32_s8): Likewise.
11128 (__arm_vreinterpretq_s32_u16): Likewise.
11129 (__arm_vreinterpretq_s32_u32): Likewise.
11130 (__arm_vreinterpretq_s32_u64): Likewise.
11131 (__arm_vreinterpretq_s32_u8): Likewise.
11132 (__arm_vreinterpretq_s64_s16): Likewise.
11133 (__arm_vreinterpretq_s64_s32): Likewise.
11134 (__arm_vreinterpretq_s64_s8): Likewise.
11135 (__arm_vreinterpretq_s64_u16): Likewise.
11136 (__arm_vreinterpretq_s64_u32): Likewise.
11137 (__arm_vreinterpretq_s64_u64): Likewise.
11138 (__arm_vreinterpretq_s64_u8): Likewise.
11139 (__arm_vreinterpretq_s8_s16): Likewise.
11140 (__arm_vreinterpretq_s8_s32): Likewise.
11141 (__arm_vreinterpretq_s8_s64): Likewise.
11142 (__arm_vreinterpretq_s8_u16): Likewise.
11143 (__arm_vreinterpretq_s8_u32): Likewise.
11144 (__arm_vreinterpretq_s8_u64): Likewise.
11145 (__arm_vreinterpretq_s8_u8): Likewise.
11146 (__arm_vreinterpretq_u16_s16): Likewise.
11147 (__arm_vreinterpretq_u16_s32): Likewise.
11148 (__arm_vreinterpretq_u16_s64): Likewise.
11149 (__arm_vreinterpretq_u16_s8): Likewise.
11150 (__arm_vreinterpretq_u16_u32): Likewise.
11151 (__arm_vreinterpretq_u16_u64): Likewise.
11152 (__arm_vreinterpretq_u16_u8): Likewise.
11153 (__arm_vreinterpretq_u32_s16): Likewise.
11154 (__arm_vreinterpretq_u32_s32): Likewise.
11155 (__arm_vreinterpretq_u32_s64): Likewise.
11156 (__arm_vreinterpretq_u32_s8): Likewise.
11157 (__arm_vreinterpretq_u32_u16): Likewise.
11158 (__arm_vreinterpretq_u32_u64): Likewise.
11159 (__arm_vreinterpretq_u32_u8): Likewise.
11160 (__arm_vreinterpretq_u64_s16): Likewise.
11161 (__arm_vreinterpretq_u64_s32): Likewise.
11162 (__arm_vreinterpretq_u64_s64): Likewise.
11163 (__arm_vreinterpretq_u64_s8): Likewise.
11164 (__arm_vreinterpretq_u64_u16): Likewise.
11165 (__arm_vreinterpretq_u64_u32): Likewise.
11166 (__arm_vreinterpretq_u64_u8): Likewise.
11167 (__arm_vreinterpretq_u8_s16): Likewise.
11168 (__arm_vreinterpretq_u8_s32): Likewise.
11169 (__arm_vreinterpretq_u8_s64): Likewise.
11170 (__arm_vreinterpretq_u8_s8): Likewise.
11171 (__arm_vreinterpretq_u8_u16): Likewise.
11172 (__arm_vreinterpretq_u8_u32): Likewise.
11173 (__arm_vreinterpretq_u8_u64): Likewise.
11174 (__arm_vuninitializedq_f16): Likewise.
11175 (__arm_vuninitializedq_f32): Likewise.
11176 (__arm_vreinterpretq_s32_f16): Likewise.
11177 (__arm_vreinterpretq_s32_f32): Likewise.
11178 (__arm_vreinterpretq_s16_f16): Likewise.
11179 (__arm_vreinterpretq_s16_f32): Likewise.
11180 (__arm_vreinterpretq_s64_f16): Likewise.
11181 (__arm_vreinterpretq_s64_f32): Likewise.
11182 (__arm_vreinterpretq_s8_f16): Likewise.
11183 (__arm_vreinterpretq_s8_f32): Likewise.
11184 (__arm_vreinterpretq_u16_f16): Likewise.
11185 (__arm_vreinterpretq_u16_f32): Likewise.
11186 (__arm_vreinterpretq_u32_f16): Likewise.
11187 (__arm_vreinterpretq_u32_f32): Likewise.
11188 (__arm_vreinterpretq_u64_f16): Likewise.
11189 (__arm_vreinterpretq_u64_f32): Likewise.
11190 (__arm_vreinterpretq_u8_f16): Likewise.
11191 (__arm_vreinterpretq_u8_f32): Likewise.
11192 (__arm_vreinterpretq_f16_f32): Likewise.
11193 (__arm_vreinterpretq_f16_s16): Likewise.
11194 (__arm_vreinterpretq_f16_s32): Likewise.
11195 (__arm_vreinterpretq_f16_s64): Likewise.
11196 (__arm_vreinterpretq_f16_s8): Likewise.
11197 (__arm_vreinterpretq_f16_u16): Likewise.
11198 (__arm_vreinterpretq_f16_u32): Likewise.
11199 (__arm_vreinterpretq_f16_u64): Likewise.
11200 (__arm_vreinterpretq_f16_u8): Likewise.
11201 (__arm_vreinterpretq_f32_f16): Likewise.
11202 (__arm_vreinterpretq_f32_s16): Likewise.
11203 (__arm_vreinterpretq_f32_s32): Likewise.
11204 (__arm_vreinterpretq_f32_s64): Likewise.
11205 (__arm_vreinterpretq_f32_s8): Likewise.
11206 (__arm_vreinterpretq_f32_u16): Likewise.
11207 (__arm_vreinterpretq_f32_u32): Likewise.
11208 (__arm_vreinterpretq_f32_u64): Likewise.
11209 (__arm_vreinterpretq_f32_u8): Likewise.
11210 (vuninitializedq): Define polymorphic variant.
11211 (vreinterpretq_f16): Likewise.
11212 (vreinterpretq_f32): Likewise.
11213 (vreinterpretq_s16): Likewise.
11214 (vreinterpretq_s32): Likewise.
11215 (vreinterpretq_s64): Likewise.
11216 (vreinterpretq_s8): Likewise.
11217 (vreinterpretq_u16): Likewise.
11218 (vreinterpretq_u32): Likewise.
11219 (vreinterpretq_u64): Likewise.
11220 (vreinterpretq_u8): Likewise.
11222 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11223 Andre Vieira <andre.simoesdiasvieira@arm.com>
11224 Mihail Ionescu <mihail.ionescu@arm.com>
11226 * config/arm/arm_mve.h (vaddq_s8): Define macro.
11227 (vaddq_s16): Likewise.
11228 (vaddq_s32): Likewise.
11229 (vaddq_u8): Likewise.
11230 (vaddq_u16): Likewise.
11231 (vaddq_u32): Likewise.
11232 (vaddq_f16): Likewise.
11233 (vaddq_f32): Likewise.
11234 (__arm_vaddq_s8): Define intrinsic.
11235 (__arm_vaddq_s16): Likewise.
11236 (__arm_vaddq_s32): Likewise.
11237 (__arm_vaddq_u8): Likewise.
11238 (__arm_vaddq_u16): Likewise.
11239 (__arm_vaddq_u32): Likewise.
11240 (__arm_vaddq_f16): Likewise.
11241 (__arm_vaddq_f32): Likewise.
11242 (vaddq): Define polymorphic variant.
11243 * config/arm/iterators.md (VNIM): Define mode iterator for common types
11244 Neon, IWMMXT and MVE.
11245 (VNINOTM): Likewise.
11246 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
11247 (mve_vaddq_f<mode>): Define RTL pattern.
11248 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
11249 (addv8hf3_neon): Define RTL pattern.
11250 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
11252 (addv8hf3): Define standard RTL pattern for MVE and Neon.
11253 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
11255 2020-03-20 Martin Liska <mliska@suse.cz>
11258 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
11259 build_ref_for_offset function was used and it transforms off to bytes
11262 2020-03-20 Richard Biener <rguenther@suse.de>
11264 PR tree-optimization/94266
11265 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
11266 type of the underlying object to adjust for the containing
11267 field if available.
11269 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
11271 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
11272 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
11273 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
11275 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
11277 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
11279 2020-03-20 Jakub Jelinek <jakub@redhat.com>
11281 PR tree-optimization/94224
11282 * gimple-ssa-store-merging.c
11283 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
11284 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
11287 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
11289 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
11291 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
11294 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
11295 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
11297 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
11300 * cgraphunit.c (process_function_and_variable_attributes): warn
11301 for flatten attribute on alias.
11302 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
11304 2020-03-19 Martin Liska <mliska@suse.cz>
11306 * lto-section-in.c: Add ext_symtab.
11307 * lto-streamer-out.c (write_symbol_extension_info): New.
11308 (produce_symtab_extension): New.
11309 (produce_asm_for_decls): Stream also produce_symtab_extension.
11310 * lto-streamer.h (enum lto_section_type): New section.
11312 2020-03-19 Jakub Jelinek <jakub@redhat.com>
11314 PR tree-optimization/94211
11315 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
11316 instead of estimate_num_insns for bb_seq (middle_bb). Rename
11317 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
11320 2020-03-19 Richard Biener <rguenther@suse.de>
11323 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
11324 and build_ref_for_offset.
11326 2020-03-19 Richard Biener <rguenther@suse.de>
11328 PR middle-end/94216
11329 * fold-const.c (fold_binary_loc): Avoid using
11330 build_fold_addr_expr when we really want an ADDR_EXPR.
11332 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
11334 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
11337 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
11339 PR rtl-optimization/90275
11340 * cse.c (cse_insn): Delete no-op register moves too.
11342 2020-03-18 Martin Sebor <msebor@redhat.com>
11345 * cgraphunit.c (process_function_and_variable_attributes): Also
11346 complain about weakref function definitions and drop all effects
11349 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11350 Mihail Ionescu <mihail.ionescu@arm.com>
11351 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11353 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
11354 (vstrdq_scatter_base_p_u64): Likewise.
11355 (vstrdq_scatter_base_s64): Likewise.
11356 (vstrdq_scatter_base_u64): Likewise.
11357 (vstrdq_scatter_offset_p_s64): Likewise.
11358 (vstrdq_scatter_offset_p_u64): Likewise.
11359 (vstrdq_scatter_offset_s64): Likewise.
11360 (vstrdq_scatter_offset_u64): Likewise.
11361 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
11362 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
11363 (vstrdq_scatter_shifted_offset_s64): Likewise.
11364 (vstrdq_scatter_shifted_offset_u64): Likewise.
11365 (vstrhq_scatter_offset_f16): Likewise.
11366 (vstrhq_scatter_offset_p_f16): Likewise.
11367 (vstrhq_scatter_shifted_offset_f16): Likewise.
11368 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
11369 (vstrwq_scatter_base_f32): Likewise.
11370 (vstrwq_scatter_base_p_f32): Likewise.
11371 (vstrwq_scatter_offset_f32): Likewise.
11372 (vstrwq_scatter_offset_p_f32): Likewise.
11373 (vstrwq_scatter_offset_p_s32): Likewise.
11374 (vstrwq_scatter_offset_p_u32): Likewise.
11375 (vstrwq_scatter_offset_s32): Likewise.
11376 (vstrwq_scatter_offset_u32): Likewise.
11377 (vstrwq_scatter_shifted_offset_f32): Likewise.
11378 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
11379 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
11380 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
11381 (vstrwq_scatter_shifted_offset_s32): Likewise.
11382 (vstrwq_scatter_shifted_offset_u32): Likewise.
11383 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
11384 (__arm_vstrdq_scatter_base_p_u64): Likewise.
11385 (__arm_vstrdq_scatter_base_s64): Likewise.
11386 (__arm_vstrdq_scatter_base_u64): Likewise.
11387 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
11388 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
11389 (__arm_vstrdq_scatter_offset_s64): Likewise.
11390 (__arm_vstrdq_scatter_offset_u64): Likewise.
11391 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
11392 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
11393 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
11394 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
11395 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
11396 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
11397 (__arm_vstrwq_scatter_offset_s32): Likewise.
11398 (__arm_vstrwq_scatter_offset_u32): Likewise.
11399 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
11400 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
11401 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
11402 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
11403 (__arm_vstrhq_scatter_offset_f16): Likewise.
11404 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
11405 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
11406 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
11407 (__arm_vstrwq_scatter_base_f32): Likewise.
11408 (__arm_vstrwq_scatter_base_p_f32): Likewise.
11409 (__arm_vstrwq_scatter_offset_f32): Likewise.
11410 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
11411 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
11412 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
11413 (vstrhq_scatter_offset): Define polymorphic variant.
11414 (vstrhq_scatter_offset_p): Likewise.
11415 (vstrhq_scatter_shifted_offset): Likewise.
11416 (vstrhq_scatter_shifted_offset_p): Likewise.
11417 (vstrwq_scatter_base): Likewise.
11418 (vstrwq_scatter_base_p): Likewise.
11419 (vstrwq_scatter_offset): Likewise.
11420 (vstrwq_scatter_offset_p): Likewise.
11421 (vstrwq_scatter_shifted_offset): Likewise.
11422 (vstrwq_scatter_shifted_offset_p): Likewise.
11423 (vstrdq_scatter_base_p): Likewise.
11424 (vstrdq_scatter_base): Likewise.
11425 (vstrdq_scatter_offset_p): Likewise.
11426 (vstrdq_scatter_offset): Likewise.
11427 (vstrdq_scatter_shifted_offset_p): Likewise.
11428 (vstrdq_scatter_shifted_offset): Likewise.
11429 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
11430 (STRSBS_P): Likewise.
11431 (STRSBU): Likewise.
11432 (STRSBU_P): Likewise.
11434 (STRSS_P): Likewise.
11436 (STRSU_P): Likewise.
11437 * config/arm/constraints.md (Ri): Define.
11438 * config/arm/mve.md (VSTRDSBQ): Define iterator.
11439 (VSTRDSOQ): Likewise.
11440 (VSTRDSSOQ): Likewise.
11441 (VSTRWSOQ): Likewise.
11442 (VSTRWSSOQ): Likewise.
11443 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
11444 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
11445 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
11446 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
11447 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
11448 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
11449 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
11450 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
11451 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
11452 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
11453 (mve_vstrwq_scatter_base_fv4sf): Likewise.
11454 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
11455 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
11456 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
11457 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
11458 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
11459 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
11460 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
11461 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
11462 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
11463 * config/arm/predicates.md (Ri): Define predicate to check immediate
11464 is the range +/-1016 and multiple of 8.
11466 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11467 Mihail Ionescu <mihail.ionescu@arm.com>
11468 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11470 * config/arm/arm_mve.h (vst1q_f32): Define macro.
11471 (vst1q_f16): Likewise.
11472 (vst1q_s8): Likewise.
11473 (vst1q_s32): Likewise.
11474 (vst1q_s16): Likewise.
11475 (vst1q_u8): Likewise.
11476 (vst1q_u32): Likewise.
11477 (vst1q_u16): Likewise.
11478 (vstrhq_f16): Likewise.
11479 (vstrhq_scatter_offset_s32): Likewise.
11480 (vstrhq_scatter_offset_s16): Likewise.
11481 (vstrhq_scatter_offset_u32): Likewise.
11482 (vstrhq_scatter_offset_u16): Likewise.
11483 (vstrhq_scatter_offset_p_s32): Likewise.
11484 (vstrhq_scatter_offset_p_s16): Likewise.
11485 (vstrhq_scatter_offset_p_u32): Likewise.
11486 (vstrhq_scatter_offset_p_u16): Likewise.
11487 (vstrhq_scatter_shifted_offset_s32): Likewise.
11488 (vstrhq_scatter_shifted_offset_s16): Likewise.
11489 (vstrhq_scatter_shifted_offset_u32): Likewise.
11490 (vstrhq_scatter_shifted_offset_u16): Likewise.
11491 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
11492 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
11493 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
11494 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
11495 (vstrhq_s32): Likewise.
11496 (vstrhq_s16): Likewise.
11497 (vstrhq_u32): Likewise.
11498 (vstrhq_u16): Likewise.
11499 (vstrhq_p_f16): Likewise.
11500 (vstrhq_p_s32): Likewise.
11501 (vstrhq_p_s16): Likewise.
11502 (vstrhq_p_u32): Likewise.
11503 (vstrhq_p_u16): Likewise.
11504 (vstrwq_f32): Likewise.
11505 (vstrwq_s32): Likewise.
11506 (vstrwq_u32): Likewise.
11507 (vstrwq_p_f32): Likewise.
11508 (vstrwq_p_s32): Likewise.
11509 (vstrwq_p_u32): Likewise.
11510 (__arm_vst1q_s8): Define intrinsic.
11511 (__arm_vst1q_s32): Likewise.
11512 (__arm_vst1q_s16): Likewise.
11513 (__arm_vst1q_u8): Likewise.
11514 (__arm_vst1q_u32): Likewise.
11515 (__arm_vst1q_u16): Likewise.
11516 (__arm_vstrhq_scatter_offset_s32): Likewise.
11517 (__arm_vstrhq_scatter_offset_s16): Likewise.
11518 (__arm_vstrhq_scatter_offset_u32): Likewise.
11519 (__arm_vstrhq_scatter_offset_u16): Likewise.
11520 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
11521 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
11522 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
11523 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
11524 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
11525 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
11526 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
11527 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
11528 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
11529 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
11530 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
11531 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
11532 (__arm_vstrhq_s32): Likewise.
11533 (__arm_vstrhq_s16): Likewise.
11534 (__arm_vstrhq_u32): Likewise.
11535 (__arm_vstrhq_u16): Likewise.
11536 (__arm_vstrhq_p_s32): Likewise.
11537 (__arm_vstrhq_p_s16): Likewise.
11538 (__arm_vstrhq_p_u32): Likewise.
11539 (__arm_vstrhq_p_u16): Likewise.
11540 (__arm_vstrwq_s32): Likewise.
11541 (__arm_vstrwq_u32): Likewise.
11542 (__arm_vstrwq_p_s32): Likewise.
11543 (__arm_vstrwq_p_u32): Likewise.
11544 (__arm_vstrwq_p_f32): Likewise.
11545 (__arm_vstrwq_f32): Likewise.
11546 (__arm_vst1q_f32): Likewise.
11547 (__arm_vst1q_f16): Likewise.
11548 (__arm_vstrhq_f16): Likewise.
11549 (__arm_vstrhq_p_f16): Likewise.
11550 (vst1q): Define polymorphic variant.
11551 (vstrhq): Likewise.
11552 (vstrhq_p): Likewise.
11553 (vstrhq_scatter_offset_p): Likewise.
11554 (vstrhq_scatter_offset): Likewise.
11555 (vstrhq_scatter_shifted_offset_p): Likewise.
11556 (vstrhq_scatter_shifted_offset): Likewise.
11557 (vstrwq_p): Likewise.
11558 (vstrwq): Likewise.
11559 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
11560 (STRS_P): Likewise.
11562 (STRSS_P): Likewise.
11564 (STRSU_P): Likewise.
11566 (STRU_P): Likewise.
11567 * config/arm/mve.md (VST1Q): Define iterator.
11568 (VSTRHSOQ): Likewise.
11569 (VSTRHSSOQ): Likewise.
11570 (VSTRHQ): Likewise.
11571 (VSTRWQ): Likewise.
11572 (mve_vstrhq_fv8hf): Define RTL pattern.
11573 (mve_vstrhq_p_fv8hf): Likewise.
11574 (mve_vstrhq_p_<supf><mode>): Likewise.
11575 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
11576 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
11577 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
11578 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
11579 (mve_vstrhq_<supf><mode>): Likewise.
11580 (mve_vstrwq_fv4sf): Likewise.
11581 (mve_vstrwq_p_fv4sf): Likewise.
11582 (mve_vstrwq_p_<supf>v4si): Likewise.
11583 (mve_vstrwq_<supf>v4si): Likewise.
11584 (mve_vst1q_f<mode>): Define expand.
11585 (mve_vst1q_<supf><mode>): Likewise.
11587 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11588 Mihail Ionescu <mihail.ionescu@arm.com>
11589 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11591 * config/arm/arm_mve.h (vld1q_s8): Define macro.
11592 (vld1q_s32): Likewise.
11593 (vld1q_s16): Likewise.
11594 (vld1q_u8): Likewise.
11595 (vld1q_u32): Likewise.
11596 (vld1q_u16): Likewise.
11597 (vldrhq_gather_offset_s32): Likewise.
11598 (vldrhq_gather_offset_s16): Likewise.
11599 (vldrhq_gather_offset_u32): Likewise.
11600 (vldrhq_gather_offset_u16): Likewise.
11601 (vldrhq_gather_offset_z_s32): Likewise.
11602 (vldrhq_gather_offset_z_s16): Likewise.
11603 (vldrhq_gather_offset_z_u32): Likewise.
11604 (vldrhq_gather_offset_z_u16): Likewise.
11605 (vldrhq_gather_shifted_offset_s32): Likewise.
11606 (vldrhq_gather_shifted_offset_s16): Likewise.
11607 (vldrhq_gather_shifted_offset_u32): Likewise.
11608 (vldrhq_gather_shifted_offset_u16): Likewise.
11609 (vldrhq_gather_shifted_offset_z_s32): Likewise.
11610 (vldrhq_gather_shifted_offset_z_s16): Likewise.
11611 (vldrhq_gather_shifted_offset_z_u32): Likewise.
11612 (vldrhq_gather_shifted_offset_z_u16): Likewise.
11613 (vldrhq_s32): Likewise.
11614 (vldrhq_s16): Likewise.
11615 (vldrhq_u32): Likewise.
11616 (vldrhq_u16): Likewise.
11617 (vldrhq_z_s32): Likewise.
11618 (vldrhq_z_s16): Likewise.
11619 (vldrhq_z_u32): Likewise.
11620 (vldrhq_z_u16): Likewise.
11621 (vldrwq_s32): Likewise.
11622 (vldrwq_u32): Likewise.
11623 (vldrwq_z_s32): Likewise.
11624 (vldrwq_z_u32): Likewise.
11625 (vld1q_f32): Likewise.
11626 (vld1q_f16): Likewise.
11627 (vldrhq_f16): Likewise.
11628 (vldrhq_z_f16): Likewise.
11629 (vldrwq_f32): Likewise.
11630 (vldrwq_z_f32): Likewise.
11631 (__arm_vld1q_s8): Define intrinsic.
11632 (__arm_vld1q_s32): Likewise.
11633 (__arm_vld1q_s16): Likewise.
11634 (__arm_vld1q_u8): Likewise.
11635 (__arm_vld1q_u32): Likewise.
11636 (__arm_vld1q_u16): Likewise.
11637 (__arm_vldrhq_gather_offset_s32): Likewise.
11638 (__arm_vldrhq_gather_offset_s16): Likewise.
11639 (__arm_vldrhq_gather_offset_u32): Likewise.
11640 (__arm_vldrhq_gather_offset_u16): Likewise.
11641 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11642 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11643 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11644 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11645 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11646 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11647 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11648 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11649 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11650 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11651 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11652 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11653 (__arm_vldrhq_s32): Likewise.
11654 (__arm_vldrhq_s16): Likewise.
11655 (__arm_vldrhq_u32): Likewise.
11656 (__arm_vldrhq_u16): Likewise.
11657 (__arm_vldrhq_z_s32): Likewise.
11658 (__arm_vldrhq_z_s16): Likewise.
11659 (__arm_vldrhq_z_u32): Likewise.
11660 (__arm_vldrhq_z_u16): Likewise.
11661 (__arm_vldrwq_s32): Likewise.
11662 (__arm_vldrwq_u32): Likewise.
11663 (__arm_vldrwq_z_s32): Likewise.
11664 (__arm_vldrwq_z_u32): Likewise.
11665 (__arm_vld1q_f32): Likewise.
11666 (__arm_vld1q_f16): Likewise.
11667 (__arm_vldrwq_f32): Likewise.
11668 (__arm_vldrwq_z_f32): Likewise.
11669 (__arm_vldrhq_z_f16): Likewise.
11670 (__arm_vldrhq_f16): Likewise.
11671 (vld1q): Define polymorphic variant.
11672 (vldrhq_gather_offset): Likewise.
11673 (vldrhq_gather_offset_z): Likewise.
11674 (vldrhq_gather_shifted_offset): Likewise.
11675 (vldrhq_gather_shifted_offset_z): Likewise.
11676 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
11678 (LDRU_Z): Likewise.
11679 (LDRS_Z): Likewise.
11680 (LDRGU_Z): Likewise.
11682 (LDRGS_Z): Likewise.
11684 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
11685 (V_sz_elem1): Likewise.
11686 (VLD1Q): Define iterator.
11687 (VLDRHGOQ): Likewise.
11688 (VLDRHGSOQ): Likewise.
11689 (VLDRHQ): Likewise.
11690 (VLDRWQ): Likewise.
11691 (mve_vldrhq_fv8hf): Define RTL pattern.
11692 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
11693 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
11694 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
11695 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
11696 (mve_vldrhq_<supf><mode>): Likewise.
11697 (mve_vldrhq_z_fv8hf): Likewise.
11698 (mve_vldrhq_z_<supf><mode>): Likewise.
11699 (mve_vldrwq_fv4sf): Likewise.
11700 (mve_vldrwq_<supf>v4si): Likewise.
11701 (mve_vldrwq_z_fv4sf): Likewise.
11702 (mve_vldrwq_z_<supf>v4si): Likewise.
11703 (mve_vld1q_f<mode>): Define RTL expand pattern.
11704 (mve_vld1q_<supf><mode>): Likewise.
11706 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11707 Mihail Ionescu <mihail.ionescu@arm.com>
11708 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11710 * config/arm/arm_mve.h (vld1q_s8): Define macro.
11711 (vld1q_s32): Likewise.
11712 (vld1q_s16): Likewise.
11713 (vld1q_u8): Likewise.
11714 (vld1q_u32): Likewise.
11715 (vld1q_u16): Likewise.
11716 (vldrhq_gather_offset_s32): Likewise.
11717 (vldrhq_gather_offset_s16): Likewise.
11718 (vldrhq_gather_offset_u32): Likewise.
11719 (vldrhq_gather_offset_u16): Likewise.
11720 (vldrhq_gather_offset_z_s32): Likewise.
11721 (vldrhq_gather_offset_z_s16): Likewise.
11722 (vldrhq_gather_offset_z_u32): Likewise.
11723 (vldrhq_gather_offset_z_u16): Likewise.
11724 (vldrhq_gather_shifted_offset_s32): Likewise.
11725 (vldrhq_gather_shifted_offset_s16): Likewise.
11726 (vldrhq_gather_shifted_offset_u32): Likewise.
11727 (vldrhq_gather_shifted_offset_u16): Likewise.
11728 (vldrhq_gather_shifted_offset_z_s32): Likewise.
11729 (vldrhq_gather_shifted_offset_z_s16): Likewise.
11730 (vldrhq_gather_shifted_offset_z_u32): Likewise.
11731 (vldrhq_gather_shifted_offset_z_u16): Likewise.
11732 (vldrhq_s32): Likewise.
11733 (vldrhq_s16): Likewise.
11734 (vldrhq_u32): Likewise.
11735 (vldrhq_u16): Likewise.
11736 (vldrhq_z_s32): Likewise.
11737 (vldrhq_z_s16): Likewise.
11738 (vldrhq_z_u32): Likewise.
11739 (vldrhq_z_u16): Likewise.
11740 (vldrwq_s32): Likewise.
11741 (vldrwq_u32): Likewise.
11742 (vldrwq_z_s32): Likewise.
11743 (vldrwq_z_u32): Likewise.
11744 (vld1q_f32): Likewise.
11745 (vld1q_f16): Likewise.
11746 (vldrhq_f16): Likewise.
11747 (vldrhq_z_f16): Likewise.
11748 (vldrwq_f32): Likewise.
11749 (vldrwq_z_f32): Likewise.
11750 (__arm_vld1q_s8): Define intrinsic.
11751 (__arm_vld1q_s32): Likewise.
11752 (__arm_vld1q_s16): Likewise.
11753 (__arm_vld1q_u8): Likewise.
11754 (__arm_vld1q_u32): Likewise.
11755 (__arm_vld1q_u16): Likewise.
11756 (__arm_vldrhq_gather_offset_s32): Likewise.
11757 (__arm_vldrhq_gather_offset_s16): Likewise.
11758 (__arm_vldrhq_gather_offset_u32): Likewise.
11759 (__arm_vldrhq_gather_offset_u16): Likewise.
11760 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11761 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11762 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11763 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11764 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11765 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11766 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11767 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11768 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11769 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11770 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11771 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11772 (__arm_vldrhq_s32): Likewise.
11773 (__arm_vldrhq_s16): Likewise.
11774 (__arm_vldrhq_u32): Likewise.
11775 (__arm_vldrhq_u16): Likewise.
11776 (__arm_vldrhq_z_s32): Likewise.
11777 (__arm_vldrhq_z_s16): Likewise.
11778 (__arm_vldrhq_z_u32): Likewise.
11779 (__arm_vldrhq_z_u16): Likewise.
11780 (__arm_vldrwq_s32): Likewise.
11781 (__arm_vldrwq_u32): Likewise.
11782 (__arm_vldrwq_z_s32): Likewise.
11783 (__arm_vldrwq_z_u32): Likewise.
11784 (__arm_vld1q_f32): Likewise.
11785 (__arm_vld1q_f16): Likewise.
11786 (__arm_vldrwq_f32): Likewise.
11787 (__arm_vldrwq_z_f32): Likewise.
11788 (__arm_vldrhq_z_f16): Likewise.
11789 (__arm_vldrhq_f16): Likewise.
11790 (vld1q): Define polymorphic variant.
11791 (vldrhq_gather_offset): Likewise.
11792 (vldrhq_gather_offset_z): Likewise.
11793 (vldrhq_gather_shifted_offset): Likewise.
11794 (vldrhq_gather_shifted_offset_z): Likewise.
11795 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
11797 (LDRU_Z): Likewise.
11798 (LDRS_Z): Likewise.
11799 (LDRGU_Z): Likewise.
11801 (LDRGS_Z): Likewise.
11803 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
11804 (V_sz_elem1): Likewise.
11805 (VLD1Q): Define iterator.
11806 (VLDRHGOQ): Likewise.
11807 (VLDRHGSOQ): Likewise.
11808 (VLDRHQ): Likewise.
11809 (VLDRWQ): Likewise.
11810 (mve_vldrhq_fv8hf): Define RTL pattern.
11811 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
11812 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
11813 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
11814 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
11815 (mve_vldrhq_<supf><mode>): Likewise.
11816 (mve_vldrhq_z_fv8hf): Likewise.
11817 (mve_vldrhq_z_<supf><mode>): Likewise.
11818 (mve_vldrwq_fv4sf): Likewise.
11819 (mve_vldrwq_<supf>v4si): Likewise.
11820 (mve_vldrwq_z_fv4sf): Likewise.
11821 (mve_vldrwq_z_<supf>v4si): Likewise.
11822 (mve_vld1q_f<mode>): Define RTL expand pattern.
11823 (mve_vld1q_<supf><mode>): Likewise.
11825 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11826 Mihail Ionescu <mihail.ionescu@arm.com>
11827 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11829 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
11831 (LDRGBU_Z_QUALIFIERS): Likewise.
11832 (LDRGS_Z_QUALIFIERS): Likewise.
11833 (LDRGU_Z_QUALIFIERS): Likewise.
11834 (LDRS_Z_QUALIFIERS): Likewise.
11835 (LDRU_Z_QUALIFIERS): Likewise.
11836 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
11837 (vldrbq_gather_offset_z_u8): Likewise.
11838 (vldrbq_gather_offset_z_s32): Likewise.
11839 (vldrbq_gather_offset_z_u16): Likewise.
11840 (vldrbq_gather_offset_z_u32): Likewise.
11841 (vldrbq_gather_offset_z_s8): Likewise.
11842 (vldrbq_z_s16): Likewise.
11843 (vldrbq_z_u8): Likewise.
11844 (vldrbq_z_s8): Likewise.
11845 (vldrbq_z_s32): Likewise.
11846 (vldrbq_z_u16): Likewise.
11847 (vldrbq_z_u32): Likewise.
11848 (vldrwq_gather_base_z_u32): Likewise.
11849 (vldrwq_gather_base_z_s32): Likewise.
11850 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
11851 (__arm_vldrbq_gather_offset_z_s32): Likewise.
11852 (__arm_vldrbq_gather_offset_z_s16): Likewise.
11853 (__arm_vldrbq_gather_offset_z_u8): Likewise.
11854 (__arm_vldrbq_gather_offset_z_u32): Likewise.
11855 (__arm_vldrbq_gather_offset_z_u16): Likewise.
11856 (__arm_vldrbq_z_s8): Likewise.
11857 (__arm_vldrbq_z_s32): Likewise.
11858 (__arm_vldrbq_z_s16): Likewise.
11859 (__arm_vldrbq_z_u8): Likewise.
11860 (__arm_vldrbq_z_u32): Likewise.
11861 (__arm_vldrbq_z_u16): Likewise.
11862 (__arm_vldrwq_gather_base_z_s32): Likewise.
11863 (__arm_vldrwq_gather_base_z_u32): Likewise.
11864 (vldrbq_gather_offset_z): Define polymorphic variant.
11865 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
11867 (LDRGBU_Z_QUALIFIERS): Likewise.
11868 (LDRGS_Z_QUALIFIERS): Likewise.
11869 (LDRGU_Z_QUALIFIERS): Likewise.
11870 (LDRS_Z_QUALIFIERS): Likewise.
11871 (LDRU_Z_QUALIFIERS): Likewise.
11872 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
11874 (mve_vldrbq_z_<supf><mode>): Likewise.
11875 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
11877 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11878 Mihail Ionescu <mihail.ionescu@arm.com>
11879 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11881 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
11883 (STRU_P_QUALIFIERS): Likewise.
11884 (STRSU_P_QUALIFIERS): Likewise.
11885 (STRSS_P_QUALIFIERS): Likewise.
11886 (STRSBS_P_QUALIFIERS): Likewise.
11887 (STRSBU_P_QUALIFIERS): Likewise.
11888 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
11889 (vstrbq_p_s32): Likewise.
11890 (vstrbq_p_s16): Likewise.
11891 (vstrbq_p_u8): Likewise.
11892 (vstrbq_p_u32): Likewise.
11893 (vstrbq_p_u16): Likewise.
11894 (vstrbq_scatter_offset_p_s8): Likewise.
11895 (vstrbq_scatter_offset_p_s32): Likewise.
11896 (vstrbq_scatter_offset_p_s16): Likewise.
11897 (vstrbq_scatter_offset_p_u8): Likewise.
11898 (vstrbq_scatter_offset_p_u32): Likewise.
11899 (vstrbq_scatter_offset_p_u16): Likewise.
11900 (vstrwq_scatter_base_p_s32): Likewise.
11901 (vstrwq_scatter_base_p_u32): Likewise.
11902 (__arm_vstrbq_p_s8): Define intrinsic.
11903 (__arm_vstrbq_p_s32): Likewise.
11904 (__arm_vstrbq_p_s16): Likewise.
11905 (__arm_vstrbq_p_u8): Likewise.
11906 (__arm_vstrbq_p_u32): Likewise.
11907 (__arm_vstrbq_p_u16): Likewise.
11908 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
11909 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
11910 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
11911 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
11912 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
11913 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
11914 (__arm_vstrwq_scatter_base_p_s32): Likewise.
11915 (__arm_vstrwq_scatter_base_p_u32): Likewise.
11916 (vstrbq_p): Define polymorphic variant.
11917 (vstrbq_scatter_offset_p): Likewise.
11918 (vstrwq_scatter_base_p): Likewise.
11919 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
11921 (STRU_P_QUALIFIERS): Likewise.
11922 (STRSU_P_QUALIFIERS): Likewise.
11923 (STRSS_P_QUALIFIERS): Likewise.
11924 (STRSBS_P_QUALIFIERS): Likewise.
11925 (STRSBU_P_QUALIFIERS): Likewise.
11926 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
11928 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
11929 (mve_vstrbq_p_<supf><mode>): Likewise.
11931 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11932 Mihail Ionescu <mihail.ionescu@arm.com>
11933 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11935 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
11937 (LDRGS_QUALIFIERS): Likewise.
11938 (LDRS_QUALIFIERS): Likewise.
11939 (LDRU_QUALIFIERS): Likewise.
11940 (LDRGBS_QUALIFIERS): Likewise.
11941 (LDRGBU_QUALIFIERS): Likewise.
11942 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
11943 (vldrbq_gather_offset_s8): Likewise.
11944 (vldrbq_s8): Likewise.
11945 (vldrbq_u8): Likewise.
11946 (vldrbq_gather_offset_u16): Likewise.
11947 (vldrbq_gather_offset_s16): Likewise.
11948 (vldrbq_s16): Likewise.
11949 (vldrbq_u16): Likewise.
11950 (vldrbq_gather_offset_u32): Likewise.
11951 (vldrbq_gather_offset_s32): Likewise.
11952 (vldrbq_s32): Likewise.
11953 (vldrbq_u32): Likewise.
11954 (vldrwq_gather_base_s32): Likewise.
11955 (vldrwq_gather_base_u32): Likewise.
11956 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
11957 (__arm_vldrbq_gather_offset_s8): Likewise.
11958 (__arm_vldrbq_s8): Likewise.
11959 (__arm_vldrbq_u8): Likewise.
11960 (__arm_vldrbq_gather_offset_u16): Likewise.
11961 (__arm_vldrbq_gather_offset_s16): Likewise.
11962 (__arm_vldrbq_s16): Likewise.
11963 (__arm_vldrbq_u16): Likewise.
11964 (__arm_vldrbq_gather_offset_u32): Likewise.
11965 (__arm_vldrbq_gather_offset_s32): Likewise.
11966 (__arm_vldrbq_s32): Likewise.
11967 (__arm_vldrbq_u32): Likewise.
11968 (__arm_vldrwq_gather_base_s32): Likewise.
11969 (__arm_vldrwq_gather_base_u32): Likewise.
11970 (vldrbq_gather_offset): Define polymorphic variant.
11971 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
11973 (LDRGS_QUALIFIERS): Likewise.
11974 (LDRS_QUALIFIERS): Likewise.
11975 (LDRU_QUALIFIERS): Likewise.
11976 (LDRGBS_QUALIFIERS): Likewise.
11977 (LDRGBU_QUALIFIERS): Likewise.
11978 * config/arm/mve.md (VLDRBGOQ): Define iterator.
11979 (VLDRBQ): Likewise.
11980 (VLDRWGBQ): Likewise.
11981 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
11982 (mve_vldrbq_<supf><mode>): Likewise.
11983 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
11985 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11986 Mihail Ionescu <mihail.ionescu@arm.com>
11987 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11989 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
11990 (STRU_QUALIFIERS): Likewise.
11991 (STRSS_QUALIFIERS): Likewise.
11992 (STRSU_QUALIFIERS): Likewise.
11993 (STRSBS_QUALIFIERS): Likewise.
11994 (STRSBU_QUALIFIERS): Likewise.
11995 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
11996 (vstrbq_u8): Likewise.
11997 (vstrbq_u16): Likewise.
11998 (vstrbq_scatter_offset_s8): Likewise.
11999 (vstrbq_scatter_offset_u8): Likewise.
12000 (vstrbq_scatter_offset_u16): Likewise.
12001 (vstrbq_s16): Likewise.
12002 (vstrbq_u32): Likewise.
12003 (vstrbq_scatter_offset_s16): Likewise.
12004 (vstrbq_scatter_offset_u32): Likewise.
12005 (vstrbq_s32): Likewise.
12006 (vstrbq_scatter_offset_s32): Likewise.
12007 (vstrwq_scatter_base_s32): Likewise.
12008 (vstrwq_scatter_base_u32): Likewise.
12009 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
12010 (__arm_vstrbq_scatter_offset_s32): Likewise.
12011 (__arm_vstrbq_scatter_offset_s16): Likewise.
12012 (__arm_vstrbq_scatter_offset_u8): Likewise.
12013 (__arm_vstrbq_scatter_offset_u32): Likewise.
12014 (__arm_vstrbq_scatter_offset_u16): Likewise.
12015 (__arm_vstrbq_s8): Likewise.
12016 (__arm_vstrbq_s32): Likewise.
12017 (__arm_vstrbq_s16): Likewise.
12018 (__arm_vstrbq_u8): Likewise.
12019 (__arm_vstrbq_u32): Likewise.
12020 (__arm_vstrbq_u16): Likewise.
12021 (__arm_vstrwq_scatter_base_s32): Likewise.
12022 (__arm_vstrwq_scatter_base_u32): Likewise.
12023 (vstrbq): Define polymorphic variant.
12024 (vstrbq_scatter_offset): Likewise.
12025 (vstrwq_scatter_base): Likewise.
12026 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
12028 (STRU_QUALIFIERS): Likewise.
12029 (STRSS_QUALIFIERS): Likewise.
12030 (STRSU_QUALIFIERS): Likewise.
12031 (STRSBS_QUALIFIERS): Likewise.
12032 (STRSBU_QUALIFIERS): Likewise.
12033 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
12034 (VSTRWSBQ): Define iterators.
12035 (VSTRBSOQ): Likewise.
12036 (VSTRBQ): Likewise.
12037 (mve_vstrbq_<supf><mode>): Define RTL pattern.
12038 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
12039 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
12041 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12042 Mihail Ionescu <mihail.ionescu@arm.com>
12043 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12045 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
12046 (vabdq_m_f16): Likewise.
12047 (vaddq_m_f32): Likewise.
12048 (vaddq_m_f16): Likewise.
12049 (vaddq_m_n_f32): Likewise.
12050 (vaddq_m_n_f16): Likewise.
12051 (vandq_m_f32): Likewise.
12052 (vandq_m_f16): Likewise.
12053 (vbicq_m_f32): Likewise.
12054 (vbicq_m_f16): Likewise.
12055 (vbrsrq_m_n_f32): Likewise.
12056 (vbrsrq_m_n_f16): Likewise.
12057 (vcaddq_rot270_m_f32): Likewise.
12058 (vcaddq_rot270_m_f16): Likewise.
12059 (vcaddq_rot90_m_f32): Likewise.
12060 (vcaddq_rot90_m_f16): Likewise.
12061 (vcmlaq_m_f32): Likewise.
12062 (vcmlaq_m_f16): Likewise.
12063 (vcmlaq_rot180_m_f32): Likewise.
12064 (vcmlaq_rot180_m_f16): Likewise.
12065 (vcmlaq_rot270_m_f32): Likewise.
12066 (vcmlaq_rot270_m_f16): Likewise.
12067 (vcmlaq_rot90_m_f32): Likewise.
12068 (vcmlaq_rot90_m_f16): Likewise.
12069 (vcmulq_m_f32): Likewise.
12070 (vcmulq_m_f16): Likewise.
12071 (vcmulq_rot180_m_f32): Likewise.
12072 (vcmulq_rot180_m_f16): Likewise.
12073 (vcmulq_rot270_m_f32): Likewise.
12074 (vcmulq_rot270_m_f16): Likewise.
12075 (vcmulq_rot90_m_f32): Likewise.
12076 (vcmulq_rot90_m_f16): Likewise.
12077 (vcvtq_m_n_s32_f32): Likewise.
12078 (vcvtq_m_n_s16_f16): Likewise.
12079 (vcvtq_m_n_u32_f32): Likewise.
12080 (vcvtq_m_n_u16_f16): Likewise.
12081 (veorq_m_f32): Likewise.
12082 (veorq_m_f16): Likewise.
12083 (vfmaq_m_f32): Likewise.
12084 (vfmaq_m_f16): Likewise.
12085 (vfmaq_m_n_f32): Likewise.
12086 (vfmaq_m_n_f16): Likewise.
12087 (vfmasq_m_n_f32): Likewise.
12088 (vfmasq_m_n_f16): Likewise.
12089 (vfmsq_m_f32): Likewise.
12090 (vfmsq_m_f16): Likewise.
12091 (vmaxnmq_m_f32): Likewise.
12092 (vmaxnmq_m_f16): Likewise.
12093 (vminnmq_m_f32): Likewise.
12094 (vminnmq_m_f16): Likewise.
12095 (vmulq_m_f32): Likewise.
12096 (vmulq_m_f16): Likewise.
12097 (vmulq_m_n_f32): Likewise.
12098 (vmulq_m_n_f16): Likewise.
12099 (vornq_m_f32): Likewise.
12100 (vornq_m_f16): Likewise.
12101 (vorrq_m_f32): Likewise.
12102 (vorrq_m_f16): Likewise.
12103 (vsubq_m_f32): Likewise.
12104 (vsubq_m_f16): Likewise.
12105 (vsubq_m_n_f32): Likewise.
12106 (vsubq_m_n_f16): Likewise.
12107 (__attribute__): Likewise.
12108 (__arm_vabdq_m_f32): Likewise.
12109 (__arm_vabdq_m_f16): Likewise.
12110 (__arm_vaddq_m_f32): Likewise.
12111 (__arm_vaddq_m_f16): Likewise.
12112 (__arm_vaddq_m_n_f32): Likewise.
12113 (__arm_vaddq_m_n_f16): Likewise.
12114 (__arm_vandq_m_f32): Likewise.
12115 (__arm_vandq_m_f16): Likewise.
12116 (__arm_vbicq_m_f32): Likewise.
12117 (__arm_vbicq_m_f16): Likewise.
12118 (__arm_vbrsrq_m_n_f32): Likewise.
12119 (__arm_vbrsrq_m_n_f16): Likewise.
12120 (__arm_vcaddq_rot270_m_f32): Likewise.
12121 (__arm_vcaddq_rot270_m_f16): Likewise.
12122 (__arm_vcaddq_rot90_m_f32): Likewise.
12123 (__arm_vcaddq_rot90_m_f16): Likewise.
12124 (__arm_vcmlaq_m_f32): Likewise.
12125 (__arm_vcmlaq_m_f16): Likewise.
12126 (__arm_vcmlaq_rot180_m_f32): Likewise.
12127 (__arm_vcmlaq_rot180_m_f16): Likewise.
12128 (__arm_vcmlaq_rot270_m_f32): Likewise.
12129 (__arm_vcmlaq_rot270_m_f16): Likewise.
12130 (__arm_vcmlaq_rot90_m_f32): Likewise.
12131 (__arm_vcmlaq_rot90_m_f16): Likewise.
12132 (__arm_vcmulq_m_f32): Likewise.
12133 (__arm_vcmulq_m_f16): Likewise.
12134 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
12135 (__arm_vcmulq_rot180_m_f16): Likewise.
12136 (__arm_vcmulq_rot270_m_f32): Likewise.
12137 (__arm_vcmulq_rot270_m_f16): Likewise.
12138 (__arm_vcmulq_rot90_m_f32): Likewise.
12139 (__arm_vcmulq_rot90_m_f16): Likewise.
12140 (__arm_vcvtq_m_n_s32_f32): Likewise.
12141 (__arm_vcvtq_m_n_s16_f16): Likewise.
12142 (__arm_vcvtq_m_n_u32_f32): Likewise.
12143 (__arm_vcvtq_m_n_u16_f16): Likewise.
12144 (__arm_veorq_m_f32): Likewise.
12145 (__arm_veorq_m_f16): Likewise.
12146 (__arm_vfmaq_m_f32): Likewise.
12147 (__arm_vfmaq_m_f16): Likewise.
12148 (__arm_vfmaq_m_n_f32): Likewise.
12149 (__arm_vfmaq_m_n_f16): Likewise.
12150 (__arm_vfmasq_m_n_f32): Likewise.
12151 (__arm_vfmasq_m_n_f16): Likewise.
12152 (__arm_vfmsq_m_f32): Likewise.
12153 (__arm_vfmsq_m_f16): Likewise.
12154 (__arm_vmaxnmq_m_f32): Likewise.
12155 (__arm_vmaxnmq_m_f16): Likewise.
12156 (__arm_vminnmq_m_f32): Likewise.
12157 (__arm_vminnmq_m_f16): Likewise.
12158 (__arm_vmulq_m_f32): Likewise.
12159 (__arm_vmulq_m_f16): Likewise.
12160 (__arm_vmulq_m_n_f32): Likewise.
12161 (__arm_vmulq_m_n_f16): Likewise.
12162 (__arm_vornq_m_f32): Likewise.
12163 (__arm_vornq_m_f16): Likewise.
12164 (__arm_vorrq_m_f32): Likewise.
12165 (__arm_vorrq_m_f16): Likewise.
12166 (__arm_vsubq_m_f32): Likewise.
12167 (__arm_vsubq_m_f16): Likewise.
12168 (__arm_vsubq_m_n_f32): Likewise.
12169 (__arm_vsubq_m_n_f16): Likewise.
12170 (vabdq_m): Define polymorphic variant.
12171 (vaddq_m): Likewise.
12172 (vaddq_m_n): Likewise.
12173 (vandq_m): Likewise.
12174 (vbicq_m): Likewise.
12175 (vbrsrq_m_n): Likewise.
12176 (vcaddq_rot270_m): Likewise.
12177 (vcaddq_rot90_m): Likewise.
12178 (vcmlaq_m): Likewise.
12179 (vcmlaq_rot180_m): Likewise.
12180 (vcmlaq_rot270_m): Likewise.
12181 (vcmlaq_rot90_m): Likewise.
12182 (vcmulq_m): Likewise.
12183 (vcmulq_rot180_m): Likewise.
12184 (vcmulq_rot270_m): Likewise.
12185 (vcmulq_rot90_m): Likewise.
12186 (veorq_m): Likewise.
12187 (vfmaq_m): Likewise.
12188 (vfmaq_m_n): Likewise.
12189 (vfmasq_m_n): Likewise.
12190 (vfmsq_m): Likewise.
12191 (vmaxnmq_m): Likewise.
12192 (vminnmq_m): Likewise.
12193 (vmulq_m): Likewise.
12194 (vmulq_m_n): Likewise.
12195 (vornq_m): Likewise.
12196 (vsubq_m): Likewise.
12197 (vsubq_m_n): Likewise.
12198 (vorrq_m): Likewise.
12199 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
12201 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12202 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
12203 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
12204 (mve_vaddq_m_f<mode>): Likewise.
12205 (mve_vaddq_m_n_f<mode>): Likewise.
12206 (mve_vandq_m_f<mode>): Likewise.
12207 (mve_vbicq_m_f<mode>): Likewise.
12208 (mve_vbrsrq_m_n_f<mode>): Likewise.
12209 (mve_vcaddq_rot270_m_f<mode>): Likewise.
12210 (mve_vcaddq_rot90_m_f<mode>): Likewise.
12211 (mve_vcmlaq_m_f<mode>): Likewise.
12212 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
12213 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
12214 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
12215 (mve_vcmulq_m_f<mode>): Likewise.
12216 (mve_vcmulq_rot180_m_f<mode>): Likewise.
12217 (mve_vcmulq_rot270_m_f<mode>): Likewise.
12218 (mve_vcmulq_rot90_m_f<mode>): Likewise.
12219 (mve_veorq_m_f<mode>): Likewise.
12220 (mve_vfmaq_m_f<mode>): Likewise.
12221 (mve_vfmaq_m_n_f<mode>): Likewise.
12222 (mve_vfmasq_m_n_f<mode>): Likewise.
12223 (mve_vfmsq_m_f<mode>): Likewise.
12224 (mve_vmaxnmq_m_f<mode>): Likewise.
12225 (mve_vminnmq_m_f<mode>): Likewise.
12226 (mve_vmulq_m_f<mode>): Likewise.
12227 (mve_vmulq_m_n_f<mode>): Likewise.
12228 (mve_vornq_m_f<mode>): Likewise.
12229 (mve_vorrq_m_f<mode>): Likewise.
12230 (mve_vsubq_m_f<mode>): Likewise.
12231 (mve_vsubq_m_n_f<mode>): Likewise.
12233 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12234 Mihail Ionescu <mihail.ionescu@arm.com>
12235 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12237 * config/arm/arm-protos.h (arm_mve_immediate_check):
12238 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
12239 mode and interger value.
12240 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
12241 (vmlaldavaq_p_s16): Likewise.
12242 (vmlaldavaq_p_u32): Likewise.
12243 (vmlaldavaq_p_u16): Likewise.
12244 (vmlaldavaxq_p_s32): Likewise.
12245 (vmlaldavaxq_p_s16): Likewise.
12246 (vmlaldavaxq_p_u32): Likewise.
12247 (vmlaldavaxq_p_u16): Likewise.
12248 (vmlsldavaq_p_s32): Likewise.
12249 (vmlsldavaq_p_s16): Likewise.
12250 (vmlsldavaxq_p_s32): Likewise.
12251 (vmlsldavaxq_p_s16): Likewise.
12252 (vmullbq_poly_m_p8): Likewise.
12253 (vmullbq_poly_m_p16): Likewise.
12254 (vmulltq_poly_m_p8): Likewise.
12255 (vmulltq_poly_m_p16): Likewise.
12256 (vqdmullbq_m_n_s32): Likewise.
12257 (vqdmullbq_m_n_s16): Likewise.
12258 (vqdmullbq_m_s32): Likewise.
12259 (vqdmullbq_m_s16): Likewise.
12260 (vqdmulltq_m_n_s32): Likewise.
12261 (vqdmulltq_m_n_s16): Likewise.
12262 (vqdmulltq_m_s32): Likewise.
12263 (vqdmulltq_m_s16): Likewise.
12264 (vqrshrnbq_m_n_s32): Likewise.
12265 (vqrshrnbq_m_n_s16): Likewise.
12266 (vqrshrnbq_m_n_u32): Likewise.
12267 (vqrshrnbq_m_n_u16): Likewise.
12268 (vqrshrntq_m_n_s32): Likewise.
12269 (vqrshrntq_m_n_s16): Likewise.
12270 (vqrshrntq_m_n_u32): Likewise.
12271 (vqrshrntq_m_n_u16): Likewise.
12272 (vqrshrunbq_m_n_s32): Likewise.
12273 (vqrshrunbq_m_n_s16): Likewise.
12274 (vqrshruntq_m_n_s32): Likewise.
12275 (vqrshruntq_m_n_s16): Likewise.
12276 (vqshrnbq_m_n_s32): Likewise.
12277 (vqshrnbq_m_n_s16): Likewise.
12278 (vqshrnbq_m_n_u32): Likewise.
12279 (vqshrnbq_m_n_u16): Likewise.
12280 (vqshrntq_m_n_s32): Likewise.
12281 (vqshrntq_m_n_s16): Likewise.
12282 (vqshrntq_m_n_u32): Likewise.
12283 (vqshrntq_m_n_u16): Likewise.
12284 (vqshrunbq_m_n_s32): Likewise.
12285 (vqshrunbq_m_n_s16): Likewise.
12286 (vqshruntq_m_n_s32): Likewise.
12287 (vqshruntq_m_n_s16): Likewise.
12288 (vrmlaldavhaq_p_s32): Likewise.
12289 (vrmlaldavhaq_p_u32): Likewise.
12290 (vrmlaldavhaxq_p_s32): Likewise.
12291 (vrmlsldavhaq_p_s32): Likewise.
12292 (vrmlsldavhaxq_p_s32): Likewise.
12293 (vrshrnbq_m_n_s32): Likewise.
12294 (vrshrnbq_m_n_s16): Likewise.
12295 (vrshrnbq_m_n_u32): Likewise.
12296 (vrshrnbq_m_n_u16): Likewise.
12297 (vrshrntq_m_n_s32): Likewise.
12298 (vrshrntq_m_n_s16): Likewise.
12299 (vrshrntq_m_n_u32): Likewise.
12300 (vrshrntq_m_n_u16): Likewise.
12301 (vshllbq_m_n_s8): Likewise.
12302 (vshllbq_m_n_s16): Likewise.
12303 (vshllbq_m_n_u8): Likewise.
12304 (vshllbq_m_n_u16): Likewise.
12305 (vshlltq_m_n_s8): Likewise.
12306 (vshlltq_m_n_s16): Likewise.
12307 (vshlltq_m_n_u8): Likewise.
12308 (vshlltq_m_n_u16): Likewise.
12309 (vshrnbq_m_n_s32): Likewise.
12310 (vshrnbq_m_n_s16): Likewise.
12311 (vshrnbq_m_n_u32): Likewise.
12312 (vshrnbq_m_n_u16): Likewise.
12313 (vshrntq_m_n_s32): Likewise.
12314 (vshrntq_m_n_s16): Likewise.
12315 (vshrntq_m_n_u32): Likewise.
12316 (vshrntq_m_n_u16): Likewise.
12317 (__arm_vmlaldavaq_p_s32): Define intrinsic.
12318 (__arm_vmlaldavaq_p_s16): Likewise.
12319 (__arm_vmlaldavaq_p_u32): Likewise.
12320 (__arm_vmlaldavaq_p_u16): Likewise.
12321 (__arm_vmlaldavaxq_p_s32): Likewise.
12322 (__arm_vmlaldavaxq_p_s16): Likewise.
12323 (__arm_vmlaldavaxq_p_u32): Likewise.
12324 (__arm_vmlaldavaxq_p_u16): Likewise.
12325 (__arm_vmlsldavaq_p_s32): Likewise.
12326 (__arm_vmlsldavaq_p_s16): Likewise.
12327 (__arm_vmlsldavaxq_p_s32): Likewise.
12328 (__arm_vmlsldavaxq_p_s16): Likewise.
12329 (__arm_vmullbq_poly_m_p8): Likewise.
12330 (__arm_vmullbq_poly_m_p16): Likewise.
12331 (__arm_vmulltq_poly_m_p8): Likewise.
12332 (__arm_vmulltq_poly_m_p16): Likewise.
12333 (__arm_vqdmullbq_m_n_s32): Likewise.
12334 (__arm_vqdmullbq_m_n_s16): Likewise.
12335 (__arm_vqdmullbq_m_s32): Likewise.
12336 (__arm_vqdmullbq_m_s16): Likewise.
12337 (__arm_vqdmulltq_m_n_s32): Likewise.
12338 (__arm_vqdmulltq_m_n_s16): Likewise.
12339 (__arm_vqdmulltq_m_s32): Likewise.
12340 (__arm_vqdmulltq_m_s16): Likewise.
12341 (__arm_vqrshrnbq_m_n_s32): Likewise.
12342 (__arm_vqrshrnbq_m_n_s16): Likewise.
12343 (__arm_vqrshrnbq_m_n_u32): Likewise.
12344 (__arm_vqrshrnbq_m_n_u16): Likewise.
12345 (__arm_vqrshrntq_m_n_s32): Likewise.
12346 (__arm_vqrshrntq_m_n_s16): Likewise.
12347 (__arm_vqrshrntq_m_n_u32): Likewise.
12348 (__arm_vqrshrntq_m_n_u16): Likewise.
12349 (__arm_vqrshrunbq_m_n_s32): Likewise.
12350 (__arm_vqrshrunbq_m_n_s16): Likewise.
12351 (__arm_vqrshruntq_m_n_s32): Likewise.
12352 (__arm_vqrshruntq_m_n_s16): Likewise.
12353 (__arm_vqshrnbq_m_n_s32): Likewise.
12354 (__arm_vqshrnbq_m_n_s16): Likewise.
12355 (__arm_vqshrnbq_m_n_u32): Likewise.
12356 (__arm_vqshrnbq_m_n_u16): Likewise.
12357 (__arm_vqshrntq_m_n_s32): Likewise.
12358 (__arm_vqshrntq_m_n_s16): Likewise.
12359 (__arm_vqshrntq_m_n_u32): Likewise.
12360 (__arm_vqshrntq_m_n_u16): Likewise.
12361 (__arm_vqshrunbq_m_n_s32): Likewise.
12362 (__arm_vqshrunbq_m_n_s16): Likewise.
12363 (__arm_vqshruntq_m_n_s32): Likewise.
12364 (__arm_vqshruntq_m_n_s16): Likewise.
12365 (__arm_vrmlaldavhaq_p_s32): Likewise.
12366 (__arm_vrmlaldavhaq_p_u32): Likewise.
12367 (__arm_vrmlaldavhaxq_p_s32): Likewise.
12368 (__arm_vrmlsldavhaq_p_s32): Likewise.
12369 (__arm_vrmlsldavhaxq_p_s32): Likewise.
12370 (__arm_vrshrnbq_m_n_s32): Likewise.
12371 (__arm_vrshrnbq_m_n_s16): Likewise.
12372 (__arm_vrshrnbq_m_n_u32): Likewise.
12373 (__arm_vrshrnbq_m_n_u16): Likewise.
12374 (__arm_vrshrntq_m_n_s32): Likewise.
12375 (__arm_vrshrntq_m_n_s16): Likewise.
12376 (__arm_vrshrntq_m_n_u32): Likewise.
12377 (__arm_vrshrntq_m_n_u16): Likewise.
12378 (__arm_vshllbq_m_n_s8): Likewise.
12379 (__arm_vshllbq_m_n_s16): Likewise.
12380 (__arm_vshllbq_m_n_u8): Likewise.
12381 (__arm_vshllbq_m_n_u16): Likewise.
12382 (__arm_vshlltq_m_n_s8): Likewise.
12383 (__arm_vshlltq_m_n_s16): Likewise.
12384 (__arm_vshlltq_m_n_u8): Likewise.
12385 (__arm_vshlltq_m_n_u16): Likewise.
12386 (__arm_vshrnbq_m_n_s32): Likewise.
12387 (__arm_vshrnbq_m_n_s16): Likewise.
12388 (__arm_vshrnbq_m_n_u32): Likewise.
12389 (__arm_vshrnbq_m_n_u16): Likewise.
12390 (__arm_vshrntq_m_n_s32): Likewise.
12391 (__arm_vshrntq_m_n_s16): Likewise.
12392 (__arm_vshrntq_m_n_u32): Likewise.
12393 (__arm_vshrntq_m_n_u16): Likewise.
12394 (vmullbq_poly_m): Define polymorphic variant.
12395 (vmulltq_poly_m): Likewise.
12396 (vshllbq_m): Likewise.
12397 (vshrntq_m_n): Likewise.
12398 (vshrnbq_m_n): Likewise.
12399 (vshlltq_m_n): Likewise.
12400 (vshllbq_m_n): Likewise.
12401 (vrshrntq_m_n): Likewise.
12402 (vrshrnbq_m_n): Likewise.
12403 (vqshruntq_m_n): Likewise.
12404 (vqshrunbq_m_n): Likewise.
12405 (vqdmullbq_m_n): Likewise.
12406 (vqdmullbq_m): Likewise.
12407 (vqdmulltq_m_n): Likewise.
12408 (vqdmulltq_m): Likewise.
12409 (vqrshrnbq_m_n): Likewise.
12410 (vqrshrntq_m_n): Likewise.
12411 (vqrshrunbq_m_n): Likewise.
12412 (vqrshruntq_m_n): Likewise.
12413 (vqshrnbq_m_n): Likewise.
12414 (vqshrntq_m_n): Likewise.
12415 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
12416 builtin qualifiers.
12417 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12418 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
12419 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
12420 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
12421 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
12422 (VMLALDAVAXQ_P): Likewise.
12423 (VQRSHRNBQ_M_N): Likewise.
12424 (VQRSHRNTQ_M_N): Likewise.
12425 (VQSHRNBQ_M_N): Likewise.
12426 (VQSHRNTQ_M_N): Likewise.
12427 (VRSHRNBQ_M_N): Likewise.
12428 (VRSHRNTQ_M_N): Likewise.
12429 (VSHLLBQ_M_N): Likewise.
12430 (VSHLLTQ_M_N): Likewise.
12431 (VSHRNBQ_M_N): Likewise.
12432 (VSHRNTQ_M_N): Likewise.
12433 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
12434 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
12435 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
12436 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
12437 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
12438 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
12439 (mve_vrmlaldavhaq_p_sv4si): Likewise.
12440 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
12441 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
12442 (mve_vshllbq_m_n_<supf><mode>): Likewise.
12443 (mve_vshlltq_m_n_<supf><mode>): Likewise.
12444 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
12445 (mve_vshrntq_m_n_<supf><mode>): Likewise.
12446 (mve_vmlsldavaq_p_s<mode>): Likewise.
12447 (mve_vmlsldavaxq_p_s<mode>): Likewise.
12448 (mve_vmullbq_poly_m_p<mode>): Likewise.
12449 (mve_vmulltq_poly_m_p<mode>): Likewise.
12450 (mve_vqdmullbq_m_n_s<mode>): Likewise.
12451 (mve_vqdmullbq_m_s<mode>): Likewise.
12452 (mve_vqdmulltq_m_n_s<mode>): Likewise.
12453 (mve_vqdmulltq_m_s<mode>): Likewise.
12454 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
12455 (mve_vqrshruntq_m_n_s<mode>): Likewise.
12456 (mve_vqshrunbq_m_n_s<mode>): Likewise.
12457 (mve_vqshruntq_m_n_s<mode>): Likewise.
12458 (mve_vrmlaldavhaq_p_uv4si): Likewise.
12459 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
12460 (mve_vrmlsldavhaq_p_sv4si): Likewise.
12461 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
12463 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12464 Mihail Ionescu <mihail.ionescu@arm.com>
12465 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12467 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
12468 (vabdq_m_s32): Likewise.
12469 (vabdq_m_s16): Likewise.
12470 (vabdq_m_u8): Likewise.
12471 (vabdq_m_u32): Likewise.
12472 (vabdq_m_u16): Likewise.
12473 (vaddq_m_n_s8): Likewise.
12474 (vaddq_m_n_s32): Likewise.
12475 (vaddq_m_n_s16): Likewise.
12476 (vaddq_m_n_u8): Likewise.
12477 (vaddq_m_n_u32): Likewise.
12478 (vaddq_m_n_u16): Likewise.
12479 (vaddq_m_s8): Likewise.
12480 (vaddq_m_s32): Likewise.
12481 (vaddq_m_s16): Likewise.
12482 (vaddq_m_u8): Likewise.
12483 (vaddq_m_u32): Likewise.
12484 (vaddq_m_u16): Likewise.
12485 (vandq_m_s8): Likewise.
12486 (vandq_m_s32): Likewise.
12487 (vandq_m_s16): Likewise.
12488 (vandq_m_u8): Likewise.
12489 (vandq_m_u32): Likewise.
12490 (vandq_m_u16): Likewise.
12491 (vbicq_m_s8): Likewise.
12492 (vbicq_m_s32): Likewise.
12493 (vbicq_m_s16): Likewise.
12494 (vbicq_m_u8): Likewise.
12495 (vbicq_m_u32): Likewise.
12496 (vbicq_m_u16): Likewise.
12497 (vbrsrq_m_n_s8): Likewise.
12498 (vbrsrq_m_n_s32): Likewise.
12499 (vbrsrq_m_n_s16): Likewise.
12500 (vbrsrq_m_n_u8): Likewise.
12501 (vbrsrq_m_n_u32): Likewise.
12502 (vbrsrq_m_n_u16): Likewise.
12503 (vcaddq_rot270_m_s8): Likewise.
12504 (vcaddq_rot270_m_s32): Likewise.
12505 (vcaddq_rot270_m_s16): Likewise.
12506 (vcaddq_rot270_m_u8): Likewise.
12507 (vcaddq_rot270_m_u32): Likewise.
12508 (vcaddq_rot270_m_u16): Likewise.
12509 (vcaddq_rot90_m_s8): Likewise.
12510 (vcaddq_rot90_m_s32): Likewise.
12511 (vcaddq_rot90_m_s16): Likewise.
12512 (vcaddq_rot90_m_u8): Likewise.
12513 (vcaddq_rot90_m_u32): Likewise.
12514 (vcaddq_rot90_m_u16): Likewise.
12515 (veorq_m_s8): Likewise.
12516 (veorq_m_s32): Likewise.
12517 (veorq_m_s16): Likewise.
12518 (veorq_m_u8): Likewise.
12519 (veorq_m_u32): Likewise.
12520 (veorq_m_u16): Likewise.
12521 (vhaddq_m_n_s8): Likewise.
12522 (vhaddq_m_n_s32): Likewise.
12523 (vhaddq_m_n_s16): Likewise.
12524 (vhaddq_m_n_u8): Likewise.
12525 (vhaddq_m_n_u32): Likewise.
12526 (vhaddq_m_n_u16): Likewise.
12527 (vhaddq_m_s8): Likewise.
12528 (vhaddq_m_s32): Likewise.
12529 (vhaddq_m_s16): Likewise.
12530 (vhaddq_m_u8): Likewise.
12531 (vhaddq_m_u32): Likewise.
12532 (vhaddq_m_u16): Likewise.
12533 (vhcaddq_rot270_m_s8): Likewise.
12534 (vhcaddq_rot270_m_s32): Likewise.
12535 (vhcaddq_rot270_m_s16): Likewise.
12536 (vhcaddq_rot90_m_s8): Likewise.
12537 (vhcaddq_rot90_m_s32): Likewise.
12538 (vhcaddq_rot90_m_s16): Likewise.
12539 (vhsubq_m_n_s8): Likewise.
12540 (vhsubq_m_n_s32): Likewise.
12541 (vhsubq_m_n_s16): Likewise.
12542 (vhsubq_m_n_u8): Likewise.
12543 (vhsubq_m_n_u32): Likewise.
12544 (vhsubq_m_n_u16): Likewise.
12545 (vhsubq_m_s8): Likewise.
12546 (vhsubq_m_s32): Likewise.
12547 (vhsubq_m_s16): Likewise.
12548 (vhsubq_m_u8): Likewise.
12549 (vhsubq_m_u32): Likewise.
12550 (vhsubq_m_u16): Likewise.
12551 (vmaxq_m_s8): Likewise.
12552 (vmaxq_m_s32): Likewise.
12553 (vmaxq_m_s16): Likewise.
12554 (vmaxq_m_u8): Likewise.
12555 (vmaxq_m_u32): Likewise.
12556 (vmaxq_m_u16): Likewise.
12557 (vminq_m_s8): Likewise.
12558 (vminq_m_s32): Likewise.
12559 (vminq_m_s16): Likewise.
12560 (vminq_m_u8): Likewise.
12561 (vminq_m_u32): Likewise.
12562 (vminq_m_u16): Likewise.
12563 (vmladavaq_p_s8): Likewise.
12564 (vmladavaq_p_s32): Likewise.
12565 (vmladavaq_p_s16): Likewise.
12566 (vmladavaq_p_u8): Likewise.
12567 (vmladavaq_p_u32): Likewise.
12568 (vmladavaq_p_u16): Likewise.
12569 (vmladavaxq_p_s8): Likewise.
12570 (vmladavaxq_p_s32): Likewise.
12571 (vmladavaxq_p_s16): Likewise.
12572 (vmlaq_m_n_s8): Likewise.
12573 (vmlaq_m_n_s32): Likewise.
12574 (vmlaq_m_n_s16): Likewise.
12575 (vmlaq_m_n_u8): Likewise.
12576 (vmlaq_m_n_u32): Likewise.
12577 (vmlaq_m_n_u16): Likewise.
12578 (vmlasq_m_n_s8): Likewise.
12579 (vmlasq_m_n_s32): Likewise.
12580 (vmlasq_m_n_s16): Likewise.
12581 (vmlasq_m_n_u8): Likewise.
12582 (vmlasq_m_n_u32): Likewise.
12583 (vmlasq_m_n_u16): Likewise.
12584 (vmlsdavaq_p_s8): Likewise.
12585 (vmlsdavaq_p_s32): Likewise.
12586 (vmlsdavaq_p_s16): Likewise.
12587 (vmlsdavaxq_p_s8): Likewise.
12588 (vmlsdavaxq_p_s32): Likewise.
12589 (vmlsdavaxq_p_s16): Likewise.
12590 (vmulhq_m_s8): Likewise.
12591 (vmulhq_m_s32): Likewise.
12592 (vmulhq_m_s16): Likewise.
12593 (vmulhq_m_u8): Likewise.
12594 (vmulhq_m_u32): Likewise.
12595 (vmulhq_m_u16): Likewise.
12596 (vmullbq_int_m_s8): Likewise.
12597 (vmullbq_int_m_s32): Likewise.
12598 (vmullbq_int_m_s16): Likewise.
12599 (vmullbq_int_m_u8): Likewise.
12600 (vmullbq_int_m_u32): Likewise.
12601 (vmullbq_int_m_u16): Likewise.
12602 (vmulltq_int_m_s8): Likewise.
12603 (vmulltq_int_m_s32): Likewise.
12604 (vmulltq_int_m_s16): Likewise.
12605 (vmulltq_int_m_u8): Likewise.
12606 (vmulltq_int_m_u32): Likewise.
12607 (vmulltq_int_m_u16): Likewise.
12608 (vmulq_m_n_s8): Likewise.
12609 (vmulq_m_n_s32): Likewise.
12610 (vmulq_m_n_s16): Likewise.
12611 (vmulq_m_n_u8): Likewise.
12612 (vmulq_m_n_u32): Likewise.
12613 (vmulq_m_n_u16): Likewise.
12614 (vmulq_m_s8): Likewise.
12615 (vmulq_m_s32): Likewise.
12616 (vmulq_m_s16): Likewise.
12617 (vmulq_m_u8): Likewise.
12618 (vmulq_m_u32): Likewise.
12619 (vmulq_m_u16): Likewise.
12620 (vornq_m_s8): Likewise.
12621 (vornq_m_s32): Likewise.
12622 (vornq_m_s16): Likewise.
12623 (vornq_m_u8): Likewise.
12624 (vornq_m_u32): Likewise.
12625 (vornq_m_u16): Likewise.
12626 (vorrq_m_s8): Likewise.
12627 (vorrq_m_s32): Likewise.
12628 (vorrq_m_s16): Likewise.
12629 (vorrq_m_u8): Likewise.
12630 (vorrq_m_u32): Likewise.
12631 (vorrq_m_u16): Likewise.
12632 (vqaddq_m_n_s8): Likewise.
12633 (vqaddq_m_n_s32): Likewise.
12634 (vqaddq_m_n_s16): Likewise.
12635 (vqaddq_m_n_u8): Likewise.
12636 (vqaddq_m_n_u32): Likewise.
12637 (vqaddq_m_n_u16): Likewise.
12638 (vqaddq_m_s8): Likewise.
12639 (vqaddq_m_s32): Likewise.
12640 (vqaddq_m_s16): Likewise.
12641 (vqaddq_m_u8): Likewise.
12642 (vqaddq_m_u32): Likewise.
12643 (vqaddq_m_u16): Likewise.
12644 (vqdmladhq_m_s8): Likewise.
12645 (vqdmladhq_m_s32): Likewise.
12646 (vqdmladhq_m_s16): Likewise.
12647 (vqdmladhxq_m_s8): Likewise.
12648 (vqdmladhxq_m_s32): Likewise.
12649 (vqdmladhxq_m_s16): Likewise.
12650 (vqdmlahq_m_n_s8): Likewise.
12651 (vqdmlahq_m_n_s32): Likewise.
12652 (vqdmlahq_m_n_s16): Likewise.
12653 (vqdmlahq_m_n_u8): Likewise.
12654 (vqdmlahq_m_n_u32): Likewise.
12655 (vqdmlahq_m_n_u16): Likewise.
12656 (vqdmlsdhq_m_s8): Likewise.
12657 (vqdmlsdhq_m_s32): Likewise.
12658 (vqdmlsdhq_m_s16): Likewise.
12659 (vqdmlsdhxq_m_s8): Likewise.
12660 (vqdmlsdhxq_m_s32): Likewise.
12661 (vqdmlsdhxq_m_s16): Likewise.
12662 (vqdmulhq_m_n_s8): Likewise.
12663 (vqdmulhq_m_n_s32): Likewise.
12664 (vqdmulhq_m_n_s16): Likewise.
12665 (vqdmulhq_m_s8): Likewise.
12666 (vqdmulhq_m_s32): Likewise.
12667 (vqdmulhq_m_s16): Likewise.
12668 (vqrdmladhq_m_s8): Likewise.
12669 (vqrdmladhq_m_s32): Likewise.
12670 (vqrdmladhq_m_s16): Likewise.
12671 (vqrdmladhxq_m_s8): Likewise.
12672 (vqrdmladhxq_m_s32): Likewise.
12673 (vqrdmladhxq_m_s16): Likewise.
12674 (vqrdmlahq_m_n_s8): Likewise.
12675 (vqrdmlahq_m_n_s32): Likewise.
12676 (vqrdmlahq_m_n_s16): Likewise.
12677 (vqrdmlahq_m_n_u8): Likewise.
12678 (vqrdmlahq_m_n_u32): Likewise.
12679 (vqrdmlahq_m_n_u16): Likewise.
12680 (vqrdmlashq_m_n_s8): Likewise.
12681 (vqrdmlashq_m_n_s32): Likewise.
12682 (vqrdmlashq_m_n_s16): Likewise.
12683 (vqrdmlashq_m_n_u8): Likewise.
12684 (vqrdmlashq_m_n_u32): Likewise.
12685 (vqrdmlashq_m_n_u16): Likewise.
12686 (vqrdmlsdhq_m_s8): Likewise.
12687 (vqrdmlsdhq_m_s32): Likewise.
12688 (vqrdmlsdhq_m_s16): Likewise.
12689 (vqrdmlsdhxq_m_s8): Likewise.
12690 (vqrdmlsdhxq_m_s32): Likewise.
12691 (vqrdmlsdhxq_m_s16): Likewise.
12692 (vqrdmulhq_m_n_s8): Likewise.
12693 (vqrdmulhq_m_n_s32): Likewise.
12694 (vqrdmulhq_m_n_s16): Likewise.
12695 (vqrdmulhq_m_s8): Likewise.
12696 (vqrdmulhq_m_s32): Likewise.
12697 (vqrdmulhq_m_s16): Likewise.
12698 (vqrshlq_m_s8): Likewise.
12699 (vqrshlq_m_s32): Likewise.
12700 (vqrshlq_m_s16): Likewise.
12701 (vqrshlq_m_u8): Likewise.
12702 (vqrshlq_m_u32): Likewise.
12703 (vqrshlq_m_u16): Likewise.
12704 (vqshlq_m_n_s8): Likewise.
12705 (vqshlq_m_n_s32): Likewise.
12706 (vqshlq_m_n_s16): Likewise.
12707 (vqshlq_m_n_u8): Likewise.
12708 (vqshlq_m_n_u32): Likewise.
12709 (vqshlq_m_n_u16): Likewise.
12710 (vqshlq_m_s8): Likewise.
12711 (vqshlq_m_s32): Likewise.
12712 (vqshlq_m_s16): Likewise.
12713 (vqshlq_m_u8): Likewise.
12714 (vqshlq_m_u32): Likewise.
12715 (vqshlq_m_u16): Likewise.
12716 (vqsubq_m_n_s8): Likewise.
12717 (vqsubq_m_n_s32): Likewise.
12718 (vqsubq_m_n_s16): Likewise.
12719 (vqsubq_m_n_u8): Likewise.
12720 (vqsubq_m_n_u32): Likewise.
12721 (vqsubq_m_n_u16): Likewise.
12722 (vqsubq_m_s8): Likewise.
12723 (vqsubq_m_s32): Likewise.
12724 (vqsubq_m_s16): Likewise.
12725 (vqsubq_m_u8): Likewise.
12726 (vqsubq_m_u32): Likewise.
12727 (vqsubq_m_u16): Likewise.
12728 (vrhaddq_m_s8): Likewise.
12729 (vrhaddq_m_s32): Likewise.
12730 (vrhaddq_m_s16): Likewise.
12731 (vrhaddq_m_u8): Likewise.
12732 (vrhaddq_m_u32): Likewise.
12733 (vrhaddq_m_u16): Likewise.
12734 (vrmulhq_m_s8): Likewise.
12735 (vrmulhq_m_s32): Likewise.
12736 (vrmulhq_m_s16): Likewise.
12737 (vrmulhq_m_u8): Likewise.
12738 (vrmulhq_m_u32): Likewise.
12739 (vrmulhq_m_u16): Likewise.
12740 (vrshlq_m_s8): Likewise.
12741 (vrshlq_m_s32): Likewise.
12742 (vrshlq_m_s16): Likewise.
12743 (vrshlq_m_u8): Likewise.
12744 (vrshlq_m_u32): Likewise.
12745 (vrshlq_m_u16): Likewise.
12746 (vrshrq_m_n_s8): Likewise.
12747 (vrshrq_m_n_s32): Likewise.
12748 (vrshrq_m_n_s16): Likewise.
12749 (vrshrq_m_n_u8): Likewise.
12750 (vrshrq_m_n_u32): Likewise.
12751 (vrshrq_m_n_u16): Likewise.
12752 (vshlq_m_n_s8): Likewise.
12753 (vshlq_m_n_s32): Likewise.
12754 (vshlq_m_n_s16): Likewise.
12755 (vshlq_m_n_u8): Likewise.
12756 (vshlq_m_n_u32): Likewise.
12757 (vshlq_m_n_u16): Likewise.
12758 (vshrq_m_n_s8): Likewise.
12759 (vshrq_m_n_s32): Likewise.
12760 (vshrq_m_n_s16): Likewise.
12761 (vshrq_m_n_u8): Likewise.
12762 (vshrq_m_n_u32): Likewise.
12763 (vshrq_m_n_u16): Likewise.
12764 (vsliq_m_n_s8): Likewise.
12765 (vsliq_m_n_s32): Likewise.
12766 (vsliq_m_n_s16): Likewise.
12767 (vsliq_m_n_u8): Likewise.
12768 (vsliq_m_n_u32): Likewise.
12769 (vsliq_m_n_u16): Likewise.
12770 (vsubq_m_n_s8): Likewise.
12771 (vsubq_m_n_s32): Likewise.
12772 (vsubq_m_n_s16): Likewise.
12773 (vsubq_m_n_u8): Likewise.
12774 (vsubq_m_n_u32): Likewise.
12775 (vsubq_m_n_u16): Likewise.
12776 (__arm_vabdq_m_s8): Define intrinsic.
12777 (__arm_vabdq_m_s32): Likewise.
12778 (__arm_vabdq_m_s16): Likewise.
12779 (__arm_vabdq_m_u8): Likewise.
12780 (__arm_vabdq_m_u32): Likewise.
12781 (__arm_vabdq_m_u16): Likewise.
12782 (__arm_vaddq_m_n_s8): Likewise.
12783 (__arm_vaddq_m_n_s32): Likewise.
12784 (__arm_vaddq_m_n_s16): Likewise.
12785 (__arm_vaddq_m_n_u8): Likewise.
12786 (__arm_vaddq_m_n_u32): Likewise.
12787 (__arm_vaddq_m_n_u16): Likewise.
12788 (__arm_vaddq_m_s8): Likewise.
12789 (__arm_vaddq_m_s32): Likewise.
12790 (__arm_vaddq_m_s16): Likewise.
12791 (__arm_vaddq_m_u8): Likewise.
12792 (__arm_vaddq_m_u32): Likewise.
12793 (__arm_vaddq_m_u16): Likewise.
12794 (__arm_vandq_m_s8): Likewise.
12795 (__arm_vandq_m_s32): Likewise.
12796 (__arm_vandq_m_s16): Likewise.
12797 (__arm_vandq_m_u8): Likewise.
12798 (__arm_vandq_m_u32): Likewise.
12799 (__arm_vandq_m_u16): Likewise.
12800 (__arm_vbicq_m_s8): Likewise.
12801 (__arm_vbicq_m_s32): Likewise.
12802 (__arm_vbicq_m_s16): Likewise.
12803 (__arm_vbicq_m_u8): Likewise.
12804 (__arm_vbicq_m_u32): Likewise.
12805 (__arm_vbicq_m_u16): Likewise.
12806 (__arm_vbrsrq_m_n_s8): Likewise.
12807 (__arm_vbrsrq_m_n_s32): Likewise.
12808 (__arm_vbrsrq_m_n_s16): Likewise.
12809 (__arm_vbrsrq_m_n_u8): Likewise.
12810 (__arm_vbrsrq_m_n_u32): Likewise.
12811 (__arm_vbrsrq_m_n_u16): Likewise.
12812 (__arm_vcaddq_rot270_m_s8): Likewise.
12813 (__arm_vcaddq_rot270_m_s32): Likewise.
12814 (__arm_vcaddq_rot270_m_s16): Likewise.
12815 (__arm_vcaddq_rot270_m_u8): Likewise.
12816 (__arm_vcaddq_rot270_m_u32): Likewise.
12817 (__arm_vcaddq_rot270_m_u16): Likewise.
12818 (__arm_vcaddq_rot90_m_s8): Likewise.
12819 (__arm_vcaddq_rot90_m_s32): Likewise.
12820 (__arm_vcaddq_rot90_m_s16): Likewise.
12821 (__arm_vcaddq_rot90_m_u8): Likewise.
12822 (__arm_vcaddq_rot90_m_u32): Likewise.
12823 (__arm_vcaddq_rot90_m_u16): Likewise.
12824 (__arm_veorq_m_s8): Likewise.
12825 (__arm_veorq_m_s32): Likewise.
12826 (__arm_veorq_m_s16): Likewise.
12827 (__arm_veorq_m_u8): Likewise.
12828 (__arm_veorq_m_u32): Likewise.
12829 (__arm_veorq_m_u16): Likewise.
12830 (__arm_vhaddq_m_n_s8): Likewise.
12831 (__arm_vhaddq_m_n_s32): Likewise.
12832 (__arm_vhaddq_m_n_s16): Likewise.
12833 (__arm_vhaddq_m_n_u8): Likewise.
12834 (__arm_vhaddq_m_n_u32): Likewise.
12835 (__arm_vhaddq_m_n_u16): Likewise.
12836 (__arm_vhaddq_m_s8): Likewise.
12837 (__arm_vhaddq_m_s32): Likewise.
12838 (__arm_vhaddq_m_s16): Likewise.
12839 (__arm_vhaddq_m_u8): Likewise.
12840 (__arm_vhaddq_m_u32): Likewise.
12841 (__arm_vhaddq_m_u16): Likewise.
12842 (__arm_vhcaddq_rot270_m_s8): Likewise.
12843 (__arm_vhcaddq_rot270_m_s32): Likewise.
12844 (__arm_vhcaddq_rot270_m_s16): Likewise.
12845 (__arm_vhcaddq_rot90_m_s8): Likewise.
12846 (__arm_vhcaddq_rot90_m_s32): Likewise.
12847 (__arm_vhcaddq_rot90_m_s16): Likewise.
12848 (__arm_vhsubq_m_n_s8): Likewise.
12849 (__arm_vhsubq_m_n_s32): Likewise.
12850 (__arm_vhsubq_m_n_s16): Likewise.
12851 (__arm_vhsubq_m_n_u8): Likewise.
12852 (__arm_vhsubq_m_n_u32): Likewise.
12853 (__arm_vhsubq_m_n_u16): Likewise.
12854 (__arm_vhsubq_m_s8): Likewise.
12855 (__arm_vhsubq_m_s32): Likewise.
12856 (__arm_vhsubq_m_s16): Likewise.
12857 (__arm_vhsubq_m_u8): Likewise.
12858 (__arm_vhsubq_m_u32): Likewise.
12859 (__arm_vhsubq_m_u16): Likewise.
12860 (__arm_vmaxq_m_s8): Likewise.
12861 (__arm_vmaxq_m_s32): Likewise.
12862 (__arm_vmaxq_m_s16): Likewise.
12863 (__arm_vmaxq_m_u8): Likewise.
12864 (__arm_vmaxq_m_u32): Likewise.
12865 (__arm_vmaxq_m_u16): Likewise.
12866 (__arm_vminq_m_s8): Likewise.
12867 (__arm_vminq_m_s32): Likewise.
12868 (__arm_vminq_m_s16): Likewise.
12869 (__arm_vminq_m_u8): Likewise.
12870 (__arm_vminq_m_u32): Likewise.
12871 (__arm_vminq_m_u16): Likewise.
12872 (__arm_vmladavaq_p_s8): Likewise.
12873 (__arm_vmladavaq_p_s32): Likewise.
12874 (__arm_vmladavaq_p_s16): Likewise.
12875 (__arm_vmladavaq_p_u8): Likewise.
12876 (__arm_vmladavaq_p_u32): Likewise.
12877 (__arm_vmladavaq_p_u16): Likewise.
12878 (__arm_vmladavaxq_p_s8): Likewise.
12879 (__arm_vmladavaxq_p_s32): Likewise.
12880 (__arm_vmladavaxq_p_s16): Likewise.
12881 (__arm_vmlaq_m_n_s8): Likewise.
12882 (__arm_vmlaq_m_n_s32): Likewise.
12883 (__arm_vmlaq_m_n_s16): Likewise.
12884 (__arm_vmlaq_m_n_u8): Likewise.
12885 (__arm_vmlaq_m_n_u32): Likewise.
12886 (__arm_vmlaq_m_n_u16): Likewise.
12887 (__arm_vmlasq_m_n_s8): Likewise.
12888 (__arm_vmlasq_m_n_s32): Likewise.
12889 (__arm_vmlasq_m_n_s16): Likewise.
12890 (__arm_vmlasq_m_n_u8): Likewise.
12891 (__arm_vmlasq_m_n_u32): Likewise.
12892 (__arm_vmlasq_m_n_u16): Likewise.
12893 (__arm_vmlsdavaq_p_s8): Likewise.
12894 (__arm_vmlsdavaq_p_s32): Likewise.
12895 (__arm_vmlsdavaq_p_s16): Likewise.
12896 (__arm_vmlsdavaxq_p_s8): Likewise.
12897 (__arm_vmlsdavaxq_p_s32): Likewise.
12898 (__arm_vmlsdavaxq_p_s16): Likewise.
12899 (__arm_vmulhq_m_s8): Likewise.
12900 (__arm_vmulhq_m_s32): Likewise.
12901 (__arm_vmulhq_m_s16): Likewise.
12902 (__arm_vmulhq_m_u8): Likewise.
12903 (__arm_vmulhq_m_u32): Likewise.
12904 (__arm_vmulhq_m_u16): Likewise.
12905 (__arm_vmullbq_int_m_s8): Likewise.
12906 (__arm_vmullbq_int_m_s32): Likewise.
12907 (__arm_vmullbq_int_m_s16): Likewise.
12908 (__arm_vmullbq_int_m_u8): Likewise.
12909 (__arm_vmullbq_int_m_u32): Likewise.
12910 (__arm_vmullbq_int_m_u16): Likewise.
12911 (__arm_vmulltq_int_m_s8): Likewise.
12912 (__arm_vmulltq_int_m_s32): Likewise.
12913 (__arm_vmulltq_int_m_s16): Likewise.
12914 (__arm_vmulltq_int_m_u8): Likewise.
12915 (__arm_vmulltq_int_m_u32): Likewise.
12916 (__arm_vmulltq_int_m_u16): Likewise.
12917 (__arm_vmulq_m_n_s8): Likewise.
12918 (__arm_vmulq_m_n_s32): Likewise.
12919 (__arm_vmulq_m_n_s16): Likewise.
12920 (__arm_vmulq_m_n_u8): Likewise.
12921 (__arm_vmulq_m_n_u32): Likewise.
12922 (__arm_vmulq_m_n_u16): Likewise.
12923 (__arm_vmulq_m_s8): Likewise.
12924 (__arm_vmulq_m_s32): Likewise.
12925 (__arm_vmulq_m_s16): Likewise.
12926 (__arm_vmulq_m_u8): Likewise.
12927 (__arm_vmulq_m_u32): Likewise.
12928 (__arm_vmulq_m_u16): Likewise.
12929 (__arm_vornq_m_s8): Likewise.
12930 (__arm_vornq_m_s32): Likewise.
12931 (__arm_vornq_m_s16): Likewise.
12932 (__arm_vornq_m_u8): Likewise.
12933 (__arm_vornq_m_u32): Likewise.
12934 (__arm_vornq_m_u16): Likewise.
12935 (__arm_vorrq_m_s8): Likewise.
12936 (__arm_vorrq_m_s32): Likewise.
12937 (__arm_vorrq_m_s16): Likewise.
12938 (__arm_vorrq_m_u8): Likewise.
12939 (__arm_vorrq_m_u32): Likewise.
12940 (__arm_vorrq_m_u16): Likewise.
12941 (__arm_vqaddq_m_n_s8): Likewise.
12942 (__arm_vqaddq_m_n_s32): Likewise.
12943 (__arm_vqaddq_m_n_s16): Likewise.
12944 (__arm_vqaddq_m_n_u8): Likewise.
12945 (__arm_vqaddq_m_n_u32): Likewise.
12946 (__arm_vqaddq_m_n_u16): Likewise.
12947 (__arm_vqaddq_m_s8): Likewise.
12948 (__arm_vqaddq_m_s32): Likewise.
12949 (__arm_vqaddq_m_s16): Likewise.
12950 (__arm_vqaddq_m_u8): Likewise.
12951 (__arm_vqaddq_m_u32): Likewise.
12952 (__arm_vqaddq_m_u16): Likewise.
12953 (__arm_vqdmladhq_m_s8): Likewise.
12954 (__arm_vqdmladhq_m_s32): Likewise.
12955 (__arm_vqdmladhq_m_s16): Likewise.
12956 (__arm_vqdmladhxq_m_s8): Likewise.
12957 (__arm_vqdmladhxq_m_s32): Likewise.
12958 (__arm_vqdmladhxq_m_s16): Likewise.
12959 (__arm_vqdmlahq_m_n_s8): Likewise.
12960 (__arm_vqdmlahq_m_n_s32): Likewise.
12961 (__arm_vqdmlahq_m_n_s16): Likewise.
12962 (__arm_vqdmlahq_m_n_u8): Likewise.
12963 (__arm_vqdmlahq_m_n_u32): Likewise.
12964 (__arm_vqdmlahq_m_n_u16): Likewise.
12965 (__arm_vqdmlsdhq_m_s8): Likewise.
12966 (__arm_vqdmlsdhq_m_s32): Likewise.
12967 (__arm_vqdmlsdhq_m_s16): Likewise.
12968 (__arm_vqdmlsdhxq_m_s8): Likewise.
12969 (__arm_vqdmlsdhxq_m_s32): Likewise.
12970 (__arm_vqdmlsdhxq_m_s16): Likewise.
12971 (__arm_vqdmulhq_m_n_s8): Likewise.
12972 (__arm_vqdmulhq_m_n_s32): Likewise.
12973 (__arm_vqdmulhq_m_n_s16): Likewise.
12974 (__arm_vqdmulhq_m_s8): Likewise.
12975 (__arm_vqdmulhq_m_s32): Likewise.
12976 (__arm_vqdmulhq_m_s16): Likewise.
12977 (__arm_vqrdmladhq_m_s8): Likewise.
12978 (__arm_vqrdmladhq_m_s32): Likewise.
12979 (__arm_vqrdmladhq_m_s16): Likewise.
12980 (__arm_vqrdmladhxq_m_s8): Likewise.
12981 (__arm_vqrdmladhxq_m_s32): Likewise.
12982 (__arm_vqrdmladhxq_m_s16): Likewise.
12983 (__arm_vqrdmlahq_m_n_s8): Likewise.
12984 (__arm_vqrdmlahq_m_n_s32): Likewise.
12985 (__arm_vqrdmlahq_m_n_s16): Likewise.
12986 (__arm_vqrdmlahq_m_n_u8): Likewise.
12987 (__arm_vqrdmlahq_m_n_u32): Likewise.
12988 (__arm_vqrdmlahq_m_n_u16): Likewise.
12989 (__arm_vqrdmlashq_m_n_s8): Likewise.
12990 (__arm_vqrdmlashq_m_n_s32): Likewise.
12991 (__arm_vqrdmlashq_m_n_s16): Likewise.
12992 (__arm_vqrdmlashq_m_n_u8): Likewise.
12993 (__arm_vqrdmlashq_m_n_u32): Likewise.
12994 (__arm_vqrdmlashq_m_n_u16): Likewise.
12995 (__arm_vqrdmlsdhq_m_s8): Likewise.
12996 (__arm_vqrdmlsdhq_m_s32): Likewise.
12997 (__arm_vqrdmlsdhq_m_s16): Likewise.
12998 (__arm_vqrdmlsdhxq_m_s8): Likewise.
12999 (__arm_vqrdmlsdhxq_m_s32): Likewise.
13000 (__arm_vqrdmlsdhxq_m_s16): Likewise.
13001 (__arm_vqrdmulhq_m_n_s8): Likewise.
13002 (__arm_vqrdmulhq_m_n_s32): Likewise.
13003 (__arm_vqrdmulhq_m_n_s16): Likewise.
13004 (__arm_vqrdmulhq_m_s8): Likewise.
13005 (__arm_vqrdmulhq_m_s32): Likewise.
13006 (__arm_vqrdmulhq_m_s16): Likewise.
13007 (__arm_vqrshlq_m_s8): Likewise.
13008 (__arm_vqrshlq_m_s32): Likewise.
13009 (__arm_vqrshlq_m_s16): Likewise.
13010 (__arm_vqrshlq_m_u8): Likewise.
13011 (__arm_vqrshlq_m_u32): Likewise.
13012 (__arm_vqrshlq_m_u16): Likewise.
13013 (__arm_vqshlq_m_n_s8): Likewise.
13014 (__arm_vqshlq_m_n_s32): Likewise.
13015 (__arm_vqshlq_m_n_s16): Likewise.
13016 (__arm_vqshlq_m_n_u8): Likewise.
13017 (__arm_vqshlq_m_n_u32): Likewise.
13018 (__arm_vqshlq_m_n_u16): Likewise.
13019 (__arm_vqshlq_m_s8): Likewise.
13020 (__arm_vqshlq_m_s32): Likewise.
13021 (__arm_vqshlq_m_s16): Likewise.
13022 (__arm_vqshlq_m_u8): Likewise.
13023 (__arm_vqshlq_m_u32): Likewise.
13024 (__arm_vqshlq_m_u16): Likewise.
13025 (__arm_vqsubq_m_n_s8): Likewise.
13026 (__arm_vqsubq_m_n_s32): Likewise.
13027 (__arm_vqsubq_m_n_s16): Likewise.
13028 (__arm_vqsubq_m_n_u8): Likewise.
13029 (__arm_vqsubq_m_n_u32): Likewise.
13030 (__arm_vqsubq_m_n_u16): Likewise.
13031 (__arm_vqsubq_m_s8): Likewise.
13032 (__arm_vqsubq_m_s32): Likewise.
13033 (__arm_vqsubq_m_s16): Likewise.
13034 (__arm_vqsubq_m_u8): Likewise.
13035 (__arm_vqsubq_m_u32): Likewise.
13036 (__arm_vqsubq_m_u16): Likewise.
13037 (__arm_vrhaddq_m_s8): Likewise.
13038 (__arm_vrhaddq_m_s32): Likewise.
13039 (__arm_vrhaddq_m_s16): Likewise.
13040 (__arm_vrhaddq_m_u8): Likewise.
13041 (__arm_vrhaddq_m_u32): Likewise.
13042 (__arm_vrhaddq_m_u16): Likewise.
13043 (__arm_vrmulhq_m_s8): Likewise.
13044 (__arm_vrmulhq_m_s32): Likewise.
13045 (__arm_vrmulhq_m_s16): Likewise.
13046 (__arm_vrmulhq_m_u8): Likewise.
13047 (__arm_vrmulhq_m_u32): Likewise.
13048 (__arm_vrmulhq_m_u16): Likewise.
13049 (__arm_vrshlq_m_s8): Likewise.
13050 (__arm_vrshlq_m_s32): Likewise.
13051 (__arm_vrshlq_m_s16): Likewise.
13052 (__arm_vrshlq_m_u8): Likewise.
13053 (__arm_vrshlq_m_u32): Likewise.
13054 (__arm_vrshlq_m_u16): Likewise.
13055 (__arm_vrshrq_m_n_s8): Likewise.
13056 (__arm_vrshrq_m_n_s32): Likewise.
13057 (__arm_vrshrq_m_n_s16): Likewise.
13058 (__arm_vrshrq_m_n_u8): Likewise.
13059 (__arm_vrshrq_m_n_u32): Likewise.
13060 (__arm_vrshrq_m_n_u16): Likewise.
13061 (__arm_vshlq_m_n_s8): Likewise.
13062 (__arm_vshlq_m_n_s32): Likewise.
13063 (__arm_vshlq_m_n_s16): Likewise.
13064 (__arm_vshlq_m_n_u8): Likewise.
13065 (__arm_vshlq_m_n_u32): Likewise.
13066 (__arm_vshlq_m_n_u16): Likewise.
13067 (__arm_vshrq_m_n_s8): Likewise.
13068 (__arm_vshrq_m_n_s32): Likewise.
13069 (__arm_vshrq_m_n_s16): Likewise.
13070 (__arm_vshrq_m_n_u8): Likewise.
13071 (__arm_vshrq_m_n_u32): Likewise.
13072 (__arm_vshrq_m_n_u16): Likewise.
13073 (__arm_vsliq_m_n_s8): Likewise.
13074 (__arm_vsliq_m_n_s32): Likewise.
13075 (__arm_vsliq_m_n_s16): Likewise.
13076 (__arm_vsliq_m_n_u8): Likewise.
13077 (__arm_vsliq_m_n_u32): Likewise.
13078 (__arm_vsliq_m_n_u16): Likewise.
13079 (__arm_vsubq_m_n_s8): Likewise.
13080 (__arm_vsubq_m_n_s32): Likewise.
13081 (__arm_vsubq_m_n_s16): Likewise.
13082 (__arm_vsubq_m_n_u8): Likewise.
13083 (__arm_vsubq_m_n_u32): Likewise.
13084 (__arm_vsubq_m_n_u16): Likewise.
13085 (vqdmladhq_m): Define polymorphic variant.
13086 (vqdmladhxq_m): Likewise.
13087 (vqdmlsdhq_m): Likewise.
13088 (vqdmlsdhxq_m): Likewise.
13089 (vabdq_m): Likewise.
13090 (vandq_m): Likewise.
13091 (vbicq_m): Likewise.
13092 (vbrsrq_m_n): Likewise.
13093 (vcaddq_rot270_m): Likewise.
13094 (vcaddq_rot90_m): Likewise.
13095 (veorq_m): Likewise.
13096 (vmaxq_m): Likewise.
13097 (vminq_m): Likewise.
13098 (vmladavaq_p): Likewise.
13099 (vmlaq_m_n): Likewise.
13100 (vmlasq_m_n): Likewise.
13101 (vmulhq_m): Likewise.
13102 (vmullbq_int_m): Likewise.
13103 (vmulltq_int_m): Likewise.
13104 (vornq_m): Likewise.
13105 (vorrq_m): Likewise.
13106 (vqdmlahq_m_n): Likewise.
13107 (vqrdmlahq_m_n): Likewise.
13108 (vqrdmlashq_m_n): Likewise.
13109 (vqrshlq_m): Likewise.
13110 (vqshlq_m_n): Likewise.
13111 (vqshlq_m): Likewise.
13112 (vrhaddq_m): Likewise.
13113 (vrmulhq_m): Likewise.
13114 (vrshlq_m): Likewise.
13115 (vrshrq_m_n): Likewise.
13116 (vshlq_m_n): Likewise.
13117 (vshrq_m_n): Likewise.
13118 (vsliq_m): Likewise.
13119 (vaddq_m_n): Likewise.
13120 (vaddq_m): Likewise.
13121 (vhaddq_m_n): Likewise.
13122 (vhaddq_m): Likewise.
13123 (vhcaddq_rot270_m): Likewise.
13124 (vhcaddq_rot90_m): Likewise.
13125 (vhsubq_m): Likewise.
13126 (vhsubq_m_n): Likewise.
13127 (vmulq_m_n): Likewise.
13128 (vmulq_m): Likewise.
13129 (vqaddq_m_n): Likewise.
13130 (vqaddq_m): Likewise.
13131 (vqdmulhq_m_n): Likewise.
13132 (vqdmulhq_m): Likewise.
13133 (vsubq_m_n): Likewise.
13134 (vsliq_m_n): Likewise.
13135 (vqsubq_m_n): Likewise.
13136 (vqsubq_m): Likewise.
13137 (vqrdmulhq_m): Likewise.
13138 (vqrdmulhq_m_n): Likewise.
13139 (vqrdmlsdhxq_m): Likewise.
13140 (vqrdmlsdhq_m): Likewise.
13141 (vqrdmladhq_m): Likewise.
13142 (vqrdmladhxq_m): Likewise.
13143 (vmlsdavaxq_p): Likewise.
13144 (vmlsdavaq_p): Likewise.
13145 (vmladavaxq_p): Likewise.
13146 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
13148 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13149 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
13150 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
13151 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13152 * config/arm/mve.md (VHSUBQ_M): Define iterators.
13153 (VSLIQ_M_N): Likewise.
13154 (VQRDMLAHQ_M_N): Likewise.
13155 (VRSHLQ_M): Likewise.
13156 (VMINQ_M): Likewise.
13157 (VMULLBQ_INT_M): Likewise.
13158 (VMULHQ_M): Likewise.
13159 (VMULQ_M): Likewise.
13160 (VHSUBQ_M_N): Likewise.
13161 (VHADDQ_M_N): Likewise.
13162 (VORRQ_M): Likewise.
13163 (VRMULHQ_M): Likewise.
13164 (VQADDQ_M): Likewise.
13165 (VRSHRQ_M_N): Likewise.
13166 (VQSUBQ_M_N): Likewise.
13167 (VADDQ_M): Likewise.
13168 (VORNQ_M): Likewise.
13169 (VQDMLAHQ_M_N): Likewise.
13170 (VRHADDQ_M): Likewise.
13171 (VQSHLQ_M): Likewise.
13172 (VANDQ_M): Likewise.
13173 (VBICQ_M): Likewise.
13174 (VSHLQ_M_N): Likewise.
13175 (VCADDQ_ROT270_M): Likewise.
13176 (VQRSHLQ_M): Likewise.
13177 (VQADDQ_M_N): Likewise.
13178 (VADDQ_M_N): Likewise.
13179 (VMAXQ_M): Likewise.
13180 (VQSUBQ_M): Likewise.
13181 (VMLASQ_M_N): Likewise.
13182 (VMLADAVAQ_P): Likewise.
13183 (VBRSRQ_M_N): Likewise.
13184 (VMULQ_M_N): Likewise.
13185 (VCADDQ_ROT90_M): Likewise.
13186 (VMULLTQ_INT_M): Likewise.
13187 (VEORQ_M): Likewise.
13188 (VSHRQ_M_N): Likewise.
13189 (VSUBQ_M_N): Likewise.
13190 (VHADDQ_M): Likewise.
13191 (VABDQ_M): Likewise.
13192 (VQRDMLASHQ_M_N): Likewise.
13193 (VMLAQ_M_N): Likewise.
13194 (VQSHLQ_M_N): Likewise.
13195 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
13196 (mve_vaddq_m_n_<supf><mode>): Likewise.
13197 (mve_vaddq_m_<supf><mode>): Likewise.
13198 (mve_vandq_m_<supf><mode>): Likewise.
13199 (mve_vbicq_m_<supf><mode>): Likewise.
13200 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
13201 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
13202 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
13203 (mve_veorq_m_<supf><mode>): Likewise.
13204 (mve_vhaddq_m_n_<supf><mode>): Likewise.
13205 (mve_vhaddq_m_<supf><mode>): Likewise.
13206 (mve_vhsubq_m_n_<supf><mode>): Likewise.
13207 (mve_vhsubq_m_<supf><mode>): Likewise.
13208 (mve_vmaxq_m_<supf><mode>): Likewise.
13209 (mve_vminq_m_<supf><mode>): Likewise.
13210 (mve_vmladavaq_p_<supf><mode>): Likewise.
13211 (mve_vmlaq_m_n_<supf><mode>): Likewise.
13212 (mve_vmlasq_m_n_<supf><mode>): Likewise.
13213 (mve_vmulhq_m_<supf><mode>): Likewise.
13214 (mve_vmullbq_int_m_<supf><mode>): Likewise.
13215 (mve_vmulltq_int_m_<supf><mode>): Likewise.
13216 (mve_vmulq_m_n_<supf><mode>): Likewise.
13217 (mve_vmulq_m_<supf><mode>): Likewise.
13218 (mve_vornq_m_<supf><mode>): Likewise.
13219 (mve_vorrq_m_<supf><mode>): Likewise.
13220 (mve_vqaddq_m_n_<supf><mode>): Likewise.
13221 (mve_vqaddq_m_<supf><mode>): Likewise.
13222 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
13223 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
13224 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
13225 (mve_vqrshlq_m_<supf><mode>): Likewise.
13226 (mve_vqshlq_m_n_<supf><mode>): Likewise.
13227 (mve_vqshlq_m_<supf><mode>): Likewise.
13228 (mve_vqsubq_m_n_<supf><mode>): Likewise.
13229 (mve_vqsubq_m_<supf><mode>): Likewise.
13230 (mve_vrhaddq_m_<supf><mode>): Likewise.
13231 (mve_vrmulhq_m_<supf><mode>): Likewise.
13232 (mve_vrshlq_m_<supf><mode>): Likewise.
13233 (mve_vrshrq_m_n_<supf><mode>): Likewise.
13234 (mve_vshlq_m_n_<supf><mode>): Likewise.
13235 (mve_vshrq_m_n_<supf><mode>): Likewise.
13236 (mve_vsliq_m_n_<supf><mode>): Likewise.
13237 (mve_vsubq_m_n_<supf><mode>): Likewise.
13238 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
13239 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
13240 (mve_vmladavaxq_p_s<mode>): Likewise.
13241 (mve_vmlsdavaq_p_s<mode>): Likewise.
13242 (mve_vmlsdavaxq_p_s<mode>): Likewise.
13243 (mve_vqdmladhq_m_s<mode>): Likewise.
13244 (mve_vqdmladhxq_m_s<mode>): Likewise.
13245 (mve_vqdmlsdhq_m_s<mode>): Likewise.
13246 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
13247 (mve_vqdmulhq_m_n_s<mode>): Likewise.
13248 (mve_vqdmulhq_m_s<mode>): Likewise.
13249 (mve_vqrdmladhq_m_s<mode>): Likewise.
13250 (mve_vqrdmladhxq_m_s<mode>): Likewise.
13251 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
13252 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
13253 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
13254 (mve_vqrdmulhq_m_s<mode>): Likewise.
13256 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13257 Mihail Ionescu <mihail.ionescu@arm.com>
13258 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13260 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
13261 Define builtin qualifier.
13262 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13263 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13264 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13265 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13266 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13267 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13268 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13269 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
13270 (vsubq_m_s8): Likewise.
13271 (vcvtq_m_n_f16_u16): Likewise.
13272 (vqshluq_m_n_s8): Likewise.
13273 (vabavq_p_s8): Likewise.
13274 (vsriq_m_n_u8): Likewise.
13275 (vshlq_m_u8): Likewise.
13276 (vsubq_m_u8): Likewise.
13277 (vabavq_p_u8): Likewise.
13278 (vshlq_m_s8): Likewise.
13279 (vcvtq_m_n_f16_s16): Likewise.
13280 (vsriq_m_n_s16): Likewise.
13281 (vsubq_m_s16): Likewise.
13282 (vcvtq_m_n_f32_u32): Likewise.
13283 (vqshluq_m_n_s16): Likewise.
13284 (vabavq_p_s16): Likewise.
13285 (vsriq_m_n_u16): Likewise.
13286 (vshlq_m_u16): Likewise.
13287 (vsubq_m_u16): Likewise.
13288 (vabavq_p_u16): Likewise.
13289 (vshlq_m_s16): Likewise.
13290 (vcvtq_m_n_f32_s32): Likewise.
13291 (vsriq_m_n_s32): Likewise.
13292 (vsubq_m_s32): Likewise.
13293 (vqshluq_m_n_s32): Likewise.
13294 (vabavq_p_s32): Likewise.
13295 (vsriq_m_n_u32): Likewise.
13296 (vshlq_m_u32): Likewise.
13297 (vsubq_m_u32): Likewise.
13298 (vabavq_p_u32): Likewise.
13299 (vshlq_m_s32): Likewise.
13300 (__arm_vsriq_m_n_s8): Define intrinsic.
13301 (__arm_vsubq_m_s8): Likewise.
13302 (__arm_vqshluq_m_n_s8): Likewise.
13303 (__arm_vabavq_p_s8): Likewise.
13304 (__arm_vsriq_m_n_u8): Likewise.
13305 (__arm_vshlq_m_u8): Likewise.
13306 (__arm_vsubq_m_u8): Likewise.
13307 (__arm_vabavq_p_u8): Likewise.
13308 (__arm_vshlq_m_s8): Likewise.
13309 (__arm_vsriq_m_n_s16): Likewise.
13310 (__arm_vsubq_m_s16): Likewise.
13311 (__arm_vqshluq_m_n_s16): Likewise.
13312 (__arm_vabavq_p_s16): Likewise.
13313 (__arm_vsriq_m_n_u16): Likewise.
13314 (__arm_vshlq_m_u16): Likewise.
13315 (__arm_vsubq_m_u16): Likewise.
13316 (__arm_vabavq_p_u16): Likewise.
13317 (__arm_vshlq_m_s16): Likewise.
13318 (__arm_vsriq_m_n_s32): Likewise.
13319 (__arm_vsubq_m_s32): Likewise.
13320 (__arm_vqshluq_m_n_s32): Likewise.
13321 (__arm_vabavq_p_s32): Likewise.
13322 (__arm_vsriq_m_n_u32): Likewise.
13323 (__arm_vshlq_m_u32): Likewise.
13324 (__arm_vsubq_m_u32): Likewise.
13325 (__arm_vabavq_p_u32): Likewise.
13326 (__arm_vshlq_m_s32): Likewise.
13327 (__arm_vcvtq_m_n_f16_u16): Likewise.
13328 (__arm_vcvtq_m_n_f16_s16): Likewise.
13329 (__arm_vcvtq_m_n_f32_u32): Likewise.
13330 (__arm_vcvtq_m_n_f32_s32): Likewise.
13331 (vcvtq_m_n): Define polymorphic variant.
13332 (vqshluq_m_n): Likewise.
13333 (vshlq_m): Likewise.
13334 (vsriq_m_n): Likewise.
13335 (vsubq_m): Likewise.
13336 (vabavq_p): Likewise.
13337 * config/arm/arm_mve_builtins.def
13338 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
13339 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13340 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13341 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13342 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13343 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13344 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13345 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13346 * config/arm/mve.md (VABAVQ_P): Define iterator.
13347 (VSHLQ_M): Likewise.
13348 (VSRIQ_M_N): Likewise.
13349 (VSUBQ_M): Likewise.
13350 (VCVTQ_M_N_TO_F): Likewise.
13351 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
13352 (mve_vqshluq_m_n_s<mode>): Likewise.
13353 (mve_vshlq_m_<supf><mode>): Likewise.
13354 (mve_vsriq_m_n_<supf><mode>): Likewise.
13355 (mve_vsubq_m_<supf><mode>): Likewise.
13356 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
13358 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13359 Mihail Ionescu <mihail.ionescu@arm.com>
13360 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13362 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
13363 (vrmlsldavhaq_s32): Likewise.
13364 (vrmlsldavhaxq_s32): Likewise.
13365 (vaddlvaq_p_s32): Likewise.
13366 (vcvtbq_m_f16_f32): Likewise.
13367 (vcvtbq_m_f32_f16): Likewise.
13368 (vcvttq_m_f16_f32): Likewise.
13369 (vcvttq_m_f32_f16): Likewise.
13370 (vrev16q_m_s8): Likewise.
13371 (vrev32q_m_f16): Likewise.
13372 (vrmlaldavhq_p_s32): Likewise.
13373 (vrmlaldavhxq_p_s32): Likewise.
13374 (vrmlsldavhq_p_s32): Likewise.
13375 (vrmlsldavhxq_p_s32): Likewise.
13376 (vaddlvaq_p_u32): Likewise.
13377 (vrev16q_m_u8): Likewise.
13378 (vrmlaldavhq_p_u32): Likewise.
13379 (vmvnq_m_n_s16): Likewise.
13380 (vorrq_m_n_s16): Likewise.
13381 (vqrshrntq_n_s16): Likewise.
13382 (vqshrnbq_n_s16): Likewise.
13383 (vqshrntq_n_s16): Likewise.
13384 (vrshrnbq_n_s16): Likewise.
13385 (vrshrntq_n_s16): Likewise.
13386 (vshrnbq_n_s16): Likewise.
13387 (vshrntq_n_s16): Likewise.
13388 (vcmlaq_f16): Likewise.
13389 (vcmlaq_rot180_f16): Likewise.
13390 (vcmlaq_rot270_f16): Likewise.
13391 (vcmlaq_rot90_f16): Likewise.
13392 (vfmaq_f16): Likewise.
13393 (vfmaq_n_f16): Likewise.
13394 (vfmasq_n_f16): Likewise.
13395 (vfmsq_f16): Likewise.
13396 (vmlaldavaq_s16): Likewise.
13397 (vmlaldavaxq_s16): Likewise.
13398 (vmlsldavaq_s16): Likewise.
13399 (vmlsldavaxq_s16): Likewise.
13400 (vabsq_m_f16): Likewise.
13401 (vcvtmq_m_s16_f16): Likewise.
13402 (vcvtnq_m_s16_f16): Likewise.
13403 (vcvtpq_m_s16_f16): Likewise.
13404 (vcvtq_m_s16_f16): Likewise.
13405 (vdupq_m_n_f16): Likewise.
13406 (vmaxnmaq_m_f16): Likewise.
13407 (vmaxnmavq_p_f16): Likewise.
13408 (vmaxnmvq_p_f16): Likewise.
13409 (vminnmaq_m_f16): Likewise.
13410 (vminnmavq_p_f16): Likewise.
13411 (vminnmvq_p_f16): Likewise.
13412 (vmlaldavq_p_s16): Likewise.
13413 (vmlaldavxq_p_s16): Likewise.
13414 (vmlsldavq_p_s16): Likewise.
13415 (vmlsldavxq_p_s16): Likewise.
13416 (vmovlbq_m_s8): Likewise.
13417 (vmovltq_m_s8): Likewise.
13418 (vmovnbq_m_s16): Likewise.
13419 (vmovntq_m_s16): Likewise.
13420 (vnegq_m_f16): Likewise.
13421 (vpselq_f16): Likewise.
13422 (vqmovnbq_m_s16): Likewise.
13423 (vqmovntq_m_s16): Likewise.
13424 (vrev32q_m_s8): Likewise.
13425 (vrev64q_m_f16): Likewise.
13426 (vrndaq_m_f16): Likewise.
13427 (vrndmq_m_f16): Likewise.
13428 (vrndnq_m_f16): Likewise.
13429 (vrndpq_m_f16): Likewise.
13430 (vrndq_m_f16): Likewise.
13431 (vrndxq_m_f16): Likewise.
13432 (vcmpeqq_m_n_f16): Likewise.
13433 (vcmpgeq_m_f16): Likewise.
13434 (vcmpgeq_m_n_f16): Likewise.
13435 (vcmpgtq_m_f16): Likewise.
13436 (vcmpgtq_m_n_f16): Likewise.
13437 (vcmpleq_m_f16): Likewise.
13438 (vcmpleq_m_n_f16): Likewise.
13439 (vcmpltq_m_f16): Likewise.
13440 (vcmpltq_m_n_f16): Likewise.
13441 (vcmpneq_m_f16): Likewise.
13442 (vcmpneq_m_n_f16): Likewise.
13443 (vmvnq_m_n_u16): Likewise.
13444 (vorrq_m_n_u16): Likewise.
13445 (vqrshruntq_n_s16): Likewise.
13446 (vqshrunbq_n_s16): Likewise.
13447 (vqshruntq_n_s16): Likewise.
13448 (vcvtmq_m_u16_f16): Likewise.
13449 (vcvtnq_m_u16_f16): Likewise.
13450 (vcvtpq_m_u16_f16): Likewise.
13451 (vcvtq_m_u16_f16): Likewise.
13452 (vqmovunbq_m_s16): Likewise.
13453 (vqmovuntq_m_s16): Likewise.
13454 (vqrshrntq_n_u16): Likewise.
13455 (vqshrnbq_n_u16): Likewise.
13456 (vqshrntq_n_u16): Likewise.
13457 (vrshrnbq_n_u16): Likewise.
13458 (vrshrntq_n_u16): Likewise.
13459 (vshrnbq_n_u16): Likewise.
13460 (vshrntq_n_u16): Likewise.
13461 (vmlaldavaq_u16): Likewise.
13462 (vmlaldavaxq_u16): Likewise.
13463 (vmlaldavq_p_u16): Likewise.
13464 (vmlaldavxq_p_u16): Likewise.
13465 (vmovlbq_m_u8): Likewise.
13466 (vmovltq_m_u8): Likewise.
13467 (vmovnbq_m_u16): Likewise.
13468 (vmovntq_m_u16): Likewise.
13469 (vqmovnbq_m_u16): Likewise.
13470 (vqmovntq_m_u16): Likewise.
13471 (vrev32q_m_u8): Likewise.
13472 (vmvnq_m_n_s32): Likewise.
13473 (vorrq_m_n_s32): Likewise.
13474 (vqrshrntq_n_s32): Likewise.
13475 (vqshrnbq_n_s32): Likewise.
13476 (vqshrntq_n_s32): Likewise.
13477 (vrshrnbq_n_s32): Likewise.
13478 (vrshrntq_n_s32): Likewise.
13479 (vshrnbq_n_s32): Likewise.
13480 (vshrntq_n_s32): Likewise.
13481 (vcmlaq_f32): Likewise.
13482 (vcmlaq_rot180_f32): Likewise.
13483 (vcmlaq_rot270_f32): Likewise.
13484 (vcmlaq_rot90_f32): Likewise.
13485 (vfmaq_f32): Likewise.
13486 (vfmaq_n_f32): Likewise.
13487 (vfmasq_n_f32): Likewise.
13488 (vfmsq_f32): Likewise.
13489 (vmlaldavaq_s32): Likewise.
13490 (vmlaldavaxq_s32): Likewise.
13491 (vmlsldavaq_s32): Likewise.
13492 (vmlsldavaxq_s32): Likewise.
13493 (vabsq_m_f32): Likewise.
13494 (vcvtmq_m_s32_f32): Likewise.
13495 (vcvtnq_m_s32_f32): Likewise.
13496 (vcvtpq_m_s32_f32): Likewise.
13497 (vcvtq_m_s32_f32): Likewise.
13498 (vdupq_m_n_f32): Likewise.
13499 (vmaxnmaq_m_f32): Likewise.
13500 (vmaxnmavq_p_f32): Likewise.
13501 (vmaxnmvq_p_f32): Likewise.
13502 (vminnmaq_m_f32): Likewise.
13503 (vminnmavq_p_f32): Likewise.
13504 (vminnmvq_p_f32): Likewise.
13505 (vmlaldavq_p_s32): Likewise.
13506 (vmlaldavxq_p_s32): Likewise.
13507 (vmlsldavq_p_s32): Likewise.
13508 (vmlsldavxq_p_s32): Likewise.
13509 (vmovlbq_m_s16): Likewise.
13510 (vmovltq_m_s16): Likewise.
13511 (vmovnbq_m_s32): Likewise.
13512 (vmovntq_m_s32): Likewise.
13513 (vnegq_m_f32): Likewise.
13514 (vpselq_f32): Likewise.
13515 (vqmovnbq_m_s32): Likewise.
13516 (vqmovntq_m_s32): Likewise.
13517 (vrev32q_m_s16): Likewise.
13518 (vrev64q_m_f32): Likewise.
13519 (vrndaq_m_f32): Likewise.
13520 (vrndmq_m_f32): Likewise.
13521 (vrndnq_m_f32): Likewise.
13522 (vrndpq_m_f32): Likewise.
13523 (vrndq_m_f32): Likewise.
13524 (vrndxq_m_f32): Likewise.
13525 (vcmpeqq_m_n_f32): Likewise.
13526 (vcmpgeq_m_f32): Likewise.
13527 (vcmpgeq_m_n_f32): Likewise.
13528 (vcmpgtq_m_f32): Likewise.
13529 (vcmpgtq_m_n_f32): Likewise.
13530 (vcmpleq_m_f32): Likewise.
13531 (vcmpleq_m_n_f32): Likewise.
13532 (vcmpltq_m_f32): Likewise.
13533 (vcmpltq_m_n_f32): Likewise.
13534 (vcmpneq_m_f32): Likewise.
13535 (vcmpneq_m_n_f32): Likewise.
13536 (vmvnq_m_n_u32): Likewise.
13537 (vorrq_m_n_u32): Likewise.
13538 (vqrshruntq_n_s32): Likewise.
13539 (vqshrunbq_n_s32): Likewise.
13540 (vqshruntq_n_s32): Likewise.
13541 (vcvtmq_m_u32_f32): Likewise.
13542 (vcvtnq_m_u32_f32): Likewise.
13543 (vcvtpq_m_u32_f32): Likewise.
13544 (vcvtq_m_u32_f32): Likewise.
13545 (vqmovunbq_m_s32): Likewise.
13546 (vqmovuntq_m_s32): Likewise.
13547 (vqrshrntq_n_u32): Likewise.
13548 (vqshrnbq_n_u32): Likewise.
13549 (vqshrntq_n_u32): Likewise.
13550 (vrshrnbq_n_u32): Likewise.
13551 (vrshrntq_n_u32): Likewise.
13552 (vshrnbq_n_u32): Likewise.
13553 (vshrntq_n_u32): Likewise.
13554 (vmlaldavaq_u32): Likewise.
13555 (vmlaldavaxq_u32): Likewise.
13556 (vmlaldavq_p_u32): Likewise.
13557 (vmlaldavxq_p_u32): Likewise.
13558 (vmovlbq_m_u16): Likewise.
13559 (vmovltq_m_u16): Likewise.
13560 (vmovnbq_m_u32): Likewise.
13561 (vmovntq_m_u32): Likewise.
13562 (vqmovnbq_m_u32): Likewise.
13563 (vqmovntq_m_u32): Likewise.
13564 (vrev32q_m_u16): Likewise.
13565 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
13566 (__arm_vrmlsldavhaq_s32): Likewise.
13567 (__arm_vrmlsldavhaxq_s32): Likewise.
13568 (__arm_vaddlvaq_p_s32): Likewise.
13569 (__arm_vrev16q_m_s8): Likewise.
13570 (__arm_vrmlaldavhq_p_s32): Likewise.
13571 (__arm_vrmlaldavhxq_p_s32): Likewise.
13572 (__arm_vrmlsldavhq_p_s32): Likewise.
13573 (__arm_vrmlsldavhxq_p_s32): Likewise.
13574 (__arm_vaddlvaq_p_u32): Likewise.
13575 (__arm_vrev16q_m_u8): Likewise.
13576 (__arm_vrmlaldavhq_p_u32): Likewise.
13577 (__arm_vmvnq_m_n_s16): Likewise.
13578 (__arm_vorrq_m_n_s16): Likewise.
13579 (__arm_vqrshrntq_n_s16): Likewise.
13580 (__arm_vqshrnbq_n_s16): Likewise.
13581 (__arm_vqshrntq_n_s16): Likewise.
13582 (__arm_vrshrnbq_n_s16): Likewise.
13583 (__arm_vrshrntq_n_s16): Likewise.
13584 (__arm_vshrnbq_n_s16): Likewise.
13585 (__arm_vshrntq_n_s16): Likewise.
13586 (__arm_vmlaldavaq_s16): Likewise.
13587 (__arm_vmlaldavaxq_s16): Likewise.
13588 (__arm_vmlsldavaq_s16): Likewise.
13589 (__arm_vmlsldavaxq_s16): Likewise.
13590 (__arm_vmlaldavq_p_s16): Likewise.
13591 (__arm_vmlaldavxq_p_s16): Likewise.
13592 (__arm_vmlsldavq_p_s16): Likewise.
13593 (__arm_vmlsldavxq_p_s16): Likewise.
13594 (__arm_vmovlbq_m_s8): Likewise.
13595 (__arm_vmovltq_m_s8): Likewise.
13596 (__arm_vmovnbq_m_s16): Likewise.
13597 (__arm_vmovntq_m_s16): Likewise.
13598 (__arm_vqmovnbq_m_s16): Likewise.
13599 (__arm_vqmovntq_m_s16): Likewise.
13600 (__arm_vrev32q_m_s8): Likewise.
13601 (__arm_vmvnq_m_n_u16): Likewise.
13602 (__arm_vorrq_m_n_u16): Likewise.
13603 (__arm_vqrshruntq_n_s16): Likewise.
13604 (__arm_vqshrunbq_n_s16): Likewise.
13605 (__arm_vqshruntq_n_s16): Likewise.
13606 (__arm_vqmovunbq_m_s16): Likewise.
13607 (__arm_vqmovuntq_m_s16): Likewise.
13608 (__arm_vqrshrntq_n_u16): Likewise.
13609 (__arm_vqshrnbq_n_u16): Likewise.
13610 (__arm_vqshrntq_n_u16): Likewise.
13611 (__arm_vrshrnbq_n_u16): Likewise.
13612 (__arm_vrshrntq_n_u16): Likewise.
13613 (__arm_vshrnbq_n_u16): Likewise.
13614 (__arm_vshrntq_n_u16): Likewise.
13615 (__arm_vmlaldavaq_u16): Likewise.
13616 (__arm_vmlaldavaxq_u16): Likewise.
13617 (__arm_vmlaldavq_p_u16): Likewise.
13618 (__arm_vmlaldavxq_p_u16): Likewise.
13619 (__arm_vmovlbq_m_u8): Likewise.
13620 (__arm_vmovltq_m_u8): Likewise.
13621 (__arm_vmovnbq_m_u16): Likewise.
13622 (__arm_vmovntq_m_u16): Likewise.
13623 (__arm_vqmovnbq_m_u16): Likewise.
13624 (__arm_vqmovntq_m_u16): Likewise.
13625 (__arm_vrev32q_m_u8): Likewise.
13626 (__arm_vmvnq_m_n_s32): Likewise.
13627 (__arm_vorrq_m_n_s32): Likewise.
13628 (__arm_vqrshrntq_n_s32): Likewise.
13629 (__arm_vqshrnbq_n_s32): Likewise.
13630 (__arm_vqshrntq_n_s32): Likewise.
13631 (__arm_vrshrnbq_n_s32): Likewise.
13632 (__arm_vrshrntq_n_s32): Likewise.
13633 (__arm_vshrnbq_n_s32): Likewise.
13634 (__arm_vshrntq_n_s32): Likewise.
13635 (__arm_vmlaldavaq_s32): Likewise.
13636 (__arm_vmlaldavaxq_s32): Likewise.
13637 (__arm_vmlsldavaq_s32): Likewise.
13638 (__arm_vmlsldavaxq_s32): Likewise.
13639 (__arm_vmlaldavq_p_s32): Likewise.
13640 (__arm_vmlaldavxq_p_s32): Likewise.
13641 (__arm_vmlsldavq_p_s32): Likewise.
13642 (__arm_vmlsldavxq_p_s32): Likewise.
13643 (__arm_vmovlbq_m_s16): Likewise.
13644 (__arm_vmovltq_m_s16): Likewise.
13645 (__arm_vmovnbq_m_s32): Likewise.
13646 (__arm_vmovntq_m_s32): Likewise.
13647 (__arm_vqmovnbq_m_s32): Likewise.
13648 (__arm_vqmovntq_m_s32): Likewise.
13649 (__arm_vrev32q_m_s16): Likewise.
13650 (__arm_vmvnq_m_n_u32): Likewise.
13651 (__arm_vorrq_m_n_u32): Likewise.
13652 (__arm_vqrshruntq_n_s32): Likewise.
13653 (__arm_vqshrunbq_n_s32): Likewise.
13654 (__arm_vqshruntq_n_s32): Likewise.
13655 (__arm_vqmovunbq_m_s32): Likewise.
13656 (__arm_vqmovuntq_m_s32): Likewise.
13657 (__arm_vqrshrntq_n_u32): Likewise.
13658 (__arm_vqshrnbq_n_u32): Likewise.
13659 (__arm_vqshrntq_n_u32): Likewise.
13660 (__arm_vrshrnbq_n_u32): Likewise.
13661 (__arm_vrshrntq_n_u32): Likewise.
13662 (__arm_vshrnbq_n_u32): Likewise.
13663 (__arm_vshrntq_n_u32): Likewise.
13664 (__arm_vmlaldavaq_u32): Likewise.
13665 (__arm_vmlaldavaxq_u32): Likewise.
13666 (__arm_vmlaldavq_p_u32): Likewise.
13667 (__arm_vmlaldavxq_p_u32): Likewise.
13668 (__arm_vmovlbq_m_u16): Likewise.
13669 (__arm_vmovltq_m_u16): Likewise.
13670 (__arm_vmovnbq_m_u32): Likewise.
13671 (__arm_vmovntq_m_u32): Likewise.
13672 (__arm_vqmovnbq_m_u32): Likewise.
13673 (__arm_vqmovntq_m_u32): Likewise.
13674 (__arm_vrev32q_m_u16): Likewise.
13675 (__arm_vcvtbq_m_f16_f32): Likewise.
13676 (__arm_vcvtbq_m_f32_f16): Likewise.
13677 (__arm_vcvttq_m_f16_f32): Likewise.
13678 (__arm_vcvttq_m_f32_f16): Likewise.
13679 (__arm_vrev32q_m_f16): Likewise.
13680 (__arm_vcmlaq_f16): Likewise.
13681 (__arm_vcmlaq_rot180_f16): Likewise.
13682 (__arm_vcmlaq_rot270_f16): Likewise.
13683 (__arm_vcmlaq_rot90_f16): Likewise.
13684 (__arm_vfmaq_f16): Likewise.
13685 (__arm_vfmaq_n_f16): Likewise.
13686 (__arm_vfmasq_n_f16): Likewise.
13687 (__arm_vfmsq_f16): Likewise.
13688 (__arm_vabsq_m_f16): Likewise.
13689 (__arm_vcvtmq_m_s16_f16): Likewise.
13690 (__arm_vcvtnq_m_s16_f16): Likewise.
13691 (__arm_vcvtpq_m_s16_f16): Likewise.
13692 (__arm_vcvtq_m_s16_f16): Likewise.
13693 (__arm_vdupq_m_n_f16): Likewise.
13694 (__arm_vmaxnmaq_m_f16): Likewise.
13695 (__arm_vmaxnmavq_p_f16): Likewise.
13696 (__arm_vmaxnmvq_p_f16): Likewise.
13697 (__arm_vminnmaq_m_f16): Likewise.
13698 (__arm_vminnmavq_p_f16): Likewise.
13699 (__arm_vminnmvq_p_f16): Likewise.
13700 (__arm_vnegq_m_f16): Likewise.
13701 (__arm_vpselq_f16): Likewise.
13702 (__arm_vrev64q_m_f16): Likewise.
13703 (__arm_vrndaq_m_f16): Likewise.
13704 (__arm_vrndmq_m_f16): Likewise.
13705 (__arm_vrndnq_m_f16): Likewise.
13706 (__arm_vrndpq_m_f16): Likewise.
13707 (__arm_vrndq_m_f16): Likewise.
13708 (__arm_vrndxq_m_f16): Likewise.
13709 (__arm_vcmpeqq_m_n_f16): Likewise.
13710 (__arm_vcmpgeq_m_f16): Likewise.
13711 (__arm_vcmpgeq_m_n_f16): Likewise.
13712 (__arm_vcmpgtq_m_f16): Likewise.
13713 (__arm_vcmpgtq_m_n_f16): Likewise.
13714 (__arm_vcmpleq_m_f16): Likewise.
13715 (__arm_vcmpleq_m_n_f16): Likewise.
13716 (__arm_vcmpltq_m_f16): Likewise.
13717 (__arm_vcmpltq_m_n_f16): Likewise.
13718 (__arm_vcmpneq_m_f16): Likewise.
13719 (__arm_vcmpneq_m_n_f16): Likewise.
13720 (__arm_vcvtmq_m_u16_f16): Likewise.
13721 (__arm_vcvtnq_m_u16_f16): Likewise.
13722 (__arm_vcvtpq_m_u16_f16): Likewise.
13723 (__arm_vcvtq_m_u16_f16): Likewise.
13724 (__arm_vcmlaq_f32): Likewise.
13725 (__arm_vcmlaq_rot180_f32): Likewise.
13726 (__arm_vcmlaq_rot270_f32): Likewise.
13727 (__arm_vcmlaq_rot90_f32): Likewise.
13728 (__arm_vfmaq_f32): Likewise.
13729 (__arm_vfmaq_n_f32): Likewise.
13730 (__arm_vfmasq_n_f32): Likewise.
13731 (__arm_vfmsq_f32): Likewise.
13732 (__arm_vabsq_m_f32): Likewise.
13733 (__arm_vcvtmq_m_s32_f32): Likewise.
13734 (__arm_vcvtnq_m_s32_f32): Likewise.
13735 (__arm_vcvtpq_m_s32_f32): Likewise.
13736 (__arm_vcvtq_m_s32_f32): Likewise.
13737 (__arm_vdupq_m_n_f32): Likewise.
13738 (__arm_vmaxnmaq_m_f32): Likewise.
13739 (__arm_vmaxnmavq_p_f32): Likewise.
13740 (__arm_vmaxnmvq_p_f32): Likewise.
13741 (__arm_vminnmaq_m_f32): Likewise.
13742 (__arm_vminnmavq_p_f32): Likewise.
13743 (__arm_vminnmvq_p_f32): Likewise.
13744 (__arm_vnegq_m_f32): Likewise.
13745 (__arm_vpselq_f32): Likewise.
13746 (__arm_vrev64q_m_f32): Likewise.
13747 (__arm_vrndaq_m_f32): Likewise.
13748 (__arm_vrndmq_m_f32): Likewise.
13749 (__arm_vrndnq_m_f32): Likewise.
13750 (__arm_vrndpq_m_f32): Likewise.
13751 (__arm_vrndq_m_f32): Likewise.
13752 (__arm_vrndxq_m_f32): Likewise.
13753 (__arm_vcmpeqq_m_n_f32): Likewise.
13754 (__arm_vcmpgeq_m_f32): Likewise.
13755 (__arm_vcmpgeq_m_n_f32): Likewise.
13756 (__arm_vcmpgtq_m_f32): Likewise.
13757 (__arm_vcmpgtq_m_n_f32): Likewise.
13758 (__arm_vcmpleq_m_f32): Likewise.
13759 (__arm_vcmpleq_m_n_f32): Likewise.
13760 (__arm_vcmpltq_m_f32): Likewise.
13761 (__arm_vcmpltq_m_n_f32): Likewise.
13762 (__arm_vcmpneq_m_f32): Likewise.
13763 (__arm_vcmpneq_m_n_f32): Likewise.
13764 (__arm_vcvtmq_m_u32_f32): Likewise.
13765 (__arm_vcvtnq_m_u32_f32): Likewise.
13766 (__arm_vcvtpq_m_u32_f32): Likewise.
13767 (__arm_vcvtq_m_u32_f32): Likewise.
13768 (vcvtq_m): Define polymorphic variant.
13769 (vabsq_m): Likewise.
13770 (vcmlaq): Likewise.
13771 (vcmlaq_rot180): Likewise.
13772 (vcmlaq_rot270): Likewise.
13773 (vcmlaq_rot90): Likewise.
13774 (vcmpeqq_m_n): Likewise.
13775 (vcmpgeq_m_n): Likewise.
13776 (vrndxq_m): Likewise.
13777 (vrndq_m): Likewise.
13778 (vrndpq_m): Likewise.
13779 (vcmpgtq_m_n): Likewise.
13780 (vcmpgtq_m): Likewise.
13781 (vcmpleq_m): Likewise.
13782 (vcmpleq_m_n): Likewise.
13783 (vcmpltq_m_n): Likewise.
13784 (vcmpltq_m): Likewise.
13785 (vcmpneq_m): Likewise.
13786 (vcmpneq_m_n): Likewise.
13787 (vcvtbq_m): Likewise.
13788 (vcvttq_m): Likewise.
13789 (vcvtmq_m): Likewise.
13790 (vcvtnq_m): Likewise.
13791 (vcvtpq_m): Likewise.
13792 (vdupq_m_n): Likewise.
13793 (vfmaq_n): Likewise.
13795 (vfmasq_n): Likewise.
13797 (vmaxnmaq_m): Likewise.
13798 (vmaxnmavq_m): Likewise.
13799 (vmaxnmvq_m): Likewise.
13800 (vmaxnmavq_p): Likewise.
13801 (vmaxnmvq_p): Likewise.
13802 (vminnmaq_m): Likewise.
13803 (vminnmavq_p): Likewise.
13804 (vminnmvq_p): Likewise.
13805 (vrndnq_m): Likewise.
13806 (vrndaq_m): Likewise.
13807 (vrndmq_m): Likewise.
13808 (vrev64q_m): Likewise.
13809 (vrev32q_m): Likewise.
13810 (vpselq): Likewise.
13811 (vnegq_m): Likewise.
13812 (vcmpgeq_m): Likewise.
13813 (vshrntq_n): Likewise.
13814 (vrshrntq_n): Likewise.
13815 (vmovlbq_m): Likewise.
13816 (vmovnbq_m): Likewise.
13817 (vmovntq_m): Likewise.
13818 (vmvnq_m_n): Likewise.
13819 (vmvnq_m): Likewise.
13820 (vshrnbq_n): Likewise.
13821 (vrshrnbq_n): Likewise.
13822 (vqshruntq_n): Likewise.
13823 (vrev16q_m): Likewise.
13824 (vqshrunbq_n): Likewise.
13825 (vqshrntq_n): Likewise.
13826 (vqrshruntq_n): Likewise.
13827 (vqrshrntq_n): Likewise.
13828 (vqshrnbq_n): Likewise.
13829 (vqmovuntq_m): Likewise.
13830 (vqmovntq_m): Likewise.
13831 (vqmovnbq_m): Likewise.
13832 (vorrq_m_n): Likewise.
13833 (vmovltq_m): Likewise.
13834 (vqmovunbq_m): Likewise.
13835 (vaddlvaq_p): Likewise.
13836 (vmlaldavaq): Likewise.
13837 (vmlaldavaxq): Likewise.
13838 (vmlaldavq_p): Likewise.
13839 (vmlaldavxq_p): Likewise.
13840 (vmlsldavaq): Likewise.
13841 (vmlsldavaxq): Likewise.
13842 (vmlsldavq_p): Likewise.
13843 (vmlsldavxq_p): Likewise.
13844 (vrmlaldavhaxq): Likewise.
13845 (vrmlaldavhq_p): Likewise.
13846 (vrmlaldavhxq_p): Likewise.
13847 (vrmlsldavhaq): Likewise.
13848 (vrmlsldavhaxq): Likewise.
13849 (vrmlsldavhq_p): Likewise.
13850 (vrmlsldavhxq_p): Likewise.
13851 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
13853 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
13854 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
13855 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
13856 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
13857 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
13858 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
13859 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
13860 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
13861 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
13862 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
13863 (MVE_pred3): Likewise.
13864 (MVE_constraint1): Likewise.
13865 (MVE_pred1): Likewise.
13866 (VMLALDAVQ_P): Define iterator.
13867 (VQMOVNBQ_M): Likewise.
13868 (VMOVLTQ_M): Likewise.
13869 (VMOVNBQ_M): Likewise.
13870 (VRSHRNTQ_N): Likewise.
13871 (VORRQ_M_N): Likewise.
13872 (VREV32Q_M): Likewise.
13873 (VREV16Q_M): Likewise.
13874 (VQRSHRNTQ_N): Likewise.
13875 (VMOVNTQ_M): Likewise.
13876 (VMOVLBQ_M): Likewise.
13877 (VMLALDAVAQ): Likewise.
13878 (VQSHRNBQ_N): Likewise.
13879 (VSHRNBQ_N): Likewise.
13880 (VRSHRNBQ_N): Likewise.
13881 (VMLALDAVXQ_P): Likewise.
13882 (VQMOVNTQ_M): Likewise.
13883 (VMVNQ_M_N): Likewise.
13884 (VQSHRNTQ_N): Likewise.
13885 (VMLALDAVAXQ): Likewise.
13886 (VSHRNTQ_N): Likewise.
13887 (VCVTMQ_M): Likewise.
13888 (VCVTNQ_M): Likewise.
13889 (VCVTPQ_M): Likewise.
13890 (VCVTQ_M_N_FROM_F): Likewise.
13891 (VCVTQ_M_FROM_F): Likewise.
13892 (VRMLALDAVHQ_P): Likewise.
13893 (VADDLVAQ_P): Likewise.
13894 (mve_vrndq_m_f<mode>): Define RTL pattern.
13895 (mve_vabsq_m_f<mode>): Likewise.
13896 (mve_vaddlvaq_p_<supf>v4si): Likewise.
13897 (mve_vcmlaq_f<mode>): Likewise.
13898 (mve_vcmlaq_rot180_f<mode>): Likewise.
13899 (mve_vcmlaq_rot270_f<mode>): Likewise.
13900 (mve_vcmlaq_rot90_f<mode>): Likewise.
13901 (mve_vcmpeqq_m_n_f<mode>): Likewise.
13902 (mve_vcmpgeq_m_f<mode>): Likewise.
13903 (mve_vcmpgeq_m_n_f<mode>): Likewise.
13904 (mve_vcmpgtq_m_f<mode>): Likewise.
13905 (mve_vcmpgtq_m_n_f<mode>): Likewise.
13906 (mve_vcmpleq_m_f<mode>): Likewise.
13907 (mve_vcmpleq_m_n_f<mode>): Likewise.
13908 (mve_vcmpltq_m_f<mode>): Likewise.
13909 (mve_vcmpltq_m_n_f<mode>): Likewise.
13910 (mve_vcmpneq_m_f<mode>): Likewise.
13911 (mve_vcmpneq_m_n_f<mode>): Likewise.
13912 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
13913 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
13914 (mve_vcvttq_m_f16_f32v8hf): Likewise.
13915 (mve_vcvttq_m_f32_f16v4sf): Likewise.
13916 (mve_vdupq_m_n_f<mode>): Likewise.
13917 (mve_vfmaq_f<mode>): Likewise.
13918 (mve_vfmaq_n_f<mode>): Likewise.
13919 (mve_vfmasq_n_f<mode>): Likewise.
13920 (mve_vfmsq_f<mode>): Likewise.
13921 (mve_vmaxnmaq_m_f<mode>): Likewise.
13922 (mve_vmaxnmavq_p_f<mode>): Likewise.
13923 (mve_vmaxnmvq_p_f<mode>): Likewise.
13924 (mve_vminnmaq_m_f<mode>): Likewise.
13925 (mve_vminnmavq_p_f<mode>): Likewise.
13926 (mve_vminnmvq_p_f<mode>): Likewise.
13927 (mve_vmlaldavaq_<supf><mode>): Likewise.
13928 (mve_vmlaldavaxq_<supf><mode>): Likewise.
13929 (mve_vmlaldavq_p_<supf><mode>): Likewise.
13930 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
13931 (mve_vmlsldavaq_s<mode>): Likewise.
13932 (mve_vmlsldavaxq_s<mode>): Likewise.
13933 (mve_vmlsldavq_p_s<mode>): Likewise.
13934 (mve_vmlsldavxq_p_s<mode>): Likewise.
13935 (mve_vmovlbq_m_<supf><mode>): Likewise.
13936 (mve_vmovltq_m_<supf><mode>): Likewise.
13937 (mve_vmovnbq_m_<supf><mode>): Likewise.
13938 (mve_vmovntq_m_<supf><mode>): Likewise.
13939 (mve_vmvnq_m_n_<supf><mode>): Likewise.
13940 (mve_vnegq_m_f<mode>): Likewise.
13941 (mve_vorrq_m_n_<supf><mode>): Likewise.
13942 (mve_vpselq_f<mode>): Likewise.
13943 (mve_vqmovnbq_m_<supf><mode>): Likewise.
13944 (mve_vqmovntq_m_<supf><mode>): Likewise.
13945 (mve_vqmovunbq_m_s<mode>): Likewise.
13946 (mve_vqmovuntq_m_s<mode>): Likewise.
13947 (mve_vqrshrntq_n_<supf><mode>): Likewise.
13948 (mve_vqrshruntq_n_s<mode>): Likewise.
13949 (mve_vqshrnbq_n_<supf><mode>): Likewise.
13950 (mve_vqshrntq_n_<supf><mode>): Likewise.
13951 (mve_vqshrunbq_n_s<mode>): Likewise.
13952 (mve_vqshruntq_n_s<mode>): Likewise.
13953 (mve_vrev32q_m_fv8hf): Likewise.
13954 (mve_vrev32q_m_<supf><mode>): Likewise.
13955 (mve_vrev64q_m_f<mode>): Likewise.
13956 (mve_vrmlaldavhaxq_sv4si): Likewise.
13957 (mve_vrmlaldavhxq_p_sv4si): Likewise.
13958 (mve_vrmlsldavhaxq_sv4si): Likewise.
13959 (mve_vrmlsldavhq_p_sv4si): Likewise.
13960 (mve_vrmlsldavhxq_p_sv4si): Likewise.
13961 (mve_vrndaq_m_f<mode>): Likewise.
13962 (mve_vrndmq_m_f<mode>): Likewise.
13963 (mve_vrndnq_m_f<mode>): Likewise.
13964 (mve_vrndpq_m_f<mode>): Likewise.
13965 (mve_vrndxq_m_f<mode>): Likewise.
13966 (mve_vrshrnbq_n_<supf><mode>): Likewise.
13967 (mve_vrshrntq_n_<supf><mode>): Likewise.
13968 (mve_vshrnbq_n_<supf><mode>): Likewise.
13969 (mve_vshrntq_n_<supf><mode>): Likewise.
13970 (mve_vcvtmq_m_<supf><mode>): Likewise.
13971 (mve_vcvtpq_m_<supf><mode>): Likewise.
13972 (mve_vcvtnq_m_<supf><mode>): Likewise.
13973 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
13974 (mve_vrev16q_m_<supf>v16qi): Likewise.
13975 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
13976 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
13977 (mve_vrmlsldavhaq_sv4si): Likewise.
13979 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13980 Mihail Ionescu <mihail.ionescu@arm.com>
13981 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13983 * config/arm/arm_mve.h (vpselq_u8): Define macro.
13984 (vpselq_s8): Likewise.
13985 (vrev64q_m_u8): Likewise.
13986 (vqrdmlashq_n_u8): Likewise.
13987 (vqrdmlahq_n_u8): Likewise.
13988 (vqdmlahq_n_u8): Likewise.
13989 (vmvnq_m_u8): Likewise.
13990 (vmlasq_n_u8): Likewise.
13991 (vmlaq_n_u8): Likewise.
13992 (vmladavq_p_u8): Likewise.
13993 (vmladavaq_u8): Likewise.
13994 (vminvq_p_u8): Likewise.
13995 (vmaxvq_p_u8): Likewise.
13996 (vdupq_m_n_u8): Likewise.
13997 (vcmpneq_m_u8): Likewise.
13998 (vcmpneq_m_n_u8): Likewise.
13999 (vcmphiq_m_u8): Likewise.
14000 (vcmphiq_m_n_u8): Likewise.
14001 (vcmpeqq_m_u8): Likewise.
14002 (vcmpeqq_m_n_u8): Likewise.
14003 (vcmpcsq_m_u8): Likewise.
14004 (vcmpcsq_m_n_u8): Likewise.
14005 (vclzq_m_u8): Likewise.
14006 (vaddvaq_p_u8): Likewise.
14007 (vsriq_n_u8): Likewise.
14008 (vsliq_n_u8): Likewise.
14009 (vshlq_m_r_u8): Likewise.
14010 (vrshlq_m_n_u8): Likewise.
14011 (vqshlq_m_r_u8): Likewise.
14012 (vqrshlq_m_n_u8): Likewise.
14013 (vminavq_p_s8): Likewise.
14014 (vminaq_m_s8): Likewise.
14015 (vmaxavq_p_s8): Likewise.
14016 (vmaxaq_m_s8): Likewise.
14017 (vcmpneq_m_s8): Likewise.
14018 (vcmpneq_m_n_s8): Likewise.
14019 (vcmpltq_m_s8): Likewise.
14020 (vcmpltq_m_n_s8): Likewise.
14021 (vcmpleq_m_s8): Likewise.
14022 (vcmpleq_m_n_s8): Likewise.
14023 (vcmpgtq_m_s8): Likewise.
14024 (vcmpgtq_m_n_s8): Likewise.
14025 (vcmpgeq_m_s8): Likewise.
14026 (vcmpgeq_m_n_s8): Likewise.
14027 (vcmpeqq_m_s8): Likewise.
14028 (vcmpeqq_m_n_s8): Likewise.
14029 (vshlq_m_r_s8): Likewise.
14030 (vrshlq_m_n_s8): Likewise.
14031 (vrev64q_m_s8): Likewise.
14032 (vqshlq_m_r_s8): Likewise.
14033 (vqrshlq_m_n_s8): Likewise.
14034 (vqnegq_m_s8): Likewise.
14035 (vqabsq_m_s8): Likewise.
14036 (vnegq_m_s8): Likewise.
14037 (vmvnq_m_s8): Likewise.
14038 (vmlsdavxq_p_s8): Likewise.
14039 (vmlsdavq_p_s8): Likewise.
14040 (vmladavxq_p_s8): Likewise.
14041 (vmladavq_p_s8): Likewise.
14042 (vminvq_p_s8): Likewise.
14043 (vmaxvq_p_s8): Likewise.
14044 (vdupq_m_n_s8): Likewise.
14045 (vclzq_m_s8): Likewise.
14046 (vclsq_m_s8): Likewise.
14047 (vaddvaq_p_s8): Likewise.
14048 (vabsq_m_s8): Likewise.
14049 (vqrdmlsdhxq_s8): Likewise.
14050 (vqrdmlsdhq_s8): Likewise.
14051 (vqrdmlashq_n_s8): Likewise.
14052 (vqrdmlahq_n_s8): Likewise.
14053 (vqrdmladhxq_s8): Likewise.
14054 (vqrdmladhq_s8): Likewise.
14055 (vqdmlsdhxq_s8): Likewise.
14056 (vqdmlsdhq_s8): Likewise.
14057 (vqdmlahq_n_s8): Likewise.
14058 (vqdmladhxq_s8): Likewise.
14059 (vqdmladhq_s8): Likewise.
14060 (vmlsdavaxq_s8): Likewise.
14061 (vmlsdavaq_s8): Likewise.
14062 (vmlasq_n_s8): Likewise.
14063 (vmlaq_n_s8): Likewise.
14064 (vmladavaxq_s8): Likewise.
14065 (vmladavaq_s8): Likewise.
14066 (vsriq_n_s8): Likewise.
14067 (vsliq_n_s8): Likewise.
14068 (vpselq_u16): Likewise.
14069 (vpselq_s16): Likewise.
14070 (vrev64q_m_u16): Likewise.
14071 (vqrdmlashq_n_u16): Likewise.
14072 (vqrdmlahq_n_u16): Likewise.
14073 (vqdmlahq_n_u16): Likewise.
14074 (vmvnq_m_u16): Likewise.
14075 (vmlasq_n_u16): Likewise.
14076 (vmlaq_n_u16): Likewise.
14077 (vmladavq_p_u16): Likewise.
14078 (vmladavaq_u16): Likewise.
14079 (vminvq_p_u16): Likewise.
14080 (vmaxvq_p_u16): Likewise.
14081 (vdupq_m_n_u16): Likewise.
14082 (vcmpneq_m_u16): Likewise.
14083 (vcmpneq_m_n_u16): Likewise.
14084 (vcmphiq_m_u16): Likewise.
14085 (vcmphiq_m_n_u16): Likewise.
14086 (vcmpeqq_m_u16): Likewise.
14087 (vcmpeqq_m_n_u16): Likewise.
14088 (vcmpcsq_m_u16): Likewise.
14089 (vcmpcsq_m_n_u16): Likewise.
14090 (vclzq_m_u16): Likewise.
14091 (vaddvaq_p_u16): Likewise.
14092 (vsriq_n_u16): Likewise.
14093 (vsliq_n_u16): Likewise.
14094 (vshlq_m_r_u16): Likewise.
14095 (vrshlq_m_n_u16): Likewise.
14096 (vqshlq_m_r_u16): Likewise.
14097 (vqrshlq_m_n_u16): Likewise.
14098 (vminavq_p_s16): Likewise.
14099 (vminaq_m_s16): Likewise.
14100 (vmaxavq_p_s16): Likewise.
14101 (vmaxaq_m_s16): Likewise.
14102 (vcmpneq_m_s16): Likewise.
14103 (vcmpneq_m_n_s16): Likewise.
14104 (vcmpltq_m_s16): Likewise.
14105 (vcmpltq_m_n_s16): Likewise.
14106 (vcmpleq_m_s16): Likewise.
14107 (vcmpleq_m_n_s16): Likewise.
14108 (vcmpgtq_m_s16): Likewise.
14109 (vcmpgtq_m_n_s16): Likewise.
14110 (vcmpgeq_m_s16): Likewise.
14111 (vcmpgeq_m_n_s16): Likewise.
14112 (vcmpeqq_m_s16): Likewise.
14113 (vcmpeqq_m_n_s16): Likewise.
14114 (vshlq_m_r_s16): Likewise.
14115 (vrshlq_m_n_s16): Likewise.
14116 (vrev64q_m_s16): Likewise.
14117 (vqshlq_m_r_s16): Likewise.
14118 (vqrshlq_m_n_s16): Likewise.
14119 (vqnegq_m_s16): Likewise.
14120 (vqabsq_m_s16): Likewise.
14121 (vnegq_m_s16): Likewise.
14122 (vmvnq_m_s16): Likewise.
14123 (vmlsdavxq_p_s16): Likewise.
14124 (vmlsdavq_p_s16): Likewise.
14125 (vmladavxq_p_s16): Likewise.
14126 (vmladavq_p_s16): Likewise.
14127 (vminvq_p_s16): Likewise.
14128 (vmaxvq_p_s16): Likewise.
14129 (vdupq_m_n_s16): Likewise.
14130 (vclzq_m_s16): Likewise.
14131 (vclsq_m_s16): Likewise.
14132 (vaddvaq_p_s16): Likewise.
14133 (vabsq_m_s16): Likewise.
14134 (vqrdmlsdhxq_s16): Likewise.
14135 (vqrdmlsdhq_s16): Likewise.
14136 (vqrdmlashq_n_s16): Likewise.
14137 (vqrdmlahq_n_s16): Likewise.
14138 (vqrdmladhxq_s16): Likewise.
14139 (vqrdmladhq_s16): Likewise.
14140 (vqdmlsdhxq_s16): Likewise.
14141 (vqdmlsdhq_s16): Likewise.
14142 (vqdmlahq_n_s16): Likewise.
14143 (vqdmladhxq_s16): Likewise.
14144 (vqdmladhq_s16): Likewise.
14145 (vmlsdavaxq_s16): Likewise.
14146 (vmlsdavaq_s16): Likewise.
14147 (vmlasq_n_s16): Likewise.
14148 (vmlaq_n_s16): Likewise.
14149 (vmladavaxq_s16): Likewise.
14150 (vmladavaq_s16): Likewise.
14151 (vsriq_n_s16): Likewise.
14152 (vsliq_n_s16): Likewise.
14153 (vpselq_u32): Likewise.
14154 (vpselq_s32): Likewise.
14155 (vrev64q_m_u32): Likewise.
14156 (vqrdmlashq_n_u32): Likewise.
14157 (vqrdmlahq_n_u32): Likewise.
14158 (vqdmlahq_n_u32): Likewise.
14159 (vmvnq_m_u32): Likewise.
14160 (vmlasq_n_u32): Likewise.
14161 (vmlaq_n_u32): Likewise.
14162 (vmladavq_p_u32): Likewise.
14163 (vmladavaq_u32): Likewise.
14164 (vminvq_p_u32): Likewise.
14165 (vmaxvq_p_u32): Likewise.
14166 (vdupq_m_n_u32): Likewise.
14167 (vcmpneq_m_u32): Likewise.
14168 (vcmpneq_m_n_u32): Likewise.
14169 (vcmphiq_m_u32): Likewise.
14170 (vcmphiq_m_n_u32): Likewise.
14171 (vcmpeqq_m_u32): Likewise.
14172 (vcmpeqq_m_n_u32): Likewise.
14173 (vcmpcsq_m_u32): Likewise.
14174 (vcmpcsq_m_n_u32): Likewise.
14175 (vclzq_m_u32): Likewise.
14176 (vaddvaq_p_u32): Likewise.
14177 (vsriq_n_u32): Likewise.
14178 (vsliq_n_u32): Likewise.
14179 (vshlq_m_r_u32): Likewise.
14180 (vrshlq_m_n_u32): Likewise.
14181 (vqshlq_m_r_u32): Likewise.
14182 (vqrshlq_m_n_u32): Likewise.
14183 (vminavq_p_s32): Likewise.
14184 (vminaq_m_s32): Likewise.
14185 (vmaxavq_p_s32): Likewise.
14186 (vmaxaq_m_s32): Likewise.
14187 (vcmpneq_m_s32): Likewise.
14188 (vcmpneq_m_n_s32): Likewise.
14189 (vcmpltq_m_s32): Likewise.
14190 (vcmpltq_m_n_s32): Likewise.
14191 (vcmpleq_m_s32): Likewise.
14192 (vcmpleq_m_n_s32): Likewise.
14193 (vcmpgtq_m_s32): Likewise.
14194 (vcmpgtq_m_n_s32): Likewise.
14195 (vcmpgeq_m_s32): Likewise.
14196 (vcmpgeq_m_n_s32): Likewise.
14197 (vcmpeqq_m_s32): Likewise.
14198 (vcmpeqq_m_n_s32): Likewise.
14199 (vshlq_m_r_s32): Likewise.
14200 (vrshlq_m_n_s32): Likewise.
14201 (vrev64q_m_s32): Likewise.
14202 (vqshlq_m_r_s32): Likewise.
14203 (vqrshlq_m_n_s32): Likewise.
14204 (vqnegq_m_s32): Likewise.
14205 (vqabsq_m_s32): Likewise.
14206 (vnegq_m_s32): Likewise.
14207 (vmvnq_m_s32): Likewise.
14208 (vmlsdavxq_p_s32): Likewise.
14209 (vmlsdavq_p_s32): Likewise.
14210 (vmladavxq_p_s32): Likewise.
14211 (vmladavq_p_s32): Likewise.
14212 (vminvq_p_s32): Likewise.
14213 (vmaxvq_p_s32): Likewise.
14214 (vdupq_m_n_s32): Likewise.
14215 (vclzq_m_s32): Likewise.
14216 (vclsq_m_s32): Likewise.
14217 (vaddvaq_p_s32): Likewise.
14218 (vabsq_m_s32): Likewise.
14219 (vqrdmlsdhxq_s32): Likewise.
14220 (vqrdmlsdhq_s32): Likewise.
14221 (vqrdmlashq_n_s32): Likewise.
14222 (vqrdmlahq_n_s32): Likewise.
14223 (vqrdmladhxq_s32): Likewise.
14224 (vqrdmladhq_s32): Likewise.
14225 (vqdmlsdhxq_s32): Likewise.
14226 (vqdmlsdhq_s32): Likewise.
14227 (vqdmlahq_n_s32): Likewise.
14228 (vqdmladhxq_s32): Likewise.
14229 (vqdmladhq_s32): Likewise.
14230 (vmlsdavaxq_s32): Likewise.
14231 (vmlsdavaq_s32): Likewise.
14232 (vmlasq_n_s32): Likewise.
14233 (vmlaq_n_s32): Likewise.
14234 (vmladavaxq_s32): Likewise.
14235 (vmladavaq_s32): Likewise.
14236 (vsriq_n_s32): Likewise.
14237 (vsliq_n_s32): Likewise.
14238 (vpselq_u64): Likewise.
14239 (vpselq_s64): Likewise.
14240 (__arm_vpselq_u8): Define intrinsic.
14241 (__arm_vpselq_s8): Likewise.
14242 (__arm_vrev64q_m_u8): Likewise.
14243 (__arm_vqrdmlashq_n_u8): Likewise.
14244 (__arm_vqrdmlahq_n_u8): Likewise.
14245 (__arm_vqdmlahq_n_u8): Likewise.
14246 (__arm_vmvnq_m_u8): Likewise.
14247 (__arm_vmlasq_n_u8): Likewise.
14248 (__arm_vmlaq_n_u8): Likewise.
14249 (__arm_vmladavq_p_u8): Likewise.
14250 (__arm_vmladavaq_u8): Likewise.
14251 (__arm_vminvq_p_u8): Likewise.
14252 (__arm_vmaxvq_p_u8): Likewise.
14253 (__arm_vdupq_m_n_u8): Likewise.
14254 (__arm_vcmpneq_m_u8): Likewise.
14255 (__arm_vcmpneq_m_n_u8): Likewise.
14256 (__arm_vcmphiq_m_u8): Likewise.
14257 (__arm_vcmphiq_m_n_u8): Likewise.
14258 (__arm_vcmpeqq_m_u8): Likewise.
14259 (__arm_vcmpeqq_m_n_u8): Likewise.
14260 (__arm_vcmpcsq_m_u8): Likewise.
14261 (__arm_vcmpcsq_m_n_u8): Likewise.
14262 (__arm_vclzq_m_u8): Likewise.
14263 (__arm_vaddvaq_p_u8): Likewise.
14264 (__arm_vsriq_n_u8): Likewise.
14265 (__arm_vsliq_n_u8): Likewise.
14266 (__arm_vshlq_m_r_u8): Likewise.
14267 (__arm_vrshlq_m_n_u8): Likewise.
14268 (__arm_vqshlq_m_r_u8): Likewise.
14269 (__arm_vqrshlq_m_n_u8): Likewise.
14270 (__arm_vminavq_p_s8): Likewise.
14271 (__arm_vminaq_m_s8): Likewise.
14272 (__arm_vmaxavq_p_s8): Likewise.
14273 (__arm_vmaxaq_m_s8): Likewise.
14274 (__arm_vcmpneq_m_s8): Likewise.
14275 (__arm_vcmpneq_m_n_s8): Likewise.
14276 (__arm_vcmpltq_m_s8): Likewise.
14277 (__arm_vcmpltq_m_n_s8): Likewise.
14278 (__arm_vcmpleq_m_s8): Likewise.
14279 (__arm_vcmpleq_m_n_s8): Likewise.
14280 (__arm_vcmpgtq_m_s8): Likewise.
14281 (__arm_vcmpgtq_m_n_s8): Likewise.
14282 (__arm_vcmpgeq_m_s8): Likewise.
14283 (__arm_vcmpgeq_m_n_s8): Likewise.
14284 (__arm_vcmpeqq_m_s8): Likewise.
14285 (__arm_vcmpeqq_m_n_s8): Likewise.
14286 (__arm_vshlq_m_r_s8): Likewise.
14287 (__arm_vrshlq_m_n_s8): Likewise.
14288 (__arm_vrev64q_m_s8): Likewise.
14289 (__arm_vqshlq_m_r_s8): Likewise.
14290 (__arm_vqrshlq_m_n_s8): Likewise.
14291 (__arm_vqnegq_m_s8): Likewise.
14292 (__arm_vqabsq_m_s8): Likewise.
14293 (__arm_vnegq_m_s8): Likewise.
14294 (__arm_vmvnq_m_s8): Likewise.
14295 (__arm_vmlsdavxq_p_s8): Likewise.
14296 (__arm_vmlsdavq_p_s8): Likewise.
14297 (__arm_vmladavxq_p_s8): Likewise.
14298 (__arm_vmladavq_p_s8): Likewise.
14299 (__arm_vminvq_p_s8): Likewise.
14300 (__arm_vmaxvq_p_s8): Likewise.
14301 (__arm_vdupq_m_n_s8): Likewise.
14302 (__arm_vclzq_m_s8): Likewise.
14303 (__arm_vclsq_m_s8): Likewise.
14304 (__arm_vaddvaq_p_s8): Likewise.
14305 (__arm_vabsq_m_s8): Likewise.
14306 (__arm_vqrdmlsdhxq_s8): Likewise.
14307 (__arm_vqrdmlsdhq_s8): Likewise.
14308 (__arm_vqrdmlashq_n_s8): Likewise.
14309 (__arm_vqrdmlahq_n_s8): Likewise.
14310 (__arm_vqrdmladhxq_s8): Likewise.
14311 (__arm_vqrdmladhq_s8): Likewise.
14312 (__arm_vqdmlsdhxq_s8): Likewise.
14313 (__arm_vqdmlsdhq_s8): Likewise.
14314 (__arm_vqdmlahq_n_s8): Likewise.
14315 (__arm_vqdmladhxq_s8): Likewise.
14316 (__arm_vqdmladhq_s8): Likewise.
14317 (__arm_vmlsdavaxq_s8): Likewise.
14318 (__arm_vmlsdavaq_s8): Likewise.
14319 (__arm_vmlasq_n_s8): Likewise.
14320 (__arm_vmlaq_n_s8): Likewise.
14321 (__arm_vmladavaxq_s8): Likewise.
14322 (__arm_vmladavaq_s8): Likewise.
14323 (__arm_vsriq_n_s8): Likewise.
14324 (__arm_vsliq_n_s8): Likewise.
14325 (__arm_vpselq_u16): Likewise.
14326 (__arm_vpselq_s16): Likewise.
14327 (__arm_vrev64q_m_u16): Likewise.
14328 (__arm_vqrdmlashq_n_u16): Likewise.
14329 (__arm_vqrdmlahq_n_u16): Likewise.
14330 (__arm_vqdmlahq_n_u16): Likewise.
14331 (__arm_vmvnq_m_u16): Likewise.
14332 (__arm_vmlasq_n_u16): Likewise.
14333 (__arm_vmlaq_n_u16): Likewise.
14334 (__arm_vmladavq_p_u16): Likewise.
14335 (__arm_vmladavaq_u16): Likewise.
14336 (__arm_vminvq_p_u16): Likewise.
14337 (__arm_vmaxvq_p_u16): Likewise.
14338 (__arm_vdupq_m_n_u16): Likewise.
14339 (__arm_vcmpneq_m_u16): Likewise.
14340 (__arm_vcmpneq_m_n_u16): Likewise.
14341 (__arm_vcmphiq_m_u16): Likewise.
14342 (__arm_vcmphiq_m_n_u16): Likewise.
14343 (__arm_vcmpeqq_m_u16): Likewise.
14344 (__arm_vcmpeqq_m_n_u16): Likewise.
14345 (__arm_vcmpcsq_m_u16): Likewise.
14346 (__arm_vcmpcsq_m_n_u16): Likewise.
14347 (__arm_vclzq_m_u16): Likewise.
14348 (__arm_vaddvaq_p_u16): Likewise.
14349 (__arm_vsriq_n_u16): Likewise.
14350 (__arm_vsliq_n_u16): Likewise.
14351 (__arm_vshlq_m_r_u16): Likewise.
14352 (__arm_vrshlq_m_n_u16): Likewise.
14353 (__arm_vqshlq_m_r_u16): Likewise.
14354 (__arm_vqrshlq_m_n_u16): Likewise.
14355 (__arm_vminavq_p_s16): Likewise.
14356 (__arm_vminaq_m_s16): Likewise.
14357 (__arm_vmaxavq_p_s16): Likewise.
14358 (__arm_vmaxaq_m_s16): Likewise.
14359 (__arm_vcmpneq_m_s16): Likewise.
14360 (__arm_vcmpneq_m_n_s16): Likewise.
14361 (__arm_vcmpltq_m_s16): Likewise.
14362 (__arm_vcmpltq_m_n_s16): Likewise.
14363 (__arm_vcmpleq_m_s16): Likewise.
14364 (__arm_vcmpleq_m_n_s16): Likewise.
14365 (__arm_vcmpgtq_m_s16): Likewise.
14366 (__arm_vcmpgtq_m_n_s16): Likewise.
14367 (__arm_vcmpgeq_m_s16): Likewise.
14368 (__arm_vcmpgeq_m_n_s16): Likewise.
14369 (__arm_vcmpeqq_m_s16): Likewise.
14370 (__arm_vcmpeqq_m_n_s16): Likewise.
14371 (__arm_vshlq_m_r_s16): Likewise.
14372 (__arm_vrshlq_m_n_s16): Likewise.
14373 (__arm_vrev64q_m_s16): Likewise.
14374 (__arm_vqshlq_m_r_s16): Likewise.
14375 (__arm_vqrshlq_m_n_s16): Likewise.
14376 (__arm_vqnegq_m_s16): Likewise.
14377 (__arm_vqabsq_m_s16): Likewise.
14378 (__arm_vnegq_m_s16): Likewise.
14379 (__arm_vmvnq_m_s16): Likewise.
14380 (__arm_vmlsdavxq_p_s16): Likewise.
14381 (__arm_vmlsdavq_p_s16): Likewise.
14382 (__arm_vmladavxq_p_s16): Likewise.
14383 (__arm_vmladavq_p_s16): Likewise.
14384 (__arm_vminvq_p_s16): Likewise.
14385 (__arm_vmaxvq_p_s16): Likewise.
14386 (__arm_vdupq_m_n_s16): Likewise.
14387 (__arm_vclzq_m_s16): Likewise.
14388 (__arm_vclsq_m_s16): Likewise.
14389 (__arm_vaddvaq_p_s16): Likewise.
14390 (__arm_vabsq_m_s16): Likewise.
14391 (__arm_vqrdmlsdhxq_s16): Likewise.
14392 (__arm_vqrdmlsdhq_s16): Likewise.
14393 (__arm_vqrdmlashq_n_s16): Likewise.
14394 (__arm_vqrdmlahq_n_s16): Likewise.
14395 (__arm_vqrdmladhxq_s16): Likewise.
14396 (__arm_vqrdmladhq_s16): Likewise.
14397 (__arm_vqdmlsdhxq_s16): Likewise.
14398 (__arm_vqdmlsdhq_s16): Likewise.
14399 (__arm_vqdmlahq_n_s16): Likewise.
14400 (__arm_vqdmladhxq_s16): Likewise.
14401 (__arm_vqdmladhq_s16): Likewise.
14402 (__arm_vmlsdavaxq_s16): Likewise.
14403 (__arm_vmlsdavaq_s16): Likewise.
14404 (__arm_vmlasq_n_s16): Likewise.
14405 (__arm_vmlaq_n_s16): Likewise.
14406 (__arm_vmladavaxq_s16): Likewise.
14407 (__arm_vmladavaq_s16): Likewise.
14408 (__arm_vsriq_n_s16): Likewise.
14409 (__arm_vsliq_n_s16): Likewise.
14410 (__arm_vpselq_u32): Likewise.
14411 (__arm_vpselq_s32): Likewise.
14412 (__arm_vrev64q_m_u32): Likewise.
14413 (__arm_vqrdmlashq_n_u32): Likewise.
14414 (__arm_vqrdmlahq_n_u32): Likewise.
14415 (__arm_vqdmlahq_n_u32): Likewise.
14416 (__arm_vmvnq_m_u32): Likewise.
14417 (__arm_vmlasq_n_u32): Likewise.
14418 (__arm_vmlaq_n_u32): Likewise.
14419 (__arm_vmladavq_p_u32): Likewise.
14420 (__arm_vmladavaq_u32): Likewise.
14421 (__arm_vminvq_p_u32): Likewise.
14422 (__arm_vmaxvq_p_u32): Likewise.
14423 (__arm_vdupq_m_n_u32): Likewise.
14424 (__arm_vcmpneq_m_u32): Likewise.
14425 (__arm_vcmpneq_m_n_u32): Likewise.
14426 (__arm_vcmphiq_m_u32): Likewise.
14427 (__arm_vcmphiq_m_n_u32): Likewise.
14428 (__arm_vcmpeqq_m_u32): Likewise.
14429 (__arm_vcmpeqq_m_n_u32): Likewise.
14430 (__arm_vcmpcsq_m_u32): Likewise.
14431 (__arm_vcmpcsq_m_n_u32): Likewise.
14432 (__arm_vclzq_m_u32): Likewise.
14433 (__arm_vaddvaq_p_u32): Likewise.
14434 (__arm_vsriq_n_u32): Likewise.
14435 (__arm_vsliq_n_u32): Likewise.
14436 (__arm_vshlq_m_r_u32): Likewise.
14437 (__arm_vrshlq_m_n_u32): Likewise.
14438 (__arm_vqshlq_m_r_u32): Likewise.
14439 (__arm_vqrshlq_m_n_u32): Likewise.
14440 (__arm_vminavq_p_s32): Likewise.
14441 (__arm_vminaq_m_s32): Likewise.
14442 (__arm_vmaxavq_p_s32): Likewise.
14443 (__arm_vmaxaq_m_s32): Likewise.
14444 (__arm_vcmpneq_m_s32): Likewise.
14445 (__arm_vcmpneq_m_n_s32): Likewise.
14446 (__arm_vcmpltq_m_s32): Likewise.
14447 (__arm_vcmpltq_m_n_s32): Likewise.
14448 (__arm_vcmpleq_m_s32): Likewise.
14449 (__arm_vcmpleq_m_n_s32): Likewise.
14450 (__arm_vcmpgtq_m_s32): Likewise.
14451 (__arm_vcmpgtq_m_n_s32): Likewise.
14452 (__arm_vcmpgeq_m_s32): Likewise.
14453 (__arm_vcmpgeq_m_n_s32): Likewise.
14454 (__arm_vcmpeqq_m_s32): Likewise.
14455 (__arm_vcmpeqq_m_n_s32): Likewise.
14456 (__arm_vshlq_m_r_s32): Likewise.
14457 (__arm_vrshlq_m_n_s32): Likewise.
14458 (__arm_vrev64q_m_s32): Likewise.
14459 (__arm_vqshlq_m_r_s32): Likewise.
14460 (__arm_vqrshlq_m_n_s32): Likewise.
14461 (__arm_vqnegq_m_s32): Likewise.
14462 (__arm_vqabsq_m_s32): Likewise.
14463 (__arm_vnegq_m_s32): Likewise.
14464 (__arm_vmvnq_m_s32): Likewise.
14465 (__arm_vmlsdavxq_p_s32): Likewise.
14466 (__arm_vmlsdavq_p_s32): Likewise.
14467 (__arm_vmladavxq_p_s32): Likewise.
14468 (__arm_vmladavq_p_s32): Likewise.
14469 (__arm_vminvq_p_s32): Likewise.
14470 (__arm_vmaxvq_p_s32): Likewise.
14471 (__arm_vdupq_m_n_s32): Likewise.
14472 (__arm_vclzq_m_s32): Likewise.
14473 (__arm_vclsq_m_s32): Likewise.
14474 (__arm_vaddvaq_p_s32): Likewise.
14475 (__arm_vabsq_m_s32): Likewise.
14476 (__arm_vqrdmlsdhxq_s32): Likewise.
14477 (__arm_vqrdmlsdhq_s32): Likewise.
14478 (__arm_vqrdmlashq_n_s32): Likewise.
14479 (__arm_vqrdmlahq_n_s32): Likewise.
14480 (__arm_vqrdmladhxq_s32): Likewise.
14481 (__arm_vqrdmladhq_s32): Likewise.
14482 (__arm_vqdmlsdhxq_s32): Likewise.
14483 (__arm_vqdmlsdhq_s32): Likewise.
14484 (__arm_vqdmlahq_n_s32): Likewise.
14485 (__arm_vqdmladhxq_s32): Likewise.
14486 (__arm_vqdmladhq_s32): Likewise.
14487 (__arm_vmlsdavaxq_s32): Likewise.
14488 (__arm_vmlsdavaq_s32): Likewise.
14489 (__arm_vmlasq_n_s32): Likewise.
14490 (__arm_vmlaq_n_s32): Likewise.
14491 (__arm_vmladavaxq_s32): Likewise.
14492 (__arm_vmladavaq_s32): Likewise.
14493 (__arm_vsriq_n_s32): Likewise.
14494 (__arm_vsliq_n_s32): Likewise.
14495 (__arm_vpselq_u64): Likewise.
14496 (__arm_vpselq_s64): Likewise.
14497 (vcmpneq_m_n): Define polymorphic variant.
14498 (vcmpneq_m): Likewise.
14499 (vqrdmlsdhq): Likewise.
14500 (vqrdmlsdhxq): Likewise.
14501 (vqrshlq_m_n): Likewise.
14502 (vqshlq_m_r): Likewise.
14503 (vrev64q_m): Likewise.
14504 (vrshlq_m_n): Likewise.
14505 (vshlq_m_r): Likewise.
14506 (vsliq_n): Likewise.
14507 (vsriq_n): Likewise.
14508 (vqrdmlashq_n): Likewise.
14509 (vqrdmlahq): Likewise.
14510 (vqrdmladhxq): Likewise.
14511 (vqrdmladhq): Likewise.
14512 (vqnegq_m): Likewise.
14513 (vqdmlsdhxq): Likewise.
14514 (vabsq_m): Likewise.
14515 (vclsq_m): Likewise.
14516 (vclzq_m): Likewise.
14517 (vcmpgeq_m): Likewise.
14518 (vcmpgeq_m_n): Likewise.
14519 (vdupq_m_n): Likewise.
14520 (vmaxaq_m): Likewise.
14521 (vmlaq_n): Likewise.
14522 (vmlasq_n): Likewise.
14523 (vmvnq_m): Likewise.
14524 (vnegq_m): Likewise.
14525 (vpselq): Likewise.
14526 (vqdmlahq_n): Likewise.
14527 (vqrdmlahq_n): Likewise.
14528 (vqdmlsdhq): Likewise.
14529 (vqdmladhq): Likewise.
14530 (vqabsq_m): Likewise.
14531 (vminaq_m): Likewise.
14532 (vrmlaldavhaq): Likewise.
14533 (vmlsdavxq_p): Likewise.
14534 (vmlsdavq_p): Likewise.
14535 (vmlsdavaxq): Likewise.
14536 (vmlsdavaq): Likewise.
14537 (vaddvaq_p): Likewise.
14538 (vcmpcsq_m_n): Likewise.
14539 (vcmpcsq_m): Likewise.
14540 (vcmpeqq_m_n): Likewise.
14541 (vcmpeqq_m): Likewise.
14542 (vmladavxq_p): Likewise.
14543 (vmladavq_p): Likewise.
14544 (vmladavaxq): Likewise.
14545 (vmladavaq): Likewise.
14546 (vminvq_p): Likewise.
14547 (vminavq_p): Likewise.
14548 (vmaxvq_p): Likewise.
14549 (vmaxavq_p): Likewise.
14550 (vcmpltq_m_n): Likewise.
14551 (vcmpltq_m): Likewise.
14552 (vcmpleq_m): Likewise.
14553 (vcmpleq_m_n): Likewise.
14554 (vcmphiq_m_n): Likewise.
14555 (vcmphiq_m): Likewise.
14556 (vcmpgtq_m_n): Likewise.
14557 (vcmpgtq_m): Likewise.
14558 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
14560 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
14561 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
14562 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
14563 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
14564 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
14565 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
14566 * config/arm/constraints.md (Rc): Define constraint to check constant is
14567 in the range of 0 to 15.
14568 (Re): Define constraint to check constant is in the range of 0 to 31.
14569 * config/arm/mve.md (VADDVAQ_P): Define iterator.
14570 (VCLZQ_M): Likewise.
14571 (VCMPEQQ_M_N): Likewise.
14572 (VCMPEQQ_M): Likewise.
14573 (VCMPNEQ_M_N): Likewise.
14574 (VCMPNEQ_M): Likewise.
14575 (VDUPQ_M_N): Likewise.
14576 (VMAXVQ_P): Likewise.
14577 (VMINVQ_P): Likewise.
14578 (VMLADAVAQ): Likewise.
14579 (VMLADAVQ_P): Likewise.
14580 (VMLAQ_N): Likewise.
14581 (VMLASQ_N): Likewise.
14582 (VMVNQ_M): Likewise.
14583 (VPSELQ): Likewise.
14584 (VQDMLAHQ_N): Likewise.
14585 (VQRDMLAHQ_N): Likewise.
14586 (VQRDMLASHQ_N): Likewise.
14587 (VQRSHLQ_M_N): Likewise.
14588 (VQSHLQ_M_R): Likewise.
14589 (VREV64Q_M): Likewise.
14590 (VRSHLQ_M_N): Likewise.
14591 (VSHLQ_M_R): Likewise.
14592 (VSLIQ_N): Likewise.
14593 (VSRIQ_N): Likewise.
14594 (mve_vabsq_m_s<mode>): Define RTL pattern.
14595 (mve_vaddvaq_p_<supf><mode>): Likewise.
14596 (mve_vclsq_m_s<mode>): Likewise.
14597 (mve_vclzq_m_<supf><mode>): Likewise.
14598 (mve_vcmpcsq_m_n_u<mode>): Likewise.
14599 (mve_vcmpcsq_m_u<mode>): Likewise.
14600 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
14601 (mve_vcmpeqq_m_<supf><mode>): Likewise.
14602 (mve_vcmpgeq_m_n_s<mode>): Likewise.
14603 (mve_vcmpgeq_m_s<mode>): Likewise.
14604 (mve_vcmpgtq_m_n_s<mode>): Likewise.
14605 (mve_vcmpgtq_m_s<mode>): Likewise.
14606 (mve_vcmphiq_m_n_u<mode>): Likewise.
14607 (mve_vcmphiq_m_u<mode>): Likewise.
14608 (mve_vcmpleq_m_n_s<mode>): Likewise.
14609 (mve_vcmpleq_m_s<mode>): Likewise.
14610 (mve_vcmpltq_m_n_s<mode>): Likewise.
14611 (mve_vcmpltq_m_s<mode>): Likewise.
14612 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
14613 (mve_vcmpneq_m_<supf><mode>): Likewise.
14614 (mve_vdupq_m_n_<supf><mode>): Likewise.
14615 (mve_vmaxaq_m_s<mode>): Likewise.
14616 (mve_vmaxavq_p_s<mode>): Likewise.
14617 (mve_vmaxvq_p_<supf><mode>): Likewise.
14618 (mve_vminaq_m_s<mode>): Likewise.
14619 (mve_vminavq_p_s<mode>): Likewise.
14620 (mve_vminvq_p_<supf><mode>): Likewise.
14621 (mve_vmladavaq_<supf><mode>): Likewise.
14622 (mve_vmladavq_p_<supf><mode>): Likewise.
14623 (mve_vmladavxq_p_s<mode>): Likewise.
14624 (mve_vmlaq_n_<supf><mode>): Likewise.
14625 (mve_vmlasq_n_<supf><mode>): Likewise.
14626 (mve_vmlsdavq_p_s<mode>): Likewise.
14627 (mve_vmlsdavxq_p_s<mode>): Likewise.
14628 (mve_vmvnq_m_<supf><mode>): Likewise.
14629 (mve_vnegq_m_s<mode>): Likewise.
14630 (mve_vpselq_<supf><mode>): Likewise.
14631 (mve_vqabsq_m_s<mode>): Likewise.
14632 (mve_vqdmlahq_n_<supf><mode>): Likewise.
14633 (mve_vqnegq_m_s<mode>): Likewise.
14634 (mve_vqrdmladhq_s<mode>): Likewise.
14635 (mve_vqrdmladhxq_s<mode>): Likewise.
14636 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
14637 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
14638 (mve_vqrdmlsdhq_s<mode>): Likewise.
14639 (mve_vqrdmlsdhxq_s<mode>): Likewise.
14640 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
14641 (mve_vqshlq_m_r_<supf><mode>): Likewise.
14642 (mve_vrev64q_m_<supf><mode>): Likewise.
14643 (mve_vrshlq_m_n_<supf><mode>): Likewise.
14644 (mve_vshlq_m_r_<supf><mode>): Likewise.
14645 (mve_vsliq_n_<supf><mode>): Likewise.
14646 (mve_vsriq_n_<supf><mode>): Likewise.
14647 (mve_vqdmlsdhxq_s<mode>): Likewise.
14648 (mve_vqdmlsdhq_s<mode>): Likewise.
14649 (mve_vqdmladhxq_s<mode>): Likewise.
14650 (mve_vqdmladhq_s<mode>): Likewise.
14651 (mve_vmlsdavaxq_s<mode>): Likewise.
14652 (mve_vmlsdavaq_s<mode>): Likewise.
14653 (mve_vmladavaxq_s<mode>): Likewise.
14654 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
14655 matching constraint Rc.
14656 (mve_imm_31): Define predicate to check the matching constraint Re.
14658 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
14660 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
14661 (vec_cmp<mode>di_dup): Likewise.
14662 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
14664 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
14666 * config/gcn/gcn-valu.md (COND_MODE): Delete.
14667 (COND_INT_MODE): Delete.
14668 (cond_op): Add "mult".
14669 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
14670 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
14672 2020-03-18 Richard Biener <rguenther@suse.de>
14674 PR middle-end/94206
14675 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
14676 partial int modes or not mode-precision integer types for
14679 2020-03-18 Jakub Jelinek <jakub@redhat.com>
14681 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
14683 * config/arc/arc.c (frame_stack_add): Likewise.
14684 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
14686 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
14687 * tree-ssa-strlen.h (handle_printf_call): Likewise.
14688 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
14689 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
14691 2020-03-18 Duan bo <duanbo3@huawei.com>
14694 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
14695 (@ldr_got_tiny_<mode>): New pattern.
14696 (ldr_got_tiny_sidi): Likewise.
14697 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
14698 them to handle SYMBOL_TINY_GOT for ILP32.
14700 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
14702 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
14703 call-preserved for SVE PCS functions.
14704 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
14705 Optimize the case in which there are no following vector save slots.
14707 2020-03-18 Richard Biener <rguenther@suse.de>
14709 PR middle-end/94188
14710 * fold-const.c (build_fold_addr_expr): Convert address to
14712 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
14713 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
14714 to build the ADDR_EXPR which we don't really want to simplify.
14715 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
14716 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
14717 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
14718 (simplify_builtin_call): Strip useless type conversions.
14719 * tree-ssa-strlen.c (new_strinfo): Likewise.
14721 2020-03-17 Alexey Neyman <stilor@att.net>
14724 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
14725 the debug level is terse and the declaration is public. Do not
14726 generate type info.
14727 (dwarf2out_decl): Same.
14728 (add_type_attribute): Return immediately if debug level is
14731 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
14733 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
14735 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14736 Mihail Ionescu <mihail.ionescu@arm.com>
14737 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14739 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
14740 Define qualifier for ternary operands.
14741 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14742 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14743 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14744 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14745 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14746 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14747 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14748 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
14749 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14750 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14751 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14752 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14753 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
14754 * config/arm/arm_mve.h (vabavq_s8): Define macro.
14755 (vabavq_s16): Likewise.
14756 (vabavq_s32): Likewise.
14757 (vbicq_m_n_s16): Likewise.
14758 (vbicq_m_n_s32): Likewise.
14759 (vbicq_m_n_u16): Likewise.
14760 (vbicq_m_n_u32): Likewise.
14761 (vcmpeqq_m_f16): Likewise.
14762 (vcmpeqq_m_f32): Likewise.
14763 (vcvtaq_m_s16_f16): Likewise.
14764 (vcvtaq_m_u16_f16): Likewise.
14765 (vcvtaq_m_s32_f32): Likewise.
14766 (vcvtaq_m_u32_f32): Likewise.
14767 (vcvtq_m_f16_s16): Likewise.
14768 (vcvtq_m_f16_u16): Likewise.
14769 (vcvtq_m_f32_s32): Likewise.
14770 (vcvtq_m_f32_u32): Likewise.
14771 (vqrshrnbq_n_s16): Likewise.
14772 (vqrshrnbq_n_u16): Likewise.
14773 (vqrshrnbq_n_s32): Likewise.
14774 (vqrshrnbq_n_u32): Likewise.
14775 (vqrshrunbq_n_s16): Likewise.
14776 (vqrshrunbq_n_s32): Likewise.
14777 (vrmlaldavhaq_s32): Likewise.
14778 (vrmlaldavhaq_u32): Likewise.
14779 (vshlcq_s8): Likewise.
14780 (vshlcq_u8): Likewise.
14781 (vshlcq_s16): Likewise.
14782 (vshlcq_u16): Likewise.
14783 (vshlcq_s32): Likewise.
14784 (vshlcq_u32): Likewise.
14785 (vabavq_u8): Likewise.
14786 (vabavq_u16): Likewise.
14787 (vabavq_u32): Likewise.
14788 (__arm_vabavq_s8): Define intrinsic.
14789 (__arm_vabavq_s16): Likewise.
14790 (__arm_vabavq_s32): Likewise.
14791 (__arm_vabavq_u8): Likewise.
14792 (__arm_vabavq_u16): Likewise.
14793 (__arm_vabavq_u32): Likewise.
14794 (__arm_vbicq_m_n_s16): Likewise.
14795 (__arm_vbicq_m_n_s32): Likewise.
14796 (__arm_vbicq_m_n_u16): Likewise.
14797 (__arm_vbicq_m_n_u32): Likewise.
14798 (__arm_vqrshrnbq_n_s16): Likewise.
14799 (__arm_vqrshrnbq_n_u16): Likewise.
14800 (__arm_vqrshrnbq_n_s32): Likewise.
14801 (__arm_vqrshrnbq_n_u32): Likewise.
14802 (__arm_vqrshrunbq_n_s16): Likewise.
14803 (__arm_vqrshrunbq_n_s32): Likewise.
14804 (__arm_vrmlaldavhaq_s32): Likewise.
14805 (__arm_vrmlaldavhaq_u32): Likewise.
14806 (__arm_vshlcq_s8): Likewise.
14807 (__arm_vshlcq_u8): Likewise.
14808 (__arm_vshlcq_s16): Likewise.
14809 (__arm_vshlcq_u16): Likewise.
14810 (__arm_vshlcq_s32): Likewise.
14811 (__arm_vshlcq_u32): Likewise.
14812 (__arm_vcmpeqq_m_f16): Likewise.
14813 (__arm_vcmpeqq_m_f32): Likewise.
14814 (__arm_vcvtaq_m_s16_f16): Likewise.
14815 (__arm_vcvtaq_m_u16_f16): Likewise.
14816 (__arm_vcvtaq_m_s32_f32): Likewise.
14817 (__arm_vcvtaq_m_u32_f32): Likewise.
14818 (__arm_vcvtq_m_f16_s16): Likewise.
14819 (__arm_vcvtq_m_f16_u16): Likewise.
14820 (__arm_vcvtq_m_f32_s32): Likewise.
14821 (__arm_vcvtq_m_f32_u32): Likewise.
14822 (vcvtaq_m): Define polymorphic variant.
14823 (vcvtq_m): Likewise.
14824 (vabavq): Likewise.
14825 (vshlcq): Likewise.
14826 (vbicq_m_n): Likewise.
14827 (vqrshrnbq_n): Likewise.
14828 (vqrshrunbq_n): Likewise.
14829 * config/arm/arm_mve_builtins.def
14830 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
14831 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14832 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14833 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14834 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14835 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14836 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14837 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14838 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
14839 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14840 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14841 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14842 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14843 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
14844 * config/arm/mve.md (VBICQ_M_N): Define iterator.
14845 (VCVTAQ_M): Likewise.
14846 (VCVTQ_M_TO_F): Likewise.
14847 (VQRSHRNBQ_N): Likewise.
14848 (VABAVQ): Likewise.
14849 (VSHLCQ): Likewise.
14850 (VRMLALDAVHAQ): Likewise.
14851 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
14852 (mve_vcmpeqq_m_f<mode>): Likewise.
14853 (mve_vcvtaq_m_<supf><mode>): Likewise.
14854 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
14855 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
14856 (mve_vqrshrunbq_n_s<mode>): Likewise.
14857 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
14858 (mve_vabavq_<supf><mode>): Likewise.
14859 (mve_vshlcq_<supf><mode>): Likewise.
14860 (mve_vshlcq_<supf><mode>): Likewise.
14861 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
14862 (mve_vshlcq_carry_<supf><mode>): Likewise.
14864 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14865 Mihail Ionescu <mihail.ionescu@arm.com>
14866 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14868 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
14869 (vqmovnbq_u16): Likewise.
14870 (vmulltq_poly_p8): Likewise.
14871 (vmullbq_poly_p8): Likewise.
14872 (vmovntq_u16): Likewise.
14873 (vmovnbq_u16): Likewise.
14874 (vmlaldavxq_u16): Likewise.
14875 (vmlaldavq_u16): Likewise.
14876 (vqmovuntq_s16): Likewise.
14877 (vqmovunbq_s16): Likewise.
14878 (vshlltq_n_u8): Likewise.
14879 (vshllbq_n_u8): Likewise.
14880 (vorrq_n_u16): Likewise.
14881 (vbicq_n_u16): Likewise.
14882 (vcmpneq_n_f16): Likewise.
14883 (vcmpneq_f16): Likewise.
14884 (vcmpltq_n_f16): Likewise.
14885 (vcmpltq_f16): Likewise.
14886 (vcmpleq_n_f16): Likewise.
14887 (vcmpleq_f16): Likewise.
14888 (vcmpgtq_n_f16): Likewise.
14889 (vcmpgtq_f16): Likewise.
14890 (vcmpgeq_n_f16): Likewise.
14891 (vcmpgeq_f16): Likewise.
14892 (vcmpeqq_n_f16): Likewise.
14893 (vcmpeqq_f16): Likewise.
14894 (vsubq_f16): Likewise.
14895 (vqmovntq_s16): Likewise.
14896 (vqmovnbq_s16): Likewise.
14897 (vqdmulltq_s16): Likewise.
14898 (vqdmulltq_n_s16): Likewise.
14899 (vqdmullbq_s16): Likewise.
14900 (vqdmullbq_n_s16): Likewise.
14901 (vorrq_f16): Likewise.
14902 (vornq_f16): Likewise.
14903 (vmulq_n_f16): Likewise.
14904 (vmulq_f16): Likewise.
14905 (vmovntq_s16): Likewise.
14906 (vmovnbq_s16): Likewise.
14907 (vmlsldavxq_s16): Likewise.
14908 (vmlsldavq_s16): Likewise.
14909 (vmlaldavxq_s16): Likewise.
14910 (vmlaldavq_s16): Likewise.
14911 (vminnmvq_f16): Likewise.
14912 (vminnmq_f16): Likewise.
14913 (vminnmavq_f16): Likewise.
14914 (vminnmaq_f16): Likewise.
14915 (vmaxnmvq_f16): Likewise.
14916 (vmaxnmq_f16): Likewise.
14917 (vmaxnmavq_f16): Likewise.
14918 (vmaxnmaq_f16): Likewise.
14919 (veorq_f16): Likewise.
14920 (vcmulq_rot90_f16): Likewise.
14921 (vcmulq_rot270_f16): Likewise.
14922 (vcmulq_rot180_f16): Likewise.
14923 (vcmulq_f16): Likewise.
14924 (vcaddq_rot90_f16): Likewise.
14925 (vcaddq_rot270_f16): Likewise.
14926 (vbicq_f16): Likewise.
14927 (vandq_f16): Likewise.
14928 (vaddq_n_f16): Likewise.
14929 (vabdq_f16): Likewise.
14930 (vshlltq_n_s8): Likewise.
14931 (vshllbq_n_s8): Likewise.
14932 (vorrq_n_s16): Likewise.
14933 (vbicq_n_s16): Likewise.
14934 (vqmovntq_u32): Likewise.
14935 (vqmovnbq_u32): Likewise.
14936 (vmulltq_poly_p16): Likewise.
14937 (vmullbq_poly_p16): Likewise.
14938 (vmovntq_u32): Likewise.
14939 (vmovnbq_u32): Likewise.
14940 (vmlaldavxq_u32): Likewise.
14941 (vmlaldavq_u32): Likewise.
14942 (vqmovuntq_s32): Likewise.
14943 (vqmovunbq_s32): Likewise.
14944 (vshlltq_n_u16): Likewise.
14945 (vshllbq_n_u16): Likewise.
14946 (vorrq_n_u32): Likewise.
14947 (vbicq_n_u32): Likewise.
14948 (vcmpneq_n_f32): Likewise.
14949 (vcmpneq_f32): Likewise.
14950 (vcmpltq_n_f32): Likewise.
14951 (vcmpltq_f32): Likewise.
14952 (vcmpleq_n_f32): Likewise.
14953 (vcmpleq_f32): Likewise.
14954 (vcmpgtq_n_f32): Likewise.
14955 (vcmpgtq_f32): Likewise.
14956 (vcmpgeq_n_f32): Likewise.
14957 (vcmpgeq_f32): Likewise.
14958 (vcmpeqq_n_f32): Likewise.
14959 (vcmpeqq_f32): Likewise.
14960 (vsubq_f32): Likewise.
14961 (vqmovntq_s32): Likewise.
14962 (vqmovnbq_s32): Likewise.
14963 (vqdmulltq_s32): Likewise.
14964 (vqdmulltq_n_s32): Likewise.
14965 (vqdmullbq_s32): Likewise.
14966 (vqdmullbq_n_s32): Likewise.
14967 (vorrq_f32): Likewise.
14968 (vornq_f32): Likewise.
14969 (vmulq_n_f32): Likewise.
14970 (vmulq_f32): Likewise.
14971 (vmovntq_s32): Likewise.
14972 (vmovnbq_s32): Likewise.
14973 (vmlsldavxq_s32): Likewise.
14974 (vmlsldavq_s32): Likewise.
14975 (vmlaldavxq_s32): Likewise.
14976 (vmlaldavq_s32): Likewise.
14977 (vminnmvq_f32): Likewise.
14978 (vminnmq_f32): Likewise.
14979 (vminnmavq_f32): Likewise.
14980 (vminnmaq_f32): Likewise.
14981 (vmaxnmvq_f32): Likewise.
14982 (vmaxnmq_f32): Likewise.
14983 (vmaxnmavq_f32): Likewise.
14984 (vmaxnmaq_f32): Likewise.
14985 (veorq_f32): Likewise.
14986 (vcmulq_rot90_f32): Likewise.
14987 (vcmulq_rot270_f32): Likewise.
14988 (vcmulq_rot180_f32): Likewise.
14989 (vcmulq_f32): Likewise.
14990 (vcaddq_rot90_f32): Likewise.
14991 (vcaddq_rot270_f32): Likewise.
14992 (vbicq_f32): Likewise.
14993 (vandq_f32): Likewise.
14994 (vaddq_n_f32): Likewise.
14995 (vabdq_f32): Likewise.
14996 (vshlltq_n_s16): Likewise.
14997 (vshllbq_n_s16): Likewise.
14998 (vorrq_n_s32): Likewise.
14999 (vbicq_n_s32): Likewise.
15000 (vrmlaldavhq_u32): Likewise.
15001 (vctp8q_m): Likewise.
15002 (vctp64q_m): Likewise.
15003 (vctp32q_m): Likewise.
15004 (vctp16q_m): Likewise.
15005 (vaddlvaq_u32): Likewise.
15006 (vrmlsldavhxq_s32): Likewise.
15007 (vrmlsldavhq_s32): Likewise.
15008 (vrmlaldavhxq_s32): Likewise.
15009 (vrmlaldavhq_s32): Likewise.
15010 (vcvttq_f16_f32): Likewise.
15011 (vcvtbq_f16_f32): Likewise.
15012 (vaddlvaq_s32): Likewise.
15013 (__arm_vqmovntq_u16): Define intrinsic.
15014 (__arm_vqmovnbq_u16): Likewise.
15015 (__arm_vmulltq_poly_p8): Likewise.
15016 (__arm_vmullbq_poly_p8): Likewise.
15017 (__arm_vmovntq_u16): Likewise.
15018 (__arm_vmovnbq_u16): Likewise.
15019 (__arm_vmlaldavxq_u16): Likewise.
15020 (__arm_vmlaldavq_u16): Likewise.
15021 (__arm_vqmovuntq_s16): Likewise.
15022 (__arm_vqmovunbq_s16): Likewise.
15023 (__arm_vshlltq_n_u8): Likewise.
15024 (__arm_vshllbq_n_u8): Likewise.
15025 (__arm_vorrq_n_u16): Likewise.
15026 (__arm_vbicq_n_u16): Likewise.
15027 (__arm_vcmpneq_n_f16): Likewise.
15028 (__arm_vcmpneq_f16): Likewise.
15029 (__arm_vcmpltq_n_f16): Likewise.
15030 (__arm_vcmpltq_f16): Likewise.
15031 (__arm_vcmpleq_n_f16): Likewise.
15032 (__arm_vcmpleq_f16): Likewise.
15033 (__arm_vcmpgtq_n_f16): Likewise.
15034 (__arm_vcmpgtq_f16): Likewise.
15035 (__arm_vcmpgeq_n_f16): Likewise.
15036 (__arm_vcmpgeq_f16): Likewise.
15037 (__arm_vcmpeqq_n_f16): Likewise.
15038 (__arm_vcmpeqq_f16): Likewise.
15039 (__arm_vsubq_f16): Likewise.
15040 (__arm_vqmovntq_s16): Likewise.
15041 (__arm_vqmovnbq_s16): Likewise.
15042 (__arm_vqdmulltq_s16): Likewise.
15043 (__arm_vqdmulltq_n_s16): Likewise.
15044 (__arm_vqdmullbq_s16): Likewise.
15045 (__arm_vqdmullbq_n_s16): Likewise.
15046 (__arm_vorrq_f16): Likewise.
15047 (__arm_vornq_f16): Likewise.
15048 (__arm_vmulq_n_f16): Likewise.
15049 (__arm_vmulq_f16): Likewise.
15050 (__arm_vmovntq_s16): Likewise.
15051 (__arm_vmovnbq_s16): Likewise.
15052 (__arm_vmlsldavxq_s16): Likewise.
15053 (__arm_vmlsldavq_s16): Likewise.
15054 (__arm_vmlaldavxq_s16): Likewise.
15055 (__arm_vmlaldavq_s16): Likewise.
15056 (__arm_vminnmvq_f16): Likewise.
15057 (__arm_vminnmq_f16): Likewise.
15058 (__arm_vminnmavq_f16): Likewise.
15059 (__arm_vminnmaq_f16): Likewise.
15060 (__arm_vmaxnmvq_f16): Likewise.
15061 (__arm_vmaxnmq_f16): Likewise.
15062 (__arm_vmaxnmavq_f16): Likewise.
15063 (__arm_vmaxnmaq_f16): Likewise.
15064 (__arm_veorq_f16): Likewise.
15065 (__arm_vcmulq_rot90_f16): Likewise.
15066 (__arm_vcmulq_rot270_f16): Likewise.
15067 (__arm_vcmulq_rot180_f16): Likewise.
15068 (__arm_vcmulq_f16): Likewise.
15069 (__arm_vcaddq_rot90_f16): Likewise.
15070 (__arm_vcaddq_rot270_f16): Likewise.
15071 (__arm_vbicq_f16): Likewise.
15072 (__arm_vandq_f16): Likewise.
15073 (__arm_vaddq_n_f16): Likewise.
15074 (__arm_vabdq_f16): Likewise.
15075 (__arm_vshlltq_n_s8): Likewise.
15076 (__arm_vshllbq_n_s8): Likewise.
15077 (__arm_vorrq_n_s16): Likewise.
15078 (__arm_vbicq_n_s16): Likewise.
15079 (__arm_vqmovntq_u32): Likewise.
15080 (__arm_vqmovnbq_u32): Likewise.
15081 (__arm_vmulltq_poly_p16): Likewise.
15082 (__arm_vmullbq_poly_p16): Likewise.
15083 (__arm_vmovntq_u32): Likewise.
15084 (__arm_vmovnbq_u32): Likewise.
15085 (__arm_vmlaldavxq_u32): Likewise.
15086 (__arm_vmlaldavq_u32): Likewise.
15087 (__arm_vqmovuntq_s32): Likewise.
15088 (__arm_vqmovunbq_s32): Likewise.
15089 (__arm_vshlltq_n_u16): Likewise.
15090 (__arm_vshllbq_n_u16): Likewise.
15091 (__arm_vorrq_n_u32): Likewise.
15092 (__arm_vbicq_n_u32): Likewise.
15093 (__arm_vcmpneq_n_f32): Likewise.
15094 (__arm_vcmpneq_f32): Likewise.
15095 (__arm_vcmpltq_n_f32): Likewise.
15096 (__arm_vcmpltq_f32): Likewise.
15097 (__arm_vcmpleq_n_f32): Likewise.
15098 (__arm_vcmpleq_f32): Likewise.
15099 (__arm_vcmpgtq_n_f32): Likewise.
15100 (__arm_vcmpgtq_f32): Likewise.
15101 (__arm_vcmpgeq_n_f32): Likewise.
15102 (__arm_vcmpgeq_f32): Likewise.
15103 (__arm_vcmpeqq_n_f32): Likewise.
15104 (__arm_vcmpeqq_f32): Likewise.
15105 (__arm_vsubq_f32): Likewise.
15106 (__arm_vqmovntq_s32): Likewise.
15107 (__arm_vqmovnbq_s32): Likewise.
15108 (__arm_vqdmulltq_s32): Likewise.
15109 (__arm_vqdmulltq_n_s32): Likewise.
15110 (__arm_vqdmullbq_s32): Likewise.
15111 (__arm_vqdmullbq_n_s32): Likewise.
15112 (__arm_vorrq_f32): Likewise.
15113 (__arm_vornq_f32): Likewise.
15114 (__arm_vmulq_n_f32): Likewise.
15115 (__arm_vmulq_f32): Likewise.
15116 (__arm_vmovntq_s32): Likewise.
15117 (__arm_vmovnbq_s32): Likewise.
15118 (__arm_vmlsldavxq_s32): Likewise.
15119 (__arm_vmlsldavq_s32): Likewise.
15120 (__arm_vmlaldavxq_s32): Likewise.
15121 (__arm_vmlaldavq_s32): Likewise.
15122 (__arm_vminnmvq_f32): Likewise.
15123 (__arm_vminnmq_f32): Likewise.
15124 (__arm_vminnmavq_f32): Likewise.
15125 (__arm_vminnmaq_f32): Likewise.
15126 (__arm_vmaxnmvq_f32): Likewise.
15127 (__arm_vmaxnmq_f32): Likewise.
15128 (__arm_vmaxnmavq_f32): Likewise.
15129 (__arm_vmaxnmaq_f32): Likewise.
15130 (__arm_veorq_f32): Likewise.
15131 (__arm_vcmulq_rot90_f32): Likewise.
15132 (__arm_vcmulq_rot270_f32): Likewise.
15133 (__arm_vcmulq_rot180_f32): Likewise.
15134 (__arm_vcmulq_f32): Likewise.
15135 (__arm_vcaddq_rot90_f32): Likewise.
15136 (__arm_vcaddq_rot270_f32): Likewise.
15137 (__arm_vbicq_f32): Likewise.
15138 (__arm_vandq_f32): Likewise.
15139 (__arm_vaddq_n_f32): Likewise.
15140 (__arm_vabdq_f32): Likewise.
15141 (__arm_vshlltq_n_s16): Likewise.
15142 (__arm_vshllbq_n_s16): Likewise.
15143 (__arm_vorrq_n_s32): Likewise.
15144 (__arm_vbicq_n_s32): Likewise.
15145 (__arm_vrmlaldavhq_u32): Likewise.
15146 (__arm_vctp8q_m): Likewise.
15147 (__arm_vctp64q_m): Likewise.
15148 (__arm_vctp32q_m): Likewise.
15149 (__arm_vctp16q_m): Likewise.
15150 (__arm_vaddlvaq_u32): Likewise.
15151 (__arm_vrmlsldavhxq_s32): Likewise.
15152 (__arm_vrmlsldavhq_s32): Likewise.
15153 (__arm_vrmlaldavhxq_s32): Likewise.
15154 (__arm_vrmlaldavhq_s32): Likewise.
15155 (__arm_vcvttq_f16_f32): Likewise.
15156 (__arm_vcvtbq_f16_f32): Likewise.
15157 (__arm_vaddlvaq_s32): Likewise.
15158 (vst4q): Define polymorphic variant.
15159 (vrndxq): Likewise.
15161 (vrndpq): Likewise.
15162 (vrndnq): Likewise.
15163 (vrndmq): Likewise.
15164 (vrndaq): Likewise.
15165 (vrev64q): Likewise.
15167 (vdupq_n): Likewise.
15169 (vrev32q): Likewise.
15170 (vcvtbq_f32): Likewise.
15171 (vcvttq_f32): Likewise.
15173 (vsubq_n): Likewise.
15174 (vbrsrq_n): Likewise.
15175 (vcvtq_n): Likewise.
15179 (vaddq_n): Likewise.
15183 (vmulq_n): Likewise.
15185 (vcaddq_rot270): Likewise.
15186 (vcmpeqq_n): Likewise.
15187 (vcmpeqq): Likewise.
15188 (vcaddq_rot90): Likewise.
15189 (vcmpgeq_n): Likewise.
15190 (vcmpgeq): Likewise.
15191 (vcmpgtq_n): Likewise.
15192 (vcmpgtq): Likewise.
15193 (vcmpgtq): Likewise.
15194 (vcmpleq_n): Likewise.
15195 (vcmpleq_n): Likewise.
15196 (vcmpleq): Likewise.
15197 (vcmpleq): Likewise.
15198 (vcmpltq_n): Likewise.
15199 (vcmpltq_n): Likewise.
15200 (vcmpltq): Likewise.
15201 (vcmpltq): Likewise.
15202 (vcmpneq_n): Likewise.
15203 (vcmpneq_n): Likewise.
15204 (vcmpneq): Likewise.
15205 (vcmpneq): Likewise.
15206 (vcmulq): Likewise.
15207 (vcmulq): Likewise.
15208 (vcmulq_rot180): Likewise.
15209 (vcmulq_rot180): Likewise.
15210 (vcmulq_rot270): Likewise.
15211 (vcmulq_rot270): Likewise.
15212 (vcmulq_rot90): Likewise.
15213 (vcmulq_rot90): Likewise.
15216 (vmaxnmaq): Likewise.
15217 (vmaxnmaq): Likewise.
15218 (vmaxnmavq): Likewise.
15219 (vmaxnmavq): Likewise.
15220 (vmaxnmq): Likewise.
15221 (vmaxnmq): Likewise.
15222 (vmaxnmvq): Likewise.
15223 (vmaxnmvq): Likewise.
15224 (vminnmaq): Likewise.
15225 (vminnmaq): Likewise.
15226 (vminnmavq): Likewise.
15227 (vminnmavq): Likewise.
15228 (vminnmq): Likewise.
15229 (vminnmq): Likewise.
15230 (vminnmvq): Likewise.
15231 (vminnmvq): Likewise.
15232 (vbicq_n): Likewise.
15233 (vqmovntq): Likewise.
15234 (vqmovntq): Likewise.
15235 (vqmovnbq): Likewise.
15236 (vqmovnbq): Likewise.
15237 (vmulltq_poly): Likewise.
15238 (vmulltq_poly): Likewise.
15239 (vmullbq_poly): Likewise.
15240 (vmullbq_poly): Likewise.
15241 (vmovntq): Likewise.
15242 (vmovntq): Likewise.
15243 (vmovnbq): Likewise.
15244 (vmovnbq): Likewise.
15245 (vmlaldavxq): Likewise.
15246 (vmlaldavxq): Likewise.
15247 (vqmovuntq): Likewise.
15248 (vqmovuntq): Likewise.
15249 (vshlltq_n): Likewise.
15250 (vshlltq_n): Likewise.
15251 (vshllbq_n): Likewise.
15252 (vshllbq_n): Likewise.
15253 (vorrq_n): Likewise.
15254 (vorrq_n): Likewise.
15255 (vmlaldavq): Likewise.
15256 (vmlaldavq): Likewise.
15257 (vqmovunbq): Likewise.
15258 (vqmovunbq): Likewise.
15259 (vqdmulltq_n): Likewise.
15260 (vqdmulltq_n): Likewise.
15261 (vqdmulltq): Likewise.
15262 (vqdmulltq): Likewise.
15263 (vqdmullbq_n): Likewise.
15264 (vqdmullbq_n): Likewise.
15265 (vqdmullbq): Likewise.
15266 (vqdmullbq): Likewise.
15267 (vaddlvaq): Likewise.
15268 (vaddlvaq): Likewise.
15269 (vrmlaldavhq): Likewise.
15270 (vrmlaldavhq): Likewise.
15271 (vrmlaldavhxq): Likewise.
15272 (vrmlaldavhxq): Likewise.
15273 (vrmlsldavhq): Likewise.
15274 (vrmlsldavhq): Likewise.
15275 (vrmlsldavhxq): Likewise.
15276 (vrmlsldavhxq): Likewise.
15277 (vmlsldavxq): Likewise.
15278 (vmlsldavxq): Likewise.
15279 (vmlsldavq): Likewise.
15280 (vmlsldavq): Likewise.
15281 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
15282 (BINOP_NONE_NONE_NONE): Likewise.
15283 (BINOP_UNONE_NONE_NONE): Likewise.
15284 (BINOP_UNONE_UNONE_IMM): Likewise.
15285 (BINOP_UNONE_UNONE_NONE): Likewise.
15286 (BINOP_UNONE_UNONE_UNONE): Likewise.
15287 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
15288 (mve_vaddlvaq_<supf>v4si): Likewise.
15289 (mve_vaddq_n_f<mode>): Likewise.
15290 (mve_vandq_f<mode>): Likewise.
15291 (mve_vbicq_f<mode>): Likewise.
15292 (mve_vbicq_n_<supf><mode>): Likewise.
15293 (mve_vcaddq_rot270_f<mode>): Likewise.
15294 (mve_vcaddq_rot90_f<mode>): Likewise.
15295 (mve_vcmpeqq_f<mode>): Likewise.
15296 (mve_vcmpeqq_n_f<mode>): Likewise.
15297 (mve_vcmpgeq_f<mode>): Likewise.
15298 (mve_vcmpgeq_n_f<mode>): Likewise.
15299 (mve_vcmpgtq_f<mode>): Likewise.
15300 (mve_vcmpgtq_n_f<mode>): Likewise.
15301 (mve_vcmpleq_f<mode>): Likewise.
15302 (mve_vcmpleq_n_f<mode>): Likewise.
15303 (mve_vcmpltq_f<mode>): Likewise.
15304 (mve_vcmpltq_n_f<mode>): Likewise.
15305 (mve_vcmpneq_f<mode>): Likewise.
15306 (mve_vcmpneq_n_f<mode>): Likewise.
15307 (mve_vcmulq_f<mode>): Likewise.
15308 (mve_vcmulq_rot180_f<mode>): Likewise.
15309 (mve_vcmulq_rot270_f<mode>): Likewise.
15310 (mve_vcmulq_rot90_f<mode>): Likewise.
15311 (mve_vctp<mode1>q_mhi): Likewise.
15312 (mve_vcvtbq_f16_f32v8hf): Likewise.
15313 (mve_vcvttq_f16_f32v8hf): Likewise.
15314 (mve_veorq_f<mode>): Likewise.
15315 (mve_vmaxnmaq_f<mode>): Likewise.
15316 (mve_vmaxnmavq_f<mode>): Likewise.
15317 (mve_vmaxnmq_f<mode>): Likewise.
15318 (mve_vmaxnmvq_f<mode>): Likewise.
15319 (mve_vminnmaq_f<mode>): Likewise.
15320 (mve_vminnmavq_f<mode>): Likewise.
15321 (mve_vminnmq_f<mode>): Likewise.
15322 (mve_vminnmvq_f<mode>): Likewise.
15323 (mve_vmlaldavq_<supf><mode>): Likewise.
15324 (mve_vmlaldavxq_<supf><mode>): Likewise.
15325 (mve_vmlsldavq_s<mode>): Likewise.
15326 (mve_vmlsldavxq_s<mode>): Likewise.
15327 (mve_vmovnbq_<supf><mode>): Likewise.
15328 (mve_vmovntq_<supf><mode>): Likewise.
15329 (mve_vmulq_f<mode>): Likewise.
15330 (mve_vmulq_n_f<mode>): Likewise.
15331 (mve_vornq_f<mode>): Likewise.
15332 (mve_vorrq_f<mode>): Likewise.
15333 (mve_vorrq_n_<supf><mode>): Likewise.
15334 (mve_vqdmullbq_n_s<mode>): Likewise.
15335 (mve_vqdmullbq_s<mode>): Likewise.
15336 (mve_vqdmulltq_n_s<mode>): Likewise.
15337 (mve_vqdmulltq_s<mode>): Likewise.
15338 (mve_vqmovnbq_<supf><mode>): Likewise.
15339 (mve_vqmovntq_<supf><mode>): Likewise.
15340 (mve_vqmovunbq_s<mode>): Likewise.
15341 (mve_vqmovuntq_s<mode>): Likewise.
15342 (mve_vrmlaldavhxq_sv4si): Likewise.
15343 (mve_vrmlsldavhq_sv4si): Likewise.
15344 (mve_vrmlsldavhxq_sv4si): Likewise.
15345 (mve_vshllbq_n_<supf><mode>): Likewise.
15346 (mve_vshlltq_n_<supf><mode>): Likewise.
15347 (mve_vsubq_f<mode>): Likewise.
15348 (mve_vmulltq_poly_p<mode>): Likewise.
15349 (mve_vmullbq_poly_p<mode>): Likewise.
15350 (mve_vrmlaldavhq_<supf>v4si): Likewise.
15352 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15353 Mihail Ionescu <mihail.ionescu@arm.com>
15354 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15356 * config/arm/arm_mve.h (vsubq_u8): Define macro.
15357 (vsubq_n_u8): Likewise.
15358 (vrmulhq_u8): Likewise.
15359 (vrhaddq_u8): Likewise.
15360 (vqsubq_u8): Likewise.
15361 (vqsubq_n_u8): Likewise.
15362 (vqaddq_u8): Likewise.
15363 (vqaddq_n_u8): Likewise.
15364 (vorrq_u8): Likewise.
15365 (vornq_u8): Likewise.
15366 (vmulq_u8): Likewise.
15367 (vmulq_n_u8): Likewise.
15368 (vmulltq_int_u8): Likewise.
15369 (vmullbq_int_u8): Likewise.
15370 (vmulhq_u8): Likewise.
15371 (vmladavq_u8): Likewise.
15372 (vminvq_u8): Likewise.
15373 (vminq_u8): Likewise.
15374 (vmaxvq_u8): Likewise.
15375 (vmaxq_u8): Likewise.
15376 (vhsubq_u8): Likewise.
15377 (vhsubq_n_u8): Likewise.
15378 (vhaddq_u8): Likewise.
15379 (vhaddq_n_u8): Likewise.
15380 (veorq_u8): Likewise.
15381 (vcmpneq_n_u8): Likewise.
15382 (vcmphiq_u8): Likewise.
15383 (vcmphiq_n_u8): Likewise.
15384 (vcmpeqq_u8): Likewise.
15385 (vcmpeqq_n_u8): Likewise.
15386 (vcmpcsq_u8): Likewise.
15387 (vcmpcsq_n_u8): Likewise.
15388 (vcaddq_rot90_u8): Likewise.
15389 (vcaddq_rot270_u8): Likewise.
15390 (vbicq_u8): Likewise.
15391 (vandq_u8): Likewise.
15392 (vaddvq_p_u8): Likewise.
15393 (vaddvaq_u8): Likewise.
15394 (vaddq_n_u8): Likewise.
15395 (vabdq_u8): Likewise.
15396 (vshlq_r_u8): Likewise.
15397 (vrshlq_u8): Likewise.
15398 (vrshlq_n_u8): Likewise.
15399 (vqshlq_u8): Likewise.
15400 (vqshlq_r_u8): Likewise.
15401 (vqrshlq_u8): Likewise.
15402 (vqrshlq_n_u8): Likewise.
15403 (vminavq_s8): Likewise.
15404 (vminaq_s8): Likewise.
15405 (vmaxavq_s8): Likewise.
15406 (vmaxaq_s8): Likewise.
15407 (vbrsrq_n_u8): Likewise.
15408 (vshlq_n_u8): Likewise.
15409 (vrshrq_n_u8): Likewise.
15410 (vqshlq_n_u8): Likewise.
15411 (vcmpneq_n_s8): Likewise.
15412 (vcmpltq_s8): Likewise.
15413 (vcmpltq_n_s8): Likewise.
15414 (vcmpleq_s8): Likewise.
15415 (vcmpleq_n_s8): Likewise.
15416 (vcmpgtq_s8): Likewise.
15417 (vcmpgtq_n_s8): Likewise.
15418 (vcmpgeq_s8): Likewise.
15419 (vcmpgeq_n_s8): Likewise.
15420 (vcmpeqq_s8): Likewise.
15421 (vcmpeqq_n_s8): Likewise.
15422 (vqshluq_n_s8): Likewise.
15423 (vaddvq_p_s8): Likewise.
15424 (vsubq_s8): Likewise.
15425 (vsubq_n_s8): Likewise.
15426 (vshlq_r_s8): Likewise.
15427 (vrshlq_s8): Likewise.
15428 (vrshlq_n_s8): Likewise.
15429 (vrmulhq_s8): Likewise.
15430 (vrhaddq_s8): Likewise.
15431 (vqsubq_s8): Likewise.
15432 (vqsubq_n_s8): Likewise.
15433 (vqshlq_s8): Likewise.
15434 (vqshlq_r_s8): Likewise.
15435 (vqrshlq_s8): Likewise.
15436 (vqrshlq_n_s8): Likewise.
15437 (vqrdmulhq_s8): Likewise.
15438 (vqrdmulhq_n_s8): Likewise.
15439 (vqdmulhq_s8): Likewise.
15440 (vqdmulhq_n_s8): Likewise.
15441 (vqaddq_s8): Likewise.
15442 (vqaddq_n_s8): Likewise.
15443 (vorrq_s8): Likewise.
15444 (vornq_s8): Likewise.
15445 (vmulq_s8): Likewise.
15446 (vmulq_n_s8): Likewise.
15447 (vmulltq_int_s8): Likewise.
15448 (vmullbq_int_s8): Likewise.
15449 (vmulhq_s8): Likewise.
15450 (vmlsdavxq_s8): Likewise.
15451 (vmlsdavq_s8): Likewise.
15452 (vmladavxq_s8): Likewise.
15453 (vmladavq_s8): Likewise.
15454 (vminvq_s8): Likewise.
15455 (vminq_s8): Likewise.
15456 (vmaxvq_s8): Likewise.
15457 (vmaxq_s8): Likewise.
15458 (vhsubq_s8): Likewise.
15459 (vhsubq_n_s8): Likewise.
15460 (vhcaddq_rot90_s8): Likewise.
15461 (vhcaddq_rot270_s8): Likewise.
15462 (vhaddq_s8): Likewise.
15463 (vhaddq_n_s8): Likewise.
15464 (veorq_s8): Likewise.
15465 (vcaddq_rot90_s8): Likewise.
15466 (vcaddq_rot270_s8): Likewise.
15467 (vbrsrq_n_s8): Likewise.
15468 (vbicq_s8): Likewise.
15469 (vandq_s8): Likewise.
15470 (vaddvaq_s8): Likewise.
15471 (vaddq_n_s8): Likewise.
15472 (vabdq_s8): Likewise.
15473 (vshlq_n_s8): Likewise.
15474 (vrshrq_n_s8): Likewise.
15475 (vqshlq_n_s8): Likewise.
15476 (vsubq_u16): Likewise.
15477 (vsubq_n_u16): Likewise.
15478 (vrmulhq_u16): Likewise.
15479 (vrhaddq_u16): Likewise.
15480 (vqsubq_u16): Likewise.
15481 (vqsubq_n_u16): Likewise.
15482 (vqaddq_u16): Likewise.
15483 (vqaddq_n_u16): Likewise.
15484 (vorrq_u16): Likewise.
15485 (vornq_u16): Likewise.
15486 (vmulq_u16): Likewise.
15487 (vmulq_n_u16): Likewise.
15488 (vmulltq_int_u16): Likewise.
15489 (vmullbq_int_u16): Likewise.
15490 (vmulhq_u16): Likewise.
15491 (vmladavq_u16): Likewise.
15492 (vminvq_u16): Likewise.
15493 (vminq_u16): Likewise.
15494 (vmaxvq_u16): Likewise.
15495 (vmaxq_u16): Likewise.
15496 (vhsubq_u16): Likewise.
15497 (vhsubq_n_u16): Likewise.
15498 (vhaddq_u16): Likewise.
15499 (vhaddq_n_u16): Likewise.
15500 (veorq_u16): Likewise.
15501 (vcmpneq_n_u16): Likewise.
15502 (vcmphiq_u16): Likewise.
15503 (vcmphiq_n_u16): Likewise.
15504 (vcmpeqq_u16): Likewise.
15505 (vcmpeqq_n_u16): Likewise.
15506 (vcmpcsq_u16): Likewise.
15507 (vcmpcsq_n_u16): Likewise.
15508 (vcaddq_rot90_u16): Likewise.
15509 (vcaddq_rot270_u16): Likewise.
15510 (vbicq_u16): Likewise.
15511 (vandq_u16): Likewise.
15512 (vaddvq_p_u16): Likewise.
15513 (vaddvaq_u16): Likewise.
15514 (vaddq_n_u16): Likewise.
15515 (vabdq_u16): Likewise.
15516 (vshlq_r_u16): Likewise.
15517 (vrshlq_u16): Likewise.
15518 (vrshlq_n_u16): Likewise.
15519 (vqshlq_u16): Likewise.
15520 (vqshlq_r_u16): Likewise.
15521 (vqrshlq_u16): Likewise.
15522 (vqrshlq_n_u16): Likewise.
15523 (vminavq_s16): Likewise.
15524 (vminaq_s16): Likewise.
15525 (vmaxavq_s16): Likewise.
15526 (vmaxaq_s16): Likewise.
15527 (vbrsrq_n_u16): Likewise.
15528 (vshlq_n_u16): Likewise.
15529 (vrshrq_n_u16): Likewise.
15530 (vqshlq_n_u16): Likewise.
15531 (vcmpneq_n_s16): Likewise.
15532 (vcmpltq_s16): Likewise.
15533 (vcmpltq_n_s16): Likewise.
15534 (vcmpleq_s16): Likewise.
15535 (vcmpleq_n_s16): Likewise.
15536 (vcmpgtq_s16): Likewise.
15537 (vcmpgtq_n_s16): Likewise.
15538 (vcmpgeq_s16): Likewise.
15539 (vcmpgeq_n_s16): Likewise.
15540 (vcmpeqq_s16): Likewise.
15541 (vcmpeqq_n_s16): Likewise.
15542 (vqshluq_n_s16): Likewise.
15543 (vaddvq_p_s16): Likewise.
15544 (vsubq_s16): Likewise.
15545 (vsubq_n_s16): Likewise.
15546 (vshlq_r_s16): Likewise.
15547 (vrshlq_s16): Likewise.
15548 (vrshlq_n_s16): Likewise.
15549 (vrmulhq_s16): Likewise.
15550 (vrhaddq_s16): Likewise.
15551 (vqsubq_s16): Likewise.
15552 (vqsubq_n_s16): Likewise.
15553 (vqshlq_s16): Likewise.
15554 (vqshlq_r_s16): Likewise.
15555 (vqrshlq_s16): Likewise.
15556 (vqrshlq_n_s16): Likewise.
15557 (vqrdmulhq_s16): Likewise.
15558 (vqrdmulhq_n_s16): Likewise.
15559 (vqdmulhq_s16): Likewise.
15560 (vqdmulhq_n_s16): Likewise.
15561 (vqaddq_s16): Likewise.
15562 (vqaddq_n_s16): Likewise.
15563 (vorrq_s16): Likewise.
15564 (vornq_s16): Likewise.
15565 (vmulq_s16): Likewise.
15566 (vmulq_n_s16): Likewise.
15567 (vmulltq_int_s16): Likewise.
15568 (vmullbq_int_s16): Likewise.
15569 (vmulhq_s16): Likewise.
15570 (vmlsdavxq_s16): Likewise.
15571 (vmlsdavq_s16): Likewise.
15572 (vmladavxq_s16): Likewise.
15573 (vmladavq_s16): Likewise.
15574 (vminvq_s16): Likewise.
15575 (vminq_s16): Likewise.
15576 (vmaxvq_s16): Likewise.
15577 (vmaxq_s16): Likewise.
15578 (vhsubq_s16): Likewise.
15579 (vhsubq_n_s16): Likewise.
15580 (vhcaddq_rot90_s16): Likewise.
15581 (vhcaddq_rot270_s16): Likewise.
15582 (vhaddq_s16): Likewise.
15583 (vhaddq_n_s16): Likewise.
15584 (veorq_s16): Likewise.
15585 (vcaddq_rot90_s16): Likewise.
15586 (vcaddq_rot270_s16): Likewise.
15587 (vbrsrq_n_s16): Likewise.
15588 (vbicq_s16): Likewise.
15589 (vandq_s16): Likewise.
15590 (vaddvaq_s16): Likewise.
15591 (vaddq_n_s16): Likewise.
15592 (vabdq_s16): Likewise.
15593 (vshlq_n_s16): Likewise.
15594 (vrshrq_n_s16): Likewise.
15595 (vqshlq_n_s16): Likewise.
15596 (vsubq_u32): Likewise.
15597 (vsubq_n_u32): Likewise.
15598 (vrmulhq_u32): Likewise.
15599 (vrhaddq_u32): Likewise.
15600 (vqsubq_u32): Likewise.
15601 (vqsubq_n_u32): Likewise.
15602 (vqaddq_u32): Likewise.
15603 (vqaddq_n_u32): Likewise.
15604 (vorrq_u32): Likewise.
15605 (vornq_u32): Likewise.
15606 (vmulq_u32): Likewise.
15607 (vmulq_n_u32): Likewise.
15608 (vmulltq_int_u32): Likewise.
15609 (vmullbq_int_u32): Likewise.
15610 (vmulhq_u32): Likewise.
15611 (vmladavq_u32): Likewise.
15612 (vminvq_u32): Likewise.
15613 (vminq_u32): Likewise.
15614 (vmaxvq_u32): Likewise.
15615 (vmaxq_u32): Likewise.
15616 (vhsubq_u32): Likewise.
15617 (vhsubq_n_u32): Likewise.
15618 (vhaddq_u32): Likewise.
15619 (vhaddq_n_u32): Likewise.
15620 (veorq_u32): Likewise.
15621 (vcmpneq_n_u32): Likewise.
15622 (vcmphiq_u32): Likewise.
15623 (vcmphiq_n_u32): Likewise.
15624 (vcmpeqq_u32): Likewise.
15625 (vcmpeqq_n_u32): Likewise.
15626 (vcmpcsq_u32): Likewise.
15627 (vcmpcsq_n_u32): Likewise.
15628 (vcaddq_rot90_u32): Likewise.
15629 (vcaddq_rot270_u32): Likewise.
15630 (vbicq_u32): Likewise.
15631 (vandq_u32): Likewise.
15632 (vaddvq_p_u32): Likewise.
15633 (vaddvaq_u32): Likewise.
15634 (vaddq_n_u32): Likewise.
15635 (vabdq_u32): Likewise.
15636 (vshlq_r_u32): Likewise.
15637 (vrshlq_u32): Likewise.
15638 (vrshlq_n_u32): Likewise.
15639 (vqshlq_u32): Likewise.
15640 (vqshlq_r_u32): Likewise.
15641 (vqrshlq_u32): Likewise.
15642 (vqrshlq_n_u32): Likewise.
15643 (vminavq_s32): Likewise.
15644 (vminaq_s32): Likewise.
15645 (vmaxavq_s32): Likewise.
15646 (vmaxaq_s32): Likewise.
15647 (vbrsrq_n_u32): Likewise.
15648 (vshlq_n_u32): Likewise.
15649 (vrshrq_n_u32): Likewise.
15650 (vqshlq_n_u32): Likewise.
15651 (vcmpneq_n_s32): Likewise.
15652 (vcmpltq_s32): Likewise.
15653 (vcmpltq_n_s32): Likewise.
15654 (vcmpleq_s32): Likewise.
15655 (vcmpleq_n_s32): Likewise.
15656 (vcmpgtq_s32): Likewise.
15657 (vcmpgtq_n_s32): Likewise.
15658 (vcmpgeq_s32): Likewise.
15659 (vcmpgeq_n_s32): Likewise.
15660 (vcmpeqq_s32): Likewise.
15661 (vcmpeqq_n_s32): Likewise.
15662 (vqshluq_n_s32): Likewise.
15663 (vaddvq_p_s32): Likewise.
15664 (vsubq_s32): Likewise.
15665 (vsubq_n_s32): Likewise.
15666 (vshlq_r_s32): Likewise.
15667 (vrshlq_s32): Likewise.
15668 (vrshlq_n_s32): Likewise.
15669 (vrmulhq_s32): Likewise.
15670 (vrhaddq_s32): Likewise.
15671 (vqsubq_s32): Likewise.
15672 (vqsubq_n_s32): Likewise.
15673 (vqshlq_s32): Likewise.
15674 (vqshlq_r_s32): Likewise.
15675 (vqrshlq_s32): Likewise.
15676 (vqrshlq_n_s32): Likewise.
15677 (vqrdmulhq_s32): Likewise.
15678 (vqrdmulhq_n_s32): Likewise.
15679 (vqdmulhq_s32): Likewise.
15680 (vqdmulhq_n_s32): Likewise.
15681 (vqaddq_s32): Likewise.
15682 (vqaddq_n_s32): Likewise.
15683 (vorrq_s32): Likewise.
15684 (vornq_s32): Likewise.
15685 (vmulq_s32): Likewise.
15686 (vmulq_n_s32): Likewise.
15687 (vmulltq_int_s32): Likewise.
15688 (vmullbq_int_s32): Likewise.
15689 (vmulhq_s32): Likewise.
15690 (vmlsdavxq_s32): Likewise.
15691 (vmlsdavq_s32): Likewise.
15692 (vmladavxq_s32): Likewise.
15693 (vmladavq_s32): Likewise.
15694 (vminvq_s32): Likewise.
15695 (vminq_s32): Likewise.
15696 (vmaxvq_s32): Likewise.
15697 (vmaxq_s32): Likewise.
15698 (vhsubq_s32): Likewise.
15699 (vhsubq_n_s32): Likewise.
15700 (vhcaddq_rot90_s32): Likewise.
15701 (vhcaddq_rot270_s32): Likewise.
15702 (vhaddq_s32): Likewise.
15703 (vhaddq_n_s32): Likewise.
15704 (veorq_s32): Likewise.
15705 (vcaddq_rot90_s32): Likewise.
15706 (vcaddq_rot270_s32): Likewise.
15707 (vbrsrq_n_s32): Likewise.
15708 (vbicq_s32): Likewise.
15709 (vandq_s32): Likewise.
15710 (vaddvaq_s32): Likewise.
15711 (vaddq_n_s32): Likewise.
15712 (vabdq_s32): Likewise.
15713 (vshlq_n_s32): Likewise.
15714 (vrshrq_n_s32): Likewise.
15715 (vqshlq_n_s32): Likewise.
15716 (__arm_vsubq_u8): Define intrinsic.
15717 (__arm_vsubq_n_u8): Likewise.
15718 (__arm_vrmulhq_u8): Likewise.
15719 (__arm_vrhaddq_u8): Likewise.
15720 (__arm_vqsubq_u8): Likewise.
15721 (__arm_vqsubq_n_u8): Likewise.
15722 (__arm_vqaddq_u8): Likewise.
15723 (__arm_vqaddq_n_u8): Likewise.
15724 (__arm_vorrq_u8): Likewise.
15725 (__arm_vornq_u8): Likewise.
15726 (__arm_vmulq_u8): Likewise.
15727 (__arm_vmulq_n_u8): Likewise.
15728 (__arm_vmulltq_int_u8): Likewise.
15729 (__arm_vmullbq_int_u8): Likewise.
15730 (__arm_vmulhq_u8): Likewise.
15731 (__arm_vmladavq_u8): Likewise.
15732 (__arm_vminvq_u8): Likewise.
15733 (__arm_vminq_u8): Likewise.
15734 (__arm_vmaxvq_u8): Likewise.
15735 (__arm_vmaxq_u8): Likewise.
15736 (__arm_vhsubq_u8): Likewise.
15737 (__arm_vhsubq_n_u8): Likewise.
15738 (__arm_vhaddq_u8): Likewise.
15739 (__arm_vhaddq_n_u8): Likewise.
15740 (__arm_veorq_u8): Likewise.
15741 (__arm_vcmpneq_n_u8): Likewise.
15742 (__arm_vcmphiq_u8): Likewise.
15743 (__arm_vcmphiq_n_u8): Likewise.
15744 (__arm_vcmpeqq_u8): Likewise.
15745 (__arm_vcmpeqq_n_u8): Likewise.
15746 (__arm_vcmpcsq_u8): Likewise.
15747 (__arm_vcmpcsq_n_u8): Likewise.
15748 (__arm_vcaddq_rot90_u8): Likewise.
15749 (__arm_vcaddq_rot270_u8): Likewise.
15750 (__arm_vbicq_u8): Likewise.
15751 (__arm_vandq_u8): Likewise.
15752 (__arm_vaddvq_p_u8): Likewise.
15753 (__arm_vaddvaq_u8): Likewise.
15754 (__arm_vaddq_n_u8): Likewise.
15755 (__arm_vabdq_u8): Likewise.
15756 (__arm_vshlq_r_u8): Likewise.
15757 (__arm_vrshlq_u8): Likewise.
15758 (__arm_vrshlq_n_u8): Likewise.
15759 (__arm_vqshlq_u8): Likewise.
15760 (__arm_vqshlq_r_u8): Likewise.
15761 (__arm_vqrshlq_u8): Likewise.
15762 (__arm_vqrshlq_n_u8): Likewise.
15763 (__arm_vminavq_s8): Likewise.
15764 (__arm_vminaq_s8): Likewise.
15765 (__arm_vmaxavq_s8): Likewise.
15766 (__arm_vmaxaq_s8): Likewise.
15767 (__arm_vbrsrq_n_u8): Likewise.
15768 (__arm_vshlq_n_u8): Likewise.
15769 (__arm_vrshrq_n_u8): Likewise.
15770 (__arm_vqshlq_n_u8): Likewise.
15771 (__arm_vcmpneq_n_s8): Likewise.
15772 (__arm_vcmpltq_s8): Likewise.
15773 (__arm_vcmpltq_n_s8): Likewise.
15774 (__arm_vcmpleq_s8): Likewise.
15775 (__arm_vcmpleq_n_s8): Likewise.
15776 (__arm_vcmpgtq_s8): Likewise.
15777 (__arm_vcmpgtq_n_s8): Likewise.
15778 (__arm_vcmpgeq_s8): Likewise.
15779 (__arm_vcmpgeq_n_s8): Likewise.
15780 (__arm_vcmpeqq_s8): Likewise.
15781 (__arm_vcmpeqq_n_s8): Likewise.
15782 (__arm_vqshluq_n_s8): Likewise.
15783 (__arm_vaddvq_p_s8): Likewise.
15784 (__arm_vsubq_s8): Likewise.
15785 (__arm_vsubq_n_s8): Likewise.
15786 (__arm_vshlq_r_s8): Likewise.
15787 (__arm_vrshlq_s8): Likewise.
15788 (__arm_vrshlq_n_s8): Likewise.
15789 (__arm_vrmulhq_s8): Likewise.
15790 (__arm_vrhaddq_s8): Likewise.
15791 (__arm_vqsubq_s8): Likewise.
15792 (__arm_vqsubq_n_s8): Likewise.
15793 (__arm_vqshlq_s8): Likewise.
15794 (__arm_vqshlq_r_s8): Likewise.
15795 (__arm_vqrshlq_s8): Likewise.
15796 (__arm_vqrshlq_n_s8): Likewise.
15797 (__arm_vqrdmulhq_s8): Likewise.
15798 (__arm_vqrdmulhq_n_s8): Likewise.
15799 (__arm_vqdmulhq_s8): Likewise.
15800 (__arm_vqdmulhq_n_s8): Likewise.
15801 (__arm_vqaddq_s8): Likewise.
15802 (__arm_vqaddq_n_s8): Likewise.
15803 (__arm_vorrq_s8): Likewise.
15804 (__arm_vornq_s8): Likewise.
15805 (__arm_vmulq_s8): Likewise.
15806 (__arm_vmulq_n_s8): Likewise.
15807 (__arm_vmulltq_int_s8): Likewise.
15808 (__arm_vmullbq_int_s8): Likewise.
15809 (__arm_vmulhq_s8): Likewise.
15810 (__arm_vmlsdavxq_s8): Likewise.
15811 (__arm_vmlsdavq_s8): Likewise.
15812 (__arm_vmladavxq_s8): Likewise.
15813 (__arm_vmladavq_s8): Likewise.
15814 (__arm_vminvq_s8): Likewise.
15815 (__arm_vminq_s8): Likewise.
15816 (__arm_vmaxvq_s8): Likewise.
15817 (__arm_vmaxq_s8): Likewise.
15818 (__arm_vhsubq_s8): Likewise.
15819 (__arm_vhsubq_n_s8): Likewise.
15820 (__arm_vhcaddq_rot90_s8): Likewise.
15821 (__arm_vhcaddq_rot270_s8): Likewise.
15822 (__arm_vhaddq_s8): Likewise.
15823 (__arm_vhaddq_n_s8): Likewise.
15824 (__arm_veorq_s8): Likewise.
15825 (__arm_vcaddq_rot90_s8): Likewise.
15826 (__arm_vcaddq_rot270_s8): Likewise.
15827 (__arm_vbrsrq_n_s8): Likewise.
15828 (__arm_vbicq_s8): Likewise.
15829 (__arm_vandq_s8): Likewise.
15830 (__arm_vaddvaq_s8): Likewise.
15831 (__arm_vaddq_n_s8): Likewise.
15832 (__arm_vabdq_s8): Likewise.
15833 (__arm_vshlq_n_s8): Likewise.
15834 (__arm_vrshrq_n_s8): Likewise.
15835 (__arm_vqshlq_n_s8): Likewise.
15836 (__arm_vsubq_u16): Likewise.
15837 (__arm_vsubq_n_u16): Likewise.
15838 (__arm_vrmulhq_u16): Likewise.
15839 (__arm_vrhaddq_u16): Likewise.
15840 (__arm_vqsubq_u16): Likewise.
15841 (__arm_vqsubq_n_u16): Likewise.
15842 (__arm_vqaddq_u16): Likewise.
15843 (__arm_vqaddq_n_u16): Likewise.
15844 (__arm_vorrq_u16): Likewise.
15845 (__arm_vornq_u16): Likewise.
15846 (__arm_vmulq_u16): Likewise.
15847 (__arm_vmulq_n_u16): Likewise.
15848 (__arm_vmulltq_int_u16): Likewise.
15849 (__arm_vmullbq_int_u16): Likewise.
15850 (__arm_vmulhq_u16): Likewise.
15851 (__arm_vmladavq_u16): Likewise.
15852 (__arm_vminvq_u16): Likewise.
15853 (__arm_vminq_u16): Likewise.
15854 (__arm_vmaxvq_u16): Likewise.
15855 (__arm_vmaxq_u16): Likewise.
15856 (__arm_vhsubq_u16): Likewise.
15857 (__arm_vhsubq_n_u16): Likewise.
15858 (__arm_vhaddq_u16): Likewise.
15859 (__arm_vhaddq_n_u16): Likewise.
15860 (__arm_veorq_u16): Likewise.
15861 (__arm_vcmpneq_n_u16): Likewise.
15862 (__arm_vcmphiq_u16): Likewise.
15863 (__arm_vcmphiq_n_u16): Likewise.
15864 (__arm_vcmpeqq_u16): Likewise.
15865 (__arm_vcmpeqq_n_u16): Likewise.
15866 (__arm_vcmpcsq_u16): Likewise.
15867 (__arm_vcmpcsq_n_u16): Likewise.
15868 (__arm_vcaddq_rot90_u16): Likewise.
15869 (__arm_vcaddq_rot270_u16): Likewise.
15870 (__arm_vbicq_u16): Likewise.
15871 (__arm_vandq_u16): Likewise.
15872 (__arm_vaddvq_p_u16): Likewise.
15873 (__arm_vaddvaq_u16): Likewise.
15874 (__arm_vaddq_n_u16): Likewise.
15875 (__arm_vabdq_u16): Likewise.
15876 (__arm_vshlq_r_u16): Likewise.
15877 (__arm_vrshlq_u16): Likewise.
15878 (__arm_vrshlq_n_u16): Likewise.
15879 (__arm_vqshlq_u16): Likewise.
15880 (__arm_vqshlq_r_u16): Likewise.
15881 (__arm_vqrshlq_u16): Likewise.
15882 (__arm_vqrshlq_n_u16): Likewise.
15883 (__arm_vminavq_s16): Likewise.
15884 (__arm_vminaq_s16): Likewise.
15885 (__arm_vmaxavq_s16): Likewise.
15886 (__arm_vmaxaq_s16): Likewise.
15887 (__arm_vbrsrq_n_u16): Likewise.
15888 (__arm_vshlq_n_u16): Likewise.
15889 (__arm_vrshrq_n_u16): Likewise.
15890 (__arm_vqshlq_n_u16): Likewise.
15891 (__arm_vcmpneq_n_s16): Likewise.
15892 (__arm_vcmpltq_s16): Likewise.
15893 (__arm_vcmpltq_n_s16): Likewise.
15894 (__arm_vcmpleq_s16): Likewise.
15895 (__arm_vcmpleq_n_s16): Likewise.
15896 (__arm_vcmpgtq_s16): Likewise.
15897 (__arm_vcmpgtq_n_s16): Likewise.
15898 (__arm_vcmpgeq_s16): Likewise.
15899 (__arm_vcmpgeq_n_s16): Likewise.
15900 (__arm_vcmpeqq_s16): Likewise.
15901 (__arm_vcmpeqq_n_s16): Likewise.
15902 (__arm_vqshluq_n_s16): Likewise.
15903 (__arm_vaddvq_p_s16): Likewise.
15904 (__arm_vsubq_s16): Likewise.
15905 (__arm_vsubq_n_s16): Likewise.
15906 (__arm_vshlq_r_s16): Likewise.
15907 (__arm_vrshlq_s16): Likewise.
15908 (__arm_vrshlq_n_s16): Likewise.
15909 (__arm_vrmulhq_s16): Likewise.
15910 (__arm_vrhaddq_s16): Likewise.
15911 (__arm_vqsubq_s16): Likewise.
15912 (__arm_vqsubq_n_s16): Likewise.
15913 (__arm_vqshlq_s16): Likewise.
15914 (__arm_vqshlq_r_s16): Likewise.
15915 (__arm_vqrshlq_s16): Likewise.
15916 (__arm_vqrshlq_n_s16): Likewise.
15917 (__arm_vqrdmulhq_s16): Likewise.
15918 (__arm_vqrdmulhq_n_s16): Likewise.
15919 (__arm_vqdmulhq_s16): Likewise.
15920 (__arm_vqdmulhq_n_s16): Likewise.
15921 (__arm_vqaddq_s16): Likewise.
15922 (__arm_vqaddq_n_s16): Likewise.
15923 (__arm_vorrq_s16): Likewise.
15924 (__arm_vornq_s16): Likewise.
15925 (__arm_vmulq_s16): Likewise.
15926 (__arm_vmulq_n_s16): Likewise.
15927 (__arm_vmulltq_int_s16): Likewise.
15928 (__arm_vmullbq_int_s16): Likewise.
15929 (__arm_vmulhq_s16): Likewise.
15930 (__arm_vmlsdavxq_s16): Likewise.
15931 (__arm_vmlsdavq_s16): Likewise.
15932 (__arm_vmladavxq_s16): Likewise.
15933 (__arm_vmladavq_s16): Likewise.
15934 (__arm_vminvq_s16): Likewise.
15935 (__arm_vminq_s16): Likewise.
15936 (__arm_vmaxvq_s16): Likewise.
15937 (__arm_vmaxq_s16): Likewise.
15938 (__arm_vhsubq_s16): Likewise.
15939 (__arm_vhsubq_n_s16): Likewise.
15940 (__arm_vhcaddq_rot90_s16): Likewise.
15941 (__arm_vhcaddq_rot270_s16): Likewise.
15942 (__arm_vhaddq_s16): Likewise.
15943 (__arm_vhaddq_n_s16): Likewise.
15944 (__arm_veorq_s16): Likewise.
15945 (__arm_vcaddq_rot90_s16): Likewise.
15946 (__arm_vcaddq_rot270_s16): Likewise.
15947 (__arm_vbrsrq_n_s16): Likewise.
15948 (__arm_vbicq_s16): Likewise.
15949 (__arm_vandq_s16): Likewise.
15950 (__arm_vaddvaq_s16): Likewise.
15951 (__arm_vaddq_n_s16): Likewise.
15952 (__arm_vabdq_s16): Likewise.
15953 (__arm_vshlq_n_s16): Likewise.
15954 (__arm_vrshrq_n_s16): Likewise.
15955 (__arm_vqshlq_n_s16): Likewise.
15956 (__arm_vsubq_u32): Likewise.
15957 (__arm_vsubq_n_u32): Likewise.
15958 (__arm_vrmulhq_u32): Likewise.
15959 (__arm_vrhaddq_u32): Likewise.
15960 (__arm_vqsubq_u32): Likewise.
15961 (__arm_vqsubq_n_u32): Likewise.
15962 (__arm_vqaddq_u32): Likewise.
15963 (__arm_vqaddq_n_u32): Likewise.
15964 (__arm_vorrq_u32): Likewise.
15965 (__arm_vornq_u32): Likewise.
15966 (__arm_vmulq_u32): Likewise.
15967 (__arm_vmulq_n_u32): Likewise.
15968 (__arm_vmulltq_int_u32): Likewise.
15969 (__arm_vmullbq_int_u32): Likewise.
15970 (__arm_vmulhq_u32): Likewise.
15971 (__arm_vmladavq_u32): Likewise.
15972 (__arm_vminvq_u32): Likewise.
15973 (__arm_vminq_u32): Likewise.
15974 (__arm_vmaxvq_u32): Likewise.
15975 (__arm_vmaxq_u32): Likewise.
15976 (__arm_vhsubq_u32): Likewise.
15977 (__arm_vhsubq_n_u32): Likewise.
15978 (__arm_vhaddq_u32): Likewise.
15979 (__arm_vhaddq_n_u32): Likewise.
15980 (__arm_veorq_u32): Likewise.
15981 (__arm_vcmpneq_n_u32): Likewise.
15982 (__arm_vcmphiq_u32): Likewise.
15983 (__arm_vcmphiq_n_u32): Likewise.
15984 (__arm_vcmpeqq_u32): Likewise.
15985 (__arm_vcmpeqq_n_u32): Likewise.
15986 (__arm_vcmpcsq_u32): Likewise.
15987 (__arm_vcmpcsq_n_u32): Likewise.
15988 (__arm_vcaddq_rot90_u32): Likewise.
15989 (__arm_vcaddq_rot270_u32): Likewise.
15990 (__arm_vbicq_u32): Likewise.
15991 (__arm_vandq_u32): Likewise.
15992 (__arm_vaddvq_p_u32): Likewise.
15993 (__arm_vaddvaq_u32): Likewise.
15994 (__arm_vaddq_n_u32): Likewise.
15995 (__arm_vabdq_u32): Likewise.
15996 (__arm_vshlq_r_u32): Likewise.
15997 (__arm_vrshlq_u32): Likewise.
15998 (__arm_vrshlq_n_u32): Likewise.
15999 (__arm_vqshlq_u32): Likewise.
16000 (__arm_vqshlq_r_u32): Likewise.
16001 (__arm_vqrshlq_u32): Likewise.
16002 (__arm_vqrshlq_n_u32): Likewise.
16003 (__arm_vminavq_s32): Likewise.
16004 (__arm_vminaq_s32): Likewise.
16005 (__arm_vmaxavq_s32): Likewise.
16006 (__arm_vmaxaq_s32): Likewise.
16007 (__arm_vbrsrq_n_u32): Likewise.
16008 (__arm_vshlq_n_u32): Likewise.
16009 (__arm_vrshrq_n_u32): Likewise.
16010 (__arm_vqshlq_n_u32): Likewise.
16011 (__arm_vcmpneq_n_s32): Likewise.
16012 (__arm_vcmpltq_s32): Likewise.
16013 (__arm_vcmpltq_n_s32): Likewise.
16014 (__arm_vcmpleq_s32): Likewise.
16015 (__arm_vcmpleq_n_s32): Likewise.
16016 (__arm_vcmpgtq_s32): Likewise.
16017 (__arm_vcmpgtq_n_s32): Likewise.
16018 (__arm_vcmpgeq_s32): Likewise.
16019 (__arm_vcmpgeq_n_s32): Likewise.
16020 (__arm_vcmpeqq_s32): Likewise.
16021 (__arm_vcmpeqq_n_s32): Likewise.
16022 (__arm_vqshluq_n_s32): Likewise.
16023 (__arm_vaddvq_p_s32): Likewise.
16024 (__arm_vsubq_s32): Likewise.
16025 (__arm_vsubq_n_s32): Likewise.
16026 (__arm_vshlq_r_s32): Likewise.
16027 (__arm_vrshlq_s32): Likewise.
16028 (__arm_vrshlq_n_s32): Likewise.
16029 (__arm_vrmulhq_s32): Likewise.
16030 (__arm_vrhaddq_s32): Likewise.
16031 (__arm_vqsubq_s32): Likewise.
16032 (__arm_vqsubq_n_s32): Likewise.
16033 (__arm_vqshlq_s32): Likewise.
16034 (__arm_vqshlq_r_s32): Likewise.
16035 (__arm_vqrshlq_s32): Likewise.
16036 (__arm_vqrshlq_n_s32): Likewise.
16037 (__arm_vqrdmulhq_s32): Likewise.
16038 (__arm_vqrdmulhq_n_s32): Likewise.
16039 (__arm_vqdmulhq_s32): Likewise.
16040 (__arm_vqdmulhq_n_s32): Likewise.
16041 (__arm_vqaddq_s32): Likewise.
16042 (__arm_vqaddq_n_s32): Likewise.
16043 (__arm_vorrq_s32): Likewise.
16044 (__arm_vornq_s32): Likewise.
16045 (__arm_vmulq_s32): Likewise.
16046 (__arm_vmulq_n_s32): Likewise.
16047 (__arm_vmulltq_int_s32): Likewise.
16048 (__arm_vmullbq_int_s32): Likewise.
16049 (__arm_vmulhq_s32): Likewise.
16050 (__arm_vmlsdavxq_s32): Likewise.
16051 (__arm_vmlsdavq_s32): Likewise.
16052 (__arm_vmladavxq_s32): Likewise.
16053 (__arm_vmladavq_s32): Likewise.
16054 (__arm_vminvq_s32): Likewise.
16055 (__arm_vminq_s32): Likewise.
16056 (__arm_vmaxvq_s32): Likewise.
16057 (__arm_vmaxq_s32): Likewise.
16058 (__arm_vhsubq_s32): Likewise.
16059 (__arm_vhsubq_n_s32): Likewise.
16060 (__arm_vhcaddq_rot90_s32): Likewise.
16061 (__arm_vhcaddq_rot270_s32): Likewise.
16062 (__arm_vhaddq_s32): Likewise.
16063 (__arm_vhaddq_n_s32): Likewise.
16064 (__arm_veorq_s32): Likewise.
16065 (__arm_vcaddq_rot90_s32): Likewise.
16066 (__arm_vcaddq_rot270_s32): Likewise.
16067 (__arm_vbrsrq_n_s32): Likewise.
16068 (__arm_vbicq_s32): Likewise.
16069 (__arm_vandq_s32): Likewise.
16070 (__arm_vaddvaq_s32): Likewise.
16071 (__arm_vaddq_n_s32): Likewise.
16072 (__arm_vabdq_s32): Likewise.
16073 (__arm_vshlq_n_s32): Likewise.
16074 (__arm_vrshrq_n_s32): Likewise.
16075 (__arm_vqshlq_n_s32): Likewise.
16076 (vsubq): Define polymorphic variant.
16077 (vsubq_n): Likewise.
16078 (vshlq_r): Likewise.
16079 (vrshlq_n): Likewise.
16080 (vrshlq): Likewise.
16081 (vrmulhq): Likewise.
16082 (vrhaddq): Likewise.
16083 (vqsubq_n): Likewise.
16084 (vqsubq): Likewise.
16085 (vqshlq): Likewise.
16086 (vqshlq_r): Likewise.
16087 (vqshluq): Likewise.
16088 (vrshrq_n): Likewise.
16089 (vshlq_n): Likewise.
16090 (vqshluq_n): Likewise.
16091 (vqshlq_n): Likewise.
16092 (vqrshlq_n): Likewise.
16093 (vqrshlq): Likewise.
16094 (vqrdmulhq_n): Likewise.
16095 (vqrdmulhq): Likewise.
16096 (vqdmulhq_n): Likewise.
16097 (vqdmulhq): Likewise.
16098 (vqaddq_n): Likewise.
16099 (vqaddq): Likewise.
16100 (vorrq_n): Likewise.
16103 (vmulq_n): Likewise.
16105 (vmulltq_int): Likewise.
16106 (vmullbq_int): Likewise.
16107 (vmulhq): Likewise.
16109 (vminaq): Likewise.
16111 (vmaxaq): Likewise.
16112 (vhsubq_n): Likewise.
16113 (vhsubq): Likewise.
16114 (vhcaddq_rot90): Likewise.
16115 (vhcaddq_rot270): Likewise.
16116 (vhaddq_n): Likewise.
16117 (vhaddq): Likewise.
16119 (vcaddq_rot90): Likewise.
16120 (vcaddq_rot270): Likewise.
16121 (vbrsrq_n): Likewise.
16122 (vbicq_n): Likewise.
16125 (vaddq_n): Likewise.
16128 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
16129 (BINOP_NONE_NONE_NONE): Likewise.
16130 (BINOP_NONE_NONE_UNONE): Likewise.
16131 (BINOP_UNONE_NONE_IMM): Likewise.
16132 (BINOP_UNONE_NONE_NONE): Likewise.
16133 (BINOP_UNONE_UNONE_IMM): Likewise.
16134 (BINOP_UNONE_UNONE_NONE): Likewise.
16135 (BINOP_UNONE_UNONE_UNONE): Likewise.
16136 * config/arm/constraints.md (Ra): Define constraint to check constant is
16137 in the range of 0 to 7.
16138 (Rg): Define constriant to check the constant is one among 1, 2, 4
16140 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
16141 (mve_vaddq_n_<supf>): Likewise.
16142 (mve_vaddvaq_<supf>): Likewise.
16143 (mve_vaddvq_p_<supf>): Likewise.
16144 (mve_vandq_<supf>): Likewise.
16145 (mve_vbicq_<supf>): Likewise.
16146 (mve_vbrsrq_n_<supf>): Likewise.
16147 (mve_vcaddq_rot270_<supf>): Likewise.
16148 (mve_vcaddq_rot90_<supf>): Likewise.
16149 (mve_vcmpcsq_n_u): Likewise.
16150 (mve_vcmpcsq_u): Likewise.
16151 (mve_vcmpeqq_n_<supf>): Likewise.
16152 (mve_vcmpeqq_<supf>): Likewise.
16153 (mve_vcmpgeq_n_s): Likewise.
16154 (mve_vcmpgeq_s): Likewise.
16155 (mve_vcmpgtq_n_s): Likewise.
16156 (mve_vcmpgtq_s): Likewise.
16157 (mve_vcmphiq_n_u): Likewise.
16158 (mve_vcmphiq_u): Likewise.
16159 (mve_vcmpleq_n_s): Likewise.
16160 (mve_vcmpleq_s): Likewise.
16161 (mve_vcmpltq_n_s): Likewise.
16162 (mve_vcmpltq_s): Likewise.
16163 (mve_vcmpneq_n_<supf>): Likewise.
16164 (mve_vddupq_n_u): Likewise.
16165 (mve_veorq_<supf>): Likewise.
16166 (mve_vhaddq_n_<supf>): Likewise.
16167 (mve_vhaddq_<supf>): Likewise.
16168 (mve_vhcaddq_rot270_s): Likewise.
16169 (mve_vhcaddq_rot90_s): Likewise.
16170 (mve_vhsubq_n_<supf>): Likewise.
16171 (mve_vhsubq_<supf>): Likewise.
16172 (mve_vidupq_n_u): Likewise.
16173 (mve_vmaxaq_s): Likewise.
16174 (mve_vmaxavq_s): Likewise.
16175 (mve_vmaxq_<supf>): Likewise.
16176 (mve_vmaxvq_<supf>): Likewise.
16177 (mve_vminaq_s): Likewise.
16178 (mve_vminavq_s): Likewise.
16179 (mve_vminq_<supf>): Likewise.
16180 (mve_vminvq_<supf>): Likewise.
16181 (mve_vmladavq_<supf>): Likewise.
16182 (mve_vmladavxq_s): Likewise.
16183 (mve_vmlsdavq_s): Likewise.
16184 (mve_vmlsdavxq_s): Likewise.
16185 (mve_vmulhq_<supf>): Likewise.
16186 (mve_vmullbq_int_<supf>): Likewise.
16187 (mve_vmulltq_int_<supf>): Likewise.
16188 (mve_vmulq_n_<supf>): Likewise.
16189 (mve_vmulq_<supf>): Likewise.
16190 (mve_vornq_<supf>): Likewise.
16191 (mve_vorrq_<supf>): Likewise.
16192 (mve_vqaddq_n_<supf>): Likewise.
16193 (mve_vqaddq_<supf>): Likewise.
16194 (mve_vqdmulhq_n_s): Likewise.
16195 (mve_vqdmulhq_s): Likewise.
16196 (mve_vqrdmulhq_n_s): Likewise.
16197 (mve_vqrdmulhq_s): Likewise.
16198 (mve_vqrshlq_n_<supf>): Likewise.
16199 (mve_vqrshlq_<supf>): Likewise.
16200 (mve_vqshlq_n_<supf>): Likewise.
16201 (mve_vqshlq_r_<supf>): Likewise.
16202 (mve_vqshlq_<supf>): Likewise.
16203 (mve_vqshluq_n_s): Likewise.
16204 (mve_vqsubq_n_<supf>): Likewise.
16205 (mve_vqsubq_<supf>): Likewise.
16206 (mve_vrhaddq_<supf>): Likewise.
16207 (mve_vrmulhq_<supf>): Likewise.
16208 (mve_vrshlq_n_<supf>): Likewise.
16209 (mve_vrshlq_<supf>): Likewise.
16210 (mve_vrshrq_n_<supf>): Likewise.
16211 (mve_vshlq_n_<supf>): Likewise.
16212 (mve_vshlq_r_<supf>): Likewise.
16213 (mve_vsubq_n_<supf>): Likewise.
16214 (mve_vsubq_<supf>): Likewise.
16215 * config/arm/predicates.md (mve_imm_7): Define predicate to check
16216 the matching constraint Ra.
16217 (mve_imm_selective_upto_8): Define predicate to check the matching
16220 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16221 Mihail Ionescu <mihail.ionescu@arm.com>
16222 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16224 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
16225 qualifier for binary operands.
16226 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16227 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
16228 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
16229 (vaddlvq_p_u32): Likewise.
16230 (vcmpneq_s8): Likewise.
16231 (vcmpneq_s16): Likewise.
16232 (vcmpneq_s32): Likewise.
16233 (vcmpneq_u8): Likewise.
16234 (vcmpneq_u16): Likewise.
16235 (vcmpneq_u32): Likewise.
16236 (vshlq_s8): Likewise.
16237 (vshlq_s16): Likewise.
16238 (vshlq_s32): Likewise.
16239 (vshlq_u8): Likewise.
16240 (vshlq_u16): Likewise.
16241 (vshlq_u32): Likewise.
16242 (__arm_vaddlvq_p_s32): Define intrinsic.
16243 (__arm_vaddlvq_p_u32): Likewise.
16244 (__arm_vcmpneq_s8): Likewise.
16245 (__arm_vcmpneq_s16): Likewise.
16246 (__arm_vcmpneq_s32): Likewise.
16247 (__arm_vcmpneq_u8): Likewise.
16248 (__arm_vcmpneq_u16): Likewise.
16249 (__arm_vcmpneq_u32): Likewise.
16250 (__arm_vshlq_s8): Likewise.
16251 (__arm_vshlq_s16): Likewise.
16252 (__arm_vshlq_s32): Likewise.
16253 (__arm_vshlq_u8): Likewise.
16254 (__arm_vshlq_u16): Likewise.
16255 (__arm_vshlq_u32): Likewise.
16256 (vaddlvq_p): Define polymorphic variant.
16257 (vcmpneq): Likewise.
16259 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
16261 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16262 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
16263 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
16264 (mve_vcmpneq_<supf><mode>): Likewise.
16265 (mve_vshlq_<supf><mode>): Likewise.
16267 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16268 Mihail Ionescu <mihail.ionescu@arm.com>
16269 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16271 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
16272 qualifier for binary operands.
16273 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16274 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16275 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
16276 (vcvtq_n_s32_f32): Likewise.
16277 (vcvtq_n_u16_f16): Likewise.
16278 (vcvtq_n_u32_f32): Likewise.
16279 (vcreateq_u8): Likewise.
16280 (vcreateq_u16): Likewise.
16281 (vcreateq_u32): Likewise.
16282 (vcreateq_u64): Likewise.
16283 (vcreateq_s8): Likewise.
16284 (vcreateq_s16): Likewise.
16285 (vcreateq_s32): Likewise.
16286 (vcreateq_s64): Likewise.
16287 (vshrq_n_s8): Likewise.
16288 (vshrq_n_s16): Likewise.
16289 (vshrq_n_s32): Likewise.
16290 (vshrq_n_u8): Likewise.
16291 (vshrq_n_u16): Likewise.
16292 (vshrq_n_u32): Likewise.
16293 (__arm_vcreateq_u8): Define intrinsic.
16294 (__arm_vcreateq_u16): Likewise.
16295 (__arm_vcreateq_u32): Likewise.
16296 (__arm_vcreateq_u64): Likewise.
16297 (__arm_vcreateq_s8): Likewise.
16298 (__arm_vcreateq_s16): Likewise.
16299 (__arm_vcreateq_s32): Likewise.
16300 (__arm_vcreateq_s64): Likewise.
16301 (__arm_vshrq_n_s8): Likewise.
16302 (__arm_vshrq_n_s16): Likewise.
16303 (__arm_vshrq_n_s32): Likewise.
16304 (__arm_vshrq_n_u8): Likewise.
16305 (__arm_vshrq_n_u16): Likewise.
16306 (__arm_vshrq_n_u32): Likewise.
16307 (__arm_vcvtq_n_s16_f16): Likewise.
16308 (__arm_vcvtq_n_s32_f32): Likewise.
16309 (__arm_vcvtq_n_u16_f16): Likewise.
16310 (__arm_vcvtq_n_u32_f32): Likewise.
16311 (vshrq_n): Define polymorphic variant.
16312 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
16314 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16315 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16316 * config/arm/constraints.md (Rb): Define constraint to check constant is
16317 in the range of 1 to 8.
16318 (Rf): Define constraint to check constant is in the range of 1 to 32.
16319 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
16320 (mve_vshrq_n_<supf><mode>): Likewise.
16321 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
16322 * config/arm/predicates.md (mve_imm_8): Define predicate to check
16323 the matching constraint Rb.
16324 (mve_imm_32): Define predicate to check the matching constraint Rf.
16326 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16327 Mihail Ionescu <mihail.ionescu@arm.com>
16328 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16330 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
16331 qualifier for binary operands.
16332 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
16333 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16334 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16335 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
16336 (vsubq_n_f32): Likewise.
16337 (vbrsrq_n_f16): Likewise.
16338 (vbrsrq_n_f32): Likewise.
16339 (vcvtq_n_f16_s16): Likewise.
16340 (vcvtq_n_f32_s32): Likewise.
16341 (vcvtq_n_f16_u16): Likewise.
16342 (vcvtq_n_f32_u32): Likewise.
16343 (vcreateq_f16): Likewise.
16344 (vcreateq_f32): Likewise.
16345 (__arm_vsubq_n_f16): Define intrinsic.
16346 (__arm_vsubq_n_f32): Likewise.
16347 (__arm_vbrsrq_n_f16): Likewise.
16348 (__arm_vbrsrq_n_f32): Likewise.
16349 (__arm_vcvtq_n_f16_s16): Likewise.
16350 (__arm_vcvtq_n_f32_s32): Likewise.
16351 (__arm_vcvtq_n_f16_u16): Likewise.
16352 (__arm_vcvtq_n_f32_u32): Likewise.
16353 (__arm_vcreateq_f16): Likewise.
16354 (__arm_vcreateq_f32): Likewise.
16355 (vsubq): Define polymorphic variant.
16356 (vbrsrq): Likewise.
16357 (vcvtq_n): Likewise.
16358 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
16360 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
16361 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16362 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16363 * config/arm/constraints.md (Rd): Define constraint to check constant is
16364 in the range of 1 to 16.
16365 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
16366 mve_vbrsrq_n_f<mode>: Likewise.
16367 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
16368 mve_vcreateq_f<mode>: Likewise.
16369 * config/arm/predicates.md (mve_imm_16): Define predicate to check
16370 the matching constraint Rd.
16372 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16373 Mihail Ionescu <mihail.ionescu@arm.com>
16374 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16376 * config/arm/arm-builtins.c (hi_UP): Define mode.
16377 * config/arm/arm.h (IS_VPR_REGNUM): Move.
16378 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
16379 (APSRQ_REGNUM): Modify.
16380 (APSRGE_REGNUM): Modify.
16381 * config/arm/arm_mve.h (vctp16q): Define macro.
16382 (vctp32q): Likewise.
16383 (vctp64q): Likewise.
16384 (vctp8q): Likewise.
16386 (__arm_vctp16q): Define intrinsic.
16387 (__arm_vctp32q): Likewise.
16388 (__arm_vctp64q): Likewise.
16389 (__arm_vctp8q): Likewise.
16390 (__arm_vpnot): Likewise.
16391 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
16393 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
16394 (mve_vpnothi): Likewise.
16396 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16397 Mihail Ionescu <mihail.ionescu@arm.com>
16398 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16400 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
16401 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
16402 (vdupq_n_s16): Likewise.
16403 (vdupq_n_s32): Likewise.
16404 (vabsq_s8): Likewise.
16405 (vabsq_s16): Likewise.
16406 (vabsq_s32): Likewise.
16407 (vclsq_s8): Likewise.
16408 (vclsq_s16): Likewise.
16409 (vclsq_s32): Likewise.
16410 (vclzq_s8): Likewise.
16411 (vclzq_s16): Likewise.
16412 (vclzq_s32): Likewise.
16413 (vnegq_s8): Likewise.
16414 (vnegq_s16): Likewise.
16415 (vnegq_s32): Likewise.
16416 (vaddlvq_s32): Likewise.
16417 (vaddvq_s8): Likewise.
16418 (vaddvq_s16): Likewise.
16419 (vaddvq_s32): Likewise.
16420 (vmovlbq_s8): Likewise.
16421 (vmovlbq_s16): Likewise.
16422 (vmovltq_s8): Likewise.
16423 (vmovltq_s16): Likewise.
16424 (vmvnq_s8): Likewise.
16425 (vmvnq_s16): Likewise.
16426 (vmvnq_s32): Likewise.
16427 (vrev16q_s8): Likewise.
16428 (vrev32q_s8): Likewise.
16429 (vrev32q_s16): Likewise.
16430 (vqabsq_s8): Likewise.
16431 (vqabsq_s16): Likewise.
16432 (vqabsq_s32): Likewise.
16433 (vqnegq_s8): Likewise.
16434 (vqnegq_s16): Likewise.
16435 (vqnegq_s32): Likewise.
16436 (vcvtaq_s16_f16): Likewise.
16437 (vcvtaq_s32_f32): Likewise.
16438 (vcvtnq_s16_f16): Likewise.
16439 (vcvtnq_s32_f32): Likewise.
16440 (vcvtpq_s16_f16): Likewise.
16441 (vcvtpq_s32_f32): Likewise.
16442 (vcvtmq_s16_f16): Likewise.
16443 (vcvtmq_s32_f32): Likewise.
16444 (vmvnq_u8): Likewise.
16445 (vmvnq_u16): Likewise.
16446 (vmvnq_u32): Likewise.
16447 (vdupq_n_u8): Likewise.
16448 (vdupq_n_u16): Likewise.
16449 (vdupq_n_u32): Likewise.
16450 (vclzq_u8): Likewise.
16451 (vclzq_u16): Likewise.
16452 (vclzq_u32): Likewise.
16453 (vaddvq_u8): Likewise.
16454 (vaddvq_u16): Likewise.
16455 (vaddvq_u32): Likewise.
16456 (vrev32q_u8): Likewise.
16457 (vrev32q_u16): Likewise.
16458 (vmovltq_u8): Likewise.
16459 (vmovltq_u16): Likewise.
16460 (vmovlbq_u8): Likewise.
16461 (vmovlbq_u16): Likewise.
16462 (vrev16q_u8): Likewise.
16463 (vaddlvq_u32): Likewise.
16464 (vcvtpq_u16_f16): Likewise.
16465 (vcvtpq_u32_f32): Likewise.
16466 (vcvtnq_u16_f16): Likewise.
16467 (vcvtmq_u16_f16): Likewise.
16468 (vcvtmq_u32_f32): Likewise.
16469 (vcvtaq_u16_f16): Likewise.
16470 (vcvtaq_u32_f32): Likewise.
16471 (__arm_vdupq_n_s8): Define intrinsic.
16472 (__arm_vdupq_n_s16): Likewise.
16473 (__arm_vdupq_n_s32): Likewise.
16474 (__arm_vabsq_s8): Likewise.
16475 (__arm_vabsq_s16): Likewise.
16476 (__arm_vabsq_s32): Likewise.
16477 (__arm_vclsq_s8): Likewise.
16478 (__arm_vclsq_s16): Likewise.
16479 (__arm_vclsq_s32): Likewise.
16480 (__arm_vclzq_s8): Likewise.
16481 (__arm_vclzq_s16): Likewise.
16482 (__arm_vclzq_s32): Likewise.
16483 (__arm_vnegq_s8): Likewise.
16484 (__arm_vnegq_s16): Likewise.
16485 (__arm_vnegq_s32): Likewise.
16486 (__arm_vaddlvq_s32): Likewise.
16487 (__arm_vaddvq_s8): Likewise.
16488 (__arm_vaddvq_s16): Likewise.
16489 (__arm_vaddvq_s32): Likewise.
16490 (__arm_vmovlbq_s8): Likewise.
16491 (__arm_vmovlbq_s16): Likewise.
16492 (__arm_vmovltq_s8): Likewise.
16493 (__arm_vmovltq_s16): Likewise.
16494 (__arm_vmvnq_s8): Likewise.
16495 (__arm_vmvnq_s16): Likewise.
16496 (__arm_vmvnq_s32): Likewise.
16497 (__arm_vrev16q_s8): Likewise.
16498 (__arm_vrev32q_s8): Likewise.
16499 (__arm_vrev32q_s16): Likewise.
16500 (__arm_vqabsq_s8): Likewise.
16501 (__arm_vqabsq_s16): Likewise.
16502 (__arm_vqabsq_s32): Likewise.
16503 (__arm_vqnegq_s8): Likewise.
16504 (__arm_vqnegq_s16): Likewise.
16505 (__arm_vqnegq_s32): Likewise.
16506 (__arm_vmvnq_u8): Likewise.
16507 (__arm_vmvnq_u16): Likewise.
16508 (__arm_vmvnq_u32): Likewise.
16509 (__arm_vdupq_n_u8): Likewise.
16510 (__arm_vdupq_n_u16): Likewise.
16511 (__arm_vdupq_n_u32): Likewise.
16512 (__arm_vclzq_u8): Likewise.
16513 (__arm_vclzq_u16): Likewise.
16514 (__arm_vclzq_u32): Likewise.
16515 (__arm_vaddvq_u8): Likewise.
16516 (__arm_vaddvq_u16): Likewise.
16517 (__arm_vaddvq_u32): Likewise.
16518 (__arm_vrev32q_u8): Likewise.
16519 (__arm_vrev32q_u16): Likewise.
16520 (__arm_vmovltq_u8): Likewise.
16521 (__arm_vmovltq_u16): Likewise.
16522 (__arm_vmovlbq_u8): Likewise.
16523 (__arm_vmovlbq_u16): Likewise.
16524 (__arm_vrev16q_u8): Likewise.
16525 (__arm_vaddlvq_u32): Likewise.
16526 (__arm_vcvtpq_u16_f16): Likewise.
16527 (__arm_vcvtpq_u32_f32): Likewise.
16528 (__arm_vcvtnq_u16_f16): Likewise.
16529 (__arm_vcvtmq_u16_f16): Likewise.
16530 (__arm_vcvtmq_u32_f32): Likewise.
16531 (__arm_vcvtaq_u16_f16): Likewise.
16532 (__arm_vcvtaq_u32_f32): Likewise.
16533 (__arm_vcvtaq_s16_f16): Likewise.
16534 (__arm_vcvtaq_s32_f32): Likewise.
16535 (__arm_vcvtnq_s16_f16): Likewise.
16536 (__arm_vcvtnq_s32_f32): Likewise.
16537 (__arm_vcvtpq_s16_f16): Likewise.
16538 (__arm_vcvtpq_s32_f32): Likewise.
16539 (__arm_vcvtmq_s16_f16): Likewise.
16540 (__arm_vcvtmq_s32_f32): Likewise.
16541 (vdupq_n): Define polymorphic variant.
16546 (vaddlvq): Likewise.
16547 (vaddvq): Likewise.
16548 (vmovlbq): Likewise.
16549 (vmovltq): Likewise.
16551 (vrev16q): Likewise.
16552 (vrev32q): Likewise.
16553 (vqabsq): Likewise.
16554 (vqnegq): Likewise.
16555 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
16556 (UNOP_SNONE_NONE): Likewise.
16557 (UNOP_UNONE_UNONE): Likewise.
16558 (UNOP_UNONE_NONE): Likewise.
16559 * config/arm/constraints.md (e): Define new constriant to allow only
16561 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
16562 (mve_vnegq_s<mode>): Likewise.
16563 (mve_vmvnq_<supf><mode>): Likewise.
16564 (mve_vdupq_n_<supf><mode>): Likewise.
16565 (mve_vclzq_<supf><mode>): Likewise.
16566 (mve_vclsq_s<mode>): Likewise.
16567 (mve_vaddvq_<supf><mode>): Likewise.
16568 (mve_vabsq_s<mode>): Likewise.
16569 (mve_vrev32q_<supf><mode>): Likewise.
16570 (mve_vmovltq_<supf><mode>): Likewise.
16571 (mve_vmovlbq_<supf><mode>): Likewise.
16572 (mve_vcvtpq_<supf><mode>): Likewise.
16573 (mve_vcvtnq_<supf><mode>): Likewise.
16574 (mve_vcvtmq_<supf><mode>): Likewise.
16575 (mve_vcvtaq_<supf><mode>): Likewise.
16576 (mve_vrev16q_<supf>v16qi): Likewise.
16577 (mve_vaddlvq_<supf>v4si): Likewise.
16579 2020-03-17 Jakub Jelinek <jakub@redhat.com>
16581 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
16583 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
16585 * read-rtl-function.c (find_param_by_name,
16586 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
16588 * spellcheck.c (get_edit_distance_cutoff): Likewise.
16589 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
16590 * tree.def (SWITCH_EXPR): Likewise.
16591 * selftest.c (assert_str_contains): Likewise.
16592 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
16594 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
16595 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
16596 * langhooks.h (struct lang_hooks_for_decls): Likewise.
16597 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
16598 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
16600 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
16601 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
16602 * tree.c (component_ref_size): Likewise.
16603 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
16604 * gimple-ssa-sprintf.c (get_string_length, format_string,
16605 format_directive): Likewise.
16606 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
16607 * input.c (string_concat_db::get_string_concatenation,
16608 test_lexer_string_locations_ucn4): Likewise.
16609 * cfgexpand.c (pass_expand::execute): Likewise.
16610 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
16611 maybe_diag_overlap): Likewise.
16612 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
16613 * shrink-wrap.c (spread_components): Likewise.
16614 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
16616 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
16618 * dwarf2out.c (dwarf2out_early_finish): Likewise.
16619 * gimple-ssa-store-merging.c: Likewise.
16620 * ira-costs.c (record_operand_costs): Likewise.
16621 * tree-vect-loop.c (vectorizable_reduction): Likewise.
16622 * target.def (dispatch): Likewise.
16623 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
16624 in documentation text.
16625 * doc/tm.texi: Regenerated.
16626 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
16627 duplicated word issue in a comment.
16628 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
16629 * config/i386/i386-features.c (remove_partial_avx_dependency):
16631 * config/msp430/msp430.c (msp430_select_section): Likewise.
16632 * config/gcn/gcn-run.c (load_image): Likewise.
16633 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
16634 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
16635 * config/aarch64/falkor-tag-collision-avoidance.c
16636 (single_dest_per_chain): Likewise.
16637 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
16638 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
16639 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
16640 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
16642 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
16643 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
16644 * config/rs6000/rs6000-logue.c
16645 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
16646 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
16647 Fix various other issues in the comment.
16649 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
16651 * config/arm/t-rmprofile: create new multilib for
16652 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
16655 2020-03-17 Jakub Jelinek <jakub@redhat.com>
16657 PR tree-optimization/94015
16658 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
16659 function where EXP is address of the bytes being stored rather than
16660 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
16661 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
16662 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
16663 calling native_encode_expr if host or target doesn't have 8-bit
16664 chars. Formatting fixes.
16665 (count_nonzero_bytes_addr): New function.
16667 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16668 Mihail Ionescu <mihail.ionescu@arm.com>
16669 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16671 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
16672 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
16673 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
16674 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
16675 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
16676 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
16677 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
16678 (vmvnq_n_s32): Likewise.
16679 (vrev64q_s8): Likewise.
16680 (vrev64q_s16): Likewise.
16681 (vrev64q_s32): Likewise.
16682 (vcvtq_s16_f16): Likewise.
16683 (vcvtq_s32_f32): Likewise.
16684 (vrev64q_u8): Likewise.
16685 (vrev64q_u16): Likewise.
16686 (vrev64q_u32): Likewise.
16687 (vmvnq_n_u16): Likewise.
16688 (vmvnq_n_u32): Likewise.
16689 (vcvtq_u16_f16): Likewise.
16690 (vcvtq_u32_f32): Likewise.
16691 (__arm_vmvnq_n_s16): Define intrinsic.
16692 (__arm_vmvnq_n_s32): Likewise.
16693 (__arm_vrev64q_s8): Likewise.
16694 (__arm_vrev64q_s16): Likewise.
16695 (__arm_vrev64q_s32): Likewise.
16696 (__arm_vrev64q_u8): Likewise.
16697 (__arm_vrev64q_u16): Likewise.
16698 (__arm_vrev64q_u32): Likewise.
16699 (__arm_vmvnq_n_u16): Likewise.
16700 (__arm_vmvnq_n_u32): Likewise.
16701 (__arm_vcvtq_s16_f16): Likewise.
16702 (__arm_vcvtq_s32_f32): Likewise.
16703 (__arm_vcvtq_u16_f16): Likewise.
16704 (__arm_vcvtq_u32_f32): Likewise.
16705 (vrev64q): Define polymorphic variant.
16706 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
16707 (UNOP_SNONE_NONE): Likewise.
16708 (UNOP_SNONE_IMM): Likewise.
16709 (UNOP_UNONE_UNONE): Likewise.
16710 (UNOP_UNONE_NONE): Likewise.
16711 (UNOP_UNONE_IMM): Likewise.
16712 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
16713 (mve_vcvtq_from_f_<supf><mode>): Likewise.
16714 (mve_vmvnq_n_<supf><mode>): Likewise.
16716 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16717 Mihail Ionescu <mihail.ionescu@arm.com>
16718 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16720 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
16721 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
16722 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
16723 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
16724 (vrndxq_f32): Likewise.
16725 (vrndq_f16) Likewise.
16726 (vrndq_f32): Likewise.
16727 (vrndpq_f16): Likewise.
16728 (vrndpq_f32): Likewise.
16729 (vrndnq_f16): Likewise.
16730 (vrndnq_f32): Likewise.
16731 (vrndmq_f16): Likewise.
16732 (vrndmq_f32): Likewise.
16733 (vrndaq_f16): Likewise.
16734 (vrndaq_f32): Likewise.
16735 (vrev64q_f16): Likewise.
16736 (vrev64q_f32): Likewise.
16737 (vnegq_f16): Likewise.
16738 (vnegq_f32): Likewise.
16739 (vdupq_n_f16): Likewise.
16740 (vdupq_n_f32): Likewise.
16741 (vabsq_f16): Likewise.
16742 (vabsq_f32): Likewise.
16743 (vrev32q_f16): Likewise.
16744 (vcvttq_f32_f16): Likewise.
16745 (vcvtbq_f32_f16): Likewise.
16746 (vcvtq_f16_s16): Likewise.
16747 (vcvtq_f32_s32): Likewise.
16748 (vcvtq_f16_u16): Likewise.
16749 (vcvtq_f32_u32): Likewise.
16750 (__arm_vrndxq_f16): Define intrinsic.
16751 (__arm_vrndxq_f32): Likewise.
16752 (__arm_vrndq_f16): Likewise.
16753 (__arm_vrndq_f32): Likewise.
16754 (__arm_vrndpq_f16): Likewise.
16755 (__arm_vrndpq_f32): Likewise.
16756 (__arm_vrndnq_f16): Likewise.
16757 (__arm_vrndnq_f32): Likewise.
16758 (__arm_vrndmq_f16): Likewise.
16759 (__arm_vrndmq_f32): Likewise.
16760 (__arm_vrndaq_f16): Likewise.
16761 (__arm_vrndaq_f32): Likewise.
16762 (__arm_vrev64q_f16): Likewise.
16763 (__arm_vrev64q_f32): Likewise.
16764 (__arm_vnegq_f16): Likewise.
16765 (__arm_vnegq_f32): Likewise.
16766 (__arm_vdupq_n_f16): Likewise.
16767 (__arm_vdupq_n_f32): Likewise.
16768 (__arm_vabsq_f16): Likewise.
16769 (__arm_vabsq_f32): Likewise.
16770 (__arm_vrev32q_f16): Likewise.
16771 (__arm_vcvttq_f32_f16): Likewise.
16772 (__arm_vcvtbq_f32_f16): Likewise.
16773 (__arm_vcvtq_f16_s16): Likewise.
16774 (__arm_vcvtq_f32_s32): Likewise.
16775 (__arm_vcvtq_f16_u16): Likewise.
16776 (__arm_vcvtq_f32_u32): Likewise.
16777 (vrndxq): Define polymorphic variants.
16779 (vrndpq): Likewise.
16780 (vrndnq): Likewise.
16781 (vrndmq): Likewise.
16782 (vrndaq): Likewise.
16783 (vrev64q): Likewise.
16786 (vrev32q): Likewise.
16787 (vcvtbq_f32): Likewise.
16788 (vcvttq_f32): Likewise.
16790 * config/arm/arm_mve_builtins.def (VAR2): Define.
16792 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
16793 (mve_vrndq_f<mode>): Likewise.
16794 (mve_vrndpq_f<mode>): Likewise.
16795 (mve_vrndnq_f<mode>): Likewise.
16796 (mve_vrndmq_f<mode>): Likewise.
16797 (mve_vrndaq_f<mode>): Likewise.
16798 (mve_vrev64q_f<mode>): Likewise.
16799 (mve_vnegq_f<mode>): Likewise.
16800 (mve_vdupq_n_f<mode>): Likewise.
16801 (mve_vabsq_f<mode>): Likewise.
16802 (mve_vrev32q_fv8hf): Likewise.
16803 (mve_vcvttq_f32_f16v4sf): Likewise.
16804 (mve_vcvtbq_f32_f16v4sf): Likewise.
16805 (mve_vcvtq_to_f_<supf><mode>): Likewise.
16807 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16808 Mihail Ionescu <mihail.ionescu@arm.com>
16809 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16811 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
16813 (ARM_BUILTIN_MVE_PATTERN_START): Define.
16814 (arm_init_mve_builtins): Define function.
16815 (arm_init_builtins): Add TARGET_HAVE_MVE check.
16816 (arm_expand_builtin_1): Check the range of fcode.
16817 (arm_expand_mve_builtin): Define function to expand MVE builtins.
16818 (arm_expand_builtin): Check the range of fcode.
16819 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
16821 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
16822 (vst4q_s8): Define macro.
16823 (vst4q_s16): Likewise.
16824 (vst4q_s32): Likewise.
16825 (vst4q_u8): Likewise.
16826 (vst4q_u16): Likewise.
16827 (vst4q_u32): Likewise.
16828 (vst4q_f16): Likewise.
16829 (vst4q_f32): Likewise.
16830 (__arm_vst4q_s8): Define inline builtin.
16831 (__arm_vst4q_s16): Likewise.
16832 (__arm_vst4q_s32): Likewise.
16833 (__arm_vst4q_u8): Likewise.
16834 (__arm_vst4q_u16): Likewise.
16835 (__arm_vst4q_u32): Likewise.
16836 (__arm_vst4q_f16): Likewise.
16837 (__arm_vst4q_f32): Likewise.
16838 (__ARM_mve_typeid): Define macro with MVE types.
16839 (__ARM_mve_coerce): Define macro with _Generic feature.
16840 (vst4q): Define polymorphic variant for different vst4q builtins.
16841 * config/arm/arm_mve_builtins.def: New file.
16842 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
16844 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
16845 (unspec): Define unspec.
16846 (mve_vst4q<mode>): Define RTL pattern.
16847 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
16849 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
16851 (define_split): Allow OI mode split for MVE after reload.
16852 (define_split): Allow XI mode split for MVE after reload.
16853 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
16854 (arm-builtins.o): Likewise.
16856 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
16858 * c-typeck.c (process_init_element): Handle constructor_type with
16859 type size represented by POLY_INT_CST.
16861 2020-03-17 Jakub Jelinek <jakub@redhat.com>
16863 PR tree-optimization/94187
16864 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
16865 nchars - offset < nbytes.
16867 PR middle-end/94189
16868 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
16869 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
16870 for code-generation.
16872 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
16875 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
16876 after changing memory subreg.
16878 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16879 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16881 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
16882 emulator calls for dobule precision arithmetic operations for MVE.
16884 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16885 Mihail Ionescu <mihail.ionescu@arm.com>
16886 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16888 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
16889 feature bit is on and -mfpu=auto is passed as compiler option, do not
16890 generate error on not finding any matching fpu. Because in this case
16891 fpu is not required.
16892 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
16893 enabled for MVE and also for all VFP extensions.
16894 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
16896 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
16897 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
16898 along with feature bits mve_float.
16899 (mve): Modify add options in armv8.1-m.main arch for MVE.
16900 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
16902 * config/arm/arm.c (use_return_insn): Replace the
16903 check with TARGET_VFP_BASE.
16904 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
16906 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
16907 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
16909 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
16910 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
16912 (arm_compute_frame_layout): Likewise.
16913 (arm_save_coproc_regs): Likewise.
16914 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
16916 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
16917 with equivalent macro TARGET_VFP_BASE.
16918 (arm_expand_epilogue_apcs_frame): Likewise.
16919 (arm_expand_epilogue): Likewise.
16920 (arm_conditional_register_usage): Likewise.
16921 (arm_declare_function_name): Add check to skip printing .fpu directive
16922 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
16924 * config/arm/arm.h (TARGET_VFP_BASE): Define.
16925 * config/arm/arm.md (arch): Add "mve" to arch.
16926 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
16927 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
16928 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
16929 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
16931 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
16932 to not allow for MVE.
16933 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
16935 (VUNSPEC_GET_FPSCR): Define.
16936 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
16937 instructions which move to general-purpose Register from Floating-point
16938 Special register and vice-versa.
16939 (thumb2_movhi_fp16): Likewise.
16940 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
16941 with MCR and MRC instructions which set and get Floating-point Status
16942 and Control Register (FPSCR).
16943 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
16945 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
16946 float move patterns in MVE.
16947 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
16948 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
16949 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
16950 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
16951 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
16952 TARGET_VFP_BASE check.
16953 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
16954 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
16956 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
16957 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
16961 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16962 Mihail Ionescu <mihail.ionescu@arm.com>
16963 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16965 * config.gcc (arm_mve.h): Include mve intrinsics header file.
16966 * config/arm/aout.h (p0): Add new register name for MVE predicated
16968 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
16969 common to Neon and MVE.
16970 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
16971 (arm_init_simd_builtin_types): Disable poly types for MVE.
16972 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
16973 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
16974 ARM_BUILTIN_NEON_LANE_CHECK.
16975 (mve_dereference_pointer): Add function.
16976 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
16978 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
16979 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
16980 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
16981 with floating point enabled.
16982 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
16983 simd_immediate_valid_for_move.
16984 (simd_immediate_valid_for_move): Renamed from
16985 neon_immediate_valid_for_move function.
16986 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
16987 error if vfpv2 feature bit is disabled and mve feature bit is also
16988 disabled for HARD_FLOAT_ABI.
16989 (use_return_insn): Check to not push VFP regs for MVE.
16990 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
16992 (aapcs_vfp_allocate_return_reg): Likewise.
16993 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
16994 address operand for MVE.
16995 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
16996 (neon_valid_immediate): Rename to simd_valid_immediate.
16997 (simd_valid_immediate): Rename from neon_valid_immediate.
16998 (simd_valid_immediate): MVE check on size of vector is 128 bits.
16999 (neon_immediate_valid_for_move): Rename to
17000 simd_immediate_valid_for_move.
17001 (simd_immediate_valid_for_move): Rename from
17002 neon_immediate_valid_for_move.
17003 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
17005 (neon_make_constant): Modify call to neon_valid_immediate function.
17006 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
17008 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
17009 (arm_compute_frame_layout): Calculate space for saved VFP registers for
17011 (arm_save_coproc_regs): Save coproc registers for MVE.
17012 (arm_print_operand): Add case 'E' to print memory operands for MVE.
17013 (arm_print_operand_address): Check to print register number for MVE.
17014 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
17015 (arm_modes_tieable_p): Check to allow structure mode for MVE.
17016 (arm_regno_class): Add VPR_REGNUM check.
17017 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
17019 (arm_expand_epilogue): MVE check for enabling pop instructions in
17021 (arm_print_asm_arch_directives): Modify function to disable print of
17022 .arch_extension "mve" and "fp" for cases where MVE is enabled with
17024 (arm_vector_mode_supported_p): Check for modes available in MVE interger
17025 and MVE floating point.
17026 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
17028 (arm_conditional_register_usage): Enable usage of conditional regsiter
17030 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
17031 (arm_declare_function_name): Modify function to disable print of
17032 .arch_extension "mve" and "fp" for cases where MVE is enabled with
17034 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
17035 when target general registers are required.
17036 (TARGET_HAVE_MVE_FLOAT): Likewise.
17037 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
17039 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
17040 which indicate this is not available for across function calls.
17041 (FIRST_PSEUDO_REGISTER): Modify.
17042 (VALID_MVE_MODE): Define valid MVE mode.
17043 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
17044 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
17045 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
17046 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
17048 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
17049 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
17050 (enum reg_class): Add VPR_REG entry.
17051 (REG_CLASS_NAMES): Add VPR_REG entry.
17052 * config/arm/arm.md (VPR_REGNUM): Define.
17053 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
17054 "unconditional" instructions.
17055 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
17056 (movdf_soft_insn): Modify RTL to not allow for MVE.
17057 (vfp_pop_multiple_with_writeback): Enable for MVE.
17058 (include "mve.md"): Include mve.md file.
17059 * config/arm/arm_mve.h: Add MVE intrinsics head file.
17060 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
17061 for vector predicated operands.
17062 * config/arm/iterators.md (VNIM1): Define.
17063 (VNINOTM1): Define.
17064 (VHFBF_split): Define
17065 * config/arm/mve.md: New file.
17066 (mve_mov<mode>): Define RTL for move, store and load in MVE.
17067 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
17069 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
17070 simd_immediate_valid_for_move.
17071 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
17072 is common to MVE and NEON to vec-common.md file.
17073 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
17074 * config/arm/predicates.md (vpr_register_operand): Define.
17075 * config/arm/t-arm: Add mve.md file.
17076 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
17078 (mve_store): Add MVE instructions mve_store to attribute "type".
17079 (mve_load): Add MVE instructions mve_load to attribute "type".
17080 (is_mve_type): Define attribute.
17081 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
17082 standard move patterns in MVE along with NEON and IWMMXT with mode
17084 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
17085 and IWMMXT with mode iterator V8HF.
17086 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
17088 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
17089 simd_immediate_valid_for_move.
17092 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
17095 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
17096 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
17098 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
17100 2020-03-16 Jakub Jelinek <jakub@redhat.com>
17103 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
17106 PR tree-optimization/94166
17107 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
17108 as secondary comparison key.
17110 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
17112 PR tree-optimization/94125
17113 * tree-loop-distribution.c
17114 (loop_distribution::break_alias_scc_partitions): Update post order
17115 number for merged scc.
17117 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
17120 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
17122 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
17123 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
17124 and ext_sse_reg_operand check.
17126 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
17128 * common.opt: Avoid redundancy in the help text.
17129 * config/arc/arc.opt: Likewise.
17130 * config/cr16/cr16.opt: Likewise.
17132 2020-03-14 Jakub Jelinek <jakub@redhat.com>
17134 PR middle-end/93566
17135 * tree-nested.c (convert_nonlocal_omp_clauses,
17136 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
17137 with C/C++ array sections.
17139 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
17142 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
17143 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
17146 2020-03-14 Jakub Jelinek <jakub@redhat.com>
17148 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
17149 "a an" to "an" in a comment.
17150 * hsa-common.h (is_a_helper): Likewise.
17151 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
17152 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
17153 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
17155 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
17158 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
17159 64-bit value by 64 bits (UB).
17161 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
17163 PR rtl-optimization/92303
17164 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
17166 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
17168 PR rtl-optimization/94148
17169 PR rtl-optimization/94042
17170 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
17171 (df_worklist_propagate_forward): New parameter last_change_age, use
17172 that instead of bb->aux.
17173 (df_worklist_propagate_backward): Ditto.
17174 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
17176 2020-03-13 Richard Biener <rguenther@suse.de>
17178 PR tree-optimization/94163
17179 * tree-ssa-pre.c (create_expression_by_pieces): Check
17180 whether alignment would be zero.
17182 2020-03-13 Martin Liska <mliska@suse.cz>
17185 * lto-wrapper.c (run_gcc): Use concat for appending
17186 to collect_gcc_options.
17188 2020-03-13 Jakub Jelinek <jakub@redhat.com>
17191 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
17192 instead of GEN_INT.
17194 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
17197 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
17198 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
17199 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
17200 TARGET_AVX512VL and ext_sse_reg_operand check.
17202 2020-03-13 Bu Le <bule1@huawei.com>
17205 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
17206 (-param=aarch64-double-recp-precision=): New options.
17207 * doc/invoke.texi: Document them.
17208 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
17209 instead of hard-coding the choice of 1 for float and 2 for double.
17211 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
17213 PR rtl-optimization/94119
17214 * resource.h (clear_hashed_info_until_next_barrier): Declare.
17215 * resource.c (clear_hashed_info_until_next_barrier): New function.
17216 * reorg.c (add_to_delay_list): Fix formatting.
17217 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
17218 the next instruction after removing a BARRIER.
17220 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
17222 PR middle-end/92071
17223 * expmed.c (store_integral_bit_field): For fields larger than a word,
17224 call extract_bit_field on the value if the mode is BLKmode. Remove
17225 specific path for big-endian targets and tidy things up a little bit.
17227 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
17229 PR rtl-optimization/90275
17230 * cse.c (cse_insn): Delete no-op register moves too.
17232 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
17234 * config/rx/rx.md (CTRLREG_CPEN): Remove.
17235 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
17237 2020-03-12 Richard Biener <rguenther@suse.de>
17239 PR tree-optimization/94103
17240 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
17241 punning when the mode precision is not sufficient.
17243 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
17246 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
17247 MODE_V1DF and MODE_V2SF.
17248 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
17249 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
17252 2020-03-12 Jakub Jelinek <jakub@redhat.com>
17254 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
17255 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
17256 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
17257 * doc/tm.texi: Regenerated.
17259 PR tree-optimization/94130
17260 * tree-ssa-dse.c: Include gimplify.h.
17261 (increment_start_addr): If stmt has lhs, drop the lhs from call and
17262 set it after the call to the original value of the first argument.
17264 (decrement_count): Formatting fix.
17266 2020-03-11 Delia Burduv <delia.burduv@arm.com>
17268 * config/arm/arm-builtins.c
17269 (arm_init_simd_builtin_scalar_types): New.
17270 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
17271 (vld2q_bf16): Used new builtin type.
17272 (vld3_bf16): Used new builtin type.
17273 (vld3q_bf16): Used new builtin type.
17274 (vld4_bf16): Used new builtin type.
17275 (vld4q_bf16): Used new builtin type.
17276 (vld2_dup_bf16): Used new builtin type.
17277 (vld2q_dup_bf16): Used new builtin type.
17278 (vld3_dup_bf16): Used new builtin type.
17279 (vld3q_dup_bf16): Used new builtin type.
17280 (vld4_dup_bf16): Used new builtin type.
17281 (vld4q_dup_bf16): Used new builtin type.
17283 2020-03-11 Jakub Jelinek <jakub@redhat.com>
17286 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
17287 at the start to switch to data section. Don't print extra newline if
17288 .globl directive has not been emitted.
17290 2020-03-11 Richard Biener <rguenther@suse.de>
17292 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
17295 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
17297 PR middle-end/93961
17298 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
17299 whose type is a qualified union.
17301 2020-03-11 Jakub Jelinek <jakub@redhat.com>
17304 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
17305 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
17308 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
17310 (get_nth_most_common_value): Use abs_hwi instead of abs.
17312 PR middle-end/94111
17313 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
17314 is rvc_normal, otherwise use real_to_decimal to print the number to
17317 PR tree-optimization/94114
17318 * tree-loop-distribution.c (generate_memset_builtin): Call
17319 rewrite_to_non_trapping_overflow even on mem.
17320 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
17323 2020-03-10 Jeff Law <law@redhat.com>
17325 * config/bfin/bfin.md (movsi_insv): Add length attribute.
17327 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
17330 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
17331 NAN and SIGNED_ZEROR for smax/smin.
17333 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
17336 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
17337 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
17339 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
17341 * loop-iv.c (find_simple_exit): Make it static.
17342 * cfgloop.h: Remove the corresponding prototype.
17344 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
17346 * ddg.c (create_ddg): Fix intendation.
17347 (set_recurrence_length): Likewise.
17348 (create_ddg_all_sccs): Likewise.
17350 2020-03-10 Jakub Jelinek <jakub@redhat.com>
17353 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
17354 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
17357 2020-03-09 Jason Merrill <jason@redhat.com>
17359 * gdbinit.in (pgs): Fix typo in documentation.
17361 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
17365 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
17367 PR rtl-optimization/93564
17368 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
17369 do not honor reg alloc order.
17371 2020-03-09 Andrew Pinski <apinski@marvell.com>
17373 PR inline-asm/94095
17374 * doc/extend.texi (x86 Operand Modifiers): Fix column
17377 2020-03-09 Martin Liska <mliska@suse.cz>
17380 * config/rs6000/rs6000.c (rs6000_option_override_internal):
17381 Remove set of str_align_loops and str_align_jumps as these
17382 should be set in previous 2 conditions in the function.
17384 2020-03-09 Jakub Jelinek <jakub@redhat.com>
17386 PR rtl-optimization/94045
17387 * params.opt (-param=max-find-base-term-values=): New option.
17388 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
17389 in a single toplevel find_base_term call.
17391 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
17394 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
17395 * config/aarch64/aarch64-simd.md
17396 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
17397 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
17398 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
17399 * config/aarch64/arm_neon.h:
17400 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
17401 (vmlal_lane_u16): Likewise.
17402 (vmlal_lane_s32): Likewise.
17403 (vmlal_lane_u32): Likewise.
17404 (vmlal_laneq_s16): Likewise.
17405 (vmlal_laneq_u16): Likewise.
17406 (vmlal_laneq_s32): Likewise.
17407 (vmlal_laneq_u32): Likewise.
17408 (vmull_lane_s16): Likewise.
17409 (vmull_lane_u16): Likewise.
17410 (vmull_lane_s32): Likewise.
17411 (vmull_lane_u32): Likewise.
17412 (vmull_laneq_s16): Likewise.
17413 (vmull_laneq_u16): Likewise.
17414 (vmull_laneq_s32): Likewise.
17415 (vmull_laneq_u32): Likewise.
17416 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
17419 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
17421 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
17422 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
17423 (aarch64_mls_elt<mode>): Likewise.
17424 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
17425 (aarch64_fma4_elt<mode>): Likewise.
17426 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
17427 (aarch64_fma4_elt_to_64v2df): Likewise.
17428 (aarch64_fnma4_elt<mode>): Likewise.
17429 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
17430 (aarch64_fnma4_elt_to_64v2df): Likewise.
17432 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17434 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
17435 Specify movprfx attribute.
17436 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
17438 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
17441 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
17443 (TARGET_NO_FP_IN_TOC): Same.
17444 * config/rs6000/aix71.h: Same.
17445 * config/rs6000/aix72.h: Same.
17447 2020-03-06 Andrew Pinski <apinski@marvell.com>
17448 Jeff Law <law@redhat.com>
17450 PR rtl-optimization/93996
17451 * haifa-sched.c (remove_notes): Be more careful when adding
17454 2020-03-06 Delia Burduv <delia.burduv@arm.com>
17456 * config/arm/arm_neon.h (vld2_bf16): New.
17462 (vld2_dup_bf16): New.
17463 (vld2q_dup_bf16): New.
17464 (vld3_dup_bf16): New.
17465 (vld3q_dup_bf16): New.
17466 (vld4_dup_bf16): New.
17467 (vld4q_dup_bf16): New.
17468 * config/arm/arm_neon_builtins.def
17469 (vld2): Changed to VAR13 and added v4bf, v8bf
17470 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
17471 (vld3): Changed to VAR13 and added v4bf, v8bf
17472 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
17473 (vld4): Changed to VAR13 and added v4bf, v8bf
17474 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
17475 * config/arm/iterators.md (VDXBF2): New iterator.
17476 *config/arm/neon.md (neon_vld2): Use new iterators.
17477 (neon_vld2_dup<mode): Use new iterators.
17478 (neon_vld3<mode>): Likewise.
17479 (neon_vld3qa<mode>): Likewise.
17480 (neon_vld3qb<mode>): Likewise.
17481 (neon_vld3_dup<mode>): Likewise.
17482 (neon_vld4<mode>): Likewise.
17483 (neon_vld4qa<mode>): Likewise.
17484 (neon_vld4qb<mode>): Likewise.
17485 (neon_vld4_dup<mode>): Likewise.
17486 (neon_vld2_dupv8bf): New.
17487 (neon_vld3_dupv8bf): Likewise.
17488 (neon_vld4_dupv8bf): Likewise.
17490 2020-03-06 Delia Burduv <delia.burduv@arm.com>
17492 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
17493 (bfloat16x8x2_t): New typedef.
17494 (bfloat16x4x3_t): New typedef.
17495 (bfloat16x8x3_t): New typedef.
17496 (bfloat16x4x4_t): New typedef.
17497 (bfloat16x8x4_t): New typedef.
17504 * config/arm/arm-builtins.c (v2bf_UP): Define.
17506 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
17507 * config/arm/arm-modes.def (V2BF): New mode.
17508 * config/arm/arm-simd-builtin-types.def
17509 (Bfloat16x2_t): New entry.
17510 * config/arm/arm_neon_builtins.def
17511 (vst2): Changed to VAR13 and added v4bf, v8bf
17512 (vst3): Changed to VAR13 and added v4bf, v8bf
17513 (vst4): Changed to VAR13 and added v4bf, v8bf
17514 * config/arm/iterators.md (VDXBF): New iterator.
17515 (VQ2BF): New iterator.
17516 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
17517 (neon_vst2<mode>): Used new iterators.
17518 (neon_vst3<mode>): Used new iterators.
17519 (neon_vst3<mode>): Used new iterators.
17520 (neon_vst3qa<mode>): Used new iterators.
17521 (neon_vst3qb<mode>): Used new iterators.
17522 (neon_vst4<mode>): Used new iterators.
17523 (neon_vst4<mode>): Used new iterators.
17524 (neon_vst4qa<mode>): Used new iterators.
17525 (neon_vst4qb<mode>): Used new iterators.
17527 2020-03-06 Delia Burduv <delia.burduv@arm.com>
17529 * config/aarch64/aarch64-simd-builtins.def
17530 (bfcvtn): New built-in function.
17531 (bfcvtn_q): New built-in function.
17532 (bfcvtn2): New built-in function.
17533 (bfcvt): New built-in function.
17534 * config/aarch64/aarch64-simd.md
17535 (aarch64_bfcvtn<q><mode>): New pattern.
17536 (aarch64_bfcvtn2v8bf): New pattern.
17537 (aarch64_bfcvtbf): New pattern.
17538 * config/aarch64/arm_bf16.h (float32_t): New typedef.
17539 (vcvth_bf16_f32): New intrinsic.
17540 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
17541 (vcvtq_low_bf16_f32): New intrinsic.
17542 (vcvtq_high_bf16_f32): New intrinsic.
17543 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
17544 (UNSPEC_BFCVTN): New UNSPEC.
17545 (UNSPEC_BFCVTN2): New UNSPEC.
17546 (UNSPEC_BFCVT): New UNSPEC.
17547 * config/arm/types.md (bf_cvt): New type.
17549 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
17551 * config/s390/s390.md ("tabort"): Get rid of two consecutive
17552 blanks in format string.
17554 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
17558 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
17559 * config/i386/i386.c (ix86_get_ssemov): New function.
17560 (ix86_output_ssemov): Likewise.
17561 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
17562 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
17564 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
17565 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
17566 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
17567 (*movti_internal): Likewise.
17568 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
17570 2020-03-05 Jeff Law <law@redhat.com>
17572 PR tree-optimization/91890
17573 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
17574 Use gimple_or_expr_nonartificial_location.
17575 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
17576 Use gimple_or_expr_nonartificial_location.
17577 * gimple.c (gimple_or_expr_nonartificial_location): New function.
17578 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
17579 * tree-ssa-strlen.c (maybe_warn_overflow): Use
17580 gimple_or_expr_nonartificial_location.
17581 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
17582 (maybe_warn_pointless_strcmp): Likewise.
17584 2020-03-05 Jakub Jelinek <jakub@redhat.com>
17587 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
17588 SRC and MASK arguments to __m128 from __m128d.
17589 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
17591 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
17593 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
17594 argument to __m128i from __m128d.
17595 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
17597 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
17598 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
17601 2020-03-05 Delia Burduv <delia.burduv@arm.com>
17603 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
17604 (vbfmlalbq_f32): New.
17605 (vbfmlaltq_f32): New.
17606 (vbfmlalbq_lane_f32): New.
17607 (vbfmlaltq_lane_f32): New.
17608 (vbfmlalbq_laneq_f32): New.
17609 (vbfmlaltq_laneq_f32): New.
17610 * config/arm/arm_neon_builtins.def (vmmla): New.
17615 (vfmab_laneq): New.
17616 (vfmat_laneq): New.
17617 * config/arm/iterators.md (BF_MA): New int iterator.
17618 (bt): New int attribute.
17619 (VQXBF): Copy of VQX with V8BF.
17620 * config/arm/neon.md (neon_vmmlav8bf): New insn.
17621 (neon_vfma<bt>v8bf): New insn.
17622 (neon_vfma<bt>_lanev8bf): New insn.
17623 (neon_vfma<bt>_laneqv8bf): New expand.
17624 (neon_vget_high<mode>): Changed iterator to VQXBF.
17625 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
17626 (UNSPEC_BFMAB): New UNSPEC.
17627 (UNSPEC_BFMAT): New UNSPEC.
17629 2020-03-05 Jakub Jelinek <jakub@redhat.com>
17631 PR middle-end/93399
17632 * tree-pretty-print.h (pretty_print_string): Declare.
17633 * tree-pretty-print.c (pretty_print_string): Remove forward
17634 declaration, no longer static. Change nbytes parameter type
17635 from unsigned to size_t.
17636 * print-rtl.c (print_value) <case CONST_STRING>: Use
17637 pretty_print_string and for shrink way too long strings.
17639 2020-03-05 Richard Biener <rguenther@suse.de>
17640 Jakub Jelinek <jakub@redhat.com>
17642 PR tree-optimization/93582
17643 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
17644 last operand as signed when looking for memset offset. Formatting
17647 2020-03-04 Andrew Pinski <apinski@marvell.com>
17650 * value-prof.c (dump_histogram_value): Use std::abs.
17652 2020-03-04 Martin Sebor <msebor@redhat.com>
17654 PR tree-optimization/93986
17655 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
17656 operands to the same precision widest_int to avoid ICEs.
17658 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
17661 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
17662 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
17663 for OPTION_MASK_ALTIVEC.
17665 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
17667 * config.gcc: Include the glibc-stdint.h header for zTPF.
17669 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
17671 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
17672 direct FPR-GPR copies.
17673 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
17676 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
17678 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
17679 operands to the prologue_tpf expander.
17680 (s390_emit_epilogue): Likewise.
17681 (s390_option_override_internal): Do error checking and setup for
17683 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
17684 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
17685 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
17686 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
17687 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
17688 operands for the check flag and the branch target.
17689 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
17690 ("mtpf-trace-hook-prologue-target")
17691 ("mtpf-trace-hook-epilogue-check")
17692 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
17694 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
17695 options are for debugging purposes and will not be documented
17698 2020-03-04 Jakub Jelinek <jakub@redhat.com>
17701 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
17703 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
17704 argument. Change pd argument so that it can be modified. Turn
17705 constant non-CONSTRUCTOR store into non-constant if it is too large.
17706 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
17708 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
17711 2020-02-04 Richard Biener <rguenther@suse.de>
17713 PR tree-optimization/93964
17714 * graphite-isl-ast-to-gimple.c
17715 (gcc_expression_from_isl_ast_expr_id): Add intermediate
17716 conversion for pointer to integer converts.
17717 * graphite-scop-detection.c (assign_parameter_index_in_region):
17720 2020-03-04 Martin Liska <mliska@suse.cz>
17724 * doc/invoke.texi: Clarify --help=language and --help=common
17727 2020-03-04 Jakub Jelinek <jakub@redhat.com>
17729 PR tree-optimization/94001
17730 * tree-tailcall.c (process_assignment): Before comparing op1 to
17731 *ass_var, verify *ass_var is non-NULL.
17733 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
17736 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
17739 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
17741 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
17742 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
17743 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
17744 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
17745 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
17746 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
17747 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
17748 (V_bf_low, V_bf_cvt_m): New mode attributes.
17749 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
17750 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
17751 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
17752 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
17753 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
17755 2020-03-03 Jakub Jelinek <jakub@redhat.com>
17757 PR tree-optimization/93582
17758 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
17759 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
17760 members, initialize them in the constructor and if mask is non-NULL,
17761 artificially push_partial_def {} for the portions of the mask that
17763 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
17764 val and return (void *)-1. Formatting fix.
17765 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
17767 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
17768 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
17770 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
17772 (visit_stmt): Formatting fix.
17774 2020-03-03 Richard Biener <rguenther@suse.de>
17776 PR tree-optimization/93946
17777 * alias.h (refs_same_for_tbaa_p): Declare.
17778 * alias.c (refs_same_for_tbaa_p): New function.
17779 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
17781 * tree-ssa-scopedtables.h
17782 (avail_exprs_stack::lookup_avail_expr): Add output argument
17783 giving access to the hashtable entry.
17784 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
17786 * tree-ssa-dom.c: Include alias.h.
17787 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
17788 removing redundant store.
17789 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
17790 (ao_ref_init_from_vn_reference): Adjust prototype.
17791 (vn_reference_lookup_pieces): Likewise.
17792 (vn_reference_insert_pieces): Likewise.
17793 * tree-ssa-sccvn.c: Track base alias set in addition to alias
17795 (eliminate_dom_walker::eliminate_stmt): Also check base alias
17796 set when removing redundant stores.
17797 (visit_reference_op_store): Likewise.
17798 * dse.c (record_store): Adjust valdity check for redundant
17801 2020-03-03 Jakub Jelinek <jakub@redhat.com>
17804 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
17806 PR rtl-optimization/94002
17807 * explow.c (plus_constant): Punt if cst has VOIDmode and
17808 get_pool_mode is different from mode.
17810 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17812 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
17813 address has an offset which fits the scalling constraint for a
17814 load/store operation.
17815 (legitimate_scaled_address_p): Update use
17816 leigitimate_small_data_address_p.
17817 (arc_print_operand): Likewise.
17818 (arc_legitimate_address_p): Likewise.
17819 (legitimate_small_data_address_p): Likewise.
17821 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17823 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
17824 (fnmasf4_fpu): Likewise.
17826 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17828 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
17830 (subdi3): Likewise.
17831 (adddi3_i): Remove pattern.
17832 (subdi3_i): Likewise.
17834 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17836 * config/arc/arc.md (eh_return): Add length info.
17838 2020-03-02 David Malcolm <dmalcolm@redhat.com>
17840 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
17842 2020-03-02 David Malcolm <dmalcolm@redhat.com>
17844 * doc/invoke.texi (Static Analyzer Options): Add
17845 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
17848 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
17851 * config/i386/i386.md (movstrict<mode>): Allow only
17852 registers with VALID_INT_MODE_P modes.
17854 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
17856 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
17857 (reduc_insn): Use 'U' and 'B' operand codes.
17858 (reduc_<reduc_op>_scal_<mode>): Allow all types.
17859 (reduc_<reduc_op>_scal_v64di): Delete.
17860 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
17861 (*plus_carry_dpp_shr_v64si): Change to ...
17862 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
17863 (mov_from_lane63_v64di): Change to ...
17864 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
17865 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
17866 Support UNSPEC_MOV_DPP_SHR output formats.
17867 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
17868 Add "use_extends" reductions.
17869 (print_operand_address): Add 'I' and 'U' codes.
17870 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
17872 2020-03-02 Martin Liska <mliska@suse.cz>
17874 * lto-wrapper.c: Fix typo in comment about
17875 C++ standard version.
17877 2020-03-01 Martin Sebor <msebor@redhat.com>
17880 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
17882 2020-03-01 Martin Sebor <msebor@redhat.com>
17884 PR middle-end/93829
17885 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
17886 of a pointer in the outermost ADDR_EXPRs.
17888 2020-02-28 Jeff Law <law@redhat.com>
17890 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
17891 * config/v850/v850.c (v850_asm_trampoline_template): Update
17894 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
17897 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
17900 2020-02-28 Martin Liska <mliska@suse.cz>
17903 * configure.ac: Improve detection of ld_date by requiring
17904 either two dashes or none.
17905 * configure: Regenerate.
17907 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
17909 PR rtl-optimization/93564
17910 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
17911 do not honor reg alloc order.
17913 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
17916 * config/aarch64/aarch64.c (aarch64_override_options): Fix
17917 misleading warning string.
17919 2020-02-27 Martin Sebor <msebor@redhat.com>
17921 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
17923 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
17926 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
17927 Split the insn into two parts. This insn only does variable
17928 extract from a register.
17929 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
17930 variable extract from memory.
17931 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
17932 only does variable extract from a register.
17933 (vsx_extract_v4sf_var_load): New insn, do variable extract from
17935 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
17936 into two parts. This insn only does variable extract from a
17938 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
17939 do variable extract from memory.
17941 2020-02-27 Martin Jambor <mjambor@suse.cz>
17942 Feng Xue <fxue@os.amperecomputing.com>
17945 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
17946 new function calls_same_node_or_its_all_contexts_clone_p.
17947 (cgraph_edge_brings_value_p): Use it.
17948 (cgraph_edge_brings_value_p): Likewise.
17949 (self_recursive_pass_through_p): Return false if caller is a clone.
17950 (self_recursive_agg_pass_through_p): Likewise.
17952 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
17954 PR middle-end/92152
17955 * alias.c (ends_tbaa_access_path_p): Break out from ...
17956 (component_uses_parent_alias_set_from): ... here.
17957 * alias.h (ends_tbaa_access_path_p): Declare.
17958 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
17959 handle trailing arrays past end of tbaa access path.
17960 (aliasing_component_refs_p): ... here; likewise.
17961 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
17962 path; disambiguate also past end of it.
17963 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
17966 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
17968 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
17969 beginning of the file.
17970 (vcreate_bf16, vcombine_bf16): New.
17971 (vdup_n_bf16, vdupq_n_bf16): New.
17972 (vdup_lane_bf16, vdup_laneq_bf16): New.
17973 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
17974 (vduph_lane_bf16, vduph_laneq_bf16): New.
17975 (vset_lane_bf16, vsetq_lane_bf16): New.
17976 (vget_lane_bf16, vgetq_lane_bf16): New.
17977 (vget_high_bf16, vget_low_bf16): New.
17978 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
17979 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
17980 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
17981 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
17982 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
17983 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
17984 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
17985 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
17986 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
17987 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
17988 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
17989 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
17990 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
17991 (vreinterpretq_bf16_p128): New.
17992 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
17993 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
17994 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
17995 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
17996 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
17997 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
17998 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
17999 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
18000 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
18001 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
18002 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
18003 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
18004 (vreinterpretq_p128_bf16): New.
18005 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
18006 (V_elem): Likewise.
18007 (V_elem_l): Likewise.
18008 (VD_LANE): Likewise.
18010 (V_DOUBLE): Likewise.
18011 (VDQX): Add V4BF and V8BF.
18012 (V_two_elem, V_three_elem, V_four_elem): Likewise.
18014 (V_HALF): Likewise.
18015 (V_double_vector_mode): Likewise.
18016 (V_cmp_result): Likewise.
18017 (V_uf_sclr): Likewise.
18018 (V_sz_elem): Likewise.
18019 (Is_d_reg): Likewise.
18020 (V_mode_nunits): Likewise.
18021 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
18023 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
18025 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
18026 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
18027 (<expander><mode>3<exec>): Likewise.
18028 (<expander><mode>3): New.
18029 (v<expander><mode>3): New.
18030 (<expander><mode>3): New.
18031 (<expander><mode>3<exec>): Rename to ...
18032 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
18033 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
18035 2020-02-27 Alexandre Oliva <oliva@adacore.com>
18037 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
18040 2020-02-27 Richard Biener <rguenther@suse.de>
18042 PR tree-optimization/93508
18043 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
18044 non-_CHK variants. Valueize their length arguments.
18046 2020-02-27 Richard Biener <rguenther@suse.de>
18048 PR tree-optimization/93953
18049 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
18050 to the hash-map entry.
18052 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
18054 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
18056 2020-02-27 Mark Williams <mwilliams@fb.com>
18058 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
18059 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
18060 -ffile-prefix-map and -fmacro-prefix-map.
18061 * lto-streamer-out.c: Include file-prefix-map.h.
18062 (lto_output_location): Remap the file part of locations.
18064 2020-02-27 Jakub Jelinek <jakub@redhat.com>
18067 * gimplify.c (gimplify_init_constructor): Don't promote readonly
18068 DECL_REGISTER variables to TREE_STATIC.
18070 PR tree-optimization/93582
18071 PR tree-optimization/93945
18072 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
18073 non-zero INTEGER_CST second argument and ref->offset or ref->size
18074 not a multiple of BITS_PER_UNIT.
18076 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
18078 * doc/install.texi (Binaries): Update description of BullFreeware.
18080 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
18084 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
18085 C++ Language Options, Warning Options, and Static Analyzer
18086 Options lists. Document negative form of options enabled by
18087 default. Move some things around to more accurately sort
18088 warnings by category.
18089 (C++ Dialect Options, Warning Options, Static Analyzer
18090 Options): Document negative form of options when enabled by
18091 default. Move some things around to more accurately sort
18092 warnings by category. Add some missing index entries.
18093 Light copy-editing.
18095 2020-02-26 Carl Love <cel@us.ibm.com>
18098 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
18099 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
18100 for the vector unsigned short arguments. It is also listed as the
18101 name of the built-in for arguments vector unsigned short,
18102 vector unsigned int and vector unsigned long long built-ins. The
18103 name of the builtins for these arguments should be:
18104 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
18105 __builtin_crypto_vpmsumd respectively.
18107 2020-02-26 Richard Biener <rguenther@suse.de>
18109 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
18110 and load permutation.
18112 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
18114 PR middle-end/93843
18115 * optabs-tree.c (supportable_convert_operation): Reject types with
18118 2020-02-26 David Malcolm <dmalcolm@redhat.com>
18120 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
18122 2020-02-26 Jakub Jelinek <jakub@redhat.com>
18124 PR tree-optimization/93820
18125 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
18126 argument to ALL_INTEGER_CST_P boolean.
18127 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
18128 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
18129 adjacent INTEGER_CST store into merged_store->only_constants like
18132 2020-02-25 Jakub Jelinek <jakub@redhat.com>
18135 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
18137 * cfghooks.c (verify_flow_info): Likewise.
18138 * predict.c (combine_predictions_for_bb): Likewise.
18139 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
18140 sucessor -> successor.
18141 (find_traces_1_round): Fix comment typo, destinarion -> destination.
18142 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
18144 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
18145 message typo, sucessors -> successors.
18147 2020-02-25 Martin Sebor <msebor@redhat.com>
18149 * doc/extend.texi (attribute access): Correct an example.
18151 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
18153 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
18155 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
18156 (VAR15, VAR16): New.
18157 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
18158 (VD): Enable for V4BF.
18160 (VQ): Enable for V8BF.
18162 (VQ_NO2E): Likewise.
18163 (VDBL, Vdbl): Add V4BF.
18164 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
18165 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
18166 (bfloat16x8x2_t): Likewise.
18167 (bfloat16x4x3_t): Likewise.
18168 (bfloat16x8x3_t): Likewise.
18169 (bfloat16x4x4_t): Likewise.
18170 (bfloat16x8x4_t): Likewise.
18171 (vcombine_bf16): New.
18172 (vld1_bf16, vld1_bf16_x2): New.
18173 (vld1_bf16_x3, vld1_bf16_x4): New.
18174 (vld1q_bf16, vld1q_bf16_x2): New.
18175 (vld1q_bf16_x3, vld1q_bf16_x4): New.
18176 (vld1_lane_bf16): New.
18177 (vld1q_lane_bf16): New.
18178 (vld1_dup_bf16): New.
18179 (vld1q_dup_bf16): New.
18182 (vld2_dup_bf16): New.
18183 (vld2q_dup_bf16): New.
18186 (vld3_dup_bf16): New.
18187 (vld3q_dup_bf16): New.
18190 (vld4_dup_bf16): New.
18191 (vld4q_dup_bf16): New.
18192 (vst1_bf16, vst1_bf16_x2): New.
18193 (vst1_bf16_x3, vst1_bf16_x4): New.
18194 (vst1q_bf16, vst1q_bf16_x2): New.
18195 (vst1q_bf16_x3, vst1q_bf16_x4): New.
18196 (vst1_lane_bf16): New.
18197 (vst1q_lane_bf16): New.
18205 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
18207 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
18208 (VALL_F16): Likewise.
18209 (VALLDI_F16): Likewise.
18211 (Vetype): Likewise.
18212 (vswap_width_name): Likewise.
18213 (VSWAP_WIDTH): Likewise.
18217 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
18218 (vget_lane_bf16, vgetq_lane_bf16): New.
18219 (vcreate_bf16): New.
18220 (vdup_n_bf16, vdupq_n_bf16): New.
18221 (vdup_lane_bf16, vdup_laneq_bf16): New.
18222 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
18223 (vduph_lane_bf16, vduph_laneq_bf16): New.
18224 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
18225 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
18226 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
18227 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
18228 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
18229 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
18230 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
18231 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
18232 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
18233 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
18234 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
18235 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
18236 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
18237 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
18238 (vreinterpretq_bf16_p128): New.
18239 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
18240 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
18241 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
18242 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
18243 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
18244 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
18245 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
18246 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
18247 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
18248 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
18249 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
18250 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
18251 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
18252 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
18253 (vreinterpretq_p128_bf16): New.
18255 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
18257 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
18258 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
18259 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
18260 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
18261 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
18262 * config/arm/iterators.md (VSF2BF): New attribute.
18263 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
18264 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
18265 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
18267 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
18269 * config/arm/arm.md (required_for_purecode): New attribute.
18270 (enabled): Handle required_for_purecode.
18271 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
18272 work with -mpure-code.
18274 2020-02-25 Jakub Jelinek <jakub@redhat.com>
18276 PR rtl-optimization/93908
18277 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
18280 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
18282 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
18284 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
18286 * doc/install.texi (--enable-checking): Adjust wording.
18288 2020-02-25 Richard Biener <rguenther@suse.de>
18290 PR tree-optimization/93868
18291 * tree-vect-slp.c (slp_copy_subtree): New function.
18292 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
18293 re-arranging stmts in it.
18295 2020-02-25 Jakub Jelinek <jakub@redhat.com>
18297 PR middle-end/93874
18298 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
18299 dummy function and remove it at the end.
18301 PR translation/93864
18302 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
18303 paramter -> parameter.
18304 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
18305 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
18307 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
18309 * doc/install.texi (--enable-checking): Properly document current
18311 (--enable-stage1-checking): Minor clarification about bootstrap.
18313 2020-02-24 David Malcolm <dmalcolm@redhat.com>
18316 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
18317 -fanalyzer-checker=taint is also required.
18318 (-fanalyzer-checker=): Note that providing this option enables the
18319 given checker, and doing so may be required for checkers that are
18320 disabled by default.
18322 2020-02-24 David Malcolm <dmalcolm@redhat.com>
18324 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
18325 significant control flow events; add a "3" which shows all
18326 control flow events; the old "3" becomes "4".
18328 2020-02-24 Jakub Jelinek <jakub@redhat.com>
18330 PR tree-optimization/93582
18331 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
18332 pd.offset and pd.size to be counted in bits rather than bytes, add
18333 support for maxsizei that is not a multiple of BITS_PER_UNIT and
18334 handle bitfield stores and loads.
18335 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
18336 uncomparable quantities - bytes vs. bits. Allow push_partial_def
18337 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
18338 pd.offset/pd.size to be counted in bits rather than bytes.
18339 Formatting fix. Rename shadowed len variable to buflen.
18341 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18342 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
18345 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
18346 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
18347 * opts-common.c (parse_options_from_collect_gcc_options): New function.
18348 (prepend_xassembler_to_collect_as_options): Likewise.
18349 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
18350 (prepend_xassembler_to_collect_as_options): Likewise.
18351 * lto-opts.c (lto_write_options): Stream assembler options
18352 in COLLECT_AS_OPTIONS.
18353 * lto-wrapper.c (xassembler_options_error): New static variable.
18354 (get_options_from_collect_gcc_options): Move parsing options code to
18355 parse_options_from_collect_gcc_options and call it.
18356 (merge_and_complain): Validate -Xassembler options.
18357 (append_compiler_options): Handle OPT_Xassembler.
18358 (run_gcc): Append command line -Xassembler options to
18359 collect_gcc_options.
18360 * doc/invoke.texi: Add documentation about using Xassembler
18363 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
18365 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
18367 (riscv_rtx_costs): Update cost model for LTGT.
18369 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
18371 PR rtl-optimization/93564
18372 * ira-color.c (struct update_cost_queue_elem): New member start.
18373 (queue_update_cost, get_next_update_cost): Add new arg start.
18374 (allocnos_conflict_p): New function.
18375 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
18376 Add checking conflicts with allocnos_conflict_p.
18377 (update_costs_from_prefs, restore_costs_from_copies): Adjust
18378 update_costs_from_allocno calls.
18379 (update_conflict_hard_regno_costs): Add checking conflicts with
18380 allocnos_conflict_p. Adjust calls of queue_update_cost and
18381 get_next_update_cost.
18382 (assign_hard_reg): Adjust calls of queue_update_cost. Add
18384 (bucket_allocno_compare_func): Restore previous version.
18386 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
18388 * config/pa/pa.c (pa_function_value): Fix check for word and
18389 double-word size when handling aggregate return values.
18390 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
18391 that homogeneous SFmode and DFmode aggregates are passed and returned
18392 in general registers.
18394 2020-02-21 Jakub Jelinek <jakub@redhat.com>
18396 PR translation/93759
18397 * opts.c (print_filtered_help): Translate help before appending
18398 messages to it rather than after that.
18400 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
18402 PR rtl-optimization/PR92989
18403 * lra-lives.c (process_bb_lives): Restore the original order
18404 of the bb liveness update. Call make_hard_regno_dead for each
18405 register clobbered at the start of an EH receiver.
18407 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
18410 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
18411 self-recursively generated.
18413 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
18416 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
18419 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
18421 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
18422 Document new target supports option.
18424 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
18426 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
18427 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
18428 * config/arm/iterators.md (MATMUL): New iterator.
18429 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
18430 (mmla_sfx): New attribute.
18431 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
18432 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
18433 (UNSPEC_MATMUL_US): New.
18435 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18437 * config/arm/arm.md: Prevent scalar shifts from being used when big
18440 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
18441 Richard Biener <rguenther@suse.de>
18443 PR tree-optimization/93586
18444 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
18445 after mismatched array refs; do not sure type size information to
18446 recover from unmatched referneces with !flag_strict_aliasing_p.
18448 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
18450 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
18451 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
18452 (scatter_store<mode>): Rename to ...
18453 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
18454 (scatter<mode>_exec): Delete. Move contents ...
18455 (mask_scatter_store<mode>): ... here, and rename that to ...
18456 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
18457 Remove mode conversion.
18458 (mask_gather_load<mode>): Rename to ...
18459 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
18460 Remove mode conversion.
18461 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
18463 2020-02-21 Martin Jambor <mjambor@suse.cz>
18465 PR tree-optimization/93845
18466 * tree-sra.c (verify_sra_access_forest): Only test access size of
18469 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
18471 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
18472 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
18473 (addv64di3_exec): Likewise.
18474 (subv64di3): Likewise.
18475 (subv64di3_exec): Likewise.
18476 (addv64di3_zext): Likewise.
18477 (addv64di3_zext_exec): Likewise.
18478 (addv64di3_zext_dup): Likewise.
18479 (addv64di3_zext_dup_exec): Likewise.
18480 (addv64di3_zext_dup2): Likewise.
18481 (addv64di3_zext_dup2_exec): Likewise.
18482 (addv64di3_sext_dup2): Likewise.
18483 (addv64di3_sext_dup2_exec): Likewise.
18484 (<expander>v64di3): Likewise.
18485 (<expander>v64di3_exec): Likewise.
18486 (*<reduc_op>_dpp_shr_v64di): Likewise.
18487 (*plus_carry_dpp_shr_v64di): Likewise.
18488 * config/gcn/gcn.md (adddi3): Likewise.
18489 (addptrdi3): Likewise.
18490 (<expander>di3): Likewise.
18492 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
18494 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
18496 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
18498 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
18499 support. Use aarch64_emit_mult instead of emitting multiplication
18500 instructions directly.
18501 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
18502 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
18504 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
18506 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
18507 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
18508 instead of emitting multiplication instructions directly.
18509 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
18510 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
18511 (@aarch64_frecps<mode>): New expanders.
18513 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
18515 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
18516 on and produce uint64_ts rather than ints.
18517 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
18518 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
18520 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
18522 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
18523 an unused xmsk register when handling approximate rsqrt.
18525 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
18527 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
18528 flag_finite_math_only condition.
18530 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
18533 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
18534 to destination operand for shufps alternative.
18535 (*vec_extractv2si_1): Ditto.
18537 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
18540 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
18543 2020-02-20 Martin Liska <mliska@suse.cz>
18545 PR translation/93831
18546 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
18548 2020-02-20 Martin Liska <mliska@suse.cz>
18550 PR translation/93830
18551 * common/config/avr/avr-common.c: Remote trailing "|".
18553 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
18555 * collect2.c (maybe_run_lto_and_relink): Fix typo in
18558 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
18560 PR tree-optimization/93767
18561 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
18562 access-size bias from the offset calculations for negative strides.
18564 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
18566 * collect2.c (c_file, o_file): Make const again.
18567 (ldout,lderrout, dump_ld_file): Remove.
18568 (tool_cleanup): Avoid calling not signal-safe functions.
18569 (maybe_run_lto_and_relink): Avoid possible signal handler
18570 access to unintialzed memory (lto_o_files).
18571 (main): Avoid leaking temp files in $TMPDIR.
18572 Initialize c_file/o_file with concat, which avoids exposing
18573 uninitialized memory to signal handler, which calls unlink(!).
18574 Avoid calling maybe_unlink when the main function returns,
18575 since the atexit handler is already doing this.
18576 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
18578 2020-02-19 Martin Jambor <mjambor@suse.cz>
18580 PR tree-optimization/93776
18581 * tree-sra.c (create_access): Do not create zero size accesses.
18582 (get_access_for_expr): Do not search for zero sized accesses.
18584 2020-02-19 Martin Jambor <mjambor@suse.cz>
18586 PR tree-optimization/93667
18587 * tree-sra.c (scalarizable_type_p): Return false if record fields
18588 do not follow wach other.
18590 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
18592 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
18593 rather than fmv.x.s/fmv.s.x.
18595 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
18597 * config/aarch64/aarch64-simd-builtins.def
18598 (intrinsic_vec_smult_lo_): New.
18599 (intrinsic_vec_umult_lo_): Likewise.
18600 (vec_widen_smult_hi_): Likewise.
18601 (vec_widen_umult_hi_): Likewise.
18602 * config/aarch64/aarch64-simd.md
18603 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
18604 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
18605 (vmull_high_s16): Likewise.
18606 (vmull_high_s32): Likewise.
18607 (vmull_high_u8): Likewise.
18608 (vmull_high_u16): Likewise.
18609 (vmull_high_u32): Likewise.
18610 (vmull_s8): Likewise.
18611 (vmull_s16): Likewise.
18612 (vmull_s32): Likewise.
18613 (vmull_u8): Likewise.
18614 (vmull_u16): Likewise.
18615 (vmull_u32): Likewise.
18617 2020-02-18 Martin Liska <mliska@suse.cz>
18619 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
18620 bootstrap by missing removal of invalid sanity check.
18622 2020-02-18 Martin Liska <mliska@suse.cz>
18625 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
18626 Always compare LHS of gimple_assign.
18628 2020-02-18 Martin Liska <mliska@suse.cz>
18631 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
18632 and return type of functions.
18633 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
18634 Drop MALLOC attribute for void functions.
18635 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
18636 malloc_state for a new VOID clone.
18638 2020-02-18 Martin Liska <mliska@suse.cz>
18641 * common.opt: Add -fprofile-reproducibility.
18642 * doc/invoke.texi: Document it.
18643 * value-prof.c (dump_histogram_value):
18644 Document and support behavior for counters[0]
18645 being a negative value.
18646 (get_nth_most_common_value): Handle negative
18647 counters[0] in respect to flag_profile_reproducible.
18649 2020-02-18 Jakub Jelinek <jakub@redhat.com>
18652 * cgraph.c (verify_speculative_call): Use speculative_id instead of
18653 speculative_uid in messages. Remove trailing whitespace from error
18654 message. Use num_speculative_call_targets instead of
18655 num_speculative_targets in a message.
18656 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
18657 edge messages and stmt instead of cal_stmt in reference message.
18659 PR tree-optimization/93780
18660 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
18661 before calling build_vector_type.
18662 (execute_update_addresses_taken): Likewise.
18665 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
18666 typo, functoin -> function.
18667 * tree.c (free_lang_data_in_decl): Fix comment typo,
18668 functoin -> function.
18669 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
18671 2020-02-17 David Malcolm <dmalcolm@redhat.com>
18673 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
18675 (print_option_information): Don't call get_option_url if URLs
18678 2020-02-17 Alexandre Oliva <oliva@adacore.com>
18680 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
18681 handling of register_common-less targets.
18683 2020-02-17 Martin Liska <mliska@suse.cz>
18686 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
18688 2020-02-17 Martin Liska <mliska@suse.cz>
18690 PR translation/93755
18691 * config/rs6000/rs6000.c (rs6000_option_override_internal):
18694 2020-02-17 Martin Liska <mliska@suse.cz>
18697 * config/rx/elf.opt: Fix typo.
18699 2020-02-17 Richard Biener <rguenther@suse.de>
18702 * opts-global.c (print_ignored_options): Use inform and
18705 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
18708 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
18710 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
18713 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
18714 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
18716 2020-02-15 Jason Merrill <jason@redhat.com>
18718 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
18720 2020-02-15 Jakub Jelinek <jakub@redhat.com>
18722 PR tree-optimization/93744
18723 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
18724 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
18725 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
18726 sure @2 in the first and @1 in the other patterns has no side-effects.
18728 2020-02-15 David Malcolm <dmalcolm@redhat.com>
18729 Bernd Edlinger <bernd.edlinger@hotmail.de>
18733 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
18734 * configure.ac (--with-diagnostics-urls): New configuration
18735 option, based on --with-diagnostics-color.
18736 (DIAGNOSTICS_URLS_DEFAULT): New define.
18737 * config.h: Regenerate.
18738 * configure: Regenerate.
18739 * diagnostic.c (diagnostic_urls_init): Handle -1 for
18740 DIAGNOSTICS_URLS_DEFAULT from configure-time
18741 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
18742 and TERM_URLS environment variable.
18743 * diagnostic-url.h (diagnostic_url_format): New enum type.
18744 (diagnostic_urls_enabled_p): rename to...
18745 (determine_url_format): ... this, and change return type.
18746 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
18747 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
18748 the linux console, and mingw.
18749 (diagnostic_urls_enabled_p): rename to...
18750 (determine_url_format): ... this, and adjust.
18751 * pretty-print.h (pretty_printer::show_urls): rename to...
18752 (pretty_printer::url_format): ... this, and change to enum.
18753 * pretty-print.c (pretty_printer::pretty_printer,
18754 pp_begin_url, pp_end_url, test_urls): Adjust.
18755 * doc/install.texi (--with-diagnostics-urls): Document the new
18756 configuration option.
18757 (--with-diagnostics-color): Document the existing interaction
18758 with GCC_COLORS better.
18759 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
18760 vindex reference. Update description of defaults based on the above.
18761 (-fdiagnostics-color): Update description of how -fdiagnostics-color
18762 interacts with GCC_COLORS.
18764 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
18767 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
18768 conjunction with TARGET_GNU_TLS in early return.
18770 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
18772 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
18773 the mode is not wider than UNITS_PER_WORD.
18775 2020-02-14 Martin Jambor <mjambor@suse.cz>
18777 PR tree-optimization/93516
18778 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
18779 access of the same type as the parent.
18780 (propagate_subaccesses_from_lhs): Likewise.
18782 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
18785 * config/i386/avx512vbmi2intrin.h
18786 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
18787 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
18788 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
18789 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
18790 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
18791 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
18792 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
18793 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
18794 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
18795 of lacking a closing parenthesis.
18796 * config/i386/avx512vbmi2vlintrin.h
18797 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
18798 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
18799 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
18800 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
18801 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
18802 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
18803 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
18804 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
18805 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
18806 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
18807 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
18808 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
18809 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
18810 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
18811 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
18812 _mm_shldi_epi32, _mm_mask_shldi_epi32,
18813 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
18814 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
18816 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
18819 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
18820 the target function entry.
18822 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18824 * common/config/arc/arc-common.c (arc_option_optimization_table):
18825 Disable if-conversion step when optimized for size.
18827 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18829 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
18830 R12-R15 are always in ARCOMPACT16_REGS register class.
18831 * config/arc/arc.opt (mq-class): Deprecate.
18832 * config/arc/constraint.md ("q"): Remove dependency on mq-class
18834 * doc/invoke.texi (mq-class): Update text.
18835 * common/config/arc/arc-common.c (arc_option_optimization_table):
18838 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18840 * config/arc/arc.c (arc_insn_cost): New function.
18841 (TARGET_INSN_COST): Define.
18842 * config/arc/arc.md (cost): New attribute.
18843 (add_n): Use arc_nonmemory_operand.
18844 (ashlsi3_insn): Likewise, also update constraints.
18845 (ashrsi3_insn): Likewise.
18846 (rotrsi3): Likewise.
18847 (add_shift): Likewise.
18848 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
18850 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18852 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
18854 (umulsidi_600): Likewise.
18856 2020-02-13 Jakub Jelinek <jakub@redhat.com>
18859 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
18860 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
18861 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
18862 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
18863 pass __A to the builtin followed by __W instead of __A followed by
18865 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
18866 _mm512_mask_popcnt_epi64): Likewise.
18867 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
18868 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
18869 _mm256_mask_popcnt_epi64): Likewise.
18871 PR tree-optimization/93582
18872 * fold-const.h (shift_bytes_in_array_left,
18873 shift_bytes_in_array_right): Declare.
18874 * fold-const.c (shift_bytes_in_array_left,
18875 shift_bytes_in_array_right): New function, moved from
18876 gimple-ssa-store-merging.c, no longer static.
18877 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
18878 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
18879 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
18880 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
18881 shift_bytes_in_array.
18882 (verify_shift_bytes_in_array): Rename to ...
18883 (verify_shift_bytes_in_array_left): ... this. Use
18884 shift_bytes_in_array_left instead of shift_bytes_in_array.
18885 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
18886 instead of verify_shift_bytes_in_array.
18887 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
18888 / native_interpret_expr where the store covers all needed bits,
18889 punt on PDP-endian, otherwise allow all involved offsets and sizes
18890 not to be byte-aligned.
18893 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
18894 use const_0_to_255_operand predicate instead of immediate_operand.
18895 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
18896 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
18897 vgf2p8affineinvqb_<mode><mask_name>,
18898 vgf2p8affineqb_<mode><mask_name>): Drop mode from
18899 const_0_to_255_operand predicated operands.
18901 2020-02-12 Jeff Law <law@redhat.com>
18903 * config/h8300/h8300.md (comparison shortening peepholes): Use
18904 a mode iterator to merge the HImode and SImode peepholes.
18906 2020-02-12 Jakub Jelinek <jakub@redhat.com>
18908 PR middle-end/93663
18909 * real.c (is_even): Make static. Function comment fix.
18910 (is_halfway_below): Make static, don't assert R is not inf/nan,
18911 instead return false for those. Small formatting fixes.
18913 2020-02-12 Martin Sebor <msebor@redhat.com>
18915 PR middle-end/93646
18916 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
18917 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
18918 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
18919 (strlen_check_and_optimize_call): Adjust callee name.
18921 2020-02-12 Jeff Law <law@redhat.com>
18923 * config/h8300/h8300.md (comparison shortening peepholes): Drop
18924 (and (xor)) variant. Combine other two into single peephole.
18926 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
18928 PR rtl-optimization/93565
18929 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
18931 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
18933 * config/aarch64/aarch64-simd.md
18934 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
18935 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
18936 generating separate ADDV and zero_extend patterns.
18937 * config/aarch64/iterators.md (VDQV_E): New iterator.
18939 2020-02-12 Jeff Law <law@redhat.com>
18941 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
18942 expanders, splits, etc.
18943 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
18944 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
18945 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
18946 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
18947 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
18948 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
18949 function prototype.
18950 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
18952 2020-02-12 Jakub Jelinek <jakub@redhat.com>
18955 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
18956 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
18957 TARGET_AVX512DQ from condition.
18958 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
18959 instead of <mask_mode512bit_condition> in condition. If
18960 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
18962 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
18965 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
18968 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
18970 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
18972 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
18973 where strlen is more legible.
18974 (rs6000_builtin_vectorized_libmass): Ditto.
18975 (rs6000_print_options_internal): Ditto.
18977 2020-02-11 Martin Sebor <msebor@redhat.com>
18979 PR tree-optimization/93683
18980 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
18982 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
18984 * config/rs6000/predicates.md (cint34_operand): Rename the
18985 -mprefixed-addr option to be -mprefixed.
18986 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
18987 the -mprefixed-addr option to be -mprefixed.
18988 (OTHER_FUTURE_MASKS): Likewise.
18989 (POWERPC_MASKS): Likewise.
18990 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
18991 the -mprefixed-addr option to be -mprefixed. Change error
18992 messages to refer to -mprefixed.
18993 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
18995 (rs6000_legitimate_offset_address_p): Likewise.
18996 (rs6000_mode_dependent_address): Likewise.
18997 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
18998 "-mprefixed" for target attributes and pragmas.
18999 (address_to_insn_form): Rename the -mprefixed-addr option to be
19001 (rs6000_adjust_insn_length): Likewise.
19002 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
19003 -mprefixed-addr option to be -mprefixed.
19004 (ASM_OUTPUT_OPCODE): Likewise.
19005 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
19006 -mprefixed-addr option to be -mprefixed.
19007 * config/rs6000/rs6000.opt (-mprefixed): Rename the
19008 -mprefixed-addr option to be prefixed. Change the option from
19009 being undocumented to being documented.
19010 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
19011 -mprefixed option. Update the -mpcrel documentation to mention
19014 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
19016 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
19017 including FIRST_PSEUDO_REGISTER - 1.
19018 * ira-color.c (print_hard_reg_set): Ditto.
19020 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19022 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
19023 (USTERNOP_QUALIFIERS): New define.
19024 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
19025 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
19026 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
19027 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
19028 * config/arm/arm_neon.h (vusdot_s32): New.
19029 (vusdot_lane_s32): New.
19030 (vusdotq_lane_s32): New.
19031 (vsudot_lane_s32): New.
19032 (vsudotq_lane_s32): New.
19033 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
19034 * config/arm/iterators.md (DOTPROD_I8MM): New.
19035 (sup, opsuffix): Add <us/su>.
19036 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
19037 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
19039 2020-02-11 Richard Biener <rguenther@suse.de>
19041 PR tree-optimization/93661
19042 PR tree-optimization/93662
19043 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
19044 tree_to_poly_int64.
19045 * tree-sra.c (get_access_for_expr): Likewise.
19047 2020-02-10 Jakub Jelinek <jakub@redhat.com>
19050 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
19051 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
19052 Change condition from TARGET_AVX2 to TARGET_AVX.
19054 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
19057 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
19058 argument of strncmp.
19060 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
19062 Try to generate zero-based comparisons.
19063 * config/cris/cris.c (cris_reduce_compare): New function.
19064 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
19065 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
19066 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
19068 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
19071 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
19072 in Thumb state and also as a destination in Arm state. Add T16
19075 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
19077 * md.texi (Define Subst): Match closing paren in example.
19079 2020-02-10 Jakub Jelinek <jakub@redhat.com>
19083 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
19084 arguments of strncmp.
19086 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
19089 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
19090 but different source value.
19091 (adjust_callers_for_value_intersection): New function.
19092 (gather_edges_for_value): Adjust order of callers to let a
19093 non-self-recursive caller be the first element.
19094 (self_recursive_pass_through_p): Add a new parameter "simple", and
19095 check generalized self-recursive pass-through jump function.
19096 (self_recursive_agg_pass_through_p): Likewise.
19097 (find_more_scalar_values_for_callers_subset): Compute value from
19098 pass-through jump function for self-recursive.
19099 (intersect_with_plats): Cleanup previous implementation code for value
19100 itersection with self-recursive call edge.
19101 (intersect_with_agg_replacements): Likewise.
19102 (intersect_aggregates_with_edge): Deduce value from pass-through jump
19103 function for self-recursive call edge. Cleanup previous implementation
19104 code for value intersection with self-recursive call edge.
19105 (decide_whether_version_node): Remove dead callers and adjust order
19106 to let a non-self-recursive caller be the first element.
19108 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
19110 * recog.c: Move pass_split_before_sched2 code in front of
19111 pass_split_before_regstack.
19112 (pass_data_split_before_sched2): Rename pass to split3 from split4.
19113 (pass_data_split_before_regstack): Rename pass to split4 from split3.
19114 (rest_of_handle_split_before_sched2): Remove.
19115 (pass_split_before_sched2::execute): Unconditionally call
19117 (enable_split_before_sched2): New function.
19118 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
19119 (pass_split_before_regstack::gate): Ditto.
19120 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
19121 Update name check for renamed split4 pass.
19122 * config/sh/sh.c (register_sh_passes): Update pass insertion
19123 point for renamed split4 pass.
19125 2020-02-09 Jakub Jelinek <jakub@redhat.com>
19127 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
19128 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
19129 copying them around between host and target.
19131 2020-02-08 Andrew Pinski <apinski@marvell.com>
19134 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
19135 STRICT_ALIGNMENT also.
19137 2020-02-08 Jim Wilson <jimw@sifive.com>
19140 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
19142 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
19143 Jakub Jelinek <jakub@redhat.com>
19146 * config/i386/i386.h (CALL_USED_REGISTERS): Make
19147 xmm16-xmm31 call-used even in 64-bit ms-abi.
19149 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
19151 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
19152 (simd_ummla, simd_usmmla): Likewise.
19153 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
19154 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
19155 (vusmmlaq_s32): New.
19157 2020-02-07 Richard Biener <rguenther@suse.de>
19159 PR middle-end/93519
19160 * tree-inline.c (fold_marked_statements): Do a PRE walk,
19161 skipping unreachable regions.
19162 (optimize_inline_calls): Skip folding stmts when we didn't
19165 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
19168 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
19169 Don't return aggregates with only SFmode and DFmode in SSE
19171 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
19173 2020-02-07 Jakub Jelinek <jakub@redhat.com>
19176 * config/rs6000/rs6000-logue.c
19177 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
19178 if it fails, move rs into end_addr and retry. Add
19179 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
19180 the insn pattern doesn't describe well what exactly happens to
19184 * config/i386/predicates.md (avx_identity_operand): Remove.
19185 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
19186 (avx_<castmode><avxsizesuffix>_<castmode>,
19187 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
19188 a VEC_CONCAT of the operand and UNSPEC_CAST.
19189 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
19190 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
19194 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
19195 recog_data.insn if distance_non_agu_define changed it.
19197 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
19200 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
19201 we only had X-FORM (reg+reg) addressing for vectors. Also before
19202 ISA 3.0, we only had X-FORM addressing for scalars in the
19203 traditional Altivec registers.
19205 2020-02-06 <zhongyunde@huawei.com>
19206 Vladimir Makarov <vmakarov@redhat.com>
19208 PR rtl-optimization/93561
19209 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
19210 hard register range.
19212 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
19214 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
19217 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
19219 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
19220 where the low and the high 32 bits are equal to each other specially,
19221 with an rldimi instruction.
19223 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
19225 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
19227 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
19229 * config/arm/arm-tables.opt: Regenerate.
19231 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
19234 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
19235 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
19236 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
19238 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
19240 PR rtl-optimization/87763
19241 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
19243 2020-02-06 Delia Burduv <delia.burduv@arm.com>
19245 * config/aarch64/aarch64-simd-builtins.def
19246 (bfmlaq): New built-in function.
19247 (bfmlalb): New built-in function.
19248 (bfmlalt): New built-in function.
19249 (bfmlalb_lane): New built-in function.
19250 (bfmlalt_lane): New built-in function.
19251 * config/aarch64/aarch64-simd.md
19252 (aarch64_bfmmlaqv4sf): New pattern.
19253 (aarch64_bfmlal<bt>v4sf): New pattern.
19254 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
19255 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
19256 (vbfmlalbq_f32): New intrinsic.
19257 (vbfmlaltq_f32): New intrinsic.
19258 (vbfmlalbq_lane_f32): New intrinsic.
19259 (vbfmlaltq_lane_f32): New intrinsic.
19260 (vbfmlalbq_laneq_f32): New intrinsic.
19261 (vbfmlaltq_laneq_f32): New intrinsic.
19262 * config/aarch64/iterators.md (BF_MLA): New int iterator.
19263 (bt): New int attribute.
19265 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
19267 * config/i386/i386.md (*pushtf): Emit "#" instead of
19268 calling gcc_unreachable in insn output.
19271 (*pushsf_rex64): Ditto for alternatives other than 1.
19272 (*pushsf): Ditto for alternatives other than 1.
19274 2020-02-06 Martin Liska <mliska@suse.cz>
19276 PR gcov-profile/91971
19277 PR gcov-profile/93466
19278 * coverage.c (coverage_init): Revert mangling of
19279 path into filename. It can lead to huge filename length.
19280 Creation of subfolders seem more natural.
19282 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19285 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
19286 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
19287 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
19289 2020-02-06 Jakub Jelinek <jakub@redhat.com>
19292 * config/i386/predicates.md (avx_identity_operand): New predicate.
19293 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
19294 define_insn_and_split.
19297 * omp-low.c (use_pointer_for_field): For nested constructs, also
19298 look for map clauses on target construct.
19299 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
19300 taskreg_nesting_level.
19303 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
19304 shared clause, call omp_notice_variable on outer context if any.
19306 2020-02-05 Jason Merrill <jason@redhat.com>
19309 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
19310 non-zero address even if weak and not yet defined.
19312 2020-02-05 Martin Sebor <msebor@redhat.com>
19314 PR tree-optimization/92765
19315 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
19316 * tree-ssa-strlen.c (compute_string_length): Remove.
19317 (determine_min_objsize): Remove.
19318 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
19319 Avoid using type size as the upper bound on string length.
19320 (handle_builtin_string_cmp): Add an argument. Adjust.
19321 (strlen_check_and_optimize_call): Pass additional argument to
19322 handle_builtin_string_cmp.
19324 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
19326 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
19327 (*pushdi2_rex64 peephole2): Unconditionally split after
19328 epilogue_completed.
19329 (*ashl<mode>3_doubleword): Ditto.
19330 (*<shift_insn><mode>3_doubleword): Ditto.
19332 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
19335 * config/rs6000/rs6000.c (get_vector_offset): Fix
19337 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
19339 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
19341 2020-02-05 David Malcolm <dmalcolm@redhat.com>
19343 * doc/analyzer.texi
19344 (Special Functions for Debugging the Analyzer): Update description
19345 of __analyzer_dump_exploded_nodes.
19347 2020-02-05 Jakub Jelinek <jakub@redhat.com>
19350 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
19351 include sets and not clobbers in the vzeroupper pattern.
19352 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
19353 the parallel has 17 (64-bit) or 9 (32-bit) elts.
19354 (*avx_vzeroupper_1): New define_insn_and_split.
19357 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
19358 don't run when !optimize.
19359 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
19362 2020-02-05 Richard Biener <rguenther@suse.de>
19364 PR middle-end/90648
19365 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
19366 checks before matching calls.
19368 2020-02-05 Jakub Jelinek <jakub@redhat.com>
19370 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
19371 function comment typo.
19373 PR middle-end/93555
19374 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
19375 simd_clone_create failed when i == 0, adjust clone->nargs by
19378 2020-02-05 Martin Liska <mliska@suse.cz>
19381 * doc/invoke.texi: Document that one should
19382 not combine ASLR and -fpch.
19384 2020-02-04 Richard Biener <rguenther@suse.de>
19386 PR tree-optimization/93538
19387 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
19389 2020-02-04 Richard Biener <rguenther@suse.de>
19391 PR tree-optimization/91123
19392 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
19393 (vn_walk_cb_data::last_vuse): New member.
19394 (vn_walk_cb_data::saved_operands): Likewsie.
19395 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
19396 (vn_walk_cb_data::push_partial_def): Use finish.
19397 (vn_reference_lookup_2): Update last_vuse and use finish if
19398 we've saved operands.
19399 (vn_reference_lookup_3): Use finish and update calls to
19400 push_partial_defs everywhere. When translating through
19401 memcpy or aggregate copies save off operands and alias-set.
19402 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
19403 operation for redundant store removal.
19405 2020-02-04 Richard Biener <rguenther@suse.de>
19407 PR tree-optimization/92819
19408 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
19409 generating more stmts than before.
19411 2020-02-04 Martin Liska <mliska@suse.cz>
19413 * config/arm/arm.c (arm_gen_far_branch): Move the function
19414 outside of selftests.
19416 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19418 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
19419 function to adjust PC-relative vector addresses.
19420 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
19421 handle vectors with PC-relative addresses.
19423 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19425 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
19427 (hard_reg_and_mode_to_addr_mask): Delete.
19428 (rs6000_adjust_vec_address): If the original vector address
19429 was REG+REG or REG+OFFSET and the element is not zero, do the add
19430 of the elements in the original address before adding the offset
19431 for the vector element. Use address_to_insn_form to validate the
19432 address using the register being loaded, rather than guessing
19433 whether the address is a DS-FORM or DQ-FORM address.
19435 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19437 * config/rs6000/rs6000.c (get_vector_offset): New helper function
19438 to calculate the offset in memory from the start of a vector of a
19439 particular element. Add code to keep the element number in
19440 bounds if the element number is variable.
19441 (rs6000_adjust_vec_address): Move calculation of offset of the
19442 vector element to get_vector_offset.
19443 (rs6000_split_vec_extract_var): Do not do the initial AND of
19444 element here, move the code to get_vector_offset.
19446 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19448 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
19451 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
19453 * config/rs6000/constraints.md: Improve documentation.
19455 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
19458 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
19459 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
19461 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
19463 * config.gcc: Remove "carrizo" support.
19464 * config/gcn/gcn-opts.h (processor_type): Likewise.
19465 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
19466 * config/gcn/gcn.opt (gpu_type): Likewise.
19467 * config/gcn/t-omp-device: Likewise.
19469 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19472 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
19473 * config/arm/arm.c (arm_gen_far_branch): New function
19474 arm_gen_far_branch.
19475 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
19477 2020-02-03 Julian Brown <julian@codesourcery.com>
19478 Tobias Burnus <tobias@codesourcery.com>
19480 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
19482 2020-02-03 Jakub Jelinek <jakub@redhat.com>
19485 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
19486 valid RTL to sum up the lowest and second lowest bytes of the popcnt
19489 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
19491 PR rtl-optimization/91333
19492 * ira-color.c (struct allocno_color_data): Add member
19494 (init_allocno_threads): Set the member up.
19495 (bucket_allocno_compare_func): Add compare hard reg
19498 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
19500 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
19502 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
19503 * config.in: Regenerated.
19504 * configure: Regenerated.
19505 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
19506 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
19507 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
19509 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
19511 * configure: Regenerate.
19513 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
19515 PR rtl-optimization/91333
19516 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
19517 reg preferences comparison up.
19519 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
19521 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
19522 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
19523 aarch64-sve-builtins-base.h.
19524 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
19525 aarch64-sve-builtins-base.cc.
19526 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
19527 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
19528 (svcvtnt): Declare.
19529 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
19530 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
19531 (svcvtnt): New functions.
19532 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
19533 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
19534 (svcvtnt): New functions.
19535 (svcvt): Add a form that converts f32 to bf16.
19536 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
19537 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
19539 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
19540 Treat B as bfloat16_t.
19541 (ternary_bfloat_lane_base): New class.
19542 (ternary_bfloat_def): Likewise.
19543 (ternary_bfloat): New shape.
19544 (ternary_bfloat_lane_def): New class.
19545 (ternary_bfloat_lane): New shape.
19546 (ternary_bfloat_lanex2_def): New class.
19547 (ternary_bfloat_lanex2): New shape.
19548 (ternary_bfloat_opt_n_def): New class.
19549 (ternary_bfloat_opt_n): New shape.
19550 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
19551 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
19552 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
19553 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
19554 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
19555 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
19556 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
19557 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
19558 the pattern off the narrow mode instead of the wider one.
19559 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
19560 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
19561 (sve_fp_op): Handle them.
19562 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
19563 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
19565 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
19567 * config/aarch64/arm_sve.h: Include arm_bf16.h.
19568 * config/aarch64/aarch64-modes.def (BF): Move definition before
19569 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
19570 (SVE_MODES): Handle BF modes.
19571 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
19573 (aarch64_full_sve_mode): Likewise.
19574 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
19576 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
19577 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
19578 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
19579 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
19581 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
19583 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
19584 (TYPES_all_data): Add bf16.
19585 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
19586 (register_tuple_type): Increase buffer size.
19587 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
19588 (bf16): New type suffix.
19589 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
19590 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
19591 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
19592 Change type from all_data to all_arith.
19593 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
19594 (svminp): Likewise.
19596 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
19597 Matthew Malcomson <matthew.malcomson@arm.com>
19598 Richard Sandiford <richard.sandiford@arm.com>
19600 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
19601 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
19602 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
19603 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
19604 __ARM_FEATURE_MATMUL_FP64.
19605 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
19606 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
19607 be disabled at the same time.
19608 (f32mm): New extension.
19609 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
19610 (AARCH64_FL_F64MM): Bump to the next bit up.
19611 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
19612 (TARGET_SVE_F64MM): New macros.
19613 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
19614 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
19615 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
19616 (UNSPEC_ZIP2Q): New unspeccs.
19617 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
19618 (optab, sur, perm_insn): Handle the new unspecs.
19619 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
19620 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
19621 TARGET_SVE_F64MM instead of separate tests.
19622 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
19623 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
19624 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
19625 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
19626 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
19627 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
19628 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
19629 (TYPES_s_signed): New macro.
19630 (TYPES_s_integer): Use it.
19631 (TYPES_d_float): New macro.
19632 (TYPES_d_data): Use it.
19633 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
19634 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
19635 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
19636 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
19637 (svmmla): New shape.
19638 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
19639 template parameters.
19640 (ternary_resize2_lane_base): Likewise.
19641 (ternary_resize2_base): New class.
19642 (ternary_qq_lane_base): Likewise.
19643 (ternary_intq_uintq_lane_def): Likewise.
19644 (ternary_intq_uintq_lane): New shape.
19645 (ternary_intq_uintq_opt_n_def): New class
19646 (ternary_intq_uintq_opt_n): New shape.
19647 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
19648 (ternary_uintq_intq_def): New class.
19649 (ternary_uintq_intq): New shape.
19650 (ternary_uintq_intq_lane_def): New class.
19651 (ternary_uintq_intq_lane): New shape.
19652 (ternary_uintq_intq_opt_n_def): New class.
19653 (ternary_uintq_intq_opt_n): New shape.
19654 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
19655 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
19656 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
19657 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
19659 (svdotprod_lane_impl): ...this new class.
19660 (svmmla_impl, svusdot_impl): New classes.
19661 (svdot_lane): Update to use svdotprod_lane_impl.
19662 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
19663 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
19665 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
19666 function, with no types defined.
19667 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
19668 AARCH64_FL_I8MM functions.
19669 (svmmla): New AARCH64_FL_F32MM function.
19670 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
19671 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
19672 AARCH64_FL_F64MM function.
19673 (REQUIRED_EXTENSIONS):
19675 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
19677 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
19680 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
19682 * config/i386/i386.md (*movoi_internal_avx): Do not check for
19683 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
19684 (*movti_internal): Do not check for
19685 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
19686 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
19687 just after check for TARGET_AVX.
19688 (*movdf_internal): Ditto.
19689 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
19690 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
19691 * config/i386/sse.md (mov<mode>_internal): Only check
19692 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
19693 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
19694 (<sse>_andnot<mode>3<mask_name>): Move check for
19695 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
19696 (<code><mode>3<mask_name>): Ditto.
19697 (*andnot<mode>3): Ditto.
19698 (*andnottf3): Ditto.
19699 (*<code><mode>3): Ditto.
19700 (*<code>tf3): Ditto.
19701 (*andnot<VI:mode>3): Remove
19702 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
19703 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
19704 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
19705 (sse4_1_blendv<ssemodesuffix>): Ditto.
19706 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
19707 Explain that tune applies to 128bit instructions only.
19709 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
19711 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
19712 to definition of hsa_kernel_description. Parse assembly to find SGPR
19713 and VGPR count of kernel and store in hsa_kernel_description.
19715 2020-01-31 Tamar Christina <tamar.christina@arm.com>
19717 PR rtl-optimization/91838
19718 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
19719 to truncate if allowed or reject combination.
19721 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
19723 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
19724 (find_inv_vars_cb): Likewise.
19726 2020-01-31 David Malcolm <dmalcolm@redhat.com>
19728 * calls.c (special_function_p): Split out the check for DECL_NAME
19729 being non-NULL and fndecl being extern at file scope into a
19730 new maybe_special_function_p and call it. Drop check for fndecl
19731 being non-NULL that was after a usage of DECL_NAME (fndecl).
19732 * tree.h (maybe_special_function_p): New inline function.
19734 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
19736 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
19737 (mask_gather_load<mode>): ... here, and zero-initialize the
19739 (maskload<mode>di): Zero-initialize the destination.
19740 * config/gcn/gcn.c:
19742 2020-01-30 David Malcolm <dmalcolm@redhat.com>
19745 * doc/analyzer.texi (Limitations): Note that constraints on
19746 floating-point values are currently ignored.
19748 2020-01-30 Jakub Jelinek <jakub@redhat.com>
19751 * symtab.c (symtab_node::noninterposable_alias): If localalias
19752 already exists, but is not usable, append numbers after it until
19753 a unique name is found. Formatting fix.
19755 PR middle-end/93505
19756 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
19759 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
19761 * config/gcn/gcn.c (print_operand): Handle LTGT.
19762 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
19764 2020-01-30 Richard Biener <rguenther@suse.de>
19766 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
19767 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
19769 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
19771 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
19772 without a DECL in .data.rel.ro.local.
19774 2020-01-30 Jakub Jelinek <jakub@redhat.com>
19777 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
19781 * config/i386/sse.md
19782 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
19783 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
19784 any_extend code iterator instead of always zero_extend.
19785 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
19786 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
19787 Use any_extend code iterator instead of always zero_extend.
19788 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
19789 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
19790 Use any_extend code iterator instead of always zero_extend.
19791 (*sse2_pmovmskb_ext): New define_insn.
19792 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
19795 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
19796 (*popcountsi2_zext_falsedep): New define_insn.
19798 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
19800 * config.in: Regenerated.
19801 * configure: Regenerated.
19803 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
19806 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
19807 LLVM's assembler changed the default in version 9.
19809 2020-01-24 Jeff Law <law@redhat.com>
19811 PR tree-optimization/89689
19812 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
19814 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
19818 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
19820 PR rtl-optimization/87763
19821 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
19822 simplification to handle subregs as well as bare regs.
19823 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
19825 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
19828 * ira.c (ira): Revert use of simplified LRA algorithm.
19830 2020-01-29 Martin Jambor <mjambor@suse.cz>
19832 PR tree-optimization/92706
19833 * tree-sra.c (struct access): Fields first_link, last_link,
19834 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
19835 next_rhs_queued and grp_rhs_queued respectively, new fields
19836 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
19837 (struct assign_link): Field next renamed to next_rhs, new field
19838 next_lhs. Updated comment.
19839 (work_queue_head): Renamed to rhs_work_queue_head.
19840 (lhs_work_queue_head): New variable.
19841 (add_link_to_lhs): New function.
19842 (relink_to_new_repr): Also relink LHS lists.
19843 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
19844 (add_access_to_lhs_work_queue): New function.
19845 (pop_access_from_work_queue): Renamed to
19846 pop_access_from_rhs_work_queue.
19847 (pop_access_from_lhs_work_queue): New function.
19848 (build_accesses_from_assign): Also add links to LHS lists and to LHS
19850 (child_would_conflict_in_lacc): Renamed to
19851 child_would_conflict_in_acc. Adjusted parameter names.
19852 (create_artificial_child_access): New parameter set_grp_read, use it.
19853 (subtree_mark_written_and_enqueue): Renamed to
19854 subtree_mark_written_and_rhs_enqueue.
19855 (propagate_subaccesses_across_link): Renamed to
19856 propagate_subaccesses_from_rhs.
19857 (propagate_subaccesses_from_lhs): New function.
19858 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
19861 2020-01-29 Martin Jambor <mjambor@suse.cz>
19863 PR tree-optimization/92706
19864 * tree-sra.c (struct access): Adjust comment of
19865 grp_total_scalarization.
19866 (find_access_in_subtree): Look for single children spanning an entire
19868 (scalarizable_type_p): Allow register accesses, adjust callers.
19869 (completely_scalarize): Remove function.
19870 (scalarize_elem): Likewise.
19871 (create_total_scalarization_access): Likewise.
19872 (sort_and_splice_var_accesses): Do not track total scalarization
19874 (analyze_access_subtree): New parameter totally, adjust to new meaning
19875 of grp_total_scalarization.
19876 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
19877 (can_totally_scalarize_forest_p): New function.
19878 (create_total_scalarization_access): Likewise.
19879 (create_total_access_and_reshape): Likewise.
19880 (total_should_skip_creating_access): Likewise.
19881 (totally_scalarize_subtree): Likewise.
19882 (analyze_all_variable_accesses): Perform total scalarization after
19883 subaccess propagation using the new functions above.
19884 (initialize_constant_pool_replacements): Output initializers by
19885 traversing the access tree.
19887 2020-01-29 Martin Jambor <mjambor@suse.cz>
19889 * tree-sra.c (verify_sra_access_forest): New function.
19890 (verify_all_sra_access_forests): Likewise.
19891 (create_artificial_child_access): Set parent.
19892 (analyze_all_variable_accesses): Call the verifier.
19894 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19896 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
19897 if called on indirect edge.
19898 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
19899 speculative call if needed.
19901 2020-01-29 Richard Biener <rguenther@suse.de>
19903 PR tree-optimization/93428
19904 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
19905 permutation when the load node is created.
19906 (vect_analyze_slp_instance): Re-use it here.
19908 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19910 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
19912 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
19914 PR rtl-optimization/93272
19915 * ira-lives.c (process_out_of_region_eh_regs): New function.
19916 (process_bb_node_lives): Call it.
19918 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19920 * coverage.c (read_counts_file): Make error message lowercase.
19922 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19924 * profile-count.c (profile_quality_display_names): Fix ordering.
19926 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19929 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
19930 hash only when edge is first within the sequence.
19931 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
19932 (symbol_table::create_edge): Do not set target_prob.
19933 (cgraph_edge::remove_caller): Watch for speculative calls when updating
19934 the call site hash.
19935 (cgraph_edge::make_speculative): Drop target_prob parameter.
19936 (cgraph_edge::speculative_call_info): Remove.
19937 (cgraph_edge::first_speculative_call_target): New member function.
19938 (update_call_stmt_hash_for_removing_direct_edge): New function.
19939 (cgraph_edge::resolve_speculation): Rewrite to new API.
19940 (cgraph_edge::speculative_call_for_target): New member function.
19941 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
19942 multiple speculation targets.
19943 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
19945 (verify_speculative_call): Verify that targets form an interval.
19946 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
19947 (cgraph_edge::first_speculative_call_target): New member function.
19948 (cgraph_edge::next_speculative_call_target): New member function.
19949 (cgraph_edge::speculative_call_target_ref): New member function.
19950 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
19951 (cgraph_edge): Remove target_prob.
19952 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
19953 Fix handling of speculative calls.
19954 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
19955 * ipa-fnsummary.c (analyze_function_body): Likewise.
19956 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
19957 * ipa-profile.c (dump_histogram): Fix formating.
19958 (ipa_profile_generate_summary): Watch for overflows.
19959 (ipa_profile): Do not require probablity to be 1/2; update to new API.
19960 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
19961 (update_indirect_edges_after_inlining): Update to new API.
19962 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
19964 * profile-count.h: (profile_probability::adjusted): New.
19965 * tree-inline.c (copy_bb): Update to new speculative call API; fix
19966 updating of profile.
19967 * value-prof.c (gimple_ic_transform): Rename to ...
19968 (dump_ic_profile): ... this one; update dumping.
19969 (stream_in_histogram_value): Fix formating.
19970 (gimple_value_profile_transformations): Update.
19972 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
19975 * config/i386/i386.md (*movoi_internal_avx): Remove
19976 TARGET_SSE_TYPELESS_STORES check.
19977 (*movti_internal): Prefer TARGET_AVX over
19978 TARGET_SSE_TYPELESS_STORES.
19979 (*movtf_internal): Likewise.
19980 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
19981 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
19982 from TARGET_SSE_TYPELESS_STORES.
19984 2020-01-28 David Malcolm <dmalcolm@redhat.com>
19986 * diagnostic-core.h (warning_at): Rename overload to...
19987 (warning_meta): ...this.
19988 (emit_diagnostic_valist): Delete decl of overload taking
19989 diagnostic_metadata.
19990 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
19991 (warning_at): Rename overload taking diagnostic_metadata to...
19992 (warning_meta): ...this.
19994 2020-01-28 Richard Biener <rguenther@suse.de>
19996 PR tree-optimization/93439
19997 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
19998 * tree-cfg.c (move_sese_region_to_fn): ... here.
19999 (verify_types_in_gimple_reference): Verify used cliques are
20002 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
20005 * config/i386/i386-options.c (set_ix86_tune_features): Add an
20006 argument of a pointer to struct gcc_options and pass it to
20007 parse_mtune_ctrl_str.
20008 (ix86_function_specific_restore): Pass opts to
20009 set_ix86_tune_features.
20010 (ix86_option_override_internal): Likewise.
20011 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
20012 gcc_options and use it for x_ix86_tune_ctrl_string.
20014 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20016 PR rtl-optimization/87763
20017 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
20018 simplification to handle subregs as well as bare regs.
20019 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
20021 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20023 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
20024 for reduction chains that (now) include a call.
20026 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20028 PR tree-optimization/92822
20029 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
20030 out the don't-care elements of a vector whose significant elements
20031 are duplicates, make the don't-care elements duplicates too.
20033 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20035 PR tree-optimization/93434
20036 * tree-predcom.c (split_data_refs_to_components): Record which
20037 components have had aliasing loads removed. Prevent store-store
20038 commoning for all such components.
20040 2020-01-28 Jakub Jelinek <jakub@redhat.com>
20043 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
20044 -1 or is_vshift is true, use new_vector with number of elts npatterns
20045 rather than new_unary_operation.
20047 PR tree-optimization/93454
20048 * gimple-fold.c (fold_array_ctor_reference): Perform
20049 elt_size.to_uhwi () just once, instead of calling it in every
20050 iteration. Punt if that value is above size of the temporary
20051 buffer. Decrease third native_encode_expr argument when
20052 bufoff + elt_sz is above size of buf.
20054 2020-01-27 Joseph Myers <joseph@codesourcery.com>
20056 * config/mips/mips.c (mips_declare_object_name)
20057 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
20059 2020-01-27 Martin Liska <mliska@suse.cz>
20061 PR gcov-profile/93403
20062 * tree-profile.c (gimple_init_gcov_profiler): Generate
20063 both __gcov_indirect_call_profiler_v4 and
20064 __gcov_indirect_call_profiler_v4_atomic.
20066 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20069 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
20071 (@aarch64_split_simd_mov<mode>): Use it.
20072 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
20073 Leave the vec_extract patterns to handle 2-element vectors.
20074 (aarch64_simd_mov_from_<mode>high): Likewise.
20075 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
20076 (vec_extractv2dfv1df): Likewise.
20078 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20080 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
20081 jump conditions for *compare_condjump<GPI:mode>.
20083 2020-01-27 David Malcolm <dmalcolm@redhat.com>
20086 * digraph.cc (test_edge::test_edge): Specify template for base
20089 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
20091 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
20093 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
20095 * config/arc/arc-protos.h (gen_mlo): Remove.
20096 (gen_mhi): Likewise.
20097 * config/arc/arc.c (AUX_MULHI): Define.
20098 (arc_must_save_reister): Special handling for r58/59.
20099 (arc_compute_frame_size): Consider mlo/mhi registers.
20100 (arc_save_callee_saves): Emit fp/sp move only when emit_move
20102 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
20103 mlo/mhi name selection.
20104 (arc_restore_callee_saves): Don't early restore blink when ISR.
20105 (arc_expand_prologue): Add mlo/mhi saving.
20106 (arc_expand_epilogue): Add mlo/mhi restoring.
20109 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
20110 numbering when MUL64 option is used.
20111 (DWARF2_FRAME_REG_OUT): Define.
20112 * config/arc/arc.md (arc600_stall): New pattern.
20113 (VUNSPEC_ARC_ARC600_STALL): Define.
20114 (mulsi64): Use correct mlo/mhi registers.
20115 (mulsi_600): Clean it up.
20116 * config/arc/predicates.md (mlo_operand): Remove any dependency on
20118 (mhi_operand): Likewise.
20120 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
20121 Petro Karashchenko <petro.karashchenko@ring.com>
20123 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
20124 attributes if needed.
20125 (prepare_move_operands): Generate special unspec instruction for
20127 (arc_isuncached_mem_p): Propagate uncached attribute to each
20129 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
20130 (VUNSPEC_ARC_STDI): Likewise.
20131 (ALLI): New mode iterator.
20132 (mALLI): New mode attribute.
20133 (lddi): New instruction pattern.
20135 (stdidi_split): Split instruction for architectures which are not
20136 supporting ll64 option.
20137 (lddidi_split): Likewise.
20139 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20141 PR rtl-optimization/92989
20142 * lra-lives.c (process_bb_lives): Update the live-in set before
20143 processing additional clobbers.
20145 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20147 PR rtl-optimization/93170
20148 * cselib.c (cselib_invalidate_regno_val): New function, split out
20150 (cselib_invalidate_regno): ...here.
20151 (cselib_invalidated_by_call_p): New function.
20152 (cselib_process_insn): Iterate over all the hard-register entries in
20153 REG_VALUES and invalidate any that cross call-clobbered registers.
20155 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20157 * dojump.c (split_comparison): Use HONOR_NANS rather than
20158 HONOR_SNANS when splitting LTGT.
20160 2020-01-27 Martin Liska <mliska@suse.cz>
20163 * opts.c (print_filtered_help): Exclude language-specific
20164 options from --help=common unless enabled in all FEs.
20166 2020-01-27 Martin Liska <mliska@suse.cz>
20168 * opts.c (print_help): Exclude params from
20169 all except --help=param.
20171 2020-01-27 Martin Liska <mliska@suse.cz>
20174 * config/i386/i386-features.c (make_resolver_func):
20175 Align the code with ppc64 target implementation.
20176 Do not generate a unique name for resolver function.
20178 2020-01-27 Richard Biener <rguenther@suse.de>
20180 PR tree-optimization/93397
20181 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
20182 converted reduction chain SLP graph adjustment.
20184 2020-01-26 Marek Polacek <polacek@redhat.com>
20187 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
20190 2020-01-26 Jason Merrill <jason@redhat.com>
20193 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
20196 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
20198 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
20199 (rx_setmem): Likewise.
20201 2020-01-26 Jakub Jelinek <jakub@redhat.com>
20204 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
20205 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
20206 drop <di> from constraint of last operand.
20209 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
20210 TARGET_AVX2 and V4DFmode not in the split condition, but in the
20211 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
20213 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
20216 * ipa-cp.c (get_info_about_necessary_edges): Remove value
20219 2020-01-24 Jeff Law <law@redhat.com>
20221 PR tree-optimization/92788
20222 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
20225 2020-01-24 Jakub Jelinek <jakub@redhat.com>
20228 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
20229 *avx_vperm_broadcast_<mode>,
20230 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
20231 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
20232 Move before avx2_perm<mode>/avx512f_perm<mode>.
20235 * simplify-rtx.c (simplify_const_unary_operation,
20236 simplify_const_binary_operation): Punt for mode precision above
20237 MAX_BITSIZE_MODE_ANY_INT.
20239 2020-01-24 Andrew Pinski <apinski@marvell.com>
20241 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
20242 alu.shift_reg to 0.
20244 2020-01-24 Jeff Law <law@redhat.com>
20247 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
20248 for REGs. Call output_operand_lossage to get more reasonable
20251 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
20253 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
20254 gcn_fp_compare_operator.
20255 (vec_cmpu<mode>di): Use gcn_compare_operator.
20256 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
20257 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
20258 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
20259 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
20260 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
20261 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
20262 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
20263 gcn_fp_compare_operator.
20264 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
20265 gcn_fp_compare_operator.
20266 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
20267 gcn_fp_compare_operator.
20268 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
20269 gcn_fp_compare_operator.
20271 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
20273 * doc/install.texi (Cross-Compiler-Specific Options): Document
20274 `--with-toolexeclibdir' option.
20276 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
20278 * target.def (flags_regnum): Also mention effect on delay slot filling.
20279 * doc/tm.texi: Regenerate.
20281 2020-01-23 Jeff Law <law@redhat.com>
20283 PR translation/90162
20284 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
20286 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
20289 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
20292 2020-01-23 Jakub Jelinek <jakub@redhat.com>
20294 PR rtl-optimization/93402
20295 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
20298 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
20300 * config.in: Regenerated.
20301 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
20302 for TARGET_LIBC_GNUSTACK.
20303 * configure: Regenerated.
20304 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
20305 found to be 2.31 or greater.
20307 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
20309 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
20311 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
20312 (mips_asm_file_end): New function. Delegate to
20313 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
20314 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
20316 2020-01-23 Jakub Jelinek <jakub@redhat.com>
20319 * config/i386/i386-modes.def (POImode): New mode.
20320 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
20321 * config/i386/i386.md (DPWI): New mode attribute.
20322 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
20323 (QWI): Rename to...
20324 (QPWI): ... this. Use POI instead of OI for TImode.
20325 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
20326 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
20329 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
20332 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
20334 (speculation_tracker_rev): New pattern.
20335 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
20336 Use speculation_tracker_rev to track the inverse condition.
20338 2020-01-23 Richard Biener <rguenther@suse.de>
20340 PR tree-optimization/93381
20341 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
20342 alias-set of the def as argument and record the first one.
20343 (vn_walk_cb_data::first_set): New member.
20344 (vn_reference_lookup_3): Pass the alias-set of the current def
20345 to push_partial_def. Fix alias-set used in the aggregate copy
20347 (vn_reference_lookup): Consistently set *last_vuse_ptr.
20348 * real.c (clear_significand_below): Fix out-of-bound access.
20350 2020-01-23 Jakub Jelinek <jakub@redhat.com>
20353 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
20354 New define_insn patterns.
20356 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
20358 * doc/sourcebuild.texi (check-function-bodies): Add an
20359 optional target/xfail selector.
20361 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
20363 PR rtl-optimization/93124
20364 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
20365 bare USE and CLOBBER insns.
20367 2020-01-22 Andrew Pinski <apinski@marvell.com>
20369 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
20371 2020-01-22 David Malcolm <dmalcolm@redhat.com>
20374 * gdbinit.in (break-on-saved-diagnostic): Update for move of
20375 diagnostic_manager into "ana" namespace.
20376 * selftest-run-tests.c (selftest::run_tests): Update for move of
20377 selftest::run_analyzer_selftests to
20378 ana::selftest::run_analyzer_selftests.
20380 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
20382 * cfgexpand.c (union_stack_vars): Update the size.
20384 2020-01-22 Richard Biener <rguenther@suse.de>
20386 PR tree-optimization/93381
20387 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
20388 throughout, handle all conversions the same.
20390 2020-01-22 Jakub Jelinek <jakub@redhat.com>
20393 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
20394 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
20395 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
20396 Call force_reg on high_in2 unconditionally.
20398 2020-01-22 Martin Liska <mliska@suse.cz>
20400 PR tree-optimization/92924
20401 * profile.c (compute_value_histograms): Divide
20402 all counter values.
20404 2020-01-22 Jakub Jelinek <jakub@redhat.com>
20407 * output.h (assemble_name_resolve): Declare.
20408 * varasm.c (assemble_name_resolve): New function.
20409 (assemble_name): Use it.
20410 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
20412 2020-01-22 Joseph Myers <joseph@codesourcery.com>
20414 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
20415 update_web_docs_git instead of update_web_docs_svn.
20417 2020-01-21 Andrew Pinski <apinski@marvell.com>
20420 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
20421 as PTR mode. Have operand 1 as being modeless, it can be P mode.
20422 (*tlsgd_small_<mode>): Likewise.
20423 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
20424 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
20425 register. Convert that register back to dest using convert_mode.
20427 2020-01-21 Jim Wilson <jimw@sifive.com>
20429 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
20432 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
20433 Uros Bizjak <ubizjak@gmail.com>
20436 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
20438 (legitimize_tls_address): Do GNU2 TLS address computation in
20439 ptr_mode and zero-extend result to Pmode.
20440 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
20441 :P with :PTR and Pmode with ptr_mode.
20442 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
20443 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
20444 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
20446 2020-01-21 Jakub Jelinek <jakub@redhat.com>
20449 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
20450 the last two operands are CONST_INT_P before using them as such.
20452 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
20454 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
20455 to get the integer element types.
20457 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
20459 * config/aarch64/aarch64-sve-builtins.h
20460 (function_expander::convert_to_pmode): Declare.
20461 * config/aarch64/aarch64-sve-builtins.cc
20462 (function_expander::convert_to_pmode): New function.
20463 (function_expander::get_contiguous_base): Use it.
20464 (function_expander::prepare_gather_address_operands): Likewise.
20465 * config/aarch64/aarch64-sve-builtins-sve2.cc
20466 (svwhilerw_svwhilewr_impl::expand): Likewise.
20468 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
20471 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
20472 cfun->machine->label_is_assembled.
20473 (aarch64_print_patchable_function_entry): New.
20474 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
20475 * config/aarch64/aarch64.h (struct machine_function): New field,
20476 label_is_assembled.
20478 2020-01-21 David Malcolm <dmalcolm@redhat.com>
20481 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
20484 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
20487 * cgraph.c (cgraph_edge::resolve_speculation,
20488 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
20489 call_stmt_site_hash.
20491 2020-01-21 Martin Liska <mliska@suse.cz>
20493 * config/rs6000/rs6000.c (common_mode_defined): Remove
20496 2020-01-21 Richard Biener <rguenther@suse.de>
20498 PR tree-optimization/92328
20499 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
20500 type when value-numbering same-sized store by inserting a
20502 (eliminate_dom_walker::eliminate_stmt): When eliminating
20503 a redundant store handle bit-reinterpretation of the same value.
20505 2020-01-21 Andrew Pinski <apinski@marvel.com>
20508 * tree-into-ssa.c (prepare_block_for_update_1): Split out
20510 (prepare_block_for_update): This. Use a worklist instead of
20513 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20515 * config/arm/arm.c (clear_operation_p):
20516 Initialise last_regno, skip first iteration
20517 based on the first_set value and use ints instead
20518 of the unnecessary HOST_WIDE_INTs.
20520 2020-01-21 Jakub Jelinek <jakub@redhat.com>
20523 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
20524 compare_mode other than SFmode or DFmode.
20526 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
20529 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
20530 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
20531 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
20533 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
20535 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
20537 2020-01-20 Andrew Pinski <apinski@marvell.com>
20539 PR middle-end/93242
20540 * targhooks.c (default_print_patchable_function_entry): Use
20541 output_asm_insn to emit the nop instruction.
20543 2020-01-20 Fangrui Song <maskray@google.com>
20545 PR middle-end/93194
20546 * targhooks.c (default_print_patchable_function_entry): Align to
20549 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
20552 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
20553 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
20554 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
20555 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
20556 (*tls_dynamic_gnu2_lea_64): Renamed to ...
20557 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
20558 Remove the {q} suffix from lea.
20559 (*tls_dynamic_gnu2_call_64): Renamed to ...
20560 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
20561 (*tls_dynamic_gnu2_combine_64): Renamed to ...
20562 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
20563 Pass Pmode to gen_tls_dynamic_gnu2_64.
20565 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
20567 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
20569 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
20571 * config/aarch64/aarch64-sve-builtins-base.cc
20572 (svld1ro_impl::memory_vector_mode): Remove parameter name.
20574 2020-01-20 Richard Biener <rguenther@suse.de>
20577 * dwarf2out.c (prune_unused_types): Unconditionally mark
20578 called function DIEs.
20580 2020-01-20 Martin Liska <mliska@suse.cz>
20582 PR tree-optimization/93199
20583 * tree-eh.c (struct leh_state): Add
20584 new field outer_non_cleanup.
20585 (cleanup_is_dead_in): Pass leh_state instead
20586 of eh_region. Add a checking that state->outer_non_cleanup
20587 points to outer non-clean up region.
20588 (lower_try_finally): Record outer_non_cleanup
20590 (lower_catch): Likewise.
20591 (lower_eh_filter): Likewise.
20592 (lower_eh_must_not_throw): Likewise.
20593 (lower_cleanup): Likewise.
20595 2020-01-20 Richard Biener <rguenther@suse.de>
20597 PR tree-optimization/93094
20598 * tree-vectorizer.h (vect_loop_versioning): Adjust.
20599 (vect_transform_loop): Likewise.
20600 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
20601 loop_vectorized_call to vect_transform_loop.
20602 * tree-vect-loop.c (vect_transform_loop): Pass down
20603 loop_vectorized_call to vect_loop_versioning.
20604 * tree-vect-loop-manip.c (vect_loop_versioning): Use
20605 the earlier discovered loop_vectorized_call.
20607 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
20609 * doc/contribute.texi: Update for SVN -> Git transition.
20610 * doc/install.texi: Likewise.
20612 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
20615 * cgraph.c (cgraph_edge::make_speculative): Increase number of
20616 speculative targets.
20617 (verify_speculative_call): New function
20618 (cgraph_node::verify_node): Use it.
20619 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
20622 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
20625 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
20626 (cgraph_edge::make_direct): Remove all indirect targets.
20627 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
20628 (cgraph_node::verify_node): Verify that only one call_stmt or
20629 lto_stmt_uid is set.
20630 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
20632 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
20633 (lto_output_ref): Simplify streaming of stmt.
20634 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
20636 2020-01-18 Tamar Christina <tamar.christina@arm.com>
20638 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
20639 Mark parameter unused.
20641 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
20643 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
20645 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
20647 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
20649 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
20651 * Makefile.in: Add coroutine-passes.o.
20652 * builtin-types.def (BT_CONST_SIZE): New.
20653 (BT_FN_BOOL_PTR): New.
20654 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
20655 * builtins.def (DEF_COROUTINE_BUILTIN): New.
20656 * coroutine-builtins.def: New file.
20657 * coroutine-passes.cc: New file.
20658 * function.h (struct GTY function): Add a bit to indicate that the
20659 function is a coroutine component.
20660 * internal-fn.c (expand_CO_FRAME): New.
20661 (expand_CO_YIELD): New.
20662 (expand_CO_SUSPN): New.
20663 (expand_CO_ACTOR): New.
20664 * internal-fn.def (CO_ACTOR): New.
20668 * passes.def: Add pass_coroutine_lower_builtins,
20669 pass_coroutine_early_expand_ifns.
20670 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
20671 (make_pass_coroutine_early_expand_ifns): New.
20672 * doc/invoke.texi: Document the fcoroutines command line
20675 2020-01-18 Jakub Jelinek <jakub@redhat.com>
20677 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
20680 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
20681 after checking the argument is a REG. Don't use REGNO (reg)
20682 again to set last_regno, reuse regno variable instead.
20684 2020-01-17 David Malcolm <dmalcolm@redhat.com>
20686 * doc/analyzer.texi (Limitations): Add note about NaN.
20688 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20689 Sudakshina Das <sudi.das@arm.com>
20691 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
20692 and valid immediate.
20693 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
20694 (lshrdi3): Generate thumb2_lsrl for valid immediates.
20695 * config/arm/constraints.md (Pg): New.
20696 * config/arm/predicates.md (long_shift_imm): New.
20697 (arm_reg_or_long_shift_imm): Likewise.
20698 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
20699 (thumb2_lsll): Likewise.
20700 (thumb2_lsrl): New.
20702 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20703 Sudakshina Das <sudi.das@arm.com>
20705 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
20706 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
20707 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
20708 register pairs for doubleword quantities for ARMv8.1M-Mainline.
20709 * config/arm/thumb2.md (thumb2_asrl): New.
20710 (thumb2_lsll): Likewise.
20712 2020-01-17 Jakub Jelinek <jakub@redhat.com>
20714 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
20717 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
20719 * gdbinit.in (help-gcc-hooks): New command.
20720 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
20721 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
20724 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
20726 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
20727 correct target macro.
20729 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
20731 * config/aarch64/aarch64-protos.h
20732 (aarch64_sve_ld1ro_operand_p): New.
20733 * config/aarch64/aarch64-sve-builtins-base.cc
20734 (class load_replicate): New.
20735 (class svld1ro_impl): New.
20736 (class svld1rq_impl): Change to inherit from load_replicate.
20737 (svld1ro): New sve intrinsic function base.
20738 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
20739 New DEF_SVE_FUNCTION.
20740 * config/aarch64/aarch64-sve-builtins-base.h
20741 (svld1ro): New decl.
20742 * config/aarch64/aarch64-sve-builtins.cc
20743 (function_expander::add_mem_operand): Modify assert to allow
20745 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
20747 * config/aarch64/aarch64.c
20748 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
20749 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
20750 (aarch64_sve_ld1ro_operand_p): New.
20751 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
20752 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
20753 * config/aarch64/predicates.md
20754 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
20756 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
20758 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
20759 Introduce this ACLE specified predefined macro.
20760 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
20761 (fp): Disabling this disables f64mm.
20762 (simd): Disabling this disables f64mm.
20763 (fp16): Disabling this disables f64mm.
20764 (sve): Disabling this disables f64mm.
20765 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
20766 (AARCH64_ISA_F64MM): New.
20767 (TARGET_F64MM): New.
20768 * doc/invoke.texi (f64mm): Document new option.
20770 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
20772 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
20773 (neoversen1_tunings): Likewise.
20775 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
20778 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
20779 Add assert to ensure prolog has been emitted.
20780 (aarch64_split_atomic_op): Likewise.
20781 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
20782 Use epilogue_completed rather than reload_completed.
20783 (aarch64_atomic_exchange<mode>): Likewise.
20784 (aarch64_atomic_<atomic_optab><mode>): Likewise.
20785 (atomic_nand<mode>): Likewise.
20786 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
20787 (atomic_fetch_nand<mode>): Likewise.
20788 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
20789 (atomic_nand_fetch<mode>): Likewise.
20791 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
20794 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
20796 (REVERSE_CONDITION): Delete.
20797 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
20798 (CCFP_CCFPE): Likewise.
20799 (e): New mode attribute.
20800 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
20801 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
20802 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
20803 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
20804 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
20805 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
20806 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
20807 name of generator from gen_ccmpdi to gen_ccmpccdi.
20808 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
20809 the previous comparison but aren't able to, use the new ccmp_rev
20812 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
20814 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
20815 than testing directly for INTEGER_CST.
20816 (gimplify_target_expr, gimplify_omp_depend): Likewise.
20818 2020-01-17 Jakub Jelinek <jakub@redhat.com>
20820 PR tree-optimization/93292
20821 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
20822 get_vectype_for_scalar_type returns NULL.
20824 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
20826 * params.opt (-param=max-predicted-iterations): Increase range from 0.
20827 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
20829 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
20831 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
20833 * params.opt: (max-predicted-iterations): Set bounds.
20834 * predict.c (real_almost_one, real_br_prob_base,
20835 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
20836 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
20837 probabilities; do not truncate to reg_br_prob_bases.
20838 (estimate_loops_at_level): Pass max_cyclic_prob.
20839 (estimate_loops): Compute max_cyclic_prob.
20840 (estimate_bb_frequencies): Do not initialize real_*; update calculation
20842 * profile-count.c (profile_probability::to_sreal): New.
20843 * profile-count.h (class sreal): Move up in file.
20844 (profile_probability::to_sreal): Declare.
20846 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20849 (arm_invalid_conversion): New function for target hook.
20850 (arm_invalid_unary_op): New function for target hook.
20851 (arm_invalid_binary_op): New function for target hook.
20853 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20855 * config.gcc: Add arm_bf16.h.
20856 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
20857 (arm_simd_builtin_std_type): Add BFmode.
20858 (arm_init_simd_builtin_types): Define element types for vector types.
20859 (arm_init_bf16_types): New function.
20860 (arm_init_builtins): Add arm_init_bf16_types function call.
20861 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
20862 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
20863 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
20864 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
20865 (arm_vector_mode_supported_p): Add V4BF, V8BF.
20866 (arm_mangle_type): Add __bf16.
20867 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
20868 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
20869 arm_bf16_ptr_type_node.
20870 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
20871 define_split between ARM registers.
20872 * config/arm/arm_bf16.h: New file.
20873 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
20874 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
20875 (VQXMOV): Add V8BF.
20876 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
20877 * config/arm/vfp.md: Add BFmode to movhf patterns.
20879 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
20880 Andre Vieira <andre.simoesdiasvieira@arm.com>
20882 * config/arm/arm-cpus.in (mve, mve_float): New features.
20883 (dsp, mve, mve.fp): New options.
20884 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
20885 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
20886 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
20888 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20889 Thomas Preud'homme <thomas.preudhomme@arm.com>
20891 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
20893 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
20894 error for using -mcmse when targeting Armv8.1-M Mainline.
20896 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20897 Thomas Preud'homme <thomas.preudhomme@arm.com>
20899 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
20900 address in r4 when targeting Armv8.1-M Mainline.
20901 (nonsecure_call_value_internal): Likewise.
20902 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
20903 a register match_operand again. Emit BLXNS when targeting
20904 Armv8.1-M Mainline.
20905 (nonsecure_call_value_reg_thumb2): Likewise.
20907 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20908 Thomas Preud'homme <thomas.preudhomme@arm.com>
20910 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
20911 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
20912 variable as true when floating-point ABI is not hard. Replace
20913 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
20914 Generate VLSTM and VLLDM instruction respectively before and
20915 after a function call to cmse_nonsecure_call function.
20916 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
20917 (VUNSPEC_VLLDM): Likewise.
20918 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
20919 (lazy_load_multiple_insn): Likewise.
20921 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20922 Thomas Preud'homme <thomas.preudhomme@arm.com>
20924 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
20925 (arm_emit_vfp_multi_reg_pop): Likewise.
20926 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
20927 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
20928 restore callee-saved VFP registers.
20930 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20931 Thomas Preud'homme <thomas.preudhomme@arm.com>
20933 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
20934 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
20935 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
20936 callee-saved GPRs as well as clear ip register before doing a nonsecure
20937 call then restore callee-saved GPRs after it when targeting
20938 Armv8.1-M Mainline.
20939 (arm_reorg): Adapt to function rename.
20941 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20942 Thomas Preud'homme <thomas.preudhomme@arm.com>
20944 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
20945 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
20946 clear_vfp_multiple pattern based on a new vfp parameter.
20947 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
20948 targeting Armv8.1-M Mainline.
20949 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
20950 unconditionally when targeting Armv8.1-M Mainline architecture. Check
20951 whether VFP registers are available before looking call_used_regs for a
20953 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
20954 of prototype of clear_operation_p.
20955 (clear_vfp_multiple_operation): New predicate.
20956 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
20957 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
20959 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20960 Thomas Preud'homme <thomas.preudhomme@arm.com>
20962 * config/arm/arm-protos.h (clear_operation_p): Declare.
20963 * config/arm/arm.c (clear_operation_p): New function.
20964 (cmse_clear_registers): Generate clear_multiple instruction pattern if
20965 targeting Armv8.1-M Mainline or successor.
20966 (output_return_instruction): Only output APSR register clearing if
20967 Armv8.1-M Mainline instructions not available.
20968 (thumb_exit): Likewise.
20969 * config/arm/predicates.md (clear_multiple_operation): New predicate.
20970 * config/arm/thumb2.md (clear_apsr): New define_insn.
20971 (clear_multiple): Likewise.
20972 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
20974 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20975 Thomas Preud'homme <thomas.preudhomme@arm.com>
20977 * config/arm/arm.c (fp_sysreg_names): Declare and define.
20978 (use_return_insn): Also return false for Armv8.1-M Mainline.
20979 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
20980 Mainline instructions are available.
20981 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
20982 when targeting Armv8.1-M Mainline Security Extensions.
20983 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
20984 Mainline entry function.
20985 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
20986 targeting Armv8.1-M Mainline or successor.
20987 (arm_expand_epilogue): Fix indentation of caller-saved register
20988 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
20990 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
20991 (FP_SYSREGS): Likewise.
20992 (enum vfp_sysregs_encoding): Define enum.
20993 (fp_sysreg_names): Declare.
20994 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
20995 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
20996 (pop_fpsysreg_insn): Likewise.
20998 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20999 Thomas Preud'homme <thomas.preudhomme@arm.com>
21001 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
21002 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
21003 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
21004 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
21005 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
21006 (ARMv8_1m_main): New feature group.
21007 (armv8.1-m.main): New architecture.
21008 * config/arm/arm-tables.opt: Regenerate.
21009 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
21010 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
21011 (arm_options_perform_arch_sanity_checks): Error out when targeting
21012 Armv8.1-M Mainline Security Extensions.
21013 * config/arm/arm.h (arm_arch8_1m_main): Declare.
21015 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21017 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
21018 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
21019 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
21020 aarch64_bfdot_laneq): New.
21021 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
21022 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
21023 vbfdotq_laneq_f32): New.
21024 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
21025 VBFMLA_W, VBF): New.
21026 (isquadop): Add V4BF, V8BF.
21028 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21030 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
21031 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
21032 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
21033 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
21034 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
21035 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
21036 usdot_laneq, sudot_lane,sudot_laneq): New.
21037 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
21038 (aarch64_<sur>dot_lane): New.
21039 * config/aarch64/arm_neon.h (vusdot_s32): New.
21040 (vusdotq_s32): New.
21041 (vusdot_lane_s32): New.
21042 (vsudot_lane_s32): New.
21043 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
21044 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
21046 2020-01-16 Martin Liska <mliska@suse.cz>
21048 * value-prof.c (dump_histogram_value): Fix
21049 obvious spacing issue.
21051 2020-01-16 Andrew Pinski <apinski@marvell.com>
21053 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
21054 !storage_order_barrier_p.
21056 2020-01-16 Andrew Pinski <apinski@marvell.com>
21058 * sched-int.h (_dep): Add unused bit-field field for the padding.
21059 * sched-deps.c (init_dep_1): Init unused field.
21061 2020-01-16 Andrew Pinski <apinski@marvell.com>
21063 * optabs.h (create_expand_operand): Initialize target field also.
21065 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
21067 PR tree-optimization/92429
21068 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
21069 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
21071 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
21074 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
21076 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
21077 aarch64_sve_int_mode to each mode.
21079 2020-01-15 David Malcolm <dmalcolm@redhat.com>
21081 * doc/analyzer.texi (Overview): Add note about
21082 -fdump-ipa-analyzer.
21084 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
21086 PR tree-optimization/93231
21087 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
21088 input_type is unsigned. Use tree_to_shwi for shift constant.
21089 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
21090 (simplify_count_trailing_zeroes): Add test to handle known non-zero
21091 inputs more efficiently.
21093 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
21095 * config/i386/i386.md (*movsf_internal): Do not require
21096 SSE2 ISA for alternatives 14 and 15.
21098 2020-01-15 Richard Biener <rguenther@suse.de>
21100 PR middle-end/93273
21101 * tree-eh.c (sink_clobbers): If we already visited the destination
21102 block do not defer insertion.
21103 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
21104 the purpose of defered insertion.
21106 2020-01-15 Jakub Jelinek <jakub@redhat.com>
21108 * BASE-VER: Bump to 10.0.1.
21110 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
21112 PR tree-optimization/93247
21113 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
21114 type of the stmt that we're going to vectorize.
21116 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
21118 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
21119 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
21122 2020-01-15 Martin Liska <mliska@suse.cz>
21124 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
21125 2 calls of streamer_read_hwi in a function call.
21127 2020-01-15 Richard Biener <rguenther@suse.de>
21129 * alias.c (record_alias_subset): Avoid redundant work when
21130 subset is already recorded.
21132 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21134 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
21135 the analyzer options provide CWE identifiers.
21137 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21139 * tree-diagnostic-path.cc (path_summary::event_range::print):
21140 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
21141 using get_pure_location.
21143 2020-01-15 Jakub Jelinek <jakub@redhat.com>
21145 PR tree-optimization/93262
21146 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
21147 perform head trimming only if the last argument is constant,
21148 either all ones, or larger or equal to head trim, in the latter
21149 case decrease the last argument by head_trim.
21151 PR tree-optimization/93249
21152 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
21153 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
21154 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
21155 perform head trim unless we can prove there are no '\0' chars
21156 from the source among the first head_trim chars.
21158 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21160 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
21162 2020-01-15 Jakub Jelinek <jakub@redhat.com>
21165 * config/i386/sse.md
21166 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
21167 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
21168 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
21169 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
21170 just a single alternative instead of two, make operands 1 and 2
21173 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
21176 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
21179 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21181 * Makefile.in (lang_opt_files): Add analyzer.opt.
21182 (ANALYZER_OBJS): New.
21183 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
21184 tristate.o and ANALYZER_OBJS.
21185 (TEXI_GCCINT_FILES): Add analyzer.texi.
21186 * common.opt (-fanalyzer): New driver option.
21187 * config.in: Regenerate.
21188 * configure: Regenerate.
21189 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
21190 (gccdepdir): Also create depdir for "analyzer" subdir.
21191 * digraph.cc: New file.
21192 * digraph.h: New file.
21193 * doc/analyzer.texi: New file.
21194 * doc/gccint.texi ("Static Analyzer") New menu item.
21195 (analyzer.texi): Include it.
21196 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
21197 ("Warning Options"): Add static analysis warnings to the list.
21198 (-Wno-analyzer-double-fclose): New option.
21199 (-Wno-analyzer-double-free): New option.
21200 (-Wno-analyzer-exposure-through-output-file): New option.
21201 (-Wno-analyzer-file-leak): New option.
21202 (-Wno-analyzer-free-of-non-heap): New option.
21203 (-Wno-analyzer-malloc-leak): New option.
21204 (-Wno-analyzer-possible-null-argument): New option.
21205 (-Wno-analyzer-possible-null-dereference): New option.
21206 (-Wno-analyzer-null-argument): New option.
21207 (-Wno-analyzer-null-dereference): New option.
21208 (-Wno-analyzer-stale-setjmp-buffer): New option.
21209 (-Wno-analyzer-tainted-array-index): New option.
21210 (-Wno-analyzer-use-after-free): New option.
21211 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
21212 (-Wno-analyzer-use-of-uninitialized-value): New option.
21213 (-Wanalyzer-too-complex): New option.
21214 (-fanalyzer-call-summaries): New warning.
21215 (-fanalyzer-checker=): New warning.
21216 (-fanalyzer-fine-grained): New warning.
21217 (-fno-analyzer-state-merge): New warning.
21218 (-fno-analyzer-state-purge): New warning.
21219 (-fanalyzer-transitivity): New warning.
21220 (-fanalyzer-verbose-edges): New warning.
21221 (-fanalyzer-verbose-state-changes): New warning.
21222 (-fanalyzer-verbosity=): New warning.
21223 (-fdump-analyzer): New warning.
21224 (-fdump-analyzer-callgraph): New warning.
21225 (-fdump-analyzer-exploded-graph): New warning.
21226 (-fdump-analyzer-exploded-nodes): New warning.
21227 (-fdump-analyzer-exploded-nodes-2): New warning.
21228 (-fdump-analyzer-exploded-nodes-3): New warning.
21229 (-fdump-analyzer-supergraph): New warning.
21230 * doc/sourcebuild.texi (dg-require-dot): New.
21231 (dg-check-dot): New.
21232 * gdbinit.in (break-on-saved-diagnostic): New command.
21233 * graphviz.cc: New file.
21234 * graphviz.h: New file.
21235 * ordered-hash-map-tests.cc: New file.
21236 * ordered-hash-map.h: New file.
21237 * passes.def (pass_analyzer): Add before
21238 pass_ipa_whole_program_visibility.
21239 * selftest-run-tests.c (selftest::run_tests): Call
21240 selftest::ordered_hash_map_tests_cc_tests.
21241 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
21243 * shortest-paths.h: New file.
21244 * timevar.def (TV_ANALYZER): New timevar.
21245 (TV_ANALYZER_SUPERGRAPH): Likewise.
21246 (TV_ANALYZER_STATE_PURGE): Likewise.
21247 (TV_ANALYZER_PLAN): Likewise.
21248 (TV_ANALYZER_SCC): Likewise.
21249 (TV_ANALYZER_WORKLIST): Likewise.
21250 (TV_ANALYZER_DUMP): Likewise.
21251 (TV_ANALYZER_DIAGNOSTICS): Likewise.
21252 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
21253 * tree-pass.h (make_pass_analyzer): New decl.
21254 * tristate.cc: New file.
21255 * tristate.h: New file.
21257 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
21260 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
21261 alternatives 9 and 10.
21263 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21265 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
21266 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
21267 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
21268 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
21269 (selftest::hash_map_tests_c_tests): Call it.
21270 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
21271 New static constant, using the value of = H::empty_zero_p.
21272 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
21273 from default_hash_traits <Value>.
21274 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
21276 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
21277 * hash-table.h (hash_table::alloc_entries): Guard the loop of
21278 calls to mark_empty with !Descriptor::empty_zero_p.
21279 (hash_table::empty_slow): Conditionalize the memset call with a
21280 check that Descriptor::empty_zero_p; otherwise, loop through the
21281 entries calling mark_empty on them.
21282 * hash-traits.h (int_hash::empty_zero_p): New static constant.
21283 (pointer_hash::empty_zero_p): Likewise.
21284 (pair_hash::empty_zero_p): Likewise.
21285 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
21287 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
21288 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
21289 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
21290 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
21291 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
21292 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
21293 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
21294 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
21295 * tree-vectorizer.h
21296 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
21299 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
21301 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
21302 fix typo on return value.
21304 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
21307 * cgraph.c (symbol_table::create_edge): Init speculative_id and
21309 (cgraph_edge::make_speculative): Add param for setting speculative_id
21311 (cgraph_edge::speculative_call_info): Update comments and find reference
21312 by speculative_id for multiple indirect targets.
21313 (cgraph_edge::resolve_speculation): Decrease the speculations
21314 for indirect edge, drop it's speculative if not direct target
21315 left. Update comments.
21316 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
21317 (cgraph_node::dump): Print num_speculative_call_targets.
21318 (cgraph_node::verify_node): Don't report error if speculative
21319 edge not include statement.
21320 (cgraph_edge::num_speculative_call_targets_p): New function.
21321 * cgraph.h (int common_target_id): Remove.
21322 (int common_target_probability): Remove.
21323 (num_speculative_call_targets): New variable.
21324 (make_speculative): Add param for setting speculative_id.
21325 (cgraph_edge::num_speculative_call_targets_p): New declare.
21326 (target_prob): New variable.
21327 (speculative_id): New variable.
21328 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
21329 call summaries for multiple speculative call targets.
21330 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
21331 * ipa-profile.c (struct speculative_call_target): New struct.
21332 (class speculative_call_summary): New class.
21333 (class speculative_call_summaries): New class.
21334 (call_sums): New variable.
21335 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
21336 (ipa_profile_write_edge_summary): New function.
21337 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
21338 (ipa_profile_dump_all_summaries): New function.
21339 (ipa_profile_read_edge_summary): New function.
21340 (ipa_profile_read_summary_section): New function.
21341 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
21342 (ipa_profile): Generate num_speculative_call_targets from
21344 * ipa-ref.h (speculative_id): New variable.
21345 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
21346 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
21347 common_target_probability. Stream out speculative_id and
21348 num_speculative_call_targets.
21349 (input_edge): Likewise.
21350 * predict.c (dump_prediction): Remove edges count assert to be
21352 * symtab.c (symtab_node::create_reference): Init speculative_id.
21353 (symtab_node::clone_references): Clone speculative_id.
21354 (symtab_node::clone_referring): Clone speculative_id.
21355 (symtab_node::clone_reference): Clone speculative_id.
21356 (symtab_node::clear_stmts_in_references): Clear speculative_id.
21357 * tree-inline.c (copy_bb): Duplicate all the speculative edges
21358 if indirect call contains multiple speculative targets.
21359 * value-prof.h (check_ic_target): Remove.
21360 * value-prof.c (gimple_value_profile_transformations):
21361 Use void function gimple_ic_transform.
21362 * value-prof.c (gimple_ic_transform): Handle topn case.
21363 Fix comment typos. Change it to a void function.
21365 2020-01-13 Andrew Pinski <apinski@marvell.com>
21367 * config/aarch64/aarch64-cores.def (octeontx2): New define.
21368 (octeontx2t98): New define.
21369 (octeontx2t96): New define.
21370 (octeontx2t93): New define.
21371 (octeontx2f95): New define.
21372 (octeontx2f95n): New define.
21373 (octeontx2f95mm): New define.
21374 * config/aarch64/aarch64-tune.md: Regenerate.
21375 * doc/invoke.texi (-mcpu=): Document the new cpu types.
21377 2020-01-13 Jason Merrill <jason@redhat.com>
21379 PR c++/33799 - destroy return value if local cleanup throws.
21380 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
21382 2020-01-13 Martin Liska <mliska@suse.cz>
21384 * ipa-cp.c (get_max_overall_size): Use newly
21385 renamed param param_ipa_cp_unit_growth.
21386 * params.opt: Remove legacy param name.
21388 2020-01-13 Martin Sebor <msebor@redhat.com>
21390 PR tree-optimization/93213
21391 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
21392 stores to be eliminated.
21394 2020-01-13 Martin Liska <mliska@suse.cz>
21396 * opts.c (print_help): Do not print CL_PARAM
21397 and CL_WARNING for CL_OPTIMIZATION.
21399 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
21402 * doc/invoke.texi (Warning Options): Add caveat about some warnings
21403 depending on optimization settings.
21405 2020-01-13 Jakub Jelinek <jakub@redhat.com>
21407 PR tree-optimization/90838
21408 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
21409 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
21410 argument rather than to initialize temporary for targets that
21411 don't use the mode argument at all. Initialize ctzval to avoid
21414 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
21416 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
21417 * tree-core.h: Document it.
21418 * gimplify.c (gimplify_omp_workshare): Set it.
21419 * omp-low.c (lower_omp_target): Use it.
21420 * tree-pretty-print.c (dump_omp_clause): Print it.
21422 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
21423 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
21425 2020-01-10 David Malcolm <dmalcolm@redhat.com>
21427 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
21428 * common.opt (fdiagnostics-path-format=): New option.
21429 (diagnostic_path_format): New enum.
21430 (fdiagnostics-show-path-depths): New option.
21431 * coretypes.h (diagnostic_event_id_t): New forward decl.
21432 * diagnostic-color.c (color_dict): Add "path".
21433 * diagnostic-event-id.h: New file.
21434 * diagnostic-format-json.cc (json_from_expanded_location): Make
21436 (json_end_diagnostic): Call context->make_json_for_path if it
21437 exists and the diagnostic has a path.
21438 (diagnostic_output_format_init): Clear context->print_path.
21439 * diagnostic-path.h: New file.
21440 * diagnostic-show-locus.c (colorizer::set_range): Special-case
21441 when printing a run of events in a diagnostic_path so that they
21442 all get the same color.
21443 (layout::m_diagnostic_path_p): New field.
21444 (layout::layout): Initialize it.
21445 (layout::print_any_labels): Don't colorize the label text for an
21446 event in a diagnostic_path.
21447 (gcc_rich_location::add_location_if_nearby): Add
21448 "restrict_to_current_line_spans" and "label" params. Pass the
21449 former to layout.maybe_add_location_range; pass the latter
21450 when calling add_range.
21451 * diagnostic.c: Include "diagnostic-path.h".
21452 (diagnostic_initialize): Initialize context->path_format and
21453 context->show_path_depths.
21454 (diagnostic_show_any_path): New function.
21455 (diagnostic_path::interprocedural_p): New function.
21456 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
21457 (simple_diagnostic_path::num_events): New function.
21458 (simple_diagnostic_path::get_event): New function.
21459 (simple_diagnostic_path::add_event): New function.
21460 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
21461 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
21462 (debug): New overload taking a diagnostic_path *.
21463 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
21464 * diagnostic.h (enum diagnostic_path_format): New enum.
21465 (json::value): New forward decl.
21466 (diagnostic_context::path_format): New field.
21467 (diagnostic_context::show_path_depths): New field.
21468 (diagnostic_context::print_path): New callback field.
21469 (diagnostic_context::make_json_for_path): New callback field.
21470 (diagnostic_show_any_path): New decl.
21471 (json_from_expanded_location): New decl.
21472 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
21473 (-fdiagnostics-show-path-depths): New option.
21474 (-fdiagnostics-color): Add "path" to description of default
21475 GCC_COLORS; describe it.
21476 (-fdiagnostics-format=json): Document how diagnostic paths are
21477 represented in the JSON output format.
21478 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
21479 Add optional params "restrict_to_current_line_spans" and "label".
21480 * opts.c (common_handle_option): Handle
21481 OPT_fdiagnostics_path_format_ and
21482 OPT_fdiagnostics_show_path_depths.
21483 * pretty-print.c: Include "diagnostic-event-id.h".
21484 (pp_format): Implement "%@" format code for printing
21485 diagnostic_event_id_t *.
21486 (selftest::test_pp_format): Add tests for "%@".
21487 * selftest-run-tests.c (selftest::run_tests): Call
21488 selftest::tree_diagnostic_path_cc_tests.
21489 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
21490 * toplev.c (general_init): Initialize global_dc->path_format and
21491 global_dc->show_path_depths.
21492 * tree-diagnostic-path.cc: New file.
21493 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
21494 non-static. Drop "diagnostic" param in favor of storing the
21495 original value of "where" and re-using it.
21496 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
21497 maybe_unwind_expanded_macro_loc.
21498 (tree_diagnostics_defaults): Initialize context->print_path and
21499 context->make_json_for_path.
21500 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
21502 (default_tree_make_json_for_path): New decl.
21503 (maybe_unwind_expanded_macro_loc): New decl.
21505 2020-01-10 Jakub Jelinek <jakub@redhat.com>
21507 PR tree-optimization/93210
21508 * fold-const.h (native_encode_initializer,
21509 can_native_interpret_type_p): Declare.
21510 * fold-const.c (native_encode_string): Fix up handling with off != -1,
21512 (native_encode_initializer): New function, moved from dwarf2out.c.
21513 Adjust to native_encode_expr compatible arguments, including dry-run
21514 and partial extraction modes. Don't handle STRING_CST.
21515 (can_native_interpret_type_p): No longer static.
21516 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
21517 offset / BITS_PER_UNIT fits into int and don't call it if
21518 can_native_interpret_type_p fails. If suboff is NULL and for
21519 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
21520 native_encode_initializer.
21521 (fold_const_aggregate_ref_1): Formatting fix.
21522 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
21523 (tree_add_const_value_attribute): Adjust caller.
21525 PR tree-optimization/90838
21526 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
21527 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
21528 CTZ_DEFINED_VALUE_AT_ZERO.
21530 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
21532 PR inline-asm/93027
21533 * lra-constraints.c (match_reload): Permit input operands have the
21534 same mode as output while other input operands have a different
21537 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
21539 PR tree-optimization/90838
21540 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
21541 (check_ctz_string): Likewise.
21542 (optimize_count_trailing_zeroes): Likewise.
21543 (simplify_count_trailing_zeroes): Likewise.
21544 (pass_forwprop::execute): Try ctz simplification.
21545 * match.pd: Add matching for ctz idioms.
21547 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21549 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
21551 (aarch64_invalid_unary_op): New function for target hook.
21552 (aarch64_invalid_binary_op): New function for target hook.
21554 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21556 * config.gcc: Add arm_bf16.h.
21557 * config/aarch64/aarch64-builtins.c
21558 (aarch64_simd_builtin_std_type): Add BFmode.
21559 (aarch64_init_simd_builtin_types): Define element types for vector
21561 (aarch64_init_bf16_types): New function.
21562 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
21563 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
21565 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
21566 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
21568 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
21569 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
21570 * config/aarch64/aarch64.c
21571 (aarch64_classify_vector_mode): Add support for BF types.
21572 (aarch64_gimplify_va_arg_expr): Add support for BF types.
21573 (aarch64_vq_mode): Add support for BF types.
21574 (aarch64_simd_container_mode): Add support for BF types.
21575 (aarch64_mangle_type): Add support for BF scalar type.
21576 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
21577 * config/aarch64/arm_bf16.h: New file.
21578 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
21579 * config/aarch64/iterators.md: Add BF types to mode attributes.
21580 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
21582 2020-01-10 Jason Merrill <jason@redhat.com>
21584 PR c++/93173 - incorrect tree sharing.
21585 * gimplify.c (copy_if_shared): No longer static.
21586 * gimplify.h: Declare it.
21588 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
21590 * doc/invoke.texi (-msve-vector-bits=): Document that
21591 -msve-vector-bits=128 now generates VL-specific code for
21592 little-endian targets.
21593 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
21594 build_vector_type_for_mode to construct the data vector types.
21595 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
21596 VL-specific code for -msve-vector-bits=128 on little-endian targets.
21597 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
21598 for 128-bit vectors.
21600 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
21602 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
21605 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
21607 * config/aarch64/aarch64-builtins.c
21608 (aarch64_builtin_vectorized_function): Check for specific vector modes,
21609 rather than checking the number of elements and the element mode.
21611 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
21613 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
21614 get_related_vectype_for_scalar_type rather than build_vector_type
21615 to create the index type for a conditional reduction.
21617 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
21619 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
21620 for any type of gather or scatter, including strided accesses.
21622 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
21624 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
21627 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
21629 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
21630 get_dr_vinfo_offset
21631 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
21632 parameter and its use to reset DR_OFFSET's.
21633 (vect_transform_loop): Remove orig_drs_init argument.
21634 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
21635 member of dr_vec_info rather than the offset of the associated
21636 data_reference's innermost_loop_behavior.
21637 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
21638 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
21639 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
21640 get_dr_vinfo_offset.
21641 (vectorizable_store): Likewise.
21642 (vectorizable_load): Likewise.
21644 2020-01-10 Richard Biener <rguenther@suse.de>
21646 * gimple-ssa-store-merging
21647 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
21649 2020-01-10 Martin Liska <mliska@suse.cz>
21652 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
21653 encapsulation that was there before r280040.
21655 2020-01-10 Richard Biener <rguenther@suse.de>
21657 PR middle-end/93199
21658 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
21659 sequences to avoid walking them again for secondary opportunities.
21660 (pass_lower_eh_dispatch::execute): Instead actually insert
21663 2020-01-10 Richard Biener <rguenther@suse.de>
21665 PR middle-end/93199
21666 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
21667 (cleanup_all_empty_eh): Walk landing pads in reverse order to
21668 avoid quadraticness.
21670 2020-01-10 Martin Jambor <mjambor@suse.cz>
21672 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
21673 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
21674 to get param_ipa_sra_max_replacements.
21675 (param_splitting_across_edge): Pass the caller to
21676 pull_accesses_from_callee.
21678 2020-01-10 Martin Jambor <mjambor@suse.cz>
21680 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
21681 * ipa-cp.c (max_new_size): Removed.
21682 (orig_overall_size): New variable.
21683 (get_max_overall_size): New function.
21684 (estimate_local_effects): Use it. Adjust dump.
21685 (decide_about_value): Likewise.
21686 (ipcp_propagate_stage): Do not calculate max_new_size, just store
21687 orig_overall_size. Adjust dump.
21688 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
21690 2020-01-10 Martin Jambor <mjambor@suse.cz>
21692 * params.opt (param_ipa_max_agg_items): Mark as Optimization
21693 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
21694 instead of param_ipa_max_agg_items.
21695 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
21696 optimization info for the callee.
21698 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
21700 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
21701 markers if debug_inline_points is false.
21703 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21705 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
21707 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
21708 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
21709 aarch64-sve-builtins-sve2.h.
21710 (aarch64-sve-builtins-sve2.o): New rule.
21711 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
21712 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
21713 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
21714 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
21715 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
21716 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
21718 * config/aarch64/aarch64-sve.md: Update comments with SVE2
21719 instructions that are handled here.
21720 (@cond_asrd<mode>): Generalize to...
21721 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
21722 (*cond_asrd<mode>_2): Generalize to...
21723 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
21724 (*cond_asrd<mode>_z): Generalize to...
21725 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
21726 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
21727 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
21728 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
21729 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
21731 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
21732 (@aarch64_scatter_stnt<mode>): Likewise.
21733 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
21734 (@aarch64_mul_lane_<mode>): Likewise.
21735 (@aarch64_sve_suqadd<mode>_const): Likewise.
21736 (*<sur>h<addsub><mode>): Generalize to...
21737 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
21739 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
21740 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
21741 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
21742 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
21743 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
21744 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
21745 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
21746 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
21747 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
21748 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
21749 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
21750 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
21751 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
21752 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
21753 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
21754 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
21755 (@aarch64_sve2_xar<mode>): Likewise.
21756 (@aarch64_sve2_bcax<mode>): Likewise.
21757 (*aarch64_sve2_eor3<mode>): Rename to...
21758 (@aarch64_sve2_eor3<mode>): ...this.
21759 (@aarch64_sve2_bsl<mode>): New expander.
21760 (@aarch64_sve2_nbsl<mode>): Likewise.
21761 (@aarch64_sve2_bsl1n<mode>): Likewise.
21762 (@aarch64_sve2_bsl2n<mode>): Likewise.
21763 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
21764 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
21765 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
21766 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
21767 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
21768 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
21769 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
21770 (<su>mull<bt><Vwide>): Generalize to...
21771 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
21773 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
21774 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
21775 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
21776 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21777 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
21778 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21779 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
21780 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21781 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
21782 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21783 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
21784 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
21785 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
21786 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
21787 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
21788 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
21789 (<SHRNB:r>shrnb<mode>): Generalize to...
21790 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
21792 (<SHRNT:r>shrnt<mode>): Generalize to...
21793 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
21795 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
21796 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
21797 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
21798 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
21799 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
21800 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
21801 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
21802 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
21803 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
21804 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
21805 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
21806 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
21807 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
21808 (@aarch64_sve2_cvtnt<mode>): Likewise.
21809 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
21810 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
21811 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
21812 (@aarch64_sve2_cvtxnt<mode>): Likewise.
21813 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
21814 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
21815 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
21816 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
21817 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
21818 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
21819 (@aarch64_sve2_pmul<mode>): Likewise.
21820 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
21821 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
21822 (@aarch64_sve2_tbl2<mode>): Likewise.
21823 (@aarch64_sve2_tbx<mode>): Likewise.
21824 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
21825 (@aarch64_sve2_histcnt<mode>): Likewise.
21826 (@aarch64_sve2_histseg<mode>): Likewise.
21827 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
21828 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
21829 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
21830 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
21831 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
21832 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
21833 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
21834 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
21835 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
21836 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
21837 (SVE2_PMULL_PAIR_I): New mode iterators.
21838 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
21839 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
21840 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
21841 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
21842 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
21843 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
21844 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
21845 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
21846 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
21847 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
21848 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
21849 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
21850 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
21851 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
21852 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
21853 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
21854 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
21855 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
21856 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
21857 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
21858 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
21859 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
21860 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
21861 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
21862 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
21863 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
21864 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
21865 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
21866 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
21867 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
21868 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
21870 (VNARROW, Ventype): New mode attributes.
21871 (Vewtype): Handle VNx2DI. Fix typo in comment.
21872 (VDOUBLE): New mode attribute.
21873 (sve_lane_con): Handle VNx8HI.
21874 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
21875 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
21876 (sve_int_op, sve_int_op_rev): Handle the above codes.
21877 (sve_pred_int_rhs2_operand): Likewise.
21878 (MULLBT, SHRNB, SHRNT): Delete.
21879 (SVE_INT_SHIFT_IMM): New int iterator.
21880 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
21881 and UNSPEC_WHILEHS for TARGET_SVE2.
21882 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
21883 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
21884 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
21885 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
21886 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
21887 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
21888 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
21889 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
21890 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
21891 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
21892 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
21893 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
21894 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
21895 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
21896 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
21897 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
21898 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
21899 (optab): Handle the new unspecs.
21900 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
21902 (lr): Handle the new unspecs.
21904 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
21905 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
21906 (sve_int_qsub_op): New int attributes.
21907 (sve_fp_op, rot): Handle the new unspecs.
21908 * config/aarch64/aarch64-sve-builtins.h
21909 (function_resolver::require_matching_pointer_type): Declare.
21910 (function_resolver::resolve_unary): Add an optional boolean argument.
21911 (function_resolver::finish_opt_n_resolution): Add an optional
21912 type_suffix_index argument.
21913 (gimple_folder::redirect_call): Declare.
21914 (gimple_expander::prepare_gather_address_operands): Add an optional
21916 * config/aarch64/aarch64-sve-builtins.cc: Include
21917 aarch64-sve-builtins-sve2.h.
21918 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
21919 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
21920 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
21921 (TYPES_hsd_integer): Use TYPES_hsd_signed.
21922 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
21923 (TYPES_s_unsigned): Likewise.
21924 (TYPES_s_integer): Use TYPES_s_unsigned.
21925 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
21926 (TYPES_sd_integer): Use them.
21927 (TYPES_d_unsigned): New macro.
21928 (TYPES_d_integer): Use it.
21929 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
21930 (TYPES_cvt_narrow): Likewise.
21931 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
21932 (preds_mx): New variable.
21933 (function_builder::add_overloaded_function): Allow the new feature
21934 set to be more restrictive than the original one.
21935 (function_resolver::infer_pointer_type): Remove qualifiers from
21936 the pointer type before printing it.
21937 (function_resolver::require_matching_pointer_type): New function.
21938 (function_resolver::resolve_sv_displacement): Handle functions
21939 that don't support 32-bit vector indices or svint32_t vector offsets.
21940 (function_resolver::finish_opt_n_resolution): Take the inferred type
21941 as a separate argument.
21942 (function_resolver::resolve_unary): Optionally treat all forms in
21943 the same way as normal merging functions.
21944 (gimple_folder::redirect_call): New function.
21945 (function_expander::prepare_gather_address_operands): Add an argument
21946 that says whether scaled forms are available. If they aren't,
21947 handle scaling of vector indices and don't add the extension and
21949 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
21950 fall back to using cond_* instead.
21951 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
21952 Split out the member variables into...
21953 (rtx_code_function_base): ...this new base class.
21954 (rtx_code_function_rotated): Inherit rtx_code_function_base.
21955 (unspec_based_function): Split out the member variables into...
21956 (unspec_based_function_base): ...this new base class.
21957 (unspec_based_function_rotated): Inherit unspec_based_function_base.
21958 (unspec_based_function_exact_insn): New class.
21959 (unspec_based_add_function, unspec_based_add_lane_function)
21960 (unspec_based_lane_function, unspec_based_pred_function)
21961 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
21962 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
21963 (unspec_based_sub_function, unspec_based_sub_lane_function): New
21965 (unspec_based_fused_function): New class.
21966 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
21967 (unspec_based_fused_lane_function): New class.
21968 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
21970 (CODE_FOR_MODE1): New macro.
21971 (fixed_insn_function): New class.
21972 (while_comparison): Likewise.
21973 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
21974 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
21975 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
21976 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
21977 (load_gather_sv_restricted, shift_left_imm_long): Declare.
21978 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
21979 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
21980 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
21981 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
21982 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
21983 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
21984 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
21985 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
21986 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
21987 Also add an initial argument for unary_convert_narrowt, regardless
21988 of the predication type.
21989 (build_32_64): Allow loads and stores to specify MODE_none.
21990 (build_sv_index64, build_sv_uint_offset): New functions.
21991 (long_type_suffix): New function.
21992 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
21993 (binary_imm_long_base, load_gather_sv_base): Likewise.
21994 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
21995 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
21996 (unary_narrowb_base, unary_narrowt_base): Likewise.
21997 (binary_long_lane_def, binary_long_lane): New shape.
21998 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
21999 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
22000 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
22001 (binary_to_uint_def, binary_to_uint): Likewise.
22002 (binary_wide_def, binary_wide): Likewise.
22003 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
22004 (compare_def, compare): Likewise.
22005 (compare_ptr_def, compare_ptr): Likewise.
22006 (load_ext_gather_index_restricted_def,
22007 load_ext_gather_index_restricted): Likewise.
22008 (load_ext_gather_offset_restricted_def,
22009 load_ext_gather_offset_restricted): Likewise.
22010 (load_gather_sv_def): Inherit from load_gather_sv_base.
22011 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
22012 (shift_left_imm_def, shift_left_imm): Likewise.
22013 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
22014 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
22015 (store_scatter_index_restricted_def,
22016 store_scatter_index_restricted): Likewise.
22017 (store_scatter_offset_restricted_def,
22018 store_scatter_offset_restricted): Likewise.
22019 (tbl_tuple_def, tbl_tuple): Likewise.
22020 (ternary_long_lane_def, ternary_long_lane): Likewise.
22021 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
22022 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
22023 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
22024 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
22025 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
22026 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
22027 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
22028 (ternary_uint_def, ternary_uint): Likewise.
22029 (unary_convert): Fix typo in comment.
22030 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
22031 (unary_long_def, unary_long): Likewise.
22032 (unary_narrowb_def, unary_narrowb): Likewise.
22033 (unary_narrowt_def, unary_narrowt): Likewise.
22034 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
22035 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
22036 (unary_to_int_def, unary_to_int): Likewise.
22037 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
22038 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
22039 (svasrd_impl): Delete.
22040 (svcadd_impl::expand): Handle integer operations too.
22041 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
22042 new functions to derive the unspec numbers.
22043 (svmla_svmls_lane_impl): Replace with...
22044 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
22045 integer operations too.
22046 (svwhile_impl): Rename to...
22047 (svwhilelx_impl): ...this and inherit from while_comparison.
22048 (svasrd): Use unspec_based_function.
22049 (svmla_lane): Use svmla_lane_impl.
22050 (svmls_lane): Use svmls_lane_impl.
22051 (svrecpe, svrsqrte): Handle unsigned integer operations too.
22052 (svwhilele, svwhilelt): Use svwhilelx_impl.
22053 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
22054 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
22055 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
22056 * config/aarch64/aarch64-sve-builtins.def: Include
22057 aarch64-sve-builtins-sve2.def.
22059 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22061 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
22062 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
22063 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
22064 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
22065 immediates as well as vector ones.
22066 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
22067 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
22068 (aarch64_sve_qsub_immediate): Update calls accordingly.
22070 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22072 * config/aarch64/aarch64-sve2.md: Add banner comments.
22073 (<su>mulh<r>s<mode>3): Move further up file.
22074 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
22075 (*aarch64_sve2_sra<mode>): Move further down file.
22076 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
22078 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22080 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
22081 and UNSPEC_WHILEWR.
22082 (while_optab_cmp): Handle them.
22083 * config/aarch64/aarch64-sve.md
22084 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
22085 and add a "@" marker.
22086 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
22087 instead of gen_aarch64_sve2_while_ptest.
22088 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
22090 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22092 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
22093 (UNSPEC_WHILELE): ...this.
22094 (UNSPEC_WHILE_LO): Rename to...
22095 (UNSPEC_WHILELO): ...this.
22096 (UNSPEC_WHILE_LS): Rename to...
22097 (UNSPEC_WHILELS): ...this.
22098 (UNSPEC_WHILE_LT): Rename to...
22099 (UNSPEC_WHILELT): ...this.
22100 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
22101 (cmp_op, while_optab_cmp): Likewise.
22102 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
22103 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
22104 (svwhilelt): Likewise.
22106 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22108 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
22109 (unary_to_uint): Define.
22110 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
22111 (unary_count): Rename to...
22112 (unary_to_uint_def, unary_to_uint): ...this.
22113 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
22115 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22117 * config/aarch64/aarch64-sve-builtins-functions.h
22118 (code_for_mode_function): New class.
22119 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
22120 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
22121 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
22122 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
22123 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
22125 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22127 * config/aarch64/iterators.md (addsub): New code attribute.
22128 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
22130 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
22131 in the asm string and attributes. Fix indentation.
22132 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
22134 (@aarch64_sve_<optab><mode>): ...this.
22135 * config/aarch64/aarch64-sve-builtins.h
22136 (function_expander::expand_signed_unpred_op): Delete.
22137 * config/aarch64/aarch64-sve-builtins.cc
22138 (function_expander::expand_signed_unpred_op): Likewise.
22139 (function_expander::map_to_rtx_codes): If the optab isn't defined,
22140 try using code_for_aarch64_sve instead.
22141 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
22142 (svqsub_impl): Likewise.
22143 (svqadd, svqsub): Use rtx_code_function instead.
22145 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22147 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
22148 (HADDSUB, sur, addsub): Remove them.
22150 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22152 * tree-nrv.c (pass_return_slot::execute): Handle all internal
22153 functions the same way, rather than singling out those that
22154 aren't mapped directly to optabs.
22156 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22158 * target.def (compatible_vector_types_p): New target hook.
22159 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
22160 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
22161 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
22162 * doc/tm.texi: Regenerate.
22163 * gimple-expr.c: Include target.h.
22164 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
22165 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
22167 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
22168 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
22169 Use the original predicate if it already has a suitable type.
22171 2020-01-09 Martin Jambor <mjambor@suse.cz>
22173 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
22174 resolve_speculation and redirect_call_stmt_to_callee static. Change
22175 return type of set_call_stmt to cgraph_edge *.
22176 * auto-profile.c (afdo_indirect_call): Adjust call to
22177 redirect_call_stmt_to_callee.
22178 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
22179 make the this pointer explicit, adjust self-recursive calls and the
22180 call top make_direct. Return the resulting edge.
22181 (cgraph_edge::remove): Make this pointer explicit.
22182 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
22183 (cgraph_edge::make_direct): Likewise, adjust call to
22184 resolve_speculation.
22185 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
22186 call to set_call_stmt.
22187 (cgraph_update_edges_for_call_stmt_node): Update call to
22188 set_call_stmt and remove.
22189 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
22190 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
22191 (cgraph_node::create_edge_including_clones): Moved "first" definition
22192 of edge to the block where it was used. Adjusted calls to
22194 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
22195 cgraph_edge::remove.
22196 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
22197 make_direct and redirect_call_stmt_to_callee.
22198 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
22199 resolve_speculation and make_direct.
22200 * ipa-inline-transform.c (inline_transform): Adjust call to
22201 redirect_call_stmt_to_callee.
22202 (check_speculations_1):: Adjust call to resolve_speculation.
22203 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
22204 resolve-speculation.
22205 (inline_small_functions): Adjust call to resolve_speculation.
22206 (ipa_inline): Likewise.
22207 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
22209 * ipa-visibility.c (function_and_variable_visibility): Make iteration
22210 safe with regards to edge removal, adjust calls to
22211 redirect_call_stmt_to_callee.
22212 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
22213 and redirect_call_stmt_to_callee.
22214 * multiple_target.c (create_dispatcher_calls): Adjust call to
22215 redirect_call_stmt_to_callee
22216 (redirect_to_specific_clone): Likewise.
22217 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
22218 Adjust calls to cgraph_edge::remove.
22219 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
22220 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
22221 (expand_call_inline): Adjust call to cgraph_edge::remove.
22223 2020-01-09 Martin Liska <mliska@suse.cz>
22225 * params.opt: Set Optimization for
22226 param_max_speculative_devirt_maydefs.
22228 2020-01-09 Martin Sebor <msebor@redhat.com>
22230 PR middle-end/93200
22232 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
22234 2020-01-09 Martin Liska <mliska@suse.cz>
22236 * auto-profile.c (auto_profile): Use opt_for_fn
22238 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
22239 (propagate_vals_across_arith_jfunc): Likewise.
22240 (hint_time_bonus): Likewise.
22241 (incorporate_penalties): Likewise.
22242 (good_cloning_opportunity_p): Likewise.
22243 (perform_estimation_of_a_value): Likewise.
22244 (estimate_local_effects): Likewise.
22245 (ipcp_propagate_stage): Likewise.
22246 * ipa-fnsummary.c (decompose_param_expr): Likewise.
22247 (set_switch_stmt_execution_predicate): Likewise.
22248 (analyze_function_body): Likewise.
22249 * ipa-inline-analysis.c (offline_size): Likewise.
22250 * ipa-inline.c (early_inliner): Likewise.
22251 * ipa-prop.c (ipa_analyze_node): Likewise.
22252 (ipcp_transform_function): Likewise.
22253 * ipa-sra.c (process_scan_results): Likewise.
22254 (ipa_sra_summarize_function): Likewise.
22255 * params.opt: Rename ipcp-unit-growth to
22256 ipa-cp-unit-growth. Add Optimization for various
22257 IPA-related parameters.
22259 2020-01-09 Richard Biener <rguenther@suse.de>
22261 PR middle-end/93054
22262 * gimplify.c (gimplify_expr): Deal with NOP definitions.
22264 2020-01-09 Richard Biener <rguenther@suse.de>
22266 PR tree-optimization/93040
22267 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
22269 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
22271 * common/config/avr/avr-common.c (avr_option_optimization_table)
22272 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
22274 2020-01-09 Martin Liska <mliska@suse.cz>
22276 * cgraphclones.c (symbol_table::materialize_all_clones):
22277 Use cgraph_node::dump_name.
22279 2020-01-09 Jakub Jelinek <jakub@redhat.com>
22281 PR inline-asm/93202
22282 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
22283 output_operand_lossage instead of gcc_unreachable.
22284 * doc/md.texi (riscv f constraint): Fix typo.
22287 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
22288 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
22289 CONST_SCALAR_INT_P instead of CONST_INT_P.
22290 (*subv<mode>4_1): Rename to ...
22291 (subv<mode>4_1): ... this.
22292 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
22293 define_insn_and_split patterns.
22294 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
22297 2020-01-08 David Malcolm <dmalcolm@redhat.com>
22299 * vec.c (class selftest::count_dtor): New class.
22300 (selftest::test_auto_delete_vec): New test.
22301 (selftest::vec_c_tests): Call it.
22302 * vec.h (class auto_delete_vec): New class template.
22303 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
22305 2020-01-08 David Malcolm <dmalcolm@redhat.com>
22307 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
22309 2020-01-08 Jim Wilson <jimw@sifive.com>
22311 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
22312 use of TLS_MODEL_LOCAL_EXEC when not pic.
22314 2020-01-08 David Malcolm <dmalcolm@redhat.com>
22316 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
22319 2020-01-08 Jakub Jelinek <jakub@redhat.com>
22322 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
22323 *stack_protect_set_3 peephole2): Also check that the second
22324 insns source is general_operand.
22327 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
22328 predicate for output operand instead of register_operand.
22329 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
22330 memory destination and non-memory operands[2].
22332 2020-01-08 Martin Liska <mliska@suse.cz>
22334 * cgraph.c (cgraph_node::dump): Use ::dump_name or
22335 ::dump_asm_name instead of (::name or ::asm_name).
22336 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
22337 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
22338 (analyze_functions): Likewise.
22339 (expand_all_functions): Likewise.
22340 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
22341 (propagate_bits_across_jump_function): Likewise.
22342 (dump_profile_updates): Likewise.
22343 (ipcp_store_bits_results): Likewise.
22344 (ipcp_store_vr_results): Likewise.
22345 * ipa-devirt.c (dump_targets): Likewise.
22346 * ipa-fnsummary.c (analyze_function_body): Likewise.
22347 * ipa-hsa.c (check_warn_node_versionable): Likewise.
22348 (process_hsa_functions): Likewise.
22349 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
22350 (set_alias_uids): Likewise.
22351 * ipa-inline-transform.c (save_inline_function_body): Likewise.
22352 * ipa-inline.c (recursive_inlining): Likewise.
22353 (inline_to_all_callers_1): Likewise.
22354 (ipa_inline): Likewise.
22355 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
22356 (ipa_propagate_frequency): Likewise.
22357 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
22358 (remove_described_reference): Likewise.
22359 * ipa-pure-const.c (worse_state): Likewise.
22360 (check_retval_uses): Likewise.
22361 (analyze_function): Likewise.
22362 (propagate_pure_const): Likewise.
22363 (propagate_nothrow): Likewise.
22364 (dump_malloc_lattice): Likewise.
22365 (propagate_malloc): Likewise.
22366 (pass_local_pure_const::execute): Likewise.
22367 * ipa-visibility.c (optimize_weakref): Likewise.
22368 (function_and_variable_visibility): Likewise.
22369 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
22370 (ipa_discover_variable_flags): Likewise.
22371 * lto-streamer-out.c (output_function): Likewise.
22372 (output_constructor): Likewise.
22373 * tree-inline.c (copy_bb): Likewise.
22374 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
22375 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
22377 2020-01-08 Richard Biener <rguenther@suse.de>
22379 PR middle-end/93199
22380 * tree-eh.c (sink_clobbers): Update virtual operands for
22381 the first and last stmt only. Add a dry-run capability.
22382 (pass_lower_eh_dispatch::execute): Perform clobber sinking
22383 after CFG manipulations and in RPO order to catch all
22384 secondary opportunities reliably.
22386 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
22389 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
22391 2019-01-08 Richard Biener <rguenther@suse.de>
22393 PR middle-end/93199
22394 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
22395 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
22396 virtual operand, also updating SSA use.
22397 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
22398 Update stmt after resetting virtual operand.
22399 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
22400 * gimple-iterator.c (gsi_remove): When not removing the stmt
22401 permanently do not delink immediate uses or mark the stmt modified.
22403 2020-01-08 Martin Liska <mliska@suse.cz>
22405 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
22406 (ipa_call_context::estimate_size_and_time): Likewise.
22407 (inline_analyze_function): Likewise.
22409 2020-01-08 Martin Liska <mliska@suse.cz>
22411 * cgraph.c (cgraph_node::dump): Use systematically
22414 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
22416 Add -nodevicespecs option for avr.
22419 * config/avr/avr.opt (-nodevicespecs): New driver option.
22420 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
22421 "-specs=device-specs/..." if that option is not set.
22422 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
22424 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
22426 Implement 64-bit double functions for avr.
22429 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
22430 --with-double-comparison.
22431 * doc/install.texi: Document them.
22432 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
22433 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
22434 <WITH_DOUBLE_COMPARISON>: New built-in defines.
22435 * doc/invoke.texi (AVR Built-in Macros): Document them.
22436 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
22437 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
22438 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
22440 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
22443 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
22444 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
22445 when only building rm-profile multilibs.
22447 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
22450 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
22451 lattice for a value to check.
22452 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
22453 finite propagation in self-recursive scc.
22455 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
22457 * ipa-inline.c (caller_growth_limits): Restore the AND.
22459 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
22461 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
22462 (VEC_ALLREG_ALT): New iterator.
22463 (VEC_ALLREG_INT_MODE): New iterator.
22464 (VCMP_MODE): New iterator.
22465 (VCMP_MODE_INT): New iterator.
22466 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
22467 (vec_cmp<u>v64qidi): New define_expand.
22468 (vec_cmp<mode>di_exec): Use VCMP_MODE.
22469 (vec_cmpu<mode>di_exec): New define_expand.
22470 (vec_cmp<u>v64qidi_exec): New define_expand.
22471 (vec_cmp<mode>di_dup): Use VCMP_MODE.
22472 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
22473 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
22474 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
22475 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
22476 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
22477 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
22478 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
22479 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
22480 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
22482 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
22483 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
22485 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
22487 * config/gcn/constraints.md (DA): Update description and match.
22489 (Db): New constraint.
22490 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
22492 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
22493 Implement 'Db' mixed immediate type.
22494 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
22495 (addcv64si3_dup<exec_vcc>): Delete.
22496 (subcv64si3<exec_vcc>): Rework constraints.
22497 (addv64di3): Rework constraints.
22498 (addv64di3_exec): Rework constraints.
22499 (subv64di3): Rework constraints.
22500 (addv64di3_dup): Delete.
22501 (addv64di3_dup_exec): Delete.
22502 (addv64di3_zext): Rework constraints.
22503 (addv64di3_zext_exec): Rework constraints.
22504 (addv64di3_zext_dup): Rework constraints.
22505 (addv64di3_zext_dup_exec): Rework constraints.
22506 (addv64di3_zext_dup2): Rework constraints.
22507 (addv64di3_zext_dup2_exec): Rework constraints.
22508 (addv64di3_sext_dup2): Rework constraints.
22509 (addv64di3_sext_dup2_exec): Rework constraints.
22511 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
22513 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
22514 existing target checks.
22516 2020-01-07 Richard Biener <rguenther@suse.de>
22518 * doc/install.texi: Bump minimal supported MPC version.
22520 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
22522 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
22523 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
22524 * langhooks.c: Include stor-layout.h.
22525 (lhd_simulate_enum_decl): New function.
22526 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
22527 handle_arm_sve_h for the LTO frontend.
22528 (register_vector_type): Cope with null returns from pushdecl.
22530 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
22532 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
22533 (aarch64_sve::nvectors_if_data_type): Replace with...
22534 (aarch64_sve::builtin_type_p): ...this.
22535 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
22536 (find_vector_type): Delete.
22537 (add_sve_type_attribute): New function.
22538 (lookup_sve_type_attribute): Likewise.
22539 (register_builtin_types): Add an "SVE type" attribute to each type.
22540 (register_tuple_type): Likewise.
22541 (svbool_type_p, nvectors_if_data_type): Delete.
22542 (mangle_builtin_type): Use lookup_sve_type_attribute.
22543 (builtin_type_p): Likewise. Add an overload that returns the
22544 number of constituent vector and predicate registers.
22545 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
22546 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
22547 instead of aarch64_sve_argument_p.
22548 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
22549 (aarch64_pass_by_reference): Likewise.
22550 (aarch64_function_value_1): Likewise.
22551 (aarch64_return_in_memory): Likewise.
22552 (aarch64_layout_arg): Likewise.
22554 2020-01-07 Jakub Jelinek <jakub@redhat.com>
22556 PR tree-optimization/93156
22557 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
22558 least significant bit is always clear.
22560 PR tree-optimization/93118
22561 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
22562 simplifier with two intermediate conversions.
22564 2020-01-07 Martin Liska <mliska@suse.cz>
22566 * params.opt: Add Optimization for various parameters.
22568 2020-01-07 Martin Liska <mliska@suse.cz>
22571 * doc/extend.texi: Explain cloning for target_clone
22574 2020-01-07 Martin Liska <mliska@suse.cz>
22576 PR tree-optimization/92860
22577 * common.opt: Make in Optimization option
22578 as it is affected by -O0, which is an Optimization
22580 * tree-inline.c (tree_inlinable_function_p):
22581 Use opt_for_fn for warn_inline.
22582 (expand_call_inline): Likewise.
22584 2020-01-07 Martin Liska <mliska@suse.cz>
22586 PR tree-optimization/92860
22587 * common.opt: Make flag_ree as optimization
22590 2020-01-07 Martin Liska <mliska@suse.cz>
22592 PR optimization/92860
22593 * params.opt: Mark param_min_crossjump_insns with Optimization
22596 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
22598 * ipa-inline-analysis.c (estimate_growth): Fix typo.
22599 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
22601 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
22603 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
22604 helper function to return the valid addressing formats for a given
22605 hard register and mode.
22606 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
22608 * config/rs6000/constraints.md (Q constraint): Update
22610 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
22613 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
22614 Use 'Q' for doing vector extract from memory.
22615 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
22617 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
22618 doing vector extract from memory.
22619 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
22620 extract from memory.
22622 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
22623 for the offset being 34-bits when -mcpu=future is used.
22625 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
22627 * config/pa/pa.md: Revert change to use ordered_comparison_operator
22628 instead of cmpib_comparison_operator in cmpib patterns.
22629 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
22630 of cmpib_comparison_operator. Revise comment.
22632 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22634 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
22635 in an IFN_DIV_POW2 node to be equal.
22637 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22639 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
22640 (vect_check_scalar_mask): ...this.
22641 (vectorizable_store, vectorizable_load): Update call accordingly.
22642 (vectorizable_call): Use vect_check_scalar_mask to check the mask
22643 argument in calls to conditional internal functions.
22645 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
22647 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
22648 '0' matching inputs.
22649 (subv64di3_exec): Likewise.
22651 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
22653 * config/mips/mips.c (vr4130_align_insns): Fix typo.
22654 * doc/md.texi (movstr): Likewise.
22656 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
22658 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
22661 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22663 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
22665 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
22666 to a temporary file and use move-if-change to update the real
22667 file where necessary.
22669 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22671 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
22672 rather than Upa for CPY /M.
22674 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
22676 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
22679 2020-01-06 Martin Liska <mliska@suse.cz>
22681 PR tree-optimization/92860
22682 * params.opt: Mark param_max_combine_insns with Optimization
22685 2020-01-05 Jakub Jelinek <jakub@redhat.com>
22688 * config/i386/i386.md (SWIDWI): New mode iterator.
22689 (DWI, dwi): Add TImode variants.
22690 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
22691 <general_hilo_operand> instead of <general_operand>. Use
22692 CONST_SCALAR_INT_P instead of CONST_INT_P.
22693 (*addv<mode>4_1): Rename to ...
22694 (addv<mode>4_1): ... this.
22695 (QWI): New mode attribute.
22696 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
22697 define_insn_and_split patterns.
22698 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
22700 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
22701 <general_hilo_operand> instead of <general_operand>.
22702 (*addcarry<mode>_1): New define_insn.
22703 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
22705 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
22707 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
22708 Use "call" instead of "set".
22710 2020-01-03 Martin Jambor <mjambor@suse.cz>
22713 * ipa-cp.c (print_all_lattices): Skip functions without info.
22715 2020-01-03 Jakub Jelinek <jakub@redhat.com>
22718 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
22719 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
22720 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
22721 for 'e' simd clones.
22724 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
22726 (mprefer-vector-width=): Add Save.
22727 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
22728 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
22729 (ix86_debug_options, ix86_function_specific_print): Adjust
22730 ix86_target_string callers.
22731 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
22732 (ix86_valid_target_attribute_tree): Likewise.
22733 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
22734 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
22735 ix86_target_string caller.
22738 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
22739 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
22740 instead of gen_int_shift_amount + convert_modes.
22742 PR rtl-optimization/93088
22743 * loop-iv.c (find_single_def_src): Punt after looking through
22744 128 reg copies for regs with single definitions. Move definitions
22747 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
22749 * config/arm/arm-c.c (arm_cpu_builtins): Define
22750 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
22751 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
22752 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
22753 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
22754 * config/arm/arm-tables.opt: Regenerated.
22755 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
22756 arm_arch_i8mm and arm_arch_bf16 when enabled.
22757 * config/arm/arm.h (TARGET_I8MM): New macro.
22758 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
22759 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
22760 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
22761 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
22762 (v8_6_a_simd_variants): New.
22763 (v8_*_a_simd_variants): Add i8mm and bf16.
22764 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
22766 2020-01-02 Jakub Jelinek <jakub@redhat.com>
22769 * predict.c (compute_function_frequency): Don't call
22770 warn_function_cold on functions that already have cold attribute.
22772 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
22775 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
22776 COMDAT group function labels in .data.rel.ro.local section.
22777 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
22780 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
22781 comparison_operator in B and S integer comparisons. Likewise, use
22782 ordered_comparison_operator instead of cmpib_comparison_operator in
22784 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
22786 2020-01-01 Jakub Jelinek <jakub@redhat.com>
22788 Update copyright years.
22790 * gcc.c (process_command): Update copyright notice dates.
22791 * gcov-dump.c (print_version): Ditto.
22792 * gcov.c (print_version): Ditto.
22793 * gcov-tool.c (print_version): Ditto.
22794 * gengtype.c (create_file): Ditto.
22795 * doc/cpp.texi: Bump @copying's copyright year.
22796 * doc/cppinternals.texi: Ditto.
22797 * doc/gcc.texi: Ditto.
22798 * doc/gccint.texi: Ditto.
22799 * doc/gcov.texi: Ditto.
22800 * doc/install.texi: Ditto.
22801 * doc/invoke.texi: Ditto.
22803 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
22805 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
22808 2020-01-01 Jakub Jelinek <jakub@redhat.com>
22810 PR tree-optimization/93098
22811 * match.pd (popcount): For shift amounts, use integer_onep
22812 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
22813 tests. Make sure that precision is power of two larger than or equal
22814 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
22815 instead of ULL suffixed constants. Formatting fixes.
22817 Copyright (C) 2020 Free Software Foundation, Inc.
22819 Copying and distribution of this file, with or without modification,
22820 are permitted in any medium without royalty provided the copyright
22821 notice and this notice are preserved.