1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995,
3 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This is the loop optimization pass of the compiler.
24 It finds invariant computations within loops and moves them
25 to the beginning of the loop. Then it identifies basic and
26 general induction variables.
28 Basic induction variables (BIVs) are a pseudo registers which are set within
29 a loop only by incrementing or decrementing its value. General induction
30 variables (GIVs) are pseudo registers with a value which is a linear function
31 of a basic induction variable. BIVs are recognized by `basic_induction_var';
32 GIVs by `general_induction_var'.
34 Once induction variables are identified, strength reduction is applied to the
35 general induction variables, and induction variable elimination is applied to
36 the basic induction variables.
38 It also finds cases where
39 a register is set within the loop by zero-extending a narrower value
40 and changes these to zero the entire register once before the loop
41 and merely copy the low part within the loop.
43 Most of the complexity is in heuristics to decide when it is worth
44 while to do these things. */
48 #include "coretypes.h"
54 #include "hard-reg-set.h"
55 #include "basic-block.h"
56 #include "insn-config.h"
65 #include "insn-flags.h"
70 #include "tree-pass.h"
72 /* Get the loop info pointer of a loop. */
73 #define LOOP_INFO(LOOP) ((struct loop_info *) (LOOP)->aux)
75 /* Get a pointer to the loop movables structure. */
76 #define LOOP_MOVABLES(LOOP) (&LOOP_INFO (LOOP)->movables)
78 /* Get a pointer to the loop registers structure. */
79 #define LOOP_REGS(LOOP) (&LOOP_INFO (LOOP)->regs)
81 /* Get a pointer to the loop induction variables structure. */
82 #define LOOP_IVS(LOOP) (&LOOP_INFO (LOOP)->ivs)
84 /* Get the luid of an insn. Catch the error of trying to reference the LUID
85 of an insn added during loop, since these don't have LUIDs. */
87 #define INSN_LUID(INSN) \
88 (gcc_assert (INSN_UID (INSN) < max_uid_for_loop), uid_luid[INSN_UID (INSN)])
90 #define REGNO_FIRST_LUID(REGNO) \
91 (REGNO_FIRST_UID (REGNO) < max_uid_for_loop \
92 ? uid_luid[REGNO_FIRST_UID (REGNO)] \
94 #define REGNO_LAST_LUID(REGNO) \
95 (REGNO_LAST_UID (REGNO) < max_uid_for_loop \
96 ? uid_luid[REGNO_LAST_UID (REGNO)] \
99 /* A "basic induction variable" or biv is a pseudo reg that is set
100 (within this loop) only by incrementing or decrementing it. */
101 /* A "general induction variable" or giv is a pseudo reg whose
102 value is a linear function of a biv. */
104 /* Bivs are recognized by `basic_induction_var';
105 Givs by `general_induction_var'. */
107 /* An enum for the two different types of givs, those that are used
108 as memory addresses and those that are calculated into registers. */
116 /* A `struct induction' is created for every instruction that sets
117 an induction variable (either a biv or a giv). */
121 rtx insn
; /* The insn that sets a biv or giv */
122 rtx new_reg
; /* New register, containing strength reduced
123 version of this giv. */
124 rtx src_reg
; /* Biv from which this giv is computed.
125 (If this is a biv, then this is the biv.) */
126 enum g_types giv_type
; /* Indicate whether DEST_ADDR or DEST_REG */
127 rtx dest_reg
; /* Destination register for insn: this is the
128 register which was the biv or giv.
129 For a biv, this equals src_reg.
130 For a DEST_ADDR type giv, this is 0. */
131 rtx
*location
; /* Place in the insn where this giv occurs.
132 If GIV_TYPE is DEST_REG, this is 0. */
133 /* For a biv, this is the place where add_val
135 enum machine_mode mode
; /* The mode of this biv or giv */
136 rtx mem
; /* For DEST_ADDR, the memory object. */
137 rtx mult_val
; /* Multiplicative factor for src_reg. */
138 rtx add_val
; /* Additive constant for that product. */
139 int benefit
; /* Gain from eliminating this insn. */
140 rtx final_value
; /* If the giv is used outside the loop, and its
141 final value could be calculated, it is put
142 here, and the giv is made replaceable. Set
143 the giv to this value before the loop. */
144 unsigned combined_with
; /* The number of givs this giv has been
145 combined with. If nonzero, this giv
146 cannot combine with any other giv. */
147 unsigned replaceable
: 1; /* 1 if we can substitute the strength-reduced
148 variable for the original variable.
149 0 means they must be kept separate and the
150 new one must be copied into the old pseudo
151 reg each time the old one is set. */
152 unsigned not_replaceable
: 1; /* Used to prevent duplicating work. This is
153 1 if we know that the giv definitely can
154 not be made replaceable, in which case we
155 don't bother checking the variable again
156 even if further info is available.
157 Both this and the above can be zero. */
158 unsigned ignore
: 1; /* 1 prohibits further processing of giv */
159 unsigned always_computable
: 1;/* 1 if this value is computable every
161 unsigned always_executed
: 1; /* 1 if this set occurs each iteration. */
162 unsigned maybe_multiple
: 1; /* Only used for a biv and 1 if this biv
163 update may be done multiple times per
165 unsigned cant_derive
: 1; /* For giv's, 1 if this giv cannot derive
166 another giv. This occurs in many cases
167 where a giv's lifetime spans an update to
169 unsigned maybe_dead
: 1; /* 1 if this giv might be dead. In that case,
170 we won't use it to eliminate a biv, it
171 would probably lose. */
172 unsigned auto_inc_opt
: 1; /* 1 if this giv had its increment output next
173 to it to try to form an auto-inc address. */
175 unsigned no_const_addval
: 1; /* 1 if add_val does not contain a const. */
176 int lifetime
; /* Length of life of this giv */
177 rtx derive_adjustment
; /* If nonzero, is an adjustment to be
178 subtracted from add_val when this giv
179 derives another. This occurs when the
180 giv spans a biv update by incrementation. */
181 rtx ext_dependent
; /* If nonzero, is a sign or zero extension
182 if a biv on which this giv is dependent. */
183 struct induction
*next_iv
; /* For givs, links together all givs that are
184 based on the same biv. For bivs, links
185 together all biv entries that refer to the
186 same biv register. */
187 struct induction
*same
; /* For givs, if the giv has been combined with
188 another giv, this points to the base giv.
189 The base giv will have COMBINED_WITH nonzero.
190 For bivs, if the biv has the same LOCATION
191 than another biv, this points to the base
193 struct induction
*same_insn
; /* If there are multiple identical givs in
194 the same insn, then all but one have this
195 field set, and they all point to the giv
196 that doesn't have this field set. */
197 rtx last_use
; /* For a giv made from a biv increment, this is
198 a substitute for the lifetime information. */
202 /* A `struct iv_class' is created for each biv. */
206 unsigned int regno
; /* Pseudo reg which is the biv. */
207 int biv_count
; /* Number of insns setting this reg. */
208 struct induction
*biv
; /* List of all insns that set this reg. */
209 int giv_count
; /* Number of DEST_REG givs computed from this
210 biv. The resulting count is only used in
212 struct induction
*giv
; /* List of all insns that compute a giv
214 int total_benefit
; /* Sum of BENEFITs of all those givs. */
215 rtx initial_value
; /* Value of reg at loop start. */
216 rtx initial_test
; /* Test performed on BIV before loop. */
217 rtx final_value
; /* Value of reg at loop end, if known. */
218 struct iv_class
*next
; /* Links all class structures together. */
219 rtx init_insn
; /* insn which initializes biv, 0 if none. */
220 rtx init_set
; /* SET of INIT_INSN, if any. */
221 unsigned incremented
: 1; /* 1 if somewhere incremented/decremented */
222 unsigned eliminable
: 1; /* 1 if plausible candidate for
224 unsigned nonneg
: 1; /* 1 if we added a REG_NONNEG note for
226 unsigned reversed
: 1; /* 1 if we reversed the loop that this
228 unsigned all_reduced
: 1; /* 1 if all givs using this biv have
233 /* Definitions used by the basic induction variable discovery code. */
243 /* A `struct iv' is created for every register. */
250 struct iv_class
*class;
251 struct induction
*info
;
256 #define REG_IV_TYPE(ivs, n) ivs->regs[n].type
257 #define REG_IV_INFO(ivs, n) ivs->regs[n].iv.info
258 #define REG_IV_CLASS(ivs, n) ivs->regs[n].iv.class
263 /* Indexed by register number, contains pointer to `struct
264 iv' if register is an induction variable. */
267 /* Size of regs array. */
270 /* The head of a list which links together (via the next field)
271 every iv class for the current loop. */
272 struct iv_class
*list
;
276 typedef struct loop_mem_info
278 rtx mem
; /* The MEM itself. */
279 rtx reg
; /* Corresponding pseudo, if any. */
280 int optimize
; /* Nonzero if we can optimize access to this MEM. */
287 /* Number of times the reg is set during the loop being scanned.
288 During code motion, a negative value indicates a reg that has
289 been made a candidate; in particular -2 means that it is an
290 candidate that we know is equal to a constant and -1 means that
291 it is a candidate not known equal to a constant. After code
292 motion, regs moved have 0 (which is accurate now) while the
293 failed candidates have the original number of times set.
295 Therefore, at all times, == 0 indicates an invariant register;
296 < 0 a conditionally invariant one. */
299 /* Original value of set_in_loop; same except that this value
300 is not set negative for a reg whose sets have been made candidates
301 and not set to 0 for a reg that is moved. */
304 /* Contains the insn in which a register was used if it was used
305 exactly once; contains const0_rtx if it was used more than once. */
308 /* Nonzero indicates that the register cannot be moved or strength
310 char may_not_optimize
;
312 /* Nonzero means reg N has already been moved out of one loop.
313 This reduces the desire to move it out of another. */
320 int num
; /* Number of regs used in table. */
321 int size
; /* Size of table. */
322 struct loop_reg
*array
; /* Register usage info. array. */
323 int multiple_uses
; /* Nonzero if a reg has multiple uses. */
330 /* Head of movable chain. */
331 struct movable
*head
;
332 /* Last movable in chain. */
333 struct movable
*last
;
337 /* Information pertaining to a loop. */
341 /* Nonzero if there is a subroutine call in the current loop. */
343 /* Nonzero if there is a libcall in the current loop. */
345 /* Nonzero if there is a non constant call in the current loop. */
346 int has_nonconst_call
;
347 /* Nonzero if there is a prefetch instruction in the current loop. */
349 /* Nonzero if there is a volatile memory reference in the current
352 /* Nonzero if there is a tablejump in the current loop. */
354 /* Nonzero if there are ways to leave the loop other than falling
356 int has_multiple_exit_targets
;
357 /* Nonzero if there is an indirect jump in the current function. */
358 int has_indirect_jump
;
359 /* Register or constant initial loop value. */
361 /* Register or constant value used for comparison test. */
362 rtx comparison_value
;
363 /* Register or constant approximate final value. */
365 /* Register or constant initial loop value with term common to
366 final_value removed. */
367 rtx initial_equiv_value
;
368 /* Register or constant final loop value with term common to
369 initial_value removed. */
370 rtx final_equiv_value
;
371 /* Register corresponding to iteration variable. */
373 /* Constant loop increment. */
375 enum rtx_code comparison_code
;
376 /* Holds the number of loop iterations. It is zero if the number
377 could not be calculated. Must be unsigned since the number of
378 iterations can be as high as 2^wordsize - 1. For loops with a
379 wider iterator, this number will be zero if the number of loop
380 iterations is too large for an unsigned integer to hold. */
381 unsigned HOST_WIDE_INT n_iterations
;
382 int used_count_register
;
383 /* The loop iterator induction variable. */
385 /* List of MEMs that are stored in this loop. */
387 /* Array of MEMs that are used (read or written) in this loop, but
388 cannot be aliased by anything in this loop, except perhaps
389 themselves. In other words, if mems[i] is altered during
390 the loop, it is altered by an expression that is rtx_equal_p to
393 /* The index of the next available slot in MEMS. */
395 /* The number of elements allocated in MEMS. */
397 /* Nonzero if we don't know what MEMs were changed in the current
398 loop. This happens if the loop contains a call (in which case
399 `has_call' will also be set) or if we store into more than
401 int unknown_address_altered
;
402 /* The above doesn't count any readonly memory locations that are
403 stored. This does. */
404 int unknown_constant_address_altered
;
405 /* Count of memory write instructions discovered in the loop. */
407 /* The insn where the first of these was found. */
408 rtx first_loop_store_insn
;
409 /* The chain of movable insns in loop. */
410 struct loop_movables movables
;
411 /* The registers used the in loop. */
412 struct loop_regs regs
;
413 /* The induction variable information in loop. */
415 /* Nonzero if call is in pre_header extended basic block. */
416 int pre_header_has_call
;
419 /* Not really meaningful values, but at least something. */
420 #ifndef SIMULTANEOUS_PREFETCHES
421 #define SIMULTANEOUS_PREFETCHES 3
423 #ifndef PREFETCH_BLOCK
424 #define PREFETCH_BLOCK 32
426 #ifndef HAVE_prefetch
427 #define HAVE_prefetch 0
428 #define CODE_FOR_prefetch 0
429 #define gen_prefetch(a,b,c) (gcc_unreachable (), NULL_RTX)
432 /* Give up the prefetch optimizations once we exceed a given threshold.
433 It is unlikely that we would be able to optimize something in a loop
434 with so many detected prefetches. */
435 #define MAX_PREFETCHES 100
436 /* The number of prefetch blocks that are beneficial to fetch at once before
437 a loop with a known (and low) iteration count. */
438 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
439 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
440 since it is likely that the data are already in the cache. */
441 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
443 /* Parameterize some prefetch heuristics so they can be turned on and off
444 easily for performance testing on new architectures. These can be
445 defined in target-dependent files. */
447 /* Prefetch is worthwhile only when loads/stores are dense. */
448 #ifndef PREFETCH_ONLY_DENSE_MEM
449 #define PREFETCH_ONLY_DENSE_MEM 1
452 /* Define what we mean by "dense" loads and stores; This value divided by 256
453 is the minimum percentage of memory references that worth prefetching. */
454 #ifndef PREFETCH_DENSE_MEM
455 #define PREFETCH_DENSE_MEM 220
458 /* Do not prefetch for a loop whose iteration count is known to be low. */
459 #ifndef PREFETCH_NO_LOW_LOOPCNT
460 #define PREFETCH_NO_LOW_LOOPCNT 1
463 /* Define what we mean by a "low" iteration count. */
464 #ifndef PREFETCH_LOW_LOOPCNT
465 #define PREFETCH_LOW_LOOPCNT 32
468 /* Do not prefetch for a loop that contains a function call; such a loop is
469 probably not an internal loop. */
470 #ifndef PREFETCH_NO_CALL
471 #define PREFETCH_NO_CALL 1
474 /* Do not prefetch accesses with an extreme stride. */
475 #ifndef PREFETCH_NO_EXTREME_STRIDE
476 #define PREFETCH_NO_EXTREME_STRIDE 1
479 /* Define what we mean by an "extreme" stride. */
480 #ifndef PREFETCH_EXTREME_STRIDE
481 #define PREFETCH_EXTREME_STRIDE 4096
484 /* Define a limit to how far apart indices can be and still be merged
485 into a single prefetch. */
486 #ifndef PREFETCH_EXTREME_DIFFERENCE
487 #define PREFETCH_EXTREME_DIFFERENCE 4096
490 /* Issue prefetch instructions before the loop to fetch data to be used
491 in the first few loop iterations. */
492 #ifndef PREFETCH_BEFORE_LOOP
493 #define PREFETCH_BEFORE_LOOP 1
496 /* Do not handle reversed order prefetches (negative stride). */
497 #ifndef PREFETCH_NO_REVERSE_ORDER
498 #define PREFETCH_NO_REVERSE_ORDER 1
501 /* Prefetch even if the GIV is in conditional code. */
502 #ifndef PREFETCH_CONDITIONAL
503 #define PREFETCH_CONDITIONAL 1
506 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
507 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
509 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
510 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
511 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
513 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
514 ((REGNO) < FIRST_PSEUDO_REGISTER \
515 ? (int) hard_regno_nregs[(REGNO)][GET_MODE (SET_DEST)] : 1)
518 /* Vector mapping INSN_UIDs to luids.
519 The luids are like uids but increase monotonically always.
520 We use them to see whether a jump comes from outside a given loop. */
522 static int *uid_luid
;
524 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
525 number the insn is contained in. */
527 static struct loop
**uid_loop
;
529 /* 1 + largest uid of any insn. */
531 static int max_uid_for_loop
;
533 /* Number of loops detected in current function. Used as index to the
536 static int max_loop_num
;
538 /* Bound on pseudo register number before loop optimization.
539 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
540 static unsigned int max_reg_before_loop
;
542 /* The value to pass to the next call of reg_scan_update. */
543 static int loop_max_reg
;
545 /* During the analysis of a loop, a chain of `struct movable's
546 is made to record all the movable insns found.
547 Then the entire chain can be scanned to decide which to move. */
551 rtx insn
; /* A movable insn */
552 rtx set_src
; /* The expression this reg is set from. */
553 rtx set_dest
; /* The destination of this SET. */
554 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
555 of any registers used within the LIBCALL. */
556 int consec
; /* Number of consecutive following insns
557 that must be moved with this one. */
558 unsigned int regno
; /* The register it sets */
559 short lifetime
; /* lifetime of that register;
560 may be adjusted when matching movables
561 that load the same value are found. */
562 short savings
; /* Number of insns we can move for this reg,
563 including other movables that force this
564 or match this one. */
565 ENUM_BITFIELD(machine_mode
) savemode
: 8; /* Nonzero means it is a mode for
566 a low part that we should avoid changing when
567 clearing the rest of the reg. */
568 unsigned int cond
: 1; /* 1 if only conditionally movable */
569 unsigned int force
: 1; /* 1 means MUST move this insn */
570 unsigned int global
: 1; /* 1 means reg is live outside this loop */
571 /* If PARTIAL is 1, GLOBAL means something different:
572 that the reg is live outside the range from where it is set
573 to the following label. */
574 unsigned int done
: 1; /* 1 inhibits further processing of this */
576 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
577 In particular, moving it does not make it
579 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
580 load SRC, rather than copying INSN. */
581 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
582 first insn of a consecutive sets group. */
583 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
584 unsigned int insert_temp
: 1; /* 1 means we copy to a new pseudo and replace
585 the original insn with a copy from that
586 pseudo, rather than deleting it. */
587 struct movable
*match
; /* First entry for same value */
588 struct movable
*forces
; /* An insn that must be moved if this is */
589 struct movable
*next
;
593 static FILE *loop_dump_stream
;
595 /* Forward declarations. */
597 static void invalidate_loops_containing_label (rtx
);
598 static void find_and_verify_loops (rtx
, struct loops
*);
599 static void mark_loop_jump (rtx
, struct loop
*);
600 static void prescan_loop (struct loop
*);
601 static int reg_in_basic_block_p (rtx
, rtx
);
602 static int consec_sets_invariant_p (const struct loop
*, rtx
, int, rtx
);
603 static int labels_in_range_p (rtx
, int);
604 static void count_one_set (struct loop_regs
*, rtx
, rtx
, rtx
*);
605 static void note_addr_stored (rtx
, rtx
, void *);
606 static void note_set_pseudo_multiple_uses (rtx
, rtx
, void *);
607 static int loop_reg_used_before_p (const struct loop
*, rtx
, rtx
);
608 static rtx
find_regs_nested (rtx
, rtx
);
609 static void scan_loop (struct loop
*, int);
611 static void replace_call_address (rtx
, rtx
, rtx
);
613 static rtx
skip_consec_insns (rtx
, int);
614 static int libcall_benefit (rtx
);
615 static rtx
libcall_other_reg (rtx
, rtx
);
616 static void record_excess_regs (rtx
, rtx
, rtx
*);
617 static void ignore_some_movables (struct loop_movables
*);
618 static void force_movables (struct loop_movables
*);
619 static void combine_movables (struct loop_movables
*, struct loop_regs
*);
620 static int num_unmoved_movables (const struct loop
*);
621 static int regs_match_p (rtx
, rtx
, struct loop_movables
*);
622 static int rtx_equal_for_loop_p (rtx
, rtx
, struct loop_movables
*,
624 static void add_label_notes (rtx
, rtx
);
625 static void move_movables (struct loop
*loop
, struct loop_movables
*, int,
627 static void loop_movables_add (struct loop_movables
*, struct movable
*);
628 static void loop_movables_free (struct loop_movables
*);
629 static int count_nonfixed_reads (const struct loop
*, rtx
);
630 static void loop_bivs_find (struct loop
*);
631 static void loop_bivs_init_find (struct loop
*);
632 static void loop_bivs_check (struct loop
*);
633 static void loop_givs_find (struct loop
*);
634 static void loop_givs_check (struct loop
*);
635 static int loop_biv_eliminable_p (struct loop
*, struct iv_class
*, int, int);
636 static int loop_giv_reduce_benefit (struct loop
*, struct iv_class
*,
637 struct induction
*, rtx
);
638 static void loop_givs_dead_check (struct loop
*, struct iv_class
*);
639 static void loop_givs_reduce (struct loop
*, struct iv_class
*);
640 static void loop_givs_rescan (struct loop
*, struct iv_class
*, rtx
*);
641 static void loop_ivs_free (struct loop
*);
642 static void strength_reduce (struct loop
*, int);
643 static void find_single_use_in_loop (struct loop_regs
*, rtx
, rtx
);
644 static int valid_initial_value_p (rtx
, rtx
, int, rtx
);
645 static void find_mem_givs (const struct loop
*, rtx
, rtx
, int, int);
646 static void record_biv (struct loop
*, struct induction
*, rtx
, rtx
, rtx
,
647 rtx
, rtx
*, int, int);
648 static void check_final_value (const struct loop
*, struct induction
*);
649 static void loop_ivs_dump (const struct loop
*, FILE *, int);
650 static void loop_iv_class_dump (const struct iv_class
*, FILE *, int);
651 static void loop_biv_dump (const struct induction
*, FILE *, int);
652 static void loop_giv_dump (const struct induction
*, FILE *, int);
653 static void record_giv (const struct loop
*, struct induction
*, rtx
, rtx
,
654 rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, int,
656 static void update_giv_derive (const struct loop
*, rtx
);
657 static HOST_WIDE_INT
get_monotonic_increment (struct iv_class
*);
658 static bool biased_biv_fits_mode_p (const struct loop
*, struct iv_class
*,
659 HOST_WIDE_INT
, enum machine_mode
,
660 unsigned HOST_WIDE_INT
);
661 static bool biv_fits_mode_p (const struct loop
*, struct iv_class
*,
662 HOST_WIDE_INT
, enum machine_mode
, bool);
663 static bool extension_within_bounds_p (const struct loop
*, struct iv_class
*,
665 static void check_ext_dependent_givs (const struct loop
*, struct iv_class
*);
666 static int basic_induction_var (const struct loop
*, rtx
, enum machine_mode
,
667 rtx
, rtx
, rtx
*, rtx
*, rtx
**);
668 static rtx
simplify_giv_expr (const struct loop
*, rtx
, rtx
*, int *);
669 static int general_induction_var (const struct loop
*loop
, rtx
, rtx
*, rtx
*,
670 rtx
*, rtx
*, int, int *, enum machine_mode
);
671 static int consec_sets_giv (const struct loop
*, int, rtx
, rtx
, rtx
, rtx
*,
672 rtx
*, rtx
*, rtx
*);
673 static int check_dbra_loop (struct loop
*, int);
674 static rtx
express_from_1 (rtx
, rtx
, rtx
);
675 static rtx
combine_givs_p (struct induction
*, struct induction
*);
676 static int cmp_combine_givs_stats (const void *, const void *);
677 static void combine_givs (struct loop_regs
*, struct iv_class
*);
678 static int product_cheap_p (rtx
, rtx
);
679 static int maybe_eliminate_biv (const struct loop
*, struct iv_class
*, int,
681 static int maybe_eliminate_biv_1 (const struct loop
*, rtx
, rtx
,
682 struct iv_class
*, int, basic_block
, rtx
);
683 static int last_use_this_basic_block (rtx
, rtx
);
684 static void record_initial (rtx
, rtx
, void *);
685 static void update_reg_last_use (rtx
, rtx
);
686 static rtx
next_insn_in_loop (const struct loop
*, rtx
);
687 static void loop_regs_scan (const struct loop
*, int);
688 static int count_insns_in_loop (const struct loop
*);
689 static int find_mem_in_note_1 (rtx
*, void *);
690 static rtx
find_mem_in_note (rtx
);
691 static void load_mems (const struct loop
*);
692 static int insert_loop_mem (rtx
*, void *);
693 static int replace_loop_mem (rtx
*, void *);
694 static void replace_loop_mems (rtx
, rtx
, rtx
, int);
695 static int replace_loop_reg (rtx
*, void *);
696 static void replace_loop_regs (rtx insn
, rtx
, rtx
);
697 static void note_reg_stored (rtx
, rtx
, void *);
698 static void try_copy_prop (const struct loop
*, rtx
, unsigned int);
699 static void try_swap_copy_prop (const struct loop
*, rtx
, unsigned int);
700 static rtx
check_insn_for_givs (struct loop
*, rtx
, int, int);
701 static rtx
check_insn_for_bivs (struct loop
*, rtx
, int, int);
702 static rtx
gen_add_mult (rtx
, rtx
, rtx
, rtx
);
703 static void loop_regs_update (const struct loop
*, rtx
);
704 static int iv_add_mult_cost (rtx
, rtx
, rtx
, rtx
);
705 static int loop_invariant_p (const struct loop
*, rtx
);
706 static rtx
loop_insn_hoist (const struct loop
*, rtx
);
707 static void loop_iv_add_mult_emit_before (const struct loop
*, rtx
, rtx
, rtx
,
708 rtx
, basic_block
, rtx
);
709 static rtx
loop_insn_emit_before (const struct loop
*, basic_block
,
711 static int loop_insn_first_p (rtx
, rtx
);
712 static rtx
get_condition_for_loop (const struct loop
*, rtx
);
713 static void loop_iv_add_mult_sink (const struct loop
*, rtx
, rtx
, rtx
, rtx
);
714 static void loop_iv_add_mult_hoist (const struct loop
*, rtx
, rtx
, rtx
, rtx
);
715 static rtx
extend_value_for_giv (struct induction
*, rtx
);
716 static rtx
loop_insn_sink (const struct loop
*, rtx
);
718 static rtx
loop_insn_emit_after (const struct loop
*, basic_block
, rtx
, rtx
);
719 static rtx
loop_call_insn_emit_before (const struct loop
*, basic_block
,
721 static rtx
loop_call_insn_hoist (const struct loop
*, rtx
);
722 static rtx
loop_insn_sink_or_swim (const struct loop
*, rtx
);
724 static void loop_dump_aux (const struct loop
*, FILE *, int);
725 static void loop_delete_insns (rtx
, rtx
);
726 static HOST_WIDE_INT
remove_constant_addition (rtx
*);
727 static rtx
gen_load_of_final_value (rtx
, rtx
);
728 void debug_ivs (const struct loop
*);
729 void debug_iv_class (const struct iv_class
*);
730 void debug_biv (const struct induction
*);
731 void debug_giv (const struct induction
*);
732 void debug_loop (const struct loop
*);
733 void debug_loops (const struct loops
*);
735 typedef struct loop_replace_args
742 /* Nonzero iff INSN is between START and END, inclusive. */
743 #define INSN_IN_RANGE_P(INSN, START, END) \
744 (INSN_UID (INSN) < max_uid_for_loop \
745 && INSN_LUID (INSN) >= INSN_LUID (START) \
746 && INSN_LUID (INSN) <= INSN_LUID (END))
748 /* Indirect_jump_in_function is computed once per function. */
749 static int indirect_jump_in_function
;
750 static int indirect_jump_in_function_p (rtx
);
752 static int compute_luids (rtx
, rtx
, int);
754 static int biv_elimination_giv_has_0_offset (struct induction
*,
755 struct induction
*, rtx
);
757 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
758 copy the value of the strength reduced giv to its original register. */
759 static int copy_cost
;
761 /* Cost of using a register, to normalize the benefits of a giv. */
762 static int reg_address_cost
;
767 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
769 reg_address_cost
= address_cost (reg
, SImode
);
771 copy_cost
= COSTS_N_INSNS (1);
774 /* Compute the mapping from uids to luids.
775 LUIDs are numbers assigned to insns, like uids,
776 except that luids increase monotonically through the code.
777 Start at insn START and stop just before END. Assign LUIDs
778 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
780 compute_luids (rtx start
, rtx end
, int prev_luid
)
785 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
787 if (INSN_UID (insn
) >= max_uid_for_loop
)
789 /* Don't assign luids to line-number NOTEs, so that the distance in
790 luids between two insns is not affected by -g. */
792 || NOTE_LINE_NUMBER (insn
) <= 0)
793 uid_luid
[INSN_UID (insn
)] = ++i
;
795 /* Give a line number note the same luid as preceding insn. */
796 uid_luid
[INSN_UID (insn
)] = i
;
801 /* Entry point of this file. Perform loop optimization
802 on the current function. F is the first insn of the function
803 and DUMPFILE is a stream for output of a trace of actions taken
804 (or 0 if none should be output). */
807 loop_optimize (rtx f
, FILE *dumpfile
, int flags
)
811 struct loops loops_data
;
812 struct loops
*loops
= &loops_data
;
813 struct loop_info
*loops_info
;
815 loop_dump_stream
= dumpfile
;
817 init_recog_no_volatile ();
819 max_reg_before_loop
= max_reg_num ();
820 loop_max_reg
= max_reg_before_loop
;
824 /* Count the number of loops. */
827 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
830 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
834 /* Don't waste time if no loops. */
835 if (max_loop_num
== 0)
838 loops
->num
= max_loop_num
;
840 /* Get size to use for tables indexed by uids.
841 Leave some space for labels allocated by find_and_verify_loops. */
842 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
844 uid_luid
= xcalloc (max_uid_for_loop
, sizeof (int));
845 uid_loop
= xcalloc (max_uid_for_loop
, sizeof (struct loop
*));
847 /* Allocate storage for array of loops. */
848 loops
->array
= xcalloc (loops
->num
, sizeof (struct loop
));
850 /* Find and process each loop.
851 First, find them, and record them in order of their beginnings. */
852 find_and_verify_loops (f
, loops
);
854 /* Allocate and initialize auxiliary loop information. */
855 loops_info
= xcalloc (loops
->num
, sizeof (struct loop_info
));
856 for (i
= 0; i
< (int) loops
->num
; i
++)
857 loops
->array
[i
].aux
= loops_info
+ i
;
859 /* Now find all register lifetimes. This must be done after
860 find_and_verify_loops, because it might reorder the insns in the
862 reg_scan (f
, max_reg_before_loop
);
864 /* This must occur after reg_scan so that registers created by gcse
865 will have entries in the register tables.
867 We could have added a call to reg_scan after gcse_main in toplev.c,
868 but moving this call to init_alias_analysis is more efficient. */
869 init_alias_analysis ();
871 /* See if we went too far. Note that get_max_uid already returns
872 one more that the maximum uid of all insn. */
873 gcc_assert (get_max_uid () <= max_uid_for_loop
);
874 /* Now reset it to the actual size we need. See above. */
875 max_uid_for_loop
= get_max_uid ();
877 /* find_and_verify_loops has already called compute_luids, but it
878 might have rearranged code afterwards, so we need to recompute
880 compute_luids (f
, NULL_RTX
, 0);
882 /* Don't leave gaps in uid_luid for insns that have been
883 deleted. It is possible that the first or last insn
884 using some register has been deleted by cross-jumping.
885 Make sure that uid_luid for that former insn's uid
886 points to the general area where that insn used to be. */
887 for (i
= 0; i
< max_uid_for_loop
; i
++)
889 uid_luid
[0] = uid_luid
[i
];
890 if (uid_luid
[0] != 0)
893 for (i
= 0; i
< max_uid_for_loop
; i
++)
894 if (uid_luid
[i
] == 0)
895 uid_luid
[i
] = uid_luid
[i
- 1];
897 /* Determine if the function has indirect jump. On some systems
898 this prevents low overhead loop instructions from being used. */
899 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
901 /* Now scan the loops, last ones first, since this means inner ones are done
902 before outer ones. */
903 for (i
= max_loop_num
- 1; i
>= 0; i
--)
905 struct loop
*loop
= &loops
->array
[i
];
907 if (! loop
->invalid
&& loop
->end
)
909 scan_loop (loop
, flags
);
914 end_alias_analysis ();
917 for (i
= 0; i
< (int) loops
->num
; i
++)
918 free (loops_info
[i
].mems
);
926 /* Returns the next insn, in execution order, after INSN. START and
927 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
928 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
929 insn-stream; it is used with loops that are entered near the
933 next_insn_in_loop (const struct loop
*loop
, rtx insn
)
935 insn
= NEXT_INSN (insn
);
937 if (insn
== loop
->end
)
940 /* Go to the top of the loop, and continue there. */
947 if (insn
== loop
->scan_start
)
954 /* Find any register references hidden inside X and add them to
955 the dependency list DEPS. This is used to look inside CLOBBER (MEM
956 when checking whether a PARALLEL can be pulled out of a loop. */
959 find_regs_nested (rtx deps
, rtx x
)
961 enum rtx_code code
= GET_CODE (x
);
963 deps
= gen_rtx_EXPR_LIST (VOIDmode
, x
, deps
);
966 const char *fmt
= GET_RTX_FORMAT (code
);
968 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
971 deps
= find_regs_nested (deps
, XEXP (x
, i
));
972 else if (fmt
[i
] == 'E')
973 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
974 deps
= find_regs_nested (deps
, XVECEXP (x
, i
, j
));
980 /* Optimize one loop described by LOOP. */
982 /* ??? Could also move memory writes out of loops if the destination address
983 is invariant, the source is invariant, the memory write is not volatile,
984 and if we can prove that no read inside the loop can read this address
985 before the write occurs. If there is a read of this address after the
986 write, then we can also mark the memory read as invariant. */
989 scan_loop (struct loop
*loop
, int flags
)
991 struct loop_info
*loop_info
= LOOP_INFO (loop
);
992 struct loop_regs
*regs
= LOOP_REGS (loop
);
994 rtx loop_start
= loop
->start
;
995 rtx loop_end
= loop
->end
;
997 /* 1 if we are scanning insns that could be executed zero times. */
999 /* 1 if we are scanning insns that might never be executed
1000 due to a subroutine call which might exit before they are reached. */
1001 int call_passed
= 0;
1002 /* Number of insns in the loop. */
1005 rtx temp
, update_start
, update_end
;
1006 /* The SET from an insn, if it is the only SET in the insn. */
1008 /* Chain describing insns movable in current loop. */
1009 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
1010 /* Ratio of extra register life span we can justify
1011 for saving an instruction. More if loop doesn't call subroutines
1012 since in that case saving an insn makes more difference
1013 and more registers are available. */
1022 /* Determine whether this loop starts with a jump down to a test at
1023 the end. This will occur for a small number of loops with a test
1024 that is too complex to duplicate in front of the loop.
1026 We search for the first insn or label in the loop, skipping NOTEs.
1027 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
1028 (because we might have a loop executed only once that contains a
1029 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
1030 (in case we have a degenerate loop).
1032 Note that if we mistakenly think that a loop is entered at the top
1033 when, in fact, it is entered at the exit test, the only effect will be
1034 slightly poorer optimization. Making the opposite error can generate
1035 incorrect code. Since very few loops now start with a jump to the
1036 exit test, the code here to detect that case is very conservative. */
1038 for (p
= NEXT_INSN (loop_start
);
1040 && !LABEL_P (p
) && ! INSN_P (p
)
1042 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
1043 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
1047 loop
->scan_start
= p
;
1049 /* If loop end is the end of the current function, then emit a
1050 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
1051 note insn. This is the position we use when sinking insns out of
1053 if (NEXT_INSN (loop
->end
) != 0)
1054 loop
->sink
= NEXT_INSN (loop
->end
);
1056 loop
->sink
= emit_note_after (NOTE_INSN_DELETED
, loop
->end
);
1058 /* Set up variables describing this loop. */
1059 prescan_loop (loop
);
1060 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
1062 /* If loop has a jump before the first label,
1063 the true entry is the target of that jump.
1064 Start scan from there.
1065 But record in LOOP->TOP the place where the end-test jumps
1066 back to so we can scan that after the end of the loop. */
1068 /* Loop entry must be unconditional jump (and not a RETURN) */
1069 && any_uncondjump_p (p
)
1070 && JUMP_LABEL (p
) != 0
1071 /* Check to see whether the jump actually
1072 jumps out of the loop (meaning it's no loop).
1073 This case can happen for things like
1074 do {..} while (0). If this label was generated previously
1075 by loop, we can't tell anything about it and have to reject
1077 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, loop_end
))
1079 loop
->top
= next_label (loop
->scan_start
);
1080 loop
->scan_start
= JUMP_LABEL (p
);
1083 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
1084 as required by loop_reg_used_before_p. So skip such loops. (This
1085 test may never be true, but it's best to play it safe.)
1087 Also, skip loops where we do not start scanning at a label. This
1088 test also rejects loops starting with a JUMP_INSN that failed the
1091 if (INSN_UID (loop
->scan_start
) >= max_uid_for_loop
1092 || !LABEL_P (loop
->scan_start
))
1094 if (loop_dump_stream
)
1095 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
1096 INSN_UID (loop_start
), INSN_UID (loop_end
));
1100 /* Allocate extra space for REGs that might be created by load_mems.
1101 We allocate a little extra slop as well, in the hopes that we
1102 won't have to reallocate the regs array. */
1103 loop_regs_scan (loop
, loop_info
->mems_idx
+ 16);
1104 insn_count
= count_insns_in_loop (loop
);
1106 if (loop_dump_stream
)
1107 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
1108 INSN_UID (loop_start
), INSN_UID (loop_end
), insn_count
);
1110 /* Scan through the loop finding insns that are safe to move.
1111 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
1112 this reg will be considered invariant for subsequent insns.
1113 We consider whether subsequent insns use the reg
1114 in deciding whether it is worth actually moving.
1116 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
1117 and therefore it is possible that the insns we are scanning
1118 would never be executed. At such times, we must make sure
1119 that it is safe to execute the insn once instead of zero times.
1120 When MAYBE_NEVER is 0, all insns will be executed at least once
1121 so that is not a problem. */
1123 for (in_libcall
= 0, p
= next_insn_in_loop (loop
, loop
->scan_start
);
1125 p
= next_insn_in_loop (loop
, p
))
1127 if (in_libcall
&& INSN_P (p
) && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
1129 if (NONJUMP_INSN_P (p
))
1131 /* Do not scan past an optimization barrier. */
1132 if (GET_CODE (PATTERN (p
)) == ASM_INPUT
)
1134 temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
1138 && (set
= single_set (p
))
1139 && REG_P (SET_DEST (set
))
1140 && SET_DEST (set
) != frame_pointer_rtx
1141 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
1142 && SET_DEST (set
) != pic_offset_table_rtx
1144 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
1149 int insert_temp
= 0;
1150 rtx src
= SET_SRC (set
);
1151 rtx dependencies
= 0;
1153 /* Figure out what to use as a source of this insn. If a
1154 REG_EQUIV note is given or if a REG_EQUAL note with a
1155 constant operand is specified, use it as the source and
1156 mark that we should move this insn by calling
1157 emit_move_insn rather that duplicating the insn.
1159 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
1161 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
1163 src
= XEXP (temp
, 0), move_insn
= 1;
1166 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1167 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
1168 src
= XEXP (temp
, 0), move_insn
= 1;
1169 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
1171 src
= XEXP (temp
, 0);
1172 /* A libcall block can use regs that don't appear in
1173 the equivalent expression. To move the libcall,
1174 we must move those regs too. */
1175 dependencies
= libcall_other_reg (p
, src
);
1179 /* For parallels, add any possible uses to the dependencies, as
1180 we can't move the insn without resolving them first.
1181 MEMs inside CLOBBERs may also reference registers; these
1182 count as implicit uses. */
1183 if (GET_CODE (PATTERN (p
)) == PARALLEL
)
1185 for (i
= 0; i
< XVECLEN (PATTERN (p
), 0); i
++)
1187 rtx x
= XVECEXP (PATTERN (p
), 0, i
);
1188 if (GET_CODE (x
) == USE
)
1190 = gen_rtx_EXPR_LIST (VOIDmode
, XEXP (x
, 0),
1192 else if (GET_CODE (x
) == CLOBBER
1193 && MEM_P (XEXP (x
, 0)))
1194 dependencies
= find_regs_nested (dependencies
,
1195 XEXP (XEXP (x
, 0), 0));
1199 if (/* The register is used in basic blocks other
1200 than the one where it is set (meaning that
1201 something after this point in the loop might
1202 depend on its value before the set). */
1203 ! reg_in_basic_block_p (p
, SET_DEST (set
))
1204 /* And the set is not guaranteed to be executed once
1205 the loop starts, or the value before the set is
1206 needed before the set occurs...
1208 ??? Note we have quadratic behavior here, mitigated
1209 by the fact that the previous test will often fail for
1210 large loops. Rather than re-scanning the entire loop
1211 each time for register usage, we should build tables
1212 of the register usage and use them here instead. */
1214 || loop_reg_used_before_p (loop
, set
, p
)))
1215 /* It is unsafe to move the set. However, it may be OK to
1216 move the source into a new pseudo, and substitute a
1217 reg-to-reg copy for the original insn.
1219 This code used to consider it OK to move a set of a variable
1220 which was not created by the user and not used in an exit
1222 That behavior is incorrect and was removed. */
1225 /* Don't try to optimize a MODE_CC set with a constant
1226 source. It probably will be combined with a conditional
1228 if (GET_MODE_CLASS (GET_MODE (SET_DEST (set
))) == MODE_CC
1229 && CONSTANT_P (src
))
1231 /* Don't try to optimize a register that was made
1232 by loop-optimization for an inner loop.
1233 We don't know its life-span, so we can't compute
1235 else if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
1237 /* Don't move the source and add a reg-to-reg copy:
1238 - with -Os (this certainly increases size),
1239 - if the mode doesn't support copy operations (obviously),
1240 - if the source is already a reg (the motion will gain nothing),
1241 - if the source is a legitimate constant (likewise). */
1242 else if (insert_temp
1244 || ! can_copy_p (GET_MODE (SET_SRC (set
)))
1245 || REG_P (SET_SRC (set
))
1246 || (CONSTANT_P (SET_SRC (set
))
1247 && LEGITIMATE_CONSTANT_P (SET_SRC (set
)))))
1249 else if ((tem
= loop_invariant_p (loop
, src
))
1250 && (dependencies
== 0
1252 = loop_invariant_p (loop
, dependencies
)) != 0)
1253 && (regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
== 1
1255 = consec_sets_invariant_p
1256 (loop
, SET_DEST (set
),
1257 regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
,
1259 /* If the insn can cause a trap (such as divide by zero),
1260 can't move it unless it's guaranteed to be executed
1261 once loop is entered. Even a function call might
1262 prevent the trap insn from being reached
1263 (since it might exit!) */
1264 && ! ((maybe_never
|| call_passed
)
1265 && may_trap_p (src
)))
1268 int regno
= REGNO (SET_DEST (set
));
1270 /* A potential lossage is where we have a case where two insns
1271 can be combined as long as they are both in the loop, but
1272 we move one of them outside the loop. For large loops,
1273 this can lose. The most common case of this is the address
1274 of a function being called.
1276 Therefore, if this register is marked as being used
1277 exactly once if we are in a loop with calls
1278 (a "large loop"), see if we can replace the usage of
1279 this register with the source of this SET. If we can,
1282 Don't do this if P has a REG_RETVAL note or if we have
1283 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
1285 if (loop_info
->has_call
1286 && regs
->array
[regno
].single_usage
!= 0
1287 && regs
->array
[regno
].single_usage
!= const0_rtx
1288 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
1289 && (REGNO_LAST_UID (regno
)
1290 == INSN_UID (regs
->array
[regno
].single_usage
))
1291 && regs
->array
[regno
].set_in_loop
== 1
1292 && GET_CODE (SET_SRC (set
)) != ASM_OPERANDS
1293 && ! side_effects_p (SET_SRC (set
))
1294 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
1295 && (! SMALL_REGISTER_CLASSES
1296 || (! (REG_P (SET_SRC (set
))
1297 && (REGNO (SET_SRC (set
))
1298 < FIRST_PSEUDO_REGISTER
))))
1299 && regno
>= FIRST_PSEUDO_REGISTER
1300 /* This test is not redundant; SET_SRC (set) might be
1301 a call-clobbered register and the life of REGNO
1302 might span a call. */
1303 && ! modified_between_p (SET_SRC (set
), p
,
1304 regs
->array
[regno
].single_usage
)
1305 && no_labels_between_p (p
,
1306 regs
->array
[regno
].single_usage
)
1307 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
1308 regs
->array
[regno
].single_usage
))
1310 /* Replace any usage in a REG_EQUAL note. Must copy
1311 the new source, so that we don't get rtx sharing
1312 between the SET_SOURCE and REG_NOTES of insn p. */
1313 REG_NOTES (regs
->array
[regno
].single_usage
)
1315 (REG_NOTES (regs
->array
[regno
].single_usage
),
1316 SET_DEST (set
), copy_rtx (SET_SRC (set
))));
1319 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
1321 regs
->array
[regno
+i
].set_in_loop
= 0;
1325 m
= xmalloc (sizeof (struct movable
));
1329 m
->dependencies
= dependencies
;
1330 m
->set_dest
= SET_DEST (set
);
1333 = regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
- 1;
1337 m
->move_insn
= move_insn
;
1338 m
->move_insn_first
= 0;
1339 m
->insert_temp
= insert_temp
;
1340 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
1341 m
->savemode
= VOIDmode
;
1343 /* Set M->cond if either loop_invariant_p
1344 or consec_sets_invariant_p returned 2
1345 (only conditionally invariant). */
1346 m
->cond
= ((tem
| tem1
| tem2
) > 1);
1347 m
->global
= LOOP_REG_GLOBAL_P (loop
, regno
);
1349 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
1350 m
->savings
= regs
->array
[regno
].n_times_set
;
1351 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
1352 m
->savings
+= libcall_benefit (p
);
1353 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
)); i
++)
1354 regs
->array
[regno
+i
].set_in_loop
= move_insn
? -2 : -1;
1355 /* Add M to the end of the chain MOVABLES. */
1356 loop_movables_add (movables
, m
);
1360 /* It is possible for the first instruction to have a
1361 REG_EQUAL note but a non-invariant SET_SRC, so we must
1362 remember the status of the first instruction in case
1363 the last instruction doesn't have a REG_EQUAL note. */
1364 m
->move_insn_first
= m
->move_insn
;
1366 /* Skip this insn, not checking REG_LIBCALL notes. */
1367 p
= next_nonnote_insn (p
);
1368 /* Skip the consecutive insns, if there are any. */
1369 p
= skip_consec_insns (p
, m
->consec
);
1370 /* Back up to the last insn of the consecutive group. */
1371 p
= prev_nonnote_insn (p
);
1373 /* We must now reset m->move_insn, m->is_equiv, and
1374 possibly m->set_src to correspond to the effects of
1376 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
1378 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
1381 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1382 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
1383 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
1389 = (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
1392 /* If this register is always set within a STRICT_LOW_PART
1393 or set to zero, then its high bytes are constant.
1394 So clear them outside the loop and within the loop
1395 just load the low bytes.
1396 We must check that the machine has an instruction to do so.
1397 Also, if the value loaded into the register
1398 depends on the same register, this cannot be done. */
1399 else if (SET_SRC (set
) == const0_rtx
1400 && NONJUMP_INSN_P (NEXT_INSN (p
))
1401 && (set1
= single_set (NEXT_INSN (p
)))
1402 && GET_CODE (set1
) == SET
1403 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
1404 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
1405 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
1407 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
1409 int regno
= REGNO (SET_DEST (set
));
1410 if (regs
->array
[regno
].set_in_loop
== 2)
1413 m
= xmalloc (sizeof (struct movable
));
1416 m
->set_dest
= SET_DEST (set
);
1417 m
->dependencies
= 0;
1423 m
->move_insn_first
= 0;
1424 m
->insert_temp
= insert_temp
;
1426 /* If the insn may not be executed on some cycles,
1427 we can't clear the whole reg; clear just high part.
1428 Not even if the reg is used only within this loop.
1435 Clearing x before the inner loop could clobber a value
1436 being saved from the last time around the outer loop.
1437 However, if the reg is not used outside this loop
1438 and all uses of the register are in the same
1439 basic block as the store, there is no problem.
1441 If this insn was made by loop, we don't know its
1442 INSN_LUID and hence must make a conservative
1444 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1445 || LOOP_REG_GLOBAL_P (loop
, regno
)
1446 || (labels_in_range_p
1447 (p
, REGNO_FIRST_LUID (regno
))));
1448 if (maybe_never
&& m
->global
)
1449 m
->savemode
= GET_MODE (SET_SRC (set1
));
1451 m
->savemode
= VOIDmode
;
1455 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
1458 i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
1460 regs
->array
[regno
+i
].set_in_loop
= -1;
1461 /* Add M to the end of the chain MOVABLES. */
1462 loop_movables_add (movables
, m
);
1467 /* Past a call insn, we get to insns which might not be executed
1468 because the call might exit. This matters for insns that trap.
1469 Constant and pure call insns always return, so they don't count. */
1470 else if (CALL_P (p
) && ! CONST_OR_PURE_CALL_P (p
))
1472 /* Past a label or a jump, we get to insns for which we
1473 can't count on whether or how many times they will be
1474 executed during each iteration. Therefore, we can
1475 only move out sets of trivial variables
1476 (those not used after the loop). */
1477 /* Similar code appears twice in strength_reduce. */
1478 else if ((LABEL_P (p
) || JUMP_P (p
))
1479 /* If we enter the loop in the middle, and scan around to the
1480 beginning, don't set maybe_never for that. This must be an
1481 unconditional jump, otherwise the code at the top of the
1482 loop might never be executed. Unconditional jumps are
1483 followed by a barrier then the loop_end. */
1484 && ! (JUMP_P (p
) && JUMP_LABEL (p
) == loop
->top
1485 && NEXT_INSN (NEXT_INSN (p
)) == loop_end
1486 && any_uncondjump_p (p
)))
1490 /* If one movable subsumes another, ignore that other. */
1492 ignore_some_movables (movables
);
1494 /* For each movable insn, see if the reg that it loads
1495 leads when it dies right into another conditionally movable insn.
1496 If so, record that the second insn "forces" the first one,
1497 since the second can be moved only if the first is. */
1499 force_movables (movables
);
1501 /* See if there are multiple movable insns that load the same value.
1502 If there are, make all but the first point at the first one
1503 through the `match' field, and add the priorities of them
1504 all together as the priority of the first. */
1506 combine_movables (movables
, regs
);
1508 /* Now consider each movable insn to decide whether it is worth moving.
1509 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1511 For machines with few registers this increases code size, so do not
1512 move moveables when optimizing for code size on such machines.
1513 (The 18 below is the value for i386.) */
1516 || (reg_class_size
[GENERAL_REGS
] > 18 && !loop_info
->has_call
))
1518 move_movables (loop
, movables
, threshold
, insn_count
);
1520 /* Recalculate regs->array if move_movables has created new
1522 if (max_reg_num () > regs
->num
)
1524 loop_regs_scan (loop
, 0);
1525 for (update_start
= loop_start
;
1526 PREV_INSN (update_start
)
1527 && !LABEL_P (PREV_INSN (update_start
));
1528 update_start
= PREV_INSN (update_start
))
1530 update_end
= NEXT_INSN (loop_end
);
1532 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1533 loop_max_reg
= max_reg_num ();
1537 /* Now candidates that still are negative are those not moved.
1538 Change regs->array[I].set_in_loop to indicate that those are not actually
1540 for (i
= 0; i
< regs
->num
; i
++)
1541 if (regs
->array
[i
].set_in_loop
< 0)
1542 regs
->array
[i
].set_in_loop
= regs
->array
[i
].n_times_set
;
1544 /* Now that we've moved some things out of the loop, we might be able to
1545 hoist even more memory references. */
1548 /* Recalculate regs->array if load_mems has created new registers. */
1549 if (max_reg_num () > regs
->num
)
1550 loop_regs_scan (loop
, 0);
1552 for (update_start
= loop_start
;
1553 PREV_INSN (update_start
)
1554 && !LABEL_P (PREV_INSN (update_start
));
1555 update_start
= PREV_INSN (update_start
))
1557 update_end
= NEXT_INSN (loop_end
);
1559 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1560 loop_max_reg
= max_reg_num ();
1562 if (flag_strength_reduce
)
1564 if (update_end
&& LABEL_P (update_end
))
1565 /* Ensure our label doesn't go away. */
1566 LABEL_NUSES (update_end
)++;
1568 strength_reduce (loop
, flags
);
1570 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1571 loop_max_reg
= max_reg_num ();
1573 if (update_end
&& LABEL_P (update_end
)
1574 && --LABEL_NUSES (update_end
) == 0)
1575 delete_related_insns (update_end
);
1579 /* The movable information is required for strength reduction. */
1580 loop_movables_free (movables
);
1587 /* Add elements to *OUTPUT to record all the pseudo-regs
1588 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1591 record_excess_regs (rtx in_this
, rtx not_in_this
, rtx
*output
)
1597 code
= GET_CODE (in_this
);
1611 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1612 && ! reg_mentioned_p (in_this
, not_in_this
))
1613 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1620 fmt
= GET_RTX_FORMAT (code
);
1621 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1628 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1629 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1633 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1639 /* Check what regs are referred to in the libcall block ending with INSN,
1640 aside from those mentioned in the equivalent value.
1641 If there are none, return 0.
1642 If there are one or more, return an EXPR_LIST containing all of them. */
1645 libcall_other_reg (rtx insn
, rtx equiv
)
1647 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1648 rtx p
= XEXP (note
, 0);
1651 /* First, find all the regs used in the libcall block
1652 that are not mentioned as inputs to the result. */
1657 record_excess_regs (PATTERN (p
), equiv
, &output
);
1664 /* Return 1 if all uses of REG
1665 are between INSN and the end of the basic block. */
1668 reg_in_basic_block_p (rtx insn
, rtx reg
)
1670 int regno
= REGNO (reg
);
1673 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1676 /* Search this basic block for the already recorded last use of the reg. */
1677 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1679 switch (GET_CODE (p
))
1686 /* Ordinary insn: if this is the last use, we win. */
1687 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1692 /* Jump insn: if this is the last use, we win. */
1693 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1695 /* Otherwise, it's the end of the basic block, so we lose. */
1700 /* It's the end of the basic block, so we lose. */
1708 /* The "last use" that was recorded can't be found after the first
1709 use. This can happen when the last use was deleted while
1710 processing an inner loop, this inner loop was then completely
1711 unrolled, and the outer loop is always exited after the inner loop,
1712 so that everything after the first use becomes a single basic block. */
1716 /* Compute the benefit of eliminating the insns in the block whose
1717 last insn is LAST. This may be a group of insns used to compute a
1718 value directly or can contain a library call. */
1721 libcall_benefit (rtx last
)
1726 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1727 insn
!= last
; insn
= NEXT_INSN (insn
))
1730 benefit
+= 10; /* Assume at least this many insns in a library
1732 else if (NONJUMP_INSN_P (insn
)
1733 && GET_CODE (PATTERN (insn
)) != USE
1734 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1741 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1744 skip_consec_insns (rtx insn
, int count
)
1746 for (; count
> 0; count
--)
1750 /* If first insn of libcall sequence, skip to end. */
1751 /* Do this at start of loop, since INSN is guaranteed to
1754 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1755 insn
= XEXP (temp
, 0);
1758 insn
= NEXT_INSN (insn
);
1759 while (NOTE_P (insn
));
1765 /* Ignore any movable whose insn falls within a libcall
1766 which is part of another movable.
1767 We make use of the fact that the movable for the libcall value
1768 was made later and so appears later on the chain. */
1771 ignore_some_movables (struct loop_movables
*movables
)
1773 struct movable
*m
, *m1
;
1775 for (m
= movables
->head
; m
; m
= m
->next
)
1777 /* Is this a movable for the value of a libcall? */
1778 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1782 /* Check for earlier movables inside that range,
1783 and mark them invalid. We cannot use LUIDs here because
1784 insns created by loop.c for prior loops don't have LUIDs.
1785 Rather than reject all such insns from movables, we just
1786 explicitly check each insn in the libcall (since invariant
1787 libcalls aren't that common). */
1788 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1789 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1790 if (m1
->insn
== insn
)
1796 /* For each movable insn, see if the reg that it loads
1797 leads when it dies right into another conditionally movable insn.
1798 If so, record that the second insn "forces" the first one,
1799 since the second can be moved only if the first is. */
1802 force_movables (struct loop_movables
*movables
)
1804 struct movable
*m
, *m1
;
1806 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
1807 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1808 if (!m1
->partial
&& !m1
->done
)
1810 int regno
= m1
->regno
;
1811 for (m
= m1
->next
; m
; m
= m
->next
)
1812 /* ??? Could this be a bug? What if CSE caused the
1813 register of M1 to be used after this insn?
1814 Since CSE does not update regno_last_uid,
1815 this insn M->insn might not be where it dies.
1816 But very likely this doesn't matter; what matters is
1817 that M's reg is computed from M1's reg. */
1818 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1821 if (m
!= 0 && m
->set_src
== m1
->set_dest
1822 /* If m->consec, m->set_src isn't valid. */
1826 /* Increase the priority of the moving the first insn
1827 since it permits the second to be moved as well.
1828 Likewise for insns already forced by the first insn. */
1834 for (m2
= m1
; m2
; m2
= m2
->forces
)
1836 m2
->lifetime
+= m
->lifetime
;
1837 m2
->savings
+= m
->savings
;
1843 /* Find invariant expressions that are equal and can be combined into
1847 combine_movables (struct loop_movables
*movables
, struct loop_regs
*regs
)
1850 char *matched_regs
= xmalloc (regs
->num
);
1851 enum machine_mode mode
;
1853 /* Regs that are set more than once are not allowed to match
1854 or be matched. I'm no longer sure why not. */
1855 /* Only pseudo registers are allowed to match or be matched,
1856 since move_movables does not validate the change. */
1857 /* Perhaps testing m->consec_sets would be more appropriate here? */
1859 for (m
= movables
->head
; m
; m
= m
->next
)
1860 if (m
->match
== 0 && regs
->array
[m
->regno
].n_times_set
== 1
1861 && m
->regno
>= FIRST_PSEUDO_REGISTER
1866 int regno
= m
->regno
;
1868 memset (matched_regs
, 0, regs
->num
);
1869 matched_regs
[regno
] = 1;
1871 /* We want later insns to match the first one. Don't make the first
1872 one match any later ones. So start this loop at m->next. */
1873 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1874 if (m
!= m1
&& m1
->match
== 0
1876 && regs
->array
[m1
->regno
].n_times_set
== 1
1877 && m1
->regno
>= FIRST_PSEUDO_REGISTER
1878 /* A reg used outside the loop mustn't be eliminated. */
1880 /* A reg used for zero-extending mustn't be eliminated. */
1882 && (matched_regs
[m1
->regno
]
1885 /* Can combine regs with different modes loaded from the
1886 same constant only if the modes are the same or
1887 if both are integer modes with M wider or the same
1888 width as M1. The check for integer is redundant, but
1889 safe, since the only case of differing destination
1890 modes with equal sources is when both sources are
1891 VOIDmode, i.e., CONST_INT. */
1892 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1893 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1894 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1895 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1896 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1897 /* See if the source of M1 says it matches M. */
1898 && ((REG_P (m1
->set_src
)
1899 && matched_regs
[REGNO (m1
->set_src
)])
1900 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1902 && ((m
->dependencies
== m1
->dependencies
)
1903 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1905 m
->lifetime
+= m1
->lifetime
;
1906 m
->savings
+= m1
->savings
;
1909 matched_regs
[m1
->regno
] = 1;
1913 /* Now combine the regs used for zero-extension.
1914 This can be done for those not marked `global'
1915 provided their lives don't overlap. */
1917 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1918 mode
= GET_MODE_WIDER_MODE (mode
))
1920 struct movable
*m0
= 0;
1922 /* Combine all the registers for extension from mode MODE.
1923 Don't combine any that are used outside this loop. */
1924 for (m
= movables
->head
; m
; m
= m
->next
)
1925 if (m
->partial
&& ! m
->global
1926 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1930 int first
= REGNO_FIRST_LUID (m
->regno
);
1931 int last
= REGNO_LAST_LUID (m
->regno
);
1935 /* First one: don't check for overlap, just record it. */
1940 /* Make sure they extend to the same mode.
1941 (Almost always true.) */
1942 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1945 /* We already have one: check for overlap with those
1946 already combined together. */
1947 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1948 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1949 if (! (REGNO_FIRST_LUID (m1
->regno
) > last
1950 || REGNO_LAST_LUID (m1
->regno
) < first
))
1953 /* No overlap: we can combine this with the others. */
1954 m0
->lifetime
+= m
->lifetime
;
1955 m0
->savings
+= m
->savings
;
1965 free (matched_regs
);
1968 /* Returns the number of movable instructions in LOOP that were not
1969 moved outside the loop. */
1972 num_unmoved_movables (const struct loop
*loop
)
1977 for (m
= LOOP_MOVABLES (loop
)->head
; m
; m
= m
->next
)
1985 /* Return 1 if regs X and Y will become the same if moved. */
1988 regs_match_p (rtx x
, rtx y
, struct loop_movables
*movables
)
1990 unsigned int xn
= REGNO (x
);
1991 unsigned int yn
= REGNO (y
);
1992 struct movable
*mx
, *my
;
1994 for (mx
= movables
->head
; mx
; mx
= mx
->next
)
1995 if (mx
->regno
== xn
)
1998 for (my
= movables
->head
; my
; my
= my
->next
)
1999 if (my
->regno
== yn
)
2003 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
2005 || mx
== my
->match
));
2008 /* Return 1 if X and Y are identical-looking rtx's.
2009 This is the Lisp function EQUAL for rtx arguments.
2011 If two registers are matching movables or a movable register and an
2012 equivalent constant, consider them equal. */
2015 rtx_equal_for_loop_p (rtx x
, rtx y
, struct loop_movables
*movables
,
2016 struct loop_regs
*regs
)
2026 if (x
== 0 || y
== 0)
2029 code
= GET_CODE (x
);
2031 /* If we have a register and a constant, they may sometimes be
2033 if (REG_P (x
) && regs
->array
[REGNO (x
)].set_in_loop
== -2
2036 for (m
= movables
->head
; m
; m
= m
->next
)
2037 if (m
->move_insn
&& m
->regno
== REGNO (x
)
2038 && rtx_equal_p (m
->set_src
, y
))
2041 else if (REG_P (y
) && regs
->array
[REGNO (y
)].set_in_loop
== -2
2044 for (m
= movables
->head
; m
; m
= m
->next
)
2045 if (m
->move_insn
&& m
->regno
== REGNO (y
)
2046 && rtx_equal_p (m
->set_src
, x
))
2050 /* Otherwise, rtx's of different codes cannot be equal. */
2051 if (code
!= GET_CODE (y
))
2054 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
2055 (REG:SI x) and (REG:HI x) are NOT equivalent. */
2057 if (GET_MODE (x
) != GET_MODE (y
))
2060 /* These three types of rtx's can be compared nonrecursively. */
2062 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
2064 if (code
== LABEL_REF
)
2065 return XEXP (x
, 0) == XEXP (y
, 0);
2066 if (code
== SYMBOL_REF
)
2067 return XSTR (x
, 0) == XSTR (y
, 0);
2069 /* Compare the elements. If any pair of corresponding elements
2070 fail to match, return 0 for the whole things. */
2072 fmt
= GET_RTX_FORMAT (code
);
2073 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2078 if (XWINT (x
, i
) != XWINT (y
, i
))
2083 if (XINT (x
, i
) != XINT (y
, i
))
2088 /* Two vectors must have the same length. */
2089 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2092 /* And the corresponding elements must match. */
2093 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2094 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2095 movables
, regs
) == 0)
2100 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
, regs
)
2106 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2111 /* These are just backpointers, so they don't matter. */
2117 /* It is believed that rtx's at this level will never
2118 contain anything but integers and other rtx's,
2119 except for within LABEL_REFs and SYMBOL_REFs. */
2127 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
2128 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
2129 references is incremented once for each added note. */
2132 add_label_notes (rtx x
, rtx insns
)
2134 enum rtx_code code
= GET_CODE (x
);
2139 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
2141 /* This code used to ignore labels that referred to dispatch tables to
2142 avoid flow generating (slightly) worse code.
2144 We no longer ignore such label references (see LABEL_REF handling in
2145 mark_jump_label for additional information). */
2146 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2147 if (reg_mentioned_p (XEXP (x
, 0), insn
))
2149 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
, XEXP (x
, 0),
2151 if (LABEL_P (XEXP (x
, 0)))
2152 LABEL_NUSES (XEXP (x
, 0))++;
2156 fmt
= GET_RTX_FORMAT (code
);
2157 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2160 add_label_notes (XEXP (x
, i
), insns
);
2161 else if (fmt
[i
] == 'E')
2162 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2163 add_label_notes (XVECEXP (x
, i
, j
), insns
);
2167 /* Scan MOVABLES, and move the insns that deserve to be moved.
2168 If two matching movables are combined, replace one reg with the
2169 other throughout. */
2172 move_movables (struct loop
*loop
, struct loop_movables
*movables
,
2173 int threshold
, int insn_count
)
2175 struct loop_regs
*regs
= LOOP_REGS (loop
);
2176 int nregs
= regs
->num
;
2180 rtx loop_start
= loop
->start
;
2181 rtx loop_end
= loop
->end
;
2182 /* Map of pseudo-register replacements to handle combining
2183 when we move several insns that load the same value
2184 into different pseudo-registers. */
2185 rtx
*reg_map
= xcalloc (nregs
, sizeof (rtx
));
2186 char *already_moved
= xcalloc (nregs
, sizeof (char));
2188 for (m
= movables
->head
; m
; m
= m
->next
)
2190 /* Describe this movable insn. */
2192 if (loop_dump_stream
)
2194 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
2195 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
2197 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
2199 fprintf (loop_dump_stream
, "cond ");
2201 fprintf (loop_dump_stream
, "force ");
2203 fprintf (loop_dump_stream
, "global ");
2205 fprintf (loop_dump_stream
, "done ");
2207 fprintf (loop_dump_stream
, "move-insn ");
2209 fprintf (loop_dump_stream
, "matches %d ",
2210 INSN_UID (m
->match
->insn
));
2212 fprintf (loop_dump_stream
, "forces %d ",
2213 INSN_UID (m
->forces
->insn
));
2216 /* Ignore the insn if it's already done (it matched something else).
2217 Otherwise, see if it is now safe to move. */
2221 || (1 == loop_invariant_p (loop
, m
->set_src
)
2222 && (m
->dependencies
== 0
2223 || 1 == loop_invariant_p (loop
, m
->dependencies
))
2225 || 1 == consec_sets_invariant_p (loop
, m
->set_dest
,
2228 && (! m
->forces
|| m
->forces
->done
))
2232 int savings
= m
->savings
;
2234 /* We have an insn that is safe to move.
2235 Compute its desirability. */
2240 if (loop_dump_stream
)
2241 fprintf (loop_dump_stream
, "savings %d ", savings
);
2243 if (regs
->array
[regno
].moved_once
&& loop_dump_stream
)
2244 fprintf (loop_dump_stream
, "halved since already moved ");
2246 /* An insn MUST be moved if we already moved something else
2247 which is safe only if this one is moved too: that is,
2248 if already_moved[REGNO] is nonzero. */
2250 /* An insn is desirable to move if the new lifetime of the
2251 register is no more than THRESHOLD times the old lifetime.
2252 If it's not desirable, it means the loop is so big
2253 that moving won't speed things up much,
2254 and it is liable to make register usage worse. */
2256 /* It is also desirable to move if it can be moved at no
2257 extra cost because something else was already moved. */
2259 if (already_moved
[regno
]
2260 || (threshold
* savings
* m
->lifetime
) >=
2261 (regs
->array
[regno
].moved_once
? insn_count
* 2 : insn_count
)
2262 || (m
->forces
&& m
->forces
->done
2263 && regs
->array
[m
->forces
->regno
].n_times_set
== 1))
2267 rtx first
= NULL_RTX
;
2268 rtx newreg
= NULL_RTX
;
2271 newreg
= gen_reg_rtx (GET_MODE (m
->set_dest
));
2273 /* Now move the insns that set the reg. */
2275 if (m
->partial
&& m
->match
)
2279 /* Find the end of this chain of matching regs.
2280 Thus, we load each reg in the chain from that one reg.
2281 And that reg is loaded with 0 directly,
2282 since it has ->match == 0. */
2283 for (m1
= m
; m1
->match
; m1
= m1
->match
);
2284 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
2285 SET_DEST (PATTERN (m1
->insn
)));
2286 i1
= loop_insn_hoist (loop
, newpat
);
2288 /* Mark the moved, invariant reg as being allowed to
2289 share a hard reg with the other matching invariant. */
2290 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
2291 r1
= SET_DEST (PATTERN (m
->insn
));
2292 r2
= SET_DEST (PATTERN (m1
->insn
));
2294 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
2295 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
2297 delete_insn (m
->insn
);
2302 if (loop_dump_stream
)
2303 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
2305 /* If we are to re-generate the item being moved with a
2306 new move insn, first delete what we have and then emit
2307 the move insn before the loop. */
2308 else if (m
->move_insn
)
2312 for (count
= m
->consec
; count
>= 0; count
--)
2316 /* If this is the first insn of a library
2317 call sequence, something is very
2319 gcc_assert (!find_reg_note
2320 (p
, REG_LIBCALL
, NULL_RTX
));
2322 /* If this is the last insn of a libcall
2323 sequence, then delete every insn in the
2324 sequence except the last. The last insn
2325 is handled in the normal manner. */
2326 temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
);
2330 temp
= XEXP (temp
, 0);
2332 temp
= delete_insn (temp
);
2337 p
= delete_insn (p
);
2339 /* simplify_giv_expr expects that it can walk the insns
2340 at m->insn forwards and see this old sequence we are
2341 tossing here. delete_insn does preserve the next
2342 pointers, but when we skip over a NOTE we must fix
2343 it up. Otherwise that code walks into the non-deleted
2345 while (p
&& NOTE_P (p
))
2346 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2350 /* Replace the original insn with a move from
2351 our newly created temp. */
2353 emit_move_insn (m
->set_dest
, newreg
);
2356 emit_insn_before (seq
, p
);
2361 emit_move_insn (m
->insert_temp
? newreg
: m
->set_dest
,
2366 add_label_notes (m
->set_src
, seq
);
2368 i1
= loop_insn_hoist (loop
, seq
);
2369 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2370 set_unique_reg_note (i1
,
2371 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
2374 if (loop_dump_stream
)
2375 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
2377 /* The more regs we move, the less we like moving them. */
2382 for (count
= m
->consec
; count
>= 0; count
--)
2386 /* If first insn of libcall sequence, skip to end. */
2387 /* Do this at start of loop, since p is guaranteed to
2390 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2393 /* If last insn of libcall sequence, move all
2394 insns except the last before the loop. The last
2395 insn is handled in the normal manner. */
2397 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
2401 rtx fn_address_insn
= 0;
2404 for (temp
= XEXP (temp
, 0); temp
!= p
;
2405 temp
= NEXT_INSN (temp
))
2414 body
= PATTERN (temp
);
2416 /* Find the next insn after TEMP,
2417 not counting USE or NOTE insns. */
2418 for (next
= NEXT_INSN (temp
); next
!= p
;
2419 next
= NEXT_INSN (next
))
2420 if (! (NONJUMP_INSN_P (next
)
2421 && GET_CODE (PATTERN (next
)) == USE
)
2425 /* If that is the call, this may be the insn
2426 that loads the function address.
2428 Extract the function address from the insn
2429 that loads it into a register.
2430 If this insn was cse'd, we get incorrect code.
2432 So emit a new move insn that copies the
2433 function address into the register that the
2434 call insn will use. flow.c will delete any
2435 redundant stores that we have created. */
2437 && GET_CODE (body
) == SET
2438 && REG_P (SET_DEST (body
))
2439 && (n
= find_reg_note (temp
, REG_EQUAL
,
2442 fn_reg
= SET_SRC (body
);
2443 if (!REG_P (fn_reg
))
2444 fn_reg
= SET_DEST (body
);
2445 fn_address
= XEXP (n
, 0);
2446 fn_address_insn
= temp
;
2448 /* We have the call insn.
2449 If it uses the register we suspect it might,
2450 load it with the correct address directly. */
2453 && reg_referenced_p (fn_reg
, body
))
2454 loop_insn_emit_after (loop
, 0, fn_address_insn
,
2456 (fn_reg
, fn_address
));
2460 i1
= loop_call_insn_hoist (loop
, body
);
2461 /* Because the USAGE information potentially
2462 contains objects other than hard registers
2463 we need to copy it. */
2464 if (CALL_INSN_FUNCTION_USAGE (temp
))
2465 CALL_INSN_FUNCTION_USAGE (i1
)
2466 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2469 i1
= loop_insn_hoist (loop
, body
);
2472 if (temp
== fn_address_insn
)
2473 fn_address_insn
= i1
;
2474 REG_NOTES (i1
) = REG_NOTES (temp
);
2475 REG_NOTES (temp
) = NULL
;
2481 if (m
->savemode
!= VOIDmode
)
2483 /* P sets REG to zero; but we should clear only
2484 the bits that are not covered by the mode
2486 rtx reg
= m
->set_dest
;
2491 tem
= expand_simple_binop
2492 (GET_MODE (reg
), AND
, reg
,
2493 GEN_INT ((((HOST_WIDE_INT
) 1
2494 << GET_MODE_BITSIZE (m
->savemode
)))
2496 reg
, 1, OPTAB_LIB_WIDEN
);
2499 emit_move_insn (reg
, tem
);
2500 sequence
= get_insns ();
2502 i1
= loop_insn_hoist (loop
, sequence
);
2504 else if (CALL_P (p
))
2506 i1
= loop_call_insn_hoist (loop
, PATTERN (p
));
2507 /* Because the USAGE information potentially
2508 contains objects other than hard registers
2509 we need to copy it. */
2510 if (CALL_INSN_FUNCTION_USAGE (p
))
2511 CALL_INSN_FUNCTION_USAGE (i1
)
2512 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2514 else if (count
== m
->consec
&& m
->move_insn_first
)
2517 /* The SET_SRC might not be invariant, so we must
2518 use the REG_EQUAL note. */
2520 emit_move_insn (m
->insert_temp
? newreg
: m
->set_dest
,
2525 add_label_notes (m
->set_src
, seq
);
2527 i1
= loop_insn_hoist (loop
, seq
);
2528 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2529 set_unique_reg_note (i1
, m
->is_equiv
? REG_EQUIV
2530 : REG_EQUAL
, m
->set_src
);
2532 else if (m
->insert_temp
)
2534 rtx
*reg_map2
= xcalloc (REGNO (newreg
),
2536 reg_map2
[m
->regno
] = newreg
;
2538 i1
= loop_insn_hoist (loop
, copy_rtx (PATTERN (p
)));
2539 replace_regs (i1
, reg_map2
, REGNO (newreg
), 1);
2543 i1
= loop_insn_hoist (loop
, PATTERN (p
));
2545 if (REG_NOTES (i1
) == 0)
2547 REG_NOTES (i1
) = REG_NOTES (p
);
2548 REG_NOTES (p
) = NULL
;
2550 /* If there is a REG_EQUAL note present whose value
2551 is not loop invariant, then delete it, since it
2552 may cause problems with later optimization passes.
2553 It is possible for cse to create such notes
2554 like this as a result of record_jump_cond. */
2556 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2557 && ! loop_invariant_p (loop
, XEXP (temp
, 0)))
2558 remove_note (i1
, temp
);
2564 if (loop_dump_stream
)
2565 fprintf (loop_dump_stream
, " moved to %d",
2568 /* If library call, now fix the REG_NOTES that contain
2569 insn pointers, namely REG_LIBCALL on FIRST
2570 and REG_RETVAL on I1. */
2571 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2573 XEXP (temp
, 0) = first
;
2574 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2575 XEXP (temp
, 0) = i1
;
2582 /* simplify_giv_expr expects that it can walk the insns
2583 at m->insn forwards and see this old sequence we are
2584 tossing here. delete_insn does preserve the next
2585 pointers, but when we skip over a NOTE we must fix
2586 it up. Otherwise that code walks into the non-deleted
2588 while (p
&& NOTE_P (p
))
2589 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2594 /* Replace the original insn with a move from
2595 our newly created temp. */
2597 emit_move_insn (m
->set_dest
, newreg
);
2600 emit_insn_before (seq
, p
);
2604 /* The more regs we move, the less we like moving them. */
2610 if (!m
->insert_temp
)
2612 /* Any other movable that loads the same register
2614 already_moved
[regno
] = 1;
2616 /* This reg has been moved out of one loop. */
2617 regs
->array
[regno
].moved_once
= 1;
2619 /* The reg set here is now invariant. */
2623 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, m
->set_dest
); i
++)
2624 regs
->array
[regno
+i
].set_in_loop
= 0;
2627 /* Change the length-of-life info for the register
2628 to say it lives at least the full length of this loop.
2629 This will help guide optimizations in outer loops. */
2631 if (REGNO_FIRST_LUID (regno
) > INSN_LUID (loop_start
))
2632 /* This is the old insn before all the moved insns.
2633 We can't use the moved insn because it is out of range
2634 in uid_luid. Only the old insns have luids. */
2635 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2636 if (REGNO_LAST_LUID (regno
) < INSN_LUID (loop_end
))
2637 REGNO_LAST_UID (regno
) = INSN_UID (loop_end
);
2640 /* Combine with this moved insn any other matching movables. */
2643 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
2648 /* Schedule the reg loaded by M1
2649 for replacement so that shares the reg of M.
2650 If the modes differ (only possible in restricted
2651 circumstances, make a SUBREG.
2653 Note this assumes that the target dependent files
2654 treat REG and SUBREG equally, including within
2655 GO_IF_LEGITIMATE_ADDRESS and in all the
2656 predicates since we never verify that replacing the
2657 original register with a SUBREG results in a
2658 recognizable insn. */
2659 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2660 reg_map
[m1
->regno
] = m
->set_dest
;
2663 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2666 /* Get rid of the matching insn
2667 and prevent further processing of it. */
2670 /* If library call, delete all insns. */
2671 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2673 delete_insn_chain (XEXP (temp
, 0), m1
->insn
);
2675 delete_insn (m1
->insn
);
2677 /* Any other movable that loads the same register
2679 already_moved
[m1
->regno
] = 1;
2681 /* The reg merged here is now invariant,
2682 if the reg it matches is invariant. */
2687 i
< LOOP_REGNO_NREGS (regno
, m1
->set_dest
);
2689 regs
->array
[m1
->regno
+i
].set_in_loop
= 0;
2693 else if (loop_dump_stream
)
2694 fprintf (loop_dump_stream
, "not desirable");
2696 else if (loop_dump_stream
&& !m
->match
)
2697 fprintf (loop_dump_stream
, "not safe");
2699 if (loop_dump_stream
)
2700 fprintf (loop_dump_stream
, "\n");
2704 new_start
= loop_start
;
2706 /* Go through all the instructions in the loop, making
2707 all the register substitutions scheduled in REG_MAP. */
2708 for (p
= new_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
2711 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2712 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2718 free (already_moved
);
2723 loop_movables_add (struct loop_movables
*movables
, struct movable
*m
)
2725 if (movables
->head
== 0)
2728 movables
->last
->next
= m
;
2734 loop_movables_free (struct loop_movables
*movables
)
2737 struct movable
*m_next
;
2739 for (m
= movables
->head
; m
; m
= m_next
)
2747 /* Scan X and replace the address of any MEM in it with ADDR.
2748 REG is the address that MEM should have before the replacement. */
2751 replace_call_address (rtx x
, rtx reg
, rtx addr
)
2759 code
= GET_CODE (x
);
2773 /* Short cut for very common case. */
2774 replace_call_address (XEXP (x
, 1), reg
, addr
);
2778 /* Short cut for very common case. */
2779 replace_call_address (XEXP (x
, 0), reg
, addr
);
2783 /* If this MEM uses a reg other than the one we expected,
2784 something is wrong. */
2785 gcc_assert (XEXP (x
, 0) == reg
);
2793 fmt
= GET_RTX_FORMAT (code
);
2794 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2797 replace_call_address (XEXP (x
, i
), reg
, addr
);
2798 else if (fmt
[i
] == 'E')
2801 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2802 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2808 /* Return the number of memory refs to addresses that vary
2812 count_nonfixed_reads (const struct loop
*loop
, rtx x
)
2822 code
= GET_CODE (x
);
2836 return ((loop_invariant_p (loop
, XEXP (x
, 0)) != 1)
2837 + count_nonfixed_reads (loop
, XEXP (x
, 0)));
2844 fmt
= GET_RTX_FORMAT (code
);
2845 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2848 value
+= count_nonfixed_reads (loop
, XEXP (x
, i
));
2852 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2853 value
+= count_nonfixed_reads (loop
, XVECEXP (x
, i
, j
));
2859 /* Scan a loop setting the elements `loops_enclosed',
2860 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2861 `unknown_address_altered', `unknown_constant_address_altered', and
2862 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2863 list `store_mems' in LOOP. */
2866 prescan_loop (struct loop
*loop
)
2870 struct loop_info
*loop_info
= LOOP_INFO (loop
);
2871 rtx start
= loop
->start
;
2872 rtx end
= loop
->end
;
2873 /* The label after END. Jumping here is just like falling off the
2874 end of the loop. We use next_nonnote_insn instead of next_label
2875 as a hedge against the (pathological) case where some actual insn
2876 might end up between the two. */
2877 rtx exit_target
= next_nonnote_insn (end
);
2879 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2880 loop_info
->pre_header_has_call
= 0;
2881 loop_info
->has_call
= 0;
2882 loop_info
->has_nonconst_call
= 0;
2883 loop_info
->has_prefetch
= 0;
2884 loop_info
->has_volatile
= 0;
2885 loop_info
->has_tablejump
= 0;
2886 loop_info
->has_multiple_exit_targets
= 0;
2889 loop_info
->unknown_address_altered
= 0;
2890 loop_info
->unknown_constant_address_altered
= 0;
2891 loop_info
->store_mems
= NULL_RTX
;
2892 loop_info
->first_loop_store_insn
= NULL_RTX
;
2893 loop_info
->mems_idx
= 0;
2894 loop_info
->num_mem_sets
= 0;
2896 for (insn
= start
; insn
&& !LABEL_P (insn
);
2897 insn
= PREV_INSN (insn
))
2901 loop_info
->pre_header_has_call
= 1;
2906 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2907 insn
= NEXT_INSN (insn
))
2909 switch (GET_CODE (insn
))
2912 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2915 /* Count number of loops contained in this one. */
2918 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2923 if (! CONST_OR_PURE_CALL_P (insn
))
2925 loop_info
->unknown_address_altered
= 1;
2926 loop_info
->has_nonconst_call
= 1;
2928 else if (pure_call_p (insn
))
2929 loop_info
->has_nonconst_call
= 1;
2930 loop_info
->has_call
= 1;
2931 if (can_throw_internal (insn
))
2932 loop_info
->has_multiple_exit_targets
= 1;
2936 if (! loop_info
->has_multiple_exit_targets
)
2938 rtx set
= pc_set (insn
);
2942 rtx src
= SET_SRC (set
);
2945 if (GET_CODE (src
) == IF_THEN_ELSE
)
2947 label1
= XEXP (src
, 1);
2948 label2
= XEXP (src
, 2);
2958 if (label1
&& label1
!= pc_rtx
)
2960 if (GET_CODE (label1
) != LABEL_REF
)
2962 /* Something tricky. */
2963 loop_info
->has_multiple_exit_targets
= 1;
2966 else if (XEXP (label1
, 0) != exit_target
2967 && LABEL_OUTSIDE_LOOP_P (label1
))
2969 /* A jump outside the current loop. */
2970 loop_info
->has_multiple_exit_targets
= 1;
2982 /* A return, or something tricky. */
2983 loop_info
->has_multiple_exit_targets
= 1;
2989 if (volatile_refs_p (PATTERN (insn
)))
2990 loop_info
->has_volatile
= 1;
2993 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2994 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2995 loop_info
->has_tablejump
= 1;
2997 note_stores (PATTERN (insn
), note_addr_stored
, loop_info
);
2998 if (! loop_info
->first_loop_store_insn
&& loop_info
->store_mems
)
2999 loop_info
->first_loop_store_insn
= insn
;
3001 if (flag_non_call_exceptions
&& can_throw_internal (insn
))
3002 loop_info
->has_multiple_exit_targets
= 1;
3010 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
3011 if (/* An exception thrown by a called function might land us
3013 ! loop_info
->has_nonconst_call
3014 /* We don't want loads for MEMs moved to a location before the
3015 one at which their stack memory becomes allocated. (Note
3016 that this is not a problem for malloc, etc., since those
3017 require actual function calls. */
3018 && ! current_function_calls_alloca
3019 /* There are ways to leave the loop other than falling off the
3021 && ! loop_info
->has_multiple_exit_targets
)
3022 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
3023 insn
= NEXT_INSN (insn
))
3024 for_each_rtx (&insn
, insert_loop_mem
, loop_info
);
3026 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
3027 that loop_invariant_p and load_mems can use true_dependence
3028 to determine what is really clobbered. */
3029 if (loop_info
->unknown_address_altered
)
3031 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
3033 loop_info
->store_mems
3034 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
3036 if (loop_info
->unknown_constant_address_altered
)
3038 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
3039 MEM_READONLY_P (mem
) = 1;
3040 loop_info
->store_mems
3041 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
3045 /* Invalidate all loops containing LABEL. */
3048 invalidate_loops_containing_label (rtx label
)
3051 for (loop
= uid_loop
[INSN_UID (label
)]; loop
; loop
= loop
->outer
)
3055 /* Scan the function looking for loops. Record the start and end of each loop.
3056 Also mark as invalid loops any loops that contain a setjmp or are branched
3057 to from outside the loop. */
3060 find_and_verify_loops (rtx f
, struct loops
*loops
)
3065 struct loop
*current_loop
;
3066 struct loop
*next_loop
;
3069 num_loops
= loops
->num
;
3071 compute_luids (f
, NULL_RTX
, 0);
3073 /* If there are jumps to undefined labels,
3074 treat them as jumps out of any/all loops.
3075 This also avoids writing past end of tables when there are no loops. */
3078 /* Find boundaries of loops, mark which loops are contained within
3079 loops, and invalidate loops that have setjmp. */
3082 current_loop
= NULL
;
3083 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
3086 switch (NOTE_LINE_NUMBER (insn
))
3088 case NOTE_INSN_LOOP_BEG
:
3089 next_loop
= loops
->array
+ num_loops
;
3090 next_loop
->num
= num_loops
;
3092 next_loop
->start
= insn
;
3093 next_loop
->outer
= current_loop
;
3094 current_loop
= next_loop
;
3097 case NOTE_INSN_LOOP_END
:
3098 gcc_assert (current_loop
);
3100 current_loop
->end
= insn
;
3101 current_loop
= current_loop
->outer
;
3109 && find_reg_note (insn
, REG_SETJMP
, NULL
))
3111 /* In this case, we must invalidate our current loop and any
3113 for (loop
= current_loop
; loop
; loop
= loop
->outer
)
3116 if (loop_dump_stream
)
3117 fprintf (loop_dump_stream
,
3118 "\nLoop at %d ignored due to setjmp.\n",
3119 INSN_UID (loop
->start
));
3123 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
3124 enclosing loop, but this doesn't matter. */
3125 uid_loop
[INSN_UID (insn
)] = current_loop
;
3128 /* Any loop containing a label used in an initializer must be invalidated,
3129 because it can be jumped into from anywhere. */
3130 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
3131 invalidate_loops_containing_label (XEXP (label
, 0));
3133 /* Any loop containing a label used for an exception handler must be
3134 invalidated, because it can be jumped into from anywhere. */
3135 for_each_eh_label (invalidate_loops_containing_label
);
3137 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
3138 loop that it is not contained within, that loop is marked invalid.
3139 If any INSN or CALL_INSN uses a label's address, then the loop containing
3140 that label is marked invalid, because it could be jumped into from
3143 Also look for blocks of code ending in an unconditional branch that
3144 exits the loop. If such a block is surrounded by a conditional
3145 branch around the block, move the block elsewhere (see below) and
3146 invert the jump to point to the code block. This may eliminate a
3147 label in our loop and will simplify processing by both us and a
3148 possible second cse pass. */
3150 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
3153 struct loop
*this_loop
= uid_loop
[INSN_UID (insn
)];
3155 if (NONJUMP_INSN_P (insn
) || CALL_P (insn
))
3157 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
3159 invalidate_loops_containing_label (XEXP (note
, 0));
3165 mark_loop_jump (PATTERN (insn
), this_loop
);
3167 /* See if this is an unconditional branch outside the loop. */
3169 && (GET_CODE (PATTERN (insn
)) == RETURN
3170 || (any_uncondjump_p (insn
)
3171 && onlyjump_p (insn
)
3172 && (uid_loop
[INSN_UID (JUMP_LABEL (insn
))]
3174 && get_max_uid () < max_uid_for_loop
)
3177 rtx our_next
= next_real_insn (insn
);
3178 rtx last_insn_to_move
= NEXT_INSN (insn
);
3179 struct loop
*dest_loop
;
3180 struct loop
*outer_loop
= NULL
;
3182 /* Go backwards until we reach the start of the loop, a label,
3184 for (p
= PREV_INSN (insn
);
3187 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3192 /* Check for the case where we have a jump to an inner nested
3193 loop, and do not perform the optimization in that case. */
3195 if (JUMP_LABEL (insn
))
3197 dest_loop
= uid_loop
[INSN_UID (JUMP_LABEL (insn
))];
3200 for (outer_loop
= dest_loop
; outer_loop
;
3201 outer_loop
= outer_loop
->outer
)
3202 if (outer_loop
== this_loop
)
3207 /* Make sure that the target of P is within the current loop. */
3209 if (JUMP_P (p
) && JUMP_LABEL (p
)
3210 && uid_loop
[INSN_UID (JUMP_LABEL (p
))] != this_loop
)
3211 outer_loop
= this_loop
;
3213 /* If we stopped on a JUMP_INSN to the next insn after INSN,
3214 we have a block of code to try to move.
3216 We look backward and then forward from the target of INSN
3217 to find a BARRIER at the same loop depth as the target.
3218 If we find such a BARRIER, we make a new label for the start
3219 of the block, invert the jump in P and point it to that label,
3220 and move the block of code to the spot we found. */
3224 && JUMP_LABEL (p
) != 0
3225 /* Just ignore jumps to labels that were never emitted.
3226 These always indicate compilation errors. */
3227 && INSN_UID (JUMP_LABEL (p
)) != 0
3228 && any_condjump_p (p
) && onlyjump_p (p
)
3229 && next_real_insn (JUMP_LABEL (p
)) == our_next
3230 /* If it's not safe to move the sequence, then we
3232 && insns_safe_to_move_p (p
, NEXT_INSN (insn
),
3233 &last_insn_to_move
))
3236 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
3237 struct loop
*target_loop
= uid_loop
[INSN_UID (target
)];
3241 /* Search for possible garbage past the conditional jumps
3242 and look for the last barrier. */
3243 for (tmp
= last_insn_to_move
;
3244 tmp
&& !LABEL_P (tmp
); tmp
= NEXT_INSN (tmp
))
3245 if (BARRIER_P (tmp
))
3246 last_insn_to_move
= tmp
;
3248 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
3250 /* Don't move things inside a tablejump. */
3251 && ((loc2
= next_nonnote_insn (loc
)) == 0
3253 || (loc2
= next_nonnote_insn (loc2
)) == 0
3255 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
3256 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
3257 && uid_loop
[INSN_UID (loc
)] == target_loop
)
3261 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
3263 /* Don't move things inside a tablejump. */
3264 && ((loc2
= next_nonnote_insn (loc
)) == 0
3266 || (loc2
= next_nonnote_insn (loc2
)) == 0
3268 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
3269 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
3270 && uid_loop
[INSN_UID (loc
)] == target_loop
)
3275 rtx cond_label
= JUMP_LABEL (p
);
3276 rtx new_label
= get_label_after (p
);
3278 /* Ensure our label doesn't go away. */
3279 LABEL_NUSES (cond_label
)++;
3281 /* Verify that uid_loop is large enough and that
3283 if (invert_jump (p
, new_label
, 1))
3288 /* If no suitable BARRIER was found, create a suitable
3289 one before TARGET. Since TARGET is a fall through
3290 path, we'll need to insert a jump around our block
3291 and add a BARRIER before TARGET.
3293 This creates an extra unconditional jump outside
3294 the loop. However, the benefits of removing rarely
3295 executed instructions from inside the loop usually
3296 outweighs the cost of the extra unconditional jump
3297 outside the loop. */
3302 temp
= gen_jump (JUMP_LABEL (insn
));
3303 temp
= emit_jump_insn_before (temp
, target
);
3304 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
3305 LABEL_NUSES (JUMP_LABEL (insn
))++;
3306 loc
= emit_barrier_before (target
);
3309 /* Include the BARRIER after INSN and copy the
3311 only_notes
= squeeze_notes (&new_label
,
3312 &last_insn_to_move
);
3313 gcc_assert (!only_notes
);
3315 reorder_insns (new_label
, last_insn_to_move
, loc
);
3317 /* All those insns are now in TARGET_LOOP. */
3319 q
!= NEXT_INSN (last_insn_to_move
);
3321 uid_loop
[INSN_UID (q
)] = target_loop
;
3323 /* The label jumped to by INSN is no longer a loop
3324 exit. Unless INSN does not have a label (e.g.,
3325 it is a RETURN insn), search loop->exit_labels
3326 to find its label_ref, and remove it. Also turn
3327 off LABEL_OUTSIDE_LOOP_P bit. */
3328 if (JUMP_LABEL (insn
))
3330 for (q
= 0, r
= this_loop
->exit_labels
;
3332 q
= r
, r
= LABEL_NEXTREF (r
))
3333 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
3335 LABEL_OUTSIDE_LOOP_P (r
) = 0;
3337 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
3339 this_loop
->exit_labels
= LABEL_NEXTREF (r
);
3343 for (loop
= this_loop
; loop
&& loop
!= target_loop
;
3347 /* If we didn't find it, then something is
3352 /* P is now a jump outside the loop, so it must be put
3353 in loop->exit_labels, and marked as such.
3354 The easiest way to do this is to just call
3355 mark_loop_jump again for P. */
3356 mark_loop_jump (PATTERN (p
), this_loop
);
3358 /* If INSN now jumps to the insn after it,
3360 if (JUMP_LABEL (insn
) != 0
3361 && (next_real_insn (JUMP_LABEL (insn
))
3362 == next_real_insn (insn
)))
3363 delete_related_insns (insn
);
3366 /* Continue the loop after where the conditional
3367 branch used to jump, since the only branch insn
3368 in the block (if it still remains) is an inter-loop
3369 branch and hence needs no processing. */
3370 insn
= NEXT_INSN (cond_label
);
3372 if (--LABEL_NUSES (cond_label
) == 0)
3373 delete_related_insns (cond_label
);
3375 /* This loop will be continued with NEXT_INSN (insn). */
3376 insn
= PREV_INSN (insn
);
3383 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3384 loops it is contained in, mark the target loop invalid.
3386 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3389 mark_loop_jump (rtx x
, struct loop
*loop
)
3391 struct loop
*dest_loop
;
3392 struct loop
*outer_loop
;
3395 switch (GET_CODE (x
))
3408 /* There could be a label reference in here. */
3409 mark_loop_jump (XEXP (x
, 0), loop
);
3415 mark_loop_jump (XEXP (x
, 0), loop
);
3416 mark_loop_jump (XEXP (x
, 1), loop
);
3420 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3421 mark_loop_jump (XEXP (x
, 1), loop
);
3426 mark_loop_jump (XEXP (x
, 0), loop
);
3430 dest_loop
= uid_loop
[INSN_UID (XEXP (x
, 0))];
3432 /* Link together all labels that branch outside the loop. This
3433 is used by final_[bg]iv_value and the loop unrolling code. Also
3434 mark this LABEL_REF so we know that this branch should predict
3437 /* A check to make sure the label is not in an inner nested loop,
3438 since this does not count as a loop exit. */
3441 for (outer_loop
= dest_loop
; outer_loop
;
3442 outer_loop
= outer_loop
->outer
)
3443 if (outer_loop
== loop
)
3449 if (loop
&& ! outer_loop
)
3451 LABEL_OUTSIDE_LOOP_P (x
) = 1;
3452 LABEL_NEXTREF (x
) = loop
->exit_labels
;
3453 loop
->exit_labels
= x
;
3455 for (outer_loop
= loop
;
3456 outer_loop
&& outer_loop
!= dest_loop
;
3457 outer_loop
= outer_loop
->outer
)
3458 outer_loop
->exit_count
++;
3461 /* If this is inside a loop, but not in the current loop or one enclosed
3462 by it, it invalidates at least one loop. */
3467 /* We must invalidate every nested loop containing the target of this
3468 label, except those that also contain the jump insn. */
3470 for (; dest_loop
; dest_loop
= dest_loop
->outer
)
3472 /* Stop when we reach a loop that also contains the jump insn. */
3473 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3474 if (dest_loop
== outer_loop
)
3477 /* If we get here, we know we need to invalidate a loop. */
3478 if (loop_dump_stream
&& ! dest_loop
->invalid
)
3479 fprintf (loop_dump_stream
,
3480 "\nLoop at %d ignored due to multiple entry points.\n",
3481 INSN_UID (dest_loop
->start
));
3483 dest_loop
->invalid
= 1;
3488 /* If this is not setting pc, ignore. */
3489 if (SET_DEST (x
) == pc_rtx
)
3490 mark_loop_jump (SET_SRC (x
), loop
);
3494 mark_loop_jump (XEXP (x
, 1), loop
);
3495 mark_loop_jump (XEXP (x
, 2), loop
);
3500 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
3501 mark_loop_jump (XVECEXP (x
, 0, i
), loop
);
3505 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
3506 mark_loop_jump (XVECEXP (x
, 1, i
), loop
);
3510 /* Strictly speaking this is not a jump into the loop, only a possible
3511 jump out of the loop. However, we have no way to link the destination
3512 of this jump onto the list of exit labels. To be safe we mark this
3513 loop and any containing loops as invalid. */
3516 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3518 if (loop_dump_stream
&& ! outer_loop
->invalid
)
3519 fprintf (loop_dump_stream
,
3520 "\nLoop at %d ignored due to unknown exit jump.\n",
3521 INSN_UID (outer_loop
->start
));
3522 outer_loop
->invalid
= 1;
3529 /* Return nonzero if there is a label in the range from
3530 insn INSN to and including the insn whose luid is END
3531 INSN must have an assigned luid (i.e., it must not have
3532 been previously created by loop.c). */
3535 labels_in_range_p (rtx insn
, int end
)
3537 while (insn
&& INSN_LUID (insn
) <= end
)
3541 insn
= NEXT_INSN (insn
);
3547 /* Record that a memory reference X is being set. */
3550 note_addr_stored (rtx x
, rtx y ATTRIBUTE_UNUSED
,
3551 void *data ATTRIBUTE_UNUSED
)
3553 struct loop_info
*loop_info
= data
;
3555 if (x
== 0 || !MEM_P (x
))
3558 /* Count number of memory writes.
3559 This affects heuristics in strength_reduce. */
3560 loop_info
->num_mem_sets
++;
3562 /* BLKmode MEM means all memory is clobbered. */
3563 if (GET_MODE (x
) == BLKmode
)
3565 if (MEM_READONLY_P (x
))
3566 loop_info
->unknown_constant_address_altered
= 1;
3568 loop_info
->unknown_address_altered
= 1;
3573 loop_info
->store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
,
3574 loop_info
->store_mems
);
3577 /* X is a value modified by an INSN that references a biv inside a loop
3578 exit test (i.e., X is somehow related to the value of the biv). If X
3579 is a pseudo that is used more than once, then the biv is (effectively)
3580 used more than once. DATA is a pointer to a loop_regs structure. */
3583 note_set_pseudo_multiple_uses (rtx x
, rtx y ATTRIBUTE_UNUSED
, void *data
)
3585 struct loop_regs
*regs
= (struct loop_regs
*) data
;
3590 while (GET_CODE (x
) == STRICT_LOW_PART
3591 || GET_CODE (x
) == SIGN_EXTRACT
3592 || GET_CODE (x
) == ZERO_EXTRACT
3593 || GET_CODE (x
) == SUBREG
)
3596 if (!REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
)
3599 /* If we do not have usage information, or if we know the register
3600 is used more than once, note that fact for check_dbra_loop. */
3601 if (REGNO (x
) >= max_reg_before_loop
3602 || ! regs
->array
[REGNO (x
)].single_usage
3603 || regs
->array
[REGNO (x
)].single_usage
== const0_rtx
)
3604 regs
->multiple_uses
= 1;
3607 /* Return nonzero if the rtx X is invariant over the current loop.
3609 The value is 2 if we refer to something only conditionally invariant.
3611 A memory ref is invariant if it is not volatile and does not conflict
3612 with anything stored in `loop_info->store_mems'. */
3615 loop_invariant_p (const struct loop
*loop
, rtx x
)
3617 struct loop_info
*loop_info
= LOOP_INFO (loop
);
3618 struct loop_regs
*regs
= LOOP_REGS (loop
);
3622 int conditional
= 0;
3627 code
= GET_CODE (x
);
3641 case UNSPEC_VOLATILE
:
3645 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3646 || x
== arg_pointer_rtx
|| x
== pic_offset_table_rtx
)
3647 && ! current_function_has_nonlocal_goto
)
3650 if (LOOP_INFO (loop
)->has_call
3651 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3654 /* Out-of-range regs can occur when we are called from unrolling.
3655 These registers created by the unroller are set in the loop,
3656 hence are never invariant.
3657 Other out-of-range regs can be generated by load_mems; those that
3658 are written to in the loop are not invariant, while those that are
3659 not written to are invariant. It would be easy for load_mems
3660 to set n_times_set correctly for these registers, however, there
3661 is no easy way to distinguish them from registers created by the
3664 if (REGNO (x
) >= (unsigned) regs
->num
)
3667 if (regs
->array
[REGNO (x
)].set_in_loop
< 0)
3670 return regs
->array
[REGNO (x
)].set_in_loop
== 0;
3673 /* Volatile memory references must be rejected. Do this before
3674 checking for read-only items, so that volatile read-only items
3675 will be rejected also. */
3676 if (MEM_VOLATILE_P (x
))
3679 /* See if there is any dependence between a store and this load. */
3680 mem_list_entry
= loop_info
->store_mems
;
3681 while (mem_list_entry
)
3683 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3687 mem_list_entry
= XEXP (mem_list_entry
, 1);
3690 /* It's not invalidated by a store in memory
3691 but we must still verify the address is invariant. */
3695 /* Don't mess with insns declared volatile. */
3696 if (MEM_VOLATILE_P (x
))
3704 fmt
= GET_RTX_FORMAT (code
);
3705 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3709 int tem
= loop_invariant_p (loop
, XEXP (x
, i
));
3715 else if (fmt
[i
] == 'E')
3718 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3720 int tem
= loop_invariant_p (loop
, XVECEXP (x
, i
, j
));
3730 return 1 + conditional
;
3733 /* Return nonzero if all the insns in the loop that set REG
3734 are INSN and the immediately following insns,
3735 and if each of those insns sets REG in an invariant way
3736 (not counting uses of REG in them).
3738 The value is 2 if some of these insns are only conditionally invariant.
3740 We assume that INSN itself is the first set of REG
3741 and that its source is invariant. */
3744 consec_sets_invariant_p (const struct loop
*loop
, rtx reg
, int n_sets
,
3747 struct loop_regs
*regs
= LOOP_REGS (loop
);
3749 unsigned int regno
= REGNO (reg
);
3751 /* Number of sets we have to insist on finding after INSN. */
3752 int count
= n_sets
- 1;
3753 int old
= regs
->array
[regno
].set_in_loop
;
3757 /* If N_SETS hit the limit, we can't rely on its value. */
3761 regs
->array
[regno
].set_in_loop
= 0;
3769 code
= GET_CODE (p
);
3771 /* If library call, skip to end of it. */
3772 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3777 && (set
= single_set (p
))
3778 && REG_P (SET_DEST (set
))
3779 && REGNO (SET_DEST (set
)) == regno
)
3781 this = loop_invariant_p (loop
, SET_SRC (set
));
3784 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3786 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3787 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3789 this = (CONSTANT_P (XEXP (temp
, 0))
3790 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3791 && loop_invariant_p (loop
, XEXP (temp
, 0))));
3798 else if (code
!= NOTE
)
3800 regs
->array
[regno
].set_in_loop
= old
;
3805 regs
->array
[regno
].set_in_loop
= old
;
3806 /* If loop_invariant_p ever returned 2, we return 2. */
3807 return 1 + (value
& 2);
3810 /* Look at all uses (not sets) of registers in X. For each, if it is
3811 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3812 a different insn, set USAGE[REGNO] to const0_rtx. */
3815 find_single_use_in_loop (struct loop_regs
*regs
, rtx insn
, rtx x
)
3817 enum rtx_code code
= GET_CODE (x
);
3818 const char *fmt
= GET_RTX_FORMAT (code
);
3822 regs
->array
[REGNO (x
)].single_usage
3823 = (regs
->array
[REGNO (x
)].single_usage
!= 0
3824 && regs
->array
[REGNO (x
)].single_usage
!= insn
)
3825 ? const0_rtx
: insn
;
3827 else if (code
== SET
)
3829 /* Don't count SET_DEST if it is a REG; otherwise count things
3830 in SET_DEST because if a register is partially modified, it won't
3831 show up as a potential movable so we don't care how USAGE is set
3833 if (!REG_P (SET_DEST (x
)))
3834 find_single_use_in_loop (regs
, insn
, SET_DEST (x
));
3835 find_single_use_in_loop (regs
, insn
, SET_SRC (x
));
3838 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3840 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3841 find_single_use_in_loop (regs
, insn
, XEXP (x
, i
));
3842 else if (fmt
[i
] == 'E')
3843 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3844 find_single_use_in_loop (regs
, insn
, XVECEXP (x
, i
, j
));
3848 /* Count and record any set in X which is contained in INSN. Update
3849 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3853 count_one_set (struct loop_regs
*regs
, rtx insn
, rtx x
, rtx
*last_set
)
3855 if (GET_CODE (x
) == CLOBBER
&& REG_P (XEXP (x
, 0)))
3856 /* Don't move a reg that has an explicit clobber.
3857 It's not worth the pain to try to do it correctly. */
3858 regs
->array
[REGNO (XEXP (x
, 0))].may_not_optimize
= 1;
3860 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3862 rtx dest
= SET_DEST (x
);
3863 while (GET_CODE (dest
) == SUBREG
3864 || GET_CODE (dest
) == ZERO_EXTRACT
3865 || GET_CODE (dest
) == STRICT_LOW_PART
)
3866 dest
= XEXP (dest
, 0);
3870 int regno
= REGNO (dest
);
3871 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, dest
); i
++)
3873 /* If this is the first setting of this reg
3874 in current basic block, and it was set before,
3875 it must be set in two basic blocks, so it cannot
3876 be moved out of the loop. */
3877 if (regs
->array
[regno
].set_in_loop
> 0
3878 && last_set
[regno
] == 0)
3879 regs
->array
[regno
+i
].may_not_optimize
= 1;
3880 /* If this is not first setting in current basic block,
3881 see if reg was used in between previous one and this.
3882 If so, neither one can be moved. */
3883 if (last_set
[regno
] != 0
3884 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3885 regs
->array
[regno
+i
].may_not_optimize
= 1;
3886 if (regs
->array
[regno
+i
].set_in_loop
< 127)
3887 ++regs
->array
[regno
+i
].set_in_loop
;
3888 last_set
[regno
+i
] = insn
;
3894 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3895 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3896 contained in insn INSN is used by any insn that precedes INSN in
3897 cyclic order starting from the loop entry point.
3899 We don't want to use INSN_LUID here because if we restrict INSN to those
3900 that have a valid INSN_LUID, it means we cannot move an invariant out
3901 from an inner loop past two loops. */
3904 loop_reg_used_before_p (const struct loop
*loop
, rtx set
, rtx insn
)
3906 rtx reg
= SET_DEST (set
);
3909 /* Scan forward checking for register usage. If we hit INSN, we
3910 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3911 for (p
= loop
->scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3913 if (INSN_P (p
) && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3924 /* Information we collect about arrays that we might want to prefetch. */
3925 struct prefetch_info
3927 struct iv_class
*class; /* Class this prefetch is based on. */
3928 struct induction
*giv
; /* GIV this prefetch is based on. */
3929 rtx base_address
; /* Start prefetching from this address plus
3931 HOST_WIDE_INT index
;
3932 HOST_WIDE_INT stride
; /* Prefetch stride in bytes in each
3934 unsigned int bytes_accessed
; /* Sum of sizes of all accesses to this
3935 prefetch area in one iteration. */
3936 unsigned int total_bytes
; /* Total bytes loop will access in this block.
3937 This is set only for loops with known
3938 iteration counts and is 0xffffffff
3940 int prefetch_in_loop
; /* Number of prefetch insns in loop. */
3941 int prefetch_before_loop
; /* Number of prefetch insns before loop. */
3942 unsigned int write
: 1; /* 1 for read/write prefetches. */
3945 /* Data used by check_store function. */
3946 struct check_store_data
3952 static void check_store (rtx
, rtx
, void *);
3953 static void emit_prefetch_instructions (struct loop
*);
3954 static int rtx_equal_for_prefetch_p (rtx
, rtx
);
3956 /* Set mem_write when mem_address is found. Used as callback to
3959 check_store (rtx x
, rtx pat ATTRIBUTE_UNUSED
, void *data
)
3961 struct check_store_data
*d
= (struct check_store_data
*) data
;
3963 if ((MEM_P (x
)) && rtx_equal_p (d
->mem_address
, XEXP (x
, 0)))
3967 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3968 important to get some addresses combined. Later more sophisticated
3969 transformations can be added when necessary.
3971 ??? Same trick with swapping operand is done at several other places.
3972 It can be nice to develop some common way to handle this. */
3975 rtx_equal_for_prefetch_p (rtx x
, rtx y
)
3979 enum rtx_code code
= GET_CODE (x
);
3984 if (code
!= GET_CODE (y
))
3987 if (COMMUTATIVE_ARITH_P (x
))
3989 return ((rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 0))
3990 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 1)))
3991 || (rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 1))
3992 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 0))));
3995 /* Compare the elements. If any pair of corresponding elements fails to
3996 match, return 0 for the whole thing. */
3998 fmt
= GET_RTX_FORMAT (code
);
3999 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4004 if (XWINT (x
, i
) != XWINT (y
, i
))
4009 if (XINT (x
, i
) != XINT (y
, i
))
4014 /* Two vectors must have the same length. */
4015 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
4018 /* And the corresponding elements must match. */
4019 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4020 if (rtx_equal_for_prefetch_p (XVECEXP (x
, i
, j
),
4021 XVECEXP (y
, i
, j
)) == 0)
4026 if (rtx_equal_for_prefetch_p (XEXP (x
, i
), XEXP (y
, i
)) == 0)
4031 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
4036 /* These are just backpointers, so they don't matter. */
4042 /* It is believed that rtx's at this level will never
4043 contain anything but integers and other rtx's,
4044 except for within LABEL_REFs and SYMBOL_REFs. */
4052 /* Remove constant addition value from the expression X (when present)
4055 static HOST_WIDE_INT
4056 remove_constant_addition (rtx
*x
)
4058 HOST_WIDE_INT addval
= 0;
4061 /* Avoid clobbering a shared CONST expression. */
4062 if (GET_CODE (exp
) == CONST
)
4064 if (GET_CODE (XEXP (exp
, 0)) == PLUS
4065 && GET_CODE (XEXP (XEXP (exp
, 0), 0)) == SYMBOL_REF
4066 && GET_CODE (XEXP (XEXP (exp
, 0), 1)) == CONST_INT
)
4068 *x
= XEXP (XEXP (exp
, 0), 0);
4069 return INTVAL (XEXP (XEXP (exp
, 0), 1));
4074 if (GET_CODE (exp
) == CONST_INT
)
4076 addval
= INTVAL (exp
);
4080 /* For plus expression recurse on ourself. */
4081 else if (GET_CODE (exp
) == PLUS
)
4083 addval
+= remove_constant_addition (&XEXP (exp
, 0));
4084 addval
+= remove_constant_addition (&XEXP (exp
, 1));
4086 /* In case our parameter was constant, remove extra zero from the
4088 if (XEXP (exp
, 0) == const0_rtx
)
4090 else if (XEXP (exp
, 1) == const0_rtx
)
4097 /* Attempt to identify accesses to arrays that are most likely to cause cache
4098 misses, and emit prefetch instructions a few prefetch blocks forward.
4100 To detect the arrays we use the GIV information that was collected by the
4101 strength reduction pass.
4103 The prefetch instructions are generated after the GIV information is done
4104 and before the strength reduction process. The new GIVs are injected into
4105 the strength reduction tables, so the prefetch addresses are optimized as
4108 GIVs are split into base address, stride, and constant addition values.
4109 GIVs with the same address, stride and close addition values are combined
4110 into a single prefetch. Also writes to GIVs are detected, so that prefetch
4111 for write instructions can be used for the block we write to, on machines
4112 that support write prefetches.
4114 Several heuristics are used to determine when to prefetch. They are
4115 controlled by defined symbols that can be overridden for each target. */
4118 emit_prefetch_instructions (struct loop
*loop
)
4120 int num_prefetches
= 0;
4121 int num_real_prefetches
= 0;
4122 int num_real_write_prefetches
= 0;
4123 int num_prefetches_before
= 0;
4124 int num_write_prefetches_before
= 0;
4127 struct iv_class
*bl
;
4128 struct induction
*iv
;
4129 struct prefetch_info info
[MAX_PREFETCHES
];
4130 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4132 if (!HAVE_prefetch
|| PREFETCH_BLOCK
== 0)
4135 /* Consider only loops w/o calls. When a call is done, the loop is probably
4136 slow enough to read the memory. */
4137 if (PREFETCH_NO_CALL
&& LOOP_INFO (loop
)->has_call
)
4139 if (loop_dump_stream
)
4140 fprintf (loop_dump_stream
, "Prefetch: ignoring loop: has call.\n");
4145 /* Don't prefetch in loops known to have few iterations. */
4146 if (PREFETCH_NO_LOW_LOOPCNT
4147 && LOOP_INFO (loop
)->n_iterations
4148 && LOOP_INFO (loop
)->n_iterations
<= PREFETCH_LOW_LOOPCNT
)
4150 if (loop_dump_stream
)
4151 fprintf (loop_dump_stream
,
4152 "Prefetch: ignoring loop: not enough iterations.\n");
4156 /* Search all induction variables and pick those interesting for the prefetch
4158 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
4160 struct induction
*biv
= bl
->biv
, *biv1
;
4165 /* Expect all BIVs to be executed in each iteration. This makes our
4166 analysis more conservative. */
4169 /* Discard non-constant additions that we can't handle well yet, and
4170 BIVs that are executed multiple times; such BIVs ought to be
4171 handled in the nested loop. We accept not_every_iteration BIVs,
4172 since these only result in larger strides and make our
4173 heuristics more conservative. */
4174 if (GET_CODE (biv
->add_val
) != CONST_INT
)
4176 if (loop_dump_stream
)
4178 fprintf (loop_dump_stream
,
4179 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
4180 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
4181 print_rtl (loop_dump_stream
, biv
->add_val
);
4182 fprintf (loop_dump_stream
, "\n");
4187 if (biv
->maybe_multiple
)
4189 if (loop_dump_stream
)
4191 fprintf (loop_dump_stream
,
4192 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
4193 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
4194 print_rtl (loop_dump_stream
, biv
->add_val
);
4195 fprintf (loop_dump_stream
, "\n");
4200 basestride
+= INTVAL (biv1
->add_val
);
4201 biv1
= biv1
->next_iv
;
4204 if (biv1
|| !basestride
)
4207 for (iv
= bl
->giv
; iv
; iv
= iv
->next_iv
)
4211 HOST_WIDE_INT index
= 0;
4213 HOST_WIDE_INT stride
= 0;
4214 int stride_sign
= 1;
4215 struct check_store_data d
;
4216 const char *ignore_reason
= NULL
;
4217 int size
= GET_MODE_SIZE (GET_MODE (iv
));
4219 /* See whether an induction variable is interesting to us and if
4220 not, report the reason. */
4221 if (iv
->giv_type
!= DEST_ADDR
)
4222 ignore_reason
= "giv is not a destination address";
4224 /* We are interested only in constant stride memory references
4225 in order to be able to compute density easily. */
4226 else if (GET_CODE (iv
->mult_val
) != CONST_INT
)
4227 ignore_reason
= "stride is not constant";
4231 stride
= INTVAL (iv
->mult_val
) * basestride
;
4238 /* On some targets, reversed order prefetches are not
4240 if (PREFETCH_NO_REVERSE_ORDER
&& stride_sign
< 0)
4241 ignore_reason
= "reversed order stride";
4243 /* Prefetch of accesses with an extreme stride might not be
4244 worthwhile, either. */
4245 else if (PREFETCH_NO_EXTREME_STRIDE
4246 && stride
> PREFETCH_EXTREME_STRIDE
)
4247 ignore_reason
= "extreme stride";
4249 /* Ignore GIVs with varying add values; we can't predict the
4250 value for the next iteration. */
4251 else if (!loop_invariant_p (loop
, iv
->add_val
))
4252 ignore_reason
= "giv has varying add value";
4254 /* Ignore GIVs in the nested loops; they ought to have been
4256 else if (iv
->maybe_multiple
)
4257 ignore_reason
= "giv is in nested loop";
4260 if (ignore_reason
!= NULL
)
4262 if (loop_dump_stream
)
4263 fprintf (loop_dump_stream
,
4264 "Prefetch: ignoring giv at %d: %s.\n",
4265 INSN_UID (iv
->insn
), ignore_reason
);
4269 /* Determine the pointer to the basic array we are examining. It is
4270 the sum of the BIV's initial value and the GIV's add_val. */
4271 address
= copy_rtx (iv
->add_val
);
4272 temp
= copy_rtx (bl
->initial_value
);
4274 address
= simplify_gen_binary (PLUS
, Pmode
, temp
, address
);
4275 index
= remove_constant_addition (&address
);
4278 d
.mem_address
= *iv
->location
;
4280 /* When the GIV is not always executed, we might be better off by
4281 not dirtying the cache pages. */
4282 if (PREFETCH_CONDITIONAL
|| iv
->always_executed
)
4283 note_stores (PATTERN (iv
->insn
), check_store
, &d
);
4286 if (loop_dump_stream
)
4287 fprintf (loop_dump_stream
, "Prefetch: Ignoring giv at %d: %s\n",
4288 INSN_UID (iv
->insn
), "in conditional code.");
4292 /* Attempt to find another prefetch to the same array and see if we
4293 can merge this one. */
4294 for (i
= 0; i
< num_prefetches
; i
++)
4295 if (rtx_equal_for_prefetch_p (address
, info
[i
].base_address
)
4296 && stride
== info
[i
].stride
)
4298 /* In case both access same array (same location
4299 just with small difference in constant indexes), merge
4300 the prefetches. Just do the later and the earlier will
4301 get prefetched from previous iteration.
4302 The artificial threshold should not be too small,
4303 but also not bigger than small portion of memory usually
4304 traversed by single loop. */
4305 if (index
>= info
[i
].index
4306 && index
- info
[i
].index
< PREFETCH_EXTREME_DIFFERENCE
)
4308 info
[i
].write
|= d
.mem_write
;
4309 info
[i
].bytes_accessed
+= size
;
4310 info
[i
].index
= index
;
4313 info
[num_prefetches
].base_address
= address
;
4318 if (index
< info
[i
].index
4319 && info
[i
].index
- index
< PREFETCH_EXTREME_DIFFERENCE
)
4321 info
[i
].write
|= d
.mem_write
;
4322 info
[i
].bytes_accessed
+= size
;
4328 /* Merging failed. */
4331 info
[num_prefetches
].giv
= iv
;
4332 info
[num_prefetches
].class = bl
;
4333 info
[num_prefetches
].index
= index
;
4334 info
[num_prefetches
].stride
= stride
;
4335 info
[num_prefetches
].base_address
= address
;
4336 info
[num_prefetches
].write
= d
.mem_write
;
4337 info
[num_prefetches
].bytes_accessed
= size
;
4339 if (num_prefetches
>= MAX_PREFETCHES
)
4341 if (loop_dump_stream
)
4342 fprintf (loop_dump_stream
,
4343 "Maximal number of prefetches exceeded.\n");
4350 for (i
= 0; i
< num_prefetches
; i
++)
4354 /* Attempt to calculate the total number of bytes fetched by all
4355 iterations of the loop. Avoid overflow. */
4356 if (LOOP_INFO (loop
)->n_iterations
4357 && ((unsigned HOST_WIDE_INT
) (0xffffffff / info
[i
].stride
)
4358 >= LOOP_INFO (loop
)->n_iterations
))
4359 info
[i
].total_bytes
= info
[i
].stride
* LOOP_INFO (loop
)->n_iterations
;
4361 info
[i
].total_bytes
= 0xffffffff;
4363 density
= info
[i
].bytes_accessed
* 100 / info
[i
].stride
;
4365 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4366 if (PREFETCH_ONLY_DENSE_MEM
)
4367 if (density
* 256 > PREFETCH_DENSE_MEM
* 100
4368 && (info
[i
].total_bytes
/ PREFETCH_BLOCK
4369 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN
))
4371 info
[i
].prefetch_before_loop
= 1;
4372 info
[i
].prefetch_in_loop
4373 = (info
[i
].total_bytes
/ PREFETCH_BLOCK
4374 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX
);
4378 info
[i
].prefetch_in_loop
= 0, info
[i
].prefetch_before_loop
= 0;
4379 if (loop_dump_stream
)
4380 fprintf (loop_dump_stream
,
4381 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4382 INSN_UID (info
[i
].giv
->insn
), density
);
4385 info
[i
].prefetch_in_loop
= 1, info
[i
].prefetch_before_loop
= 1;
4387 /* Find how many prefetch instructions we'll use within the loop. */
4388 if (info
[i
].prefetch_in_loop
!= 0)
4390 info
[i
].prefetch_in_loop
= ((info
[i
].stride
+ PREFETCH_BLOCK
- 1)
4392 num_real_prefetches
+= info
[i
].prefetch_in_loop
;
4394 num_real_write_prefetches
+= info
[i
].prefetch_in_loop
;
4398 /* Determine how many iterations ahead to prefetch within the loop, based
4399 on how many prefetches we currently expect to do within the loop. */
4400 if (num_real_prefetches
!= 0)
4402 if ((ahead
= SIMULTANEOUS_PREFETCHES
/ num_real_prefetches
) == 0)
4404 if (loop_dump_stream
)
4405 fprintf (loop_dump_stream
,
4406 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4407 SIMULTANEOUS_PREFETCHES
, num_real_prefetches
);
4408 num_real_prefetches
= 0, num_real_write_prefetches
= 0;
4411 /* We'll also use AHEAD to determine how many prefetch instructions to
4412 emit before a loop, so don't leave it zero. */
4414 ahead
= PREFETCH_BLOCKS_BEFORE_LOOP_MAX
;
4416 for (i
= 0; i
< num_prefetches
; i
++)
4418 /* Update if we've decided not to prefetch anything within the loop. */
4419 if (num_real_prefetches
== 0)
4420 info
[i
].prefetch_in_loop
= 0;
4422 /* Find how many prefetch instructions we'll use before the loop. */
4423 if (info
[i
].prefetch_before_loop
!= 0)
4425 int n
= info
[i
].total_bytes
/ PREFETCH_BLOCK
;
4428 info
[i
].prefetch_before_loop
= n
;
4429 num_prefetches_before
+= n
;
4431 num_write_prefetches_before
+= n
;
4434 if (loop_dump_stream
)
4436 if (info
[i
].prefetch_in_loop
== 0
4437 && info
[i
].prefetch_before_loop
== 0)
4439 fprintf (loop_dump_stream
, "Prefetch insn: %d",
4440 INSN_UID (info
[i
].giv
->insn
));
4441 fprintf (loop_dump_stream
,
4442 "; in loop: %d; before: %d; %s\n",
4443 info
[i
].prefetch_in_loop
,
4444 info
[i
].prefetch_before_loop
,
4445 info
[i
].write
? "read/write" : "read only");
4446 fprintf (loop_dump_stream
,
4447 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4448 (int) (info
[i
].bytes_accessed
* 100 / info
[i
].stride
),
4449 info
[i
].bytes_accessed
, info
[i
].total_bytes
);
4450 fprintf (loop_dump_stream
, " index: " HOST_WIDE_INT_PRINT_DEC
4451 "; stride: " HOST_WIDE_INT_PRINT_DEC
"; address: ",
4452 info
[i
].index
, info
[i
].stride
);
4453 print_rtl (loop_dump_stream
, info
[i
].base_address
);
4454 fprintf (loop_dump_stream
, "\n");
4458 if (num_real_prefetches
+ num_prefetches_before
> 0)
4460 /* Record that this loop uses prefetch instructions. */
4461 LOOP_INFO (loop
)->has_prefetch
= 1;
4463 if (loop_dump_stream
)
4465 fprintf (loop_dump_stream
, "Real prefetches needed within loop: %d (write: %d)\n",
4466 num_real_prefetches
, num_real_write_prefetches
);
4467 fprintf (loop_dump_stream
, "Real prefetches needed before loop: %d (write: %d)\n",
4468 num_prefetches_before
, num_write_prefetches_before
);
4472 for (i
= 0; i
< num_prefetches
; i
++)
4476 for (y
= 0; y
< info
[i
].prefetch_in_loop
; y
++)
4478 rtx loc
= copy_rtx (*info
[i
].giv
->location
);
4480 int bytes_ahead
= PREFETCH_BLOCK
* (ahead
+ y
);
4481 rtx before_insn
= info
[i
].giv
->insn
;
4482 rtx prev_insn
= PREV_INSN (info
[i
].giv
->insn
);
4485 /* We can save some effort by offsetting the address on
4486 architectures with offsettable memory references. */
4487 if (offsettable_address_p (0, VOIDmode
, loc
))
4488 loc
= plus_constant (loc
, bytes_ahead
);
4491 rtx reg
= gen_reg_rtx (Pmode
);
4492 loop_iv_add_mult_emit_before (loop
, loc
, const1_rtx
,
4493 GEN_INT (bytes_ahead
), reg
,
4499 /* Make sure the address operand is valid for prefetch. */
4500 if (! (*insn_data
[(int)CODE_FOR_prefetch
].operand
[0].predicate
)
4501 (loc
, insn_data
[(int)CODE_FOR_prefetch
].operand
[0].mode
))
4502 loc
= force_reg (Pmode
, loc
);
4503 emit_insn (gen_prefetch (loc
, GEN_INT (info
[i
].write
),
4507 emit_insn_before (seq
, before_insn
);
4509 /* Check all insns emitted and record the new GIV
4511 insn
= NEXT_INSN (prev_insn
);
4512 while (insn
!= before_insn
)
4514 insn
= check_insn_for_givs (loop
, insn
,
4515 info
[i
].giv
->always_executed
,
4516 info
[i
].giv
->maybe_multiple
);
4517 insn
= NEXT_INSN (insn
);
4521 if (PREFETCH_BEFORE_LOOP
)
4523 /* Emit insns before the loop to fetch the first cache lines or,
4524 if we're not prefetching within the loop, everything we expect
4526 for (y
= 0; y
< info
[i
].prefetch_before_loop
; y
++)
4528 rtx reg
= gen_reg_rtx (Pmode
);
4529 rtx loop_start
= loop
->start
;
4530 rtx init_val
= info
[i
].class->initial_value
;
4531 rtx add_val
= simplify_gen_binary (PLUS
, Pmode
,
4532 info
[i
].giv
->add_val
,
4533 GEN_INT (y
* PREFETCH_BLOCK
));
4535 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4536 non-constant INIT_VAL to have the same mode as REG, which
4537 in this case we know to be Pmode. */
4538 if (GET_MODE (init_val
) != Pmode
&& !CONSTANT_P (init_val
))
4543 init_val
= convert_to_mode (Pmode
, init_val
, 0);
4546 loop_insn_emit_before (loop
, 0, loop_start
, seq
);
4548 loop_iv_add_mult_emit_before (loop
, init_val
,
4549 info
[i
].giv
->mult_val
,
4550 add_val
, reg
, 0, loop_start
);
4551 emit_insn_before (gen_prefetch (reg
, GEN_INT (info
[i
].write
),
4561 /* Communication with routines called via `note_stores'. */
4563 static rtx note_insn
;
4565 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4567 static rtx addr_placeholder
;
4569 /* ??? Unfinished optimizations, and possible future optimizations,
4570 for the strength reduction code. */
4572 /* ??? The interaction of biv elimination, and recognition of 'constant'
4573 bivs, may cause problems. */
4575 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4576 performance problems.
4578 Perhaps don't eliminate things that can be combined with an addressing
4579 mode. Find all givs that have the same biv, mult_val, and add_val;
4580 then for each giv, check to see if its only use dies in a following
4581 memory address. If so, generate a new memory address and check to see
4582 if it is valid. If it is valid, then store the modified memory address,
4583 otherwise, mark the giv as not done so that it will get its own iv. */
4585 /* ??? Could try to optimize branches when it is known that a biv is always
4588 /* ??? When replace a biv in a compare insn, we should replace with closest
4589 giv so that an optimized branch can still be recognized by the combiner,
4590 e.g. the VAX acb insn. */
4592 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4593 was rerun in loop_optimize whenever a register was added or moved.
4594 Also, some of the optimizations could be a little less conservative. */
4596 /* Searches the insns between INSN and LOOP->END. Returns 1 if there
4597 is a backward branch in that range that branches to somewhere between
4598 LOOP->START and INSN. Returns 0 otherwise. */
4600 /* ??? This is quadratic algorithm. Could be rewritten to be linear.
4601 In practice, this is not a problem, because this function is seldom called,
4602 and uses a negligible amount of CPU time on average. */
4605 back_branch_in_range_p (const struct loop
*loop
, rtx insn
)
4607 rtx p
, q
, target_insn
;
4608 rtx loop_start
= loop
->start
;
4609 rtx loop_end
= loop
->end
;
4610 rtx orig_loop_end
= loop
->end
;
4612 /* Stop before we get to the backward branch at the end of the loop. */
4613 loop_end
= prev_nonnote_insn (loop_end
);
4614 if (BARRIER_P (loop_end
))
4615 loop_end
= PREV_INSN (loop_end
);
4617 /* Check in case insn has been deleted, search forward for first non
4618 deleted insn following it. */
4619 while (INSN_DELETED_P (insn
))
4620 insn
= NEXT_INSN (insn
);
4622 /* Check for the case where insn is the last insn in the loop. Deal
4623 with the case where INSN was a deleted loop test insn, in which case
4624 it will now be the NOTE_LOOP_END. */
4625 if (insn
== loop_end
|| insn
== orig_loop_end
)
4628 for (p
= NEXT_INSN (insn
); p
!= loop_end
; p
= NEXT_INSN (p
))
4632 target_insn
= JUMP_LABEL (p
);
4634 /* Search from loop_start to insn, to see if one of them is
4635 the target_insn. We can't use INSN_LUID comparisons here,
4636 since insn may not have an LUID entry. */
4637 for (q
= loop_start
; q
!= insn
; q
= NEXT_INSN (q
))
4638 if (q
== target_insn
)
4646 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4647 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4650 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4651 least once for every loop iteration except for the last one.
4653 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4656 typedef rtx (*loop_insn_callback
) (struct loop
*, rtx
, int, int);
4658 for_each_insn_in_loop (struct loop
*loop
, loop_insn_callback fncall
)
4660 int not_every_iteration
= 0;
4661 int maybe_multiple
= 0;
4662 int past_loop_latch
= 0;
4663 bool exit_test_is_entry
= false;
4666 /* If loop_scan_start points to the loop exit test, the loop body
4667 cannot be counted on running on every iteration, and we have to
4668 be wary of subversive use of gotos inside expression
4670 if (prev_nonnote_insn (loop
->scan_start
) != prev_nonnote_insn (loop
->start
))
4672 exit_test_is_entry
= true;
4673 maybe_multiple
= back_branch_in_range_p (loop
, loop
->scan_start
);
4676 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4677 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
4679 p
= next_insn_in_loop (loop
, p
))
4681 p
= fncall (loop
, p
, not_every_iteration
, maybe_multiple
);
4683 /* Past CODE_LABEL, we get to insns that may be executed multiple
4684 times. The only way we can be sure that they can't is if every
4685 jump insn between here and the end of the loop either
4686 returns, exits the loop, is a jump to a location that is still
4687 behind the label, or is a jump to the loop start. */
4697 insn
= NEXT_INSN (insn
);
4698 if (insn
== loop
->scan_start
)
4700 if (insn
== loop
->end
)
4706 if (insn
== loop
->scan_start
)
4711 && GET_CODE (PATTERN (insn
)) != RETURN
4712 && (!any_condjump_p (insn
)
4713 || (JUMP_LABEL (insn
) != 0
4714 && JUMP_LABEL (insn
) != loop
->scan_start
4715 && !loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
4723 /* Past a jump, we get to insns for which we can't count
4724 on whether they will be executed during each iteration. */
4725 /* This code appears twice in strength_reduce. There is also similar
4726 code in scan_loop. */
4728 /* If we enter the loop in the middle, and scan around to the
4729 beginning, don't set not_every_iteration for that.
4730 This can be any kind of jump, since we want to know if insns
4731 will be executed if the loop is executed. */
4732 && (exit_test_is_entry
4733 || !(JUMP_LABEL (p
) == loop
->top
4734 && ((NEXT_INSN (NEXT_INSN (p
)) == loop
->end
4735 && any_uncondjump_p (p
))
4736 || (NEXT_INSN (p
) == loop
->end
4737 && any_condjump_p (p
))))))
4741 /* If this is a jump outside the loop, then it also doesn't
4742 matter. Check to see if the target of this branch is on the
4743 loop->exits_labels list. */
4745 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
4746 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4750 not_every_iteration
= 1;
4753 /* Note if we pass a loop latch. If we do, then we can not clear
4754 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4755 a loop since a jump before the last CODE_LABEL may have started
4756 a new loop iteration.
4758 Note that LOOP_TOP is only set for rotated loops and we need
4759 this check for all loops, so compare against the CODE_LABEL
4760 which immediately follows LOOP_START. */
4762 && JUMP_LABEL (p
) == NEXT_INSN (loop
->start
))
4763 past_loop_latch
= 1;
4765 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4766 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4767 or not an insn is known to be executed each iteration of the
4768 loop, whether or not any iterations are known to occur.
4770 Therefore, if we have just passed a label and have no more labels
4771 between here and the test insn of the loop, and we have not passed
4772 a jump to the top of the loop, then we know these insns will be
4773 executed each iteration. */
4775 if (not_every_iteration
4778 && no_labels_between_p (p
, loop
->end
))
4779 not_every_iteration
= 0;
4784 loop_bivs_find (struct loop
*loop
)
4786 struct loop_regs
*regs
= LOOP_REGS (loop
);
4787 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4788 /* Temporary list pointers for traversing ivs->list. */
4789 struct iv_class
*bl
, **backbl
;
4793 for_each_insn_in_loop (loop
, check_insn_for_bivs
);
4795 /* Scan ivs->list to remove all regs that proved not to be bivs.
4796 Make a sanity check against regs->n_times_set. */
4797 for (backbl
= &ivs
->list
, bl
= *backbl
; bl
; bl
= bl
->next
)
4799 if (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4800 /* Above happens if register modified by subreg, etc. */
4801 /* Make sure it is not recognized as a basic induction var: */
4802 || regs
->array
[bl
->regno
].n_times_set
!= bl
->biv_count
4803 /* If never incremented, it is invariant that we decided not to
4804 move. So leave it alone. */
4805 || ! bl
->incremented
)
4807 if (loop_dump_stream
)
4808 fprintf (loop_dump_stream
, "Biv %d: discarded, %s\n",
4810 (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4811 ? "not induction variable"
4812 : (! bl
->incremented
? "never incremented"
4815 REG_IV_TYPE (ivs
, bl
->regno
) = NOT_BASIC_INDUCT
;
4822 if (loop_dump_stream
)
4823 fprintf (loop_dump_stream
, "Biv %d: verified\n", bl
->regno
);
4829 /* Determine how BIVS are initialized by looking through pre-header
4830 extended basic block. */
4832 loop_bivs_init_find (struct loop
*loop
)
4834 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4835 /* Temporary list pointers for traversing ivs->list. */
4836 struct iv_class
*bl
;
4840 /* Find initial value for each biv by searching backwards from loop_start,
4841 halting at first label. Also record any test condition. */
4844 for (p
= loop
->start
; p
&& !LABEL_P (p
); p
= PREV_INSN (p
))
4854 note_stores (PATTERN (p
), record_initial
, ivs
);
4856 /* Record any test of a biv that branches around the loop if no store
4857 between it and the start of loop. We only care about tests with
4858 constants and registers and only certain of those. */
4860 && JUMP_LABEL (p
) != 0
4861 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop
->end
)
4862 && (test
= get_condition_for_loop (loop
, p
)) != 0
4863 && REG_P (XEXP (test
, 0))
4864 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
4865 && (bl
= REG_IV_CLASS (ivs
, REGNO (XEXP (test
, 0)))) != 0
4866 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop
->start
)
4867 && bl
->init_insn
== 0)
4869 /* If an NE test, we have an initial value! */
4870 if (GET_CODE (test
) == NE
)
4873 bl
->init_set
= gen_rtx_SET (VOIDmode
,
4874 XEXP (test
, 0), XEXP (test
, 1));
4877 bl
->initial_test
= test
;
4883 /* Look at the each biv and see if we can say anything better about its
4884 initial value from any initializing insns set up above. (This is done
4885 in two passes to avoid missing SETs in a PARALLEL.) */
4887 loop_bivs_check (struct loop
*loop
)
4889 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4890 /* Temporary list pointers for traversing ivs->list. */
4891 struct iv_class
*bl
;
4892 struct iv_class
**backbl
;
4894 for (backbl
= &ivs
->list
; (bl
= *backbl
); backbl
= &bl
->next
)
4899 if (! bl
->init_insn
)
4902 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4903 is a constant, use the value of that. */
4904 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
4905 && CONSTANT_P (XEXP (note
, 0)))
4906 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
4907 && CONSTANT_P (XEXP (note
, 0))))
4908 src
= XEXP (note
, 0);
4910 src
= SET_SRC (bl
->init_set
);
4912 if (loop_dump_stream
)
4913 fprintf (loop_dump_stream
,
4914 "Biv %d: initialized at insn %d: initial value ",
4915 bl
->regno
, INSN_UID (bl
->init_insn
));
4917 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
4918 || GET_MODE (src
) == VOIDmode
)
4919 && valid_initial_value_p (src
, bl
->init_insn
,
4920 LOOP_INFO (loop
)->pre_header_has_call
,
4923 bl
->initial_value
= src
;
4925 if (loop_dump_stream
)
4927 print_simple_rtl (loop_dump_stream
, src
);
4928 fputc ('\n', loop_dump_stream
);
4931 /* If we can't make it a giv,
4932 let biv keep initial value of "itself". */
4933 else if (loop_dump_stream
)
4934 fprintf (loop_dump_stream
, "is complex\n");
4939 /* Search the loop for general induction variables. */
4942 loop_givs_find (struct loop
* loop
)
4944 for_each_insn_in_loop (loop
, check_insn_for_givs
);
4948 /* For each giv for which we still don't know whether or not it is
4949 replaceable, check to see if it is replaceable because its final value
4950 can be calculated. */
4953 loop_givs_check (struct loop
*loop
)
4955 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4956 struct iv_class
*bl
;
4958 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
4960 struct induction
*v
;
4962 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4963 if (! v
->replaceable
&& ! v
->not_replaceable
)
4964 check_final_value (loop
, v
);
4968 /* Try to generate the simplest rtx for the expression
4969 (PLUS (MULT mult1 mult2) add1). This is used to calculate the initial
4973 fold_rtx_mult_add (rtx mult1
, rtx mult2
, rtx add1
, enum machine_mode mode
)
4978 /* The modes must all be the same. This should always be true. For now,
4979 check to make sure. */
4980 gcc_assert (GET_MODE (mult1
) == mode
|| GET_MODE (mult1
) == VOIDmode
);
4981 gcc_assert (GET_MODE (mult2
) == mode
|| GET_MODE (mult2
) == VOIDmode
);
4982 gcc_assert (GET_MODE (add1
) == mode
|| GET_MODE (add1
) == VOIDmode
);
4984 /* Ensure that if at least one of mult1/mult2 are constant, then mult2
4985 will be a constant. */
4986 if (GET_CODE (mult1
) == CONST_INT
)
4993 mult_res
= simplify_binary_operation (MULT
, mode
, mult1
, mult2
);
4995 mult_res
= gen_rtx_MULT (mode
, mult1
, mult2
);
4997 /* Again, put the constant second. */
4998 if (GET_CODE (add1
) == CONST_INT
)
5005 result
= simplify_binary_operation (PLUS
, mode
, add1
, mult_res
);
5007 result
= gen_rtx_PLUS (mode
, add1
, mult_res
);
5012 /* Searches the list of induction struct's for the biv BL, to try to calculate
5013 the total increment value for one iteration of the loop as a constant.
5015 Returns the increment value as an rtx, simplified as much as possible,
5016 if it can be calculated. Otherwise, returns 0. */
5019 biv_total_increment (const struct iv_class
*bl
)
5021 struct induction
*v
;
5024 /* For increment, must check every instruction that sets it. Each
5025 instruction must be executed only once each time through the loop.
5026 To verify this, we check that the insn is always executed, and that
5027 there are no backward branches after the insn that branch to before it.
5028 Also, the insn must have a mult_val of one (to make sure it really is
5031 result
= const0_rtx
;
5032 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
5034 if (v
->always_computable
&& v
->mult_val
== const1_rtx
5035 && ! v
->maybe_multiple
5036 && SCALAR_INT_MODE_P (v
->mode
))
5038 /* If we have already counted it, skip it. */
5042 result
= fold_rtx_mult_add (result
, const1_rtx
, v
->add_val
, v
->mode
);
5051 /* Try to prove that the register is dead after the loop exits. Trace every
5052 loop exit looking for an insn that will always be executed, which sets
5053 the register to some value, and appears before the first use of the register
5054 is found. If successful, then return 1, otherwise return 0. */
5056 /* ?? Could be made more intelligent in the handling of jumps, so that
5057 it can search past if statements and other similar structures. */
5060 reg_dead_after_loop (const struct loop
*loop
, rtx reg
)
5064 int label_count
= 0;
5066 /* In addition to checking all exits of this loop, we must also check
5067 all exits of inner nested loops that would exit this loop. We don't
5068 have any way to identify those, so we just give up if there are any
5069 such inner loop exits. */
5071 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
5074 if (label_count
!= loop
->exit_count
)
5077 /* HACK: Must also search the loop fall through exit, create a label_ref
5078 here which points to the loop->end, and append the loop_number_exit_labels
5080 label
= gen_rtx_LABEL_REF (Pmode
, loop
->end
);
5081 LABEL_NEXTREF (label
) = loop
->exit_labels
;
5083 for (; label
; label
= LABEL_NEXTREF (label
))
5085 /* Succeed if find an insn which sets the biv or if reach end of
5086 function. Fail if find an insn that uses the biv, or if come to
5087 a conditional jump. */
5089 insn
= NEXT_INSN (XEXP (label
, 0));
5096 if (reg_referenced_p (reg
, PATTERN (insn
)))
5099 note
= find_reg_equal_equiv_note (insn
);
5100 if (note
&& reg_overlap_mentioned_p (reg
, XEXP (note
, 0)))
5103 set
= single_set (insn
);
5104 if (set
&& rtx_equal_p (SET_DEST (set
), reg
))
5109 if (GET_CODE (PATTERN (insn
)) == RETURN
)
5111 else if (!any_uncondjump_p (insn
)
5112 /* Prevent infinite loop following infinite loops. */
5113 || jump_count
++ > 20)
5116 insn
= JUMP_LABEL (insn
);
5120 insn
= NEXT_INSN (insn
);
5124 /* Success, the register is dead on all loop exits. */
5128 /* Try to calculate the final value of the biv, the value it will have at
5129 the end of the loop. If we can do it, return that value. */
5132 final_biv_value (const struct loop
*loop
, struct iv_class
*bl
)
5134 unsigned HOST_WIDE_INT n_iterations
= LOOP_INFO (loop
)->n_iterations
;
5137 /* ??? This only works for MODE_INT biv's. Reject all others for now. */
5139 if (GET_MODE_CLASS (bl
->biv
->mode
) != MODE_INT
)
5142 /* The final value for reversed bivs must be calculated differently than
5143 for ordinary bivs. In this case, there is already an insn after the
5144 loop which sets this biv's final value (if necessary), and there are
5145 no other loop exits, so we can return any value. */
5148 if (loop_dump_stream
)
5149 fprintf (loop_dump_stream
,
5150 "Final biv value for %d, reversed biv.\n", bl
->regno
);
5155 /* Try to calculate the final value as initial value + (number of iterations
5156 * increment). For this to work, increment must be invariant, the only
5157 exit from the loop must be the fall through at the bottom (otherwise
5158 it may not have its final value when the loop exits), and the initial
5159 value of the biv must be invariant. */
5161 if (n_iterations
!= 0
5162 && ! loop
->exit_count
5163 && loop_invariant_p (loop
, bl
->initial_value
))
5165 increment
= biv_total_increment (bl
);
5167 if (increment
&& loop_invariant_p (loop
, increment
))
5169 /* Can calculate the loop exit value, emit insns after loop
5170 end to calculate this value into a temporary register in
5171 case it is needed later. */
5173 tem
= gen_reg_rtx (bl
->biv
->mode
);
5174 record_base_value (REGNO (tem
), bl
->biv
->add_val
, 0);
5175 loop_iv_add_mult_sink (loop
, increment
, GEN_INT (n_iterations
),
5176 bl
->initial_value
, tem
);
5178 if (loop_dump_stream
)
5179 fprintf (loop_dump_stream
,
5180 "Final biv value for %d, calculated.\n", bl
->regno
);
5186 /* Check to see if the biv is dead at all loop exits. */
5187 if (reg_dead_after_loop (loop
, bl
->biv
->src_reg
))
5189 if (loop_dump_stream
)
5190 fprintf (loop_dump_stream
,
5191 "Final biv value for %d, biv dead after loop exit.\n",
5200 /* Return nonzero if it is possible to eliminate the biv BL provided
5201 all givs are reduced. This is possible if either the reg is not
5202 used outside the loop, or we can compute what its final value will
5206 loop_biv_eliminable_p (struct loop
*loop
, struct iv_class
*bl
,
5207 int threshold
, int insn_count
)
5209 /* For architectures with a decrement_and_branch_until_zero insn,
5210 don't do this if we put a REG_NONNEG note on the endtest for this
5213 #ifdef HAVE_decrement_and_branch_until_zero
5216 if (loop_dump_stream
)
5217 fprintf (loop_dump_stream
,
5218 "Cannot eliminate nonneg biv %d.\n", bl
->regno
);
5223 /* Check that biv is used outside loop or if it has a final value.
5224 Compare against bl->init_insn rather than loop->start. We aren't
5225 concerned with any uses of the biv between init_insn and
5226 loop->start since these won't be affected by the value of the biv
5227 elsewhere in the function, so long as init_insn doesn't use the
5230 if ((REGNO_LAST_LUID (bl
->regno
) < INSN_LUID (loop
->end
)
5232 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
5233 && REGNO_FIRST_LUID (bl
->regno
) >= INSN_LUID (bl
->init_insn
)
5234 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
5235 || (bl
->final_value
= final_biv_value (loop
, bl
)))
5236 return maybe_eliminate_biv (loop
, bl
, 0, threshold
, insn_count
);
5238 if (loop_dump_stream
)
5240 fprintf (loop_dump_stream
,
5241 "Cannot eliminate biv %d.\n",
5243 fprintf (loop_dump_stream
,
5244 "First use: insn %d, last use: insn %d.\n",
5245 REGNO_FIRST_UID (bl
->regno
),
5246 REGNO_LAST_UID (bl
->regno
));
5252 /* Reduce each giv of BL that we have decided to reduce. */
5255 loop_givs_reduce (struct loop
*loop
, struct iv_class
*bl
)
5257 struct induction
*v
;
5259 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5261 struct induction
*tv
;
5262 if (! v
->ignore
&& v
->same
== 0)
5264 int auto_inc_opt
= 0;
5266 /* If the code for derived givs immediately below has already
5267 allocated a new_reg, we must keep it. */
5269 v
->new_reg
= gen_reg_rtx (v
->mode
);
5272 /* If the target has auto-increment addressing modes, and
5273 this is an address giv, then try to put the increment
5274 immediately after its use, so that flow can create an
5275 auto-increment addressing mode. */
5276 /* Don't do this for loops entered at the bottom, to avoid
5277 this invalid transformation:
5286 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
5287 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
5288 /* We don't handle reversed biv's because bl->biv->insn
5289 does not have a valid INSN_LUID. */
5291 && v
->always_executed
&& ! v
->maybe_multiple
5292 && INSN_UID (v
->insn
) < max_uid_for_loop
5295 /* If other giv's have been combined with this one, then
5296 this will work only if all uses of the other giv's occur
5297 before this giv's insn. This is difficult to check.
5299 We simplify this by looking for the common case where
5300 there is one DEST_REG giv, and this giv's insn is the
5301 last use of the dest_reg of that DEST_REG giv. If the
5302 increment occurs after the address giv, then we can
5303 perform the optimization. (Otherwise, the increment
5304 would have to go before other_giv, and we would not be
5305 able to combine it with the address giv to get an
5306 auto-inc address.) */
5307 if (v
->combined_with
)
5309 struct induction
*other_giv
= 0;
5311 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
5319 if (! tv
&& other_giv
5320 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
5321 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
5322 == INSN_UID (v
->insn
))
5323 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
5326 /* Check for case where increment is before the address
5327 giv. Do this test in "loop order". */
5328 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
5329 && (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
5330 || (INSN_LUID (bl
->biv
->insn
)
5331 > INSN_LUID (loop
->scan_start
))))
5332 || (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
5333 && (INSN_LUID (loop
->scan_start
)
5334 < INSN_LUID (bl
->biv
->insn
))))
5343 /* We can't put an insn immediately after one setting
5344 cc0, or immediately before one using cc0. */
5345 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
5346 || (auto_inc_opt
== -1
5347 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
5349 && sets_cc0_p (PATTERN (prev
))))
5355 v
->auto_inc_opt
= 1;
5359 /* For each place where the biv is incremented, add an insn
5360 to increment the new, reduced reg for the giv. */
5361 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
5365 /* Skip if location is the same as a previous one. */
5369 insert_before
= NEXT_INSN (tv
->insn
);
5370 else if (auto_inc_opt
== 1)
5371 insert_before
= NEXT_INSN (v
->insn
);
5373 insert_before
= v
->insn
;
5375 if (tv
->mult_val
== const1_rtx
)
5376 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
5377 v
->new_reg
, v
->new_reg
,
5379 else /* tv->mult_val == const0_rtx */
5380 /* A multiply is acceptable here
5381 since this is presumed to be seldom executed. */
5382 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
5383 v
->add_val
, v
->new_reg
,
5387 /* Add code at loop start to initialize giv's reduced reg. */
5389 loop_iv_add_mult_hoist (loop
,
5390 extend_value_for_giv (v
, bl
->initial_value
),
5391 v
->mult_val
, v
->add_val
, v
->new_reg
);
5397 /* Check for givs whose first use is their definition and whose
5398 last use is the definition of another giv. If so, it is likely
5399 dead and should not be used to derive another giv nor to
5403 loop_givs_dead_check (struct loop
*loop ATTRIBUTE_UNUSED
, struct iv_class
*bl
)
5405 struct induction
*v
;
5407 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5410 || (v
->same
&& v
->same
->ignore
))
5413 if (v
->giv_type
== DEST_REG
5414 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
5416 struct induction
*v1
;
5418 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
5419 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
5427 loop_givs_rescan (struct loop
*loop
, struct iv_class
*bl
, rtx
*reg_map
)
5429 struct induction
*v
;
5431 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5433 if (v
->same
&& v
->same
->ignore
)
5439 /* Update expression if this was combined, in case other giv was
5442 v
->new_reg
= replace_rtx (v
->new_reg
,
5443 v
->same
->dest_reg
, v
->same
->new_reg
);
5445 /* See if this register is known to be a pointer to something. If
5446 so, see if we can find the alignment. First see if there is a
5447 destination register that is a pointer. If so, this shares the
5448 alignment too. Next see if we can deduce anything from the
5449 computational information. If not, and this is a DEST_ADDR
5450 giv, at least we know that it's a pointer, though we don't know
5452 if (REG_P (v
->new_reg
)
5453 && v
->giv_type
== DEST_REG
5454 && REG_POINTER (v
->dest_reg
))
5455 mark_reg_pointer (v
->new_reg
,
5456 REGNO_POINTER_ALIGN (REGNO (v
->dest_reg
)));
5457 else if (REG_P (v
->new_reg
)
5458 && REG_POINTER (v
->src_reg
))
5460 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->src_reg
));
5463 || GET_CODE (v
->add_val
) != CONST_INT
5464 || INTVAL (v
->add_val
) % (align
/ BITS_PER_UNIT
) != 0)
5467 mark_reg_pointer (v
->new_reg
, align
);
5469 else if (REG_P (v
->new_reg
)
5470 && REG_P (v
->add_val
)
5471 && REG_POINTER (v
->add_val
))
5473 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->add_val
));
5475 if (align
== 0 || GET_CODE (v
->mult_val
) != CONST_INT
5476 || INTVAL (v
->mult_val
) % (align
/ BITS_PER_UNIT
) != 0)
5479 mark_reg_pointer (v
->new_reg
, align
);
5481 else if (REG_P (v
->new_reg
) && v
->giv_type
== DEST_ADDR
)
5482 mark_reg_pointer (v
->new_reg
, 0);
5484 if (v
->giv_type
== DEST_ADDR
)
5486 /* Store reduced reg as the address in the memref where we found
5488 if (validate_change_maybe_volatile (v
->insn
, v
->location
,
5490 /* Yay, it worked! */;
5491 /* Not replaceable; emit an insn to set the original
5492 giv reg from the reduced giv. */
5493 else if (REG_P (*v
->location
))
5494 loop_insn_emit_before (loop
, 0, v
->insn
,
5495 gen_move_insn (*v
->location
,
5497 else if (GET_CODE (*v
->location
) == PLUS
5498 && REG_P (XEXP (*v
->location
, 0))
5499 && REG_P (v
->new_reg
)
5500 && CONSTANT_P (XEXP (*v
->location
, 1)))
5501 loop_insn_emit_before (loop
, 0, v
->insn
,
5502 gen_move_insn (XEXP (*v
->location
, 0),
5504 (GET_MODE (*v
->location
),
5506 XEXP (*v
->location
, 1))));
5509 /* If it wasn't a reg, create a pseudo and use that. */
5512 reg
= force_reg (v
->mode
, *v
->location
);
5515 loop_insn_emit_before (loop
, 0, v
->insn
, seq
);
5516 if (!validate_change_maybe_volatile (v
->insn
, v
->location
, reg
))
5520 else if (v
->replaceable
)
5522 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
5526 rtx original_insn
= v
->insn
;
5529 /* Not replaceable; emit an insn to set the original giv reg from
5530 the reduced giv, same as above. */
5531 v
->insn
= loop_insn_emit_after (loop
, 0, original_insn
,
5532 gen_move_insn (v
->dest_reg
,
5535 /* The original insn may have a REG_EQUAL note. This note is
5536 now incorrect and may result in invalid substitutions later.
5537 The original insn is dead, but may be part of a libcall
5538 sequence, which doesn't seem worth the bother of handling. */
5539 note
= find_reg_note (original_insn
, REG_EQUAL
, NULL_RTX
);
5541 remove_note (original_insn
, note
);
5544 /* When a loop is reversed, givs which depend on the reversed
5545 biv, and which are live outside the loop, must be set to their
5546 correct final value. This insn is only needed if the giv is
5547 not replaceable. The correct final value is the same as the
5548 value that the giv starts the reversed loop with. */
5549 if (bl
->reversed
&& ! v
->replaceable
)
5550 loop_iv_add_mult_sink (loop
,
5551 extend_value_for_giv (v
, bl
->initial_value
),
5552 v
->mult_val
, v
->add_val
, v
->dest_reg
);
5553 else if (v
->final_value
)
5554 loop_insn_sink_or_swim (loop
,
5555 gen_load_of_final_value (v
->dest_reg
,
5558 if (loop_dump_stream
)
5560 fprintf (loop_dump_stream
, "giv at %d reduced to ",
5561 INSN_UID (v
->insn
));
5562 print_simple_rtl (loop_dump_stream
, v
->new_reg
);
5563 fprintf (loop_dump_stream
, "\n");
5570 loop_giv_reduce_benefit (struct loop
*loop ATTRIBUTE_UNUSED
,
5571 struct iv_class
*bl
, struct induction
*v
,
5577 benefit
= v
->benefit
;
5578 PUT_MODE (test_reg
, v
->mode
);
5579 add_cost
= iv_add_mult_cost (bl
->biv
->add_val
, v
->mult_val
,
5580 test_reg
, test_reg
);
5582 /* Reduce benefit if not replaceable, since we will insert a
5583 move-insn to replace the insn that calculates this giv. Don't do
5584 this unless the giv is a user variable, since it will often be
5585 marked non-replaceable because of the duplication of the exit
5586 code outside the loop. In such a case, the copies we insert are
5587 dead and will be deleted. So they don't have a cost. Similar
5588 situations exist. */
5589 /* ??? The new final_[bg]iv_value code does a much better job of
5590 finding replaceable giv's, and hence this code may no longer be
5592 if (! v
->replaceable
&& ! bl
->eliminable
5593 && REG_USERVAR_P (v
->dest_reg
))
5594 benefit
-= copy_cost
;
5596 /* Decrease the benefit to count the add-insns that we will insert
5597 to increment the reduced reg for the giv. ??? This can
5598 overestimate the run-time cost of the additional insns, e.g. if
5599 there are multiple basic blocks that increment the biv, but only
5600 one of these blocks is executed during each iteration. There is
5601 no good way to detect cases like this with the current structure
5602 of the loop optimizer. This code is more accurate for
5603 determining code size than run-time benefits. */
5604 benefit
-= add_cost
* bl
->biv_count
;
5606 /* Decide whether to strength-reduce this giv or to leave the code
5607 unchanged (recompute it from the biv each time it is used). This
5608 decision can be made independently for each giv. */
5611 /* Attempt to guess whether autoincrement will handle some of the
5612 new add insns; if so, increase BENEFIT (undo the subtraction of
5613 add_cost that was done above). */
5614 if (v
->giv_type
== DEST_ADDR
5615 /* Increasing the benefit is risky, since this is only a guess.
5616 Avoid increasing register pressure in cases where there would
5617 be no other benefit from reducing this giv. */
5619 && GET_CODE (v
->mult_val
) == CONST_INT
)
5621 int size
= GET_MODE_SIZE (GET_MODE (v
->mem
));
5623 if (HAVE_POST_INCREMENT
5624 && INTVAL (v
->mult_val
) == size
)
5625 benefit
+= add_cost
* bl
->biv_count
;
5626 else if (HAVE_PRE_INCREMENT
5627 && INTVAL (v
->mult_val
) == size
)
5628 benefit
+= add_cost
* bl
->biv_count
;
5629 else if (HAVE_POST_DECREMENT
5630 && -INTVAL (v
->mult_val
) == size
)
5631 benefit
+= add_cost
* bl
->biv_count
;
5632 else if (HAVE_PRE_DECREMENT
5633 && -INTVAL (v
->mult_val
) == size
)
5634 benefit
+= add_cost
* bl
->biv_count
;
5642 /* Free IV structures for LOOP. */
5645 loop_ivs_free (struct loop
*loop
)
5647 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5648 struct iv_class
*iv
= ivs
->list
;
5654 struct iv_class
*next
= iv
->next
;
5655 struct induction
*induction
;
5656 struct induction
*next_induction
;
5658 for (induction
= iv
->biv
; induction
; induction
= next_induction
)
5660 next_induction
= induction
->next_iv
;
5663 for (induction
= iv
->giv
; induction
; induction
= next_induction
)
5665 next_induction
= induction
->next_iv
;
5674 /* Look back before LOOP->START for the insn that sets REG and return
5675 the equivalent constant if there is a REG_EQUAL note otherwise just
5676 the SET_SRC of REG. */
5679 loop_find_equiv_value (const struct loop
*loop
, rtx reg
)
5681 rtx loop_start
= loop
->start
;
5686 for (insn
= PREV_INSN (loop_start
); insn
; insn
= PREV_INSN (insn
))
5691 else if (INSN_P (insn
) && reg_set_p (reg
, insn
))
5693 /* We found the last insn before the loop that sets the register.
5694 If it sets the entire register, and has a REG_EQUAL note,
5695 then use the value of the REG_EQUAL note. */
5696 if ((set
= single_set (insn
))
5697 && (SET_DEST (set
) == reg
))
5699 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5701 /* Only use the REG_EQUAL note if it is a constant.
5702 Other things, divide in particular, will cause
5703 problems later if we use them. */
5704 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
5705 && CONSTANT_P (XEXP (note
, 0)))
5706 ret
= XEXP (note
, 0);
5708 ret
= SET_SRC (set
);
5710 /* We cannot do this if it changes between the
5711 assignment and loop start though. */
5712 if (modified_between_p (ret
, insn
, loop_start
))
5721 /* Find and return register term common to both expressions OP0 and
5722 OP1 or NULL_RTX if no such term exists. Each expression must be a
5723 REG or a PLUS of a REG. */
5726 find_common_reg_term (rtx op0
, rtx op1
)
5728 if ((REG_P (op0
) || GET_CODE (op0
) == PLUS
)
5729 && (REG_P (op1
) || GET_CODE (op1
) == PLUS
))
5736 if (GET_CODE (op0
) == PLUS
)
5737 op01
= XEXP (op0
, 1), op00
= XEXP (op0
, 0);
5739 op01
= const0_rtx
, op00
= op0
;
5741 if (GET_CODE (op1
) == PLUS
)
5742 op11
= XEXP (op1
, 1), op10
= XEXP (op1
, 0);
5744 op11
= const0_rtx
, op10
= op1
;
5746 /* Find and return common register term if present. */
5747 if (REG_P (op00
) && (op00
== op10
|| op00
== op11
))
5749 else if (REG_P (op01
) && (op01
== op10
|| op01
== op11
))
5753 /* No common register term found. */
5757 /* Determine the loop iterator and calculate the number of loop
5758 iterations. Returns the exact number of loop iterations if it can
5759 be calculated, otherwise returns zero. */
5761 static unsigned HOST_WIDE_INT
5762 loop_iterations (struct loop
*loop
)
5764 struct loop_info
*loop_info
= LOOP_INFO (loop
);
5765 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5766 rtx comparison
, comparison_value
;
5767 rtx iteration_var
, initial_value
, increment
, final_value
;
5768 enum rtx_code comparison_code
;
5770 unsigned HOST_WIDE_INT abs_inc
;
5771 unsigned HOST_WIDE_INT abs_diff
;
5774 int unsigned_p
, compare_dir
, final_larger
;
5776 struct iv_class
*bl
;
5778 loop_info
->n_iterations
= 0;
5779 loop_info
->initial_value
= 0;
5780 loop_info
->initial_equiv_value
= 0;
5781 loop_info
->comparison_value
= 0;
5782 loop_info
->final_value
= 0;
5783 loop_info
->final_equiv_value
= 0;
5784 loop_info
->increment
= 0;
5785 loop_info
->iteration_var
= 0;
5788 /* We used to use prev_nonnote_insn here, but that fails because it might
5789 accidentally get the branch for a contained loop if the branch for this
5790 loop was deleted. We can only trust branches immediately before the
5792 last_loop_insn
= PREV_INSN (loop
->end
);
5794 /* ??? We should probably try harder to find the jump insn
5795 at the end of the loop. The following code assumes that
5796 the last loop insn is a jump to the top of the loop. */
5797 if (!JUMP_P (last_loop_insn
))
5799 if (loop_dump_stream
)
5800 fprintf (loop_dump_stream
,
5801 "Loop iterations: No final conditional branch found.\n");
5805 /* If there is a more than a single jump to the top of the loop
5806 we cannot (easily) determine the iteration count. */
5807 if (LABEL_NUSES (JUMP_LABEL (last_loop_insn
)) > 1)
5809 if (loop_dump_stream
)
5810 fprintf (loop_dump_stream
,
5811 "Loop iterations: Loop has multiple back edges.\n");
5815 /* Find the iteration variable. If the last insn is a conditional
5816 branch, and the insn before tests a register value, make that the
5817 iteration variable. */
5819 comparison
= get_condition_for_loop (loop
, last_loop_insn
);
5820 if (comparison
== 0)
5822 if (loop_dump_stream
)
5823 fprintf (loop_dump_stream
,
5824 "Loop iterations: No final comparison found.\n");
5828 /* ??? Get_condition may switch position of induction variable and
5829 invariant register when it canonicalizes the comparison. */
5831 comparison_code
= GET_CODE (comparison
);
5832 iteration_var
= XEXP (comparison
, 0);
5833 comparison_value
= XEXP (comparison
, 1);
5835 if (!REG_P (iteration_var
))
5837 if (loop_dump_stream
)
5838 fprintf (loop_dump_stream
,
5839 "Loop iterations: Comparison not against register.\n");
5843 /* The only new registers that are created before loop iterations
5844 are givs made from biv increments or registers created by
5845 load_mems. In the latter case, it is possible that try_copy_prop
5846 will propagate a new pseudo into the old iteration register but
5847 this will be marked by having the REG_USERVAR_P bit set. */
5849 gcc_assert ((unsigned) REGNO (iteration_var
) < ivs
->n_regs
5850 || REG_USERVAR_P (iteration_var
));
5852 /* Determine the initial value of the iteration variable, and the amount
5853 that it is incremented each loop. Use the tables constructed by
5854 the strength reduction pass to calculate these values. */
5856 /* Clear the result values, in case no answer can be found. */
5860 /* The iteration variable can be either a giv or a biv. Check to see
5861 which it is, and compute the variable's initial value, and increment
5862 value if possible. */
5864 /* If this is a new register, can't handle it since we don't have any
5865 reg_iv_type entry for it. */
5866 if ((unsigned) REGNO (iteration_var
) >= ivs
->n_regs
)
5868 if (loop_dump_stream
)
5869 fprintf (loop_dump_stream
,
5870 "Loop iterations: No reg_iv_type entry for iteration var.\n");
5874 /* Reject iteration variables larger than the host wide int size, since they
5875 could result in a number of iterations greater than the range of our
5876 `unsigned HOST_WIDE_INT' variable loop_info->n_iterations. */
5877 else if ((GET_MODE_BITSIZE (GET_MODE (iteration_var
))
5878 > HOST_BITS_PER_WIDE_INT
))
5880 if (loop_dump_stream
)
5881 fprintf (loop_dump_stream
,
5882 "Loop iterations: Iteration var rejected because mode too large.\n");
5885 else if (GET_MODE_CLASS (GET_MODE (iteration_var
)) != MODE_INT
)
5887 if (loop_dump_stream
)
5888 fprintf (loop_dump_stream
,
5889 "Loop iterations: Iteration var not an integer.\n");
5893 /* Try swapping the comparison to identify a suitable iv. */
5894 if (REG_IV_TYPE (ivs
, REGNO (iteration_var
)) != BASIC_INDUCT
5895 && REG_IV_TYPE (ivs
, REGNO (iteration_var
)) != GENERAL_INDUCT
5896 && REG_P (comparison_value
)
5897 && REGNO (comparison_value
) < ivs
->n_regs
)
5899 rtx temp
= comparison_value
;
5900 comparison_code
= swap_condition (comparison_code
);
5901 comparison_value
= iteration_var
;
5902 iteration_var
= temp
;
5905 if (REG_IV_TYPE (ivs
, REGNO (iteration_var
)) == BASIC_INDUCT
)
5907 gcc_assert (REGNO (iteration_var
) < ivs
->n_regs
);
5909 /* Grab initial value, only useful if it is a constant. */
5910 bl
= REG_IV_CLASS (ivs
, REGNO (iteration_var
));
5911 initial_value
= bl
->initial_value
;
5912 if (!bl
->biv
->always_executed
|| bl
->biv
->maybe_multiple
)
5914 if (loop_dump_stream
)
5915 fprintf (loop_dump_stream
,
5916 "Loop iterations: Basic induction var not set once in each iteration.\n");
5920 increment
= biv_total_increment (bl
);
5922 else if (REG_IV_TYPE (ivs
, REGNO (iteration_var
)) == GENERAL_INDUCT
)
5924 HOST_WIDE_INT offset
= 0;
5925 struct induction
*v
= REG_IV_INFO (ivs
, REGNO (iteration_var
));
5926 rtx biv_initial_value
;
5928 gcc_assert (REGNO (v
->src_reg
) < ivs
->n_regs
);
5930 if (!v
->always_executed
|| v
->maybe_multiple
)
5932 if (loop_dump_stream
)
5933 fprintf (loop_dump_stream
,
5934 "Loop iterations: General induction var not set once in each iteration.\n");
5938 bl
= REG_IV_CLASS (ivs
, REGNO (v
->src_reg
));
5940 /* Increment value is mult_val times the increment value of the biv. */
5942 increment
= biv_total_increment (bl
);
5945 struct induction
*biv_inc
;
5947 increment
= fold_rtx_mult_add (v
->mult_val
,
5948 extend_value_for_giv (v
, increment
),
5949 const0_rtx
, v
->mode
);
5950 /* The caller assumes that one full increment has occurred at the
5951 first loop test. But that's not true when the biv is incremented
5952 after the giv is set (which is the usual case), e.g.:
5953 i = 6; do {;} while (i++ < 9) .
5954 Therefore, we bias the initial value by subtracting the amount of
5955 the increment that occurs between the giv set and the giv test. */
5956 for (biv_inc
= bl
->biv
; biv_inc
; biv_inc
= biv_inc
->next_iv
)
5958 if (loop_insn_first_p (v
->insn
, biv_inc
->insn
))
5960 if (REG_P (biv_inc
->add_val
))
5962 if (loop_dump_stream
)
5963 fprintf (loop_dump_stream
,
5964 "Loop iterations: Basic induction var add_val is REG %d.\n",
5965 REGNO (biv_inc
->add_val
));
5969 /* If we have already counted it, skip it. */
5973 offset
-= INTVAL (biv_inc
->add_val
);
5977 if (loop_dump_stream
)
5978 fprintf (loop_dump_stream
,
5979 "Loop iterations: Giv iterator, initial value bias %ld.\n",
5982 /* Initial value is mult_val times the biv's initial value plus
5983 add_val. Only useful if it is a constant. */
5984 biv_initial_value
= extend_value_for_giv (v
, bl
->initial_value
);
5986 = fold_rtx_mult_add (v
->mult_val
,
5987 plus_constant (biv_initial_value
, offset
),
5988 v
->add_val
, v
->mode
);
5992 if (loop_dump_stream
)
5993 fprintf (loop_dump_stream
,
5994 "Loop iterations: Not basic or general induction var.\n");
5998 if (initial_value
== 0)
6003 switch (comparison_code
)
6018 /* Cannot determine loop iterations with this case. */
6038 /* If the comparison value is an invariant register, then try to find
6039 its value from the insns before the start of the loop. */
6041 final_value
= comparison_value
;
6042 if (REG_P (comparison_value
)
6043 && loop_invariant_p (loop
, comparison_value
))
6045 final_value
= loop_find_equiv_value (loop
, comparison_value
);
6047 /* If we don't get an invariant final value, we are better
6048 off with the original register. */
6049 if (! loop_invariant_p (loop
, final_value
))
6050 final_value
= comparison_value
;
6053 /* Calculate the approximate final value of the induction variable
6054 (on the last successful iteration). The exact final value
6055 depends on the branch operator, and increment sign. It will be
6056 wrong if the iteration variable is not incremented by one each
6057 time through the loop and (comparison_value + off_by_one -
6058 initial_value) % increment != 0.
6059 ??? Note that the final_value may overflow and thus final_larger
6060 will be bogus. A potentially infinite loop will be classified
6061 as immediate, e.g. for (i = 0x7ffffff0; i <= 0x7fffffff; i++) */
6063 final_value
= plus_constant (final_value
, off_by_one
);
6065 /* Save the calculated values describing this loop's bounds, in case
6066 precondition_loop_p will need them later. These values can not be
6067 recalculated inside precondition_loop_p because strength reduction
6068 optimizations may obscure the loop's structure.
6070 These values are only required by precondition_loop_p and insert_bct
6071 whenever the number of iterations cannot be computed at compile time.
6072 Only the difference between final_value and initial_value is
6073 important. Note that final_value is only approximate. */
6074 loop_info
->initial_value
= initial_value
;
6075 loop_info
->comparison_value
= comparison_value
;
6076 loop_info
->final_value
= plus_constant (comparison_value
, off_by_one
);
6077 loop_info
->increment
= increment
;
6078 loop_info
->iteration_var
= iteration_var
;
6079 loop_info
->comparison_code
= comparison_code
;
6082 /* Try to determine the iteration count for loops such
6083 as (for i = init; i < init + const; i++). When running the
6084 loop optimization twice, the first pass often converts simple
6085 loops into this form. */
6087 if (REG_P (initial_value
))
6093 reg1
= initial_value
;
6094 if (GET_CODE (final_value
) == PLUS
)
6095 reg2
= XEXP (final_value
, 0), const2
= XEXP (final_value
, 1);
6097 reg2
= final_value
, const2
= const0_rtx
;
6099 /* Check for initial_value = reg1, final_value = reg2 + const2,
6100 where reg1 != reg2. */
6101 if (REG_P (reg2
) && reg2
!= reg1
)
6105 /* Find what reg1 is equivalent to. Hopefully it will
6106 either be reg2 or reg2 plus a constant. */
6107 temp
= loop_find_equiv_value (loop
, reg1
);
6109 if (find_common_reg_term (temp
, reg2
))
6110 initial_value
= temp
;
6111 else if (loop_invariant_p (loop
, reg2
))
6113 /* Find what reg2 is equivalent to. Hopefully it will
6114 either be reg1 or reg1 plus a constant. Let's ignore
6115 the latter case for now since it is not so common. */
6116 temp
= loop_find_equiv_value (loop
, reg2
);
6118 if (temp
== loop_info
->iteration_var
)
6119 temp
= initial_value
;
6121 final_value
= (const2
== const0_rtx
)
6122 ? reg1
: gen_rtx_PLUS (GET_MODE (reg1
), reg1
, const2
);
6127 loop_info
->initial_equiv_value
= initial_value
;
6128 loop_info
->final_equiv_value
= final_value
;
6130 /* For EQ comparison loops, we don't have a valid final value.
6131 Check this now so that we won't leave an invalid value if we
6132 return early for any other reason. */
6133 if (comparison_code
== EQ
)
6134 loop_info
->final_equiv_value
= loop_info
->final_value
= 0;
6138 if (loop_dump_stream
)
6139 fprintf (loop_dump_stream
,
6140 "Loop iterations: Increment value can't be calculated.\n");
6144 if (GET_CODE (increment
) != CONST_INT
)
6146 /* If we have a REG, check to see if REG holds a constant value. */
6147 /* ??? Other RTL, such as (neg (reg)) is possible here, but it isn't
6148 clear if it is worthwhile to try to handle such RTL. */
6149 if (REG_P (increment
) || GET_CODE (increment
) == SUBREG
)
6150 increment
= loop_find_equiv_value (loop
, increment
);
6152 if (GET_CODE (increment
) != CONST_INT
)
6154 if (loop_dump_stream
)
6156 fprintf (loop_dump_stream
,
6157 "Loop iterations: Increment value not constant ");
6158 print_simple_rtl (loop_dump_stream
, increment
);
6159 fprintf (loop_dump_stream
, ".\n");
6163 loop_info
->increment
= increment
;
6166 if (GET_CODE (initial_value
) != CONST_INT
)
6168 if (loop_dump_stream
)
6170 fprintf (loop_dump_stream
,
6171 "Loop iterations: Initial value not constant ");
6172 print_simple_rtl (loop_dump_stream
, initial_value
);
6173 fprintf (loop_dump_stream
, ".\n");
6177 else if (GET_CODE (final_value
) != CONST_INT
)
6179 if (loop_dump_stream
)
6181 fprintf (loop_dump_stream
,
6182 "Loop iterations: Final value not constant ");
6183 print_simple_rtl (loop_dump_stream
, final_value
);
6184 fprintf (loop_dump_stream
, ".\n");
6188 else if (comparison_code
== EQ
)
6192 if (loop_dump_stream
)
6193 fprintf (loop_dump_stream
, "Loop iterations: EQ comparison loop.\n");
6195 inc_once
= gen_int_mode (INTVAL (initial_value
) + INTVAL (increment
),
6196 GET_MODE (iteration_var
));
6198 if (inc_once
== final_value
)
6200 /* The iterator value once through the loop is equal to the
6201 comparison value. Either we have an infinite loop, or
6202 we'll loop twice. */
6203 if (increment
== const0_rtx
)
6205 loop_info
->n_iterations
= 2;
6208 loop_info
->n_iterations
= 1;
6210 if (GET_CODE (loop_info
->initial_value
) == CONST_INT
)
6211 loop_info
->final_value
6212 = gen_int_mode ((INTVAL (loop_info
->initial_value
)
6213 + loop_info
->n_iterations
* INTVAL (increment
)),
6214 GET_MODE (iteration_var
));
6216 loop_info
->final_value
6217 = plus_constant (loop_info
->initial_value
,
6218 loop_info
->n_iterations
* INTVAL (increment
));
6219 loop_info
->final_equiv_value
6220 = gen_int_mode ((INTVAL (initial_value
)
6221 + loop_info
->n_iterations
* INTVAL (increment
)),
6222 GET_MODE (iteration_var
));
6223 return loop_info
->n_iterations
;
6226 /* Final_larger is 1 if final larger, 0 if they are equal, otherwise -1. */
6229 = ((unsigned HOST_WIDE_INT
) INTVAL (final_value
)
6230 > (unsigned HOST_WIDE_INT
) INTVAL (initial_value
))
6231 - ((unsigned HOST_WIDE_INT
) INTVAL (final_value
)
6232 < (unsigned HOST_WIDE_INT
) INTVAL (initial_value
));
6234 final_larger
= (INTVAL (final_value
) > INTVAL (initial_value
))
6235 - (INTVAL (final_value
) < INTVAL (initial_value
));
6237 if (INTVAL (increment
) > 0)
6239 else if (INTVAL (increment
) == 0)
6244 /* There are 27 different cases: compare_dir = -1, 0, 1;
6245 final_larger = -1, 0, 1; increment_dir = -1, 0, 1.
6246 There are 4 normal cases, 4 reverse cases (where the iteration variable
6247 will overflow before the loop exits), 4 infinite loop cases, and 15
6248 immediate exit (0 or 1 iteration depending on loop type) cases.
6249 Only try to optimize the normal cases. */
6251 /* (compare_dir/final_larger/increment_dir)
6252 Normal cases: (0/-1/-1), (0/1/1), (-1/-1/-1), (1/1/1)
6253 Reverse cases: (0/-1/1), (0/1/-1), (-1/-1/1), (1/1/-1)
6254 Infinite loops: (0/-1/0), (0/1/0), (-1/-1/0), (1/1/0)
6255 Immediate exit: (0/0/X), (-1/0/X), (-1/1/X), (1/0/X), (1/-1/X) */
6257 /* ?? If the meaning of reverse loops (where the iteration variable
6258 will overflow before the loop exits) is undefined, then could
6259 eliminate all of these special checks, and just always assume
6260 the loops are normal/immediate/infinite. Note that this means
6261 the sign of increment_dir does not have to be known. Also,
6262 since it does not really hurt if immediate exit loops or infinite loops
6263 are optimized, then that case could be ignored also, and hence all
6264 loops can be optimized.
6266 According to ANSI Spec, the reverse loop case result is undefined,
6267 because the action on overflow is undefined.
6269 See also the special test for NE loops below. */
6271 if (final_larger
== increment_dir
&& final_larger
!= 0
6272 && (final_larger
== compare_dir
|| compare_dir
== 0))
6277 if (loop_dump_stream
)
6278 fprintf (loop_dump_stream
, "Loop iterations: Not normal loop.\n");
6282 /* Calculate the number of iterations, final_value is only an approximation,
6283 so correct for that. Note that abs_diff and n_iterations are
6284 unsigned, because they can be as large as 2^n - 1. */
6286 inc
= INTVAL (increment
);
6290 abs_diff
= INTVAL (final_value
) - INTVAL (initial_value
);
6295 abs_diff
= INTVAL (initial_value
) - INTVAL (final_value
);
6299 /* Given that iteration_var is going to iterate over its own mode,
6300 not HOST_WIDE_INT, disregard higher bits that might have come
6301 into the picture due to sign extension of initial and final
6303 abs_diff
&= ((unsigned HOST_WIDE_INT
) 1
6304 << (GET_MODE_BITSIZE (GET_MODE (iteration_var
)) - 1)
6307 /* For NE tests, make sure that the iteration variable won't miss
6308 the final value. If abs_diff mod abs_incr is not zero, then the
6309 iteration variable will overflow before the loop exits, and we
6310 can not calculate the number of iterations. */
6311 if (compare_dir
== 0 && (abs_diff
% abs_inc
) != 0)
6314 /* Note that the number of iterations could be calculated using
6315 (abs_diff + abs_inc - 1) / abs_inc, provided care was taken to
6316 handle potential overflow of the summation. */
6317 loop_info
->n_iterations
= abs_diff
/ abs_inc
+ ((abs_diff
% abs_inc
) != 0);
6318 return loop_info
->n_iterations
;
6321 /* Perform strength reduction and induction variable elimination.
6323 Pseudo registers created during this function will be beyond the
6324 last valid index in several tables including
6325 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
6326 problem here, because the added registers cannot be givs outside of
6327 their loop, and hence will never be reconsidered. But scan_loop
6328 must check regnos to make sure they are in bounds. */
6331 strength_reduce (struct loop
*loop
, int flags
)
6333 struct loop_info
*loop_info
= LOOP_INFO (loop
);
6334 struct loop_regs
*regs
= LOOP_REGS (loop
);
6335 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6337 /* Temporary list pointer for traversing ivs->list. */
6338 struct iv_class
*bl
;
6339 /* Ratio of extra register life span we can justify
6340 for saving an instruction. More if loop doesn't call subroutines
6341 since in that case saving an insn makes more difference
6342 and more registers are available. */
6343 /* ??? could set this to last value of threshold in move_movables */
6344 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
6345 /* Map of pseudo-register replacements. */
6346 rtx
*reg_map
= NULL
;
6348 rtx test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
6349 int insn_count
= count_insns_in_loop (loop
);
6351 addr_placeholder
= gen_reg_rtx (Pmode
);
6353 ivs
->n_regs
= max_reg_before_loop
;
6354 ivs
->regs
= xcalloc (ivs
->n_regs
, sizeof (struct iv
));
6356 /* Find all BIVs in loop. */
6357 loop_bivs_find (loop
);
6359 /* Exit if there are no bivs. */
6362 loop_ivs_free (loop
);
6366 /* Determine how BIVS are initialized by looking through pre-header
6367 extended basic block. */
6368 loop_bivs_init_find (loop
);
6370 /* Look at the each biv and see if we can say anything better about its
6371 initial value from any initializing insns set up above. */
6372 loop_bivs_check (loop
);
6374 /* Search the loop for general induction variables. */
6375 loop_givs_find (loop
);
6377 /* Try to calculate and save the number of loop iterations. This is
6378 set to zero if the actual number can not be calculated. This must
6379 be called after all giv's have been identified, since otherwise it may
6380 fail if the iteration variable is a giv. */
6381 loop_iterations (loop
);
6383 #ifdef HAVE_prefetch
6384 if (flags
& LOOP_PREFETCH
)
6385 emit_prefetch_instructions (loop
);
6388 /* Now for each giv for which we still don't know whether or not it is
6389 replaceable, check to see if it is replaceable because its final value
6390 can be calculated. This must be done after loop_iterations is called,
6391 so that final_giv_value will work correctly. */
6392 loop_givs_check (loop
);
6394 /* Try to prove that the loop counter variable (if any) is always
6395 nonnegative; if so, record that fact with a REG_NONNEG note
6396 so that "decrement and branch until zero" insn can be used. */
6397 check_dbra_loop (loop
, insn_count
);
6399 /* Create reg_map to hold substitutions for replaceable giv regs.
6400 Some givs might have been made from biv increments, so look at
6401 ivs->reg_iv_type for a suitable size. */
6402 reg_map_size
= ivs
->n_regs
;
6403 reg_map
= xcalloc (reg_map_size
, sizeof (rtx
));
6405 /* Examine each iv class for feasibility of strength reduction/induction
6406 variable elimination. */
6408 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
6410 struct induction
*v
;
6413 /* Test whether it will be possible to eliminate this biv
6414 provided all givs are reduced. */
6415 bl
->eliminable
= loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
);
6417 /* This will be true at the end, if all givs which depend on this
6418 biv have been strength reduced.
6419 We can't (currently) eliminate the biv unless this is so. */
6420 bl
->all_reduced
= 1;
6422 /* Check each extension dependent giv in this class to see if its
6423 root biv is safe from wrapping in the interior mode. */
6424 check_ext_dependent_givs (loop
, bl
);
6426 /* Combine all giv's for this iv_class. */
6427 combine_givs (regs
, bl
);
6429 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6431 struct induction
*tv
;
6433 if (v
->ignore
|| v
->same
)
6436 benefit
= loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
);
6438 /* If an insn is not to be strength reduced, then set its ignore
6439 flag, and clear bl->all_reduced. */
6441 /* A giv that depends on a reversed biv must be reduced if it is
6442 used after the loop exit, otherwise, it would have the wrong
6443 value after the loop exit. To make it simple, just reduce all
6444 of such giv's whether or not we know they are used after the loop
6447 if (v
->lifetime
* threshold
* benefit
< insn_count
6450 if (loop_dump_stream
)
6451 fprintf (loop_dump_stream
,
6452 "giv of insn %d not worth while, %d vs %d.\n",
6454 v
->lifetime
* threshold
* benefit
, insn_count
);
6456 bl
->all_reduced
= 0;
6460 /* Check that we can increment the reduced giv without a
6461 multiply insn. If not, reject it. */
6463 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
6464 if (tv
->mult_val
== const1_rtx
6465 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
6467 if (loop_dump_stream
)
6468 fprintf (loop_dump_stream
,
6469 "giv of insn %d: would need a multiply.\n",
6470 INSN_UID (v
->insn
));
6472 bl
->all_reduced
= 0;
6478 /* Check for givs whose first use is their definition and whose
6479 last use is the definition of another giv. If so, it is likely
6480 dead and should not be used to derive another giv nor to
6482 loop_givs_dead_check (loop
, bl
);
6484 /* Reduce each giv that we decided to reduce. */
6485 loop_givs_reduce (loop
, bl
);
6487 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
6490 For each giv register that can be reduced now: if replaceable,
6491 substitute reduced reg wherever the old giv occurs;
6492 else add new move insn "giv_reg = reduced_reg". */
6493 loop_givs_rescan (loop
, bl
, reg_map
);
6495 /* All the givs based on the biv bl have been reduced if they
6498 /* For each giv not marked as maybe dead that has been combined with a
6499 second giv, clear any "maybe dead" mark on that second giv.
6500 v->new_reg will either be or refer to the register of the giv it
6503 Doing this clearing avoids problems in biv elimination where
6504 a giv's new_reg is a complex value that can't be put in the
6505 insn but the giv combined with (with a reg as new_reg) is
6506 marked maybe_dead. Since the register will be used in either
6507 case, we'd prefer it be used from the simpler giv. */
6509 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6510 if (! v
->maybe_dead
&& v
->same
)
6511 v
->same
->maybe_dead
= 0;
6513 /* Try to eliminate the biv, if it is a candidate.
6514 This won't work if ! bl->all_reduced,
6515 since the givs we planned to use might not have been reduced.
6517 We have to be careful that we didn't initially think we could
6518 eliminate this biv because of a giv that we now think may be
6519 dead and shouldn't be used as a biv replacement.
6521 Also, there is the possibility that we may have a giv that looks
6522 like it can be used to eliminate a biv, but the resulting insn
6523 isn't valid. This can happen, for example, on the 88k, where a
6524 JUMP_INSN can compare a register only with zero. Attempts to
6525 replace it with a compare with a constant will fail.
6527 Note that in cases where this call fails, we may have replaced some
6528 of the occurrences of the biv with a giv, but no harm was done in
6529 doing so in the rare cases where it can occur. */
6531 if (bl
->all_reduced
== 1 && bl
->eliminable
6532 && maybe_eliminate_biv (loop
, bl
, 1, threshold
, insn_count
))
6534 /* ?? If we created a new test to bypass the loop entirely,
6535 or otherwise drop straight in, based on this test, then
6536 we might want to rewrite it also. This way some later
6537 pass has more hope of removing the initialization of this
6540 /* If final_value != 0, then the biv may be used after loop end
6541 and we must emit an insn to set it just in case.
6543 Reversed bivs already have an insn after the loop setting their
6544 value, so we don't need another one. We can't calculate the
6545 proper final value for such a biv here anyways. */
6546 if (bl
->final_value
&& ! bl
->reversed
)
6547 loop_insn_sink_or_swim (loop
,
6548 gen_load_of_final_value (bl
->biv
->dest_reg
,
6551 if (loop_dump_stream
)
6552 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
6555 /* See above note wrt final_value. But since we couldn't eliminate
6556 the biv, we must set the value after the loop instead of before. */
6557 else if (bl
->final_value
&& ! bl
->reversed
)
6558 loop_insn_sink (loop
, gen_load_of_final_value (bl
->biv
->dest_reg
,
6562 /* Go through all the instructions in the loop, making all the
6563 register substitutions scheduled in REG_MAP. */
6565 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
6568 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
6569 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
6573 if (loop_dump_stream
)
6574 fprintf (loop_dump_stream
, "\n");
6576 loop_ivs_free (loop
);
6581 /*Record all basic induction variables calculated in the insn. */
6583 check_insn_for_bivs (struct loop
*loop
, rtx p
, int not_every_iteration
,
6586 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6593 if (NONJUMP_INSN_P (p
)
6594 && (set
= single_set (p
))
6595 && REG_P (SET_DEST (set
)))
6597 dest_reg
= SET_DEST (set
);
6598 if (REGNO (dest_reg
) < max_reg_before_loop
6599 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
6600 && REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
6602 if (basic_induction_var (loop
, SET_SRC (set
),
6603 GET_MODE (SET_SRC (set
)),
6604 dest_reg
, p
, &inc_val
, &mult_val
,
6607 /* It is a possible basic induction variable.
6608 Create and initialize an induction structure for it. */
6610 struct induction
*v
= xmalloc (sizeof (struct induction
));
6612 record_biv (loop
, v
, p
, dest_reg
, inc_val
, mult_val
, location
,
6613 not_every_iteration
, maybe_multiple
);
6614 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = BASIC_INDUCT
;
6616 else if (REGNO (dest_reg
) < ivs
->n_regs
)
6617 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
6623 /* Record all givs calculated in the insn.
6624 A register is a giv if: it is only set once, it is a function of a
6625 biv and a constant (or invariant), and it is not a biv. */
6627 check_insn_for_givs (struct loop
*loop
, rtx p
, int not_every_iteration
,
6630 struct loop_regs
*regs
= LOOP_REGS (loop
);
6633 /* Look for a general induction variable in a register. */
6634 if (NONJUMP_INSN_P (p
)
6635 && (set
= single_set (p
))
6636 && REG_P (SET_DEST (set
))
6637 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
6646 rtx last_consec_insn
;
6648 dest_reg
= SET_DEST (set
);
6649 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
6652 if (/* SET_SRC is a giv. */
6653 (general_induction_var (loop
, SET_SRC (set
), &src_reg
, &add_val
,
6654 &mult_val
, &ext_val
, 0, &benefit
, VOIDmode
)
6655 /* Equivalent expression is a giv. */
6656 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
6657 && general_induction_var (loop
, XEXP (regnote
, 0), &src_reg
,
6658 &add_val
, &mult_val
, &ext_val
, 0,
6659 &benefit
, VOIDmode
)))
6660 /* Don't try to handle any regs made by loop optimization.
6661 We have nothing on them in regno_first_uid, etc. */
6662 && REGNO (dest_reg
) < max_reg_before_loop
6663 /* Don't recognize a BASIC_INDUCT_VAR here. */
6664 && dest_reg
!= src_reg
6665 /* This must be the only place where the register is set. */
6666 && (regs
->array
[REGNO (dest_reg
)].n_times_set
== 1
6667 /* or all sets must be consecutive and make a giv. */
6668 || (benefit
= consec_sets_giv (loop
, benefit
, p
,
6670 &add_val
, &mult_val
, &ext_val
,
6671 &last_consec_insn
))))
6673 struct induction
*v
= xmalloc (sizeof (struct induction
));
6675 /* If this is a library call, increase benefit. */
6676 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
6677 benefit
+= libcall_benefit (p
);
6679 /* Skip the consecutive insns, if there are any. */
6680 if (regs
->array
[REGNO (dest_reg
)].n_times_set
!= 1)
6681 p
= last_consec_insn
;
6683 record_giv (loop
, v
, p
, src_reg
, dest_reg
, mult_val
, add_val
,
6684 ext_val
, benefit
, DEST_REG
, not_every_iteration
,
6685 maybe_multiple
, (rtx
*) 0);
6690 /* Look for givs which are memory addresses. */
6691 if (NONJUMP_INSN_P (p
))
6692 find_mem_givs (loop
, PATTERN (p
), p
, not_every_iteration
,
6695 /* Update the status of whether giv can derive other givs. This can
6696 change when we pass a label or an insn that updates a biv. */
6697 if (INSN_P (p
) || LABEL_P (p
))
6698 update_giv_derive (loop
, p
);
6702 /* Return 1 if X is a valid source for an initial value (or as value being
6703 compared against in an initial test).
6705 X must be either a register or constant and must not be clobbered between
6706 the current insn and the start of the loop.
6708 INSN is the insn containing X. */
6711 valid_initial_value_p (rtx x
, rtx insn
, int call_seen
, rtx loop_start
)
6716 /* Only consider pseudos we know about initialized in insns whose luids
6719 || REGNO (x
) >= max_reg_before_loop
)
6722 /* Don't use call-clobbered registers across a call which clobbers it. On
6723 some machines, don't use any hard registers at all. */
6724 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
6725 && (SMALL_REGISTER_CLASSES
6726 || (call_seen
&& call_used_regs
[REGNO (x
)])))
6729 /* Don't use registers that have been clobbered before the start of the
6731 if (reg_set_between_p (x
, insn
, loop_start
))
6737 /* Scan X for memory refs and check each memory address
6738 as a possible giv. INSN is the insn whose pattern X comes from.
6739 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
6740 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
6741 more than once in each loop iteration. */
6744 find_mem_givs (const struct loop
*loop
, rtx x
, rtx insn
,
6745 int not_every_iteration
, int maybe_multiple
)
6754 code
= GET_CODE (x
);
6779 /* This code used to disable creating GIVs with mult_val == 1 and
6780 add_val == 0. However, this leads to lost optimizations when
6781 it comes time to combine a set of related DEST_ADDR GIVs, since
6782 this one would not be seen. */
6784 if (general_induction_var (loop
, XEXP (x
, 0), &src_reg
, &add_val
,
6785 &mult_val
, &ext_val
, 1, &benefit
,
6788 /* Found one; record it. */
6789 struct induction
*v
= xmalloc (sizeof (struct induction
));
6791 record_giv (loop
, v
, insn
, src_reg
, addr_placeholder
, mult_val
,
6792 add_val
, ext_val
, benefit
, DEST_ADDR
,
6793 not_every_iteration
, maybe_multiple
, &XEXP (x
, 0));
6804 /* Recursively scan the subexpressions for other mem refs. */
6806 fmt
= GET_RTX_FORMAT (code
);
6807 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6809 find_mem_givs (loop
, XEXP (x
, i
), insn
, not_every_iteration
,
6811 else if (fmt
[i
] == 'E')
6812 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
6813 find_mem_givs (loop
, XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
6817 /* Fill in the data about one biv update.
6818 V is the `struct induction' in which we record the biv. (It is
6819 allocated by the caller, with alloca.)
6820 INSN is the insn that sets it.
6821 DEST_REG is the biv's reg.
6823 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
6824 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
6825 being set to INC_VAL.
6827 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
6828 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
6829 can be executed more than once per iteration. If MAYBE_MULTIPLE
6830 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
6831 executed exactly once per iteration. */
6834 record_biv (struct loop
*loop
, struct induction
*v
, rtx insn
, rtx dest_reg
,
6835 rtx inc_val
, rtx mult_val
, rtx
*location
,
6836 int not_every_iteration
, int maybe_multiple
)
6838 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6839 struct iv_class
*bl
;
6842 v
->src_reg
= dest_reg
;
6843 v
->dest_reg
= dest_reg
;
6844 v
->mult_val
= mult_val
;
6845 v
->add_val
= inc_val
;
6846 v
->ext_dependent
= NULL_RTX
;
6847 v
->location
= location
;
6848 v
->mode
= GET_MODE (dest_reg
);
6849 v
->always_computable
= ! not_every_iteration
;
6850 v
->always_executed
= ! not_every_iteration
;
6851 v
->maybe_multiple
= maybe_multiple
;
6854 /* Add this to the reg's iv_class, creating a class
6855 if this is the first incrementation of the reg. */
6857 bl
= REG_IV_CLASS (ivs
, REGNO (dest_reg
));
6860 /* Create and initialize new iv_class. */
6862 bl
= xmalloc (sizeof (struct iv_class
));
6864 bl
->regno
= REGNO (dest_reg
);
6870 /* Set initial value to the reg itself. */
6871 bl
->initial_value
= dest_reg
;
6872 bl
->final_value
= 0;
6873 /* We haven't seen the initializing insn yet. */
6876 bl
->initial_test
= 0;
6877 bl
->incremented
= 0;
6881 bl
->total_benefit
= 0;
6883 /* Add this class to ivs->list. */
6884 bl
->next
= ivs
->list
;
6887 /* Put it in the array of biv register classes. */
6888 REG_IV_CLASS (ivs
, REGNO (dest_reg
)) = bl
;
6892 /* Check if location is the same as a previous one. */
6893 struct induction
*induction
;
6894 for (induction
= bl
->biv
; induction
; induction
= induction
->next_iv
)
6895 if (location
== induction
->location
)
6897 v
->same
= induction
;
6902 /* Update IV_CLASS entry for this biv. */
6903 v
->next_iv
= bl
->biv
;
6906 if (mult_val
== const1_rtx
)
6907 bl
->incremented
= 1;
6909 if (loop_dump_stream
)
6910 loop_biv_dump (v
, loop_dump_stream
, 0);
6913 /* Fill in the data about one giv.
6914 V is the `struct induction' in which we record the giv. (It is
6915 allocated by the caller, with alloca.)
6916 INSN is the insn that sets it.
6917 BENEFIT estimates the savings from deleting this insn.
6918 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
6919 into a register or is used as a memory address.
6921 SRC_REG is the biv reg which the giv is computed from.
6922 DEST_REG is the giv's reg (if the giv is stored in a reg).
6923 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
6924 LOCATION points to the place where this giv's value appears in INSN. */
6927 record_giv (const struct loop
*loop
, struct induction
*v
, rtx insn
,
6928 rtx src_reg
, rtx dest_reg
, rtx mult_val
, rtx add_val
,
6929 rtx ext_val
, int benefit
, enum g_types type
,
6930 int not_every_iteration
, int maybe_multiple
, rtx
*location
)
6932 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6933 struct induction
*b
;
6934 struct iv_class
*bl
;
6935 rtx set
= single_set (insn
);
6938 /* Attempt to prove constantness of the values. Don't let simplify_rtx
6939 undo the MULT canonicalization that we performed earlier. */
6940 temp
= simplify_rtx (add_val
);
6942 && ! (GET_CODE (add_val
) == MULT
6943 && GET_CODE (temp
) == ASHIFT
))
6947 v
->src_reg
= src_reg
;
6949 v
->dest_reg
= dest_reg
;
6950 v
->mult_val
= mult_val
;
6951 v
->add_val
= add_val
;
6952 v
->ext_dependent
= ext_val
;
6953 v
->benefit
= benefit
;
6954 v
->location
= location
;
6956 v
->combined_with
= 0;
6957 v
->maybe_multiple
= maybe_multiple
;
6959 v
->derive_adjustment
= 0;
6965 v
->auto_inc_opt
= 0;
6968 /* The v->always_computable field is used in update_giv_derive, to
6969 determine whether a giv can be used to derive another giv. For a
6970 DEST_REG giv, INSN computes a new value for the giv, so its value
6971 isn't computable if INSN insn't executed every iteration.
6972 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
6973 it does not compute a new value. Hence the value is always computable
6974 regardless of whether INSN is executed each iteration. */
6976 if (type
== DEST_ADDR
)
6977 v
->always_computable
= 1;
6979 v
->always_computable
= ! not_every_iteration
;
6981 v
->always_executed
= ! not_every_iteration
;
6983 if (type
== DEST_ADDR
)
6985 v
->mode
= GET_MODE (*location
);
6988 else /* type == DEST_REG */
6990 v
->mode
= GET_MODE (SET_DEST (set
));
6992 v
->lifetime
= LOOP_REG_LIFETIME (loop
, REGNO (dest_reg
));
6994 /* If the lifetime is zero, it means that this register is
6995 really a dead store. So mark this as a giv that can be
6996 ignored. This will not prevent the biv from being eliminated. */
6997 if (v
->lifetime
== 0)
7000 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
7001 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
7004 /* Add the giv to the class of givs computed from one biv. */
7006 bl
= REG_IV_CLASS (ivs
, REGNO (src_reg
));
7008 v
->next_iv
= bl
->giv
;
7011 /* Don't count DEST_ADDR. This is supposed to count the number of
7012 insns that calculate givs. */
7013 if (type
== DEST_REG
)
7015 bl
->total_benefit
+= benefit
;
7017 if (type
== DEST_ADDR
)
7020 v
->not_replaceable
= 0;
7024 /* The giv can be replaced outright by the reduced register only if all
7025 of the following conditions are true:
7026 - the insn that sets the giv is always executed on any iteration
7027 on which the giv is used at all
7028 (there are two ways to deduce this:
7029 either the insn is executed on every iteration,
7030 or all uses follow that insn in the same basic block),
7031 - the giv is not used outside the loop
7032 - no assignments to the biv occur during the giv's lifetime. */
7034 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
7035 /* Previous line always fails if INSN was moved by loop opt. */
7036 && REGNO_LAST_LUID (REGNO (dest_reg
))
7037 < INSN_LUID (loop
->end
)
7038 && (! not_every_iteration
7039 || last_use_this_basic_block (dest_reg
, insn
)))
7041 /* Now check that there are no assignments to the biv within the
7042 giv's lifetime. This requires two separate checks. */
7044 /* Check each biv update, and fail if any are between the first
7045 and last use of the giv.
7047 If this loop contains an inner loop that was unrolled, then
7048 the insn modifying the biv may have been emitted by the loop
7049 unrolling code, and hence does not have a valid luid. Just
7050 mark the biv as not replaceable in this case. It is not very
7051 useful as a biv, because it is used in two different loops.
7052 It is very unlikely that we would be able to optimize the giv
7053 using this biv anyways. */
7056 v
->not_replaceable
= 0;
7057 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
7059 if (INSN_UID (b
->insn
) >= max_uid_for_loop
7060 || ((INSN_LUID (b
->insn
)
7061 >= REGNO_FIRST_LUID (REGNO (dest_reg
)))
7062 && (INSN_LUID (b
->insn
)
7063 <= REGNO_LAST_LUID (REGNO (dest_reg
)))))
7066 v
->not_replaceable
= 1;
7071 /* If there are any backwards branches that go from after the
7072 biv update to before it, then this giv is not replaceable. */
7074 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
7075 if (back_branch_in_range_p (loop
, b
->insn
))
7078 v
->not_replaceable
= 1;
7084 /* May still be replaceable, we don't have enough info here to
7087 v
->not_replaceable
= 0;
7091 /* Record whether the add_val contains a const_int, for later use by
7096 v
->no_const_addval
= 1;
7097 if (tem
== const0_rtx
)
7099 else if (CONSTANT_P (add_val
))
7100 v
->no_const_addval
= 0;
7101 if (GET_CODE (tem
) == PLUS
)
7105 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
7106 tem
= XEXP (tem
, 0);
7107 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
7108 tem
= XEXP (tem
, 1);
7112 if (CONSTANT_P (XEXP (tem
, 1)))
7113 v
->no_const_addval
= 0;
7117 if (loop_dump_stream
)
7118 loop_giv_dump (v
, loop_dump_stream
, 0);
7121 /* Try to calculate the final value of the giv, the value it will have at
7122 the end of the loop. If we can do it, return that value. */
7125 final_giv_value (const struct loop
*loop
, struct induction
*v
)
7127 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7128 struct iv_class
*bl
;
7132 rtx loop_end
= loop
->end
;
7133 unsigned HOST_WIDE_INT n_iterations
= LOOP_INFO (loop
)->n_iterations
;
7135 bl
= REG_IV_CLASS (ivs
, REGNO (v
->src_reg
));
7137 /* The final value for givs which depend on reversed bivs must be calculated
7138 differently than for ordinary givs. In this case, there is already an
7139 insn after the loop which sets this giv's final value (if necessary),
7140 and there are no other loop exits, so we can return any value. */
7143 if (loop_dump_stream
)
7144 fprintf (loop_dump_stream
,
7145 "Final giv value for %d, depends on reversed biv\n",
7146 REGNO (v
->dest_reg
));
7150 /* Try to calculate the final value as a function of the biv it depends
7151 upon. The only exit from the loop must be the fall through at the bottom
7152 and the insn that sets the giv must be executed on every iteration
7153 (otherwise the giv may not have its final value when the loop exits). */
7155 /* ??? Can calculate the final giv value by subtracting off the
7156 extra biv increments times the giv's mult_val. The loop must have
7157 only one exit for this to work, but the loop iterations does not need
7160 if (n_iterations
!= 0
7161 && ! loop
->exit_count
7162 && v
->always_executed
)
7164 /* ?? It is tempting to use the biv's value here since these insns will
7165 be put after the loop, and hence the biv will have its final value
7166 then. However, this fails if the biv is subsequently eliminated.
7167 Perhaps determine whether biv's are eliminable before trying to
7168 determine whether giv's are replaceable so that we can use the
7169 biv value here if it is not eliminable. */
7171 /* We are emitting code after the end of the loop, so we must make
7172 sure that bl->initial_value is still valid then. It will still
7173 be valid if it is invariant. */
7175 increment
= biv_total_increment (bl
);
7177 if (increment
&& loop_invariant_p (loop
, increment
)
7178 && loop_invariant_p (loop
, bl
->initial_value
))
7180 /* Can calculate the loop exit value of its biv as
7181 (n_iterations * increment) + initial_value */
7183 /* The loop exit value of the giv is then
7184 (final_biv_value - extra increments) * mult_val + add_val.
7185 The extra increments are any increments to the biv which
7186 occur in the loop after the giv's value is calculated.
7187 We must search from the insn that sets the giv to the end
7188 of the loop to calculate this value. */
7190 /* Put the final biv value in tem. */
7191 tem
= gen_reg_rtx (v
->mode
);
7192 record_base_value (REGNO (tem
), bl
->biv
->add_val
, 0);
7193 loop_iv_add_mult_sink (loop
, extend_value_for_giv (v
, increment
),
7194 GEN_INT (n_iterations
),
7195 extend_value_for_giv (v
, bl
->initial_value
),
7198 /* Subtract off extra increments as we find them. */
7199 for (insn
= NEXT_INSN (v
->insn
); insn
!= loop_end
;
7200 insn
= NEXT_INSN (insn
))
7202 struct induction
*biv
;
7204 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
7205 if (biv
->insn
== insn
)
7208 tem
= expand_simple_binop (GET_MODE (tem
), MINUS
, tem
,
7209 biv
->add_val
, NULL_RTX
, 0,
7213 loop_insn_sink (loop
, seq
);
7217 /* Now calculate the giv's final value. */
7218 loop_iv_add_mult_sink (loop
, tem
, v
->mult_val
, v
->add_val
, tem
);
7220 if (loop_dump_stream
)
7221 fprintf (loop_dump_stream
,
7222 "Final giv value for %d, calc from biv's value.\n",
7223 REGNO (v
->dest_reg
));
7229 /* Replaceable giv's should never reach here. */
7230 gcc_assert (!v
->replaceable
);
7232 /* Check to see if the biv is dead at all loop exits. */
7233 if (reg_dead_after_loop (loop
, v
->dest_reg
))
7235 if (loop_dump_stream
)
7236 fprintf (loop_dump_stream
,
7237 "Final giv value for %d, giv dead after loop exit.\n",
7238 REGNO (v
->dest_reg
));
7246 /* All this does is determine whether a giv can be made replaceable because
7247 its final value can be calculated. This code can not be part of record_giv
7248 above, because final_giv_value requires that the number of loop iterations
7249 be known, and that can not be accurately calculated until after all givs
7250 have been identified. */
7253 check_final_value (const struct loop
*loop
, struct induction
*v
)
7255 rtx final_value
= 0;
7257 /* DEST_ADDR givs will never reach here, because they are always marked
7258 replaceable above in record_giv. */
7260 /* The giv can be replaced outright by the reduced register only if all
7261 of the following conditions are true:
7262 - the insn that sets the giv is always executed on any iteration
7263 on which the giv is used at all
7264 (there are two ways to deduce this:
7265 either the insn is executed on every iteration,
7266 or all uses follow that insn in the same basic block),
7267 - its final value can be calculated (this condition is different
7268 than the one above in record_giv)
7269 - it's not used before the it's set
7270 - no assignments to the biv occur during the giv's lifetime. */
7273 /* This is only called now when replaceable is known to be false. */
7274 /* Clear replaceable, so that it won't confuse final_giv_value. */
7278 if ((final_value
= final_giv_value (loop
, v
))
7279 && (v
->always_executed
7280 || last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
7282 int biv_increment_seen
= 0, before_giv_insn
= 0;
7287 v
->not_replaceable
= 0;
7289 /* When trying to determine whether or not a biv increment occurs
7290 during the lifetime of the giv, we can ignore uses of the variable
7291 outside the loop because final_value is true. Hence we can not
7292 use regno_last_uid and regno_first_uid as above in record_giv. */
7294 /* Search the loop to determine whether any assignments to the
7295 biv occur during the giv's lifetime. Start with the insn
7296 that sets the giv, and search around the loop until we come
7297 back to that insn again.
7299 Also fail if there is a jump within the giv's lifetime that jumps
7300 to somewhere outside the lifetime but still within the loop. This
7301 catches spaghetti code where the execution order is not linear, and
7302 hence the above test fails. Here we assume that the giv lifetime
7303 does not extend from one iteration of the loop to the next, so as
7304 to make the test easier. Since the lifetime isn't known yet,
7305 this requires two loops. See also record_giv above. */
7307 last_giv_use
= v
->insn
;
7314 before_giv_insn
= 1;
7315 p
= NEXT_INSN (loop
->start
);
7322 /* It is possible for the BIV increment to use the GIV if we
7323 have a cycle. Thus we must be sure to check each insn for
7324 both BIV and GIV uses, and we must check for BIV uses
7327 if (! biv_increment_seen
7328 && reg_set_p (v
->src_reg
, PATTERN (p
)))
7329 biv_increment_seen
= 1;
7331 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
7333 if (biv_increment_seen
|| before_giv_insn
)
7336 v
->not_replaceable
= 1;
7344 /* Now that the lifetime of the giv is known, check for branches
7345 from within the lifetime to outside the lifetime if it is still
7355 p
= NEXT_INSN (loop
->start
);
7356 if (p
== last_giv_use
)
7359 if (JUMP_P (p
) && JUMP_LABEL (p
)
7360 && LABEL_NAME (JUMP_LABEL (p
))
7361 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
7362 && loop_insn_first_p (loop
->start
, JUMP_LABEL (p
)))
7363 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
7364 && loop_insn_first_p (JUMP_LABEL (p
), loop
->end
))))
7367 v
->not_replaceable
= 1;
7369 if (loop_dump_stream
)
7370 fprintf (loop_dump_stream
,
7371 "Found branch outside giv lifetime.\n");
7378 /* If it is replaceable, then save the final value. */
7380 v
->final_value
= final_value
;
7383 if (loop_dump_stream
&& v
->replaceable
)
7384 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
7385 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
7388 /* Update the status of whether a giv can derive other givs.
7390 We need to do something special if there is or may be an update to the biv
7391 between the time the giv is defined and the time it is used to derive
7394 In addition, a giv that is only conditionally set is not allowed to
7395 derive another giv once a label has been passed.
7397 The cases we look at are when a label or an update to a biv is passed. */
7400 update_giv_derive (const struct loop
*loop
, rtx p
)
7402 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7403 struct iv_class
*bl
;
7404 struct induction
*biv
, *giv
;
7408 /* Search all IV classes, then all bivs, and finally all givs.
7410 There are three cases we are concerned with. First we have the situation
7411 of a giv that is only updated conditionally. In that case, it may not
7412 derive any givs after a label is passed.
7414 The second case is when a biv update occurs, or may occur, after the
7415 definition of a giv. For certain biv updates (see below) that are
7416 known to occur between the giv definition and use, we can adjust the
7417 giv definition. For others, or when the biv update is conditional,
7418 we must prevent the giv from deriving any other givs. There are two
7419 sub-cases within this case.
7421 If this is a label, we are concerned with any biv update that is done
7422 conditionally, since it may be done after the giv is defined followed by
7423 a branch here (actually, we need to pass both a jump and a label, but
7424 this extra tracking doesn't seem worth it).
7426 If this is a jump, we are concerned about any biv update that may be
7427 executed multiple times. We are actually only concerned about
7428 backward jumps, but it is probably not worth performing the test
7429 on the jump again here.
7431 If this is a biv update, we must adjust the giv status to show that a
7432 subsequent biv update was performed. If this adjustment cannot be done,
7433 the giv cannot derive further givs. */
7435 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
7436 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
7437 if (LABEL_P (p
) || JUMP_P (p
)
7440 /* Skip if location is the same as a previous one. */
7444 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
7446 /* If cant_derive is already true, there is no point in
7447 checking all of these conditions again. */
7448 if (giv
->cant_derive
)
7451 /* If this giv is conditionally set and we have passed a label,
7452 it cannot derive anything. */
7453 if (LABEL_P (p
) && ! giv
->always_computable
)
7454 giv
->cant_derive
= 1;
7456 /* Skip givs that have mult_val == 0, since
7457 they are really invariants. Also skip those that are
7458 replaceable, since we know their lifetime doesn't contain
7460 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
7463 /* The only way we can allow this giv to derive another
7464 is if this is a biv increment and we can form the product
7465 of biv->add_val and giv->mult_val. In this case, we will
7466 be able to compute a compensation. */
7467 else if (biv
->insn
== p
)
7472 if (biv
->mult_val
== const1_rtx
)
7473 tem
= simplify_giv_expr (loop
,
7474 gen_rtx_MULT (giv
->mode
,
7477 &ext_val_dummy
, &dummy
);
7479 if (tem
&& giv
->derive_adjustment
)
7480 tem
= simplify_giv_expr
7482 gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
7483 &ext_val_dummy
, &dummy
);
7486 giv
->derive_adjustment
= tem
;
7488 giv
->cant_derive
= 1;
7490 else if ((LABEL_P (p
) && ! biv
->always_computable
)
7491 || (JUMP_P (p
) && biv
->maybe_multiple
))
7492 giv
->cant_derive
= 1;
7497 /* Check whether an insn is an increment legitimate for a basic induction var.
7498 X is the source of insn P, or a part of it.
7499 MODE is the mode in which X should be interpreted.
7501 DEST_REG is the putative biv, also the destination of the insn.
7502 We accept patterns of these forms:
7503 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
7504 REG = INVARIANT + REG
7506 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
7507 store the additive term into *INC_VAL, and store the place where
7508 we found the additive term into *LOCATION.
7510 If X is an assignment of an invariant into DEST_REG, we set
7511 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
7513 We also want to detect a BIV when it corresponds to a variable
7514 whose mode was promoted. In that case, an increment
7515 of the variable may be a PLUS that adds a SUBREG of that variable to
7516 an invariant and then sign- or zero-extends the result of the PLUS
7519 Most GIVs in such cases will be in the promoted mode, since that is the
7520 probably the natural computation mode (and almost certainly the mode
7521 used for addresses) on the machine. So we view the pseudo-reg containing
7522 the variable as the BIV, as if it were simply incremented.
7524 Note that treating the entire pseudo as a BIV will result in making
7525 simple increments to any GIVs based on it. However, if the variable
7526 overflows in its declared mode but not its promoted mode, the result will
7527 be incorrect. This is acceptable if the variable is signed, since
7528 overflows in such cases are undefined, but not if it is unsigned, since
7529 those overflows are defined. So we only check for SIGN_EXTEND and
7532 If we cannot find a biv, we return 0. */
7535 basic_induction_var (const struct loop
*loop
, rtx x
, enum machine_mode mode
,
7536 rtx dest_reg
, rtx p
, rtx
*inc_val
, rtx
*mult_val
,
7541 rtx insn
, set
= 0, last
, inc
;
7543 code
= GET_CODE (x
);
7548 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
7549 || (GET_CODE (XEXP (x
, 0)) == SUBREG
7550 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
7551 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
7553 argp
= &XEXP (x
, 1);
7555 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
7556 || (GET_CODE (XEXP (x
, 1)) == SUBREG
7557 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
7558 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
7560 argp
= &XEXP (x
, 0);
7566 if (loop_invariant_p (loop
, arg
) != 1)
7569 /* convert_modes can emit new instructions, e.g. when arg is a loop
7570 invariant MEM and dest_reg has a different mode.
7571 These instructions would be emitted after the end of the function
7572 and then *inc_val would be an uninitialized pseudo.
7573 Detect this and bail in this case.
7574 Other alternatives to solve this can be introducing a convert_modes
7575 variant which is allowed to fail but not allowed to emit new
7576 instructions, emit these instructions before loop start and let
7577 it be garbage collected if *inc_val is never used or saving the
7578 *inc_val initialization sequence generated here and when *inc_val
7579 is going to be actually used, emit it at some suitable place. */
7580 last
= get_last_insn ();
7581 inc
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
7582 if (get_last_insn () != last
)
7584 delete_insns_since (last
);
7589 *mult_val
= const1_rtx
;
7594 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
7595 handle addition of promoted variables.
7596 ??? The comment at the start of this function is wrong: promoted
7597 variable increments don't look like it says they do. */
7598 return basic_induction_var (loop
, SUBREG_REG (x
),
7599 GET_MODE (SUBREG_REG (x
)),
7600 dest_reg
, p
, inc_val
, mult_val
, location
);
7603 /* If this register is assigned in a previous insn, look at its
7604 source, but don't go outside the loop or past a label. */
7606 /* If this sets a register to itself, we would repeat any previous
7607 biv increment if we applied this strategy blindly. */
7608 if (rtx_equal_p (dest_reg
, x
))
7617 insn
= PREV_INSN (insn
);
7619 while (insn
&& NOTE_P (insn
)
7620 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
7624 set
= single_set (insn
);
7627 dest
= SET_DEST (set
);
7629 || (GET_CODE (dest
) == SUBREG
7630 && (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
7631 && (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_INT
)
7632 && SUBREG_REG (dest
) == x
))
7633 return basic_induction_var (loop
, SET_SRC (set
),
7634 (GET_MODE (SET_SRC (set
)) == VOIDmode
7636 : GET_MODE (SET_SRC (set
))),
7638 inc_val
, mult_val
, location
);
7640 while (GET_CODE (dest
) == SUBREG
7641 || GET_CODE (dest
) == ZERO_EXTRACT
7642 || GET_CODE (dest
) == STRICT_LOW_PART
)
7643 dest
= XEXP (dest
, 0);
7649 /* Can accept constant setting of biv only when inside inner most loop.
7650 Otherwise, a biv of an inner loop may be incorrectly recognized
7651 as a biv of the outer loop,
7652 causing code to be moved INTO the inner loop. */
7654 if (loop_invariant_p (loop
, x
) != 1)
7659 /* convert_modes dies if we try to convert to or from CCmode, so just
7660 exclude that case. It is very unlikely that a condition code value
7661 would be a useful iterator anyways. convert_modes dies if we try to
7662 convert a float mode to non-float or vice versa too. */
7663 if (loop
->level
== 1
7664 && GET_MODE_CLASS (mode
) == GET_MODE_CLASS (GET_MODE (dest_reg
))
7665 && GET_MODE_CLASS (mode
) != MODE_CC
)
7667 /* Possible bug here? Perhaps we don't know the mode of X. */
7668 last
= get_last_insn ();
7669 inc
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
7670 if (get_last_insn () != last
)
7672 delete_insns_since (last
);
7677 *mult_val
= const0_rtx
;
7684 /* Ignore this BIV if signed arithmetic overflow is defined. */
7687 return basic_induction_var (loop
, XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
7688 dest_reg
, p
, inc_val
, mult_val
, location
);
7691 /* Similar, since this can be a sign extension. */
7692 for (insn
= PREV_INSN (p
);
7693 (insn
&& NOTE_P (insn
)
7694 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
7695 insn
= PREV_INSN (insn
))
7699 set
= single_set (insn
);
7701 if (! rtx_equal_p (dest_reg
, XEXP (x
, 0))
7702 && set
&& SET_DEST (set
) == XEXP (x
, 0)
7703 && GET_CODE (XEXP (x
, 1)) == CONST_INT
7704 && INTVAL (XEXP (x
, 1)) >= 0
7705 && GET_CODE (SET_SRC (set
)) == ASHIFT
7706 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
7707 return basic_induction_var (loop
, XEXP (SET_SRC (set
), 0),
7708 GET_MODE (XEXP (x
, 0)),
7709 dest_reg
, insn
, inc_val
, mult_val
,
7718 /* A general induction variable (giv) is any quantity that is a linear
7719 function of a basic induction variable,
7720 i.e. giv = biv * mult_val + add_val.
7721 The coefficients can be any loop invariant quantity.
7722 A giv need not be computed directly from the biv;
7723 it can be computed by way of other givs. */
7725 /* Determine whether X computes a giv.
7726 If it does, return a nonzero value
7727 which is the benefit from eliminating the computation of X;
7728 set *SRC_REG to the register of the biv that it is computed from;
7729 set *ADD_VAL and *MULT_VAL to the coefficients,
7730 such that the value of X is biv * mult + add; */
7733 general_induction_var (const struct loop
*loop
, rtx x
, rtx
*src_reg
,
7734 rtx
*add_val
, rtx
*mult_val
, rtx
*ext_val
,
7735 int is_addr
, int *pbenefit
,
7736 enum machine_mode addr_mode
)
7738 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7741 /* If this is an invariant, forget it, it isn't a giv. */
7742 if (loop_invariant_p (loop
, x
) == 1)
7746 *ext_val
= NULL_RTX
;
7747 x
= simplify_giv_expr (loop
, x
, ext_val
, pbenefit
);
7751 switch (GET_CODE (x
))
7755 /* Since this is now an invariant and wasn't before, it must be a giv
7756 with MULT_VAL == 0. It doesn't matter which BIV we associate this
7758 *src_reg
= ivs
->list
->biv
->dest_reg
;
7759 *mult_val
= const0_rtx
;
7764 /* This is equivalent to a BIV. */
7766 *mult_val
= const1_rtx
;
7767 *add_val
= const0_rtx
;
7771 /* Either (plus (biv) (invar)) or
7772 (plus (mult (biv) (invar_1)) (invar_2)). */
7773 if (GET_CODE (XEXP (x
, 0)) == MULT
)
7775 *src_reg
= XEXP (XEXP (x
, 0), 0);
7776 *mult_val
= XEXP (XEXP (x
, 0), 1);
7780 *src_reg
= XEXP (x
, 0);
7781 *mult_val
= const1_rtx
;
7783 *add_val
= XEXP (x
, 1);
7787 /* ADD_VAL is zero. */
7788 *src_reg
= XEXP (x
, 0);
7789 *mult_val
= XEXP (x
, 1);
7790 *add_val
= const0_rtx
;
7797 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
7798 unless they are CONST_INT). */
7799 if (GET_CODE (*add_val
) == USE
)
7800 *add_val
= XEXP (*add_val
, 0);
7801 if (GET_CODE (*mult_val
) == USE
)
7802 *mult_val
= XEXP (*mult_val
, 0);
7805 *pbenefit
+= address_cost (orig_x
, addr_mode
) - reg_address_cost
;
7807 *pbenefit
+= rtx_cost (orig_x
, SET
);
7809 /* Always return true if this is a giv so it will be detected as such,
7810 even if the benefit is zero or negative. This allows elimination
7811 of bivs that might otherwise not be eliminated. */
7815 /* Given an expression, X, try to form it as a linear function of a biv.
7816 We will canonicalize it to be of the form
7817 (plus (mult (BIV) (invar_1))
7819 with possible degeneracies.
7821 The invariant expressions must each be of a form that can be used as a
7822 machine operand. We surround then with a USE rtx (a hack, but localized
7823 and certainly unambiguous!) if not a CONST_INT for simplicity in this
7824 routine; it is the caller's responsibility to strip them.
7826 If no such canonicalization is possible (i.e., two biv's are used or an
7827 expression that is neither invariant nor a biv or giv), this routine
7830 For a nonzero return, the result will have a code of CONST_INT, USE,
7831 REG (for a BIV), PLUS, or MULT. No other codes will occur.
7833 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
7835 static rtx
sge_plus (enum machine_mode
, rtx
, rtx
);
7836 static rtx
sge_plus_constant (rtx
, rtx
);
7839 simplify_giv_expr (const struct loop
*loop
, rtx x
, rtx
*ext_val
, int *benefit
)
7841 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7842 struct loop_regs
*regs
= LOOP_REGS (loop
);
7843 enum machine_mode mode
= GET_MODE (x
);
7847 /* If this is not an integer mode, or if we cannot do arithmetic in this
7848 mode, this can't be a giv. */
7849 if (mode
!= VOIDmode
7850 && (GET_MODE_CLASS (mode
) != MODE_INT
7851 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
7854 switch (GET_CODE (x
))
7857 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
7858 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
7859 if (arg0
== 0 || arg1
== 0)
7862 /* Put constant last, CONST_INT last if both constant. */
7863 if ((GET_CODE (arg0
) == USE
7864 || GET_CODE (arg0
) == CONST_INT
)
7865 && ! ((GET_CODE (arg0
) == USE
7866 && GET_CODE (arg1
) == USE
)
7867 || GET_CODE (arg1
) == CONST_INT
))
7868 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
7870 /* Handle addition of zero, then addition of an invariant. */
7871 if (arg1
== const0_rtx
)
7873 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
7874 switch (GET_CODE (arg0
))
7878 /* Adding two invariants must result in an invariant, so enclose
7879 addition operation inside a USE and return it. */
7880 if (GET_CODE (arg0
) == USE
)
7881 arg0
= XEXP (arg0
, 0);
7882 if (GET_CODE (arg1
) == USE
)
7883 arg1
= XEXP (arg1
, 0);
7885 if (GET_CODE (arg0
) == CONST_INT
)
7886 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
7887 if (GET_CODE (arg1
) == CONST_INT
)
7888 tem
= sge_plus_constant (arg0
, arg1
);
7890 tem
= sge_plus (mode
, arg0
, arg1
);
7892 if (GET_CODE (tem
) != CONST_INT
)
7893 tem
= gen_rtx_USE (mode
, tem
);
7898 /* biv + invar or mult + invar. Return sum. */
7899 return gen_rtx_PLUS (mode
, arg0
, arg1
);
7902 /* (a + invar_1) + invar_2. Associate. */
7904 simplify_giv_expr (loop
,
7916 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
7917 MULT to reduce cases. */
7919 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
7921 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
7923 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
7924 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
7925 Recurse to associate the second PLUS. */
7926 if (GET_CODE (arg1
) == MULT
)
7927 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
7929 if (GET_CODE (arg1
) == PLUS
)
7931 simplify_giv_expr (loop
,
7933 gen_rtx_PLUS (mode
, arg0
,
7938 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
7939 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
7942 if (!rtx_equal_p (arg0
, arg1
))
7945 return simplify_giv_expr (loop
,
7954 /* Handle "a - b" as "a + b * (-1)". */
7955 return simplify_giv_expr (loop
,
7964 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
7965 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
7966 if (arg0
== 0 || arg1
== 0)
7969 /* Put constant last, CONST_INT last if both constant. */
7970 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
7971 && GET_CODE (arg1
) != CONST_INT
)
7972 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
7974 /* If second argument is not now constant, not giv. */
7975 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
7978 /* Handle multiply by 0 or 1. */
7979 if (arg1
== const0_rtx
)
7982 else if (arg1
== const1_rtx
)
7985 switch (GET_CODE (arg0
))
7988 /* biv * invar. Done. */
7989 return gen_rtx_MULT (mode
, arg0
, arg1
);
7992 /* Product of two constants. */
7993 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
7996 /* invar * invar is a giv, but attempt to simplify it somehow. */
7997 if (GET_CODE (arg1
) != CONST_INT
)
8000 arg0
= XEXP (arg0
, 0);
8001 if (GET_CODE (arg0
) == MULT
)
8003 /* (invar_0 * invar_1) * invar_2. Associate. */
8004 return simplify_giv_expr (loop
,
8013 /* Propagate the MULT expressions to the innermost nodes. */
8014 else if (GET_CODE (arg0
) == PLUS
)
8016 /* (invar_0 + invar_1) * invar_2. Distribute. */
8017 return simplify_giv_expr (loop
,
8029 return gen_rtx_USE (mode
, gen_rtx_MULT (mode
, arg0
, arg1
));
8032 /* (a * invar_1) * invar_2. Associate. */
8033 return simplify_giv_expr (loop
,
8042 /* (a + invar_1) * invar_2. Distribute. */
8043 return simplify_giv_expr (loop
,
8058 /* Shift by constant is multiply by power of two. */
8059 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
8063 simplify_giv_expr (loop
,
8066 GEN_INT ((HOST_WIDE_INT
) 1
8067 << INTVAL (XEXP (x
, 1)))),
8071 /* "-a" is "a * (-1)" */
8072 return simplify_giv_expr (loop
,
8073 gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
8077 /* "~a" is "-a - 1". Silly, but easy. */
8078 return simplify_giv_expr (loop
,
8079 gen_rtx_MINUS (mode
,
8080 gen_rtx_NEG (mode
, XEXP (x
, 0)),
8085 /* Already in proper form for invariant. */
8091 /* Conditionally recognize extensions of simple IVs. After we've
8092 computed loop traversal counts and verified the range of the
8093 source IV, we'll reevaluate this as a GIV. */
8094 if (*ext_val
== NULL_RTX
)
8096 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
8097 if (arg0
&& *ext_val
== NULL_RTX
&& REG_P (arg0
))
8099 *ext_val
= gen_rtx_fmt_e (GET_CODE (x
), mode
, arg0
);
8106 /* If this is a new register, we can't deal with it. */
8107 if (REGNO (x
) >= max_reg_before_loop
)
8110 /* Check for biv or giv. */
8111 switch (REG_IV_TYPE (ivs
, REGNO (x
)))
8115 case GENERAL_INDUCT
:
8117 struct induction
*v
= REG_IV_INFO (ivs
, REGNO (x
));
8119 /* Form expression from giv and add benefit. Ensure this giv
8120 can derive another and subtract any needed adjustment if so. */
8122 /* Increasing the benefit here is risky. The only case in which it
8123 is arguably correct is if this is the only use of V. In other
8124 cases, this will artificially inflate the benefit of the current
8125 giv, and lead to suboptimal code. Thus, it is disabled, since
8126 potentially not reducing an only marginally beneficial giv is
8127 less harmful than reducing many givs that are not really
8130 rtx single_use
= regs
->array
[REGNO (x
)].single_usage
;
8131 if (single_use
&& single_use
!= const0_rtx
)
8132 *benefit
+= v
->benefit
;
8138 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
8139 v
->src_reg
, v
->mult_val
),
8142 if (v
->derive_adjustment
)
8143 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
8144 arg0
= simplify_giv_expr (loop
, tem
, ext_val
, benefit
);
8147 if (!v
->ext_dependent
)
8152 *ext_val
= v
->ext_dependent
;
8160 /* If it isn't an induction variable, and it is invariant, we
8161 may be able to simplify things further by looking through
8162 the bits we just moved outside the loop. */
8163 if (loop_invariant_p (loop
, x
) == 1)
8166 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
8168 for (m
= movables
->head
; m
; m
= m
->next
)
8169 if (rtx_equal_p (x
, m
->set_dest
))
8171 /* Ok, we found a match. Substitute and simplify. */
8173 /* If we match another movable, we must use that, as
8174 this one is going away. */
8176 return simplify_giv_expr (loop
, m
->match
->set_dest
,
8179 /* If consec is nonzero, this is a member of a group of
8180 instructions that were moved together. We handle this
8181 case only to the point of seeking to the last insn and
8182 looking for a REG_EQUAL. Fail if we don't find one. */
8189 tem
= NEXT_INSN (tem
);
8193 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
8195 tem
= XEXP (tem
, 0);
8199 tem
= single_set (m
->insn
);
8201 tem
= SET_SRC (tem
);
8206 /* What we are most interested in is pointer
8207 arithmetic on invariants -- only take
8208 patterns we may be able to do something with. */
8209 if (GET_CODE (tem
) == PLUS
8210 || GET_CODE (tem
) == MULT
8211 || GET_CODE (tem
) == ASHIFT
8212 || GET_CODE (tem
) == CONST_INT
8213 || GET_CODE (tem
) == SYMBOL_REF
)
8215 tem
= simplify_giv_expr (loop
, tem
, ext_val
,
8220 else if (GET_CODE (tem
) == CONST
8221 && GET_CODE (XEXP (tem
, 0)) == PLUS
8222 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
8223 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
8225 tem
= simplify_giv_expr (loop
, XEXP (tem
, 0),
8237 /* Fall through to general case. */
8239 /* If invariant, return as USE (unless CONST_INT).
8240 Otherwise, not giv. */
8241 if (GET_CODE (x
) == USE
)
8244 if (loop_invariant_p (loop
, x
) == 1)
8246 if (GET_CODE (x
) == CONST_INT
)
8248 if (GET_CODE (x
) == CONST
8249 && GET_CODE (XEXP (x
, 0)) == PLUS
8250 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
8251 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
8253 return gen_rtx_USE (mode
, x
);
8260 /* This routine folds invariants such that there is only ever one
8261 CONST_INT in the summation. It is only used by simplify_giv_expr. */
8264 sge_plus_constant (rtx x
, rtx c
)
8266 if (GET_CODE (x
) == CONST_INT
)
8267 return GEN_INT (INTVAL (x
) + INTVAL (c
));
8268 else if (GET_CODE (x
) != PLUS
)
8269 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
8270 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
8272 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
8273 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
8275 else if (GET_CODE (XEXP (x
, 0)) == PLUS
8276 || GET_CODE (XEXP (x
, 1)) != PLUS
)
8278 return gen_rtx_PLUS (GET_MODE (x
),
8279 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
8283 return gen_rtx_PLUS (GET_MODE (x
),
8284 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
8289 sge_plus (enum machine_mode mode
, rtx x
, rtx y
)
8291 while (GET_CODE (y
) == PLUS
)
8293 rtx a
= XEXP (y
, 0);
8294 if (GET_CODE (a
) == CONST_INT
)
8295 x
= sge_plus_constant (x
, a
);
8297 x
= gen_rtx_PLUS (mode
, x
, a
);
8300 if (GET_CODE (y
) == CONST_INT
)
8301 x
= sge_plus_constant (x
, y
);
8303 x
= gen_rtx_PLUS (mode
, x
, y
);
8307 /* Help detect a giv that is calculated by several consecutive insns;
8311 The caller has already identified the first insn P as having a giv as dest;
8312 we check that all other insns that set the same register follow
8313 immediately after P, that they alter nothing else,
8314 and that the result of the last is still a giv.
8316 The value is 0 if the reg set in P is not really a giv.
8317 Otherwise, the value is the amount gained by eliminating
8318 all the consecutive insns that compute the value.
8320 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
8321 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
8323 The coefficients of the ultimate giv value are stored in
8324 *MULT_VAL and *ADD_VAL. */
8327 consec_sets_giv (const struct loop
*loop
, int first_benefit
, rtx p
,
8328 rtx src_reg
, rtx dest_reg
, rtx
*add_val
, rtx
*mult_val
,
8329 rtx
*ext_val
, rtx
*last_consec_insn
)
8331 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8332 struct loop_regs
*regs
= LOOP_REGS (loop
);
8339 /* Indicate that this is a giv so that we can update the value produced in
8340 each insn of the multi-insn sequence.
8342 This induction structure will be used only by the call to
8343 general_induction_var below, so we can allocate it on our stack.
8344 If this is a giv, our caller will replace the induct var entry with
8345 a new induction structure. */
8346 struct induction
*v
;
8348 if (REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != UNKNOWN_INDUCT
)
8351 v
= alloca (sizeof (struct induction
));
8352 v
->src_reg
= src_reg
;
8353 v
->mult_val
= *mult_val
;
8354 v
->add_val
= *add_val
;
8355 v
->benefit
= first_benefit
;
8357 v
->derive_adjustment
= 0;
8358 v
->ext_dependent
= NULL_RTX
;
8360 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
8361 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
8363 count
= regs
->array
[REGNO (dest_reg
)].n_times_set
- 1;
8368 code
= GET_CODE (p
);
8370 /* If libcall, skip to end of call sequence. */
8371 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
8375 && (set
= single_set (p
))
8376 && REG_P (SET_DEST (set
))
8377 && SET_DEST (set
) == dest_reg
8378 && (general_induction_var (loop
, SET_SRC (set
), &src_reg
,
8379 add_val
, mult_val
, ext_val
, 0,
8381 /* Giv created by equivalent expression. */
8382 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
8383 && general_induction_var (loop
, XEXP (temp
, 0), &src_reg
,
8384 add_val
, mult_val
, ext_val
, 0,
8385 &benefit
, VOIDmode
)))
8386 && src_reg
== v
->src_reg
)
8388 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
8389 benefit
+= libcall_benefit (p
);
8392 v
->mult_val
= *mult_val
;
8393 v
->add_val
= *add_val
;
8394 v
->benefit
+= benefit
;
8396 else if (code
!= NOTE
)
8398 /* Allow insns that set something other than this giv to a
8399 constant. Such insns are needed on machines which cannot
8400 include long constants and should not disqualify a giv. */
8402 && (set
= single_set (p
))
8403 && SET_DEST (set
) != dest_reg
8404 && CONSTANT_P (SET_SRC (set
)))
8407 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
8412 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
8413 *last_consec_insn
= p
;
8417 /* Return an rtx, if any, that expresses giv G2 as a function of the register
8418 represented by G1. If no such expression can be found, or it is clear that
8419 it cannot possibly be a valid address, 0 is returned.
8421 To perform the computation, we note that
8424 where `v' is the biv.
8426 So G2 = (y/b) * G1 + (b - a*y/x).
8428 Note that MULT = y/x.
8430 Update: A and B are now allowed to be additive expressions such that
8431 B contains all variables in A. That is, computing B-A will not require
8432 subtracting variables. */
8435 express_from_1 (rtx a
, rtx b
, rtx mult
)
8437 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
8439 if (mult
== const0_rtx
)
8442 /* If MULT is not 1, we cannot handle A with non-constants, since we
8443 would then be required to subtract multiples of the registers in A.
8444 This is theoretically possible, and may even apply to some Fortran
8445 constructs, but it is a lot of work and we do not attempt it here. */
8447 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
8450 /* In general these structures are sorted top to bottom (down the PLUS
8451 chain), but not left to right across the PLUS. If B is a higher
8452 order giv than A, we can strip one level and recurse. If A is higher
8453 order, we'll eventually bail out, but won't know that until the end.
8454 If they are the same, we'll strip one level around this loop. */
8456 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
8458 rtx ra
, rb
, oa
, ob
, tmp
;
8460 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
8461 if (GET_CODE (ra
) == PLUS
)
8462 tmp
= ra
, ra
= oa
, oa
= tmp
;
8464 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
8465 if (GET_CODE (rb
) == PLUS
)
8466 tmp
= rb
, rb
= ob
, ob
= tmp
;
8468 if (rtx_equal_p (ra
, rb
))
8469 /* We matched: remove one reg completely. */
8471 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
8472 /* An alternate match. */
8474 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
8475 /* An alternate match. */
8479 /* Indicates an extra register in B. Strip one level from B and
8480 recurse, hoping B was the higher order expression. */
8481 ob
= express_from_1 (a
, ob
, mult
);
8484 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
8488 /* Here we are at the last level of A, go through the cases hoping to
8489 get rid of everything but a constant. */
8491 if (GET_CODE (a
) == PLUS
)
8495 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
8496 if (rtx_equal_p (oa
, b
))
8498 else if (!rtx_equal_p (ra
, b
))
8501 if (GET_CODE (oa
) != CONST_INT
)
8504 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
8506 else if (GET_CODE (a
) == CONST_INT
)
8508 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
8510 else if (CONSTANT_P (a
))
8512 enum machine_mode mode_a
= GET_MODE (a
);
8513 enum machine_mode mode_b
= GET_MODE (b
);
8514 enum machine_mode mode
= mode_b
== VOIDmode
? mode_a
: mode_b
;
8515 return simplify_gen_binary (MINUS
, mode
, b
, a
);
8517 else if (GET_CODE (b
) == PLUS
)
8519 if (rtx_equal_p (a
, XEXP (b
, 0)))
8521 else if (rtx_equal_p (a
, XEXP (b
, 1)))
8526 else if (rtx_equal_p (a
, b
))
8533 express_from (struct induction
*g1
, struct induction
*g2
)
8537 /* The value that G1 will be multiplied by must be a constant integer. Also,
8538 the only chance we have of getting a valid address is if b*c/a (see above
8539 for notation) is also an integer. */
8540 if (GET_CODE (g1
->mult_val
) == CONST_INT
8541 && GET_CODE (g2
->mult_val
) == CONST_INT
)
8543 if (g1
->mult_val
== const0_rtx
8544 || (g1
->mult_val
== constm1_rtx
8545 && INTVAL (g2
->mult_val
)
8546 == (HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
8547 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
8549 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
8551 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
8555 /* ??? Find out if the one is a multiple of the other? */
8559 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
8560 if (add
== NULL_RTX
)
8562 /* Failed. If we've got a multiplication factor between G1 and G2,
8563 scale G1's addend and try again. */
8564 if (INTVAL (mult
) > 1)
8566 rtx g1_add_val
= g1
->add_val
;
8567 if (GET_CODE (g1_add_val
) == MULT
8568 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
8571 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
8572 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
8573 XEXP (g1_add_val
, 0), GEN_INT (m
));
8577 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
8581 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
8584 if (add
== NULL_RTX
)
8587 /* Form simplified final result. */
8588 if (mult
== const0_rtx
)
8590 else if (mult
== const1_rtx
)
8591 mult
= g1
->dest_reg
;
8593 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
8595 if (add
== const0_rtx
)
8599 if (GET_CODE (add
) == PLUS
8600 && CONSTANT_P (XEXP (add
, 1)))
8602 rtx tem
= XEXP (add
, 1);
8603 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
8607 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
8611 /* Return an rtx, if any, that expresses giv G2 as a function of the register
8612 represented by G1. This indicates that G2 should be combined with G1 and
8613 that G2 can use (either directly or via an address expression) a register
8614 used to represent G1. */
8617 combine_givs_p (struct induction
*g1
, struct induction
*g2
)
8621 /* With the introduction of ext dependent givs, we must care for modes.
8622 G2 must not use a wider mode than G1. */
8623 if (GET_MODE_SIZE (g1
->mode
) < GET_MODE_SIZE (g2
->mode
))
8626 ret
= comb
= express_from (g1
, g2
);
8627 if (comb
== NULL_RTX
)
8629 if (g1
->mode
!= g2
->mode
)
8630 ret
= gen_lowpart (g2
->mode
, comb
);
8632 /* If these givs are identical, they can be combined. We use the results
8633 of express_from because the addends are not in a canonical form, so
8634 rtx_equal_p is a weaker test. */
8635 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
8636 combination to be the other way round. */
8637 if (comb
== g1
->dest_reg
8638 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
8643 /* If G2 can be expressed as a function of G1 and that function is valid
8644 as an address and no more expensive than using a register for G2,
8645 the expression of G2 in terms of G1 can be used. */
8647 && g2
->giv_type
== DEST_ADDR
8648 && memory_address_p (GET_MODE (g2
->mem
), ret
))
8654 /* See if BL is monotonic and has a constant per-iteration increment.
8655 Return the increment if so, otherwise return 0. */
8657 static HOST_WIDE_INT
8658 get_monotonic_increment (struct iv_class
*bl
)
8660 struct induction
*v
;
8663 /* Get the total increment and check that it is constant. */
8664 incr
= biv_total_increment (bl
);
8665 if (incr
== 0 || GET_CODE (incr
) != CONST_INT
)
8668 for (v
= bl
->biv
; v
!= 0; v
= v
->next_iv
)
8670 if (GET_CODE (v
->add_val
) != CONST_INT
)
8673 if (INTVAL (v
->add_val
) < 0 && INTVAL (incr
) >= 0)
8676 if (INTVAL (v
->add_val
) > 0 && INTVAL (incr
) <= 0)
8679 return INTVAL (incr
);
8683 /* Subroutine of biv_fits_mode_p. Return true if biv BL, when biased by
8684 BIAS, will never exceed the unsigned range of MODE. LOOP is the loop
8685 to which the biv belongs and INCR is its per-iteration increment. */
8688 biased_biv_fits_mode_p (const struct loop
*loop
, struct iv_class
*bl
,
8689 HOST_WIDE_INT incr
, enum machine_mode mode
,
8690 unsigned HOST_WIDE_INT bias
)
8692 unsigned HOST_WIDE_INT initial
, maximum
, span
, delta
;
8694 /* We need to be able to manipulate MODE-size constants. */
8695 if (HOST_BITS_PER_WIDE_INT
< GET_MODE_BITSIZE (mode
))
8698 /* The number of loop iterations must be constant. */
8699 if (LOOP_INFO (loop
)->n_iterations
== 0)
8702 /* So must the biv's initial value. */
8703 if (bl
->initial_value
== 0 || GET_CODE (bl
->initial_value
) != CONST_INT
)
8706 initial
= bias
+ INTVAL (bl
->initial_value
);
8707 maximum
= GET_MODE_MASK (mode
);
8709 /* Make sure that the initial value is within range. */
8710 if (initial
> maximum
)
8713 /* Set up DELTA and SPAN such that the number of iterations * DELTA
8714 (calculated to arbitrary precision) must be <= SPAN. */
8723 /* Handle the special case in which MAXIMUM is the largest
8724 unsigned HOST_WIDE_INT and INITIAL is 0. */
8725 if (maximum
+ 1 == initial
)
8726 span
= LOOP_INFO (loop
)->n_iterations
* delta
;
8728 span
= maximum
+ 1 - initial
;
8730 return (span
/ LOOP_INFO (loop
)->n_iterations
>= delta
);
8734 /* Return true if biv BL will never exceed the bounds of MODE. LOOP is
8735 the loop to which BL belongs and INCR is its per-iteration increment.
8736 UNSIGNEDP is true if the biv should be treated as unsigned. */
8739 biv_fits_mode_p (const struct loop
*loop
, struct iv_class
*bl
,
8740 HOST_WIDE_INT incr
, enum machine_mode mode
, bool unsignedp
)
8742 struct loop_info
*loop_info
;
8743 unsigned HOST_WIDE_INT bias
;
8745 /* A biv's value will always be limited to its natural mode.
8746 Larger modes will observe the same wrap-around. */
8747 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (bl
->biv
->src_reg
)))
8748 mode
= GET_MODE (bl
->biv
->src_reg
);
8750 loop_info
= LOOP_INFO (loop
);
8752 bias
= (unsignedp
? 0 : (GET_MODE_MASK (mode
) >> 1) + 1);
8753 if (biased_biv_fits_mode_p (loop
, bl
, incr
, mode
, bias
))
8756 if (mode
== GET_MODE (bl
->biv
->src_reg
)
8757 && bl
->biv
->src_reg
== loop_info
->iteration_var
8758 && loop_info
->comparison_value
8759 && loop_invariant_p (loop
, loop_info
->comparison_value
))
8761 /* If the increment is +1, and the exit test is a <, the BIV
8762 cannot overflow. (For <=, we have the problematic case that
8763 the comparison value might be the maximum value of the range.) */
8766 if (loop_info
->comparison_code
== LT
)
8768 if (loop_info
->comparison_code
== LTU
&& unsignedp
)
8772 /* Likewise for increment -1 and exit test >. */
8775 if (loop_info
->comparison_code
== GT
)
8777 if (loop_info
->comparison_code
== GTU
&& unsignedp
)
8785 /* Given that X is an extension or truncation of BL, return true
8786 if it is unaffected by overflow. LOOP is the loop to which
8787 BL belongs and INCR is its per-iteration increment. */
8790 extension_within_bounds_p (const struct loop
*loop
, struct iv_class
*bl
,
8791 HOST_WIDE_INT incr
, rtx x
)
8793 enum machine_mode mode
;
8794 bool signedp
, unsignedp
;
8796 switch (GET_CODE (x
))
8800 mode
= GET_MODE (XEXP (x
, 0));
8801 signedp
= (GET_CODE (x
) == SIGN_EXTEND
);
8802 unsignedp
= (GET_CODE (x
) == ZERO_EXTEND
);
8806 /* We don't know whether this value is being used as signed
8807 or unsigned, so check the conditions for both. */
8808 mode
= GET_MODE (x
);
8809 signedp
= unsignedp
= true;
8816 return ((!signedp
|| biv_fits_mode_p (loop
, bl
, incr
, mode
, false))
8817 && (!unsignedp
|| biv_fits_mode_p (loop
, bl
, incr
, mode
, true)));
8821 /* Check each extension dependent giv in this class to see if its
8822 root biv is safe from wrapping in the interior mode, which would
8823 make the giv illegal. */
8826 check_ext_dependent_givs (const struct loop
*loop
, struct iv_class
*bl
)
8828 struct induction
*v
;
8831 incr
= get_monotonic_increment (bl
);
8833 /* Invalidate givs that fail the tests. */
8834 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8835 if (v
->ext_dependent
)
8838 && extension_within_bounds_p (loop
, bl
, incr
, v
->ext_dependent
))
8840 if (loop_dump_stream
)
8841 fprintf (loop_dump_stream
,
8842 "Verified ext dependent giv at %d of reg %d\n",
8843 INSN_UID (v
->insn
), bl
->regno
);
8847 if (loop_dump_stream
)
8848 fprintf (loop_dump_stream
,
8849 "Failed ext dependent giv at %d\n",
8850 INSN_UID (v
->insn
));
8853 bl
->all_reduced
= 0;
8858 /* Generate a version of VALUE in a mode appropriate for initializing V. */
8861 extend_value_for_giv (struct induction
*v
, rtx value
)
8863 rtx ext_dep
= v
->ext_dependent
;
8868 /* Recall that check_ext_dependent_givs verified that the known bounds
8869 of a biv did not overflow or wrap with respect to the extension for
8870 the giv. Therefore, constants need no additional adjustment. */
8871 if (CONSTANT_P (value
) && GET_MODE (value
) == VOIDmode
)
8874 /* Otherwise, we must adjust the value to compensate for the
8875 differing modes of the biv and the giv. */
8876 return gen_rtx_fmt_e (GET_CODE (ext_dep
), GET_MODE (ext_dep
), value
);
8879 struct combine_givs_stats
8886 cmp_combine_givs_stats (const void *xp
, const void *yp
)
8888 const struct combine_givs_stats
* const x
=
8889 (const struct combine_givs_stats
*) xp
;
8890 const struct combine_givs_stats
* const y
=
8891 (const struct combine_givs_stats
*) yp
;
8893 d
= y
->total_benefit
- x
->total_benefit
;
8894 /* Stabilize the sort. */
8896 d
= x
->giv_number
- y
->giv_number
;
8900 /* Check all pairs of givs for iv_class BL and see if any can be combined with
8901 any other. If so, point SAME to the giv combined with and set NEW_REG to
8902 be an expression (in terms of the other giv's DEST_REG) equivalent to the
8903 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
8906 combine_givs (struct loop_regs
*regs
, struct iv_class
*bl
)
8908 /* Additional benefit to add for being combined multiple times. */
8909 const int extra_benefit
= 3;
8911 struct induction
*g1
, *g2
, **giv_array
;
8912 int i
, j
, k
, giv_count
;
8913 struct combine_givs_stats
*stats
;
8916 /* Count givs, because bl->giv_count is incorrect here. */
8918 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
8922 giv_array
= alloca (giv_count
* sizeof (struct induction
*));
8924 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
8926 giv_array
[i
++] = g1
;
8928 stats
= xcalloc (giv_count
, sizeof (*stats
));
8929 can_combine
= xcalloc (giv_count
, giv_count
* sizeof (rtx
));
8931 for (i
= 0; i
< giv_count
; i
++)
8937 stats
[i
].giv_number
= i
;
8939 /* If a DEST_REG GIV is used only once, do not allow it to combine
8940 with anything, for in doing so we will gain nothing that cannot
8941 be had by simply letting the GIV with which we would have combined
8942 to be reduced on its own. The lossage shows up in particular with
8943 DEST_ADDR targets on hosts with reg+reg addressing, though it can
8944 be seen elsewhere as well. */
8945 if (g1
->giv_type
== DEST_REG
8946 && (single_use
= regs
->array
[REGNO (g1
->dest_reg
)].single_usage
)
8947 && single_use
!= const0_rtx
)
8950 this_benefit
= g1
->benefit
;
8951 /* Add an additional weight for zero addends. */
8952 if (g1
->no_const_addval
)
8955 for (j
= 0; j
< giv_count
; j
++)
8961 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
8963 can_combine
[i
* giv_count
+ j
] = this_combine
;
8964 this_benefit
+= g2
->benefit
+ extra_benefit
;
8967 stats
[i
].total_benefit
= this_benefit
;
8970 /* Iterate, combining until we can't. */
8972 qsort (stats
, giv_count
, sizeof (*stats
), cmp_combine_givs_stats
);
8974 if (loop_dump_stream
)
8976 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
8977 for (k
= 0; k
< giv_count
; k
++)
8979 g1
= giv_array
[stats
[k
].giv_number
];
8980 if (!g1
->combined_with
&& !g1
->same
)
8981 fprintf (loop_dump_stream
, " {%d, %d}",
8982 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
8983 stats
[k
].total_benefit
);
8985 putc ('\n', loop_dump_stream
);
8988 for (k
= 0; k
< giv_count
; k
++)
8990 int g1_add_benefit
= 0;
8992 i
= stats
[k
].giv_number
;
8995 /* If it has already been combined, skip. */
8996 if (g1
->combined_with
|| g1
->same
)
8999 for (j
= 0; j
< giv_count
; j
++)
9002 if (g1
!= g2
&& can_combine
[i
* giv_count
+ j
]
9003 /* If it has already been combined, skip. */
9004 && ! g2
->same
&& ! g2
->combined_with
)
9008 g2
->new_reg
= can_combine
[i
* giv_count
+ j
];
9010 /* For destination, we now may replace by mem expression instead
9011 of register. This changes the costs considerably, so add the
9013 if (g2
->giv_type
== DEST_ADDR
)
9014 g2
->benefit
= (g2
->benefit
+ reg_address_cost
9015 - address_cost (g2
->new_reg
,
9016 GET_MODE (g2
->mem
)));
9017 g1
->combined_with
++;
9018 g1
->lifetime
+= g2
->lifetime
;
9020 g1_add_benefit
+= g2
->benefit
;
9022 /* ??? The new final_[bg]iv_value code does a much better job
9023 of finding replaceable giv's, and hence this code may no
9024 longer be necessary. */
9025 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
9026 g1_add_benefit
-= copy_cost
;
9028 /* To help optimize the next set of combinations, remove
9029 this giv from the benefits of other potential mates. */
9030 for (l
= 0; l
< giv_count
; ++l
)
9032 int m
= stats
[l
].giv_number
;
9033 if (can_combine
[m
* giv_count
+ j
])
9034 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
9037 if (loop_dump_stream
)
9038 fprintf (loop_dump_stream
,
9039 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
9040 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
),
9041 g1
->benefit
, g1_add_benefit
, g1
->lifetime
);
9045 /* To help optimize the next set of combinations, remove
9046 this giv from the benefits of other potential mates. */
9047 if (g1
->combined_with
)
9049 for (j
= 0; j
< giv_count
; ++j
)
9051 int m
= stats
[j
].giv_number
;
9052 if (can_combine
[m
* giv_count
+ i
])
9053 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
9056 g1
->benefit
+= g1_add_benefit
;
9058 /* We've finished with this giv, and everything it touched.
9059 Restart the combination so that proper weights for the
9060 rest of the givs are properly taken into account. */
9061 /* ??? Ideally we would compact the arrays at this point, so
9062 as to not cover old ground. But sanely compacting
9063 can_combine is tricky. */
9073 /* Generate sequence for REG = B * M + A. B is the initial value of
9074 the basic induction variable, M a multiplicative constant, A an
9075 additive constant and REG the destination register. */
9078 gen_add_mult (rtx b
, rtx m
, rtx a
, rtx reg
)
9084 /* Use unsigned arithmetic. */
9085 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
9087 emit_move_insn (reg
, result
);
9095 /* Update registers created in insn sequence SEQ. */
9098 loop_regs_update (const struct loop
*loop ATTRIBUTE_UNUSED
, rtx seq
)
9102 /* Update register info for alias analysis. */
9105 while (insn
!= NULL_RTX
)
9107 rtx set
= single_set (insn
);
9109 if (set
&& REG_P (SET_DEST (set
)))
9110 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
9112 insn
= NEXT_INSN (insn
);
9117 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. B
9118 is the initial value of the basic induction variable, M a
9119 multiplicative constant, A an additive constant and REG the
9120 destination register. */
9123 loop_iv_add_mult_emit_before (const struct loop
*loop
, rtx b
, rtx m
, rtx a
,
9124 rtx reg
, basic_block before_bb
, rtx before_insn
)
9130 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
);
9134 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
9135 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
9137 /* Increase the lifetime of any invariants moved further in code. */
9138 update_reg_last_use (a
, before_insn
);
9139 update_reg_last_use (b
, before_insn
);
9140 update_reg_last_use (m
, before_insn
);
9142 /* It is possible that the expansion created lots of new registers.
9143 Iterate over the sequence we just created and record them all. We
9144 must do this before inserting the sequence. */
9145 loop_regs_update (loop
, seq
);
9147 loop_insn_emit_before (loop
, before_bb
, before_insn
, seq
);
9151 /* Emit insns in loop pre-header to set REG = B * M + A. B is the
9152 initial value of the basic induction variable, M a multiplicative
9153 constant, A an additive constant and REG the destination
9157 loop_iv_add_mult_sink (const struct loop
*loop
, rtx b
, rtx m
, rtx a
, rtx reg
)
9161 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
9162 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
9164 /* Increase the lifetime of any invariants moved further in code.
9165 ???? Is this really necessary? */
9166 update_reg_last_use (a
, loop
->sink
);
9167 update_reg_last_use (b
, loop
->sink
);
9168 update_reg_last_use (m
, loop
->sink
);
9170 /* It is possible that the expansion created lots of new registers.
9171 Iterate over the sequence we just created and record them all. We
9172 must do this before inserting the sequence. */
9173 loop_regs_update (loop
, seq
);
9175 loop_insn_sink (loop
, seq
);
9179 /* Emit insns after loop to set REG = B * M + A. B is the initial
9180 value of the basic induction variable, M a multiplicative constant,
9181 A an additive constant and REG the destination register. */
9184 loop_iv_add_mult_hoist (const struct loop
*loop
, rtx b
, rtx m
, rtx a
, rtx reg
)
9188 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
9189 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
9191 /* It is possible that the expansion created lots of new registers.
9192 Iterate over the sequence we just created and record them all. We
9193 must do this before inserting the sequence. */
9194 loop_regs_update (loop
, seq
);
9196 loop_insn_hoist (loop
, seq
);
9201 /* Similar to gen_add_mult, but compute cost rather than generating
9205 iv_add_mult_cost (rtx b
, rtx m
, rtx a
, rtx reg
)
9211 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
9213 emit_move_insn (reg
, result
);
9214 last
= get_last_insn ();
9217 rtx t
= single_set (last
);
9219 cost
+= rtx_cost (SET_SRC (t
), SET
);
9220 last
= PREV_INSN (last
);
9226 /* Test whether A * B can be computed without
9227 an actual multiply insn. Value is 1 if so.
9229 ??? This function stinks because it generates a ton of wasted RTL
9230 ??? and as a result fragments GC memory to no end. There are other
9231 ??? places in the compiler which are invoked a lot and do the same
9232 ??? thing, generate wasted RTL just to see if something is possible. */
9235 product_cheap_p (rtx a
, rtx b
)
9240 /* If only one is constant, make it B. */
9241 if (GET_CODE (a
) == CONST_INT
)
9242 tmp
= a
, a
= b
, b
= tmp
;
9244 /* If first constant, both constant, so don't need multiply. */
9245 if (GET_CODE (a
) == CONST_INT
)
9248 /* If second not constant, neither is constant, so would need multiply. */
9249 if (GET_CODE (b
) != CONST_INT
)
9252 /* One operand is constant, so might not need multiply insn. Generate the
9253 code for the multiply and see if a call or multiply, or long sequence
9254 of insns is generated. */
9257 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 1);
9262 if (tmp
== NULL_RTX
)
9264 else if (INSN_P (tmp
))
9267 while (tmp
!= NULL_RTX
)
9269 rtx next
= NEXT_INSN (tmp
);
9272 || !NONJUMP_INSN_P (tmp
)
9273 || (GET_CODE (PATTERN (tmp
)) == SET
9274 && GET_CODE (SET_SRC (PATTERN (tmp
))) == MULT
)
9275 || (GET_CODE (PATTERN (tmp
)) == PARALLEL
9276 && GET_CODE (XVECEXP (PATTERN (tmp
), 0, 0)) == SET
9277 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp
), 0, 0))) == MULT
))
9286 else if (GET_CODE (tmp
) == SET
9287 && GET_CODE (SET_SRC (tmp
)) == MULT
)
9289 else if (GET_CODE (tmp
) == PARALLEL
9290 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
9291 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
9297 /* Check to see if loop can be terminated by a "decrement and branch until
9298 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
9299 Also try reversing an increment loop to a decrement loop
9300 to see if the optimization can be performed.
9301 Value is nonzero if optimization was performed. */
9303 /* This is useful even if the architecture doesn't have such an insn,
9304 because it might change a loops which increments from 0 to n to a loop
9305 which decrements from n to 0. A loop that decrements to zero is usually
9306 faster than one that increments from zero. */
9308 /* ??? This could be rewritten to use some of the loop unrolling procedures,
9309 such as approx_final_value, biv_total_increment, loop_iterations, and
9310 final_[bg]iv_value. */
9313 check_dbra_loop (struct loop
*loop
, int insn_count
)
9315 struct loop_info
*loop_info
= LOOP_INFO (loop
);
9316 struct loop_regs
*regs
= LOOP_REGS (loop
);
9317 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
9318 struct iv_class
*bl
;
9320 enum machine_mode mode
;
9326 rtx before_comparison
;
9330 int compare_and_branch
;
9331 rtx loop_start
= loop
->start
;
9332 rtx loop_end
= loop
->end
;
9334 /* If last insn is a conditional branch, and the insn before tests a
9335 register value, try to optimize it. Otherwise, we can't do anything. */
9337 jump
= PREV_INSN (loop_end
);
9338 comparison
= get_condition_for_loop (loop
, jump
);
9339 if (comparison
== 0)
9341 if (!onlyjump_p (jump
))
9344 /* Try to compute whether the compare/branch at the loop end is one or
9345 two instructions. */
9346 get_condition (jump
, &first_compare
, false, true);
9347 if (first_compare
== jump
)
9348 compare_and_branch
= 1;
9349 else if (first_compare
== prev_nonnote_insn (jump
))
9350 compare_and_branch
= 2;
9355 /* If more than one condition is present to control the loop, then
9356 do not proceed, as this function does not know how to rewrite
9357 loop tests with more than one condition.
9359 Look backwards from the first insn in the last comparison
9360 sequence and see if we've got another comparison sequence. */
9363 if ((jump1
= prev_nonnote_insn (first_compare
))
9368 /* Check all of the bivs to see if the compare uses one of them.
9369 Skip biv's set more than once because we can't guarantee that
9370 it will be zero on the last iteration. Also skip if the biv is
9371 used between its update and the test insn. */
9373 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
9375 if (bl
->biv_count
== 1
9376 && ! bl
->biv
->maybe_multiple
9377 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
9378 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
9383 /* Try swapping the comparison to identify a suitable biv. */
9385 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
9386 if (bl
->biv_count
== 1
9387 && ! bl
->biv
->maybe_multiple
9388 && bl
->biv
->dest_reg
== XEXP (comparison
, 1)
9389 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
9392 comparison
= gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)),
9394 XEXP (comparison
, 1),
9395 XEXP (comparison
, 0));
9402 /* Look for the case where the basic induction variable is always
9403 nonnegative, and equals zero on the last iteration.
9404 In this case, add a reg_note REG_NONNEG, which allows the
9405 m68k DBRA instruction to be used. */
9407 if (((GET_CODE (comparison
) == GT
&& XEXP (comparison
, 1) == constm1_rtx
)
9408 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
9409 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
9410 && INTVAL (bl
->biv
->add_val
) < 0)
9412 /* Initial value must be greater than 0,
9413 init_val % -dec_value == 0 to ensure that it equals zero on
9414 the last iteration */
9416 if (GET_CODE (bl
->initial_value
) == CONST_INT
9417 && INTVAL (bl
->initial_value
) > 0
9418 && (INTVAL (bl
->initial_value
)
9419 % (-INTVAL (bl
->biv
->add_val
))) == 0)
9421 /* Register always nonnegative, add REG_NOTE to branch. */
9422 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
9424 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
9431 /* If the decrement is 1 and the value was tested as >= 0 before
9432 the loop, then we can safely optimize. */
9433 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
9440 before_comparison
= get_condition_for_loop (loop
, p
);
9441 if (before_comparison
9442 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
9443 && (GET_CODE (before_comparison
) == LT
9444 || GET_CODE (before_comparison
) == LTU
)
9445 && XEXP (before_comparison
, 1) == const0_rtx
9446 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
9447 && INTVAL (bl
->biv
->add_val
) == -1)
9449 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
9451 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
9459 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
9460 && INTVAL (bl
->biv
->add_val
) > 0)
9462 /* Try to change inc to dec, so can apply above optimization. */
9464 all registers modified are induction variables or invariant,
9465 all memory references have non-overlapping addresses
9466 (obviously true if only one write)
9467 allow 2 insns for the compare/jump at the end of the loop. */
9468 /* Also, we must avoid any instructions which use both the reversed
9469 biv and another biv. Such instructions will fail if the loop is
9470 reversed. We meet this condition by requiring that either
9471 no_use_except_counting is true, or else that there is only
9473 int num_nonfixed_reads
= 0;
9474 /* 1 if the iteration var is used only to count iterations. */
9475 int no_use_except_counting
= 0;
9476 /* 1 if the loop has no memory store, or it has a single memory store
9477 which is reversible. */
9478 int reversible_mem_store
= 1;
9480 if (bl
->giv_count
== 0
9481 && !loop
->exit_count
9482 && !loop_info
->has_multiple_exit_targets
)
9484 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
9485 struct iv_class
*blt
;
9487 /* If there are no givs for this biv, and the only exit is the
9488 fall through at the end of the loop, then
9489 see if perhaps there are no uses except to count. */
9490 no_use_except_counting
= 1;
9491 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
9494 rtx set
= single_set (p
);
9496 if (set
&& REG_P (SET_DEST (set
))
9497 && REGNO (SET_DEST (set
)) == bl
->regno
)
9498 /* An insn that sets the biv is okay. */
9500 else if (!reg_mentioned_p (bivreg
, PATTERN (p
)))
9501 /* An insn that doesn't mention the biv is okay. */
9503 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
9504 || p
== prev_nonnote_insn (loop_end
))
9506 /* If either of these insns uses the biv and sets a pseudo
9507 that has more than one usage, then the biv has uses
9508 other than counting since it's used to derive a value
9509 that is used more than one time. */
9510 note_stores (PATTERN (p
), note_set_pseudo_multiple_uses
,
9512 if (regs
->multiple_uses
)
9514 no_use_except_counting
= 0;
9520 no_use_except_counting
= 0;
9525 /* A biv has uses besides counting if it is used to set
9527 for (blt
= ivs
->list
; blt
; blt
= blt
->next
)
9529 && reg_mentioned_p (bivreg
, SET_SRC (blt
->init_set
)))
9531 no_use_except_counting
= 0;
9536 if (no_use_except_counting
)
9537 /* No need to worry about MEMs. */
9539 else if (loop_info
->num_mem_sets
<= 1)
9541 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
9543 num_nonfixed_reads
+= count_nonfixed_reads (loop
, PATTERN (p
));
9545 /* If the loop has a single store, and the destination address is
9546 invariant, then we can't reverse the loop, because this address
9547 might then have the wrong value at loop exit.
9548 This would work if the source was invariant also, however, in that
9549 case, the insn should have been moved out of the loop. */
9551 if (loop_info
->num_mem_sets
== 1)
9553 struct induction
*v
;
9555 /* If we could prove that each of the memory locations
9556 written to was different, then we could reverse the
9557 store -- but we don't presently have any way of
9559 reversible_mem_store
= 0;
9561 /* If the store depends on a register that is set after the
9562 store, it depends on the initial value, and is thus not
9564 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
9566 if (v
->giv_type
== DEST_REG
9567 && reg_mentioned_p (v
->dest_reg
,
9568 PATTERN (loop_info
->first_loop_store_insn
))
9569 && loop_insn_first_p (loop_info
->first_loop_store_insn
,
9571 reversible_mem_store
= 0;
9578 /* This code only acts for innermost loops. Also it simplifies
9579 the memory address check by only reversing loops with
9580 zero or one memory access.
9581 Two memory accesses could involve parts of the same array,
9582 and that can't be reversed.
9583 If the biv is used only for counting, than we don't need to worry
9584 about all these things. */
9586 if ((num_nonfixed_reads
<= 1
9587 && ! loop_info
->has_nonconst_call
9588 && ! loop_info
->has_prefetch
9589 && ! loop_info
->has_volatile
9590 && reversible_mem_store
9591 && (bl
->giv_count
+ bl
->biv_count
+ loop_info
->num_mem_sets
9592 + num_unmoved_movables (loop
) + compare_and_branch
== insn_count
)
9593 && (bl
== ivs
->list
&& bl
->next
== 0))
9594 || (no_use_except_counting
&& ! loop_info
->has_prefetch
))
9598 /* Loop can be reversed. */
9599 if (loop_dump_stream
)
9600 fprintf (loop_dump_stream
, "Can reverse loop\n");
9602 /* Now check other conditions:
9604 The increment must be a constant, as must the initial value,
9605 and the comparison code must be LT.
9607 This test can probably be improved since +/- 1 in the constant
9608 can be obtained by changing LT to LE and vice versa; this is
9612 /* for constants, LE gets turned into LT */
9613 && (GET_CODE (comparison
) == LT
9614 || (GET_CODE (comparison
) == LE
9615 && no_use_except_counting
)
9616 || GET_CODE (comparison
) == LTU
))
9618 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
= 0;
9619 rtx initial_value
, comparison_value
;
9621 enum rtx_code cmp_code
;
9622 int comparison_const_width
;
9623 unsigned HOST_WIDE_INT comparison_sign_mask
;
9624 bool keep_first_compare
;
9626 add_val
= INTVAL (bl
->biv
->add_val
);
9627 comparison_value
= XEXP (comparison
, 1);
9628 if (GET_MODE (comparison_value
) == VOIDmode
)
9629 comparison_const_width
9630 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
9632 comparison_const_width
9633 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
9634 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
9635 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
9636 comparison_sign_mask
9637 = (unsigned HOST_WIDE_INT
) 1 << (comparison_const_width
- 1);
9639 /* If the comparison value is not a loop invariant, then we
9640 can not reverse this loop.
9642 ??? If the insns which initialize the comparison value as
9643 a whole compute an invariant result, then we could move
9644 them out of the loop and proceed with loop reversal. */
9645 if (! loop_invariant_p (loop
, comparison_value
))
9648 if (GET_CODE (comparison_value
) == CONST_INT
)
9649 comparison_val
= INTVAL (comparison_value
);
9650 initial_value
= bl
->initial_value
;
9652 /* Normalize the initial value if it is an integer and
9653 has no other use except as a counter. This will allow
9654 a few more loops to be reversed. */
9655 if (no_use_except_counting
9656 && GET_CODE (comparison_value
) == CONST_INT
9657 && GET_CODE (initial_value
) == CONST_INT
)
9659 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
9660 /* The code below requires comparison_val to be a multiple
9661 of add_val in order to do the loop reversal, so
9662 round up comparison_val to a multiple of add_val.
9663 Since comparison_value is constant, we know that the
9664 current comparison code is LT. */
9665 comparison_val
= comparison_val
+ add_val
- 1;
9667 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
9668 /* We postpone overflow checks for COMPARISON_VAL here;
9669 even if there is an overflow, we might still be able to
9670 reverse the loop, if converting the loop exit test to
9672 initial_value
= const0_rtx
;
9675 /* First check if we can do a vanilla loop reversal. */
9676 if (initial_value
== const0_rtx
9677 && GET_CODE (comparison_value
) == CONST_INT
9678 /* Now do postponed overflow checks on COMPARISON_VAL. */
9679 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
9680 & comparison_sign_mask
))
9682 /* Register will always be nonnegative, with value
9683 0 on last iteration */
9684 add_adjust
= add_val
;
9691 if (GET_CODE (comparison
) == LE
)
9692 add_adjust
-= add_val
;
9694 /* If the initial value is not zero, or if the comparison
9695 value is not an exact multiple of the increment, then we
9696 can not reverse this loop. */
9697 if (initial_value
== const0_rtx
9698 && GET_CODE (comparison_value
) == CONST_INT
)
9700 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
9705 if (! no_use_except_counting
|| add_val
!= 1)
9709 final_value
= comparison_value
;
9711 /* Reset these in case we normalized the initial value
9712 and comparison value above. */
9713 if (GET_CODE (comparison_value
) == CONST_INT
9714 && GET_CODE (initial_value
) == CONST_INT
)
9716 comparison_value
= GEN_INT (comparison_val
);
9718 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
9720 bl
->initial_value
= initial_value
;
9722 /* Save some info needed to produce the new insns. */
9723 reg
= bl
->biv
->dest_reg
;
9724 mode
= GET_MODE (reg
);
9725 jump_label
= condjump_label (PREV_INSN (loop_end
));
9726 new_add_val
= GEN_INT (-INTVAL (bl
->biv
->add_val
));
9728 /* Set start_value; if this is not a CONST_INT, we need
9730 Initialize biv to start_value before loop start.
9731 The old initializing insn will be deleted as a
9732 dead store by flow.c. */
9733 if (initial_value
== const0_rtx
9734 && GET_CODE (comparison_value
) == CONST_INT
)
9737 = gen_int_mode (comparison_val
- add_adjust
, mode
);
9738 loop_insn_hoist (loop
, gen_move_insn (reg
, start_value
));
9740 else if (GET_CODE (initial_value
) == CONST_INT
)
9742 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
9743 rtx add_insn
= gen_add3_insn (reg
, comparison_value
, offset
);
9749 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
9750 loop_insn_hoist (loop
, add_insn
);
9751 if (GET_CODE (comparison
) == LE
)
9752 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
9755 else if (! add_adjust
)
9757 rtx sub_insn
= gen_sub3_insn (reg
, comparison_value
,
9763 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
9764 loop_insn_hoist (loop
, sub_insn
);
9767 /* We could handle the other cases too, but it'll be
9768 better to have a testcase first. */
9771 /* We may not have a single insn which can increment a reg, so
9772 create a sequence to hold all the insns from expand_inc. */
9774 expand_inc (reg
, new_add_val
);
9778 p
= loop_insn_emit_before (loop
, 0, bl
->biv
->insn
, tem
);
9779 delete_insn (bl
->biv
->insn
);
9781 /* Update biv info to reflect its new status. */
9783 bl
->initial_value
= start_value
;
9784 bl
->biv
->add_val
= new_add_val
;
9786 /* Update loop info. */
9787 loop_info
->initial_value
= reg
;
9788 loop_info
->initial_equiv_value
= reg
;
9789 loop_info
->final_value
= const0_rtx
;
9790 loop_info
->final_equiv_value
= const0_rtx
;
9791 loop_info
->comparison_value
= const0_rtx
;
9792 loop_info
->comparison_code
= cmp_code
;
9793 loop_info
->increment
= new_add_val
;
9795 /* Inc LABEL_NUSES so that delete_insn will
9796 not delete the label. */
9797 LABEL_NUSES (XEXP (jump_label
, 0))++;
9799 /* If we have a separate comparison insn that does more
9800 than just set cc0, the result of the comparison might
9801 be used outside the loop. */
9802 keep_first_compare
= (compare_and_branch
== 2
9804 && sets_cc0_p (first_compare
) <= 0
9808 /* Emit an insn after the end of the loop to set the biv's
9809 proper exit value if it is used anywhere outside the loop. */
9810 if (keep_first_compare
9811 || (REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
9813 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
9814 loop_insn_sink (loop
, gen_load_of_final_value (reg
, final_value
));
9816 if (keep_first_compare
)
9817 loop_insn_sink (loop
, PATTERN (first_compare
));
9819 /* Delete compare/branch at end of loop. */
9820 delete_related_insns (PREV_INSN (loop_end
));
9821 if (compare_and_branch
== 2)
9822 delete_related_insns (first_compare
);
9824 /* Add new compare/branch insn at end of loop. */
9826 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
9828 XEXP (jump_label
, 0));
9831 emit_jump_insn_before (tem
, loop_end
);
9833 for (tem
= PREV_INSN (loop_end
);
9834 tem
&& !JUMP_P (tem
);
9835 tem
= PREV_INSN (tem
))
9839 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
9845 /* Increment of LABEL_NUSES done above. */
9846 /* Register is now always nonnegative,
9847 so add REG_NONNEG note to the branch. */
9848 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, reg
,
9854 /* No insn may reference both the reversed and another biv or it
9855 will fail (see comment near the top of the loop reversal
9857 Earlier on, we have verified that the biv has no use except
9858 counting, or it is the only biv in this function.
9859 However, the code that computes no_use_except_counting does
9860 not verify reg notes. It's possible to have an insn that
9861 references another biv, and has a REG_EQUAL note with an
9862 expression based on the reversed biv. To avoid this case,
9863 remove all REG_EQUAL notes based on the reversed biv
9865 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
9869 rtx set
= single_set (p
);
9870 /* If this is a set of a GIV based on the reversed biv, any
9871 REG_EQUAL notes should still be correct. */
9873 || !REG_P (SET_DEST (set
))
9874 || (size_t) REGNO (SET_DEST (set
)) >= ivs
->n_regs
9875 || REG_IV_TYPE (ivs
, REGNO (SET_DEST (set
))) != GENERAL_INDUCT
9876 || REG_IV_INFO (ivs
, REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
9877 for (pnote
= ®_NOTES (p
); *pnote
;)
9879 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
9880 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
9882 *pnote
= XEXP (*pnote
, 1);
9884 pnote
= &XEXP (*pnote
, 1);
9888 /* Mark that this biv has been reversed. Each giv which depends
9889 on this biv, and which is also live past the end of the loop
9890 will have to be fixed up. */
9894 if (loop_dump_stream
)
9896 fprintf (loop_dump_stream
, "Reversed loop");
9898 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
9900 fprintf (loop_dump_stream
, "\n");
9911 /* Verify whether the biv BL appears to be eliminable,
9912 based on the insns in the loop that refer to it.
9914 If ELIMINATE_P is nonzero, actually do the elimination.
9916 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
9917 determine whether invariant insns should be placed inside or at the
9918 start of the loop. */
9921 maybe_eliminate_biv (const struct loop
*loop
, struct iv_class
*bl
,
9922 int eliminate_p
, int threshold
, int insn_count
)
9924 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
9925 rtx reg
= bl
->biv
->dest_reg
;
9928 /* Scan all insns in the loop, stopping if we find one that uses the
9929 biv in a way that we cannot eliminate. */
9931 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
9933 enum rtx_code code
= GET_CODE (p
);
9934 basic_block where_bb
= 0;
9935 rtx where_insn
= threshold
>= insn_count
? 0 : p
;
9938 /* If this is a libcall that sets a giv, skip ahead to its end. */
9941 note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
9945 rtx last
= XEXP (note
, 0);
9946 rtx set
= single_set (last
);
9948 if (set
&& REG_P (SET_DEST (set
)))
9950 unsigned int regno
= REGNO (SET_DEST (set
));
9952 if (regno
< ivs
->n_regs
9953 && REG_IV_TYPE (ivs
, regno
) == GENERAL_INDUCT
9954 && REG_IV_INFO (ivs
, regno
)->src_reg
== bl
->biv
->src_reg
)
9960 /* Closely examine the insn if the biv is mentioned. */
9961 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
9962 && reg_mentioned_p (reg
, PATTERN (p
))
9963 && ! maybe_eliminate_biv_1 (loop
, PATTERN (p
), p
, bl
,
9964 eliminate_p
, where_bb
, where_insn
))
9966 if (loop_dump_stream
)
9967 fprintf (loop_dump_stream
,
9968 "Cannot eliminate biv %d: biv used in insn %d.\n",
9969 bl
->regno
, INSN_UID (p
));
9973 /* If we are eliminating, kill REG_EQUAL notes mentioning the biv. */
9975 && (note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)) != NULL_RTX
9976 && reg_mentioned_p (reg
, XEXP (note
, 0)))
9977 remove_note (p
, note
);
9982 if (loop_dump_stream
)
9983 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
9984 bl
->regno
, eliminate_p
? "was" : "can be");
9991 /* INSN and REFERENCE are instructions in the same insn chain.
9992 Return nonzero if INSN is first. */
9995 loop_insn_first_p (rtx insn
, rtx reference
)
9999 for (p
= insn
, q
= reference
;;)
10001 /* Start with test for not first so that INSN == REFERENCE yields not
10003 if (q
== insn
|| ! p
)
10005 if (p
== reference
|| ! q
)
10008 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
10009 previous insn, hence the <= comparison below does not work if
10011 if (INSN_UID (p
) < max_uid_for_loop
10012 && INSN_UID (q
) < max_uid_for_loop
10014 return INSN_LUID (p
) <= INSN_LUID (q
);
10016 if (INSN_UID (p
) >= max_uid_for_loop
10019 if (INSN_UID (q
) >= max_uid_for_loop
)
10024 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
10025 the offset that we have to take into account due to auto-increment /
10026 div derivation is zero. */
10028 biv_elimination_giv_has_0_offset (struct induction
*biv
,
10029 struct induction
*giv
, rtx insn
)
10031 /* If the giv V had the auto-inc address optimization applied
10032 to it, and INSN occurs between the giv insn and the biv
10033 insn, then we'd have to adjust the value used here.
10034 This is rare, so we don't bother to make this possible. */
10035 if (giv
->auto_inc_opt
10036 && ((loop_insn_first_p (giv
->insn
, insn
)
10037 && loop_insn_first_p (insn
, biv
->insn
))
10038 || (loop_insn_first_p (biv
->insn
, insn
)
10039 && loop_insn_first_p (insn
, giv
->insn
))))
10045 /* If BL appears in X (part of the pattern of INSN), see if we can
10046 eliminate its use. If so, return 1. If not, return 0.
10048 If BIV does not appear in X, return 1.
10050 If ELIMINATE_P is nonzero, actually do the elimination.
10051 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
10052 Depending on how many items have been moved out of the loop, it
10053 will either be before INSN (when WHERE_INSN is nonzero) or at the
10054 start of the loop (when WHERE_INSN is zero). */
10057 maybe_eliminate_biv_1 (const struct loop
*loop
, rtx x
, rtx insn
,
10058 struct iv_class
*bl
, int eliminate_p
,
10059 basic_block where_bb
, rtx where_insn
)
10061 enum rtx_code code
= GET_CODE (x
);
10062 rtx reg
= bl
->biv
->dest_reg
;
10063 enum machine_mode mode
= GET_MODE (reg
);
10064 struct induction
*v
;
10076 /* If we haven't already been able to do something with this BIV,
10077 we can't eliminate it. */
10083 /* If this sets the BIV, it is not a problem. */
10084 if (SET_DEST (x
) == reg
)
10087 /* If this is an insn that defines a giv, it is also ok because
10088 it will go away when the giv is reduced. */
10089 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10090 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
10094 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
10096 /* Can replace with any giv that was reduced and
10097 that has (MULT_VAL != 0) and (ADD_VAL == 0).
10098 Require a constant for MULT_VAL, so we know it's nonzero.
10099 ??? We disable this optimization to avoid potential
10102 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10103 if (GET_CODE (v
->mult_val
) == CONST_INT
&& v
->mult_val
!= const0_rtx
10104 && v
->add_val
== const0_rtx
10105 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
10109 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
10115 /* If the giv has the opposite direction of change,
10116 then reverse the comparison. */
10117 if (INTVAL (v
->mult_val
) < 0)
10118 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
10119 const0_rtx
, v
->new_reg
);
10123 /* We can probably test that giv's reduced reg. */
10124 if (validate_change (insn
, &SET_SRC (x
), new, 0))
10128 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
10129 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
10130 Require a constant for MULT_VAL, so we know it's nonzero.
10131 ??? Do this only if ADD_VAL is a pointer to avoid a potential
10132 overflow problem. */
10134 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10135 if (GET_CODE (v
->mult_val
) == CONST_INT
10136 && v
->mult_val
!= const0_rtx
10137 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
10139 && (GET_CODE (v
->add_val
) == SYMBOL_REF
10140 || GET_CODE (v
->add_val
) == LABEL_REF
10141 || GET_CODE (v
->add_val
) == CONST
10142 || (REG_P (v
->add_val
)
10143 && REG_POINTER (v
->add_val
))))
10145 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
10151 /* If the giv has the opposite direction of change,
10152 then reverse the comparison. */
10153 if (INTVAL (v
->mult_val
) < 0)
10154 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
10157 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
10158 copy_rtx (v
->add_val
));
10160 /* Replace biv with the giv's reduced register. */
10161 update_reg_last_use (v
->add_val
, insn
);
10162 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
10165 /* Insn doesn't support that constant or invariant. Copy it
10166 into a register (it will be a loop invariant.) */
10167 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
10169 loop_insn_emit_before (loop
, 0, where_insn
,
10170 gen_move_insn (tem
,
10171 copy_rtx (v
->add_val
)));
10173 /* Substitute the new register for its invariant value in
10174 the compare expression. */
10175 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
10176 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
10185 case GT
: case GE
: case GTU
: case GEU
:
10186 case LT
: case LE
: case LTU
: case LEU
:
10187 /* See if either argument is the biv. */
10188 if (XEXP (x
, 0) == reg
)
10189 arg
= XEXP (x
, 1), arg_operand
= 1;
10190 else if (XEXP (x
, 1) == reg
)
10191 arg
= XEXP (x
, 0), arg_operand
= 0;
10195 if (CONSTANT_P (arg
))
10197 /* First try to replace with any giv that has constant positive
10198 mult_val and constant add_val. We might be able to support
10199 negative mult_val, but it seems complex to do it in general. */
10201 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10202 if (GET_CODE (v
->mult_val
) == CONST_INT
10203 && INTVAL (v
->mult_val
) > 0
10204 && (GET_CODE (v
->add_val
) == SYMBOL_REF
10205 || GET_CODE (v
->add_val
) == LABEL_REF
10206 || GET_CODE (v
->add_val
) == CONST
10207 || (REG_P (v
->add_val
)
10208 && REG_POINTER (v
->add_val
)))
10209 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
10210 && v
->mode
== mode
)
10212 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
10215 /* Don't eliminate if the linear combination that makes up
10216 the giv overflows when it is applied to ARG. */
10217 if (GET_CODE (arg
) == CONST_INT
)
10221 if (GET_CODE (v
->add_val
) == CONST_INT
)
10222 add_val
= v
->add_val
;
10224 add_val
= const0_rtx
;
10226 if (const_mult_add_overflow_p (arg
, v
->mult_val
,
10234 /* Replace biv with the giv's reduced reg. */
10235 validate_change (insn
, &XEXP (x
, 1 - arg_operand
), v
->new_reg
, 1);
10237 /* If all constants are actually constant integers and
10238 the derived constant can be directly placed in the COMPARE,
10240 if (GET_CODE (arg
) == CONST_INT
10241 && GET_CODE (v
->add_val
) == CONST_INT
)
10243 tem
= expand_mult_add (arg
, NULL_RTX
, v
->mult_val
,
10244 v
->add_val
, mode
, 1);
10248 /* Otherwise, load it into a register. */
10249 tem
= gen_reg_rtx (mode
);
10250 loop_iv_add_mult_emit_before (loop
, arg
,
10251 v
->mult_val
, v
->add_val
,
10252 tem
, where_bb
, where_insn
);
10255 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
10257 if (apply_change_group ())
10261 /* Look for giv with positive constant mult_val and nonconst add_val.
10262 Insert insns to calculate new compare value.
10263 ??? Turn this off due to possible overflow. */
10265 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10266 if (GET_CODE (v
->mult_val
) == CONST_INT
10267 && INTVAL (v
->mult_val
) > 0
10268 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
10274 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
10280 tem
= gen_reg_rtx (mode
);
10282 /* Replace biv with giv's reduced register. */
10283 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
10286 /* Compute value to compare against. */
10287 loop_iv_add_mult_emit_before (loop
, arg
,
10288 v
->mult_val
, v
->add_val
,
10289 tem
, where_bb
, where_insn
);
10290 /* Use it in this insn. */
10291 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
10292 if (apply_change_group ())
10296 else if (REG_P (arg
) || MEM_P (arg
))
10298 if (loop_invariant_p (loop
, arg
) == 1)
10300 /* Look for giv with constant positive mult_val and nonconst
10301 add_val. Insert insns to compute new compare value.
10302 ??? Turn this off due to possible overflow. */
10304 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10305 if (GET_CODE (v
->mult_val
) == CONST_INT
&& INTVAL (v
->mult_val
) > 0
10306 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
10312 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
10318 tem
= gen_reg_rtx (mode
);
10320 /* Replace biv with giv's reduced register. */
10321 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
10324 /* Compute value to compare against. */
10325 loop_iv_add_mult_emit_before (loop
, arg
,
10326 v
->mult_val
, v
->add_val
,
10327 tem
, where_bb
, where_insn
);
10328 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
10329 if (apply_change_group ())
10334 /* This code has problems. Basically, you can't know when
10335 seeing if we will eliminate BL, whether a particular giv
10336 of ARG will be reduced. If it isn't going to be reduced,
10337 we can't eliminate BL. We can try forcing it to be reduced,
10338 but that can generate poor code.
10340 The problem is that the benefit of reducing TV, below should
10341 be increased if BL can actually be eliminated, but this means
10342 we might have to do a topological sort of the order in which
10343 we try to process biv. It doesn't seem worthwhile to do
10344 this sort of thing now. */
10347 /* Otherwise the reg compared with had better be a biv. */
10349 || REG_IV_TYPE (ivs
, REGNO (arg
)) != BASIC_INDUCT
)
10352 /* Look for a pair of givs, one for each biv,
10353 with identical coefficients. */
10354 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10356 struct induction
*tv
;
10358 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
10361 for (tv
= REG_IV_CLASS (ivs
, REGNO (arg
))->giv
; tv
;
10363 if (! tv
->ignore
&& ! tv
->maybe_dead
10364 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
10365 && rtx_equal_p (tv
->add_val
, v
->add_val
)
10366 && tv
->mode
== mode
)
10368 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
10374 /* Replace biv with its giv's reduced reg. */
10375 XEXP (x
, 1 - arg_operand
) = v
->new_reg
;
10376 /* Replace other operand with the other giv's
10378 XEXP (x
, arg_operand
) = tv
->new_reg
;
10385 /* If we get here, the biv can't be eliminated. */
10389 /* If this address is a DEST_ADDR giv, it doesn't matter if the
10390 biv is used in it, since it will be replaced. */
10391 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
10392 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
10400 /* See if any subexpression fails elimination. */
10401 fmt
= GET_RTX_FORMAT (code
);
10402 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
10407 if (! maybe_eliminate_biv_1 (loop
, XEXP (x
, i
), insn
, bl
,
10408 eliminate_p
, where_bb
, where_insn
))
10413 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
10414 if (! maybe_eliminate_biv_1 (loop
, XVECEXP (x
, i
, j
), insn
, bl
,
10415 eliminate_p
, where_bb
, where_insn
))
10424 /* Return nonzero if the last use of REG
10425 is in an insn following INSN in the same basic block. */
10428 last_use_this_basic_block (rtx reg
, rtx insn
)
10432 n
&& !LABEL_P (n
) && !JUMP_P (n
);
10435 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
10441 /* Called via `note_stores' to record the initial value of a biv. Here we
10442 just record the location of the set and process it later. */
10445 record_initial (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
10447 struct loop_ivs
*ivs
= (struct loop_ivs
*) data
;
10448 struct iv_class
*bl
;
10451 || REGNO (dest
) >= ivs
->n_regs
10452 || REG_IV_TYPE (ivs
, REGNO (dest
)) != BASIC_INDUCT
)
10455 bl
= REG_IV_CLASS (ivs
, REGNO (dest
));
10457 /* If this is the first set found, record it. */
10458 if (bl
->init_insn
== 0)
10460 bl
->init_insn
= note_insn
;
10461 bl
->init_set
= set
;
10465 /* If any of the registers in X are "old" and currently have a last use earlier
10466 than INSN, update them to have a last use of INSN. Their actual last use
10467 will be the previous insn but it will not have a valid uid_luid so we can't
10468 use it. X must be a source expression only. */
10471 update_reg_last_use (rtx x
, rtx insn
)
10473 /* Check for the case where INSN does not have a valid luid. In this case,
10474 there is no need to modify the regno_last_uid, as this can only happen
10475 when code is inserted after the loop_end to set a pseudo's final value,
10476 and hence this insn will never be the last use of x.
10477 ???? This comment is not correct. See for example loop_givs_reduce.
10478 This may insert an insn before another new insn. */
10479 if (REG_P (x
) && REGNO (x
) < max_reg_before_loop
10480 && INSN_UID (insn
) < max_uid_for_loop
10481 && REGNO_LAST_LUID (REGNO (x
)) < INSN_LUID (insn
))
10483 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
10488 const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
10489 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
10492 update_reg_last_use (XEXP (x
, i
), insn
);
10493 else if (fmt
[i
] == 'E')
10494 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
10495 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
10500 /* Similar to rtlanal.c:get_condition, except that we also put an
10501 invariant last unless both operands are invariants. */
10504 get_condition_for_loop (const struct loop
*loop
, rtx x
)
10506 rtx comparison
= get_condition (x
, (rtx
*) 0, false, true);
10508 if (comparison
== 0
10509 || ! loop_invariant_p (loop
, XEXP (comparison
, 0))
10510 || loop_invariant_p (loop
, XEXP (comparison
, 1)))
10513 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
10514 XEXP (comparison
, 1), XEXP (comparison
, 0));
10517 /* Scan the function and determine whether it has indirect (computed) jumps.
10519 This is taken mostly from flow.c; similar code exists elsewhere
10520 in the compiler. It may be useful to put this into rtlanal.c. */
10522 indirect_jump_in_function_p (rtx start
)
10526 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
10527 if (computed_jump_p (insn
))
10533 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
10534 documentation for LOOP_MEMS for the definition of `appropriate'.
10535 This function is called from prescan_loop via for_each_rtx. */
10538 insert_loop_mem (rtx
*mem
, void *data ATTRIBUTE_UNUSED
)
10540 struct loop_info
*loop_info
= data
;
10547 switch (GET_CODE (m
))
10553 /* We're not interested in MEMs that are only clobbered. */
10557 /* We're not interested in the MEM associated with a
10558 CONST_DOUBLE, so there's no need to traverse into this. */
10562 /* We're not interested in any MEMs that only appear in notes. */
10566 /* This is not a MEM. */
10570 /* See if we've already seen this MEM. */
10571 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
10572 if (rtx_equal_p (m
, loop_info
->mems
[i
].mem
))
10574 if (MEM_VOLATILE_P (m
) && !MEM_VOLATILE_P (loop_info
->mems
[i
].mem
))
10575 loop_info
->mems
[i
].mem
= m
;
10576 if (GET_MODE (m
) != GET_MODE (loop_info
->mems
[i
].mem
))
10577 /* The modes of the two memory accesses are different. If
10578 this happens, something tricky is going on, and we just
10579 don't optimize accesses to this MEM. */
10580 loop_info
->mems
[i
].optimize
= 0;
10585 /* Resize the array, if necessary. */
10586 if (loop_info
->mems_idx
== loop_info
->mems_allocated
)
10588 if (loop_info
->mems_allocated
!= 0)
10589 loop_info
->mems_allocated
*= 2;
10591 loop_info
->mems_allocated
= 32;
10593 loop_info
->mems
= xrealloc (loop_info
->mems
,
10594 loop_info
->mems_allocated
* sizeof (loop_mem_info
));
10597 /* Actually insert the MEM. */
10598 loop_info
->mems
[loop_info
->mems_idx
].mem
= m
;
10599 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
10600 because we can't put it in a register. We still store it in the
10601 table, though, so that if we see the same address later, but in a
10602 non-BLK mode, we'll not think we can optimize it at that point. */
10603 loop_info
->mems
[loop_info
->mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
10604 loop_info
->mems
[loop_info
->mems_idx
].reg
= NULL_RTX
;
10605 ++loop_info
->mems_idx
;
10611 /* Allocate REGS->ARRAY or reallocate it if it is too small.
10613 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
10614 register that is modified by an insn between FROM and TO. If the
10615 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
10616 more, stop incrementing it, to avoid overflow.
10618 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
10619 register I is used, if it is only used once. Otherwise, it is set
10620 to 0 (for no uses) or const0_rtx for more than one use. This
10621 parameter may be zero, in which case this processing is not done.
10623 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
10624 optimize register I. */
10627 loop_regs_scan (const struct loop
*loop
, int extra_size
)
10629 struct loop_regs
*regs
= LOOP_REGS (loop
);
10631 /* last_set[n] is nonzero iff reg n has been set in the current
10632 basic block. In that case, it is the insn that last set reg n. */
10637 old_nregs
= regs
->num
;
10638 regs
->num
= max_reg_num ();
10640 /* Grow the regs array if not allocated or too small. */
10641 if (regs
->num
>= regs
->size
)
10643 regs
->size
= regs
->num
+ extra_size
;
10645 regs
->array
= xrealloc (regs
->array
, regs
->size
* sizeof (*regs
->array
));
10647 /* Zero the new elements. */
10648 memset (regs
->array
+ old_nregs
, 0,
10649 (regs
->size
- old_nregs
) * sizeof (*regs
->array
));
10652 /* Clear previously scanned fields but do not clear n_times_set. */
10653 for (i
= 0; i
< old_nregs
; i
++)
10655 regs
->array
[i
].set_in_loop
= 0;
10656 regs
->array
[i
].may_not_optimize
= 0;
10657 regs
->array
[i
].single_usage
= NULL_RTX
;
10660 last_set
= xcalloc (regs
->num
, sizeof (rtx
));
10662 /* Scan the loop, recording register usage. */
10663 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
10664 insn
= NEXT_INSN (insn
))
10668 /* Record registers that have exactly one use. */
10669 find_single_use_in_loop (regs
, insn
, PATTERN (insn
));
10671 /* Include uses in REG_EQUAL notes. */
10672 if (REG_NOTES (insn
))
10673 find_single_use_in_loop (regs
, insn
, REG_NOTES (insn
));
10675 if (GET_CODE (PATTERN (insn
)) == SET
10676 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
10677 count_one_set (regs
, insn
, PATTERN (insn
), last_set
);
10678 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
10681 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
10682 count_one_set (regs
, insn
, XVECEXP (PATTERN (insn
), 0, i
),
10687 if (LABEL_P (insn
) || JUMP_P (insn
))
10688 memset (last_set
, 0, regs
->num
* sizeof (rtx
));
10690 /* Invalidate all registers used for function argument passing.
10691 We check rtx_varies_p for the same reason as below, to allow
10692 optimizing PIC calculations. */
10696 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
10698 link
= XEXP (link
, 1))
10702 if (GET_CODE (op
= XEXP (link
, 0)) == USE
10703 && REG_P (reg
= XEXP (op
, 0))
10704 && rtx_varies_p (reg
, 1))
10705 regs
->array
[REGNO (reg
)].may_not_optimize
= 1;
10710 /* Invalidate all hard registers clobbered by calls. With one exception:
10711 a call-clobbered PIC register is still function-invariant for our
10712 purposes, since we can hoist any PIC calculations out of the loop.
10713 Thus the call to rtx_varies_p. */
10714 if (LOOP_INFO (loop
)->has_call
)
10715 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
10716 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
)
10717 && rtx_varies_p (regno_reg_rtx
[i
], 1))
10719 regs
->array
[i
].may_not_optimize
= 1;
10720 regs
->array
[i
].set_in_loop
= 1;
10723 #ifdef AVOID_CCMODE_COPIES
10724 /* Don't try to move insns which set CC registers if we should not
10725 create CCmode register copies. */
10726 for (i
= regs
->num
- 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
10727 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
10728 regs
->array
[i
].may_not_optimize
= 1;
10731 /* Set regs->array[I].n_times_set for the new registers. */
10732 for (i
= old_nregs
; i
< regs
->num
; i
++)
10733 regs
->array
[i
].n_times_set
= regs
->array
[i
].set_in_loop
;
10738 /* Returns the number of real INSNs in the LOOP. */
10741 count_insns_in_loop (const struct loop
*loop
)
10746 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
10747 insn
= NEXT_INSN (insn
))
10754 /* Move MEMs into registers for the duration of the loop. */
10757 load_mems (const struct loop
*loop
)
10759 struct loop_info
*loop_info
= LOOP_INFO (loop
);
10760 struct loop_regs
*regs
= LOOP_REGS (loop
);
10761 int maybe_never
= 0;
10763 rtx p
, prev_ebb_head
;
10764 rtx label
= NULL_RTX
;
10766 /* Nonzero if the next instruction may never be executed. */
10767 int next_maybe_never
= 0;
10768 unsigned int last_max_reg
= max_reg_num ();
10770 if (loop_info
->mems_idx
== 0)
10773 /* We cannot use next_label here because it skips over normal insns. */
10774 end_label
= next_nonnote_insn (loop
->end
);
10775 if (end_label
&& !LABEL_P (end_label
))
10776 end_label
= NULL_RTX
;
10778 /* Check to see if it's possible that some instructions in the loop are
10779 never executed. Also check if there is a goto out of the loop other
10780 than right after the end of the loop. */
10781 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
10783 p
= next_insn_in_loop (loop
, p
))
10787 else if (JUMP_P (p
)
10788 /* If we enter the loop in the middle, and scan
10789 around to the beginning, don't set maybe_never
10790 for that. This must be an unconditional jump,
10791 otherwise the code at the top of the loop might
10792 never be executed. Unconditional jumps are
10793 followed a by barrier then loop end. */
10795 && JUMP_LABEL (p
) == loop
->top
10796 && NEXT_INSN (NEXT_INSN (p
)) == loop
->end
10797 && any_uncondjump_p (p
)))
10799 /* If this is a jump outside of the loop but not right
10800 after the end of the loop, we would have to emit new fixup
10801 sequences for each such label. */
10802 if (/* If we can't tell where control might go when this
10803 JUMP_INSN is executed, we must be conservative. */
10805 || (JUMP_LABEL (p
) != end_label
10806 && (INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
10807 || INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop
->start
)
10808 || INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop
->end
))))
10811 if (!any_condjump_p (p
))
10812 /* Something complicated. */
10815 /* If there are any more instructions in the loop, they
10816 might not be reached. */
10817 next_maybe_never
= 1;
10819 else if (next_maybe_never
)
10823 /* Find start of the extended basic block that enters the loop. */
10824 for (p
= loop
->start
;
10825 PREV_INSN (p
) && !LABEL_P (p
);
10830 cselib_init (true);
10832 /* Build table of mems that get set to constant values before the
10834 for (; p
!= loop
->start
; p
= NEXT_INSN (p
))
10835 cselib_process_insn (p
);
10837 /* Actually move the MEMs. */
10838 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
10840 regset_head load_copies
;
10841 regset_head store_copies
;
10844 rtx mem
= loop_info
->mems
[i
].mem
;
10845 rtx mem_list_entry
;
10847 if (MEM_VOLATILE_P (mem
)
10848 || loop_invariant_p (loop
, XEXP (mem
, 0)) != 1)
10849 /* There's no telling whether or not MEM is modified. */
10850 loop_info
->mems
[i
].optimize
= 0;
10852 /* Go through the MEMs written to in the loop to see if this
10853 one is aliased by one of them. */
10854 mem_list_entry
= loop_info
->store_mems
;
10855 while (mem_list_entry
)
10857 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
10859 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
10860 mem
, rtx_varies_p
))
10862 /* MEM is indeed aliased by this store. */
10863 loop_info
->mems
[i
].optimize
= 0;
10866 mem_list_entry
= XEXP (mem_list_entry
, 1);
10869 if (flag_float_store
&& written
10870 && GET_MODE_CLASS (GET_MODE (mem
)) == MODE_FLOAT
)
10871 loop_info
->mems
[i
].optimize
= 0;
10873 /* If this MEM is written to, we must be sure that there
10874 are no reads from another MEM that aliases this one. */
10875 if (loop_info
->mems
[i
].optimize
&& written
)
10879 for (j
= 0; j
< loop_info
->mems_idx
; ++j
)
10883 else if (true_dependence (mem
,
10885 loop_info
->mems
[j
].mem
,
10888 /* It's not safe to hoist loop_info->mems[i] out of
10889 the loop because writes to it might not be
10890 seen by reads from loop_info->mems[j]. */
10891 loop_info
->mems
[i
].optimize
= 0;
10897 if (maybe_never
&& may_trap_p (mem
))
10898 /* We can't access the MEM outside the loop; it might
10899 cause a trap that wouldn't have happened otherwise. */
10900 loop_info
->mems
[i
].optimize
= 0;
10902 if (!loop_info
->mems
[i
].optimize
)
10903 /* We thought we were going to lift this MEM out of the
10904 loop, but later discovered that we could not. */
10907 INIT_REG_SET (&load_copies
);
10908 INIT_REG_SET (&store_copies
);
10910 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
10911 order to keep scan_loop from moving stores to this MEM
10912 out of the loop just because this REG is neither a
10913 user-variable nor used in the loop test. */
10914 reg
= gen_reg_rtx (GET_MODE (mem
));
10915 REG_USERVAR_P (reg
) = 1;
10916 loop_info
->mems
[i
].reg
= reg
;
10918 /* Now, replace all references to the MEM with the
10919 corresponding pseudos. */
10921 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
10923 p
= next_insn_in_loop (loop
, p
))
10929 set
= single_set (p
);
10931 /* See if this copies the mem into a register that isn't
10932 modified afterwards. We'll try to do copy propagation
10933 a little further on. */
10935 /* @@@ This test is _way_ too conservative. */
10937 && REG_P (SET_DEST (set
))
10938 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
10939 && REGNO (SET_DEST (set
)) < last_max_reg
10940 && regs
->array
[REGNO (SET_DEST (set
))].n_times_set
== 1
10941 && rtx_equal_p (SET_SRC (set
), mem
))
10942 SET_REGNO_REG_SET (&load_copies
, REGNO (SET_DEST (set
)));
10944 /* See if this copies the mem from a register that isn't
10945 modified afterwards. We'll try to remove the
10946 redundant copy later on by doing a little register
10947 renaming and copy propagation. This will help
10948 to untangle things for the BIV detection code. */
10951 && REG_P (SET_SRC (set
))
10952 && REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
10953 && REGNO (SET_SRC (set
)) < last_max_reg
10954 && regs
->array
[REGNO (SET_SRC (set
))].n_times_set
== 1
10955 && rtx_equal_p (SET_DEST (set
), mem
))
10956 SET_REGNO_REG_SET (&store_copies
, REGNO (SET_SRC (set
)));
10958 /* If this is a call which uses / clobbers this memory
10959 location, we must not change the interface here. */
10961 && reg_mentioned_p (loop_info
->mems
[i
].mem
,
10962 CALL_INSN_FUNCTION_USAGE (p
)))
10964 cancel_changes (0);
10965 loop_info
->mems
[i
].optimize
= 0;
10969 /* Replace the memory reference with the shadow register. */
10970 replace_loop_mems (p
, loop_info
->mems
[i
].mem
,
10971 loop_info
->mems
[i
].reg
, written
);
10979 if (! loop_info
->mems
[i
].optimize
)
10980 ; /* We found we couldn't do the replacement, so do nothing. */
10981 else if (! apply_change_group ())
10982 /* We couldn't replace all occurrences of the MEM. */
10983 loop_info
->mems
[i
].optimize
= 0;
10986 /* Load the memory immediately before LOOP->START, which is
10987 the NOTE_LOOP_BEG. */
10988 cselib_val
*e
= cselib_lookup (mem
, VOIDmode
, 0);
10992 struct elt_loc_list
*const_equiv
= 0;
10993 reg_set_iterator rsi
;
10997 struct elt_loc_list
*equiv
;
10998 struct elt_loc_list
*best_equiv
= 0;
10999 for (equiv
= e
->locs
; equiv
; equiv
= equiv
->next
)
11001 if (CONSTANT_P (equiv
->loc
))
11002 const_equiv
= equiv
;
11003 else if (REG_P (equiv
->loc
)
11004 /* Extending hard register lifetimes causes crash
11005 on SRC targets. Doing so on non-SRC is
11006 probably also not good idea, since we most
11007 probably have pseudoregister equivalence as
11009 && REGNO (equiv
->loc
) >= FIRST_PSEUDO_REGISTER
)
11010 best_equiv
= equiv
;
11012 /* Use the constant equivalence if that is cheap enough. */
11014 best_equiv
= const_equiv
;
11015 else if (const_equiv
11016 && (rtx_cost (const_equiv
->loc
, SET
)
11017 <= rtx_cost (best_equiv
->loc
, SET
)))
11019 best_equiv
= const_equiv
;
11023 /* If best_equiv is nonzero, we know that MEM is set to a
11024 constant or register before the loop. We will use this
11025 knowledge to initialize the shadow register with that
11026 constant or reg rather than by loading from MEM. */
11028 best
= copy_rtx (best_equiv
->loc
);
11031 set
= gen_move_insn (reg
, best
);
11032 set
= loop_insn_hoist (loop
, set
);
11035 for (p
= prev_ebb_head
; p
!= loop
->start
; p
= NEXT_INSN (p
))
11036 if (REGNO_LAST_UID (REGNO (best
)) == INSN_UID (p
))
11038 REGNO_LAST_UID (REGNO (best
)) = INSN_UID (set
);
11044 set_unique_reg_note (set
, REG_EQUAL
, copy_rtx (const_equiv
->loc
));
11048 if (label
== NULL_RTX
)
11050 label
= gen_label_rtx ();
11051 emit_label_after (label
, loop
->end
);
11054 /* Store the memory immediately after END, which is
11055 the NOTE_LOOP_END. */
11056 set
= gen_move_insn (copy_rtx (mem
), reg
);
11057 loop_insn_emit_after (loop
, 0, label
, set
);
11060 if (loop_dump_stream
)
11062 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
11063 REGNO (reg
), (written
? "r/w" : "r/o"));
11064 print_rtl (loop_dump_stream
, mem
);
11065 fputc ('\n', loop_dump_stream
);
11068 /* Attempt a bit of copy propagation. This helps untangle the
11069 data flow, and enables {basic,general}_induction_var to find
11071 EXECUTE_IF_SET_IN_REG_SET
11072 (&load_copies
, FIRST_PSEUDO_REGISTER
, j
, rsi
)
11074 try_copy_prop (loop
, reg
, j
);
11076 CLEAR_REG_SET (&load_copies
);
11078 EXECUTE_IF_SET_IN_REG_SET
11079 (&store_copies
, FIRST_PSEUDO_REGISTER
, j
, rsi
)
11081 try_swap_copy_prop (loop
, reg
, j
);
11083 CLEAR_REG_SET (&store_copies
);
11087 /* Now, we need to replace all references to the previous exit
11088 label with the new one. */
11089 if (label
!= NULL_RTX
&& end_label
!= NULL_RTX
)
11090 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
11091 if (JUMP_P (p
) && JUMP_LABEL (p
) == end_label
)
11092 redirect_jump (p
, label
, false);
11097 /* For communication between note_reg_stored and its caller. */
11098 struct note_reg_stored_arg
11104 /* Called via note_stores, record in SET_SEEN whether X, which is written,
11105 is equal to ARG. */
11107 note_reg_stored (rtx x
, rtx setter ATTRIBUTE_UNUSED
, void *arg
)
11109 struct note_reg_stored_arg
*t
= (struct note_reg_stored_arg
*) arg
;
11114 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
11115 There must be exactly one insn that sets this pseudo; it will be
11116 deleted if all replacements succeed and we can prove that the register
11117 is not used after the loop. */
11120 try_copy_prop (const struct loop
*loop
, rtx replacement
, unsigned int regno
)
11122 /* This is the reg that we are copying from. */
11123 rtx reg_rtx
= regno_reg_rtx
[regno
];
11126 /* These help keep track of whether we replaced all uses of the reg. */
11127 int replaced_last
= 0;
11128 int store_is_first
= 0;
11130 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
11132 insn
= next_insn_in_loop (loop
, insn
))
11136 /* Only substitute within one extended basic block from the initializing
11138 if (LABEL_P (insn
) && init_insn
)
11141 if (! INSN_P (insn
))
11144 /* Is this the initializing insn? */
11145 set
= single_set (insn
);
11147 && REG_P (SET_DEST (set
))
11148 && REGNO (SET_DEST (set
)) == regno
)
11150 gcc_assert (!init_insn
);
11153 if (REGNO_FIRST_UID (regno
) == INSN_UID (insn
))
11154 store_is_first
= 1;
11157 /* Only substitute after seeing the initializing insn. */
11158 if (init_insn
&& insn
!= init_insn
)
11160 struct note_reg_stored_arg arg
;
11162 replace_loop_regs (insn
, reg_rtx
, replacement
);
11163 if (REGNO_LAST_UID (regno
) == INSN_UID (insn
))
11166 /* Stop replacing when REPLACEMENT is modified. */
11167 arg
.reg
= replacement
;
11169 note_stores (PATTERN (insn
), note_reg_stored
, &arg
);
11172 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL
);
11174 /* It is possible that we've turned previously valid REG_EQUAL to
11175 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
11176 REPLACEMENT is modified, we get different meaning. */
11177 if (note
&& reg_mentioned_p (replacement
, XEXP (note
, 0)))
11178 remove_note (insn
, note
);
11183 gcc_assert (init_insn
);
11184 if (apply_change_group ())
11186 if (loop_dump_stream
)
11187 fprintf (loop_dump_stream
, " Replaced reg %d", regno
);
11188 if (store_is_first
&& replaced_last
)
11193 /* Assume we're just deleting INIT_INSN. */
11195 /* Look for REG_RETVAL note. If we're deleting the end of
11196 the libcall sequence, the whole sequence can go. */
11197 retval_note
= find_reg_note (init_insn
, REG_RETVAL
, NULL_RTX
);
11198 /* If we found a REG_RETVAL note, find the first instruction
11199 in the sequence. */
11201 first
= XEXP (retval_note
, 0);
11203 /* Delete the instructions. */
11204 loop_delete_insns (first
, init_insn
);
11206 if (loop_dump_stream
)
11207 fprintf (loop_dump_stream
, ".\n");
11211 /* Replace all the instructions from FIRST up to and including LAST
11212 with NOTE_INSN_DELETED notes. */
11215 loop_delete_insns (rtx first
, rtx last
)
11219 if (loop_dump_stream
)
11220 fprintf (loop_dump_stream
, ", deleting init_insn (%d)",
11222 delete_insn (first
);
11224 /* If this was the LAST instructions we're supposed to delete,
11229 first
= NEXT_INSN (first
);
11233 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
11234 loop LOOP if the order of the sets of these registers can be
11235 swapped. There must be exactly one insn within the loop that sets
11236 this pseudo followed immediately by a move insn that sets
11237 REPLACEMENT with REGNO. */
11239 try_swap_copy_prop (const struct loop
*loop
, rtx replacement
,
11240 unsigned int regno
)
11243 rtx set
= NULL_RTX
;
11244 unsigned int new_regno
;
11246 new_regno
= REGNO (replacement
);
11248 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
11250 insn
= next_insn_in_loop (loop
, insn
))
11252 /* Search for the insn that copies REGNO to NEW_REGNO? */
11254 && (set
= single_set (insn
))
11255 && REG_P (SET_DEST (set
))
11256 && REGNO (SET_DEST (set
)) == new_regno
11257 && REG_P (SET_SRC (set
))
11258 && REGNO (SET_SRC (set
)) == regno
)
11262 if (insn
!= NULL_RTX
)
11267 /* Some DEF-USE info would come in handy here to make this
11268 function more general. For now, just check the previous insn
11269 which is the most likely candidate for setting REGNO. */
11271 prev_insn
= PREV_INSN (insn
);
11274 && (prev_set
= single_set (prev_insn
))
11275 && REG_P (SET_DEST (prev_set
))
11276 && REGNO (SET_DEST (prev_set
)) == regno
)
11279 (set (reg regno) (expr))
11280 (set (reg new_regno) (reg regno))
11282 so try converting this to:
11283 (set (reg new_regno) (expr))
11284 (set (reg regno) (reg new_regno))
11286 The former construct is often generated when a global
11287 variable used for an induction variable is shadowed by a
11288 register (NEW_REGNO). The latter construct improves the
11289 chances of GIV replacement and BIV elimination. */
11291 validate_change (prev_insn
, &SET_DEST (prev_set
),
11293 validate_change (insn
, &SET_DEST (set
),
11295 validate_change (insn
, &SET_SRC (set
),
11298 if (apply_change_group ())
11300 if (loop_dump_stream
)
11301 fprintf (loop_dump_stream
,
11302 " Swapped set of reg %d at %d with reg %d at %d.\n",
11303 regno
, INSN_UID (insn
),
11304 new_regno
, INSN_UID (prev_insn
));
11306 /* Update first use of REGNO. */
11307 if (REGNO_FIRST_UID (regno
) == INSN_UID (prev_insn
))
11308 REGNO_FIRST_UID (regno
) = INSN_UID (insn
);
11310 /* Now perform copy propagation to hopefully
11311 remove all uses of REGNO within the loop. */
11312 try_copy_prop (loop
, replacement
, regno
);
11318 /* Worker function for find_mem_in_note, called via for_each_rtx. */
11321 find_mem_in_note_1 (rtx
*x
, void *data
)
11323 if (*x
!= NULL_RTX
&& MEM_P (*x
))
11325 rtx
*res
= (rtx
*) data
;
11332 /* Returns the first MEM found in NOTE by depth-first search. */
11335 find_mem_in_note (rtx note
)
11337 if (note
&& for_each_rtx (¬e
, find_mem_in_note_1
, ¬e
))
11342 /* Replace MEM with its associated pseudo register. This function is
11343 called from load_mems via for_each_rtx. DATA is actually a pointer
11344 to a structure describing the instruction currently being scanned
11345 and the MEM we are currently replacing. */
11348 replace_loop_mem (rtx
*mem
, void *data
)
11350 loop_replace_args
*args
= (loop_replace_args
*) data
;
11356 switch (GET_CODE (m
))
11362 /* We're not interested in the MEM associated with a
11363 CONST_DOUBLE, so there's no need to traverse into one. */
11367 /* This is not a MEM. */
11371 if (!rtx_equal_p (args
->match
, m
))
11372 /* This is not the MEM we are currently replacing. */
11375 /* Actually replace the MEM. */
11376 validate_change (args
->insn
, mem
, args
->replacement
, 1);
11382 replace_loop_mems (rtx insn
, rtx mem
, rtx reg
, int written
)
11384 loop_replace_args args
;
11388 args
.replacement
= reg
;
11390 for_each_rtx (&insn
, replace_loop_mem
, &args
);
11392 /* If we hoist a mem write out of the loop, then REG_EQUAL
11393 notes referring to the mem are no longer valid. */
11399 for (link
= ®_NOTES (insn
); (note
= *link
); link
= &XEXP (note
, 1))
11401 if (REG_NOTE_KIND (note
) == REG_EQUAL
11402 && (sub
= find_mem_in_note (note
))
11403 && true_dependence (mem
, VOIDmode
, sub
, rtx_varies_p
))
11405 /* Remove the note. */
11406 validate_change (NULL_RTX
, link
, XEXP (note
, 1), 1);
11413 /* Replace one register with another. Called through for_each_rtx; PX points
11414 to the rtx being scanned. DATA is actually a pointer to
11415 a structure of arguments. */
11418 replace_loop_reg (rtx
*px
, void *data
)
11421 loop_replace_args
*args
= (loop_replace_args
*) data
;
11426 if (x
== args
->match
)
11427 validate_change (args
->insn
, px
, args
->replacement
, 1);
11433 replace_loop_regs (rtx insn
, rtx reg
, rtx replacement
)
11435 loop_replace_args args
;
11439 args
.replacement
= replacement
;
11441 for_each_rtx (&insn
, replace_loop_reg
, &args
);
11444 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
11445 (ignored in the interim). */
11448 loop_insn_emit_after (const struct loop
*loop ATTRIBUTE_UNUSED
,
11449 basic_block where_bb ATTRIBUTE_UNUSED
, rtx where_insn
,
11452 return emit_insn_after (pattern
, where_insn
);
11456 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
11457 in basic block WHERE_BB (ignored in the interim) within the loop
11458 otherwise hoist PATTERN into the loop pre-header. */
11461 loop_insn_emit_before (const struct loop
*loop
,
11462 basic_block where_bb ATTRIBUTE_UNUSED
,
11463 rtx where_insn
, rtx pattern
)
11466 return loop_insn_hoist (loop
, pattern
);
11467 return emit_insn_before (pattern
, where_insn
);
11471 /* Emit call insn for PATTERN before WHERE_INSN in basic block
11472 WHERE_BB (ignored in the interim) within the loop. */
11475 loop_call_insn_emit_before (const struct loop
*loop ATTRIBUTE_UNUSED
,
11476 basic_block where_bb ATTRIBUTE_UNUSED
,
11477 rtx where_insn
, rtx pattern
)
11479 return emit_call_insn_before (pattern
, where_insn
);
11483 /* Hoist insn for PATTERN into the loop pre-header. */
11486 loop_insn_hoist (const struct loop
*loop
, rtx pattern
)
11488 return loop_insn_emit_before (loop
, 0, loop
->start
, pattern
);
11492 /* Hoist call insn for PATTERN into the loop pre-header. */
11495 loop_call_insn_hoist (const struct loop
*loop
, rtx pattern
)
11497 return loop_call_insn_emit_before (loop
, 0, loop
->start
, pattern
);
11501 /* Sink insn for PATTERN after the loop end. */
11504 loop_insn_sink (const struct loop
*loop
, rtx pattern
)
11506 return loop_insn_emit_before (loop
, 0, loop
->sink
, pattern
);
11509 /* bl->final_value can be either general_operand or PLUS of general_operand
11510 and constant. Emit sequence of instructions to load it into REG. */
11512 gen_load_of_final_value (rtx reg
, rtx final_value
)
11516 final_value
= force_operand (final_value
, reg
);
11517 if (final_value
!= reg
)
11518 emit_move_insn (reg
, final_value
);
11519 seq
= get_insns ();
11524 /* If the loop has multiple exits, emit insn for PATTERN before the
11525 loop to ensure that it will always be executed no matter how the
11526 loop exits. Otherwise, emit the insn for PATTERN after the loop,
11527 since this is slightly more efficient. */
11530 loop_insn_sink_or_swim (const struct loop
*loop
, rtx pattern
)
11532 if (loop
->exit_count
)
11533 return loop_insn_hoist (loop
, pattern
);
11535 return loop_insn_sink (loop
, pattern
);
11539 loop_ivs_dump (const struct loop
*loop
, FILE *file
, int verbose
)
11541 struct iv_class
*bl
;
11544 if (! loop
|| ! file
)
11547 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
11550 fprintf (file
, "Loop %d: %d IV classes\n", loop
->num
, iv_num
);
11552 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
11554 loop_iv_class_dump (bl
, file
, verbose
);
11555 fputc ('\n', file
);
11561 loop_iv_class_dump (const struct iv_class
*bl
, FILE *file
,
11562 int verbose ATTRIBUTE_UNUSED
)
11564 struct induction
*v
;
11568 if (! bl
|| ! file
)
11571 fprintf (file
, "IV class for reg %d, benefit %d\n",
11572 bl
->regno
, bl
->total_benefit
);
11574 fprintf (file
, " Init insn %d", INSN_UID (bl
->init_insn
));
11575 if (bl
->initial_value
)
11577 fprintf (file
, ", init val: ");
11578 print_simple_rtl (file
, bl
->initial_value
);
11580 if (bl
->initial_test
)
11582 fprintf (file
, ", init test: ");
11583 print_simple_rtl (file
, bl
->initial_test
);
11585 fputc ('\n', file
);
11587 if (bl
->final_value
)
11589 fprintf (file
, " Final val: ");
11590 print_simple_rtl (file
, bl
->final_value
);
11591 fputc ('\n', file
);
11594 if ((incr
= biv_total_increment (bl
)))
11596 fprintf (file
, " Total increment: ");
11597 print_simple_rtl (file
, incr
);
11598 fputc ('\n', file
);
11601 /* List the increments. */
11602 for (i
= 0, v
= bl
->biv
; v
; v
= v
->next_iv
, i
++)
11604 fprintf (file
, " Inc%d: insn %d, incr: ", i
, INSN_UID (v
->insn
));
11605 print_simple_rtl (file
, v
->add_val
);
11606 fputc ('\n', file
);
11609 /* List the givs. */
11610 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
, i
++)
11612 fprintf (file
, " Giv%d: insn %d, benefit %d, ",
11613 i
, INSN_UID (v
->insn
), v
->benefit
);
11614 if (v
->giv_type
== DEST_ADDR
)
11615 print_simple_rtl (file
, v
->mem
);
11617 print_simple_rtl (file
, single_set (v
->insn
));
11618 fputc ('\n', file
);
11624 loop_biv_dump (const struct induction
*v
, FILE *file
, int verbose
)
11631 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
11632 fprintf (file
, " const ");
11633 print_simple_rtl (file
, v
->add_val
);
11635 if (verbose
&& v
->final_value
)
11637 fputc ('\n', file
);
11638 fprintf (file
, " final ");
11639 print_simple_rtl (file
, v
->final_value
);
11642 fputc ('\n', file
);
11647 loop_giv_dump (const struct induction
*v
, FILE *file
, int verbose
)
11652 if (v
->giv_type
== DEST_REG
)
11653 fprintf (file
, "Giv %d: insn %d",
11654 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
11656 fprintf (file
, "Dest address: insn %d",
11657 INSN_UID (v
->insn
));
11659 fprintf (file
, " src reg %d benefit %d",
11660 REGNO (v
->src_reg
), v
->benefit
);
11661 fprintf (file
, " lifetime %d",
11664 if (v
->replaceable
)
11665 fprintf (file
, " replaceable");
11667 if (v
->no_const_addval
)
11668 fprintf (file
, " ncav");
11670 if (v
->ext_dependent
)
11672 switch (GET_CODE (v
->ext_dependent
))
11675 fprintf (file
, " ext se");
11678 fprintf (file
, " ext ze");
11681 fprintf (file
, " ext tr");
11684 gcc_unreachable ();
11688 fputc ('\n', file
);
11689 fprintf (file
, " mult ");
11690 print_simple_rtl (file
, v
->mult_val
);
11692 fputc ('\n', file
);
11693 fprintf (file
, " add ");
11694 print_simple_rtl (file
, v
->add_val
);
11696 if (verbose
&& v
->final_value
)
11698 fputc ('\n', file
);
11699 fprintf (file
, " final ");
11700 print_simple_rtl (file
, v
->final_value
);
11703 fputc ('\n', file
);
11708 debug_ivs (const struct loop
*loop
)
11710 loop_ivs_dump (loop
, stderr
, 1);
11715 debug_iv_class (const struct iv_class
*bl
)
11717 loop_iv_class_dump (bl
, stderr
, 1);
11722 debug_biv (const struct induction
*v
)
11724 loop_biv_dump (v
, stderr
, 1);
11729 debug_giv (const struct induction
*v
)
11731 loop_giv_dump (v
, stderr
, 1);
11735 #define LOOP_BLOCK_NUM_1(INSN) \
11736 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
11738 /* The notes do not have an assigned block, so look at the next insn. */
11739 #define LOOP_BLOCK_NUM(INSN) \
11740 ((INSN) ? (NOTE_P (INSN) \
11741 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
11742 : LOOP_BLOCK_NUM_1 (INSN)) \
11745 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
11748 loop_dump_aux (const struct loop
*loop
, FILE *file
,
11749 int verbose ATTRIBUTE_UNUSED
)
11753 if (! loop
|| ! file
|| !BB_HEAD (loop
->first
))
11756 /* Print diagnostics to compare our concept of a loop with
11757 what the loop notes say. */
11758 if (! PREV_INSN (BB_HEAD (loop
->first
))
11759 || !NOTE_P (PREV_INSN (BB_HEAD (loop
->first
)))
11760 || NOTE_LINE_NUMBER (PREV_INSN (BB_HEAD (loop
->first
)))
11761 != NOTE_INSN_LOOP_BEG
)
11762 fprintf (file
, ";; No NOTE_INSN_LOOP_BEG at %d\n",
11763 INSN_UID (PREV_INSN (BB_HEAD (loop
->first
))));
11764 if (! NEXT_INSN (BB_END (loop
->last
))
11765 || !NOTE_P (NEXT_INSN (BB_END (loop
->last
)))
11766 || NOTE_LINE_NUMBER (NEXT_INSN (BB_END (loop
->last
)))
11767 != NOTE_INSN_LOOP_END
)
11768 fprintf (file
, ";; No NOTE_INSN_LOOP_END at %d\n",
11769 INSN_UID (NEXT_INSN (BB_END (loop
->last
))));
11774 ";; start %d (%d), end %d (%d)\n",
11775 LOOP_BLOCK_NUM (loop
->start
),
11776 LOOP_INSN_UID (loop
->start
),
11777 LOOP_BLOCK_NUM (loop
->end
),
11778 LOOP_INSN_UID (loop
->end
));
11779 fprintf (file
, ";; top %d (%d), scan start %d (%d)\n",
11780 LOOP_BLOCK_NUM (loop
->top
),
11781 LOOP_INSN_UID (loop
->top
),
11782 LOOP_BLOCK_NUM (loop
->scan_start
),
11783 LOOP_INSN_UID (loop
->scan_start
));
11784 fprintf (file
, ";; exit_count %d", loop
->exit_count
);
11785 if (loop
->exit_count
)
11787 fputs (", labels:", file
);
11788 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
11790 fprintf (file
, " %d ",
11791 LOOP_INSN_UID (XEXP (label
, 0)));
11794 fputs ("\n", file
);
11798 /* Call this function from the debugger to dump LOOP. */
11801 debug_loop (const struct loop
*loop
)
11803 flow_loop_dump (loop
, stderr
, loop_dump_aux
, 1);
11806 /* Call this function from the debugger to dump LOOPS. */
11809 debug_loops (const struct loops
*loops
)
11811 flow_loops_dump (loops
, stderr
, loop_dump_aux
, 1);
11815 gate_handle_loop_optimize (void)
11817 return (optimize
> 0 && flag_loop_optimize
);
11820 /* Move constant computations out of loops. */
11822 rest_of_handle_loop_optimize (void)
11826 /* CFG is no longer maintained up-to-date. */
11827 free_bb_for_insn ();
11828 profile_status
= PROFILE_ABSENT
;
11830 do_prefetch
= flag_prefetch_loop_arrays
? LOOP_PREFETCH
: 0;
11832 if (flag_rerun_loop_opt
)
11834 cleanup_barriers ();
11836 /* We only want to perform unrolling once. */
11837 loop_optimize (get_insns (), dump_file
, 0);
11839 /* The first call to loop_optimize makes some instructions
11840 trivially dead. We delete those instructions now in the
11841 hope that doing so will make the heuristics in loop work
11842 better and possibly speed up compilation. */
11843 delete_trivially_dead_insns (get_insns (), max_reg_num ());
11845 /* The regscan pass is currently necessary as the alias
11846 analysis code depends on this information. */
11847 reg_scan (get_insns (), max_reg_num ());
11849 cleanup_barriers ();
11850 loop_optimize (get_insns (), dump_file
, do_prefetch
);
11852 /* Loop can create trivially dead instructions. */
11853 delete_trivially_dead_insns (get_insns (), max_reg_num ());
11854 find_basic_blocks (get_insns ());
11857 struct tree_opt_pass pass_loop_optimize
=
11859 "old-loop", /* name */
11860 gate_handle_loop_optimize
, /* gate */
11861 rest_of_handle_loop_optimize
, /* execute */
11864 0, /* static_pass_number */
11865 TV_LOOP
, /* tv_id */
11866 0, /* properties_required */
11867 0, /* properties_provided */
11868 0, /* properties_destroyed */
11869 0, /* todo_flags_start */
11871 TODO_ggc_collect
, /* todo_flags_finish */